## Automatically generated incremental diff ## From: linux-2.4.28-bk3 ## To: linux-2.4.28-bk4 ## Robot: $Id: make-incremental-diff,v 1.12 2004/01/06 07:19:36 hpa Exp $ diff -urN linux-2.4.28-bk3/Documentation/Configure.help linux-2.4.28-bk4/Documentation/Configure.help --- linux-2.4.28-bk3/Documentation/Configure.help 2004-11-23 02:49:24.607278506 -0800 +++ linux-2.4.28-bk4/Documentation/Configure.help 2004-11-23 02:49:27.285387639 -0800 @@ -2557,9 +2557,9 @@ # Choice: mipstype CPU type -CONFIG_CPU_R3000 +CONFIG_CPU_MIPS32 Please make sure to pick the right CPU type. Linux/MIPS is not - designed to be generic, i.e. Kernels compiled for R3000 CPUs will + designed to be generic, i.e. kernels compiled for R3000 CPUs will *not* work on R4000 machines and vice versa. However, since most of the supported machines have an R4000 (or similar) CPU, R4x00 might be a safe bet. If the resulting kernel does not work, @@ -2683,6 +2683,19 @@ machines which require flushing of write buffers in software. Saying Y is the safe option; N may result in kernel malfunction and crashes. +Use 64-bit ELF format for building +CONFIG_BUILD_ELF64 + A 64-bit kernel is usually built using the 64-bit ELF binary object + format as it's one that allows arbitrary 64-bit constructs. For + kernels that are loaded within the KSEG compatibility segments the + 32-bit ELF format can optionally be used resulting in a somewhat + smaller binary, but this option is not explicitly supported by the + toolchain and since binutils 2.14 it does not even work at all. + + Say Y to use the 64-bit format or N to use the 32-bit one. + + If unsure say Y. + Support for large 64-bit configurations CONFIG_MIPS_INSANE_LARGE MIPS R10000 does support a 44 bit / 16TB address space as opposed to @@ -5214,10 +5227,17 @@ This is the frame buffer device driver for the Chips & Technologies 65550 graphics chip in PowerBooks. -TGA frame buffer support +TGA/SFB+ frame buffer support CONFIG_FB_TGA - This is the frame buffer device driver for generic TGA graphic - cards. Say Y if you have one of those. + This is the frame buffer device driver for generic TGA and SFB+ + graphic cards. These include DEC ZLXp-E1, E2 and E3 PCI cards, + also known as PBXGA-A, B and C, and DEC ZLX-E2 and E3 TURBOchannel + cards, also known as PMAGD-B and C. The DEC ZLX-E1 or PMAGD-A card + is currently unsupported. Due to hardware limitations ZLX-E2 and + E3 cards are only supported for DECstation 5000/1xx and Personal + DECstation 5000/xx systems. + + Say Y if you have one of those. VESA VGA graphics console CONFIG_FB_VESA @@ -13518,10 +13538,11 @@ then also Y to the driver for your FDDI card, below). Most people will say N. -Digital DEFEA and DEFPA adapter support +Digital DEFTA/DEFEA/DEFPA adapter support CONFIG_DEFXX - This is support for the DIGITAL series of EISA (DEFEA) and PCI - (DEFPA) controllers which can connect you to a local FDDI network. + This is support for the DIGITAL series of TURBOchannel (DEFTA), EISA + (DEFEA) and PCI (DEFPA) controllers which can connect you to a local + FDDI network. If you want to compile the driver as a module ( = code which can be inserted in and removed from the running kernel whenever you want), diff -urN linux-2.4.28-bk3/Documentation/mips/time.README linux-2.4.28-bk4/Documentation/mips/time.README --- linux-2.4.28-bk3/Documentation/mips/time.README 2003-08-25 04:44:39.000000000 -0700 +++ linux-2.4.28-bk4/Documentation/mips/time.README 2004-11-23 02:49:27.286387680 -0800 @@ -30,6 +30,7 @@ However, it is expected every board will move to the new time.c in the near future. +In Linux 2.5 and Linux 2.4.26 CONFIG_OLD_TIME_C was removed. WHAT THE NEW CODE PROVIDES? --------------------------- diff -urN linux-2.4.28-bk3/MAINTAINERS linux-2.4.28-bk4/MAINTAINERS --- linux-2.4.28-bk3/MAINTAINERS 2004-11-17 03:54:21.000000000 -0800 +++ linux-2.4.28-bk4/MAINTAINERS 2004-11-23 02:49:27.290387843 -0800 @@ -579,6 +579,11 @@ L: linux-decnet-user@lists.sourceforge.net S: Maintained +DEFXX FDDI NETWORK DRIVER +P: Maciej W. Rozycki +M: macro@linux-mips.org +S: Maintained + DELL LAPTOP SMM DRIVER P: Massimo Dal Zotto M: dz@debian.org @@ -1496,13 +1501,6 @@ W: http://www.realitydiluted.com/projects/nino S: Maintained -PHILIPS NINO PALM PC -P: Steven Hill -M: sjhill@realitydiluted.com -L: linux-mips@oss.sgi.com -W: http://www.realitydiluted.com/projects/nino -S: Maintained - PNP SUPPORT P: Tom Lees M: tom@lpsg.demon.co.uk diff -urN linux-2.4.28-bk3/Makefile linux-2.4.28-bk4/Makefile --- linux-2.4.28-bk3/Makefile 2004-11-23 02:49:24.648280177 -0800 +++ linux-2.4.28-bk4/Makefile 2004-11-23 02:49:27.291387884 -0800 @@ -1,7 +1,7 @@ VERSION = 2 PATCHLEVEL = 4 SUBLEVEL = 28 -EXTRAVERSION = -bk3 +EXTRAVERSION = -bk4 KERNELRELEASE=$(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION) diff -urN linux-2.4.28-bk3/arch/i386/kernel/pci-irq.c linux-2.4.28-bk4/arch/i386/kernel/pci-irq.c --- linux-2.4.28-bk3/arch/i386/kernel/pci-irq.c 2004-11-17 03:54:21.000000000 -0800 +++ linux-2.4.28-bk4/arch/i386/kernel/pci-irq.c 2004-11-23 02:49:27.292387925 -0800 @@ -248,6 +248,44 @@ } /* + * OPTI Viper-M/N+: Bit field with 3 bits per entry. + * Due to the lack of a specification the information about this chipset + * was taken from the NetBSD source code. + */ +static int pirq_viper_get(struct pci_dev *router, struct pci_dev *dev, int pirq) +{ + static const int viper_irq_decode[] = { 0, 5, 9, 10, 11, 12, 14, 15 }; + u32 irq; + + pci_read_config_dword(router, 0x40, &irq); + irq >>= (pirq-1)*3; + irq &= 7; + + return viper_irq_decode[irq]; +} + +static int pirq_viper_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq) +{ + static const int viper_irq_map[] = { -1, -1, -1, -1, -1, 1, -1, -1, -1, 2, 3, 4, 5, -1, 6, 7 }; + int newval = viper_irq_map[irq]; + u32 val; + u32 mask = 7 << (3*(pirq-1)); +#if 0 + mask |= 0x10000UL << (pirq-1); /* edge triggered */ +#endif + + if ( newval == -1 ) + return 0; + + pci_read_config_dword(router, 0x40, &val); + val &= ~mask; + val |= newval << (3*(pirq-1)); + pci_write_config_dword(router, 0x40, val); + + return 1; +} + +/* * Cyrix: nibble offset 0x5C */ static int pirq_cyrix_get(struct pci_dev *router, struct pci_dev *dev, int pirq) @@ -715,9 +753,16 @@ r->name = "OPTI"; r->get = pirq_opti_get; r->set = pirq_opti_set; - return 1; + break; + case PCI_DEVICE_ID_OPTI_82C558: + r->name = "OPTI VIPER"; + r->get = pirq_viper_get; + r->set = pirq_viper_set; + break; + default: + return 0; } - return 0; + return 1; } static __init int ite_router_probe(struct irq_router *r, struct pci_dev *router, u16 device) diff -urN linux-2.4.28-bk3/arch/i386/kernel/pci-pc.c linux-2.4.28-bk4/arch/i386/kernel/pci-pc.c --- linux-2.4.28-bk3/arch/i386/kernel/pci-pc.c 2004-11-17 03:54:21.000000000 -0800 +++ linux-2.4.28-bk4/arch/i386/kernel/pci-pc.c 2004-11-23 02:49:27.293387965 -0800 @@ -594,7 +594,7 @@ unsigned long flags; __save_flags(flags); __cli(); - __asm__("lcall (%%edi); cld" + __asm__("lcall *(%%edi); cld" : "=a" (return_code), "=b" (address), "=c" (length), @@ -635,7 +635,7 @@ __save_flags(flags); __cli(); __asm__( - "lcall (%%edi); cld\n\t" + "lcall *(%%edi); cld\n\t" "jc 1f\n\t" "xor %%ah, %%ah\n" "1:" @@ -680,7 +680,7 @@ unsigned short bx; unsigned short ret; - __asm__("lcall (%%edi); cld\n\t" + __asm__("lcall *(%%edi); cld\n\t" "jc 1f\n\t" "xor %%ah, %%ah\n" "1:" @@ -709,7 +709,7 @@ switch (len) { case 1: - __asm__("lcall (%%esi); cld\n\t" + __asm__("lcall *(%%esi); cld\n\t" "jc 1f\n\t" "xor %%ah, %%ah\n" "1:" @@ -721,7 +721,7 @@ "S" (&pci_indirect)); break; case 2: - __asm__("lcall (%%esi); cld\n\t" + __asm__("lcall *(%%esi); cld\n\t" "jc 1f\n\t" "xor %%ah, %%ah\n" "1:" @@ -733,7 +733,7 @@ "S" (&pci_indirect)); break; case 4: - __asm__("lcall (%%esi); cld\n\t" + __asm__("lcall *(%%esi); cld\n\t" "jc 1f\n\t" "xor %%ah, %%ah\n" "1:" @@ -764,7 +764,7 @@ switch (len) { case 1: - __asm__("lcall (%%esi); cld\n\t" + __asm__("lcall *(%%esi); cld\n\t" "jc 1f\n\t" "xor %%ah, %%ah\n" "1:" @@ -776,7 +776,7 @@ "S" (&pci_indirect)); break; case 2: - __asm__("lcall (%%esi); cld\n\t" + __asm__("lcall *(%%esi); cld\n\t" "jc 1f\n\t" "xor %%ah, %%ah\n" "1:" @@ -788,7 +788,7 @@ "S" (&pci_indirect)); break; case 4: - __asm__("lcall (%%esi); cld\n\t" + __asm__("lcall *(%%esi); cld\n\t" "jc 1f\n\t" "xor %%ah, %%ah\n" "1:" @@ -1011,7 +1011,7 @@ __asm__("push %%es\n\t" "push %%ds\n\t" "pop %%es\n\t" - "lcall (%%esi); cld\n\t" + "lcall *(%%esi); cld\n\t" "pop %%es\n\t" "jc 1f\n\t" "xor %%ah, %%ah\n" @@ -1047,7 +1047,7 @@ { int ret; - __asm__("lcall (%%esi); cld\n\t" + __asm__("lcall *(%%esi); cld\n\t" "jc 1f\n\t" "xor %%ah, %%ah\n" "1:" diff -urN linux-2.4.28-bk3/arch/mips/Makefile linux-2.4.28-bk4/arch/mips/Makefile --- linux-2.4.28-bk3/arch/mips/Makefile 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/Makefile 2004-11-23 02:49:27.294388006 -0800 @@ -5,7 +5,7 @@ # # Copyright (C) 1994, 1995, 1996 by Ralf Baechle # DECStation modifications by Paul M. Antoine, 1996 -# Copyright (C) 2002, 2003 Maciej W. Rozycki +# Copyright (C) 2002, 2003, 2004 Maciej W. Rozycki # # This file is included by the global makefile so that you can add your own # architecture-specific flags and dependencies. Remember to do have actions @@ -28,6 +28,8 @@ CROSS_COMPILE = $(tool-prefix) endif +MAKEBOOT = $(MAKE) -C arch/$(ARCH)/boot + check_gcc = $(shell if $(CC) $(1) -S -o /dev/null -xc /dev/null > /dev/null 2>&1; then echo "$(1)"; else echo "$(2)"; fi) # @@ -44,7 +46,7 @@ GCCFLAGS := -I $(TOPDIR)/include/asm/gcc GCCFLAGS += -G 0 -mno-abicalls -fno-pic -pipe GCCFLAGS += $(call check_gcc, -finline-limit=100000,) -LINKFLAGS += -G 0 -static # -N +LINKFLAGS += -G 0 -static -n MODFLAGS += -mlong-calls ifdef CONFIG_DEBUG_INFO @@ -98,6 +100,11 @@ gas_abi=; gas_opt=; gas_cpu=; gas_isa=; \ break; \ done; \ +if test "$$gcc_opt" = -march= && test -n "$$gcc_abi"; then \ + $(CC) $$gcc_abi $$gcc_opt$$gcc_cpu -S -o /dev/null \ + -xc /dev/null > /dev/null 2>&1 && \ + gcc_isa=; \ +fi; \ echo $$gcc_abi $$gcc_opt$$gcc_cpu $$gcc_isa $$gas_abi $$gas_opt$$gas_cpu $$gas_isa) # @@ -168,7 +175,8 @@ AFLAGS += $(GCCFLAGS) CFLAGS += $(GCCFLAGS) -LDFLAGS += -m $(ld-emul) + +LD += -m $(ld-emul) # @@ -249,6 +257,13 @@ LOADADDR += 0x80100000 endif +ifdef CONFIG_MIPS_DB1550 +LIBS += arch/mips/au1000/db1x00/db1x00.o \ + arch/mips/au1000/common/au1000.o +SUBDIRS += arch/mips/au1000/db1x00 arch/mips/au1000/common +LOADADDR += 0x80100000 +endif + ifdef CONFIG_MIPS_DB1100 LIBS += arch/mips/au1000/db1x00/db1x00.o \ arch/mips/au1000/common/au1000.o @@ -463,6 +478,18 @@ LOADADDR := 0x80100000 endif +ifdef CONFIG_PMC_BIG_SUR +CORE_FILES += arch/mips/pmc-sierra/big_sur/big_sur.o +SUBDIRS += arch/mips/pmc-sierra/big_sur +LOADADDR := 0x80100000 +endif + +ifdef CONFIG_PMC_STRETCH +CORE_FILES += arch/mips/pmc-sierra/stretch/stretch.o +SUBDIRS += arch/mips/pmc-sierra/stretch +LOADADDR := 0x80200000 +endif + ifdef CONFIG_MOMENCO_JAGUAR_ATX LIBS += arch/mips/momentum/jaguar_atx/jaguar_atx.o SUBDIRS += arch/mips/momentum/jaguar_atx @@ -723,7 +750,10 @@ $(MAKE) -C arch/$(ARCH)/lasat/image $@ endif -MAKEBOOT = $(MAKE) -C arch/$(ARCH)/boot +boot: mips-boot + +mips-boot: vmlinux + @$(MAKEBOOT) boot vmlinux.ecoff: vmlinux @$(MAKEBOOT) $@ diff -urN linux-2.4.28-bk3/arch/mips/au1000/common/Makefile linux-2.4.28-bk4/arch/mips/au1000/common/Makefile --- linux-2.4.28-bk3/arch/mips/au1000/common/Makefile 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/au1000/common/Makefile 2004-11-23 02:49:27.295388047 -0800 @@ -18,8 +18,10 @@ export-objs = prom.o clocks.o power.o usbdev.o -obj-y := prom.o int-handler.o dma.o irq.o puts.o time.o reset.o \ - clocks.o power.o setup.o sleeper.o +obj-y := prom.o int-handler.o irq.o puts.o time.o reset.o cputable.o \ + au1xxx_irqmap.o clocks.o power.o setup.o sleeper.o dma.o dbdma.o + +export-objs += dma.o dbdma.o obj-$(CONFIG_AU1X00_USB_DEVICE) += usbdev.o obj-$(CONFIG_KGDB) += dbg_io.o diff -urN linux-2.4.28-bk3/arch/mips/au1000/common/au1xxx_irqmap.c linux-2.4.28-bk4/arch/mips/au1000/common/au1xxx_irqmap.c --- linux-2.4.28-bk3/arch/mips/au1000/common/au1xxx_irqmap.c 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/au1000/common/au1xxx_irqmap.c 2004-11-23 02:49:27.296388088 -0800 @@ -0,0 +1,223 @@ +/* + * BRIEF MODULE DESCRIPTION + * Au1xxx processor specific IRQ tables + * + * Copyright 2004 Embedded Edge, LLC + * dan@embeddededge.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +/* The IC0 interrupt table. This is processor, rather than + * board dependent, so no reason to keep this info in the board + * dependent files. + * + * Careful if you change match 2 request! + * The interrupt handler is called directly from the low level dispatch code. + */ +au1xxx_irq_map_t au1xxx_ic0_map[] = { + +#if defined(CONFIG_SOC_AU1000) + { AU1000_UART0_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_UART1_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_UART2_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_UART3_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_SSI0_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_SSI1_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_DMA_INT_BASE, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_DMA_INT_BASE+1, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_DMA_INT_BASE+2, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_DMA_INT_BASE+3, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_DMA_INT_BASE+4, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_DMA_INT_BASE+5, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_DMA_INT_BASE+6, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_DMA_INT_BASE+7, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 }, + { AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 }, + { AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 }, + { AU1000_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 }, + { AU1000_RTC_INT, INTC_INT_RISE_EDGE, 0 }, + { AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 }, + { AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 }, + { AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 }, + { AU1000_IRDA_TX_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_IRDA_RX_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_USB_DEV_REQ_INT, INTC_INT_HIGH_LEVEL, 0 }, + { AU1000_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 }, + { AU1000_USB_HOST_INT, INTC_INT_LOW_LEVEL, 0 }, + { AU1000_ACSYNC_INT, INTC_INT_RISE_EDGE, 0 }, + { AU1000_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_MAC1_DMA_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_AC97C_INT, INTC_INT_RISE_EDGE, 0 }, + +#elif defined(CONFIG_SOC_AU1500) + + { AU1500_UART0_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_PCI_INTA, INTC_INT_LOW_LEVEL, 0 }, + { AU1000_PCI_INTB, INTC_INT_LOW_LEVEL, 0 }, + { AU1500_UART3_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_PCI_INTC, INTC_INT_LOW_LEVEL, 0 }, + { AU1000_PCI_INTD, INTC_INT_LOW_LEVEL, 0 }, + { AU1000_DMA_INT_BASE, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_DMA_INT_BASE+1, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_DMA_INT_BASE+2, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_DMA_INT_BASE+3, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_DMA_INT_BASE+4, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_DMA_INT_BASE+5, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_DMA_INT_BASE+6, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_DMA_INT_BASE+7, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 }, + { AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 }, + { AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 }, + { AU1000_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 }, + { AU1000_RTC_INT, INTC_INT_RISE_EDGE, 0 }, + { AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 }, + { AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 }, + { AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 }, + { AU1000_USB_DEV_REQ_INT, INTC_INT_HIGH_LEVEL, 0 }, + { AU1000_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 }, + { AU1000_USB_HOST_INT, INTC_INT_LOW_LEVEL, 0 }, + { AU1000_ACSYNC_INT, INTC_INT_RISE_EDGE, 0 }, + { AU1500_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1500_MAC1_DMA_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_AC97C_INT, INTC_INT_RISE_EDGE, 0 }, + +#elif defined(CONFIG_SOC_AU1100) + + { AU1100_UART0_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1100_UART1_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1100_SD_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1100_UART3_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_SSI0_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_SSI1_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_DMA_INT_BASE, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_DMA_INT_BASE+1, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_DMA_INT_BASE+2, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_DMA_INT_BASE+3, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_DMA_INT_BASE+4, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_DMA_INT_BASE+5, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_DMA_INT_BASE+6, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_DMA_INT_BASE+7, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 }, + { AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 }, + { AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 }, + { AU1000_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 }, + { AU1000_RTC_INT, INTC_INT_RISE_EDGE, 0 }, + { AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 }, + { AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 }, + { AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 }, + { AU1000_IRDA_TX_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_IRDA_RX_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_USB_DEV_REQ_INT, INTC_INT_HIGH_LEVEL, 0 }, + { AU1000_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 }, + { AU1000_USB_HOST_INT, INTC_INT_LOW_LEVEL, 0 }, + { AU1000_ACSYNC_INT, INTC_INT_RISE_EDGE, 0 }, + { AU1100_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0}, + /*{ AU1000_GPIO215_208_INT, INTC_INT_HIGH_LEVEL, 0},*/ + { AU1100_LCD_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_AC97C_INT, INTC_INT_RISE_EDGE, 0 }, + +#elif defined(CONFIG_SOC_AU1550) + + { AU1550_UART0_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1550_PCI_INTA, INTC_INT_LOW_LEVEL, 0 }, + { AU1550_PCI_INTB, INTC_INT_LOW_LEVEL, 0 }, + { AU1550_DDMA_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1550_CRYPTO_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1550_PCI_INTC, INTC_INT_LOW_LEVEL, 0 }, + { AU1550_PCI_INTD, INTC_INT_LOW_LEVEL, 0 }, + { AU1550_PCI_RST_INT, INTC_INT_LOW_LEVEL, 0 }, + { AU1550_UART1_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1550_UART3_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1550_PSC0_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1550_PSC1_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1550_PSC2_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1550_PSC3_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1550_TOY_INT, INTC_INT_RISE_EDGE, 0 }, + { AU1550_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 }, + { AU1550_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 }, + { AU1550_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 }, + { AU1550_RTC_INT, INTC_INT_RISE_EDGE, 0 }, + { AU1550_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 }, + { AU1550_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 }, + { AU1550_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 }, + { AU1550_NAND_INT, INTC_INT_RISE_EDGE, 0}, + { AU1550_USB_DEV_REQ_INT, INTC_INT_HIGH_LEVEL, 0 }, + { AU1550_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 }, + { AU1550_USB_HOST_INT, INTC_INT_LOW_LEVEL, 0 }, + { AU1550_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1550_MAC1_DMA_INT, INTC_INT_HIGH_LEVEL, 0}, + +#elif defined(CONFIG_SOC_AU1200) + + { AU1200_UART0_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1200_SWT_INT, INTC_INT_RISE_EDGE, 0 }, + { AU1200_SD_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1200_DDMA_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1200_MAE_BE_INT, INTC_INT_HIGH_LEVEL, 0 }, + { AU1200_UART1_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1200_MAE_FE_INT, INTC_INT_HIGH_LEVEL, 0 }, + { AU1200_PSC0_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1200_PSC1_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1200_AES_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1200_CAMERA_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1200_TOY_INT, INTC_INT_RISE_EDGE, 0 }, + { AU1200_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 }, + { AU1200_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 }, + { AU1200_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 }, + { AU1200_RTC_INT, INTC_INT_RISE_EDGE, 0 }, + { AU1200_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 }, + { AU1200_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 }, + { AU1200_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 }, + { AU1200_NAND_INT, INTC_INT_RISE_EDGE, 0}, + { AU1200_USB_INT, INTC_INT_HIGH_LEVEL, 0 }, + { AU1200_LCD_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1200_MAE_BOTH_INT, INTC_INT_HIGH_LEVEL, 0}, + +#else +#error "Error: Unknown Alchemy SOC" +#endif + +}; + +int au1xxx_ic0_nr_irqs = sizeof(au1xxx_ic0_map)/sizeof(au1xxx_irq_map_t); + diff -urN linux-2.4.28-bk3/arch/mips/au1000/common/clocks.c linux-2.4.28-bk4/arch/mips/au1000/common/clocks.c --- linux-2.4.28-bk3/arch/mips/au1000/common/clocks.c 2003-08-25 04:44:39.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips/au1000/common/clocks.c 2004-11-23 02:49:27.296388088 -0800 @@ -95,4 +95,5 @@ return lcd_clock; } +EXPORT_SYMBOL(get_au1x00_speed); EXPORT_SYMBOL(get_au1x00_lcd_clock); diff -urN linux-2.4.28-bk3/arch/mips/au1000/common/cputable.c linux-2.4.28-bk4/arch/mips/au1000/common/cputable.c --- linux-2.4.28-bk3/arch/mips/au1000/common/cputable.c 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/au1000/common/cputable.c 2004-11-23 02:49:27.297388128 -0800 @@ -0,0 +1,57 @@ +/* + * arch/mips/au1000/common/cputable.c + * + * Copyright (C) 2004 Dan Malek (dan@embeddededge.com) + * Copied from PowerPC and updated for Alchemy Au1xxx processors. + * + * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org) + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include + +struct cpu_spec* cur_cpu_spec[NR_CPUS]; + +/* With some thought, we can probably use the mask to reduce the + * size of the table. + */ +struct cpu_spec cpu_specs[] = { + { 0xffffffff, 0x00030100, "Au1000 DA", 1, 0 }, + { 0xffffffff, 0x00030201, "Au1000 HA", 1, 0 }, + { 0xffffffff, 0x00030202, "Au1000 HB", 1, 0 }, + { 0xffffffff, 0x00030203, "Au1000 HC", 1, 1 }, + { 0xffffffff, 0x00030204, "Au1000 HD", 1, 1 }, + { 0xffffffff, 0x01030200, "Au1500 AB", 1, 1 }, + { 0xffffffff, 0x01030201, "Au1500 AC", 0, 1 }, + { 0xffffffff, 0x01030202, "Au1500 AD", 0, 1 }, + { 0xffffffff, 0x02030200, "Au1100 AB", 1, 1 }, + { 0xffffffff, 0x02030201, "Au1100 BA", 1, 1 }, + { 0xffffffff, 0x02030202, "Au1100 BC", 1, 1 }, + { 0xffffffff, 0x02030203, "Au1100 BD", 0, 1 }, + { 0xffffffff, 0x02030204, "Au1100 BE", 0, 1 }, + { 0xffffffff, 0x03030200, "Au1550 AA", 0, 1 }, + { 0xffffffff, 0x04030200, "Au1200 AA", 0, 1 }, + { 0x00000000, 0x00000000, "Unknown Au1xxx", 1, 0 }, +}; + +void +set_cpuspec(void) +{ + struct cpu_spec *sp; + u32 prid; + + prid = read_c0_prid(); + sp = cpu_specs; + while ((prid & sp->prid_mask) != sp->prid_value) + sp++; + cur_cpu_spec[0] = sp; +} diff -urN linux-2.4.28-bk3/arch/mips/au1000/common/dbdma.c linux-2.4.28-bk4/arch/mips/au1000/common/dbdma.c --- linux-2.4.28-bk3/arch/mips/au1000/common/dbdma.c 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/au1000/common/dbdma.c 2004-11-23 02:49:27.298388169 -0800 @@ -0,0 +1,834 @@ +/* + * + * BRIEF MODULE DESCRIPTION + * The Descriptor Based DMA channel manager that first appeared + * on the Au1550. I started with dma.c, but I think all that is + * left is this initial comment :-) + * + * Copyright 2004 Embedded Edge, LLC + * dan@embeddededge.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#if defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200) + +/* + * The Descriptor Based DMA supports up to 16 channels. + * + * There are 32 devices defined. We keep an internal structure + * of devices using these channels, along with additional + * information. + * + * We allocate the descriptors and allow access to them through various + * functions. The drivers allocate the data buffers and assign them + * to the descriptors. + */ +static spinlock_t au1xxx_dbdma_spin_lock = SPIN_LOCK_UNLOCKED; + +/* I couldn't find a macro that did this...... +*/ +#define ALIGN_ADDR(x, a) ((((u32)(x)) + (a-1)) & ~(a-1)) + +static volatile dbdma_global_t *dbdma_gptr = (dbdma_global_t *)DDMA_GLOBAL_BASE; +static int dbdma_initialized; +static void au1xxx_dbdma_init(void); + +typedef struct dbdma_device_table { + u32 dev_id; + u32 dev_flags; + u32 dev_tsize; + u32 dev_devwidth; + u32 dev_physaddr; /* If FIFO */ + u32 dev_intlevel; + u32 dev_intpolarity; +} dbdev_tab_t; + +typedef struct dbdma_chan_config { + u32 chan_flags; + u32 chan_index; + dbdev_tab_t *chan_src; + dbdev_tab_t *chan_dest; + au1x_dma_chan_t *chan_ptr; + au1x_ddma_desc_t *chan_desc_base; + au1x_ddma_desc_t *get_ptr, *put_ptr, *cur_ptr; + void *chan_callparam; + void (*chan_callback)(int, void *, struct pt_regs *); +} chan_tab_t; + +#define DEV_FLAGS_INUSE (1 << 0) +#define DEV_FLAGS_ANYUSE (1 << 1) +#define DEV_FLAGS_OUT (1 << 2) +#define DEV_FLAGS_IN (1 << 3) + +static dbdev_tab_t dbdev_tab[] = { +#ifdef CONFIG_SOC_AU1550 + /* UARTS */ + { DSCR_CMD0_UART0_TX, DEV_FLAGS_OUT, 0, 8, 0x11100004, 0, 0 }, + { DSCR_CMD0_UART0_RX, DEV_FLAGS_IN, 0, 8, 0x11100000, 0, 0 }, + { DSCR_CMD0_UART3_TX, DEV_FLAGS_OUT, 0, 8, 0x11400004, 0, 0 }, + { DSCR_CMD0_UART3_RX, DEV_FLAGS_IN, 0, 8, 0x11400000, 0, 0 }, + + /* EXT DMA */ + { DSCR_CMD0_DMA_REQ0, 0, 0, 0, 0x00000000, 0, 0 }, + { DSCR_CMD0_DMA_REQ1, 0, 0, 0, 0x00000000, 0, 0 }, + { DSCR_CMD0_DMA_REQ2, 0, 0, 0, 0x00000000, 0, 0 }, + { DSCR_CMD0_DMA_REQ3, 0, 0, 0, 0x00000000, 0, 0 }, + + /* USB DEV */ + { DSCR_CMD0_USBDEV_RX0, DEV_FLAGS_IN, 4, 8, 0x10200000, 0, 0 }, + { DSCR_CMD0_USBDEV_TX0, DEV_FLAGS_OUT, 4, 8, 0x10200004, 0, 0 }, + { DSCR_CMD0_USBDEV_TX1, DEV_FLAGS_OUT, 4, 8, 0x10200008, 0, 0 }, + { DSCR_CMD0_USBDEV_TX2, DEV_FLAGS_OUT, 4, 8, 0x1020000c, 0, 0 }, + { DSCR_CMD0_USBDEV_RX3, DEV_FLAGS_IN, 4, 8, 0x10200010, 0, 0 }, + { DSCR_CMD0_USBDEV_RX4, DEV_FLAGS_IN, 4, 8, 0x10200014, 0, 0 }, + + /* PSC 0 */ + { DSCR_CMD0_PSC0_TX, DEV_FLAGS_OUT, 0, 0, 0x11a0001c, 0, 0 }, + { DSCR_CMD0_PSC0_RX, DEV_FLAGS_IN, 0, 0, 0x11a0001c, 0, 0 }, + + /* PSC 1 */ + { DSCR_CMD0_PSC1_TX, DEV_FLAGS_OUT, 0, 0, 0x11b0001c, 0, 0 }, + { DSCR_CMD0_PSC1_RX, DEV_FLAGS_IN, 0, 0, 0x11b0001c, 0, 0 }, + + /* PSC 2 */ + { DSCR_CMD0_PSC2_TX, DEV_FLAGS_OUT, 0, 0, 0x10a0001c, 0, 0 }, + { DSCR_CMD0_PSC2_RX, DEV_FLAGS_IN, 0, 0, 0x10a0001c, 0, 0 }, + + /* PSC 3 */ + { DSCR_CMD0_PSC3_TX, DEV_FLAGS_OUT, 0, 0, 0x10b0001c, 0, 0 }, + { DSCR_CMD0_PSC3_RX, DEV_FLAGS_IN, 0, 0, 0x10b0001c, 0, 0 }, + + { DSCR_CMD0_PCI_WRITE, 0, 0, 0, 0x00000000, 0, 0 }, /* PCI */ + { DSCR_CMD0_NAND_FLASH, 0, 0, 0, 0x00000000, 0, 0 }, /* NAND */ + + /* MAC 0 */ + { DSCR_CMD0_MAC0_RX, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 }, + { DSCR_CMD0_MAC0_TX, DEV_FLAGS_OUT, 0, 0, 0x00000000, 0, 0 }, + + /* MAC 1 */ + { DSCR_CMD0_MAC1_RX, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 }, + { DSCR_CMD0_MAC1_TX, DEV_FLAGS_OUT, 0, 0, 0x00000000, 0, 0 }, + +#endif /* CONFIG_SOC_AU1550 */ + +#ifdef CONFIG_SOC_AU1200 + { DSCR_CMD0_UART0_TX, DEV_FLAGS_OUT, 0, 8, 0x11100004, 0, 0 }, + { DSCR_CMD0_UART0_RX, DEV_FLAGS_IN, 0, 8, 0x11100000, 0, 0 }, + { DSCR_CMD0_UART1_TX, DEV_FLAGS_OUT, 0, 8, 0x11200004, 0, 0 }, + { DSCR_CMD0_UART1_RX, DEV_FLAGS_IN, 0, 8, 0x11200000, 0, 0 }, + + { DSCR_CMD0_DMA_REQ0, 0, 0, 0, 0x00000000, 0, 0 }, + { DSCR_CMD0_DMA_REQ1, 0, 0, 0, 0x00000000, 0, 0 }, + + { DSCR_CMD0_MAE_BE, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 }, + { DSCR_CMD0_MAE_FE, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 }, + { DSCR_CMD0_MAE_BOTH, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 }, + { DSCR_CMD0_LCD, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 }, + + { DSCR_CMD0_SDMS_TX0, DEV_FLAGS_OUT, 0, 0, 0x00000000, 0, 0 }, + { DSCR_CMD0_SDMS_RX0, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 }, + { DSCR_CMD0_SDMS_TX1, DEV_FLAGS_OUT, 0, 0, 0x00000000, 0, 0 }, + { DSCR_CMD0_SDMS_RX1, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 }, + + { DSCR_CMD0_AES_TX, DEV_FLAGS_OUT, 0, 0, 0x00000000, 0, 0 }, + { DSCR_CMD0_AES_RX, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 }, + + { DSCR_CMD0_PSC0_TX, DEV_FLAGS_OUT, 0, 0, 0x11a0001c, 0, 0 }, + { DSCR_CMD0_PSC0_RX, DEV_FLAGS_IN, 0, 0, 0x11a0001c, 0, 0 }, + { DSCR_CMD0_PSC0_SYNC, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 }, + + { DSCR_CMD0_PSC1_TX, DEV_FLAGS_OUT, 0, 0, 0x11b0001c, 0, 0 }, + { DSCR_CMD0_PSC1_RX, DEV_FLAGS_IN, 0, 0, 0x11b0001c, 0, 0 }, + { DSCR_CMD0_PSC1_SYNC, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 }, + + { DSCR_CMD0_CIM_RXA, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 }, + { DSCR_CMD0_CIM_RXB, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 }, + { DSCR_CMD0_CIM_RXC, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 }, + { DSCR_CMD0_CIM_SYNC, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 }, + + { DSCR_CMD0_NAND_FLASH, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 }, + +#endif // CONFIG_SOC_AU1200 + + { DSCR_CMD0_THROTTLE, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 }, + { DSCR_CMD0_ALWAYS, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 }, +}; + +#define DBDEV_TAB_SIZE (sizeof(dbdev_tab) / sizeof(dbdev_tab_t)) + +static chan_tab_t *chan_tab_ptr[NUM_DBDMA_CHANS]; + +static dbdev_tab_t * +find_dbdev_id (u32 id) +{ + int i; + dbdev_tab_t *p; + for (i = 0; i < DBDEV_TAB_SIZE; ++i) { + p = &dbdev_tab[i]; + if (p->dev_id == id) + return p; + } + return NULL; +} + +/* Allocate a channel and return a non-zero descriptor if successful. +*/ +u32 +au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid, + void (*callback)(int, void *, struct pt_regs *), void *callparam) +{ + unsigned long flags; + u32 used, chan, rv; + u32 dcp; + int i; + dbdev_tab_t *stp, *dtp; + chan_tab_t *ctp; + volatile au1x_dma_chan_t *cp; + + /* We do the intialization on the first channel allocation. + * We have to wait because of the interrupt handler initialization + * which can't be done successfully during board set up. + */ + if (!dbdma_initialized) + au1xxx_dbdma_init(); + dbdma_initialized = 1; + + if ((srcid > DSCR_NDEV_IDS) || (destid > DSCR_NDEV_IDS)) + return 0; + + if ((stp = find_dbdev_id(srcid)) == NULL) return 0; + if ((dtp = find_dbdev_id(destid)) == NULL) return 0; + + used = 0; + rv = 0; + + /* Check to see if we can get both channels. + */ + spin_lock_irqsave(&au1xxx_dbdma_spin_lock, flags); + if (!(stp->dev_flags & DEV_FLAGS_INUSE) || + (stp->dev_flags & DEV_FLAGS_ANYUSE)) { + /* Got source */ + stp->dev_flags |= DEV_FLAGS_INUSE; + if (!(dtp->dev_flags & DEV_FLAGS_INUSE) || + (dtp->dev_flags & DEV_FLAGS_ANYUSE)) { + /* Got destination */ + dtp->dev_flags |= DEV_FLAGS_INUSE; + } + else { + /* Can't get dest. Release src. + */ + stp->dev_flags &= ~DEV_FLAGS_INUSE; + used++; + } + } + else { + used++; + } + spin_unlock_irqrestore(&au1xxx_dbdma_spin_lock, flags); + + if (!used) { + /* Let's see if we can allocate a channel for it. + */ + ctp = NULL; + chan = 0; + spin_lock_irqsave(&au1xxx_dbdma_spin_lock, flags); + for (i=0; ichan_index = chan = i; + break; + } + } + spin_unlock_irqrestore(&au1xxx_dbdma_spin_lock, flags); + + if (ctp != NULL) { + memset(ctp, 0, sizeof(chan_tab_t)); + dcp = DDMA_CHANNEL_BASE; + dcp += (0x0100 * chan); + ctp->chan_ptr = (au1x_dma_chan_t *)dcp; + cp = (volatile au1x_dma_chan_t *)dcp; + ctp->chan_src = stp; + ctp->chan_dest = dtp; + ctp->chan_callback = callback; + ctp->chan_callparam = callparam; + + /* Initialize channel configuration. + */ + i = 0; + if (stp->dev_intlevel) + i |= DDMA_CFG_SED; + if (stp->dev_intpolarity) + i |= DDMA_CFG_SP; + if (dtp->dev_intlevel) + i |= DDMA_CFG_DED; + if (dtp->dev_intpolarity) + i |= DDMA_CFG_DP; + cp->ddma_cfg = i; + au_sync(); + + /* Return a non-zero value that can be used to + * find the channel information in subsequent + * operations. + */ + rv = (u32)(&chan_tab_ptr[chan]); + } + else { + /* Release devices. + */ + stp->dev_flags &= ~DEV_FLAGS_INUSE; + dtp->dev_flags &= ~DEV_FLAGS_INUSE; + } + } + return rv; +} + +/* Set the device width if source or destination is a FIFO. + * Should be 8, 16, or 32 bits. + */ +u32 +au1xxx_dbdma_set_devwidth(u32 chanid, int bits) +{ + u32 rv; + chan_tab_t *ctp; + dbdev_tab_t *stp, *dtp; + + ctp = *((chan_tab_t **)chanid); + stp = ctp->chan_src; + dtp = ctp->chan_dest; + rv = 0; + + if (stp->dev_flags & DEV_FLAGS_IN) { /* Source in fifo */ + rv = stp->dev_devwidth; + stp->dev_devwidth = bits; + } + if (dtp->dev_flags & DEV_FLAGS_OUT) { /* Destination out fifo */ + rv = dtp->dev_devwidth; + dtp->dev_devwidth = bits; + } + + return rv; +} + +/* Allocate a descriptor ring, initializing as much as possible. +*/ +u32 +au1xxx_dbdma_ring_alloc(u32 chanid, int entries) +{ + int i; + u32 desc_base, srcid, destid; + u32 cmd0, cmd1, src1, dest1; + u32 src0, dest0; + chan_tab_t *ctp; + dbdev_tab_t *stp, *dtp; + au1x_ddma_desc_t *dp; + + /* I guess we could check this to be within the + * range of the table...... + */ + ctp = *((chan_tab_t **)chanid); + stp = ctp->chan_src; + dtp = ctp->chan_dest; + + /* The descriptors must be 32-byte aligned. There is a + * possibility the allocation will give us such an address, + * and if we try that first we are likely to not waste larger + * slabs of memory. + */ + desc_base = (u32)kmalloc(entries * sizeof(au1x_ddma_desc_t), GFP_KERNEL); + if (desc_base == 0) + return 0; + + if (desc_base & 0x1f) { + /* Lost....do it again, allocate extra, and round + * the address base. + */ + kfree((const void *)desc_base); + i = entries * sizeof(au1x_ddma_desc_t); + i += (sizeof(au1x_ddma_desc_t) - 1); + if ((desc_base = (u32)kmalloc(i, GFP_KERNEL)) == 0) + return 0; + + desc_base = ALIGN_ADDR(desc_base, sizeof(au1x_ddma_desc_t)); + } + dp = (au1x_ddma_desc_t *)desc_base; + + /* Keep track of the base descriptor. + */ + ctp->chan_desc_base = dp; + + /* Initialize the rings with as much information as we know. + */ + srcid = stp->dev_id; + destid = dtp->dev_id; + + cmd0 = cmd1 = src1 = dest1 = 0; + src0 = dest0 = 0; + + cmd0 |= DSCR_CMD0_SID(srcid); + cmd0 |= DSCR_CMD0_DID(destid); + cmd0 |= DSCR_CMD0_IE | DSCR_CMD0_CV; + cmd0 |= DSCR_CMD0_ST(DSCR_CMD0_ST_CURRENT); + + switch (stp->dev_devwidth) { + case 8: + cmd0 |= DSCR_CMD0_SW(DSCR_CMD0_BYTE); + break; + case 16: + cmd0 |= DSCR_CMD0_SW(DSCR_CMD0_HALFWORD); + break; + case 32: + default: + cmd0 |= DSCR_CMD0_SW(DSCR_CMD0_WORD); + break; + } + + switch (dtp->dev_devwidth) { + case 8: + cmd0 |= DSCR_CMD0_DW(DSCR_CMD0_BYTE); + break; + case 16: + cmd0 |= DSCR_CMD0_DW(DSCR_CMD0_HALFWORD); + break; + case 32: + default: + cmd0 |= DSCR_CMD0_DW(DSCR_CMD0_WORD); + break; + } + + /* If the device is marked as an in/out FIFO, ensure it is + * set non-coherent. + */ + if (stp->dev_flags & DEV_FLAGS_IN) + cmd0 |= DSCR_CMD0_SN; /* Source in fifo */ + if (dtp->dev_flags & DEV_FLAGS_OUT) + cmd0 |= DSCR_CMD0_DN; /* Destination out fifo */ + + /* Set up source1. For now, assume no stride and increment. + * A channel attribute update can change this later. + */ + switch (stp->dev_tsize) { + case 1: + src1 |= DSCR_SRC1_STS(DSCR_xTS_SIZE1); + break; + case 2: + src1 |= DSCR_SRC1_STS(DSCR_xTS_SIZE2); + break; + case 4: + src1 |= DSCR_SRC1_STS(DSCR_xTS_SIZE4); + break; + case 8: + default: + src1 |= DSCR_SRC1_STS(DSCR_xTS_SIZE8); + break; + } + + /* If source input is fifo, set static address. + */ + if (stp->dev_flags & DEV_FLAGS_IN) { + src0 = stp->dev_physaddr; + src1 |= DSCR_SRC1_SAM(DSCR_xAM_STATIC); + } + + /* Set up dest1. For now, assume no stride and increment. + * A channel attribute update can change this later. + */ + switch (dtp->dev_tsize) { + case 1: + dest1 |= DSCR_DEST1_DTS(DSCR_xTS_SIZE1); + break; + case 2: + dest1 |= DSCR_DEST1_DTS(DSCR_xTS_SIZE2); + break; + case 4: + dest1 |= DSCR_DEST1_DTS(DSCR_xTS_SIZE4); + break; + case 8: + default: + dest1 |= DSCR_DEST1_DTS(DSCR_xTS_SIZE8); + break; + } + + /* If destination output is fifo, set static address. + */ + if (dtp->dev_flags & DEV_FLAGS_OUT) { + dest0 = dtp->dev_physaddr; + dest1 |= DSCR_DEST1_DAM(DSCR_xAM_STATIC); + } + + for (i=0; idscr_cmd0 = cmd0; + dp->dscr_cmd1 = cmd1; + dp->dscr_source0 = src0; + dp->dscr_source1 = src1; + dp->dscr_dest0 = dest0; + dp->dscr_dest1 = dest1; + dp->dscr_stat = 0; + dp->dscr_nxtptr = DSCR_NXTPTR(virt_to_phys(dp + 1)); + dp++; + } + + /* Make last descrptor point to the first. + */ + dp--; + dp->dscr_nxtptr = DSCR_NXTPTR(virt_to_phys(ctp->chan_desc_base)); + ctp->get_ptr = ctp->put_ptr = ctp->cur_ptr = ctp->chan_desc_base; + + return (u32)(ctp->chan_desc_base); +} + +/* Put a source buffer into the DMA ring. + * This updates the source pointer and byte count. Normally used + * for memory to fifo transfers. + */ +u32 +au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes) +{ + chan_tab_t *ctp; + au1x_ddma_desc_t *dp; + + /* I guess we could check this to be within the + * range of the table...... + */ + ctp = *((chan_tab_t **)chanid); + + /* We should have multiple callers for a particular channel, + * an interrupt doesn't affect this pointer nor the descriptor, + * so no locking should be needed. + */ + dp = ctp->put_ptr; + + /* If the descriptor is valid, we are way ahead of the DMA + * engine, so just return an error condition. + */ + if (dp->dscr_cmd0 & DSCR_CMD0_V) { + return 0; + } + + /* Load up buffer address and byte count. + */ + dp->dscr_source0 = virt_to_phys(buf); + dp->dscr_cmd1 = nbytes; + dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */ + ctp->chan_ptr->ddma_dbell = 0xffffffff; /* Make it go */ + + /* Get next descriptor pointer. + */ + ctp->put_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr)); + + /* return something not zero. + */ + return nbytes; +} + +/* Put a destination buffer into the DMA ring. + * This updates the destination pointer and byte count. Normally used + * to place an empty buffer into the ring for fifo to memory transfers. + */ +u32 +au1xxx_dbdma_put_dest(u32 chanid, void *buf, int nbytes) +{ + chan_tab_t *ctp; + au1x_ddma_desc_t *dp; + + /* I guess we could check this to be within the + * range of the table...... + */ + ctp = *((chan_tab_t **)chanid); + + /* We should have multiple callers for a particular channel, + * an interrupt doesn't affect this pointer nor the descriptor, + * so no locking should be needed. + */ + dp = ctp->put_ptr; + + /* If the descriptor is valid, we are way ahead of the DMA + * engine, so just return an error condition. + */ + if (dp->dscr_cmd0 & DSCR_CMD0_V) + return 0; + + /* Load up buffer address and byte count. + */ + dp->dscr_dest0 = virt_to_phys(buf); + dp->dscr_cmd1 = nbytes; + dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */ + + /* Get next descriptor pointer. + */ + ctp->put_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr)); + + /* return something not zero. + */ + return nbytes; +} + +/* Get a destination buffer into the DMA ring. + * Normally used to get a full buffer from the ring during fifo + * to memory transfers. This does not set the valid bit, you will + * have to put another destination buffer to keep the DMA going. + */ +u32 +au1xxx_dbdma_get_dest(u32 chanid, void **buf, int *nbytes) +{ + chan_tab_t *ctp; + au1x_ddma_desc_t *dp; + u32 rv; + + /* I guess we could check this to be within the + * range of the table...... + */ + ctp = *((chan_tab_t **)chanid); + + /* We should have multiple callers for a particular channel, + * an interrupt doesn't affect this pointer nor the descriptor, + * so no locking should be needed. + */ + dp = ctp->get_ptr; + + /* If the descriptor is valid, we are way ahead of the DMA + * engine, so just return an error condition. + */ + if (dp->dscr_cmd0 & DSCR_CMD0_V) + return 0; + + /* Return buffer address and byte count. + */ + *buf = (void *)(phys_to_virt(dp->dscr_dest0)); + *nbytes = dp->dscr_cmd1; + rv = dp->dscr_stat; + + /* Get next descriptor pointer. + */ + ctp->get_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr)); + + /* return something not zero. + */ + return rv; +} + +void +au1xxx_dbdma_stop(u32 chanid) +{ + chan_tab_t *ctp; + volatile au1x_dma_chan_t *cp; + int halt_timeout = 0; + + ctp = *((chan_tab_t **)chanid); + + cp = ctp->chan_ptr; + cp->ddma_cfg &= ~DDMA_CFG_EN; /* Disable channel */ + au_sync(); + while (!(cp->ddma_stat & DDMA_STAT_H)) { + udelay(1); + halt_timeout++; + if (halt_timeout > 100) { + printk("warning: DMA channel won't halt\n"); + break; + } + } + /* clear current desc valid and doorbell */ + cp->ddma_stat |= (DDMA_STAT_DB | DDMA_STAT_V); + au_sync(); +} + +/* Start using the current descriptor pointer. If the dbdma encounters + * a not valid descriptor, it will stop. In this case, we can just + * continue by adding a buffer to the list and starting again. + */ +void +au1xxx_dbdma_start(u32 chanid) +{ + chan_tab_t *ctp; + volatile au1x_dma_chan_t *cp; + + ctp = *((chan_tab_t **)chanid); + + cp = ctp->chan_ptr; + cp->ddma_desptr = virt_to_phys(ctp->cur_ptr); + cp->ddma_cfg |= DDMA_CFG_EN; /* Enable channel */ + au_sync(); + cp->ddma_dbell = 0xffffffff; /* Make it go */ + au_sync(); +} + +void +au1xxx_dbdma_reset(u32 chanid) +{ + chan_tab_t *ctp; + au1x_ddma_desc_t *dp; + + au1xxx_dbdma_stop(chanid); + + ctp = *((chan_tab_t **)chanid); + ctp->get_ptr = ctp->put_ptr = ctp->cur_ptr = ctp->chan_desc_base; + + /* Run through the descriptors and reset the valid indicator. + */ + dp = ctp->chan_desc_base; + + do { + dp->dscr_cmd0 &= ~DSCR_CMD0_V; + dp = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr)); + } while (dp != ctp->chan_desc_base); +} + +u32 +au1xxx_get_dma_residue(u32 chanid) +{ + chan_tab_t *ctp; + volatile au1x_dma_chan_t *cp; + u32 rv; + + ctp = *((chan_tab_t **)chanid); + cp = ctp->chan_ptr; + + /* This is only valid if the channel is stopped. + */ + rv = cp->ddma_bytecnt; + au_sync(); + + return rv; +} + +void +au1xxx_dbdma_chan_free(u32 chanid) +{ + chan_tab_t *ctp; + dbdev_tab_t *stp, *dtp; + + ctp = *((chan_tab_t **)chanid); + stp = ctp->chan_src; + dtp = ctp->chan_dest; + + au1xxx_dbdma_stop(chanid); + + if (ctp->chan_desc_base != NULL) + kfree(ctp->chan_desc_base); + + stp->dev_flags &= ~DEV_FLAGS_INUSE; + dtp->dev_flags &= ~DEV_FLAGS_INUSE; + chan_tab_ptr[ctp->chan_index] = NULL; + + kfree(ctp); +} + +static void +dbdma_interrupt(int irq, void *dev_id, struct pt_regs *regs) +{ + u32 intstat; + u32 chan_index; + chan_tab_t *ctp; + au1x_ddma_desc_t *dp; + volatile au1x_dma_chan_t *cp; + + intstat = dbdma_gptr->ddma_intstat; + au_sync(); + chan_index = au_ffs(intstat) - 1; + + ctp = chan_tab_ptr[chan_index]; + cp = ctp->chan_ptr; + dp = ctp->cur_ptr; + + /* Reset interrupt. + */ + cp->ddma_irq = 0; + au_sync(); + + if (ctp->chan_callback) + (ctp->chan_callback)(irq, ctp->chan_callparam, regs); + + ctp->cur_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr)); + +} + +static void +au1xxx_dbdma_init(void) +{ + dbdma_gptr->ddma_config = 0; + dbdma_gptr->ddma_throttle = 0; + dbdma_gptr->ddma_inten = 0xffff; + au_sync(); + + if (request_irq(AU1550_DDMA_INT, dbdma_interrupt, SA_INTERRUPT, + "Au1xxx dbdma", (void *)dbdma_gptr)) + printk("Can't get 1550 dbdma irq"); +} + +void +au1xxx_dbdma_dump(u32 chanid) +{ + chan_tab_t *ctp; + au1x_ddma_desc_t *dp; + dbdev_tab_t *stp, *dtp; + volatile au1x_dma_chan_t *cp; + + ctp = *((chan_tab_t **)chanid); + stp = ctp->chan_src; + dtp = ctp->chan_dest; + cp = ctp->chan_ptr; + + printk("Chan %x, stp %x (dev %d) dtp %x (dev %d) \n", + (u32)ctp, (u32)stp, stp - dbdev_tab, (u32)dtp, dtp - dbdev_tab); + printk("desc base %x, get %x, put %x, cur %x\n", + (u32)(ctp->chan_desc_base), (u32)(ctp->get_ptr), + (u32)(ctp->put_ptr), (u32)(ctp->cur_ptr)); + + printk("dbdma chan %x\n", (u32)cp); + printk("cfg %08x, desptr %08x, statptr %08x\n", + cp->ddma_cfg, cp->ddma_desptr, cp->ddma_statptr); + printk("dbell %08x, irq %08x, stat %08x, bytecnt %08x\n", + cp->ddma_dbell, cp->ddma_irq, cp->ddma_stat, cp->ddma_bytecnt); + + + /* Run through the descriptors + */ + dp = ctp->chan_desc_base; + + do { + printk("dp %08x, cmd0 %08x, cmd1 %08x\n", + (u32)dp, dp->dscr_cmd0, dp->dscr_cmd1); + printk("src0 %08x, src1 %08x, dest0 %08x\n", + dp->dscr_source0, dp->dscr_source1, dp->dscr_dest0); + printk("dest1 %08x, stat %08x, nxtptr %08x\n", + dp->dscr_dest1, dp->dscr_stat, dp->dscr_nxtptr); + dp = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr)); + } while (dp != ctp->chan_desc_base); +} + +#endif /* defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200) */ + diff -urN linux-2.4.28-bk3/arch/mips/au1000/common/dma.c linux-2.4.28-bk4/arch/mips/au1000/common/dma.c --- linux-2.4.28-bk3/arch/mips/au1000/common/dma.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/au1000/common/dma.c 2004-11-23 02:49:27.299388210 -0800 @@ -40,6 +40,8 @@ #include #include +#include + #if defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1100) /* @@ -73,7 +75,7 @@ }; // Device FIFO addresses and default DMA modes -static const struct { +static const struct dma_dev { unsigned int fifo_addr; unsigned int dma_mode; } dma_dev_table[DMA_NUM_DEV] = { @@ -120,12 +122,19 @@ return len; } +// Device FIFO addresses and default DMA modes - 2nd bank +static const struct dma_dev dma_dev_table_bank2[DMA_NUM_DEV_BANK2] = { + {SD0_XMIT_FIFO, DMA_DS | DMA_DW8}, // coherent + {SD0_RECV_FIFO, DMA_DS | DMA_DR | DMA_DW8}, // coherent + {SD1_XMIT_FIFO, DMA_DS | DMA_DW8}, // coherent + {SD1_RECV_FIFO, DMA_DS | DMA_DR | DMA_DW8} // coherent +}; void dump_au1000_dma_channel(unsigned int dmanr) { struct dma_chan *chan; - if (dmanr > NUM_AU1000_DMA_CHANNELS) + if (dmanr >= NUM_AU1000_DMA_CHANNELS) return; chan = &au1000_dma_table[dmanr]; @@ -156,10 +165,16 @@ void *irq_dev_id) { struct dma_chan *chan; + const struct dma_dev *dev; int i, ret; - if (dev_id < 0 || dev_id >= DMA_NUM_DEV) +#if defined(CONFIG_SOC_AU1100) + if (dev_id < 0 || dev_id >= (DMA_NUM_DEV + DMA_NUM_DEV_BANK2)) return -EINVAL; +#else + if (dev_id < 0 || dev_id >= DMA_NUM_DEV) + return -EINVAL; +#endif for (i = 0; i < NUM_AU1000_DMA_CHANNELS; i++) { if (au1000_dma_table[i].dev_id < 0) @@ -170,6 +185,13 @@ chan = &au1000_dma_table[i]; + if (dev_id >= DMA_NUM_DEV) { + dev_id -= DMA_NUM_DEV; + dev = &dma_dev_table_bank2[dev_id]; + } else { + dev = &dma_dev_table[dev_id]; + } + if (irqhandler) { chan->irq = AU1000_DMA_INT_BASE + i; chan->irq_dev = irq_dev_id; @@ -188,8 +210,8 @@ chan->io = DMA_CHANNEL_BASE + i * DMA_CHANNEL_LEN; chan->dev_id = dev_id; chan->dev_str = dev_str; - chan->fifo_addr = dma_dev_table[dev_id].fifo_addr; - chan->mode = dma_dev_table[dev_id].dma_mode; + chan->fifo_addr = dev->fifo_addr; + chan->mode = dev->dma_mode; /* initialize the channel before returning */ init_dma(i); @@ -213,4 +235,9 @@ chan->irq_dev = NULL; chan->dev_id = -1; } + +EXPORT_SYMBOL(free_au1000_dma); +EXPORT_SYMBOL(au1000_dma_table); +EXPORT_SYMBOL(request_au1000_dma); + #endif // AU1000 AU1500 AU1100 diff -urN linux-2.4.28-bk3/arch/mips/au1000/common/irq.c linux-2.4.28-bk4/arch/mips/au1000/common/irq.c --- linux-2.4.28-bk3/arch/mips/au1000/common/irq.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/au1000/common/irq.c 2004-11-23 02:49:27.300388251 -0800 @@ -94,107 +94,6 @@ static spinlock_t irq_lock = SPIN_LOCK_UNLOCKED; -static void setup_local_irq(unsigned int irq_nr, int type, int int_req) -{ - if (irq_nr > AU1000_MAX_INTR) return; - /* Config2[n], Config1[n], Config0[n] */ - if (irq_nr > AU1000_LAST_INTC0_INT) { - switch (type) { - case INTC_INT_RISE_EDGE: /* 0:0:1 */ - au_writel(1<<(irq_nr-32), IC1_CFG2CLR); - au_writel(1<<(irq_nr-32), IC1_CFG1CLR); - au_writel(1<<(irq_nr-32), IC1_CFG0SET); - break; - case INTC_INT_FALL_EDGE: /* 0:1:0 */ - au_writel(1<<(irq_nr-32), IC1_CFG2CLR); - au_writel(1<<(irq_nr-32), IC1_CFG1SET); - au_writel(1<<(irq_nr-32), IC1_CFG0CLR); - break; - case INTC_INT_RISE_AND_FALL_EDGE: /* 0:1:1 */ - au_writel(1<<(irq_nr-32), IC1_CFG2CLR); - au_writel(1<<(irq_nr-32), IC1_CFG1SET); - au_writel(1<<(irq_nr-32), IC1_CFG0SET); - break; - case INTC_INT_HIGH_LEVEL: /* 1:0:1 */ - au_writel(1<<(irq_nr-32), IC1_CFG2SET); - au_writel(1<<(irq_nr-32), IC1_CFG1CLR); - au_writel(1<<(irq_nr-32), IC1_CFG0SET); - break; - case INTC_INT_LOW_LEVEL: /* 1:1:0 */ - au_writel(1<<(irq_nr-32), IC1_CFG2SET); - au_writel(1<<(irq_nr-32), IC1_CFG1SET); - au_writel(1<<(irq_nr-32), IC1_CFG0CLR); - break; - case INTC_INT_DISABLED: /* 0:0:0 */ - au_writel(1<<(irq_nr-32), IC1_CFG0CLR); - au_writel(1<<(irq_nr-32), IC1_CFG1CLR); - au_writel(1<<(irq_nr-32), IC1_CFG2CLR); - break; - default: /* disable the interrupt */ - printk("unexpected int type %d (irq %d)\n", type, irq_nr); - au_writel(1<<(irq_nr-32), IC1_CFG0CLR); - au_writel(1<<(irq_nr-32), IC1_CFG1CLR); - au_writel(1<<(irq_nr-32), IC1_CFG2CLR); - return; - } - if (int_req) /* assign to interrupt request 1 */ - au_writel(1<<(irq_nr-32), IC1_ASSIGNCLR); - else /* assign to interrupt request 0 */ - au_writel(1<<(irq_nr-32), IC1_ASSIGNSET); - au_writel(1<<(irq_nr-32), IC1_SRCSET); - au_writel(1<<(irq_nr-32), IC1_MASKCLR); - au_writel(1<<(irq_nr-32), IC1_WAKECLR); - } - else { - switch (type) { - case INTC_INT_RISE_EDGE: /* 0:0:1 */ - au_writel(1< AU1000_MAX_INTR) return; + /* Config2[n], Config1[n], Config0[n] */ + if (irq_nr > AU1000_LAST_INTC0_INT) { + switch (type) { + case INTC_INT_RISE_EDGE: /* 0:0:1 */ + au_writel(1<<(irq_nr-32), IC1_CFG2CLR); + au_writel(1<<(irq_nr-32), IC1_CFG1CLR); + au_writel(1<<(irq_nr-32), IC1_CFG0SET); + irq_desc[irq_nr].handler = &rise_edge_irq_type; + break; + case INTC_INT_FALL_EDGE: /* 0:1:0 */ + au_writel(1<<(irq_nr-32), IC1_CFG2CLR); + au_writel(1<<(irq_nr-32), IC1_CFG1SET); + au_writel(1<<(irq_nr-32), IC1_CFG0CLR); + irq_desc[irq_nr].handler = &fall_edge_irq_type; + break; + case INTC_INT_RISE_AND_FALL_EDGE: /* 0:1:1 */ + au_writel(1<<(irq_nr-32), IC1_CFG2CLR); + au_writel(1<<(irq_nr-32), IC1_CFG1SET); + au_writel(1<<(irq_nr-32), IC1_CFG0SET); + irq_desc[irq_nr].handler = &either_edge_irq_type; + break; + case INTC_INT_HIGH_LEVEL: /* 1:0:1 */ + au_writel(1<<(irq_nr-32), IC1_CFG2SET); + au_writel(1<<(irq_nr-32), IC1_CFG1CLR); + au_writel(1<<(irq_nr-32), IC1_CFG0SET); + irq_desc[irq_nr].handler = &level_irq_type; + break; + case INTC_INT_LOW_LEVEL: /* 1:1:0 */ + au_writel(1<<(irq_nr-32), IC1_CFG2SET); + au_writel(1<<(irq_nr-32), IC1_CFG1SET); + au_writel(1<<(irq_nr-32), IC1_CFG0CLR); + irq_desc[irq_nr].handler = &level_irq_type; + break; + case INTC_INT_DISABLED: /* 0:0:0 */ + au_writel(1<<(irq_nr-32), IC1_CFG0CLR); + au_writel(1<<(irq_nr-32), IC1_CFG1CLR); + au_writel(1<<(irq_nr-32), IC1_CFG2CLR); + break; + default: /* disable the interrupt */ + printk("unexpected int type %d (irq %d)\n", type, irq_nr); + au_writel(1<<(irq_nr-32), IC1_CFG0CLR); + au_writel(1<<(irq_nr-32), IC1_CFG1CLR); + au_writel(1<<(irq_nr-32), IC1_CFG2CLR); + return; + } + if (int_req) /* assign to interrupt request 1 */ + au_writel(1<<(irq_nr-32), IC1_ASSIGNCLR); + else /* assign to interrupt request 0 */ + au_writel(1<<(irq_nr-32), IC1_ASSIGNSET); + au_writel(1<<(irq_nr-32), IC1_SRCSET); + au_writel(1<<(irq_nr-32), IC1_MASKCLR); + au_writel(1<<(irq_nr-32), IC1_WAKECLR); + } + else { + switch (type) { + case INTC_INT_RISE_EDGE: /* 0:0:1 */ + au_writel(1<im_irq, imp->im_type, imp->im_request); + imp++; } /* Now set up the irq mapping for the board. */ imp = au1xxx_irq_map; for (i=0; iim_irq, imp->im_type, imp->im_request); - - switch (imp->im_type) { - - case INTC_INT_HIGH_LEVEL: - irq_desc[imp->im_irq].handler = &level_irq_type; - break; - - case INTC_INT_LOW_LEVEL: - irq_desc[imp->im_irq].handler = &level_irq_type; - break; - - case INTC_INT_RISE_EDGE: - irq_desc[imp->im_irq].handler = &rise_edge_irq_type; - break; - - case INTC_INT_FALL_EDGE: - irq_desc[imp->im_irq].handler = &fall_edge_irq_type; - break; - - case INTC_INT_RISE_AND_FALL_EDGE: - irq_desc[imp->im_irq].handler = &either_edge_irq_type; - break; - - default: - panic("Unknown au1xxx irq map"); - break; - } imp++; } diff -urN linux-2.4.28-bk3/arch/mips/au1000/common/pci_fixup.c linux-2.4.28-bk4/arch/mips/au1000/common/pci_fixup.c --- linux-2.4.28-bk3/arch/mips/au1000/common/pci_fixup.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/au1000/common/pci_fixup.c 2004-11-23 02:49:27.301388291 -0800 @@ -54,9 +54,7 @@ #endif static void fixup_resource(int r_num, struct pci_dev *dev) ; -#if defined( CONFIG_SOC_AU1500 ) || defined( CONFIG_SOC_AU1550 ) static unsigned long virt_io_addr; -#endif void __init pcibios_fixup_resources(struct pci_dev *dev) { @@ -66,8 +64,6 @@ void __init pcibios_fixup(void) { #if defined( CONFIG_SOC_AU1500 ) || defined( CONFIG_SOC_AU1550 ) - int i; - struct pci_dev *dev; virt_io_addr = (unsigned long)ioremap(Au1500_PCI_IO_START, Au1500_PCI_IO_END - Au1500_PCI_IO_START + 1); @@ -106,9 +102,10 @@ void __init pcibios_fixup_irqs(void) { #if defined( CONFIG_SOC_AU1500 ) || defined( CONFIG_SOC_AU1550 ) - unsigned int slot, func; + unsigned int slot; unsigned char pin; struct pci_dev *dev; + extern int au1xxx_pci_irqmap(struct pci_dev *dev, unsigned char idsel, unsigned char pin); pci_for_each_dev(dev) { if (dev->bus->number != 0) @@ -116,26 +113,9 @@ dev->irq = 0xff; slot = PCI_SLOT(dev->devfn); -#if defined( CONFIG_SOC_AU1500 ) - switch (slot) { - case 12: - case 13: - default: - dev->irq = AU1000_PCI_INTA; - break; - } -#elif defined( CONFIG_SOC_AU1550 ) - switch (slot) { - default: - case 12: - dev->irq = AU1000_PCI_INTA; - break; - case 13: - dev->irq = AU1000_PCI_INTB; - break; - } -#endif - + pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin); + dev->irq = au1xxx_pci_irqmap(dev, slot, pin); + //printk("Bus %d Dev %d Pin %d Irq %d\n", dev->bus->number, slot, pin, dev->irq); pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq); DBG("slot %d irq %d\n", slot, dev->irq); } diff -urN linux-2.4.28-bk3/arch/mips/au1000/common/power.c linux-2.4.28-bk4/arch/mips/au1000/common/power.c --- linux-2.4.28-bk3/arch/mips/au1000/common/power.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/au1000/common/power.c 2004-11-23 02:49:27.302388332 -0800 @@ -319,7 +319,7 @@ unsigned long val, pll; #define TMPBUFLEN 64 #define MAX_CPU_FREQ 396 - char buf[8], *p; + char buf[TMPBUFLEN], *p; unsigned long flags, intc0_mask, intc1_mask; unsigned long old_baud_base, old_cpu_freq, baud_rate, old_clk, old_refresh; @@ -357,7 +357,7 @@ old_cpu_freq = get_au1x00_speed(); new_cpu_freq = pll * 12 * 1000000; - new_baud_base = (new_cpu_freq / 4) / 16; + new_baud_base = (new_cpu_freq / (2 * ((int)(au_readl(SYS_POWERCTRL)&0x03) + 2) * 16)); set_au1x00_speed(new_cpu_freq); set_au1x00_uart_baud_base(new_baud_base); diff -urN linux-2.4.28-bk3/arch/mips/au1000/common/prom.c linux-2.4.28-bk4/arch/mips/au1000/common/prom.c --- linux-2.4.28-bk3/arch/mips/au1000/common/prom.c 2003-08-25 04:44:39.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips/au1000/common/prom.c 2004-11-23 02:49:27.302388332 -0800 @@ -68,6 +68,11 @@ actr = 1; /* Always ignore argv[0] */ cp = &(arcs_cmdline[0]); +#ifdef CONFIG_CMDLINE_BOOL + strcpy(cp, CONFIG_CMDLINE); + cp += strlen(CONFIG_CMDLINE); + *cp++ = ' '; +#endif while(actr < prom_argc) { strcpy(cp, prom_argv[actr]); cp += strlen(prom_argv[actr]); diff -urN linux-2.4.28-bk3/arch/mips/au1000/common/reset.c linux-2.4.28-bk4/arch/mips/au1000/common/reset.c --- linux-2.4.28-bk3/arch/mips/au1000/common/reset.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/au1000/common/reset.c 2004-11-23 02:49:27.303388373 -0800 @@ -42,6 +42,7 @@ void au1000_restart(char *command) { /* Set all integrated peripherals to disabled states */ + extern void board_reset (void); u32 prid = read_c0_prid(); printk(KERN_NOTICE "\n** Resetting Integrated Peripherals\n"); @@ -120,6 +121,29 @@ au_writel(0x00, 0xb1900064); /* sys_auxpll */ au_writel(0x00, 0xb1900100); /* sys_pininputen */ break; + case 0x03000000: /* Au1550 */ + au_writel(0x00, 0xb1a00004); /* psc 0 */ + au_writel(0x00, 0xb1b00004); /* psc 1 */ + au_writel(0x00, 0xb0a00004); /* psc 2 */ + au_writel(0x00, 0xb0b00004); /* psc 3 */ + au_writel(0x00, 0xb017fffc); /* usbh_enable */ + au_writel(0x00, 0xb0200058); /* usbd_enable */ + au_writel(0x00, 0xb4004104); /* mac dma */ + au_writel(0x00, 0xb4004114); /* mac dma */ + au_writel(0x00, 0xb4004124); /* mac dma */ + au_writel(0x00, 0xb4004134); /* mac dma */ + au_writel(0x00, 0xb1520000); /* macen0 */ + au_writel(0x00, 0xb1520004); /* macen1 */ + au_writel(0x00, 0xb1100100); /* uart0_enable */ + au_writel(0x00, 0xb1200100); /* uart1_enable */ + au_writel(0x00, 0xb1400100); /* uart3_enable */ + au_writel(0x00, 0xb1900020); /* sys_freqctrl0 */ + au_writel(0x00, 0xb1900024); /* sys_freqctrl1 */ + au_writel(0x00, 0xb1900028); /* sys_clksrc */ + au_writel(0x10, 0xb1900060); /* sys_cpupll */ + au_writel(0x00, 0xb1900064); /* sys_auxpll */ + au_writel(0x00, 0xb1900100); /* sys_pininputen */ + break; default: break; @@ -130,18 +154,26 @@ flush_cache_all(); write_c0_wired(0); -#if defined(CONFIG_MIPS_PB1500) || defined(CONFIG_MIPS_PB1100) || defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) || defined(CONFIG_MIPS_DB1500) - /* Do a HW reset if the board can do it */ - - au_writel(0x00000000, 0xAE00001C); -#endif + /* Give board a chance to do a hardware reset */ + board_reset(); + /* Jump to the beggining in case board_reset() is empty */ __asm__ __volatile__("jr\t%0"::"r"(0xbfc00000)); } void au1000_halt(void) { +#if defined(CONFIG_MIPS_PB1550) + /* power off system */ + printk("\n** Powering off Pb1550\n"); + au_writew(au_readw(0xAF00001C) | (3<<14), 0xAF00001C); + au_sync(); + while(1); /* should not get here */ +#endif printk(KERN_NOTICE "\n** You can safely turn off the power\n"); +#ifdef CONFIG_MIPS_MIRAGE + au_writel((1 << 26) | (1 << 10), GPIO2_OUTPUT); +#endif #ifdef CONFIG_PM au_sleep(); diff -urN linux-2.4.28-bk3/arch/mips/au1000/common/setup.c linux-2.4.28-bk4/arch/mips/au1000/common/setup.c --- linux-2.4.28-bk3/arch/mips/au1000/common/setup.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/au1000/common/setup.c 2004-11-23 02:49:27.303388373 -0800 @@ -52,6 +52,7 @@ #endif #ifdef CONFIG_BLK_DEV_IDE +extern struct ide_ops no_ide_ops; extern struct ide_ops std_ide_ops; extern struct ide_ops *ide_ops; #endif @@ -64,22 +65,47 @@ extern void au1000_power_off(void); extern struct resource ioport_resource; extern struct resource iomem_resource; -#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_SOC_AU1500) +#if defined(CONFIG_64BIT_PHYS_ADDR) && (defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550)) extern phys_t (*fixup_bigphys_addr)(phys_t phys_addr, phys_t size); static phys_t au1500_fixup_bigphys_addr(phys_t phys_addr, phys_t size); #endif extern void au1xxx_time_init(void); extern void au1xxx_timer_setup(void); +extern void set_cpuspec(void); void __init au1x00_setup(void) { + struct cpu_spec *sp; char *argptr; + unsigned long prid, cpupll, bclk; - /* Various early Au1000 Errata corrected by this */ - set_c0_config(1<<19); /* Config[OD] */ + set_cpuspec(); + sp = cur_cpu_spec[0]; board_setup(); /* board specific setup */ + prid = read_c0_prid(); + cpupll = (au_readl(0xB1900060) & 0x3F) * 12; + + printk("%s (PRId %08X) @ %dMHZ\n", sp->cpu_name, prid, cpupll); + + bclk = sp->cpu_bclk; + if (bclk) { + /* Enable BCLK switching */ + bclk = au_readl(0xB190003C); + au_writel(bclk | 0x60, 0xB190003C); + printk("BCLK switching enabled!\n"); + } + + if (sp->cpu_od) { + /* Various early Au1000 Errata corrected by this */ + set_c0_config(1<<19); /* Set Config[OD] */ + } + else { + /* Clear to obtain best system bus performance */ + clear_c0_config(1<<19); /* Clear Config[OD] */ + } + argptr = prom_getcmdline(); #ifdef CONFIG_AU1X00_SERIAL_CONSOLE @@ -128,7 +154,7 @@ _machine_restart = au1000_restart; _machine_halt = au1000_halt; _machine_power_off = au1000_power_off; -#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_SOC_AU1500) +#if defined(CONFIG_64BIT_PHYS_ADDR) && (defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550)) fixup_bigphys_addr = au1500_fixup_bigphys_addr; #endif @@ -185,7 +211,7 @@ #ifdef CONFIG_BLK_DEV_IDE /* Board setup takes precedence for unique devices. */ - if (ide_ops == NULL) + if ((ide_ops == NULL) || (ide_ops == &no_ide_ops)) ide_ops = &std_ide_ops; #endif diff -urN linux-2.4.28-bk3/arch/mips/au1000/common/time.c linux-2.4.28-bk4/arch/mips/au1000/common/time.c --- linux-2.4.28-bk3/arch/mips/au1000/common/time.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/au1000/common/time.c 2004-11-23 02:49:27.304388414 -0800 @@ -39,6 +39,7 @@ #include #include +#include #include #include #include @@ -49,10 +50,6 @@ #include #include -#if !defined(CONFIG_NEW_TIME_C) -#error "Alchemy processors need CONFIG_NEW_TIME_C defined" -#endif - extern void startup_match20_interrupt(void); extern void do_softirq(void); extern volatile unsigned long wall_jiffies; @@ -351,9 +348,9 @@ __asm__("multu\t%1,%2\n\t" "mfhi\t%0" - :"=r" (res) - :"r" (count), - "r" (quotient)); + : "=r" (res) + : "r" (count), "r" (quotient) + : "hi", "lo", GCC_REG_ACCUM); /* * Due to possible jiffies inconsistencies, we need to check diff -urN linux-2.4.28-bk3/arch/mips/au1000/csb250/irqmap.c linux-2.4.28-bk4/arch/mips/au1000/csb250/irqmap.c --- linux-2.4.28-bk3/arch/mips/au1000/csb250/irqmap.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/au1000/csb250/irqmap.c 2004-11-23 02:49:27.304388414 -0800 @@ -48,53 +48,13 @@ #include au1xxx_irq_map_t au1xxx_irq_map[] = { - { AU1000_UART0_INT, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_UART3_INT, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+1, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+2, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+3, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+4, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+5, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+6, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+7, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_IRDA_TX_INT, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_IRDA_RX_INT, INTC_INT_HIGH_LEVEL, 0}, - - { AU1000_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_MAC1_DMA_INT, INTC_INT_HIGH_LEVEL, 0}, { AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0}, - - { AU1000_USB_HOST_INT, INTC_INT_LOW_LEVEL, 0 }, - - { AU1000_PCI_INTA, INTC_INT_LOW_LEVEL, 0 }, - { AU1000_PCI_INTB, INTC_INT_LOW_LEVEL, 0 }, - { AU1000_PCI_INTC, INTC_INT_LOW_LEVEL, 0 }, - { AU1000_PCI_INTD, INTC_INT_LOW_LEVEL, 0 }, { AU1500_GPIO_201, INTC_INT_LOW_LEVEL, 0 }, { AU1500_GPIO_202, INTC_INT_LOW_LEVEL, 0 }, { AU1500_GPIO_203, INTC_INT_LOW_LEVEL, 0 }, { AU1500_GPIO_205, INTC_INT_LOW_LEVEL, 0 }, { AU1500_GPIO_207, INTC_INT_LOW_LEVEL, 0 }, - - { AU1000_ACSYNC_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_AC97C_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_USB_DEV_REQ_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_RTC_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 }, - - /* Careful if you change match 2 request! - * The interrupt handler is called directly - * from the low level dispatch code. - */ - { AU1000_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 }, }; int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t); diff -urN linux-2.4.28-bk3/arch/mips/au1000/db1x00/Makefile linux-2.4.28-bk4/arch/mips/au1000/db1x00/Makefile --- linux-2.4.28-bk3/arch/mips/au1000/db1x00/Makefile 2003-08-25 04:44:39.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips/au1000/db1x00/Makefile 2004-11-23 02:49:27.305388454 -0800 @@ -10,13 +10,11 @@ # unless it's something special (ie not a .c file). # -.S.s: - $(CPP) $(CFLAGS) $< -o $*.s -.S.o: - $(CC) $(CFLAGS) -c $< -o $*.o +USE_STANDARD_AS_RULE := true O_TARGET := db1x00.o obj-y := init.o board_setup.o irqmap.o +obj-$(CONFIG_WM97XX_COMODULE) += mirage_ts.o include $(TOPDIR)/Rules.make diff -urN linux-2.4.28-bk3/arch/mips/au1000/db1x00/board_setup.c linux-2.4.28-bk4/arch/mips/au1000/db1x00/board_setup.c --- linux-2.4.28-bk3/arch/mips/au1000/db1x00/board_setup.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/au1000/db1x00/board_setup.c 2004-11-23 02:49:27.305388454 -0800 @@ -48,14 +48,22 @@ extern struct rtc_ops no_rtc_ops; +/* not correct for db1550 */ static BCSR * const bcsr = (BCSR *)0xAE000000; +void board_reset (void) +{ + /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */ + au_writel(0x00000000, 0xAE00001C); +} + void __init board_setup(void) { u32 pin_func; rtc_ops = &no_rtc_ops; + /* not valid for 1550 */ #ifdef CONFIG_AU1X00_USB_DEVICE // 2nd USB port is USB device pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000); @@ -73,6 +81,35 @@ #endif au_writel(0, 0xAE000010); /* turn off pcmcia power */ +#ifdef CONFIG_MIPS_MIRAGE + /* enable GPIO[31:0] inputs */ + au_writel(0, SYS_PININPUTEN); + + /* GPIO[20] is output, tristate the other input primary GPIO's */ + au_writel((u32)(~(1<<20)), SYS_TRIOUTCLR); + + /* set GPIO[210:208] instead of SSI_0 */ + pin_func = au_readl(SYS_PINFUNC) | (u32)(1); + + /* set GPIO[215:211] for LED's */ + pin_func |= (u32)((5<<2)); + + /* set GPIO[214:213] for more LED's */ + pin_func |= (u32)((5<<12)); + + /* set GPIO[207:200] instead of PCMCIA/LCD */ + pin_func |= (u32)((3<<17)); + au_writel(pin_func, SYS_PINFUNC); + + /* Enable speaker amplifier. This should + * be part of the audio driver. + */ + au_writel(au_readl(GPIO2_DIR) | 0x200, GPIO2_DIR); + au_writel(0x02000200, GPIO2_OUTPUT); +#endif + + au_sync(); + #ifdef CONFIG_MIPS_DB1000 printk("AMD Alchemy Au1000/Db1000 Board\n"); #endif @@ -88,4 +125,7 @@ #ifdef CONFIG_MIPS_MIRAGE printk("AMD Alchemy Mirage Board\n"); #endif +#ifdef CONFIG_MIPS_DB1550 + printk("AMD Alchemy Au1550/Db1550 Board\n"); +#endif } diff -urN linux-2.4.28-bk3/arch/mips/au1000/db1x00/irqmap.c linux-2.4.28-bk4/arch/mips/au1000/db1x00/irqmap.c --- linux-2.4.28-bk3/arch/mips/au1000/db1x00/irqmap.c 2003-08-25 04:44:39.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips/au1000/db1x00/irqmap.c 2004-11-23 02:49:27.306388495 -0800 @@ -48,71 +48,95 @@ #include au1xxx_irq_map_t au1xxx_irq_map[] = { - { AU1000_UART0_INT, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_UART3_INT, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+1, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+2, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+3, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+4, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+5, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+6, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+7, INTC_INT_HIGH_LEVEL, 0}, - - { AU1000_IRDA_TX_INT, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_IRDA_RX_INT, INTC_INT_HIGH_LEVEL, 0}, - - { AU1000_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0}, -#if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1500) || defined(CONFIG_MIPS_MIRAGE) - { AU1000_MAC1_DMA_INT, INTC_INT_HIGH_LEVEL, 0}, -#endif + #ifndef CONFIG_MIPS_MIRAGE - { AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0}, +#ifdef CONFIG_MIPS_DB1550 + { AU1000_GPIO_3, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 0 IRQ# + { AU1000_GPIO_5, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 1 IRQ# +#else + { AU1000_GPIO_0, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 0 Fully_Interted# + { AU1000_GPIO_1, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 0 STSCHG# + { AU1000_GPIO_2, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 0 IRQ# + + { AU1000_GPIO_3, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 1 Fully_Interted# + { AU1000_GPIO_4, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 1 STSCHG# + { AU1000_GPIO_5, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 1 IRQ# #endif +#else + { AU1000_GPIO_7, INTC_INT_RISE_EDGE, 0 }, /* touchscreen pendown */ +#endif +}; - { AU1000_USB_HOST_INT, INTC_INT_LOW_LEVEL, 0 }, +int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t); + +#ifdef CONFIG_PCI #ifdef CONFIG_SOC_AU1500 - { AU1000_PCI_INTA, INTC_INT_LOW_LEVEL, 0 }, - { AU1000_PCI_INTB, INTC_INT_LOW_LEVEL, 0 }, - { AU1000_PCI_INTC, INTC_INT_LOW_LEVEL, 0 }, - { AU1000_PCI_INTD, INTC_INT_LOW_LEVEL, 0 }, +#define INTA AU1000_PCI_INTA +#define INTB AU1000_PCI_INTB +#define INTC AU1000_PCI_INTC +#define INTD AU1000_PCI_INTD +#endif + +#ifdef CONFIG_SOC_AU1550 +#define INTA AU1550_PCI_INTA +#define INTB AU1550_PCI_INTB +#define INTC AU1550_PCI_INTC +#define INTD AU1550_PCI_INTD #endif +#define INTX 0xFF /* not valid */ + +int __init +au1xxx_pci_irqmap(struct pci_dev *dev, unsigned char idsel, unsigned char pin) +{ + /* + * PCI IDSEL/INTPIN->INTLINE + * A B C D + */ #ifdef CONFIG_MIPS_DB1500 - { AU1500_GPIO_201, INTC_INT_LOW_LEVEL, 0 }, - { AU1500_GPIO_202, INTC_INT_LOW_LEVEL, 0 }, - { AU1500_GPIO_203, INTC_INT_LOW_LEVEL, 0 }, - { AU1500_GPIO_205, INTC_INT_LOW_LEVEL, 0 }, - { AU1500_GPIO_207, INTC_INT_LOW_LEVEL, 0 }, + static char pci_irq_table[][4] = + { + {INTA, INTX, INTX, INTX}, /* IDSEL 12 - HPT371 */ + {INTA, INTB, INTC, INTD}, /* IDSEL 13 - PCI slot */ + }; + const long min_idsel = 12, max_idsel = 13, irqs_per_slot = 4; #endif -#ifndef CONFIG_MIPS_MIRAGE - { AU1000_GPIO_0, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 0 Fully_Interted# - { AU1000_GPIO_1, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 0 STSCHG# - { AU1000_GPIO_2, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 0 IRQ# +#ifdef CONFIG_MIPS_BOSPORUS + static char pci_irq_table[][4] = + { + {INTA, INTB, INTX, INTX}, /* IDSEL 11 - miniPCI */ + {INTA, INTX, INTX, INTX}, /* IDSEL 12 - SN1741 */ + {INTA, INTB, INTC, INTD}, /* IDSEL 13 - PCI slot */ + }; + const long min_idsel = 11, max_idsel = 13, irqs_per_slot = 4; +#endif - { AU1000_GPIO_3, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 1 Fully_Interted# - { AU1000_GPIO_4, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 1 STSCHG# - { AU1000_GPIO_5, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 1 IRQ# +#ifdef CONFIG_MIPS_MIRAGE + static char pci_irq_table[][4] = + { + {INTD, INTX, INTX, INTX}, /* IDSEL 11 - SMI VGX */ + {INTX, INTX, INTC, INTX}, /* IDSEL 12 - PNX1300 */ + {INTA, INTB, INTX, INTX}, /* IDSEL 13 - miniPCI */ + }; + const long min_idsel = 11, max_idsel = 13, irqs_per_slot = 4; +#endif + +#ifdef CONFIG_MIPS_DB1550 + static char pci_irq_table[][4] = + { + {INTC, INTX, INTX, INTX}, /* IDSEL 11 - on-board HPT371 */ + {INTB, INTC, INTD, INTA}, /* IDSEL 12 - PCI slot 2 (left) */ + {INTA, INTB, INTC, INTD}, /* IDSEL 13 - PCI slot 1 (right) */ + }; + const long min_idsel = 11, max_idsel = 13, irqs_per_slot = 4; +#endif +#if defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1500) + return PCI_IRQ_TABLE_LOOKUP; +#else + return 0; #endif - { AU1000_ACSYNC_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_AC97C_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_USB_DEV_REQ_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_RTC_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 }, - - /* Careful if you change match 2 request! - * The interrupt handler is called directly - * from the low level dispatch code. - */ - { AU1000_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 }, }; +#endif -int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t); diff -urN linux-2.4.28-bk3/arch/mips/au1000/db1x00/mirage_ts.c linux-2.4.28-bk4/arch/mips/au1000/db1x00/mirage_ts.c --- linux-2.4.28-bk3/arch/mips/au1000/db1x00/mirage_ts.c 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/au1000/db1x00/mirage_ts.c 2004-11-23 02:49:27.307388536 -0800 @@ -0,0 +1,263 @@ +/* + * linux/arch/mips/au1000/db1x00/mirage_ts.c + * + * BRIEF MODULE DESCRIPTION + * Glue between Mirage board-specific touchscreen pieces + * and generic Wolfson Codec touchscreen support. + * + * Based on pb1100_ts.c used in Hydrogen II. + * + * Copyright (c) 2003 Embedded Edge, LLC + * dan@embeddededge.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +/* + * Imported interface to Wolfson Codec driver. + */ +extern void *wm97xx_ts_get_handle(int which); +extern int wm97xx_ts_ready(void* ts_handle); +extern void wm97xx_ts_set_cal(void* ts_handle, int xscale, int xtrans, int yscale, int ytrans); +extern u16 wm97xx_ts_get_ac97(void* ts_handle, u8 reg); +extern void wm97xx_ts_set_ac97(void* ts_handle, u8 reg, u16 val); +extern int wm97xx_ts_read_data(void* ts_handle, long* x, long* y, long* pressure); +extern void wm97xx_ts_send_data(void* ts_handle, long x, long y, long z); + +int wm97xx_comodule_present = 1; + + +#define TS_NAME "mirage_ts" + +#define err(format, arg...) printk(KERN_ERR TS_NAME ": " format "\n" , ## arg) +#define info(format, arg...) printk(KERN_INFO TS_NAME ": " format "\n" , ## arg) +#define warn(format, arg...) printk(KERN_WARNING TS_NAME ": " format "\n" , ## arg) +#define DPRINTK(format, arg...) printk(__FUNCTION__ ": " format "\n" , ## arg) + + +#define PEN_DOWN_IRQ AU1000_GPIO_7 + +static struct task_struct *ts_task = 0; +static DECLARE_COMPLETION(ts_complete); +static DECLARE_WAIT_QUEUE_HEAD(pendown_wait); + +#ifdef CONFIG_WM97XX_FIVEWIRETS +static int release_pressure = 1; +#else +static int release_pressure = 50; +#endif + +typedef struct { + long x; + long y; +} DOWN_EVENT; + +#define SAMPLE_RATE 50 /* samples per second */ +#define PEN_DEBOUNCE 5 /* samples for settling - fn of SAMPLE_RATE */ +#define PEN_UP_TIMEOUT 10 /* in seconds */ +#define PEN_UP_SETTLE 5 /* samples per second */ + +static struct { + int xscale; + int xtrans; + int yscale; + int ytrans; +} mirage_ts_cal = +{ +#if 0 + xscale: 84, + xtrans: -157, + yscale: 66, + ytrans: -150, +#else + xscale: 84, + xtrans: -150, + yscale: 66, + ytrans: -146, +#endif +}; + + +static void pendown_irq(int irqnr, void *devid, struct pt_regs *regs) +{ +//DPRINTK("got one 0x%x", au_readl(SYS_PINSTATERD)); + wake_up(&pendown_wait); +} + +static int ts_thread(void *id) +{ + static int pen_was_down = 0; + static DOWN_EVENT pen_xy; + long x, y, z; + void *ts; /* handle */ + struct task_struct *tsk = current; + int timeout = HZ / SAMPLE_RATE; + + ts_task = tsk; + + daemonize(); + tsk->tty = NULL; + tsk->policy = SCHED_FIFO; + tsk->rt_priority = 1; + strcpy(tsk->comm, "touchscreen"); + + /* only want to receive SIGKILL */ + spin_lock_irq(&tsk->sigmask_lock); + siginitsetinv(&tsk->blocked, sigmask(SIGKILL)); + recalc_sigpending(tsk); + spin_unlock_irq(&tsk->sigmask_lock); + + /* get handle for codec */ + ts = wm97xx_ts_get_handle(0); + + /* proceed only after everybody is ready */ + while ( ! wm97xx_ts_ready(ts) ) { + /* give a little time for initializations to complete */ + interruptible_sleep_on_timeout(&pendown_wait, HZ / 4); + } + + /* board-specific calibration */ + wm97xx_ts_set_cal(ts, + mirage_ts_cal.xscale, + mirage_ts_cal.xtrans, + mirage_ts_cal.yscale, + mirage_ts_cal.ytrans); + + /* route Wolfson pendown interrupts to our GPIO */ + au_sync(); + wm97xx_ts_set_ac97(ts, 0x4c, wm97xx_ts_get_ac97(ts, 0x4c) & ~0x0008); + au_sync(); + wm97xx_ts_set_ac97(ts, 0x56, wm97xx_ts_get_ac97(ts, 0x56) & ~0x0008); + au_sync(); + wm97xx_ts_set_ac97(ts, 0x52, wm97xx_ts_get_ac97(ts, 0x52) | 0x2008); + au_sync(); + + for (;;) { + interruptible_sleep_on_timeout(&pendown_wait, timeout); + disable_irq(PEN_DOWN_IRQ); + if (signal_pending(tsk)) { + break; + } + + /* read codec */ + if (!wm97xx_ts_read_data(ts, &x, &y, &z)) + z = 0; /* treat no-data and pen-up the same */ + + if (signal_pending(tsk)) { + break; + } + + if (z >= release_pressure) { + y = ~y; /* top to bottom */ + if (pen_was_down > 1 /*&& pen_was_down < PEN_DEBOUNCE*/) {//THXXX + /* bounce ? */ + x = pen_xy.x; + y = pen_xy.y; + --pen_was_down; + } else if (pen_was_down <= 1) { + pen_xy.x = x; + pen_xy.y = y; + if (pen_was_down) + wm97xx_ts_send_data(ts, x, y, z); + pen_was_down = PEN_DEBOUNCE; + } + //wm97xx_ts_send_data(ts, x, y, z); + timeout = HZ / SAMPLE_RATE; + } else { + if (pen_was_down) { + if (--pen_was_down) + z = release_pressure; + else //THXXX + wm97xx_ts_send_data(ts, pen_xy.x, pen_xy.y, z); + } + /* The pendown signal takes some time to settle after + * reading the pen pressure so wait a little + * before enabling the pen. + */ + if (! pen_was_down) { +// interruptible_sleep_on_timeout(&pendown_wait, HZ / PEN_UP_SETTLE); + timeout = HZ * PEN_UP_TIMEOUT; + } + } + enable_irq(PEN_DOWN_IRQ); + } + enable_irq(PEN_DOWN_IRQ); + ts_task = NULL; + complete(&ts_complete); + return 0; +} + +static int __init ts_mirage_init(void) +{ + int ret; + + /* pen down signal is connected to GPIO 7 */ + + ret = request_irq(PEN_DOWN_IRQ, pendown_irq, 0, "ts-pendown", NULL); + if (ret) { + err("unable to get pendown irq%d: [%d]", PEN_DOWN_IRQ, ret); + return ret; + } + + lock_kernel(); + ret = kernel_thread(ts_thread, NULL, CLONE_FS | CLONE_FILES); + if (ret < 0) { + unlock_kernel(); + return ret; + } + unlock_kernel(); + + info("Mirage touchscreen IRQ initialized."); + + return 0; +} + +static void __exit ts_mirage_exit(void) +{ + if (ts_task) { + send_sig(SIGKILL, ts_task, 1); + wait_for_completion(&ts_complete); + } + + free_irq(PEN_DOWN_IRQ, NULL); +} + +module_init(ts_mirage_init); +module_exit(ts_mirage_exit); + diff -urN linux-2.4.28-bk3/arch/mips/au1000/hydrogen3/Makefile linux-2.4.28-bk4/arch/mips/au1000/hydrogen3/Makefile --- linux-2.4.28-bk3/arch/mips/au1000/hydrogen3/Makefile 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/au1000/hydrogen3/Makefile 2004-11-23 02:49:27.307388536 -0800 @@ -10,10 +10,7 @@ # unless it's something special (ie not a .c file). # -.S.s: - $(CPP) $(CFLAGS) $< -o $*.s -.S.o: - $(CC) $(CFLAGS) -c $< -o $*.o +USE_STANDARD_AS_RULE := true O_TARGET := hydrogen3.o diff -urN linux-2.4.28-bk3/arch/mips/au1000/hydrogen3/board_setup.c linux-2.4.28-bk4/arch/mips/au1000/hydrogen3/board_setup.c --- linux-2.4.28-bk3/arch/mips/au1000/hydrogen3/board_setup.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/au1000/hydrogen3/board_setup.c 2004-11-23 02:49:27.308388577 -0800 @@ -44,10 +44,13 @@ #include #include #include -#include extern struct rtc_ops no_rtc_ops; +void board_reset (void) +{ +} + void __init board_setup(void) { u32 pin_func; diff -urN linux-2.4.28-bk3/arch/mips/au1000/hydrogen3/irqmap.c linux-2.4.28-bk4/arch/mips/au1000/hydrogen3/irqmap.c --- linux-2.4.28-bk3/arch/mips/au1000/hydrogen3/irqmap.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/au1000/hydrogen3/irqmap.c 2004-11-23 02:49:27.308388577 -0800 @@ -48,43 +48,9 @@ #include au1xxx_irq_map_t au1xxx_irq_map[] = { - { AU1000_UART0_INT, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_UART3_INT, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+1, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+2, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+3, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+4, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+5, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+6, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+7, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_IRDA_TX_INT, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_IRDA_RX_INT, INTC_INT_HIGH_LEVEL, 0}, - - { AU1000_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0}, - - { AU1000_USB_HOST_INT, INTC_INT_LOW_LEVEL, 0 }, - -// { AU1500_GPIO_205, INTC_INT_LOW_LEVEL, 0 }, - - { AU1000_ACSYNC_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_AC97C_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_USB_DEV_REQ_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_RTC_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 }, - - /* Careful if you change match 2 request! - * The interrupt handler is called directly - * from the low level dispatch code. - */ - { AU1000_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 }, + /* { AU1500_GPIO_205, INTC_INT_LOW_LEVEL, 0 }, */ + { AU1000_GPIO_21, INTC_INT_LOW_LEVEL, 0 }, }; int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t); diff -urN linux-2.4.28-bk3/arch/mips/au1000/mtx-1/Makefile linux-2.4.28-bk4/arch/mips/au1000/mtx-1/Makefile --- linux-2.4.28-bk3/arch/mips/au1000/mtx-1/Makefile 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/au1000/mtx-1/Makefile 2004-11-23 02:49:27.309388617 -0800 @@ -11,10 +11,7 @@ # unless it's something special (ie not a .c file). # -.S.s: - $(CPP) $(CFLAGS) $< -o $*.s -.S.o: - $(CC) $(CFLAGS) -c $< -o $*.o +USE_STANDARD_AS_RULE := true O_TARGET := mtx-1.o diff -urN linux-2.4.28-bk3/arch/mips/au1000/mtx-1/irqmap.c linux-2.4.28-bk4/arch/mips/au1000/mtx-1/irqmap.c --- linux-2.4.28-bk3/arch/mips/au1000/mtx-1/irqmap.c 2003-08-25 04:44:39.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips/au1000/mtx-1/irqmap.c 2004-11-23 02:49:27.309388617 -0800 @@ -47,47 +47,37 @@ #include #include +/* Need to define this. +*/ au1xxx_irq_map_t au1xxx_irq_map[] = { - { AU1000_UART0_INT, INTC_INT_HIGH_LEVEL, 0}, - - { AU1000_DMA_INT_BASE, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+1, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+2, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+3, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+4, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+5, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+6, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+7, INTC_INT_HIGH_LEVEL, 0}, - - { AU1000_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0}, - - { AU1000_USB_HOST_INT, INTC_INT_LOW_LEVEL, 0 }, - - { AU1000_PCI_INTA, INTC_INT_LOW_LEVEL, 0 }, - { AU1000_PCI_INTB, INTC_INT_LOW_LEVEL, 0 }, - { AU1000_PCI_INTC, INTC_INT_LOW_LEVEL, 0 }, - { AU1000_PCI_INTD, INTC_INT_LOW_LEVEL, 0 }, - - { AU1000_ACSYNC_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_AC97C_INT, INTC_INT_RISE_EDGE, 0 }, - - { AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 }, + { 0, 0, 0} +}; - { AU1000_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_USB_DEV_REQ_INT, INTC_INT_RISE_EDGE, 0 }, +int au1xxx_nr_irqs = 0; - { AU1000_RTC_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 }, +#ifdef CONFIG_PCI - /* Careful if you change match 2 request! - * The interrupt handler is called directly - * from the low level dispatch code. +#define INTA AU1000_PCI_INTA +#define INTB AU1000_PCI_INTB +#define INTC AU1000_PCI_INTC +#define INTD AU1000_PCI_INTD +#define INTX 0xFF /* not valid */ + +int __init +au1xxx_pci_irqmap(struct pci_dev *dev, unsigned char idsel, unsigned char pin) +{ + static char pci_irq_table[][4] = + /* + * PCI IDSEL/INTPIN->INTLINE + * A B C D */ - { AU1000_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 }, + { + {INTA, INTB, INTC, INTD}, /* IDSEL 0 */ + {INTA, INTB, INTC, INTD}, /* IDSEL 1 */ + {INTA, INTB, INTC, INTD}, /* IDSEL 2 */ + {INTA, INTB, INTC, INTD}, /* IDSEL 3 */ + }; + const long min_idsel = 0, max_idsel = 3, irqs_per_slot = 4; + return PCI_IRQ_TABLE_LOOKUP; }; - -int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t); +#endif diff -urN linux-2.4.28-bk3/arch/mips/au1000/pb1000/board_setup.c linux-2.4.28-bk4/arch/mips/au1000/pb1000/board_setup.c --- linux-2.4.28-bk3/arch/mips/au1000/pb1000/board_setup.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/au1000/pb1000/board_setup.c 2004-11-23 02:49:27.310388658 -0800 @@ -54,6 +54,10 @@ extern struct rtc_ops no_rtc_ops; +void board_reset (void) +{ +} + void __init board_setup(void) { u32 pin_func, static_cfg0; diff -urN linux-2.4.28-bk3/arch/mips/au1000/pb1000/irqmap.c linux-2.4.28-bk4/arch/mips/au1000/pb1000/irqmap.c --- linux-2.4.28-bk3/arch/mips/au1000/pb1000/irqmap.c 2003-08-25 04:44:39.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips/au1000/pb1000/irqmap.c 2004-11-23 02:49:27.310388658 -0800 @@ -48,49 +48,7 @@ #include au1xxx_irq_map_t au1xxx_irq_map[] = { - { AU1000_UART0_INT, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_UART1_INT, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_UART2_INT, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_UART3_INT, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_SSI0_INT, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_SSI1_INT, INTC_INT_HIGH_LEVEL, 0}, - - { AU1000_DMA_INT_BASE, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+1, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+2, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+3, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+4, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+5, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+6, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+7, INTC_INT_HIGH_LEVEL, 0}, - - { AU1000_IRDA_TX_INT, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_IRDA_RX_INT, INTC_INT_HIGH_LEVEL, 0}, - - { AU1000_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_MAC1_DMA_INT, INTC_INT_HIGH_LEVEL, 0}, - { AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_GPIO_15, INTC_INT_LOW_LEVEL, 0 }, - { AU1000_USB_HOST_INT, INTC_INT_LOW_LEVEL, 0 }, - - { AU1000_ACSYNC_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_AC97C_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_USB_DEV_REQ_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_RTC_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 }, - - /* Careful if you change match 2 request! - * The interrupt handler is called directly - * from the low level dispatch code. - */ - { AU1000_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 }, }; int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t); diff -urN linux-2.4.28-bk3/arch/mips/au1000/pb1100/board_setup.c linux-2.4.28-bk4/arch/mips/au1000/pb1100/board_setup.c --- linux-2.4.28-bk3/arch/mips/au1000/pb1100/board_setup.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/au1000/pb1100/board_setup.c 2004-11-23 02:49:27.311388699 -0800 @@ -56,6 +56,12 @@ extern struct rtc_ops pb1500_rtc_ops; #endif +void board_reset (void) +{ + /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */ + au_writel(0x00000000, 0xAE00001C); +} + void __init board_setup(void) { u32 pin_func; diff -urN linux-2.4.28-bk3/arch/mips/au1000/pb1100/irqmap.c linux-2.4.28-bk4/arch/mips/au1000/pb1100/irqmap.c --- linux-2.4.28-bk3/arch/mips/au1000/pb1100/irqmap.c 2003-08-25 04:44:39.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips/au1000/pb1100/irqmap.c 2004-11-23 02:49:27.311388699 -0800 @@ -48,53 +48,10 @@ #include au1xxx_irq_map_t au1xxx_irq_map[] = { - { AU1000_UART0_INT, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_UART1_INT, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_UART3_INT, INTC_INT_HIGH_LEVEL, 0}, - - { AU1000_SSI0_INT, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_SSI1_INT, INTC_INT_HIGH_LEVEL, 0}, - - { AU1000_DMA_INT_BASE, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+1, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+2, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+3, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+4, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+5, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+6, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+7, INTC_INT_HIGH_LEVEL, 0}, - - { AU1000_IRDA_TX_INT, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_IRDA_RX_INT, INTC_INT_HIGH_LEVEL, 0}, - - { AU1000_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0}, - - { AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0}, - - { AU1000_USB_HOST_INT, INTC_INT_LOW_LEVEL, 0 }, { AU1000_GPIO_9, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card Fully_Interted# { AU1000_GPIO_10, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card STSCHG# { AU1000_GPIO_11, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card IRQ# { AU1000_GPIO_13, INTC_INT_LOW_LEVEL, 0 }, // DC_IRQ# - { AU1000_GPIO_23, INTC_INT_LOW_LEVEL, 0 }, // 2-wire SCL - - { AU1000_ACSYNC_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_AC97C_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_USB_DEV_REQ_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_RTC_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 }, - - /* Careful if you change match 2 request! - * The interrupt handler is called directly - * from the low level dispatch code. - */ - { AU1000_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 }, }; int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t); diff -urN linux-2.4.28-bk3/arch/mips/au1000/pb1500/board_setup.c linux-2.4.28-bk4/arch/mips/au1000/pb1500/board_setup.c --- linux-2.4.28-bk3/arch/mips/au1000/pb1500/board_setup.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/au1000/pb1500/board_setup.c 2004-11-23 02:49:27.312388740 -0800 @@ -56,6 +56,12 @@ extern struct rtc_ops pb1500_rtc_ops; #endif +void board_reset (void) +{ + /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */ + au_writel(0x00000000, 0xAE00001C); +} + void __init board_setup(void) { u32 pin_func; diff -urN linux-2.4.28-bk3/arch/mips/au1000/pb1500/irqmap.c linux-2.4.28-bk4/arch/mips/au1000/pb1500/irqmap.c --- linux-2.4.28-bk3/arch/mips/au1000/pb1500/irqmap.c 2003-08-25 04:44:39.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips/au1000/pb1500/irqmap.c 2004-11-23 02:49:27.312388740 -0800 @@ -48,53 +48,37 @@ #include au1xxx_irq_map_t au1xxx_irq_map[] = { - { AU1000_UART0_INT, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_UART3_INT, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+1, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+2, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+3, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+4, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+5, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+6, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+7, INTC_INT_HIGH_LEVEL, 0}, - - { AU1000_IRDA_TX_INT, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_IRDA_RX_INT, INTC_INT_HIGH_LEVEL, 0}, - - { AU1000_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_MAC1_DMA_INT, INTC_INT_HIGH_LEVEL, 0}, { AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0}, - - { AU1000_USB_HOST_INT, INTC_INT_LOW_LEVEL, 0 }, - - { AU1000_PCI_INTA, INTC_INT_LOW_LEVEL, 0 }, - { AU1000_PCI_INTB, INTC_INT_LOW_LEVEL, 0 }, - { AU1000_PCI_INTC, INTC_INT_LOW_LEVEL, 0 }, - { AU1000_PCI_INTD, INTC_INT_LOW_LEVEL, 0 }, { AU1500_GPIO_201, INTC_INT_LOW_LEVEL, 0 }, { AU1500_GPIO_202, INTC_INT_LOW_LEVEL, 0 }, { AU1500_GPIO_203, INTC_INT_LOW_LEVEL, 0 }, { AU1500_GPIO_205, INTC_INT_LOW_LEVEL, 0 }, - { AU1500_GPIO_207, INTC_INT_LOW_LEVEL, 0 }, +}; - { AU1000_ACSYNC_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_AC97C_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_USB_DEV_REQ_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_RTC_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 }, - - /* Careful if you change match 2 request! - * The interrupt handler is called directly - * from the low level dispatch code. +int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t); + +#ifdef CONFIG_PCI + +#define INTA AU1000_PCI_INTA +#define INTB AU1000_PCI_INTB +#define INTC AU1000_PCI_INTC +#define INTD AU1000_PCI_INTD +#define INTX 0xFF /* not valid */ + +int __init +au1xxx_pci_irqmap(struct pci_dev *dev, unsigned char idsel, unsigned char pin) +{ + static char pci_irq_table[][4] = + /* + * PCI IDSEL/INTPIN->INTLINE + * A B C D */ - { AU1000_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 }, + { + {INTA, INTX, INTX, INTX}, /* IDSEL 12 - HPT370 */ + {INTA, INTB, INTC, INTD}, /* IDSEL 13 - PCI slot */ + }; + const long min_idsel = 12, max_idsel = 13, irqs_per_slot = 4; + return PCI_IRQ_TABLE_LOOKUP; }; +#endif -int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t); diff -urN linux-2.4.28-bk3/arch/mips/au1000/pb1550/Makefile linux-2.4.28-bk4/arch/mips/au1000/pb1550/Makefile --- linux-2.4.28-bk3/arch/mips/au1000/pb1550/Makefile 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/au1000/pb1550/Makefile 2004-11-23 02:49:27.313388780 -0800 @@ -10,10 +10,7 @@ # unless it's something special (ie not a .c file). # -.S.s: - $(CPP) $(CFLAGS) $< -o $*.s -.S.o: - $(CC) $(CFLAGS) -c $< -o $*.o +USE_STANDARD_AS_RULE := true O_TARGET := pb1550.o diff -urN linux-2.4.28-bk3/arch/mips/au1000/pb1550/board_setup.c linux-2.4.28-bk4/arch/mips/au1000/pb1550/board_setup.c --- linux-2.4.28-bk3/arch/mips/au1000/pb1550/board_setup.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/au1000/pb1550/board_setup.c 2004-11-23 02:49:27.313388780 -0800 @@ -44,24 +44,39 @@ #include #include #include -#include +#include extern struct rtc_ops no_rtc_ops; -static BCSR * const bcsr = (BCSR *)0xB3000000; +void board_reset (void) +{ + /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */ + au_writew(au_readw(0xAF00001C) & ~(1<<15), 0xAF00001C); +} void __init board_setup(void) { u32 pin_func; rtc_ops = &no_rtc_ops; -#ifdef CONFIG_AU1X00_USB_DEVICE - // 2nd USB port is USB device - pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000); + /* Enable PSC1 SYNC for AC97. Normaly done in audio driver, + * but it is board specific code, so put it here. + */ + pin_func = au_readl(SYS_PINFUNC); + au_sync(); + pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1; + au_writel(pin_func, SYS_PINFUNC); + + /* Do some more for PSC3 I2S audio. + */ + pin_func = au_readl(SYS_PINFUNC); + au_sync(); + pin_func &= ~SYS_PF_PSC3_MASK; + pin_func |= SYS_PF_PSC3_I2S | SYS_PF_EX0; au_writel(pin_func, SYS_PINFUNC); -#endif au_writel(0, (u32)bcsr|0x10); /* turn off pcmcia power */ + au_sync(); - printk("AMD Alchemy Pb1550 Board\n"); + printk("AMD Alchemy Pb1550 Board\n"); } diff -urN linux-2.4.28-bk3/arch/mips/au1000/pb1550/init.c linux-2.4.28-bk4/arch/mips/au1000/pb1550/init.c --- linux-2.4.28-bk3/arch/mips/au1000/pb1550/init.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/au1000/pb1550/init.c 2004-11-23 02:49:27.314388821 -0800 @@ -46,7 +46,7 @@ const char *get_system_type(void) { - return "AMD Alchemy PbAu1550"; + return "AMD Alchemy Au1550/Pb1550"; } int __init prom_init(int argc, char **argv, char **envp, int *prom_vec) @@ -64,7 +64,7 @@ memsize_str = prom_getenv("memsize"); if (!memsize_str) { - memsize = 0x04000000; + memsize = 0x08000000; } else { memsize = simple_strtol(memsize_str, NULL, 0); } diff -urN linux-2.4.28-bk3/arch/mips/au1000/pb1550/irqmap.c linux-2.4.28-bk4/arch/mips/au1000/pb1550/irqmap.c --- linux-2.4.28-bk3/arch/mips/au1000/pb1550/irqmap.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/au1000/pb1550/irqmap.c 2004-11-23 02:49:27.314388821 -0800 @@ -48,46 +48,35 @@ #include au1xxx_irq_map_t au1xxx_irq_map[] = { - { AU1550_UART0_INT, INTC_INT_HIGH_LEVEL, 0}, - { AU1550_PCI_INTA, INTC_INT_LOW_LEVEL, 0 }, - { AU1550_PCI_INTB, INTC_INT_LOW_LEVEL, 0 }, - { AU1550_DDMA_INT, INTC_INT_HIGH_LEVEL, 0}, - { AU1550_CRYPTO_INT, INTC_INT_HIGH_LEVEL, 0}, - { AU1550_PCI_INTC, INTC_INT_LOW_LEVEL, 0 }, - { AU1550_PCI_INTD, INTC_INT_LOW_LEVEL, 0 }, - { AU1550_PCI_RST_INT, INTC_INT_LOW_LEVEL, 0 }, - { AU1550_UART1_INT, INTC_INT_HIGH_LEVEL, 0}, - { AU1550_UART3_INT, INTC_INT_HIGH_LEVEL, 0}, - { AU1550_PSC0_INT, INTC_INT_HIGH_LEVEL, 0}, - { AU1550_PSC1_INT, INTC_INT_HIGH_LEVEL, 0}, - { AU1550_PSC2_INT, INTC_INT_HIGH_LEVEL, 0}, - { AU1550_PSC3_INT, INTC_INT_HIGH_LEVEL, 0}, - { AU1550_TOY_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1550_TOY_MATCH0_INT,INTC_INT_RISE_EDGE, 0 }, - { AU1550_TOY_MATCH1_INT,INTC_INT_RISE_EDGE, 0 }, - /* Careful if you change match 2 request! - * The interrupt handler is called directly - * from the low level dispatch code. - */ - { AU1550_TOY_MATCH2_INT,INTC_INT_RISE_EDGE, 0 }, - { AU1550_RTC_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1550_RTC_MATCH0_INT,INTC_INT_RISE_EDGE, 0 }, - { AU1550_RTC_MATCH1_INT,INTC_INT_RISE_EDGE, 0 }, - { AU1550_RTC_MATCH2_INT,INTC_INT_RISE_EDGE, 0 }, - { AU1550_RTC_MATCH2_INT,INTC_INT_RISE_EDGE, 0 }, - { AU1550_NAND_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1550_USB_DEV_REQ_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1550_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1550_USB_HOST_INT, INTC_INT_LOW_LEVEL, 0 }, - { AU1550_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0}, - { AU1550_MAC1_DMA_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_GPIO_0, INTC_INT_LOW_LEVEL, 0 }, + { AU1000_GPIO_1, INTC_INT_LOW_LEVEL, 0 }, +}; + +int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t); +#ifdef CONFIG_PCI + +#define INTA AU1550_PCI_INTA +#define INTB AU1550_PCI_INTB +#define INTC AU1550_PCI_INTC +#define INTD AU1550_PCI_INTD +#define INTX 0xFF /* invalid */ + +int __init +au1xxx_pci_irqmap(struct pci_dev *dev, unsigned char idsel, unsigned char pin) +{ + static char pci_irq_table[][4] = /* - * Need to define platform dependant GPIO ints here + * PCI IDSEL/INTPIN->INTLINE + * A B C D */ - #warning PbAu1550 needs GPIO Interrupts defined - + { + {INTB, INTC, INTD, INTA}, /* IDSEL 12 - PCI slot 2 (left) */ + {INTA, INTB, INTC, INTD}, /* IDSEL 13 - PCI slot 1 (right) */ + }; + const long min_idsel = 12, max_idsel = 13, irqs_per_slot = 4; + return PCI_IRQ_TABLE_LOOKUP; }; +#endif -int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t); diff -urN linux-2.4.28-bk3/arch/mips/au1000/xxs1500/Makefile linux-2.4.28-bk4/arch/mips/au1000/xxs1500/Makefile --- linux-2.4.28-bk3/arch/mips/au1000/xxs1500/Makefile 2003-08-25 04:44:39.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips/au1000/xxs1500/Makefile 2004-11-23 02:49:27.315388862 -0800 @@ -10,10 +10,7 @@ # unless it's something special (ie not a .c file). # -.S.s: - $(CPP) $(CFLAGS) $< -o $*.s -.S.o: - $(CC) $(CFLAGS) -c $< -o $*.o +USE_STANDARD_AS_RULE := true O_TARGET := xxs1500.o diff -urN linux-2.4.28-bk3/arch/mips/au1000/xxs1500/board_setup.c linux-2.4.28-bk4/arch/mips/au1000/xxs1500/board_setup.c --- linux-2.4.28-bk3/arch/mips/au1000/xxs1500/board_setup.c 2003-08-25 04:44:39.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips/au1000/xxs1500/board_setup.c 2004-11-23 02:49:27.315388862 -0800 @@ -47,6 +47,12 @@ extern struct rtc_ops no_rtc_ops; +void board_reset (void) +{ + /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */ + au_writel(0x00000000, 0xAE00001C); +} + void __init board_setup(void) { u32 pin_func; diff -urN linux-2.4.28-bk3/arch/mips/au1000/xxs1500/irqmap.c linux-2.4.28-bk4/arch/mips/au1000/xxs1500/irqmap.c --- linux-2.4.28-bk3/arch/mips/au1000/xxs1500/irqmap.c 2003-08-25 04:44:39.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips/au1000/xxs1500/irqmap.c 2004-11-23 02:49:27.316388903 -0800 @@ -48,29 +48,7 @@ #include au1xxx_irq_map_t au1xxx_irq_map[] = { - { AU1000_UART0_INT, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_UART3_INT, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+1, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+2, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+3, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+4, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+5, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+6, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_DMA_INT_BASE+7, INTC_INT_HIGH_LEVEL, 0}, - - { AU1000_IRDA_TX_INT, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_IRDA_RX_INT, INTC_INT_HIGH_LEVEL, 0}, - - { AU1000_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0}, - { AU1000_MAC1_DMA_INT, INTC_INT_HIGH_LEVEL, 0}, { AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0}, - - { AU1000_USB_HOST_INT, INTC_INT_LOW_LEVEL, 0 }, - { AU1000_PCI_INTA, INTC_INT_LOW_LEVEL, 0 }, - { AU1000_PCI_INTB, INTC_INT_LOW_LEVEL, 0 }, - { AU1000_PCI_INTC, INTC_INT_LOW_LEVEL, 0 }, - { AU1000_PCI_INTD, INTC_INT_LOW_LEVEL, 0 }, { AU1500_GPIO_201, INTC_INT_LOW_LEVEL, 0 }, { AU1500_GPIO_202, INTC_INT_LOW_LEVEL, 0 }, { AU1500_GPIO_203, INTC_INT_LOW_LEVEL, 0 }, @@ -83,24 +61,31 @@ { AU1000_GPIO_3, INTC_INT_LOW_LEVEL, 0 }, { AU1000_GPIO_4, INTC_INT_LOW_LEVEL, 0 }, /* CF interrupt */ { AU1000_GPIO_5, INTC_INT_LOW_LEVEL, 0 }, - - { AU1000_ACSYNC_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_AC97C_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_USB_DEV_REQ_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_RTC_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 }, - - /* Careful if you change match 2 request! - * The interrupt handler is called directly - * from the low level dispatch code. - */ - { AU1000_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 }, }; int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t); + +#ifdef CONFIG_PCI + +#define INTA AU1000_PCI_INTA +#define INTB AU1000_PCI_INTB +#define INTC AU1000_PCI_INTC +#define INTD AU1000_PCI_INTD +#define INTX 0xFF /* not valid */ + +int __init +au1xxx_pci_irqmap(struct pci_dev *dev, unsigned char idsel, unsigned char pin) +{ + static char pci_irq_table[][4] = + /* + * PCI IDSEL/INTPIN->INTLINE + * A B C D + */ + { + {INTA, INTX, INTX, INTX}, /* IDSEL 12 */ + {INTA, INTB, INTC, INTD}, /* IDSEL 13 - PCI slot */ + }; + const long min_idsel = 12, max_idsel = 13, irqs_per_slot = 4; + return PCI_IRQ_TABLE_LOOKUP; +}; +#endif diff -urN linux-2.4.28-bk3/arch/mips/boot/Makefile linux-2.4.28-bk4/arch/mips/boot/Makefile --- linux-2.4.28-bk3/arch/mips/boot/Makefile 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/boot/Makefile 2004-11-23 02:49:27.316388903 -0800 @@ -4,6 +4,7 @@ # for more details. # # Copyright (C) 1995, 1998, 2001 by Ralf Baechle +# Copyright (C) 2004 Maciej W. Rozycki # USE_STANDARD_AS_RULE := true @@ -21,19 +22,23 @@ # Drop some uninteresting sections in the kernel. # This is only relevant for ELF kernels but doesn't hurt a.out # -drop-sections = .reginfo .mdebug +drop-sections = .reginfo .mdebug .comment .note .pdr .options .MIPS.options strip-flags = $(addprefix --remove-section=,$(drop-sections)) -all: vmlinux.ecoff vmlinux.srec addinitrd +VMLINUX = $(TOPDIR)/vmlinux -vmlinux.ecoff: $(CONFIGURE) elf2ecoff $(TOPDIR)/vmlinux - ./elf2ecoff $(TOPDIR)/vmlinux vmlinux.ecoff $(E2EFLAGS) +all: + +boot: vmlinux.ecoff vmlinux.srec addinitrd + +vmlinux.ecoff: $(CONFIGURE) elf2ecoff $(VMLINUX) + ./elf2ecoff $(VMLINUX) vmlinux.ecoff $(E2EFLAGS) elf2ecoff: elf2ecoff.c $(HOSTCC) -o $@ $^ -vmlinux.srec: $(CONFIGURE) $(TOPDIR)/vmlinux - $(OBJCOPY) -S -O srec $(strip-flags) $(TOPDIR)/vmlinux vmlinux.srec +vmlinux.srec: $(CONFIGURE) $(VMLINUX) + $(OBJCOPY) -S -O srec $(strip-flags) $(VMLINUX) vmlinux.srec addinitrd: addinitrd.c $(HOSTCC) -o $@ $^ @@ -42,15 +47,10 @@ dep: clean: - rm -f vmlinux.ecoff - rm -f vmlinux.srec - rm -f zImage zImage.tmp + rm -f vmlinux.ecoff vmlinux.srec mrproper: - rm -f vmlinux.ecoff - rm -f vmlinux.srec - rm -f addinitrd - rm -f elf2ecoff + rm -f vmlinux.ecoff vmlinux.srec addinitrd elf2ecoff dummy: diff -urN linux-2.4.28-bk3/arch/mips/boot/addinitrd.c linux-2.4.28-bk4/arch/mips/boot/addinitrd.c --- linux-2.4.28-bk3/arch/mips/boot/addinitrd.c 2002-11-28 15:53:09.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/boot/addinitrd.c 2004-11-23 02:49:27.317388943 -0800 @@ -2,6 +2,8 @@ * addinitrd - program to add a initrd image to an ecoff kernel * * (C) 1999 Thomas Bogendoerfer + * minor modifications, cleanup: Guido Guenther + * further cleanup: Maciej W. Rozycki */ #include @@ -54,7 +56,7 @@ exit (1); } - if ((fd_vmlinux = open (argv[1],O_RDWR)) < 0) + if ((fd_vmlinux = open (argv[1],O_RDONLY)) < 0) die ("open vmlinux"); if (read (fd_vmlinux, &efile, sizeof efile) != sizeof efile) die ("read file header"); @@ -78,6 +80,11 @@ swab = 1; } + /* make sure we have an empty data segment for the initrd */ + if (eaout.dsize || esecs[1].s_size) { + fprintf (stderr, "Data segment not empty. Giving up!\n"); + exit (1); + } if ((fd_initrd = open (argv[2], O_RDONLY)) < 0) die ("open initrd"); if (fstat (fd_initrd, &st) < 0) diff -urN linux-2.4.28-bk3/arch/mips/config-shared.in linux-2.4.28-bk4/arch/mips/config-shared.in --- linux-2.4.28-bk3/arch/mips/config-shared.in 2004-11-17 03:54:21.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/config-shared.in 2004-11-23 02:49:27.319389025 -0800 @@ -25,10 +25,8 @@ dep_bool 'Support for Alchemy Db1000 board' CONFIG_MIPS_DB1000 $CONFIG_MIPS32 dep_bool 'Support for Alchemy Db1100 board' CONFIG_MIPS_DB1100 $CONFIG_MIPS32 dep_bool 'Support for Alchemy Db1500 board' CONFIG_MIPS_DB1500 $CONFIG_MIPS32 +dep_bool 'Support for Alchemy Db1550 board' CONFIG_MIPS_DB1550 $CONFIG_MIPS32 dep_bool 'Support for Alchemy PB1000 board' CONFIG_MIPS_PB1000 $CONFIG_MIPS32 -if [ "$CONFIG_MIPS_PB1000" = "y" ]; then - bool ' Support for PCI AUTO Config' CONFIG_PCI_AUTO -fi dep_bool 'Support for Alchemy PB1100 board' CONFIG_MIPS_PB1100 $CONFIG_MIPS32 dep_bool 'Support for Alchemy PB1500 board' CONFIG_MIPS_PB1500 $CONFIG_MIPS32 dep_bool 'Support for Alchemy Hydrogen3 board' CONFIG_MIPS_HYDROGEN3 $CONFIG_MIPS32 @@ -39,10 +37,8 @@ dep_bool 'Support for BAGET MIPS series (EXPERIMENTAL)' CONFIG_BAGET_MIPS $CONFIG_MIPS32 $CONFIG_EXPERIMENTAL bool 'Support for CASIO CASSIOPEIA E-10/15/55/65' CONFIG_CASIO_E55 dep_bool 'Support for Cobalt Server (EXPERIMENTAL)' CONFIG_MIPS_COBALT $CONFIG_EXPERIMENTAL -if [ "$CONFIG_MIPS32" = "y" ]; then +if [ "$CONFIG_MIPS32" = "y" -o "$CONFIG_EXPERIMENTAL" = "y" ]; then bool 'Support for DECstations' CONFIG_DECSTATION -else - dep_bool 'Support for DECstations (EXPERIMENTAL)' CONFIG_DECSTATION $CONFIG_EXPERIMENTAL fi dep_bool 'Support for Galileo EV64120 Evaluation board (EXPERIMENTAL)' CONFIG_MIPS_EV64120 $CONFIG_EXPERIMENTAL if [ "$CONFIG_MIPS_EV64120" = "y" ]; then @@ -64,6 +60,9 @@ tristate ' PICVUE LCD display driver' CONFIG_PICVUE dep_tristate ' PICVUE LCD display driver /proc interface' CONFIG_PICVUE_PROC $CONFIG_PICVUE bool ' DS1603 RTC driver' CONFIG_DS1603 + if [ "$CONFIG_DS1603" = "y" ]; then + define_bool CONFIG_MIPS_RTC y + fi bool ' LASAT sysctl interface' CONFIG_LASAT_SYSCTL fi bool 'Support for ITE 8172G board' CONFIG_MIPS_ITE8172 @@ -78,7 +77,9 @@ bool 'Support for Momentum Ocelot-G board' CONFIG_MOMENCO_OCELOT_G bool 'Support for Momentum Ocelot-C and -CS boards' CONFIG_MOMENCO_OCELOT_C bool 'Support for Momentum Jaguar-ATX boards' CONFIG_MOMENCO_JAGUAR_ATX -bool 'Support PMC-Sierra Yosemite board' CONFIG_PMC_YOSEMITE +bool 'Support for PMC-Sierra Big Sur board' CONFIG_PMC_BIG_SUR +bool 'Support for PMC-Sierra Stretch board' CONFIG_PMC_STRETCH +bool 'Support for PMC-Sierra Yosemite board' CONFIG_PMC_YOSEMITE if [ "$CONFIG_PMC_YOSEMITE" = "y" ]; then bool ' Hypertransport Support for PMC-Sierra Yosemite' CONFIG_HYPERTRANSPORT fi @@ -124,14 +125,14 @@ BCM91250C2-LittleSur CONFIG_SIBYTE_LITTLESUR \ BCM91120C-CRhine CONFIG_SIBYTE_CRHINE \ BCM91125C-CRhone CONFIG_SIBYTE_CRHONE \ - Other CONFIG_SIBYTE_UNKNOWN" CONFIG_SIBYTE_SWARM + Other CONFIG_SIBYTE_UNKNOWN" BCM91250A-SWARM if [ "$CONFIG_SIBYTE_UNKNOWN" = "y" ]; then choice ' BCM1xxx SOC Type' \ "BCM1250 CONFIG_SIBYTE_SB1250 \ BCM1120 CONFIG_SIBYTE_BCM1120 \ BCM1125 CONFIG_SIBYTE_BCM1125 \ - BCM1125H CONFIG_SIBYTE_BCM1125H" CONFIG_SIBYTE_SB1250 + BCM1125H CONFIG_SIBYTE_BCM1125H" BCM1250 unset CONFIG_SIBYTE_BOARD else define_bool CONFIG_SIBYTE_BOARD y @@ -191,19 +192,6 @@ bool ' Support for SB1/SOC profiling - SB1/SCD perf counters' CONFIG_SIBYTE_SB1250_PROF bool ' Support for ZBbus profiling' CONFIG_SIBYTE_TBPROF - if [ "$CONFIG_SIBYTE_SB1250" = "y" -o \ - "$CONFIG_SIBYTE_BCM1125" = "y" -o \ - "$CONFIG_SIBYTE_BCM1125H" = "y" ]; then - bool ' Support for BCM1250/BCM1125 onchip PCI controller' CONFIG_PCI - fi - - if [ "$CONFIG_SIBYTE_SB1250" = "y" -o \ - "$CONFIG_SIBYTE_BCM1125H" = "y" ]; then - if [ "$CONFIG_PCI" = "y" ]; then - define_bool CONFIG_SIBYTE_HAS_LDT y - fi - fi - if [ "$CONFIG_SIBYTE_SWARM" = "y" -o \ "$CONFIG_SIBYTE_LITTLESUR" = "y" -o \ "$CONFIG_SIBYTE_PTSWARM" = "y" -o \ @@ -215,6 +203,7 @@ "$CONFIG_SIBYTE_STANDALONE" != "y" ]; then define_bool CONFIG_SMP_CAPABLE y fi + define_bool CONFIG_MIPS_RTC y fi bool 'Support for SNI RM200 PCI' CONFIG_SNI_RM200_PCI bool 'Support for TANBAC TB0226 (Mbase)' CONFIG_TANBAC_TB0226 @@ -246,11 +235,9 @@ define_bool CONFIG_MIPS_JAZZ y define_bool CONFIG_NONCOHERENT_IO y define_bool CONFIG_PC_KEYB y - define_bool CONFIG_OLD_TIME_C y fi if [ "$CONFIG_CASIO_E55" = "y" ]; then define_bool CONFIG_IRQ_CPU y - define_bool CONFIG_NEW_TIME_C y define_bool CONFIG_NONCOHERENT_IO y define_bool CONFIG_ISA y define_bool CONFIG_DUMMY_KEYB y @@ -259,29 +246,18 @@ if [ "$CONFIG_MIPS_MIRAGE" = "y" ]; then define_bool CONFIG_SOC_AU1X00 y define_bool CONFIG_SOC_AU1500 y - define_bool CONFIG_NEW_TIME_C y define_bool CONFIG_PC_KEYB y - define_bool CONFIG_PCI y - define_bool CONFIG_NEW_PCI y - define_bool CONFIG_PCI_AUTO y define_bool CONFIG_NONCOHERENT_IO y fi if [ "$CONFIG_MIPS_BOSPORUS" = "y" ]; then define_bool CONFIG_SOC_AU1X00 y define_bool CONFIG_SOC_AU1500 y - define_bool CONFIG_NEW_TIME_C y define_bool CONFIG_PC_KEYB y - define_bool CONFIG_PCI y - define_bool CONFIG_NEW_PCI y - define_bool CONFIG_PCI_AUTO y define_bool CONFIG_NONCOHERENT_IO y fi if [ "$CONFIG_MIPS_PB1000" = "y" ]; then define_bool CONFIG_SOC_AU1X00 y define_bool CONFIG_SOC_AU1000 y - define_bool CONFIG_NEW_TIME_C y - define_bool CONFIG_PCI y - define_bool CONFIG_NEW_PCI y define_bool CONFIG_NONCOHERENT_IO y define_bool CONFIG_PC_KEYB y define_bool CONFIG_SWAP_IO_SPACE_W y @@ -290,10 +266,6 @@ if [ "$CONFIG_MIPS_PB1100" = "y" ]; then define_bool CONFIG_SOC_AU1X00 y define_bool CONFIG_SOC_AU1100 y - define_bool CONFIG_NEW_TIME_C y - define_bool CONFIG_PCI y - define_bool CONFIG_PCI_AUTO n - define_bool CONFIG_NEW_PCI y define_bool CONFIG_NONCOHERENT_IO y define_bool CONFIG_PC_KEYB y define_bool CONFIG_SWAP_IO_SPACE_W y @@ -302,21 +274,12 @@ if [ "$CONFIG_MIPS_PB1500" = "y" ]; then define_bool CONFIG_SOC_AU1X00 y define_bool CONFIG_SOC_AU1500 y - define_bool CONFIG_NEW_TIME_C y - define_bool CONFIG_PCI y - define_bool CONFIG_NEW_PCI y - define_bool CONFIG_PCI_AUTO y define_bool CONFIG_NONCOHERENT_IO y define_bool CONFIG_PC_KEYB y fi if [ "$CONFIG_MIPS_DB1000" = "y" ]; then define_bool CONFIG_SOC_AU1X00 y define_bool CONFIG_SOC_AU1000 y - define_bool CONFIG_NEW_TIME_C y - # CONFIG_PCI needed for USB - define_bool CONFIG_PCI y - define_bool CONFIG_NEW_PCI y - define_bool CONFIG_PCI_AUTO n define_bool CONFIG_NONCOHERENT_IO y define_bool CONFIG_PC_KEYB y define_bool CONFIG_SWAP_IO_SPACE y @@ -324,19 +287,18 @@ if [ "$CONFIG_MIPS_DB1500" = "y" ]; then define_bool CONFIG_SOC_AU1X00 y define_bool CONFIG_SOC_AU1500 y - define_bool CONFIG_NEW_TIME_C y - define_bool CONFIG_PCI y - define_bool CONFIG_NEW_PCI y - define_bool CONFIG_PCI_AUTO y + define_bool CONFIG_NONCOHERENT_IO y + define_bool CONFIG_PC_KEYB y +fi +if [ "$CONFIG_MIPS_DB1550" = "y" ]; then + define_bool CONFIG_SOC_AU1X00 y + define_bool CONFIG_SOC_AU1550 y define_bool CONFIG_NONCOHERENT_IO y define_bool CONFIG_PC_KEYB y fi if [ "$CONFIG_MIPS_DB1100" = "y" ]; then define_bool CONFIG_SOC_AU1X00 y define_bool CONFIG_SOC_AU1100 y - define_bool CONFIG_NEW_TIME_C y - define_bool CONFIG_PCI y - define_bool CONFIG_NEW_PCI y define_bool CONFIG_NONCOHERENT_IO y define_bool CONFIG_PC_KEYB y define_bool CONFIG_SWAP_IO_SPACE y @@ -344,9 +306,6 @@ if [ "$CONFIG_MIPS_HYDROGEN3" = "y" ]; then define_bool CONFIG_SOC_AU1X00 y define_bool CONFIG_SOC_AU1100 y - define_bool CONFIG_NEW_TIME_C y - define_bool CONFIG_PCI y - define_bool CONFIG_NEW_PCI y define_bool CONFIG_NONCOHERENT_IO y define_bool CONFIG_PC_KEYB y define_bool CONFIG_SWAP_IO_SPACE y @@ -354,39 +313,23 @@ if [ "$CONFIG_MIPS_XXS1500" = "y" ]; then define_bool CONFIG_SOC_AU1X00 y define_bool CONFIG_SOC_AU1500 y - define_bool CONFIG_NEW_TIME_C y - define_bool CONFIG_PCI y - define_bool CONFIG_NEW_PCI y - define_bool CONFIG_PCI_AUTO y define_bool CONFIG_NONCOHERENT_IO y define_bool CONFIG_PC_KEYB y fi if [ "$CONFIG_MIPS_MTX1" = "y" ]; then define_bool CONFIG_SOC_AU1X00 y define_bool CONFIG_SOC_AU1500 y - define_bool CONFIG_NEW_TIME_C y - define_bool CONFIG_PCI y - define_bool CONFIG_NEW_PCI y - define_bool CONFIG_PCI_AUTO y define_bool CONFIG_NONCOHERENT_IO y fi if [ "$CONFIG_COGENT_CSB250" = "y" ]; then define_bool CONFIG_SOC_AU1X00 y define_bool CONFIG_SOC_AU1500 y - define_bool CONFIG_NEW_TIME_C y - define_bool CONFIG_PCI y - define_bool CONFIG_NEW_PCI y - define_bool CONFIG_PCI_AUTO y define_bool CONFIG_NONCOHERENT_IO y define_bool CONFIG_PC_KEYB y fi if [ "$CONFIG_MIPS_PB1550" = "y" ]; then define_bool CONFIG_SOC_AU1X00 y define_bool CONFIG_SOC_AU1550 y - define_bool CONFIG_NEW_TIME_C y - define_bool CONFIG_PCI y - define_bool CONFIG_NEW_PCI y - define_bool CONFIG_PCI_AUTO y define_bool CONFIG_NONCOHERENT_IO n define_bool CONFIG_PC_KEYB y fi @@ -394,53 +337,37 @@ define_bool CONFIG_BOOT_ELF32 y define_bool CONFIG_COBALT_LCD y define_bool CONFIG_I8259 y - define_bool CONFIG_PCI y - define_bool CONFIG_NEW_TIME_C y define_bool CONFIG_NONCOHERENT_IO y fi if [ "$CONFIG_DECSTATION" = "y" ]; then + define_bool CONFIG_EARLY_PRINTK y define_bool CONFIG_BOOT_ELF32 y define_bool CONFIG_IRQ_CPU y define_int CONFIG_L1_CACHE_SHIFT 4 - define_bool CONFIG_NEW_TIME_C y define_bool CONFIG_NONCOHERENT_IO y fi if [ "$CONFIG_MIPS_EV64120" = "y" ]; then - define_bool CONFIG_PCI y define_bool CONFIG_MIPS_GT64120 y define_bool CONFIG_NONCOHERENT_IO y - define_bool CONFIG_OLD_TIME_C y fi if [ "$CONFIG_MIPS_EV96100" = "y" ]; then - define_bool CONFIG_PCI y define_bool CONFIG_MIPS_GT64120 y define_bool CONFIG_MIPS_GT96100 y - define_bool CONFIG_NEW_PCI y define_bool CONFIG_NONCOHERENT_IO y - define_bool CONFIG_PCI_AUTO y define_bool CONFIG_SWAP_IO_SPACE_W y define_bool CONFIG_SWAP_IO_SPACE_L y fi if [ "$CONFIG_MIPS_IVR" = "y" ]; then - define_bool CONFIG_PCI y define_bool CONFIG_PC_KEYB y - define_bool CONFIG_NEW_PCI y define_bool CONFIG_NONCOHERENT_IO y - define_bool CONFIG_PCI_AUTO y define_bool CONFIG_IT8172_CIR y - define_bool CONFIG_NEW_TIME_C y fi if [ "$CONFIG_HP_LASERJET" = "y" ]; then define_bool CONFIG_IRQ_CPU y - define_bool CONFIG_NEW_TIME_C y - define_bool CONFIG_NEW_PCI y define_bool CONFIG_NONCOHERENT_IO y - define_bool CONFIG_PCI y - #not yet define_bool CONFIG_PCI_AUTO y fi if [ "$CONFIG_IBM_WORKPAD" = "y" ]; then define_bool CONFIG_IRQ_CPU y - define_bool CONFIG_NEW_TIME_C y define_bool CONFIG_NONCOHERENT_IO y define_bool CONFIG_ISA y define_bool CONFIG_SCSI n @@ -448,21 +375,15 @@ if [ "$CONFIG_LASAT" = "y" ]; then define_bool CONFIG_BOARD_SCACHE y define_bool CONFIG_R5000_CPU_SCACHE y - define_bool CONFIG_PCI y define_bool CONFIG_MIPS_GT64120 y define_bool CONFIG_MIPS_NILE4 y define_bool CONFIG_NONCOHERENT_IO y - define_bool CONFIG_NEW_TIME_C y fi if [ "$CONFIG_MIPS_ITE8172" = "y" ]; then - define_bool CONFIG_PCI y define_bool CONFIG_IT8712 y define_bool CONFIG_PC_KEYB y - define_bool CONFIG_NEW_PCI y define_bool CONFIG_NONCOHERENT_IO y - define_bool CONFIG_PCI_AUTO y define_bool CONFIG_IT8172_CIR y - define_bool CONFIG_NEW_TIME_C y fi if [ "$CONFIG_MIPS_ATLAS" = "y" ]; then define_bool CONFIG_BOOT_ELF32 y @@ -470,9 +391,7 @@ define_bool CONFIG_MIPS_BONITO64 y define_bool CONFIG_MIPS_GT64120 y define_bool CONFIG_MIPS_MSC y - define_bool CONFIG_NEW_TIME_C y define_bool CONFIG_NONCOHERENT_IO y - define_bool CONFIG_PCI y define_bool CONFIG_SWAP_IO_SPACE_W y define_bool CONFIG_SWAP_IO_SPACE_L y fi @@ -486,7 +405,6 @@ define_bool CONFIG_MIPS_JAZZ y define_bool CONFIG_NONCOHERENT_IO y define_bool CONFIG_PC_KEYB y - define_bool CONFIG_OLD_TIME_C y fi if [ "$CONFIG_MIPS_MALTA" = "y" ]; then define_bool CONFIG_BOOT_ELF32 y @@ -496,59 +414,58 @@ define_bool CONFIG_MIPS_GT64120 y define_bool CONFIG_MIPS_MSC y define_int CONFIG_L1_CACHE_SHIFT 5 - define_bool CONFIG_NEW_TIME_C y define_bool CONFIG_NONCOHERENT_IO y define_bool CONFIG_SWAP_IO_SPACE_W y define_bool CONFIG_SWAP_IO_SPACE_L y define_bool CONFIG_PC_KEYB y - define_bool CONFIG_PCI y fi if [ "$CONFIG_MIPS_SEAD" = "y" ]; then define_bool CONFIG_BOOT_ELF32 y define_int CONFIG_L1_CACHE_SHIFT 5 - define_bool CONFIG_NEW_TIME_C y define_bool CONFIG_NONCOHERENT_IO y - define_bool CONFIG_PCI n fi if [ "$CONFIG_MOMENCO_OCELOT" = "y" ]; then - define_bool CONFIG_PCI y define_bool CONFIG_SYSCLK_100 y define_bool CONFIG_SWAP_IO_SPACE_W y define_bool CONFIG_SWAP_IO_SPACE_L y define_bool CONFIG_NONCOHERENT_IO y - define_bool CONFIG_OLD_TIME_C y fi if [ "$CONFIG_MOMENCO_OCELOT_G" = "y" ]; then - define_bool CONFIG_PCI y + define_bool CONFIG_IRQ_CPU y + define_bool CONFIG_IRQ_CPU_RM7K y + define_bool CONFIG_NONCOHERENT_IO y define_bool CONFIG_SYSCLK_100 y define_bool CONFIG_SWAP_IO_SPACE_W y define_bool CONFIG_SWAP_IO_SPACE_L y - define_bool CONFIG_NONCOHERENT_IO y - define_bool CONFIG_OLD_TIME_C y fi if [ "$CONFIG_MOMENCO_OCELOT_C" = "y" ]; then - define_bool CONFIG_PCI y define_bool CONFIG_SWAP_IO_SPACE y define_bool CONFIG_NONCOHERENT_IO y - define_bool CONFIG_NEW_TIME_C y + define_bool CONFIG_BOOT_ELF32 y +fi +if [ "$CONFIG_PMC_BIG_SUR" = "y" ]; then define_bool CONFIG_BOOT_ELF32 y fi if [ "$CONFIG_MOMENCO_JAGUAR_ATX" = "y" ]; then - define_bool CONFIG_PCI y define_bool CONFIG_SWAP_IO_SPACE y define_bool CONFIG_NONCOHERENT_IO y - define_bool CONFIG_NEW_TIME_C y define_bool CONFIG_BOOT_ELF32 y fi -if [ "$CONFIG_PMC_YOSEMITE" = "y" ]; then +if [ "$CONFIG_PMC_STRETCH" = "y" ]; then + define_bool CONFIG_SWAP_IO_SPACE_W y + define_bool CONFIG_SWAP_IO_SPACE_L y define_bool CONFIG_PCI y + define_bool CONFIG_BOOT_ELF32 y + define_bool CONFIG_NONCOHERENT_IO y +fi + +if [ "$CONFIG_PMC_YOSEMITE" = "y" ]; then define_bool CONFIG_SWAP_IO_SPACE y define_bool CONFIG_SWAP_IO_SPACE_W y define_bool CONFIG_SWAP_IO_SPACE_L y define_bool CONFIG_BOOT_ELF32 y define_bool CONFIG_HIGHMEM y - define_bool CONFIG_NEW_TIME_C y define_bool CONFIG_NONCOHERENT_IO y fi @@ -557,55 +474,37 @@ define_bool CONFIG_I8259 y define_bool CONFIG_ISA y define_bool CONFIG_NONCOHERENT_IO y - define_bool CONFIG_PCI y define_bool CONFIG_PC_KEYB y - define_bool CONFIG_NEW_TIME_C y - define_bool CONFIG_PCI_AUTO y define_bool CONFIG_IRQ_CPU y - define_bool CONFIG_NEW_PCI y fi if [ "$CONFIG_DDB5476" = "y" ]; then define_bool CONFIG_ISA y - define_bool CONFIG_PCI y define_bool CONFIG_PC_KEYB y define_bool CONFIG_IRQ_CPU y define_bool CONFIG_I8259 y define_bool CONFIG_HAVE_STD_PC_SERIAL_PORT y - define_bool CONFIG_NEW_PCI y - define_bool CONFIG_PCI_AUTO y - define_bool CONFIG_NEW_TIME_C y define_bool CONFIG_NONCOHERENT_IO y fi if [ "$CONFIG_DDB5477" = "y" ]; then - define_bool CONFIG_PCI y - define_bool CONFIG_NEW_TIME_C y define_bool CONFIG_IRQ_CPU y - define_bool CONFIG_NEW_PCI y define_bool CONFIG_NONCOHERENT_IO y - define_bool CONFIG_PCI_AUTO y define_bool CONFIG_PC_KEYB y define_bool CONFIG_I8259 y fi if [ "$CONFIG_NEC_OSPREY" = "y" ]; then define_bool CONFIG_VR4181 y define_bool CONFIG_IRQ_CPU y - define_bool CONFIG_NEW_TIME_C y define_bool CONFIG_NONCOHERENT_IO y define_bool CONFIG_DUMMY_KEYB y define_bool CONFIG_SCSI n fi if [ "$CONFIG_NEC_EAGLE" = "y" ]; then define_bool CONFIG_IRQ_CPU y - define_bool CONFIG_NEW_TIME_C y define_bool CONFIG_NONCOHERENT_IO y - define_bool CONFIG_PCI y - define_bool CONFIG_NEW_PCI y - define_bool CONFIG_PCI_AUTO y define_bool CONFIG_DUMMY_KEYB y define_bool CONFIG_SCSI n fi if [ "$CONFIG_NINO" = "y" ]; then - define_bool CONFIG_NEW_TIME_C y define_bool CONFIG_NONCOHERENT_IO y define_bool CONFIG_PC_KEYB y fi @@ -618,7 +517,6 @@ define_bool CONFIG_SWAP_IO_SPACE_L y define_bool CONFIG_IRQ_CPU y define_int CONFIG_L1_CACHE_SHIFT 5 - define_bool CONFIG_NEW_TIME_C y define_bool CONFIG_NONCOHERENT_IO y define_bool CONFIG_PC_KEYB y fi @@ -627,12 +525,9 @@ define_bool CONFIG_ARC64 y define_int CONFIG_L1_CACHE_SHIFT 7 #define_bool CONFIG_MAPPED_PCI_IO y - define_bool CONFIG_NEW_TIME_C y - define_bool CONFIG_PCI y define_bool CONFIG_QL_ISP_A64 y fi if [ "$CONFIG_SIBYTE_SB1xxx_SOC" = "y" ]; then - define_bool CONFIG_NEW_TIME_C y define_bool CONFIG_DUMMY_KEYB y define_bool CONFIG_SWAP_IO_SPACE_W y define_bool CONFIG_SWAP_IO_SPACE_L y @@ -645,46 +540,28 @@ define_bool CONFIG_I8259 y define_bool CONFIG_ISA y define_bool CONFIG_NONCOHERENT_IO y - define_bool CONFIG_OLD_TIME_C y define_bool CONFIG_PC_KEYB y - define_bool CONFIG_PCI y fi if [ "$CONFIG_TANBAC_TB0226" = "y" ]; then define_bool CONFIG_IRQ_CPU y - define_bool CONFIG_NEW_TIME_C y define_bool CONFIG_NONCOHERENT_IO y - define_bool CONFIG_PCI y - define_bool CONFIG_NEW_PCI y - define_bool CONFIG_PCI_AUTO y define_bool CONFIG_DUMMY_KEYB y define_bool CONFIG_SERIAL_MANY_PORTS y fi if [ "$CONFIG_TANBAC_TB0229" = "y" ]; then define_bool CONFIG_IRQ_CPU y - define_bool CONFIG_NEW_TIME_C y define_bool CONFIG_NONCOHERENT_IO y - define_bool CONFIG_PCI y - define_bool CONFIG_NEW_PCI y - define_bool CONFIG_PCI_AUTO y define_bool CONFIG_DUMMY_KEYB y define_bool CONFIG_SERIAL_MANY_PORTS y fi if [ "$CONFIG_TOSHIBA_JMR3927" = "y" ]; then define_bool CONFIG_TOSHIBA_BOARDS y - define_bool CONFIG_PCI y - define_bool CONFIG_NEW_PCI y - define_bool CONFIG_PCI_AUTO y - define_bool CONFIG_NEW_TIME_C y define_bool CONFIG_NONCOHERENT_IO y define_bool CONFIG_SWAP_IO_SPACE_W y define_bool CONFIG_SWAP_IO_SPACE_L y define_bool CONFIG_PC_KEYB y fi if [ "$CONFIG_TOSHIBA_RBTX4927" = "y" ]; then - define_bool CONFIG_NEW_TIME_C y - define_bool CONFIG_PCI y - define_bool CONFIG_NEW_PCI y - define_bool CONFIG_PCI_AUTO y define_bool CONFIG_SWAP_IO_SPACE_W y define_bool CONFIG_SWAP_IO_SPACE_L y define_bool CONFIG_ISA y @@ -692,21 +569,12 @@ fi if [ "$CONFIG_VICTOR_MPC30X" = "y" ]; then define_bool CONFIG_IRQ_CPU y - define_bool CONFIG_NEW_TIME_C y define_bool CONFIG_NONCOHERENT_IO y - define_bool CONFIG_PCI y - define_bool CONFIG_NEW_PCI y - define_bool CONFIG_PCI_AUTO y - define_bool CONFIG_DUMMY_KEYB y define_bool CONFIG_SCSI n fi if [ "$CONFIG_ZAO_CAPCELLA" = "y" ]; then define_bool CONFIG_IRQ_CPU y - define_bool CONFIG_NEW_TIME_C y define_bool CONFIG_NONCOHERENT_IO y - define_bool CONFIG_PCI y - define_bool CONFIG_NEW_PCI y - define_bool CONFIG_PCI_AUTO y define_bool CONFIG_DUMMY_KEYB y define_bool CONFIG_SCSI n fi @@ -752,12 +620,7 @@ bool ' Multi-Processing support' CONFIG_SMP fi -if [ "$CONFIG_CPU_MIPS32" = "y" ]; then - define_bool CONFIG_CPU_HAS_PREFETCH y - bool ' Support for Virtual Tagged I-cache' CONFIG_VTAG_ICACHE -fi - -if [ "$CONFIG_CPU_MIPS64" = "y" ]; then +if [ "$CONFIG_CPU_MIPS32" = "y" -o "$CONFIG_CPU_MIPS64" = "y" ]; then define_bool CONFIG_CPU_HAS_PREFETCH y bool ' Support for Virtual Tagged I-cache' CONFIG_VTAG_ICACHE fi @@ -889,6 +752,8 @@ fi fi +dep_bool 'Use 64-bit ELF format for building' CONFIG_BUILD_ELF64 $CONFIG_MIPS64 + if [ "$CONFIG_CPU_LITTLE_ENDIAN" = "n" ]; then bool 'Include IRIX binary compatibility' CONFIG_BINFMT_IRIX fi @@ -903,15 +768,51 @@ bool 'Networking support' CONFIG_NET +if [ "$CONFIG_ACER_PICA_61" = "y" -o \ + "$CONFIG_CASIO_E55" = "y" -o \ + "$CONFIG_DECSTATION" = "y" -o \ + "$CONFIG_IBM_WORKPAD" = "y" -o \ + "$CONFIG_MIPS_MAGNUM_4000" = "y" -o \ + "$CONFIG_MIPS_SEAD" = "y" -o \ + "$CONFIG_NINO" = "y" -o \ + "$CONFIG_OLIVETTI_M700" = "y" -o \ + "$CONFIG_SGI_IP22" = "y" ]; then + define_bool CONFIG_PCI n +else + bool 'PCI bus support' CONFIG_PCI + dep_bool ' New PCI bus code' CONFIG_PCI_NEW $CONFIG_PCI + if [ "$CONFIG_HP_LASERJET" = "y" -o \ + "$CONFIG_LASAT" = "y" -o \ + "$CONFIG_MIPS_ATLAS" = "y" -o \ + "$CONFIG_MIPS_COBALT" = "y" -o \ + "$CONFIG_MIPS_DB1000" = "y" -o \ + "$CONFIG_MIPS_DB1100" = "y" -o \ + "$CONFIG_MIPS_EV64120" = "y" -o \ + "$CONFIG_MIPS_HYDROGEN3" = "y" -o \ + "$CONFIG_MIPS_MALTA" = "y" -o \ + "$CONFIG_MIPS_PB1100" = "y" -o \ + "$CONFIG_MOMENCO_OCELOT" = "y" -o \ + "$CONFIG_NEC_OSPREY" = "y" -o \ + "$CONFIG_PMC_YOSEMITE" = "y" -o \ + "$CONFIG_SIBYTE_SWARM" = "y" -o \ + "$CONFIG_SNI_RM200_PCI" = "y" ]; then + define_bool CONFIG_PCI_AUTO n + else + define_bool CONFIG_PCI_AUTO y + fi +fi +if [ "$CONFIG_SIBYTE_SB1250" = "y" -o \ + "$CONFIG_SIBYTE_BCM1125H" = "y" ]; then + if [ "$CONFIG_PCI" = "y" ]; then + define_bool CONFIG_SIBYTE_HAS_LDT y + fi +fi + if [ "$CONFIG_SGI_IP22" = "y" -o "$CONFIG_MIPS_MAGNUM_4000" = "y" -o \ "$CONFIG_OLIVETTI_M700" = "y" -o "$CONFIG_SNI_RM200_PCI" = "y" ]; then bool 'EISA bus support' CONFIG_EISA fi -if [ "$CONFIG_PCI" != "y" ]; then - define_bool CONFIG_PCI n -fi - source drivers/pci/Config.in if [ "$CONFIG_EISA" = "y" -a "$CONFIG_ISA" != "y" ]; then @@ -957,6 +858,11 @@ tristate 'Kernel support for MISC binaries' CONFIG_BINFMT_MISC bool 'Select task to kill on out of memory condition' CONFIG_OOM_KILLER +bool 'Default bootloader kernel arguments' CONFIG_CMDLINE_BOOL +if [ "$CONFIG_CMDLINE_BOOL" = "y" ] ; then + string 'Initial kernel command string' CONFIG_CMDLINE "" +fi + if [ "$CONFIG_SOC_AU1X00" = "y" ]; then bool 'Power Management support' CONFIG_PM fi diff -urN linux-2.4.28-bk3/arch/mips/dec/ecc-berr.c linux-2.4.28-bk4/arch/mips/dec/ecc-berr.c --- linux-2.4.28-bk3/arch/mips/dec/ecc-berr.c 2003-08-25 04:44:39.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips/dec/ecc-berr.c 2004-11-23 02:49:27.320389066 -0800 @@ -74,7 +74,7 @@ if (!(erraddr & KN0X_EAR_VALID)) { /* No idea what happened. */ - printk(KERN_ALERT "Unindentified bus error %s.\n", kind); + printk(KERN_ALERT "Unidentified bus error %s.\n", kind); return action; } diff -urN linux-2.4.28-bk3/arch/mips/dec/prom/Makefile linux-2.4.28-bk4/arch/mips/dec/prom/Makefile --- linux-2.4.28-bk3/arch/mips/dec/prom/Makefile 2003-08-25 04:44:39.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips/dec/prom/Makefile 2004-11-23 02:49:27.320389066 -0800 @@ -12,7 +12,7 @@ L_TARGET = rexlib.a -obj-y += init.o memory.o cmdline.o identify.o +obj-y += init.o memory.o cmdline.o identify.o console.o obj-$(CONFIG_MIPS32) += locore.o obj-$(CONFIG_MIPS64) += call_o32.o diff -urN linux-2.4.28-bk3/arch/mips/dec/prom/cmdline.c linux-2.4.28-bk4/arch/mips/dec/prom/cmdline.c --- linux-2.4.28-bk3/arch/mips/dec/prom/cmdline.c 2003-08-25 04:44:39.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips/dec/prom/cmdline.c 2004-11-23 02:49:27.320389066 -0800 @@ -2,6 +2,7 @@ * cmdline.c: read the command line passed to us by the PROM. * * Copyright (C) 1998 Harald Koerfgen + * Copyright (C) 2002, 2004 Maciej W. Rozycki */ #include #include @@ -35,6 +36,6 @@ } #ifdef PROM_DEBUG - prom_printf("arcs_cmdline: %s\n", &(arcs_cmdline[0])); + printk("arcs_cmdline: %s\n", &(arcs_cmdline[0])); #endif } diff -urN linux-2.4.28-bk3/arch/mips/dec/prom/console.c linux-2.4.28-bk4/arch/mips/dec/prom/console.c --- linux-2.4.28-bk3/arch/mips/dec/prom/console.c 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/dec/prom/console.c 2004-11-23 02:49:27.321389106 -0800 @@ -0,0 +1,55 @@ +/* + * arch/mips/dec/prom/console.c + * + * DECstation PROM-based early console support. + * + * Copyright (C) 2004 Maciej W. Rozycki + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ +#include +#include +#include + +#include + +static void __init prom_console_write(struct console *con, const char *s, + unsigned int c) +{ + static char sfmt[] __initdata = "%%%us"; + char fmt[13]; + + snprintf(fmt, sizeof(fmt), sfmt, c); + prom_printf(fmt, s); +} + +static struct console promcons __initdata = { + .name = "prom", + .write = prom_console_write, + .flags = CON_PRINTBUFFER, + .index = -1, +}; + +static int promcons_output __initdata = 0; + +void __init register_prom_console(void) +{ + if (!promcons_output) { + promcons_output = 1; + register_console(&promcons); + } +} + +void __init unregister_prom_console(void) +{ + if (promcons_output) { + unregister_console(&promcons); + promcons_output = 0; + } +} + +void disable_early_printk(void) + __attribute__((alias("unregister_prom_console"))); diff -urN linux-2.4.28-bk3/arch/mips/dec/prom/identify.c linux-2.4.28-bk4/arch/mips/dec/prom/identify.c --- linux-2.4.28-bk3/arch/mips/dec/prom/identify.c 2003-08-25 04:44:39.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips/dec/prom/identify.c 2004-11-23 02:49:27.322389147 -0800 @@ -2,7 +2,7 @@ * identify.c: machine identification code. * * Copyright (C) 1998 Harald Koerfgen and Paul M. Antoine - * Copyright (C) 2002, 2003 Maciej W. Rozycki + * Copyright (C) 2002, 2003, 2004 Maciej W. Rozycki */ #include #include @@ -100,11 +100,13 @@ u32 dec_sysid; if (!prom_is_rex(magic)) { - dec_sysid = simple_strtoul(prom_getenv("systype"), (char **)0, 0); + dec_sysid = simple_strtoul(prom_getenv("systype"), + (char **)0, 0); } else { dec_sysid = rex_getsysid(); if (dec_sysid == 0) { - prom_printf("Zero sysid returned from PROMs! Assuming PMAX-like machine.\n"); + printk("Zero sysid returned from PROM! " + "Assuming a PMAX-like machine.\n"); dec_sysid = 1; } } @@ -163,10 +165,8 @@ } if (mips_machtype == MACH_DSUNKNOWN) - prom_printf("This is an %s, id is %x\n", - dec_system_strings[mips_machtype], - dec_systype); + printk("This is an %s, id is %x\n", + dec_system_strings[mips_machtype], dec_systype); else - prom_printf("This is a %s\n", - dec_system_strings[mips_machtype]); + printk("This is a %s\n", dec_system_strings[mips_machtype]); } diff -urN linux-2.4.28-bk3/arch/mips/dec/prom/init.c linux-2.4.28-bk4/arch/mips/dec/prom/init.c --- linux-2.4.28-bk3/arch/mips/dec/prom/init.c 2003-08-25 04:44:39.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips/dec/prom/init.c 2004-11-23 02:49:27.322389147 -0800 @@ -2,10 +2,11 @@ * init.c: PROM library initialisation code. * * Copyright (C) 1998 Harald Koerfgen - * Copyright (C) 2002 Maciej W. Rozycki + * Copyright (C) 2002, 2004 Maciej W. Rozycki */ #include #include +#include #include #include @@ -34,7 +35,7 @@ /* - * Detect which PROM's the DECSTATION has, and set the callback vectors + * Detect which PROM the DECSTATION has, and set the callback vectors * appropriately. */ void __init which_prom(s32 magic, s32 *prom_vec) @@ -84,9 +85,15 @@ int __init prom_init(s32 argc, s32 *argv, u32 magic, s32 *prom_vec) { extern void dec_machine_halt(void); + static char cpu_msg[] __initdata = + "Sorry, this kernel is compiled for a wrong CPU type!\n"; + static char r3k_msg[] __initdata = + "Please recompile with \"CONFIG_CPU_R3000 = y\".\n"; + static char r4k_msg[] __initdata = + "Please recompile with \"CONFIG_CPU_R4x00 = y\".\n"; /* - * Determine which PROM's we have + * Determine which PROM we have * (and therefore which machine we're on!) */ which_prom(magic, prom_vec); @@ -94,12 +101,15 @@ if (prom_is_rex(magic)) rex_clear_cache(); + /* Register the early console. */ + register_prom_console(); + /* Were we compiled with the right CPU option? */ #if defined(CONFIG_CPU_R3000) if ((current_cpu_data.cputype == CPU_R4000SC) || (current_cpu_data.cputype == CPU_R4400SC)) { - prom_printf("Sorry, this kernel is compiled for the wrong CPU type!\n"); - prom_printf("Please recompile with \"CONFIG_CPU_R4x00 = y\"\n"); + printk(cpu_msg); + printk(r4k_msg); dec_machine_halt(); } #endif @@ -107,8 +117,8 @@ #if defined(CONFIG_CPU_R4X00) if ((current_cpu_data.cputype == CPU_R3000) || (current_cpu_data.cputype == CPU_R3000A)) { - prom_printf("Sorry, this kernel is compiled for the wrong CPU type!\n"); - prom_printf("Please recompile with \"CONFIG_CPU_R3000 = y\"\n"); + printk(cpu_msg); + printk(r3k_msg); dec_machine_halt(); } #endif diff -urN linux-2.4.28-bk3/arch/mips/dec/setup.c linux-2.4.28-bk4/arch/mips/dec/setup.c --- linux-2.4.28-bk3/arch/mips/dec/setup.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/dec/setup.c 2004-11-23 02:49:27.323389188 -0800 @@ -137,9 +137,9 @@ void __init decstation_setup(void) { #ifdef CONFIG_BLK_DEV_INITRD - ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0); - initrd_start = (unsigned long)&__rd_start; - initrd_end = (unsigned long)&__rd_end; + ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0); + initrd_start = (unsigned long)&__rd_start; + initrd_end = (unsigned long)&__rd_end; #endif board_be_init = dec_be_init; board_time_init = dec_time_init; diff -urN linux-2.4.28-bk3/arch/mips/defconfig linux-2.4.28-bk4/arch/mips/defconfig --- linux-2.4.28-bk3/arch/mips/defconfig 2004-11-17 03:54:21.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/defconfig 2004-11-23 02:49:27.324389229 -0800 @@ -26,10 +26,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -52,6 +54,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -81,7 +85,6 @@ CONFIG_SWAP_IO_SPACE_L=y CONFIG_IRQ_CPU=y CONFIG_L1_CACHE_SHIFT=5 -CONFIG_NEW_TIME_C=y CONFIG_NONCOHERENT_IO=y CONFIG_PC_KEYB=y # CONFIG_MIPS_AU1000 is not set @@ -120,11 +123,12 @@ # General setup # # CONFIG_CPU_LITTLE_ENDIAN is not set +# CONFIG_BUILD_ELF64 is not set CONFIG_BINFMT_IRIX=y CONFIG_ARC_CONSOLE=y CONFIG_NET=y -# CONFIG_EISA is not set # CONFIG_PCI is not set +# CONFIG_EISA is not set # CONFIG_ISA is not set # CONFIG_TC is not set # CONFIG_MCA is not set @@ -145,6 +149,7 @@ # CONFIG_BINFMT_ELF32 is not set # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # # Memory Technology Devices (MTD) @@ -174,6 +179,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set # CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set @@ -220,7 +226,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set @@ -313,6 +318,17 @@ # CONFIG_SCSI_AM53C974 is not set # CONFIG_SCSI_MEGARAID is not set # CONFIG_SCSI_MEGARAID2 is not set +# CONFIG_SCSI_SATA is not set +# CONFIG_SCSI_SATA_SVW is not set +# CONFIG_SCSI_ATA_PIIX is not set +# CONFIG_SCSI_SATA_NV is not set +# CONFIG_SCSI_SATA_PROMISE is not set +# CONFIG_SCSI_SATA_SX4 is not set +# CONFIG_SCSI_SATA_SIL is not set +# CONFIG_SCSI_SATA_SIS is not set +# CONFIG_SCSI_SATA_ULI is not set +# CONFIG_SCSI_SATA_VIA is not set +# CONFIG_SCSI_SATA_VITESSE is not set # CONFIG_SCSI_BUSLOGIC is not set # CONFIG_SCSI_DMX3191D is not set # CONFIG_SCSI_DTC3280 is not set @@ -449,6 +465,7 @@ # CONFIG_SERIAL is not set # CONFIG_SERIAL_EXTENDED is not set # CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 @@ -511,13 +528,11 @@ # CONFIG_WDTPCI is not set # CONFIG_MACHZ_WDT is not set # CONFIG_INDYDOG is not set -# CONFIG_AMD7XX_TCO is not set # CONFIG_SCx200 is not set # CONFIG_SCx200_GPIO is not set # CONFIG_AMD_PM768 is not set # CONFIG_NVRAM is not set # CONFIG_RTC is not set -# CONFIG_MIPS_RTC is not set CONFIG_DS1286=y # CONFIG_DTLK is not set # CONFIG_R3964 is not set diff -urN linux-2.4.28-bk3/arch/mips/defconfig-atlas linux-2.4.28-bk4/arch/mips/defconfig-atlas --- linux-2.4.28-bk3/arch/mips/defconfig-atlas 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/defconfig-atlas 2004-11-23 02:49:27.325389269 -0800 @@ -24,10 +24,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -50,6 +52,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -76,9 +80,7 @@ CONFIG_MIPS_BONITO64=y CONFIG_MIPS_GT64120=y CONFIG_MIPS_MSC=y -CONFIG_NEW_TIME_C=y CONFIG_NONCOHERENT_IO=y -CONFIG_PCI=y CONFIG_SWAP_IO_SPACE_W=y CONFIG_SWAP_IO_SPACE_L=y # CONFIG_MIPS_AU1000 is not set @@ -119,8 +121,12 @@ # General setup # # CONFIG_CPU_LITTLE_ENDIAN is not set +# CONFIG_BUILD_ELF64 is not set # CONFIG_BINFMT_IRIX is not set CONFIG_NET=y +CONFIG_PCI=y +# CONFIG_PCI_NEW is not set +# CONFIG_PCI_AUTO is not set # CONFIG_PCI_NAMES is not set # CONFIG_ISA is not set # CONFIG_TC is not set @@ -142,6 +148,7 @@ # CONFIG_BINFMT_ELF32 is not set # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # # Memory Technology Devices (MTD) @@ -171,6 +178,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set CONFIG_BLK_DEV_LOOP=y # CONFIG_BLK_DEV_NBD is not set CONFIG_BLK_DEV_RAM=y @@ -218,7 +226,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set @@ -309,6 +316,17 @@ # CONFIG_SCSI_AM53C974 is not set # CONFIG_SCSI_MEGARAID is not set # CONFIG_SCSI_MEGARAID2 is not set +# CONFIG_SCSI_SATA is not set +# CONFIG_SCSI_SATA_SVW is not set +# CONFIG_SCSI_ATA_PIIX is not set +# CONFIG_SCSI_SATA_NV is not set +# CONFIG_SCSI_SATA_PROMISE is not set +# CONFIG_SCSI_SATA_SX4 is not set +# CONFIG_SCSI_SATA_SIL is not set +# CONFIG_SCSI_SATA_SIS is not set +# CONFIG_SCSI_SATA_ULI is not set +# CONFIG_SCSI_SATA_VIA is not set +# CONFIG_SCSI_SATA_VITESSE is not set # CONFIG_SCSI_BUSLOGIC is not set # CONFIG_SCSI_CPQFCTS is not set # CONFIG_SCSI_DMX3191D is not set @@ -420,6 +438,7 @@ # CONFIG_FEALNX is not set # CONFIG_NATSEMI is not set # CONFIG_NE2K_PCI is not set +# CONFIG_FORCEDETH is not set # CONFIG_NE3210 is not set # CONFIG_ES3210 is not set # CONFIG_8139CP is not set @@ -509,6 +528,7 @@ CONFIG_SERIAL_CONSOLE=y # CONFIG_SERIAL_EXTENDED is not set # CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 @@ -551,7 +571,6 @@ # CONFIG_AMD_PM768 is not set # CONFIG_NVRAM is not set # CONFIG_RTC is not set -# CONFIG_MIPS_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set diff -urN linux-2.4.28-bk3/arch/mips/defconfig-bosporus linux-2.4.28-bk4/arch/mips/defconfig-bosporus --- linux-2.4.28-bk3/arch/mips/defconfig-bosporus 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/defconfig-bosporus 2004-11-23 02:49:27.326389310 -0800 @@ -26,10 +26,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -52,6 +54,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -75,11 +79,7 @@ # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set CONFIG_SOC_AU1X00=y CONFIG_SOC_AU1500=y -CONFIG_NEW_TIME_C=y CONFIG_PC_KEYB=y -CONFIG_PCI=y -CONFIG_NEW_PCI=y -CONFIG_PCI_AUTO=y CONFIG_NONCOHERENT_IO=y # CONFIG_MIPS_AU1000 is not set @@ -119,7 +119,11 @@ # General setup # CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_BUILD_ELF64 is not set CONFIG_NET=y +CONFIG_PCI=y +CONFIG_PCI_NEW=y +CONFIG_PCI_AUTO=y CONFIG_PCI_NAMES=y # CONFIG_ISA is not set # CONFIG_TC is not set @@ -138,6 +142,10 @@ # CONFIG_HOTPLUG_PCI is not set # CONFIG_HOTPLUG_PCI_COMPAQ is not set # CONFIG_HOTPLUG_PCI_COMPAQ_NVRAM is not set +# CONFIG_HOTPLUG_PCI_SHPC is not set +# CONFIG_HOTPLUG_PCI_SHPC_POLL_EVENT_MODE is not set +# CONFIG_HOTPLUG_PCI_PCIE is not set +# CONFIG_HOTPLUG_PCI_PCIE_POLL_EVENT_MODE is not set CONFIG_SYSVIPC=y # CONFIG_BSD_PROCESS_ACCT is not set CONFIG_SYSCTL=y @@ -151,6 +159,7 @@ # CONFIG_BINFMT_ELF32 is not set # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # CONFIG_PM is not set # @@ -200,7 +209,8 @@ # CONFIG_MTD_XXS1500 is not set # CONFIG_MTD_MTX1 is not set # CONFIG_MTD_DB1X00 is not set -# CONFIG_MTD_HYDIII is not set +# CONFIG_MTD_PB1550 is not set +# CONFIG_MTD_HYDROGEN3 is not set # CONFIG_MTD_MIRAGE is not set # CONFIG_MTD_CSTM_MIPS_IXX is not set # CONFIG_MTD_OCELOT is not set @@ -252,6 +262,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set CONFIG_BLK_DEV_LOOP=y # CONFIG_BLK_DEV_NBD is not set CONFIG_BLK_DEV_RAM=y @@ -354,7 +365,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set @@ -447,6 +457,17 @@ # CONFIG_SCSI_AM53C974 is not set # CONFIG_SCSI_MEGARAID is not set # CONFIG_SCSI_MEGARAID2 is not set +# CONFIG_SCSI_SATA is not set +# CONFIG_SCSI_SATA_SVW is not set +# CONFIG_SCSI_ATA_PIIX is not set +# CONFIG_SCSI_SATA_NV is not set +# CONFIG_SCSI_SATA_PROMISE is not set +# CONFIG_SCSI_SATA_SX4 is not set +# CONFIG_SCSI_SATA_SIL is not set +# CONFIG_SCSI_SATA_SIS is not set +# CONFIG_SCSI_SATA_ULI is not set +# CONFIG_SCSI_SATA_VIA is not set +# CONFIG_SCSI_SATA_VITESSE is not set # CONFIG_SCSI_BUSLOGIC is not set # CONFIG_SCSI_CPQFCTS is not set # CONFIG_SCSI_DMX3191D is not set @@ -580,6 +601,11 @@ # CONFIG_PLX_HERMES is not set # CONFIG_TMD_HERMES is not set # CONFIG_PCI_HERMES is not set + +# +# Prism54 PCI/PCMCIA GT/Duette Driver - 802.11(a/b/g) +# +# CONFIG_PRISM54 is not set CONFIG_NET_WIRELESS=y # @@ -656,6 +682,7 @@ # CONFIG_AU1X00_USB_TTY is not set # CONFIG_AU1X00_USB_RAW is not set # CONFIG_TXX927_SERIAL is not set +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 @@ -720,7 +747,6 @@ # CONFIG_AMD_PM768 is not set # CONFIG_NVRAM is not set CONFIG_RTC=y -# CONFIG_MIPS_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set @@ -930,7 +956,6 @@ # CONFIG_USB_RTL8150 is not set # CONFIG_USB_KAWETH is not set # CONFIG_USB_CATC is not set -# CONFIG_USB_AX8817X is not set # CONFIG_USB_CDCETHER is not set # CONFIG_USB_USBNET is not set diff -urN linux-2.4.28-bk3/arch/mips/defconfig-capcella linux-2.4.28-bk4/arch/mips/defconfig-capcella --- linux-2.4.28-bk3/arch/mips/defconfig-capcella 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/defconfig-capcella 2004-11-23 02:49:27.327389351 -0800 @@ -26,10 +26,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -52,6 +54,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -74,11 +78,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set CONFIG_IRQ_CPU=y -CONFIG_NEW_TIME_C=y CONFIG_NONCOHERENT_IO=y -CONFIG_PCI=y -CONFIG_NEW_PCI=y -CONFIG_PCI_AUTO=y CONFIG_DUMMY_KEYB=y # CONFIG_SCSI is not set # CONFIG_MIPS_AU1000 is not set @@ -116,7 +116,11 @@ # General setup # CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_BUILD_ELF64 is not set CONFIG_NET=y +CONFIG_PCI=y +CONFIG_PCI_NEW=y +CONFIG_PCI_AUTO=y # CONFIG_PCI_NAMES is not set # CONFIG_ISA is not set # CONFIG_TC is not set @@ -138,6 +142,7 @@ # CONFIG_BINFMT_ELF32 is not set # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # # Memory Technology Devices (MTD) @@ -167,6 +172,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set # CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set @@ -213,7 +219,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set @@ -271,10 +276,12 @@ # # CONFIG_BLK_DEV_HD_IDE is not set # CONFIG_BLK_DEV_HD is not set +# CONFIG_BLK_DEV_IDE_SATA is not set CONFIG_BLK_DEV_IDEDISK=y # CONFIG_IDEDISK_MULTI_MODE is not set # CONFIG_IDEDISK_STROKE is not set # CONFIG_BLK_DEV_IDECS is not set +# CONFIG_BLK_DEV_DELKIN is not set # CONFIG_BLK_DEV_IDECD is not set # CONFIG_BLK_DEV_IDETAPE is not set # CONFIG_BLK_DEV_IDEFLOPPY is not set @@ -294,6 +301,7 @@ # CONFIG_BLK_DEV_ATARAID is not set # CONFIG_BLK_DEV_ATARAID_PDC is not set # CONFIG_BLK_DEV_ATARAID_HPT is not set +# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set # CONFIG_BLK_DEV_ATARAID_SII is not set # @@ -373,6 +381,7 @@ # CONFIG_FEALNX is not set # CONFIG_NATSEMI is not set # CONFIG_NE2K_PCI is not set +# CONFIG_FORCEDETH is not set # CONFIG_NE3210 is not set # CONFIG_ES3210 is not set # CONFIG_8139CP is not set @@ -463,6 +472,7 @@ CONFIG_SERIAL_CONSOLE=y # CONFIG_SERIAL_EXTENDED is not set # CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set # CONFIG_VR41XX_KIU is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 @@ -521,13 +531,11 @@ # CONFIG_WDT is not set # CONFIG_WDTPCI is not set # CONFIG_MACHZ_WDT is not set -# CONFIG_AMD7XX_TCO is not set # CONFIG_SCx200 is not set # CONFIG_SCx200_GPIO is not set # CONFIG_AMD_PM768 is not set # CONFIG_NVRAM is not set # CONFIG_RTC is not set -# CONFIG_MIPS_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set @@ -616,7 +624,7 @@ CONFIG_ROOT_NFS=y CONFIG_NFSD=y # CONFIG_NFSD_V3 is not set -# CONFIG_NFSD_TCP is not set +CONFIG_NFSD_TCP=y CONFIG_SUNRPC=y CONFIG_LOCKD=y # CONFIG_SMB_FS is not set diff -urN linux-2.4.28-bk3/arch/mips/defconfig-cobalt linux-2.4.28-bk4/arch/mips/defconfig-cobalt --- linux-2.4.28-bk3/arch/mips/defconfig-cobalt 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/defconfig-cobalt 2004-11-23 02:49:27.328389392 -0800 @@ -24,10 +24,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -50,6 +52,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -74,8 +78,6 @@ CONFIG_BOOT_ELF32=y CONFIG_COBALT_LCD=y CONFIG_I8259=y -CONFIG_PCI=y -CONFIG_NEW_TIME_C=y CONFIG_NONCOHERENT_IO=y # CONFIG_MIPS_AU1000 is not set @@ -112,7 +114,11 @@ # General setup # CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_BUILD_ELF64 is not set CONFIG_NET=y +CONFIG_PCI=y +# CONFIG_PCI_NEW is not set +# CONFIG_PCI_AUTO is not set # CONFIG_PCI_NAMES is not set # CONFIG_ISA is not set # CONFIG_TC is not set @@ -134,6 +140,7 @@ # CONFIG_BINFMT_ELF32 is not set # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # # Memory Technology Devices (MTD) @@ -163,6 +170,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set CONFIG_BLK_DEV_LOOP=y # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set @@ -205,7 +213,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set @@ -263,10 +270,12 @@ # # CONFIG_BLK_DEV_HD_IDE is not set # CONFIG_BLK_DEV_HD is not set +# CONFIG_BLK_DEV_IDE_SATA is not set CONFIG_BLK_DEV_IDEDISK=y # CONFIG_IDEDISK_MULTI_MODE is not set # CONFIG_IDEDISK_STROKE is not set # CONFIG_BLK_DEV_IDECS is not set +# CONFIG_BLK_DEV_DELKIN is not set # CONFIG_BLK_DEV_IDECD is not set # CONFIG_BLK_DEV_IDETAPE is not set # CONFIG_BLK_DEV_IDEFLOPPY is not set @@ -295,6 +304,7 @@ # CONFIG_WDC_ALI15X3 is not set # CONFIG_BLK_DEV_AMD74XX is not set # CONFIG_AMD74XX_OVERRIDE is not set +# CONFIG_BLK_DEV_ATIIXP is not set # CONFIG_BLK_DEV_CMD64X is not set # CONFIG_BLK_DEV_TRIFLEX is not set # CONFIG_BLK_DEV_CY82C693 is not set @@ -323,6 +333,7 @@ # CONFIG_BLK_DEV_ATARAID is not set # CONFIG_BLK_DEV_ATARAID_PDC is not set # CONFIG_BLK_DEV_ATARAID_HPT is not set +# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set # CONFIG_BLK_DEV_ATARAID_SII is not set # @@ -404,6 +415,7 @@ # CONFIG_FEALNX is not set # CONFIG_NATSEMI is not set # CONFIG_NE2K_PCI is not set +# CONFIG_FORCEDETH is not set # CONFIG_NE3210 is not set # CONFIG_ES3210 is not set # CONFIG_8139CP is not set @@ -493,6 +505,7 @@ CONFIG_SERIAL_CONSOLE=y # CONFIG_SERIAL_EXTENDED is not set # CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=16 @@ -535,7 +548,6 @@ # CONFIG_AMD_PM768 is not set # CONFIG_NVRAM is not set CONFIG_RTC=y -# CONFIG_MIPS_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set diff -urN linux-2.4.28-bk3/arch/mips/defconfig-csb250 linux-2.4.28-bk4/arch/mips/defconfig-csb250 --- linux-2.4.28-bk3/arch/mips/defconfig-csb250 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/defconfig-csb250 2004-11-23 02:49:27.329389432 -0800 @@ -26,10 +26,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set CONFIG_COGENT_CSB250=y @@ -52,6 +54,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -75,10 +79,6 @@ # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set CONFIG_SOC_AU1X00=y CONFIG_SOC_AU1500=y -CONFIG_NEW_TIME_C=y -CONFIG_PCI=y -CONFIG_NEW_PCI=y -CONFIG_PCI_AUTO=y CONFIG_NONCOHERENT_IO=y CONFIG_PC_KEYB=y # CONFIG_MIPS_AU1000 is not set @@ -119,8 +119,12 @@ # General setup # # CONFIG_CPU_LITTLE_ENDIAN is not set +# CONFIG_BUILD_ELF64 is not set # CONFIG_BINFMT_IRIX is not set CONFIG_NET=y +CONFIG_PCI=y +CONFIG_PCI_NEW=y +CONFIG_PCI_AUTO=y # CONFIG_PCI_NAMES is not set # CONFIG_ISA is not set # CONFIG_TC is not set @@ -137,9 +141,6 @@ # CONFIG_I82092 is not set # CONFIG_I82365 is not set CONFIG_PCMCIA_AU1X00=m -# CONFIG_PCMCIA_PB1X00 is not set -CONFIG_PCMCIA_DB1X00=y -# CONFIG_PCMCIA_XXS1500 is not set # # PCI Hotplug Support @@ -147,6 +148,10 @@ # CONFIG_HOTPLUG_PCI is not set # CONFIG_HOTPLUG_PCI_COMPAQ is not set # CONFIG_HOTPLUG_PCI_COMPAQ_NVRAM is not set +# CONFIG_HOTPLUG_PCI_SHPC is not set +# CONFIG_HOTPLUG_PCI_SHPC_POLL_EVENT_MODE is not set +# CONFIG_HOTPLUG_PCI_PCIE is not set +# CONFIG_HOTPLUG_PCI_PCIE_POLL_EVENT_MODE is not set CONFIG_SYSVIPC=y # CONFIG_BSD_PROCESS_ACCT is not set CONFIG_SYSCTL=y @@ -160,6 +165,7 @@ # CONFIG_BINFMT_ELF32 is not set # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # CONFIG_PM is not set # @@ -190,6 +196,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set CONFIG_BLK_DEV_LOOP=y # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set @@ -252,7 +259,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set @@ -310,10 +316,12 @@ # # CONFIG_BLK_DEV_HD_IDE is not set # CONFIG_BLK_DEV_HD is not set +# CONFIG_BLK_DEV_IDE_SATA is not set CONFIG_BLK_DEV_IDEDISK=y # CONFIG_IDEDISK_MULTI_MODE is not set # CONFIG_IDEDISK_STROKE is not set CONFIG_BLK_DEV_IDECS=m +# CONFIG_BLK_DEV_DELKIN is not set # CONFIG_BLK_DEV_IDECD is not set # CONFIG_BLK_DEV_IDETAPE is not set # CONFIG_BLK_DEV_IDEFLOPPY is not set @@ -342,6 +350,7 @@ # CONFIG_WDC_ALI15X3 is not set # CONFIG_BLK_DEV_AMD74XX is not set # CONFIG_AMD74XX_OVERRIDE is not set +# CONFIG_BLK_DEV_ATIIXP is not set # CONFIG_BLK_DEV_CMD64X is not set # CONFIG_BLK_DEV_TRIFLEX is not set # CONFIG_BLK_DEV_CY82C693 is not set @@ -370,6 +379,7 @@ # CONFIG_BLK_DEV_ATARAID is not set # CONFIG_BLK_DEV_ATARAID_PDC is not set # CONFIG_BLK_DEV_ATARAID_HPT is not set +# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set # CONFIG_BLK_DEV_ATARAID_SII is not set # @@ -546,6 +556,7 @@ # CONFIG_AU1X00_USB_TTY is not set # CONFIG_AU1X00_USB_RAW is not set # CONFIG_TXX927_SERIAL is not set +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 @@ -610,7 +621,6 @@ # CONFIG_AMD_PM768 is not set # CONFIG_NVRAM is not set # CONFIG_RTC is not set -# CONFIG_MIPS_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set @@ -844,7 +854,6 @@ # CONFIG_USB_RTL8150 is not set # CONFIG_USB_KAWETH is not set # CONFIG_USB_CATC is not set -# CONFIG_USB_AX8817X is not set # CONFIG_USB_CDCETHER is not set # CONFIG_USB_USBNET is not set diff -urN linux-2.4.28-bk3/arch/mips/defconfig-db1000 linux-2.4.28-bk4/arch/mips/defconfig-db1000 --- linux-2.4.28-bk3/arch/mips/defconfig-db1000 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/defconfig-db1000 2004-11-23 02:49:27.330389473 -0800 @@ -26,10 +26,12 @@ CONFIG_MIPS_DB1000=y # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -52,6 +54,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -75,10 +79,6 @@ # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set CONFIG_SOC_AU1X00=y CONFIG_SOC_AU1000=y -CONFIG_NEW_TIME_C=y -CONFIG_PCI=y -CONFIG_NEW_PCI=y -# CONFIG_PCI_AUTO is not set CONFIG_NONCOHERENT_IO=y CONFIG_PC_KEYB=y CONFIG_SWAP_IO_SPACE=y @@ -120,7 +120,11 @@ # General setup # CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_BUILD_ELF64 is not set CONFIG_NET=y +CONFIG_PCI=y +CONFIG_PCI_NEW=y +# CONFIG_PCI_AUTO is not set CONFIG_PCI_NAMES=y # CONFIG_ISA is not set # CONFIG_TC is not set @@ -137,9 +141,6 @@ # CONFIG_I82092 is not set # CONFIG_I82365 is not set CONFIG_PCMCIA_AU1X00=m -# CONFIG_PCMCIA_PB1X00 is not set -CONFIG_PCMCIA_DB1X00=y -# CONFIG_PCMCIA_XXS1500 is not set # # PCI Hotplug Support @@ -147,6 +148,10 @@ # CONFIG_HOTPLUG_PCI is not set # CONFIG_HOTPLUG_PCI_COMPAQ is not set # CONFIG_HOTPLUG_PCI_COMPAQ_NVRAM is not set +# CONFIG_HOTPLUG_PCI_SHPC is not set +# CONFIG_HOTPLUG_PCI_SHPC_POLL_EVENT_MODE is not set +# CONFIG_HOTPLUG_PCI_PCIE is not set +# CONFIG_HOTPLUG_PCI_PCIE_POLL_EVENT_MODE is not set CONFIG_SYSVIPC=y # CONFIG_BSD_PROCESS_ACCT is not set CONFIG_SYSCTL=y @@ -160,6 +165,7 @@ # CONFIG_BINFMT_ELF32 is not set # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # CONFIG_PM is not set # @@ -211,7 +217,8 @@ CONFIG_MTD_DB1X00=y CONFIG_MTD_DB1X00_BOOT=y CONFIG_MTD_DB1X00_USER=y -# CONFIG_MTD_HYDIII is not set +# CONFIG_MTD_PB1550 is not set +# CONFIG_MTD_HYDROGEN3 is not set # CONFIG_MTD_MIRAGE is not set # CONFIG_MTD_CSTM_MIPS_IXX is not set # CONFIG_MTD_OCELOT is not set @@ -263,6 +270,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set CONFIG_BLK_DEV_LOOP=y # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set @@ -325,7 +333,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set @@ -383,10 +390,12 @@ # # CONFIG_BLK_DEV_HD_IDE is not set # CONFIG_BLK_DEV_HD is not set +# CONFIG_BLK_DEV_IDE_SATA is not set CONFIG_BLK_DEV_IDEDISK=y # CONFIG_IDEDISK_MULTI_MODE is not set # CONFIG_IDEDISK_STROKE is not set CONFIG_BLK_DEV_IDECS=m +# CONFIG_BLK_DEV_DELKIN is not set # CONFIG_BLK_DEV_IDECD is not set # CONFIG_BLK_DEV_IDETAPE is not set # CONFIG_BLK_DEV_IDEFLOPPY is not set @@ -406,6 +415,7 @@ # CONFIG_BLK_DEV_ATARAID is not set # CONFIG_BLK_DEV_ATARAID_PDC is not set # CONFIG_BLK_DEV_ATARAID_HPT is not set +# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set # CONFIG_BLK_DEV_ATARAID_SII is not set # @@ -626,6 +636,7 @@ # CONFIG_AU1X00_USB_TTY is not set # CONFIG_AU1X00_USB_RAW is not set # CONFIG_TXX927_SERIAL is not set +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 @@ -690,7 +701,6 @@ # CONFIG_AMD_PM768 is not set # CONFIG_NVRAM is not set # CONFIG_RTC is not set -# CONFIG_MIPS_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set @@ -890,6 +900,8 @@ # CONFIG_SOUND_RME96XX is not set # CONFIG_SOUND_SONICVIBES is not set CONFIG_SOUND_AU1X00=y +# CONFIG_SOUND_AU1550_PSC is not set +# CONFIG_SOUND_AU1550_I2S is not set # CONFIG_SOUND_TRIDENT is not set # CONFIG_SOUND_MSNDCLAS is not set # CONFIG_SOUND_MSNDPIN is not set @@ -979,7 +991,6 @@ # CONFIG_USB_RTL8150 is not set # CONFIG_USB_KAWETH is not set # CONFIG_USB_CATC is not set -# CONFIG_USB_AX8817X is not set # CONFIG_USB_CDCETHER is not set # CONFIG_USB_USBNET is not set diff -urN linux-2.4.28-bk3/arch/mips/defconfig-db1100 linux-2.4.28-bk4/arch/mips/defconfig-db1100 --- linux-2.4.28-bk3/arch/mips/defconfig-db1100 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/defconfig-db1100 2004-11-23 02:49:27.331389514 -0800 @@ -26,10 +26,12 @@ # CONFIG_MIPS_DB1000 is not set CONFIG_MIPS_DB1100=y # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -52,6 +54,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -75,9 +79,6 @@ # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set CONFIG_SOC_AU1X00=y CONFIG_SOC_AU1100=y -CONFIG_NEW_TIME_C=y -CONFIG_PCI=y -CONFIG_NEW_PCI=y CONFIG_NONCOHERENT_IO=y CONFIG_PC_KEYB=y CONFIG_SWAP_IO_SPACE=y @@ -119,7 +120,11 @@ # General setup # CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_BUILD_ELF64 is not set CONFIG_NET=y +CONFIG_PCI=y +CONFIG_PCI_NEW=y +# CONFIG_PCI_AUTO is not set # CONFIG_PCI_NAMES is not set # CONFIG_ISA is not set # CONFIG_TC is not set @@ -136,9 +141,6 @@ # CONFIG_I82092 is not set # CONFIG_I82365 is not set CONFIG_PCMCIA_AU1X00=m -# CONFIG_PCMCIA_PB1X00 is not set -CONFIG_PCMCIA_DB1X00=y -# CONFIG_PCMCIA_XXS1500 is not set # # PCI Hotplug Support @@ -146,6 +148,10 @@ # CONFIG_HOTPLUG_PCI is not set # CONFIG_HOTPLUG_PCI_COMPAQ is not set # CONFIG_HOTPLUG_PCI_COMPAQ_NVRAM is not set +# CONFIG_HOTPLUG_PCI_SHPC is not set +# CONFIG_HOTPLUG_PCI_SHPC_POLL_EVENT_MODE is not set +# CONFIG_HOTPLUG_PCI_PCIE is not set +# CONFIG_HOTPLUG_PCI_PCIE_POLL_EVENT_MODE is not set CONFIG_SYSVIPC=y # CONFIG_BSD_PROCESS_ACCT is not set CONFIG_SYSCTL=y @@ -159,6 +165,7 @@ # CONFIG_BINFMT_ELF32 is not set # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # CONFIG_PM is not set # @@ -210,7 +217,8 @@ CONFIG_MTD_DB1X00=y # CONFIG_MTD_DB1X00_BOOT is not set CONFIG_MTD_DB1X00_USER=y -# CONFIG_MTD_HYDIII is not set +# CONFIG_MTD_PB1550 is not set +# CONFIG_MTD_HYDROGEN3 is not set # CONFIG_MTD_MIRAGE is not set # CONFIG_MTD_CSTM_MIPS_IXX is not set # CONFIG_MTD_OCELOT is not set @@ -262,6 +270,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set CONFIG_BLK_DEV_LOOP=y # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set @@ -324,7 +333,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set @@ -382,10 +390,12 @@ # # CONFIG_BLK_DEV_HD_IDE is not set # CONFIG_BLK_DEV_HD is not set +# CONFIG_BLK_DEV_IDE_SATA is not set CONFIG_BLK_DEV_IDEDISK=y # CONFIG_IDEDISK_MULTI_MODE is not set # CONFIG_IDEDISK_STROKE is not set CONFIG_BLK_DEV_IDECS=m +# CONFIG_BLK_DEV_DELKIN is not set # CONFIG_BLK_DEV_IDECD is not set # CONFIG_BLK_DEV_IDETAPE is not set # CONFIG_BLK_DEV_IDEFLOPPY is not set @@ -405,6 +415,7 @@ # CONFIG_BLK_DEV_ATARAID is not set # CONFIG_BLK_DEV_ATARAID_PDC is not set # CONFIG_BLK_DEV_ATARAID_HPT is not set +# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set # CONFIG_BLK_DEV_ATARAID_SII is not set # @@ -625,6 +636,7 @@ # CONFIG_AU1X00_USB_TTY is not set # CONFIG_AU1X00_USB_RAW is not set # CONFIG_TXX927_SERIAL is not set +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 @@ -689,7 +701,6 @@ # CONFIG_AMD_PM768 is not set # CONFIG_NVRAM is not set # CONFIG_RTC is not set -# CONFIG_MIPS_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set @@ -930,6 +941,8 @@ # CONFIG_SOUND_RME96XX is not set # CONFIG_SOUND_SONICVIBES is not set CONFIG_SOUND_AU1X00=y +# CONFIG_SOUND_AU1550_PSC is not set +# CONFIG_SOUND_AU1550_I2S is not set # CONFIG_SOUND_TRIDENT is not set # CONFIG_SOUND_MSNDCLAS is not set # CONFIG_SOUND_MSNDPIN is not set @@ -1019,7 +1032,6 @@ # CONFIG_USB_RTL8150 is not set # CONFIG_USB_KAWETH is not set # CONFIG_USB_CATC is not set -# CONFIG_USB_AX8817X is not set # CONFIG_USB_CDCETHER is not set # CONFIG_USB_USBNET is not set diff -urN linux-2.4.28-bk3/arch/mips/defconfig-db1500 linux-2.4.28-bk4/arch/mips/defconfig-db1500 --- linux-2.4.28-bk3/arch/mips/defconfig-db1500 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/defconfig-db1500 2004-11-23 02:49:27.333389595 -0800 @@ -26,10 +26,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set CONFIG_MIPS_DB1500=y +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -52,6 +54,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -75,10 +79,6 @@ # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set CONFIG_SOC_AU1X00=y CONFIG_SOC_AU1500=y -CONFIG_NEW_TIME_C=y -CONFIG_PCI=y -CONFIG_NEW_PCI=y -CONFIG_PCI_AUTO=y CONFIG_NONCOHERENT_IO=y CONFIG_PC_KEYB=y # CONFIG_MIPS_AU1000 is not set @@ -119,7 +119,11 @@ # General setup # CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_BUILD_ELF64 is not set CONFIG_NET=y +CONFIG_PCI=y +CONFIG_PCI_NEW=y +CONFIG_PCI_AUTO=y # CONFIG_PCI_NAMES is not set # CONFIG_ISA is not set # CONFIG_TC is not set @@ -136,9 +140,6 @@ # CONFIG_I82092 is not set # CONFIG_I82365 is not set CONFIG_PCMCIA_AU1X00=m -# CONFIG_PCMCIA_PB1X00 is not set -CONFIG_PCMCIA_DB1X00=y -# CONFIG_PCMCIA_XXS1500 is not set # # PCI Hotplug Support @@ -146,6 +147,10 @@ # CONFIG_HOTPLUG_PCI is not set # CONFIG_HOTPLUG_PCI_COMPAQ is not set # CONFIG_HOTPLUG_PCI_COMPAQ_NVRAM is not set +# CONFIG_HOTPLUG_PCI_SHPC is not set +# CONFIG_HOTPLUG_PCI_SHPC_POLL_EVENT_MODE is not set +# CONFIG_HOTPLUG_PCI_PCIE is not set +# CONFIG_HOTPLUG_PCI_PCIE_POLL_EVENT_MODE is not set CONFIG_SYSVIPC=y # CONFIG_BSD_PROCESS_ACCT is not set CONFIG_SYSCTL=y @@ -159,6 +164,7 @@ # CONFIG_BINFMT_ELF32 is not set # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # CONFIG_PM is not set # @@ -189,6 +195,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set CONFIG_BLK_DEV_LOOP=y # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set @@ -251,7 +258,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set @@ -309,10 +315,12 @@ # # CONFIG_BLK_DEV_HD_IDE is not set # CONFIG_BLK_DEV_HD is not set +# CONFIG_BLK_DEV_IDE_SATA is not set CONFIG_BLK_DEV_IDEDISK=y # CONFIG_IDEDISK_MULTI_MODE is not set # CONFIG_IDEDISK_STROKE is not set CONFIG_BLK_DEV_IDECS=m +# CONFIG_BLK_DEV_DELKIN is not set # CONFIG_BLK_DEV_IDECD is not set # CONFIG_BLK_DEV_IDETAPE is not set # CONFIG_BLK_DEV_IDEFLOPPY is not set @@ -341,6 +349,7 @@ # CONFIG_WDC_ALI15X3 is not set # CONFIG_BLK_DEV_AMD74XX is not set # CONFIG_AMD74XX_OVERRIDE is not set +# CONFIG_BLK_DEV_ATIIXP is not set # CONFIG_BLK_DEV_CMD64X is not set # CONFIG_BLK_DEV_TRIFLEX is not set # CONFIG_BLK_DEV_CY82C693 is not set @@ -369,6 +378,7 @@ # CONFIG_BLK_DEV_ATARAID is not set # CONFIG_BLK_DEV_ATARAID_PDC is not set # CONFIG_BLK_DEV_ATARAID_HPT is not set +# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set # CONFIG_BLK_DEV_ATARAID_SII is not set # @@ -545,6 +555,7 @@ # CONFIG_AU1X00_USB_TTY is not set # CONFIG_AU1X00_USB_RAW is not set # CONFIG_TXX927_SERIAL is not set +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 @@ -609,7 +620,6 @@ # CONFIG_AMD_PM768 is not set # CONFIG_NVRAM is not set # CONFIG_RTC is not set -# CONFIG_MIPS_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set @@ -766,6 +776,8 @@ # CONFIG_SOUND_RME96XX is not set # CONFIG_SOUND_SONICVIBES is not set CONFIG_SOUND_AU1X00=y +# CONFIG_SOUND_AU1550_PSC is not set +# CONFIG_SOUND_AU1550_I2S is not set # CONFIG_SOUND_TRIDENT is not set # CONFIG_SOUND_MSNDCLAS is not set # CONFIG_SOUND_MSNDPIN is not set @@ -855,7 +867,6 @@ # CONFIG_USB_RTL8150 is not set # CONFIG_USB_KAWETH is not set # CONFIG_USB_CATC is not set -# CONFIG_USB_AX8817X is not set # CONFIG_USB_CDCETHER is not set # CONFIG_USB_USBNET is not set diff -urN linux-2.4.28-bk3/arch/mips/defconfig-db1550 linux-2.4.28-bk4/arch/mips/defconfig-db1550 --- linux-2.4.28-bk3/arch/mips/defconfig-db1550 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/defconfig-db1550 2004-11-23 02:49:27.334389636 -0800 @@ -0,0 +1,1087 @@ +# +# Automatically generated make config: don't edit +# +CONFIG_MIPS=y +CONFIG_MIPS32=y +# CONFIG_MIPS64 is not set + +# +# Code maturity level options +# +CONFIG_EXPERIMENTAL=y + +# +# Loadable module support +# +CONFIG_MODULES=y +# CONFIG_MODVERSIONS is not set +CONFIG_KMOD=y + +# +# Machine selection +# +# CONFIG_ACER_PICA_61 is not set +# CONFIG_MIPS_BOSPORUS is not set +# CONFIG_MIPS_MIRAGE is not set +# CONFIG_MIPS_DB1000 is not set +# CONFIG_MIPS_DB1100 is not set +# CONFIG_MIPS_DB1500 is not set +CONFIG_MIPS_DB1550=y +# CONFIG_MIPS_PB1000 is not set +# CONFIG_MIPS_PB1100 is not set +# CONFIG_MIPS_PB1500 is not set +# CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set +# CONFIG_MIPS_XXS1500 is not set +# CONFIG_MIPS_MTX1 is not set +# CONFIG_COGENT_CSB250 is not set +# CONFIG_BAGET_MIPS is not set +# CONFIG_CASIO_E55 is not set +# CONFIG_MIPS_COBALT is not set +# CONFIG_DECSTATION is not set +# CONFIG_MIPS_EV64120 is not set +# CONFIG_MIPS_EV96100 is not set +# CONFIG_MIPS_IVR is not set +# CONFIG_HP_LASERJET is not set +# CONFIG_IBM_WORKPAD is not set +# CONFIG_LASAT is not set +# CONFIG_MIPS_ITE8172 is not set +# CONFIG_MIPS_ATLAS is not set +# CONFIG_MIPS_MAGNUM_4000 is not set +# CONFIG_MIPS_MALTA is not set +# CONFIG_MIPS_SEAD is not set +# CONFIG_MOMENCO_OCELOT is not set +# CONFIG_MOMENCO_OCELOT_G is not set +# CONFIG_MOMENCO_OCELOT_C is not set +# CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set +# CONFIG_PMC_YOSEMITE is not set +# CONFIG_DDB5074 is not set +# CONFIG_DDB5476 is not set +# CONFIG_DDB5477 is not set +# CONFIG_NEC_OSPREY is not set +# CONFIG_NEC_EAGLE is not set +# CONFIG_OLIVETTI_M700 is not set +# CONFIG_NINO is not set +# CONFIG_SGI_IP22 is not set +# CONFIG_SGI_IP27 is not set +# CONFIG_SIBYTE_SB1xxx_SOC is not set +# CONFIG_SNI_RM200_PCI is not set +# CONFIG_TANBAC_TB0226 is not set +# CONFIG_TANBAC_TB0229 is not set +# CONFIG_TOSHIBA_JMR3927 is not set +# CONFIG_TOSHIBA_RBTX4927 is not set +# CONFIG_VICTOR_MPC30X is not set +# CONFIG_ZAO_CAPCELLA is not set +# CONFIG_HIGHMEM is not set +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set +CONFIG_SOC_AU1X00=y +CONFIG_SOC_AU1550=y +CONFIG_NONCOHERENT_IO=y +CONFIG_PC_KEYB=y +# CONFIG_MIPS_AU1000 is not set + +# +# CPU selection +# +CONFIG_CPU_MIPS32=y +# CONFIG_CPU_MIPS64 is not set +# CONFIG_CPU_R3000 is not set +# CONFIG_CPU_TX39XX is not set +# CONFIG_CPU_VR41XX is not set +# CONFIG_CPU_R4300 is not set +# CONFIG_CPU_R4X00 is not set +# CONFIG_CPU_TX49XX is not set +# CONFIG_CPU_R5000 is not set +# CONFIG_CPU_R5432 is not set +# CONFIG_CPU_R6000 is not set +# CONFIG_CPU_NEVADA is not set +# CONFIG_CPU_R8000 is not set +# CONFIG_CPU_R10000 is not set +# CONFIG_CPU_RM7000 is not set +# CONFIG_CPU_RM9000 is not set +# CONFIG_CPU_SB1 is not set +CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_16KB is not set +# CONFIG_PAGE_SIZE_64KB is not set +CONFIG_CPU_HAS_PREFETCH=y +# CONFIG_VTAG_ICACHE is not set +CONFIG_64BIT_PHYS_ADDR=y +# CONFIG_CPU_ADVANCED is not set +CONFIG_CPU_HAS_LLSC=y +# CONFIG_CPU_HAS_LLDSCD is not set +# CONFIG_CPU_HAS_WB is not set +CONFIG_CPU_HAS_SYNC=y + +# +# General setup +# +CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_BUILD_ELF64 is not set +CONFIG_NET=y +CONFIG_PCI=y +CONFIG_PCI_NEW=y +CONFIG_PCI_AUTO=y +# CONFIG_PCI_NAMES is not set +# CONFIG_ISA is not set +# CONFIG_TC is not set +# CONFIG_MCA is not set +# CONFIG_SBUS is not set +CONFIG_HOTPLUG=y + +# +# PCMCIA/CardBus support +# +CONFIG_PCMCIA=m +# CONFIG_CARDBUS is not set +# CONFIG_TCIC is not set +# CONFIG_I82092 is not set +# CONFIG_I82365 is not set +CONFIG_PCMCIA_AU1X00=m + +# +# PCI Hotplug Support +# +# CONFIG_HOTPLUG_PCI is not set +# CONFIG_HOTPLUG_PCI_COMPAQ is not set +# CONFIG_HOTPLUG_PCI_COMPAQ_NVRAM is not set +# CONFIG_HOTPLUG_PCI_SHPC is not set +# CONFIG_HOTPLUG_PCI_SHPC_POLL_EVENT_MODE is not set +# CONFIG_HOTPLUG_PCI_PCIE is not set +# CONFIG_HOTPLUG_PCI_PCIE_POLL_EVENT_MODE is not set +CONFIG_SYSVIPC=y +# CONFIG_BSD_PROCESS_ACCT is not set +CONFIG_SYSCTL=y +CONFIG_KCORE_ELF=y +# CONFIG_KCORE_AOUT is not set +# CONFIG_BINFMT_AOUT is not set +CONFIG_BINFMT_ELF=y +# CONFIG_MIPS32_COMPAT is not set +# CONFIG_MIPS32_O32 is not set +# CONFIG_MIPS32_N32 is not set +# CONFIG_BINFMT_ELF32 is not set +# CONFIG_BINFMT_MISC is not set +# CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set +# CONFIG_PM is not set + +# +# Memory Technology Devices (MTD) +# +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_CONCAT is not set +# CONFIG_MTD_REDBOOT_PARTS is not set +# CONFIG_MTD_CMDLINE_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +# CONFIG_MTD_CFI_ADV_OPTIONS is not set +CONFIG_MTD_CFI_INTELEXT=y +CONFIG_MTD_CFI_AMDSTD=y +# CONFIG_MTD_CFI_STAA is not set +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# CONFIG_MTD_OBSOLETE_CHIPS is not set +# CONFIG_MTD_AMDSTD is not set +# CONFIG_MTD_SHARP is not set +# CONFIG_MTD_JEDEC is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_PHYSMAP is not set +# CONFIG_MTD_PB1000 is not set +# CONFIG_MTD_PB1500 is not set +# CONFIG_MTD_PB1100 is not set +# CONFIG_MTD_BOSPORUS is not set +# CONFIG_MTD_XXS1500 is not set +# CONFIG_MTD_MTX1 is not set +# CONFIG_MTD_DB1X00 is not set +CONFIG_MTD_PB1550=y +CONFIG_MTD_PB1550_BOOT=y +CONFIG_MTD_PB1550_USER=y +# CONFIG_MTD_HYDROGEN3 is not set +# CONFIG_MTD_MIRAGE is not set +# CONFIG_MTD_CSTM_MIPS_IXX is not set +# CONFIG_MTD_OCELOT is not set +# CONFIG_MTD_LASAT is not set +# CONFIG_MTD_PCI is not set +# CONFIG_MTD_PCMCIA is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLKMTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC1000 is not set +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOCPROBE is not set + +# +# NAND Flash Device Drivers +# +CONFIG_MTD_NAND=m +# CONFIG_MTD_NAND_VERIFY_WRITE is not set +CONFIG_MTD_NAND_IDS=m + +# +# Parallel port support +# +# CONFIG_PARPORT is not set + +# +# Plug and Play configuration +# +# CONFIG_PNP is not set +# CONFIG_ISAPNP is not set + +# +# Block devices +# +# CONFIG_BLK_DEV_FD is not set +# CONFIG_BLK_DEV_XD is not set +# CONFIG_PARIDE is not set +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_CISS_SCSI_TAPE is not set +# CONFIG_CISS_MONITOR_THREAD is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_RAM is not set +# CONFIG_BLK_DEV_INITRD is not set +# CONFIG_BLK_STATS is not set + +# +# Multi-device support (RAID and LVM) +# +# CONFIG_MD is not set +# CONFIG_BLK_DEV_MD is not set +# CONFIG_MD_LINEAR is not set +# CONFIG_MD_RAID0 is not set +# CONFIG_MD_RAID1 is not set +# CONFIG_MD_RAID5 is not set +# CONFIG_MD_MULTIPATH is not set +# CONFIG_BLK_DEV_LVM is not set + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +# CONFIG_NETLINK_DEV is not set +CONFIG_NETFILTER=y +# CONFIG_NETFILTER_DEBUG is not set +CONFIG_FILTER=y +CONFIG_UNIX=y +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_PNP=y +# CONFIG_IP_PNP_DHCP is not set +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_IP_MROUTE is not set +# CONFIG_ARPD is not set +# CONFIG_INET_ECN is not set +# CONFIG_SYN_COOKIES is not set + +# +# IP: Netfilter Configuration +# +# CONFIG_IP_NF_CONNTRACK is not set +# CONFIG_IP_NF_QUEUE is not set +# CONFIG_IP_NF_IPTABLES is not set +# CONFIG_IP_NF_ARPTABLES is not set +# CONFIG_IP_NF_COMPAT_IPCHAINS is not set +# CONFIG_IP_NF_COMPAT_IPFWADM is not set + +# +# IP: Virtual Server Configuration +# +# CONFIG_IP_VS is not set +# CONFIG_IPV6 is not set +# CONFIG_KHTTPD is not set + +# +# SCTP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_SCTP is not set +# CONFIG_ATM is not set +# CONFIG_VLAN_8021Q is not set + +# +# +# +# CONFIG_IPX is not set +# CONFIG_ATALK is not set + +# +# Appletalk devices +# +# CONFIG_DEV_APPLETALK is not set +# CONFIG_DECNET is not set +# CONFIG_BRIDGE is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_LLC is not set +# CONFIG_NET_DIVERT is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_FASTROUTE is not set +# CONFIG_NET_HW_FLOWCONTROL is not set + +# +# QoS and/or fair queueing +# +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set + +# +# Telephony Support +# +# CONFIG_PHONE is not set +# CONFIG_PHONE_IXJ is not set +# CONFIG_PHONE_IXJ_PCMCIA is not set + +# +# ATA/IDE/MFM/RLL support +# +CONFIG_IDE=y + +# +# IDE, ATA and ATAPI Block devices +# +CONFIG_BLK_DEV_IDE=y + +# +# Please see Documentation/ide.txt for help/info on IDE drives +# +# CONFIG_BLK_DEV_HD_IDE is not set +# CONFIG_BLK_DEV_HD is not set +# CONFIG_BLK_DEV_IDE_SATA is not set +CONFIG_BLK_DEV_IDEDISK=y +# CONFIG_IDEDISK_MULTI_MODE is not set +# CONFIG_IDEDISK_STROKE is not set +# CONFIG_BLK_DEV_IDECS is not set +# CONFIG_BLK_DEV_DELKIN is not set +# CONFIG_BLK_DEV_IDECD is not set +# CONFIG_BLK_DEV_IDETAPE is not set +# CONFIG_BLK_DEV_IDEFLOPPY is not set +# CONFIG_BLK_DEV_IDESCSI is not set +# CONFIG_IDE_TASK_IOCTL is not set + +# +# IDE chipset support/bugfixes +# +# CONFIG_BLK_DEV_CMD640 is not set +# CONFIG_BLK_DEV_CMD640_ENHANCED is not set +# CONFIG_BLK_DEV_ISAPNP is not set +CONFIG_BLK_DEV_IDEPCI=y +CONFIG_BLK_DEV_GENERIC=y +CONFIG_IDEPCI_SHARE_IRQ=y +CONFIG_BLK_DEV_IDEDMA_PCI=y +# CONFIG_BLK_DEV_OFFBOARD is not set +# CONFIG_BLK_DEV_IDEDMA_FORCED is not set +# CONFIG_IDEDMA_PCI_AUTO is not set +# CONFIG_IDEDMA_ONLYDISK is not set +CONFIG_BLK_DEV_IDEDMA=y +# CONFIG_IDEDMA_PCI_WIP is not set +# CONFIG_BLK_DEV_ADMA100 is not set +# CONFIG_BLK_DEV_AEC62XX is not set +# CONFIG_BLK_DEV_ALI15X3 is not set +# CONFIG_WDC_ALI15X3 is not set +# CONFIG_BLK_DEV_AMD74XX is not set +# CONFIG_AMD74XX_OVERRIDE is not set +# CONFIG_BLK_DEV_ATIIXP is not set +# CONFIG_BLK_DEV_CMD64X is not set +# CONFIG_BLK_DEV_TRIFLEX is not set +# CONFIG_BLK_DEV_CY82C693 is not set +# CONFIG_BLK_DEV_CS5530 is not set +# CONFIG_BLK_DEV_HPT34X is not set +# CONFIG_HPT34X_AUTODMA is not set +# CONFIG_BLK_DEV_HPT366 is not set +# CONFIG_BLK_DEV_PIIX is not set +# CONFIG_BLK_DEV_NS87415 is not set +# CONFIG_BLK_DEV_OPTI621 is not set +CONFIG_BLK_DEV_PDC202XX_OLD=y +CONFIG_PDC202XX_BURST=y +CONFIG_BLK_DEV_PDC202XX_NEW=y +# CONFIG_PDC202XX_FORCE is not set +# CONFIG_BLK_DEV_RZ1000 is not set +# CONFIG_BLK_DEV_SC1200 is not set +# CONFIG_BLK_DEV_SVWKS is not set +# CONFIG_BLK_DEV_SIIMAGE is not set +# CONFIG_BLK_DEV_SIS5513 is not set +# CONFIG_BLK_DEV_SLC90E66 is not set +# CONFIG_BLK_DEV_TRM290 is not set +# CONFIG_BLK_DEV_VIA82CXXX is not set +# CONFIG_IDE_CHIPSETS is not set +# CONFIG_IDEDMA_AUTO is not set +# CONFIG_IDEDMA_IVB is not set +# CONFIG_DMA_NONPCI is not set +CONFIG_BLK_DEV_PDC202XX=y +# CONFIG_BLK_DEV_ATARAID is not set +# CONFIG_BLK_DEV_ATARAID_PDC is not set +# CONFIG_BLK_DEV_ATARAID_HPT is not set +# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set +# CONFIG_BLK_DEV_ATARAID_SII is not set + +# +# SCSI support +# +# CONFIG_SCSI is not set + +# +# Fusion MPT device support +# +# CONFIG_FUSION is not set +# CONFIG_FUSION_BOOT is not set +# CONFIG_FUSION_ISENSE is not set +# CONFIG_FUSION_CTL is not set +# CONFIG_FUSION_LAN is not set + +# +# IEEE 1394 (FireWire) support (EXPERIMENTAL) +# +# CONFIG_IEEE1394 is not set + +# +# I2O device support +# +# CONFIG_I2O is not set +# CONFIG_I2O_PCI is not set +# CONFIG_I2O_BLOCK is not set +# CONFIG_I2O_LAN is not set +# CONFIG_I2O_SCSI is not set +# CONFIG_I2O_PROC is not set + +# +# Network device support +# +CONFIG_NETDEVICES=y + +# +# ARCnet devices +# +# CONFIG_ARCNET is not set +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_ETHERTAP is not set + +# +# Ethernet (10 or 100Mbit) +# +CONFIG_NET_ETHERNET=y +CONFIG_MIPS_AU1X00_ENET=y +# CONFIG_BCM5222_DUAL_PHY is not set +# CONFIG_SUNLANCE is not set +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNBMAC is not set +# CONFIG_SUNQE is not set +# CONFIG_SUNGEM is not set +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_LANCE is not set +# CONFIG_NET_VENDOR_SMC is not set +# CONFIG_NET_VENDOR_RACAL is not set +# CONFIG_HP100 is not set +# CONFIG_NET_ISA is not set +# CONFIG_NET_PCI is not set +# CONFIG_NET_POCKET is not set + +# +# Ethernet (1000 Mbit) +# +# CONFIG_ACENIC is not set +# CONFIG_DL2K is not set +# CONFIG_E1000 is not set +# CONFIG_MYRI_SBUS is not set +# CONFIG_NS83820 is not set +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +# CONFIG_R8169 is not set +# CONFIG_SK98LIN is not set +# CONFIG_TIGON3 is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_PLIP is not set +CONFIG_PPP=m +CONFIG_PPP_MULTILINK=y +# CONFIG_PPP_FILTER is not set +CONFIG_PPP_ASYNC=m +# CONFIG_PPP_SYNC_TTY is not set +CONFIG_PPP_DEFLATE=m +# CONFIG_PPP_BSDCOMP is not set +CONFIG_PPPOE=m +# CONFIG_SLIP is not set + +# +# Wireless LAN (non-hamradio) +# +# CONFIG_NET_RADIO is not set + +# +# Token Ring devices +# +# CONFIG_TR is not set +# CONFIG_NET_FC is not set +# CONFIG_RCPCI is not set +# CONFIG_SHAPER is not set + +# +# Wan interfaces +# +# CONFIG_WAN is not set + +# +# PCMCIA network device support +# +# CONFIG_NET_PCMCIA is not set + +# +# Amateur Radio support +# +# CONFIG_HAMRADIO is not set + +# +# IrDA (infrared) support +# +# CONFIG_IRDA is not set + +# +# ISDN subsystem +# +# CONFIG_ISDN is not set + +# +# Input core support +# +CONFIG_INPUT=y +CONFIG_INPUT_KEYBDEV=y +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_UINPUT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +# CONFIG_SERIAL is not set +# CONFIG_SERIAL_EXTENDED is not set +CONFIG_SERIAL_NONSTANDARD=y +# CONFIG_COMPUTONE is not set +# CONFIG_ROCKETPORT is not set +# CONFIG_CYCLADES is not set +# CONFIG_DIGIEPCA is not set +# CONFIG_DIGI is not set +# CONFIG_ESPSERIAL is not set +# CONFIG_MOXA_INTELLIO is not set +# CONFIG_MOXA_SMARTIO is not set +# CONFIG_ISI is not set +# CONFIG_SYNCLINK is not set +# CONFIG_SYNCLINKMP is not set +# CONFIG_N_HDLC is not set +# CONFIG_RISCOM8 is not set +# CONFIG_SPECIALIX is not set +# CONFIG_SX is not set +# CONFIG_RIO is not set +# CONFIG_STALDRV is not set +# CONFIG_SERIAL_TX3912 is not set +# CONFIG_SERIAL_TX3912_CONSOLE is not set +# CONFIG_SERIAL_TXX9 is not set +# CONFIG_SERIAL_TXX9_CONSOLE is not set +CONFIG_AU1X00_UART=y +CONFIG_AU1X00_SERIAL_CONSOLE=y +# CONFIG_AU1X00_USB_TTY is not set +# CONFIG_AU1X00_USB_RAW is not set +# CONFIG_TXX927_SERIAL is not set +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set +CONFIG_UNIX98_PTYS=y +CONFIG_UNIX98_PTY_COUNT=256 + +# +# I2C support +# +# CONFIG_I2C is not set + +# +# Mice +# +# CONFIG_BUSMOUSE is not set +# CONFIG_MOUSE is not set + +# +# Joysticks +# +# CONFIG_INPUT_GAMEPORT is not set +# CONFIG_INPUT_NS558 is not set +# CONFIG_INPUT_LIGHTNING is not set +# CONFIG_INPUT_PCIGAME is not set +# CONFIG_INPUT_CS461X is not set +# CONFIG_INPUT_EMU10K1 is not set +# CONFIG_INPUT_SERIO is not set +# CONFIG_INPUT_SERPORT is not set + +# +# Joysticks +# +# CONFIG_INPUT_ANALOG is not set +# CONFIG_INPUT_A3D is not set +# CONFIG_INPUT_ADI is not set +# CONFIG_INPUT_COBRA is not set +# CONFIG_INPUT_GF2K is not set +# CONFIG_INPUT_GRIP is not set +# CONFIG_INPUT_INTERACT is not set +# CONFIG_INPUT_TMDC is not set +# CONFIG_INPUT_SIDEWINDER is not set +# CONFIG_INPUT_IFORCE_USB is not set +# CONFIG_INPUT_IFORCE_232 is not set +# CONFIG_INPUT_WARRIOR is not set +# CONFIG_INPUT_MAGELLAN is not set +# CONFIG_INPUT_SPACEORB is not set +# CONFIG_INPUT_SPACEBALL is not set +# CONFIG_INPUT_STINGER is not set +# CONFIG_INPUT_DB9 is not set +# CONFIG_INPUT_GAMECON is not set +# CONFIG_INPUT_TURBOGRAFX is not set +# CONFIG_QIC02_TAPE is not set +# CONFIG_IPMI_HANDLER is not set +# CONFIG_IPMI_PANIC_EVENT is not set +# CONFIG_IPMI_DEVICE_INTERFACE is not set +# CONFIG_IPMI_KCS is not set +# CONFIG_IPMI_WATCHDOG is not set + +# +# Watchdog Cards +# +# CONFIG_WATCHDOG is not set +# CONFIG_SCx200 is not set +# CONFIG_SCx200_GPIO is not set +# CONFIG_AMD_PM768 is not set +# CONFIG_NVRAM is not set +# CONFIG_RTC is not set +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set + +# +# Ftape, the floppy tape device driver +# +# CONFIG_FTAPE is not set +# CONFIG_AGP is not set + +# +# Direct Rendering Manager (XFree86 DRI support) +# +# CONFIG_DRM is not set + +# +# PCMCIA character devices +# +# CONFIG_PCMCIA_SERIAL_CS is not set +# CONFIG_SYNCLINK_CS is not set +# CONFIG_AU1X00_GPIO is not set +# CONFIG_TS_AU1X00_ADS7846 is not set + +# +# File systems +# +# CONFIG_QUOTA is not set +# CONFIG_QFMT_V2 is not set +CONFIG_AUTOFS_FS=y +# CONFIG_AUTOFS4_FS is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_REISERFS_CHECK is not set +# CONFIG_REISERFS_PROC_INFO is not set +# CONFIG_ADFS_FS is not set +# CONFIG_ADFS_FS_RW is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BEFS_DEBUG is not set +# CONFIG_BFS_FS is not set +# CONFIG_EXT3_FS is not set +# CONFIG_JBD is not set +# CONFIG_JBD_DEBUG is not set +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +# CONFIG_UMSDOS_FS is not set +CONFIG_VFAT_FS=y +# CONFIG_EFS_FS is not set +# CONFIG_JFFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +# CONFIG_CRAMFS is not set +CONFIG_TMPFS=y +CONFIG_RAMFS=y +# CONFIG_ISO9660_FS is not set +# CONFIG_JOLIET is not set +# CONFIG_ZISOFS is not set +# CONFIG_JFS_FS is not set +# CONFIG_JFS_DEBUG is not set +# CONFIG_JFS_STATISTICS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_NTFS_FS is not set +# CONFIG_NTFS_RW is not set +# CONFIG_HPFS_FS is not set +CONFIG_PROC_FS=y +# CONFIG_DEVFS_FS is not set +# CONFIG_DEVFS_MOUNT is not set +# CONFIG_DEVFS_DEBUG is not set +CONFIG_DEVPTS_FS=y +# CONFIG_QNX4FS_FS is not set +# CONFIG_QNX4FS_RW is not set +# CONFIG_ROMFS_FS is not set +CONFIG_EXT2_FS=y +# CONFIG_SYSV_FS is not set +# CONFIG_UDF_FS is not set +# CONFIG_UDF_RW is not set +# CONFIG_UFS_FS is not set +# CONFIG_UFS_FS_WRITE is not set +# CONFIG_XFS_FS is not set +# CONFIG_XFS_QUOTA is not set +# CONFIG_XFS_RT is not set +# CONFIG_XFS_TRACE is not set +# CONFIG_XFS_DEBUG is not set + +# +# Network File Systems +# +# CONFIG_CODA_FS is not set +# CONFIG_INTERMEZZO_FS is not set +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_DIRECTIO is not set +CONFIG_ROOT_NFS=y +# CONFIG_NFSD is not set +# CONFIG_NFSD_V3 is not set +# CONFIG_NFSD_TCP is not set +CONFIG_SUNRPC=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +# CONFIG_SMB_FS is not set +# CONFIG_NCP_FS is not set +# CONFIG_NCPFS_PACKET_SIGNING is not set +# CONFIG_NCPFS_IOCTL_LOCKING is not set +# CONFIG_NCPFS_STRONG is not set +# CONFIG_NCPFS_NFS_NS is not set +# CONFIG_NCPFS_OS2_NS is not set +# CONFIG_NCPFS_SMALLDOS is not set +# CONFIG_NCPFS_NLS is not set +# CONFIG_NCPFS_EXTRAS is not set +# CONFIG_ZISOFS_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_SMB_NLS is not set +CONFIG_NLS=y + +# +# Native Language Support +# +CONFIG_NLS_DEFAULT="iso8859-1" +# CONFIG_NLS_CODEPAGE_437 is not set +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ISO8859_1 is not set +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set + +# +# Console drivers +# +# CONFIG_VGA_CONSOLE is not set +# CONFIG_MDA_CONSOLE is not set + +# +# Frame-buffer support +# +CONFIG_FB=y +CONFIG_DUMMY_CONSOLE=y +# CONFIG_FB_RIVA is not set +# CONFIG_FB_CLGEN is not set +# CONFIG_FB_PM2 is not set +# CONFIG_FB_PM3 is not set +# CONFIG_FB_CYBER2000 is not set +# CONFIG_FB_MATROX is not set +# CONFIG_FB_ATY is not set +# CONFIG_FB_RADEON is not set +# CONFIG_FB_ATY128 is not set +# CONFIG_FB_INTEL is not set +# CONFIG_FB_SIS is not set +# CONFIG_FB_NEOMAGIC is not set +# CONFIG_FB_3DFX is not set +# CONFIG_FB_VOODOO1 is not set +# CONFIG_FB_TRIDENT is not set +# CONFIG_FB_E1356 is not set +# CONFIG_FB_IT8181 is not set +# CONFIG_FB_VIRTUAL is not set +CONFIG_FBCON_ADVANCED=y +# CONFIG_FBCON_MFB is not set +# CONFIG_FBCON_CFB2 is not set +# CONFIG_FBCON_CFB4 is not set +CONFIG_FBCON_CFB8=y +CONFIG_FBCON_CFB16=y +# CONFIG_FBCON_CFB24 is not set +# CONFIG_FBCON_CFB32 is not set +# CONFIG_FBCON_AFB is not set +# CONFIG_FBCON_ILBM is not set +# CONFIG_FBCON_IPLAN2P2 is not set +# CONFIG_FBCON_IPLAN2P4 is not set +# CONFIG_FBCON_IPLAN2P8 is not set +# CONFIG_FBCON_MAC is not set +# CONFIG_FBCON_VGA_PLANES is not set +# CONFIG_FBCON_VGA is not set +# CONFIG_FBCON_HGA is not set +# CONFIG_FBCON_FONTWIDTH8_ONLY is not set +# CONFIG_FBCON_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y + +# +# Sound +# +CONFIG_SOUND=y +# CONFIG_SOUND_ALI5455 is not set +# CONFIG_SOUND_BT878 is not set +# CONFIG_SOUND_CMPCI is not set +# CONFIG_SOUND_EMU10K1 is not set +# CONFIG_MIDI_EMU10K1 is not set +# CONFIG_SOUND_FUSION is not set +# CONFIG_SOUND_CS4281 is not set +# CONFIG_SOUND_ES1370 is not set +# CONFIG_SOUND_ES1371 is not set +# CONFIG_SOUND_ESSSOLO1 is not set +# CONFIG_SOUND_MAESTRO is not set +# CONFIG_SOUND_MAESTRO3 is not set +# CONFIG_SOUND_FORTE is not set +# CONFIG_SOUND_ICH is not set +# CONFIG_SOUND_RME96XX is not set +# CONFIG_SOUND_SONICVIBES is not set +# CONFIG_SOUND_AU1X00 is not set +CONFIG_SOUND_AU1550_PSC=y +# CONFIG_SOUND_AU1550_I2S is not set +# CONFIG_SOUND_TRIDENT is not set +# CONFIG_SOUND_MSNDCLAS is not set +# CONFIG_SOUND_MSNDPIN is not set +# CONFIG_SOUND_VIA82CXXX is not set +# CONFIG_MIDI_VIA82CXXX is not set +# CONFIG_SOUND_OSS is not set +# CONFIG_SOUND_TVMIXER is not set +# CONFIG_SOUND_AD1980 is not set +# CONFIG_SOUND_WM97XX is not set + +# +# USB support +# +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set + +# +# Miscellaneous USB options +# +# CONFIG_USB_DEVICEFS is not set +# CONFIG_USB_BANDWIDTH is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_EHCI_HCD is not set +# CONFIG_USB_UHCI is not set +# CONFIG_USB_UHCI_ALT is not set +CONFIG_USB_OHCI=y + +# +# USB Device Class drivers +# +# CONFIG_USB_AUDIO is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_BLUETOOTH is not set +# CONFIG_USB_MIDI is not set + +# +# SCSI support is needed for USB Storage +# +# CONFIG_USB_STORAGE is not set +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_DPCM is not set +# CONFIG_USB_STORAGE_HP8200e is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set + +# +# USB Human Interface Devices (HID) +# +CONFIG_USB_HID=y +CONFIG_USB_HIDINPUT=y +# CONFIG_USB_HIDDEV is not set +# CONFIG_USB_AIPTEK is not set +# CONFIG_USB_WACOM is not set +# CONFIG_USB_KBTAB is not set +# CONFIG_USB_POWERMATE is not set + +# +# USB Imaging devices +# +# CONFIG_USB_DC2XX is not set +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_SCANNER is not set +# CONFIG_USB_MICROTEK is not set +# CONFIG_USB_HPUSBSCSI is not set + +# +# USB Multimedia devices +# + +# +# Video4Linux support is needed for USB Multimedia device support +# + +# +# USB Network adaptors +# +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_CATC is not set +# CONFIG_USB_CDCETHER is not set +# CONFIG_USB_USBNET is not set + +# +# USB port drivers +# +# CONFIG_USB_USS720 is not set + +# +# USB Serial Converter support +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_AUERSWALD is not set +# CONFIG_USB_TIGL is not set +# CONFIG_USB_BRLVGER is not set +# CONFIG_USB_LCD is not set + +# +# Support for USB gadgets +# +# CONFIG_USB_GADGET is not set + +# +# Bluetooth support +# +# CONFIG_BLUEZ is not set + +# +# Kernel hacking +# +CONFIG_CROSSCOMPILE=y +# CONFIG_RUNTIME_DEBUG is not set +# CONFIG_KGDB is not set +# CONFIG_GDB_CONSOLE is not set +# CONFIG_DEBUG_INFO is not set +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_MIPS_UNCACHED is not set +CONFIG_LOG_BUF_SHIFT=0 + +# +# Cryptographic options +# +# CONFIG_CRYPTO is not set + +# +# Library routines +# +# CONFIG_CRC32 is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +# CONFIG_FW_LOADER is not set diff -urN linux-2.4.28-bk3/arch/mips/defconfig-ddb5476 linux-2.4.28-bk4/arch/mips/defconfig-ddb5476 --- linux-2.4.28-bk3/arch/mips/defconfig-ddb5476 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/defconfig-ddb5476 2004-11-23 02:49:27.336389718 -0800 @@ -24,10 +24,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -50,6 +52,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set CONFIG_DDB5476=y @@ -72,14 +76,10 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set CONFIG_ISA=y -CONFIG_PCI=y CONFIG_PC_KEYB=y CONFIG_IRQ_CPU=y CONFIG_I8259=y CONFIG_HAVE_STD_PC_SERIAL_PORT=y -CONFIG_NEW_PCI=y -CONFIG_PCI_AUTO=y -CONFIG_NEW_TIME_C=y CONFIG_NONCOHERENT_IO=y # CONFIG_MIPS_AU1000 is not set @@ -116,7 +116,11 @@ # General setup # CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_BUILD_ELF64 is not set CONFIG_NET=y +CONFIG_PCI=y +CONFIG_PCI_NEW=y +CONFIG_PCI_AUTO=y # CONFIG_PCI_NAMES is not set # CONFIG_TC is not set # CONFIG_MCA is not set @@ -137,6 +141,7 @@ # CONFIG_BINFMT_ELF32 is not set # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # # Memory Technology Devices (MTD) @@ -166,6 +171,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set # CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set @@ -211,7 +217,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set @@ -269,10 +274,12 @@ # # CONFIG_BLK_DEV_HD_IDE is not set # CONFIG_BLK_DEV_HD is not set +# CONFIG_BLK_DEV_IDE_SATA is not set CONFIG_BLK_DEV_IDEDISK=y # CONFIG_IDEDISK_MULTI_MODE is not set # CONFIG_IDEDISK_STROKE is not set # CONFIG_BLK_DEV_IDECS is not set +# CONFIG_BLK_DEV_DELKIN is not set # CONFIG_BLK_DEV_IDECD is not set # CONFIG_BLK_DEV_IDETAPE is not set # CONFIG_BLK_DEV_IDEFLOPPY is not set @@ -301,6 +308,7 @@ # CONFIG_WDC_ALI15X3 is not set # CONFIG_BLK_DEV_AMD74XX is not set # CONFIG_AMD74XX_OVERRIDE is not set +# CONFIG_BLK_DEV_ATIIXP is not set # CONFIG_BLK_DEV_CMD64X is not set # CONFIG_BLK_DEV_TRIFLEX is not set # CONFIG_BLK_DEV_CY82C693 is not set @@ -328,6 +336,7 @@ # CONFIG_BLK_DEV_ATARAID is not set # CONFIG_BLK_DEV_ATARAID_PDC is not set # CONFIG_BLK_DEV_ATARAID_HPT is not set +# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set # CONFIG_BLK_DEV_ATARAID_SII is not set # @@ -412,6 +421,7 @@ # CONFIG_FEALNX is not set # CONFIG_NATSEMI is not set CONFIG_NE2K_PCI=y +# CONFIG_FORCEDETH is not set # CONFIG_NE3210 is not set # CONFIG_ES3210 is not set # CONFIG_8139CP is not set @@ -507,6 +517,7 @@ CONFIG_SERIAL_CONSOLE=y # CONFIG_SERIAL_EXTENDED is not set # CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 @@ -553,7 +564,6 @@ # CONFIG_AMD_PM768 is not set # CONFIG_NVRAM is not set # CONFIG_RTC is not set -# CONFIG_MIPS_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set diff -urN linux-2.4.28-bk3/arch/mips/defconfig-ddb5477 linux-2.4.28-bk4/arch/mips/defconfig-ddb5477 --- linux-2.4.28-bk3/arch/mips/defconfig-ddb5477 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/defconfig-ddb5477 2004-11-23 02:49:27.336389718 -0800 @@ -24,10 +24,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -50,6 +52,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -72,12 +76,8 @@ # CONFIG_HIGHMEM is not set CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set -CONFIG_PCI=y -CONFIG_NEW_TIME_C=y CONFIG_IRQ_CPU=y -CONFIG_NEW_PCI=y CONFIG_NONCOHERENT_IO=y -CONFIG_PCI_AUTO=y CONFIG_PC_KEYB=y CONFIG_I8259=y # CONFIG_MIPS_AU1000 is not set @@ -115,7 +115,11 @@ # General setup # CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_BUILD_ELF64 is not set CONFIG_NET=y +CONFIG_PCI=y +CONFIG_PCI_NEW=y +CONFIG_PCI_AUTO=y # CONFIG_PCI_NAMES is not set # CONFIG_ISA is not set # CONFIG_TC is not set @@ -137,6 +141,7 @@ # CONFIG_BINFMT_ELF32 is not set # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # # Memory Technology Devices (MTD) @@ -166,6 +171,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set # CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set @@ -211,7 +217,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set @@ -339,6 +344,7 @@ # CONFIG_FEALNX is not set # CONFIG_NATSEMI is not set # CONFIG_NE2K_PCI is not set +# CONFIG_FORCEDETH is not set # CONFIG_NE3210 is not set # CONFIG_ES3210 is not set # CONFIG_8139CP is not set @@ -428,6 +434,7 @@ CONFIG_SERIAL_CONSOLE=y # CONFIG_SERIAL_EXTENDED is not set # CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 @@ -470,7 +477,6 @@ # CONFIG_AMD_PM768 is not set # CONFIG_NVRAM is not set # CONFIG_RTC is not set -# CONFIG_MIPS_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set @@ -559,7 +565,7 @@ CONFIG_ROOT_NFS=y CONFIG_NFSD=y # CONFIG_NFSD_V3 is not set -# CONFIG_NFSD_TCP is not set +CONFIG_NFSD_TCP=y CONFIG_SUNRPC=y CONFIG_LOCKD=y # CONFIG_SMB_FS is not set diff -urN linux-2.4.28-bk3/arch/mips/defconfig-decstation linux-2.4.28-bk4/arch/mips/defconfig-decstation --- linux-2.4.28-bk3/arch/mips/defconfig-decstation 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/defconfig-decstation 2004-11-23 02:49:27.337389758 -0800 @@ -26,10 +26,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -52,6 +54,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -73,10 +77,10 @@ # CONFIG_HIGHMEM is not set CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set +CONFIG_EARLY_PRINTK=y CONFIG_BOOT_ELF32=y CONFIG_IRQ_CPU=y CONFIG_L1_CACHE_SHIFT=4 -CONFIG_NEW_TIME_C=y CONFIG_NONCOHERENT_IO=y # CONFIG_MIPS_AU1000 is not set @@ -111,6 +115,7 @@ # General setup # CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_BUILD_ELF64 is not set CONFIG_NET=y # CONFIG_PCI is not set # CONFIG_ISA is not set @@ -133,6 +138,7 @@ # CONFIG_BINFMT_ELF32 is not set # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # # Memory Technology Devices (MTD) @@ -162,6 +168,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set # CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set @@ -207,7 +214,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set @@ -299,6 +305,17 @@ # CONFIG_SCSI_AM53C974 is not set # CONFIG_SCSI_MEGARAID is not set # CONFIG_SCSI_MEGARAID2 is not set +# CONFIG_SCSI_SATA is not set +# CONFIG_SCSI_SATA_SVW is not set +# CONFIG_SCSI_ATA_PIIX is not set +# CONFIG_SCSI_SATA_NV is not set +# CONFIG_SCSI_SATA_PROMISE is not set +# CONFIG_SCSI_SATA_SX4 is not set +# CONFIG_SCSI_SATA_SIL is not set +# CONFIG_SCSI_SATA_SIS is not set +# CONFIG_SCSI_SATA_ULI is not set +# CONFIG_SCSI_SATA_VIA is not set +# CONFIG_SCSI_SATA_VITESSE is not set # CONFIG_SCSI_BUSLOGIC is not set # CONFIG_SCSI_DMX3191D is not set # CONFIG_SCSI_DTC3280 is not set @@ -460,6 +477,7 @@ CONFIG_SERIAL_DEC_CONSOLE=y CONFIG_DZ=y CONFIG_ZS=y +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 @@ -502,7 +520,6 @@ # CONFIG_AMD_PM768 is not set # CONFIG_NVRAM is not set # CONFIG_RTC is not set -# CONFIG_MIPS_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set diff -urN linux-2.4.28-bk3/arch/mips/defconfig-e55 linux-2.4.28-bk4/arch/mips/defconfig-e55 --- linux-2.4.28-bk3/arch/mips/defconfig-e55 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/defconfig-e55 2004-11-23 02:49:27.338389799 -0800 @@ -26,10 +26,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -52,6 +54,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -74,7 +78,6 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set CONFIG_IRQ_CPU=y -CONFIG_NEW_TIME_C=y CONFIG_NONCOHERENT_IO=y CONFIG_ISA=y CONFIG_DUMMY_KEYB=y @@ -114,6 +117,7 @@ # General setup # CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_BUILD_ELF64 is not set CONFIG_NET=y # CONFIG_PCI is not set # CONFIG_TC is not set @@ -135,6 +139,7 @@ # CONFIG_BINFMT_ELF32 is not set # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # # Memory Technology Devices (MTD) @@ -164,6 +169,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set # CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set @@ -207,7 +213,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set @@ -265,10 +270,12 @@ # # CONFIG_BLK_DEV_HD_IDE is not set # CONFIG_BLK_DEV_HD is not set +# CONFIG_BLK_DEV_IDE_SATA is not set CONFIG_BLK_DEV_IDEDISK=y # CONFIG_IDEDISK_MULTI_MODE is not set # CONFIG_IDEDISK_STROKE is not set # CONFIG_BLK_DEV_IDECS is not set +# CONFIG_BLK_DEV_DELKIN is not set # CONFIG_BLK_DEV_IDECD is not set # CONFIG_BLK_DEV_IDETAPE is not set # CONFIG_BLK_DEV_IDEFLOPPY is not set @@ -287,6 +294,7 @@ # CONFIG_BLK_DEV_ATARAID is not set # CONFIG_BLK_DEV_ATARAID_PDC is not set # CONFIG_BLK_DEV_ATARAID_HPT is not set +# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set # CONFIG_BLK_DEV_ATARAID_SII is not set # @@ -418,6 +426,7 @@ # CONFIG_SERIAL_MULTIPORT is not set # CONFIG_HUB6 is not set # CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set # CONFIG_VR41XX_KIU is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 @@ -476,13 +485,11 @@ # CONFIG_WDT is not set # CONFIG_WDTPCI is not set # CONFIG_MACHZ_WDT is not set -# CONFIG_AMD7XX_TCO is not set # CONFIG_SCx200 is not set # CONFIG_SCx200_GPIO is not set # CONFIG_AMD_PM768 is not set # CONFIG_NVRAM is not set # CONFIG_RTC is not set -# CONFIG_MIPS_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set @@ -571,7 +578,7 @@ # CONFIG_ROOT_NFS is not set CONFIG_NFSD=y # CONFIG_NFSD_V3 is not set -# CONFIG_NFSD_TCP is not set +CONFIG_NFSD_TCP=y CONFIG_SUNRPC=y CONFIG_LOCKD=y # CONFIG_SMB_FS is not set diff -urN linux-2.4.28-bk3/arch/mips/defconfig-eagle linux-2.4.28-bk4/arch/mips/defconfig-eagle --- linux-2.4.28-bk3/arch/mips/defconfig-eagle 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/defconfig-eagle 2004-11-23 02:49:27.339389840 -0800 @@ -26,10 +26,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -52,6 +54,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -75,11 +79,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set CONFIG_IRQ_CPU=y -CONFIG_NEW_TIME_C=y CONFIG_NONCOHERENT_IO=y -CONFIG_PCI=y -CONFIG_NEW_PCI=y -CONFIG_PCI_AUTO=y CONFIG_DUMMY_KEYB=y # CONFIG_SCSI is not set # CONFIG_MIPS_AU1000 is not set @@ -117,7 +117,11 @@ # General setup # CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_BUILD_ELF64 is not set CONFIG_NET=y +CONFIG_PCI=y +CONFIG_PCI_NEW=y +CONFIG_PCI_AUTO=y # CONFIG_PCI_NAMES is not set # CONFIG_ISA is not set # CONFIG_TC is not set @@ -141,6 +145,10 @@ # CONFIG_HOTPLUG_PCI is not set # CONFIG_HOTPLUG_PCI_COMPAQ is not set # CONFIG_HOTPLUG_PCI_COMPAQ_NVRAM is not set +# CONFIG_HOTPLUG_PCI_SHPC is not set +# CONFIG_HOTPLUG_PCI_SHPC_POLL_EVENT_MODE is not set +# CONFIG_HOTPLUG_PCI_PCIE is not set +# CONFIG_HOTPLUG_PCI_PCIE_POLL_EVENT_MODE is not set CONFIG_SYSVIPC=y # CONFIG_BSD_PROCESS_ACCT is not set CONFIG_SYSCTL=y @@ -154,6 +162,7 @@ # CONFIG_BINFMT_ELF32 is not set # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # # Memory Technology Devices (MTD) @@ -209,7 +218,8 @@ # CONFIG_MTD_XXS1500 is not set # CONFIG_MTD_MTX1 is not set # CONFIG_MTD_DB1X00 is not set -# CONFIG_MTD_HYDIII is not set +# CONFIG_MTD_PB1550 is not set +# CONFIG_MTD_HYDROGEN3 is not set # CONFIG_MTD_MIRAGE is not set # CONFIG_MTD_CSTM_MIPS_IXX is not set # CONFIG_MTD_OCELOT is not set @@ -261,6 +271,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set # CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set @@ -307,7 +318,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set @@ -365,10 +375,12 @@ # # CONFIG_BLK_DEV_HD_IDE is not set # CONFIG_BLK_DEV_HD is not set +# CONFIG_BLK_DEV_IDE_SATA is not set CONFIG_BLK_DEV_IDEDISK=y CONFIG_IDEDISK_MULTI_MODE=y # CONFIG_IDEDISK_STROKE is not set CONFIG_BLK_DEV_IDECS=y +# CONFIG_BLK_DEV_DELKIN is not set # CONFIG_BLK_DEV_IDECD is not set # CONFIG_BLK_DEV_IDETAPE is not set # CONFIG_BLK_DEV_IDEFLOPPY is not set @@ -388,6 +400,7 @@ # CONFIG_BLK_DEV_ATARAID is not set # CONFIG_BLK_DEV_ATARAID_PDC is not set # CONFIG_BLK_DEV_ATARAID_HPT is not set +# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set # CONFIG_BLK_DEV_ATARAID_SII is not set # @@ -467,6 +480,7 @@ # CONFIG_FEALNX is not set # CONFIG_NATSEMI is not set # CONFIG_NE2K_PCI is not set +# CONFIG_FORCEDETH is not set # CONFIG_NE3210 is not set # CONFIG_ES3210 is not set # CONFIG_8139CP is not set @@ -573,6 +587,7 @@ CONFIG_SERIAL_CONSOLE=y # CONFIG_SERIAL_EXTENDED is not set # CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set # CONFIG_VR41XX_KIU is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 @@ -635,13 +650,11 @@ # CONFIG_WDT is not set # CONFIG_WDTPCI is not set # CONFIG_MACHZ_WDT is not set -# CONFIG_AMD7XX_TCO is not set # CONFIG_SCx200 is not set # CONFIG_SCx200_GPIO is not set # CONFIG_AMD_PM768 is not set # CONFIG_NVRAM is not set # CONFIG_RTC is not set -# CONFIG_MIPS_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set @@ -739,7 +752,7 @@ CONFIG_ROOT_NFS=y CONFIG_NFSD=y # CONFIG_NFSD_V3 is not set -# CONFIG_NFSD_TCP is not set +CONFIG_NFSD_TCP=y CONFIG_SUNRPC=y CONFIG_LOCKD=y # CONFIG_SMB_FS is not set @@ -882,7 +895,6 @@ CONFIG_USB_RTL8150=y # CONFIG_USB_KAWETH is not set # CONFIG_USB_CATC is not set -# CONFIG_USB_AX8817X is not set # CONFIG_USB_CDCETHER is not set # CONFIG_USB_USBNET is not set diff -urN linux-2.4.28-bk3/arch/mips/defconfig-ev64120 linux-2.4.28-bk4/arch/mips/defconfig-ev64120 --- linux-2.4.28-bk3/arch/mips/defconfig-ev64120 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/defconfig-ev64120 2004-11-23 02:49:27.340389881 -0800 @@ -26,10 +26,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -56,6 +58,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -77,10 +81,8 @@ # CONFIG_HIGHMEM is not set CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set -CONFIG_PCI=y CONFIG_MIPS_GT64120=y CONFIG_NONCOHERENT_IO=y -CONFIG_OLD_TIME_C=y # CONFIG_MIPS_AU1000 is not set # @@ -117,8 +119,12 @@ # General setup # # CONFIG_CPU_LITTLE_ENDIAN is not set +# CONFIG_BUILD_ELF64 is not set # CONFIG_BINFMT_IRIX is not set CONFIG_NET=y +CONFIG_PCI=y +# CONFIG_PCI_NEW is not set +# CONFIG_PCI_AUTO is not set # CONFIG_PCI_NAMES is not set # CONFIG_ISA is not set # CONFIG_TC is not set @@ -140,6 +146,7 @@ # CONFIG_BINFMT_ELF32 is not set # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # # Memory Technology Devices (MTD) @@ -169,6 +176,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set # CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set @@ -213,7 +221,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set @@ -339,6 +346,7 @@ # CONFIG_FEALNX is not set # CONFIG_NATSEMI is not set CONFIG_NE2K_PCI=y +# CONFIG_FORCEDETH is not set # CONFIG_NE3210 is not set # CONFIG_ES3210 is not set # CONFIG_8139CP is not set @@ -435,6 +443,7 @@ # CONFIG_SERIAL_CONSOLE is not set # CONFIG_SERIAL_EXTENDED is not set # CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 diff -urN linux-2.4.28-bk3/arch/mips/defconfig-ev96100 linux-2.4.28-bk4/arch/mips/defconfig-ev96100 --- linux-2.4.28-bk3/arch/mips/defconfig-ev96100 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/defconfig-ev96100 2004-11-23 02:49:27.341389921 -0800 @@ -26,10 +26,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -52,6 +54,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -73,12 +77,9 @@ # CONFIG_HIGHMEM is not set CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set -CONFIG_PCI=y CONFIG_MIPS_GT64120=y CONFIG_MIPS_GT96100=y -CONFIG_NEW_PCI=y CONFIG_NONCOHERENT_IO=y -CONFIG_PCI_AUTO=y CONFIG_SWAP_IO_SPACE_W=y CONFIG_SWAP_IO_SPACE_L=y # CONFIG_MIPS_AU1000 is not set @@ -120,8 +121,12 @@ # General setup # # CONFIG_CPU_LITTLE_ENDIAN is not set +# CONFIG_BUILD_ELF64 is not set # CONFIG_BINFMT_IRIX is not set CONFIG_NET=y +CONFIG_PCI=y +CONFIG_PCI_NEW=y +CONFIG_PCI_AUTO=y CONFIG_PCI_NAMES=y # CONFIG_ISA is not set # CONFIG_TC is not set @@ -143,6 +148,7 @@ # CONFIG_BINFMT_ELF32 is not set # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # # Memory Technology Devices (MTD) @@ -172,6 +178,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set # CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set @@ -216,7 +223,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set @@ -345,6 +351,7 @@ # CONFIG_FEALNX is not set # CONFIG_NATSEMI is not set # CONFIG_NE2K_PCI is not set +# CONFIG_FORCEDETH is not set # CONFIG_NE3210 is not set # CONFIG_ES3210 is not set # CONFIG_8139CP is not set @@ -434,6 +441,7 @@ CONFIG_SERIAL_CONSOLE=y # CONFIG_SERIAL_EXTENDED is not set # CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 diff -urN linux-2.4.28-bk3/arch/mips/defconfig-hp-lj linux-2.4.28-bk4/arch/mips/defconfig-hp-lj --- linux-2.4.28-bk3/arch/mips/defconfig-hp-lj 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/defconfig-hp-lj 2004-11-23 02:49:27.342389962 -0800 @@ -26,10 +26,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -52,6 +54,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -74,10 +78,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set CONFIG_IRQ_CPU=y -CONFIG_NEW_TIME_C=y -CONFIG_NEW_PCI=y CONFIG_NONCOHERENT_IO=y -CONFIG_PCI=y # CONFIG_MIPS_AU1000 is not set # @@ -114,7 +115,11 @@ # General setup # CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_BUILD_ELF64 is not set CONFIG_NET=y +CONFIG_PCI=y +CONFIG_PCI_NEW=y +# CONFIG_PCI_AUTO is not set # CONFIG_PCI_NAMES is not set # CONFIG_ISA is not set # CONFIG_TC is not set @@ -136,6 +141,7 @@ # CONFIG_BINFMT_ELF32 is not set # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # # Memory Technology Devices (MTD) @@ -188,7 +194,8 @@ # CONFIG_MTD_XXS1500 is not set # CONFIG_MTD_MTX1 is not set # CONFIG_MTD_DB1X00 is not set -# CONFIG_MTD_HYDIII is not set +# CONFIG_MTD_PB1550 is not set +# CONFIG_MTD_HYDROGEN3 is not set # CONFIG_MTD_MIRAGE is not set # CONFIG_MTD_CSTM_MIPS_IXX is not set # CONFIG_MTD_OCELOT is not set @@ -242,6 +249,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set # CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set @@ -287,7 +295,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set @@ -345,10 +352,12 @@ # # CONFIG_BLK_DEV_HD_IDE is not set # CONFIG_BLK_DEV_HD is not set +# CONFIG_BLK_DEV_IDE_SATA is not set CONFIG_BLK_DEV_IDEDISK=y # CONFIG_IDEDISK_MULTI_MODE is not set # CONFIG_IDEDISK_STROKE is not set # CONFIG_BLK_DEV_IDECS is not set +# CONFIG_BLK_DEV_DELKIN is not set # CONFIG_BLK_DEV_IDECD is not set # CONFIG_BLK_DEV_IDETAPE is not set # CONFIG_BLK_DEV_IDEFLOPPY is not set @@ -377,6 +386,7 @@ # CONFIG_WDC_ALI15X3 is not set # CONFIG_BLK_DEV_AMD74XX is not set # CONFIG_AMD74XX_OVERRIDE is not set +# CONFIG_BLK_DEV_ATIIXP is not set # CONFIG_BLK_DEV_CMD64X is not set # CONFIG_BLK_DEV_TRIFLEX is not set # CONFIG_BLK_DEV_CY82C693 is not set @@ -405,6 +415,7 @@ # CONFIG_BLK_DEV_ATARAID is not set # CONFIG_BLK_DEV_ATARAID_PDC is not set # CONFIG_BLK_DEV_ATARAID_HPT is not set +# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set # CONFIG_BLK_DEV_ATARAID_SII is not set # @@ -486,6 +497,7 @@ # CONFIG_FEALNX is not set # CONFIG_NATSEMI is not set # CONFIG_NE2K_PCI is not set +# CONFIG_FORCEDETH is not set # CONFIG_NE3210 is not set # CONFIG_ES3210 is not set # CONFIG_8139CP is not set @@ -539,6 +551,11 @@ # CONFIG_PLX_HERMES is not set # CONFIG_TMD_HERMES is not set # CONFIG_PCI_HERMES is not set + +# +# Prism54 PCI/PCMCIA GT/Duette Driver - 802.11(a/b/g) +# +# CONFIG_PRISM54 is not set CONFIG_NET_WIRELESS=y # @@ -587,6 +604,7 @@ CONFIG_SERIAL_CONSOLE=y # CONFIG_SERIAL_EXTENDED is not set # CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set # CONFIG_UNIX98_PTYS is not set # @@ -628,7 +646,6 @@ # CONFIG_AMD_PM768 is not set # CONFIG_NVRAM is not set # CONFIG_RTC is not set -# CONFIG_MIPS_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set diff -urN linux-2.4.28-bk3/arch/mips/defconfig-hydrogen3 linux-2.4.28-bk4/arch/mips/defconfig-hydrogen3 --- linux-2.4.28-bk3/arch/mips/defconfig-hydrogen3 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/defconfig-hydrogen3 2004-11-23 02:49:27.343390003 -0800 @@ -26,10 +26,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set CONFIG_MIPS_HYDROGEN3=y +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -52,6 +54,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -75,9 +79,6 @@ # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set CONFIG_SOC_AU1X00=y CONFIG_SOC_AU1100=y -CONFIG_NEW_TIME_C=y -CONFIG_PCI=y -CONFIG_NEW_PCI=y CONFIG_NONCOHERENT_IO=y CONFIG_PC_KEYB=y CONFIG_SWAP_IO_SPACE=y @@ -119,7 +120,11 @@ # General setup # CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_BUILD_ELF64 is not set CONFIG_NET=y +CONFIG_PCI=y +CONFIG_PCI_NEW=y +# CONFIG_PCI_AUTO is not set # CONFIG_PCI_NAMES is not set # CONFIG_ISA is not set # CONFIG_TC is not set @@ -136,9 +141,6 @@ # CONFIG_I82092 is not set # CONFIG_I82365 is not set CONFIG_PCMCIA_AU1X00=m -# CONFIG_PCMCIA_PB1X00 is not set -CONFIG_PCMCIA_DB1X00=y -# CONFIG_PCMCIA_XXS1500 is not set # # PCI Hotplug Support @@ -146,6 +148,10 @@ # CONFIG_HOTPLUG_PCI is not set # CONFIG_HOTPLUG_PCI_COMPAQ is not set # CONFIG_HOTPLUG_PCI_COMPAQ_NVRAM is not set +# CONFIG_HOTPLUG_PCI_SHPC is not set +# CONFIG_HOTPLUG_PCI_SHPC_POLL_EVENT_MODE is not set +# CONFIG_HOTPLUG_PCI_PCIE is not set +# CONFIG_HOTPLUG_PCI_PCIE_POLL_EVENT_MODE is not set CONFIG_SYSVIPC=y # CONFIG_BSD_PROCESS_ACCT is not set CONFIG_SYSCTL=y @@ -159,6 +165,7 @@ # CONFIG_BINFMT_ELF32 is not set # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # CONFIG_PM is not set # @@ -208,7 +215,8 @@ # CONFIG_MTD_XXS1500 is not set # CONFIG_MTD_MTX1 is not set # CONFIG_MTD_DB1X00 is not set -CONFIG_MTD_HYDIII=y +# CONFIG_MTD_PB1550 is not set +CONFIG_MTD_HYDROGEN3=y # CONFIG_MTD_MIRAGE is not set # CONFIG_MTD_CSTM_MIPS_IXX is not set # CONFIG_MTD_OCELOT is not set @@ -260,6 +268,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set CONFIG_BLK_DEV_LOOP=y # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set @@ -322,7 +331,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set @@ -380,10 +388,12 @@ # # CONFIG_BLK_DEV_HD_IDE is not set # CONFIG_BLK_DEV_HD is not set +# CONFIG_BLK_DEV_IDE_SATA is not set CONFIG_BLK_DEV_IDEDISK=y # CONFIG_IDEDISK_MULTI_MODE is not set # CONFIG_IDEDISK_STROKE is not set CONFIG_BLK_DEV_IDECS=m +# CONFIG_BLK_DEV_DELKIN is not set # CONFIG_BLK_DEV_IDECD is not set # CONFIG_BLK_DEV_IDETAPE is not set # CONFIG_BLK_DEV_IDEFLOPPY is not set @@ -403,6 +413,7 @@ # CONFIG_BLK_DEV_ATARAID is not set # CONFIG_BLK_DEV_ATARAID_PDC is not set # CONFIG_BLK_DEV_ATARAID_HPT is not set +# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set # CONFIG_BLK_DEV_ATARAID_SII is not set # @@ -526,51 +537,7 @@ # # IrDA (infrared) support # -CONFIG_IRDA=y - -# -# IrDA protocols -# -CONFIG_IRLAN=m -# CONFIG_IRNET is not set -CONFIG_IRCOMM=m -# CONFIG_IRDA_ULTRA is not set - -# -# IrDA options -# -CONFIG_IRDA_CACHE_LAST_LSAP=y -CONFIG_IRDA_FAST_RR=y -# CONFIG_IRDA_DEBUG is not set - -# -# Infrared-port device drivers -# - -# -# SIR device drivers -# -# CONFIG_IRTTY_SIR is not set -# CONFIG_IRPORT_SIR is not set - -# -# Dongle support -# -# CONFIG_DONGLE is not set - -# -# FIR device drivers -# -# CONFIG_USB_IRDA is not set -# CONFIG_NSC_FIR is not set -# CONFIG_WINBOND_FIR is not set -# CONFIG_TOSHIBA_OLD is not set -# CONFIG_TOSHIBA_FIR is not set -CONFIG_AU1000_FIR=m -# CONFIG_SMC_IRCC_FIR is not set -# CONFIG_ALI_FIR is not set -# CONFIG_VLSI_FIR is not set -# CONFIG_VIA_IRCC_FIR is not set +# CONFIG_IRDA is not set # # ISDN subsystem @@ -623,6 +590,7 @@ # CONFIG_AU1X00_USB_TTY is not set # CONFIG_AU1X00_USB_RAW is not set # CONFIG_TXX927_SERIAL is not set +CONFIG_MIPS_HYDROGEN3_BUTTONS=y CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 @@ -687,7 +655,6 @@ # CONFIG_AMD_PM768 is not set # CONFIG_NVRAM is not set # CONFIG_RTC is not set -# CONFIG_MIPS_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set @@ -928,6 +895,8 @@ # CONFIG_SOUND_RME96XX is not set # CONFIG_SOUND_SONICVIBES is not set CONFIG_SOUND_AU1X00=y +# CONFIG_SOUND_AU1550_PSC is not set +# CONFIG_SOUND_AU1550_I2S is not set # CONFIG_SOUND_TRIDENT is not set # CONFIG_SOUND_MSNDCLAS is not set # CONFIG_SOUND_MSNDPIN is not set @@ -1017,7 +986,6 @@ # CONFIG_USB_RTL8150 is not set # CONFIG_USB_KAWETH is not set # CONFIG_USB_CATC is not set -# CONFIG_USB_AX8817X is not set # CONFIG_USB_CDCETHER is not set # CONFIG_USB_USBNET is not set diff -urN linux-2.4.28-bk3/arch/mips/defconfig-ip22 linux-2.4.28-bk4/arch/mips/defconfig-ip22 --- linux-2.4.28-bk3/arch/mips/defconfig-ip22 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/defconfig-ip22 2004-11-23 02:49:27.344390044 -0800 @@ -26,10 +26,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -52,6 +54,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -81,7 +85,6 @@ CONFIG_SWAP_IO_SPACE_L=y CONFIG_IRQ_CPU=y CONFIG_L1_CACHE_SHIFT=5 -CONFIG_NEW_TIME_C=y CONFIG_NONCOHERENT_IO=y CONFIG_PC_KEYB=y # CONFIG_MIPS_AU1000 is not set @@ -120,11 +123,12 @@ # General setup # # CONFIG_CPU_LITTLE_ENDIAN is not set +# CONFIG_BUILD_ELF64 is not set CONFIG_BINFMT_IRIX=y CONFIG_ARC_CONSOLE=y CONFIG_NET=y -# CONFIG_EISA is not set # CONFIG_PCI is not set +# CONFIG_EISA is not set # CONFIG_ISA is not set # CONFIG_TC is not set # CONFIG_MCA is not set @@ -145,6 +149,7 @@ # CONFIG_BINFMT_ELF32 is not set # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # # Memory Technology Devices (MTD) @@ -174,6 +179,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set # CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set @@ -220,7 +226,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set @@ -313,6 +318,17 @@ # CONFIG_SCSI_AM53C974 is not set # CONFIG_SCSI_MEGARAID is not set # CONFIG_SCSI_MEGARAID2 is not set +# CONFIG_SCSI_SATA is not set +# CONFIG_SCSI_SATA_SVW is not set +# CONFIG_SCSI_ATA_PIIX is not set +# CONFIG_SCSI_SATA_NV is not set +# CONFIG_SCSI_SATA_PROMISE is not set +# CONFIG_SCSI_SATA_SX4 is not set +# CONFIG_SCSI_SATA_SIL is not set +# CONFIG_SCSI_SATA_SIS is not set +# CONFIG_SCSI_SATA_ULI is not set +# CONFIG_SCSI_SATA_VIA is not set +# CONFIG_SCSI_SATA_VITESSE is not set # CONFIG_SCSI_BUSLOGIC is not set # CONFIG_SCSI_DMX3191D is not set # CONFIG_SCSI_DTC3280 is not set @@ -449,6 +465,7 @@ # CONFIG_SERIAL is not set # CONFIG_SERIAL_EXTENDED is not set # CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 @@ -511,13 +528,11 @@ # CONFIG_WDTPCI is not set # CONFIG_MACHZ_WDT is not set # CONFIG_INDYDOG is not set -# CONFIG_AMD7XX_TCO is not set # CONFIG_SCx200 is not set # CONFIG_SCx200_GPIO is not set # CONFIG_AMD_PM768 is not set # CONFIG_NVRAM is not set # CONFIG_RTC is not set -# CONFIG_MIPS_RTC is not set CONFIG_DS1286=y # CONFIG_DTLK is not set # CONFIG_R3964 is not set @@ -607,7 +622,7 @@ CONFIG_ROOT_NFS=y CONFIG_NFSD=y # CONFIG_NFSD_V3 is not set -# CONFIG_NFSD_TCP is not set +CONFIG_NFSD_TCP=y CONFIG_SUNRPC=y CONFIG_LOCKD=y # CONFIG_SMB_FS is not set diff -urN linux-2.4.28-bk3/arch/mips/defconfig-it8172 linux-2.4.28-bk4/arch/mips/defconfig-it8172 --- linux-2.4.28-bk3/arch/mips/defconfig-it8172 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/defconfig-it8172 2004-11-23 02:49:27.345390084 -0800 @@ -26,10 +26,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -53,6 +55,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -74,14 +78,10 @@ # CONFIG_HIGHMEM is not set CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set -CONFIG_PCI=y CONFIG_IT8712=y CONFIG_PC_KEYB=y -CONFIG_NEW_PCI=y CONFIG_NONCOHERENT_IO=y -CONFIG_PCI_AUTO=y CONFIG_IT8172_CIR=y -CONFIG_NEW_TIME_C=y # CONFIG_MIPS_AU1000 is not set # @@ -117,7 +117,11 @@ # General setup # CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_BUILD_ELF64 is not set CONFIG_NET=y +CONFIG_PCI=y +CONFIG_PCI_NEW=y +CONFIG_PCI_AUTO=y CONFIG_PCI_NAMES=y # CONFIG_ISA is not set # CONFIG_TC is not set @@ -139,6 +143,7 @@ # CONFIG_BINFMT_ELF32 is not set # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # # Memory Technology Devices (MTD) @@ -191,7 +196,8 @@ # CONFIG_MTD_XXS1500 is not set # CONFIG_MTD_MTX1 is not set # CONFIG_MTD_DB1X00 is not set -# CONFIG_MTD_HYDIII is not set +# CONFIG_MTD_PB1550 is not set +# CONFIG_MTD_HYDROGEN3 is not set # CONFIG_MTD_MIRAGE is not set # CONFIG_MTD_CSTM_MIPS_IXX is not set # CONFIG_MTD_OCELOT is not set @@ -243,6 +249,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set CONFIG_BLK_DEV_LOOP=y # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set @@ -288,7 +295,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set @@ -346,10 +352,12 @@ # # CONFIG_BLK_DEV_HD_IDE is not set # CONFIG_BLK_DEV_HD is not set +# CONFIG_BLK_DEV_IDE_SATA is not set CONFIG_BLK_DEV_IDEDISK=y # CONFIG_IDEDISK_MULTI_MODE is not set # CONFIG_IDEDISK_STROKE is not set # CONFIG_BLK_DEV_IDECS is not set +# CONFIG_BLK_DEV_DELKIN is not set # CONFIG_BLK_DEV_IDECD is not set # CONFIG_BLK_DEV_IDETAPE is not set # CONFIG_BLK_DEV_IDEFLOPPY is not set @@ -378,6 +386,7 @@ # CONFIG_WDC_ALI15X3 is not set # CONFIG_BLK_DEV_AMD74XX is not set # CONFIG_AMD74XX_OVERRIDE is not set +# CONFIG_BLK_DEV_ATIIXP is not set # CONFIG_BLK_DEV_CMD64X is not set # CONFIG_BLK_DEV_TRIFLEX is not set # CONFIG_BLK_DEV_CY82C693 is not set @@ -407,6 +416,7 @@ # CONFIG_BLK_DEV_ATARAID is not set # CONFIG_BLK_DEV_ATARAID_PDC is not set # CONFIG_BLK_DEV_ATARAID_HPT is not set +# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set # CONFIG_BLK_DEV_ATARAID_SII is not set # @@ -488,6 +498,7 @@ # CONFIG_FEALNX is not set # CONFIG_NATSEMI is not set # CONFIG_NE2K_PCI is not set +# CONFIG_FORCEDETH is not set # CONFIG_NE3210 is not set # CONFIG_ES3210 is not set # CONFIG_8139CP is not set @@ -581,6 +592,7 @@ CONFIG_PC_KEYB=y # CONFIG_IT8172_SCR0 is not set # CONFIG_IT8172_SCR1 is not set +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 @@ -623,7 +635,6 @@ # CONFIG_AMD_PM768 is not set # CONFIG_NVRAM is not set # CONFIG_RTC is not set -# CONFIG_MIPS_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set diff -urN linux-2.4.28-bk3/arch/mips/defconfig-ivr linux-2.4.28-bk4/arch/mips/defconfig-ivr --- linux-2.4.28-bk3/arch/mips/defconfig-ivr 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/defconfig-ivr 2004-11-23 02:49:27.346390125 -0800 @@ -26,10 +26,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -52,6 +54,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -73,13 +77,9 @@ # CONFIG_HIGHMEM is not set CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set -CONFIG_PCI=y CONFIG_PC_KEYB=y -CONFIG_NEW_PCI=y CONFIG_NONCOHERENT_IO=y -CONFIG_PCI_AUTO=y CONFIG_IT8172_CIR=y -CONFIG_NEW_TIME_C=y # CONFIG_MIPS_AU1000 is not set # @@ -115,7 +115,11 @@ # General setup # CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_BUILD_ELF64 is not set CONFIG_NET=y +CONFIG_PCI=y +CONFIG_PCI_NEW=y +CONFIG_PCI_AUTO=y CONFIG_PCI_NAMES=y # CONFIG_ISA is not set # CONFIG_TC is not set @@ -137,6 +141,7 @@ # CONFIG_BINFMT_ELF32 is not set # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # # Memory Technology Devices (MTD) @@ -166,6 +171,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set # CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set @@ -211,7 +217,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set @@ -269,10 +274,12 @@ # # CONFIG_BLK_DEV_HD_IDE is not set # CONFIG_BLK_DEV_HD is not set +# CONFIG_BLK_DEV_IDE_SATA is not set CONFIG_BLK_DEV_IDEDISK=y # CONFIG_IDEDISK_MULTI_MODE is not set # CONFIG_IDEDISK_STROKE is not set # CONFIG_BLK_DEV_IDECS is not set +# CONFIG_BLK_DEV_DELKIN is not set # CONFIG_BLK_DEV_IDECD is not set # CONFIG_BLK_DEV_IDETAPE is not set # CONFIG_BLK_DEV_IDEFLOPPY is not set @@ -301,6 +308,7 @@ # CONFIG_WDC_ALI15X3 is not set # CONFIG_BLK_DEV_AMD74XX is not set # CONFIG_AMD74XX_OVERRIDE is not set +# CONFIG_BLK_DEV_ATIIXP is not set # CONFIG_BLK_DEV_CMD64X is not set # CONFIG_BLK_DEV_TRIFLEX is not set # CONFIG_BLK_DEV_CY82C693 is not set @@ -330,6 +338,7 @@ # CONFIG_BLK_DEV_ATARAID is not set # CONFIG_BLK_DEV_ATARAID_PDC is not set # CONFIG_BLK_DEV_ATARAID_HPT is not set +# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set # CONFIG_BLK_DEV_ATARAID_SII is not set # @@ -411,6 +420,7 @@ # CONFIG_FEALNX is not set # CONFIG_NATSEMI is not set # CONFIG_NE2K_PCI is not set +# CONFIG_FORCEDETH is not set # CONFIG_NE3210 is not set # CONFIG_ES3210 is not set # CONFIG_8139CP is not set @@ -506,6 +516,7 @@ CONFIG_QTRONIX_KEYBOARD=y CONFIG_IT8172_CIR=y # CONFIG_IT8172_SCR0 is not set +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 @@ -570,7 +581,6 @@ # CONFIG_AMD_PM768 is not set # CONFIG_NVRAM is not set CONFIG_RTC=y -# CONFIG_MIPS_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set @@ -782,7 +792,6 @@ # CONFIG_USB_RTL8150 is not set # CONFIG_USB_KAWETH is not set # CONFIG_USB_CATC is not set -# CONFIG_USB_AX8817X is not set # CONFIG_USB_CDCETHER is not set # CONFIG_USB_USBNET is not set diff -urN linux-2.4.28-bk3/arch/mips/defconfig-jmr3927 linux-2.4.28-bk4/arch/mips/defconfig-jmr3927 --- linux-2.4.28-bk3/arch/mips/defconfig-jmr3927 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/defconfig-jmr3927 2004-11-23 02:49:27.347390166 -0800 @@ -24,10 +24,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -50,6 +52,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -72,10 +76,6 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set CONFIG_TOSHIBA_BOARDS=y -CONFIG_PCI=y -CONFIG_NEW_PCI=y -CONFIG_PCI_AUTO=y -CONFIG_NEW_TIME_C=y CONFIG_NONCOHERENT_IO=y CONFIG_SWAP_IO_SPACE_W=y CONFIG_SWAP_IO_SPACE_L=y @@ -113,8 +113,12 @@ # General setup # # CONFIG_CPU_LITTLE_ENDIAN is not set +# CONFIG_BUILD_ELF64 is not set # CONFIG_BINFMT_IRIX is not set CONFIG_NET=y +CONFIG_PCI=y +CONFIG_PCI_NEW=y +CONFIG_PCI_AUTO=y # CONFIG_PCI_NAMES is not set # CONFIG_ISA is not set # CONFIG_TC is not set @@ -136,6 +140,7 @@ # CONFIG_BINFMT_ELF32 is not set # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # # Memory Technology Devices (MTD) @@ -165,6 +170,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set # CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set @@ -210,7 +216,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set @@ -336,6 +341,7 @@ # CONFIG_FEALNX is not set # CONFIG_NATSEMI is not set # CONFIG_NE2K_PCI is not set +# CONFIG_FORCEDETH is not set # CONFIG_NE3210 is not set # CONFIG_ES3210 is not set # CONFIG_8139CP is not set @@ -448,6 +454,7 @@ # CONFIG_SERIAL_TXX9_CONSOLE is not set CONFIG_TXX927_SERIAL=y CONFIG_TXX927_SERIAL_CONSOLE=y +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set # CONFIG_UNIX98_PTYS is not set # @@ -489,7 +496,6 @@ # CONFIG_AMD_PM768 is not set # CONFIG_NVRAM is not set # CONFIG_RTC is not set -# CONFIG_MIPS_RTC is not set CONFIG_DS1742=y # CONFIG_DTLK is not set # CONFIG_R3964 is not set diff -urN linux-2.4.28-bk3/arch/mips/defconfig-lasat linux-2.4.28-bk4/arch/mips/defconfig-lasat --- linux-2.4.28-bk3/arch/mips/defconfig-lasat 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/defconfig-lasat 2004-11-23 02:49:27.348390207 -0800 @@ -26,10 +26,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -46,6 +48,7 @@ CONFIG_PICVUE=y CONFIG_PICVUE_PROC=y CONFIG_DS1603=y +CONFIG_MIPS_RTC=y CONFIG_LASAT_SYSCTL=y # CONFIG_MIPS_ITE8172 is not set # CONFIG_MIPS_ATLAS is not set @@ -56,6 +59,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -79,11 +84,9 @@ # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set CONFIG_BOARD_SCACHE=y CONFIG_R5000_CPU_SCACHE=y -CONFIG_PCI=y CONFIG_MIPS_GT64120=y CONFIG_MIPS_NILE4=y CONFIG_NONCOHERENT_IO=y -CONFIG_NEW_TIME_C=y # CONFIG_MIPS_AU1000 is not set # @@ -120,7 +123,11 @@ # General setup # CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_BUILD_ELF64 is not set CONFIG_NET=y +CONFIG_PCI=y +# CONFIG_PCI_NEW is not set +# CONFIG_PCI_AUTO is not set # CONFIG_PCI_NAMES is not set # CONFIG_ISA is not set # CONFIG_TC is not set @@ -142,6 +149,7 @@ # CONFIG_BINFMT_ELF32 is not set # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # # Memory Technology Devices (MTD) @@ -191,7 +199,8 @@ # CONFIG_MTD_XXS1500 is not set # CONFIG_MTD_MTX1 is not set # CONFIG_MTD_DB1X00 is not set -# CONFIG_MTD_HYDIII is not set +# CONFIG_MTD_PB1550 is not set +# CONFIG_MTD_HYDROGEN3 is not set # CONFIG_MTD_MIRAGE is not set # CONFIG_MTD_CSTM_MIPS_IXX is not set # CONFIG_MTD_OCELOT is not set @@ -243,6 +252,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set # CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set @@ -284,7 +294,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set @@ -342,10 +351,12 @@ # # CONFIG_BLK_DEV_HD_IDE is not set # CONFIG_BLK_DEV_HD is not set +# CONFIG_BLK_DEV_IDE_SATA is not set CONFIG_BLK_DEV_IDEDISK=y # CONFIG_IDEDISK_MULTI_MODE is not set # CONFIG_IDEDISK_STROKE is not set # CONFIG_BLK_DEV_IDECS is not set +# CONFIG_BLK_DEV_DELKIN is not set # CONFIG_BLK_DEV_IDECD is not set # CONFIG_BLK_DEV_IDETAPE is not set # CONFIG_BLK_DEV_IDEFLOPPY is not set @@ -374,6 +385,7 @@ # CONFIG_WDC_ALI15X3 is not set # CONFIG_BLK_DEV_AMD74XX is not set # CONFIG_AMD74XX_OVERRIDE is not set +# CONFIG_BLK_DEV_ATIIXP is not set CONFIG_BLK_DEV_CMD64X=y # CONFIG_BLK_DEV_TRIFLEX is not set # CONFIG_BLK_DEV_CY82C693 is not set @@ -402,6 +414,7 @@ # CONFIG_BLK_DEV_ATARAID is not set # CONFIG_BLK_DEV_ATARAID_PDC is not set # CONFIG_BLK_DEV_ATARAID_HPT is not set +# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set # CONFIG_BLK_DEV_ATARAID_SII is not set # @@ -481,6 +494,7 @@ # CONFIG_FEALNX is not set # CONFIG_NATSEMI is not set # CONFIG_NE2K_PCI is not set +# CONFIG_FORCEDETH is not set # CONFIG_NE3210 is not set # CONFIG_ES3210 is not set # CONFIG_8139CP is not set @@ -570,6 +584,7 @@ CONFIG_SERIAL_CONSOLE=y # CONFIG_SERIAL_EXTENDED is not set # CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 @@ -612,7 +627,6 @@ # CONFIG_AMD_PM768 is not set # CONFIG_NVRAM is not set # CONFIG_RTC is not set -# CONFIG_MIPS_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set diff -urN linux-2.4.28-bk3/arch/mips/defconfig-malta linux-2.4.28-bk4/arch/mips/defconfig-malta --- linux-2.4.28-bk3/arch/mips/defconfig-malta 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/defconfig-malta 2004-11-23 02:49:27.349390247 -0800 @@ -26,10 +26,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -52,6 +54,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -80,12 +84,10 @@ CONFIG_MIPS_GT64120=y CONFIG_MIPS_MSC=y CONFIG_L1_CACHE_SHIFT=5 -CONFIG_NEW_TIME_C=y CONFIG_NONCOHERENT_IO=y CONFIG_SWAP_IO_SPACE_W=y CONFIG_SWAP_IO_SPACE_L=y CONFIG_PC_KEYB=y -CONFIG_PCI=y # CONFIG_MIPS_AU1000 is not set # @@ -124,7 +126,11 @@ # General setup # CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_BUILD_ELF64 is not set CONFIG_NET=y +CONFIG_PCI=y +# CONFIG_PCI_NEW is not set +# CONFIG_PCI_AUTO is not set # CONFIG_PCI_NAMES is not set # CONFIG_ISA is not set # CONFIG_TC is not set @@ -146,6 +152,7 @@ # CONFIG_BINFMT_ELF32 is not set # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # # Memory Technology Devices (MTD) @@ -175,6 +182,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set # CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set CONFIG_BLK_DEV_RAM=y @@ -220,7 +228,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set @@ -311,6 +318,17 @@ # CONFIG_SCSI_AM53C974 is not set # CONFIG_SCSI_MEGARAID is not set # CONFIG_SCSI_MEGARAID2 is not set +# CONFIG_SCSI_SATA is not set +# CONFIG_SCSI_SATA_SVW is not set +# CONFIG_SCSI_ATA_PIIX is not set +# CONFIG_SCSI_SATA_NV is not set +# CONFIG_SCSI_SATA_PROMISE is not set +# CONFIG_SCSI_SATA_SX4 is not set +# CONFIG_SCSI_SATA_SIL is not set +# CONFIG_SCSI_SATA_SIS is not set +# CONFIG_SCSI_SATA_ULI is not set +# CONFIG_SCSI_SATA_VIA is not set +# CONFIG_SCSI_SATA_VITESSE is not set # CONFIG_SCSI_BUSLOGIC is not set # CONFIG_SCSI_CPQFCTS is not set # CONFIG_SCSI_DMX3191D is not set @@ -416,6 +434,7 @@ # CONFIG_FEALNX is not set # CONFIG_NATSEMI is not set # CONFIG_NE2K_PCI is not set +# CONFIG_FORCEDETH is not set # CONFIG_NE3210 is not set # CONFIG_ES3210 is not set # CONFIG_8139CP is not set @@ -505,6 +524,7 @@ CONFIG_SERIAL_CONSOLE=y # CONFIG_SERIAL_EXTENDED is not set # CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 @@ -547,7 +567,6 @@ # CONFIG_AMD_PM768 is not set # CONFIG_NVRAM is not set CONFIG_RTC=y -# CONFIG_MIPS_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set @@ -636,7 +655,7 @@ CONFIG_ROOT_NFS=y CONFIG_NFSD=y CONFIG_NFSD_V3=y -# CONFIG_NFSD_TCP is not set +CONFIG_NFSD_TCP=y CONFIG_SUNRPC=y CONFIG_LOCKD=y CONFIG_LOCKD_V4=y diff -urN linux-2.4.28-bk3/arch/mips/defconfig-mirage linux-2.4.28-bk4/arch/mips/defconfig-mirage --- linux-2.4.28-bk3/arch/mips/defconfig-mirage 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/defconfig-mirage 2004-11-23 02:49:27.351390329 -0800 @@ -26,10 +26,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -52,6 +54,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -75,11 +79,7 @@ # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set CONFIG_SOC_AU1X00=y CONFIG_SOC_AU1500=y -CONFIG_NEW_TIME_C=y CONFIG_PC_KEYB=y -CONFIG_PCI=y -CONFIG_NEW_PCI=y -CONFIG_PCI_AUTO=y CONFIG_NONCOHERENT_IO=y # CONFIG_MIPS_AU1000 is not set @@ -119,7 +119,11 @@ # General setup # CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_BUILD_ELF64 is not set CONFIG_NET=y +CONFIG_PCI=y +CONFIG_PCI_NEW=y +CONFIG_PCI_AUTO=y # CONFIG_PCI_NAMES is not set # CONFIG_ISA is not set # CONFIG_TC is not set @@ -138,6 +142,10 @@ # CONFIG_HOTPLUG_PCI is not set # CONFIG_HOTPLUG_PCI_COMPAQ is not set # CONFIG_HOTPLUG_PCI_COMPAQ_NVRAM is not set +# CONFIG_HOTPLUG_PCI_SHPC is not set +# CONFIG_HOTPLUG_PCI_SHPC_POLL_EVENT_MODE is not set +# CONFIG_HOTPLUG_PCI_PCIE is not set +# CONFIG_HOTPLUG_PCI_PCIE_POLL_EVENT_MODE is not set CONFIG_SYSVIPC=y # CONFIG_BSD_PROCESS_ACCT is not set CONFIG_SYSCTL=y @@ -151,12 +159,86 @@ # CONFIG_BINFMT_ELF32 is not set # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +CONFIG_CMDLINE_BOOL=y +CONFIG_CMDLINE="root=/dev/mtdblock0 rw ip=off" # CONFIG_PM is not set # # Memory Technology Devices (MTD) # -# CONFIG_MTD is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_CONCAT is not set +# CONFIG_MTD_REDBOOT_PARTS is not set +# CONFIG_MTD_CMDLINE_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +# CONFIG_MTD_CFI_ADV_OPTIONS is not set +# CONFIG_MTD_CFI_INTELEXT is not set +CONFIG_MTD_CFI_AMDSTD=y +# CONFIG_MTD_CFI_STAA is not set +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# CONFIG_MTD_OBSOLETE_CHIPS is not set +# CONFIG_MTD_AMDSTD is not set +# CONFIG_MTD_SHARP is not set +# CONFIG_MTD_JEDEC is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_PHYSMAP is not set +# CONFIG_MTD_PB1000 is not set +# CONFIG_MTD_PB1500 is not set +# CONFIG_MTD_PB1100 is not set +# CONFIG_MTD_BOSPORUS is not set +# CONFIG_MTD_XXS1500 is not set +# CONFIG_MTD_MTX1 is not set +# CONFIG_MTD_DB1X00 is not set +# CONFIG_MTD_PB1550 is not set +# CONFIG_MTD_HYDROGEN3 is not set +CONFIG_MTD_MIRAGE=y +# CONFIG_MTD_CSTM_MIPS_IXX is not set +# CONFIG_MTD_OCELOT is not set +# CONFIG_MTD_LASAT is not set +# CONFIG_MTD_PCI is not set +# CONFIG_MTD_PCMCIA is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLKMTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC1000 is not set +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOCPROBE is not set + +# +# NAND Flash Device Drivers +# +# CONFIG_MTD_NAND is not set # # Parallel port support @@ -181,6 +263,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set CONFIG_BLK_DEV_LOOP=y # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set @@ -243,7 +326,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set @@ -385,7 +467,24 @@ # # Wireless LAN (non-hamradio) # -# CONFIG_NET_RADIO is not set +CONFIG_NET_RADIO=y +# CONFIG_STRIP is not set +# CONFIG_WAVELAN is not set +# CONFIG_ARLAN is not set +# CONFIG_AIRONET4500 is not set +# CONFIG_AIRONET4500_NONCS is not set +# CONFIG_AIRONET4500_PROC is not set +# CONFIG_AIRO is not set +# CONFIG_HERMES is not set +# CONFIG_PLX_HERMES is not set +# CONFIG_TMD_HERMES is not set +# CONFIG_PCI_HERMES is not set + +# +# Prism54 PCI/PCMCIA GT/Duette Driver - 802.11(a/b/g) +# +# CONFIG_PRISM54 is not set +CONFIG_NET_WIRELESS=y # # Token Ring devices @@ -461,19 +560,33 @@ # CONFIG_AU1X00_USB_TTY is not set # CONFIG_AU1X00_USB_RAW is not set # CONFIG_TXX927_SERIAL is not set +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 # # I2C support # -# CONFIG_I2C is not set +CONFIG_I2C=y +CONFIG_I2C_ALGOBIT=y +# CONFIG_I2C_PHILIPSPAR is not set +# CONFIG_I2C_ELV is not set +# CONFIG_I2C_VELLEMAN is not set +# CONFIG_SCx200_I2C is not set +# CONFIG_SCx200_ACB is not set +# CONFIG_I2C_ALGOPCF is not set +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_PROC=y # # Mice # # CONFIG_BUSMOUSE is not set -# CONFIG_MOUSE is not set +CONFIG_MOUSE=y +CONFIG_PSMOUSE=y +# CONFIG_82C710_MOUSE is not set +# CONFIG_PC110_PAD is not set +# CONFIG_MK712_MOUSE is not set # # Joysticks @@ -525,7 +638,6 @@ # CONFIG_AMD_PM768 is not set # CONFIG_NVRAM is not set CONFIG_RTC=y -# CONFIG_MIPS_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set @@ -570,7 +682,8 @@ # CONFIG_VFAT_FS is not set # CONFIG_EFS_FS is not set # CONFIG_JFFS_FS is not set -# CONFIG_JFFS2_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 # CONFIG_CRAMFS is not set CONFIG_TMPFS=y CONFIG_RAMFS=y @@ -653,7 +766,50 @@ # # Frame-buffer support # -# CONFIG_FB is not set +CONFIG_FB=y +CONFIG_DUMMY_CONSOLE=y +# CONFIG_FB_RIVA is not set +# CONFIG_FB_CLGEN is not set +# CONFIG_FB_PM2 is not set +# CONFIG_FB_PM3 is not set +# CONFIG_FB_CYBER2000 is not set +# CONFIG_FB_MATROX is not set +# CONFIG_FB_ATY is not set +# CONFIG_FB_RADEON is not set +# CONFIG_FB_ATY128 is not set +# CONFIG_FB_INTEL is not set +# CONFIG_FB_SIS is not set +# CONFIG_FB_NEOMAGIC is not set +# CONFIG_FB_3DFX is not set +# CONFIG_FB_VOODOO1 is not set +# CONFIG_FB_TRIDENT is not set +# CONFIG_FB_E1356 is not set +# CONFIG_FB_IT8181 is not set +# CONFIG_FB_VIRTUAL is not set +CONFIG_FBCON_ADVANCED=y +# CONFIG_FBCON_MFB is not set +# CONFIG_FBCON_CFB2 is not set +# CONFIG_FBCON_CFB4 is not set +CONFIG_FBCON_CFB8=y +CONFIG_FBCON_CFB16=y +# CONFIG_FBCON_CFB24 is not set +# CONFIG_FBCON_CFB32 is not set +# CONFIG_FBCON_AFB is not set +# CONFIG_FBCON_ILBM is not set +# CONFIG_FBCON_IPLAN2P2 is not set +# CONFIG_FBCON_IPLAN2P4 is not set +# CONFIG_FBCON_IPLAN2P8 is not set +# CONFIG_FBCON_MAC is not set +# CONFIG_FBCON_VGA_PLANES is not set +# CONFIG_FBCON_VGA is not set +# CONFIG_FBCON_HGA is not set +CONFIG_FBCON_FONTWIDTH8_ONLY=y +CONFIG_FBCON_FONTS=y +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +# CONFIG_FONT_SUN8x16 is not set +# CONFIG_FONT_PEARL_8x8 is not set +# CONFIG_FONT_ACORN_8x8 is not set # # Sound @@ -676,6 +832,8 @@ # CONFIG_SOUND_RME96XX is not set # CONFIG_SOUND_SONICVIBES is not set CONFIG_SOUND_AU1X00=y +# CONFIG_SOUND_AU1550_PSC is not set +# CONFIG_SOUND_AU1550_I2S is not set # CONFIG_SOUND_TRIDENT is not set # CONFIG_SOUND_MSNDCLAS is not set # CONFIG_SOUND_MSNDPIN is not set @@ -684,7 +842,7 @@ # CONFIG_SOUND_OSS is not set # CONFIG_SOUND_TVMIXER is not set # CONFIG_SOUND_AD1980 is not set -# CONFIG_SOUND_WM97XX is not set +CONFIG_SOUND_WM97XX=y # # USB support @@ -765,7 +923,6 @@ # CONFIG_USB_RTL8150 is not set # CONFIG_USB_KAWETH is not set # CONFIG_USB_CATC is not set -# CONFIG_USB_AX8817X is not set # CONFIG_USB_CDCETHER is not set # CONFIG_USB_USBNET is not set @@ -819,6 +976,6 @@ # Library routines # # CONFIG_CRC32 is not set -CONFIG_ZLIB_INFLATE=m -CONFIG_ZLIB_DEFLATE=m +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y # CONFIG_FW_LOADER is not set diff -urN linux-2.4.28-bk3/arch/mips/defconfig-mpc30x linux-2.4.28-bk4/arch/mips/defconfig-mpc30x --- linux-2.4.28-bk3/arch/mips/defconfig-mpc30x 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/defconfig-mpc30x 2004-11-23 02:49:27.351390329 -0800 @@ -26,10 +26,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -52,6 +54,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -75,12 +79,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set CONFIG_IRQ_CPU=y -CONFIG_NEW_TIME_C=y CONFIG_NONCOHERENT_IO=y -CONFIG_PCI=y -CONFIG_NEW_PCI=y -CONFIG_PCI_AUTO=y -CONFIG_DUMMY_KEYB=y # CONFIG_SCSI is not set # CONFIG_MIPS_AU1000 is not set @@ -117,7 +116,11 @@ # General setup # CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_BUILD_ELF64 is not set CONFIG_NET=y +CONFIG_PCI=y +CONFIG_PCI_NEW=y +CONFIG_PCI_AUTO=y # CONFIG_PCI_NAMES is not set # CONFIG_ISA is not set # CONFIG_TC is not set @@ -139,6 +142,7 @@ # CONFIG_BINFMT_ELF32 is not set # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # # Memory Technology Devices (MTD) @@ -168,6 +172,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set # CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set @@ -214,7 +219,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set @@ -396,6 +400,7 @@ CONFIG_SERIAL_CONSOLE=y # CONFIG_SERIAL_EXTENDED is not set # CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set # CONFIG_VR41XX_KIU is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 @@ -439,7 +444,6 @@ # CONFIG_AMD_PM768 is not set # CONFIG_NVRAM is not set # CONFIG_RTC is not set -# CONFIG_MIPS_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set @@ -671,7 +675,6 @@ CONFIG_USB_RTL8150=y # CONFIG_USB_KAWETH is not set # CONFIG_USB_CATC is not set -# CONFIG_USB_AX8817X is not set # CONFIG_USB_CDCETHER is not set # CONFIG_USB_USBNET is not set diff -urN linux-2.4.28-bk3/arch/mips/defconfig-mtx-1 linux-2.4.28-bk4/arch/mips/defconfig-mtx-1 --- linux-2.4.28-bk3/arch/mips/defconfig-mtx-1 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/defconfig-mtx-1 2004-11-23 02:49:27.353390410 -0800 @@ -26,10 +26,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set CONFIG_MIPS_MTX1=y # CONFIG_COGENT_CSB250 is not set @@ -52,6 +54,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -75,10 +79,6 @@ # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set CONFIG_SOC_AU1X00=y CONFIG_SOC_AU1500=y -CONFIG_NEW_TIME_C=y -CONFIG_PCI=y -CONFIG_NEW_PCI=y -CONFIG_PCI_AUTO=y CONFIG_NONCOHERENT_IO=y # CONFIG_MIPS_AU1000 is not set @@ -118,7 +118,11 @@ # General setup # CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_BUILD_ELF64 is not set CONFIG_NET=y +CONFIG_PCI=y +CONFIG_PCI_NEW=y +CONFIG_PCI_AUTO=y CONFIG_PCI_NAMES=y # CONFIG_ISA is not set # CONFIG_TC is not set @@ -140,6 +144,7 @@ # CONFIG_BINFMT_ELF32 is not set # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # CONFIG_PM is not set # @@ -189,7 +194,8 @@ # CONFIG_MTD_XXS1500 is not set CONFIG_MTD_MTX1=y # CONFIG_MTD_DB1X00 is not set -# CONFIG_MTD_HYDIII is not set +# CONFIG_MTD_PB1550 is not set +# CONFIG_MTD_HYDROGEN3 is not set # CONFIG_MTD_MIRAGE is not set # CONFIG_MTD_CSTM_MIPS_IXX is not set # CONFIG_MTD_OCELOT is not set @@ -241,6 +247,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set CONFIG_BLK_DEV_LOOP=y # CONFIG_BLK_DEV_NBD is not set CONFIG_BLK_DEV_RAM=m @@ -356,7 +363,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set CONFIG_VLAN_8021Q=m @@ -389,12 +395,14 @@ CONFIG_NET_SCH_CBQ=m CONFIG_NET_SCH_HTB=m # CONFIG_NET_SCH_CSZ is not set +# CONFIG_NET_SCH_HFSC is not set CONFIG_NET_SCH_PRIO=m CONFIG_NET_SCH_RED=m CONFIG_NET_SCH_SFQ=m CONFIG_NET_SCH_TEQL=m CONFIG_NET_SCH_TBF=m CONFIG_NET_SCH_GRED=m +# CONFIG_NET_SCH_NETEM is not set CONFIG_NET_SCH_DSMARK=m CONFIG_NET_SCH_INGRESS=m CONFIG_NET_QOS=y @@ -471,6 +479,17 @@ # CONFIG_SCSI_AM53C974 is not set # CONFIG_SCSI_MEGARAID is not set # CONFIG_SCSI_MEGARAID2 is not set +# CONFIG_SCSI_SATA is not set +# CONFIG_SCSI_SATA_SVW is not set +# CONFIG_SCSI_ATA_PIIX is not set +# CONFIG_SCSI_SATA_NV is not set +# CONFIG_SCSI_SATA_PROMISE is not set +# CONFIG_SCSI_SATA_SX4 is not set +# CONFIG_SCSI_SATA_SIL is not set +# CONFIG_SCSI_SATA_SIS is not set +# CONFIG_SCSI_SATA_ULI is not set +# CONFIG_SCSI_SATA_VIA is not set +# CONFIG_SCSI_SATA_VITESSE is not set # CONFIG_SCSI_BUSLOGIC is not set # CONFIG_SCSI_CPQFCTS is not set # CONFIG_SCSI_DMX3191D is not set @@ -604,6 +623,11 @@ # CONFIG_PLX_HERMES is not set # CONFIG_TMD_HERMES is not set # CONFIG_PCI_HERMES is not set + +# +# Prism54 PCI/PCMCIA GT/Duette Driver - 802.11(a/b/g) +# +# CONFIG_PRISM54 is not set CONFIG_NET_WIRELESS=y # @@ -677,6 +701,7 @@ # CONFIG_AU1X00_USB_TTY is not set # CONFIG_AU1X00_USB_RAW is not set # CONFIG_TXX927_SERIAL is not set +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 @@ -719,7 +744,6 @@ # CONFIG_AMD_PM768 is not set # CONFIG_NVRAM is not set # CONFIG_RTC is not set -# CONFIG_MIPS_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set @@ -811,12 +835,13 @@ CONFIG_ROOT_NFS=y CONFIG_NFSD=y CONFIG_NFSD_V3=y -# CONFIG_NFSD_TCP is not set +CONFIG_NFSD_TCP=y CONFIG_SUNRPC=y CONFIG_LOCKD=y CONFIG_LOCKD_V4=y CONFIG_SMB_FS=m # CONFIG_SMB_NLS_DEFAULT is not set +# CONFIG_SMB_UNIX is not set # CONFIG_NCP_FS is not set # CONFIG_NCPFS_PACKET_SIGNING is not set # CONFIG_NCPFS_IOCTL_LOCKING is not set @@ -934,6 +959,8 @@ # CONFIG_SOUND_RME96XX is not set # CONFIG_SOUND_SONICVIBES is not set # CONFIG_SOUND_AU1X00 is not set +# CONFIG_SOUND_AU1550_PSC is not set +# CONFIG_SOUND_AU1550_I2S is not set # CONFIG_SOUND_TRIDENT is not set # CONFIG_SOUND_MSNDCLAS is not set # CONFIG_SOUND_MSNDPIN is not set @@ -1065,7 +1092,6 @@ CONFIG_USB_RTL8150=m CONFIG_USB_KAWETH=m CONFIG_USB_CATC=m -# CONFIG_USB_AX8817X is not set CONFIG_USB_CDCETHER=m CONFIG_USB_USBNET=m diff -urN linux-2.4.28-bk3/arch/mips/defconfig-nino linux-2.4.28-bk4/arch/mips/defconfig-nino --- linux-2.4.28-bk3/arch/mips/defconfig-nino 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/defconfig-nino 2004-11-23 02:49:27.354390451 -0800 @@ -26,10 +26,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -52,6 +54,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -76,7 +80,6 @@ # CONFIG_HIGHMEM is not set CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set -CONFIG_NEW_TIME_C=y CONFIG_NONCOHERENT_IO=y CONFIG_PC_KEYB=y # CONFIG_MIPS_AU1000 is not set @@ -112,6 +115,7 @@ # General setup # CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_BUILD_ELF64 is not set CONFIG_NET=y # CONFIG_PCI is not set # CONFIG_ISA is not set @@ -134,6 +138,7 @@ # CONFIG_BINFMT_ELF32 is not set # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # # Memory Technology Devices (MTD) @@ -163,6 +168,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set # CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set CONFIG_BLK_DEV_RAM=y @@ -211,7 +217,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set @@ -334,6 +339,7 @@ # CONFIG_SERIAL_TXX9 is not set # CONFIG_SERIAL_TXX9_CONSOLE is not set # CONFIG_TXX927_SERIAL is not set +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set # CONFIG_UNIX98_PTYS is not set # @@ -375,7 +381,6 @@ # CONFIG_AMD_PM768 is not set # CONFIG_NVRAM is not set # CONFIG_RTC is not set -# CONFIG_MIPS_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set diff -urN linux-2.4.28-bk3/arch/mips/defconfig-ocelot linux-2.4.28-bk4/arch/mips/defconfig-ocelot --- linux-2.4.28-bk3/arch/mips/defconfig-ocelot 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/defconfig-ocelot 2004-11-23 02:49:27.354390451 -0800 @@ -24,10 +24,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -50,6 +52,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -71,12 +75,10 @@ # CONFIG_HIGHMEM is not set CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set -CONFIG_PCI=y CONFIG_SYSCLK_100=y CONFIG_SWAP_IO_SPACE_W=y CONFIG_SWAP_IO_SPACE_L=y CONFIG_NONCOHERENT_IO=y -CONFIG_OLD_TIME_C=y # CONFIG_MIPS_AU1000 is not set # @@ -116,8 +118,12 @@ # General setup # # CONFIG_CPU_LITTLE_ENDIAN is not set +# CONFIG_BUILD_ELF64 is not set # CONFIG_BINFMT_IRIX is not set CONFIG_NET=y +CONFIG_PCI=y +# CONFIG_PCI_NEW is not set +# CONFIG_PCI_AUTO is not set CONFIG_PCI_NAMES=y # CONFIG_ISA is not set # CONFIG_TC is not set @@ -139,6 +145,7 @@ # CONFIG_BINFMT_ELF32 is not set # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # # Memory Technology Devices (MTD) @@ -188,7 +195,8 @@ # CONFIG_MTD_XXS1500 is not set # CONFIG_MTD_MTX1 is not set # CONFIG_MTD_DB1X00 is not set -# CONFIG_MTD_HYDIII is not set +# CONFIG_MTD_PB1550 is not set +# CONFIG_MTD_HYDROGEN3 is not set # CONFIG_MTD_MIRAGE is not set # CONFIG_MTD_CSTM_MIPS_IXX is not set CONFIG_MTD_OCELOT=y @@ -245,6 +253,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set # CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set @@ -289,7 +298,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set @@ -415,6 +423,7 @@ # CONFIG_FEALNX is not set # CONFIG_NATSEMI is not set # CONFIG_NE2K_PCI is not set +# CONFIG_FORCEDETH is not set # CONFIG_NE3210 is not set # CONFIG_ES3210 is not set # CONFIG_8139CP is not set @@ -504,6 +513,7 @@ CONFIG_SERIAL_CONSOLE=y # CONFIG_SERIAL_EXTENDED is not set # CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 @@ -634,7 +644,7 @@ CONFIG_ROOT_NFS=y CONFIG_NFSD=y # CONFIG_NFSD_V3 is not set -# CONFIG_NFSD_TCP is not set +CONFIG_NFSD_TCP=y CONFIG_SUNRPC=y CONFIG_LOCKD=y # CONFIG_SMB_FS is not set diff -urN linux-2.4.28-bk3/arch/mips/defconfig-osprey linux-2.4.28-bk4/arch/mips/defconfig-osprey --- linux-2.4.28-bk3/arch/mips/defconfig-osprey 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/defconfig-osprey 2004-11-23 02:49:27.355390492 -0800 @@ -26,10 +26,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -52,6 +54,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -75,7 +79,6 @@ # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set CONFIG_VR4181=y CONFIG_IRQ_CPU=y -CONFIG_NEW_TIME_C=y CONFIG_NONCOHERENT_IO=y CONFIG_DUMMY_KEYB=y # CONFIG_SCSI is not set @@ -114,8 +117,11 @@ # General setup # CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_BUILD_ELF64 is not set CONFIG_NET=y # CONFIG_PCI is not set +# CONFIG_PCI_NEW is not set +# CONFIG_PCI_AUTO is not set # CONFIG_ISA is not set # CONFIG_TC is not set # CONFIG_MCA is not set @@ -136,6 +142,7 @@ # CONFIG_BINFMT_ELF32 is not set # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # # Memory Technology Devices (MTD) @@ -165,6 +172,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set # CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set @@ -210,7 +218,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set @@ -381,6 +388,7 @@ # CONFIG_SERIAL_MULTIPORT is not set # CONFIG_HUB6 is not set # CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set # CONFIG_VR41XX_KIU is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 @@ -424,7 +432,6 @@ # CONFIG_AMD_PM768 is not set # CONFIG_NVRAM is not set # CONFIG_RTC is not set -# CONFIG_MIPS_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set @@ -513,7 +520,7 @@ CONFIG_ROOT_NFS=y CONFIG_NFSD=y # CONFIG_NFSD_V3 is not set -# CONFIG_NFSD_TCP is not set +CONFIG_NFSD_TCP=y CONFIG_SUNRPC=y CONFIG_LOCKD=y # CONFIG_SMB_FS is not set diff -urN linux-2.4.28-bk3/arch/mips/defconfig-pb1000 linux-2.4.28-bk4/arch/mips/defconfig-pb1000 --- linux-2.4.28-bk3/arch/mips/defconfig-pb1000 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/defconfig-pb1000 2004-11-23 02:49:27.356390533 -0800 @@ -26,11 +26,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set CONFIG_MIPS_PB1000=y -CONFIG_PCI_AUTO=y # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -53,6 +54,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -76,9 +79,6 @@ # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set CONFIG_SOC_AU1X00=y CONFIG_SOC_AU1000=y -CONFIG_NEW_TIME_C=y -CONFIG_PCI=y -CONFIG_NEW_PCI=y CONFIG_NONCOHERENT_IO=y CONFIG_PC_KEYB=y CONFIG_SWAP_IO_SPACE_W=y @@ -121,7 +121,11 @@ # General setup # CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_BUILD_ELF64 is not set CONFIG_NET=y +CONFIG_PCI=y +CONFIG_PCI_NEW=y +CONFIG_PCI_AUTO=y CONFIG_PCI_NAMES=y # CONFIG_ISA is not set # CONFIG_TC is not set @@ -138,9 +142,6 @@ # CONFIG_I82092 is not set # CONFIG_I82365 is not set CONFIG_PCMCIA_AU1X00=m -CONFIG_PCMCIA_PB1X00=y -# CONFIG_PCMCIA_DB1X00 is not set -# CONFIG_PCMCIA_XXS1500 is not set # # PCI Hotplug Support @@ -148,6 +149,10 @@ # CONFIG_HOTPLUG_PCI is not set # CONFIG_HOTPLUG_PCI_COMPAQ is not set # CONFIG_HOTPLUG_PCI_COMPAQ_NVRAM is not set +# CONFIG_HOTPLUG_PCI_SHPC is not set +# CONFIG_HOTPLUG_PCI_SHPC_POLL_EVENT_MODE is not set +# CONFIG_HOTPLUG_PCI_PCIE is not set +# CONFIG_HOTPLUG_PCI_PCIE_POLL_EVENT_MODE is not set CONFIG_SYSVIPC=y # CONFIG_BSD_PROCESS_ACCT is not set CONFIG_SYSCTL=y @@ -161,6 +166,7 @@ # CONFIG_BINFMT_ELF32 is not set # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # CONFIG_PM is not set # @@ -210,7 +216,8 @@ # CONFIG_MTD_XXS1500 is not set # CONFIG_MTD_MTX1 is not set # CONFIG_MTD_DB1X00 is not set -# CONFIG_MTD_HYDIII is not set +# CONFIG_MTD_PB1550 is not set +# CONFIG_MTD_HYDROGEN3 is not set # CONFIG_MTD_MIRAGE is not set # CONFIG_MTD_CSTM_MIPS_IXX is not set # CONFIG_MTD_OCELOT is not set @@ -262,6 +269,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set # CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set @@ -307,7 +315,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set @@ -365,10 +372,12 @@ # # CONFIG_BLK_DEV_HD_IDE is not set # CONFIG_BLK_DEV_HD is not set +# CONFIG_BLK_DEV_IDE_SATA is not set CONFIG_BLK_DEV_IDEDISK=y # CONFIG_IDEDISK_MULTI_MODE is not set # CONFIG_IDEDISK_STROKE is not set CONFIG_BLK_DEV_IDECS=m +# CONFIG_BLK_DEV_DELKIN is not set # CONFIG_BLK_DEV_IDECD is not set # CONFIG_BLK_DEV_IDETAPE is not set # CONFIG_BLK_DEV_IDEFLOPPY is not set @@ -388,6 +397,7 @@ # CONFIG_BLK_DEV_ATARAID is not set # CONFIG_BLK_DEV_ATARAID_PDC is not set # CONFIG_BLK_DEV_ATARAID_HPT is not set +# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set # CONFIG_BLK_DEV_ATARAID_SII is not set # @@ -612,6 +622,7 @@ # CONFIG_AU1X00_USB_TTY is not set # CONFIG_AU1X00_USB_RAW is not set # CONFIG_TXX927_SERIAL is not set +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 @@ -676,7 +687,6 @@ # CONFIG_AMD_PM768 is not set # CONFIG_NVRAM is not set # CONFIG_RTC is not set -# CONFIG_MIPS_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set @@ -877,6 +887,8 @@ # CONFIG_SOUND_RME96XX is not set # CONFIG_SOUND_SONICVIBES is not set CONFIG_SOUND_AU1X00=y +# CONFIG_SOUND_AU1550_PSC is not set +# CONFIG_SOUND_AU1550_I2S is not set # CONFIG_SOUND_TRIDENT is not set # CONFIG_SOUND_MSNDCLAS is not set # CONFIG_SOUND_MSNDPIN is not set @@ -966,7 +978,6 @@ # CONFIG_USB_RTL8150 is not set # CONFIG_USB_KAWETH is not set # CONFIG_USB_CATC is not set -# CONFIG_USB_AX8817X is not set # CONFIG_USB_CDCETHER is not set # CONFIG_USB_USBNET is not set diff -urN linux-2.4.28-bk3/arch/mips/defconfig-pb1100 linux-2.4.28-bk4/arch/mips/defconfig-pb1100 --- linux-2.4.28-bk3/arch/mips/defconfig-pb1100 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/defconfig-pb1100 2004-11-23 02:49:27.358390614 -0800 @@ -26,10 +26,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set CONFIG_MIPS_PB1100=y # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -52,6 +54,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -75,10 +79,6 @@ # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set CONFIG_SOC_AU1X00=y CONFIG_SOC_AU1100=y -CONFIG_NEW_TIME_C=y -CONFIG_PCI=y -# CONFIG_PCI_AUTO is not set -CONFIG_NEW_PCI=y CONFIG_NONCOHERENT_IO=y CONFIG_PC_KEYB=y CONFIG_SWAP_IO_SPACE_W=y @@ -121,7 +121,11 @@ # General setup # CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_BUILD_ELF64 is not set CONFIG_NET=y +CONFIG_PCI=y +CONFIG_PCI_NEW=y +# CONFIG_PCI_AUTO is not set CONFIG_PCI_NAMES=y # CONFIG_ISA is not set # CONFIG_TC is not set @@ -143,6 +147,7 @@ # CONFIG_BINFMT_ELF32 is not set # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # CONFIG_PM is not set # @@ -194,7 +199,8 @@ CONFIG_MTD_PB1500_BOOT=y CONFIG_MTD_PB1500_USER=y # CONFIG_MTD_DB1X00 is not set -# CONFIG_MTD_HYDIII is not set +# CONFIG_MTD_PB1550 is not set +# CONFIG_MTD_HYDROGEN3 is not set # CONFIG_MTD_MIRAGE is not set # CONFIG_MTD_CSTM_MIPS_IXX is not set # CONFIG_MTD_OCELOT is not set @@ -246,6 +252,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set CONFIG_BLK_DEV_LOOP=y # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set @@ -308,7 +315,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set @@ -366,10 +372,12 @@ # # CONFIG_BLK_DEV_HD_IDE is not set # CONFIG_BLK_DEV_HD is not set +# CONFIG_BLK_DEV_IDE_SATA is not set CONFIG_BLK_DEV_IDEDISK=y # CONFIG_IDEDISK_MULTI_MODE is not set # CONFIG_IDEDISK_STROKE is not set # CONFIG_BLK_DEV_IDECS is not set +# CONFIG_BLK_DEV_DELKIN is not set # CONFIG_BLK_DEV_IDECD is not set # CONFIG_BLK_DEV_IDETAPE is not set # CONFIG_BLK_DEV_IDEFLOPPY is not set @@ -389,6 +397,7 @@ # CONFIG_BLK_DEV_ATARAID is not set # CONFIG_BLK_DEV_ATARAID_PDC is not set # CONFIG_BLK_DEV_ATARAID_HPT is not set +# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set # CONFIG_BLK_DEV_ATARAID_SII is not set # @@ -604,6 +613,7 @@ # CONFIG_AU1X00_USB_TTY is not set # CONFIG_AU1X00_USB_RAW is not set # CONFIG_TXX927_SERIAL is not set +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 @@ -668,7 +678,6 @@ # CONFIG_AMD_PM768 is not set # CONFIG_NVRAM is not set CONFIG_RTC=y -# CONFIG_MIPS_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set @@ -762,11 +771,12 @@ CONFIG_ROOT_NFS=y CONFIG_NFSD=m # CONFIG_NFSD_V3 is not set -# CONFIG_NFSD_TCP is not set +CONFIG_NFSD_TCP=y CONFIG_SUNRPC=y CONFIG_LOCKD=y CONFIG_SMB_FS=m # CONFIG_SMB_NLS_DEFAULT is not set +# CONFIG_SMB_UNIX is not set # CONFIG_NCP_FS is not set # CONFIG_NCPFS_PACKET_SIGNING is not set # CONFIG_NCPFS_IOCTL_LOCKING is not set @@ -906,6 +916,8 @@ # CONFIG_SOUND_RME96XX is not set # CONFIG_SOUND_SONICVIBES is not set # CONFIG_SOUND_AU1X00 is not set +# CONFIG_SOUND_AU1550_PSC is not set +# CONFIG_SOUND_AU1550_I2S is not set # CONFIG_SOUND_TRIDENT is not set # CONFIG_SOUND_MSNDCLAS is not set # CONFIG_SOUND_MSNDPIN is not set @@ -995,7 +1007,6 @@ # CONFIG_USB_RTL8150 is not set # CONFIG_USB_KAWETH is not set # CONFIG_USB_CATC is not set -# CONFIG_USB_AX8817X is not set # CONFIG_USB_CDCETHER is not set # CONFIG_USB_USBNET is not set diff -urN linux-2.4.28-bk3/arch/mips/defconfig-pb1500 linux-2.4.28-bk4/arch/mips/defconfig-pb1500 --- linux-2.4.28-bk3/arch/mips/defconfig-pb1500 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/defconfig-pb1500 2004-11-23 02:49:27.359390655 -0800 @@ -26,10 +26,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set CONFIG_MIPS_PB1500=y # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -52,6 +54,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -75,10 +79,6 @@ # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set CONFIG_SOC_AU1X00=y CONFIG_SOC_AU1500=y -CONFIG_NEW_TIME_C=y -CONFIG_PCI=y -CONFIG_NEW_PCI=y -CONFIG_PCI_AUTO=y CONFIG_NONCOHERENT_IO=y CONFIG_PC_KEYB=y # CONFIG_MIPS_AU1000 is not set @@ -119,7 +119,11 @@ # General setup # CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_BUILD_ELF64 is not set CONFIG_NET=y +CONFIG_PCI=y +CONFIG_PCI_NEW=y +CONFIG_PCI_AUTO=y CONFIG_PCI_NAMES=y # CONFIG_ISA is not set # CONFIG_TC is not set @@ -136,9 +140,6 @@ # CONFIG_I82092 is not set # CONFIG_I82365 is not set CONFIG_PCMCIA_AU1X00=m -CONFIG_PCMCIA_PB1X00=y -# CONFIG_PCMCIA_DB1X00 is not set -# CONFIG_PCMCIA_XXS1500 is not set # # PCI Hotplug Support @@ -146,6 +147,10 @@ # CONFIG_HOTPLUG_PCI is not set # CONFIG_HOTPLUG_PCI_COMPAQ is not set # CONFIG_HOTPLUG_PCI_COMPAQ_NVRAM is not set +# CONFIG_HOTPLUG_PCI_SHPC is not set +# CONFIG_HOTPLUG_PCI_SHPC_POLL_EVENT_MODE is not set +# CONFIG_HOTPLUG_PCI_PCIE is not set +# CONFIG_HOTPLUG_PCI_PCIE_POLL_EVENT_MODE is not set CONFIG_SYSVIPC=y # CONFIG_BSD_PROCESS_ACCT is not set CONFIG_SYSCTL=y @@ -159,6 +164,7 @@ # CONFIG_BINFMT_ELF32 is not set # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # CONFIG_PM is not set # @@ -210,7 +216,8 @@ CONFIG_MTD_PB1500_BOOT=y # CONFIG_MTD_PB1500_USER is not set # CONFIG_MTD_DB1X00 is not set -# CONFIG_MTD_HYDIII is not set +# CONFIG_MTD_PB1550 is not set +# CONFIG_MTD_HYDROGEN3 is not set # CONFIG_MTD_MIRAGE is not set # CONFIG_MTD_CSTM_MIPS_IXX is not set # CONFIG_MTD_OCELOT is not set @@ -262,6 +269,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set CONFIG_BLK_DEV_LOOP=y # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set @@ -324,7 +332,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set @@ -382,10 +389,12 @@ # # CONFIG_BLK_DEV_HD_IDE is not set # CONFIG_BLK_DEV_HD is not set +# CONFIG_BLK_DEV_IDE_SATA is not set CONFIG_BLK_DEV_IDEDISK=y CONFIG_IDEDISK_MULTI_MODE=y # CONFIG_IDEDISK_STROKE is not set CONFIG_BLK_DEV_IDECS=m +# CONFIG_BLK_DEV_DELKIN is not set # CONFIG_BLK_DEV_IDECD is not set # CONFIG_BLK_DEV_IDETAPE is not set # CONFIG_BLK_DEV_IDEFLOPPY is not set @@ -414,6 +423,7 @@ # CONFIG_WDC_ALI15X3 is not set # CONFIG_BLK_DEV_AMD74XX is not set # CONFIG_AMD74XX_OVERRIDE is not set +# CONFIG_BLK_DEV_ATIIXP is not set # CONFIG_BLK_DEV_CMD64X is not set # CONFIG_BLK_DEV_TRIFLEX is not set # CONFIG_BLK_DEV_CY82C693 is not set @@ -442,6 +452,7 @@ # CONFIG_BLK_DEV_ATARAID is not set # CONFIG_BLK_DEV_ATARAID_PDC is not set # CONFIG_BLK_DEV_ATARAID_HPT is not set +# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set # CONFIG_BLK_DEV_ATARAID_SII is not set # @@ -523,6 +534,7 @@ # CONFIG_FEALNX is not set # CONFIG_NATSEMI is not set # CONFIG_NE2K_PCI is not set +# CONFIG_FORCEDETH is not set # CONFIG_NE3210 is not set # CONFIG_ES3210 is not set # CONFIG_8139CP is not set @@ -663,6 +675,7 @@ # CONFIG_AU1X00_USB_TTY is not set # CONFIG_AU1X00_USB_RAW is not set # CONFIG_TXX927_SERIAL is not set +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 @@ -727,7 +740,6 @@ # CONFIG_AMD_PM768 is not set # CONFIG_NVRAM is not set CONFIG_RTC=y -# CONFIG_MIPS_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set @@ -827,11 +839,12 @@ CONFIG_ROOT_NFS=y CONFIG_NFSD=m # CONFIG_NFSD_V3 is not set -# CONFIG_NFSD_TCP is not set +CONFIG_NFSD_TCP=y CONFIG_SUNRPC=y CONFIG_LOCKD=y CONFIG_SMB_FS=m # CONFIG_SMB_NLS_DEFAULT is not set +# CONFIG_SMB_UNIX is not set # CONFIG_NCP_FS is not set # CONFIG_NCPFS_PACKET_SIGNING is not set # CONFIG_NCPFS_IOCTL_LOCKING is not set @@ -972,6 +985,8 @@ # CONFIG_SOUND_RME96XX is not set # CONFIG_SOUND_SONICVIBES is not set CONFIG_SOUND_AU1X00=y +# CONFIG_SOUND_AU1550_PSC is not set +# CONFIG_SOUND_AU1550_I2S is not set # CONFIG_SOUND_TRIDENT is not set # CONFIG_SOUND_MSNDCLAS is not set # CONFIG_SOUND_MSNDPIN is not set @@ -1061,7 +1076,6 @@ # CONFIG_USB_RTL8150 is not set # CONFIG_USB_KAWETH is not set # CONFIG_USB_CATC is not set -# CONFIG_USB_AX8817X is not set # CONFIG_USB_CDCETHER is not set # CONFIG_USB_USBNET is not set diff -urN linux-2.4.28-bk3/arch/mips/defconfig-pb1550 linux-2.4.28-bk4/arch/mips/defconfig-pb1550 --- linux-2.4.28-bk3/arch/mips/defconfig-pb1550 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/defconfig-pb1550 2004-11-23 02:49:27.360390696 -0800 @@ -26,10 +26,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +CONFIG_MIPS_PB1550=y # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -52,6 +54,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -75,10 +79,6 @@ # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set CONFIG_SOC_AU1X00=y CONFIG_SOC_AU1550=y -CONFIG_NEW_TIME_C=y -CONFIG_PCI=y -CONFIG_NEW_PCI=y -CONFIG_PCI_AUTO=y # CONFIG_NONCOHERENT_IO is not set CONFIG_PC_KEYB=y # CONFIG_MIPS_AU1000 is not set @@ -119,15 +119,38 @@ # General setup # CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_BUILD_ELF64 is not set CONFIG_NET=y +CONFIG_PCI=y +CONFIG_PCI_NEW=y +CONFIG_PCI_AUTO=y # CONFIG_PCI_NAMES is not set # CONFIG_ISA is not set # CONFIG_TC is not set # CONFIG_MCA is not set # CONFIG_SBUS is not set -# CONFIG_HOTPLUG is not set -# CONFIG_PCMCIA is not set +CONFIG_HOTPLUG=y + +# +# PCMCIA/CardBus support +# +CONFIG_PCMCIA=m +# CONFIG_CARDBUS is not set +# CONFIG_TCIC is not set +# CONFIG_I82092 is not set +# CONFIG_I82365 is not set +CONFIG_PCMCIA_AU1X00=m + +# +# PCI Hotplug Support +# # CONFIG_HOTPLUG_PCI is not set +# CONFIG_HOTPLUG_PCI_COMPAQ is not set +# CONFIG_HOTPLUG_PCI_COMPAQ_NVRAM is not set +# CONFIG_HOTPLUG_PCI_SHPC is not set +# CONFIG_HOTPLUG_PCI_SHPC_POLL_EVENT_MODE is not set +# CONFIG_HOTPLUG_PCI_PCIE is not set +# CONFIG_HOTPLUG_PCI_PCIE_POLL_EVENT_MODE is not set CONFIG_SYSVIPC=y # CONFIG_BSD_PROCESS_ACCT is not set CONFIG_SYSCTL=y @@ -141,12 +164,89 @@ # CONFIG_BINFMT_ELF32 is not set # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # CONFIG_PM is not set # # Memory Technology Devices (MTD) # -# CONFIG_MTD is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_CONCAT is not set +# CONFIG_MTD_REDBOOT_PARTS is not set +# CONFIG_MTD_CMDLINE_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +# CONFIG_MTD_CFI_ADV_OPTIONS is not set +CONFIG_MTD_CFI_INTELEXT=y +CONFIG_MTD_CFI_AMDSTD=y +# CONFIG_MTD_CFI_STAA is not set +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# CONFIG_MTD_OBSOLETE_CHIPS is not set +# CONFIG_MTD_AMDSTD is not set +# CONFIG_MTD_SHARP is not set +# CONFIG_MTD_JEDEC is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_PHYSMAP is not set +# CONFIG_MTD_PB1000 is not set +# CONFIG_MTD_PB1500 is not set +# CONFIG_MTD_PB1100 is not set +# CONFIG_MTD_BOSPORUS is not set +# CONFIG_MTD_XXS1500 is not set +# CONFIG_MTD_MTX1 is not set +# CONFIG_MTD_DB1X00 is not set +CONFIG_MTD_PB1550=y +CONFIG_MTD_PB1550_BOOT=y +CONFIG_MTD_PB1550_USER=y +# CONFIG_MTD_HYDROGEN3 is not set +# CONFIG_MTD_MIRAGE is not set +# CONFIG_MTD_CSTM_MIPS_IXX is not set +# CONFIG_MTD_OCELOT is not set +# CONFIG_MTD_LASAT is not set +# CONFIG_MTD_PCI is not set +# CONFIG_MTD_PCMCIA is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLKMTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC1000 is not set +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOCPROBE is not set + +# +# NAND Flash Device Drivers +# +CONFIG_MTD_NAND=m +# CONFIG_MTD_NAND_VERIFY_WRITE is not set +CONFIG_MTD_NAND_IDS=m # # Parallel port support @@ -171,6 +271,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set CONFIG_BLK_DEV_LOOP=y # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set @@ -233,7 +334,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set @@ -291,10 +391,12 @@ # # CONFIG_BLK_DEV_HD_IDE is not set # CONFIG_BLK_DEV_HD is not set -# CONFIG_BLK_DEV_IDEDISK is not set +# CONFIG_BLK_DEV_IDE_SATA is not set +CONFIG_BLK_DEV_IDEDISK=y # CONFIG_IDEDISK_MULTI_MODE is not set # CONFIG_IDEDISK_STROKE is not set -# CONFIG_BLK_DEV_IDECS is not set +CONFIG_BLK_DEV_IDECS=m +# CONFIG_BLK_DEV_DELKIN is not set # CONFIG_BLK_DEV_IDECD is not set # CONFIG_BLK_DEV_IDETAPE is not set # CONFIG_BLK_DEV_IDEFLOPPY is not set @@ -323,6 +425,7 @@ # CONFIG_WDC_ALI15X3 is not set # CONFIG_BLK_DEV_AMD74XX is not set # CONFIG_AMD74XX_OVERRIDE is not set +# CONFIG_BLK_DEV_ATIIXP is not set # CONFIG_BLK_DEV_CMD64X is not set # CONFIG_BLK_DEV_TRIFLEX is not set # CONFIG_BLK_DEV_CY82C693 is not set @@ -353,6 +456,7 @@ # CONFIG_BLK_DEV_ATARAID is not set # CONFIG_BLK_DEV_ATARAID_PDC is not set # CONFIG_BLK_DEV_ATARAID_HPT is not set +# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set # CONFIG_BLK_DEV_ATARAID_SII is not set # @@ -464,58 +568,19 @@ # CONFIG_WAN is not set # -# Amateur Radio support +# PCMCIA network device support # -# CONFIG_HAMRADIO is not set +# CONFIG_NET_PCMCIA is not set # -# IrDA (infrared) support -# -CONFIG_IRDA=y - -# -# IrDA protocols -# -CONFIG_IRLAN=m -# CONFIG_IRNET is not set -CONFIG_IRCOMM=m -# CONFIG_IRDA_ULTRA is not set - -# -# IrDA options -# -CONFIG_IRDA_CACHE_LAST_LSAP=y -CONFIG_IRDA_FAST_RR=y -# CONFIG_IRDA_DEBUG is not set - -# -# Infrared-port device drivers -# - -# -# SIR device drivers -# -# CONFIG_IRTTY_SIR is not set -# CONFIG_IRPORT_SIR is not set - -# -# Dongle support +# Amateur Radio support # -# CONFIG_DONGLE is not set +# CONFIG_HAMRADIO is not set # -# FIR device drivers +# IrDA (infrared) support # -# CONFIG_USB_IRDA is not set -# CONFIG_NSC_FIR is not set -# CONFIG_WINBOND_FIR is not set -# CONFIG_TOSHIBA_OLD is not set -# CONFIG_TOSHIBA_FIR is not set -CONFIG_AU1000_FIR=m -# CONFIG_SMC_IRCC_FIR is not set -# CONFIG_ALI_FIR is not set -# CONFIG_VLSI_FIR is not set -# CONFIG_VIA_IRCC_FIR is not set +# CONFIG_IRDA is not set # # ISDN subsystem @@ -568,6 +633,7 @@ # CONFIG_AU1X00_USB_TTY is not set # CONFIG_AU1X00_USB_RAW is not set # CONFIG_TXX927_SERIAL is not set +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 @@ -632,7 +698,6 @@ # CONFIG_AMD_PM768 is not set # CONFIG_NVRAM is not set # CONFIG_RTC is not set -# CONFIG_MIPS_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set @@ -647,6 +712,12 @@ # Direct Rendering Manager (XFree86 DRI support) # # CONFIG_DRM is not set + +# +# PCMCIA character devices +# +# CONFIG_PCMCIA_SERIAL_CS is not set +# CONFIG_SYNCLINK_CS is not set # CONFIG_AU1X00_GPIO is not set # CONFIG_TS_AU1X00_ADS7846 is not set @@ -677,7 +748,8 @@ CONFIG_VFAT_FS=y # CONFIG_EFS_FS is not set # CONFIG_JFFS_FS is not set -# CONFIG_JFFS2_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 # CONFIG_CRAMFS is not set CONFIG_TMPFS=y CONFIG_RAMFS=y @@ -848,12 +920,136 @@ # # Sound # -# CONFIG_SOUND is not set +CONFIG_SOUND=y +# CONFIG_SOUND_ALI5455 is not set +# CONFIG_SOUND_BT878 is not set +# CONFIG_SOUND_CMPCI is not set +# CONFIG_SOUND_EMU10K1 is not set +# CONFIG_MIDI_EMU10K1 is not set +# CONFIG_SOUND_FUSION is not set +# CONFIG_SOUND_CS4281 is not set +# CONFIG_SOUND_ES1370 is not set +# CONFIG_SOUND_ES1371 is not set +# CONFIG_SOUND_ESSSOLO1 is not set +# CONFIG_SOUND_MAESTRO is not set +# CONFIG_SOUND_MAESTRO3 is not set +# CONFIG_SOUND_FORTE is not set +# CONFIG_SOUND_ICH is not set +# CONFIG_SOUND_RME96XX is not set +# CONFIG_SOUND_SONICVIBES is not set +# CONFIG_SOUND_AU1X00 is not set +CONFIG_SOUND_AU1550_PSC=y +# CONFIG_SOUND_AU1550_I2S is not set +# CONFIG_SOUND_TRIDENT is not set +# CONFIG_SOUND_MSNDCLAS is not set +# CONFIG_SOUND_MSNDPIN is not set +# CONFIG_SOUND_VIA82CXXX is not set +# CONFIG_MIDI_VIA82CXXX is not set +# CONFIG_SOUND_OSS is not set +# CONFIG_SOUND_TVMIXER is not set +# CONFIG_SOUND_AD1980 is not set +# CONFIG_SOUND_WM97XX is not set # # USB support # -# CONFIG_USB is not set +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set + +# +# Miscellaneous USB options +# +# CONFIG_USB_DEVICEFS is not set +# CONFIG_USB_BANDWIDTH is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_EHCI_HCD is not set +# CONFIG_USB_UHCI is not set +# CONFIG_USB_UHCI_ALT is not set +CONFIG_USB_OHCI=y + +# +# USB Device Class drivers +# +# CONFIG_USB_AUDIO is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_BLUETOOTH is not set +# CONFIG_USB_MIDI is not set + +# +# SCSI support is needed for USB Storage +# +# CONFIG_USB_STORAGE is not set +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_DPCM is not set +# CONFIG_USB_STORAGE_HP8200e is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set + +# +# USB Human Interface Devices (HID) +# +CONFIG_USB_HID=y +CONFIG_USB_HIDINPUT=y +# CONFIG_USB_HIDDEV is not set +# CONFIG_USB_AIPTEK is not set +# CONFIG_USB_WACOM is not set +# CONFIG_USB_KBTAB is not set +# CONFIG_USB_POWERMATE is not set + +# +# USB Imaging devices +# +# CONFIG_USB_DC2XX is not set +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_SCANNER is not set +# CONFIG_USB_MICROTEK is not set +# CONFIG_USB_HPUSBSCSI is not set + +# +# USB Multimedia devices +# + +# +# Video4Linux support is needed for USB Multimedia device support +# + +# +# USB Network adaptors +# +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_CATC is not set +# CONFIG_USB_CDCETHER is not set +# CONFIG_USB_USBNET is not set + +# +# USB port drivers +# +# CONFIG_USB_USS720 is not set + +# +# USB Serial Converter support +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_AUERSWALD is not set +# CONFIG_USB_TIGL is not set +# CONFIG_USB_BRLVGER is not set +# CONFIG_USB_LCD is not set # # Support for USB gadgets @@ -886,5 +1082,6 @@ # Library routines # # CONFIG_CRC32 is not set -CONFIG_ZLIB_INFLATE=m -CONFIG_ZLIB_DEFLATE=m +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +# CONFIG_FW_LOADER is not set diff -urN linux-2.4.28-bk3/arch/mips/defconfig-rbtx4927 linux-2.4.28-bk4/arch/mips/defconfig-rbtx4927 --- linux-2.4.28-bk3/arch/mips/defconfig-rbtx4927 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/defconfig-rbtx4927 2004-11-23 02:49:27.361390736 -0800 @@ -24,10 +24,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -50,6 +52,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -71,10 +75,6 @@ # CONFIG_HIGHMEM is not set CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set -CONFIG_NEW_TIME_C=y -CONFIG_PCI=y -CONFIG_NEW_PCI=y -CONFIG_PCI_AUTO=y CONFIG_SWAP_IO_SPACE_W=y CONFIG_SWAP_IO_SPACE_L=y CONFIG_ISA=y @@ -114,7 +114,11 @@ # General setup # CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_BUILD_ELF64 is not set CONFIG_NET=y +CONFIG_PCI=y +CONFIG_PCI_NEW=y +CONFIG_PCI_AUTO=y # CONFIG_PCI_NAMES is not set # CONFIG_TC is not set # CONFIG_MCA is not set @@ -135,6 +139,7 @@ # CONFIG_BINFMT_ELF32 is not set # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # # Memory Technology Devices (MTD) @@ -164,6 +169,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set CONFIG_BLK_DEV_LOOP=y # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set @@ -208,7 +214,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set @@ -346,6 +351,7 @@ # CONFIG_FEALNX is not set # CONFIG_NATSEMI is not set # CONFIG_NE2K_PCI is not set +# CONFIG_FORCEDETH is not set # CONFIG_NE3210 is not set # CONFIG_ES3210 is not set # CONFIG_8139CP is not set @@ -460,6 +466,7 @@ CONFIG_SERIAL_TXX9=y CONFIG_SERIAL_TXX9_CONSOLE=y # CONFIG_TXX927_SERIAL is not set +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set # CONFIG_UNIX98_PTYS is not set # @@ -501,7 +508,6 @@ # CONFIG_AMD_PM768 is not set # CONFIG_NVRAM is not set # CONFIG_RTC is not set -# CONFIG_MIPS_RTC is not set CONFIG_DS1742=y # CONFIG_DTLK is not set # CONFIG_R3964 is not set diff -urN linux-2.4.28-bk3/arch/mips/defconfig-rm200 linux-2.4.28-bk4/arch/mips/defconfig-rm200 --- linux-2.4.28-bk3/arch/mips/defconfig-rm200 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/defconfig-rm200 2004-11-23 02:49:27.362390777 -0800 @@ -26,10 +26,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -52,6 +54,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -79,9 +83,7 @@ CONFIG_I8259=y CONFIG_ISA=y CONFIG_NONCOHERENT_IO=y -CONFIG_OLD_TIME_C=y CONFIG_PC_KEYB=y -CONFIG_PCI=y # CONFIG_MIPS_AU1000 is not set # @@ -118,8 +120,12 @@ # General setup # CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_BUILD_ELF64 is not set # CONFIG_ARC_CONSOLE is not set CONFIG_NET=y +CONFIG_PCI=y +# CONFIG_PCI_NEW is not set +# CONFIG_PCI_AUTO is not set CONFIG_EISA=y # CONFIG_PCI_NAMES is not set # CONFIG_TC is not set @@ -141,6 +147,7 @@ # CONFIG_BINFMT_ELF32 is not set # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # # Memory Technology Devices (MTD) @@ -170,6 +177,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set # CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set @@ -212,7 +220,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set @@ -333,6 +340,7 @@ # CONFIG_SERIAL is not set # CONFIG_SERIAL_EXTENDED is not set # CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 diff -urN linux-2.4.28-bk3/arch/mips/defconfig-sb1250-swarm linux-2.4.28-bk4/arch/mips/defconfig-sb1250-swarm --- linux-2.4.28-bk3/arch/mips/defconfig-sb1250-swarm 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/defconfig-sb1250-swarm 2004-11-23 02:49:27.363390818 -0800 @@ -26,10 +26,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -52,6 +54,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -84,7 +88,6 @@ # CONFIG_SIBYTE_BW_TRACE is not set # CONFIG_SIBYTE_SB1250_PROF is not set # CONFIG_SIBYTE_TBPROF is not set -# CONFIG_PCI is not set CONFIG_SIBYTE_GENBUS_IDE=y CONFIG_SMP_CAPABLE=y # CONFIG_SNI_RM200_PCI is not set @@ -97,7 +100,6 @@ # CONFIG_HIGHMEM is not set CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set -CONFIG_NEW_TIME_C=y CONFIG_DUMMY_KEYB=y CONFIG_SWAP_IO_SPACE_W=y CONFIG_SWAP_IO_SPACE_L=y @@ -143,9 +145,12 @@ # General setup # # CONFIG_CPU_LITTLE_ENDIAN is not set +# CONFIG_BUILD_ELF64 is not set # CONFIG_BINFMT_IRIX is not set CONFIG_NET=y # CONFIG_PCI is not set +# CONFIG_PCI_NEW is not set +# CONFIG_PCI_AUTO is not set # CONFIG_ISA is not set # CONFIG_TC is not set # CONFIG_MCA is not set @@ -166,6 +171,7 @@ # CONFIG_BINFMT_ELF32 is not set # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # # Memory Technology Devices (MTD) @@ -195,6 +201,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set # CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set @@ -237,7 +244,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set @@ -295,10 +301,12 @@ # # CONFIG_BLK_DEV_HD_IDE is not set # CONFIG_BLK_DEV_HD is not set +# CONFIG_BLK_DEV_IDE_SATA is not set CONFIG_BLK_DEV_IDEDISK=y # CONFIG_IDEDISK_MULTI_MODE is not set # CONFIG_IDEDISK_STROKE is not set # CONFIG_BLK_DEV_IDECS is not set +# CONFIG_BLK_DEV_DELKIN is not set # CONFIG_BLK_DEV_IDECD is not set # CONFIG_BLK_DEV_IDETAPE is not set # CONFIG_BLK_DEV_IDEFLOPPY is not set @@ -318,6 +326,7 @@ # CONFIG_BLK_DEV_ATARAID is not set # CONFIG_BLK_DEV_ATARAID_PDC is not set # CONFIG_BLK_DEV_ATARAID_HPT is not set +# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set # CONFIG_BLK_DEV_ATARAID_SII is not set # @@ -353,7 +362,6 @@ # Ethernet (10 or 100Mbit) # CONFIG_NET_ETHERNET=y -CONFIG_NET_SB1250_MAC=y # CONFIG_SUNLANCE is not set # CONFIG_SUNBMAC is not set # CONFIG_SUNQE is not set @@ -377,6 +385,7 @@ # CONFIG_HAMACHI is not set # CONFIG_YELLOWFIN is not set # CONFIG_R8169 is not set +CONFIG_NET_SB1250_MAC=y # CONFIG_SK98LIN is not set # CONFIG_TIGON3 is not set # CONFIG_FDDI is not set @@ -460,6 +469,7 @@ CONFIG_SIBYTE_SB1250_DUART=y CONFIG_SIBYTE_SB1250_DUART_CONSOLE=y CONFIG_SERIAL_CONSOLE=y +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 @@ -502,7 +512,6 @@ # CONFIG_AMD_PM768 is not set # CONFIG_NVRAM is not set # CONFIG_RTC is not set -# CONFIG_MIPS_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set diff -urN linux-2.4.28-bk3/arch/mips/defconfig-sead linux-2.4.28-bk4/arch/mips/defconfig-sead --- linux-2.4.28-bk3/arch/mips/defconfig-sead 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/defconfig-sead 2004-11-23 02:49:27.364390859 -0800 @@ -24,10 +24,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -50,6 +52,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -73,9 +77,7 @@ # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set CONFIG_BOOT_ELF32=y CONFIG_L1_CACHE_SHIFT=5 -CONFIG_NEW_TIME_C=y CONFIG_NONCOHERENT_IO=y -# CONFIG_PCI is not set # CONFIG_MIPS_AU1000 is not set # @@ -114,6 +116,7 @@ # General setup # CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_BUILD_ELF64 is not set # CONFIG_NET is not set # CONFIG_PCI is not set # CONFIG_ISA is not set @@ -136,6 +139,7 @@ # CONFIG_BINFMT_ELF32 is not set # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # # Memory Technology Devices (MTD) @@ -165,6 +169,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set CONFIG_BLK_DEV_LOOP=y # CONFIG_BLK_DEV_NBD is not set CONFIG_BLK_DEV_RAM=y @@ -239,6 +244,7 @@ CONFIG_SERIAL_CONSOLE=y # CONFIG_SERIAL_EXTENDED is not set # CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set # CONFIG_UNIX98_PTYS is not set # @@ -280,7 +286,6 @@ # CONFIG_AMD_PM768 is not set # CONFIG_NVRAM is not set # CONFIG_RTC is not set -# CONFIG_MIPS_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set diff -urN linux-2.4.28-bk3/arch/mips/defconfig-stretch linux-2.4.28-bk4/arch/mips/defconfig-stretch --- linux-2.4.28-bk3/arch/mips/defconfig-stretch 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/defconfig-stretch 2004-11-23 02:49:27.365390899 -0800 @@ -0,0 +1,721 @@ +# +# Automatically generated make config: don't edit +# +CONFIG_MIPS=y +CONFIG_MIPS32=y +# CONFIG_MIPS64 is not set + +# +# Code maturity level options +# +CONFIG_EXPERIMENTAL=y + +# +# Loadable module support +# +CONFIG_MODULES=y +CONFIG_MODVERSIONS=y +CONFIG_KMOD=y + +# +# Machine selection +# +# CONFIG_ACER_PICA_61 is not set +# CONFIG_MIPS_BOSPORUS is not set +# CONFIG_MIPS_MIRAGE is not set +# CONFIG_MIPS_DB1000 is not set +# CONFIG_MIPS_DB1100 is not set +# CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set +# CONFIG_MIPS_PB1000 is not set +# CONFIG_MIPS_PB1100 is not set +# CONFIG_MIPS_PB1500 is not set +# CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set +# CONFIG_MIPS_XXS1500 is not set +# CONFIG_MIPS_MTX1 is not set +# CONFIG_COGENT_CSB250 is not set +# CONFIG_BAGET_MIPS is not set +# CONFIG_CASIO_E55 is not set +# CONFIG_MIPS_COBALT is not set +# CONFIG_DECSTATION is not set +# CONFIG_MIPS_EV64120 is not set +# CONFIG_MIPS_EV96100 is not set +# CONFIG_MIPS_IVR is not set +# CONFIG_HP_LASERJET is not set +# CONFIG_IBM_WORKPAD is not set +# CONFIG_LASAT is not set +# CONFIG_MIPS_ITE8172 is not set +# CONFIG_MIPS_ATLAS is not set +# CONFIG_MIPS_MAGNUM_4000 is not set +# CONFIG_MIPS_MALTA is not set +# CONFIG_MIPS_SEAD is not set +# CONFIG_MOMENCO_OCELOT is not set +# CONFIG_MOMENCO_OCELOT_G is not set +# CONFIG_MOMENCO_OCELOT_C is not set +# CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +CONFIG_PMC_STRETCH=y +# CONFIG_PMC_YOSEMITE is not set +# CONFIG_DDB5074 is not set +# CONFIG_DDB5476 is not set +# CONFIG_DDB5477 is not set +# CONFIG_NEC_OSPREY is not set +# CONFIG_NEC_EAGLE is not set +# CONFIG_OLIVETTI_M700 is not set +# CONFIG_NINO is not set +# CONFIG_SGI_IP22 is not set +# CONFIG_SGI_IP27 is not set +# CONFIG_SIBYTE_SB1xxx_SOC is not set +# CONFIG_SNI_RM200_PCI is not set +# CONFIG_TANBAC_TB0226 is not set +# CONFIG_TANBAC_TB0229 is not set +# CONFIG_TOSHIBA_JMR3927 is not set +# CONFIG_TOSHIBA_RBTX4927 is not set +# CONFIG_VICTOR_MPC30X is not set +# CONFIG_ZAO_CAPCELLA is not set +# CONFIG_HIGHMEM is not set +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set +CONFIG_SWAP_IO_SPACE_W=y +CONFIG_SWAP_IO_SPACE_L=y +CONFIG_PCI=y +CONFIG_BOOT_ELF32=y +CONFIG_NONCOHERENT_IO=y +# CONFIG_MIPS_AU1000 is not set + +# +# CPU selection +# +# CONFIG_CPU_MIPS32 is not set +# CONFIG_CPU_MIPS64 is not set +# CONFIG_CPU_R3000 is not set +# CONFIG_CPU_TX39XX is not set +# CONFIG_CPU_VR41XX is not set +# CONFIG_CPU_R4300 is not set +# CONFIG_CPU_R4X00 is not set +# CONFIG_CPU_TX49XX is not set +# CONFIG_CPU_R5000 is not set +# CONFIG_CPU_R5432 is not set +# CONFIG_CPU_R6000 is not set +# CONFIG_CPU_NEVADA is not set +# CONFIG_CPU_R8000 is not set +# CONFIG_CPU_R10000 is not set +CONFIG_CPU_RM7000=y +# CONFIG_CPU_RM9000 is not set +# CONFIG_CPU_SB1 is not set +CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_16KB is not set +# CONFIG_PAGE_SIZE_64KB is not set +CONFIG_BOARD_SCACHE=y +CONFIG_CPU_HAS_PREFETCH=y +CONFIG_RM7000_CPU_SCACHE=y +# CONFIG_64BIT_PHYS_ADDR is not set +# CONFIG_CPU_ADVANCED is not set +CONFIG_CPU_HAS_LLSC=y +CONFIG_CPU_HAS_LLDSCD=y +# CONFIG_CPU_HAS_WB is not set +CONFIG_CPU_HAS_SYNC=y + +# +# General setup +# +# CONFIG_CPU_LITTLE_ENDIAN is not set +# CONFIG_BUILD_ELF64 is not set +# CONFIG_BINFMT_IRIX is not set +CONFIG_NET=y +CONFIG_PCI=y +# CONFIG_PCI_NEW is not set +CONFIG_PCI_AUTO=y +# CONFIG_PCI_NAMES is not set +# CONFIG_ISA is not set +# CONFIG_TC is not set +# CONFIG_MCA is not set +# CONFIG_SBUS is not set +# CONFIG_HOTPLUG is not set +# CONFIG_PCMCIA is not set +# CONFIG_HOTPLUG_PCI is not set +CONFIG_SYSVIPC=y +# CONFIG_BSD_PROCESS_ACCT is not set +CONFIG_SYSCTL=y +CONFIG_KCORE_ELF=y +# CONFIG_KCORE_AOUT is not set +# CONFIG_BINFMT_AOUT is not set +CONFIG_BINFMT_ELF=y +# CONFIG_MIPS32_COMPAT is not set +# CONFIG_MIPS32_O32 is not set +# CONFIG_MIPS32_N32 is not set +# CONFIG_BINFMT_ELF32 is not set +# CONFIG_BINFMT_MISC is not set +# CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set + +# +# Memory Technology Devices (MTD) +# +# CONFIG_MTD is not set + +# +# Parallel port support +# +# CONFIG_PARPORT is not set + +# +# Plug and Play configuration +# +# CONFIG_PNP is not set +# CONFIG_ISAPNP is not set + +# +# Block devices +# +# CONFIG_BLK_DEV_FD is not set +# CONFIG_BLK_DEV_XD is not set +# CONFIG_PARIDE is not set +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_CISS_SCSI_TAPE is not set +# CONFIG_CISS_MONITOR_THREAD is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set +# CONFIG_BLK_DEV_LOOP is not set +CONFIG_BLK_DEV_NBD=y +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_SIZE=32768 +CONFIG_BLK_DEV_INITRD=y +# CONFIG_BLK_STATS is not set + +# +# MIPS initrd options +# +CONFIG_EMBEDDED_RAMDISK=y +CONFIG_EMBEDDED_RAMDISK_IMAGE="ramdisk.gz" + +# +# Multi-device support (RAID and LVM) +# +# CONFIG_MD is not set +# CONFIG_BLK_DEV_MD is not set +# CONFIG_MD_LINEAR is not set +# CONFIG_MD_RAID0 is not set +# CONFIG_MD_RAID1 is not set +# CONFIG_MD_RAID5 is not set +# CONFIG_MD_MULTIPATH is not set +# CONFIG_BLK_DEV_LVM is not set + +# +# Networking options +# +CONFIG_PACKET=y +CONFIG_PACKET_MMAP=y +# CONFIG_NETLINK_DEV is not set +# CONFIG_NETFILTER is not set +# CONFIG_FILTER is not set +CONFIG_UNIX=y +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +# CONFIG_IP_PNP_BOOTP is not set +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_INET_ECN is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_IPV6 is not set +# CONFIG_KHTTPD is not set + +# +# SCTP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_SCTP is not set +# CONFIG_ATM is not set +# CONFIG_VLAN_8021Q is not set + +# +# +# +# CONFIG_IPX is not set +# CONFIG_ATALK is not set + +# +# Appletalk devices +# +# CONFIG_DEV_APPLETALK is not set +# CONFIG_DECNET is not set +# CONFIG_BRIDGE is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_LLC is not set +# CONFIG_NET_DIVERT is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_FASTROUTE is not set +# CONFIG_NET_HW_FLOWCONTROL is not set + +# +# QoS and/or fair queueing +# +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set + +# +# Telephony Support +# +# CONFIG_PHONE is not set +# CONFIG_PHONE_IXJ is not set +# CONFIG_PHONE_IXJ_PCMCIA is not set + +# +# ATA/IDE/MFM/RLL support +# +# CONFIG_IDE is not set +# CONFIG_BLK_DEV_HD is not set + +# +# SCSI support +# +CONFIG_SCSI=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +CONFIG_SD_EXTRA_DEVS=40 +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +CONFIG_BLK_DEV_SR=y +# CONFIG_BLK_DEV_SR_VENDOR is not set +CONFIG_SR_EXTRA_DEVS=2 +CONFIG_CHR_DEV_SG=y + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +# CONFIG_SCSI_DEBUG_QUEUES is not set +# CONFIG_SCSI_MULTI_LUN is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set + +# +# SCSI low-level drivers +# +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_SCSI_7000FASST is not set +# CONFIG_SCSI_ACARD is not set +# CONFIG_SCSI_AHA152X is not set +# CONFIG_SCSI_AHA1542 is not set +# CONFIG_SCSI_AHA1740 is not set +# CONFIG_SCSI_AACRAID is not set +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_AIC7XXX_OLD is not set +# CONFIG_SCSI_DPT_I2O is not set +# CONFIG_SCSI_ADVANSYS is not set +# CONFIG_SCSI_IN2000 is not set +# CONFIG_SCSI_AM53C974 is not set +# CONFIG_SCSI_MEGARAID is not set +# CONFIG_SCSI_MEGARAID2 is not set +# CONFIG_SCSI_SATA is not set +# CONFIG_SCSI_SATA_SVW is not set +# CONFIG_SCSI_ATA_PIIX is not set +# CONFIG_SCSI_SATA_NV is not set +# CONFIG_SCSI_SATA_PROMISE is not set +# CONFIG_SCSI_SATA_SX4 is not set +# CONFIG_SCSI_SATA_SIL is not set +# CONFIG_SCSI_SATA_SIS is not set +# CONFIG_SCSI_SATA_ULI is not set +# CONFIG_SCSI_SATA_VIA is not set +# CONFIG_SCSI_SATA_VITESSE is not set +# CONFIG_SCSI_BUSLOGIC is not set +# CONFIG_SCSI_CPQFCTS is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_DTC3280 is not set +# CONFIG_SCSI_EATA is not set +# CONFIG_SCSI_EATA_DMA is not set +# CONFIG_SCSI_EATA_PIO is not set +# CONFIG_SCSI_FUTURE_DOMAIN is not set +# CONFIG_SCSI_GDTH is not set +# CONFIG_SCSI_GENERIC_NCR5380 is not set +# CONFIG_SCSI_INITIO is not set +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_NCR53C406A is not set +# CONFIG_SCSI_NCR53C7xx is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_NCR53C8XX is not set +# CONFIG_SCSI_SYM53C8XX is not set +# CONFIG_SCSI_PAS16 is not set +# CONFIG_SCSI_PCI2000 is not set +# CONFIG_SCSI_PCI2220I is not set +# CONFIG_SCSI_PSI240I is not set +# CONFIG_SCSI_QLOGIC_FAS is not set +# CONFIG_SCSI_QLOGIC_ISP is not set +# CONFIG_SCSI_QLOGIC_FC is not set +# CONFIG_SCSI_QLOGIC_1280 is not set +# CONFIG_SCSI_SIM710 is not set +# CONFIG_SCSI_SYM53C416 is not set +# CONFIG_SCSI_DC390T is not set +# CONFIG_SCSI_T128 is not set +# CONFIG_SCSI_U14_34F is not set +# CONFIG_SCSI_NSP32 is not set +# CONFIG_SCSI_DEBUG is not set + +# +# Fusion MPT device support +# +# CONFIG_FUSION is not set +# CONFIG_FUSION_BOOT is not set +# CONFIG_FUSION_ISENSE is not set +# CONFIG_FUSION_CTL is not set +# CONFIG_FUSION_LAN is not set + +# +# IEEE 1394 (FireWire) support (EXPERIMENTAL) +# +# CONFIG_IEEE1394 is not set + +# +# I2O device support +# +# CONFIG_I2O is not set +# CONFIG_I2O_PCI is not set +# CONFIG_I2O_BLOCK is not set +# CONFIG_I2O_LAN is not set +# CONFIG_I2O_SCSI is not set +# CONFIG_I2O_PROC is not set + +# +# Network device support +# +CONFIG_NETDEVICES=y + +# +# ARCnet devices +# +# CONFIG_ARCNET is not set +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_ETHERTAP is not set + +# +# Ethernet (10 or 100Mbit) +# +CONFIG_NET_ETHERNET=y +# CONFIG_SUNLANCE is not set +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNBMAC is not set +# CONFIG_SUNQE is not set +# CONFIG_SUNGEM is not set +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_LANCE is not set +# CONFIG_NET_VENDOR_SMC is not set +# CONFIG_NET_VENDOR_RACAL is not set +# CONFIG_HP100 is not set +# CONFIG_NET_ISA is not set +# CONFIG_NET_PCI is not set +# CONFIG_NET_POCKET is not set + +# +# Ethernet (1000 Mbit) +# +# CONFIG_ACENIC is not set +# CONFIG_DL2K is not set +# CONFIG_E1000 is not set +# CONFIG_MYRI_SBUS is not set +# CONFIG_NS83820 is not set +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +# CONFIG_R8169 is not set +# CONFIG_SK98LIN is not set +# CONFIG_TIGON3 is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_PLIP is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set + +# +# Wireless LAN (non-hamradio) +# +# CONFIG_NET_RADIO is not set + +# +# Token Ring devices +# +# CONFIG_TR is not set +# CONFIG_NET_FC is not set +# CONFIG_RCPCI is not set +# CONFIG_SHAPER is not set + +# +# Wan interfaces +# +# CONFIG_WAN is not set + +# +# Amateur Radio support +# +# CONFIG_HAMRADIO is not set + +# +# IrDA (infrared) support +# +# CONFIG_IRDA is not set + +# +# ISDN subsystem +# +# CONFIG_ISDN is not set + +# +# Input core support +# +# CONFIG_INPUT is not set +# CONFIG_INPUT_KEYBDEV is not set +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_EVDEV is not set +# CONFIG_INPUT_UINPUT is not set + +# +# Character devices +# +# CONFIG_VT is not set +CONFIG_SERIAL=y +CONFIG_SERIAL_CONSOLE=y +# CONFIG_SERIAL_EXTENDED is not set +CONFIG_SERIAL_NONSTANDARD=y +# CONFIG_COMPUTONE is not set +# CONFIG_ROCKETPORT is not set +# CONFIG_CYCLADES is not set +# CONFIG_DIGIEPCA is not set +# CONFIG_DIGI is not set +# CONFIG_ESPSERIAL is not set +# CONFIG_MOXA_INTELLIO is not set +# CONFIG_MOXA_SMARTIO is not set +# CONFIG_ISI is not set +# CONFIG_SYNCLINK is not set +# CONFIG_SYNCLINKMP is not set +# CONFIG_N_HDLC is not set +# CONFIG_RISCOM8 is not set +# CONFIG_SPECIALIX is not set +# CONFIG_SX is not set +# CONFIG_RIO is not set +# CONFIG_STALDRV is not set +# CONFIG_SERIAL_TX3912 is not set +# CONFIG_SERIAL_TX3912_CONSOLE is not set +# CONFIG_SERIAL_TXX9 is not set +# CONFIG_SERIAL_TXX9_CONSOLE is not set +# CONFIG_TXX927_SERIAL is not set +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set +CONFIG_UNIX98_PTYS=y +CONFIG_UNIX98_PTY_COUNT=256 + +# +# I2C support +# +# CONFIG_I2C is not set + +# +# Mice +# +# CONFIG_BUSMOUSE is not set +# CONFIG_MOUSE is not set + +# +# Joysticks +# +# CONFIG_INPUT_GAMEPORT is not set + +# +# Input core support is needed for gameports +# + +# +# Input core support is needed for joysticks +# +# CONFIG_QIC02_TAPE is not set +# CONFIG_IPMI_HANDLER is not set +# CONFIG_IPMI_PANIC_EVENT is not set +# CONFIG_IPMI_DEVICE_INTERFACE is not set +# CONFIG_IPMI_KCS is not set +# CONFIG_IPMI_WATCHDOG is not set + +# +# Watchdog Cards +# +# CONFIG_WATCHDOG is not set +# CONFIG_SCx200 is not set +# CONFIG_SCx200_GPIO is not set +# CONFIG_AMD_PM768 is not set +# CONFIG_NVRAM is not set +# CONFIG_RTC is not set +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set + +# +# Ftape, the floppy tape device driver +# +# CONFIG_FTAPE is not set +# CONFIG_AGP is not set + +# +# Direct Rendering Manager (XFree86 DRI support) +# +# CONFIG_DRM is not set + +# +# File systems +# +# CONFIG_QUOTA is not set +# CONFIG_QFMT_V2 is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_REISERFS_CHECK is not set +# CONFIG_REISERFS_PROC_INFO is not set +# CONFIG_ADFS_FS is not set +# CONFIG_ADFS_FS_RW is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BEFS_DEBUG is not set +# CONFIG_BFS_FS is not set +CONFIG_EXT3_FS=y +CONFIG_JBD=y +# CONFIG_JBD_DEBUG is not set +# CONFIG_FAT_FS is not set +# CONFIG_MSDOS_FS is not set +# CONFIG_UMSDOS_FS is not set +# CONFIG_VFAT_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_JFFS_FS is not set +# CONFIG_JFFS2_FS is not set +# CONFIG_CRAMFS is not set +CONFIG_TMPFS=y +CONFIG_RAMFS=y +# CONFIG_ISO9660_FS is not set +# CONFIG_JOLIET is not set +# CONFIG_ZISOFS is not set +# CONFIG_JFS_FS is not set +# CONFIG_JFS_DEBUG is not set +# CONFIG_JFS_STATISTICS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_NTFS_FS is not set +# CONFIG_NTFS_RW is not set +# CONFIG_HPFS_FS is not set +CONFIG_PROC_FS=y +# CONFIG_DEVFS_FS is not set +# CONFIG_DEVFS_MOUNT is not set +# CONFIG_DEVFS_DEBUG is not set +CONFIG_DEVPTS_FS=y +# CONFIG_QNX4FS_FS is not set +# CONFIG_QNX4FS_RW is not set +# CONFIG_ROMFS_FS is not set +CONFIG_EXT2_FS=y +# CONFIG_SYSV_FS is not set +# CONFIG_UDF_FS is not set +# CONFIG_UDF_RW is not set +# CONFIG_UFS_FS is not set +# CONFIG_UFS_FS_WRITE is not set +# CONFIG_XFS_FS is not set +# CONFIG_XFS_QUOTA is not set +# CONFIG_XFS_RT is not set +# CONFIG_XFS_TRACE is not set +# CONFIG_XFS_DEBUG is not set + +# +# Network File Systems +# +# CONFIG_CODA_FS is not set +# CONFIG_INTERMEZZO_FS is not set +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_DIRECTIO is not set +CONFIG_ROOT_NFS=y +# CONFIG_NFSD is not set +# CONFIG_NFSD_V3 is not set +# CONFIG_NFSD_TCP is not set +CONFIG_SUNRPC=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +# CONFIG_SMB_FS is not set +# CONFIG_NCP_FS is not set +# CONFIG_NCPFS_PACKET_SIGNING is not set +# CONFIG_NCPFS_IOCTL_LOCKING is not set +# CONFIG_NCPFS_STRONG is not set +# CONFIG_NCPFS_NFS_NS is not set +# CONFIG_NCPFS_OS2_NS is not set +# CONFIG_NCPFS_SMALLDOS is not set +# CONFIG_NCPFS_NLS is not set +# CONFIG_NCPFS_EXTRAS is not set +# CONFIG_ZISOFS_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_SMB_NLS is not set +# CONFIG_NLS is not set + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set + +# +# Sound +# +# CONFIG_SOUND is not set + +# +# USB support +# +# CONFIG_USB is not set + +# +# Support for USB gadgets +# +# CONFIG_USB_GADGET is not set + +# +# Bluetooth support +# +# CONFIG_BLUEZ is not set + +# +# Kernel hacking +# +CONFIG_CROSSCOMPILE=y +# CONFIG_RUNTIME_DEBUG is not set +# CONFIG_KGDB is not set +# CONFIG_GDB_CONSOLE is not set +# CONFIG_DEBUG_INFO is not set +# CONFIG_MAGIC_SYSRQ is not set +CONFIG_MIPS_UNCACHED=y +CONFIG_LOG_BUF_SHIFT=0 + +# +# Cryptographic options +# +# CONFIG_CRYPTO is not set + +# +# Library routines +# +# CONFIG_CRC32 is not set +# CONFIG_ZLIB_INFLATE is not set +# CONFIG_ZLIB_DEFLATE is not set diff -urN linux-2.4.28-bk3/arch/mips/defconfig-tb0226 linux-2.4.28-bk4/arch/mips/defconfig-tb0226 --- linux-2.4.28-bk3/arch/mips/defconfig-tb0226 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/defconfig-tb0226 2004-11-23 02:49:27.366390940 -0800 @@ -26,10 +26,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -52,6 +54,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -74,11 +78,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set CONFIG_IRQ_CPU=y -CONFIG_NEW_TIME_C=y CONFIG_NONCOHERENT_IO=y -CONFIG_PCI=y -CONFIG_NEW_PCI=y -CONFIG_PCI_AUTO=y CONFIG_DUMMY_KEYB=y CONFIG_SERIAL_MANY_PORTS=y # CONFIG_MIPS_AU1000 is not set @@ -116,7 +116,11 @@ # General setup # CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_BUILD_ELF64 is not set CONFIG_NET=y +CONFIG_PCI=y +CONFIG_PCI_NEW=y +CONFIG_PCI_AUTO=y # CONFIG_PCI_NAMES is not set # CONFIG_ISA is not set # CONFIG_TC is not set @@ -138,6 +142,7 @@ # CONFIG_BINFMT_ELF32 is not set # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # # Memory Technology Devices (MTD) @@ -167,6 +172,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set # CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set @@ -213,7 +219,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set @@ -306,6 +311,17 @@ # CONFIG_SCSI_AM53C974 is not set # CONFIG_SCSI_MEGARAID is not set # CONFIG_SCSI_MEGARAID2 is not set +# CONFIG_SCSI_SATA is not set +# CONFIG_SCSI_SATA_SVW is not set +# CONFIG_SCSI_ATA_PIIX is not set +# CONFIG_SCSI_SATA_NV is not set +# CONFIG_SCSI_SATA_PROMISE is not set +# CONFIG_SCSI_SATA_SX4 is not set +# CONFIG_SCSI_SATA_SIL is not set +# CONFIG_SCSI_SATA_SIS is not set +# CONFIG_SCSI_SATA_ULI is not set +# CONFIG_SCSI_SATA_VIA is not set +# CONFIG_SCSI_SATA_VITESSE is not set # CONFIG_SCSI_BUSLOGIC is not set # CONFIG_SCSI_CPQFCTS is not set # CONFIG_SCSI_DMX3191D is not set @@ -411,6 +427,7 @@ # CONFIG_FEALNX is not set # CONFIG_NATSEMI is not set # CONFIG_NE2K_PCI is not set +# CONFIG_FORCEDETH is not set # CONFIG_NE3210 is not set # CONFIG_ES3210 is not set # CONFIG_8139CP is not set @@ -501,6 +518,7 @@ CONFIG_SERIAL_CONSOLE=y # CONFIG_SERIAL_EXTENDED is not set # CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set # CONFIG_VR41XX_KIU is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 @@ -559,13 +577,11 @@ # CONFIG_WDT is not set # CONFIG_WDTPCI is not set # CONFIG_MACHZ_WDT is not set -# CONFIG_AMD7XX_TCO is not set # CONFIG_SCx200 is not set # CONFIG_SCx200_GPIO is not set # CONFIG_AMD_PM768 is not set # CONFIG_NVRAM is not set # CONFIG_RTC is not set -# CONFIG_MIPS_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set @@ -654,7 +670,7 @@ CONFIG_ROOT_NFS=y CONFIG_NFSD=y # CONFIG_NFSD_V3 is not set -# CONFIG_NFSD_TCP is not set +CONFIG_NFSD_TCP=y CONFIG_SUNRPC=y CONFIG_LOCKD=y # CONFIG_SMB_FS is not set @@ -793,7 +809,6 @@ # CONFIG_USB_RTL8150 is not set # CONFIG_USB_KAWETH is not set # CONFIG_USB_CATC is not set -# CONFIG_USB_AX8817X is not set # CONFIG_USB_CDCETHER is not set # CONFIG_USB_USBNET is not set diff -urN linux-2.4.28-bk3/arch/mips/defconfig-tb0229 linux-2.4.28-bk4/arch/mips/defconfig-tb0229 --- linux-2.4.28-bk3/arch/mips/defconfig-tb0229 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/defconfig-tb0229 2004-11-23 02:49:27.367390981 -0800 @@ -26,10 +26,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -52,6 +54,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -75,11 +79,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set CONFIG_IRQ_CPU=y -CONFIG_NEW_TIME_C=y CONFIG_NONCOHERENT_IO=y -CONFIG_PCI=y -CONFIG_NEW_PCI=y -CONFIG_PCI_AUTO=y CONFIG_DUMMY_KEYB=y CONFIG_SERIAL_MANY_PORTS=y # CONFIG_MIPS_AU1000 is not set @@ -117,7 +117,11 @@ # General setup # CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_BUILD_ELF64 is not set CONFIG_NET=y +CONFIG_PCI=y +CONFIG_PCI_NEW=y +CONFIG_PCI_AUTO=y # CONFIG_PCI_NAMES is not set # CONFIG_ISA is not set # CONFIG_TC is not set @@ -139,6 +143,7 @@ # CONFIG_BINFMT_ELF32 is not set # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # # Memory Technology Devices (MTD) @@ -168,6 +173,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set CONFIG_BLK_DEV_LOOP=y # CONFIG_BLK_DEV_NBD is not set CONFIG_BLK_DEV_RAM=y @@ -215,7 +221,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set @@ -349,6 +354,7 @@ # CONFIG_FEALNX is not set # CONFIG_NATSEMI is not set # CONFIG_NE2K_PCI is not set +# CONFIG_FORCEDETH is not set # CONFIG_NE3210 is not set # CONFIG_ES3210 is not set CONFIG_8139CP=y @@ -439,6 +445,7 @@ CONFIG_SERIAL_CONSOLE=y # CONFIG_SERIAL_EXTENDED is not set # CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set # CONFIG_VR41XX_KIU is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 @@ -497,13 +504,11 @@ # CONFIG_WDT is not set # CONFIG_WDTPCI is not set # CONFIG_MACHZ_WDT is not set -# CONFIG_AMD7XX_TCO is not set # CONFIG_SCx200 is not set # CONFIG_SCx200_GPIO is not set # CONFIG_AMD_PM768 is not set # CONFIG_NVRAM is not set # CONFIG_RTC is not set -# CONFIG_MIPS_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set @@ -592,7 +597,7 @@ CONFIG_ROOT_NFS=y CONFIG_NFSD=y # CONFIG_NFSD_V3 is not set -# CONFIG_NFSD_TCP is not set +CONFIG_NFSD_TCP=y CONFIG_SUNRPC=y CONFIG_LOCKD=y # CONFIG_SMB_FS is not set diff -urN linux-2.4.28-bk3/arch/mips/defconfig-ti1500 linux-2.4.28-bk4/arch/mips/defconfig-ti1500 --- linux-2.4.28-bk3/arch/mips/defconfig-ti1500 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/defconfig-ti1500 2004-11-23 02:49:27.368391022 -0800 @@ -26,10 +26,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set CONFIG_MIPS_XXS1500=y # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -52,6 +54,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -75,10 +79,6 @@ # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set CONFIG_SOC_AU1X00=y CONFIG_SOC_AU1500=y -CONFIG_NEW_TIME_C=y -CONFIG_PCI=y -CONFIG_NEW_PCI=y -CONFIG_PCI_AUTO=y CONFIG_NONCOHERENT_IO=y CONFIG_PC_KEYB=y # CONFIG_MIPS_AU1000 is not set @@ -119,7 +119,11 @@ # General setup # CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_BUILD_ELF64 is not set CONFIG_NET=y +CONFIG_PCI=y +CONFIG_PCI_NEW=y +CONFIG_PCI_AUTO=y CONFIG_PCI_NAMES=y # CONFIG_ISA is not set # CONFIG_TC is not set @@ -136,9 +140,6 @@ # CONFIG_I82092 is not set # CONFIG_I82365 is not set CONFIG_PCMCIA_AU1X00=m -# CONFIG_PCMCIA_PB1X00 is not set -# CONFIG_PCMCIA_DB1X00 is not set -CONFIG_PCMCIA_XXS1500=y # # PCI Hotplug Support @@ -146,6 +147,10 @@ # CONFIG_HOTPLUG_PCI is not set # CONFIG_HOTPLUG_PCI_COMPAQ is not set # CONFIG_HOTPLUG_PCI_COMPAQ_NVRAM is not set +# CONFIG_HOTPLUG_PCI_SHPC is not set +# CONFIG_HOTPLUG_PCI_SHPC_POLL_EVENT_MODE is not set +# CONFIG_HOTPLUG_PCI_PCIE is not set +# CONFIG_HOTPLUG_PCI_PCIE_POLL_EVENT_MODE is not set CONFIG_SYSVIPC=y # CONFIG_BSD_PROCESS_ACCT is not set CONFIG_SYSCTL=y @@ -159,6 +164,7 @@ # CONFIG_BINFMT_ELF32 is not set # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # CONFIG_PM is not set # @@ -208,7 +214,8 @@ CONFIG_MTD_XXS1500=y # CONFIG_MTD_MTX1 is not set # CONFIG_MTD_DB1X00 is not set -# CONFIG_MTD_HYDIII is not set +# CONFIG_MTD_PB1550 is not set +# CONFIG_MTD_HYDROGEN3 is not set # CONFIG_MTD_MIRAGE is not set # CONFIG_MTD_CSTM_MIPS_IXX is not set # CONFIG_MTD_OCELOT is not set @@ -260,6 +267,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set CONFIG_BLK_DEV_LOOP=y # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set @@ -322,7 +330,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set @@ -380,10 +387,12 @@ # # CONFIG_BLK_DEV_HD_IDE is not set # CONFIG_BLK_DEV_HD is not set +# CONFIG_BLK_DEV_IDE_SATA is not set CONFIG_BLK_DEV_IDEDISK=y CONFIG_IDEDISK_MULTI_MODE=y # CONFIG_IDEDISK_STROKE is not set CONFIG_BLK_DEV_IDECS=m +# CONFIG_BLK_DEV_DELKIN is not set # CONFIG_BLK_DEV_IDECD is not set # CONFIG_BLK_DEV_IDETAPE is not set # CONFIG_BLK_DEV_IDEFLOPPY is not set @@ -403,6 +412,7 @@ # CONFIG_BLK_DEV_ATARAID is not set # CONFIG_BLK_DEV_ATARAID_PDC is not set # CONFIG_BLK_DEV_ATARAID_HPT is not set +# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set # CONFIG_BLK_DEV_ATARAID_SII is not set # @@ -590,6 +600,7 @@ # CONFIG_AU1X00_USB_TTY is not set # CONFIG_AU1X00_USB_RAW is not set # CONFIG_TXX927_SERIAL is not set +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 @@ -659,7 +670,6 @@ # CONFIG_AMD_PM768 is not set # CONFIG_NVRAM is not set # CONFIG_RTC is not set -# CONFIG_MIPS_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set @@ -756,11 +766,12 @@ CONFIG_ROOT_NFS=y CONFIG_NFSD=m # CONFIG_NFSD_V3 is not set -# CONFIG_NFSD_TCP is not set +CONFIG_NFSD_TCP=y CONFIG_SUNRPC=y CONFIG_LOCKD=y CONFIG_SMB_FS=m # CONFIG_SMB_NLS_DEFAULT is not set +# CONFIG_SMB_UNIX is not set # CONFIG_NCP_FS is not set # CONFIG_NCPFS_PACKET_SIGNING is not set # CONFIG_NCPFS_IOCTL_LOCKING is not set @@ -899,6 +910,8 @@ # CONFIG_SOUND_RME96XX is not set # CONFIG_SOUND_SONICVIBES is not set CONFIG_SOUND_AU1X00=y +# CONFIG_SOUND_AU1550_PSC is not set +# CONFIG_SOUND_AU1550_I2S is not set # CONFIG_SOUND_TRIDENT is not set # CONFIG_SOUND_MSNDCLAS is not set # CONFIG_SOUND_MSNDPIN is not set @@ -988,7 +1001,6 @@ # CONFIG_USB_RTL8150 is not set # CONFIG_USB_KAWETH is not set # CONFIG_USB_CATC is not set -# CONFIG_USB_AX8817X is not set # CONFIG_USB_CDCETHER is not set # CONFIG_USB_USBNET is not set diff -urN linux-2.4.28-bk3/arch/mips/defconfig-workpad linux-2.4.28-bk4/arch/mips/defconfig-workpad --- linux-2.4.28-bk3/arch/mips/defconfig-workpad 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/defconfig-workpad 2004-11-23 02:49:27.370391103 -0800 @@ -26,10 +26,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -53,6 +55,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -75,7 +79,6 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set CONFIG_IRQ_CPU=y -CONFIG_NEW_TIME_C=y CONFIG_NONCOHERENT_IO=y CONFIG_ISA=y # CONFIG_SCSI is not set @@ -114,6 +117,7 @@ # General setup # CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_BUILD_ELF64 is not set CONFIG_NET=y # CONFIG_PCI is not set # CONFIG_TC is not set @@ -135,6 +139,7 @@ # CONFIG_BINFMT_ELF32 is not set # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # # Memory Technology Devices (MTD) @@ -164,6 +169,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set # CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set @@ -207,7 +213,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set @@ -265,10 +270,12 @@ # # CONFIG_BLK_DEV_HD_IDE is not set # CONFIG_BLK_DEV_HD is not set +# CONFIG_BLK_DEV_IDE_SATA is not set CONFIG_BLK_DEV_IDEDISK=y # CONFIG_IDEDISK_MULTI_MODE is not set # CONFIG_IDEDISK_STROKE is not set # CONFIG_BLK_DEV_IDECS is not set +# CONFIG_BLK_DEV_DELKIN is not set # CONFIG_BLK_DEV_IDECD is not set # CONFIG_BLK_DEV_IDETAPE is not set # CONFIG_BLK_DEV_IDEFLOPPY is not set @@ -287,6 +294,7 @@ # CONFIG_BLK_DEV_ATARAID is not set # CONFIG_BLK_DEV_ATARAID_PDC is not set # CONFIG_BLK_DEV_ATARAID_HPT is not set +# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set # CONFIG_BLK_DEV_ATARAID_SII is not set # @@ -418,6 +426,7 @@ # CONFIG_SERIAL_MULTIPORT is not set # CONFIG_HUB6 is not set # CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set # CONFIG_VR41XX_KIU is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 @@ -476,13 +485,11 @@ # CONFIG_WDT is not set # CONFIG_WDTPCI is not set # CONFIG_MACHZ_WDT is not set -# CONFIG_AMD7XX_TCO is not set # CONFIG_SCx200 is not set # CONFIG_SCx200_GPIO is not set # CONFIG_AMD_PM768 is not set # CONFIG_NVRAM is not set # CONFIG_RTC is not set -# CONFIG_MIPS_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set @@ -571,7 +578,7 @@ # CONFIG_ROOT_NFS is not set CONFIG_NFSD=y # CONFIG_NFSD_V3 is not set -# CONFIG_NFSD_TCP is not set +CONFIG_NFSD_TCP=y CONFIG_SUNRPC=y CONFIG_LOCKD=y # CONFIG_SMB_FS is not set diff -urN linux-2.4.28-bk3/arch/mips/defconfig-xxs1500 linux-2.4.28-bk4/arch/mips/defconfig-xxs1500 --- linux-2.4.28-bk3/arch/mips/defconfig-xxs1500 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/defconfig-xxs1500 2004-11-23 02:49:27.372391185 -0800 @@ -26,10 +26,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set CONFIG_MIPS_XXS1500=y # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -52,6 +54,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -75,10 +79,6 @@ # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set CONFIG_SOC_AU1X00=y CONFIG_SOC_AU1500=y -CONFIG_NEW_TIME_C=y -CONFIG_PCI=y -CONFIG_NEW_PCI=y -CONFIG_PCI_AUTO=y CONFIG_NONCOHERENT_IO=y CONFIG_PC_KEYB=y # CONFIG_MIPS_AU1000 is not set @@ -119,7 +119,11 @@ # General setup # CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_BUILD_ELF64 is not set CONFIG_NET=y +CONFIG_PCI=y +CONFIG_PCI_NEW=y +CONFIG_PCI_AUTO=y CONFIG_PCI_NAMES=y # CONFIG_ISA is not set # CONFIG_TC is not set @@ -136,9 +140,6 @@ # CONFIG_I82092 is not set # CONFIG_I82365 is not set CONFIG_PCMCIA_AU1X00=m -# CONFIG_PCMCIA_PB1X00 is not set -# CONFIG_PCMCIA_DB1X00 is not set -CONFIG_PCMCIA_XXS1500=y # # PCI Hotplug Support @@ -146,6 +147,10 @@ # CONFIG_HOTPLUG_PCI is not set # CONFIG_HOTPLUG_PCI_COMPAQ is not set # CONFIG_HOTPLUG_PCI_COMPAQ_NVRAM is not set +# CONFIG_HOTPLUG_PCI_SHPC is not set +# CONFIG_HOTPLUG_PCI_SHPC_POLL_EVENT_MODE is not set +# CONFIG_HOTPLUG_PCI_PCIE is not set +# CONFIG_HOTPLUG_PCI_PCIE_POLL_EVENT_MODE is not set CONFIG_SYSVIPC=y # CONFIG_BSD_PROCESS_ACCT is not set CONFIG_SYSCTL=y @@ -159,6 +164,7 @@ # CONFIG_BINFMT_ELF32 is not set # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # CONFIG_PM is not set # @@ -208,7 +214,8 @@ CONFIG_MTD_XXS1500=y # CONFIG_MTD_MTX1 is not set # CONFIG_MTD_DB1X00 is not set -# CONFIG_MTD_HYDIII is not set +# CONFIG_MTD_PB1550 is not set +# CONFIG_MTD_HYDROGEN3 is not set # CONFIG_MTD_MIRAGE is not set # CONFIG_MTD_CSTM_MIPS_IXX is not set # CONFIG_MTD_OCELOT is not set @@ -260,6 +267,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set CONFIG_BLK_DEV_LOOP=y # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set @@ -322,7 +330,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set @@ -380,10 +387,12 @@ # # CONFIG_BLK_DEV_HD_IDE is not set # CONFIG_BLK_DEV_HD is not set +# CONFIG_BLK_DEV_IDE_SATA is not set CONFIG_BLK_DEV_IDEDISK=y CONFIG_IDEDISK_MULTI_MODE=y # CONFIG_IDEDISK_STROKE is not set CONFIG_BLK_DEV_IDECS=m +# CONFIG_BLK_DEV_DELKIN is not set # CONFIG_BLK_DEV_IDECD is not set # CONFIG_BLK_DEV_IDETAPE is not set # CONFIG_BLK_DEV_IDEFLOPPY is not set @@ -412,6 +421,7 @@ # CONFIG_WDC_ALI15X3 is not set # CONFIG_BLK_DEV_AMD74XX is not set # CONFIG_AMD74XX_OVERRIDE is not set +# CONFIG_BLK_DEV_ATIIXP is not set # CONFIG_BLK_DEV_CMD64X is not set # CONFIG_BLK_DEV_TRIFLEX is not set # CONFIG_BLK_DEV_CY82C693 is not set @@ -440,6 +450,7 @@ # CONFIG_BLK_DEV_ATARAID is not set # CONFIG_BLK_DEV_ATARAID_PDC is not set # CONFIG_BLK_DEV_ATARAID_HPT is not set +# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set # CONFIG_BLK_DEV_ATARAID_SII is not set # @@ -521,6 +532,7 @@ # CONFIG_FEALNX is not set # CONFIG_NATSEMI is not set # CONFIG_NE2K_PCI is not set +# CONFIG_FORCEDETH is not set # CONFIG_NE3210 is not set # CONFIG_ES3210 is not set # CONFIG_8139CP is not set @@ -659,6 +671,7 @@ # CONFIG_AU1X00_USB_TTY is not set # CONFIG_AU1X00_USB_RAW is not set # CONFIG_TXX927_SERIAL is not set +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 @@ -701,7 +714,6 @@ # CONFIG_AMD_PM768 is not set # CONFIG_NVRAM is not set CONFIG_RTC=y -# CONFIG_MIPS_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set @@ -798,11 +810,12 @@ CONFIG_ROOT_NFS=y CONFIG_NFSD=m # CONFIG_NFSD_V3 is not set -# CONFIG_NFSD_TCP is not set +CONFIG_NFSD_TCP=y CONFIG_SUNRPC=y CONFIG_LOCKD=y CONFIG_SMB_FS=m # CONFIG_SMB_NLS_DEFAULT is not set +# CONFIG_SMB_UNIX is not set # CONFIG_NCP_FS is not set # CONFIG_NCPFS_PACKET_SIGNING is not set # CONFIG_NCPFS_IOCTL_LOCKING is not set @@ -901,6 +914,8 @@ # CONFIG_SOUND_RME96XX is not set # CONFIG_SOUND_SONICVIBES is not set CONFIG_SOUND_AU1X00=y +# CONFIG_SOUND_AU1550_PSC is not set +# CONFIG_SOUND_AU1550_I2S is not set # CONFIG_SOUND_TRIDENT is not set # CONFIG_SOUND_MSNDCLAS is not set # CONFIG_SOUND_MSNDPIN is not set diff -urN linux-2.4.28-bk3/arch/mips/defconfig-yosemite linux-2.4.28-bk4/arch/mips/defconfig-yosemite --- linux-2.4.28-bk3/arch/mips/defconfig-yosemite 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/defconfig-yosemite 2004-11-23 02:49:27.372391185 -0800 @@ -26,10 +26,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -52,6 +54,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -112,9 +116,12 @@ # General setup # # CONFIG_CPU_LITTLE_ENDIAN is not set +# CONFIG_BUILD_ELF64 is not set # CONFIG_BINFMT_IRIX is not set CONFIG_NET=y # CONFIG_PCI is not set +# CONFIG_PCI_NEW is not set +CONFIG_PCI_AUTO=y # CONFIG_ISA is not set # CONFIG_TC is not set # CONFIG_MCA is not set @@ -135,6 +142,7 @@ # CONFIG_BINFMT_ELF32 is not set # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # # Memory Technology Devices (MTD) @@ -164,6 +172,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set CONFIG_BLK_DEV_LOOP=y # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set @@ -209,7 +218,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set @@ -301,6 +309,17 @@ # CONFIG_SCSI_AM53C974 is not set # CONFIG_SCSI_MEGARAID is not set # CONFIG_SCSI_MEGARAID2 is not set +# CONFIG_SCSI_SATA is not set +# CONFIG_SCSI_SATA_SVW is not set +# CONFIG_SCSI_ATA_PIIX is not set +# CONFIG_SCSI_SATA_NV is not set +# CONFIG_SCSI_SATA_PROMISE is not set +# CONFIG_SCSI_SATA_SX4 is not set +# CONFIG_SCSI_SATA_SIL is not set +# CONFIG_SCSI_SATA_SIS is not set +# CONFIG_SCSI_SATA_ULI is not set +# CONFIG_SCSI_SATA_VIA is not set +# CONFIG_SCSI_SATA_VITESSE is not set # CONFIG_SCSI_BUSLOGIC is not set # CONFIG_SCSI_DMX3191D is not set # CONFIG_SCSI_DTC3280 is not set @@ -458,6 +477,7 @@ # CONFIG_SERIAL_TXX9 is not set # CONFIG_SERIAL_TXX9_CONSOLE is not set # CONFIG_TXX927_SERIAL is not set +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 diff -urN linux-2.4.28-bk3/arch/mips/galileo-boards/ev96100/time.c linux-2.4.28-bk4/arch/mips/galileo-boards/ev96100/time.c --- linux-2.4.28-bk3/arch/mips/galileo-boards/ev96100/time.c 2003-08-25 04:44:39.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips/galileo-boards/ev96100/time.c 2004-11-23 02:49:27.373391225 -0800 @@ -39,6 +39,7 @@ #include #include +#include #include #include @@ -162,11 +163,10 @@ ".set\tmips0\n\t" ".set\tat\n\t" ".set\treorder" - :"=&r" (quotient) - :"r" (timerhi), - "m" (timerlo), - "r" (tmp), - "r" (USECS_PER_JIFFY)); + : "=&r" (quotient) + : "r" (timerhi), "m" (timerlo), + "r" (tmp), "r" (USECS_PER_JIFFY) + : "hi", "lo", GCC_REG_ACCUM); cached_quotient = quotient; } @@ -178,9 +178,9 @@ __asm__("multu\t%1,%2\n\t" "mfhi\t%0" - :"=r" (res) - :"r" (count), - "r" (quotient)); + : "=r" (res) + : "r" (count), "r" (quotient) + : "hi", "lo", GCC_REG_ACCUM); /* * Due to possible jiffies inconsistencies, we need to check diff -urN linux-2.4.28-bk3/arch/mips/jazz/Makefile linux-2.4.28-bk4/arch/mips/jazz/Makefile --- linux-2.4.28-bk3/arch/mips/jazz/Makefile 2003-08-25 04:44:40.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips/jazz/Makefile 2004-11-23 02:49:27.373391225 -0800 @@ -12,7 +12,7 @@ O_TARGET := jazz.o -export-syms := jazz-ksyms.o +export-objs := jazz-ksyms.o obj-y := int-handler.o irq.o jazzdma.o jazz-ksyms.o reset.o \ rtc-jazz.o setup.o floppy-jazz.o kbd-jazz.o diff -urN linux-2.4.28-bk3/arch/mips/jazz/jazzdma.c linux-2.4.28-bk4/arch/mips/jazz/jazzdma.c --- linux-2.4.28-bk3/arch/mips/jazz/jazzdma.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/jazz/jazzdma.c 2004-11-23 02:49:27.374391266 -0800 @@ -108,7 +108,7 @@ return VDMA_ERROR; /* invalid physical address */ } - spin_lock_saveirq(&jazz_dma_lock, flags); + spin_lock_irqsave(&jazz_dma_lock, flags); /* * Find free chunk @@ -120,7 +120,7 @@ first < VDMA_PGTBL_ENTRIES) first++; if (first + pages > VDMA_PGTBL_ENTRIES) { /* nothing free */ - spin_unlock_restoreirq(&jazz_dma_lock, flags); + spin_unlock_irqrestore(&jazz_dma_lock, flags); return VDMA_ERROR; } @@ -167,7 +167,7 @@ printk("\n"); } - spin_unlock_restoreirq(&jazz_dma_lock, flags); + spin_unlock_irqrestore(&jazz_dma_lock, flags); return laddr; } diff -urN linux-2.4.28-bk3/arch/mips/kernel/Makefile linux-2.4.28-bk4/arch/mips/kernel/Makefile --- linux-2.4.28-bk3/arch/mips/kernel/Makefile 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/kernel/Makefile 2004-11-23 02:49:27.375391307 -0800 @@ -12,11 +12,11 @@ O_TARGET := kernel.o -export-objs = irq.o mips_ksyms.o pci-dma.o setup.o semaphore.o smp.o +export-objs = irq.o mips_ksyms.o pci-dma.o setup.o semaphore.o smp.o time.o obj-y += branch.o cpu-probe.o irq.o process.o signal.o entry.o \ traps.o ptrace.o reset.o semaphore.o setup.o syscall.o \ - sysmips.o ipc.o scall_o32.o unaligned.o + sysmips.o ipc.o scall_o32.o time.o unaligned.o obj-$(CONFIG_MODULES) += mips_ksyms.o @@ -42,12 +42,7 @@ obj-$(CONFIG_I8259) += i8259.o obj-$(CONFIG_IRQ_CPU) += irq_cpu.o - -# transition from old time.c to new time.c -# some boards uses old-time.c, some use time.c, and some use their own ones -export-objs += old-time.o time.o -obj-$(CONFIG_OLD_TIME_C) += old-time.o -obj-$(CONFIG_NEW_TIME_C) += time.o +obj-$(CONFIG_IRQ_CPU_RM7K) += irq-rm7000.o obj-$(CONFIG_BINFMT_IRIX) += irixelf.o irixioctl.o irixsig.o sysirix.o \ irixinv.o diff -urN linux-2.4.28-bk3/arch/mips/kernel/cpu-probe.c linux-2.4.28-bk4/arch/mips/kernel/cpu-probe.c --- linux-2.4.28-bk3/arch/mips/kernel/cpu-probe.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/kernel/cpu-probe.c 2004-11-23 02:49:27.375391307 -0800 @@ -43,14 +43,21 @@ void au1k_wait(void) { #ifdef CONFIG_PM + unsigned long addr; /* using the wait instruction makes CP0 counter unusable */ - __asm__(".set\tmips3\n\t" + __asm__("la %0,au1k_wait\n\t" + ".set mips3\n\t" + "cache 0x14,0(%0)\n\t" + "cache 0x14,32(%0)\n\t" + "sync\n\t" + "nop\n\t" "wait\n\t" "nop\n\t" "nop\n\t" "nop\n\t" "nop\n\t" - ".set\tmips0"); + ".set mips0\n\t" + : : "r" (addr)); #else __asm__("nop\n\t" "nop"); @@ -81,7 +88,7 @@ case CPU_R5000: case CPU_NEVADA: case CPU_RM7000: -/* case CPU_RM9000: */ + case CPU_RM9000: case CPU_TX49XX: case CPU_4KC: case CPU_4KEC: @@ -97,6 +104,7 @@ case CPU_AU1000: case CPU_AU1100: case CPU_AU1500: + case CPU_AU1550: if (au1k_wait_ptr != NULL) { cpu_wait = au1k_wait_ptr; printk(" available.\n"); @@ -170,8 +178,7 @@ case PRID_IMP_R2000: c->cputype = CPU_R2000; c->isa_level = MIPS_CPU_ISA_I; - c->options = MIPS_CPU_TLB | MIPS_CPU_NOFPUEX | - MIPS_CPU_LLSC; + c->options = MIPS_CPU_TLB | MIPS_CPU_NOFPUEX; if (__cpu_has_fpu()) c->options |= MIPS_CPU_FPU; c->tlbsize = 64; @@ -185,17 +192,24 @@ else c->cputype = CPU_R3000; c->isa_level = MIPS_CPU_ISA_I; - c->options = MIPS_CPU_TLB | MIPS_CPU_NOFPUEX | - MIPS_CPU_LLSC; + c->options = MIPS_CPU_TLB | MIPS_CPU_NOFPUEX; if (__cpu_has_fpu()) c->options |= MIPS_CPU_FPU; c->tlbsize = 64; break; case PRID_IMP_R4000: - if ((c->processor_id & 0xff) >= PRID_REV_R4400) - c->cputype = CPU_R4400SC; - else - c->cputype = CPU_R4000SC; + if (read_c0_config() & CONF_SC) { + if ((c->processor_id & 0xff) >= PRID_REV_R4400) + c->cputype = CPU_R4400PC; + else + c->cputype = CPU_R4000PC; + } else { + if ((c->processor_id & 0xff) >= PRID_REV_R4400) + c->cputype = CPU_R4400SC; + else + c->cputype = CPU_R4000SC; + } + c->isa_level = MIPS_CPU_ISA_III; c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | MIPS_CPU_WATCH | MIPS_CPU_VCE | @@ -476,6 +490,7 @@ static inline void cpu_probe_alchemy(struct cpuinfo_mips *c) { decode_config1(c); + c->options |= MIPS_CPU_PREFETCH; switch (c->processor_id & 0xff00) { case PRID_IMP_AU1_REV1: case PRID_IMP_AU1_REV2: @@ -492,6 +507,9 @@ case 3: c->cputype = CPU_AU1550; break; + case 4: + c->cputype = CPU_AU1200; + break; default: panic("Unknown Au Core!"); break; diff -urN linux-2.4.28-bk3/arch/mips/kernel/gdb-low.S linux-2.4.28-bk4/arch/mips/kernel/gdb-low.S --- linux-2.4.28-bk3/arch/mips/kernel/gdb-low.S 2003-08-25 04:44:40.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips/kernel/gdb-low.S 2004-11-23 02:49:27.376391348 -0800 @@ -283,7 +283,7 @@ lw v0,GDB_FR_HI(sp) lw v1,GDB_FR_LO(sp) mthi v0 - mtlo v0 + mtlo v1 lw ra,GDB_FR_REG31(sp) lw fp,GDB_FR_REG30(sp) lw gp,GDB_FR_REG28(sp) diff -urN linux-2.4.28-bk3/arch/mips/kernel/head.S linux-2.4.28-bk4/arch/mips/kernel/head.S --- linux-2.4.28-bk3/arch/mips/kernel/head.S 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/kernel/head.S 2004-11-23 02:49:27.376391348 -0800 @@ -63,7 +63,7 @@ nop j cache_parity_error - nop + nop END(except_vec2_generic) .set at @@ -105,7 +105,7 @@ sll k0, k0, 30 # Check for SDBBP. bgez k0, ejtag_return - la k0, ejtag_debug_buffer + la k0, ejtag_debug_buffer sw k1, 0(k0) SAVE_ALL jal ejtag_exception_handler @@ -202,7 +202,7 @@ and t0, t1 or t0, (ST0_CU0); jal start_secondary - mtc0 t0, CP0_STATUS + mtc0 t0, CP0_STATUS .set pop END(smp_bootstrap) #endif diff -urN linux-2.4.28-bk3/arch/mips/kernel/irq-rm7000.c linux-2.4.28-bk4/arch/mips/kernel/irq-rm7000.c --- linux-2.4.28-bk3/arch/mips/kernel/irq-rm7000.c 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/kernel/irq-rm7000.c 2004-11-23 02:49:27.377391388 -0800 @@ -0,0 +1,98 @@ +/* + * Copyright (C) 2003 Ralf Baechle + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * Handler for RM7000 extended interrupts. These are a non-standard + * feature so we handle them separately from standard interrupts. + */ +#include +#include +#include + +#include +#include +#include + +static int irq_base; + +static inline void unmask_rm7k_irq(unsigned int irq) +{ + set_c0_intcontrol(0x100 << (irq - irq_base)); +} + +static inline void mask_rm7k_irq(unsigned int irq) +{ + clear_c0_intcontrol(0x100 << (irq - irq_base)); +} + +static inline void rm7k_cpu_irq_enable(unsigned int irq) +{ + unsigned long flags; + + local_irq_save(flags); + unmask_rm7k_irq(irq); + local_irq_restore(flags); +} + +static void rm7k_cpu_irq_disable(unsigned int irq) +{ + unsigned long flags; + + local_irq_save(flags); + mask_rm7k_irq(irq); + local_irq_restore(flags); +} + +static unsigned int rm7k_cpu_irq_startup(unsigned int irq) +{ + rm7k_cpu_irq_enable(irq); + + return 0; +} + +#define rm7k_cpu_irq_shutdown rm7k_cpu_irq_disable + +/* + * While we ack the interrupt interrupts are disabled and thus we don't need + * to deal with concurrency issues. Same for rm7k_cpu_irq_end. + */ +static void rm7k_cpu_irq_ack(unsigned int irq) +{ + mask_rm7k_irq(irq); +} + +static void rm7k_cpu_irq_end(unsigned int irq) +{ + if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) + unmask_rm7k_irq(irq); +} + +static hw_irq_controller rm7k_irq_controller = { + "RM7000", + rm7k_cpu_irq_startup, + rm7k_cpu_irq_shutdown, + rm7k_cpu_irq_enable, + rm7k_cpu_irq_disable, + rm7k_cpu_irq_ack, + rm7k_cpu_irq_end, +}; + +void __init rm7k_cpu_irq_init(int base) +{ + int i; + + clear_c0_intcontrol(0x00000f00); /* Mask all */ + + for (i = base; i < base + 4; i++) { + irq_desc[i].status = IRQ_DISABLED; + irq_desc[i].action = NULL; + irq_desc[i].depth = 1; + irq_desc[i].handler = &rm7k_irq_controller; + } + + irq_base = base; +} diff -urN linux-2.4.28-bk3/arch/mips/kernel/irq_cpu.c linux-2.4.28-bk4/arch/mips/kernel/irq_cpu.c --- linux-2.4.28-bk3/arch/mips/kernel/irq_cpu.c 2003-08-25 04:44:40.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips/kernel/irq_cpu.c 2004-11-23 02:49:27.378391429 -0800 @@ -2,6 +2,8 @@ * Copyright 2001 MontaVista Software Inc. * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net * + * Copyright (C) 2001 Ralf Baechle + * * This file define the irq handler for MIPS CPU interrupts. * * This program is free software; you can redistribute it and/or modify it @@ -13,9 +15,12 @@ /* * Almost all MIPS CPUs define 8 interrupt sources. They are typically * level triggered (i.e., cannot be cleared from CPU; must be cleared from - * device). The first two are software interrupts. The last one is - * usually the CPU timer interrupt if counter register is present or, for - * CPUs with an external FPU, by convention it's the FPU exception interrupt. + * device). The first two are software interrupts which we don't really + * use or support. The last one is usually the CPU timer interrupt if + * counter register is present or, for CPUs with an external FPU, by + * convention it's the FPU exception interrupt. + * + * Don't even think about using this on SMP. You have been warned. * * This file exports one global function: * void mips_cpu_irq_init(int irq_base); @@ -26,18 +31,37 @@ #include #include +#include + +static int mips_cpu_irq_base; + +static inline void unmask_mips_irq(unsigned int irq) +{ + clear_c0_cause(0x100 << (irq - mips_cpu_irq_base)); + set_c0_status(0x100 << (irq - mips_cpu_irq_base)); +} -static int mips_cpu_irq_base = -1; +static inline void mask_mips_irq(unsigned int irq) +{ + clear_c0_status(0x100 << (irq - mips_cpu_irq_base)); +} -static void mips_cpu_irq_enable(unsigned int irq) +static inline void mips_cpu_irq_enable(unsigned int irq) { - clear_c0_cause( 1 << (irq - mips_cpu_irq_base + 8)); - set_c0_status(1 << (irq - mips_cpu_irq_base + 8)); + unsigned long flags; + + local_irq_save(flags); + unmask_mips_irq(irq); + local_irq_restore(flags); } static void mips_cpu_irq_disable(unsigned int irq) { - clear_c0_status(1 << (irq - mips_cpu_irq_base + 8)); + unsigned long flags; + + local_irq_save(flags); + mask_mips_irq(irq); + local_irq_restore(flags); } static unsigned int mips_cpu_irq_startup(unsigned int irq) @@ -49,21 +73,22 @@ #define mips_cpu_irq_shutdown mips_cpu_irq_disable +/* + * While we ack the interrupt interrupts are disabled and thus we don't need + * to deal with concurrency issues. Same for mips_cpu_irq_end. + */ static void mips_cpu_irq_ack(unsigned int irq) { - /* although we attempt to clear the IP bit in cause register, I think - * usually it is cleared by device (irq source) - */ - clear_c0_cause(1 << (irq - mips_cpu_irq_base + 8)); + /* Only necessary for soft interrupts */ + clear_c0_cause(0x100 << (irq - mips_cpu_irq_base)); - /* disable this interrupt - so that we safe proceed to the handler */ - mips_cpu_irq_disable(irq); + mask_mips_irq(irq); } static void mips_cpu_irq_end(unsigned int irq) { if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) - mips_cpu_irq_enable(irq); + unmask_mips_irq(irq); } static hw_irq_controller mips_cpu_irq_controller = { diff -urN linux-2.4.28-bk3/arch/mips/kernel/old-time.c linux-2.4.28-bk4/arch/mips/kernel/old-time.c --- linux-2.4.28-bk3/arch/mips/kernel/old-time.c 2003-08-25 04:44:40.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips/kernel/old-time.c 1969-12-31 16:00:00.000000000 -0800 @@ -1,521 +0,0 @@ -/* - * Copyright (C) 1991, 1992, 1995 Linus Torvalds - * Copyright (C) 1996 - 2000 Ralf Baechle - * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips - * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved. - * - * Don't use. Deprecated. Dead meat. - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -#include -#include - -extern volatile unsigned long wall_jiffies; -unsigned long r4k_interval; -extern rwlock_t xtime_lock; - -/* - * Change this if you have some constant time drift - */ -/* This is the value for the PC-style PICs. */ -/* #define USECS_PER_JIFFY (1000020/HZ) */ - -/* This is for machines which generate the exact clock. */ -#define USECS_PER_JIFFY (1000000/HZ) - -/* Cycle counter value at the previous timer interrupt.. */ - -static unsigned int timerhi, timerlo; - -/* - * On MIPS only R4000 and better have a cycle counter. - * - * FIXME: Does playing with the RP bit in c0_status interfere with this code? - */ -static unsigned long do_fast_gettimeoffset(void) -{ - u32 count; - unsigned long res, tmp; - - /* Last jiffy when do_fast_gettimeoffset() was called. */ - static unsigned long last_jiffies; - unsigned long quotient; - - /* - * Cached "1/(clocks per usec)*2^32" value. - * It has to be recalculated once each jiffy. - */ - static unsigned long cached_quotient; - - tmp = jiffies; - - quotient = cached_quotient; - - if (tmp && last_jiffies != tmp) { - last_jiffies = tmp; - __asm__(".set\tnoreorder\n\t" - ".set\tnoat\n\t" - ".set\tmips3\n\t" - "lwu\t%0,%2\n\t" - "dsll32\t$1,%1,0\n\t" - "or\t$1,$1,%0\n\t" - "ddivu\t$0,$1,%3\n\t" - "mflo\t$1\n\t" - "dsll32\t%0,%4,0\n\t" - "nop\n\t" - "ddivu\t$0,%0,$1\n\t" - "mflo\t%0\n\t" - ".set\tmips0\n\t" - ".set\tat\n\t" - ".set\treorder" - :"=&r" (quotient) - :"r" (timerhi), - "m" (timerlo), - "r" (tmp), - "r" (USECS_PER_JIFFY)); - cached_quotient = quotient; - } - - /* Get last timer tick in absolute kernel time */ - count = read_c0_count(); - - /* .. relative to previous jiffy (32 bits is enough) */ - count -= timerlo; - - __asm__("multu\t%1,%2\n\t" - "mfhi\t%0" - :"=r" (res) - :"r" (count), - "r" (quotient)); - - /* - * Due to possible jiffies inconsistencies, we need to check - * the result so that we'll get a timer that is monotonic. - */ - if (res >= USECS_PER_JIFFY) - res = USECS_PER_JIFFY-1; - - return res; -} - -/* This function must be called with interrupts disabled - * It was inspired by Steve McCanne's microtime-i386 for BSD. -- jrs - * - * However, the pc-audio speaker driver changes the divisor so that - * it gets interrupted rather more often - it loads 64 into the - * counter rather than 11932! This has an adverse impact on - * do_gettimeoffset() -- it stops working! What is also not - * good is that the interval that our timer function gets called - * is no longer 10.0002 ms, but 9.9767 ms. To get around this - * would require using a different timing source. Maybe someone - * could use the RTC - I know that this can interrupt at frequencies - * ranging from 8192Hz to 2Hz. If I had the energy, I'd somehow fix - * it so that at startup, the timer code in sched.c would select - * using either the RTC or the 8253 timer. The decision would be - * based on whether there was any other device around that needed - * to trample on the 8253. I'd set up the RTC to interrupt at 1024 Hz, - * and then do some jiggery to have a version of do_timer that - * advanced the clock by 1/1024 s. Every time that reached over 1/100 - * of a second, then do all the old code. If the time was kept correct - * then do_gettimeoffset could just return 0 - there is no low order - * divider that can be accessed. - * - * Ideally, you would be able to use the RTC for the speaker driver, - * but it appears that the speaker driver really needs interrupt more - * often than every 120 us or so. - * - * Anyway, this needs more thought.... pjsg (1993-08-28) - * - * If you are really that interested, you should be reading - * comp.protocols.time.ntp! - */ - -#define TICK_SIZE tick - -static unsigned long do_slow_gettimeoffset(void) -{ - int count; - - static int count_p = LATCH; /* for the first call after boot */ - static unsigned long jiffies_p; - - /* - * cache volatile jiffies temporarily; we have IRQs turned off. - */ - unsigned long jiffies_t; - - /* timer count may underflow right here */ - outb_p(0x00, 0x43); /* latch the count ASAP */ - - count = inb_p(0x40); /* read the latched count */ - - /* - * We do this guaranteed double memory access instead of a _p - * postfix in the previous port access. Wheee, hackady hack - */ - jiffies_t = jiffies; - - count |= inb_p(0x40) << 8; - - /* - * avoiding timer inconsistencies (they are rare, but they happen)... - * there are two kinds of problems that must be avoided here: - * 1. the timer counter underflows - * 2. hardware problem with the timer, not giving us continuous time, - * the counter does small "jumps" upwards on some Pentium systems, - * (see c't 95/10 page 335 for Neptun bug.) - */ - - if( jiffies_t == jiffies_p ) { - if( count > count_p ) { - /* the nutcase */ - - outb_p(0x0A, 0x20); - - /* assumption about timer being IRQ1 */ - if (inb(0x20) & 0x01) { - /* - * We cannot detect lost timer interrupts ... - * well, that's why we call them lost, don't we? :) - * [hmm, on the Pentium and Alpha we can ... sort of] - */ - count -= LATCH; - } else { - printk("do_slow_gettimeoffset(): hardware timer problem?\n"); - } - } - } else - jiffies_p = jiffies_t; - - count_p = count; - - count = ((LATCH-1) - count) * TICK_SIZE; - count = (count + LATCH/2) / LATCH; - - return count; -} - -static unsigned long (*do_gettimeoffset)(void) = do_slow_gettimeoffset; - -/* - * This version of gettimeofday has near microsecond resolution. - */ -void do_gettimeofday(struct timeval *tv) -{ - unsigned long flags; - - read_lock_irqsave (&xtime_lock, flags); - *tv = xtime; - tv->tv_usec += do_gettimeoffset(); - - /* - * xtime is atomically updated in timer_bh. jiffies - wall_jiffies - * is nonzero if the timer bottom half hasnt executed yet. - */ - if (jiffies - wall_jiffies) - tv->tv_usec += USECS_PER_JIFFY; - - read_unlock_irqrestore (&xtime_lock, flags); - - if (tv->tv_usec >= 1000000) { - tv->tv_usec -= 1000000; - tv->tv_sec++; - } -} - -void do_settimeofday(struct timeval *tv) -{ - write_lock_irq (&xtime_lock); - - /* This is revolting. We need to set the xtime.tv_usec - * correctly. However, the value in this location is - * is value at the last tick. - * Discover what correction gettimeofday - * would have done, and then undo it! - */ - tv->tv_usec -= do_gettimeoffset(); - - if (tv->tv_usec < 0) { - tv->tv_usec += 1000000; - tv->tv_sec--; - } - - xtime = *tv; - time_adjust = 0; /* stop active adjtime() */ - time_status |= STA_UNSYNC; - time_maxerror = NTP_PHASE_LIMIT; - time_esterror = NTP_PHASE_LIMIT; - - write_unlock_irq (&xtime_lock); -} - -/* - * In order to set the CMOS clock precisely, set_rtc_mmss has to be - * called 500 ms after the second nowtime has started, because when - * nowtime is written into the registers of the CMOS clock, it will - * jump to the next second precisely 500 ms later. Check the Motorola - * MC146818A or Dallas DS12887 data sheet for details. - * - * BUG: This routine does not handle hour overflow properly; it just - * sets the minutes. Usually you won't notice until after reboot! - */ -static int set_rtc_mmss(unsigned long nowtime) -{ - int retval = 0; - int real_seconds, real_minutes, cmos_minutes; - unsigned char save_control, save_freq_select; - - save_control = CMOS_READ(RTC_CONTROL); /* tell the clock it's being set */ - CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL); - - save_freq_select = CMOS_READ(RTC_FREQ_SELECT); /* stop and reset prescaler */ - CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT); - - cmos_minutes = CMOS_READ(RTC_MINUTES); - if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) - BCD_TO_BIN(cmos_minutes); - - /* - * since we're only adjusting minutes and seconds, - * don't interfere with hour overflow. This avoids - * messing with unknown time zones but requires your - * RTC not to be off by more than 15 minutes - */ - real_seconds = nowtime % 60; - real_minutes = nowtime / 60; - if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1) - real_minutes += 30; /* correct for half hour time zone */ - real_minutes %= 60; - - if (abs(real_minutes - cmos_minutes) < 30) { - if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { - BIN_TO_BCD(real_seconds); - BIN_TO_BCD(real_minutes); - } - CMOS_WRITE(real_seconds,RTC_SECONDS); - CMOS_WRITE(real_minutes,RTC_MINUTES); - } else { - printk(KERN_WARNING - "set_rtc_mmss: can't update from %d to %d\n", - cmos_minutes, real_minutes); - retval = -1; - } - - /* The following flags have to be released exactly in this order, - * otherwise the DS12887 (popular MC146818A clone with integrated - * battery and quartz) will not reset the oscillator and will not - * update precisely 500 ms later. You won't find this mentioned in - * the Dallas Semiconductor data sheets, but who believes data - * sheets anyway ... -- Markus Kuhn - */ - CMOS_WRITE(save_control, RTC_CONTROL); - CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT); - - return retval; -} - -/* last time the cmos clock got updated */ -static long last_rtc_update; - -/* - * timer_interrupt() needs to keep up the real-time clock, - * as well as call the "do_timer()" routine every clocktick - */ -static void inline -timer_interrupt(int irq, void *dev_id, struct pt_regs * regs) -{ -#ifdef CONFIG_DDB5074 - static unsigned cnt, period, dist; - - if (cnt == 0 || cnt == dist) - ddb5074_led_d2(1); - else if (cnt == 7 || cnt == dist+7) - ddb5074_led_d2(0); - - if (++cnt > period) { - cnt = 0; - /* The hyperbolic function below modifies the heartbeat period - * length in dependency of the current (5min) load. It goes - * through the points f(0)=126, f(1)=86, f(5)=51, - * f(inf)->30. */ - period = ((672<pid) { - extern int _stext; - unsigned long pc = regs->cp0_epc; - - pc -= (unsigned long) &_stext; - pc >>= prof_shift; - /* - * Dont ignore out-of-bounds pc values silently, - * put them into the last histogram slot, so if - * present, they will show up as a sharp peak. - */ - if (pc > prof_len-1) - pc = prof_len-1; - atomic_inc((atomic_t *)&prof_buffer[pc]); - } - } - do_timer(regs); - - /* - * If we have an externally synchronized Linux clock, then update - * CMOS clock accordingly every ~11 minutes. Set_rtc_mmss() has to be - * called as close as possible to 500 ms before the new second starts. - */ - read_lock (&xtime_lock); - if ((time_status & STA_UNSYNC) == 0 && - xtime.tv_sec > last_rtc_update + 660 && - xtime.tv_usec >= 500000 - ((unsigned) tick) / 2 && - xtime.tv_usec <= 500000 + ((unsigned) tick) / 2) { - if (set_rtc_mmss(xtime.tv_sec) == 0) - last_rtc_update = xtime.tv_sec; - else - /* do it again in 60 s */ - last_rtc_update = xtime.tv_sec - 600; - } - - /* - * As we return to user mode fire off the other CPU schedulers.. this - * is basically because we don't yet share IRQ's around. This message - * is rigged to be safe on the 386 - basically it's a hack, so don't - * look closely for now.. - */ - /*smp_message_pass(MSG_ALL_BUT_SELF, MSG_RESCHEDULE, 0L, 0); */ - read_unlock (&xtime_lock); -} - -static inline void -r4k_timer_interrupt(int irq, void *dev_id, struct pt_regs * regs) -{ - unsigned int count; - - /* - * The cycle counter is only 32 bit which is good for about - * a minute at current count rates of upto 150MHz or so. - */ - count = read_c0_count(); - timerhi += (count < timerlo); /* Wrap around */ - timerlo = count; - -#ifdef CONFIG_SGI_IP22 - /* Since we don't get anything but r4k timer interrupts, we need to - * set this up so that we'll get one next time. Fortunately since we - * have timerhi/timerlo, we don't care so much if we miss one. So - * we need only ask for the next in r4k_interval counts. On other - * archs we have a real timer, so we don't want this. - */ - write_c0_compare( - (unsigned long) (count + r4k_interval)); - kstat.irqs[0][irq]++; -#endif - - timer_interrupt(irq, dev_id, regs); - - if (!jiffies) - { - /* - * If jiffies has overflowed in this timer_interrupt we must - * update the timer[hi]/[lo] to make do_fast_gettimeoffset() - * quotient calc still valid. -arca - */ - timerhi = timerlo = 0; - } -} - -void indy_r4k_timer_interrupt (struct pt_regs *regs) -{ - int cpu = smp_processor_id(); - int irq = 7; - - irq_enter(cpu, irq); - r4k_timer_interrupt(irq, NULL, regs); - irq_exit(cpu, irq); - - if (softirq_pending(cpu)) - do_softirq(); -} - -struct irqaction irq0 = { timer_interrupt, SA_INTERRUPT, 0, - "timer", NULL, NULL}; - - -void (*board_time_init)(struct irqaction *irq); - -void __init time_init(void) -{ - unsigned int epoch = 0, year, mon, day, hour, min, sec; - int i; - - /* The Linux interpretation of the CMOS clock register contents: - * When the Update-In-Progress (UIP) flag goes from 1 to 0, the - * RTC registers show the second which has precisely just started. - * Let's hope other operating systems interpret the RTC the same way. - */ - /* read RTC exactly on falling edge of update flag */ - for (i = 0 ; i < 1000000 ; i++) /* may take up to 1 second... */ - if (CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP) - break; - for (i = 0 ; i < 1000000 ; i++) /* must try at least 2.228 ms */ - if (!(CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP)) - break; - do { /* Isn't this overkill ? UIP above should guarantee consistency */ - sec = CMOS_READ(RTC_SECONDS); - min = CMOS_READ(RTC_MINUTES); - hour = CMOS_READ(RTC_HOURS); - day = CMOS_READ(RTC_DAY_OF_MONTH); - mon = CMOS_READ(RTC_MONTH); - year = CMOS_READ(RTC_YEAR); - } while (sec != CMOS_READ(RTC_SECONDS)); - if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) - { - BCD_TO_BIN(sec); - BCD_TO_BIN(min); - BCD_TO_BIN(hour); - BCD_TO_BIN(day); - BCD_TO_BIN(mon); - BCD_TO_BIN(year); - } - - /* Attempt to guess the epoch. This is the same heuristic as in rtc.c so - no stupid things will happen to timekeeping. Who knows, maybe Ultrix - also uses 1952 as epoch ... */ - if (year > 10 && year < 44) { - epoch = 1980; - } else if (year < 96) { - epoch = 1952; - } - year += epoch; - - write_lock_irq (&xtime_lock); - xtime.tv_sec = mktime(year, mon, day, hour, min, sec); - xtime.tv_usec = 0; - write_unlock_irq (&xtime_lock); - - if (cpu_has_counter) { - write_c0_count(0); - do_gettimeoffset = do_fast_gettimeoffset; - irq0.handler = r4k_timer_interrupt; - } - - board_time_init(&irq0); -} diff -urN linux-2.4.28-bk3/arch/mips/kernel/proc.c linux-2.4.28-bk4/arch/mips/kernel/proc.c --- linux-2.4.28-bk3/arch/mips/kernel/proc.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/kernel/proc.c 2004-11-23 02:49:27.381391551 -0800 @@ -48,7 +48,6 @@ [CPU_R4640] "R4640", [CPU_NEVADA] "Nevada", [CPU_RM7000] "RM7000", - [CPU_RM9000] "RM9000", [CPU_R5432] "R5432", [CPU_4KC] "MIPS 4Kc", [CPU_5KC] "MIPS 5Kc", @@ -58,23 +57,27 @@ [CPU_TX3922] "TX3922", [CPU_TX3927] "TX3927", [CPU_AU1000] "Au1000", - [CPU_AU1500] "Au1500", [CPU_4KEC] "MIPS 4KEc", [CPU_4KSC] "MIPS 4KSc", [CPU_VR41XX] "NEC Vr41xx", [CPU_R5500] "R5500", [CPU_TX49XX] "TX49xx", + [CPU_AU1500] "Au1500", [CPU_20KC] "MIPS 20Kc", - [CPU_24K] "MIPS 24K", - [CPU_25KF] "MIPS 25Kf", [CPU_VR4111] "NEC VR4111", [CPU_VR4121] "NEC VR4121", [CPU_VR4122] "NEC VR4122", [CPU_VR4131] "NEC VR4131", - [CPU_VR4133] "NEC VR4133", [CPU_VR4181] "NEC VR4181", [CPU_VR4181A] "NEC VR4181A", - [CPU_SR71000] "Sandcraft SR71000" + [CPU_AU1100] "Au1100", + [CPU_SR71000] "Sandcraft SR71000", + [CPU_RM9000] "RM9000", + [CPU_25KF] "MIPS 25Kf", + [CPU_VR4133] "NEC VR4133", + [CPU_AU1550] "Au1550", + [CPU_24K] "MIPS 24K", + [CPU_AU1200] "Au1200", }; @@ -116,7 +119,7 @@ cpu_has_watch ? "yes" : "no"); sprintf(fmt, "VCE%%c exceptions\t\t: %s\n", - cpu_has_vce ? "%d" : "not available"); + cpu_has_vce ? "%u" : "not available"); seq_printf(m, fmt, 'D', vced_count); seq_printf(m, fmt, 'I', vcei_count); diff -urN linux-2.4.28-bk3/arch/mips/kernel/scall_o32.S linux-2.4.28-bk4/arch/mips/kernel/scall_o32.S --- linux-2.4.28-bk3/arch/mips/kernel/scall_o32.S 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/kernel/scall_o32.S 2004-11-23 02:49:27.381391551 -0800 @@ -31,8 +31,8 @@ sltiu t0, v0, MAX_SYSCALL_NO + 1 # check syscall number addiu t1, 4 # skip to next instruction - beqz t0, illegal_syscall sw t1, PT_EPC(sp) + beqz t0, illegal_syscall /* XXX Put both in one cacheline, should save a bit. */ sll t0, v0, 2 diff -urN linux-2.4.28-bk3/arch/mips/kernel/semaphore.c linux-2.4.28-bk4/arch/mips/kernel/semaphore.c --- linux-2.4.28-bk3/arch/mips/kernel/semaphore.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/kernel/semaphore.c 2004-11-23 02:49:27.382391592 -0800 @@ -8,7 +8,7 @@ #include #include -#ifdef CONFIG_CPU_HAS_LLDSCD +#ifndef CONFIG_CPU_HAS_LLDSCD /* * On machines without lld/scd we need a spinlock to make the manipulation of * sem->count and sem->waking atomic. Scalability isn't an issue because diff -urN linux-2.4.28-bk3/arch/mips/kernel/setup.c linux-2.4.28-bk4/arch/mips/kernel/setup.c --- linux-2.4.28-bk3/arch/mips/kernel/setup.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/kernel/setup.c 2004-11-23 02:49:27.382391592 -0800 @@ -40,6 +40,7 @@ #include struct cpuinfo_mips cpu_data[NR_CPUS]; +EXPORT_SYMBOL(cpu_data); /* * There are several bus types available for MIPS machines. "RISC PC" diff -urN linux-2.4.28-bk3/arch/mips/kernel/signal.c linux-2.4.28-bk4/arch/mips/kernel/signal.c --- linux-2.4.28-bk3/arch/mips/kernel/signal.c 2003-08-25 04:44:40.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips/kernel/signal.c 2004-11-23 02:49:27.383391633 -0800 @@ -382,7 +382,7 @@ sp -= 32; /* This is the X/Open sanctioned signal stack switching. */ - if ((ka->sa.sa_flags & SA_ONSTACK) && ! on_sig_stack(sp)) + if ((ka->sa.sa_flags & SA_ONSTACK) && (sas_ss_flags (sp) == 0)) sp = current->sas_ss_sp + current->sas_ss_size; return (void *)((sp - frame_size) & ALMASK); diff -urN linux-2.4.28-bk3/arch/mips/kernel/smp.c linux-2.4.28-bk4/arch/mips/kernel/smp.c --- linux-2.4.28-bk3/arch/mips/kernel/smp.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/kernel/smp.c 2004-11-23 02:49:27.384391674 -0800 @@ -52,6 +52,9 @@ int __cpu_logical_map[NR_CPUS]; cycles_t cacheflush_time; +EXPORT_SYMBOL(__cpu_number_map); +EXPORT_SYMBOL(__cpu_logical_map); + void __init smp_callin(void) { #if 0 @@ -110,6 +113,7 @@ spin_lock(&smp_call_lock); call_data = &data; + wmb(); /* Send a message to all other CPUs and wait for them to respond */ for (i = 0; i < smp_num_cpus; i++) @@ -283,7 +287,6 @@ EXPORT_SYMBOL(smp_num_cpus); EXPORT_SYMBOL(flush_tlb_page); -EXPORT_SYMBOL(cpu_data); EXPORT_SYMBOL(synchronize_irq); EXPORT_SYMBOL(kernel_flag); EXPORT_SYMBOL(__global_sti); diff -urN linux-2.4.28-bk3/arch/mips/kernel/syscall.c linux-2.4.28-bk4/arch/mips/kernel/syscall.c --- linux-2.4.28-bk3/arch/mips/kernel/syscall.c 2003-08-25 04:44:40.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips/kernel/syscall.c 2004-11-23 02:49:27.384391674 -0800 @@ -39,7 +39,7 @@ extern syscall_t sys_call_table[]; extern unsigned char sys_narg_table[]; -asmlinkage int sys_pipe(struct pt_regs regs) +asmlinkage int sys_pipe(volatile struct pt_regs regs) { int fd[2]; int error, res; diff -urN linux-2.4.28-bk3/arch/mips/kernel/sysirix.c linux-2.4.28-bk4/arch/mips/kernel/sysirix.c --- linux-2.4.28-bk3/arch/mips/kernel/sysirix.c 2003-08-25 04:44:40.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips/kernel/sysirix.c 2004-11-23 02:49:27.386391755 -0800 @@ -928,8 +928,8 @@ return error; down_read(&uts_sem); - if(len > (__NEW_UTS_LEN - 1)) - len = __NEW_UTS_LEN - 1; + if (len > __NEW_UTS_LEN) + len = __NEW_UTS_LEN; error = 0; if (copy_to_user(name, system_utsname.domainname, len)) error = -EFAULT; @@ -1712,7 +1712,7 @@ printk("[%s:%d] Wheee.. irix_statvfs(%s,%p)\n", current->comm, current->pid, fname, buf); - error = verify_area(VERIFY_WRITE, buf, sizeof(struct irix_statvfs)); + error = verify_area(VERIFY_WRITE, buf, sizeof(struct irix_statvfs64)); if(error) goto out; error = user_path_walk(fname, &nd); diff -urN linux-2.4.28-bk3/arch/mips/kernel/time.c linux-2.4.28-bk4/arch/mips/kernel/time.c --- linux-2.4.28-bk3/arch/mips/kernel/time.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/kernel/time.c 2004-11-23 02:49:27.386391755 -0800 @@ -1,7 +1,7 @@ /* * Copyright 2001 MontaVista Software Inc. * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net - * Copyright (c) 2003 Maciej W. Rozycki + * Copyright (c) 2003, 2004 Maciej W. Rozycki * * Common time service routines for MIPS machines. See * Documentation/mips/time.README. @@ -26,6 +26,7 @@ #include #include +#include #include #include #include @@ -242,7 +243,7 @@ __asm__("multu %1,%2" : "=h" (res) : "r" (count), "r" (sll32_usecs_per_cycle) - : "lo", "accum"); + : "lo", GCC_REG_ACCUM); /* * Due to possible jiffies inconsistencies, we need to check @@ -297,7 +298,7 @@ __asm__("multu %1,%2" : "=h" (res) : "r" (count), "r" (quotient) - : "lo", "accum"); + : "lo", GCC_REG_ACCUM); /* * Due to possible jiffies inconsistencies, we need to check @@ -339,7 +340,7 @@ : "r" (timerhi), "m" (timerlo), "r" (tmp), "r" (USECS_PER_JIFFY), "r" (USECS_PER_JIFFY_FRAC) - : "hi", "lo", "accum"); + : "hi", "lo", GCC_REG_ACCUM); cached_quotient = quotient; } } @@ -353,7 +354,7 @@ __asm__("multu %1,%2" : "=h" (res) : "r" (count), "r" (quotient) - : "lo", "accum"); + : "lo", GCC_REG_ACCUM); /* * Due to possible jiffies inconsistencies, we need to check diff -urN linux-2.4.28-bk3/arch/mips/kernel/traps.c linux-2.4.28-bk4/arch/mips/kernel/traps.c --- linux-2.4.28-bk3/arch/mips/kernel/traps.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/kernel/traps.c 2004-11-23 02:49:27.387391796 -0800 @@ -9,7 +9,7 @@ * Copyright (C) 1999 Silicon Graphics, Inc. * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com * Copyright (C) 2000, 01 MIPS Technologies, Inc. - * Copyright (C) 2002, 2003 Maciej W. Rozycki + * Copyright (C) 2002, 2003, 2004 Maciej W. Rozycki */ #include #include @@ -22,6 +22,7 @@ #include #include +#include #include #include #include @@ -352,7 +353,7 @@ int action = MIPS_BE_FATAL; if (data && !user_mode(regs)) - fixup = search_dbe_table(regs->cp0_epc); + fixup = search_dbe_table(exception_epc(regs)); if (fixup) action = MIPS_BE_FIXUP; @@ -596,9 +597,12 @@ /* * There is the ancient bug in the MIPS assemblers that the break * code starts left to bit 16 instead to bit 6 in the opcode. - * Gas is bug-compatible ... + * Gas is bug-compatible, but not always, grrr... + * We handle both cases with a simple heuristics. --macro */ - bcode = ((opcode >> 16) & ((1 << 20) - 1)); + bcode = ((opcode >> 6) & ((1 << 20) - 1)); + if (bcode < (1 << 10)) + bcode <<= 10; /* * (A short test says that IRIX 5.3 sends SIGTRAP for all break @@ -607,9 +611,9 @@ * But should we continue the brokenness??? --macro */ switch (bcode) { - case 6: - case 7: - if (bcode == 7) + case BRK_OVERFLOW << 10: + case BRK_DIVZERO << 10: + if (bcode == (BRK_DIVZERO << 10)) info.si_code = FPE_INTDIV; else info.si_code = FPE_INTOVF; @@ -633,7 +637,7 @@ /* Immediate versions don't provide a code. */ if (!(opcode & OPCODE)) - tcode = ((opcode >> 6) & ((1 << 20) - 1)); + tcode = ((opcode >> 6) & ((1 << 10) - 1)); /* * (A short test says that IRIX 5.3 sends SIGTRAP for all trap @@ -642,9 +646,9 @@ * But should we continue the brokenness??? --macro */ switch (tcode) { - case 6: - case 7: - if (tcode == 7) + case BRK_OVERFLOW: + case BRK_DIVZERO: + if (tcode == BRK_DIVZERO) info.si_code = FPE_INTDIV; else info.si_code = FPE_INTOVF; @@ -933,8 +937,7 @@ memcpy((void *)(KSEG0 + 0x300), &except_vec_ejtag_debug, 0x80); /* - * Only some CPUs have the watch exceptions or a dedicated - * interrupt vector. + * Only some CPUs have the watch exceptions. */ if (cpu_has_watch) set_except_vector(23, handle_watch); diff -urN linux-2.4.28-bk3/arch/mips/lasat/ds1603.c linux-2.4.28-bk4/arch/mips/lasat/ds1603.c --- linux-2.4.28-bk3/arch/mips/lasat/ds1603.c 2003-08-25 04:44:40.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips/lasat/ds1603.c 2004-11-23 02:49:27.388391837 -0800 @@ -51,14 +51,14 @@ { data |= ds1603->clk; rtc_reg_write(data); - ndelay(250); + lasat_ndelay(250); if (ds1603->data_reversed) data &= ~ds1603->data; else data |= ds1603->data; data &= ~ds1603->clk; rtc_reg_write(data); - ndelay(250 + ds1603->huge_delay); + lasat_ndelay(250 + ds1603->huge_delay); } static void rtc_write_databit(unsigned int bit) @@ -72,7 +72,7 @@ data &= ~ds1603->data; rtc_reg_write(data); - ndelay(50 + ds1603->huge_delay); + lasat_ndelay(50 + ds1603->huge_delay); rtc_cycle_clock(data); } @@ -125,13 +125,13 @@ rtc_reg_write(rtc_reg_read() & ~ds1603->clk); - ndelay(50); + lasat_ndelay(50); } static void rtc_end_op(void) { rtc_nrst_low(); - ndelay(1000); + lasat_ndelay(1000); } /* interface */ diff -urN linux-2.4.28-bk3/arch/mips/lasat/image/Makefile linux-2.4.28-bk4/arch/mips/lasat/image/Makefile --- linux-2.4.28-bk3/arch/mips/lasat/image/Makefile 2003-08-25 04:44:40.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips/lasat/image/Makefile 2004-11-23 02:49:27.388391837 -0800 @@ -24,12 +24,13 @@ LDSCRIPT= -Tromscript.normal -AFLAGS_head.o = -D_kernel_start=0x$(KERNEL_START) \ +HEAD_DEFINES = -D_kernel_start=0x$(KERNEL_START) \ -D_kernel_entry=0x$(KERNEL_ENTRY) \ -D VERSION="\"$(Version)\"" \ -D TIMESTAMP=$(shell date +%s) -head.o: $(KERNEL_IMAGE) +head.o: head.S $(KERNEL_IMAGE) + $(CC) -fno-pic $(HEAD_DEFINES) -I$(TOPDIR)/include -c -o $@ $< OBJECTS= head.o kImage.o @@ -44,7 +45,7 @@ $(LD) $(LDFLAGS) $(LDSCRIPT) -o rom $(OBJECTS) %.o: %.gz - $(LD) -r -o $@ -b binary $< + $(LD) $(LDFLAGS) -r -o $@ -b binary $< %.gz: %.bin gzip -cf -9 $< > $@ diff -urN linux-2.4.28-bk3/arch/mips/ld.script.in linux-2.4.28-bk4/arch/mips/ld.script.in --- linux-2.4.28-bk3/arch/mips/ld.script.in 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/ld.script.in 2004-11-23 02:49:27.389391877 -0800 @@ -10,6 +10,7 @@ _ftext = . ; *(.text) *(.rodata) + *(.rodata.*) *(.rodata1) /* .gnu.warning sections are handled specially by elf32.em. */ *(.gnu.warning) diff -urN linux-2.4.28-bk3/arch/mips/lib/dump_tlb.c linux-2.4.28-bk4/arch/mips/lib/dump_tlb.c --- linux-2.4.28-bk3/arch/mips/lib/dump_tlb.c 2003-08-25 04:44:40.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips/lib/dump_tlb.c 2004-11-23 02:49:27.390391918 -0800 @@ -11,13 +11,13 @@ #include #include -#include #include +#include #include #include #include -static inline const char *msg2str(unsigned int mask) +static inline const char *msk2str(unsigned int mask) { switch (mask) { case PM_4K: return "4kb"; @@ -36,15 +36,15 @@ void dump_tlb(int first, int last) { - int i; unsigned int pagemask, c0, c1, asid; unsigned long long entrylo0, entrylo1; unsigned long entryhi; + int i; asid = read_c0_entryhi() & 0xff; printk("\n"); - for(i=first;i<=last;i++) { + for (i = first; i <= last; i++) { write_c0_index(i); __asm__ __volatile__( ".set\tmips3\n\t" @@ -65,7 +65,7 @@ /* * Only print entries in use */ - printk("Index: %2d pgmask=%s ", i, msg2str(pagemask)); + printk("Index: %2d pgmask=%s ", i, msk2str(pagemask)); c0 = (entrylo0 >> 3) & 7; c1 = (entrylo1 >> 3) & 7; @@ -109,8 +109,7 @@ "nop;nop;nop;nop;nop;nop;nop\n\t" \ ".set\treorder"); -void -dump_tlb_addr(unsigned long addr) +void dump_tlb_addr(unsigned long addr) { unsigned long flags, oldpid; int index; @@ -135,14 +134,12 @@ dump_tlb(index, index); } -void -dump_tlb_nonwired(void) +void dump_tlb_nonwired(void) { dump_tlb(read_c0_wired(), current_cpu_data.tlbsize - 1); } -void -dump_list_process(struct task_struct *t, void *address) +void dump_list_process(struct task_struct *t, void *address) { pgd_t *page_dir, *pgd; pmd_t *pmd; @@ -194,14 +191,12 @@ printk("\n"); } -void -dump_list_current(void *address) +void dump_list_current(void *address) { dump_list_process(current, address); } -unsigned int -vtop(void *address) +unsigned int vtop(void *address) { pgd_t *pgd; pmd_t *pmd; @@ -218,14 +213,14 @@ return paddr; } -void -dump16(unsigned long *p) +void dump16(unsigned long *p) { int i; - for(i=0;i<8;i++) - { - printk("*%8p = %08lx, ", p, *p); p++; - printk("*%8p = %08lx\n", p, *p); p++; + for (i = 0; i < 8; i++) { + printk("*%08lx == %08lx, ", (unsigned long)p, *p); + p++; + printk("*%08lx == %08lx\n", (unsigned long)p, *p); + p++; } } diff -urN linux-2.4.28-bk3/arch/mips/lib/r3k_dump_tlb.c linux-2.4.28-bk4/arch/mips/lib/r3k_dump_tlb.c --- linux-2.4.28-bk3/arch/mips/lib/r3k_dump_tlb.c 2003-08-25 04:44:40.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips/lib/r3k_dump_tlb.c 2004-11-23 02:49:27.390391918 -0800 @@ -19,8 +19,7 @@ extern int r3k_have_wired_reg; /* defined in tlb-r3k.c */ -void -dump_tlb(int first, int last) +void dump_tlb(int first, int last) { int i; unsigned int asid; @@ -28,8 +27,7 @@ asid = read_c0_entryhi() & 0xfc0; - for(i=first;i<=last;i++) - { + for (i = first; i <= last; i++) { write_c0_index(i<<8); __asm__ __volatile__( ".set\tnoreorder\n\t" @@ -63,14 +61,12 @@ write_c0_entryhi(asid); } -void -dump_tlb_all(void) +void dump_tlb_all(void) { dump_tlb(0, current_cpu_data.tlbsize - 1); } -void -dump_tlb_wired(void) +void dump_tlb_wired(void) { int wired = r3k_have_wired_reg ? read_c0_wired() : 8; @@ -78,8 +74,7 @@ dump_tlb(0, wired - 1); } -void -dump_tlb_addr(unsigned long addr) +void dump_tlb_addr(unsigned long addr) { unsigned long flags, oldpid; int index; @@ -101,15 +96,13 @@ dump_tlb(index, index); } -void -dump_tlb_nonwired(void) +void dump_tlb_nonwired(void) { int wired = r3k_have_wired_reg ? read_c0_wired() : 8; dump_tlb(wired, current_cpu_data.tlbsize - 1); } -void -dump_list_process(struct task_struct *t, void *address) +void dump_list_process(struct task_struct *t, void *address) { pgd_t *page_dir, *pgd; pmd_t *pmd; @@ -148,14 +141,12 @@ printk("\n"); } -void -dump_list_current(void *address) +void dump_list_current(void *address) { dump_list_process(current, address); } -unsigned int -vtop(void *address) +unsigned int vtop(void *address) { pgd_t *pgd; pmd_t *pmd; @@ -172,16 +163,14 @@ return paddr; } -void -dump16(unsigned long *p) +void dump16(unsigned long *p) { int i; - for(i=0;i<8;i++) - { - printk("*%08lx == %08lx, ", - (unsigned long)p, (unsigned long)*p++); - printk("*%08lx == %08lx\n", - (unsigned long)p, (unsigned long)*p++); + for (i = 0; i < 8; i++) { + printk("*%08lx == %08lx, ", (unsigned long)p, *p); + p++; + printk("*%08lx == %08lx\n", (unsigned long)p, *p); + p++; } } diff -urN linux-2.4.28-bk3/arch/mips/lib/strlen_user.S linux-2.4.28-bk4/arch/mips/lib/strlen_user.S --- linux-2.4.28-bk3/arch/mips/lib/strlen_user.S 2002-11-28 15:53:10.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/lib/strlen_user.S 2004-11-23 02:49:27.391391959 -0800 @@ -23,18 +23,18 @@ * Return 0 for error */ LEAF(__strlen_user_asm) - lw v0, THREAD_CURDS($28) # pointer ok? - and v0, a0 - bltz v0, fault + LONG_L v0, THREAD_CURDS($28) # pointer ok? + and v0, a0 + bltz v0, fault FEXPORT(__strlen_user_nocheck_asm) - move v0, a0 + move v0, a0 1: EX(lb, t0, (v0), fault) - addiu v0, 1 - bnez t0, 1b - subu v0, a0 - jr ra + addiu v0, 1 + bnez t0, 1b + subu v0, a0 + jr ra END(__strlen_user_asm) -fault: move v0, zero - jr ra +fault: move v0, zero + jr ra diff -urN linux-2.4.28-bk3/arch/mips/lib/strncpy_user.S linux-2.4.28-bk4/arch/mips/lib/strncpy_user.S --- linux-2.4.28-bk3/arch/mips/lib/strncpy_user.S 2002-08-02 17:39:43.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips/lib/strncpy_user.S 2004-11-23 02:49:27.391391959 -0800 @@ -28,31 +28,31 @@ */ LEAF(__strncpy_from_user_asm) - lw v0, THREAD_CURDS($28) # pointer ok? - and v0, a1 - bltz v0, fault + LONG_L v0, THREAD_CURDS($28) # pointer ok? + and v0, a1 + bltz v0, fault -EXPORT(__strncpy_from_user_nocheck_asm) - move v0, zero - move v1, a1 - .set noreorder -1: EX(lbu, t0, (v1), fault) - addiu v1, v1, 1 - beqz t0, 2f - sb t0, (a0) - addiu v0, 1 - bne v0, a2, 1b - addiu a0, 1 - .set reorder -2: addu t0, a1, v0 - xor t0, a1 - bltz t0, fault - jr ra # return n +FEXPORT(__strncpy_from_user_nocheck_asm) + move v0, zero + move v1, a1 + .set noreorder +1: EX(lbu, t0, (v1), fault) + PTR_ADDIU v1, 1 + beqz t0, 2f + sb t0, (a0) + PTR_ADDIU v0, 1 + bne v0, a2, 1b + PTR_ADDIU a0, 1 + .set reorder +2: PTR_ADDU t0, a1, v0 + xor t0, a1 + bltz t0, fault + jr ra # return n END(__strncpy_from_user_asm) -fault: li v0, -EFAULT - jr ra +fault: li v0, -EFAULT + jr ra - .section __ex_table,"a" - PTR 1b, fault + .section __ex_table,"a" + PTR 1b, fault .previous diff -urN linux-2.4.28-bk3/arch/mips/lib/strnlen_user.S linux-2.4.28-bk4/arch/mips/lib/strnlen_user.S --- linux-2.4.28-bk3/arch/mips/lib/strnlen_user.S 2002-11-28 15:53:10.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/lib/strnlen_user.S 2004-11-23 02:49:27.391391959 -0800 @@ -27,23 +27,22 @@ * bytes. There's nothing secret there ... */ LEAF(__strnlen_user_asm) - lw v0, THREAD_CURDS($28) # pointer ok? - and v0, a0 - bltz v0, fault + LONG_L v0, THREAD_CURDS($28) # pointer ok? + and v0, a0 + bltz v0, fault FEXPORT(__strnlen_user_nocheck_asm) - .type __strnlen_user_nocheck_asm,@function - move v0, a0 - addu a1, a0 # stop pointer - .set noreorder -1: beq v0, a1, 1f # limit reached? - addiu v0, 1 - .set reorder + move v0, a0 + PTR_ADDU a1, a0 # stop pointer + .set noreorder +1: beq v0, a1, 1f # limit reached? + PTR_ADDIU v0, 1 + .set reorder EX(lb, t0, -1(v0), fault) - bnez t0, 1b -1: subu v0, a0 - jr ra + bnez t0, 1b +1: PTR_SUBU v0, a0 + jr ra END(__strnlen_user_asm) -fault: move v0, zero - jr ra +fault: move v0, zero + jr ra diff -urN linux-2.4.28-bk3/arch/mips/math-emu/cp1emu.c linux-2.4.28-bk4/arch/mips/math-emu/cp1emu.c --- linux-2.4.28-bk3/arch/mips/math-emu/cp1emu.c 2003-08-25 04:44:40.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips/math-emu/cp1emu.c 2004-11-23 02:49:27.392392000 -0800 @@ -529,9 +529,9 @@ if (MIPSInst_FUNC(ir) != movc_op) return SIGILL; cond = fpucondbit[MIPSInst_RT(ir) >> 2]; - if (((ctx->sr & cond) != 0) != ((MIPSInst_RT(ir) & 1) != 0)) - return 0; - xcp->regs[MIPSInst_RD(ir)] = xcp->regs[MIPSInst_RS(ir)]; + if (((ctx->sr & cond) != 0) == ((MIPSInst_RT(ir) & 1) != 0)) + xcp->regs[MIPSInst_RD(ir)] = + xcp->regs[MIPSInst_RS(ir)]; break; #endif diff -urN linux-2.4.28-bk3/arch/mips/mm/Makefile linux-2.4.28-bk4/arch/mips/mm/Makefile --- linux-2.4.28-bk3/arch/mips/mm/Makefile 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/mm/Makefile 2004-11-23 02:49:27.393392040 -0800 @@ -10,7 +10,8 @@ O_TARGET := mm.o -export-objs += cache.o ioremap.o loadmmu.o remap.o +export-objs := cache.o ioremap.o loadmmu.o remap.o \ + tlb-r4k.o tlb-sb1.o obj-y += cache.o extable.o init.o ioremap.o fault.o \ loadmmu.o diff -urN linux-2.4.28-bk3/arch/mips/mm/c-r3k.c linux-2.4.28-bk4/arch/mips/mm/c-r3k.c --- linux-2.4.28-bk3/arch/mips/mm/c-r3k.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/mm/c-r3k.c 2004-11-23 02:49:27.393392040 -0800 @@ -7,7 +7,7 @@ * Tx39XX R4k style caches added. HK * Copyright (C) 1998, 1999, 2000 Harald Koerfgen * Copyright (C) 1998 Gleb Raiko & Vladimir Roganov - * Copyright (C) 2001 Maciej W. Rozycki + * Copyright (C) 2001, 2004 Maciej W. Rozycki */ #include #include @@ -311,6 +311,9 @@ static void r3k_dma_cache_wback_inv(unsigned long start, unsigned long size) { + /* Catch bad driver code */ + BUG_ON(size == 0); + iob(); r3k_flush_dcache_range(start, start + size); } @@ -334,6 +337,8 @@ _flush_data_cache_page = r3k_flush_data_cache_page; _dma_cache_wback_inv = r3k_dma_cache_wback_inv; + _dma_cache_wback = r3k_dma_cache_wback_inv; + _dma_cache_inv = r3k_dma_cache_wback_inv; printk("Primary instruction cache %ldkB, linesize %ld bytes.\n", icache_size >> 10, icache_lsize); diff -urN linux-2.4.28-bk3/arch/mips/mm/c-r4k.c linux-2.4.28-bk4/arch/mips/mm/c-r4k.c --- linux-2.4.28-bk3/arch/mips/mm/c-r4k.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/mm/c-r4k.c 2004-11-23 02:49:27.395392122 -0800 @@ -42,12 +42,13 @@ struct bcache_ops *bcops = &no_sc_ops; +#define cpu_is_r4600_v1_x() ((read_c0_prid() & 0xfffffff0) == 0x2010) +#define cpu_is_r4600_v2_x() ((read_c0_prid() & 0xfffffff0) == 0x2020) + #define R4600_HIT_CACHEOP_WAR_IMPL \ do { \ - if (R4600_V2_HIT_CACHEOP_WAR && \ - (read_c0_prid() & 0xfff0) == 0x2020) { /* R4600 V2.0 */\ + if (R4600_V2_HIT_CACHEOP_WAR && cpu_is_r4600_v2_x()) \ *(volatile unsigned long *)KSEG1; \ - } \ if (R4600_V1_HIT_CACHEOP_WAR) \ __asm__ __volatile__("nop;nop;nop;nop"); \ } while (0) @@ -104,6 +105,15 @@ #define CACHE32_UNROLL32_ALIGN JUMP_TO_ALIGN(10) /* 32 * 32 = 1024 */ #define CACHE32_UNROLL32_ALIGN2 JUMP_TO_ALIGN(11) +static inline void blast_r4600_v1_icache32(void) +{ + unsigned long flags; + + local_irq_save(flags); + blast_icache32(); + local_irq_restore(flags); +} + static inline void tx49_blast_icache32(void) { unsigned long start = KSEG0; @@ -125,6 +135,15 @@ cache32_unroll32(addr|ws,Index_Invalidate_I); } +static inline void blast_icache32_r4600_v1_page_indexed(unsigned long page) +{ + unsigned long flags; + + local_irq_save(flags); + blast_icache32_page_indexed(page); + local_irq_restore(flags); +} + static inline void tx49_blast_icache32_page_indexed(unsigned long page) { unsigned long start = page; @@ -168,11 +187,17 @@ if (ic_lsize == 16) r4k_blast_icache_page_indexed = blast_icache16_page_indexed; - else if (ic_lsize == 32 && TX49XX_ICACHE_INDEX_INV_WAR) - r4k_blast_icache_page_indexed = tx49_blast_icache32_page_indexed; - else if (ic_lsize == 32) - r4k_blast_icache_page_indexed = blast_icache32_page_indexed; - else if (ic_lsize == 64) + else if (ic_lsize == 32) { + if (TX49XX_ICACHE_INDEX_INV_WAR) + r4k_blast_icache_page_indexed = + tx49_blast_icache32_page_indexed; + else if (R4600_V1_INDEX_ICACHEOP_WAR && cpu_is_r4600_v1_x()) + r4k_blast_icache_page_indexed = + blast_icache32_r4600_v1_page_indexed; + else + r4k_blast_icache_page_indexed = + blast_icache32_page_indexed; + } else if (ic_lsize == 64) r4k_blast_icache_page_indexed = blast_icache64_page_indexed; } @@ -184,11 +209,14 @@ if (ic_lsize == 16) r4k_blast_icache = blast_icache16; - else if (ic_lsize == 32 && TX49XX_ICACHE_INDEX_INV_WAR) - r4k_blast_icache = tx49_blast_icache32; - else if (ic_lsize == 32) - r4k_blast_icache = blast_icache32; - else if (ic_lsize == 64) + else if (ic_lsize == 32) { + if (R4600_V1_INDEX_ICACHEOP_WAR && cpu_is_r4600_v1_x()) + r4k_blast_icache = blast_r4600_v1_icache32; + else if (TX49XX_ICACHE_INDEX_INV_WAR) + r4k_blast_icache = tx49_blast_icache32; + else if (ic_lsize == 32) + r4k_blast_icache = blast_icache32; + } else if (ic_lsize == 64) r4k_blast_icache = blast_icache64; } @@ -352,6 +380,7 @@ static void r4k_flush_icache_range(unsigned long start, unsigned long end) { unsigned long dc_lsize = current_cpu_data.dcache.linesz; + unsigned long ic_lsize = current_cpu_data.icache.linesz; unsigned long addr, aend; if (!cpu_has_ic_fills_f_dc) { @@ -374,14 +403,14 @@ if (end - start > icache_size) r4k_blast_icache(); else { - addr = start & ~(dc_lsize - 1); - aend = (end - 1) & ~(dc_lsize - 1); + addr = start & ~(ic_lsize - 1); + aend = (end - 1) & ~(ic_lsize - 1); while (1) { /* Hit_Invalidate_I */ protected_flush_icache_line(addr); if (addr == aend) break; - addr += dc_lsize; + addr += ic_lsize; } } } @@ -445,6 +474,9 @@ { unsigned long end, a; + /* Catch bad driver code */ + BUG_ON(size == 0); + if (cpu_has_subset_pcaches) { unsigned long sc_lsize = current_cpu_data.scache.linesz; @@ -492,6 +524,9 @@ { unsigned long end, a; + /* Catch bad driver code */ + BUG_ON(size == 0); + if (cpu_has_subset_pcaches) { unsigned long sc_lsize = current_cpu_data.scache.linesz; @@ -754,7 +789,10 @@ c->dcache.ways = 4; c->dcache.waybit = ffs(dcache_size / c->dcache.ways) - 1; - c->options |= MIPS_CPU_CACHE_CDEX_P | MIPS_CPU_PREFETCH; +#if !defined(CONFIG_SMP) || !defined(RM9000_CDEX_SMP_WAR) + c->options |= MIPS_CPU_CACHE_CDEX_P; +#endif + c->options |= MIPS_CPU_PREFETCH; break; default: @@ -852,7 +890,7 @@ cpu_has_vtag_icache ? "virtually tagged" : "physically tagged", way_string[c->icache.ways], c->icache.linesz); - printk("Primary data cache %ldkB %s, linesize %d bytes.\n", + printk("Primary data cache %ldkB, %s, linesize %d bytes.\n", dcache_size >> 10, way_string[c->dcache.ways], c->dcache.linesz); } @@ -937,10 +975,8 @@ * Linux memory managment. */ switch (c->cputype) { - case CPU_R4000PC: case CPU_R4000SC: case CPU_R4000MC: - case CPU_R4400PC: case CPU_R4400SC: case CPU_R4400MC: probe_scache_kseg1 = (probe_func_t) (KSEG1ADDR(&probe_scache)); diff -urN linux-2.4.28-bk3/arch/mips/mm/c-sb1.c linux-2.4.28-bk4/arch/mips/mm/c-sb1.c --- linux-2.4.28-bk3/arch/mips/mm/c-sb1.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/mm/c-sb1.c 2004-11-23 02:49:27.396392163 -0800 @@ -2,6 +2,7 @@ * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com) * Copyright (C) 1997, 2001 Ralf Baechle (ralf@gnu.org) * Copyright (C) 2000, 2001, 2002, 2003 Broadcom Corporation + * Copyright (C) 2004 Maciej W. Rozycki * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -31,17 +32,17 @@ static unsigned long icache_size; static unsigned long dcache_size; -static unsigned long icache_line_size; -static unsigned long dcache_line_size; +static unsigned short icache_line_size; +static unsigned short dcache_line_size; static unsigned int icache_index_mask; static unsigned int dcache_index_mask; -static unsigned long icache_assoc; -static unsigned long dcache_assoc; +static unsigned short icache_assoc; +static unsigned short dcache_assoc; -static unsigned int icache_sets; -static unsigned int dcache_sets; +static unsigned short icache_sets; +static unsigned short dcache_sets; static unsigned int icache_range_cutoff; static unsigned int dcache_range_cutoff; @@ -231,8 +232,8 @@ local_sb1_flush_cache_page(vma, addr); } #else -void sb1_flush_cache_page(struct vm_area_struct *vma, unsigned long addr); -asm("sb1_flush_cache_page = local_sb1_flush_cache_page"); +void sb1_flush_cache_page(struct vm_area_struct *vma, unsigned long addr) + __attribute__((alias("local_sb1_flush_cache_page"))); #endif /* @@ -280,8 +281,8 @@ } #ifdef CONFIG_SMP -extern void sb1___flush_cache_all_ipi(void *ignored); -asm("sb1___flush_cache_all_ipi = local_sb1___flush_cache_all"); +void sb1___flush_cache_all_ipi(void *ignored) + __attribute__((alias("local_sb1___flush_cache_all"))); static void sb1___flush_cache_all(void) { @@ -289,8 +290,8 @@ local_sb1___flush_cache_all(); } #else -extern void sb1___flush_cache_all(void); -asm("sb1___flush_cache_all = local_sb1___flush_cache_all"); +void sb1___flush_cache_all(void) + __attribute__((alias("local_sb1___flush_cache_all"))); #endif /* @@ -340,8 +341,8 @@ local_sb1_flush_icache_range(start, end); } #else -void sb1_flush_icache_range(unsigned long start, unsigned long end); -asm("sb1_flush_icache_range = local_sb1_flush_icache_range"); +void sb1_flush_icache_range(unsigned long start, unsigned long end) + __attribute__((alias("local_sb1_flush_icache_range"))); #endif /* @@ -398,8 +399,8 @@ local_sb1_flush_icache_page(vma, page); } #else -void sb1_flush_icache_page(struct vm_area_struct *vma, struct page *page); -asm("sb1_flush_icache_page = local_sb1_flush_icache_page"); +void sb1_flush_icache_page(struct vm_area_struct *vma, struct page *page) + __attribute__((alias("local_sb1_flush_icache_page"))); #endif /* @@ -447,8 +448,8 @@ smp_call_function(sb1_flush_cache_sigtramp_ipi, (void *) addr, 1, 1); } #else -void sb1_flush_cache_sigtramp(unsigned long addr); -asm("sb1_flush_cache_sigtramp = local_sb1_flush_cache_sigtramp"); +void sb1_flush_cache_sigtramp(unsigned long addr) + __attribute__((alias("local_sb1_flush_cache_sigtramp"))); #endif @@ -516,6 +517,11 @@ * 9:7 Dcache Associativity */ +static char *way_string[] = { + "direct mapped", "2-way", "3-way", "4-way", + "5-way", "6-way", "7-way", "8-way", +}; + static __init void probe_cache_sizes(void) { u32 config1; @@ -540,6 +546,13 @@ */ icache_range_cutoff = icache_sets * icache_line_size; dcache_range_cutoff = (dcache_sets / 2) * icache_line_size; + + printk("Primary instruction cache %ldkB, %s, linesize %d bytes.\n", + icache_size >> 10, way_string[icache_assoc - 1], + icache_line_size); + printk("Primary data cache %ldkB, %s, linesize %d bytes.\n", + dcache_size >> 10, way_string[dcache_assoc - 1], + dcache_line_size); } /* diff -urN linux-2.4.28-bk3/arch/mips/mm/c-tx39.c linux-2.4.28-bk4/arch/mips/mm/c-tx39.c --- linux-2.4.28-bk3/arch/mips/mm/c-tx39.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/mm/c-tx39.c 2004-11-23 02:49:27.396392163 -0800 @@ -69,6 +69,9 @@ unsigned long end, a; unsigned long dc_lsize = current_cpu_data.dcache.linesz; + /* Catch bad driver code */ + BUG_ON(size == 0); + iob(); a = addr & ~(dc_lsize - 1); end = (addr + size - 1) & ~(dc_lsize - 1); @@ -480,9 +483,9 @@ current_cpu_data.icache.waybit = 0; current_cpu_data.dcache.waybit = 0; - printk("Primary instruction cache %ldkb, linesize %d bytes\n", + printk("Primary instruction cache %ldkB, linesize %d bytes\n", icache_size >> 10, current_cpu_data.icache.linesz); - printk("Primary data cache %ldkb, linesize %d bytes\n", + printk("Primary data cache %ldkB, linesize %d bytes\n", dcache_size >> 10, current_cpu_data.dcache.linesz); build_clear_page(); diff -urN linux-2.4.28-bk3/arch/mips/mm/ioremap.c linux-2.4.28-bk4/arch/mips/mm/ioremap.c --- linux-2.4.28-bk3/arch/mips/mm/ioremap.c 2003-08-25 04:44:40.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips/mm/ioremap.c 2004-11-23 02:49:27.397392203 -0800 @@ -162,7 +162,7 @@ */ offset = phys_addr & ~PAGE_MASK; phys_addr &= PAGE_MASK; - size = PAGE_ALIGN(last_addr) - phys_addr; + size = PAGE_ALIGN(last_addr + 1) - phys_addr; /* * Ok, go for it.. diff -urN linux-2.4.28-bk3/arch/mips/mm/pg-r4k.c linux-2.4.28-bk4/arch/mips/mm/pg-r4k.c --- linux-2.4.28-bk3/arch/mips/mm/pg-r4k.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/mm/pg-r4k.c 2004-11-23 02:49:27.398392244 -0800 @@ -3,7 +3,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 2003 Ralf Baechle (ralf@linux-mips.org) + * Copyright (C) 2003, 2004 Ralf Baechle (ralf@linux-mips.org) */ #include #include @@ -11,6 +11,7 @@ #include #include #include +#include #include #include @@ -25,28 +26,30 @@ #include #include +#define half_scache_line_size() (cpu_scache_line_size() >> 1) + /* * Maximum sizes: * - * R4000 16 bytes D-cache, 128 bytes S-cache: 0x78 bytes - * R4600 v1.7: 0x5c bytes - * R4600 v2.0: 0x60 bytes - * With prefetching, 16 byte strides 0xa0 bytes + * R4000 128 bytes S-cache: 0x58 bytes + * R4600 v1.7: 0x5c bytes + * R4600 v2.0: 0x60 bytes + * With prefetching, 16 byte strides 0xa0 bytes */ -static unsigned int clear_page_array[0xa0 / 4]; +static unsigned int clear_page_array[0x130 / 4]; void clear_page(void * page) __attribute__((alias("clear_page_array"))); /* * Maximum sizes: * - * R4000 16 bytes D-cache, 128 bytes S-cache: 0xbc bytes - * R4600 v1.7: 0x80 bytes - * R4600 v2.0: 0x84 bytes - * With prefetching, 16 byte strides 0xb8 bytes + * R4000 128 bytes S-cache: 0x11c bytes + * R4600 v1.7: 0x080 bytes + * R4600 v2.0: 0x07c bytes + * With prefetching, 16 byte strides 0x0b8 bytes */ -static unsigned int copy_page_array[0xb8 / 4]; +static unsigned int copy_page_array[0x148 / 4]; void copy_page(void *to, void *from) __attribute__((alias("copy_page_array"))); @@ -67,12 +70,58 @@ static unsigned int pref_src_mode __initdata; static unsigned int pref_dst_mode __initdata; -static int has_scache __initdata = 0; -static int load_offset __initdata = 0; -static int store_offset __initdata = 0; +static int load_offset __initdata; +static int store_offset __initdata; static unsigned int __initdata *dest, *epc; +static unsigned int instruction_pending; +static union mips_instruction delayed_mi; + +static void __init emit_instruction(union mips_instruction mi) +{ + if (instruction_pending) + *epc++ = delayed_mi.word; + + instruction_pending = 1; + delayed_mi = mi; +} + +static inline void flush_delay_slot_or_nop(void) +{ + if (instruction_pending) { + *epc++ = delayed_mi.word; + instruction_pending = 0; + return; + } + + *epc++ = 0; +} + +static inline unsigned int *label(void) +{ + if (instruction_pending) { + *epc++ = delayed_mi.word; + instruction_pending = 0; + } + + return epc; +} + +static inline void build_insn_word(unsigned int word) +{ + union mips_instruction mi; + + mi.word = word; + + emit_instruction(mi); +} + +static inline void build_nop(void) +{ + build_insn_word(0); /* nop */ +} + static inline void build_src_pref(int advance) { if (!(load_offset & (cpu_dcache_line_size() - 1))) { @@ -83,25 +132,28 @@ mi.i_format.rt = pref_src_mode; mi.i_format.simmediate = load_offset + advance; - *epc++ = mi.word; + emit_instruction(mi); } } static inline void __build_load_reg(int reg) { union mips_instruction mi; + unsigned int width; - if (cpu_has_64bit_registers) + if (cpu_has_64bit_registers) { mi.i_format.opcode = ld_op; - else + width = 8; + } else { mi.i_format.opcode = lw_op; + width = 4; + } mi.i_format.rs = 5; /* $a1 */ - mi.i_format.rt = reg; /* $zero */ + mi.i_format.rt = reg; /* $reg */ mi.i_format.simmediate = load_offset; - load_offset += (cpu_has_64bit_registers ? 8 : 4); - - *epc++ = mi.word; + load_offset += width; + emit_instruction(mi); } static inline void build_load_reg(int reg) @@ -122,87 +174,71 @@ mi.i_format.rt = pref_dst_mode; mi.i_format.simmediate = store_offset + advance; - *epc++ = mi.word; + emit_instruction(mi); } } -static inline void build_cdex(void) +static inline void build_cdex_s(void) { union mips_instruction mi; - if (cpu_has_cache_cdex_s && - !(store_offset & (cpu_scache_line_size() - 1))) { + if ((store_offset & (cpu_scache_line_size() - 1))) + return; - mi.c_format.opcode = cache_op; - mi.c_format.rs = 4; /* $a0 */ - mi.c_format.c_op = 3; /* Create Dirty Exclusive */ - mi.c_format.cache = 3; /* Secondary Data Cache */ - mi.c_format.simmediate = store_offset; + mi.c_format.opcode = cache_op; + mi.c_format.rs = 4; /* $a0 */ + mi.c_format.c_op = 3; /* Create Dirty Exclusive */ + mi.c_format.cache = 3; /* Secondary Data Cache */ + mi.c_format.simmediate = store_offset; - *epc++ = mi.word; - } + emit_instruction(mi); +} + +static inline void build_cdex_p(void) +{ + union mips_instruction mi; if (store_offset & (cpu_dcache_line_size() - 1)) return; if (R4600_V1_HIT_CACHEOP_WAR && ((read_c0_prid() & 0xfff0) == 0x2010)) { - *epc++ = 0; /* nop */ - *epc++ = 0; /* nop */ - *epc++ = 0; /* nop */ - *epc++ = 0; /* nop */ + build_nop(); + build_nop(); + build_nop(); + build_nop(); } + if (R4600_V2_HIT_CACHEOP_WAR && ((read_c0_prid() & 0xfff0) == 0x2020)) + build_insn_word(0x8c200000); /* lw $zero, ($at) */ + mi.c_format.opcode = cache_op; mi.c_format.rs = 4; /* $a0 */ mi.c_format.c_op = 3; /* Create Dirty Exclusive */ mi.c_format.cache = 1; /* Data Cache */ mi.c_format.simmediate = store_offset; - *epc++ = mi.word; + emit_instruction(mi); } -static inline void __build_store_zero_reg(void) +static void __build_store_reg(int reg) { union mips_instruction mi; + unsigned int width; - if (cpu_has_64bits) + if (cpu_has_64bit_gp_regs || + (cpu_has_64bit_zero_reg && reg == 0)) { mi.i_format.opcode = sd_op; - else - mi.i_format.opcode = sw_op; - mi.i_format.rs = 4; /* $a0 */ - mi.i_format.rt = 0; /* $zero */ - mi.i_format.simmediate = store_offset; - - store_offset += (cpu_has_64bits ? 8 : 4); - - *epc++ = mi.word; -} - -static inline void __build_store_reg(int reg) -{ - union mips_instruction mi; - int reg_size; - -#ifdef CONFIG_MIPS32 - if (cpu_has_64bit_registers && reg == 0) { - mi.i_format.opcode = sd_op; - reg_size = 8; + width = 8; } else { mi.i_format.opcode = sw_op; - reg_size = 4; + width = 4; } -#endif -#ifdef CONFIG_MIPS64 - mi.i_format.opcode = sd_op; - reg_size = 8; -#endif mi.i_format.rs = 4; /* $a0 */ - mi.i_format.rt = reg; /* $zero */ + mi.i_format.rt = reg; /* $reg */ mi.i_format.simmediate = store_offset; - store_offset += reg_size; - - *epc++ = mi.word; + store_offset += width; + emit_instruction(mi); } static inline void build_store_reg(int reg) @@ -212,13 +248,15 @@ build_dst_pref(pref_offset_copy); else build_dst_pref(pref_offset_clear); + else if (cpu_has_cache_cdex_s) + build_cdex_s(); else if (cpu_has_cache_cdex_p) - build_cdex(); + build_cdex_p(); __build_store_reg(reg); } -static inline void build_addiu_at_a0(unsigned long offset) +static inline void build_addiu_a2_a0(unsigned long offset) { union mips_instruction mi; @@ -226,10 +264,10 @@ mi.i_format.opcode = cpu_has_64bit_addresses ? daddiu_op : addiu_op; mi.i_format.rs = 4; /* $a0 */ - mi.i_format.rt = 1; /* $at */ + mi.i_format.rt = 6; /* $a2 */ mi.i_format.simmediate = offset; - *epc++ = mi.word; + emit_instruction(mi); } static inline void build_addiu_a1(unsigned long offset) @@ -245,7 +283,7 @@ load_offset -= offset; - *epc++ = mi.word; + emit_instruction(mi); } static inline void build_addiu_a0(unsigned long offset) @@ -261,7 +299,7 @@ store_offset -= offset; - *epc++ = mi.word; + emit_instruction(mi); } static inline void build_bne(unsigned int *dest) @@ -269,16 +307,12 @@ union mips_instruction mi; mi.i_format.opcode = bne_op; - mi.i_format.rs = 1; /* $at */ + mi.i_format.rs = 6; /* $a2 */ mi.i_format.rt = 4; /* $a0 */ mi.i_format.simmediate = dest - epc - 1; *epc++ = mi.word; -} - -static inline void build_nop(void) -{ - *epc++ = 0; + flush_delay_slot_or_nop(); } static inline void build_jr_ra(void) @@ -293,19 +327,34 @@ mi.r_format.func = jr_op; *epc++ = mi.word; + flush_delay_slot_or_nop(); } void __init build_clear_page(void) { + unsigned int loop_start; + epc = (unsigned int *) &clear_page_array; + instruction_pending = 0; + store_offset = 0; if (cpu_has_prefetch) { switch (current_cpu_data.cputype) { + case CPU_RM9000: + /* + * As a workaround for erratum G105 which make the + * PrepareForStore hint unusable we fall back to + * StoreRetained on the RM9000. Once it is known which + * versions of the RM9000 we'll be able to condition- + * alize this. + */ + case CPU_R10000: case CPU_R12000: pref_src_mode = Pref_LoadStreamed; pref_dst_mode = Pref_StoreRetained; break; + default: pref_src_mode = Pref_LoadStreamed; pref_dst_mode = Pref_PrepareForStore; @@ -313,64 +362,50 @@ } } - build_addiu_at_a0(PAGE_SIZE - (cpu_has_prefetch ? pref_offset_clear : 0)); + build_addiu_a2_a0(PAGE_SIZE - (cpu_has_prefetch ? pref_offset_clear : 0)); - if (R4600_V2_HIT_CACHEOP_WAR && ((read_c0_prid() & 0xfff0) == 0x2020)) { - *epc++ = 0x40026000; /* mfc0 $v0, $12 */ - *epc++ = 0x34410001; /* ori $at, v0, 0x1 */ - *epc++ = 0x38210001; /* xori $at, at, 0x1 */ - *epc++ = 0x40816000; /* mtc0 $at, $12 */ - *epc++ = 0x00000000; /* nop */ - *epc++ = 0x00000000; /* nop */ - *epc++ = 0x00000000; /* nop */ - *epc++ = 0x3c01a000; /* lui $at, 0xa000 */ - *epc++ = 0x8c200000; /* lw $zero, ($at) */ - } + if (R4600_V2_HIT_CACHEOP_WAR && ((read_c0_prid() & 0xfff0) == 0x2020)) + build_insn_word(0x3c01a000); /* lui $at, 0xa000 */ -dest = epc; - build_store_reg(0); - build_store_reg(0); - build_store_reg(0); - build_store_reg(0); - if (has_scache && cpu_scache_line_size() == 128) { +dest = label(); + do { build_store_reg(0); build_store_reg(0); build_store_reg(0); build_store_reg(0); - } + } while (store_offset < half_scache_line_size()); build_addiu_a0(2 * store_offset); - build_store_reg(0); - build_store_reg(0); - if (has_scache && cpu_scache_line_size() == 128) { + loop_start = store_offset; + do { build_store_reg(0); build_store_reg(0); build_store_reg(0); build_store_reg(0); - } - build_store_reg(0); + } while ((store_offset - loop_start) < half_scache_line_size()); build_bne(dest); - build_store_reg(0); if (cpu_has_prefetch && pref_offset_clear) { - build_addiu_at_a0(pref_offset_clear); - dest = epc; - __build_store_reg(0); - __build_store_reg(0); - __build_store_reg(0); - __build_store_reg(0); + build_addiu_a2_a0(pref_offset_clear); + dest = label(); + loop_start = store_offset; + do { + __build_store_reg(0); + __build_store_reg(0); + __build_store_reg(0); + __build_store_reg(0); + } while ((store_offset - loop_start) < half_scache_line_size()); build_addiu_a0(2 * store_offset); - __build_store_reg(0); - __build_store_reg(0); - __build_store_reg(0); + loop_start = store_offset; + do { + __build_store_reg(0); + __build_store_reg(0); + __build_store_reg(0); + __build_store_reg(0); + } while ((store_offset - loop_start) < half_scache_line_size()); build_bne(dest); - __build_store_reg(0); } build_jr_ra(); - if (R4600_V2_HIT_CACHEOP_WAR && ((read_c0_prid() & 0xfff0) == 0x2020)) - *epc++ = 0x40826000; /* mtc0 $v0, $12 */ - else - build_nop(); flush_icache_range((unsigned long)&clear_page_array, (unsigned long) epc); @@ -380,32 +415,20 @@ void __init build_copy_page(void) { + unsigned int loop_start; + epc = (unsigned int *) ©_page_array; + store_offset = load_offset = 0; + instruction_pending = 0; - build_addiu_at_a0(PAGE_SIZE - (cpu_has_prefetch ? pref_offset_copy : 0)); + build_addiu_a2_a0(PAGE_SIZE - (cpu_has_prefetch ? pref_offset_copy : 0)); - if (R4600_V2_HIT_CACHEOP_WAR && ((read_c0_prid() & 0xfff0) == 0x2020)) { - *epc++ = 0x40026000; /* mfc0 $v0, $12 */ - *epc++ = 0x34410001; /* ori $at, v0, 0x1 */ - *epc++ = 0x38210001; /* xori $at, at, 0x1 */ - *epc++ = 0x40816000; /* mtc0 $at, $12 */ - *epc++ = 0x00000000; /* nop */ - *epc++ = 0x00000000; /* nop */ - *epc++ = 0x00000000; /* nop */ - *epc++ = 0x3c01a000; /* lui $at, 0xa000 */ - *epc++ = 0x8c200000; /* lw $zero, ($at) */ - } + if (R4600_V2_HIT_CACHEOP_WAR && ((read_c0_prid() & 0xfff0) == 0x2020)) + build_insn_word(0x3c01a000); /* lui $at, 0xa000 */ -dest = epc; - build_load_reg( 8); - build_load_reg( 9); - build_load_reg(10); - build_load_reg(11); - build_store_reg( 8); - build_store_reg( 9); - build_store_reg(10); - build_store_reg(11); - if (has_scache && cpu_scache_line_size() == 128) { +dest = label(); + loop_start = store_offset; + do { build_load_reg( 8); build_load_reg( 9); build_load_reg(10); @@ -414,18 +437,11 @@ build_store_reg( 9); build_store_reg(10); build_store_reg(11); - } + } while ((store_offset - loop_start) < half_scache_line_size()); build_addiu_a0(2 * store_offset); build_addiu_a1(2 * load_offset); - build_load_reg( 8); - build_load_reg( 9); - build_load_reg(10); - build_load_reg(11); - build_store_reg( 8); - build_store_reg( 9); - build_store_reg(10); - if (has_scache && cpu_scache_line_size() == 128) { - build_store_reg(11); + loop_start = store_offset; + do { build_load_reg( 8); build_load_reg( 9); build_load_reg(10); @@ -433,39 +449,44 @@ build_store_reg( 8); build_store_reg( 9); build_store_reg(10); - } + build_store_reg(11); + } while ((store_offset - loop_start) < half_scache_line_size()); build_bne(dest); - build_store_reg(11); if (cpu_has_prefetch && pref_offset_copy) { - build_addiu_at_a0(pref_offset_copy); - dest = epc; - __build_load_reg( 8); - __build_load_reg( 9); - __build_load_reg(10); - __build_load_reg(11); - __build_store_reg( 8); - __build_store_reg( 9); - __build_store_reg(10); - __build_store_reg(11); + build_addiu_a2_a0(pref_offset_copy); + dest = label(); + loop_start = store_offset; + do { + __build_load_reg( 8); + __build_load_reg( 9); + __build_load_reg(10); + __build_load_reg(11); + __build_store_reg( 8); + __build_store_reg( 9); + __build_store_reg(10); + __build_store_reg(11); + } while ((store_offset - loop_start) < half_scache_line_size()); build_addiu_a0(2 * store_offset); build_addiu_a1(2 * load_offset); - __build_load_reg( 8); - __build_load_reg( 9); - __build_load_reg(10); - __build_load_reg(11); - __build_store_reg( 8); - __build_store_reg( 9); - __build_store_reg(10); + loop_start = store_offset; + do { + __build_load_reg( 8); + __build_load_reg( 9); + __build_load_reg(10); + __build_load_reg(11); + __build_store_reg( 8); + __build_store_reg( 9); + __build_store_reg(10); + __build_store_reg(11); + } while ((store_offset - loop_start) < half_scache_line_size()); build_bne(dest); - __build_store_reg(11); } build_jr_ra(); - if (R4600_V2_HIT_CACHEOP_WAR && ((read_c0_prid() & 0xfff0) == 0x2020)) - *epc++ = 0x40826000; /* mtc0 $v0, $12 */ - else - build_nop(); + + flush_icache_range((unsigned long)©_page_array, + (unsigned long) epc); BUG_ON(epc > copy_page_array + ARRAY_SIZE(copy_page_array)); } diff -urN linux-2.4.28-bk3/arch/mips/mm/sc-ip22.c linux-2.4.28-bk4/arch/mips/mm/sc-ip22.c --- linux-2.4.28-bk3/arch/mips/mm/sc-ip22.c 2003-08-25 04:44:40.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips/mm/sc-ip22.c 2004-11-23 02:49:27.399392285 -0800 @@ -65,8 +65,8 @@ printk("indy_sc_wback_invalidate[%08lx,%08lx]", addr, size); #endif - if (!size) - return; + /* Catch bad driver code */ + BUG_ON(size == 0); /* Which lines to flush? */ first_line = SC_INDEX(addr); diff -urN linux-2.4.28-bk3/arch/mips/mm/sc-r5k.c linux-2.4.28-bk4/arch/mips/mm/sc-r5k.c --- linux-2.4.28-bk3/arch/mips/mm/sc-r5k.c 2003-08-25 04:44:40.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips/mm/sc-r5k.c 2004-11-23 02:49:27.399392285 -0800 @@ -47,6 +47,9 @@ { unsigned long end, a; + /* Catch bad driver code */ + BUG_ON(size == 0); + if (size >= scache_size) { blast_r5000_scache(); return; diff -urN linux-2.4.28-bk3/arch/mips/mm/sc-rm7k.c linux-2.4.28-bk4/arch/mips/mm/sc-rm7k.c --- linux-2.4.28-bk3/arch/mips/mm/sc-rm7k.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/mm/sc-rm7k.c 2004-11-23 02:49:27.400392326 -0800 @@ -1,8 +1,11 @@ /* * sc-rm7k.c: RM7000 cache management functions. * - * Copyright (C) 1997, 2001, 2003 Ralf Baechle (ralf@gnu.org), + * Copyright (C) 1997, 2001, 2003, 2004 Ralf Baechle (ralf@linux-mips.org) */ + +#undef DEBUG + #include #include #include @@ -17,8 +20,6 @@ #define sc_lsize 32 #define tc_pagesize (32*128) -static unsigned long scache_way_size = 32; /* HACKKKKK!!! */ - /* Secondary cache parameters. */ #define scache_size (256*1024) /* Fixed to 256KiB on RM7000 */ @@ -36,9 +37,10 @@ { unsigned long end, a; -#ifdef DEBUG_CACHE - printk("rm7k_sc_wback_inv[%08lx,%08lx]", addr, size); -#endif + pr_debug("rm7k_sc_wback_inv[%08lx,%08lx]", addr, size); + + /* Catch bad driver code */ + BUG_ON(size == 0); a = addr & ~(sc_lsize - 1); end = (addr + size - 1) & ~(sc_lsize - 1); @@ -66,9 +68,10 @@ { unsigned long end, a; -#ifdef DEBUG_CACHE - printk("rm7k_sc_inv[%08lx,%08lx]", addr, size); -#endif + pr_debug("rm7k_sc_inv[%08lx,%08lx]", addr, size); + + /* Catch bad driver code */ + BUG_ON(size == 0); a = addr & ~(sc_lsize - 1); end = (addr + size - 1) & ~(sc_lsize - 1); @@ -107,16 +110,16 @@ * * It seems we get our kicks from relying on unguaranteed behaviour in GCC */ -static __init void rm7k_sc_enable(void) +static __init void __rm7k_sc_enable(void) { int i; - set_c0_config(1<<3); /* CONF_SE */ + set_c0_config(1 << 3); /* CONF_SE */ write_c0_taglo(0); write_c0_taghi(0); - for (i=0; i> 31) & 1) return 0; - printk(KERN_INFO "Secondary cache size %ldK, linesize %ld bytes.\n", + printk(KERN_INFO "Secondary cache size %dK, linesize %d bytes.\n", (scache_size >> 10), sc_lsize); if ((config >> 3) & 1) /* CONF_SE */ return 1; - printk(KERN_INFO "Enabling secondary cache..."); - func(); - printk(" done\n"); - /* * While we're at it let's deal with the tertiary cache. */ diff -urN linux-2.4.28-bk3/arch/mips/mm/tlb-r4k.c linux-2.4.28-bk4/arch/mips/mm/tlb-r4k.c --- linux-2.4.28-bk3/arch/mips/mm/tlb-r4k.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/mm/tlb-r4k.c 2004-11-23 02:49:27.400392326 -0800 @@ -21,6 +21,7 @@ #include #include #include +#include #include #include @@ -46,7 +47,7 @@ local_irq_save(flags); /* Save old context and create impossible VPN2 value */ - old_ctx = (read_c0_entryhi() & 0xff); + old_ctx = read_c0_entryhi(); write_c0_entrylo0(0); write_c0_entrylo1(0); BARRIER; @@ -100,7 +101,7 @@ size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT; size = (size + 1) >> 1; if (size <= current_cpu_data.tlbsize/2) { - int oldpid = read_c0_entryhi() & ASID_MASK; + int oldpid = read_c0_entryhi(); int newpid = cpu_asid(cpu, mm); start &= (PAGE_MASK << 1); @@ -148,7 +149,7 @@ newpid = cpu_asid(cpu, vma->vm_mm); page &= (PAGE_MASK << 1); local_irq_save(flags); - oldpid = (read_c0_entryhi() & 0xff); + oldpid = read_c0_entryhi(); write_c0_entryhi(page | newpid); BARRIER; tlb_probe(); @@ -180,7 +181,7 @@ int oldpid, idx; page &= (PAGE_MASK << 1); - oldpid = read_c0_entryhi() & ASID_MASK; + oldpid = read_c0_entryhi(); local_irq_save(flags); write_c0_entryhi(page); @@ -200,6 +201,8 @@ local_irq_restore(flags); } +EXPORT_SYMBOL(local_flush_tlb_one); + /* We will need multiple versions of update_mmu_cache(), one that just * updates the TLB with the new pte(s), and another which also checks * for the R4k "end of page" hardware bug and does the needy. @@ -265,6 +268,7 @@ unsigned long address, pte_t pte) { unsigned long flags; + unsigned int asid; pgd_t *pgdp; pmd_t *pmdp; pte_t *ptep; @@ -272,7 +276,8 @@ local_irq_save(flags); address &= (PAGE_MASK << 1); - write_c0_entryhi(address | (read_c0_entryhi() & 0xff)); + asid = read_c0_entryhi() & ASID_MASK; + write_c0_entryhi(address | asid); pgdp = pgd_offset(vma->vm_mm, address); tlb_probe(); pmdp = pmd_offset(pgdp, address); @@ -300,7 +305,7 @@ local_irq_save(flags); /* Save old context and create impossible VPN2 value */ - old_ctx = read_c0_entryhi() & 0xff; + old_ctx = read_c0_entryhi(); old_pagemask = read_c0_pagemask(); wired = read_c0_wired(); write_c0_wired(wired + 1); @@ -340,7 +345,7 @@ local_irq_save(flags); /* Save old context and create impossible VPN2 value */ - old_ctx = read_c0_entryhi() & 0xff; + old_ctx = read_c0_entryhi(); old_pagemask = read_c0_pagemask(); wired = read_c0_wired(); if (--temp_tlb_entry < wired) { diff -urN linux-2.4.28-bk3/arch/mips/mm/tlb-sb1.c linux-2.4.28-bk4/arch/mips/mm/tlb-sb1.c --- linux-2.4.28-bk3/arch/mips/mm/tlb-sb1.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/mm/tlb-sb1.c 2004-11-23 02:49:27.401392366 -0800 @@ -18,6 +18,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include +#include #include #include #include @@ -118,7 +119,7 @@ * with the firmware, go back and give all the entries invalid addresses with * the normal flush routine. Wired entries will be killed as well! */ -void sb1_sanitize_tlb(void) +static void __init sb1_sanitize_tlb(void) { int entry; long addr = 0; @@ -238,6 +239,9 @@ local_irq_restore(flags); } +/* The highmem code wants this. */ +EXPORT_SYMBOL(local_flush_tlb_one); + /* All entries common to a mm share an asid. To effectively flush these entries, we just bump the asid. */ void local_flush_tlb_mm(struct mm_struct *mm) diff -urN linux-2.4.28-bk3/arch/mips/momentum/jaguar_atx/Makefile linux-2.4.28-bk4/arch/mips/momentum/jaguar_atx/Makefile --- linux-2.4.28-bk3/arch/mips/momentum/jaguar_atx/Makefile 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/momentum/jaguar_atx/Makefile 2004-11-23 02:49:27.401392366 -0800 @@ -6,10 +6,7 @@ # unless it's something special (ie not a .c file). # -.S.s: - $(CPP) $(CFLAGS) $< -o $*.s -.S.o: - $(CC) $(CFLAGS) -c $< -o $*.o +USE_STANDARD_AS_RULE := true O_TARGET:= jaguar_atx.o diff -urN linux-2.4.28-bk3/arch/mips/momentum/jaguar_atx/int-handler.S linux-2.4.28-bk4/arch/mips/momentum/jaguar_atx/int-handler.S --- linux-2.4.28-bk3/arch/mips/momentum/jaguar_atx/int-handler.S 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/momentum/jaguar_atx/int-handler.S 2004-11-23 02:49:27.402392407 -0800 @@ -13,7 +13,6 @@ * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. */ -#define __ASSEMBLY__ #include #include #include diff -urN linux-2.4.28-bk3/arch/mips/momentum/ocelot_c/int-handler.S linux-2.4.28-bk4/arch/mips/momentum/ocelot_c/int-handler.S --- linux-2.4.28-bk3/arch/mips/momentum/ocelot_c/int-handler.S 2003-08-25 04:44:40.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips/momentum/ocelot_c/int-handler.S 2004-11-23 02:49:27.402392407 -0800 @@ -12,7 +12,6 @@ * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. */ -#define __ASSEMBLY__ #include #include #include diff -urN linux-2.4.28-bk3/arch/mips/momentum/ocelot_g/int-handler.S linux-2.4.28-bk4/arch/mips/momentum/ocelot_g/int-handler.S --- linux-2.4.28-bk3/arch/mips/momentum/ocelot_g/int-handler.S 2002-11-28 15:53:10.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/momentum/ocelot_g/int-handler.S 2004-11-23 02:49:27.403392448 -0800 @@ -9,7 +9,6 @@ * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. */ -#define __ASSEMBLY__ #include #include #include diff -urN linux-2.4.28-bk3/arch/mips/momentum/ocelot_g/irq.c linux-2.4.28-bk4/arch/mips/momentum/ocelot_g/irq.c --- linux-2.4.28-bk3/arch/mips/momentum/ocelot_g/irq.c 2003-08-25 04:44:40.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips/momentum/ocelot_g/irq.c 2004-11-23 02:49:27.403392448 -0800 @@ -47,93 +47,6 @@ #include #include - -static spinlock_t rm7000_irq_lock = SPIN_LOCK_UNLOCKED; - -/* Function for careful CP0 interrupt mask access */ -static inline void modify_cp0_intmask(unsigned clr_mask_in, unsigned set_mask_in) -{ - unsigned long status; - unsigned clr_mask; - unsigned set_mask; - - /* do the low 8 bits first */ - clr_mask = 0xff & clr_mask_in; - set_mask = 0xff & set_mask_in; - status = read_c0_status(); - status &= ~((clr_mask & 0xFF) << 8); - status |= (set_mask & 0xFF) << 8; - write_c0_status(status); - - /* do the high 8 bits */ - clr_mask = 0xff & (clr_mask_in >> 8); - set_mask = 0xff & (set_mask_in >> 8); - status = read_c0_intcontrol(); - status &= ~((clr_mask & 0xFF) << 8); - status |= (set_mask & 0xFF) << 8; - write_c0_intrcontrol(status); -} - -static inline void mask_irq(unsigned int irq) -{ - modify_cp0_intmask(irq, 0); -} - -static inline void unmask_irq(unsigned int irq) -{ - modify_cp0_intmask(0, irq); -} - -static void enable_cp7000_irq(unsigned int irq) -{ - unsigned long flags; - - spin_lock_irqsave(&rm7000_irq_lock, flags); - unmask_irq(1 << irq); - spin_unlock_irqrestore(&rm7000_irq_lock, flags); -} - -static unsigned int startup_cp7000_irq(unsigned int irq) -{ - enable_cp7000_irq(irq); - - return 0; /* never anything pending */ -} - -static void disable_cp7000_irq(unsigned int irq) -{ - unsigned long flags; - - spin_lock_irqsave(&rm7000_irq_lock, flags); - mask_irq(1 << irq); - spin_unlock_irqrestore(&rm7000_irq_lock, flags); -} - -#define shutdown_cp7000_irq disable_cp7000_irq - -static void mask_and_ack_cp7000_irq(unsigned int irq) -{ - mask_irq(1 << irq); -} - -static void end_cp7000_irq(unsigned int irq) -{ - if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) - unmask_irq(1 << irq); -} - -static struct hw_interrupt_type cp7000_hpcdma_irq_type = { - "CP7000", - startup_cp7000_irq, - shutdown_cp7000_irq, - enable_cp7000_irq, - disable_cp7000_irq, - mask_and_ack_cp7000_irq, - end_cp7000_irq, - NULL -}; - - extern asmlinkage void ocelot_handle_int(void); extern void gt64240_irq_init(void); @@ -151,14 +64,8 @@ /* Sets the first-level interrupt dispatcher. */ set_except_vector(0, ocelot_handle_int); init_generic_irq(); - - for (i = 0; i <= 15; i++) { - irq_desc[i].status = IRQ_DISABLED; - irq_desc[i].action = 0; - irq_desc[i].depth = 1; - irq_desc[i].handler = &cp7000_hpcdma_irq_type; - } - + mips_cpu_irq_init(0); + rm7k_cpu_irq_init(8); gt64240_irq_init(); #ifdef CONFIG_KGDB diff -urN linux-2.4.28-bk3/arch/mips/pci/Makefile linux-2.4.28-bk4/arch/mips/pci/Makefile --- linux-2.4.28-bk3/arch/mips/pci/Makefile 2003-08-25 04:44:40.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips/pci/Makefile 2004-11-23 02:49:27.404392489 -0800 @@ -8,8 +8,6 @@ O_TARGET := pci-core.o -export-objs = pci.o - obj-$(CONFIG_MIPS_BONITO64) += ops-bonito64.o obj-$(CONFIG_MIPS_GT64120) += ops-gt64120.o obj-$(CONFIG_MIPS_MSC) += ops-msc.o diff -urN linux-2.4.28-bk3/arch/mips/pci/pci.c linux-2.4.28-bk4/arch/mips/pci/pci.c --- linux-2.4.28-bk3/arch/mips/pci/pci.c 2003-08-25 04:44:40.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips/pci/pci.c 2004-11-23 02:49:27.404392489 -0800 @@ -129,7 +129,7 @@ return pcibios_enable_resources(dev, mask); } -#ifdef CONFIG_NEW_PCI +#ifdef CONFIG_PCI_NEW /* * Named PCI new and about to die before it's old :-) * diff -urN linux-2.4.28-bk3/arch/mips/pmc-sierra/big_sur/Makefile linux-2.4.28-bk4/arch/mips/pmc-sierra/big_sur/Makefile --- linux-2.4.28-bk3/arch/mips/pmc-sierra/big_sur/Makefile 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/pmc-sierra/big_sur/Makefile 2004-11-23 02:49:27.405392530 -0800 @@ -0,0 +1,11 @@ +# +# Makefile for the PMC-Sierra Big Sur +# + +USE_STANDARD_AS_RULE := true + +O_TARGET:= big_sur.o + +obj-y += int-handler.o irq.o big_sur_irq.o + +include $(TOPDIR)/Rules.make diff -urN linux-2.4.28-bk3/arch/mips/pmc-sierra/big_sur/big_sur_irq.c linux-2.4.28-bk4/arch/mips/pmc-sierra/big_sur/big_sur_irq.c --- linux-2.4.28-bk3/arch/mips/pmc-sierra/big_sur/big_sur_irq.c 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/pmc-sierra/big_sur/big_sur_irq.c 2004-11-23 02:49:27.406392570 -0800 @@ -0,0 +1,137 @@ +/* + * Copyright 2004 PMC-Sierra Inc. + * Author: Manish Lachwani (lachwani@pmc-sierra.com) + * + * arch/mips/pmc-sierra/big_sur/big_sur_irq.c + * Interrupt routines for Xilinx system controller. Interrupt numbers + * are assigned from BIG_SUR_IRQ_BASE to BIG_SUR_IRQ_BASE + 10 + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "xilinx_irq.h" + +#define BIG_SUR_IRQ_BASE 16 + +/* mask off an interrupt -- 1 is enable, 0 is disable */ +static inline void mask_big_sur_irq(unsigned int irq) +{ + unsigned long reg_data; + + reg_data = BIG_SUR_READ(BIG_SUR_INTERRUPT_MASK_1); + reg_data &= ~(1 << (irq - BIG_SUR_IRQ_BASE)); + BIG_SUR_WRITE(BIG_SUR_INTERRUPT_MASK_1, reg_data); +} + +/* unmask an interrupt -- 1 is enable, 0 is disable */ +static inline void unmask_big_sur_irq(unsigned int irq) +{ + unsigned long reg_data; + + reg_data = BIG_SUR_READ(BIG_SUR_INTERRUPT_MASK_1); + reg_data |= (1 << (irq - BIG_SUR_IRQ_BASE)); + BIG_SUR_WRITE(BIG_SUR_INTERRUPT_MASK_1, reg_data); +} + +/* Enable IRQ on the Xilinx FPGA */ +static void enable_big_sur_irq(unsigned int irq) +{ + unmask_big_sur_irq(irq); +} + +/* Initialize IRQ on the Xilinx FPGA */ +static unsigned int startup_big_sur_irq(unsigned int irq) +{ + unmask_big_sur_irq(irq); + return 0; +} + +/* Disable the IRQ on the Xilinx FPGA */ +static void disable_big_sur_irq(unsigned int irq) +{ + mask_big_sur_irq(irq); +} + +/* Mask and ack an IRQ on the Xilinx FPGA */ +static void mask_and_ack_big_sur_irq(unsigned int irq) +{ + mask_big_sur_irq(irq); +} + +/* End IRQ processing on the Xilinx FPGA */ +static void end_big_sur_irq(unsigned int irq) +{ + if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) + unmask_big_sur_irq(irq); +} + +/* + * Main interrupt handler for the Xilinx FPGA on the + * Big Sur board. These interrupts could be coming + * from the IDE, PCI, UART etc. + */ +void big_sur_irq_handler(struct pt_regs *regs) +{ + unsigned long reg_data; + + reg_data = BIG_SUR_READ(BIG_SUR_INTERRUPT_STATUS_1); + + /* Now check for the UART 1 interrupts */ + if (reg_data & 0x38) + do_IRQ(BIG_SUR_UART1_IRQ + BIG_SUR_IRQ_BASE, regs); + + /* Now check for the UART 2 interrupts */ + if (reg_data & 0x1c0) + do_IRQ(BIG_SUR_UART2_IRQ + BIG_SUR_IRQ_BASE, regs); + + /* Now check for the Timer interrupt */ + if (reg_data & 0x800) + do_IRQ(BIG_SUR_TIMER_IRQ + BIG_SUR_IRQ_BASE, regs); + + /* Now check for the PCI interrupt, INTA */ + if (reg_data & 0x2) + do_IRQ(BIG_SUR_PCI_IRQ + BIG_SUR_IRQ_BASE, regs); + + /* Now check for the IDE interrupts */ + if (reg_data & 0x1) + do_IRQ(BIG_SUR_IDE_IRQ + BIG_SUR_IRQ_BASE, regs); +} + +#define shutdown_big_sur_irq disable_big_sur_irq + +struct hw_interrupt_type big_sur_irq_type = { + "BIG-SUR", + startup_big_sur_irq, + shutdown_big_sur_irq, + enable_big_sur_irq, + disable_big_sur_irq, + mask_and_ack_big_sur_irq, + end_big_sur_irq, + NULL +}; + +void big_sur_irq_init(void) +{ + int i; + + /* Reset irq handlers pointers to NULL */ + for (i = BIG_SUR_IRQ_BASE; i < (BIG_SUR_IRQ_BASE + 10); i++) { + irq_desc[i].status = IRQ_DISABLED; + irq_desc[i].action = 0; + irq_desc[i].depth = 2; + irq_desc[i].handler = &big_sur_irq_type; + } +} + diff -urN linux-2.4.28-bk3/arch/mips/pmc-sierra/big_sur/int-handler.S linux-2.4.28-bk4/arch/mips/pmc-sierra/big_sur/int-handler.S --- linux-2.4.28-bk3/arch/mips/pmc-sierra/big_sur/int-handler.S 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/pmc-sierra/big_sur/int-handler.S 2004-11-23 02:49:27.406392570 -0800 @@ -0,0 +1,63 @@ +/* + * Copyright 2004 PMC-Sierra Inc. + * Author: Manish Lachwani (lachwani@pmc-sierra.com) + * + * First-level interrupt dispatcher for the PMC-Sierra Big Sur board that + * has the Xilinx system controller. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ +#include +#include +#include +#include +#include + +/* + * First level interrupt dispatcher for the Big Sur board + */ + .align 5 + NESTED(big_sur_handle_int, PT_SIZE, sp) + SAVE_ALL + CLI + .set at + mfc0 t0, CP0_CAUSE + mfc0 t2, CP0_STATUS + + and t0, t2 + + andi t1, t0, STATUSF_IP0 /* sw0 software interrupt */ + bnez t1, ll_sw0_irq + andi t1, t0, STATUSF_IP1 /* sw1 software interrupt */ + bnez t1, ll_sw1_irq + andi t1, t0, STATUSF_IP3 /* int1 hardware line */ + bnez t1, ll_xilinx_irq + + .set reorder + + /* wrong alarm or masked ... */ + j spurious_interrupt + nop + END(big_sur_handle_int) + + .align 5 +ll_sw0_irq: + li a0, 0 + move a1, sp + jal do_IRQ + j ret_from_irq +ll_sw1_irq: + li a0, 1 + move a1, sp + jal do_IRQ + j ret_from_irq +ll_xilinx_irq: + li a0, 2 + move a1, sp + jal big_sur_irq_handler + j ret_from_irq + + diff -urN linux-2.4.28-bk3/arch/mips/pmc-sierra/big_sur/irq.c linux-2.4.28-bk4/arch/mips/pmc-sierra/big_sur/irq.c --- linux-2.4.28-bk3/arch/mips/pmc-sierra/big_sur/irq.c 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/pmc-sierra/big_sur/irq.c 2004-11-23 02:49:27.407392611 -0800 @@ -0,0 +1,65 @@ +/* + * Copyright (C) 2003 PMC-Sierra Inc. + * Author: Manish Lachwani (lachwani@pmc-sierra.com) + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + * + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static spinlock_t irq_lock = SPIN_LOCK_UNLOCKED; + +extern asmlinkage void big_sur_handle_int(void); +extern void big_sur_irq_init(void); + +void __init init_IRQ(void) +{ + /* + * Clear all of the interrupts while we change the able around a bit. + * int-handler is not on bootstrap + */ + clear_c0_status(ST0_IM); + + /* Sets the first-level interrupt dispatcher. */ + set_except_vector(0, big_sur_handle_int); + init_generic_irq(); + + mips_cpu_irq_init(0); + big_sur_irq_init(); + +#ifdef CONFIG_REMOTE_DEBUG + printk("start kgdb ...\n"); + set_debug_traps(); + breakpoint(); /* you may move this line to whereever you want :-) */ +#endif +#ifdef CONFIG_GDB_CONSOLE + register_gdb_console(); +#endif +} diff -urN linux-2.4.28-bk3/arch/mips/pmc-sierra/big_sur/prom.c linux-2.4.28-bk4/arch/mips/pmc-sierra/big_sur/prom.c --- linux-2.4.28-bk3/arch/mips/pmc-sierra/big_sur/prom.c 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/pmc-sierra/big_sur/prom.c 2004-11-23 02:49:27.408392652 -0800 @@ -0,0 +1,77 @@ +/* + * Copyright 2004 PMC-Sierra Inc. + * Author: Manish Lachwani (lachwani@pmc-sierra.com) + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include + +/* PMON Call Vectors */ +struct callvectors { +int (*open) (char*, int, int); +int (*close) (int); +int (*read) (int, void*, int); +int (*write) (int, void*, int); +off_t (*lseek) (int, off_t, int); +int (*printf) (const char*, ...); +void (*cacheflush) (void); +char* (*gets) (char*); +}; + +struct callvectors* debug_vectors; +char arcs_cmdline[CL_SIZE]; +extern unsigned long cpu_clock; +unsigned char big_sur_mac_addr_base[6] = "00:11:22:33:44:aa"; + +const char *get_system_type(void) +{ + return "Big Sur"; +} + +void __init prom_init(int argc, char **arg, char **env, struct callvectors *cv) +{ + int i; + + debug_vectors = cv; + + /* PMON args begin with a g that stands for go */ + arcs_cmdline[0] = '\0'; + for (i = 1; i < argc; i++) { + if (strlen(arcs_cmdline) + strlen(arg[i] + 1) + >= sizeof(arcs_cmdline)) + break; + + strcat(arcs_cmdline, arg[i]); + strcat(arcs_cmdline, " "); + } + + while (*env) { + if (strncmp("cpuclock", *env, strlen("cpuclock")) == 0) { + cpu_clock = simple_strtol(*env + strlen("cpuclock="), + NULL, 10); + } + env++; + } + + mips_machgroup = MACH_GROUP_PMC; + mips_machtype = MACH_PMC_BIG_SUR; +} + +void __init prom_free_prom_memory(void) +{ +} + +void __init prom_fixup_mem_map(unsigned long start, unsigned long end) +{ +} + diff -urN linux-2.4.28-bk3/arch/mips/pmc-sierra/big_sur/reset.c linux-2.4.28-bk4/arch/mips/pmc-sierra/big_sur/reset.c --- linux-2.4.28-bk3/arch/mips/pmc-sierra/big_sur/reset.c 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/pmc-sierra/big_sur/reset.c 2004-11-23 02:49:27.408392652 -0800 @@ -0,0 +1,48 @@ +/* + * Copyright 2004 PMC-Sierra Inc. + * Author: Manish Lachwani (lachwani@pmc-sierra.com) + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + * + */ + +#include + +void big_sur_restart(char *command) +{ + /* FIXME: For now, fail regardless */ + printk(KERN_NOTICE "Watchdog reset failed\n"); +} + +void big_sur_halt(void) +{ + printk(KERN_NOTICE "\n** You can safely turn off the power\n"); + while (1) + __asm__(".set\tmips3\n\t" + "wait\n\t" + ".set\tmips0"); +} + +void big_sur_power_off(void) +{ + big_sur_halt(); +} + diff -urN linux-2.4.28-bk3/arch/mips/pmc-sierra/big_sur/setup.c linux-2.4.28-bk4/arch/mips/pmc-sierra/big_sur/setup.c --- linux-2.4.28-bk3/arch/mips/pmc-sierra/big_sur/setup.c 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/pmc-sierra/big_sur/setup.c 2004-11-23 02:49:27.409392693 -0800 @@ -0,0 +1,202 @@ +/* + * Copyright 2004 PMC-Sierra Inc. + * Author: Manish Lachwani (lachwani@pmc-sierra.com) + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "setup.h" + +unsigned long cpu_clock; + +extern void big_sur_restart(char *command); +extern void big_sur_halt(void); +extern void big_sur_power_off(void); + +void __init bus_error_init(void) +{ + /* Do Nothing */ +} + +void big_sur_timer_setup(struct irqaction *irq) +{ + /* Rm7000 timer and not the Xilinx timer */ + setup_irq(7, irq); +} + +#define EPOCH 2000 +#define BCD_TO_BIN(val) (((val)&15) + ((val)>>4)*10) +#define BIN_TO_BCD(val) ((((val)/10)<<4) + (val)%10) + +static int rtc_ds_get_time(void) +{ + unsigned int year, month, day, hour, minute, second; + unsigned int century; + + BIG_SUR_RTC_WRITE(0x40, 0x7f8); + + second = BCD_TO_BIN(BIG_SUR_RTC_READ(0x7f8 + 1) & 0x7f); + minute = BCD_TO_BIN(BIG_SUR_RTC_READ(0x7f8 + 2)); + hour = BCD_TO_BIN(BIG_SUR_RTC_READ(0x7f8 + 3)); + day = BCD_TO_BIN(BIG_SUR_RTC_READ(0x7f8 + 5)); + month = BCD_TO_BIN(BIG_SUR_RTC_READ(0x7f8 + 6)); + year = BCD_TO_BIN(BIG_SUR_RTC_READ(0x7f8 + 7)); + century = BCD_TO_BIN(BIG_SUR_RTC_READ(0x7f8) & 0x3f); + + BIG_SUR_RTC_WRITE(0, 0x7f8); + year += century * 100; + + return mktime(year, month, day, hour, minute, second); +} + +extern void to_tm(unsigned long tim, struct rtc_time * tm); + +static int rtc_ds_set_time(unsigned long t) +{ + struct rtc_time tm; + u8 year, month, day, hour, minute, second; + u8 cmos_year, cmos_month, cmos_day, cmos_hour, cmos_minute, cmos_second; + int cmos_century; + + BIG_SUR_RTC_WRITE(0x40, 0x7f8); + cmos_second = (u8)(BIG_SUR_RTC_READ(0x7f8 + 1) & 0x7f); + cmos_minute = (u8)(BIG_SUR_RTC_READ(0x7f8 + 2)); + cmos_hour = (u8)(BIG_SUR_RTC_READ(0x7f8 + 3)); + cmos_day = (u8)(BIG_SUR_RTC_READ(0x7f8 + 4)); + cmos_month = (u8)(BIG_SUR_RTC_READ(0x7f8 + 6)); + cmos_year = (u8)(BIG_SUR_RTC_READ(0x7f8 + 7)); + cmos_century = BIG_SUR_RTC_READ(0x7f8) & 0x3f; + + BIG_SUR_RTC_WRITE(0x80, 0x7f8); + + to_tm(t, &tm); + + year = BIN_TO_BCD(tm.tm_year - EPOCH); + if (year != cmos_year) { + BIG_SUR_RTC_WRITE(year, (0x7f8 + 7)); + } + + month = BIN_TO_BCD(tm.tm_mon); + if (month != (cmos_month & 0x1f)) { + BIG_SUR_RTC_WRITE((month & 0x1f) | (cmos_month & ~0x1f), (0x7f8 + 6)); + } + + day = BIN_TO_BCD(tm.tm_mday); + if (day != cmos_day) { + BIG_SUR_RTC_WRITE(day, (0x7f8 + 5)); + } + + if (cmos_hour & 0x40) { + hour = 0x40; + if (tm.tm_hour > 12) { + hour |= 0x20 | (BIN_TO_BCD(hour - 12) & 0x1f); + } + else { + hour |= BIN_TO_BCD(tm.tm_hour); + } + } + else { + hour = BIN_TO_BCD(tm.tm_hour) & 0x3f; + } + + if (hour != cmos_hour) { + BIG_SUR_RTC_WRITE(hour, (0x7f8 + 3)); + } + + minute = BIN_TO_BCD(tm.tm_min); + if (minute != cmos_minute) { + BIG_SUR_RTC_WRITE(minute, (0x7f8 + 2)); + } + + second = BIN_TO_BCD(tm.tm_sec); + if (second != cmos_second) { + BIG_SUR_RTC_WRITE(second, (0x7f8 + 1)); + } + + BIG_SUR_RTC_WRITE(cmos_century, 0x7f8); + + return 0; +} + +void rtc_init(void) +{ + u8 seconds; + + /* set the function pointers */ + rtc_get_time = rtc_ds_get_time; + rtc_set_time = rtc_ds_set_time; + + BIG_SUR_RTC_WRITE(0x40, 0x7f8); + seconds = (u8)(BIG_SUR_RTC_READ(0x7f8 + 1) & 0x7f); + BIG_SUR_RTC_WRITE(0x80, 0x7f8); + BIG_SUR_RTC_WRITE(seconds, (0x7f8 + 1)); + BIG_SUR_RTC_WRITE(0, 0x7f8); +} + +void big_sur_time_init(void) +{ + mips_counter_frequency = cpu_clock / 2; + board_timer_setup = big_sur_timer_setup; + + /* + * The RTC device off the Xilinx System Controller + * is the DS1742 + */ + + rtc_init(); +} + +void __init pmc_big_sur_setup(void) +{ + board_time_init = big_sur_time_init; + + _machine_restart = big_sur_restart; + _machine_halt = big_sur_halt; + _machine_power_off = big_sur_power_off; + + printk("PMC-Sierra Big Sur Board \n"); + + /* Add 256 MB. Thats all it can support */ + add_memory_region(0x00000000, 0x10000000, BOOT_MEM_RAM); + + /* Configure the IDE interface, if needed */ +#ifdef CONFIG_BLK_DEV_IDE_BIG_SUR + /* + * ATA Timing register, sample IORDY. The device operates + * in PIO 0 mode and the slave device is disabled + */ + *(volatile u_int32_t *)((KSEG1ADDR(0x1B300000)) + 0x40) = 0x2; +#endif +} diff -urN linux-2.4.28-bk3/arch/mips/pmc-sierra/big_sur/xilinx_irq.h linux-2.4.28-bk4/arch/mips/pmc-sierra/big_sur/xilinx_irq.h --- linux-2.4.28-bk3/arch/mips/pmc-sierra/big_sur/xilinx_irq.h 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/pmc-sierra/big_sur/xilinx_irq.h 2004-11-23 02:49:27.410392733 -0800 @@ -0,0 +1,31 @@ +/* + * Copyright 2003 PMC-Sierra + * Author: Manish Lachwani (lachwani@pmc-sierra.com) + * + * Board specific definititions for the PMC-Sierra Big Sur + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#ifndef __XILINX_IRQ_H__ +#define __XILINX_IRQ_H__ + +#define BIG_SUR_BASE 0xfb000000 + +#define BIG_SUR_WRITE(ofs, data) \ + *(volatile u32 *)(BIG_SUR_BASE + ofs) = data + +#define BIG_SUR_READ(ofs) *(volatile u32 *)(BIG_SUR_BASE + ofs) + +#define BIG_SUR_INTERRUPT_MASK_1 0x0c00 +#define BIG_SUR_INTERRUPT_STATUS_1 0x0d00 +#define BIG_SUR_UART1_IRQ +#define BIG_SUR_UART2_IRQ +#define BIG_SUR_TIMER_IRQ +#define BIG_SUR_PCI_IRQ +#define BIG_SUR_IDE_IRQ + +#endif diff -urN linux-2.4.28-bk3/arch/mips/pmc-sierra/stretch/Makefile linux-2.4.28-bk4/arch/mips/pmc-sierra/stretch/Makefile --- linux-2.4.28-bk3/arch/mips/pmc-sierra/stretch/Makefile 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/pmc-sierra/stretch/Makefile 2004-11-23 02:49:27.411392774 -0800 @@ -0,0 +1,18 @@ +# +# Makefile for PMC-Sierra Stretch Board +# +# Note! Dependencies are done automagically by 'make dep', which also +# removes any old dependencies. DON'T put your own dependencies here +# unless it's something special (ie not a .c file). +# + +USE_STANDARD_AS_RULE := true + +O_TARGET:= stretch.o + +obj-y += prom.o reset.o setup.o irq-handler.o irq.o + +obj-$(CONFIG_PCI) += pci-irq.o pci.o +obj-$(CONFIG_REMOTE_DEBUG) += dbg_io.o + +include $(TOPDIR)/Rules.make diff -urN linux-2.4.28-bk3/arch/mips/pmc-sierra/stretch/dbg_io.c linux-2.4.28-bk4/arch/mips/pmc-sierra/stretch/dbg_io.c --- linux-2.4.28-bk3/arch/mips/pmc-sierra/stretch/dbg_io.c 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/pmc-sierra/stretch/dbg_io.c 2004-11-23 02:49:27.412392815 -0800 @@ -0,0 +1,164 @@ +/* + * PMC-Sierra Inc. Stretch Board + * Author: Manish Lachwani (lachwani@pmc-sierra.com) + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + * + * KGDB support for the PMC-Sierra Stretch board + * + */ + +#include + +#if defined(CONFIG_REMOTE_DEBUG) + +#include /* For the serial port location and base baud */ + + +typedef unsigned char uint8; +typedef unsigned int uint32; + +/* + * Baud rate + */ +#define UART16550_BAUD_2400 2400 +#define UART16550_BAUD_4800 4800 +#define UART16550_BAUD_9600 9600 +#define UART16550_BAUD_19200 19200 +#define UART16550_BAUD_38400 38400 +#define UART16550_BAUD_57600 57600 +#define UART16550_BAUD_115200 115200 + +/* + * Parity bit + */ +#define UART16550_PARITY_NONE 0 +#define UART16550_PARITY_ODD 0x08 +#define UART16550_PARITY_EVEN 0x18 +#define UART16550_PARITY_MARK 0x28 +#define UART16550_PARITY_SPACE 0x38 + +/* + * Data bit + */ +#define UART16550_DATA_5BIT 0x0 +#define UART16550_DATA_6BIT 0x1 +#define UART16550_DATA_7BIT 0x2 +#define UART16550_DATA_8BIT 0x3 + +/* + * Stop bit + */ +#define UART16550_STOP_1BIT 0x0 +#define UART16550_STOP_2BIT 0x4 + +/* + * Serial port defines + */ +#define BASE PMC_STRETCH_SERIAL1_BASE +#define MAX_BAUD PMC_STRETCH_BASE_BAUD + + +#define REG_OFFSET 2 + +/* + * register offset + */ +#define OFS_RCV_BUFFER 0 +#define OFS_TRANS_HOLD 0 +#define OFS_SEND_BUFFER 0 +#define OFS_INTR_ENABLE (1*REG_OFFSET) +#define OFS_INTR_ID (2*REG_OFFSET) +#define OFS_DATA_FORMAT (3*REG_OFFSET) +#define OFS_LINE_CONTROL (3*REG_OFFSET) +#define OFS_MODEM_CONTROL (4*REG_OFFSET) +#define OFS_RS232_OUTPUT (4*REG_OFFSET) +#define OFS_LINE_STATUS (5*REG_OFFSET) +#define OFS_MODEM_STATUS (6*REG_OFFSET) +#define OFS_RS232_INPUT (6*REG_OFFSET) +#define OFS_SCRATCH_PAD (7*REG_OFFSET) + +#define OFS_DIVISOR_LSB (0*REG_OFFSET) +#define OFS_DIVISOR_MSB (1*REG_OFFSET) + + +/* + * memory-mapped read/write of the port + */ +#define UART16550_READ(y) (*((volatile uint8*)(BASE + y))) +#define UART16550_WRITE(y, z) ((*((volatile uint8*)(BASE + y))) = z) + +void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop) +{ + /* disable interrupts */ + UART16550_WRITE(OFS_INTR_ENABLE, 0); + + /* set up buad rate */ + { + uint32 divisor; + + /* set DIAB bit */ + UART16550_WRITE(OFS_LINE_CONTROL, 0x80); + + /* set divisor */ + divisor = MAX_BAUD / baud; + UART16550_WRITE(OFS_DIVISOR_LSB, divisor & 0xff); + UART16550_WRITE(OFS_DIVISOR_MSB, (divisor & 0xff00) >> 8); + + /* clear DIAB bit */ + UART16550_WRITE(OFS_LINE_CONTROL, 0x0); + } + + /* set data format */ + UART16550_WRITE(OFS_DATA_FORMAT, data | parity | stop); +} + +static int remoteDebugInitialized = 0; + +uint8 getDebugChar(void) +{ + if (!remoteDebugInitialized) { + remoteDebugInitialized = 1; + debugInit(UART16550_BAUD_38400, + UART16550_DATA_8BIT, + UART16550_PARITY_NONE, UART16550_STOP_1BIT); + } + + while ((UART16550_READ(OFS_LINE_STATUS) & 0x1) == 0); + return UART16550_READ(OFS_RCV_BUFFER); +} + + +int putDebugChar(uint8 byte) +{ + if (!remoteDebugInitialized) { + remoteDebugInitialized = 1; + debugInit(UART16550_BAUD_38400, + UART16550_DATA_8BIT, + UART16550_PARITY_NONE, UART16550_STOP_1BIT); + } + + while ((UART16550_READ(OFS_LINE_STATUS) & 0x20) == 0); + UART16550_WRITE(OFS_SEND_BUFFER, byte); + return 1; +} + +#endif diff -urN linux-2.4.28-bk3/arch/mips/pmc-sierra/stretch/irq-handler.S linux-2.4.28-bk4/arch/mips/pmc-sierra/stretch/irq-handler.S --- linux-2.4.28-bk3/arch/mips/pmc-sierra/stretch/irq-handler.S 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/pmc-sierra/stretch/irq-handler.S 2004-11-23 02:49:27.412392815 -0800 @@ -0,0 +1,71 @@ +/* + * Copyright 2004 PMC-Sierra Inc. + * Author: Manish Lachwani (lachwani@pmc-sierra.com) + * + * First-level interrupt dispatcher for the PMC-Sierra Stretch Board + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ +#define __ASSEMBLY__ +#include +#include +#include +#include +#include +#include + +/* + * First level interrupt dispatcher for the PMC-Sierra Stretch Board + */ + + .align 5 + NESTED(pmc_stretch_handle_int, PT_SIZE, sp) + SAVE_ALL + CLI + .set at + + mfc0 t0, CP0_CAUSE + mfc0 t2, CP0_STATUS + + and t0, t2 + + andi t1, t0, STATUSF_IP0 /* sw0 software interrupt */ + bnez t1, ll_sw0_irq + + andi t1, t0, STATUSF_IP1 /* sw1 software interrupt */ + bnez t1, ll_sw1_irq + + andi t1, t0, STATUSF_IP7 /* Rm7000 CPU timer */ + bnez t1, ll_timer_irq + + .set reorder + + /* wrong alarm or masked ... */ + j spurious_interrupt + nop + END(pmc_stretch_handle_int) + + .align 5 + +ll_sw0_irq: + li a0, 1 + move a1, sp + jal do_IRQ + j ret_from_irq + +ll_sw1_irq: + li a0, 2 + move a1, sp + jal do_IRQ + j ret_from_irq + +ll_timer_irq: + li a0, 8 + move a1, sp + jal do_IRQ + j ret_from_irq + + diff -urN linux-2.4.28-bk3/arch/mips/pmc-sierra/stretch/irq.c linux-2.4.28-bk4/arch/mips/pmc-sierra/stretch/irq.c --- linux-2.4.28-bk3/arch/mips/pmc-sierra/stretch/irq.c 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/pmc-sierra/stretch/irq.c 2004-11-23 02:49:27.413392856 -0800 @@ -0,0 +1,76 @@ +/* + * Copyright (C) 2003 PMC-Sierra Inc. + * Author: Manish Lachwani (lachwani@pmc-sierra.com) + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static spinlock_t irq_lock = SPIN_LOCK_UNLOCKED; + +#ifdef CONFIG_KGDB +extern void breakpoint(void); +extern void set_debug_traps(void); +#endif + +extern asmlinkage void pmc_stretch_handle_int(void); + +void __init init_IRQ(void) +{ + int i; + + clear_c0_status(ST0_IM | ST0_BEV); + __cli(); + + set_except_vector(0, pmc_stretch_handle_int); + init_generic_irq(); + mips_cpu_irq_init(0); + +#ifdef CONFIG_KGDB + printk("start kgdb ...\n"); + set_debug_traps(); + + breakpoint(); +#endif + +#ifdef CONFIG_GDB_CONSOLE + register_gdb_console(); +#endif +} diff -urN linux-2.4.28-bk3/arch/mips/pmc-sierra/stretch/pci-irq.c linux-2.4.28-bk4/arch/mips/pmc-sierra/stretch/pci-irq.c --- linux-2.4.28-bk3/arch/mips/pmc-sierra/stretch/pci-irq.c 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/pmc-sierra/stretch/pci-irq.c 2004-11-23 02:49:27.414392896 -0800 @@ -0,0 +1,47 @@ +/* + * Copyright 2004 PMC-Sierra + * Author: Manish Lachwani (lachwani@pmc-sierra.com) + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include + +void __init pmc_stretch_pcibios_fixup_bus(struct pci_bus *bus) +{ + struct pci_bus *current_bus = bus; + struct pci_dev *devices; + struct list_head *devices_link; + + list_for_each(devices_link, &(current_bus->devices)) { + devices = pci_dev_b(devices_link); + + if (devices == NULL) + continue; + + devices->irq = 7; /* FIXME */ + } +} diff -urN linux-2.4.28-bk3/arch/mips/pmc-sierra/stretch/pci.c linux-2.4.28-bk4/arch/mips/pmc-sierra/stretch/pci.c --- linux-2.4.28-bk3/arch/mips/pmc-sierra/stretch/pci.c 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/pmc-sierra/stretch/pci.c 2004-11-23 02:49:27.415392937 -0800 @@ -0,0 +1,336 @@ +/* + * Copyright 2004 PMC-Sierra + * Author: Manish Lachwani (lachwani@pmc-sierra.com) + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + * + * PCI interface for the PMC-Sierra Stretch Board + */ + +#include +#include +#include +#include +#include + +#include +#include + +#include "setup.h" + +#ifdef CONFIG_PCI + +void pmc_stretch_pcibios_fixup_bus(struct pci_bus* c); + +static int pmc_stretch_read_config_dword(struct pci_dev *device, + int offset, u32* val) +{ + int dev, bus, func; + uint32_t address; + + bus = device->bus->number; + dev = PCI_SLOT(device->devfn); + func = PCI_FUNC(device->devfn); + + address = (bus << 8) | (dev << 16) | (func << 21) | + ((offset & 0xfc) << 24) | 0x1; + + PMC_STRETCH_WRITE(PMC_STRETCH_PCI_0_CONFIG_ADDRESS, address); + PMC_STRETCH_READ(PMC_STRETCH_PCI_0_DATA_ADDRESS, val); + + return PCIBIOS_SUCCESSFUL; +} + +static int pmc_stretch_read_config_word(struct pci_dev *device, + int offset, u16* val) +{ + int dev, bus, func; + uint32_t address; + + bus = device->bus->number; + dev = PCI_SLOT(device->devfn); + func = PCI_FUNC(device->devfn); + + address = (bus << 8) | (dev << 16) | (func << 21) | + ((offset & 0xfc) << 24) | 0x1; + + PMC_STRETCH_WRITE(PMC_STRETCH_PCI_0_CONFIG_ADDRESS, address); + PMC_STRETCH_READ_16((PMC_STRETCH_PCI_0_DATA_ADDRESS + (offset & 0x3)), val); + + return PCIBIOS_SUCCESSFUL; +} + +static int pmc_stretch_read_config_byte(struct pci_dev *device, + int offset, u8* val) +{ + int dev, bus, func; + uint32_t address; + + bus = device->bus->number; + dev = PCI_SLOT(device->devfn); + func = PCI_FUNC(device->devfn); + + address = (bus << 8) | (dev << 16) | (func << 21) | + ((offset & 0xfc) << 24) | 0x1; + + PMC_STRETCH_WRITE(PMC_STRETCH_PCI_0_CONFIG_ADDRESS, address); + PMC_STRETCH_READ_8((PMC_STRETCH_PCI_0_DATA_ADDRESS + (offset & 0x3)), val); + + return PCIBIOS_SUCCESSFUL; +} + +static int pmc_stretch_write_config_dword(struct pci_dev *device, + int offset, u32 val) +{ + int dev, bus, func; + uint32_t address; + + bus = device->bus->number; + dev = PCI_SLOT(device->devfn); + func = PCI_FUNC(device->devfn); + + address = (bus << 8) | (dev << 16) | (func << 21) | + ((offset & 0xfc) << 24) | 0x1; + + PMC_STRETCH_WRITE(PMC_STRETCH_PCI_0_CONFIG_ADDRESS, address); + PMC_STRETCH_WRITE(PMC_STRETCH_PCI_0_DATA_ADDRESS, val); + + return PCIBIOS_SUCCESSFUL; +} + +static int pmc_stretch_write_config_word(struct pci_dev *device, + int offset, u16 val) +{ + int dev, bus, func; + uint32_t address; + + bus = device->bus->number; + dev = PCI_SLOT(device->devfn); + func = PCI_FUNC(device->devfn); + + address = (bus << 8) | (dev << 16) | (func << 21) | + ((offset & 0xfc) << 24) | 0x1; + + PMC_STRETCH_WRITE(PMC_STRETCH_PCI_0_CONFIG_ADDRESS, address); + PMC_STRETCH_WRITE_16((PMC_STRETCH_PCI_0_DATA_ADDRESS + (offset & 0x3)), val); + + return PCIBIOS_SUCCESSFUL; +} + +static int pmc_stretch_write_config_byte(struct pci_dev *device, + int offset, u8 val) +{ + int dev, bus, func; + uint32_t address; + + bus = device->bus->number; + dev = PCI_SLOT(device->devfn); + func = PCI_FUNC(device->devfn); + + address = (bus << 8) | (dev << 16) | (func << 21) | + ((offset & 0xfc) << 24) | 0x1; + + PMC_STRETCH_WRITE(PMC_STRETCH_PCI_0_CONFIG_ADDRESS, address); + PMC_STRETCH_WRITE_8((PMC_STRETCH_PCI_0_DATA_ADDRESS + (offset & 0x3)), val); + + return PCIBIOS_SUCCESSFUL; +} + +static void pmc_stretch_pcibios_set_master(struct pci_dev *dev) +{ + u16 cmd; + + pmc_stretch_read_config_word(dev, PCI_COMMAND, &cmd); + cmd |= PCI_COMMAND_MASTER; + pmc_stretch_write_config_word(dev, PCI_COMMAND, cmd); +} + +int pcibios_enable_resources(struct pci_dev *dev) +{ + u16 cmd, old_cmd; + u8 tmp1; + int idx; + struct resource *r; + + pmc_stretch_read_config_word(dev, PCI_COMMAND, &cmd); + + old_cmd = cmd; + for (idx = 0; idx < 6; idx++) { + r = &dev->resource[idx]; + if (!r->start && r->end) { + printk(KERN_ERR + "PCI: Device %s not available because of " + "resource collisions\n", dev->slot_name); + + return -EINVAL; + } + + if (r->flags & IORESOURCE_IO) + cmd |= PCI_COMMAND_IO; + + if (r->flags & IORESOURCE_MEM) + cmd |= PCI_COMMAND_MEMORY; + } + + if (cmd != old_cmd) + pmc_stretch_write_config_word(dev, PCI_COMMAND, cmd); + + pmc_stretch_read_config_byte(dev, PCI_CACHE_LINE_SIZE, &tmp1); + if (tmp1 != 8) { + printk(KERN_WARNING "PCI setting cache line size to 8 from " + "%d\n", tmp1); + + pmc_stretch_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 8); + } + + pmc_stretch_read_config_byte(dev, PCI_LATENCY_TIMER, &tmp1); + if (tmp1 < 32 || tmp1 == 0xff) { + printk(KERN_WARNING "PCI setting latency timer to 32 from %d\n", + tmp1); + pmc_stretch_write_config_byte(dev, PCI_LATENCY_TIMER, 32); + } + + return 0; +} + +/* + * Export for pcibios_enable_device + */ +int pcibios_enable_device(struct pci_dev *dev, int mask) +{ + return pcibios_enable_resources(dev); +} + +/* + * Export for pcibios_update_resource + */ +void pcibios_update_resource(struct pci_dev *dev, struct resource *root, + struct resource *res, int resource) +{ + u32 new, check; + int reg; + + new = res->start | (res->flags & PCI_REGION_FLAG_MASK); + if (resource < 6) { + reg = PCI_BASE_ADDRESS_0 + 4 * resource; + } else if (resource == PCI_ROM_RESOURCE) { + res->flags |= PCI_ROM_ADDRESS_ENABLE; + reg = dev->rom_base_reg; + } else { + /* + * Somebody might have asked allocation of a non-standard + * resource + */ + return; + } + + pci_write_config_dword(dev, reg, new); + pci_read_config_dword(dev, reg, &check); + if ((new ^ check) & + ((new & PCI_BASE_ADDRESS_SPACE_IO) ? PCI_BASE_ADDRESS_IO_MASK : + PCI_BASE_ADDRESS_MEM_MASK)) { + printk(KERN_ERR "PCI: Error while updating region " + "%s/%d (%08x != %08x)\n", dev->slot_name, resource, + new, check); + } +} + +/* + * Export to pcibios_align_resource + */ +void pcibios_align_resource(void *data, struct resource *res, + unsigned long size, unsigned long align) +{ + struct pci_dev *dev = data; + + if (res->flags & IORESOURCE_IO) { + unsigned long start = res->start; + + /* + * We need to avoid collisions with `mirrored' VGA ports + * and other strange ISA hardware, so we always want the + * addresses kilobyte aligned. + */ + if (size > 0x100) { + printk(KERN_ERR "PCI: I/O Region %s/%d too large" + " (%ld bytes)\n", dev->slot_name, + dev->resource - res, size); + } + + start = (start + 1024 - 1) & ~(1024 - 1); + res->start = start; + } +} + +struct pci_ops pmc_stretch_pci_ops = { + pmc_stretch_read_config_byte, + pmc_stretch_read_config_word, + pmc_stretch_read_config_dword, + pmc_stretch_write_config_byte, + pmc_stretch_write_config_word, + pmc_stretch_write_config_dword +}; + +struct pci_fixup pcibios_fixups[] = { + {0} +}; + +void __init pcibios_fixup_bus(struct pci_bus *c) +{ + pmc_stretch_pcibios_fixup_bus(c); +} + +void __init pcibios_init(void) +{ + /* + * FIXME: Values to change once PMON configures the + * IO and MEM space for the PCI devices + */ + ioport_resource.start = 0xe0000000; + ioport_resource.end = 0xe0000000 + 0x20000000 - 1; + iomem_resource.start = 0xc0000000; + iomem_resource.end = 0xc0000000 + 0x20000000 - 1; + + /* + * PMC-Sierra Stretch has only two PCI busses. Scan them now + */ + pci_scan_bus(0, &pmc_stretch_pci_ops, NULL); + pci_scan_bus(1, &pmc_stretch_pci_ops, NULL); +} + +/* + * for parsing "pci=" kernel boot arguments. + */ +char *pcibios_setup(char *str) +{ + printk(KERN_INFO "rr: pcibios_setup\n"); + /* Nothing to do for now. */ + + return str; +} + +unsigned int pcibios_assign_all_busses(void) +{ + return 1; +} + +#endif + diff -urN linux-2.4.28-bk3/arch/mips/pmc-sierra/stretch/prom.c linux-2.4.28-bk4/arch/mips/pmc-sierra/stretch/prom.c --- linux-2.4.28-bk3/arch/mips/pmc-sierra/stretch/prom.c 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/pmc-sierra/stretch/prom.c 2004-11-23 02:49:27.415392937 -0800 @@ -0,0 +1,187 @@ +/* + * Copyright 2004 PMC-Sierra Inc. + * Author : Manish Lachwani (lachwani@pmc-sierra.com) + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + */ +#include +#include +#include +#include +#include + +#include +#include + +/* + * PMON Callvectors + */ +struct callvectors { + int (*open) (char*, int, int); + int (*close) (int); + int (*read) (int, void*, int); + int (*write) (int, void*, int); + off_t (*lseek) (int, off_t, int); + int (*printf) (const char*, ...); + void (*cacheflush) (void); + char* (*gets) (char*); +}; + +struct callvectors* debug_vectors; +char arcs_cmdline[CL_SIZE]; + +extern unsigned long cpu_clock; + +/* + * Board Type + */ +const char *get_system_type(void) +{ + return "PMC-Sierra Stretch"; +} + +#ifdef CONFIG_MIPS64 + +unsigned long signext(unsigned long addr) +{ + addr &= 0xffffffff; + return (unsigned long)((int)addr); +} + +void *get_arg(unsigned long args, int arc) +{ + unsigned long ul; + unsigned char *puc, uc; + + args += (arc * 4); + ul = (unsigned long)signext(args); + puc = (unsigned char *)ul; + if (puc == 0) + return (void *)0; + +#ifdef CONFIG_CPU_LITTLE_ENDIAN + uc = *puc++; + ul = (unsigned long)uc; + uc = *puc++; + ul |= (((unsigned long)uc) << 8); + uc = *puc++; + ul |= (((unsigned long)uc) << 16); + uc = *puc++; + ul |= (((unsigned long)uc) << 24); +#else /* CONFIG_CPU_LITTLE_ENDIAN */ + uc = *puc++; + ul = ((unsigned long)uc) << 24; + uc = *puc++; + ul |= (((unsigned long)uc) << 16); + uc = *puc++; + ul |= (((unsigned long)uc) << 8); + uc = *puc++; + ul |= ((unsigned long)uc); +#endif /* CONFIG_CPU_LITTLE_ENDIAN */ + ul = signext(ul); + return (void *)ul; +} + +char *arg64(unsigned long addrin, int arg_index) +{ + unsigned long args; + char *p; + args = signext(addrin); + p = (char *)get_arg(args, arg_index); + return p; +} +#endif /* CONFIG_MIPS64 */ + + +/* PMON passes arguments in C main() style */ +void __init prom_init(int argc, char **arg, char **env, struct callvectors *cv) +{ + int i; +#ifdef CONFIG_MIPS64 + char *ptr; + + printk("prom_init - MIPS64\n"); + + /* save the PROM vectors for debugging use */ + debug_vectors = (struct callvectors *)signext((unsigned long)cv); + + /* arg[0] is "g", the rest is boot parameters */ + arcs_cmdline[0] = '\0'; + + for (i = 1; i < argc; i++) { + ptr = (char *)arg64((unsigned long)arg, i); + if ((strlen(arcs_cmdline) + strlen(ptr) + 1) >= + sizeof(arcs_cmdline)) + break; + strcat(arcs_cmdline, ptr); + strcat(arcs_cmdline, " "); + } + i = 0; + + while (1) { + ptr = (char *)arg64((unsigned long)env, i); + if (! ptr) + break; + + if (strncmp("cpuclock", ptr, strlen("cpuclock")) == 0) { + cpu_clock = simple_strtol(ptr + strlen("cpuclock="), + NULL, 10); + printk("cpu_clock set to %d\n", cpu_clock); + } + i++; + } + printk("arcs_cmdline: %s\n", arcs_cmdline); + +#else /* CONFIG_MIPS64 */ + + /* save the PROM vectors for debugging use */ + debug_vectors = cv; + + /* arg[0] is "g", the rest is boot parameters */ + arcs_cmdline[0] = '\0'; + for (i = 1; i < argc; i++) { + if (strlen(arcs_cmdline) + strlen(arg[i] + 1) + >= sizeof(arcs_cmdline)) + break; + strcat(arcs_cmdline, arg[i]); + strcat(arcs_cmdline, " "); + } + + while (*env) { + if (strncmp("cpuclock", *env, strlen("cpuclock")) == 0) { + cpu_clock = simple_strtol(*env + strlen("cpuclock="), + NULL, 10); + } + env++; + } +#endif /* CONFIG_MIPS64 */ + + mips_machgroup = MACH_GROUP_PMC; + mips_machtype = MACH_PMC_STRETCH; + +#ifndef CONFIG_MIPS64 + + /* + * This proves that the basic interaction between PMON + * and Linux is working. At this point, Linux has taken + * control. Note that the early printk patch at this point + * is very useful since it directly interacts with the + * serial console. + */ + debug_vectors->printf("Booting Linux kernel...\n"); +#endif +} + +void __init prom_free_prom_memory(void) +{ + /* Do nothing */ +} + +void __init prom_fixup_mem_map(unsigned long start, unsigned long end) +{ + /* Do nothing */ +} diff -urN linux-2.4.28-bk3/arch/mips/pmc-sierra/stretch/reset.c linux-2.4.28-bk4/arch/mips/pmc-sierra/stretch/reset.c --- linux-2.4.28-bk3/arch/mips/pmc-sierra/stretch/reset.c 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/pmc-sierra/stretch/reset.c 2004-11-23 02:49:27.416392978 -0800 @@ -0,0 +1,44 @@ +/* + * Copyright PMC-Sierra Inc. + * Author : Manish Lachwani (lachwani@pmc-sierra.com) + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + */ +#include +#include +#include +#include +#include "setup.h" + +void pmc_stretch_restart(char *command) +{ + /* base address of timekeeper portion of part */ + void *nvram = (void *)PMC_STRETCH_NVRAM_BASE; + + /* Ask the NVRAM/RTC/watchdog chip to assert reset in 1/16 second */ + writeb(0x84, nvram + 0xff7); + + /* wait for the watchdog to go off */ + mdelay(100+(1000/16)); + + /* if the watchdog fails for some reason, let people know */ + printk(KERN_NOTICE "Watchdog reset failed\n"); +} + +void pmc_stretch_halt(void) +{ + printk(KERN_NOTICE "\n** You can safely turn off the power\n"); + while (1) + __asm__(".set\tmips3\n\t" + "wait\n\t" + ".set\tmips0"); +} + +void pmc_stretch_power_off(void) +{ + pmc_stretch_halt(); +} diff -urN linux-2.4.28-bk3/arch/mips/pmc-sierra/stretch/setup.c linux-2.4.28-bk4/arch/mips/pmc-sierra/stretch/setup.c --- linux-2.4.28-bk3/arch/mips/pmc-sierra/stretch/setup.c 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/pmc-sierra/stretch/setup.c 2004-11-23 02:49:27.417393019 -0800 @@ -0,0 +1,107 @@ +/* + * PMC-Sierra Inc. Stretch Board + * Author: Manish Lachwani (lachwani@pmc-sierra.com) + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + * + * Setup for the PMC-Sierra Stretch board. Stretch makes processors that are + * based off the Xtensa core. + * + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "setup.h" + +unsigned long cpu_clock; + +extern void pmc_stretch_restart(char *command); +extern void pmc_stretch_halt(void); +extern void pmc_stretch_power_off(void); + +/* These functions are used for rebooting or halting the machine*/ +extern void pmc_stretch_restart(char *command); +extern void pmc_stretch_halt(void); +extern void pmc_stretch_off(void); + +void pmc_stretch_time_init(void); + +void __init bus_error_init(void) +{ + /* Do nothing */ +} + +/* setup code for a handoff from a version 2 PMON 2000 PROM */ +void PMON_v2_setup(void) +{ + printk("PMON_v2_setup\n"); + +} + +/* Setup the timer interrupt */ +void pmc_stretch_timer_setup(struct irqaction *irq) +{ + setup_irq(8, irq); +} + +/* FIXME: get_time and set_time routines */ +void pmc_stretch_time_init(void) +{ + mips_counter_frequency = cpu_clock / 2; + printk("pmc_stretch_time_init cpu_clock=%d\n", cpu_clock); + board_timer_setup = pmc_stretch_timer_setup; + +} + +/* Board Setup */ +void __init pmc_stretch_setup(void) +{ + unsigned int tmpword; + + board_time_init = pmc_stretch_time_init; + + _machine_restart = pmc_stretch_restart; + _machine_halt = pmc_stretch_halt; + _machine_power_off = pmc_stretch_power_off; + + /* do handoff reconfiguration */ + PMON_v2_setup(); + + printk("CPU : Rm7000 \n"); + + /* 128 MB */ + printk(" - SDRAM size: 128 MB\n"); + add_memory_region(0x0, 0x08000000, BOOT_MEM_RAM); +} diff -urN linux-2.4.28-bk3/arch/mips/pmc-sierra/stretch/setup.h linux-2.4.28-bk4/arch/mips/pmc-sierra/stretch/setup.h --- linux-2.4.28-bk3/arch/mips/pmc-sierra/stretch/setup.h 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/pmc-sierra/stretch/setup.h 2004-11-23 02:49:27.417393019 -0800 @@ -0,0 +1,59 @@ +/* + * Copyright 2004 PMC-Sierra + * Author: Manish Lachwani (lachwani@pmc-sierra.com) + * + * Board specific definititions for the PMC-Sierra Stretch + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#ifndef __SETUP_H__ +#define __SETUP_H__ + +/* + * Define for the base addreses + */ + +#define PMC_STRETCH_BASE (0x1A000000 + KSEG1) /* FIXME */ + +/* + * PCI defines + */ +#define PMC_STRETCH_PCI_BASE (0x1A000000 + KSEG1) /* FIXME */ + +#define PMC_STRETCH_READ_DATA(ofs) \ + *(volatile u32 *)(PMC_STRETCH_PCI_BASE + ofs) + +/* + * PCI Config space accesses + */ +#define PMC_STRETCH_PCI_0_CONFIG_ADDRESS 0x678 +#define PMC_STRETCH_PCI_0_DATA_ADDRESS 0x6fc + +#define PMC_STRETCH_WRITE(ofs, data) \ + *(volatile u32 *)(PMC_STRETCH_PCI_BASE + ofs) = data + +#define PMC_STRETCH_READ(ofs, data) \ + *(data) = *(volatile u32 *)(PMC_STRETCH_PCI_BASE + ofs) + +#define PMC_STRETCH_WRITE_16(ofs, data) \ + *(volatile u16 *)(PMC_STRETCH_PCI_BASE + ofs) = data + +#define PMC_STRETCH_READ_16(ofs, data) \ + *(data) = *(volatile u16 *)(PMC_STRETCH_PCI_BASE + ofs) + +#define PMC_STRETCH_WRITE_8(ofs, data) \ + *(volatile u8 *)(PMC_STRETCH_PCI_BASE + ofs) = data + +#define PMC_STRETCH_READ_8(ofs, data) \ + *(data) = *(volatile u8 *)(PMC_STRETCH_PCI_BASE + ofs) + +/* + * RTC/NVRAM + */ +#define PMC_STRETCH_NVRAM_BASE 0xfc800000 /* FIXME */ + +#endif /* __SETUP_H__ */ diff -urN linux-2.4.28-bk3/arch/mips/pmc-sierra/yosemite/Makefile linux-2.4.28-bk4/arch/mips/pmc-sierra/yosemite/Makefile --- linux-2.4.28-bk3/arch/mips/pmc-sierra/yosemite/Makefile 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/pmc-sierra/yosemite/Makefile 2004-11-23 02:49:27.418393059 -0800 @@ -2,15 +2,13 @@ # Makefile for the PMC-Sierra Titan # -.S.s: - $(CPP) $(CFLAGS) $< -o $*.s -.S.o: - $(CC) $(CFLAGS) -c $< -o $*.o +USE_STANDARD_AS_RULE := true O_TARGET:= titan.o obj-y += irq-handler.o irq.o i2c-yosemite.o prom.o setup.o +obj-$(CONFIG_KGDB) += dbg_io.o obj-$(CONFIG_PCI) += pci-irq.o pci.o obj-$(CONFIG_SMP) += smp.o obj-$(CONFIG_HYPERTRANSPORT) += ht-irq.o ht.o diff -urN linux-2.4.28-bk3/arch/mips/pmc-sierra/yosemite/dbg_io.c linux-2.4.28-bk4/arch/mips/pmc-sierra/yosemite/dbg_io.c --- linux-2.4.28-bk3/arch/mips/pmc-sierra/yosemite/dbg_io.c 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/pmc-sierra/yosemite/dbg_io.c 2004-11-23 02:49:27.419393100 -0800 @@ -0,0 +1,184 @@ +/* + * Copyright 2003 PMC-Sierra + * Author: Manish Lachwani (lachwani@pmc-sierra.com) + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +/* + * Support for KGDB for the Yosemite board. We make use of single serial + * port to be used for KGDB as well as console. The second serial port + * seems to be having a problem. Single IRQ is allocated for both the + * ports. Hence, the interrupt routing code needs to figure out whether + * the interrupt came from channel A or B. + */ + +#include + +#if defined(CONFIG_KGDB) +#include + +/* + * Baud rate, Parity, Data and Stop bit settings for the + * serial port on the Yosemite. Note that the Early printk + * patch has been added. So, we should be all set to go + */ +#define YOSEMITE_BAUD_2400 2400 +#define YOSEMITE_BAUD_4800 4800 +#define YOSEMITE_BAUD_9600 9600 +#define YOSEMITE_BAUD_19200 19200 +#define YOSEMITE_BAUD_38400 38400 +#define YOSEMITE_BAUD_57600 57600 +#define YOSEMITE_BAUD_115200 115200 + +#define YOSEMITE_PARITY_NONE 0 +#define YOSEMITE_PARITY_ODD 0x08 +#define YOSEMITE_PARITY_EVEN 0x18 +#define YOSEMITE_PARITY_MARK 0x28 +#define YOSEMITE_PARITY_SPACE 0x38 + +#define YOSEMITE_DATA_5BIT 0x0 +#define YOSEMITE_DATA_6BIT 0x1 +#define YOSEMITE_DATA_7BIT 0x2 +#define YOSEMITE_DATA_8BIT 0x3 + +#define YOSEMITE_STOP_1BIT 0x0 +#define YOSEMITE_STOP_2BIT 0x4 + +/* This is crucial */ +#define SERIAL_REG_OFS 0x1 + +#define SERIAL_RCV_BUFFER 0x0 +#define SERIAL_TRANS_HOLD 0x0 +#define SERIAL_SEND_BUFFER 0x0 +#define SERIAL_INTR_ENABLE (1 * SERIAL_REG_OFS) +#define SERIAL_INTR_ID (2 * SERIAL_REG_OFS) +#define SERIAL_DATA_FORMAT (3 * SERIAL_REG_OFS) +#define SERIAL_LINE_CONTROL (3 * SERIAL_REG_OFS) +#define SERIAL_MODEM_CONTROL (4 * SERIAL_REG_OFS) +#define SERIAL_RS232_OUTPUT (4 * SERIAL_REG_OFS) +#define SERIAL_LINE_STATUS (5 * SERIAL_REG_OFS) +#define SERIAL_MODEM_STATUS (6 * SERIAL_REG_OFS) +#define SERIAL_RS232_INPUT (6 * SERIAL_REG_OFS) +#define SERIAL_SCRATCH_PAD (7 * SERIAL_REG_OFS) + +#define SERIAL_DIVISOR_LSB (0 * SERIAL_REG_OFS) +#define SERIAL_DIVISOR_MSB (1 * SERIAL_REG_OFS) + +/* + * Functions to READ and WRITE to serial port 0 + */ +#define SERIAL_READ(ofs) (*((volatile unsigned char*) \ + (TITAN_SERIAL_BASE + ofs))) + +#define SERIAL_WRITE(ofs, val) ((*((volatile unsigned char*) \ + (TITAN_SERIAL_BASE + ofs))) = val) + +/* + * Functions to READ and WRITE to serial port 1 + */ +#define SERIAL_READ_1(ofs) (*((volatile unsigned char*) \ + (TITAN_SERIAL_BASE_1 + ofs) + +#define SERIAL_WRITE_1(ofs, val) ((*((volatile unsigned char*) \ + (TITAN_SERIAL_BASE_1 + ofs))) = val) + +/* + * Second serial port initialization + */ +void init_second_port(void) +{ + /* Disable Interrupts */ + SERIAL_WRITE_1(SERIAL_LINE_CONTROL, 0x0); + SERIAL_WRITE_1(SERIAL_INTR_ENABLE, 0x0); + + { + unsigned int divisor; + + SERIAL_WRITE_1(SERIAL_LINE_CONTROL, 0x80); + divisor = TITAN_SERIAL_BASE_BAUD / YOSEMITE_BAUD_115200; + SERIAL_WRITE_1(SERIAL_DIVISOR_LSB, divisor & 0xff); + + SERIAL_WRITE_1(SERIAL_DIVISOR_MSB, (divisor & 0xff00) >> 8); + SERIAL_WRITE_1(SERIAL_LINE_CONTROL, 0x0); + } + + SERIAL_WRITE_1(SERIAL_DATA_FORMAT, YOSEMITE_DATA_8BIT | + YOSEMITE_PARITY_NONE | + YOSEMITE_STOP_1BIT); + + /* Enable Interrupts */ + SERIAL_WRITE_1(SERIAL_INTR_ENABLE, 0xf); +} + +/* Initialize the serial port for KGDB debugging */ +void debugInit(unsigned int baud, unsigned char data, unsigned char parity, + unsigned char stop) +{ + /* Disable Interrupts */ + SERIAL_WRITE(SERIAL_LINE_CONTROL, 0x0); + SERIAL_WRITE(SERIAL_INTR_ENABLE, 0x0); + + { + unsigned int divisor; + + SERIAL_WRITE(SERIAL_LINE_CONTROL, 0x80); + + divisor = TITAN_SERIAL_BASE_BAUD / baud; + SERIAL_WRITE(SERIAL_DIVISOR_LSB, divisor & 0xff); + + SERIAL_WRITE(SERIAL_DIVISOR_MSB, (divisor & 0xff00) >> 8); + SERIAL_WRITE(SERIAL_LINE_CONTROL, 0x0); + } + + SERIAL_WRITE(SERIAL_DATA_FORMAT, data | parity | stop); +} + +static int remoteDebugInitialized = 0; + +unsigned char getDebugChar(void) +{ + if (!remoteDebugInitialized) { + remoteDebugInitialized = 1; + debugInit(YOSEMITE_BAUD_115200, + YOSEMITE_DATA_8BIT, + YOSEMITE_PARITY_NONE, YOSEMITE_STOP_1BIT); + } + + while ((SERIAL_READ(SERIAL_LINE_STATUS) & 0x1) == 0); + return SERIAL_READ(SERIAL_RCV_BUFFER); +} + +int putDebugChar(unsigned char byte) +{ + if (!remoteDebugInitialized) { + remoteDebugInitialized = 1; + debugInit(YOSEMITE_BAUD_115200, + YOSEMITE_DATA_8BIT, + YOSEMITE_PARITY_NONE, YOSEMITE_STOP_1BIT); + } + + while((SERIAL_READ(SERIAL_LINE_STATUS) & 0x20) == 0); + SERIAL_WRITE(SERIAL_SEND_BUFFER, byte); + + return 1; +} +#endif diff -urN linux-2.4.28-bk3/arch/mips/pmc-sierra/yosemite/ht-irq.c linux-2.4.28-bk4/arch/mips/pmc-sierra/yosemite/ht-irq.c --- linux-2.4.28-bk3/arch/mips/pmc-sierra/yosemite/ht-irq.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/pmc-sierra/yosemite/ht-irq.c 2004-11-23 02:49:27.419393100 -0800 @@ -23,30 +23,194 @@ * 675 Mass Ave, Cambridge, MA 02139, USA. */ +/* + * Currently there is support for: + * Alliance Sipackets HT-PCI bridge + * PLX HT-PCI bridge + * Altera Hypertransport device + */ + #include #include #include +#include #include +#include #include +/* PLX Specific Defines */ +#ifdef CONFIG_PLX_HT_BRIDGE + +#define AMD_VENDOR_ID 0x1022 +#define AMD_DEVICE_ID 0x7450 +#define AMD_IOAPIC_ID 0x7451 + +/* RDR Registers and Index */ +#define AMD_RDR_INDEX 0xb8 +#define AMD_RDR_VALUE 0xbc + +/* AMD RDR Index for INTX# */ +#define AMD_RDR_INTA 0x80100008 +#define AMD_RDR_INTB 0x80120008 +#define AMD_RDR_INTC 0x80140008 +#define AMD_RDR_INTD 0x80160008 + +#endif + /* * HT Bus fixup for the Titan - * XXX IRQ values need to change based on the board layout */ void __init titan_ht_pcibios_fixup_bus(struct pci_bus *bus) { struct pci_bus *current_bus = bus; struct pci_dev *devices; struct list_head *devices_link; + unsigned long cmd; list_for_each(devices_link, &(current_bus->devices)) { devices = pci_dev_b(devices_link); if (devices == NULL) continue; - } + /* + * Set the device IRQ to 3. This coressponds to + * hardware interrupt line 0 and processor + * interrupt line 0 + */ + devices->irq = 3; + } /* - * PLX and SPKT related changes go here - */ + * Turn on IO SPACE, MEM SPACE and BUS MASTER among + * other things + */ + + if (devices->vendor == PCI_VENDOR_ID_SIPACKETS) { + + bus->ops->read_word(devices, PCI_COMMAND, &cmd); + cmd |= 0x17; + bus->ops->write_word(devices, PCI_COMMAND, cmd); + +#ifdef CONFIG_SPKT_HT_BRIDGE + /* + * Configure the Block #0, #1, #2 and #3 + * for interrupt routing + */ + printk(KERN_INFO "Fixing SiPKT HT-PCI IOAPIC \n"); + +#if 0 + /* Interrupt Routing Diagnostics */ + bus->ops->write_byte(devices, 0xc2, 0x48); +#endif + + /* + * The following are the config options: + * Polarity is active low + * Destination mode is logical + * Destination processor is core 0 + * Message type is Fixed + * Interrupt Vector configured to PIRQ 0 + */ + bus->ops->write_dword(devices, 0xa0, 0xc0c1c0c0); + bus->ops->write_dword(devices, 0xa4, 0xc0c3c0c2); + bus->ops->write_dword(devices, 0xa8, 0xc0c1c0c0); + bus->ops->write_dword(devices, 0xac, 0xc0c3c0c2); + bus->ops->write_dword(devices, 0xb0, 0xc0c1c0c0); + bus->ops->write_dword(devices, 0xb4, 0xc0c3c0c2); + bus->ops->write_dword(devices, 0xb8, 0xc0c1c0c0); + bus->ops->write_dword(devices, 0xbc, 0xc0c3c0c2); + + bus->ops->write_byte(devices, 0xc3, 0x47); + bus->ops->write_byte(devices, 0xc4, 0x47); + bus->ops->write_byte(devices, 0xc5, 0x47); + bus->ops->write_byte(devices, 0xc6, 0x47); + printk(KERN_ERR "Done configuring interrupts \n"); + +#ifdef CONFIG_HT_LEVEL_TRIGGER + /* + * Support for Level Triggered mode + */ + bus->ops->write_dword(devices, 0xa0, 0xc0c5c0c4); + bus->ops->write_dword(devices, 0xa4, 0xc0c7c0c6); + bus->ops->write_dword(devices, 0xa8, 0xc0c5c0c4); + bus->ops->write_dword(devices, 0xaC, 0xc0c7c0c6); +#endif + /* Set the cacheline size to 8 */ + bus->ops->write_byte(devices, 0x0c, 0x08); + + /* Set the Prefetch related configuration */ + bus->ops->write_dword(devices, 0x60, 0x0f3f0cff); + bus->ops->read_dword(devices, 0x60, &cmd); + + printk(KERN_ERR "Done configuring the Read Prefetch \n"); +#endif + +#ifdef CONFIG_PLX_HT_BRIDGE + /* + * For the HT-PCIX bridge, we need to make changes to + * the IO space limits. Note that this is valid only for + * the AMD 7450 PLX bridge. Hence we need to compare with + * that + */ + if (devices->vendor == AMD_VENDOR_ID && + devices->device == AMD_DEVICE_ID) { + printk(KERN_INFO "AMD HT-PCIX bridge found "); + + /* + * These are the RDR (Redirection Registers) for the + * AMD 8131 IOAPIC + */ + + /* INTA# */ + bus->ops->write_dword(devices, AMD_RDR_INDEX, AMD_RDR_INTA); + bus->ops->write_dword(devices, AMD_RDR_VALUE, 0xf8200140); + + /* INTB# */ + bus->ops->write_dword(devices, AMD_RDR_INDEX, AMD_RDR_INTB); + bus->ops->write_dword(devices, AMD_RDR_VALUE, 0xf8200140); + + /* INTC# */ + bus->ops->write_dword(devices, AMD_RDR_INDEX, AMD_RDR_INTC); + bus->ops->write_dword(devices, AMD_RDR_VALUE, 0xf8200140); + + /* INTD# */ + bus->ops->write_dword(devices, AMD_RDR_INDEX, AMD_RDR_INTD); + bus->ops->write_dword(devices, AMD_RDR_VALUE, 0xf8200140); + + /* Enable the Prefetching, MRM and MRL */ + bus->ops->read_dword(devices, 0x4c, &val); + val |= 0x00001dc0; + bus->ops->write_dword(devices, 0x4c, val); + } + + if (devices->vendor == AMD_VENDOR_ID && + devices->device == AMD_IOAPIC_ID) { + printk("AMD 8131 IO APIC Fixup \n"); + + /* Turn the IOAPIC ON */ + bus->ops->write_dword(devices, 0x44, 0x00000003); + } +#endif /* CONFIG_PLX_HT_BRIDGE */ +#ifdef CONFIG_ALTERA_HT_BRIDGE + if ( (devices->vendor == PCI_VENDOR_ID_ALTERA) && + (devices->device == PCI_DEVICE_ID_ALTERA_HT_BRIDGE)) { + printk(KERN_INFO "Found an Altera HT device, fixing up \n"); + } + + /* Check if the Link Initialization completed successfully */ + bus->ops->read_dword(devices, 0x44, &val); + if (!(val & 0x20)) + printk(KERN_ERR "Link Initialization Error !! \n"); +#endif /* CONFIG_ALTERA_HT_BRIDGE */ + + /* enable master */ + if (((current_bus->number != 0) && (current_bus->number != 1)) + || (PCI_SLOT(devices->devfn) != 0)) { + bus->ops->read_word(devices, PCI_COMMAND, &cmd); + cmd |= PCI_COMMAND_MASTER; + bus->ops->write_word(devices, PCI_COMMAND, cmd); + } + + } } + diff -urN linux-2.4.28-bk3/arch/mips/pmc-sierra/yosemite/ht.c linux-2.4.28-bk4/arch/mips/pmc-sierra/yosemite/ht.c --- linux-2.4.28-bk3/arch/mips/pmc-sierra/yosemite/ht.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/pmc-sierra/yosemite/ht.c 2004-11-23 02:49:27.421393182 -0800 @@ -28,6 +28,8 @@ #include #include #include +#include +#include #include #include @@ -36,7 +38,6 @@ #ifdef CONFIG_HYPERTRANSPORT - /* * This function check if the Hypertransport Link Initialization completed. If * it did, then proceed further with scanning bus #2 @@ -47,7 +48,6 @@ val = *(volatile u_int32_t *)(RM9000x2_HTLINK_REG); if (val & 0x00000020) - /* HT Link Initialization completed */ return 1; else return 0; @@ -57,25 +57,41 @@ int offset, u32* val) { int dev, bus, func; - uint32_t address_reg, data_reg; - uint32_t address; + volatile uint32_t address; + unsigned long reg_data; bus = device->bus->number; dev = PCI_SLOT(device->devfn); func = PCI_FUNC(device->devfn); - /* XXX Need to change the Bus # */ - if (bus > 2) - address = (bus << 16) | (dev << 11) | (func << 8) | (offset & 0xfc) | - 0x80000000 | 0x1; - else - address = (dev << 11) | (func << 8) | (offset & 0xfc) | 0x80000000; - - address_reg = RM9000x2_OCD_HTCFGA; - data_reg = RM9000x2_OCD_HTCFGD; + if (bus != 0) + address = (bus << 16) | (dev << 11) | (func << 8) | + (offset & 0xfc) | 0x80000000 | 0x1; + else + address = (bus << 16) | (dev << 11) | (func << 8) | + (offset & 0xfc) | 0x80000000; + + /* + * RM9000 HT Errata: Issue back to back HT config + * transcations. Issue a BIU sync before and + * after the HT cycle + */ + + reg_data = *(volatile u_int32_t *)(0xfb0000f0); + reg_data |= 0x2; + *(volatile u_int32_t *)(0xfb0000f0) = reg_data; + + udelay(30); + + *(volatile u_int32_t *)(0xfb0006f8) = address; + *(val) = *(volatile u_int32_t *)(0xfb0006fc); + + udelay(30); + + reg_data = *(volatile u_int32_t *)(0xfb0000f0); + reg_data |= 0x2; + *(volatile u_int32_t *)(0xfb0000f0) = reg_data; - RM9K_WRITE(address_reg, address); - RM9K_READ(data_reg, val); return PCIBIOS_SUCCESSFUL; } @@ -85,30 +101,25 @@ int offset, u16* val) { int dev, bus, func; - uint32_t address_reg, data_reg; - uint32_t address; + volatile uint32_t address_reg, data_reg; + uint32_t address, *val1 = kmalloc(sizeof(uint32_t), GFP_KERNEL); bus = device->bus->number; dev = PCI_SLOT(device->devfn); func = PCI_FUNC(device->devfn); - /* XXX Need to change the Bus # */ - if (bus > 2) - address = (bus << 16) | (dev << 11) | (func << 8) | (offset & 0xfc) | - 0x80000000 | 0x1; - else - address = (dev << 11) | (func << 8) | (offset & 0xfc) | 0x80000000; + address = (bus << 16) | (dev << 11) | (func << 8) | + (offset & 0xfc) | 0x80000000; address_reg = RM9000x2_OCD_HTCFGA; data_reg = RM9000x2_OCD_HTCFGD; + titan_ht_config_read_dword(device, offset, val1); + if ((offset & 0x3) == 0) - offset = 0x2; + *val = (*val1 & 0x0000ffff); else - offset = 0x0; - - RM9K_WRITE(address_reg, address); - RM9K_READ_16(data_reg + offset, val); + *val = (*val1 & 0xffff0000) >> 16; return PCIBIOS_SUCCESSFUL; } @@ -131,99 +142,103 @@ int offset, u8* val) { int dev, bus, func; - uint32_t address_reg, data_reg; - uint32_t address; - int offset1; + volatile uint32_t address_reg, data_reg; + uint32_t address, *val1 = kmalloc(sizeof(uint32_t), GFP_KERNEL); bus = device->bus->number; dev = PCI_SLOT(device->devfn); func = PCI_FUNC(device->devfn); - /* XXX Need to change the Bus # */ - if (bus > 2) - address = (bus << 16) | (dev << 11) | (func << 8) | (offset & 0xfc) | - 0x80000000 | 0x1; - else - address = (dev << 11) | (func << 8) | (offset & 0xfc) | 0x80000000; + address = (bus << 16) | (dev << 11) | (func << 8) | + (offset & 0xfc) | 0x80000000; address_reg = RM9000x2_OCD_HTCFGA; data_reg = RM9000x2_OCD_HTCFGD; - RM9K_WRITE(address_reg, address); + titan_ht_config_read_dword(device, offset, val1); if ((offset & 0x3) == 0) { - offset1 = 0x3; + *val = (*val1 & 0x000000ff); } if ((offset & 0x3) == 1) { - offset1 = 0x2; + *val = ((*val1 & 0x0000ff00) >> 8); } if ((offset & 0x3) == 2) { - offset1 = 0x1; + *val = ((*val1 & 0x00ff0000) >> 16); } if ((offset & 0x3) == 3) { - offset1 = 0x0; - } - RM9K_READ_8(data_reg + offset1, val); + *val = ((*val1 & 0xff000000) >> 24); + } return PCIBIOS_SUCCESSFUL; } static int titan_ht_config_write_dword(struct pci_dev *device, - int offset, u8 val) + int offset, u32 val) { int dev, bus, func; - uint32_t address_reg, data_reg; - uint32_t address; + volatile uint32_t address; + unsigned long reg_data; bus = device->bus->number; dev = PCI_SLOT(device->devfn); func = PCI_FUNC(device->devfn); - /* XXX Need to change the Bus # */ - if (bus > 2) - address = (bus << 16) | (dev << 11) | (func << 8) | (offset & 0xfc) | - 0x80000000 | 0x1; - else - address = (dev << 11) | (func << 8) | (offset & 0xfc) | 0x80000000; - - address_reg = RM9000x2_OCD_HTCFGA; - data_reg = RM9000x2_OCD_HTCFGD; - - RM9K_WRITE(address_reg, address); - RM9K_WRITE(data_reg, val); + if (bus != 0) + address = (bus << 16) | (dev << 11) | (func << 8) | + (offset & 0xfc) | 0x80000000 | 0x1; + else + address = (bus << 16) | (dev << 11) | (func << 8) | + (offset & 0xfc) | 0x80000000; + + reg_data = *(volatile u_int32_t *)(0xfb0000f0); + reg_data |= 0x2; + *(volatile u_int32_t *)(0xfb0000f0) = reg_data; + + udelay(30); + + *(volatile u_int32_t *)(0xfb0006f8) = address; + *(volatile u_int32_t *)(0xfb0006fc) = val; + + udelay(30); + + reg_data = *(volatile u_int32_t *)(0xfb0000f0); + reg_data |= 0x2; + *(volatile u_int32_t *)(0xfb0000f0) = reg_data; return PCIBIOS_SUCCESSFUL; } static int titan_ht_config_write_word(struct pci_dev *device, - int offset, u8 val) + int offset, u16 val) { int dev, bus, func; - uint32_t address_reg, data_reg; - uint32_t address; + volatile uint32_t address_reg, data_reg; + uint32_t address, val1, val2; bus = device->bus->number; dev = PCI_SLOT(device->devfn); func = PCI_FUNC(device->devfn); - /* XXX Need to change the Bus # */ - if (bus > 2) - address = (bus << 16) | (dev << 11) | (func << 8) | (offset & 0xfc) | - 0x80000000 | 0x1; - else - address = (dev << 11) | (func << 8) | (offset & 0xfc) | 0x80000000; + address = (bus << 16) | (dev << 11) | (func << 8) | + (offset & 0xfc) | 0x80000000; address_reg = RM9000x2_OCD_HTCFGA; data_reg = RM9000x2_OCD_HTCFGD; - if ((offset & 0x3) == 0) - offset = 0x2; - else - offset = 0x0; + titan_ht_config_read_dword(device, offset, &val2); + + if ((offset & 0x3) == 0) { + val2 = ( (val2 & ~(0x0000ffff)) | val); + } + else { + val1 = val; + val1 = (val1 << 16); + val2 = ( (val2 & ~(0xffff0000)) | val1); + } - RM9K_WRITE(address_reg, address); - RM9K_WRITE_16(data_reg + offset, val); + titan_ht_config_write_dword(device, offset, val2); return PCIBIOS_SUCCESSFUL; } @@ -232,44 +247,49 @@ int offset, u8 val) { int dev, bus, func; - uint32_t address_reg, data_reg; - uint32_t address; + volatile uint32_t address_reg, data_reg; + uint32_t address, val1, val2; int offset1; bus = device->bus->number; dev = PCI_SLOT(device->devfn); func = PCI_FUNC(device->devfn); - /* XXX Need to change the Bus # */ - if (bus > 2) - address = (bus << 16) | (dev << 11) | (func << 8) | (offset & 0xfc) | - 0x80000000 | 0x1; - else - address = (dev << 11) | (func << 8) | (offset & 0xfc) | 0x80000000; + address = (bus << 16) | (dev << 11) | (func << 8) | + (offset & 0xfc) | 0x80000000; address_reg = RM9000x2_OCD_HTCFGA; data_reg = RM9000x2_OCD_HTCFGD; - RM9K_WRITE(address_reg, address); + titan_ht_config_read_dword(device, offset, &val2); if ((offset & 0x3) == 0) { - offset1 = 0x3; + val1 = val; + val2 = ( (val2 & ~(0x000000ff)) | val1); } if ((offset & 0x3) == 1) { - offset1 = 0x2; + val1 = val; + val1 = val1 << 8; + val2 = ( (val2 & ~(0x0000ff00)) | val1); } if ((offset & 0x3) == 2) { - offset1 = 0x1; + val1 = val; + val1 = val1 << 16; + val2 = ( (val2 & ~(0x00ff0000)) | val1); } if ((offset & 0x3) == 3) { - offset1 = 0x0; + val1 = val; + val1 = val1 << 24; + val2 = ( (val2 & ~(0xff000000)) | val1); } - RM9K_WRITE_8(data_reg + offset1, val); + titan_ht_config_write_dword(device, offset, val2); return PCIBIOS_SUCCESSFUL; } - +/* + * Bus mastering capabilities for the HT device + */ static void titan_pcibios_set_master(struct pci_dev *dev) { u16 cmd; @@ -289,6 +309,7 @@ { u16 cmd, old_cmd; u8 tmp1; + u32 reg_data; int idx; struct resource *r; int bus = dev->bus->number; @@ -300,10 +321,11 @@ for (idx = 0; idx < 6; idx++) { r = &dev->resource[idx]; if (!r->start && r->end) { + printk("%x %x \n", r->start, r->end); printk(KERN_ERR "PCI: Device %s not available because of " "resource collisions\n", dev->slot_name); - return -EINVAL; + return -EINVAL; } if (r->flags & IORESOURCE_IO) cmd |= PCI_COMMAND_IO; @@ -346,8 +368,6 @@ return pcibios_enable_resources(dev); } - - void pcibios_update_resource(struct pci_dev *dev, struct resource *root, struct resource *res, int resource) { @@ -404,6 +424,9 @@ } } +/* + * PCI structure + */ struct pci_ops titan_pci_ops = { titan_ht_config_read_byte, titan_ht_config_read_word, @@ -425,17 +448,20 @@ void __init pcibios_init(void) { + /* + * IO space accesses for the device + */ + set_io_port_base(KSEG1); + + /* + * IO and MEM space values + */ + ioport_resource.start = 0xe0000000; + ioport_resource.end = 0xe0000000 + 0x01000000 - 1; + iomem_resource.start = 0xd0000000; + iomem_resource.end = 0xd0000000 + 0x0f000000 - 1; - /* Reset PCI I/O and PCI MEM values */ - /* XXX Need to add the proper values here */ - ioport_resource.start = 0xe0000000; - ioport_resource.end = 0xe0000000 + 0x20000000 - 1; - iomem_resource.start = 0xc0000000; - iomem_resource.end = 0xc0000000 + 0x20000000 - 1; - - /* XXX Need to add bus values */ - pci_scan_bus(2, &titan_pci_ops, NULL); - pci_scan_bus(3, &titan_pci_ops, NULL); + pci_scan_bus(0, &titan_pci_ops, NULL); } /* @@ -444,15 +470,13 @@ char *pcibios_setup(char *str) { printk(KERN_INFO "rr: pcibios_setup\n"); - /* Nothing to do for now. */ return str; } unsigned __init int pcibios_assign_all_busses(void) { - /* We want to use the PCI bus detection done by PMON */ - return 0; + return 1; } #endif /* CONFIG_HYPERTRANSPORT */ diff -urN linux-2.4.28-bk3/arch/mips/pmc-sierra/yosemite/irq-handler.S linux-2.4.28-bk4/arch/mips/pmc-sierra/yosemite/irq-handler.S --- linux-2.4.28-bk3/arch/mips/pmc-sierra/yosemite/irq-handler.S 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/pmc-sierra/yosemite/irq-handler.S 2004-11-23 02:49:27.421393182 -0800 @@ -10,7 +10,6 @@ * option) any later version. */ -#define __ASSEMBLY__ #include #include #include diff -urN linux-2.4.28-bk3/arch/mips/pmc-sierra/yosemite/irq.c linux-2.4.28-bk4/arch/mips/pmc-sierra/yosemite/irq.c --- linux-2.4.28-bk3/arch/mips/pmc-sierra/yosemite/irq.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/pmc-sierra/yosemite/irq.c 2004-11-23 02:49:27.422393222 -0800 @@ -87,7 +87,7 @@ set_mask = 0xff & set_mask_in; status = read_c0_status(); status &= ~((clr_mask & 0xFF) << 8); - status |= (set_mask & 0xFF) << 8 | 0x0000FF00; + status |= (set_mask & 0xFF) << 8; write_c0_status(status); /* do the high 8 bits */ @@ -96,6 +96,7 @@ status = read_32bit_cp0_set1_register(CP0_S1_INTCONTROL); status &= ~((clr_mask & 0xFF) << 8); status |= (set_mask & 0xFF) << 8; + status |= (1 << 13); write_32bit_cp0_set1_register(CP0_S1_INTCONTROL, status); } @@ -224,6 +225,17 @@ do_IRQ(irq, regs); } +static struct irqaction unused_irq = + { no_action, SA_INTERRUPT, 0, "unused", NULL, NULL }; + +extern unsigned long exception_handlers[32]; + +#ifdef CONFIG_KGDB +extern void init_second_port(void); +extern void breakpoint(void); +extern void set_debug_traps(void); +#endif + /* * Initialize the next level interrupt handler */ @@ -237,11 +249,37 @@ set_except_vector(0, titan_handle_int); init_generic_irq(); - for (i = 0; i < 13; i++) { + for (i = 0; i < 12; i++) { irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = 0; irq_desc[i].depth = 1; irq_desc[i].handler = &rm9000_hpcdma_irq_type; } + +#ifdef CONFIG_KGDB + /* At this point, initialize the second serial port */ + init_second_port(); + printk("Start kgdb ... \n"); + set_debug_traps(); + breakpoint(); +#endif + +#ifdef CONFIG_GDB_CONSOLE + register_gdb_console(); +#endif } +#ifdef CONFIG_KGDB +/* + * The 16550 DUART has two ports, but is allocated one IRQ + * for the serial console. Hence, a generic framework for + * serial IRQ routing in place. Currently, just calls the + * do_IRQ fuction. But, going in the future, need to check + * DUART registers for channel A and B, then decide the + * appropriate action + */ +asmlinkage void yosemite_kgdb_irq(int irq, struct pt_regs *regs) +{ + do_IRQ(irq, regs); +} +#endif diff -urN linux-2.4.28-bk3/arch/mips/ramdisk/Makefile linux-2.4.28-bk4/arch/mips/ramdisk/Makefile --- linux-2.4.28-bk3/arch/mips/ramdisk/Makefile 2003-08-25 04:44:40.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips/ramdisk/Makefile 2004-11-23 02:49:27.422393222 -0800 @@ -10,6 +10,6 @@ img = $(CONFIG_EMBEDDED_RAMDISK_IMAGE) ramdisk.o: $(subst ",,$(img)) ld.script echo "O_FORMAT: " $(O_FORMAT) - $(LD) -T ld.script -b binary --oformat $(O_FORMAT) -o $@ $(img) + $(LD) $(LDFLAGS) -T ld.script -b binary --oformat $(O_FORMAT) -o $@ $(img) include $(TOPDIR)/Rules.make diff -urN linux-2.4.28-bk3/arch/mips/sgi-ip22/ip22-setup.c linux-2.4.28-bk4/arch/mips/sgi-ip22/ip22-setup.c --- linux-2.4.28-bk3/arch/mips/sgi-ip22/ip22-setup.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/sgi-ip22/ip22-setup.c 2004-11-23 02:49:27.423393263 -0800 @@ -139,8 +139,10 @@ indy_sc_init(); #endif - /* Set EISA IO port base for Indigo2 */ - set_io_port_base(KSEG1ADDR(0x00080000)); + /* Set EISA IO port base for Indigo2 + * ioremap cannot fail */ + set_io_port_base((unsigned long)ioremap(0x00080000, + 0x1fffffff - 0x00080000)); /* Nothing registered console before us, so simply use first entry */ c = &console_cmdline[0]; diff -urN linux-2.4.28-bk3/arch/mips/sgi-ip27/Makefile linux-2.4.28-bk4/arch/mips/sgi-ip27/Makefile --- linux-2.4.28-bk3/arch/mips/sgi-ip27/Makefile 2003-08-25 04:44:40.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips/sgi-ip27/Makefile 2004-11-23 02:49:27.423393263 -0800 @@ -6,6 +6,8 @@ O_TARGET = ip27.o +export-objs := ip27-init.o ip27-memory.o + obj-y := ip27-berr.o ip27-console.o ip27-irq.o ip27-init.o ip27-irq-glue.o \ ip27-klconfig.o ip27-klnuma.o ip27-memory.o ip27-nmi.o ip27-pci.o \ ip27-reset.o ip27-setup.o ip27-timer.o diff -urN linux-2.4.28-bk3/arch/mips/sgi-ip27/ip27-init.c linux-2.4.28-bk4/arch/mips/sgi-ip27/ip27-init.c --- linux-2.4.28-bk3/arch/mips/sgi-ip27/ip27-init.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/sgi-ip27/ip27-init.c 2004-11-23 02:49:27.424393304 -0800 @@ -13,6 +13,8 @@ #include #include /* for numnodes */ #include +#include + #include #include #include @@ -55,11 +57,15 @@ static int router_distance; nasid_t master_nasid = INVALID_NASID; +EXPORT_SYMBOL(master_nasid); + cnodeid_t nasid_to_compact_node[MAX_NASIDS]; nasid_t compact_to_nasid_node[MAX_COMPACT_NODES]; cnodeid_t cpuid_to_compact_node[MAXCPUS]; char node_distances[MAX_COMPACT_NODES][MAX_COMPACT_NODES]; +EXPORT_SYMBOL(nasid_to_compact_node); + hubreg_t get_region(cnodeid_t cnode) { if (fine_mode) diff -urN linux-2.4.28-bk3/arch/mips/sgi-ip27/ip27-memory.c linux-2.4.28-bk4/arch/mips/sgi-ip27/ip27-memory.c --- linux-2.4.28-bk3/arch/mips/sgi-ip27/ip27-memory.c 2002-11-28 15:53:10.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/sgi-ip27/ip27-memory.c 2004-11-23 02:49:27.424393304 -0800 @@ -15,6 +15,7 @@ #include #include #include +#include #include #include @@ -40,6 +41,8 @@ plat_pg_data_t *plat_node_data[MAX_COMPACT_NODES]; bootmem_data_t plat_node_bdata[MAX_COMPACT_NODES]; +EXPORT_SYMBOL(plat_node_data); + int numa_debug(void) { printk("NUMA debug\n"); @@ -47,6 +50,8 @@ return(0); } +EXPORT_SYMBOL(numa_debug); + /* * Return the number of pages of memory provided by the given slot * on the specified node. diff -urN linux-2.4.28-bk3/arch/mips/sgi-ip27/ip27-timer.c linux-2.4.28-bk4/arch/mips/sgi-ip27/ip27-timer.c --- linux-2.4.28-bk3/arch/mips/sgi-ip27/ip27-timer.c 2003-08-25 04:44:40.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips/sgi-ip27/ip27-timer.c 2004-11-23 02:49:27.425393345 -0800 @@ -51,9 +51,8 @@ struct m48t35_rtc *rtc; nasid_t nid; - nid = get_nasid(); - rtc = (struct m48t35_rtc *)(KL_CONFIG_CH_CONS_INFO(nid)->memory_base + - IOC3_BYTEBUS_DEV0); + rtc = (struct m48t35_rtc *) + (KL_CONFIG_CH_CONS_INFO(master_nasid)->memory_base + IOC3_BYTEBUS_DEV0); spin_lock(&rtc_lock); rtc->control |= M48T35_RTC_READ; diff -urN linux-2.4.28-bk3/arch/mips/sibyte/cfe/setup.c linux-2.4.28-bk4/arch/mips/sibyte/cfe/setup.c --- linux-2.4.28-bk3/arch/mips/sibyte/cfe/setup.c 2003-08-25 04:44:40.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips/sibyte/cfe/setup.c 2004-11-23 02:49:27.426393385 -0800 @@ -19,6 +19,7 @@ #include #include #include +#include #include #include #include @@ -64,33 +65,43 @@ extern unsigned char __rd_end; #endif -#ifdef CONFIG_SMP -static int reboot_smp = 0; -#endif - #ifdef CONFIG_KGDB extern int kgdb_port; #endif -static void cfe_linux_exit(void) +static void ATTRIB_NORET cfe_linux_exit(void *arg) { -#ifdef CONFIG_SMP + int warm = *(int *)arg; + if (smp_processor_id()) { - if (reboot_smp) { - /* Don't repeat the process from another CPU */ - for (;;); - } else { + static int reboot_smp; + + /* Don't repeat the process from another CPU */ + if (!reboot_smp) { /* Get CPU 0 to do the cfe_exit */ reboot_smp = 1; - smp_call_function((void *)_machine_restart, NULL, 1, 0); - for (;;); + smp_call_function(cfe_linux_exit, arg, 1, 0); } + } else { + printk("Passing control back to CFE...\n"); + cfe_exit(warm, 0); + printk("cfe_exit returned??\n"); } -#endif - printk("passing control back to CFE\n"); - cfe_exit(1, 0); - printk("cfe_exit returned??\n"); - while(1); + while (1); +} + +static void ATTRIB_NORET cfe_linux_restart(char *command) +{ + static const int zero; + + cfe_linux_exit((void *)&zero); +} + +static void ATTRIB_NORET cfe_linux_halt(void) +{ + static const int one = 1; + + cfe_linux_exit((void *)&one); } static __init void prom_meminit(void) @@ -250,9 +261,9 @@ char *arg; #endif - _machine_restart = (void (*)(char *))cfe_linux_exit; - _machine_halt = cfe_linux_exit; - _machine_power_off = cfe_linux_exit; + _machine_restart = cfe_linux_restart; + _machine_halt = cfe_linux_halt; + _machine_power_off = cfe_linux_halt; /* * Check if a loader was used; if NOT, the 4 arguments are diff -urN linux-2.4.28-bk3/arch/mips/sibyte/cfe/smp.c linux-2.4.28-bk4/arch/mips/sibyte/cfe/smp.c --- linux-2.4.28-bk3/arch/mips/sibyte/cfe/smp.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/sibyte/cfe/smp.c 2004-11-23 02:49:27.426393385 -0800 @@ -1,5 +1,6 @@ /* * Copyright (C) 2000, 2001, 2002, 2003 Broadcom Corporation + * Copyright (C) 2004 Maciej W. Rozycki * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -26,7 +27,7 @@ /* Boot all other cpus in the system, initialize them, and bring them into the boot fn */ -void prom_boot_secondary(int cpu, unsigned long sp, unsigned long gp) +int prom_boot_secondary(int cpu, unsigned long sp, unsigned long gp) { int retval; @@ -34,6 +35,8 @@ if (retval != 0) { printk("cfe_start_cpu(%i) returned %i\n" , cpu, retval); } + + return retval; } void prom_init_secondary(void) diff -urN linux-2.4.28-bk3/arch/mips/sibyte/sb1250/irq_handler.S linux-2.4.28-bk4/arch/mips/sibyte/sb1250/irq_handler.S --- linux-2.4.28-bk3/arch/mips/sibyte/sb1250/irq_handler.S 2003-08-25 04:44:40.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips/sibyte/sb1250/irq_handler.S 2004-11-23 02:49:27.427393426 -0800 @@ -125,7 +125,7 @@ * check the 1250 interrupt registers to figure out what to do * Need to detect which CPU we're on, now that smp_affinity is supported. */ - la v0, KSEG1 + A_IMR_CPU0_BASE + PTR_LA v0, KSEG1 + A_IMR_CPU0_BASE #ifdef CONFIG_SMP lw t1, TASK_PROCESSOR($28) sll t1, IMR_REGISTER_SPACING_SHIFT diff -urN linux-2.4.28-bk3/arch/mips/sibyte/sb1250/smp.c linux-2.4.28-bk4/arch/mips/sibyte/sb1250/smp.c --- linux-2.4.28-bk3/arch/mips/sibyte/sb1250/smp.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/sibyte/sb1250/smp.c 2004-11-23 02:49:27.427393426 -0800 @@ -1,5 +1,6 @@ /* * Copyright (C) 2001 Broadcom Corporation + * Copyright (C) 2004 Maciej W. Rozycki * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -138,10 +139,10 @@ * This loop attempts to compensate for "holes" in the CPU * numbering. It's overkill, but general. */ - for (i = 1; i < smp_num_cpus; ) { + for (i = 1; i < smp_num_cpus && cur_cpu < NR_CPUS; i++) { struct task_struct *p; struct pt_regs regs; - printk("Starting CPU %d... ", i); + printk("Starting CPU %d...\n", i); /* Spawn a new process normally. Grab a pointer to its task struct so we can mess with it */ @@ -158,15 +159,20 @@ unhash_process(p); do { + int status; + /* Iterate until we find a CPU that comes up */ cur_cpu++; - prom_boot_secondary(cur_cpu, - (unsigned long)p + KERNEL_STACK_SIZE - 32, - (unsigned long)p); + status = prom_boot_secondary(cur_cpu, + (unsigned long)p + + KERNEL_STACK_SIZE - 32, + (unsigned long)p); + if (status == 0) { + __cpu_number_map[cur_cpu] = i; + __cpu_logical_map[i] = cur_cpu; + break; + } } while (cur_cpu < NR_CPUS); - __cpu_number_map[cur_cpu] = i; - __cpu_logical_map[i] = cur_cpu; - i++; } /* Wait for everyone to come up */ diff -urN linux-2.4.28-bk3/arch/mips/sibyte/swarm/Makefile linux-2.4.28-bk4/arch/mips/sibyte/swarm/Makefile --- linux-2.4.28-bk3/arch/mips/sibyte/swarm/Makefile 2003-08-25 04:44:40.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips/sibyte/swarm/Makefile 2004-11-23 02:49:27.428393467 -0800 @@ -1,13 +1,9 @@ USE_STANDARD_AS_RULE := true -all: sbswarm.a +L_TARGET = sbswarm.a -OBJS-y = setup.o cmdline.o rtc_xicor1241.o rtc_m41t81.o +obj-y += setup.o cmdline.o rtc_xicor1241.o rtc_m41t81.o -OBJS-$(CONFIG_KGDB) += dbg_io.o - -sbswarm.a: $(OBJS-y) - $(AR) rcs sbswarm.a $^ +obj-$(CONFIG_KGDB) += dbg_io.o include $(TOPDIR)/Rules.make - diff -urN linux-2.4.28-bk3/arch/mips/vr41xx/casio-e55/ide-e55.c linux-2.4.28-bk4/arch/mips/vr41xx/casio-e55/ide-e55.c --- linux-2.4.28-bk3/arch/mips/vr41xx/casio-e55/ide-e55.c 2003-08-25 04:44:40.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips/vr41xx/casio-e55/ide-e55.c 1969-12-31 16:00:00.000000000 -0800 @@ -1,99 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * IDE routines for typical pc-like standard configurations - * for the CASIO CASSIOPEIA E-55/65. - * - * Copyright (C) 1998, 1999, 2001 by Ralf Baechle - */ -/* - * Changes: - * Yoichi Yuasa Sun, 24 Feb 2002 - * - Added CASIO CASSIOPEIA E-55/65 support. - */ -#include -#include -#include -#include -#include -#include - -static int e55_ide_default_irq(ide_ioreg_t base) -{ - return 40; -} - -static ide_ioreg_t e55_ide_default_io_base(int index) -{ - switch (index) { - case 0: return 0xc1f0; - case 1: return 0xc170; - case 2: return 0xc1e8; - case 3: return 0xc168; - case 4: return 0xc1e0; - case 5: return 0xc160; - } - return 0; -} - -static void e55_ide_init_hwif_ports(hw_regs_t *hw, ide_ioreg_t data_port, - ide_ioreg_t ctrl_port, int *irq) -{ - ide_ioreg_t reg = data_port; - int i; - - for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) { - hw->io_ports[i] = reg; - reg += 1; - } - if (ctrl_port) { - hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port; - } else { - hw->io_ports[IDE_CONTROL_OFFSET] = hw->io_ports[IDE_DATA_OFFSET] + 0x206; - } - if (irq != NULL) - *irq = 0; - hw->io_ports[IDE_IRQ_OFFSET] = 0; -} - -static int e55_ide_request_irq(unsigned int irq, - void (*handler)(int,void *, struct pt_regs *), - unsigned long flags, const char *device, - void *dev_id) -{ - return request_irq(irq, handler, flags, device, dev_id); -} - -static void e55_ide_free_irq(unsigned int irq, void *dev_id) -{ - free_irq(irq, dev_id); -} - -static int e55_ide_check_region(ide_ioreg_t from, unsigned int extent) -{ - return check_region(from, extent); -} - -static void e55_ide_request_region(ide_ioreg_t from, unsigned int extent, - const char *name) -{ - request_region(from, extent, name); -} - -static void e55_ide_release_region(ide_ioreg_t from, unsigned int extent) -{ - release_region(from, extent); -} - -struct ide_ops e55_ide_ops = { - &e55_ide_default_irq, - &e55_ide_default_io_base, - &e55_ide_init_hwif_ports, - &e55_ide_request_irq, - &e55_ide_free_irq, - &e55_ide_check_region, - &e55_ide_request_region, - &e55_ide_release_region -}; diff -urN linux-2.4.28-bk3/arch/mips/vr41xx/casio-e55/setup.c linux-2.4.28-bk4/arch/mips/vr41xx/casio-e55/setup.c --- linux-2.4.28-bk3/arch/mips/vr41xx/casio-e55/setup.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/vr41xx/casio-e55/setup.c 2004-11-23 02:49:27.430393548 -0800 @@ -1,33 +1,31 @@ /* - * FILE NAME - * arch/mips/vr41xx/casio-e55/setup.c + * setup.c, Setup for the CASIO CASSIOPEIA E-11/15/55/65. * - * BRIEF MODULE DESCRIPTION - * Setup for the CASIO CASSIOPEIA E-11/15/55/65. + * Copyright (C) 2002-2004 Yoichi Yuasa * - * Copyright 2002 Yoichi Yuasa - * yuasa@hh.iij4u.or.jp + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ #include -#include #include #include +#include #include -#include #include #include -#ifdef CONFIG_BLK_DEV_INITRD -extern unsigned long initrd_start, initrd_end; -extern void * __rd_start, * __rd_end; -#endif - void __init casio_e55_setup(void) { set_io_port_base(IO_PORT_BASE); @@ -36,16 +34,6 @@ iomem_resource.start = IO_MEM_RESOURCE_START; iomem_resource.end = IO_MEM_RESOURCE_END; -#ifdef CONFIG_BLK_DEV_INITRD - ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0); - initrd_start = (unsigned long)&__rd_start; - initrd_end = (unsigned long)&__rd_end; -#endif - - _machine_restart = vr41xx_restart; - _machine_halt = vr41xx_halt; - _machine_power_off = vr41xx_power_off; - board_time_init = vr41xx_time_init; board_timer_setup = vr41xx_timer_setup; @@ -58,8 +46,10 @@ #endif vr41xx_bcu_init(); - vr41xx_cmu_init(); + vr41xx_pmu_init(); +#ifdef CONFIG_SERIAL vr41xx_siu_init(SIU_RS232C, 0); +#endif } diff -urN linux-2.4.28-bk3/arch/mips/vr41xx/common/Makefile linux-2.4.28-bk4/arch/mips/vr41xx/common/Makefile --- linux-2.4.28-bk3/arch/mips/vr41xx/common/Makefile 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/vr41xx/common/Makefile 2004-11-23 02:49:27.430393548 -0800 @@ -12,7 +12,7 @@ O_TARGET := vr41xx.o -obj-y := bcu.o cmu.o giu.o icu.o int-handler.o ksyms.o reset.o rtc.o +obj-y := bcu.o cmu.o giu.o icu.o int-handler.o ksyms.o pmu.o rtc.o export-objs := ksyms.o vrc4171.o vrc4173.o diff -urN linux-2.4.28-bk3/arch/mips/vr41xx/common/cmu.c linux-2.4.28-bk4/arch/mips/vr41xx/common/cmu.c --- linux-2.4.28-bk3/arch/mips/vr41xx/common/cmu.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/vr41xx/common/cmu.c 2004-11-23 02:49:27.431393589 -0800 @@ -40,6 +40,7 @@ * - Added support for NEC VR4133. */ #include +#include #include #include @@ -66,16 +67,19 @@ #define MSKMAC0 0x0002 #define MSKMAC1 0x0004 -static u32 vr41xx_cmu_base; -static u16 cmuclkmsk, cmuclkmsk2; +static uint32_t cmu_base; +static uint16_t cmuclkmsk, cmuclkmsk2; +static spinlock_t cmu_lock; -#define read_cmuclkmsk() readw(vr41xx_cmu_base) +#define read_cmuclkmsk() readw(cmu_base) #define read_cmuclkmsk2() readw(CMUCLKMSK2) -#define write_cmuclkmsk() writew(cmuclkmsk, vr41xx_cmu_base) +#define write_cmuclkmsk() writew(cmuclkmsk, cmu_base) #define write_cmuclkmsk2() writew(cmuclkmsk2, CMUCLKMSK2) -void vr41xx_clock_supply(unsigned int clock) +void vr41xx_supply_clock(unsigned int clock) { + spin_lock_irq(&cmu_lock); + switch (clock) { case PIU_CLOCK: cmuclkmsk |= MSKPIU; @@ -129,10 +133,14 @@ write_cmuclkmsk2(); else write_cmuclkmsk(); + + spin_unlock_irq(&cmu_lock); } -void vr41xx_clock_mask(unsigned int clock) +void vr41xx_mask_clock(unsigned int clock) { + spin_lock_irq(&cmu_lock); + switch (clock) { case PIU_CLOCK: cmuclkmsk &= ~MSKPIU; @@ -198,6 +206,8 @@ write_cmuclkmsk2(); else write_cmuclkmsk(); + + spin_unlock_irq(&cmu_lock); } void __init vr41xx_cmu_init(void) @@ -205,14 +215,14 @@ switch (current_cpu_data.cputype) { case CPU_VR4111: case CPU_VR4121: - vr41xx_cmu_base = CMUCLKMSK_TYPE1; + cmu_base = CMUCLKMSK_TYPE1; break; case CPU_VR4122: case CPU_VR4131: - vr41xx_cmu_base = CMUCLKMSK_TYPE2; + cmu_base = CMUCLKMSK_TYPE2; break; case CPU_VR4133: - vr41xx_cmu_base = CMUCLKMSK_TYPE2; + cmu_base = CMUCLKMSK_TYPE2; cmuclkmsk2 = read_cmuclkmsk2(); break; default: @@ -221,4 +231,6 @@ } cmuclkmsk = read_cmuclkmsk(); + + spin_lock_init(&cmu_lock); } diff -urN linux-2.4.28-bk3/arch/mips/vr41xx/common/ksyms.c linux-2.4.28-bk4/arch/mips/vr41xx/common/ksyms.c --- linux-2.4.28-bk3/arch/mips/vr41xx/common/ksyms.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/vr41xx/common/ksyms.c 2004-11-23 02:49:27.431393589 -0800 @@ -25,6 +25,9 @@ EXPORT_SYMBOL(vr41xx_get_vtclock_frequency); EXPORT_SYMBOL(vr41xx_get_tclock_frequency); +EXPORT_SYMBOL(vr41xx_supply_clock); +EXPORT_SYMBOL(vr41xx_mask_clock); + EXPORT_SYMBOL(vr41xx_set_intassign); EXPORT_SYMBOL(vr41xx_set_rtclong1_cycle); diff -urN linux-2.4.28-bk3/arch/mips/vr41xx/common/pciu.c linux-2.4.28-bk4/arch/mips/vr41xx/common/pciu.c --- linux-2.4.28-bk3/arch/mips/vr41xx/common/pciu.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/vr41xx/common/pciu.c 2004-11-23 02:49:27.432393630 -0800 @@ -1,40 +1,17 @@ /* - * FILE NAME - * arch/mips/vr41xx/common/pciu.c + * arch/mips/vr41xx/common/pciu.c * - * BRIEF MODULE DESCRIPTION - * PCI Control Unit routines for the NEC VR4100 series. + * PCI Control Unit routines for the NEC VR4100 series. * - * Author: Yoichi Yuasa - * yyuasa@mvista.com or source@mvista.com + * Author: Yoichi Yuasa * - * Copyright 2001,2002 MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR - * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. + * 2001-2003 (c) MontaVista, Software, Inc. This file is licensed under + * the terms of the GNU General Public License version 2. This program + * is licensed "as is" without any warranty of any kind, whether express + * or implied. */ /* * Changes: - * Paul Mundt - * - Fix deadlock-causing PCIU access race for VR4131. - * * MontaVista Software Inc. or * - New creation, NEC VR4122 and VR4131 are supported. */ @@ -42,7 +19,6 @@ #include #include #include -#include #include #include @@ -60,49 +36,48 @@ /* * Type 0 configuration */ - if (PCI_SLOT(dev_fn) < 11 || PCI_SLOT(dev_fn) > 31 || where > 255) - return -1; + if (PCI_SLOT(dev_fn) < 11 || PCI_SLOT(dev_fn) > 31 || where > 0xff) + return -EINVAL; - writel((1UL << PCI_SLOT(dev_fn))| + writel((1U << PCI_SLOT(dev_fn)) | (PCI_FUNC(dev_fn) << 8) | (where & 0xfc), PCICONFAREG); - } - else { + } else { /* * Type 1 configuration */ - if (PCI_SLOT(dev_fn) > 31 || where > 255) - return -1; + if (PCI_SLOT(dev_fn) > 31 || where > 0xff) + return -EINVAL; writel((bus << 16) | (dev_fn << 8) | (where & 0xfc) | - 1UL, + 1U, PCICONFAREG); } return 0; } -static int vr41xx_pci_read_config_byte(struct pci_dev *dev, int where, u8 *val) +static int vr41xx_pci_config_read_byte(struct pci_dev *dev, int where, uint8_t *val) { - u32 data; + uint32_t data; *val = 0xff; if (vr41xx_pci_config_access(dev, where) < 0) return PCIBIOS_DEVICE_NOT_FOUND; data = readl(PCICONFDREG); - *val = (u8)(data >> ((where & 3) << 3)); + *val = (uint8_t)(data >> ((where & 3) << 3)); return PCIBIOS_SUCCESSFUL; } -static int vr41xx_pci_read_config_word(struct pci_dev *dev, int where, u16 *val) +static int vr41xx_pci_config_read_word(struct pci_dev *dev, int where, uint16_t *val) { - u32 data; + uint32_t data; *val = 0xffff; if (where & 1) @@ -112,12 +87,12 @@ return PCIBIOS_DEVICE_NOT_FOUND; data = readl(PCICONFDREG); - *val = (u16)(data >> ((where & 2) << 3)); + *val = (uint16_t)(data >> ((where & 2) << 3)); return PCIBIOS_SUCCESSFUL; } -static int vr41xx_pci_read_config_dword(struct pci_dev *dev, int where, u32 *val) +static int vr41xx_pci_config_read_dword(struct pci_dev *dev, int where, uint32_t *val) { *val = 0xffffffff; if (where & 3) @@ -131,9 +106,9 @@ return PCIBIOS_SUCCESSFUL; } -static int vr41xx_pci_write_config_byte(struct pci_dev *dev, int where, u8 val) +static int vr41xx_pci_config_write_byte(struct pci_dev *dev, int where, uint8_t val) { - u32 data; + uint32_t data; int shift; if (vr41xx_pci_config_access(dev, where) < 0) @@ -141,17 +116,16 @@ data = readl(PCICONFDREG); shift = (where & 3) << 3; - data &= ~(0xff << shift); - data |= (((u32)val) << shift); - + data &= ~(0xffU << shift); + data |= (uint32_t)val << shift; writel(data, PCICONFDREG); return PCIBIOS_SUCCESSFUL; } -static int vr41xx_pci_write_config_word(struct pci_dev *dev, int where, u16 val) +static int vr41xx_pci_config_write_word(struct pci_dev *dev, int where, uint16_t val) { - u32 data; + uint32_t data; int shift; if (where & 1) @@ -162,14 +136,14 @@ data = readl(PCICONFDREG); shift = (where & 2) << 3; - data &= ~(0xffff << shift); - data |= (((u32)val) << shift); + data &= ~(0xffffU << shift); + data |= (uint32_t)val << shift; writel(data, PCICONFDREG); return PCIBIOS_SUCCESSFUL; } -static int vr41xx_pci_write_config_dword(struct pci_dev *dev, int where, u32 val) +static int vr41xx_pci_config_write_dword(struct pci_dev *dev, int where, uint32_t val) { if (where & 3) return PCIBIOS_BAD_REGISTER_NUMBER; @@ -183,35 +157,32 @@ } struct pci_ops vr41xx_pci_ops = { - vr41xx_pci_read_config_byte, - vr41xx_pci_read_config_word, - vr41xx_pci_read_config_dword, - vr41xx_pci_write_config_byte, - vr41xx_pci_write_config_word, - vr41xx_pci_write_config_dword + .read_byte = vr41xx_pci_config_read_byte, + .read_word = vr41xx_pci_config_read_word, + .read_dword = vr41xx_pci_config_read_dword, + .write_byte = vr41xx_pci_config_write_byte, + .write_word = vr41xx_pci_config_write_word, + .write_dword = vr41xx_pci_config_write_dword, }; void __init vr41xx_pciu_init(struct vr41xx_pci_address_map *map) { struct vr41xx_pci_address_space *s; unsigned long vtclock; - u32 config; - int n; + uint32_t config; - if (!map) + if (map == NULL) return; /* Disable PCI interrupt */ writew(0, MPCIINTREG); /* Supply VTClock to PCIU */ - vr41xx_clock_supply(PCIU_CLOCK); + vr41xx_supply_clock(PCIU_CLOCK); - /* - * Sleep for 1us after setting MSKPPCIU bit in CMUCLKMSK - * before doing any PCIU access to avoid deadlock on VR4131. - */ - udelay(1); + /* Dummy read/write, waiting for supply of VTClock. */ + readw(MPCIINTREG); + writew(0, MPCIINTREG); /* Select PCI clock */ vtclock = vr41xx_get_vtclock_frequency(); @@ -225,7 +196,7 @@ printk(KERN_INFO "Warning: PCI Clock is over 33MHz.\n"); /* Supply PCI clock by PCI bus */ - vr41xx_clock_supply(PCI_CLOCK); + vr41xx_supply_clock(PCI_CLOCK); /* * Set PCI memory & I/O space address conversion registers @@ -233,48 +204,52 @@ */ if (map->mem1 != NULL) { s = map->mem1; - config = (s->internal_base & 0xff000000) | - ((s->address_mask & 0x7f000000) >> 11) | (1UL << 12) | - ((s->pci_base & 0xff000000) >> 24); + config = (s->internal_base & INTERNAL_BUS_BASE_ADDRESS) | + ((s->address_mask >> 11) & ADDRESS_MASK) | + PCI_ACCESS_ENABLE | + ((s->pci_base >> 24) & PCI_ADDRESS_SETTING); writel(config, PCIMMAW1REG); } if (map->mem2 != NULL) { s = map->mem2; - config = (s->internal_base & 0xff000000) | - ((s->address_mask & 0x7f000000) >> 11) | (1UL << 12) | - ((s->pci_base & 0xff000000) >> 24); + config = (s->internal_base & INTERNAL_BUS_BASE_ADDRESS) | + ((s->address_mask >> 11) & ADDRESS_MASK) | + PCI_ACCESS_ENABLE | + ((s->pci_base >> 24) & PCI_ADDRESS_SETTING); writel(config, PCIMMAW2REG); } if (map->io != NULL) { s = map->io; - config = (s->internal_base & 0xff000000) | - ((s->address_mask & 0x7f000000) >> 11) | (1UL << 12) | - ((s->pci_base & 0xff000000) >> 24); + config = (s->internal_base & INTERNAL_BUS_BASE_ADDRESS) | + ((s->address_mask >> 11) & ADDRESS_MASK) | + PCI_ACCESS_ENABLE | + ((s->pci_base >> 24) & PCI_ADDRESS_SETTING); writel(config, PCIMIOAWREG); } /* Set target memory windows */ - writel(0x00081000, PCITAW1REG); - writel(0UL, PCITAW2REG); - pciu_write_config_dword(PCI_BASE_ADDRESS_0, 0UL); - pciu_write_config_dword(PCI_BASE_ADDRESS_1, 0UL); + writel(0x00081000U, PCITAW1REG); + writel(0U, PCITAW2REG); + + pciu_write_config_dword(PCI_BASE_ADDRESS_0, 0U); + pciu_write_config_dword(PCI_BASE_ADDRESS_1, 0U); /* Clear bus error */ - n = readl(BUSERRADREG); + readl(BUSERRADREG); if (current_cpu_data.cputype == CPU_VR4122) { - writel(0UL, PCITRDYVREG); - pciu_write_config_dword(PCI_CACHE_LINE_SIZE, 0x0000f804); + writel(0U, PCITRDYVREG); + pciu_write_config_byte(PCI_LATENCY_TIMER, 0xf8); } else { - writel(100UL, PCITRDYVREG); - pciu_write_config_dword(PCI_CACHE_LINE_SIZE, 0x00008004); + writel(100U, PCITRDYVREG); + pciu_write_config_byte(PCI_LATENCY_TIMER, 0x80); } writel(CONFIG_DONE, PCIENREG); - pciu_write_config_dword(PCI_COMMAND, - PCI_COMMAND_IO | - PCI_COMMAND_MEMORY | - PCI_COMMAND_MASTER | - PCI_COMMAND_PARITY | - PCI_COMMAND_SERR); + pciu_write_config_word(PCI_COMMAND, + PCI_COMMAND_IO | + PCI_COMMAND_MEMORY | + PCI_COMMAND_MASTER | + PCI_COMMAND_PARITY | + PCI_COMMAND_SERR); } diff -urN linux-2.4.28-bk3/arch/mips/vr41xx/common/pciu.h linux-2.4.28-bk4/arch/mips/vr41xx/common/pciu.h --- linux-2.4.28-bk3/arch/mips/vr41xx/common/pciu.h 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/vr41xx/common/pciu.h 2004-11-23 02:49:27.433393671 -0800 @@ -1,34 +1,14 @@ /* - * FILE NAME - * arch/mips/vr41xx/common/pciu.h + * arch/mips/vr41xx/common/pciu.h * - * BRIEF MODULE DESCRIPTION - * Include file for PCI Control Unit of the NEC VR4100 series. + * Include file for PCI Control Unit of the NEC VR4100 series. * - * Author: Yoichi Yuasa - * yyuasa@mvista.com or source@mvista.com + * Author: Yoichi Yuasa * - * Copyright 2002 MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR - * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. + * 2002-2003 (c) MontaVista, Software, Inc. This file is licensed under + * the terms of the GNU General Public License version 2. This program + * is licensed "as is" without any warranty of any kind, whether express + * or implied. */ /* * Changes: @@ -41,24 +21,24 @@ #include #include -#define BIT(x) (1 << (x)) +#define BIT(x) (1U << (x)) #define PCIMMAW1REG KSEG1ADDR(0x0f000c00) #define PCIMMAW2REG KSEG1ADDR(0x0f000c04) #define PCITAW1REG KSEG1ADDR(0x0f000c08) #define PCITAW2REG KSEG1ADDR(0x0f000c0c) #define PCIMIOAWREG KSEG1ADDR(0x0f000c10) -#define INTERNAL_BUS_BASE_ADDRESS 0xff000000 -#define ADDRESS_MASK 0x000fe000 +#define INTERNAL_BUS_BASE_ADDRESS 0xff000000U +#define ADDRESS_MASK 0x000fe000U #define PCI_ACCESS_ENABLE BIT(12) -#define PCI_ADDRESS_SETTING 0x000000ff +#define PCI_ADDRESS_SETTING 0x000000ffU #define PCICONFDREG KSEG1ADDR(0x0f000c14) #define PCICONFAREG KSEG1ADDR(0x0f000c18) #define PCIMAILREG KSEG1ADDR(0x0f000c1c) #define BUSERRADREG KSEG1ADDR(0x0f000c24) -#define ERROR_ADDRESS 0xfffffffc +#define ERROR_ADDRESS 0xfffffffcU #define INTCNTSTAREG KSEG1ADDR(0x0f000c28) #define MABTCLR BIT(31) @@ -72,91 +52,102 @@ #define EAREQ BIT(0) #define PCIRECONTREG KSEG1ADDR(0x0f000c30) -#define RTRYCNT 0x000000ff +#define RTRYCNT 0xffU #define PCIENREG KSEG1ADDR(0x0f000c34) #define CONFIG_DONE BIT(2) #define PCICLKSELREG KSEG1ADDR(0x0f000c38) -#define EQUAL_VTCLOCK 0x00000002 -#define HALF_VTCLOCK 0x00000000 -#define QUARTER_VTCLOCK 0x00000001 +#define EQUAL_VTCLOCK 0x2U +#define HALF_VTCLOCK 0x0U +#define QUARTER_VTCLOCK 0x1U #define PCITRDYVREG KSEG1ADDR(0x0f000c3c) #define PCICLKRUNREG KSEG1ADDR(0x0f000c60) -#define PCIU_CONFIGREGS_BASE KSEG1ADDR(0x0f000d00) #define VENDORIDREG KSEG1ADDR(0x0f000d00) -#define DEVICEIDREG KSEG1ADDR(0x0f000d00) -#define COMMANDREG KSEG1ADDR(0x0f000d04) -#define STATUSREG KSEG1ADDR(0x0f000d04) -#define REVIDREG KSEG1ADDR(0x0f000d08) -#define CLASSREG KSEG1ADDR(0x0f000d08) -#define CACHELSREG KSEG1ADDR(0x0f000d0c) -#define LATTIMEREG KSEG1ADDR(0x0f000d0c) -#define MAILBAREG KSEG1ADDR(0x0f000d10) -#define PCIMBA1REG KSEG1ADDR(0x0f000d14) -#define PCIMBA2REG KSEG1ADDR(0x0f000d18) -#define INTLINEREG KSEG1ADDR(0x0f000d3c) -#define INTPINREG KSEG1ADDR(0x0f000d3c) -#define RETVALREG KSEG1ADDR(0x0f000d40) -#define PCIAPCNTREG KSEG1ADDR(0x0f000d40) #define MPCIINTREG KSEG1ADDR(0x0f0000b2) #define MAX_PCI_CLOCK 33333333 -static inline int pciu_read_config_byte(int where, u8 *val) +static inline int pciu_read_config_byte(int where, uint8_t *val) { - u32 data; + uint32_t data; - data = readl(PCIU_CONFIGREGS_BASE + where); - *val = (u8)(data >> ((where & 3) << 3)); + if (where > 0xff) + return PCIBIOS_BAD_REGISTER_NUMBER; + + data = readl(VENDORIDREG + (where & 0xfc)); + *val = (uint8_t)(data >> ((where & 3) << 3)); return PCIBIOS_SUCCESSFUL; } -static inline int pciu_read_config_word(int where, u16 *val) +static inline int pciu_read_config_word(int where, uint16_t *val) { - u32 data; + uint32_t data; - if (where & 1) + if (where > 0xff || (where & 1)) return PCIBIOS_BAD_REGISTER_NUMBER; - data = readl(PCIU_CONFIGREGS_BASE + where); - *val = (u16)(data >> ((where & 2) << 3)); + data = readl(VENDORIDREG + (where & 0xfc)); + *val = (uint16_t)(data >> ((where & 2) << 3)); return PCIBIOS_SUCCESSFUL; } -static inline int pciu_read_config_dword(int where, u32 *val) +static inline int pciu_read_config_dword(int where, uint32_t *val) { - if (where & 3) + if (where > 0xff || (where & 3)) return PCIBIOS_BAD_REGISTER_NUMBER; - *val = readl(PCIU_CONFIGREGS_BASE + where); + *val = readl(VENDORIDREG + where); return PCIBIOS_SUCCESSFUL; } -static inline int pciu_write_config_byte(int where, u8 val) +static inline int pciu_write_config_byte(int where, uint8_t val) { - writel(val, PCIU_CONFIGREGS_BASE + where); + uint32_t data; + int shift; + + if (where > 0xff) + return PCIBIOS_BAD_REGISTER_NUMBER; + + data = readl(VENDORIDREG + (where & 0xfc)); + shift = (where & 3) << 3; + data &= ~(0xffU << shift); + data |= (uint32_t)val << shift; + writel(data, VENDORIDREG + (where & 0xfc)); return 0; } -static inline int pciu_write_config_word(int where, u16 val) +static inline int pciu_write_config_word(int where, uint16_t val) { - writel(val, PCIU_CONFIGREGS_BASE + where); + uint32_t data; + int shift; + + if (where > 0xff || (where & 1)) + return PCIBIOS_BAD_REGISTER_NUMBER; + + data = readl(VENDORIDREG + (where & 0xfc)); + shift = (where & 2) << 3; + data &= ~(0xffffU << shift); + data |= (uint32_t)val << shift; + writel(data, VENDORIDREG + (where & 0xfc)); return 0; } -static inline int pciu_write_config_dword(int where, u32 val) +static inline int pciu_write_config_dword(int where, uint32_t val) { - writel(val, PCIU_CONFIGREGS_BASE + where); + if (where > 0xff || (where & 3)) + return PCIBIOS_BAD_REGISTER_NUMBER; + + writel(val, VENDORIDREG + where); return 0; } diff -urN linux-2.4.28-bk3/arch/mips/vr41xx/common/pmu.c linux-2.4.28-bk4/arch/mips/vr41xx/common/pmu.c --- linux-2.4.28-bk3/arch/mips/vr41xx/common/pmu.c 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/vr41xx/common/pmu.c 2004-11-23 02:49:27.434393711 -0800 @@ -0,0 +1,75 @@ +/* + * pmu.c, Power Management Unit routines for NEC VR4100 series. + * + * Copyright (C) 2003 Yoichi Yuasa + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include +#include + +#include +#include +#include +#include + +#define PMUCNT2REG KSEG1ADDR(0x0f0000c6) + #define SOFTRST 0x0010 + +static inline void software_reset(void) +{ + uint16_t val; + + switch (current_cpu_data.cputype) { + case CPU_VR4122: + case CPU_VR4131: + case CPU_VR4133: + val = readw(PMUCNT2REG); + val |= SOFTRST; + writew(val, PMUCNT2REG); + break; + default: + break; + } +} + +static void vr41xx_restart(char *command) +{ + local_irq_disable(); + software_reset(); + printk(KERN_NOTICE "\nYou can reset your system\n"); + while (1) ; +} + +static void vr41xx_halt(void) +{ + local_irq_disable(); + printk(KERN_NOTICE "\nYou can turn off the power supply\n"); + while (1) ; +} + +static void vr41xx_power_off(void) +{ + local_irq_disable(); + printk(KERN_NOTICE "\nYou can turn off the power supply\n"); + while (1) ; +} + +void __init vr41xx_pmu_init(void) +{ + _machine_restart = vr41xx_restart; + _machine_halt = vr41xx_halt; + _machine_power_off = vr41xx_power_off; +} diff -urN linux-2.4.28-bk3/arch/mips/vr41xx/common/serial.c linux-2.4.28-bk4/arch/mips/vr41xx/common/serial.c --- linux-2.4.28-bk3/arch/mips/vr41xx/common/serial.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/vr41xx/common/serial.c 2004-11-23 02:49:27.434393711 -0800 @@ -145,7 +145,7 @@ if (early_serial_setup(&s) != 0) printk(KERN_ERR "SIU setup failed!\n"); - vr41xx_clock_supply(SIU_CLOCK); + vr41xx_supply_clock(SIU_CLOCK); vr41xx_serial_ports++; } @@ -171,7 +171,7 @@ if (early_serial_setup(&s) != 0) printk(KERN_ERR "DSIU setup failed!\n"); - vr41xx_clock_supply(DSIU_CLOCK); + vr41xx_supply_clock(DSIU_CLOCK); writew(INTDSIU, MDSIUINTREG); diff -urN linux-2.4.28-bk3/arch/mips/vr41xx/common/vrc4173.c linux-2.4.28-bk4/arch/mips/vr41xx/common/vrc4173.c --- linux-2.4.28-bk3/arch/mips/vr41xx/common/vrc4173.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/vr41xx/common/vrc4173.c 2004-11-23 02:49:27.436393793 -0800 @@ -1,34 +1,14 @@ /* - * FILE NAME - * drivers/char/vrc4173.c - * - * BRIEF MODULE DESCRIPTION - * NEC VRC4173 driver for NEC VR4122/VR4131. + * arch/mips/vr41xx/common/vrc4173.c * - * Author: Yoichi Yuasa - * yyuasa@mvista.com or source@mvista.com + * NEC VRC4173 driver for NEC VR4122/VR4131. * - * Copyright 2001,2002 MontaVista Software Inc. + * Author: Yoichi Yuasa * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR - * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. + * 2001-2003 (c) MontaVista, Software, Inc. This file is licensed under + * the terms of the GNU General Public License version 2. This program + * is licensed "as is" without any warranty of any kind, whether express + * or implied. */ #include #include @@ -36,6 +16,7 @@ #include #include #include +#include #include #include @@ -45,100 +26,292 @@ MODULE_AUTHOR("Yoichi Yuasa "); MODULE_LICENSE("GPL"); +EXPORT_SYMBOL(vrc4173_io_offset); +EXPORT_SYMBOL(vrc4173_supply_clock); +EXPORT_SYMBOL(vrc4173_mask_clock); +EXPORT_SYMBOL(vrc4173_select_function); + #define VRC4173_CMUCLKMSK 0x040 + #define MSKPIU 0x0001 + #define MSKKIU 0x0002 + #define MSKAIU 0x0004 + #define MSKPS2CH1 0x0008 + #define MSKPS2CH2 0x0010 + #define MSKUSB 0x0020 + #define MSKCARD1 0x0040 + #define MSKCARD2 0x0080 + #define MSKAC97 0x0100 + #define MSK48MUSB 0x0400 + #define MSK48MPIN 0x0800 + #define MSK48MOSC 0x1000 #define VRC4173_CMUSRST 0x042 - -#define VRC4173_SELECTREG 0x09e + #define USBRST 0x0001 + #define CARD1RST 0x0002 + #define CARD2RST 0x0004 + #define AC97RST 0x0008 #define VRC4173_SYSINT1REG 0x060 #define VRC4173_MSYSINT1REG 0x06c +#define VRC4173_SELECTREG 0x09e + static struct pci_device_id vrc4173_table[] __devinitdata = { - {PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_VRC4173, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, - {0, } + { .vendor = PCI_VENDOR_ID_NEC, + .device = PCI_DEVICE_ID_NEC_VRC4173, + .subvendor = PCI_ANY_ID, + .subdevice = PCI_ANY_ID, }, + { .vendor = 0, }, }; unsigned long vrc4173_io_offset = 0; -EXPORT_SYMBOL(vrc4173_io_offset); - -static u16 vrc4173_cmuclkmsk; static int vrc4173_initialized; +static uint16_t vrc4173_cmuclkmsk; +static uint16_t vrc4173_selectreg; +static spinlock_t vrc4173_cmu_lock; +static spinlock_t vrc4173_giu_lock; -void vrc4173_clock_supply(u16 mask) +static inline void set_cmusrst(uint16_t val) +{ + uint16_t cmusrst; + + cmusrst = vrc4173_inw(VRC4173_CMUSRST); + cmusrst |= val; + vrc4173_outw(cmusrst, VRC4173_CMUSRST); +} + +static inline void clear_cmusrst(uint16_t val) +{ + uint16_t cmusrst; + + cmusrst = vrc4173_inw(VRC4173_CMUSRST); + cmusrst &= ~val; + vrc4173_outw(cmusrst, VRC4173_CMUSRST); +} + +void vrc4173_supply_clock(unsigned int clock) { if (vrc4173_initialized) { - vrc4173_cmuclkmsk |= mask; + spin_lock_irq(&vrc4173_cmu_lock); + + switch (clock) { + case VRC4173_PIU_CLOCK: + vrc4173_cmuclkmsk |= MSKPIU; + break; + case VRC4173_KIU_CLOCK: + vrc4173_cmuclkmsk |= MSKKIU; + break; + case VRC4173_AIU_CLOCK: + vrc4173_cmuclkmsk |= MSKAIU; + break; + case VRC4173_PS2_CH1_CLOCK: + vrc4173_cmuclkmsk |= MSKPS2CH1; + break; + case VRC4173_PS2_CH2_CLOCK: + vrc4173_cmuclkmsk |= MSKPS2CH2; + break; + case VRC4173_USBU_PCI_CLOCK: + set_cmusrst(USBRST); + vrc4173_cmuclkmsk |= MSKUSB; + break; + case VRC4173_CARDU1_PCI_CLOCK: + set_cmusrst(CARD1RST); + vrc4173_cmuclkmsk |= MSKCARD1; + break; + case VRC4173_CARDU2_PCI_CLOCK: + set_cmusrst(CARD2RST); + vrc4173_cmuclkmsk |= MSKCARD2; + break; + case VRC4173_AC97U_PCI_CLOCK: + set_cmusrst(AC97RST); + vrc4173_cmuclkmsk |= MSKAC97; + break; + case VRC4173_USBU_48MHz_CLOCK: + set_cmusrst(USBRST); + vrc4173_cmuclkmsk |= MSK48MUSB; + break; + case VRC4173_EXT_48MHz_CLOCK: + if (vrc4173_cmuclkmsk & MSK48MOSC) + vrc4173_cmuclkmsk |= MSK48MPIN; + else + printk(KERN_WARNING + "vrc4173_supply_clock: " + "Please supply VRC4173_48MHz_CLOCK first " + "rather than VRC4173_EXT_48MHz_CLOCK.\n"); + break; + case VRC4173_48MHz_CLOCK: + vrc4173_cmuclkmsk |= MSK48MOSC; + break; + default: + printk(KERN_WARNING + "vrc4173_supply_clock: Invalid CLOCK value %u\n", clock); + break; + } + vrc4173_outw(vrc4173_cmuclkmsk, VRC4173_CMUCLKMSK); + + switch (clock) { + case VRC4173_USBU_PCI_CLOCK: + case VRC4173_USBU_48MHz_CLOCK: + clear_cmusrst(USBRST); + break; + case VRC4173_CARDU1_PCI_CLOCK: + clear_cmusrst(CARD1RST); + break; + case VRC4173_CARDU2_PCI_CLOCK: + clear_cmusrst(CARD2RST); + break; + case VRC4173_AC97U_PCI_CLOCK: + clear_cmusrst(AC97RST); + break; + default: + break; + } + + spin_unlock_irq(&vrc4173_cmu_lock); } } -void vrc4173_clock_mask(u16 mask) +void vrc4173_mask_clock(unsigned int clock) { if (vrc4173_initialized) { - vrc4173_cmuclkmsk &= ~mask; + spin_lock_irq(&vrc4173_cmu_lock); + + switch (clock) { + case VRC4173_PIU_CLOCK: + vrc4173_cmuclkmsk &= ~MSKPIU; + break; + case VRC4173_KIU_CLOCK: + vrc4173_cmuclkmsk &= ~MSKKIU; + break; + case VRC4173_AIU_CLOCK: + vrc4173_cmuclkmsk &= ~MSKAIU; + break; + case VRC4173_PS2_CH1_CLOCK: + vrc4173_cmuclkmsk &= ~MSKPS2CH1; + break; + case VRC4173_PS2_CH2_CLOCK: + vrc4173_cmuclkmsk &= ~MSKPS2CH2; + break; + case VRC4173_USBU_PCI_CLOCK: + set_cmusrst(USBRST); + vrc4173_cmuclkmsk &= ~MSKUSB; + break; + case VRC4173_CARDU1_PCI_CLOCK: + set_cmusrst(CARD1RST); + vrc4173_cmuclkmsk &= ~MSKCARD1; + break; + case VRC4173_CARDU2_PCI_CLOCK: + set_cmusrst(CARD2RST); + vrc4173_cmuclkmsk &= ~MSKCARD2; + break; + case VRC4173_AC97U_PCI_CLOCK: + set_cmusrst(AC97RST); + vrc4173_cmuclkmsk &= ~MSKAC97; + break; + case VRC4173_USBU_48MHz_CLOCK: + set_cmusrst(USBRST); + vrc4173_cmuclkmsk &= ~MSK48MUSB; + break; + case VRC4173_EXT_48MHz_CLOCK: + vrc4173_cmuclkmsk &= ~MSK48MPIN; + break; + case VRC4173_48MHz_CLOCK: + vrc4173_cmuclkmsk &= ~MSK48MOSC; + break; + default: + printk(KERN_WARNING "vrc4173_mask_clock: Invalid CLOCK value %u\n", clock); + break; + } + vrc4173_outw(vrc4173_cmuclkmsk, VRC4173_CMUCLKMSK); + + switch (clock) { + case VRC4173_USBU_PCI_CLOCK: + case VRC4173_USBU_48MHz_CLOCK: + clear_cmusrst(USBRST); + break; + case VRC4173_CARDU1_PCI_CLOCK: + clear_cmusrst(CARD1RST); + break; + case VRC4173_CARDU2_PCI_CLOCK: + clear_cmusrst(CARD2RST); + break; + case VRC4173_AC97U_PCI_CLOCK: + clear_cmusrst(AC97RST); + break; + default: + break; + } + + spin_unlock_irq(&vrc4173_cmu_lock); } } static inline void vrc4173_cmu_init(void) { vrc4173_cmuclkmsk = vrc4173_inw(VRC4173_CMUCLKMSK); -} -EXPORT_SYMBOL(vrc4173_clock_supply); -EXPORT_SYMBOL(vrc4173_clock_mask); + spin_lock_init(&vrc4173_cmu_lock); +} void vrc4173_select_function(int func) { - u16 val; - if (vrc4173_initialized) { - val = vrc4173_inw(VRC4173_SELECTREG); + spin_lock_irq(&vrc4173_giu_lock); + switch(func) { case PS2CH1_SELECT: - val |= 0x0004; + vrc4173_selectreg |= 0x0004; break; case PS2CH2_SELECT: - val |= 0x0002; + vrc4173_selectreg |= 0x0002; break; case TOUCHPANEL_SELECT: - val &= 0x0007; + vrc4173_selectreg &= 0x0007; break; case KIU8_SELECT: - val &= 0x000e; + vrc4173_selectreg &= 0x000e; break; case KIU10_SELECT: - val &= 0x000c; + vrc4173_selectreg &= 0x000c; break; case KIU12_SELECT: - val &= 0x0008; + vrc4173_selectreg &= 0x0008; break; case GPIO_SELECT: - val |= 0x0008; + vrc4173_selectreg |= 0x0008; break; } - vrc4173_outw(val, VRC4173_SELECTREG); + + vrc4173_outw(vrc4173_selectreg, VRC4173_SELECTREG); + + spin_unlock_irq(&vrc4173_giu_lock); } } -EXPORT_SYMBOL(vrc4173_select_function); +static inline void vrc4173_giu_init(void) +{ + vrc4173_selectreg = vrc4173_inw(VRC4173_SELECTREG); + + spin_lock_init(&vrc4173_giu_lock); +} static void enable_vrc4173_irq(unsigned int irq) { - u16 val; + uint16_t val; val = vrc4173_inw(VRC4173_MSYSINT1REG); - val |= (u16)1 << (irq - VRC4173_IRQ_BASE); + val |= (uint16_t)1 << (irq - VRC4173_IRQ_BASE); vrc4173_outw(val, VRC4173_MSYSINT1REG); } static void disable_vrc4173_irq(unsigned int irq) { - u16 val; + uint16_t val; val = vrc4173_inw(VRC4173_MSYSINT1REG); - val &= ~((u16)1 << (irq - VRC4173_IRQ_BASE)); + val &= ~((uint16_t)1 << (irq - VRC4173_IRQ_BASE)); vrc4173_outw(val, VRC4173_MSYSINT1REG); } @@ -158,19 +331,18 @@ } static struct hw_interrupt_type vrc4173_irq_type = { - "VRC4173", - startup_vrc4173_irq, - shutdown_vrc4173_irq, - enable_vrc4173_irq, - disable_vrc4173_irq, - ack_vrc4173_irq, - end_vrc4173_irq, - NULL + .typename = "VRC4173", + .startup = startup_vrc4173_irq, + .shutdown = shutdown_vrc4173_irq, + .enable = enable_vrc4173_irq, + .disable = disable_vrc4173_irq, + .ack = ack_vrc4173_irq, + .end = end_vrc4173_irq, }; static int vrc4173_get_irq_number(int irq) { - u16 status, mask; + uint16_t status, mask; int i; status = vrc4173_inw(VRC4173_SYSINT1REG); @@ -180,18 +352,18 @@ if (status) { for (i = 0; i < 16; i++) if (status & (0x0001 << i)) - return VRC4173_IRQ_BASE + i; + return VRC4173_IRQ(i); } return -EINVAL; } -static inline void vrc4173_icu_init(int cascade_irq) +static inline int vrc4173_icu_init(int cascade_irq) { int i; if (cascade_irq < GIU_IRQ(0) || cascade_irq > GIU_IRQ(15)) - return; + return -EINVAL; vrc4173_outw(0, VRC4173_MSYSINT1REG); @@ -200,33 +372,38 @@ for (i = VRC4173_IRQ_BASE; i <= VRC4173_IRQ_LAST; i++) irq_desc[i].handler = &vrc4173_irq_type; + + return 0; } -static int __devinit vrc4173_probe(struct pci_dev *pdev, - const struct pci_device_id *ent) +static int __devinit vrc4173_probe(struct pci_dev *dev, + const struct pci_device_id *id) { unsigned long start, flags; int err; - if ((err = pci_enable_device(pdev)) < 0) { - printk(KERN_ERR "vrc4173: failed to enable device -- err=%d\n", err); + err = pci_enable_device(dev); + if (err < 0) { + printk(KERN_ERR "vrc4173: Failed to enable PCI device, aborting\n"); return err; } - pci_set_master(pdev); + pci_set_master(dev); - start = pci_resource_start(pdev, 0); - if (!start) { - printk(KERN_ERR "vrc4173:No PCI I/O resources, aborting\n"); - return -ENODEV; + start = pci_resource_start(dev, 0); + if (start == 0) { + printk(KERN_ERR "vrc4173:No such PCI I/O resource, aborting\n"); + return -ENXIO; } - if (!start || (((flags = pci_resource_flags(pdev, 0)) & IORESOURCE_IO) == 0)) { - printk(KERN_ERR "vrc4173: No PCI I/O resources, aborting\n"); - return -ENODEV; + flags = pci_resource_flags(dev, 0); + if ((flags & IORESOURCE_IO) == 0) { + printk(KERN_ERR "vrc4173: No such PCI I/O resource, aborting\n"); + return -ENXIO; } - if ((err = pci_request_regions(pdev, "NEC VRC4173")) < 0) { + err = pci_request_regions(dev, "NEC VRC4173"); + if (err < 0) { printk(KERN_ERR "vrc4173: PCI resources are busy, aborting\n"); return err; } @@ -234,33 +411,46 @@ set_vrc4173_io_offset(start); vrc4173_cmu_init(); + vrc4173_giu_init(); - vrc4173_icu_init(pdev->irq); + err = vrc4173_icu_init(dev->irq); + if (err < 0) { + printk(KERN_ERR "vrc4173: Invalid IRQ %d, aborting\n", dev->irq); + return err; + } - if ((err = vr41xx_cascade_irq(pdev->irq, vrc4173_get_irq_number)) < 0) { - printk(KERN_ERR - "vrc4173: IRQ resource %d is busy, aborting\n", pdev->irq); + err = vr41xx_cascade_irq(dev->irq, vrc4173_get_irq_number); + if (err < 0) { + printk(KERN_ERR "vrc4173: IRQ resource %d is busy, aborting\n", dev->irq); return err; } printk(KERN_INFO - "NEC VRC4173 at 0x%#08lx, IRQ is cascaded to %d\n", start, pdev->irq); + "NEC VRC4173 at 0x%#08lx, IRQ is cascaded to %d\n", start, dev->irq); return 0; } +static void vrc4173_remove(struct pci_dev *dev) +{ + free_irq(dev->irq, NULL); + + pci_release_regions(dev); +} + static struct pci_driver vrc4173_driver = { - name: "NEC VRC4173", - probe: vrc4173_probe, - remove: NULL, - id_table: vrc4173_table, + .name = "NEC VRC4173", + .probe = vrc4173_probe, + .remove = vrc4173_remove, + .id_table = vrc4173_table, }; static int __devinit vrc4173_init(void) { int err; - if ((err = pci_module_init(&vrc4173_driver)) < 0) + err = pci_module_init(&vrc4173_driver); + if (err < 0) return err; vrc4173_initialized = 1; diff -urN linux-2.4.28-bk3/arch/mips/vr41xx/ibm-workpad/ide-workpad.c linux-2.4.28-bk4/arch/mips/vr41xx/ibm-workpad/ide-workpad.c --- linux-2.4.28-bk3/arch/mips/vr41xx/ibm-workpad/ide-workpad.c 2003-08-25 04:44:40.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips/vr41xx/ibm-workpad/ide-workpad.c 1969-12-31 16:00:00.000000000 -0800 @@ -1,98 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * IDE routines for typical pc-like standard configurations for the IBM WorkPad z50. - * - * Copyright (C) 1998, 1999, 2001 by Ralf Baechle - */ -/* - * Changes: - * Yoichi Yuasa Sun, 24 Feb 2002 - * - Added IBM WorkPad z50 support. - */ -#include -#include -#include -#include -#include -#include - -static int workpad_ide_default_irq(ide_ioreg_t base) -{ - return 49; -} - -static ide_ioreg_t workpad_ide_default_io_base(int index) -{ - switch (index) { - case 0: return 0x1f0; - case 1: return 0x170; - case 2: return 0x1e8; - case 3: return 0x168; - case 4: return 0x1e0; - case 5: return 0x160; - } - return 0; -} - -static void workpad_ide_init_hwif_ports(hw_regs_t *hw, ide_ioreg_t data_port, - ide_ioreg_t ctrl_port, int *irq) -{ - ide_ioreg_t reg = data_port; - int i; - - for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) { - hw->io_ports[i] = reg; - reg += 1; - } - if (ctrl_port) { - hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port; - } else { - hw->io_ports[IDE_CONTROL_OFFSET] = hw->io_ports[IDE_DATA_OFFSET] + 0x206; - } - if (irq != NULL) - *irq = 0; - hw->io_ports[IDE_IRQ_OFFSET] = 0; -} - -static int workpad_ide_request_irq(unsigned int irq, - void (*handler)(int,void *, struct pt_regs *), - unsigned long flags, const char *device, - void *dev_id) -{ - return request_irq(irq, handler, SA_SHIRQ, device, dev_id); -} - -static void workpad_ide_free_irq(unsigned int irq, void *dev_id) -{ - free_irq(irq, dev_id); -} - -static int workpad_ide_check_region(ide_ioreg_t from, unsigned int extent) -{ - return check_region(from, extent); -} - -static void workpad_ide_request_region(ide_ioreg_t from, unsigned int extent, - const char *name) -{ - request_region(from, extent, name); -} - -static void workpad_ide_release_region(ide_ioreg_t from, unsigned int extent) -{ - release_region(from, extent); -} - -struct ide_ops workpad_ide_ops = { - &workpad_ide_default_irq, - &workpad_ide_default_io_base, - &workpad_ide_init_hwif_ports, - &workpad_ide_request_irq, - &workpad_ide_free_irq, - &workpad_ide_check_region, - &workpad_ide_request_region, - &workpad_ide_release_region -}; diff -urN linux-2.4.28-bk3/arch/mips/vr41xx/ibm-workpad/setup.c linux-2.4.28-bk4/arch/mips/vr41xx/ibm-workpad/setup.c --- linux-2.4.28-bk3/arch/mips/vr41xx/ibm-workpad/setup.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/vr41xx/ibm-workpad/setup.c 2004-11-23 02:49:27.438393874 -0800 @@ -1,33 +1,31 @@ /* - * FILE NAME - * arch/mips/vr41xx/workpad/setup.c + * setup.c, Setup for the IBM WorkPad z50. * - * BRIEF MODULE DESCRIPTION - * Setup for the IBM WorkPad z50. + * Copyright (C) 2002-2004 Yoichi Yuasa * - * Copyright 2002 Yoichi Yuasa - * yuasa@hh.iij4u.or.jp + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ #include -#include #include #include +#include #include -#include #include #include -#ifdef CONFIG_BLK_DEV_INITRD -extern unsigned long initrd_start, initrd_end; -extern void * __rd_start, * __rd_end; -#endif - void __init ibm_workpad_setup(void) { set_io_port_base(IO_PORT_BASE); @@ -36,16 +34,6 @@ iomem_resource.start = IO_MEM_RESOURCE_START; iomem_resource.end = IO_MEM_RESOURCE_END; -#ifdef CONFIG_BLK_DEV_INITRD - ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0); - initrd_start = (unsigned long)&__rd_start; - initrd_end = (unsigned long)&__rd_end; -#endif - - _machine_restart = vr41xx_restart; - _machine_halt = vr41xx_halt; - _machine_power_off = vr41xx_power_off; - board_time_init = vr41xx_time_init; board_timer_setup = vr41xx_timer_setup; @@ -58,8 +46,10 @@ #endif vr41xx_bcu_init(); - vr41xx_cmu_init(); + vr41xx_pmu_init(); +#ifdef CONFIG_SERIAL vr41xx_siu_init(SIU_RS232C, 0); +#endif } diff -urN linux-2.4.28-bk3/arch/mips/vr41xx/nec-eagle/ide-eagle.c linux-2.4.28-bk4/arch/mips/vr41xx/nec-eagle/ide-eagle.c --- linux-2.4.28-bk3/arch/mips/vr41xx/nec-eagle/ide-eagle.c 2002-11-28 15:53:10.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/vr41xx/nec-eagle/ide-eagle.c 1969-12-31 16:00:00.000000000 -0800 @@ -1,96 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * IDE routines for typical pc-like standard configurations - * for the NEC Eagle/Hawk board. - * - * Copyright (C) 1998, 1999, 2001 by Ralf Baechle - */ -/* - * Changes: - * MontaVista Software Inc. or - * Fri, 5 Apr 2002 - * - Added support for NEC Hawk. - * - * MontaVista Software Inc. or - * Fri, 1 Mar 2002 - * - Added support for NEC Eagle. - */ -#include -#include -#include -#include -#include -#include - -static int eagle_ide_default_irq(ide_ioreg_t base) -{ - return 0; -} - -static ide_ioreg_t eagle_ide_default_io_base(int index) -{ - return 0; -} - -static void eagle_ide_init_hwif_ports(hw_regs_t *hw, ide_ioreg_t data_port, - ide_ioreg_t ctrl_port, int *irq) -{ - ide_ioreg_t reg = data_port; - int i; - - for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) { - hw->io_ports[i] = reg; - reg += 1; - } - if (ctrl_port) { - hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port; - } else { - hw->io_ports[IDE_CONTROL_OFFSET] = hw->io_ports[IDE_DATA_OFFSET] + 0x206; - } - if (irq != NULL) - *irq = 0; - hw->io_ports[IDE_IRQ_OFFSET] = 0; -} - -static int eagle_ide_request_irq(unsigned int irq, - void (*handler)(int,void *, struct pt_regs *), - unsigned long flags, const char *device, - void *dev_id) -{ - return request_irq(irq, handler, SA_SHIRQ, device, dev_id); -} - -static void eagle_ide_free_irq(unsigned int irq, void *dev_id) -{ - free_irq(irq, dev_id); -} - -static int eagle_ide_check_region(ide_ioreg_t from, unsigned int extent) -{ - return check_region(from, extent); -} - -static void eagle_ide_request_region(ide_ioreg_t from, unsigned int extent, - const char *name) -{ - request_region(from, extent, name); -} - -static void eagle_ide_release_region(ide_ioreg_t from, unsigned int extent) -{ - release_region(from, extent); -} - -struct ide_ops eagle_ide_ops = { - &eagle_ide_default_irq, - &eagle_ide_default_io_base, - &eagle_ide_init_hwif_ports, - &eagle_ide_request_irq, - &eagle_ide_free_irq, - &eagle_ide_check_region, - &eagle_ide_request_region, - &eagle_ide_release_region -}; diff -urN linux-2.4.28-bk3/arch/mips/vr41xx/nec-eagle/setup.c linux-2.4.28-bk4/arch/mips/vr41xx/nec-eagle/setup.c --- linux-2.4.28-bk3/arch/mips/vr41xx/nec-eagle/setup.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/vr41xx/nec-eagle/setup.c 2004-11-23 02:49:27.440393956 -0800 @@ -1,34 +1,14 @@ /* - * FILE NAME - * arch/mips/vr41xx/nec-eagle/setup.c + * arch/mips/vr41xx/nec-eagle/setup.c * - * BRIEF MODULE DESCRIPTION - * Setup for the NEC Eagle/Hawk board. + * Setup for the NEC Eagle/Hawk board. * - * Author: Yoichi Yuasa - * yyuasa@mvista.com or source@mvista.com + * Author: Yoichi Yuasa * - * Copyright 2001,2002 MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR - * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. + * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under + * the terms of the GNU General Public License version 2. This program + * is licensed "as is" without any warranty of any kind, whether express + * or implied. */ /* * Changes: @@ -40,21 +20,15 @@ * - New creation, NEC Eagle is supported. */ #include -#include #include #include +#include #include #include -#include #include #include -#ifdef CONFIG_BLK_DEV_INITRD -extern unsigned long initrd_start, initrd_end; -extern void * __rd_start, * __rd_end; -#endif - extern void eagle_irq_init(void); #ifdef CONFIG_PCI @@ -75,8 +49,6 @@ IORESOURCE_MEM }; -extern struct pci_ops vr41xx_pci_ops; - struct pci_channel mips_pci_channels[] = { {&vr41xx_pci_ops, &vr41xx_pci_io_resource, &vr41xx_pci_mem_resource, 0, 256}, {NULL, NULL, NULL, 0, 0} @@ -115,16 +87,6 @@ iomem_resource.start = IO_MEM1_RESOURCE_START; iomem_resource.end = IO_MEM2_RESOURCE_END; -#ifdef CONFIG_BLK_DEV_INITRD - ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0); - initrd_start = (unsigned long)&__rd_start; - initrd_end = (unsigned long)&__rd_end; -#endif - - _machine_restart = vr41xx_restart; - _machine_halt = vr41xx_halt; - _machine_power_off = vr41xx_power_off; - board_time_init = vr41xx_time_init; board_timer_setup = vr41xx_timer_setup; @@ -139,8 +101,8 @@ #endif vr41xx_bcu_init(); - vr41xx_cmu_init(); + vr41xx_pmu_init(); #ifdef CONFIG_SERIAL vr41xx_dsiu_init(); diff -urN linux-2.4.28-bk3/arch/mips/vr41xx/tanbac-tb0226/setup.c linux-2.4.28-bk4/arch/mips/vr41xx/tanbac-tb0226/setup.c --- linux-2.4.28-bk3/arch/mips/vr41xx/tanbac-tb0226/setup.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/vr41xx/tanbac-tb0226/setup.c 2004-11-23 02:49:27.441393997 -0800 @@ -1,33 +1,31 @@ /* - * FILE NAME - * arch/mips/vr41xx/tanbac-tb0226/setup.c + * setup.c, Setup for the TANBAC TB0226. * - * BRIEF MODULE DESCRIPTION - * Setup for the TANBAC TB0226. + * Copyright (C) 2002-2004 Yoichi Yuasa * - * Copyright 2002,2003 Yoichi Yuasa - * yuasa@hh.iij4u.or.jp + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ #include -#include #include +#include #include #include -#include #include #include -#ifdef CONFIG_BLK_DEV_INITRD -extern unsigned long initrd_start, initrd_end; -extern void * __rd_start, * __rd_end; -#endif - #ifdef CONFIG_PCI static struct resource vr41xx_pci_io_resource = { "PCI I/O space", @@ -43,8 +41,6 @@ IORESOURCE_MEM }; -extern struct pci_ops vr41xx_pci_ops; - struct pci_channel mips_pci_channels[] = { {&vr41xx_pci_ops, &vr41xx_pci_io_resource, &vr41xx_pci_mem_resource, 0, 256}, {NULL, NULL, NULL, 0, 0} @@ -83,16 +79,6 @@ iomem_resource.start = IO_MEM1_RESOURCE_START; iomem_resource.end = IO_MEM2_RESOURCE_END; -#ifdef CONFIG_BLK_DEV_INITRD - ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0); - initrd_start = (unsigned long)&__rd_start; - initrd_end = (unsigned long)&__rd_end; -#endif - - _machine_restart = vr41xx_restart; - _machine_halt = vr41xx_halt; - _machine_power_off = vr41xx_power_off; - board_time_init = vr41xx_time_init; board_timer_setup = vr41xx_timer_setup; @@ -101,10 +87,12 @@ #endif vr41xx_bcu_init(); - vr41xx_cmu_init(); + vr41xx_pmu_init(); +#ifdef CONFIG_SERIAL vr41xx_siu_init(SIU_RS232C, 0); +#endif #ifdef CONFIG_PCI vr41xx_pciu_init(&pci_address_map); diff -urN linux-2.4.28-bk3/arch/mips/vr41xx/tanbac-tb0229/Makefile linux-2.4.28-bk4/arch/mips/vr41xx/tanbac-tb0229/Makefile --- linux-2.4.28-bk3/arch/mips/vr41xx/tanbac-tb0229/Makefile 2003-08-25 04:44:40.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips/vr41xx/tanbac-tb0229/Makefile 2004-11-23 02:49:27.441393997 -0800 @@ -12,8 +12,9 @@ all: tb0229.o -obj-y := init.o setup.o reboot.o +obj-y := init.o setup.o -obj-$(CONFIG_PCI) += pci_fixup.o +obj-$(CONFIG_PCI) += pci_fixup.o +obj-$(CONFIG_TANBAC_TB0219) += reboot.o include $(TOPDIR)/Rules.make diff -urN linux-2.4.28-bk3/arch/mips/vr41xx/tanbac-tb0229/reboot.c linux-2.4.28-bk4/arch/mips/vr41xx/tanbac-tb0229/reboot.c --- linux-2.4.28-bk3/arch/mips/vr41xx/tanbac-tb0229/reboot.c 2003-08-25 04:44:40.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips/vr41xx/tanbac-tb0229/reboot.c 2004-11-23 02:49:27.442394037 -0800 @@ -16,15 +16,11 @@ #include #include -#define tb0229_hard_reset() writew(0, TB0219_RESET_REGS) +#define tb0219_hard_reset() writew(0, TB0219_RESET_REGS) -void tanbac_tb0229_restart(char *command) +void tanbac_tb0219_restart(char *command) { -#ifdef CONFIG_TANBAC_TB0219 local_irq_disable(); - tb0229_hard_reset(); + tb0219_hard_reset(); while (1); -#else - vr41xx_restart(command); -#endif } diff -urN linux-2.4.28-bk3/arch/mips/vr41xx/tanbac-tb0229/setup.c linux-2.4.28-bk4/arch/mips/vr41xx/tanbac-tb0229/setup.c --- linux-2.4.28-bk3/arch/mips/vr41xx/tanbac-tb0229/setup.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/vr41xx/tanbac-tb0229/setup.c 2004-11-23 02:49:27.442394037 -0800 @@ -1,24 +1,26 @@ /* - * FILE NAME - * arch/mips/vr41xx/tanbac-tb0229/setup.c + * setup.c, Setup for the TANBAC TB0229 (VR4131DIMM) * - * BRIEF MODULE DESCRIPTION - * Setup for the TANBAC TB0229 (VR4131DIMM) + * Copyright (C) 2002-2004 Yoichi Yuasa * - * Copyright 2002,2003 Yoichi Yuasa - * yuasa@hh.iij4u.or.jp + * Modified for TANBAC TB0229: + * Copyright (C) 2003 Megasolution Inc. * - * Modified for TANBAC TB0229: - * Copyright 2003 Megasolution Inc. - * matsu@megasolution.jp + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ #include -#include #include #include #include @@ -28,10 +30,6 @@ #include #include -#ifdef CONFIG_BLK_DEV_INITRD -extern void * __rd_start, * __rd_end; -#endif - #ifdef CONFIG_PCI static struct resource vr41xx_pci_io_resource = { .name = "PCI I/O space", @@ -47,8 +45,6 @@ .flags = IORESOURCE_MEM, }; -extern struct pci_ops vr41xx_pci_ops; - struct pci_channel mips_pci_channels[] = { { .pci_ops = &vr41xx_pci_ops, .io_resource = &vr41xx_pci_io_resource, @@ -95,16 +91,6 @@ iomem_resource.start = IO_MEM1_RESOURCE_START; iomem_resource.end = IO_MEM2_RESOURCE_END; -#ifdef CONFIG_BLK_DEV_INITRD - ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0); - initrd_start = (unsigned long)&__rd_start; - initrd_end = (unsigned long)&__rd_end; -#endif - - _machine_restart = tanbac_tb0229_restart; - _machine_halt = vr41xx_halt; - _machine_power_off = vr41xx_power_off; - board_time_init = vr41xx_time_init; board_timer_setup = vr41xx_timer_setup; @@ -113,14 +99,19 @@ #endif vr41xx_bcu_init(); - vr41xx_cmu_init(); + vr41xx_pmu_init(); +#ifdef CONFIG_SERIAL vr41xx_siu_init(SIU_RS232C, 0); vr41xx_dsiu_init(); +#endif #ifdef CONFIG_PCI vr41xx_pciu_init(&pci_address_map); #endif -} +#ifdef CONFIG_TANBAC_TB0219 + _machine_restart = tanbac_tb0219_restart; +#endif +} diff -urN linux-2.4.28-bk3/arch/mips/vr41xx/victor-mpc30x/ide-mpc30x.c linux-2.4.28-bk4/arch/mips/vr41xx/victor-mpc30x/ide-mpc30x.c --- linux-2.4.28-bk3/arch/mips/vr41xx/victor-mpc30x/ide-mpc30x.c 2003-08-25 04:44:40.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips/vr41xx/victor-mpc30x/ide-mpc30x.c 1969-12-31 16:00:00.000000000 -0800 @@ -1,91 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * IDE routines for typical pc-like standard configurations - * for the ZAO Networks Capcella. - * - * Copyright (C) 1998, 1999, 2001 by Ralf Baechle - */ -/* - * Changes: - * Yoichi Yuasa Fri, 23 Aug 2002 - * - Added Victor MP-C303/304 support. - */ -#include -#include -#include -#include -#include -#include - -static int mpc30x_ide_default_irq(ide_ioreg_t base) -{ - return 0; -} - -static ide_ioreg_t mpc30x_ide_default_io_base(int index) -{ - return 0; -} - -static void mpc30x_ide_init_hwif_ports(hw_regs_t *hw, ide_ioreg_t data_port, - ide_ioreg_t ctrl_port, int *irq) -{ - ide_ioreg_t reg = data_port; - int i; - - for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) { - hw->io_ports[i] = reg; - reg += 1; - } - if (ctrl_port) { - hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port; - } else { - hw->io_ports[IDE_CONTROL_OFFSET] = hw->io_ports[IDE_DATA_OFFSET] + 0x206; - } - if (irq != NULL) - *irq = 0; - hw->io_ports[IDE_IRQ_OFFSET] = 0; -} - -static int mpc30x_ide_request_irq(unsigned int irq, - void (*handler)(int,void *, struct pt_regs *), - unsigned long flags, const char *device, - void *dev_id) -{ - return request_irq(irq, handler, flags, device, dev_id); -} - -static void mpc30x_ide_free_irq(unsigned int irq, void *dev_id) -{ - free_irq(irq, dev_id); -} - -static int mpc30x_ide_check_region(ide_ioreg_t from, unsigned int extent) -{ - return check_region(from, extent); -} - -static void mpc30x_ide_request_region(ide_ioreg_t from, unsigned int extent, - const char *name) -{ - request_region(from, extent, name); -} - -static void mpc30x_ide_release_region(ide_ioreg_t from, unsigned int extent) -{ - release_region(from, extent); -} - -struct ide_ops mpc30x_ide_ops = { - &mpc30x_ide_default_irq, - &mpc30x_ide_default_io_base, - &mpc30x_ide_init_hwif_ports, - &mpc30x_ide_request_irq, - &mpc30x_ide_free_irq, - &mpc30x_ide_check_region, - &mpc30x_ide_request_region, - &mpc30x_ide_release_region -}; diff -urN linux-2.4.28-bk3/arch/mips/vr41xx/victor-mpc30x/setup.c linux-2.4.28-bk4/arch/mips/vr41xx/victor-mpc30x/setup.c --- linux-2.4.28-bk3/arch/mips/vr41xx/victor-mpc30x/setup.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/vr41xx/victor-mpc30x/setup.c 2004-11-23 02:49:27.444394119 -0800 @@ -1,34 +1,32 @@ /* - * FILE NAME - * arch/mips/vr41xx/victor-mpc30x/setup.c + * setup.c, Setup for the Victor MP-C303/304. * - * BRIEF MODULE DESCRIPTION - * Setup for the Victor MP-C303/304. + * Copyright (C) 2002-2004 Yoichi Yuasa * - * Copyright 2002 Yoichi Yuasa - * yuasa@hh.iij4u.or.jp + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ #include -#include #include #include +#include #include #include -#include #include #include -#ifdef CONFIG_BLK_DEV_INITRD -extern unsigned long initrd_start, initrd_end; -extern void * __rd_start, * __rd_end; -#endif - #ifdef CONFIG_PCI static struct resource vr41xx_pci_io_resource = { "PCI I/O space", @@ -44,8 +42,6 @@ IORESOURCE_MEM }; -extern struct pci_ops vr41xx_pci_ops; - struct pci_channel mips_pci_channels[] = { {&vr41xx_pci_ops, &vr41xx_pci_io_resource, &vr41xx_pci_mem_resource, 0, 256}, {NULL, NULL, NULL, 0, 0} @@ -84,16 +80,6 @@ iomem_resource.start = IO_MEM1_RESOURCE_START; iomem_resource.end = IO_MEM2_RESOURCE_END; -#ifdef CONFIG_BLK_DEV_INITRD - ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0); - initrd_start = (unsigned long)&__rd_start; - initrd_end = (unsigned long)&__rd_end; -#endif - - _machine_restart = vr41xx_restart; - _machine_halt = vr41xx_halt; - _machine_power_off = vr41xx_power_off; - board_time_init = vr41xx_time_init; board_timer_setup = vr41xx_timer_setup; @@ -106,10 +92,12 @@ #endif vr41xx_bcu_init(); - vr41xx_cmu_init(); + vr41xx_pmu_init(); +#ifdef CONFIG_SERIAL vr41xx_siu_init(SIU_RS232C, 0); +#endif #ifdef CONFIG_PCI vr41xx_pciu_init(&pci_address_map); diff -urN linux-2.4.28-bk3/arch/mips/vr41xx/zao-capcella/ide-capcella.c linux-2.4.28-bk4/arch/mips/vr41xx/zao-capcella/ide-capcella.c --- linux-2.4.28-bk3/arch/mips/vr41xx/zao-capcella/ide-capcella.c 2002-11-28 15:53:10.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/vr41xx/zao-capcella/ide-capcella.c 1969-12-31 16:00:00.000000000 -0800 @@ -1,99 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * IDE routines for typical pc-like standard configurations - * for the ZAO Networks Capcella. - * - * Copyright (C) 1998, 1999, 2001 by Ralf Baechle - */ -/* - * Changes: - * Yoichi Yuasa Sun, 24 Feb 2002 - * - Added ZAO Networks Capcella support. - */ -#include -#include -#include -#include -#include -#include - -static int capcella_ide_default_irq(ide_ioreg_t base) -{ - switch (base) { - case 0x8300: return 42; - } - - return 0; -} - -static ide_ioreg_t capcella_ide_default_io_base(int index) -{ - switch (index) { - case 0: return 0x8300; - } - - return 0; -} - -static void capcella_ide_init_hwif_ports(hw_regs_t *hw, ide_ioreg_t data_port, - ide_ioreg_t ctrl_port, int *irq) -{ - ide_ioreg_t reg = data_port; - int i; - - for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) { - hw->io_ports[i] = reg; - reg += 1; - } - if (ctrl_port) { - hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port; - } else { - hw->io_ports[IDE_CONTROL_OFFSET] = hw->io_ports[IDE_DATA_OFFSET] + 0x206; - } - if (irq != NULL) - *irq = 0; - hw->io_ports[IDE_IRQ_OFFSET] = 0; -} - -static int capcella_ide_request_irq(unsigned int irq, - void (*handler)(int,void *, struct pt_regs *), - unsigned long flags, const char *device, - void *dev_id) -{ - return request_irq(irq, handler, flags, device, dev_id); -} - -static void capcella_ide_free_irq(unsigned int irq, void *dev_id) -{ - free_irq(irq, dev_id); -} - -static int capcella_ide_check_region(ide_ioreg_t from, unsigned int extent) -{ - return check_region(from, extent); -} - -static void capcella_ide_request_region(ide_ioreg_t from, unsigned int extent, - const char *name) -{ - request_region(from, extent, name); -} - -static void capcella_ide_release_region(ide_ioreg_t from, unsigned int extent) -{ - release_region(from, extent); -} - -struct ide_ops capcella_ide_ops = { - &capcella_ide_default_irq, - &capcella_ide_default_io_base, - &capcella_ide_init_hwif_ports, - &capcella_ide_request_irq, - &capcella_ide_free_irq, - &capcella_ide_check_region, - &capcella_ide_request_region, - &capcella_ide_release_region -}; diff -urN linux-2.4.28-bk3/arch/mips/vr41xx/zao-capcella/setup.c linux-2.4.28-bk4/arch/mips/vr41xx/zao-capcella/setup.c --- linux-2.4.28-bk3/arch/mips/vr41xx/zao-capcella/setup.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips/vr41xx/zao-capcella/setup.c 2004-11-23 02:49:27.447394241 -0800 @@ -1,34 +1,32 @@ /* - * FILE NAME - * arch/mips/vr41xx/zao-capcella/setup.c + * setup.c, Setup for the ZAO Networks Capcella. * - * BRIEF MODULE DESCRIPTION - * Setup for the ZAO Networks Capcella. + * Copyright (C) 2002-2004 Yoichi Yuasa * - * Copyright 2002 Yoichi Yuasa - * yuasa@hh.iij4u.or.jp + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ #include -#include #include #include +#include #include #include -#include #include #include -#ifdef CONFIG_BLK_DEV_INITRD -extern unsigned long initrd_start, initrd_end; -extern void * __rd_start, * __rd_end; -#endif - #ifdef CONFIG_PCI static struct resource vr41xx_pci_io_resource = { "PCI I/O space", @@ -44,8 +42,6 @@ IORESOURCE_MEM }; -extern struct pci_ops vr41xx_pci_ops; - struct pci_channel mips_pci_channels[] = { {&vr41xx_pci_ops, &vr41xx_pci_io_resource, &vr41xx_pci_mem_resource, 0, 256}, {NULL, NULL, NULL, 0, 0} @@ -84,16 +80,6 @@ iomem_resource.start = IO_MEM1_RESOURCE_START; iomem_resource.end = IO_MEM2_RESOURCE_END; -#ifdef CONFIG_BLK_DEV_INITRD - ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0); - initrd_start = (unsigned long)&__rd_start; - initrd_end = (unsigned long)&__rd_end; -#endif - - _machine_restart = vr41xx_restart; - _machine_halt = vr41xx_halt; - _machine_power_off = vr41xx_power_off; - board_time_init = vr41xx_time_init; board_timer_setup = vr41xx_timer_setup; @@ -106,11 +92,13 @@ #endif vr41xx_bcu_init(); - vr41xx_cmu_init(); + vr41xx_pmu_init(); +#ifdef CONFIG_SERIAL vr41xx_siu_init(SIU_RS232C, 0); vr41xx_dsiu_init(); +#endif #ifdef CONFIG_PCI vr41xx_pciu_init(&pci_address_map); diff -urN linux-2.4.28-bk3/arch/mips64/Makefile linux-2.4.28-bk4/arch/mips64/Makefile --- linux-2.4.28-bk3/arch/mips64/Makefile 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips64/Makefile 2004-11-23 02:49:27.448394282 -0800 @@ -3,7 +3,7 @@ # License. See the file "COPYING" in the main directory of this archive # for more details. # -# Copyright (C) 2002, 2003 Maciej W. Rozycki +# Copyright (C) 2002, 2003, 2004 Maciej W. Rozycki # # This file is included by the global makefile so that you can add your own # architecture-specific flags and dependencies. Remember to do have actions @@ -26,6 +26,9 @@ CROSS_COMPILE = $(tool-prefix) endif +check_gcc = $(shell if $(CC) $(1) -S -o /dev/null -xc /dev/null > /dev/null 2>&1; then echo "$(1)"; else echo "$(2)"; fi) +check_gas = $(shell if $(CC) $(1) -Wa,-Z -c -o /dev/null -xassembler /dev/null > /dev/null 2>&1; then echo "$(1)"; else echo "$(2)"; fi) + # # The ELF GCC uses -G 0 -mabicalls -fpic as default. We don't need PIC # code in the kernel since it only slows down the whole thing. For the @@ -37,9 +40,9 @@ # crossformat linking we rely on the elf2ecoff tool for format conversion. # GCCFLAGS := -I $(TOPDIR)/include/asm/gcc -GCCFLAGS += -mabi=64 -G 0 -mno-abicalls -fno-pic -Wa,--trap -pipe +GCCFLAGS += -G 0 -mno-abicalls -fno-pic -Wa,--trap -pipe GCCFLAGS += $(call check_gcc, -finline-limit=100000,) -LINKFLAGS += -G 0 -static # -N +LINKFLAGS += -G 0 -static -n MODFLAGS += -mlong-calls ifdef CONFIG_DEBUG_INFO @@ -49,9 +52,6 @@ endif endif -check_gcc = $(shell if $(CC) $(1) -S -o /dev/null -xc /dev/null > /dev/null 2>&1; then echo "$(1)"; else echo "$(2)"; fi) -check_gas = $(shell if $(CC) $(1) -Wa,-Z -c -o /dev/null -xassembler /dev/null > /dev/null 2>&1; then echo "$(1)"; else echo "$(2)"; fi) - # # Use: $(call set_gccflags,,,,) # @@ -76,6 +76,7 @@ done; \ break; \ done; \ +gcc_abi=-mabi=64; \ gcc_cpu=$$cpu; gcc_isa=$$isa; \ gas_cpu=$$cpu; gas_isa=-Wa,$$isa; \ while :; do \ @@ -87,7 +88,12 @@ gas_opt=; gas_cpu=; gas_isa=; \ break; \ done; \ -echo $$gcc_opt$$gcc_cpu $$gcc_isa $$gas_opt$$gas_cpu $$gas_isa) +if test "$$gcc_opt" = -march=; then \ + $(CC) $$gcc_abi $$gcc_opt$$gcc_cpu -S -o /dev/null \ + -xc /dev/null > /dev/null 2>&1 && \ + gcc_isa=; \ +fi; \ +echo $$gcc_abi $$gcc_opt$$gcc_cpu $$gcc_isa $$gas_opt$$gas_cpu $$gas_isa) # # CPU-dependent compiler/assembler options for optimization. @@ -154,7 +160,7 @@ ifdef CONFIG_MIPS_COBALT SUBDIRS += arch/mips/cobalt CORE_FILES += arch/mips/cobalt/cobalt.o -LOADADDR := 0x80080000 +LOADADDR := 0xffffffff80080000 endif # @@ -164,7 +170,7 @@ CORE_FILES += arch/mips/dec/dec.o SUBDIRS += arch/mips/dec arch/mips/dec/prom LIBS += arch/mips/dec/prom/rexlib.a -LOADADDR := 0x80040000 +LOADADDR := 0xffffffff80040000 endif # @@ -174,7 +180,7 @@ LIBS += arch/mips/gt64120/common/gt64120.o \ arch/mips/gt64120/ev64120/ev64120.o SUBDIRS += arch/mips/gt64120/common arch/mips/gt64120/ev64120 -LOADADDR := 0x80100000 +LOADADDR := 0xffffffff80100000 endif # @@ -184,7 +190,7 @@ LIBS += arch/mips/mips-boards/atlas/atlas.o \ arch/mips/mips-boards/generic/mipsboards.o SUBDIRS += arch/mips/mips-boards/generic arch/mips/mips-boards/atlas -LOADADDR := 0x80100000 +LOADADDR := 0xffffffff80100000 endif # @@ -194,7 +200,7 @@ LIBS += arch/mips/mips-boards/malta/malta.o \ arch/mips/mips-boards/generic/mipsboards.o SUBDIRS += arch/mips/mips-boards/malta arch/mips/mips-boards/generic -LOADADDR := 0x80100000 +LOADADDR := 0xffffffff80100000 endif # @@ -204,7 +210,7 @@ LIBS += arch/mips/mips-boards/sead/sead.o \ arch/mips/mips-boards/generic/mipsboards.o SUBDIRS += arch/mips/mips-boards/generic arch/mips/mips-boards/sead -LOADADDR := 0x80100000 +LOADADDR := 0xffffffff80100000 endif # @@ -216,7 +222,7 @@ CORE_FILES += arch/mips/gt64120/common/gt64120.o \ arch/mips/gt64120/momenco_ocelot/momenco_ocelot.o SUBDIRS += arch/mips/gt64120/common arch/mips/gt64120/momenco_ocelot -LOADADDR := 0x80100000 +LOADADDR := 0xffffffff80100000 endif # @@ -227,7 +233,7 @@ # mips_io_port_base. CORE_FILES += arch/mips/momentum/ocelot_g/ocelot_g.o SUBDIRS += arch/mips/momentum/ocelot_g -LOADADDR := 0x80100000 +LOADADDR := 0xffffffff80100000 endif # @@ -236,16 +242,16 @@ ifdef CONFIG_MOMENCO_OCELOT_C CORE_FILES += arch/mips/momentum/ocelot_c/ocelot_c.o SUBDIRS += arch/mips/momentum/ocelot_c -LOADADDR := 0x80100000 +LOADADDR := 0xffffffff80100000 endif ifdef CONFIG_MOMENCO_JAGUAR_ATX LIBS += arch/mips/momentum/jaguar_atx/jaguar_atx.o SUBDIRS += arch/mips/momentum/jaguar_atx ifdef CONFIG_JAGUAR_DMALOW -LOADADDR := 0x88000000 +LOADADDR := 0xffffffff88000000 else -LOADADDR := 0x80100000 +LOADADDR := 0xffffffff80100000 endif endif @@ -262,11 +268,11 @@ LIBS += arch/mips/arc/arclib.a SUBDIRS += arch/mips/sgi-ip22 arch/mips/arc # -# Set LOADADDR to >= 0x88069000 if you want to leave space for symmon, -# 0x88004000 for production kernels. Note that the value must be +# Set LOADADDR to >= 0xffffffff88069000 if you want to leave space for symmon, +# 0xffffffff88004000 for production kernels. Note that the value must be # 16kb aligned or the handling of the current variable will break. # -LOADADDR := 0x88004000 +LOADADDR := 0xffffffff88004000 endif # @@ -281,11 +287,22 @@ # symmon, 0xc00000000001c000 for production kernels. Note that the value # must be 16kb aligned or the handling of the current variable will break. # -#LOADADDR := 0xa80000000001c000 +ifdef CONFIG_BUILD_ELF64 +ifdef CONFIG_MAPPED_KERNEL +LOADADDR := 0xc00000004001c000 +OBJCOPYFLAGS := --change-addresses=0x3fffffff80000000 +else +LOADADDR := 0xa80000000001c000 +OBJCOPYFLAGS := --change-addresses=0x57ffffff80000000 +endif +else ifdef CONFIG_MAPPED_KERNEL -LOADADDR := 0xc001c000 +LOADADDR := 0xffffffffc001c000 +OBJCOPYFLAGS := --change-addresses=0xc000000080000000 else -LOADADDR := 0x8001c000 +LOADADDR := 0xffffffff8001c000 +OBJCOPYFLAGS := --change-addresses=0xa800000080000000 +endif endif endif @@ -299,9 +316,9 @@ LIBS += arch/mips/sibyte/sb1250/sb1250.o SUBDIRS += arch/mips/sibyte/sb1250 ifdef CONFIG_MIPS_UNCACHED -LOADADDR := 0xa0100000 +LOADADDR := 0xffffffffa0100000 else -LOADADDR := 0x80100000 +LOADADDR := 0xffffffff80100000 endif endif @@ -328,43 +345,43 @@ SUBDIRS += arch/mips/sibyte/cfe endif -# -# Some machines like the Indy need 32-bit ELF binaries for booting purposes. -# Other need ECOFF, so we build a 32-bit ELF binary for them which we then -# convert to ECOFF using elf2ecoff. -# -ifdef CONFIG_BOOT_ELF32 -GCCFLAGS += -Wa,-32 $(call check_gas,-Wa$(comma)-mgp64,) -LINKFLAGS += -T arch/mips64/ld.script.elf32 -endif -# -# The 64-bit ELF tools are pretty broken so at this time we generate 64-bit -# ELF files from 32-bit files by conversion. -# -ifdef CONFIG_BOOT_ELF64 -GCCFLAGS += -Wa,-32 $(call check_gas,-Wa$(comma)-mgp64,) -LINKFLAGS += -T arch/mips64/ld.script.elf32 -#AS += -64 -#LD += -m elf64bmip -#LINKFLAGS += -T arch/mips64/ld.script.elf64 -endif ifdef CONFIG_CPU_LITTLE_ENDIAN 32bit-bfd = elf32-tradlittlemips 64bit-bfd = elf64-tradlittlemips +32bit-emul = elf32ltsmip +64bit-emul = elf64ltsmip else 32bit-bfd = elf32-tradbigmips 64bit-bfd = elf64-tradbigmips +32bit-emul = elf32btsmip +64bit-emul = elf64btsmip +endif + +ifdef CONFIG_BUILD_ELF64 +GCCFLAGS += -Wa,-64 +LOADSCRIPT = arch/mips64/ld.script.elf64 +ld-emul = $(64bit-emul) +vmlinux-32 = vmlinux.32 +vmlinux-64 = vmlinux +else +GCCFLAGS += $(call check_gcc,-mno-explicit-relocs,) +GCCFLAGS += -Wa,-32 $(call check_gas,-Wa$(comma)-mgp64,) +LOADSCRIPT = arch/mips64/ld.script.elf32 +ld-emul = $(32bit-emul) +vmlinux-32 = vmlinux +vmlinux-64 = vmlinux.64 endif AFLAGS += $(GCCFLAGS) CFLAGS += $(GCCFLAGS) -LD += --oformat $(32bit-bfd) +LD += -m $(ld-emul) -LINKFLAGS += -Ttext $(LOADADDR) +LINKFLAGS += -T $(LOADSCRIPT) -Ttext $(LOADADDR) +OBJCOPYFLAGS += --remove-section=.reginfo HEAD := arch/mips64/kernel/head.o arch/mips64/kernel/init_task.o @@ -372,27 +389,51 @@ CORE_FILES := arch/mips64/kernel/kernel.o arch/mips64/mm/mm.o $(CORE_FILES) LIBS := arch/mips64/lib/lib.a $(LIBS) -MAKEBOOT = $(MAKE) -C arch/$(ARCH)/boot +MAKEBOOT = $(MAKE) -C arch/$(ARCH)/boot VMLINUX=$(TOPDIR)/$(vmlinux-32) -vmlinux: arch/mips64/ld.script.elf32 arch/mips64/ld.script.elf32: arch/mips64/ld.script.elf32.S $(CPP) -C -P -I$(HPATH) -imacros $(HPATH)/asm-mips64/sn/mapped_kernel.h -Umips arch/mips64/ld.script.elf32.S > arch/mips64/ld.script.elf32 -ifdef CONFIG_MAPPED_KERNEL -vmlinux.64: vmlinux - $(OBJCOPY) -O $(64bit-bfd) --remove-section=.reginfo --change-addresses=0xc000000080000000 $< $@ -else +vmlinux: $(LOADSCRIPT) + +# +# Some machines like the Indy need 32-bit ELF binaries for booting purposes. +# Other need ECOFF, so we build a 32-bit ELF binary for them which we then +# convert to ECOFF using elf2ecoff. +# +vmlinux.32: vmlinux + $(OBJCOPY) -O $(32bit-bfd) $(OBJCOPYFLAGS) $< $@ + +# +# The 64-bit ELF tools are pretty broken so at this time we generate 64-bit +# ELF files from 32-bit files by conversion. +# vmlinux.64: vmlinux - $(OBJCOPY) -O $(64bit-bfd) --remove-section=.reginfo --change-addresses=0xa800000080000000 $< $@ + $(OBJCOPY) -O $(64bit-bfd) $(OBJCOPYFLAGS) $< $@ + +ifdef CONFIG_BOOT_ELF32 +boot: $(vmlinux-32) endif -vmlinux.ecoff: vmlinux +ifdef CONFIG_BOOT_ELF64 +boot: $(vmlinux-64) +endif + +boot: mips-boot + +mips-boot: $(vmlinux-32) + @$(MAKEBOOT) boot + +vmlinux.ecoff: $(vmlinux-32) + @$(MAKEBOOT) $@ + +vmlinux.srec: $(vmlinux-32) @$(MAKEBOOT) $@ archclean: @$(MAKEBOOT) clean $(MAKE) -C arch/mips/tools clean - rm -f vmlinux.64 arch/$(ARCH)/ld.script.elf32 + rm -f vmlinux.32 vmlinux.64 arch/$(ARCH)/ld.script.elf32 archmrproper: @$(MAKEBOOT) mrproper diff -urN linux-2.4.28-bk3/arch/mips64/boot/Makefile linux-2.4.28-bk4/arch/mips64/boot/Makefile --- linux-2.4.28-bk3/arch/mips64/boot/Makefile 2003-08-25 04:44:40.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips64/boot/Makefile 2004-11-23 02:49:27.449394323 -0800 @@ -4,6 +4,7 @@ # for more details. # # Copyright (C) 1995, 1998, 1999 by Ralf Baechle +# Copyright (C) 2004 Maciej W. Rozycki # USE_STANDARD_AS_RULE := true @@ -17,14 +18,28 @@ E2EFLAGS = endif -all: vmlinux.ecoff addinitrd +# +# Drop some uninteresting sections in the kernel. +# This is only relevant for ELF kernels but doesn't hurt a.out +# +drop-sections = .reginfo .mdebug .comment .note .pdr .options .MIPS.options +strip-flags = $(addprefix --remove-section=,$(drop-sections)) + +VMLINUX = $(TOPDIR)/vmlinux -vmlinux.ecoff: $(CONFIGURE) elf2ecoff $(TOPDIR)/vmlinux - ./elf2ecoff $(TOPDIR)/vmlinux vmlinux.ecoff $(E2EFLAGS) +all: + +boot: vmlinux.ecoff vmlinux.srec addinitrd + +vmlinux.ecoff: $(CONFIGURE) elf2ecoff $(VMLINUX) + ./elf2ecoff $(VMLINUX) vmlinux.ecoff $(E2EFLAGS) elf2ecoff: $(TOPDIR)/arch/mips/boot/elf2ecoff.c $(HOSTCC) -I$(TOPDIR)/arch/mips/boot -I- -o $@ $^ +vmlinux.srec: $(CONFIGURE) $(VMLINUX) + $(OBJCOPY) -S -O srec $(strip-flags) $(VMLINUX) vmlinux.srec + addinitrd: $(TOPDIR)/arch/mips/boot/addinitrd.c $(HOSTCC) -I$(TOPDIR)/arch/mips/boot -I- -o $@ $^ @@ -32,10 +47,10 @@ dep: clean: - rm -f vmlinux.ecoff + rm -f vmlinux.ecoff vmlinux.srec mrproper: - rm -f vmlinux.ecoff addinitrd elf2ecoff + rm -f vmlinux.ecoff vmlinux.srec addinitrd elf2ecoff dummy: diff -urN linux-2.4.28-bk3/arch/mips64/defconfig linux-2.4.28-bk4/arch/mips64/defconfig --- linux-2.4.28-bk3/arch/mips64/defconfig 2004-11-17 03:54:21.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips64/defconfig 2004-11-23 02:49:27.450394363 -0800 @@ -8,12 +8,14 @@ # # Code maturity level options # -# CONFIG_EXPERIMENTAL is not set +CONFIG_EXPERIMENTAL=y # # Loadable module support # -# CONFIG_MODULES is not set +CONFIG_MODULES=y +CONFIG_MODVERSIONS=y +CONFIG_KMOD=y # # Machine selection @@ -24,10 +26,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -50,6 +54,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -81,8 +87,6 @@ CONFIG_BOOT_ELF64=y CONFIG_ARC64=y CONFIG_L1_CACHE_SHIFT=7 -CONFIG_NEW_TIME_C=y -CONFIG_PCI=y CONFIG_QL_ISP_A64=y # CONFIG_MIPS_AU1000 is not set @@ -107,6 +111,8 @@ # CONFIG_CPU_RM9000 is not set # CONFIG_CPU_SB1 is not set CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_16KB is not set +# CONFIG_PAGE_SIZE_64KB is not set CONFIG_SMP=y # CONFIG_64BIT_PHYS_ADDR is not set # CONFIG_CPU_ADVANCED is not set @@ -119,9 +125,13 @@ # General setup # # CONFIG_CPU_LITTLE_ENDIAN is not set +# CONFIG_BUILD_ELF64 is not set # CONFIG_BINFMT_IRIX is not set # CONFIG_MIPS_INSANE_LARGE is not set CONFIG_NET=y +CONFIG_PCI=y +# CONFIG_PCI_NEW is not set +CONFIG_PCI_AUTO=y CONFIG_PCI_NAMES=y # CONFIG_ISA is not set # CONFIG_TC is not set @@ -143,6 +153,7 @@ CONFIG_BINFMT_ELF32=y # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # # Memory Technology Devices (MTD) @@ -172,6 +183,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set # CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set @@ -196,8 +208,9 @@ CONFIG_PACKET=y CONFIG_PACKET_MMAP=y CONFIG_NETLINK_DEV=y -# CONFIG_NETFILTER is not set -# CONFIG_FILTER is not set +CONFIG_NETFILTER=y +# CONFIG_NETFILTER_DEBUG is not set +CONFIG_FILTER=y CONFIG_UNIX=y CONFIG_INET=y CONFIG_IP_MULTICAST=y @@ -206,35 +219,199 @@ # CONFIG_IP_PNP_DHCP is not set # CONFIG_IP_PNP_BOOTP is not set # CONFIG_IP_PNP_RARP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_IP_MROUTE is not set -# CONFIG_INET_ECN is not set +CONFIG_NET_IPIP=m +CONFIG_NET_IPGRE=m +CONFIG_NET_IPGRE_BROADCAST=y +CONFIG_IP_MROUTE=y +CONFIG_IP_PIMSM_V1=y +CONFIG_IP_PIMSM_V2=y +# CONFIG_ARPD is not set +CONFIG_INET_ECN=y # CONFIG_SYN_COOKIES is not set -# CONFIG_VLAN_8021Q is not set + +# +# IP: Netfilter Configuration +# +CONFIG_IP_NF_CONNTRACK=m +CONFIG_IP_NF_FTP=m +CONFIG_IP_NF_AMANDA=m +CONFIG_IP_NF_TFTP=m +CONFIG_IP_NF_IRC=m +# CONFIG_IP_NF_QUEUE is not set +CONFIG_IP_NF_IPTABLES=m +CONFIG_IP_NF_MATCH_LIMIT=m +CONFIG_IP_NF_MATCH_MAC=m +CONFIG_IP_NF_MATCH_PKTTYPE=m +CONFIG_IP_NF_MATCH_MARK=m +CONFIG_IP_NF_MATCH_MULTIPORT=m +CONFIG_IP_NF_MATCH_TOS=m +CONFIG_IP_NF_MATCH_RECENT=m +CONFIG_IP_NF_MATCH_ECN=m +CONFIG_IP_NF_MATCH_DSCP=m +CONFIG_IP_NF_MATCH_AH_ESP=m +CONFIG_IP_NF_MATCH_LENGTH=m +CONFIG_IP_NF_MATCH_TTL=m +CONFIG_IP_NF_MATCH_TCPMSS=m +CONFIG_IP_NF_MATCH_HELPER=m +CONFIG_IP_NF_MATCH_STATE=m +CONFIG_IP_NF_MATCH_CONNTRACK=m +# CONFIG_IP_NF_MATCH_UNCLEAN is not set +# CONFIG_IP_NF_MATCH_OWNER is not set +CONFIG_IP_NF_FILTER=m +CONFIG_IP_NF_TARGET_REJECT=m +# CONFIG_IP_NF_TARGET_MIRROR is not set +CONFIG_IP_NF_NAT=m +CONFIG_IP_NF_NAT_NEEDED=y +CONFIG_IP_NF_TARGET_MASQUERADE=m +CONFIG_IP_NF_TARGET_REDIRECT=m +CONFIG_IP_NF_NAT_AMANDA=m +CONFIG_IP_NF_NAT_LOCAL=y +# CONFIG_IP_NF_NAT_SNMP_BASIC is not set +CONFIG_IP_NF_NAT_IRC=m +CONFIG_IP_NF_NAT_FTP=m +CONFIG_IP_NF_NAT_TFTP=m +CONFIG_IP_NF_MANGLE=m +CONFIG_IP_NF_TARGET_TOS=m +CONFIG_IP_NF_TARGET_ECN=m +CONFIG_IP_NF_TARGET_DSCP=m +CONFIG_IP_NF_TARGET_MARK=m +CONFIG_IP_NF_TARGET_LOG=m +CONFIG_IP_NF_TARGET_ULOG=m +CONFIG_IP_NF_TARGET_TCPMSS=m +CONFIG_IP_NF_ARPTABLES=m +CONFIG_IP_NF_ARPFILTER=m +CONFIG_IP_NF_ARP_MANGLE=m +CONFIG_IP_NF_COMPAT_IPCHAINS=m +CONFIG_IP_NF_NAT_NEEDED=y +CONFIG_IP_NF_COMPAT_IPFWADM=m +CONFIG_IP_NF_NAT_NEEDED=y + +# +# IP: Virtual Server Configuration +# +CONFIG_IP_VS=m +# CONFIG_IP_VS_DEBUG is not set +CONFIG_IP_VS_TAB_BITS=12 + +# +# IPVS scheduler +# +CONFIG_IP_VS_RR=m +CONFIG_IP_VS_WRR=m +CONFIG_IP_VS_LC=m +CONFIG_IP_VS_WLC=m +CONFIG_IP_VS_LBLC=m +CONFIG_IP_VS_LBLCR=m +CONFIG_IP_VS_DH=m +CONFIG_IP_VS_SH=m +CONFIG_IP_VS_SED=m +CONFIG_IP_VS_NQ=m + +# +# IPVS application helper +# +CONFIG_IP_VS_FTP=m +CONFIG_IPV6=m + +# +# IPv6: Netfilter Configuration +# +CONFIG_IP6_NF_QUEUE=m +CONFIG_IP6_NF_IPTABLES=m +CONFIG_IP6_NF_MATCH_LIMIT=m +CONFIG_IP6_NF_MATCH_MAC=m +CONFIG_IP6_NF_MATCH_RT=m +CONFIG_IP6_NF_MATCH_OPTS=m +CONFIG_IP6_NF_MATCH_FRAG=m +CONFIG_IP6_NF_MATCH_HL=m +CONFIG_IP6_NF_MATCH_MULTIPORT=m +CONFIG_IP6_NF_MATCH_OWNER=m +CONFIG_IP6_NF_MATCH_MARK=m +CONFIG_IP6_NF_MATCH_IPV6HEADER=m +CONFIG_IP6_NF_MATCH_AHESP=m +CONFIG_IP6_NF_MATCH_LENGTH=m +CONFIG_IP6_NF_MATCH_EUI64=m +CONFIG_IP6_NF_FILTER=m +CONFIG_IP6_NF_TARGET_LOG=m +CONFIG_IP6_NF_MANGLE=m +CONFIG_IP6_NF_TARGET_MARK=m +# CONFIG_KHTTPD is not set + +# +# SCTP Configuration (EXPERIMENTAL) +# +CONFIG_IP_SCTP=m +# CONFIG_SCTP_DBG_MSG is not set +# CONFIG_SCTP_DBG_OBJCNT is not set +# CONFIG_SCTP_HMAC_NONE is not set +# CONFIG_SCTP_HMAC_SHA1 is not set +CONFIG_SCTP_HMAC_MD5=y +# CONFIG_ATM is not set +CONFIG_VLAN_8021Q=m # # # -# CONFIG_IPX is not set -# CONFIG_ATALK is not set +CONFIG_IPX=m +# CONFIG_IPX_INTERN is not set +CONFIG_ATALK=m # # Appletalk devices # -# CONFIG_DEV_APPLETALK is not set -# CONFIG_DECNET is not set -# CONFIG_BRIDGE is not set +CONFIG_DEV_APPLETALK=y +# CONFIG_COPS_DAYNA is not set +# CONFIG_COPS_TANGENT is not set +CONFIG_IPDDP=m +CONFIG_IPDDP_ENCAP=y +CONFIG_IPDDP_DECAP=y +CONFIG_DECNET=m +CONFIG_DECNET_SIOCGIFCONF=y +CONFIG_DECNET_ROUTER=y +CONFIG_DECNET_ROUTE_FWMARK=y +CONFIG_BRIDGE=m +CONFIG_X25=m +CONFIG_LAPB=m +# CONFIG_LLC is not set +CONFIG_NET_DIVERT=y +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_FASTROUTE is not set +# CONFIG_NET_HW_FLOWCONTROL is not set # # QoS and/or fair queueing # -# CONFIG_NET_SCHED is not set +CONFIG_NET_SCHED=y +CONFIG_NET_SCH_CBQ=m +CONFIG_NET_SCH_HTB=m +CONFIG_NET_SCH_CSZ=m +CONFIG_NET_SCH_HFSC=m +CONFIG_NET_SCH_PRIO=m +CONFIG_NET_SCH_RED=m +CONFIG_NET_SCH_SFQ=m +CONFIG_NET_SCH_TEQL=m +CONFIG_NET_SCH_TBF=m +CONFIG_NET_SCH_GRED=m +# CONFIG_NET_SCH_NETEM is not set +CONFIG_NET_SCH_DSMARK=m +CONFIG_NET_SCH_INGRESS=m +CONFIG_NET_QOS=y +CONFIG_NET_ESTIMATOR=y +CONFIG_NET_CLS=y +CONFIG_NET_CLS_TCINDEX=m +CONFIG_NET_CLS_ROUTE4=m +CONFIG_NET_CLS_ROUTE=y +CONFIG_NET_CLS_FW=m +CONFIG_NET_CLS_U32=m +CONFIG_NET_CLS_RSVP=m +CONFIG_NET_CLS_RSVP6=m +# CONFIG_NET_CLS_POLICE is not set # # Network testing # -# CONFIG_NET_PKTGEN is not set +CONFIG_NET_PKTGEN=m # # Telephony Support @@ -259,10 +436,12 @@ # CONFIG_BLK_DEV_SD=y CONFIG_SD_EXTRA_DEVS=40 -CONFIG_CHR_DEV_ST=y -# CONFIG_CHR_DEV_OSST is not set -# CONFIG_BLK_DEV_SR is not set -# CONFIG_CHR_DEV_SG is not set +CONFIG_CHR_DEV_ST=m +CONFIG_CHR_DEV_OSST=m +CONFIG_BLK_DEV_SR=m +CONFIG_BLK_DEV_SR_VENDOR=y +CONFIG_SR_EXTRA_DEVS=4 +CONFIG_CHR_DEV_SG=m # # Some SCSI devices (e.g. CD jukebox) support multiple LUNs @@ -281,6 +460,7 @@ # CONFIG_SCSI_AHA152X is not set # CONFIG_SCSI_AHA1542 is not set # CONFIG_SCSI_AHA1740 is not set +# CONFIG_SCSI_AACRAID is not set # CONFIG_SCSI_AIC7XXX is not set # CONFIG_SCSI_AIC79XX is not set # CONFIG_SCSI_AIC7XXX_OLD is not set @@ -290,6 +470,17 @@ # CONFIG_SCSI_AM53C974 is not set # CONFIG_SCSI_MEGARAID is not set # CONFIG_SCSI_MEGARAID2 is not set +# CONFIG_SCSI_SATA is not set +# CONFIG_SCSI_SATA_SVW is not set +# CONFIG_SCSI_ATA_PIIX is not set +# CONFIG_SCSI_SATA_NV is not set +# CONFIG_SCSI_SATA_PROMISE is not set +# CONFIG_SCSI_SATA_SX4 is not set +# CONFIG_SCSI_SATA_SIL is not set +# CONFIG_SCSI_SATA_SIS is not set +# CONFIG_SCSI_SATA_ULI is not set +# CONFIG_SCSI_SATA_VIA is not set +# CONFIG_SCSI_SATA_VITESSE is not set # CONFIG_SCSI_BUSLOGIC is not set # CONFIG_SCSI_CPQFCTS is not set # CONFIG_SCSI_DMX3191D is not set @@ -321,6 +512,7 @@ # CONFIG_SCSI_T128 is not set # CONFIG_SCSI_U14_34F is not set # CONFIG_SCSI_NSP32 is not set +# CONFIG_SCSI_DEBUG is not set # # Fusion MPT device support @@ -332,6 +524,11 @@ # CONFIG_FUSION_LAN is not set # +# IEEE 1394 (FireWire) support (EXPERIMENTAL) +# +# CONFIG_IEEE1394 is not set + +# # Network device support # CONFIG_NETDEVICES=y @@ -344,6 +541,7 @@ # CONFIG_BONDING is not set # CONFIG_EQUALIZER is not set # CONFIG_TUN is not set +# CONFIG_ETHERTAP is not set # # Ethernet (10 or 100Mbit) @@ -378,6 +576,7 @@ # CONFIG_SK98LIN is not set # CONFIG_TIGON3 is not set # CONFIG_FDDI is not set +# CONFIG_HIPPI is not set # CONFIG_PLIP is not set # CONFIG_PPP is not set # CONFIG_SLIP is not set @@ -392,6 +591,8 @@ # # CONFIG_TR is not set # CONFIG_NET_FC is not set +# CONFIG_RCPCI is not set +# CONFIG_SHAPER is not set # # Wan interfaces @@ -401,7 +602,34 @@ # # Amateur Radio support # -# CONFIG_HAMRADIO is not set +CONFIG_HAMRADIO=y + +# +# Packet Radio protocols +# +CONFIG_AX25=m +CONFIG_AX25_DAMA_SLAVE=y +CONFIG_NETROM=m +CONFIG_ROSE=m + +# +# AX.25 network device drivers +# + +# +# AX.25 network device drivers +# +CONFIG_MKISS=m +CONFIG_6PACK=m +CONFIG_BPQETHER=m +# CONFIG_SCC_DELAY is not set +# CONFIG_SCC_TRXECHO is not set +# CONFIG_BAYCOM_SER_FDX is not set +# CONFIG_BAYCOM_SER_HDX is not set +# CONFIG_BAYCOM_PAR is not set +# CONFIG_BAYCOM_EPP is not set +# CONFIG_SOUNDMODEM is not set +# CONFIG_YAM is not set # # IrDA (infrared) support @@ -431,6 +659,7 @@ CONFIG_SERIAL_CONSOLE=y # CONFIG_SERIAL_EXTENDED is not set # CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 @@ -473,8 +702,7 @@ # CONFIG_AMD_PM768 is not set # CONFIG_NVRAM is not set # CONFIG_RTC is not set -# CONFIG_MIPS_RTC is not set -CONFIG_SGI_IP27_RTC=y +CONFIG_SGI_IP27_RTC=m # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set @@ -493,11 +721,11 @@ # # File systems # -# CONFIG_QUOTA is not set -# CONFIG_QFMT_V2 is not set +CONFIG_QUOTA=y +CONFIG_QFMT_V2=y CONFIG_AUTOFS_FS=y -# CONFIG_AUTOFS4_FS is not set -# CONFIG_REISERFS_FS is not set +CONFIG_AUTOFS4_FS=m +CONFIG_REISERFS_FS=m # CONFIG_REISERFS_CHECK is not set # CONFIG_REISERFS_PROC_INFO is not set # CONFIG_ADFS_FS is not set @@ -511,43 +739,43 @@ CONFIG_EXT3_FS=y CONFIG_JBD=y # CONFIG_JBD_DEBUG is not set -# CONFIG_FAT_FS is not set -# CONFIG_MSDOS_FS is not set -# CONFIG_UMSDOS_FS is not set -# CONFIG_VFAT_FS is not set +CONFIG_FAT_FS=m +CONFIG_MSDOS_FS=m +CONFIG_UMSDOS_FS=m +CONFIG_VFAT_FS=m # CONFIG_EFS_FS is not set # CONFIG_JFFS_FS is not set # CONFIG_JFFS2_FS is not set -# CONFIG_CRAMFS is not set -# CONFIG_TMPFS is not set +CONFIG_CRAMFS=m +CONFIG_TMPFS=y CONFIG_RAMFS=y -# CONFIG_ISO9660_FS is not set -# CONFIG_JOLIET is not set -# CONFIG_ZISOFS is not set -# CONFIG_JFS_FS is not set +CONFIG_ISO9660_FS=m +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +CONFIG_JFS_FS=m # CONFIG_JFS_DEBUG is not set # CONFIG_JFS_STATISTICS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_NTFS_FS is not set +CONFIG_MINIX_FS=m +CONFIG_VXFS_FS=m +CONFIG_NTFS_FS=m # CONFIG_NTFS_RW is not set -# CONFIG_HPFS_FS is not set +CONFIG_HPFS_FS=m CONFIG_PROC_FS=y # CONFIG_DEVFS_FS is not set # CONFIG_DEVFS_MOUNT is not set # CONFIG_DEVFS_DEBUG is not set CONFIG_DEVPTS_FS=y -# CONFIG_QNX4FS_FS is not set +CONFIG_QNX4FS_FS=m # CONFIG_QNX4FS_RW is not set -# CONFIG_ROMFS_FS is not set -CONFIG_EXT2_FS=y -# CONFIG_SYSV_FS is not set -# CONFIG_UDF_FS is not set +CONFIG_ROMFS_FS=m +CONFIG_EXT2_FS=m +CONFIG_SYSV_FS=m +CONFIG_UDF_FS=m # CONFIG_UDF_RW is not set -# CONFIG_UFS_FS is not set +CONFIG_UFS_FS=m # CONFIG_UFS_FS_WRITE is not set -# CONFIG_XFS_FS is not set -# CONFIG_XFS_QUOTA is not set +CONFIG_XFS_FS=m +CONFIG_XFS_QUOTA=y # CONFIG_XFS_RT is not set # CONFIG_XFS_TRACE is not set # CONFIG_XFS_DEBUG is not set @@ -561,23 +789,25 @@ CONFIG_NFS_V3=y # CONFIG_NFS_DIRECTIO is not set CONFIG_ROOT_NFS=y -# CONFIG_NFSD is not set -# CONFIG_NFSD_V3 is not set +CONFIG_NFSD=m +CONFIG_NFSD_V3=y CONFIG_NFSD_TCP=y CONFIG_SUNRPC=y CONFIG_LOCKD=y CONFIG_LOCKD_V4=y -# CONFIG_SMB_FS is not set -# CONFIG_NCP_FS is not set -# CONFIG_NCPFS_PACKET_SIGNING is not set -# CONFIG_NCPFS_IOCTL_LOCKING is not set -# CONFIG_NCPFS_STRONG is not set -# CONFIG_NCPFS_NFS_NS is not set -# CONFIG_NCPFS_OS2_NS is not set -# CONFIG_NCPFS_SMALLDOS is not set -# CONFIG_NCPFS_NLS is not set -# CONFIG_NCPFS_EXTRAS is not set -# CONFIG_ZISOFS_FS is not set +CONFIG_SMB_FS=m +# CONFIG_SMB_NLS_DEFAULT is not set +CONFIG_SMB_UNIX=y +CONFIG_NCP_FS=m +CONFIG_NCPFS_PACKET_SIGNING=y +CONFIG_NCPFS_IOCTL_LOCKING=y +CONFIG_NCPFS_STRONG=y +CONFIG_NCPFS_NFS_NS=y +CONFIG_NCPFS_OS2_NS=y +CONFIG_NCPFS_SMALLDOS=y +CONFIG_NCPFS_NLS=y +CONFIG_NCPFS_EXTRAS=y +CONFIG_ZISOFS_FS=m # # Partition Types @@ -598,8 +828,50 @@ # CONFIG_ULTRIX_PARTITION is not set # CONFIG_SUN_PARTITION is not set # CONFIG_EFI_PARTITION is not set -# CONFIG_SMB_NLS is not set -# CONFIG_NLS is not set +CONFIG_SMB_NLS=y +CONFIG_NLS=y + +# +# Native Language Support +# +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=m +CONFIG_NLS_CODEPAGE_737=m +CONFIG_NLS_CODEPAGE_775=m +CONFIG_NLS_CODEPAGE_850=m +CONFIG_NLS_CODEPAGE_852=m +CONFIG_NLS_CODEPAGE_855=m +CONFIG_NLS_CODEPAGE_857=m +CONFIG_NLS_CODEPAGE_860=m +CONFIG_NLS_CODEPAGE_861=m +CONFIG_NLS_CODEPAGE_862=m +CONFIG_NLS_CODEPAGE_863=m +CONFIG_NLS_CODEPAGE_864=m +CONFIG_NLS_CODEPAGE_865=m +CONFIG_NLS_CODEPAGE_866=m +CONFIG_NLS_CODEPAGE_869=m +CONFIG_NLS_CODEPAGE_936=m +CONFIG_NLS_CODEPAGE_950=m +CONFIG_NLS_CODEPAGE_932=m +CONFIG_NLS_CODEPAGE_949=m +CONFIG_NLS_CODEPAGE_874=m +CONFIG_NLS_ISO8859_8=m +CONFIG_NLS_CODEPAGE_1250=m +CONFIG_NLS_CODEPAGE_1251=m +CONFIG_NLS_ISO8859_1=m +CONFIG_NLS_ISO8859_2=m +CONFIG_NLS_ISO8859_3=m +CONFIG_NLS_ISO8859_4=m +CONFIG_NLS_ISO8859_5=m +CONFIG_NLS_ISO8859_6=m +CONFIG_NLS_ISO8859_7=m +CONFIG_NLS_ISO8859_9=m +CONFIG_NLS_ISO8859_13=m +CONFIG_NLS_ISO8859_14=m +CONFIG_NLS_ISO8859_15=m +CONFIG_NLS_KOI8_R=m +CONFIG_NLS_KOI8_U=m +CONFIG_NLS_UTF8=m # # Multimedia devices @@ -647,5 +919,5 @@ # Library routines # # CONFIG_CRC32 is not set -# CONFIG_ZLIB_INFLATE is not set +CONFIG_ZLIB_INFLATE=m # CONFIG_ZLIB_DEFLATE is not set diff -urN linux-2.4.28-bk3/arch/mips64/defconfig-atlas linux-2.4.28-bk4/arch/mips64/defconfig-atlas --- linux-2.4.28-bk3/arch/mips64/defconfig-atlas 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips64/defconfig-atlas 2004-11-23 02:49:27.451394404 -0800 @@ -24,10 +24,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -50,6 +52,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -76,9 +80,7 @@ CONFIG_MIPS_BONITO64=y CONFIG_MIPS_GT64120=y CONFIG_MIPS_MSC=y -CONFIG_NEW_TIME_C=y CONFIG_NONCOHERENT_IO=y -CONFIG_PCI=y CONFIG_SWAP_IO_SPACE_W=y CONFIG_SWAP_IO_SPACE_L=y # CONFIG_MIPS_AU1000 is not set @@ -117,8 +119,12 @@ # General setup # # CONFIG_CPU_LITTLE_ENDIAN is not set +# CONFIG_BUILD_ELF64 is not set # CONFIG_BINFMT_IRIX is not set CONFIG_NET=y +CONFIG_PCI=y +# CONFIG_PCI_NEW is not set +# CONFIG_PCI_AUTO is not set CONFIG_PCI_NAMES=y # CONFIG_ISA is not set # CONFIG_TC is not set @@ -140,6 +146,7 @@ CONFIG_BINFMT_ELF32=y # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # # Memory Technology Devices (MTD) @@ -169,6 +176,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set # CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set CONFIG_BLK_DEV_RAM=y @@ -215,7 +223,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set @@ -306,6 +313,17 @@ # CONFIG_SCSI_AM53C974 is not set # CONFIG_SCSI_MEGARAID is not set # CONFIG_SCSI_MEGARAID2 is not set +# CONFIG_SCSI_SATA is not set +# CONFIG_SCSI_SATA_SVW is not set +# CONFIG_SCSI_ATA_PIIX is not set +# CONFIG_SCSI_SATA_NV is not set +# CONFIG_SCSI_SATA_PROMISE is not set +# CONFIG_SCSI_SATA_SX4 is not set +# CONFIG_SCSI_SATA_SIL is not set +# CONFIG_SCSI_SATA_SIS is not set +# CONFIG_SCSI_SATA_ULI is not set +# CONFIG_SCSI_SATA_VIA is not set +# CONFIG_SCSI_SATA_VITESSE is not set # CONFIG_SCSI_BUSLOGIC is not set # CONFIG_SCSI_CPQFCTS is not set # CONFIG_SCSI_DMX3191D is not set @@ -456,6 +474,7 @@ CONFIG_SERIAL_CONSOLE=y # CONFIG_SERIAL_EXTENDED is not set # CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 @@ -498,7 +517,6 @@ # CONFIG_AMD_PM768 is not set # CONFIG_NVRAM is not set CONFIG_RTC=y -# CONFIG_MIPS_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set diff -urN linux-2.4.28-bk3/arch/mips64/defconfig-decstation linux-2.4.28-bk4/arch/mips64/defconfig-decstation --- linux-2.4.28-bk3/arch/mips64/defconfig-decstation 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips64/defconfig-decstation 2004-11-23 02:49:27.452394445 -0800 @@ -24,10 +24,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -50,6 +52,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -71,10 +75,10 @@ # CONFIG_HIGHMEM is not set CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set +CONFIG_EARLY_PRINTK=y CONFIG_BOOT_ELF32=y CONFIG_IRQ_CPU=y CONFIG_L1_CACHE_SHIFT=4 -CONFIG_NEW_TIME_C=y CONFIG_NONCOHERENT_IO=y # CONFIG_MIPS_AU1000 is not set @@ -112,6 +116,7 @@ # General setup # CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_BUILD_ELF64=y CONFIG_NET=y # CONFIG_PCI is not set # CONFIG_ISA is not set @@ -134,6 +139,7 @@ CONFIG_BINFMT_ELF32=y # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # # Memory Technology Devices (MTD) @@ -163,6 +169,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set # CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set @@ -208,7 +215,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set @@ -300,6 +306,17 @@ # CONFIG_SCSI_AM53C974 is not set # CONFIG_SCSI_MEGARAID is not set # CONFIG_SCSI_MEGARAID2 is not set +# CONFIG_SCSI_SATA is not set +# CONFIG_SCSI_SATA_SVW is not set +# CONFIG_SCSI_ATA_PIIX is not set +# CONFIG_SCSI_SATA_NV is not set +# CONFIG_SCSI_SATA_PROMISE is not set +# CONFIG_SCSI_SATA_SX4 is not set +# CONFIG_SCSI_SATA_SIL is not set +# CONFIG_SCSI_SATA_SIS is not set +# CONFIG_SCSI_SATA_ULI is not set +# CONFIG_SCSI_SATA_VIA is not set +# CONFIG_SCSI_SATA_VITESSE is not set # CONFIG_SCSI_BUSLOGIC is not set # CONFIG_SCSI_DMX3191D is not set # CONFIG_SCSI_DTC3280 is not set @@ -460,6 +477,7 @@ CONFIG_SERIAL_DEC_CONSOLE=y # CONFIG_DZ is not set CONFIG_ZS=y +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 @@ -502,7 +520,6 @@ # CONFIG_AMD_PM768 is not set # CONFIG_NVRAM is not set # CONFIG_RTC is not set -# CONFIG_MIPS_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set diff -urN linux-2.4.28-bk3/arch/mips64/defconfig-ip22 linux-2.4.28-bk4/arch/mips64/defconfig-ip22 --- linux-2.4.28-bk3/arch/mips64/defconfig-ip22 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips64/defconfig-ip22 2004-11-23 02:49:27.453394486 -0800 @@ -26,10 +26,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -52,6 +54,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -81,7 +85,6 @@ CONFIG_SWAP_IO_SPACE_L=y CONFIG_IRQ_CPU=y CONFIG_L1_CACHE_SHIFT=5 -CONFIG_NEW_TIME_C=y CONFIG_NONCOHERENT_IO=y CONFIG_PC_KEYB=y # CONFIG_MIPS_AU1000 is not set @@ -120,11 +123,12 @@ # General setup # # CONFIG_CPU_LITTLE_ENDIAN is not set +# CONFIG_BUILD_ELF64 is not set # CONFIG_BINFMT_IRIX is not set CONFIG_ARC_CONSOLE=y CONFIG_NET=y -# CONFIG_EISA is not set # CONFIG_PCI is not set +# CONFIG_EISA is not set # CONFIG_ISA is not set # CONFIG_TC is not set # CONFIG_MCA is not set @@ -145,6 +149,7 @@ CONFIG_BINFMT_ELF32=y # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # # Memory Technology Devices (MTD) @@ -174,6 +179,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set # CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set @@ -220,7 +226,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set @@ -313,6 +318,17 @@ # CONFIG_SCSI_AM53C974 is not set # CONFIG_SCSI_MEGARAID is not set # CONFIG_SCSI_MEGARAID2 is not set +# CONFIG_SCSI_SATA is not set +# CONFIG_SCSI_SATA_SVW is not set +# CONFIG_SCSI_ATA_PIIX is not set +# CONFIG_SCSI_SATA_NV is not set +# CONFIG_SCSI_SATA_PROMISE is not set +# CONFIG_SCSI_SATA_SX4 is not set +# CONFIG_SCSI_SATA_SIL is not set +# CONFIG_SCSI_SATA_SIS is not set +# CONFIG_SCSI_SATA_ULI is not set +# CONFIG_SCSI_SATA_VIA is not set +# CONFIG_SCSI_SATA_VITESSE is not set # CONFIG_SCSI_BUSLOGIC is not set # CONFIG_SCSI_DMX3191D is not set # CONFIG_SCSI_DTC3280 is not set @@ -472,6 +488,7 @@ # CONFIG_SERIAL_TXX9_CONSOLE is not set # CONFIG_TXX927_SERIAL is not set CONFIG_IP22_SERIAL=y +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 @@ -534,13 +551,11 @@ # CONFIG_WDTPCI is not set # CONFIG_MACHZ_WDT is not set # CONFIG_INDYDOG is not set -# CONFIG_AMD7XX_TCO is not set # CONFIG_SCx200 is not set # CONFIG_SCx200_GPIO is not set # CONFIG_AMD_PM768 is not set # CONFIG_NVRAM is not set # CONFIG_RTC is not set -# CONFIG_MIPS_RTC is not set CONFIG_DS1286=y # CONFIG_DTLK is not set # CONFIG_R3964 is not set @@ -630,7 +645,7 @@ CONFIG_ROOT_NFS=y CONFIG_NFSD=y # CONFIG_NFSD_V3 is not set -# CONFIG_NFSD_TCP is not set +CONFIG_NFSD_TCP=y CONFIG_SUNRPC=y CONFIG_LOCKD=y # CONFIG_SMB_FS is not set diff -urN linux-2.4.28-bk3/arch/mips64/defconfig-ip27 linux-2.4.28-bk4/arch/mips64/defconfig-ip27 --- linux-2.4.28-bk3/arch/mips64/defconfig-ip27 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips64/defconfig-ip27 2004-11-23 02:49:27.455394567 -0800 @@ -8,12 +8,14 @@ # # Code maturity level options # -# CONFIG_EXPERIMENTAL is not set +CONFIG_EXPERIMENTAL=y # # Loadable module support # -# CONFIG_MODULES is not set +CONFIG_MODULES=y +CONFIG_MODVERSIONS=y +CONFIG_KMOD=y # # Machine selection @@ -24,10 +26,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -50,6 +54,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -81,8 +87,6 @@ CONFIG_BOOT_ELF64=y CONFIG_ARC64=y CONFIG_L1_CACHE_SHIFT=7 -CONFIG_NEW_TIME_C=y -CONFIG_PCI=y CONFIG_QL_ISP_A64=y # CONFIG_MIPS_AU1000 is not set @@ -107,6 +111,8 @@ # CONFIG_CPU_RM9000 is not set # CONFIG_CPU_SB1 is not set CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_16KB is not set +# CONFIG_PAGE_SIZE_64KB is not set CONFIG_SMP=y # CONFIG_64BIT_PHYS_ADDR is not set # CONFIG_CPU_ADVANCED is not set @@ -119,9 +125,13 @@ # General setup # # CONFIG_CPU_LITTLE_ENDIAN is not set +# CONFIG_BUILD_ELF64 is not set # CONFIG_BINFMT_IRIX is not set # CONFIG_MIPS_INSANE_LARGE is not set CONFIG_NET=y +CONFIG_PCI=y +# CONFIG_PCI_NEW is not set +CONFIG_PCI_AUTO=y CONFIG_PCI_NAMES=y # CONFIG_ISA is not set # CONFIG_TC is not set @@ -143,6 +153,7 @@ CONFIG_BINFMT_ELF32=y # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # # Memory Technology Devices (MTD) @@ -172,6 +183,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set # CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set @@ -196,8 +208,9 @@ CONFIG_PACKET=y CONFIG_PACKET_MMAP=y CONFIG_NETLINK_DEV=y -# CONFIG_NETFILTER is not set -# CONFIG_FILTER is not set +CONFIG_NETFILTER=y +# CONFIG_NETFILTER_DEBUG is not set +CONFIG_FILTER=y CONFIG_UNIX=y CONFIG_INET=y CONFIG_IP_MULTICAST=y @@ -206,35 +219,199 @@ # CONFIG_IP_PNP_DHCP is not set # CONFIG_IP_PNP_BOOTP is not set # CONFIG_IP_PNP_RARP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_IP_MROUTE is not set -# CONFIG_INET_ECN is not set +CONFIG_NET_IPIP=m +CONFIG_NET_IPGRE=m +CONFIG_NET_IPGRE_BROADCAST=y +CONFIG_IP_MROUTE=y +CONFIG_IP_PIMSM_V1=y +CONFIG_IP_PIMSM_V2=y +# CONFIG_ARPD is not set +CONFIG_INET_ECN=y # CONFIG_SYN_COOKIES is not set -# CONFIG_VLAN_8021Q is not set + +# +# IP: Netfilter Configuration +# +CONFIG_IP_NF_CONNTRACK=m +CONFIG_IP_NF_FTP=m +CONFIG_IP_NF_AMANDA=m +CONFIG_IP_NF_TFTP=m +CONFIG_IP_NF_IRC=m +# CONFIG_IP_NF_QUEUE is not set +CONFIG_IP_NF_IPTABLES=m +CONFIG_IP_NF_MATCH_LIMIT=m +CONFIG_IP_NF_MATCH_MAC=m +CONFIG_IP_NF_MATCH_PKTTYPE=m +CONFIG_IP_NF_MATCH_MARK=m +CONFIG_IP_NF_MATCH_MULTIPORT=m +CONFIG_IP_NF_MATCH_TOS=m +CONFIG_IP_NF_MATCH_RECENT=m +CONFIG_IP_NF_MATCH_ECN=m +CONFIG_IP_NF_MATCH_DSCP=m +CONFIG_IP_NF_MATCH_AH_ESP=m +CONFIG_IP_NF_MATCH_LENGTH=m +CONFIG_IP_NF_MATCH_TTL=m +CONFIG_IP_NF_MATCH_TCPMSS=m +CONFIG_IP_NF_MATCH_HELPER=m +CONFIG_IP_NF_MATCH_STATE=m +CONFIG_IP_NF_MATCH_CONNTRACK=m +# CONFIG_IP_NF_MATCH_UNCLEAN is not set +# CONFIG_IP_NF_MATCH_OWNER is not set +CONFIG_IP_NF_FILTER=m +CONFIG_IP_NF_TARGET_REJECT=m +# CONFIG_IP_NF_TARGET_MIRROR is not set +CONFIG_IP_NF_NAT=m +CONFIG_IP_NF_NAT_NEEDED=y +CONFIG_IP_NF_TARGET_MASQUERADE=m +CONFIG_IP_NF_TARGET_REDIRECT=m +CONFIG_IP_NF_NAT_AMANDA=m +CONFIG_IP_NF_NAT_LOCAL=y +# CONFIG_IP_NF_NAT_SNMP_BASIC is not set +CONFIG_IP_NF_NAT_IRC=m +CONFIG_IP_NF_NAT_FTP=m +CONFIG_IP_NF_NAT_TFTP=m +CONFIG_IP_NF_MANGLE=m +CONFIG_IP_NF_TARGET_TOS=m +CONFIG_IP_NF_TARGET_ECN=m +CONFIG_IP_NF_TARGET_DSCP=m +CONFIG_IP_NF_TARGET_MARK=m +CONFIG_IP_NF_TARGET_LOG=m +CONFIG_IP_NF_TARGET_ULOG=m +CONFIG_IP_NF_TARGET_TCPMSS=m +CONFIG_IP_NF_ARPTABLES=m +CONFIG_IP_NF_ARPFILTER=m +CONFIG_IP_NF_ARP_MANGLE=m +CONFIG_IP_NF_COMPAT_IPCHAINS=m +CONFIG_IP_NF_NAT_NEEDED=y +CONFIG_IP_NF_COMPAT_IPFWADM=m +CONFIG_IP_NF_NAT_NEEDED=y + +# +# IP: Virtual Server Configuration +# +CONFIG_IP_VS=m +# CONFIG_IP_VS_DEBUG is not set +CONFIG_IP_VS_TAB_BITS=12 + +# +# IPVS scheduler +# +CONFIG_IP_VS_RR=m +CONFIG_IP_VS_WRR=m +CONFIG_IP_VS_LC=m +CONFIG_IP_VS_WLC=m +CONFIG_IP_VS_LBLC=m +CONFIG_IP_VS_LBLCR=m +CONFIG_IP_VS_DH=m +CONFIG_IP_VS_SH=m +CONFIG_IP_VS_SED=m +CONFIG_IP_VS_NQ=m + +# +# IPVS application helper +# +CONFIG_IP_VS_FTP=m +CONFIG_IPV6=m + +# +# IPv6: Netfilter Configuration +# +CONFIG_IP6_NF_QUEUE=m +CONFIG_IP6_NF_IPTABLES=m +CONFIG_IP6_NF_MATCH_LIMIT=m +CONFIG_IP6_NF_MATCH_MAC=m +CONFIG_IP6_NF_MATCH_RT=m +CONFIG_IP6_NF_MATCH_OPTS=m +CONFIG_IP6_NF_MATCH_FRAG=m +CONFIG_IP6_NF_MATCH_HL=m +CONFIG_IP6_NF_MATCH_MULTIPORT=m +CONFIG_IP6_NF_MATCH_OWNER=m +CONFIG_IP6_NF_MATCH_MARK=m +CONFIG_IP6_NF_MATCH_IPV6HEADER=m +CONFIG_IP6_NF_MATCH_AHESP=m +CONFIG_IP6_NF_MATCH_LENGTH=m +CONFIG_IP6_NF_MATCH_EUI64=m +CONFIG_IP6_NF_FILTER=m +CONFIG_IP6_NF_TARGET_LOG=m +CONFIG_IP6_NF_MANGLE=m +CONFIG_IP6_NF_TARGET_MARK=m +# CONFIG_KHTTPD is not set + +# +# SCTP Configuration (EXPERIMENTAL) +# +CONFIG_IP_SCTP=m +# CONFIG_SCTP_DBG_MSG is not set +# CONFIG_SCTP_DBG_OBJCNT is not set +# CONFIG_SCTP_HMAC_NONE is not set +# CONFIG_SCTP_HMAC_SHA1 is not set +CONFIG_SCTP_HMAC_MD5=y +# CONFIG_ATM is not set +CONFIG_VLAN_8021Q=m # # # -# CONFIG_IPX is not set -# CONFIG_ATALK is not set +CONFIG_IPX=m +# CONFIG_IPX_INTERN is not set +CONFIG_ATALK=m # # Appletalk devices # -# CONFIG_DEV_APPLETALK is not set -# CONFIG_DECNET is not set -# CONFIG_BRIDGE is not set +CONFIG_DEV_APPLETALK=y +# CONFIG_COPS_DAYNA is not set +# CONFIG_COPS_TANGENT is not set +CONFIG_IPDDP=m +CONFIG_IPDDP_ENCAP=y +CONFIG_IPDDP_DECAP=y +CONFIG_DECNET=m +CONFIG_DECNET_SIOCGIFCONF=y +CONFIG_DECNET_ROUTER=y +CONFIG_DECNET_ROUTE_FWMARK=y +CONFIG_BRIDGE=m +CONFIG_X25=m +CONFIG_LAPB=m +# CONFIG_LLC is not set +CONFIG_NET_DIVERT=y +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_FASTROUTE is not set +# CONFIG_NET_HW_FLOWCONTROL is not set # # QoS and/or fair queueing # -# CONFIG_NET_SCHED is not set +CONFIG_NET_SCHED=y +CONFIG_NET_SCH_CBQ=m +CONFIG_NET_SCH_HTB=m +CONFIG_NET_SCH_CSZ=m +CONFIG_NET_SCH_HFSC=m +CONFIG_NET_SCH_PRIO=m +CONFIG_NET_SCH_RED=m +CONFIG_NET_SCH_SFQ=m +CONFIG_NET_SCH_TEQL=m +CONFIG_NET_SCH_TBF=m +CONFIG_NET_SCH_GRED=m +# CONFIG_NET_SCH_NETEM is not set +CONFIG_NET_SCH_DSMARK=m +CONFIG_NET_SCH_INGRESS=m +CONFIG_NET_QOS=y +CONFIG_NET_ESTIMATOR=y +CONFIG_NET_CLS=y +CONFIG_NET_CLS_TCINDEX=m +CONFIG_NET_CLS_ROUTE4=m +CONFIG_NET_CLS_ROUTE=y +CONFIG_NET_CLS_FW=m +CONFIG_NET_CLS_U32=m +CONFIG_NET_CLS_RSVP=m +CONFIG_NET_CLS_RSVP6=m +# CONFIG_NET_CLS_POLICE is not set # # Network testing # -# CONFIG_NET_PKTGEN is not set +CONFIG_NET_PKTGEN=m # # Telephony Support @@ -259,10 +436,12 @@ # CONFIG_BLK_DEV_SD=y CONFIG_SD_EXTRA_DEVS=40 -CONFIG_CHR_DEV_ST=y -# CONFIG_CHR_DEV_OSST is not set -# CONFIG_BLK_DEV_SR is not set -# CONFIG_CHR_DEV_SG is not set +CONFIG_CHR_DEV_ST=m +CONFIG_CHR_DEV_OSST=m +CONFIG_BLK_DEV_SR=m +CONFIG_BLK_DEV_SR_VENDOR=y +CONFIG_SR_EXTRA_DEVS=4 +CONFIG_CHR_DEV_SG=m # # Some SCSI devices (e.g. CD jukebox) support multiple LUNs @@ -281,6 +460,7 @@ # CONFIG_SCSI_AHA152X is not set # CONFIG_SCSI_AHA1542 is not set # CONFIG_SCSI_AHA1740 is not set +# CONFIG_SCSI_AACRAID is not set # CONFIG_SCSI_AIC7XXX is not set # CONFIG_SCSI_AIC79XX is not set # CONFIG_SCSI_AIC7XXX_OLD is not set @@ -290,6 +470,17 @@ # CONFIG_SCSI_AM53C974 is not set # CONFIG_SCSI_MEGARAID is not set # CONFIG_SCSI_MEGARAID2 is not set +# CONFIG_SCSI_SATA is not set +# CONFIG_SCSI_SATA_SVW is not set +# CONFIG_SCSI_ATA_PIIX is not set +# CONFIG_SCSI_SATA_NV is not set +# CONFIG_SCSI_SATA_PROMISE is not set +# CONFIG_SCSI_SATA_SX4 is not set +# CONFIG_SCSI_SATA_SIL is not set +# CONFIG_SCSI_SATA_SIS is not set +# CONFIG_SCSI_SATA_ULI is not set +# CONFIG_SCSI_SATA_VIA is not set +# CONFIG_SCSI_SATA_VITESSE is not set # CONFIG_SCSI_BUSLOGIC is not set # CONFIG_SCSI_CPQFCTS is not set # CONFIG_SCSI_DMX3191D is not set @@ -321,6 +512,7 @@ # CONFIG_SCSI_T128 is not set # CONFIG_SCSI_U14_34F is not set # CONFIG_SCSI_NSP32 is not set +# CONFIG_SCSI_DEBUG is not set # # Fusion MPT device support @@ -332,6 +524,11 @@ # CONFIG_FUSION_LAN is not set # +# IEEE 1394 (FireWire) support (EXPERIMENTAL) +# +# CONFIG_IEEE1394 is not set + +# # Network device support # CONFIG_NETDEVICES=y @@ -344,6 +541,7 @@ # CONFIG_BONDING is not set # CONFIG_EQUALIZER is not set # CONFIG_TUN is not set +# CONFIG_ETHERTAP is not set # # Ethernet (10 or 100Mbit) @@ -378,6 +576,7 @@ # CONFIG_SK98LIN is not set # CONFIG_TIGON3 is not set # CONFIG_FDDI is not set +# CONFIG_HIPPI is not set # CONFIG_PLIP is not set # CONFIG_PPP is not set # CONFIG_SLIP is not set @@ -392,6 +591,8 @@ # # CONFIG_TR is not set # CONFIG_NET_FC is not set +# CONFIG_RCPCI is not set +# CONFIG_SHAPER is not set # # Wan interfaces @@ -401,7 +602,34 @@ # # Amateur Radio support # -# CONFIG_HAMRADIO is not set +CONFIG_HAMRADIO=y + +# +# Packet Radio protocols +# +CONFIG_AX25=m +CONFIG_AX25_DAMA_SLAVE=y +CONFIG_NETROM=m +CONFIG_ROSE=m + +# +# AX.25 network device drivers +# + +# +# AX.25 network device drivers +# +CONFIG_MKISS=m +CONFIG_6PACK=m +CONFIG_BPQETHER=m +# CONFIG_SCC_DELAY is not set +# CONFIG_SCC_TRXECHO is not set +# CONFIG_BAYCOM_SER_FDX is not set +# CONFIG_BAYCOM_SER_HDX is not set +# CONFIG_BAYCOM_PAR is not set +# CONFIG_BAYCOM_EPP is not set +# CONFIG_SOUNDMODEM is not set +# CONFIG_YAM is not set # # IrDA (infrared) support @@ -431,6 +659,7 @@ CONFIG_SERIAL_CONSOLE=y # CONFIG_SERIAL_EXTENDED is not set # CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 @@ -473,8 +702,7 @@ # CONFIG_AMD_PM768 is not set # CONFIG_NVRAM is not set # CONFIG_RTC is not set -# CONFIG_MIPS_RTC is not set -CONFIG_SGI_IP27_RTC=y +CONFIG_SGI_IP27_RTC=m # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set @@ -493,11 +721,11 @@ # # File systems # -# CONFIG_QUOTA is not set -# CONFIG_QFMT_V2 is not set +CONFIG_QUOTA=y +CONFIG_QFMT_V2=y CONFIG_AUTOFS_FS=y -# CONFIG_AUTOFS4_FS is not set -# CONFIG_REISERFS_FS is not set +CONFIG_AUTOFS4_FS=m +CONFIG_REISERFS_FS=m # CONFIG_REISERFS_CHECK is not set # CONFIG_REISERFS_PROC_INFO is not set # CONFIG_ADFS_FS is not set @@ -511,43 +739,43 @@ CONFIG_EXT3_FS=y CONFIG_JBD=y # CONFIG_JBD_DEBUG is not set -# CONFIG_FAT_FS is not set -# CONFIG_MSDOS_FS is not set -# CONFIG_UMSDOS_FS is not set -# CONFIG_VFAT_FS is not set +CONFIG_FAT_FS=m +CONFIG_MSDOS_FS=m +CONFIG_UMSDOS_FS=m +CONFIG_VFAT_FS=m # CONFIG_EFS_FS is not set # CONFIG_JFFS_FS is not set # CONFIG_JFFS2_FS is not set -# CONFIG_CRAMFS is not set -# CONFIG_TMPFS is not set +CONFIG_CRAMFS=m +CONFIG_TMPFS=y CONFIG_RAMFS=y -# CONFIG_ISO9660_FS is not set -# CONFIG_JOLIET is not set -# CONFIG_ZISOFS is not set -# CONFIG_JFS_FS is not set +CONFIG_ISO9660_FS=m +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +CONFIG_JFS_FS=m # CONFIG_JFS_DEBUG is not set # CONFIG_JFS_STATISTICS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_NTFS_FS is not set +CONFIG_MINIX_FS=m +CONFIG_VXFS_FS=m +CONFIG_NTFS_FS=m # CONFIG_NTFS_RW is not set -# CONFIG_HPFS_FS is not set +CONFIG_HPFS_FS=m CONFIG_PROC_FS=y # CONFIG_DEVFS_FS is not set # CONFIG_DEVFS_MOUNT is not set # CONFIG_DEVFS_DEBUG is not set CONFIG_DEVPTS_FS=y -# CONFIG_QNX4FS_FS is not set +CONFIG_QNX4FS_FS=m # CONFIG_QNX4FS_RW is not set -# CONFIG_ROMFS_FS is not set -CONFIG_EXT2_FS=y -# CONFIG_SYSV_FS is not set -# CONFIG_UDF_FS is not set +CONFIG_ROMFS_FS=m +CONFIG_EXT2_FS=m +CONFIG_SYSV_FS=m +CONFIG_UDF_FS=m # CONFIG_UDF_RW is not set -# CONFIG_UFS_FS is not set +CONFIG_UFS_FS=m # CONFIG_UFS_FS_WRITE is not set -# CONFIG_XFS_FS is not set -# CONFIG_XFS_QUOTA is not set +CONFIG_XFS_FS=m +CONFIG_XFS_QUOTA=y # CONFIG_XFS_RT is not set # CONFIG_XFS_TRACE is not set # CONFIG_XFS_DEBUG is not set @@ -561,23 +789,25 @@ CONFIG_NFS_V3=y # CONFIG_NFS_DIRECTIO is not set CONFIG_ROOT_NFS=y -# CONFIG_NFSD is not set -# CONFIG_NFSD_V3 is not set -# CONFIG_NFSD_TCP is not set +CONFIG_NFSD=m +CONFIG_NFSD_V3=y +CONFIG_NFSD_TCP=y CONFIG_SUNRPC=y CONFIG_LOCKD=y CONFIG_LOCKD_V4=y -# CONFIG_SMB_FS is not set -# CONFIG_NCP_FS is not set -# CONFIG_NCPFS_PACKET_SIGNING is not set -# CONFIG_NCPFS_IOCTL_LOCKING is not set -# CONFIG_NCPFS_STRONG is not set -# CONFIG_NCPFS_NFS_NS is not set -# CONFIG_NCPFS_OS2_NS is not set -# CONFIG_NCPFS_SMALLDOS is not set -# CONFIG_NCPFS_NLS is not set -# CONFIG_NCPFS_EXTRAS is not set -# CONFIG_ZISOFS_FS is not set +CONFIG_SMB_FS=m +# CONFIG_SMB_NLS_DEFAULT is not set +CONFIG_SMB_UNIX=y +CONFIG_NCP_FS=m +CONFIG_NCPFS_PACKET_SIGNING=y +CONFIG_NCPFS_IOCTL_LOCKING=y +CONFIG_NCPFS_STRONG=y +CONFIG_NCPFS_NFS_NS=y +CONFIG_NCPFS_OS2_NS=y +CONFIG_NCPFS_SMALLDOS=y +CONFIG_NCPFS_NLS=y +CONFIG_NCPFS_EXTRAS=y +CONFIG_ZISOFS_FS=m # # Partition Types @@ -598,8 +828,50 @@ # CONFIG_ULTRIX_PARTITION is not set # CONFIG_SUN_PARTITION is not set # CONFIG_EFI_PARTITION is not set -# CONFIG_SMB_NLS is not set -# CONFIG_NLS is not set +CONFIG_SMB_NLS=y +CONFIG_NLS=y + +# +# Native Language Support +# +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=m +CONFIG_NLS_CODEPAGE_737=m +CONFIG_NLS_CODEPAGE_775=m +CONFIG_NLS_CODEPAGE_850=m +CONFIG_NLS_CODEPAGE_852=m +CONFIG_NLS_CODEPAGE_855=m +CONFIG_NLS_CODEPAGE_857=m +CONFIG_NLS_CODEPAGE_860=m +CONFIG_NLS_CODEPAGE_861=m +CONFIG_NLS_CODEPAGE_862=m +CONFIG_NLS_CODEPAGE_863=m +CONFIG_NLS_CODEPAGE_864=m +CONFIG_NLS_CODEPAGE_865=m +CONFIG_NLS_CODEPAGE_866=m +CONFIG_NLS_CODEPAGE_869=m +CONFIG_NLS_CODEPAGE_936=m +CONFIG_NLS_CODEPAGE_950=m +CONFIG_NLS_CODEPAGE_932=m +CONFIG_NLS_CODEPAGE_949=m +CONFIG_NLS_CODEPAGE_874=m +CONFIG_NLS_ISO8859_8=m +CONFIG_NLS_CODEPAGE_1250=m +CONFIG_NLS_CODEPAGE_1251=m +CONFIG_NLS_ISO8859_1=m +CONFIG_NLS_ISO8859_2=m +CONFIG_NLS_ISO8859_3=m +CONFIG_NLS_ISO8859_4=m +CONFIG_NLS_ISO8859_5=m +CONFIG_NLS_ISO8859_6=m +CONFIG_NLS_ISO8859_7=m +CONFIG_NLS_ISO8859_9=m +CONFIG_NLS_ISO8859_13=m +CONFIG_NLS_ISO8859_14=m +CONFIG_NLS_ISO8859_15=m +CONFIG_NLS_KOI8_R=m +CONFIG_NLS_KOI8_U=m +CONFIG_NLS_UTF8=m # # Multimedia devices @@ -647,5 +919,5 @@ # Library routines # # CONFIG_CRC32 is not set -# CONFIG_ZLIB_INFLATE is not set +CONFIG_ZLIB_INFLATE=m # CONFIG_ZLIB_DEFLATE is not set diff -urN linux-2.4.28-bk3/arch/mips64/defconfig-jaguar linux-2.4.28-bk4/arch/mips64/defconfig-jaguar --- linux-2.4.28-bk3/arch/mips64/defconfig-jaguar 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips64/defconfig-jaguar 2004-11-23 02:49:27.455394567 -0800 @@ -26,10 +26,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -52,6 +54,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -112,9 +116,12 @@ # General setup # # CONFIG_CPU_LITTLE_ENDIAN is not set +# CONFIG_BUILD_ELF64 is not set # CONFIG_BINFMT_IRIX is not set CONFIG_NET=y # CONFIG_PCI is not set +# CONFIG_PCI_NEW is not set +CONFIG_PCI_AUTO=y # CONFIG_ISA is not set # CONFIG_TC is not set # CONFIG_MCA is not set @@ -135,6 +142,7 @@ CONFIG_BINFMT_ELF32=y # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # # Memory Technology Devices (MTD) @@ -164,6 +172,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set CONFIG_BLK_DEV_LOOP=y # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set @@ -209,7 +218,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set @@ -395,6 +403,7 @@ # CONFIG_SERIAL_TXX9 is not set # CONFIG_SERIAL_TXX9_CONSOLE is not set # CONFIG_TXX927_SERIAL is not set +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 diff -urN linux-2.4.28-bk3/arch/mips64/defconfig-malta linux-2.4.28-bk4/arch/mips64/defconfig-malta --- linux-2.4.28-bk3/arch/mips64/defconfig-malta 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips64/defconfig-malta 2004-11-23 02:49:27.456394608 -0800 @@ -26,10 +26,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -52,6 +54,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -80,12 +84,10 @@ CONFIG_MIPS_GT64120=y CONFIG_MIPS_MSC=y CONFIG_L1_CACHE_SHIFT=5 -CONFIG_NEW_TIME_C=y CONFIG_NONCOHERENT_IO=y CONFIG_SWAP_IO_SPACE_W=y CONFIG_SWAP_IO_SPACE_L=y CONFIG_PC_KEYB=y -CONFIG_PCI=y # CONFIG_MIPS_AU1000 is not set # @@ -122,7 +124,11 @@ # General setup # CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_BUILD_ELF64 is not set CONFIG_NET=y +CONFIG_PCI=y +# CONFIG_PCI_NEW is not set +# CONFIG_PCI_AUTO is not set CONFIG_PCI_NAMES=y # CONFIG_ISA is not set # CONFIG_TC is not set @@ -144,6 +150,7 @@ CONFIG_BINFMT_ELF32=y # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # # Memory Technology Devices (MTD) @@ -173,6 +180,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set # CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set CONFIG_BLK_DEV_RAM=y @@ -218,7 +226,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set @@ -309,6 +316,17 @@ # CONFIG_SCSI_AM53C974 is not set # CONFIG_SCSI_MEGARAID is not set # CONFIG_SCSI_MEGARAID2 is not set +# CONFIG_SCSI_SATA is not set +# CONFIG_SCSI_SATA_SVW is not set +# CONFIG_SCSI_ATA_PIIX is not set +# CONFIG_SCSI_SATA_NV is not set +# CONFIG_SCSI_SATA_PROMISE is not set +# CONFIG_SCSI_SATA_SX4 is not set +# CONFIG_SCSI_SATA_SIL is not set +# CONFIG_SCSI_SATA_SIS is not set +# CONFIG_SCSI_SATA_ULI is not set +# CONFIG_SCSI_SATA_VIA is not set +# CONFIG_SCSI_SATA_VITESSE is not set # CONFIG_SCSI_BUSLOGIC is not set # CONFIG_SCSI_CPQFCTS is not set # CONFIG_SCSI_DMX3191D is not set @@ -459,6 +477,7 @@ CONFIG_SERIAL_CONSOLE=y # CONFIG_SERIAL_EXTENDED is not set # CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 @@ -501,7 +520,6 @@ # CONFIG_AMD_PM768 is not set # CONFIG_NVRAM is not set CONFIG_RTC=y -# CONFIG_MIPS_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set @@ -590,7 +608,7 @@ CONFIG_ROOT_NFS=y CONFIG_NFSD=y CONFIG_NFSD_V3=y -# CONFIG_NFSD_TCP is not set +CONFIG_NFSD_TCP=y CONFIG_SUNRPC=y CONFIG_LOCKD=y CONFIG_LOCKD_V4=y diff -urN linux-2.4.28-bk3/arch/mips64/defconfig-ocelotc linux-2.4.28-bk4/arch/mips64/defconfig-ocelotc --- linux-2.4.28-bk3/arch/mips64/defconfig-ocelotc 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips64/defconfig-ocelotc 2004-11-23 02:49:27.457394649 -0800 @@ -26,10 +26,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -52,6 +54,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set CONFIG_MOMENCO_OCELOT_C=y # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -73,10 +77,8 @@ # CONFIG_HIGHMEM is not set CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set -CONFIG_PCI=y CONFIG_SWAP_IO_SPACE=y CONFIG_NONCOHERENT_IO=y -CONFIG_NEW_TIME_C=y CONFIG_BOOT_ELF32=y # CONFIG_MIPS_AU1000 is not set @@ -117,8 +119,12 @@ # General setup # # CONFIG_CPU_LITTLE_ENDIAN is not set +# CONFIG_BUILD_ELF64 is not set # CONFIG_BINFMT_IRIX is not set CONFIG_NET=y +CONFIG_PCI=y +# CONFIG_PCI_NEW is not set +CONFIG_PCI_AUTO=y # CONFIG_PCI_NAMES is not set # CONFIG_ISA is not set # CONFIG_TC is not set @@ -140,6 +146,7 @@ CONFIG_BINFMT_ELF32=y # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # # Memory Technology Devices (MTD) @@ -169,6 +176,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_NBD=y # CONFIG_BLK_DEV_RAM is not set @@ -214,7 +222,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set @@ -330,6 +337,7 @@ # CONFIG_FEALNX is not set # CONFIG_NATSEMI is not set # CONFIG_NE2K_PCI is not set +# CONFIG_FORCEDETH is not set # CONFIG_NE3210 is not set # CONFIG_ES3210 is not set # CONFIG_8139CP is not set @@ -445,6 +453,7 @@ # CONFIG_SERIAL_TXX9 is not set # CONFIG_SERIAL_TXX9_CONSOLE is not set # CONFIG_TXX927_SERIAL is not set +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 @@ -487,7 +496,6 @@ # CONFIG_AMD_PM768 is not set # CONFIG_NVRAM is not set # CONFIG_RTC is not set -CONFIG_MIPS_RTC=y # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set diff -urN linux-2.4.28-bk3/arch/mips64/defconfig-sb1250-swarm linux-2.4.28-bk4/arch/mips64/defconfig-sb1250-swarm --- linux-2.4.28-bk3/arch/mips64/defconfig-sb1250-swarm 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips64/defconfig-sb1250-swarm 2004-11-23 02:49:27.458394689 -0800 @@ -26,10 +26,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -52,6 +54,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -84,7 +88,6 @@ # CONFIG_SIBYTE_BW_TRACE is not set # CONFIG_SIBYTE_SB1250_PROF is not set # CONFIG_SIBYTE_TBPROF is not set -# CONFIG_PCI is not set CONFIG_SIBYTE_GENBUS_IDE=y CONFIG_SMP_CAPABLE=y # CONFIG_SNI_RM200_PCI is not set @@ -97,7 +100,6 @@ # CONFIG_HIGHMEM is not set CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set -CONFIG_NEW_TIME_C=y CONFIG_DUMMY_KEYB=y CONFIG_SWAP_IO_SPACE_W=y CONFIG_SWAP_IO_SPACE_L=y @@ -143,9 +145,12 @@ # General setup # # CONFIG_CPU_LITTLE_ENDIAN is not set +CONFIG_BUILD_ELF64=y # CONFIG_BINFMT_IRIX is not set CONFIG_NET=y # CONFIG_PCI is not set +# CONFIG_PCI_NEW is not set +# CONFIG_PCI_AUTO is not set # CONFIG_ISA is not set # CONFIG_TC is not set # CONFIG_MCA is not set @@ -166,6 +171,7 @@ CONFIG_BINFMT_ELF32=y # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # # Memory Technology Devices (MTD) @@ -195,6 +201,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set # CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set @@ -237,7 +244,6 @@ # # SCTP Configuration (EXPERIMENTAL) # -CONFIG_IPV6_SCTP__=y # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set @@ -319,7 +325,6 @@ # Ethernet (10 or 100Mbit) # CONFIG_NET_ETHERNET=y -CONFIG_NET_SB1250_MAC=y # CONFIG_SUNLANCE is not set # CONFIG_SUNBMAC is not set # CONFIG_SUNQE is not set @@ -343,6 +348,7 @@ # CONFIG_HAMACHI is not set # CONFIG_YELLOWFIN is not set # CONFIG_R8169 is not set +CONFIG_NET_SB1250_MAC=y # CONFIG_SK98LIN is not set # CONFIG_TIGON3 is not set # CONFIG_FDDI is not set @@ -426,6 +432,7 @@ CONFIG_SIBYTE_SB1250_DUART=y CONFIG_SIBYTE_SB1250_DUART_CONSOLE=y CONFIG_SERIAL_CONSOLE=y +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 @@ -468,7 +475,6 @@ # CONFIG_AMD_PM768 is not set # CONFIG_NVRAM is not set # CONFIG_RTC is not set -# CONFIG_MIPS_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set diff -urN linux-2.4.28-bk3/arch/mips64/defconfig-sead linux-2.4.28-bk4/arch/mips64/defconfig-sead --- linux-2.4.28-bk3/arch/mips64/defconfig-sead 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips64/defconfig-sead 2004-11-23 02:49:27.459394730 -0800 @@ -24,10 +24,12 @@ # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_HYDROGEN3 is not set +# CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_MIPS_MTX1 is not set # CONFIG_COGENT_CSB250 is not set @@ -50,6 +52,8 @@ # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_BIG_SUR is not set +# CONFIG_PMC_STRETCH is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set @@ -73,9 +77,7 @@ # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set CONFIG_BOOT_ELF32=y CONFIG_L1_CACHE_SHIFT=5 -CONFIG_NEW_TIME_C=y CONFIG_NONCOHERENT_IO=y -# CONFIG_PCI is not set # CONFIG_MIPS_AU1000 is not set # @@ -112,6 +114,7 @@ # General setup # CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_BUILD_ELF64 is not set # CONFIG_NET is not set # CONFIG_PCI is not set # CONFIG_ISA is not set @@ -134,6 +137,7 @@ CONFIG_BINFMT_ELF32=y # CONFIG_BINFMT_MISC is not set # CONFIG_OOM_KILLER is not set +# CONFIG_CMDLINE_BOOL is not set # # Memory Technology Devices (MTD) @@ -163,6 +167,7 @@ # CONFIG_CISS_MONITOR_THREAD is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_SX8 is not set CONFIG_BLK_DEV_LOOP=y # CONFIG_BLK_DEV_NBD is not set CONFIG_BLK_DEV_RAM=y @@ -237,6 +242,7 @@ CONFIG_SERIAL_CONSOLE=y # CONFIG_SERIAL_EXTENDED is not set # CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set # CONFIG_UNIX98_PTYS is not set # @@ -278,7 +284,6 @@ # CONFIG_AMD_PM768 is not set # CONFIG_NVRAM is not set # CONFIG_RTC is not set -# CONFIG_MIPS_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set diff -urN linux-2.4.28-bk3/arch/mips64/kernel/Makefile linux-2.4.28-bk4/arch/mips64/kernel/Makefile --- linux-2.4.28-bk3/arch/mips64/kernel/Makefile 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips64/kernel/Makefile 2004-11-23 02:49:27.459394730 -0800 @@ -17,11 +17,11 @@ obj-y := branch.o cpu-probe.o entry.o irq.o proc.o process.o \ ptrace.o r4k_cache.o r4k_fpu.o r4k_genex.o r4k_switch.o \ reset.o scall_64.o semaphore.o setup.o signal.o syscall.o \ - traps.o unaligned.o + time.o traps.o unaligned.o obj-$(CONFIG_I8259) += i8259.o obj-$(CONFIG_IRQ_CPU) += irq_cpu.o -obj-$(CONFIG_NEW_TIME_C) += time.o +obj-$(CONFIG_IRQ_CPU_RM7K) += irq-rm7000.o obj-$(CONFIG_MODULES) += mips64_ksyms.o obj-$(CONFIG_MIPS32_COMPAT) += linux32.o signal32.o ioctl32.o diff -urN linux-2.4.28-bk3/arch/mips64/kernel/cpu-probe.c linux-2.4.28-bk4/arch/mips64/kernel/cpu-probe.c --- linux-2.4.28-bk3/arch/mips64/kernel/cpu-probe.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips64/kernel/cpu-probe.c 2004-11-23 02:49:27.460394771 -0800 @@ -4,7 +4,7 @@ * Processor capabilities determination functions. * * Copyright (C) xxxx the Anonymous - * Copyright (C) 2003 Maciej W. Rozycki + * Copyright (C) 2003, 2004 Maciej W. Rozycki * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -18,6 +18,7 @@ #include #include +#include #include #include #include @@ -92,6 +93,7 @@ case CPU_R5000: case CPU_NEVADA: case CPU_RM7000: + case CPU_RM9000: case CPU_TX49XX: case CPU_4KC: case CPU_4KEC: @@ -179,7 +181,7 @@ ".set pop" : "=&r" (lv1), "=r" (lw) : "r" (m1), "r" (m2), "r" (s), "I" (0) - : "hi", "lo", "accum"); + : "hi", "lo", GCC_REG_ACCUM); /* We have to use single integers for m1 and m2 and a double * one for p to be sure the mulsidi3 gcc's RTL multiplication * instruction has the workaround applied. Older versions of @@ -274,7 +276,7 @@ extern asmlinkage void handle_daddi_ov(void); unsigned long flags; void *handler; - long v; + long v, tmp; printk("Checking for the daddi bug... "); @@ -294,13 +296,15 @@ ".set noat\n\t" ".set noreorder\n\t" ".set nomacro\n\t" + "addiu %1, $0, %2\n\t" + "dsrl %1, %1, 1\n\t" #ifdef HAVE_AS_SET_DADDI ".set daddi\n\t" #endif - "daddi %0, %1, %2\n\t" + "daddi %0, %1, %3\n\t" ".set pop" - : "=r" (v) - : "r" (0x7fffffffffffedcd), "I" (0x1234)); + : "=r" (v), "=&r" (tmp) + : "I" (0xffffffffffffdb9a), "I" (0x1234)); set_except_vector(12, handler); local_irq_restore(flags); @@ -314,9 +318,11 @@ local_irq_save(flags); handler = set_except_vector(12, handle_daddi_ov); asm volatile( - "daddi %0, %1, %2" - : "=r" (v) - : "r" (0x7fffffffffffedcd), "I" (0x1234)); + "addiu %1, $0, %2\n\t" + "dsrl %1, %1, 1\n\t" + "daddi %0, %1, %3" + : "=r" (v), "=&r" (tmp) + : "I" (0xffffffffffffdb9a), "I" (0x1234)); set_except_vector(12, handler); local_irq_restore(flags); @@ -337,7 +343,7 @@ static inline void check_daddiu(void) { - long v, w; + long v, w, tmp; printk("Checking for the daddiu bug... "); @@ -362,15 +368,17 @@ ".set noat\n\t" ".set noreorder\n\t" ".set nomacro\n\t" + "addiu %2, $0, %3\n\t" + "dsrl %2, %2, 1\n\t" #ifdef HAVE_AS_SET_DADDI ".set daddi\n\t" #endif - "daddiu %0, %2, %3\n\t" - "addiu %1, $0, %3\n\t" + "daddiu %0, %2, %4\n\t" + "addiu %1, $0, %4\n\t" "daddu %1, %2\n\t" ".set pop" - : "=&r" (v), "=&r" (w) - : "r" (0x7fffffffffffedcd), "I" (0x1234)); + : "=&r" (v), "=&r" (w), "=&r" (tmp) + : "I" (0xffffffffffffdb9a), "I" (0x1234)); if (v == w) { printk("no.\n"); @@ -380,11 +388,13 @@ printk("yes, workaround... "); asm volatile( - "daddiu %0, %2, %3\n\t" - "addiu %1, $0, %3\n\t" + "addiu %2, $0, %3\n\t" + "dsrl %2, %2, 1\n\t" + "daddiu %0, %2, %4\n\t" + "addiu %1, $0, %4\n\t" "daddu %1, %2" - : "=&r" (v), "=&r" (w) - : "r" (0x7fffffffffffedcd), "I" (0x1234)); + : "=&r" (v), "=&r" (w), "=&r" (tmp) + : "I" (0xffffffffffffdb9a), "I" (0x1234)); if (v == w) { printk("yes.\n"); @@ -462,8 +472,7 @@ case PRID_IMP_R2000: c->cputype = CPU_R2000; c->isa_level = MIPS_CPU_ISA_I; - c->options = MIPS_CPU_TLB | MIPS_CPU_NOFPUEX | - MIPS_CPU_LLSC; + c->options = MIPS_CPU_TLB | MIPS_CPU_NOFPUEX; if (__cpu_has_fpu()) c->options |= MIPS_CPU_FPU; c->tlbsize = 64; @@ -477,17 +486,24 @@ else c->cputype = CPU_R3000; c->isa_level = MIPS_CPU_ISA_I; - c->options = MIPS_CPU_TLB | MIPS_CPU_NOFPUEX | - MIPS_CPU_LLSC; + c->options = MIPS_CPU_TLB | MIPS_CPU_NOFPUEX; if (__cpu_has_fpu()) c->options |= MIPS_CPU_FPU; c->tlbsize = 64; break; case PRID_IMP_R4000: - if ((c->processor_id & 0xff) >= PRID_REV_R4400) - c->cputype = CPU_R4400SC; - else - c->cputype = CPU_R4000SC; + if (read_c0_config() & CONF_SC) { + if ((c->processor_id & 0xff) >= PRID_REV_R4400) + c->cputype = CPU_R4400PC; + else + c->cputype = CPU_R4000PC; + } else { + if ((c->processor_id & 0xff) >= PRID_REV_R4400) + c->cputype = CPU_R4400SC; + else + c->cputype = CPU_R4000SC; + } + c->isa_level = MIPS_CPU_ISA_III; c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | MIPS_CPU_WATCH | MIPS_CPU_VCE | diff -urN linux-2.4.28-bk3/arch/mips64/kernel/gdb-low.S linux-2.4.28-bk4/arch/mips64/kernel/gdb-low.S --- linux-2.4.28-bk3/arch/mips64/kernel/gdb-low.S 2003-08-25 04:44:40.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips64/kernel/gdb-low.S 2004-11-23 02:49:27.461394812 -0800 @@ -283,7 +283,7 @@ ld v0,GDB_FR_HI(sp) ld v1,GDB_FR_LO(sp) mthi v0 - mtlo v0 + mtlo v1 ld ra,GDB_FR_REG31(sp) ld fp,GDB_FR_REG30(sp) ld gp,GDB_FR_REG28(sp) diff -urN linux-2.4.28-bk3/arch/mips64/kernel/ioctl32.c linux-2.4.28-bk4/arch/mips64/kernel/ioctl32.c --- linux-2.4.28-bk3/arch/mips64/kernel/ioctl32.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips64/kernel/ioctl32.c 2004-11-23 02:49:27.463394893 -0800 @@ -44,6 +44,7 @@ #include #include #include +#include #include #include #if defined(CONFIG_BLK_DEV_LVM) || defined(CONFIG_BLK_DEV_LVM_MODULE) @@ -1817,7 +1818,6 @@ IOCTL32_DEFAULT(_IOR('v' , BASE_VIDIOCPRIVATE+6, int)), IOCTL32_DEFAULT(_IOR('v' , BASE_VIDIOCPRIVATE+7, int)), -#ifdef CONFIG_NET /* Socket level stuff */ IOCTL32_DEFAULT(FIOSETOWN), IOCTL32_DEFAULT(SIOCSPGRP), @@ -2079,6 +2079,7 @@ IOCTL32_DEFAULT(SOUND_MIXER_SETLEVELS), IOCTL32_DEFAULT(OSS_GETVERSION), +#ifdef CONFIG_NET /* And these ioctls need translation */ IOCTL32_HANDLER(SIOCGIFNAME, dev_ifname32), IOCTL32_HANDLER(SIOCGIFCONF, dev_ifconf), @@ -2120,7 +2121,6 @@ */ IOCTL32_HANDLER(SIOCRTMSG, ret_einval), IOCTL32_HANDLER(SIOCGSTAMP, do_siocgstamp), - #endif /* CONFIG_NET */ IOCTL32_HANDLER(BLKRAGET, w_long), diff -urN linux-2.4.28-bk3/arch/mips64/kernel/irq-rm7000.c linux-2.4.28-bk4/arch/mips64/kernel/irq-rm7000.c --- linux-2.4.28-bk3/arch/mips64/kernel/irq-rm7000.c 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips64/kernel/irq-rm7000.c 2004-11-23 02:49:27.463394893 -0800 @@ -0,0 +1,98 @@ +/* + * Copyright (C) 2003 Ralf Baechle + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * Handler for RM7000 extended interrupts. These are a non-standard + * feature so we handle them separately from standard interrupts. + */ +#include +#include +#include + +#include +#include +#include + +static int irq_base; + +static inline void unmask_rm7k_irq(unsigned int irq) +{ + set_c0_intcontrol(0x100 << (irq - irq_base)); +} + +static inline void mask_rm7k_irq(unsigned int irq) +{ + clear_c0_intcontrol(0x100 << (irq - irq_base)); +} + +static inline void rm7k_cpu_irq_enable(unsigned int irq) +{ + unsigned long flags; + + local_irq_save(flags); + unmask_rm7k_irq(irq); + local_irq_restore(flags); +} + +static void rm7k_cpu_irq_disable(unsigned int irq) +{ + unsigned long flags; + + local_irq_save(flags); + mask_rm7k_irq(irq); + local_irq_restore(flags); +} + +static unsigned int rm7k_cpu_irq_startup(unsigned int irq) +{ + rm7k_cpu_irq_enable(irq); + + return 0; +} + +#define rm7k_cpu_irq_shutdown rm7k_cpu_irq_disable + +/* + * While we ack the interrupt interrupts are disabled and thus we don't need + * to deal with concurrency issues. Same for rm7k_cpu_irq_end. + */ +static void rm7k_cpu_irq_ack(unsigned int irq) +{ + mask_rm7k_irq(irq); +} + +static void rm7k_cpu_irq_end(unsigned int irq) +{ + if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) + unmask_rm7k_irq(irq); +} + +static hw_irq_controller rm7k_irq_controller = { + "RM7000", + rm7k_cpu_irq_startup, + rm7k_cpu_irq_shutdown, + rm7k_cpu_irq_enable, + rm7k_cpu_irq_disable, + rm7k_cpu_irq_ack, + rm7k_cpu_irq_end, +}; + +void __init rm7k_cpu_irq_init(int base) +{ + int i; + + clear_c0_intcontrol(0x00000f00); /* Mask all */ + + for (i = base; i < base + 4; i++) { + irq_desc[i].status = IRQ_DISABLED; + irq_desc[i].action = NULL; + irq_desc[i].depth = 1; + irq_desc[i].handler = &rm7k_irq_controller; + } + + irq_base = base; +} diff -urN linux-2.4.28-bk3/arch/mips64/kernel/irq_cpu.c linux-2.4.28-bk4/arch/mips64/kernel/irq_cpu.c --- linux-2.4.28-bk3/arch/mips64/kernel/irq_cpu.c 2003-08-25 04:44:40.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips64/kernel/irq_cpu.c 2004-11-23 02:49:27.464394934 -0800 @@ -16,18 +16,20 @@ * Almost all MIPS CPUs define 8 interrupt sources. They are typically * level triggered (i.e., cannot be cleared from CPU; must be cleared from * device). The first two are software interrupts which we don't really - * use or support. The last one is usually cpu timer interrupt if a counter - * register is present. + * use or support. The last one is usually the CPU timer interrupt if + * counter register is present or, for CPUs with an external FPU, by + * convention it's the FPU exception interrupt. * * Don't even think about using this on SMP. You have been warned. * * This file exports one global function: - * mips_cpu_irq_init(u32 irq_base); + * void mips_cpu_irq_init(int irq_base); */ +#include #include -#include #include +#include #include #include @@ -78,7 +80,7 @@ static void mips_cpu_irq_ack(unsigned int irq) { /* Only necessary for soft interrupts */ - clear_c0_cause(1 << (irq - mips_cpu_irq_base + 8)); + clear_c0_cause(0x100 << (irq - mips_cpu_irq_base)); mask_mips_irq(irq); } @@ -90,7 +92,7 @@ } static hw_irq_controller mips_cpu_irq_controller = { - "CPU_irq", + "MIPS", mips_cpu_irq_startup, mips_cpu_irq_shutdown, mips_cpu_irq_enable, @@ -101,9 +103,9 @@ }; -void mips_cpu_irq_init(u32 irq_base) +void __init mips_cpu_irq_init(int irq_base) { - u32 i; + int i; for (i = irq_base; i < irq_base + 8; i++) { irq_desc[i].status = IRQ_DISABLED; diff -urN linux-2.4.28-bk3/arch/mips64/kernel/linux32.c linux-2.4.28-bk4/arch/mips64/kernel/linux32.c --- linux-2.4.28-bk3/arch/mips64/kernel/linux32.c 2004-11-17 03:54:21.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips64/kernel/linux32.c 2004-11-23 02:49:27.466395015 -0800 @@ -2166,9 +2166,10 @@ static inline void *alloc_user_space(long len) { - unsigned long sp = (unsigned long) current + THREAD_SIZE - 32; + struct pt_regs *regs = (struct pt_regs *) + ((unsigned long) current + THREAD_SIZE - 32) - 1; - return (void *) (sp - len); + return (void *) (regs->regs[29] - len); } static int sys32_semtimedop(int semid, struct sembuf *tsems, int nsems, @@ -3097,36 +3098,378 @@ #ifdef CONFIG_MODULES -/* From sparc64 */ +extern asmlinkage unsigned long sys_create_module(const char *name_user, size_t size); -struct kernel_sym32 { - u32 value; - char name[60]; +asmlinkage unsigned long sys32_create_module(const char *name_user, __kernel_size_t32 size) +{ + return sys_create_module(name_user, (size_t)size); +} + +extern asmlinkage int sys_init_module(const char *name_user, struct module *mod_user); + +/* Hey, when you're trying to init module, take time and prepare us a nice 64bit + * module structure, even if from 32bit modutils... Why to pollute kernel... :)) + */ +asmlinkage int sys32_init_module(const char *name_user, struct module *mod_user) +{ + return sys_init_module(name_user, mod_user); +} + +extern asmlinkage int sys_delete_module(const char *name_user); + +asmlinkage int sys32_delete_module(const char *name_user) +{ + return sys_delete_module(name_user); +} + +struct module_info32 { + u32 addr; + u32 size; + u32 flags; + s32 usecount; }; +/* Query various bits about modules. */ + +static inline long +get_mod_name(const char *user_name, char **buf) +{ + unsigned long page; + long retval; + + if ((unsigned long)user_name >= TASK_SIZE + && !segment_eq(get_fs (), KERNEL_DS)) + return -EFAULT; + + page = __get_free_page(GFP_KERNEL); + if (!page) + return -ENOMEM; + + retval = strncpy_from_user((char *)page, user_name, PAGE_SIZE); + if (retval > 0) { + if (retval < PAGE_SIZE) { + *buf = (char *)page; + return retval; + } + retval = -ENAMETOOLONG; + } else if (!retval) + retval = -EINVAL; + + free_page(page); + return retval; +} + +static inline void +put_mod_name(char *buf) +{ + free_page((unsigned long)buf); +} + +static __inline__ struct module *find_module(const char *name) +{ + struct module *mod; + + for (mod = module_list; mod ; mod = mod->next) { + if (mod->flags & MOD_DELETED) + continue; + if (!strcmp(mod->name, name)) + break; + } + + return mod; +} + +static int +qm_modules(char *buf, size_t bufsize, __kernel_size_t32 *ret) +{ + struct module *mod; + size_t nmod, space, len; + + nmod = space = 0; + + for (mod = module_list; mod->next != NULL; mod = mod->next, ++nmod) { + len = strlen(mod->name)+1; + if (len > bufsize) + goto calc_space_needed; + if (copy_to_user(buf, mod->name, len)) + return -EFAULT; + buf += len; + bufsize -= len; + space += len; + } + + if (put_user(nmod, ret)) + return -EFAULT; + else + return 0; + +calc_space_needed: + space += len; + while ((mod = mod->next)->next != NULL) + space += strlen(mod->name)+1; + + if (put_user(space, ret)) + return -EFAULT; + else + return -ENOSPC; +} + +static int +qm_deps(struct module *mod, char *buf, size_t bufsize, __kernel_size_t32 *ret) +{ + size_t i, space, len; + + if (mod->next == NULL) + return -EINVAL; + if (!MOD_CAN_QUERY(mod)) + return put_user(0, ret); + + space = 0; + for (i = 0; i < mod->ndeps; ++i) { + const char *dep_name = mod->deps[i].dep->name; + + len = strlen(dep_name)+1; + if (len > bufsize) + goto calc_space_needed; + if (copy_to_user(buf, dep_name, len)) + return -EFAULT; + buf += len; + bufsize -= len; + space += len; + } + + return put_user(i, ret); + +calc_space_needed: + space += len; + while (++i < mod->ndeps) + space += strlen(mod->deps[i].dep->name)+1; + + if (put_user(space, ret)) + return -EFAULT; + else + return -ENOSPC; +} + +static int +qm_refs(struct module *mod, char *buf, size_t bufsize, __kernel_size_t32 *ret) +{ + size_t nrefs, space, len; + struct module_ref *ref; + + if (mod->next == NULL) + return -EINVAL; + if (!MOD_CAN_QUERY(mod)) + if (put_user(0, ret)) + return -EFAULT; + else + return 0; + + space = 0; + for (nrefs = 0, ref = mod->refs; ref ; ++nrefs, ref = ref->next_ref) { + const char *ref_name = ref->ref->name; + + len = strlen(ref_name)+1; + if (len > bufsize) + goto calc_space_needed; + if (copy_to_user(buf, ref_name, len)) + return -EFAULT; + buf += len; + bufsize -= len; + space += len; + } + + if (put_user(nrefs, ret)) + return -EFAULT; + else + return 0; + +calc_space_needed: + space += len; + while ((ref = ref->next_ref) != NULL) + space += strlen(ref->ref->name)+1; + + if (put_user(space, ret)) + return -EFAULT; + else + return -ENOSPC; +} + +static inline int +qm_symbols(struct module *mod, char *buf, size_t bufsize, __kernel_size_t32 *ret) +{ + size_t i, space, len; + struct module_symbol *s; + char *strings; + unsigned *vals; + + if (!MOD_CAN_QUERY(mod)) + if (put_user(0, ret)) + return -EFAULT; + else + return 0; + + space = mod->nsyms * 2*sizeof(u32); + + i = len = 0; + s = mod->syms; + + if (space > bufsize) + goto calc_space_needed; + + if (!access_ok(VERIFY_WRITE, buf, space)) + return -EFAULT; + + bufsize -= space; + vals = (unsigned *)buf; + strings = buf+space; + + for (; i < mod->nsyms ; ++i, ++s, vals += 2) { + len = strlen(s->name)+1; + if (len > bufsize) + goto calc_space_needed; + + if (copy_to_user(strings, s->name, len) + || __put_user(s->value, vals+0) + || __put_user(space, vals+1)) + return -EFAULT; + + strings += len; + bufsize -= len; + space += len; + } + + if (put_user(i, ret)) + return -EFAULT; + else + return 0; + +calc_space_needed: + for (; i < mod->nsyms; ++i, ++s) + space += strlen(s->name)+1; + + if (put_user(space, ret)) + return -EFAULT; + else + return -ENOSPC; +} + +static inline int +qm_info(struct module *mod, char *buf, size_t bufsize, __kernel_size_t32 *ret) +{ + int error = 0; + + if (mod->next == NULL) + return -EINVAL; + + if (sizeof(struct module_info32) <= bufsize) { + struct module_info32 info; + info.addr = (unsigned long)mod; + info.size = mod->size; + info.flags = mod->flags; + info.usecount = + ((mod_member_present(mod, can_unload) + && mod->can_unload) + ? -1 : atomic_read(&mod->uc.usecount)); + + if (copy_to_user(buf, &info, sizeof(struct module_info32))) + return -EFAULT; + } else + error = -ENOSPC; + + if (put_user(sizeof(struct module_info32), ret)) + return -EFAULT; + + return error; +} + +asmlinkage int sys32_query_module(char *name_user, int which, char *buf, __kernel_size_t32 bufsize, u32 ret) +{ + struct module *mod; + int err; + + lock_kernel(); + if (name_user == 0) { + /* This finds "kernel_module" which is not exported. */ + for(mod = module_list; mod->next != NULL; mod = mod->next) + ; + } else { + long namelen; + char *name; + + if ((namelen = get_mod_name(name_user, &name)) < 0) { + err = namelen; + goto out; + } + err = -ENOENT; + if (namelen == 0) { + /* This finds "kernel_module" which is not exported. */ + for(mod = module_list; mod->next != NULL; mod = mod->next) + ; + } else if ((mod = find_module(name)) == NULL) { + put_mod_name(name); + goto out; + } + put_mod_name(name); + } + + switch (which) + { + case 0: + err = 0; + break; + case QM_MODULES: + err = qm_modules(buf, bufsize, (__kernel_size_t32 *)AA(ret)); + break; + case QM_DEPS: + err = qm_deps(mod, buf, bufsize, (__kernel_size_t32 *)AA(ret)); + break; + case QM_REFS: + err = qm_refs(mod, buf, bufsize, (__kernel_size_t32 *)AA(ret)); + break; + case QM_SYMBOLS: + err = qm_symbols(mod, buf, bufsize, (__kernel_size_t32 *)AA(ret)); + break; + case QM_INFO: + err = qm_info(mod, buf, bufsize, (__kernel_size_t32 *)AA(ret)); + break; + default: + err = -EINVAL; + break; + } +out: + unlock_kernel(); + return err; +} + +struct kernel_sym32 { + u32 value; + char name[60]; +}; + extern asmlinkage int sys_get_kernel_syms(struct kernel_sym *table); asmlinkage int sys32_get_kernel_syms(struct kernel_sym32 *table) { - int len, i; - struct kernel_sym *tbl; - mm_segment_t old_fs; - - len = sys_get_kernel_syms(NULL); - if (!table) return len; - tbl = kmalloc (len * sizeof (struct kernel_sym), GFP_KERNEL); - if (!tbl) return -ENOMEM; - old_fs = get_fs(); - set_fs (KERNEL_DS); - sys_get_kernel_syms(tbl); - set_fs (old_fs); - for (i = 0; i < len; i++, table++) { - if (put_user (tbl[i].value, &table->value) || - copy_to_user (table->name, tbl[i].name, 60)) - break; - } - kfree (tbl); - return i; + int len, i; + struct kernel_sym *tbl; + mm_segment_t old_fs; + + len = sys_get_kernel_syms(NULL); + if (!table) return len; + tbl = kmalloc (len * sizeof (struct kernel_sym), GFP_KERNEL); + if (!tbl) return -ENOMEM; + old_fs = get_fs(); + set_fs (KERNEL_DS); + sys_get_kernel_syms(tbl); + set_fs (old_fs); + for (i = 0; i < len; i++, table++) { + if (put_user (tbl[i].value, &table->value) || + copy_to_user (table->name, tbl[i].name, 60)) + break; + } + kfree (tbl); + return i; } #else /* CONFIG_MODULES */ @@ -3161,10 +3504,10 @@ return -ENOSYS; } -asmlinkage long +asmlinkage int sys32_get_kernel_syms(struct kernel_sym *table) { return -ENOSYS; } -#endif /* CONFIG_MODULES */ +#endif /* CONFIG_MODULES */ diff -urN linux-2.4.28-bk3/arch/mips64/kernel/mips64_ksyms.c linux-2.4.28-bk4/arch/mips64/kernel/mips64_ksyms.c --- linux-2.4.28-bk3/arch/mips64/kernel/mips64_ksyms.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips64/kernel/mips64_ksyms.c 2004-11-23 02:49:27.467395056 -0800 @@ -53,10 +53,15 @@ EXPORT_SYMBOL_NOVERS(memset); EXPORT_SYMBOL_NOVERS(memcpy); EXPORT_SYMBOL_NOVERS(memmove); +EXPORT_SYMBOL_NOVERS(memscan); +EXPORT_SYMBOL_NOVERS(strcpy); +EXPORT_SYMBOL_NOVERS(strncpy); EXPORT_SYMBOL_NOVERS(strcat); EXPORT_SYMBOL_NOVERS(strchr); +EXPORT_SYMBOL_NOVERS(strncmp); EXPORT_SYMBOL_NOVERS(strlen); EXPORT_SYMBOL_NOVERS(strncat); +EXPORT_SYMBOL_NOVERS(strcmp); EXPORT_SYMBOL_NOVERS(strnlen); EXPORT_SYMBOL_NOVERS(strrchr); EXPORT_SYMBOL_NOVERS(strtok); diff -urN linux-2.4.28-bk3/arch/mips64/kernel/proc.c linux-2.4.28-bk4/arch/mips64/kernel/proc.c --- linux-2.4.28-bk3/arch/mips64/kernel/proc.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips64/kernel/proc.c 2004-11-23 02:49:27.468395097 -0800 @@ -48,7 +48,6 @@ [CPU_R4640] "R4640", [CPU_NEVADA] "Nevada", [CPU_RM7000] "RM7000", - [CPU_RM9000] "RM9000", [CPU_R5432] "R5432", [CPU_4KC] "MIPS 4Kc", [CPU_5KC] "MIPS 5Kc", @@ -58,23 +57,27 @@ [CPU_TX3922] "TX3922", [CPU_TX3927] "TX3927", [CPU_AU1000] "Au1000", - [CPU_AU1500] "Au1500", [CPU_4KEC] "MIPS 4KEc", [CPU_4KSC] "MIPS 4KSc", [CPU_VR41XX] "NEC Vr41xx", [CPU_R5500] "R5500", [CPU_TX49XX] "TX49xx", + [CPU_AU1500] "Au1500", [CPU_20KC] "MIPS 20Kc", - [CPU_24K] "MIPS 24K", - [CPU_25KF] "MIPS 25Kf", [CPU_VR4111] "NEC VR4111", [CPU_VR4121] "NEC VR4121", [CPU_VR4122] "NEC VR4122", [CPU_VR4131] "NEC VR4131", - [CPU_VR4133] "NEC VR4133", [CPU_VR4181] "NEC VR4181", [CPU_VR4181A] "NEC VR4181A", - [CPU_SR71000] "Sandcraft SR71000" + [CPU_AU1100] "Au1100", + [CPU_SR71000] "Sandcraft SR71000", + [CPU_RM9000] "RM9000", + [CPU_25KF] "MIPS 25Kf", + [CPU_VR4133] "NEC VR4133", + [CPU_AU1550] "Au1550", + [CPU_24K] "MIPS 24K", + [CPU_AU1200] "Au1200", }; @@ -116,7 +119,7 @@ cpu_has_watch ? "yes" : "no"); sprintf(fmt, "VCE%%c exceptions\t\t: %s\n", - cpu_has_vce ? "%d" : "not available"); + cpu_has_vce ? "%u" : "not available"); seq_printf(m, fmt, 'D', vced_count); seq_printf(m, fmt, 'I', vcei_count); diff -urN linux-2.4.28-bk3/arch/mips64/kernel/scall_64.S linux-2.4.28-bk4/arch/mips64/kernel/scall_64.S --- linux-2.4.28-bk3/arch/mips64/kernel/scall_64.S 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips64/kernel/scall_64.S 2004-11-23 02:49:27.468395097 -0800 @@ -31,13 +31,15 @@ STI .set at #endif - ld t1, PT_EPC(sp) # skip syscall on return subu t0, v0, __NR_64_Linux # check syscall number sltiu t0, t0, __NR_64_Linux_syscalls + 1 +#if !defined(CONFIG_MIPS32_O32) && !defined(CONFIG_MIPS32_N32) + ld t1, PT_EPC(sp) # skip syscall on return daddiu t1, 4 # skip to next instruction - beqz t0, illegal_syscall sd t1, PT_EPC(sp) +#endif + beqz t0, illegal_syscall dsll t0, v0, 3 # offset into table ld t2, (sys_call_table - (__NR_64_Linux * 8))(t0) # syscall routine diff -urN linux-2.4.28-bk3/arch/mips64/kernel/scall_n32.S linux-2.4.28-bk4/arch/mips64/kernel/scall_n32.S --- linux-2.4.28-bk3/arch/mips64/kernel/scall_n32.S 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips64/kernel/scall_n32.S 2004-11-23 02:49:27.469395138 -0800 @@ -35,13 +35,16 @@ STI .set at #endif - ld t1, PT_EPC(sp) # skip syscall on return subu t0, v0, __NR_N32_Linux # check syscall number sltiu t0, t0, __NR_N32_Linux_syscalls + 1 + +#ifndef CONFIG_MIPS32_O32 + ld t1, PT_EPC(sp) # skip syscall on return daddiu t1, 4 # skip to next instruction - beqz t0, not_n32_scall sd t1, PT_EPC(sp) +#endif + beqz t0, not_n32_scall dsll t0, v0, 3 # offset into table ld t2, (sysn32_call_table - (__NR_N32_Linux * 8))(t0) @@ -300,11 +303,11 @@ PTR sys_reboot PTR sys_sethostname /* 6165 */ PTR sys_setdomainname - PTR sys_create_module - PTR sys_init_module - PTR sys_delete_module - PTR sys_get_kernel_syms /* 6170 */ - PTR sys_query_module + PTR sys32_create_module + PTR sys32_init_module + PTR sys32_delete_module + PTR sys32_get_kernel_syms /* 6170 */ + PTR sys32_query_module PTR sys_quotactl PTR sys_nfsservctl PTR sys_ni_syscall /* res. for getpmsg */ diff -urN linux-2.4.28-bk3/arch/mips64/kernel/scall_o32.S linux-2.4.28-bk4/arch/mips64/kernel/scall_o32.S --- linux-2.4.28-bk3/arch/mips64/kernel/scall_o32.S 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips64/kernel/scall_o32.S 2004-11-23 02:49:27.469395138 -0800 @@ -33,8 +33,8 @@ subu t0, v0, __NR_O32_Linux # check syscall number sltiu t0, t0, __NR_O32_Linux_syscalls + 1 daddiu t1, 4 # skip to next instruction - beqz t0, not_o32_scall sd t1, PT_EPC(sp) + beqz t0, not_o32_scall #if 0 SAVE_ALL move a1, v0 @@ -451,9 +451,9 @@ sys sys32_adjtimex 1 sys sys_mprotect 3 /* 4125 */ sys sys32_sigprocmask 3 - sys sys_create_module 2 - sys sys_init_module 5 - sys sys_delete_module 1 + sys sys32_create_module 2 + sys sys32_init_module 5 + sys sys32_delete_module 1 sys sys32_get_kernel_syms 1 /* 4130 */ sys sys_quotactl 0 sys sys_getpgid 1 @@ -511,7 +511,7 @@ sys sys_socketpair 4 sys sys_setresuid 3 /* 4185 */ sys sys_getresuid 3 - sys sys_query_module 5 + sys sys32_query_module 5 sys sys_poll 3 sys sys_nfsservctl 3 sys sys_setresgid 3 /* 4190 */ diff -urN linux-2.4.28-bk3/arch/mips64/kernel/semaphore.c linux-2.4.28-bk4/arch/mips64/kernel/semaphore.c --- linux-2.4.28-bk3/arch/mips64/kernel/semaphore.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips64/kernel/semaphore.c 2004-11-23 02:49:27.470395178 -0800 @@ -8,7 +8,7 @@ #include #include -#ifdef CONFIG_CPU_HAS_LLDSCD +#ifndef CONFIG_CPU_HAS_LLDSCD /* * On machines without lld/scd we need a spinlock to make the manipulation of * sem->count and sem->waking atomic. Scalability isn't an issue because diff -urN linux-2.4.28-bk3/arch/mips64/kernel/setup.c linux-2.4.28-bk4/arch/mips64/kernel/setup.c --- linux-2.4.28-bk3/arch/mips64/kernel/setup.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips64/kernel/setup.c 2004-11-23 02:49:27.470395178 -0800 @@ -41,6 +41,7 @@ #include struct cpuinfo_mips cpu_data[NR_CPUS]; +EXPORT_SYMBOL(cpu_data); #ifdef CONFIG_VT struct screen_info screen_info; diff -urN linux-2.4.28-bk3/arch/mips64/kernel/signal.c linux-2.4.28-bk4/arch/mips64/kernel/signal.c --- linux-2.4.28-bk3/arch/mips64/kernel/signal.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips64/kernel/signal.c 2004-11-23 02:49:27.471395219 -0800 @@ -265,7 +265,7 @@ sp -= 32; /* This is the X/Open sanctioned signal stack switching. */ - if ((ka->sa.sa_flags & SA_ONSTACK) && ! on_sig_stack(sp)) + if ((ka->sa.sa_flags & SA_ONSTACK) && (sas_ss_flags (sp) == 0)) sp = current->sas_ss_sp + current->sas_ss_size; return (void *)((sp - frame_size) & ALMASK); diff -urN linux-2.4.28-bk3/arch/mips64/kernel/signal32.c linux-2.4.28-bk4/arch/mips64/kernel/signal32.c --- linux-2.4.28-bk3/arch/mips64/kernel/signal32.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips64/kernel/signal32.c 2004-11-23 02:49:27.472395260 -0800 @@ -67,6 +67,71 @@ int ss_flags; } stack32_t; +typedef union sigval32 { + int sival_int; + s32 sival_ptr; +} sigval_t32; + +#define SI_PAD_SIZE32 ((SI_MAX_SIZE/sizeof(int)) - 3) + +typedef struct siginfo32 { + int si_signo; + int si_code; + int si_errno; + + union { + int _pad[SI_PAD_SIZE32]; + + /* kill() */ + struct { + __kernel_pid_t32 _pid; /* sender's pid */ + __kernel_uid_t32 _uid; /* sender's uid */ + } _kill; + + /* SIGCHLD */ + struct { + __kernel_pid_t32 _pid; /* which child */ + __kernel_uid_t32 _uid; /* sender's uid */ + int _status; /* exit code */ + __kernel_clock_t32 _utime; + __kernel_clock_t32 _stime; + } _sigchld; + + /* IRIX SIGCHLD */ + struct { + __kernel_pid_t32 _pid; /* which child */ + __kernel_clock_t32 _utime; + int _status; /* exit code */ + __kernel_clock_t32 _stime; + } _irix_sigchld; + + /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */ + struct { + s32 _addr; /* faulting insn/memory ref. */ + } _sigfault; + + /* SIGPOLL, SIGXFSZ (To do ...) */ + struct { + int _band; /* POLL_IN, POLL_OUT, POLL_MSG */ + int _fd; + } _sigpoll; + + /* POSIX.1b timers */ + struct { + unsigned int _timer1; + unsigned int _timer2; + } _timer; + + /* POSIX.1b signals */ + struct { + __kernel_pid_t32 _pid; /* sender's pid */ + __kernel_uid_t32 _uid; /* sender's uid */ + sigval_t32 _sigval; + } _rt; + + } _sifields; +} siginfo_t32; + struct ucontext32 { u32 uc_flags; s32 uc_link; @@ -510,7 +575,7 @@ sp -= 32; /* This is the X/Open sanctioned signal stack switching. */ - if ((ka->sa.sa_flags & SA_ONSTACK) && ! on_sig_stack(sp)) + if ((ka->sa.sa_flags & SA_ONSTACK) && (sas_ss_flags (sp) == 0)) sp = current->sas_ss_sp + current->sas_ss_size; return (void *)((sp - frame_size) & ALMASK); diff -urN linux-2.4.28-bk3/arch/mips64/kernel/signal_n32.c linux-2.4.28-bk4/arch/mips64/kernel/signal_n32.c --- linux-2.4.28-bk3/arch/mips64/kernel/signal_n32.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips64/kernel/signal_n32.c 2004-11-23 02:49:27.472395260 -0800 @@ -138,7 +138,7 @@ sp -= 32; /* This is the X/Open sanctioned signal stack switching. */ - if ((ka->sa.sa_flags & SA_ONSTACK) && ! on_sig_stack(sp)) + if ((ka->sa.sa_flags & SA_ONSTACK) && (sas_ss_flags (sp) == 0)) sp = current->sas_ss_sp + current->sas_ss_size; return (void *)((sp - frame_size) & ALMASK); diff -urN linux-2.4.28-bk3/arch/mips64/kernel/smp.c linux-2.4.28-bk4/arch/mips64/kernel/smp.c --- linux-2.4.28-bk3/arch/mips64/kernel/smp.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips64/kernel/smp.c 2004-11-23 02:49:27.473395301 -0800 @@ -52,6 +52,9 @@ int __cpu_logical_map[NR_CPUS]; cycles_t cacheflush_time; +EXPORT_SYMBOL(__cpu_number_map); +EXPORT_SYMBOL(__cpu_logical_map); + void __init smp_callin(void) { #if 0 @@ -110,6 +113,7 @@ spin_lock(&smp_call_lock); call_data = &data; + wmb(); /* Send a message to all other CPUs and wait for them to respond */ for (i = 0; i < smp_num_cpus; i++) @@ -283,7 +287,6 @@ EXPORT_SYMBOL(smp_num_cpus); EXPORT_SYMBOL(flush_tlb_page); -EXPORT_SYMBOL(cpu_data); EXPORT_SYMBOL(synchronize_irq); EXPORT_SYMBOL(kernel_flag); EXPORT_SYMBOL(__global_sti); diff -urN linux-2.4.28-bk3/arch/mips64/kernel/syscall.c linux-2.4.28-bk4/arch/mips64/kernel/syscall.c --- linux-2.4.28-bk3/arch/mips64/kernel/syscall.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips64/kernel/syscall.c 2004-11-23 02:49:27.474395341 -0800 @@ -34,7 +34,7 @@ extern asmlinkage void syscall_trace(void); -asmlinkage int sys_pipe(abi64_no_regargs, struct pt_regs regs) +asmlinkage int sys_pipe(abi64_no_regargs, volatile struct pt_regs regs) { int fd[2]; int error, res; @@ -61,6 +61,9 @@ { struct vm_area_struct * vmm; int do_color_align; + unsigned long task_size; + + task_size = (current->thread.mflags & MF_32BIT_ADDR) ? TASK_SIZE32 : TASK_SIZE; if (flags & MAP_FIXED) { /* @@ -72,7 +75,7 @@ return addr; } - if (len > TASK_SIZE) + if (len > task_size) return -ENOMEM; do_color_align = 0; if (filp || (flags & MAP_SHARED)) @@ -83,7 +86,7 @@ else addr = PAGE_ALIGN(addr); vmm = find_vma(current->mm, addr); - if (TASK_SIZE - len >= addr && + if (task_size - len >= addr && (!vmm || addr + len <= vmm->vm_start)) return addr; } @@ -95,7 +98,7 @@ for (vmm = find_vma(current->mm, addr); ; vmm = vmm->vm_next) { /* At this point: (!vmm || addr < vmm->vm_end). */ - if (TASK_SIZE - len < addr) + if (task_size - len < addr) return -ENOMEM; if (!vmm || addr + len <= vmm->vm_start) return addr; diff -urN linux-2.4.28-bk3/arch/mips64/kernel/time.c linux-2.4.28-bk4/arch/mips64/kernel/time.c --- linux-2.4.28-bk3/arch/mips64/kernel/time.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips64/kernel/time.c 2004-11-23 02:49:27.474395341 -0800 @@ -1,7 +1,7 @@ /* * Copyright 2001 MontaVista Software Inc. * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net - * Copyright (c) 2003 Maciej W. Rozycki + * Copyright (c) 2003, 2004 Maciej W. Rozycki * * Common time service routines for MIPS machines. See * Documentation/mips/time.README. @@ -26,6 +26,7 @@ #include #include +#include #include #include #include @@ -242,7 +243,7 @@ __asm__("multu %1,%2" : "=h" (res) : "r" (count), "r" (sll32_usecs_per_cycle) - : "lo", "accum"); + : "lo", GCC_REG_ACCUM); /* * Due to possible jiffies inconsistencies, we need to check @@ -297,7 +298,7 @@ __asm__("multu %1,%2" : "=h" (res) : "r" (count), "r" (quotient) - : "lo", "accum"); + : "lo", GCC_REG_ACCUM); /* * Due to possible jiffies inconsistencies, we need to check @@ -339,7 +340,7 @@ : "r" (timerhi), "m" (timerlo), "r" (tmp), "r" (USECS_PER_JIFFY), "r" (USECS_PER_JIFFY_FRAC) - : "hi", "lo", "accum"); + : "hi", "lo", GCC_REG_ACCUM); cached_quotient = quotient; } } @@ -353,7 +354,7 @@ __asm__("multu %1,%2" : "=h" (res) : "r" (count), "r" (quotient) - : "lo", "accum"); + : "lo", GCC_REG_ACCUM); /* * Due to possible jiffies inconsistencies, we need to check diff -urN linux-2.4.28-bk3/arch/mips64/kernel/traps.c linux-2.4.28-bk4/arch/mips64/kernel/traps.c --- linux-2.4.28-bk3/arch/mips64/kernel/traps.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips64/kernel/traps.c 2004-11-23 02:49:27.475395382 -0800 @@ -9,7 +9,7 @@ * Copyright (C) 1999 Silicon Graphics, Inc. * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com * Copyright (C) 2000, 01 MIPS Technologies, Inc. - * Copyright (C) 2002, 2003 Maciej W. Rozycki + * Copyright (C) 2002, 2003, 2004 Maciej W. Rozycki */ #include #include @@ -22,6 +22,7 @@ #include #include +#include #include #include #include @@ -362,7 +363,7 @@ int action = MIPS_BE_FATAL; if (data && !user_mode(regs)) - fixup = search_dbe_table(regs->cp0_epc); + fixup = search_dbe_table(exception_epc(regs)); if (fixup) action = MIPS_BE_FIXUP; @@ -606,9 +607,12 @@ /* * There is the ancient bug in the MIPS assemblers that the break * code starts left to bit 16 instead to bit 6 in the opcode. - * Gas is bug-compatible ... + * Gas is bug-compatible, but not always, grrr... + * We handle both cases with a simple heuristics. --macro */ - bcode = ((opcode >> 16) & ((1 << 20) - 1)); + bcode = ((opcode >> 6) & ((1 << 20) - 1)); + if (bcode < (1 << 10)) + bcode <<= 10; /* * (A short test says that IRIX 5.3 sends SIGTRAP for all break @@ -617,9 +621,9 @@ * But should we continue the brokenness??? --macro */ switch (bcode) { - case 6: - case 7: - if (bcode == 7) + case BRK_OVERFLOW << 10: + case BRK_DIVZERO << 10: + if (bcode == (BRK_DIVZERO << 10)) info.si_code = FPE_INTDIV; else info.si_code = FPE_INTOVF; @@ -643,7 +647,7 @@ /* Immediate versions don't provide a code. */ if (!(opcode & OPCODE)) - tcode = ((opcode >> 6) & ((1 << 20) - 1)); + tcode = ((opcode >> 6) & ((1 << 10) - 1)); /* * (A short test says that IRIX 5.3 sends SIGTRAP for all trap @@ -652,9 +656,9 @@ * But should we continue the brokenness??? --macro */ switch (tcode) { - case 6: - case 7: - if (tcode == 7) + case BRK_OVERFLOW: + case BRK_DIVZERO: + if (tcode == BRK_DIVZERO) info.si_code = FPE_INTDIV; else info.si_code = FPE_INTOVF; @@ -851,8 +855,7 @@ set_except_vector(i, handle_reserved); /* - * Only some CPUs have the watch exceptions or a dedicated - * interrupt vector. + * Only some CPUs have the watch exceptions. */ if (cpu_has_watch) set_except_vector(23, handle_watch); diff -urN linux-2.4.28-bk3/arch/mips64/ld.script.elf32.S linux-2.4.28-bk4/arch/mips64/ld.script.elf32.S --- linux-2.4.28-bk3/arch/mips64/ld.script.elf32.S 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips64/ld.script.elf32.S 2004-11-23 02:49:27.476395423 -0800 @@ -55,6 +55,8 @@ .fini : { *(.fini) } =0 .reginfo : { *(.reginfo) } + .options : { *(.options) } + .MIPS.options : { *(.MIPS.options) } /* Adjust the address for the data segment. We want to adjust up to the same address within the page on the next page up. It would be more correct to do this: diff -urN linux-2.4.28-bk3/arch/mips64/ld.script.elf64 linux-2.4.28-bk4/arch/mips64/ld.script.elf64 --- linux-2.4.28-bk3/arch/mips64/ld.script.elf64 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips64/ld.script.elf64 2004-11-23 02:49:27.476395423 -0800 @@ -64,6 +64,8 @@ .fini : { *(.fini) } =0 .reginfo : { *(.reginfo) } + .options : { *(.options) } + .MIPS.options : { *(.MIPS.options) } /* Adjust the address for the data segment. We want to adjust up to the same address within the page on the next page up. It would be more correct to do this: diff -urN linux-2.4.28-bk3/arch/mips64/lib/dump_tlb.c linux-2.4.28-bk4/arch/mips64/lib/dump_tlb.c --- linux-2.4.28-bk3/arch/mips64/lib/dump_tlb.c 2003-08-25 04:44:40.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips64/lib/dump_tlb.c 2004-11-23 02:49:27.477395464 -0800 @@ -201,12 +201,10 @@ { int i; - for(i = 0; i < 8; i++) { - printk("*%08lx == %08lx, ", - (unsigned long)p, (unsigned long)*p); + for (i = 0; i < 8; i++) { + printk("*%08lx == %08lx, ", (unsigned long)p, *p); p++; - printk("*%08lx == %08lx\n", - (unsigned long)p, (unsigned long)*p); + printk("*%08lx == %08lx\n", (unsigned long)p, *p); p++; } } diff -urN linux-2.4.28-bk3/arch/mips64/lib/strlen_user.S linux-2.4.28-bk4/arch/mips64/lib/strlen_user.S --- linux-2.4.28-bk3/arch/mips64/lib/strlen_user.S 2003-08-25 04:44:40.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips64/lib/strlen_user.S 2004-11-23 02:49:27.477395464 -0800 @@ -23,18 +23,18 @@ * Return 0 for error */ LEAF(__strlen_user_asm) - ld v0, THREAD_CURDS($28) # pointer ok? - and v0, a0 - bnez v0, fault + LONG_L v0, THREAD_CURDS($28) # pointer ok? + and v0, a0 + bnez v0, fault FEXPORT(__strlen_user_nocheck_asm) - move v0, a0 -1: EX(lb, ta0, (v0), fault) - daddiu v0, 1 - bnez ta0, 1b - dsubu v0, a0 - jr ra + move v0, a0 +1: EX(lb, t0, (v0), fault) + PTR_ADDIU v0, 1 + bnez t0, 1b + PTR_SUBU v0, a0 + jr ra END(__strlen_user_asm) -fault: move v0, zero - jr ra +fault: move v0, zero + jr ra diff -urN linux-2.4.28-bk3/arch/mips64/lib/strncpy_user.S linux-2.4.28-bk4/arch/mips64/lib/strncpy_user.S --- linux-2.4.28-bk3/arch/mips64/lib/strncpy_user.S 2003-08-25 04:44:40.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips64/lib/strncpy_user.S 2004-11-23 02:49:27.478395504 -0800 @@ -28,31 +28,31 @@ */ LEAF(__strncpy_from_user_asm) - ld v0, THREAD_CURDS($28) # pointer ok? - and v0, a1 - bnez v0, fault + LONG_L v0, THREAD_CURDS($28) # pointer ok? + and v0, a1 + bnez v0, fault FEXPORT(__strncpy_from_user_nocheck_asm) - move v0, zero - move v1, a1 - .set noreorder -1: EX(lbu, ta0, (v1), fault) - daddiu v1, 1 - beqz ta0, 2f - sb ta0, (a0) - daddiu v0, 1 - bne v0, a2, 1b - daddiu a0, 1 - .set reorder -2: daddu ta0, a1, v0 - xor ta0, a1 - bltz ta0, fault - jr ra # return n + move v0, zero + move v1, a1 + .set noreorder +1: EX(lbu, t0, (v1), fault) + PTR_ADDIU v1, 1 + beqz t0, 2f + sb t0, (a0) + PTR_ADDIU v0, 1 + bne v0, a2, 1b + PTR_ADDIU a0, 1 + .set reorder +2: PTR_ADDU t0, a1, v0 + xor t0, a1 + bltz t0, fault + jr ra # return n END(__strncpy_from_user_asm) -fault: li v0, -EFAULT - jr ra +fault: li v0, -EFAULT + jr ra .section __ex_table,"a" - PTR 1b, fault + PTR 1b, fault .previous diff -urN linux-2.4.28-bk3/arch/mips64/lib/strnlen_user.S linux-2.4.28-bk4/arch/mips64/lib/strnlen_user.S --- linux-2.4.28-bk3/arch/mips64/lib/strnlen_user.S 2003-08-25 04:44:40.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips64/lib/strnlen_user.S 2004-11-23 02:49:27.478395504 -0800 @@ -20,23 +20,29 @@ /* * Return the size of a string (including the ending 0) * - * Return 0 for error, len on string but at max a1 otherwise + * Return 0 for error, len of string but at max a1 otherwise + * + * Note: for performance reasons we deliberately accept that a user may + * make strlen_user and strnlen_user access the first few KSEG0 + * bytes. There's nothing secret there ... */ LEAF(__strnlen_user_asm) - ld v0, THREAD_CURDS($28) # pointer ok? - and v0, a0 - bnez v0, fault + LONG_L v0, THREAD_CURDS($28) # pointer ok? + and v0, a0 + bnez v0, fault FEXPORT(__strnlen_user_nocheck_asm) - move v0, a0 - daddu a1, a0 # stop pointer -1: beq v0, a1, 1f # limit reached? - EX(lb, ta0, (v0), fault) - daddiu v0, 1 - bnez ta0, 1b -1: dsubu v0, a0 - jr ra + move v0, a0 + PTR_ADDU a1, a0 # stop pointer + .set noreorder +1: beq v0, a1, 1f # limit reached? + PTR_ADDIU v0, 1 + .set reorder + EX(lb, t0, -1(v0), fault) + bnez t0, 1b +1: PTR_SUBU v0, a0 + jr ra END(__strnlen_user_asm) -fault: move v0, zero - jr ra +fault: move v0, zero + jr ra diff -urN linux-2.4.28-bk3/arch/mips64/mm/c-r4k.c linux-2.4.28-bk4/arch/mips64/mm/c-r4k.c --- linux-2.4.28-bk3/arch/mips64/mm/c-r4k.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips64/mm/c-r4k.c 2004-11-23 02:49:27.479395545 -0800 @@ -42,12 +42,13 @@ struct bcache_ops *bcops = &no_sc_ops; +#define cpu_is_r4600_v1_x() ((read_c0_prid() & 0xfffffff0) == 0x2010) +#define cpu_is_r4600_v2_x() ((read_c0_prid() & 0xfffffff0) == 0x2020) + #define R4600_HIT_CACHEOP_WAR_IMPL \ do { \ - if (R4600_V2_HIT_CACHEOP_WAR && \ - (read_c0_prid() & 0xfff0) == 0x2020) { /* R4600 V2.0 */\ + if (R4600_V2_HIT_CACHEOP_WAR && cpu_is_r4600_v2_x()) \ *(volatile unsigned long *)KSEG1; \ - } \ if (R4600_V1_HIT_CACHEOP_WAR) \ __asm__ __volatile__("nop;nop;nop;nop"); \ } while (0) @@ -104,6 +105,15 @@ #define CACHE32_UNROLL32_ALIGN JUMP_TO_ALIGN(10) /* 32 * 32 = 1024 */ #define CACHE32_UNROLL32_ALIGN2 JUMP_TO_ALIGN(11) +static inline void blast_r4600_v1_icache32(void) +{ + unsigned long flags; + + local_irq_save(flags); + blast_icache32(); + local_irq_restore(flags); +} + static inline void tx49_blast_icache32(void) { unsigned long start = KSEG0; @@ -125,6 +135,15 @@ cache32_unroll32(addr|ws,Index_Invalidate_I); } +static inline void blast_icache32_r4600_v1_page_indexed(unsigned long page) +{ + unsigned long flags; + + local_irq_save(flags); + blast_icache32_page_indexed(page); + local_irq_restore(flags); +} + static inline void tx49_blast_icache32_page_indexed(unsigned long page) { unsigned long start = page; @@ -168,11 +187,17 @@ if (ic_lsize == 16) r4k_blast_icache_page_indexed = blast_icache16_page_indexed; - else if (ic_lsize == 32 && TX49XX_ICACHE_INDEX_INV_WAR) - r4k_blast_icache_page_indexed = tx49_blast_icache32_page_indexed; - else if (ic_lsize == 32) - r4k_blast_icache_page_indexed = blast_icache32_page_indexed; - else if (ic_lsize == 64) + else if (ic_lsize == 32) { + if (TX49XX_ICACHE_INDEX_INV_WAR) + r4k_blast_icache_page_indexed = + tx49_blast_icache32_page_indexed; + else if (R4600_V1_INDEX_ICACHEOP_WAR && cpu_is_r4600_v1_x()) + r4k_blast_icache_page_indexed = + blast_icache32_r4600_v1_page_indexed; + else + r4k_blast_icache_page_indexed = + blast_icache32_page_indexed; + } else if (ic_lsize == 64) r4k_blast_icache_page_indexed = blast_icache64_page_indexed; } @@ -184,11 +209,14 @@ if (ic_lsize == 16) r4k_blast_icache = blast_icache16; - else if (ic_lsize == 32 && TX49XX_ICACHE_INDEX_INV_WAR) - r4k_blast_icache = tx49_blast_icache32; - else if (ic_lsize == 32) - r4k_blast_icache = blast_icache32; - else if (ic_lsize == 64) + else if (ic_lsize == 32) { + if (R4600_V1_INDEX_ICACHEOP_WAR && cpu_is_r4600_v1_x()) + r4k_blast_icache = blast_r4600_v1_icache32; + else if (TX49XX_ICACHE_INDEX_INV_WAR) + r4k_blast_icache = tx49_blast_icache32; + else if (ic_lsize == 32) + r4k_blast_icache = blast_icache32; + } else if (ic_lsize == 64) r4k_blast_icache = blast_icache64; } @@ -352,6 +380,7 @@ static void r4k_flush_icache_range(unsigned long start, unsigned long end) { unsigned long dc_lsize = current_cpu_data.dcache.linesz; + unsigned long ic_lsize = current_cpu_data.icache.linesz; unsigned long addr, aend; if (!cpu_has_ic_fills_f_dc) { @@ -374,14 +403,14 @@ if (end - start > icache_size) r4k_blast_icache(); else { - addr = start & ~(dc_lsize - 1); - aend = (end - 1) & ~(dc_lsize - 1); + addr = start & ~(ic_lsize - 1); + aend = (end - 1) & ~(ic_lsize - 1); while (1) { /* Hit_Invalidate_I */ protected_flush_icache_line(addr); if (addr == aend) break; - addr += dc_lsize; + addr += ic_lsize; } } } @@ -445,6 +474,9 @@ { unsigned long end, a; + /* Catch bad driver code */ + BUG_ON(size == 0); + if (cpu_has_subset_pcaches) { unsigned long sc_lsize = current_cpu_data.scache.linesz; @@ -492,6 +524,9 @@ { unsigned long end, a; + /* Catch bad driver code */ + BUG_ON(size == 0); + if (cpu_has_subset_pcaches) { unsigned long sc_lsize = current_cpu_data.scache.linesz; @@ -754,7 +789,10 @@ c->dcache.ways = 4; c->dcache.waybit = ffs(dcache_size / c->dcache.ways) - 1; - c->options |= MIPS_CPU_CACHE_CDEX_P | MIPS_CPU_PREFETCH; +#if !defined(CONFIG_SMP) || !defined(RM9000_CDEX_SMP_WAR) + c->options |= MIPS_CPU_CACHE_CDEX_P; +#endif + c->options |= MIPS_CPU_PREFETCH; break; default: @@ -852,7 +890,7 @@ cpu_has_vtag_icache ? "virtually tagged" : "physically tagged", way_string[c->icache.ways], c->icache.linesz); - printk("Primary data cache %ldkB %s, linesize %d bytes.\n", + printk("Primary data cache %ldkB, %s, linesize %d bytes.\n", dcache_size >> 10, way_string[c->dcache.ways], c->dcache.linesz); } @@ -937,10 +975,8 @@ * Linux memory managment. */ switch (c->cputype) { - case CPU_R4000PC: case CPU_R4000SC: case CPU_R4000MC: - case CPU_R4400PC: case CPU_R4400SC: case CPU_R4400MC: probe_scache_kseg1 = (probe_func_t) (KSEG1ADDR(&probe_scache)); diff -urN linux-2.4.28-bk3/arch/mips64/mm/c-sb1.c linux-2.4.28-bk4/arch/mips64/mm/c-sb1.c --- linux-2.4.28-bk3/arch/mips64/mm/c-sb1.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips64/mm/c-sb1.c 2004-11-23 02:49:27.480395586 -0800 @@ -2,6 +2,7 @@ * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com) * Copyright (C) 1997, 2001 Ralf Baechle (ralf@gnu.org) * Copyright (C) 2000, 2001, 2002, 2003 Broadcom Corporation + * Copyright (C) 2004 Maciej W. Rozycki * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -31,17 +32,17 @@ static unsigned long icache_size; static unsigned long dcache_size; -static unsigned long icache_line_size; -static unsigned long dcache_line_size; +static unsigned short icache_line_size; +static unsigned short dcache_line_size; static unsigned int icache_index_mask; static unsigned int dcache_index_mask; -static unsigned long icache_assoc; -static unsigned long dcache_assoc; +static unsigned short icache_assoc; +static unsigned short dcache_assoc; -static unsigned int icache_sets; -static unsigned int dcache_sets; +static unsigned short icache_sets; +static unsigned short dcache_sets; static unsigned int icache_range_cutoff; static unsigned int dcache_range_cutoff; @@ -231,8 +232,8 @@ local_sb1_flush_cache_page(vma, addr); } #else -void sb1_flush_cache_page(struct vm_area_struct *vma, unsigned long addr); -asm("sb1_flush_cache_page = local_sb1_flush_cache_page"); +void sb1_flush_cache_page(struct vm_area_struct *vma, unsigned long addr) + __attribute__((alias("local_sb1_flush_cache_page"))); #endif /* @@ -280,8 +281,8 @@ } #ifdef CONFIG_SMP -extern void sb1___flush_cache_all_ipi(void *ignored); -asm("sb1___flush_cache_all_ipi = local_sb1___flush_cache_all"); +void sb1___flush_cache_all_ipi(void *ignored) + __attribute__((alias("local_sb1___flush_cache_all"))); static void sb1___flush_cache_all(void) { @@ -289,8 +290,8 @@ local_sb1___flush_cache_all(); } #else -extern void sb1___flush_cache_all(void); -asm("sb1___flush_cache_all = local_sb1___flush_cache_all"); +void sb1___flush_cache_all(void) + __attribute__((alias("local_sb1___flush_cache_all"))); #endif /* @@ -340,8 +341,8 @@ local_sb1_flush_icache_range(start, end); } #else -void sb1_flush_icache_range(unsigned long start, unsigned long end); -asm("sb1_flush_icache_range = local_sb1_flush_icache_range"); +void sb1_flush_icache_range(unsigned long start, unsigned long end) + __attribute__((alias("local_sb1_flush_icache_range"))); #endif /* @@ -398,8 +399,8 @@ local_sb1_flush_icache_page(vma, page); } #else -void sb1_flush_icache_page(struct vm_area_struct *vma, struct page *page); -asm("sb1_flush_icache_page = local_sb1_flush_icache_page"); +void sb1_flush_icache_page(struct vm_area_struct *vma, struct page *page) + __attribute__((alias("local_sb1_flush_icache_page"))); #endif /* @@ -447,8 +448,8 @@ smp_call_function(sb1_flush_cache_sigtramp_ipi, (void *) addr, 1, 1); } #else -void sb1_flush_cache_sigtramp(unsigned long addr); -asm("sb1_flush_cache_sigtramp = local_sb1_flush_cache_sigtramp"); +void sb1_flush_cache_sigtramp(unsigned long addr) + __attribute__((alias("local_sb1_flush_cache_sigtramp"))); #endif @@ -516,6 +517,11 @@ * 9:7 Dcache Associativity */ +static char *way_string[] = { + "direct mapped", "2-way", "3-way", "4-way", + "5-way", "6-way", "7-way", "8-way", +}; + static __init void probe_cache_sizes(void) { u32 config1; @@ -540,6 +546,13 @@ */ icache_range_cutoff = icache_sets * icache_line_size; dcache_range_cutoff = (dcache_sets / 2) * icache_line_size; + + printk("Primary instruction cache %ldkB, %s, linesize %d bytes.\n", + icache_size >> 10, way_string[icache_assoc - 1], + icache_line_size); + printk("Primary data cache %ldkB, %s, linesize %d bytes.\n", + dcache_size >> 10, way_string[dcache_assoc - 1], + dcache_line_size); } /* diff -urN linux-2.4.28-bk3/arch/mips64/mm/pg-r4k.c linux-2.4.28-bk4/arch/mips64/mm/pg-r4k.c --- linux-2.4.28-bk3/arch/mips64/mm/pg-r4k.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips64/mm/pg-r4k.c 2004-11-23 02:49:27.482395667 -0800 @@ -3,7 +3,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 2003 Ralf Baechle (ralf@linux-mips.org) + * Copyright (C) 2003, 2004 Ralf Baechle (ralf@linux-mips.org) */ #include #include @@ -11,6 +11,7 @@ #include #include #include +#include #include #include @@ -25,28 +26,30 @@ #include #include +#define half_scache_line_size() (cpu_scache_line_size() >> 1) + /* * Maximum sizes: * - * R4000 16 bytes D-cache, 128 bytes S-cache: 0x78 bytes - * R4600 v1.7: 0x5c bytes - * R4600 v2.0: 0x60 bytes - * With prefetching, 16 byte strides 0xa0 bytes + * R4000 128 bytes S-cache: 0x58 bytes + * R4600 v1.7: 0x5c bytes + * R4600 v2.0: 0x60 bytes + * With prefetching, 16 byte strides 0xa0 bytes */ -static unsigned int clear_page_array[0xa0 / 4]; +static unsigned int clear_page_array[0x130 / 4]; void clear_page(void * page) __attribute__((alias("clear_page_array"))); /* * Maximum sizes: * - * R4000 16 bytes D-cache, 128 bytes S-cache: 0xbc bytes - * R4600 v1.7: 0x80 bytes - * R4600 v2.0: 0x84 bytes - * With prefetching, 16 byte strides 0xb8 bytes + * R4000 128 bytes S-cache: 0x11c bytes + * R4600 v1.7: 0x080 bytes + * R4600 v2.0: 0x07c bytes + * With prefetching, 16 byte strides 0x0b8 bytes */ -static unsigned int copy_page_array[0xb8 / 4]; +static unsigned int copy_page_array[0x148 / 4]; void copy_page(void *to, void *from) __attribute__((alias("copy_page_array"))); @@ -67,12 +70,58 @@ static unsigned int pref_src_mode __initdata; static unsigned int pref_dst_mode __initdata; -static int has_scache __initdata = 0; -static int load_offset __initdata = 0; -static int store_offset __initdata = 0; +static int load_offset __initdata; +static int store_offset __initdata; static unsigned int __initdata *dest, *epc; +static unsigned int instruction_pending; +static union mips_instruction delayed_mi; + +static void __init emit_instruction(union mips_instruction mi) +{ + if (instruction_pending) + *epc++ = delayed_mi.word; + + instruction_pending = 1; + delayed_mi = mi; +} + +static inline void flush_delay_slot_or_nop(void) +{ + if (instruction_pending) { + *epc++ = delayed_mi.word; + instruction_pending = 0; + return; + } + + *epc++ = 0; +} + +static inline unsigned int *label(void) +{ + if (instruction_pending) { + *epc++ = delayed_mi.word; + instruction_pending = 0; + } + + return epc; +} + +static inline void build_insn_word(unsigned int word) +{ + union mips_instruction mi; + + mi.word = word; + + emit_instruction(mi); +} + +static inline void build_nop(void) +{ + build_insn_word(0); /* nop */ +} + static inline void build_src_pref(int advance) { if (!(load_offset & (cpu_dcache_line_size() - 1))) { @@ -83,25 +132,28 @@ mi.i_format.rt = pref_src_mode; mi.i_format.simmediate = load_offset + advance; - *epc++ = mi.word; + emit_instruction(mi); } } static inline void __build_load_reg(int reg) { union mips_instruction mi; + unsigned int width; - if (cpu_has_64bit_registers) + if (cpu_has_64bit_registers) { mi.i_format.opcode = ld_op; - else + width = 8; + } else { mi.i_format.opcode = lw_op; + width = 4; + } mi.i_format.rs = 5; /* $a1 */ - mi.i_format.rt = reg; /* $zero */ + mi.i_format.rt = reg; /* $reg */ mi.i_format.simmediate = load_offset; - load_offset += (cpu_has_64bit_registers ? 8 : 4); - - *epc++ = mi.word; + load_offset += width; + emit_instruction(mi); } static inline void build_load_reg(int reg) @@ -122,87 +174,71 @@ mi.i_format.rt = pref_dst_mode; mi.i_format.simmediate = store_offset + advance; - *epc++ = mi.word; + emit_instruction(mi); } } -static inline void build_cdex(void) +static inline void build_cdex_s(void) { union mips_instruction mi; - if (cpu_has_cache_cdex_s && - !(store_offset & (cpu_scache_line_size() - 1))) { + if ((store_offset & (cpu_scache_line_size() - 1))) + return; - mi.c_format.opcode = cache_op; - mi.c_format.rs = 4; /* $a0 */ - mi.c_format.c_op = 3; /* Create Dirty Exclusive */ - mi.c_format.cache = 3; /* Secondary Data Cache */ - mi.c_format.simmediate = store_offset; + mi.c_format.opcode = cache_op; + mi.c_format.rs = 4; /* $a0 */ + mi.c_format.c_op = 3; /* Create Dirty Exclusive */ + mi.c_format.cache = 3; /* Secondary Data Cache */ + mi.c_format.simmediate = store_offset; - *epc++ = mi.word; - } + emit_instruction(mi); +} + +static inline void build_cdex_p(void) +{ + union mips_instruction mi; if (store_offset & (cpu_dcache_line_size() - 1)) return; if (R4600_V1_HIT_CACHEOP_WAR && ((read_c0_prid() & 0xfff0) == 0x2010)) { - *epc++ = 0; /* nop */ - *epc++ = 0; /* nop */ - *epc++ = 0; /* nop */ - *epc++ = 0; /* nop */ + build_nop(); + build_nop(); + build_nop(); + build_nop(); } + if (R4600_V2_HIT_CACHEOP_WAR && ((read_c0_prid() & 0xfff0) == 0x2020)) + build_insn_word(0x8c200000); /* lw $zero, ($at) */ + mi.c_format.opcode = cache_op; mi.c_format.rs = 4; /* $a0 */ mi.c_format.c_op = 3; /* Create Dirty Exclusive */ mi.c_format.cache = 1; /* Data Cache */ mi.c_format.simmediate = store_offset; - *epc++ = mi.word; + emit_instruction(mi); } -static inline void __build_store_zero_reg(void) +static void __build_store_reg(int reg) { union mips_instruction mi; + unsigned int width; - if (cpu_has_64bits) + if (cpu_has_64bit_gp_regs || + (cpu_has_64bit_zero_reg && reg == 0)) { mi.i_format.opcode = sd_op; - else - mi.i_format.opcode = sw_op; - mi.i_format.rs = 4; /* $a0 */ - mi.i_format.rt = 0; /* $zero */ - mi.i_format.simmediate = store_offset; - - store_offset += (cpu_has_64bits ? 8 : 4); - - *epc++ = mi.word; -} - -static inline void __build_store_reg(int reg) -{ - union mips_instruction mi; - int reg_size; - -#ifdef CONFIG_MIPS32 - if (cpu_has_64bit_registers && reg == 0) { - mi.i_format.opcode = sd_op; - reg_size = 8; + width = 8; } else { mi.i_format.opcode = sw_op; - reg_size = 4; + width = 4; } -#endif -#ifdef CONFIG_MIPS64 - mi.i_format.opcode = sd_op; - reg_size = 8; -#endif mi.i_format.rs = 4; /* $a0 */ - mi.i_format.rt = reg; /* $zero */ + mi.i_format.rt = reg; /* $reg */ mi.i_format.simmediate = store_offset; - store_offset += reg_size; - - *epc++ = mi.word; + store_offset += width; + emit_instruction(mi); } static inline void build_store_reg(int reg) @@ -212,13 +248,15 @@ build_dst_pref(pref_offset_copy); else build_dst_pref(pref_offset_clear); + else if (cpu_has_cache_cdex_s) + build_cdex_s(); else if (cpu_has_cache_cdex_p) - build_cdex(); + build_cdex_p(); __build_store_reg(reg); } -static inline void build_addiu_at_a0(unsigned long offset) +static inline void build_addiu_a2_a0(unsigned long offset) { union mips_instruction mi; @@ -226,10 +264,10 @@ mi.i_format.opcode = cpu_has_64bit_addresses ? daddiu_op : addiu_op; mi.i_format.rs = 4; /* $a0 */ - mi.i_format.rt = 1; /* $at */ + mi.i_format.rt = 6; /* $a2 */ mi.i_format.simmediate = offset; - *epc++ = mi.word; + emit_instruction(mi); } static inline void build_addiu_a1(unsigned long offset) @@ -245,7 +283,7 @@ load_offset -= offset; - *epc++ = mi.word; + emit_instruction(mi); } static inline void build_addiu_a0(unsigned long offset) @@ -261,7 +299,7 @@ store_offset -= offset; - *epc++ = mi.word; + emit_instruction(mi); } static inline void build_bne(unsigned int *dest) @@ -269,16 +307,12 @@ union mips_instruction mi; mi.i_format.opcode = bne_op; - mi.i_format.rs = 1; /* $at */ + mi.i_format.rs = 6; /* $a2 */ mi.i_format.rt = 4; /* $a0 */ mi.i_format.simmediate = dest - epc - 1; *epc++ = mi.word; -} - -static inline void build_nop(void) -{ - *epc++ = 0; + flush_delay_slot_or_nop(); } static inline void build_jr_ra(void) @@ -293,19 +327,34 @@ mi.r_format.func = jr_op; *epc++ = mi.word; + flush_delay_slot_or_nop(); } void __init build_clear_page(void) { + unsigned int loop_start; + epc = (unsigned int *) &clear_page_array; + instruction_pending = 0; + store_offset = 0; if (cpu_has_prefetch) { switch (current_cpu_data.cputype) { + case CPU_RM9000: + /* + * As a workaround for erratum G105 which make the + * PrepareForStore hint unusable we fall back to + * StoreRetained on the RM9000. Once it is known which + * versions of the RM9000 we'll be able to condition- + * alize this. + */ + case CPU_R10000: case CPU_R12000: pref_src_mode = Pref_LoadStreamed; pref_dst_mode = Pref_StoreRetained; break; + default: pref_src_mode = Pref_LoadStreamed; pref_dst_mode = Pref_PrepareForStore; @@ -313,64 +362,50 @@ } } - build_addiu_at_a0(PAGE_SIZE - (cpu_has_prefetch ? pref_offset_clear : 0)); + build_addiu_a2_a0(PAGE_SIZE - (cpu_has_prefetch ? pref_offset_clear : 0)); - if (R4600_V2_HIT_CACHEOP_WAR && ((read_c0_prid() & 0xfff0) == 0x2020)) { - *epc++ = 0x40026000; /* mfc0 $v0, $12 */ - *epc++ = 0x34410001; /* ori $at, v0, 0x1 */ - *epc++ = 0x38210001; /* xori $at, at, 0x1 */ - *epc++ = 0x40816000; /* mtc0 $at, $12 */ - *epc++ = 0x00000000; /* nop */ - *epc++ = 0x00000000; /* nop */ - *epc++ = 0x00000000; /* nop */ - *epc++ = 0x3c01a000; /* lui $at, 0xa000 */ - *epc++ = 0x8c200000; /* lw $zero, ($at) */ - } + if (R4600_V2_HIT_CACHEOP_WAR && ((read_c0_prid() & 0xfff0) == 0x2020)) + build_insn_word(0x3c01a000); /* lui $at, 0xa000 */ -dest = epc; - build_store_reg(0); - build_store_reg(0); - build_store_reg(0); - build_store_reg(0); - if (has_scache && cpu_scache_line_size() == 128) { +dest = label(); + do { build_store_reg(0); build_store_reg(0); build_store_reg(0); build_store_reg(0); - } + } while (store_offset < half_scache_line_size()); build_addiu_a0(2 * store_offset); - build_store_reg(0); - build_store_reg(0); - if (has_scache && cpu_scache_line_size() == 128) { + loop_start = store_offset; + do { build_store_reg(0); build_store_reg(0); build_store_reg(0); build_store_reg(0); - } - build_store_reg(0); + } while ((store_offset - loop_start) < half_scache_line_size()); build_bne(dest); - build_store_reg(0); if (cpu_has_prefetch && pref_offset_clear) { - build_addiu_at_a0(pref_offset_clear); - dest = epc; - __build_store_reg(0); - __build_store_reg(0); - __build_store_reg(0); - __build_store_reg(0); + build_addiu_a2_a0(pref_offset_clear); + dest = label(); + loop_start = store_offset; + do { + __build_store_reg(0); + __build_store_reg(0); + __build_store_reg(0); + __build_store_reg(0); + } while ((store_offset - loop_start) < half_scache_line_size()); build_addiu_a0(2 * store_offset); - __build_store_reg(0); - __build_store_reg(0); - __build_store_reg(0); + loop_start = store_offset; + do { + __build_store_reg(0); + __build_store_reg(0); + __build_store_reg(0); + __build_store_reg(0); + } while ((store_offset - loop_start) < half_scache_line_size()); build_bne(dest); - __build_store_reg(0); } build_jr_ra(); - if (R4600_V2_HIT_CACHEOP_WAR && ((read_c0_prid() & 0xfff0) == 0x2020)) - *epc++ = 0x40826000; /* mtc0 $v0, $12 */ - else - build_nop(); flush_icache_range((unsigned long)&clear_page_array, (unsigned long) epc); @@ -380,32 +415,20 @@ void __init build_copy_page(void) { + unsigned int loop_start; + epc = (unsigned int *) ©_page_array; + store_offset = load_offset = 0; + instruction_pending = 0; - build_addiu_at_a0(PAGE_SIZE - (cpu_has_prefetch ? pref_offset_copy : 0)); + build_addiu_a2_a0(PAGE_SIZE - (cpu_has_prefetch ? pref_offset_copy : 0)); - if (R4600_V2_HIT_CACHEOP_WAR && ((read_c0_prid() & 0xfff0) == 0x2020)) { - *epc++ = 0x40026000; /* mfc0 $v0, $12 */ - *epc++ = 0x34410001; /* ori $at, v0, 0x1 */ - *epc++ = 0x38210001; /* xori $at, at, 0x1 */ - *epc++ = 0x40816000; /* mtc0 $at, $12 */ - *epc++ = 0x00000000; /* nop */ - *epc++ = 0x00000000; /* nop */ - *epc++ = 0x00000000; /* nop */ - *epc++ = 0x3c01a000; /* lui $at, 0xa000 */ - *epc++ = 0x8c200000; /* lw $zero, ($at) */ - } + if (R4600_V2_HIT_CACHEOP_WAR && ((read_c0_prid() & 0xfff0) == 0x2020)) + build_insn_word(0x3c01a000); /* lui $at, 0xa000 */ -dest = epc; - build_load_reg( 8); - build_load_reg( 9); - build_load_reg(10); - build_load_reg(11); - build_store_reg( 8); - build_store_reg( 9); - build_store_reg(10); - build_store_reg(11); - if (has_scache && cpu_scache_line_size() == 128) { +dest = label(); + loop_start = store_offset; + do { build_load_reg( 8); build_load_reg( 9); build_load_reg(10); @@ -414,18 +437,11 @@ build_store_reg( 9); build_store_reg(10); build_store_reg(11); - } + } while ((store_offset - loop_start) < half_scache_line_size()); build_addiu_a0(2 * store_offset); build_addiu_a1(2 * load_offset); - build_load_reg( 8); - build_load_reg( 9); - build_load_reg(10); - build_load_reg(11); - build_store_reg( 8); - build_store_reg( 9); - build_store_reg(10); - if (has_scache && cpu_scache_line_size() == 128) { - build_store_reg(11); + loop_start = store_offset; + do { build_load_reg( 8); build_load_reg( 9); build_load_reg(10); @@ -433,39 +449,44 @@ build_store_reg( 8); build_store_reg( 9); build_store_reg(10); - } + build_store_reg(11); + } while ((store_offset - loop_start) < half_scache_line_size()); build_bne(dest); - build_store_reg(11); if (cpu_has_prefetch && pref_offset_copy) { - build_addiu_at_a0(pref_offset_copy); - dest = epc; - __build_load_reg( 8); - __build_load_reg( 9); - __build_load_reg(10); - __build_load_reg(11); - __build_store_reg( 8); - __build_store_reg( 9); - __build_store_reg(10); - __build_store_reg(11); + build_addiu_a2_a0(pref_offset_copy); + dest = label(); + loop_start = store_offset; + do { + __build_load_reg( 8); + __build_load_reg( 9); + __build_load_reg(10); + __build_load_reg(11); + __build_store_reg( 8); + __build_store_reg( 9); + __build_store_reg(10); + __build_store_reg(11); + } while ((store_offset - loop_start) < half_scache_line_size()); build_addiu_a0(2 * store_offset); build_addiu_a1(2 * load_offset); - __build_load_reg( 8); - __build_load_reg( 9); - __build_load_reg(10); - __build_load_reg(11); - __build_store_reg( 8); - __build_store_reg( 9); - __build_store_reg(10); + loop_start = store_offset; + do { + __build_load_reg( 8); + __build_load_reg( 9); + __build_load_reg(10); + __build_load_reg(11); + __build_store_reg( 8); + __build_store_reg( 9); + __build_store_reg(10); + __build_store_reg(11); + } while ((store_offset - loop_start) < half_scache_line_size()); build_bne(dest); - __build_store_reg(11); } build_jr_ra(); - if (R4600_V2_HIT_CACHEOP_WAR && ((read_c0_prid() & 0xfff0) == 0x2020)) - *epc++ = 0x40826000; /* mtc0 $v0, $12 */ - else - build_nop(); + + flush_icache_range((unsigned long)©_page_array, + (unsigned long) epc); BUG_ON(epc > copy_page_array + ARRAY_SIZE(copy_page_array)); } diff -urN linux-2.4.28-bk3/arch/mips64/mm/sc-ip22.c linux-2.4.28-bk4/arch/mips64/mm/sc-ip22.c --- linux-2.4.28-bk3/arch/mips64/mm/sc-ip22.c 2003-08-25 04:44:40.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips64/mm/sc-ip22.c 2004-11-23 02:49:27.482395667 -0800 @@ -65,8 +65,8 @@ printk("indy_sc_wback_invalidate[%08lx,%08lx]", addr, size); #endif - if (!size) - return; + /* Catch bad driver code */ + BUG_ON(size == 0); /* Which lines to flush? */ first_line = SC_INDEX(addr); diff -urN linux-2.4.28-bk3/arch/mips64/mm/sc-r5k.c linux-2.4.28-bk4/arch/mips64/mm/sc-r5k.c --- linux-2.4.28-bk3/arch/mips64/mm/sc-r5k.c 2003-08-25 04:44:40.000000000 -0700 +++ linux-2.4.28-bk4/arch/mips64/mm/sc-r5k.c 2004-11-23 02:49:27.483395708 -0800 @@ -47,6 +47,9 @@ { unsigned long end, a; + /* Catch bad driver code */ + BUG_ON(size == 0); + if (size >= scache_size) { blast_r5000_scache(); return; diff -urN linux-2.4.28-bk3/arch/mips64/mm/sc-rm7k.c linux-2.4.28-bk4/arch/mips64/mm/sc-rm7k.c --- linux-2.4.28-bk3/arch/mips64/mm/sc-rm7k.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips64/mm/sc-rm7k.c 2004-11-23 02:49:27.483395708 -0800 @@ -1,8 +1,11 @@ /* * sc-rm7k.c: RM7000 cache management functions. * - * Copyright (C) 1997, 2001, 2003 Ralf Baechle (ralf@gnu.org), + * Copyright (C) 1997, 2001, 2003, 2004 Ralf Baechle (ralf@linux-mips.org) */ + +#undef DEBUG + #include #include #include @@ -34,9 +37,10 @@ { unsigned long end, a; -#ifdef DEBUG_CACHE - printk("rm7k_sc_wback_inv[%08lx,%08lx]", addr, size); -#endif + pr_debug("rm7k_sc_wback_inv[%08lx,%08lx]", addr, size); + + /* Catch bad driver code */ + BUG_ON(size == 0); a = addr & ~(sc_lsize - 1); end = (addr + size - 1) & ~(sc_lsize - 1); @@ -64,9 +68,10 @@ { unsigned long end, a; -#ifdef DEBUG_CACHE - printk("rm7k_sc_inv[%08lx,%08lx]", addr, size); -#endif + pr_debug("rm7k_sc_inv[%08lx,%08lx]", addr, size); + + /* Catch bad driver code */ + BUG_ON(size == 0); a = addr & ~(sc_lsize - 1); end = (addr + size - 1) & ~(sc_lsize - 1); @@ -105,16 +110,16 @@ * * It seems we get our kicks from relying on unguaranteed behaviour in GCC */ -static __init void rm7k_sc_enable(void) +static __init void __rm7k_sc_enable(void) { int i; - set_c0_config(1<<3); /* CONF_SE */ + set_c0_config(1 << 3); /* CONF_SE */ write_c0_taglo(0); write_c0_taghi(0); - for (i=0; i> 31) & 1) return 0; - printk(KERN_INFO "Secondary cache size %ldK, linesize %ld bytes.\n", + printk(KERN_INFO "Secondary cache size %dK, linesize %d bytes.\n", (scache_size >> 10), sc_lsize); if ((config >> 3) & 1) /* CONF_SE */ return 1; - printk(KERN_INFO "Enabling secondary cache..."); - func(); - printk(" done\n"); - /* * While we're at it let's deal with the tertiary cache. */ diff -urN linux-2.4.28-bk3/arch/mips64/mm/tlb-r4k.c linux-2.4.28-bk4/arch/mips64/mm/tlb-r4k.c --- linux-2.4.28-bk3/arch/mips64/mm/tlb-r4k.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips64/mm/tlb-r4k.c 2004-11-23 02:49:27.484395749 -0800 @@ -52,7 +52,7 @@ local_irq_save(flags); /* Save old context and create impossible VPN2 value */ - old_ctx = (read_c0_entryhi() & ASID_MASK); + old_ctx = read_c0_entryhi(); write_c0_entryhi(XKPHYS); write_c0_entrylo0(0); write_c0_entrylo1(0); @@ -103,8 +103,8 @@ local_irq_save(flags); size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT; size = (size + 1) >> 1; - if(size <= current_cpu_data.tlbsize/2) { - int oldpid = read_c0_entryhi() & ASID_MASK; + if (size <= current_cpu_data.tlbsize/2) { + int oldpid = read_c0_entryhi(); int newpid = cpu_asid(cpu, mm); start &= (PAGE_MASK << 1); @@ -151,7 +151,7 @@ newpid = cpu_asid(cpu, vma->vm_mm); page &= (PAGE_MASK << 1); local_irq_save(flags); - oldpid = (read_c0_entryhi() & ASID_MASK); + oldpid = read_c0_entryhi(); write_c0_entryhi(page | newpid); BARRIER; tlb_probe(); @@ -182,7 +182,7 @@ int oldpid, idx; page &= (PAGE_MASK << 1); - oldpid = read_c0_entryhi() & ASID_MASK; + oldpid = read_c0_entryhi(); local_irq_save(flags); write_c0_entryhi(page); @@ -208,6 +208,7 @@ void __update_tlb(struct vm_area_struct * vma, unsigned long address, pte_t pte) { unsigned long flags; + unsigned int asid; pgd_t *pgdp; pmd_t *pmdp; pte_t *ptep; diff -urN linux-2.4.28-bk3/arch/mips64/mm/tlb-sb1.c linux-2.4.28-bk4/arch/mips64/mm/tlb-sb1.c --- linux-2.4.28-bk3/arch/mips64/mm/tlb-sb1.c 2004-02-18 05:36:30.000000000 -0800 +++ linux-2.4.28-bk4/arch/mips64/mm/tlb-sb1.c 2004-11-23 02:49:27.485395790 -0800 @@ -118,7 +118,7 @@ * with the firmware, go back and give all the entries invalid addresses with * the normal flush routine. Wired entries will be killed as well! */ -void sb1_sanitize_tlb(void) +static void __init sb1_sanitize_tlb(void) { int entry; long addr = 0; diff -urN linux-2.4.28-bk3/drivers/block/DAC960.c linux-2.4.28-bk4/drivers/block/DAC960.c --- linux-2.4.28-bk3/drivers/block/DAC960.c 2002-11-28 15:53:12.000000000 -0800 +++ linux-2.4.28-bk4/drivers/block/DAC960.c 2004-11-23 02:49:27.490395993 -0800 @@ -1133,6 +1133,26 @@ DAC960PU/PD/PL 3.51 and above DAC960PU/PD/PL/P 2.73 and above */ +#if defined(__alpha__) + /* + DEC Alpha machines were often equipped with DAC960 cards that were + OEMed from Mylex, and had their own custom firmware. Version 2.70, + the last custom FW revision to be released by DEC for these older + controllers, appears to work quite well with this driver. + + Cards tested successfully were several versions each of the PD and + PU, called by DEC the KZPSC and KZPAC, respectively, and having + the Manufacturer Numbers (from Mylex), usually on a sticker on the + back of the board, of: + + KZPSC D040347 (1ch) or D040348 (2ch) or D040349 (3ch) + KZPAC D040395 (1ch) or D040396 (2ch) or D040397 (3ch) + */ +# define FIRMWARE_27x "2.70" +#else +# define FIRMWARE_27x "2.73" +#endif + if (Enquiry2.FirmwareID.MajorVersion == 0) { Enquiry2.FirmwareID.MajorVersion = @@ -1152,7 +1172,7 @@ (Controller->FirmwareVersion[0] == '3' && strcmp(Controller->FirmwareVersion, "3.51") >= 0) || (Controller->FirmwareVersion[0] == '2' && - strcmp(Controller->FirmwareVersion, "2.73") >= 0))) + strcmp(Controller->FirmwareVersion, FIRMWARE_27x) >= 0))) { DAC960_Failure(Controller, "FIRMWARE VERSION VERIFICATION"); DAC960_Error("Firmware Version = '%s'\n", Controller, diff -urN linux-2.4.28-bk3/drivers/char/ite_gpio.c linux-2.4.28-bk4/drivers/char/ite_gpio.c --- linux-2.4.28-bk3/drivers/char/ite_gpio.c 2003-08-25 04:44:41.000000000 -0700 +++ linux-2.4.28-bk4/drivers/char/ite_gpio.c 2004-11-23 02:49:27.493396116 -0800 @@ -236,10 +236,6 @@ static int ite_gpio_open(struct inode *inode, struct file *file) { - unsigned int minor = MINOR(inode->i_rdev); - if (minor != GPIO_MINOR) - return -ENODEV; - #ifdef MODULE MOD_INC_USE_COUNT; #endif @@ -250,7 +246,6 @@ static int ite_gpio_release(struct inode *inode, struct file *file) { - #ifdef MODULE MOD_DEC_USE_COUNT; #endif @@ -262,7 +257,6 @@ static int ite_gpio_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg) { - static struct ite_gpio_ioctl_data ioctl_data; if (copy_from_user(&ioctl_data, (struct ite_gpio_ioctl_data *)arg, @@ -324,7 +318,8 @@ return 0; } -static void ite_gpio_irq_handler(int this_irq, void *dev_id, struct pt_regs *regs) +static void ite_gpio_irq_handler(int this_irq, void *dev_id, + struct pt_regs *regs) { int i,line; @@ -369,23 +364,20 @@ } } -static struct file_operations ite_gpio_fops = -{ +static struct file_operations ite_gpio_fops = { owner: THIS_MODULE, ioctl: ite_gpio_ioctl, open: ite_gpio_open, release: ite_gpio_release, }; -/* GPIO_MINOR in include/linux/miscdevice.h */ -static struct miscdevice ite_gpio_miscdev = -{ - GPIO_MINOR, +static struct miscdevice ite_gpio_miscdev = { + MISC_DYNAMIC_MINOR, "ite_gpio", &ite_gpio_fops }; -int __init ite_gpio_init(void) +static int __init ite_gpio_init(void) { int i; @@ -417,7 +409,7 @@ return 0; } -void __exit ite_gpio_exit(void) +static void __exit ite_gpio_exit(void) { misc_deregister(&ite_gpio_miscdev); } diff -urN linux-2.4.28-bk3/drivers/char/lcd.c linux-2.4.28-bk4/drivers/char/lcd.c --- linux-2.4.28-bk3/drivers/char/lcd.c 2003-08-25 04:44:41.000000000 -0700 +++ linux-2.4.28-bk4/drivers/char/lcd.c 2004-11-23 02:49:27.494396156 -0800 @@ -556,9 +556,8 @@ open: lcd_open, }; -static struct miscdevice lcd_dev= -{ - LCD_MINOR, +static struct miscdevice lcd_dev = { + MISC_DYNAMIC_MINOR, "lcd", &lcd_fops }; diff -urN linux-2.4.28-bk3/drivers/hotplug/cpqphp_pci.c linux-2.4.28-bk4/drivers/hotplug/cpqphp_pci.c --- linux-2.4.28-bk3/drivers/hotplug/cpqphp_pci.c 2003-11-28 10:26:20.000000000 -0800 +++ linux-2.4.28-bk4/drivers/hotplug/cpqphp_pci.c 2004-11-23 02:49:27.495396197 -0800 @@ -387,7 +387,7 @@ static int PCI_ScanBusForNonBridge(struct controller *ctrl, u8 bus_num, u8 * dev_num) { - u8 tdevice; + u16 tdevice; u32 work; u8 tbus; diff -urN linux-2.4.28-bk3/drivers/i2c/i2c-core.c linux-2.4.28-bk4/drivers/i2c/i2c-core.c --- linux-2.4.28-bk3/drivers/i2c/i2c-core.c 2004-02-18 05:36:31.000000000 -0800 +++ linux-2.4.28-bk4/drivers/i2c/i2c-core.c 2004-11-23 02:49:27.496396238 -0800 @@ -901,7 +901,7 @@ if (addr == address_data->normal_i2c[i]) { found = 1; DEB2(printk(KERN_DEBUG "i2c-core.o: found normal i2c entry for adapter %d, " - "addr %02x", adap_id,addr)); + "addr %02x\n", adap_id, addr)); } } @@ -1098,8 +1098,8 @@ need to use only one message; when reading, we need two. We initialize most things with sane defaults, to keep the code below somewhat simpler. */ - unsigned char msgbuf0[34]; - unsigned char msgbuf1[34]; + unsigned char msgbuf0[I2C_SMBUS_BLOCK_MAX+2]; + unsigned char msgbuf1[I2C_SMBUS_BLOCK_MAX+2]; int num = read_write == I2C_SMBUS_READ?2:1; struct i2c_msg msg[2] = { { addr, flags, 1, msgbuf0 }, { addr, flags | I2C_M_RD, 0, msgbuf1 } diff -urN linux-2.4.28-bk3/drivers/i2c/i2c-proc.c linux-2.4.28-bk4/drivers/i2c/i2c-proc.c --- linux-2.4.28-bk3/drivers/i2c/i2c-proc.c 2004-02-18 05:36:31.000000000 -0800 +++ linux-2.4.28-bk4/drivers/i2c/i2c-proc.c 2004-11-23 02:49:27.497396279 -0800 @@ -152,7 +152,7 @@ id += 256; len = 0; - while (ctl_template[len].procname) + while (ctl_template[len].ctl_name) len++; len += 7; if (!(new_table = kmalloc(sizeof(ctl_table) * len, GFP_KERNEL))) { @@ -540,7 +540,7 @@ /* Skip everything until we hit whitespace */ while (bufsize && !((ret=get_user(nextchar, (char *) buffer))) && - isspace((int) nextchar)) { + !isspace((int) nextchar)) { bufsize--; ((char *) buffer)++; } @@ -762,7 +762,7 @@ #ifdef DEBUG printk (KERN_DEBUG "i2c-proc.o: found normal isa_range entry for adapter %d, " - "addr %04x", adapter_id, addr); + "addr %04x\n", adapter_id, addr); #endif found = 1; } @@ -776,7 +776,7 @@ #ifdef DEBUG printk (KERN_DEBUG "i2c-proc.o: found normal i2c entry for adapter %d, " - "addr %02x", adapter_id, addr); + "addr %02x\n", adapter_id, addr); #endif } } diff -urN linux-2.4.28-bk3/drivers/ide/raid/hptraid.c linux-2.4.28-bk4/drivers/ide/raid/hptraid.c --- linux-2.4.28-bk3/drivers/ide/raid/hptraid.c 2004-02-18 05:36:31.000000000 -0800 +++ linux-2.4.28-bk4/drivers/ide/raid/hptraid.c 2004-11-23 02:49:27.498396319 -0800 @@ -18,7 +18,11 @@ Based on work done by Søren Schmidt for FreeBSD Changelog: - 15.06.2003 wweissmann@gmx.at + 19.08.2003 v0.03 wweissmann@gmx.at + * register the raid volume only if all disks are available + * print a warning that raid-(0+)1 failover is not supported + + 15.06.2003 v0.02 wweissmann@gmx.at * correct values of raid-1 superbock * re-add check for availability of all disks * fix offset bug in raid-1 (introduced in raid 0+1 implementation) @@ -814,10 +818,6 @@ break; } - /* Initialize the gendisk structure */ - - ataraid_register_disk(device,raid[device].sectors); - /* Verify that we have all disks */ count=count_disks(raid+device); @@ -844,7 +844,17 @@ return -ENODEV; } } + printk(KERN_WARNING "ataraid%i: raid-0+1 disk failover is not implemented!\n", + device); } + else if (type == HPT_T_RAID_1) { + printk(KERN_WARNING "ataraid%i: raid-1 disk failover is not implemented!\n", + device); + } + /* Initialize the gendisk structure */ + + ataraid_register_disk(device,raid[device].sectors); + return 0; } @@ -856,7 +866,7 @@ int retval=-ENODEV; int device,i,count=0; - printk(KERN_INFO "Highpoint HPT370 Softwareraid driver for linux version 0.02\n"); + printk(KERN_INFO "Highpoint HPT370 Softwareraid driver for linux version 0.03\n"); for(i=0; oplist[i].op; i++) { do diff -urN linux-2.4.28-bk3/drivers/isdn/eicon/fourbri.c linux-2.4.28-bk4/drivers/isdn/eicon/fourbri.c --- linux-2.4.28-bk3/drivers/isdn/eicon/fourbri.c 2001-09-30 12:26:05.000000000 -0700 +++ linux-2.4.28-bk4/drivers/isdn/eicon/fourbri.c 2004-11-23 02:49:27.498396319 -0800 @@ -337,7 +337,8 @@ static int diva_server_4bri_start(card_t *card, byte *channels) { byte *ctl; - byte *shared, i; + byte *shared; + int i; int adapter_num; DPRINTF(("divas: start Diva Server 4BRI")); diff -urN linux-2.4.28-bk3/drivers/pcmcia/au1000_db1x00.c linux-2.4.28-bk4/drivers/pcmcia/au1000_db1x00.c --- linux-2.4.28-bk3/drivers/pcmcia/au1000_db1x00.c 2003-08-25 04:44:42.000000000 -0700 +++ linux-2.4.28-bk4/drivers/pcmcia/au1000_db1x00.c 2004-11-23 02:49:27.520397216 -0800 @@ -56,7 +56,7 @@ #include -static BCSR * const bcsr = (BCSR *)0xAE000000; +static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR; static int db1x00_pcmcia_init(struct pcmcia_init *init) { @@ -143,11 +143,16 @@ { if(info->sock > PCMCIA_MAX_SOCK) return -1; - if(info->sock == 0) { + if(info->sock == 0) +#ifdef CONFIG_MIPS_DB1550 + info->irq = AU1000_GPIO_3; + else + info->irq = AU1000_GPIO_5; +#else info->irq = AU1000_GPIO_2; - } else info->irq = AU1000_GPIO_5; +#endif return 0; } @@ -260,7 +265,7 @@ return 0; } -struct pcmcia_low_level db1x00_pcmcia_ops = { +struct pcmcia_low_level au1x00_pcmcia_ops = { db1x00_pcmcia_init, db1x00_pcmcia_shutdown, db1x00_pcmcia_socket_state, diff -urN linux-2.4.28-bk3/drivers/pcmcia/au1000_generic.c linux-2.4.28-bk4/drivers/pcmcia/au1000_generic.c --- linux-2.4.28-bk3/drivers/pcmcia/au1000_generic.c 2003-08-25 04:44:42.000000000 -0700 +++ linux-2.4.28-bk4/drivers/pcmcia/au1000_generic.c 2004-11-23 02:49:27.521397257 -0800 @@ -70,7 +70,12 @@ * callback value associated with the socket: */ static struct au1000_pcmcia_socket *pcmcia_socket; -static int socket_count; + +/* Some boards like to support CF cards as IDE root devices, so they + * grab pcmcia sockets directly. + */ +int socket_count; +u32 *pcmcia_base_vaddrs[2]; /* Returned by the low-level PCMCIA interface: */ @@ -157,16 +162,7 @@ return -1; } -#if defined(CONFIG_MIPS_PB1000) || defined(CONFIG_MIPS_PB1100) || defined(CONFIG_MIPS_PB1500) - pcmcia_low_level=&pb1x00_pcmcia_ops; -#elif defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) || defined(CONFIG_MIPS_DB1500) - pcmcia_low_level=&db1x00_pcmcia_ops; -#elif defined(CONFIG_MIPS_XXS1500) - pcmcia_low_level=&xxs1500_pcmcia_ops; -#else -#error Unsupported AU1000 board. -#endif - + pcmcia_low_level=&au1x00_pcmcia_ops; pcmcia_init.handler=au1000_pcmcia_interrupt; if((socket_count=pcmcia_low_level->init(&pcmcia_init))<0) { printk(KERN_ERR "Unable to initialize PCMCIA service.\n"); @@ -205,7 +201,7 @@ * access address, we need to subtract it here. */ if (i == 0) { - pcmcia_socket[i].virt_io = + pcmcia_socket[i].virt_io = (u32)ioremap((ioaddr_t)AU1X_SOCK0_IO, 0x1000) - mips_io_port_base; pcmcia_socket[i].phys_attr = @@ -213,7 +209,7 @@ pcmcia_socket[i].phys_mem = (ioaddr_t)AU1X_SOCK0_PHYS_MEM; } -#ifndef CONFIG_MIPS_XXS1500 +#ifdef AU1X_SOCK1_IO /* revisit */ else { pcmcia_socket[i].virt_io = (u32)ioremap((ioaddr_t)AU1X_SOCK1_IO, 0x1000) - @@ -224,6 +220,7 @@ (ioaddr_t)AU1X_SOCK1_PHYS_MEM; } #endif + pcmcia_base_vaddrs[i] = (u32 *)pcmcia_socket[i].virt_io; } /* Only advertise as many sockets as we can detect: */ @@ -607,7 +604,6 @@ } spin_lock_irqsave(&pcmcia_lock, flags); - start=map->sys_start; if(map->sys_stop==0) map->sys_stop=MAP_SIZE-1; @@ -621,7 +617,7 @@ map->card_start; } - map->sys_stop=map->sys_start+(map->sys_stop-start); + map->sys_stop=map->sys_start+MAP_SIZE; pcmcia_socket[sock].mem_map[map->map]=*map; spin_unlock_irqrestore(&pcmcia_lock, flags); DEBUG(3, "set_mem_map %d start %x stop %x card_start %x\n", diff -urN linux-2.4.28-bk3/drivers/pcmcia/au1000_hydrogen3.c linux-2.4.28-bk4/drivers/pcmcia/au1000_hydrogen3.c --- linux-2.4.28-bk3/drivers/pcmcia/au1000_hydrogen3.c 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.28-bk4/drivers/pcmcia/au1000_hydrogen3.c 2004-11-23 02:49:27.522397297 -0800 @@ -0,0 +1,152 @@ +/* + * + * Alchemy Semi Hydrogen III board specific pcmcia routines. + * + * based on: + * + * Alchemy Semi Hyd1100 board specific pcmcia routines. + * + * Copyright 2002 MontaVista Software Inc. + * Author: MontaVista Software, Inc. + * ppopov@mvista.com or source@mvista.com + * + * ######################################################################## + * + * This program is free software; you can distribute it and/or modify it + * under the terms of the GNU General Public License (Version 2) as + * published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. + * + * ######################################################################## + * + * + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include "cs_internal.h" + +#include +#include +#include + +#include +#include + +#include + +#define PCMCIA_MAX_SOCK 0 +//#include + + +static int hydrogen3_pcmcia_init(struct pcmcia_init *init) +{ + // power up + writel(0x00020002, GPIO2_OUTPUT); // GPIO_201 CF_PWR + return 1; // one slot +} + +static int hydrogen3_pcmcia_shutdown(void) +{ + // power down + writel(0x00020000, GPIO2_OUTPUT); // GPIO_201 CF_PWR + return 0; +} + +static int +hydrogen3_pcmcia_socket_state(unsigned sock, struct pcmcia_state *state) +{ + u32 inserted; + inserted = (readl(SYS_PINSTATERD) & (1<<22)) ? 0 : 1; // GPIO_22 is CF_DETECT + + state->ready = 0; + state->vs_Xv = 0; + state->vs_3v = 0; + state->detect = 0; + + if (inserted) + { + state->vs_3v=1; + state->detect = 1; + state->ready = 1; + } + + state->bvd1=1; + state->bvd2=1; + state->wrprot=0; + return 1; +} + + +static int hydrogen3_pcmcia_get_irq_info(struct pcmcia_irq_info *info) +{ + + if(info->sock > PCMCIA_MAX_SOCK) return -1; + + if(info->sock == 0) + info->irq = AU1000_GPIO_21; + else + info->irq = -1; + + return 0; +} + + +static int +hydrogen3_pcmcia_configure_socket(const struct pcmcia_configure *configure) +{ + if(configure->sock > PCMCIA_MAX_SOCK) return -1; + + au_sync_delay(300); + + if (!configure->reset) { + // de-assert reset + writel(0x00010000, GPIO2_OUTPUT); // GPIO_200 CF_RESET + au_sync_delay(100); + } + else { + // assert reset + writel(0x00010001, GPIO2_OUTPUT); // GPIO_200 CF_RESET + au_sync_delay(300); + } + return 0; +} + +struct pcmcia_low_level au1x00_pcmcia_ops = { + hydrogen3_pcmcia_init, + hydrogen3_pcmcia_shutdown, + hydrogen3_pcmcia_socket_state, + hydrogen3_pcmcia_get_irq_info, + hydrogen3_pcmcia_configure_socket +}; + +struct pcmcia_low_level * +hydrogen3_get_pcmcia_ops(void) +{ + return &au1x00_pcmcia_ops; +}; diff -urN linux-2.4.28-bk3/drivers/pcmcia/au1000_pb1550.c linux-2.4.28-bk4/drivers/pcmcia/au1000_pb1550.c --- linux-2.4.28-bk3/drivers/pcmcia/au1000_pb1550.c 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.28-bk4/drivers/pcmcia/au1000_pb1550.c 2004-11-23 02:49:27.522397297 -0800 @@ -0,0 +1,270 @@ +/* + * + * AMD Alchemy Pb1550 boards specific pcmcia routines. + * + * Copyright 2004 Embedded Edge LLC + * + * Based on au1000_pb1550.c: + * Copyright 2002 MontaVista Software Inc. + * Author: MontaVista Software, Inc. + * ppopov@mvista.com or source@mvista.com + * + * ######################################################################## + * + * This program is free software; you can distribute it and/or modify it + * under the terms of the GNU General Public License (Version 2) as + * published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. + * + * ######################################################################## + * + * + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include "cs_internal.h" + +#include +#include +#include + +#include +#include + +#include + + +static int pb1550_pcmcia_init(struct pcmcia_init *init) +{ + bcsr->pcmcia = 0; /* turn off power */ + au_sync_delay(2); + return PCMCIA_NUM_SOCKS; +} + +static int pb1550_pcmcia_shutdown(void) +{ + bcsr->pcmcia = 0; /* turn off power */ + au_sync_delay(2); + return 0; +} + +static int +pb1550_pcmcia_socket_state(unsigned sock, struct pcmcia_state *state) +{ + u32 inserted; + u16 vs; + + if(sock > PCMCIA_MAX_SOCK) return -1; + + state->ready = 0; + state->vs_Xv = 0; + state->vs_3v = 0; + state->detect = 0; + + if (sock == 0) { + vs = bcsr->status & BCSR_STATUS_PCMCIA0VS; + inserted = !(bcsr->status & (1<<4)); + } + else { + vs = (bcsr->status & BCSR_STATUS_PCMCIA1VS)>>2; + inserted = !(bcsr->status & (1<<5)); + } + + DEBUG(KERN_DEBUG "pb1550 socket %d: inserted %d, vs %d\n", + sock, inserted, vs, bcsr->status); + + if (inserted) { + switch (vs) { + case 0: + case 2: + state->vs_3v=1; + break; + case 3: /* 5V */ + break; + default: + /* return without setting 'detect' */ + printk(KERN_ERR "pb1550 bad VS (%d)\n", vs); + return -1; + } + state->detect = 1; + state->ready = 1; + } + else { + /* if the card was previously inserted and then ejected, + * we should turn off power to it + */ + if ((sock == 0) && (bcsr->pcmcia & BCSR_PCMCIA_PC0RST)) { + bcsr->pcmcia &= ~(BCSR_PCMCIA_PC0RST | + BCSR_PCMCIA_PC0DRVEN | + BCSR_PCMCIA_PC0VPP | + BCSR_PCMCIA_PC0VCC); + } + else if ((sock == 1) && (bcsr->pcmcia & BCSR_PCMCIA_PC1RST)) { + bcsr->pcmcia &= ~(BCSR_PCMCIA_PC1RST | + BCSR_PCMCIA_PC1DRVEN | + BCSR_PCMCIA_PC1VPP | + BCSR_PCMCIA_PC1VCC); + } + } + + state->bvd1=1; + state->bvd2=1; + state->wrprot=0; + return 1; +} + + +static int pb1550_pcmcia_get_irq_info(struct pcmcia_irq_info *info) +{ + if(info->sock > PCMCIA_MAX_SOCK) return -1; + + if(info->sock == 0) { + info->irq = AU1000_GPIO_0; + } + else + info->irq = AU1000_GPIO_1; + + return 0; +} + + +static int +pb1550_pcmcia_configure_socket(const struct pcmcia_configure *configure) +{ + u16 pwr; + int sock = configure->sock; + + if(sock > PCMCIA_MAX_SOCK) return -1; + + DEBUG(KERN_DEBUG "socket %d Vcc %dV Vpp %dV, reset %d\n", + sock, configure->vcc, configure->vpp, configure->reset); + + /* pcmcia reg was set to zero at init time. Be careful when + * initializing a socket not to wipe out the settings of the + * other socket. + */ + pwr = bcsr->pcmcia; + pwr &= ~(0xf << sock*8); /* clear voltage settings */ + + switch(configure->vcc){ + case 0: /* Vcc 0 */ + pwr |= SET_VCC_VPP(0,0,sock); + break; + case 50: /* Vcc 5V */ + switch(configure->vpp) { + case 0: + pwr |= SET_VCC_VPP(2,0,sock); + break; + case 50: + pwr |= SET_VCC_VPP(2,1,sock); + break; + case 12: + pwr |= SET_VCC_VPP(2,2,sock); + break; + case 33: + default: + pwr |= SET_VCC_VPP(0,0,sock); + printk("%s: bad Vcc/Vpp (%d:%d)\n", + __FUNCTION__, + configure->vcc, + configure->vpp); + break; + } + break; + case 33: /* Vcc 3.3V */ + switch(configure->vpp) { + case 0: + pwr |= SET_VCC_VPP(1,0,sock); + break; + case 12: + pwr |= SET_VCC_VPP(1,2,sock); + break; + case 33: + pwr |= SET_VCC_VPP(1,1,sock); + break; + case 50: + default: + pwr |= SET_VCC_VPP(0,0,sock); + printk("%s: bad Vcc/Vpp (%d:%d)\n", + __FUNCTION__, + configure->vcc, + configure->vpp); + break; + } + break; + default: /* what's this ? */ + pwr |= SET_VCC_VPP(0,0,sock); + printk(KERN_ERR "%s: bad Vcc %d\n", + __FUNCTION__, configure->vcc); + break; + } + + bcsr->pcmcia = pwr; + au_sync_delay(500); + + if (sock == 0) { + if (!configure->reset) { + pwr |= BCSR_PCMCIA_PC0DRVEN; + bcsr->pcmcia = pwr; + au_sync_delay(300); + pwr |= BCSR_PCMCIA_PC0RST; + bcsr->pcmcia = pwr; + au_sync_delay(100); + } + else { + pwr &= ~(BCSR_PCMCIA_PC0RST | BCSR_PCMCIA_PC0DRVEN); + bcsr->pcmcia = pwr; + au_sync_delay(100); + } + } + else { + if (!configure->reset) { + pwr |= BCSR_PCMCIA_PC1DRVEN; + bcsr->pcmcia = pwr; + au_sync_delay(300); + pwr |= BCSR_PCMCIA_PC1RST; + bcsr->pcmcia = pwr; + au_sync_delay(100); + } + else { + pwr &= ~(BCSR_PCMCIA_PC1RST | BCSR_PCMCIA_PC1DRVEN); + bcsr->pcmcia = pwr; + au_sync_delay(100); + } + } + return 0; +} + +struct pcmcia_low_level au1x00_pcmcia_ops = { + pb1550_pcmcia_init, + pb1550_pcmcia_shutdown, + pb1550_pcmcia_socket_state, + pb1550_pcmcia_get_irq_info, + pb1550_pcmcia_configure_socket +}; diff -urN linux-2.4.28-bk3/drivers/pcmcia/au1000_pb1x00.c linux-2.4.28-bk4/drivers/pcmcia/au1000_pb1x00.c --- linux-2.4.28-bk3/drivers/pcmcia/au1000_pb1x00.c 2004-02-18 05:36:31.000000000 -0800 +++ linux-2.4.28-bk4/drivers/pcmcia/au1000_pb1x00.c 2004-11-23 02:49:27.523397338 -0800 @@ -408,7 +408,7 @@ } -struct pcmcia_low_level pb1x00_pcmcia_ops = { +struct pcmcia_low_level au1x00_pcmcia_ops = { pb1x00_pcmcia_init, pb1x00_pcmcia_shutdown, pb1x00_pcmcia_socket_state, diff -urN linux-2.4.28-bk3/drivers/pcmcia/au1000_xxs1500.c linux-2.4.28-bk4/drivers/pcmcia/au1000_xxs1500.c --- linux-2.4.28-bk3/drivers/pcmcia/au1000_xxs1500.c 2003-08-25 04:44:42.000000000 -0700 +++ linux-2.4.28-bk4/drivers/pcmcia/au1000_xxs1500.c 2004-11-23 02:49:27.523397338 -0800 @@ -92,7 +92,7 @@ gpio = au_readl(SYS_PINSTATERD); gpio2 = au_readl(GPIO2_PINSTATE); - vs = gpio2 & ((1<<8) | (1<<9)); + vs = (gpio2 >> 8) & 0x3; inserted = (!(gpio & 0x1) && !(gpio & 0x2)); state->ready = 0; @@ -110,8 +110,7 @@ case 3: /* 5V */ default: /* return without setting 'detect' */ - printk(KERN_ERR "au1x00_cs: unsupported VS\n", - vs); + printk(KERN_ERR "au1x00_cs: bad VS %d\n", vs); return; } state->detect = 1; @@ -156,7 +155,8 @@ break; case 50: /* Vcc 5V */ default: /* what's this ? */ - printk(KERN_ERR "au1x00_cs: unsupported VCC\n"); + printk(KERN_ERR "au1x00_cs: bad VCC %d\n", + configure->vcc); case 0: /* Vcc 0 */ /* turn off power */ au_sync_delay(100); @@ -182,7 +182,7 @@ return 0; } -struct pcmcia_low_level xxs1500_pcmcia_ops = { +struct pcmcia_low_level au1x00_pcmcia_ops = { xxs1500_pcmcia_init, xxs1500_pcmcia_shutdown, xxs1500_pcmcia_socket_state, diff -urN linux-2.4.28-bk3/drivers/pcmcia/ricoh.h linux-2.4.28-bk4/drivers/pcmcia/ricoh.h --- linux-2.4.28-bk3/drivers/pcmcia/ricoh.h 2003-06-13 07:51:35.000000000 -0700 +++ linux-2.4.28-bk4/drivers/pcmcia/ricoh.h 2004-11-23 02:49:27.524397379 -0800 @@ -109,7 +109,7 @@ /* 16-bit IO and memory timing registers */ #define RL5C4XX_16BIT_IO_0 0x0088 /* 16 bit */ -#define RL5C4XX_16BIT_MEM_0 0x0088 /* 16 bit */ +#define RL5C4XX_16BIT_MEM_0 0x008a /* 16 bit */ #define RL5C4XX_SETUP_MASK 0x0007 #define RL5C4XX_SETUP_SHIFT 0 #define RL5C4XX_CMD_MASK 0x01f0 diff -urN linux-2.4.28-bk3/drivers/sound/Config.in linux-2.4.28-bk4/drivers/sound/Config.in --- linux-2.4.28-bk3/drivers/sound/Config.in 2003-11-28 10:26:20.000000000 -0800 +++ linux-2.4.28-bk4/drivers/sound/Config.in 2004-11-23 02:49:27.548398357 -0800 @@ -74,6 +74,8 @@ fi if [ "$CONFIG_SOC_AU1X00" = "y" -o "$CONFIG_SOC_AU1500" = "y" ]; then dep_tristate ' Au1x00 Sound' CONFIG_SOUND_AU1X00 $CONFIG_SOUND + dep_tristate ' Au1550 PSC Sound' CONFIG_SOUND_AU1550_PSC $CONFIG_SOUND + dep_tristate ' Au1550 I2S Sound' CONFIG_SOUND_AU1550_I2S $CONFIG_SOUND fi dep_tristate ' Trident 4DWave DX/NX, SiS 7018 or ALi 5451 PCI Audio Core' CONFIG_SOUND_TRIDENT $CONFIG_SOUND $CONFIG_PCI diff -urN linux-2.4.28-bk3/drivers/sound/Makefile linux-2.4.28-bk4/drivers/sound/Makefile --- linux-2.4.28-bk3/drivers/sound/Makefile 2003-11-28 10:26:20.000000000 -0800 +++ linux-2.4.28-bk4/drivers/sound/Makefile 2004-11-23 02:49:27.548398357 -0800 @@ -69,6 +69,8 @@ obj-$(CONFIG_SOUND_ES1371) += es1371.o ac97_codec.o obj-$(CONFIG_SOUND_VRC5477) += nec_vrc5477.o ac97_codec.o obj-$(CONFIG_SOUND_AU1X00) += au1000.o ac97_codec.o +obj-$(CONFIG_SOUND_AU1550_PSC) += au1550_psc.o ac97_codec.o +obj-$(CONFIG_SOUND_AU1550_I2S) += au1550_i2s.o obj-$(CONFIG_SOUND_ESSSOLO1) += esssolo1.o obj-$(CONFIG_SOUND_FUSION) += cs46xx.o ac97_codec.o obj-$(CONFIG_SOUND_MAESTRO) += maestro.o diff -urN linux-2.4.28-bk3/drivers/sound/au1550_i2s.c linux-2.4.28-bk4/drivers/sound/au1550_i2s.c --- linux-2.4.28-bk3/drivers/sound/au1550_i2s.c 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.28-bk4/drivers/sound/au1550_i2s.c 2004-11-23 02:49:27.551398479 -0800 @@ -0,0 +1,1937 @@ +/* + * au1550_i2s.c -- Sound driver for Alchemy Au1550 MIPS + * Internet Edge Processor. + * + * Copyright 2004 Embedded Edge, LLC + * dan@embeddededge.com + * + * So, I was stupid.....Although this is an I2S interface, it still uses + * the PSC for communication. The existing au1550_psc.c should have been + * called au1550_ac97.c or something. Not going to rename anything now. + * + * Mostly copied from the au1550_psc.c driver and some from the + * PowerMac dbdma driver. + * We assume the processor can do memory coherent DMA. + * + * The SMBus (I2C) is required for the control of the codec. It + * appears at I2C address 0x36 (I2C binary 0011011). The Pb1550 + * uses the Wolfson WM8731 codec, which is controlled over the I2C. + * It's connected to a 12MHz clock, so we can only reliably support + * 96KHz, 48KHz, 32KHz, and 8KHz data rates. The framework for variable + * rate audio is in place, but we currently force it to 48KHz. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + * + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#undef OSS_DOCUMENTED_MIXER_SEMANTICS + +#define AU1550_MODULE_NAME "Au1550 i2s audio" +#define PFX AU1550_MODULE_NAME + +/* Define this if you want to try running at the 44.1 KHz rate. + * It's just a little off, I think it's actually 44117 or something. + * I did this for debugging, since many programs, including this + * driver, will try to upsample from 44.1 to 48 KHz. + * Seems to work well, we'll just leave it this way. + */ +#define TRY_441KHz + +#ifdef TRY_441KHz +#define SAMP_RATE 44100 +#else +#define SAMP_RATE 48000 +#endif + +/* The number of DBDMA ring descriptors to allocate. No sense making + * this too large....if you can't keep up with a few you aren't likely + * to be able to with lots of them, either. + */ +#define NUM_DBDMA_DESCRIPTORS 4 + +#define err(format, arg...) printk(KERN_ERR PFX ": " format "\n" , ## arg) +#define info(format, arg...) printk(KERN_INFO PFX ": " format "\n" , ## arg) + +/* Boot options + * 0 = no VRA, 1 = use VRA if codec supports it + * The framework is here, but we currently force no VRA. + */ +static int vra = 0; +MODULE_PARM(vra, "i"); +MODULE_PARM_DESC(vra, "if 1 use VRA if codec supports it"); + +static struct au1550_state { + /* soundcore stuff */ + int dev_audio; + + spinlock_t lock; + struct semaphore open_sem; + struct semaphore sem; + mode_t open_mode; + wait_queue_head_t open_wait; + int no_vra; + volatile psc_i2s_t *psc_addr; + + struct dmabuf { + u32 dmanr; + unsigned sample_rate; + unsigned src_factor; + unsigned sample_size; + int num_channels; + int dma_bytes_per_sample; + int user_bytes_per_sample; + int cnt_factor; + + void *rawbuf; + unsigned buforder; + unsigned numfrag; + unsigned fragshift; + void *nextIn; + void *nextOut; + int count; + unsigned total_bytes; + unsigned error; + wait_queue_head_t wait; + + /* redundant, but makes calculations easier */ + unsigned fragsize; + unsigned dma_fragsize; + unsigned dmasize; + unsigned dma_qcount; + + /* OSS stuff */ + unsigned mapped:1; + unsigned ready:1; + unsigned stopped:1; + unsigned ossfragshift; + int ossmaxfrags; + unsigned subdivision; + } dma_dac, dma_adc; +} au1550_state; + +static unsigned +ld2(unsigned int x) +{ + unsigned r = 0; + + if (x >= 0x10000) { + x >>= 16; + r += 16; + } + if (x >= 0x100) { + x >>= 8; + r += 8; + } + if (x >= 0x10) { + x >>= 4; + r += 4; + } + if (x >= 4) { + x >>= 2; + r += 2; + } + if (x >= 2) + r++; + return r; +} + +static void +au1550_delay(int msec) +{ + unsigned long tmo; + signed long tmo2; + + if (in_interrupt()) + return; + + tmo = jiffies + (msec * HZ) / 1000; + for (;;) { + tmo2 = tmo - jiffies; + if (tmo2 <= 0) + break; + schedule_timeout(tmo2); + } +} + +/* Just a place holder. The Wolfson codec is a write only device, + * so we would have to keep a local copy of the data. + */ +#if 0 +static u8 +rdcodec(u8 addr) +{ + return 0 /* data */; +} +#endif + + +static void +wrcodec(u8 ctlreg, u8 val) +{ + int rcnt; + extern int pb1550_wm_codec_write(u8 addr, u8 reg, u8 val); + + /* The codec is a write only device, with a 16-bit control/data + * word. Although it is written as two bytes on the I2C, the + * format is actually 7 bits of register and 9 bits of data. + * The ls bit of the first byte is the ms bit of the data. + */ + rcnt = 0; + while ((pb1550_wm_codec_write((0x36 >> 1), ctlreg, val) != 1) + && (rcnt < 50)) { + rcnt++; +#if 0 + printk("Codec write retry %02x %02x\n", ctlreg, val); +#endif + } +} + +void +codec_init(void) +{ + wrcodec(0x1e, 0x00); /* Reset */ + au1550_delay(200); + wrcodec(0x0c, 0x00); /* Power up everything */ + au1550_delay(10); + wrcodec(0x12, 0x00); /* Deactivate codec */ + au1550_delay(10); + wrcodec(0x08, 0x10); /* Select DAC outputs to line out */ + au1550_delay(10); + wrcodec(0x0a, 0x00); /* Disable output mute */ + au1550_delay(10); + wrcodec(0x05, 0x70); /* lower output volume on headphone */ + au1550_delay(10); + wrcodec(0x0e, 0x02); /* Set slave, 16-bit, I2S modes */ + au1550_delay(10); + wrcodec(0x10, 0x01); /* 12MHz (USB), 250fs */ + au1550_delay(10); + wrcodec(0x12, 0x01); /* Activate codec */ + au1550_delay(10); +} + +/* stop the ADC before calling */ +static void +set_adc_rate(struct au1550_state *s, unsigned rate) +{ + struct dmabuf *adc = &s->dma_adc; + struct dmabuf *dac = &s->dma_dac; + + if (s->no_vra) { + /* calc SRC factor + */ + adc->src_factor = (((SAMP_RATE*2) / rate) + 1) >> 1; + adc->sample_rate = SAMP_RATE / adc->src_factor; + return; + } + + adc->src_factor = 1; + + +#if 0 + rate = rate > SAMP_RATE ? SAMP_RATE : rate; + + wrcodec(0, 0); /* I don't yet know what to write here if we vra */ + + adc->sample_rate = rate; + dac->sample_rate = rate; +#endif +} + +/* stop the DAC before calling */ +static void +set_dac_rate(struct au1550_state *s, unsigned rate) +{ + struct dmabuf *dac = &s->dma_dac; + struct dmabuf *adc = &s->dma_adc; + + if (s->no_vra) { + /* calc SRC factor + */ + dac->src_factor = (((SAMP_RATE*2) / rate) + 1) >> 1; + dac->sample_rate = SAMP_RATE / dac->src_factor; + return; + } + + dac->src_factor = 1; + +#if 0 + rate = rate > SAMP_RATE ? SAMP_RATE : rate; + + wrcodec(0, 0); /* I don't yet know what to write here if we vra */ + + adc->sample_rate = rate; + dac->sample_rate = rate; +#endif +} + +static void +stop_dac(struct au1550_state *s) +{ + struct dmabuf *db = &s->dma_dac; + unsigned long flags; + uint stat; + volatile psc_i2s_t *ip; + + if (db->stopped) + return; + + ip = s->psc_addr; + spin_lock_irqsave(&s->lock, flags); + + ip->psc_i2spcr = PSC_I2SPCR_TP; + au_sync(); + + /* Wait for Transmit Busy to show disabled. + */ + do { + stat = ip->psc_i2sstat; + au_sync(); + } while ((stat & PSC_I2SSTAT_TB) != 0); + + au1xxx_dbdma_reset(db->dmanr); + + db->stopped = 1; + + spin_unlock_irqrestore(&s->lock, flags); +} + +static void +stop_adc(struct au1550_state *s) +{ + struct dmabuf *db = &s->dma_adc; + unsigned long flags; + uint stat; + volatile psc_i2s_t *ip; + + if (db->stopped) + return; + + ip = s->psc_addr; + spin_lock_irqsave(&s->lock, flags); + + ip->psc_i2spcr = PSC_I2SPCR_RP; + au_sync(); + + /* Wait for Receive Busy to show disabled. + */ + do { + stat = ip->psc_i2sstat; + au_sync(); + } while ((stat & PSC_I2SSTAT_RB) != 0); + + au1xxx_dbdma_reset(db->dmanr); + + db->stopped = 1; + + spin_unlock_irqrestore(&s->lock, flags); +} + + +static void +set_xmit_slots(int num_channels) +{ + /* This is here just as a place holder. The WM8731 only + * supports two fixed channels. + */ +} + +static void +set_recv_slots(int num_channels) +{ + /* This is here just as a place holder. The WM8731 only + * supports two fixed channels. + */ +} + +static void +start_dac(struct au1550_state *s) +{ + struct dmabuf *db = &s->dma_dac; + unsigned long flags; + volatile psc_i2s_t *ip; + + if (!db->stopped) + return; + + spin_lock_irqsave(&s->lock, flags); + + ip = s->psc_addr; + set_xmit_slots(db->num_channels); + ip->psc_i2spcr = PSC_I2SPCR_TC; + au_sync(); + ip->psc_i2spcr = PSC_I2SPCR_TS; + au_sync(); + + au1xxx_dbdma_start(db->dmanr); + + db->stopped = 0; + + spin_unlock_irqrestore(&s->lock, flags); +} + +static void +start_adc(struct au1550_state *s) +{ + struct dmabuf *db = &s->dma_adc; + int i; + volatile psc_i2s_t *ip; + + if (!db->stopped) + return; + + /* Put two buffers on the ring to get things started. + */ + for (i=0; i<2; i++) { + au1xxx_dbdma_put_dest(db->dmanr, db->nextIn, db->dma_fragsize); + + db->nextIn += db->dma_fragsize; + if (db->nextIn >= db->rawbuf + db->dmasize) + db->nextIn -= db->dmasize; + } + + ip = s->psc_addr; + set_recv_slots(db->num_channels); + au1xxx_dbdma_start(db->dmanr); + ip->psc_i2spcr = PSC_I2SPCR_RC; + au_sync(); + ip->psc_i2spcr = PSC_I2SPCR_RS; + au_sync(); + + db->stopped = 0; +} + +static int +prog_dmabuf(struct au1550_state *s, struct dmabuf *db) +{ + unsigned user_bytes_per_sec; + unsigned bufs; + unsigned rate = db->sample_rate; + + if (!db->rawbuf) { + db->ready = db->mapped = 0; + db->buforder = 5; /* 32 * PAGE_SIZE */ + db->rawbuf = kmalloc((PAGE_SIZE << db->buforder), GFP_KERNEL); + if (!db->rawbuf) + return -ENOMEM; + } + + db->cnt_factor = 1; + if (db->sample_size == 8) + db->cnt_factor *= 2; + if (db->num_channels == 1) + db->cnt_factor *= 2; + db->cnt_factor *= db->src_factor; + + db->count = 0; + db->dma_qcount = 0; + db->nextIn = db->nextOut = db->rawbuf; + + db->user_bytes_per_sample = (db->sample_size>>3) * db->num_channels; + db->dma_bytes_per_sample = 2 * ((db->num_channels == 1) ? + 2 : db->num_channels); + + user_bytes_per_sec = rate * db->user_bytes_per_sample; + bufs = PAGE_SIZE << db->buforder; + if (db->ossfragshift) { + if ((1000 << db->ossfragshift) < user_bytes_per_sec) + db->fragshift = ld2(user_bytes_per_sec/1000); + else + db->fragshift = db->ossfragshift; + } else { + db->fragshift = ld2(user_bytes_per_sec / 100 / + (db->subdivision ? db->subdivision : 1)); + if (db->fragshift < 3) + db->fragshift = 3; + } + + db->fragsize = 1 << db->fragshift; + db->dma_fragsize = db->fragsize * db->cnt_factor; + db->numfrag = bufs / db->dma_fragsize; + + while (db->numfrag < 4 && db->fragshift > 3) { + db->fragshift--; + db->fragsize = 1 << db->fragshift; + db->dma_fragsize = db->fragsize * db->cnt_factor; + db->numfrag = bufs / db->dma_fragsize; + } + + if (db->ossmaxfrags >= 4 && db->ossmaxfrags < db->numfrag) + db->numfrag = db->ossmaxfrags; + + db->dmasize = db->dma_fragsize * db->numfrag; + memset(db->rawbuf, 0, bufs); + +#ifdef AU1000_VERBOSE_DEBUG + dbg("rate=%d, samplesize=%d, channels=%d", + rate, db->sample_size, db->num_channels); + dbg("fragsize=%d, cnt_factor=%d, dma_fragsize=%d", + db->fragsize, db->cnt_factor, db->dma_fragsize); + dbg("numfrag=%d, dmasize=%d", db->numfrag, db->dmasize); +#endif + + db->ready = 1; + return 0; +} + +static int +prog_dmabuf_adc(struct au1550_state *s) +{ + stop_adc(s); + return prog_dmabuf(s, &s->dma_adc); + +} + +static int +prog_dmabuf_dac(struct au1550_state *s) +{ + stop_dac(s); + return prog_dmabuf(s, &s->dma_dac); +} + + +/* hold spinlock for the following */ +static void +dac_dma_interrupt(int irq, void *dev_id, struct pt_regs *regs) +{ + struct au1550_state *s = (struct au1550_state *) dev_id; + struct dmabuf *db = &s->dma_dac; + u32 i2s_stat; + volatile psc_i2s_t *ip; + + ip = s->psc_addr; + i2s_stat = ip->psc_i2sstat; +#ifdef AU1000_VERBOSE_DEBUG + if (i2s_stat & (PSC_I2SSTAT_TF | PSC_I2SSTAT_TR | PSC_I2SSTAT_TF)) + dbg("I2S status = 0x%08x", i2s_stat); +#endif + db->dma_qcount--; + + if (db->count >= db->fragsize) { + if (au1xxx_dbdma_put_source(db->dmanr, db->nextOut, + db->fragsize) == 0) { + err("qcount < 2 and no ring room!"); + } + db->nextOut += db->fragsize; + if (db->nextOut >= db->rawbuf + db->dmasize) + db->nextOut -= db->dmasize; + db->count -= db->fragsize; + db->total_bytes += db->dma_fragsize; + db->dma_qcount++; + } + + /* wake up anybody listening */ + if (waitqueue_active(&db->wait)) + wake_up(&db->wait); +} + + +static void +adc_dma_interrupt(int irq, void *dev_id, struct pt_regs *regs) +{ + struct au1550_state *s = (struct au1550_state *)dev_id; + struct dmabuf *dp = &s->dma_adc; + u32 obytes; + char *obuf; + + /* Pull the buffer from the dma queue. + */ + au1xxx_dbdma_get_dest(dp->dmanr, (void *)(&obuf), &obytes); + + if ((dp->count + obytes) > dp->dmasize) { + /* Overrun. Stop ADC and log the error + */ + stop_adc(s); + dp->error++; + err("adc overrun"); + return; + } + + /* Put a new empty buffer on the destination DMA. + */ + au1xxx_dbdma_put_dest(dp->dmanr, dp->nextIn, dp->dma_fragsize); + + dp->nextIn += dp->dma_fragsize; + if (dp->nextIn >= dp->rawbuf + dp->dmasize) + dp->nextIn -= dp->dmasize; + + dp->count += obytes; + dp->total_bytes += obytes; + + /* wake up anybody listening + */ + if (waitqueue_active(&dp->wait)) + wake_up(&dp->wait); + +} + +static loff_t +au1550_llseek(struct file *file, loff_t offset, int origin) +{ + return -ESPIPE; +} + + +#if 0 +static int +au1550_open_mixdev(struct inode *inode, struct file *file) +{ + file->private_data = &au1550_state; + return 0; +} + +static int +au1550_release_mixdev(struct inode *inode, struct file *file) +{ + return 0; +} + +static int +mixdev_ioctl(struct ac97_codec *codec, unsigned int cmd, + unsigned long arg) +{ + return codec->mixer_ioctl(codec, cmd, arg); +} + +static int +au1550_ioctl_mixdev(struct inode *inode, struct file *file, + unsigned int cmd, unsigned long arg) +{ + struct au1550_state *s = (struct au1550_state *)file->private_data; + struct ac97_codec *codec = s->codec; + + return mixdev_ioctl(codec, cmd, arg); +} + +static /*const */ struct file_operations au1550_mixer_fops = { + owner:THIS_MODULE, + llseek:au1550_llseek, + ioctl:au1550_ioctl_mixdev, + open:au1550_open_mixdev, + release:au1550_release_mixdev, +}; +#endif + +static int +drain_dac(struct au1550_state *s, int nonblock) +{ + unsigned long flags; + int count, tmo; + + if (s->dma_dac.mapped || !s->dma_dac.ready || s->dma_dac.stopped) + return 0; + + for (;;) { + spin_lock_irqsave(&s->lock, flags); + count = s->dma_dac.count; + spin_unlock_irqrestore(&s->lock, flags); + if (count <= 0) + break; + if (signal_pending(current)) + break; + if (nonblock) + return -EBUSY; + tmo = 1000 * count / (s->no_vra ? + SAMP_RATE : s->dma_dac.sample_rate); + tmo /= s->dma_dac.dma_bytes_per_sample; + au1550_delay(tmo); + } + if (signal_pending(current)) + return -ERESTARTSYS; + return 0; +} + +static inline u8 S16_TO_U8(s16 ch) +{ + return (u8) (ch >> 8) + 0x80; +} +static inline s16 U8_TO_S16(u8 ch) +{ + return (s16) (ch - 0x80) << 8; +} + +/* + * Translates user samples to dma buffer suitable for audio DAC data: + * If mono, copy left channel to right channel in dma buffer. + * If 8 bit samples, cvt to 16-bit before writing to dma buffer. + * If interpolating (no VRA), duplicate every audio frame src_factor times. + */ +static int +translate_from_user(struct dmabuf *db, char* dmabuf, char* userbuf, + int dmacount) +{ + int sample, i; + int interp_bytes_per_sample; + int num_samples; + int mono = (db->num_channels == 1); + char usersample[12]; + s16 ch, dmasample[6]; + + if (db->sample_size == 16 && !mono && db->src_factor == 1) { + /* no translation necessary, just copy + */ + if (copy_from_user(dmabuf, userbuf, dmacount)) + return -EFAULT; + return dmacount; + } + + interp_bytes_per_sample = db->dma_bytes_per_sample * db->src_factor; + num_samples = dmacount / interp_bytes_per_sample; + + for (sample = 0; sample < num_samples; sample++) { + if (copy_from_user(usersample, userbuf, + db->user_bytes_per_sample)) { + return -EFAULT; + } + + for (i = 0; i < db->num_channels; i++) { + if (db->sample_size == 8) + ch = U8_TO_S16(usersample[i]); + else + ch = *((s16 *) (&usersample[i * 2])); + dmasample[i] = ch; + if (mono) + dmasample[i + 1] = ch; /* right channel */ + } + + /* duplicate every audio frame src_factor times + */ + for (i = 0; i < db->src_factor; i++) + memcpy(dmabuf, dmasample, db->dma_bytes_per_sample); + + userbuf += db->user_bytes_per_sample; + dmabuf += interp_bytes_per_sample; + } + + return num_samples * interp_bytes_per_sample; +} + +/* + * Translates audio ADC samples to user buffer: + * If mono, send only left channel to user buffer. + * If 8 bit samples, cvt from 16 to 8 bit before writing to user buffer. + * If decimating (no VRA), skip over src_factor audio frames. + */ +static int +translate_to_user(struct dmabuf *db, char* userbuf, char* dmabuf, + int dmacount) +{ + int sample, i; + int interp_bytes_per_sample; + int num_samples; + int mono = (db->num_channels == 1); + char usersample[12]; + + if (db->sample_size == 16 && !mono && db->src_factor == 1) { + /* no translation necessary, just copy + */ + if (copy_to_user(userbuf, dmabuf, dmacount)) + return -EFAULT; + return dmacount; + } + + interp_bytes_per_sample = db->dma_bytes_per_sample * db->src_factor; + num_samples = dmacount / interp_bytes_per_sample; + + for (sample = 0; sample < num_samples; sample++) { + for (i = 0; i < db->num_channels; i++) { + if (db->sample_size == 8) + usersample[i] = + S16_TO_U8(*((s16 *) (&dmabuf[i * 2]))); + else + *((s16 *) (&usersample[i * 2])) = + *((s16 *) (&dmabuf[i * 2])); + } + + if (copy_to_user(userbuf, usersample, + db->user_bytes_per_sample)) { + return -EFAULT; + } + + userbuf += db->user_bytes_per_sample; + dmabuf += interp_bytes_per_sample; + } + + return num_samples * interp_bytes_per_sample; +} + +/* + * Copy audio data to/from user buffer from/to dma buffer, taking care + * that we wrap when reading/writing the dma buffer. Returns actual byte + * count written to or read from the dma buffer. + */ +static int +copy_dmabuf_user(struct dmabuf *db, char* userbuf, int count, int to_user) +{ + char *bufptr = to_user ? db->nextOut : db->nextIn; + char *bufend = db->rawbuf + db->dmasize; + int cnt, ret; + + if (bufptr + count > bufend) { + int partial = (int) (bufend - bufptr); + if (to_user) { + if ((cnt = translate_to_user(db, userbuf, + bufptr, partial)) < 0) + return cnt; + ret = cnt; + if ((cnt = translate_to_user(db, userbuf + partial, + db->rawbuf, + count - partial)) < 0) + return cnt; + ret += cnt; + } else { + if ((cnt = translate_from_user(db, bufptr, userbuf, + partial)) < 0) + return cnt; + ret = cnt; + if ((cnt = translate_from_user(db, db->rawbuf, + userbuf + partial, + count - partial)) < 0) + return cnt; + ret += cnt; + } + } else { + if (to_user) + ret = translate_to_user(db, userbuf, bufptr, count); + else + ret = translate_from_user(db, bufptr, userbuf, count); + } + + return ret; +} + + +static ssize_t +au1550_read(struct file *file, char *buffer, size_t count, loff_t *ppos) +{ + struct au1550_state *s = (struct au1550_state *)file->private_data; + struct dmabuf *db = &s->dma_adc; + DECLARE_WAITQUEUE(wait, current); + ssize_t ret; + unsigned long flags; + int cnt, usercnt, avail; + + if (ppos != &file->f_pos) + return -ESPIPE; + if (db->mapped) + return -ENXIO; + if (!access_ok(VERIFY_WRITE, buffer, count)) + return -EFAULT; + ret = 0; + + count *= db->cnt_factor; + + down(&s->sem); + add_wait_queue(&db->wait, &wait); + + while (count > 0) { + /* wait for samples in ADC dma buffer + */ + do { + if (db->stopped) + start_adc(s); + spin_lock_irqsave(&s->lock, flags); + avail = db->count; + if (avail <= 0) + __set_current_state(TASK_INTERRUPTIBLE); + spin_unlock_irqrestore(&s->lock, flags); + if (avail <= 0) { + if (file->f_flags & O_NONBLOCK) { + if (!ret) + ret = -EAGAIN; + goto out; + } + up(&s->sem); + schedule(); + if (signal_pending(current)) { + if (!ret) + ret = -ERESTARTSYS; + goto out2; + } + down(&s->sem); + } + } while (avail <= 0); + + /* copy from nextOut to user + */ + if ((cnt = copy_dmabuf_user(db, buffer, + count > avail ? + avail : count, 1)) < 0) { + if (!ret) + ret = -EFAULT; + goto out; + } + + spin_lock_irqsave(&s->lock, flags); + db->count -= cnt; + db->nextOut += cnt; + if (db->nextOut >= db->rawbuf + db->dmasize) + db->nextOut -= db->dmasize; + spin_unlock_irqrestore(&s->lock, flags); + + count -= cnt; + usercnt = cnt / db->cnt_factor; + buffer += usercnt; + ret += usercnt; + } /* while (count > 0) */ + +out: + up(&s->sem); +out2: + remove_wait_queue(&db->wait, &wait); + set_current_state(TASK_RUNNING); + return ret; +} + +static ssize_t +au1550_write(struct file *file, const char *buffer, size_t count, loff_t * ppos) +{ + struct au1550_state *s = (struct au1550_state *)file->private_data; + struct dmabuf *db = &s->dma_dac; + DECLARE_WAITQUEUE(wait, current); + ssize_t ret = 0; + unsigned long flags; + int cnt, usercnt, avail; + +#ifdef AU1000_VERBOSE_DEBUG + dbg("write: count=%d", count); +#endif + + if (ppos != &file->f_pos) + return -ESPIPE; + if (db->mapped) + return -ENXIO; + if (!access_ok(VERIFY_READ, buffer, count)) + return -EFAULT; + + count *= db->cnt_factor; + + down(&s->sem); + add_wait_queue(&db->wait, &wait); + + while (count > 0) { + /* wait for space in playback buffer + */ + do { + spin_lock_irqsave(&s->lock, flags); + avail = (int) db->dmasize - db->count; + if (avail <= 0) + __set_current_state(TASK_INTERRUPTIBLE); + spin_unlock_irqrestore(&s->lock, flags); + if (avail <= 0) { + if (file->f_flags & O_NONBLOCK) { + if (!ret) + ret = -EAGAIN; + goto out; + } + up(&s->sem); + schedule(); + if (signal_pending(current)) { + if (!ret) + ret = -ERESTARTSYS; + goto out2; + } + down(&s->sem); + } + } while (avail <= 0); + + /* copy from user to nextIn + */ + if ((cnt = copy_dmabuf_user(db, (char *) buffer, + count > avail ? + avail : count, 0)) < 0) { + if (!ret) + ret = -EFAULT; + goto out; + } + + spin_lock_irqsave(&s->lock, flags); + db->count += cnt; + db->nextIn += cnt; + if (db->nextIn >= db->rawbuf + db->dmasize) + db->nextIn -= db->dmasize; + + /* If the data is available, we want to keep two buffers + * on the dma queue. If the queue count reaches zero, + * we know the dma has stopped. + */ + while ((db->dma_qcount < 2) && (db->count >= db->fragsize)) { + if (au1xxx_dbdma_put_source(db->dmanr, db->nextOut, + db->fragsize) == 0) { + err("qcount < 2 and no ring room!"); + } + db->nextOut += db->fragsize; + if (db->nextOut >= db->rawbuf + db->dmasize) + db->nextOut -= db->dmasize; + db->count -= db->fragsize; + db->total_bytes += db->dma_fragsize; + if (db->dma_qcount == 0) + start_dac(s); + db->dma_qcount++; + } + spin_unlock_irqrestore(&s->lock, flags); + + count -= cnt; + usercnt = cnt / db->cnt_factor; + buffer += usercnt; + ret += usercnt; + } /* while (count > 0) */ + +out: + up(&s->sem); +out2: + remove_wait_queue(&db->wait, &wait); + set_current_state(TASK_RUNNING); + return ret; +} + + +/* No kernel lock - we have our own spinlock */ +static unsigned int +au1550_poll(struct file *file, struct poll_table_struct *wait) +{ + struct au1550_state *s = (struct au1550_state *)file->private_data; + unsigned long flags; + unsigned int mask = 0; + + if (file->f_mode & FMODE_WRITE) { + if (!s->dma_dac.ready) + return 0; + poll_wait(file, &s->dma_dac.wait, wait); + } + if (file->f_mode & FMODE_READ) { + if (!s->dma_adc.ready) + return 0; + poll_wait(file, &s->dma_adc.wait, wait); + } + + spin_lock_irqsave(&s->lock, flags); + + if (file->f_mode & FMODE_READ) { + if (s->dma_adc.count >= (signed)s->dma_adc.dma_fragsize) + mask |= POLLIN | POLLRDNORM; + } + if (file->f_mode & FMODE_WRITE) { + if (s->dma_dac.mapped) { + if (s->dma_dac.count >= + (signed)s->dma_dac.dma_fragsize) + mask |= POLLOUT | POLLWRNORM; + } else { + if ((signed) s->dma_dac.dmasize >= + s->dma_dac.count + (signed)s->dma_dac.dma_fragsize) + mask |= POLLOUT | POLLWRNORM; + } + } + spin_unlock_irqrestore(&s->lock, flags); + return mask; +} + +static int +au1550_mmap(struct file *file, struct vm_area_struct *vma) +{ + struct au1550_state *s = (struct au1550_state *)file->private_data; + struct dmabuf *db; + unsigned long size; + int ret = 0; + + lock_kernel(); + down(&s->sem); + if (vma->vm_flags & VM_WRITE) + db = &s->dma_dac; + else if (vma->vm_flags & VM_READ) + db = &s->dma_adc; + else { + ret = -EINVAL; + goto out; + } + if (vma->vm_pgoff != 0) { + ret = -EINVAL; + goto out; + } + size = vma->vm_end - vma->vm_start; + if (size > (PAGE_SIZE << db->buforder)) { + ret = -EINVAL; + goto out; + } + if (remap_page_range(vma->vm_start, virt_to_phys(db->rawbuf), + size, vma->vm_page_prot)) { + ret = -EAGAIN; + goto out; + } + vma->vm_flags &= ~VM_IO; + db->mapped = 1; +out: + up(&s->sem); + unlock_kernel(); + return ret; +} + + +#ifdef AU1000_VERBOSE_DEBUG +static struct ioctl_str_t { + unsigned int cmd; + const char *str; +} ioctl_str[] = { + {SNDCTL_DSP_RESET, "SNDCTL_DSP_RESET"}, + {SNDCTL_DSP_SYNC, "SNDCTL_DSP_SYNC"}, + {SNDCTL_DSP_SPEED, "SNDCTL_DSP_SPEED"}, + {SNDCTL_DSP_STEREO, "SNDCTL_DSP_STEREO"}, + {SNDCTL_DSP_GETBLKSIZE, "SNDCTL_DSP_GETBLKSIZE"}, + {SNDCTL_DSP_SAMPLESIZE, "SNDCTL_DSP_SAMPLESIZE"}, + {SNDCTL_DSP_CHANNELS, "SNDCTL_DSP_CHANNELS"}, + {SOUND_PCM_WRITE_CHANNELS, "SOUND_PCM_WRITE_CHANNELS"}, + {SOUND_PCM_WRITE_FILTER, "SOUND_PCM_WRITE_FILTER"}, + {SNDCTL_DSP_POST, "SNDCTL_DSP_POST"}, + {SNDCTL_DSP_SUBDIVIDE, "SNDCTL_DSP_SUBDIVIDE"}, + {SNDCTL_DSP_SETFRAGMENT, "SNDCTL_DSP_SETFRAGMENT"}, + {SNDCTL_DSP_GETFMTS, "SNDCTL_DSP_GETFMTS"}, + {SNDCTL_DSP_SETFMT, "SNDCTL_DSP_SETFMT"}, + {SNDCTL_DSP_GETOSPACE, "SNDCTL_DSP_GETOSPACE"}, + {SNDCTL_DSP_GETISPACE, "SNDCTL_DSP_GETISPACE"}, + {SNDCTL_DSP_NONBLOCK, "SNDCTL_DSP_NONBLOCK"}, + {SNDCTL_DSP_GETCAPS, "SNDCTL_DSP_GETCAPS"}, + {SNDCTL_DSP_GETTRIGGER, "SNDCTL_DSP_GETTRIGGER"}, + {SNDCTL_DSP_SETTRIGGER, "SNDCTL_DSP_SETTRIGGER"}, + {SNDCTL_DSP_GETIPTR, "SNDCTL_DSP_GETIPTR"}, + {SNDCTL_DSP_GETOPTR, "SNDCTL_DSP_GETOPTR"}, + {SNDCTL_DSP_MAPINBUF, "SNDCTL_DSP_MAPINBUF"}, + {SNDCTL_DSP_MAPOUTBUF, "SNDCTL_DSP_MAPOUTBUF"}, + {SNDCTL_DSP_SETSYNCRO, "SNDCTL_DSP_SETSYNCRO"}, + {SNDCTL_DSP_SETDUPLEX, "SNDCTL_DSP_SETDUPLEX"}, + {SNDCTL_DSP_GETODELAY, "SNDCTL_DSP_GETODELAY"}, + {SNDCTL_DSP_GETCHANNELMASK, "SNDCTL_DSP_GETCHANNELMASK"}, + {SNDCTL_DSP_BIND_CHANNEL, "SNDCTL_DSP_BIND_CHANNEL"}, + {OSS_GETVERSION, "OSS_GETVERSION"}, + {SOUND_PCM_READ_RATE, "SOUND_PCM_READ_RATE"}, + {SOUND_PCM_READ_CHANNELS, "SOUND_PCM_READ_CHANNELS"}, + {SOUND_PCM_READ_BITS, "SOUND_PCM_READ_BITS"}, + {SOUND_PCM_READ_FILTER, "SOUND_PCM_READ_FILTER"} +}; +#endif + +static int +dma_count_done(struct dmabuf *db) +{ + if (db->stopped) + return 0; + + return db->dma_fragsize - au1xxx_get_dma_residue(db->dmanr); +} + + +static int +au1550_ioctl(struct inode *inode, struct file *file, unsigned int cmd, + unsigned long arg) +{ + struct au1550_state *s = (struct au1550_state *)file->private_data; + unsigned long flags; + audio_buf_info abinfo; + count_info cinfo; + int count; + int val, mapped, ret, diff; + + mapped = ((file->f_mode & FMODE_WRITE) && s->dma_dac.mapped) || + ((file->f_mode & FMODE_READ) && s->dma_adc.mapped); + +#ifdef AU1000_VERBOSE_DEBUG + for (count=0; countf_mode & FMODE_WRITE) + return drain_dac(s, file->f_flags & O_NONBLOCK); + return 0; + + case SNDCTL_DSP_SETDUPLEX: + return 0; + + case SNDCTL_DSP_GETCAPS: + return put_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME | + DSP_CAP_TRIGGER | DSP_CAP_MMAP, (int *)arg); + + case SNDCTL_DSP_RESET: + if (file->f_mode & FMODE_WRITE) { + stop_dac(s); + synchronize_irq(); + s->dma_dac.count = s->dma_dac.total_bytes = 0; + s->dma_dac.nextIn = s->dma_dac.nextOut = + s->dma_dac.rawbuf; + } + if (file->f_mode & FMODE_READ) { + stop_adc(s); + synchronize_irq(); + s->dma_adc.count = s->dma_adc.total_bytes = 0; + s->dma_adc.nextIn = s->dma_adc.nextOut = + s->dma_adc.rawbuf; + } + return 0; + + case SNDCTL_DSP_SPEED: + if (get_user(val, (int *) arg)) + return -EFAULT; + if (val >= 0) { + if (file->f_mode & FMODE_READ) { + stop_adc(s); + set_adc_rate(s, val); + } + if (file->f_mode & FMODE_WRITE) { + stop_dac(s); + set_dac_rate(s, val); + } + if (s->open_mode & FMODE_READ) + if ((ret = prog_dmabuf_adc(s))) + return ret; + if (s->open_mode & FMODE_WRITE) + if ((ret = prog_dmabuf_dac(s))) + return ret; + } + return put_user((file->f_mode & FMODE_READ) ? + s->dma_adc.sample_rate : + s->dma_dac.sample_rate, + (int *)arg); + + case SNDCTL_DSP_STEREO: + if (get_user(val, (int *) arg)) + return -EFAULT; + if (file->f_mode & FMODE_READ) { + stop_adc(s); + s->dma_adc.num_channels = val ? 2 : 1; + if ((ret = prog_dmabuf_adc(s))) + return ret; + } + if (file->f_mode & FMODE_WRITE) { + stop_dac(s); + s->dma_dac.num_channels = val ? 2 : 1; + if ((ret = prog_dmabuf_dac(s))) + return ret; + } + return 0; + + case SNDCTL_DSP_CHANNELS: + if (get_user(val, (int *) arg)) + return -EFAULT; + if (val != 0) { + if (file->f_mode & FMODE_READ) { + if (val < 0 || val > 2) + return -EINVAL; + stop_adc(s); + s->dma_adc.num_channels = val; + if ((ret = prog_dmabuf_adc(s))) + return ret; + } + if (file->f_mode & FMODE_WRITE) { + switch (val) { + case 1: + case 2: + break; + default: + return -EINVAL; + } + + stop_dac(s); + s->dma_dac.num_channels = val; + if ((ret = prog_dmabuf_dac(s))) + return ret; + } + } + return put_user(val, (int *) arg); + + case SNDCTL_DSP_GETFMTS: /* Returns a mask */ + return put_user(AFMT_S16_LE | AFMT_U8, (int *) arg); + + case SNDCTL_DSP_SETFMT: /* Selects ONE fmt */ + if (get_user(val, (int *) arg)) + return -EFAULT; + if (val != AFMT_QUERY) { + if (file->f_mode & FMODE_READ) { + stop_adc(s); + if (val == AFMT_S16_LE) + s->dma_adc.sample_size = 16; + else { + val = AFMT_U8; + s->dma_adc.sample_size = 8; + } + if ((ret = prog_dmabuf_adc(s))) + return ret; + } + if (file->f_mode & FMODE_WRITE) { + stop_dac(s); + if (val == AFMT_S16_LE) + s->dma_dac.sample_size = 16; + else { + val = AFMT_U8; + s->dma_dac.sample_size = 8; + } + if ((ret = prog_dmabuf_dac(s))) + return ret; + } + } else { + if (file->f_mode & FMODE_READ) + val = (s->dma_adc.sample_size == 16) ? + AFMT_S16_LE : AFMT_U8; + else + val = (s->dma_dac.sample_size == 16) ? + AFMT_S16_LE : AFMT_U8; + } + return put_user(val, (int *) arg); + + case SNDCTL_DSP_POST: + return 0; + + case SNDCTL_DSP_GETTRIGGER: + val = 0; + spin_lock_irqsave(&s->lock, flags); + if (file->f_mode & FMODE_READ && !s->dma_adc.stopped) + val |= PCM_ENABLE_INPUT; + if (file->f_mode & FMODE_WRITE && !s->dma_dac.stopped) + val |= PCM_ENABLE_OUTPUT; + spin_unlock_irqrestore(&s->lock, flags); + return put_user(val, (int *) arg); + + case SNDCTL_DSP_SETTRIGGER: + if (get_user(val, (int *) arg)) + return -EFAULT; + if (file->f_mode & FMODE_READ) { + if (val & PCM_ENABLE_INPUT) + start_adc(s); + else + stop_adc(s); + } + if (file->f_mode & FMODE_WRITE) { + if (val & PCM_ENABLE_OUTPUT) + start_dac(s); + else + stop_dac(s); + } + return 0; + + case SNDCTL_DSP_GETOSPACE: + if (!(file->f_mode & FMODE_WRITE)) + return -EINVAL; + abinfo.fragsize = s->dma_dac.fragsize; + spin_lock_irqsave(&s->lock, flags); + count = s->dma_dac.count; + count -= dma_count_done(&s->dma_dac); + spin_unlock_irqrestore(&s->lock, flags); + if (count < 0) + count = 0; + abinfo.bytes = (s->dma_dac.dmasize - count) / + s->dma_dac.cnt_factor; + abinfo.fragstotal = s->dma_dac.numfrag; + abinfo.fragments = abinfo.bytes >> s->dma_dac.fragshift; +#ifdef AU1000_VERBOSE_DEBUG + dbg("bytes=%d, fragments=%d", abinfo.bytes, abinfo.fragments); +#endif + return copy_to_user((void *) arg, &abinfo, + sizeof(abinfo)) ? -EFAULT : 0; + + case SNDCTL_DSP_GETISPACE: + if (!(file->f_mode & FMODE_READ)) + return -EINVAL; + abinfo.fragsize = s->dma_adc.fragsize; + spin_lock_irqsave(&s->lock, flags); + count = s->dma_adc.count; + count += dma_count_done(&s->dma_adc); + spin_unlock_irqrestore(&s->lock, flags); + if (count < 0) + count = 0; + abinfo.bytes = count / s->dma_adc.cnt_factor; + abinfo.fragstotal = s->dma_adc.numfrag; + abinfo.fragments = abinfo.bytes >> s->dma_adc.fragshift; + return copy_to_user((void *) arg, &abinfo, + sizeof(abinfo)) ? -EFAULT : 0; + + case SNDCTL_DSP_NONBLOCK: + file->f_flags |= O_NONBLOCK; + return 0; + + case SNDCTL_DSP_GETODELAY: + if (!(file->f_mode & FMODE_WRITE)) + return -EINVAL; + spin_lock_irqsave(&s->lock, flags); + count = s->dma_dac.count; + count -= dma_count_done(&s->dma_dac); + spin_unlock_irqrestore(&s->lock, flags); + if (count < 0) + count = 0; + count /= s->dma_dac.cnt_factor; + return put_user(count, (int *) arg); + + case SNDCTL_DSP_GETIPTR: + if (!(file->f_mode & FMODE_READ)) + return -EINVAL; + spin_lock_irqsave(&s->lock, flags); + cinfo.bytes = s->dma_adc.total_bytes; + count = s->dma_adc.count; + if (!s->dma_adc.stopped) { + diff = dma_count_done(&s->dma_adc); + count += diff; + cinfo.bytes += diff; + cinfo.ptr = virt_to_phys(s->dma_adc.nextIn) + diff - + virt_to_phys(s->dma_adc.rawbuf); + } else + cinfo.ptr = virt_to_phys(s->dma_adc.nextIn) - + virt_to_phys(s->dma_adc.rawbuf); + if (s->dma_adc.mapped) + s->dma_adc.count &= (s->dma_adc.dma_fragsize-1); + spin_unlock_irqrestore(&s->lock, flags); + if (count < 0) + count = 0; + cinfo.blocks = count >> s->dma_adc.fragshift; + return copy_to_user((void *) arg, &cinfo, sizeof(cinfo)); + + case SNDCTL_DSP_GETOPTR: + if (!(file->f_mode & FMODE_READ)) + return -EINVAL; + spin_lock_irqsave(&s->lock, flags); + cinfo.bytes = s->dma_dac.total_bytes; + count = s->dma_dac.count; + if (!s->dma_dac.stopped) { + diff = dma_count_done(&s->dma_dac); + count -= diff; + cinfo.bytes += diff; + cinfo.ptr = virt_to_phys(s->dma_dac.nextOut) + diff - + virt_to_phys(s->dma_dac.rawbuf); + } else + cinfo.ptr = virt_to_phys(s->dma_dac.nextOut) - + virt_to_phys(s->dma_dac.rawbuf); + if (s->dma_dac.mapped) + s->dma_dac.count &= (s->dma_dac.dma_fragsize-1); + spin_unlock_irqrestore(&s->lock, flags); + if (count < 0) + count = 0; + cinfo.blocks = count >> s->dma_dac.fragshift; + return copy_to_user((void *) arg, &cinfo, sizeof(cinfo)); + + case SNDCTL_DSP_GETBLKSIZE: + if (file->f_mode & FMODE_WRITE) + return put_user(s->dma_dac.fragsize, (int *) arg); + else + return put_user(s->dma_adc.fragsize, (int *) arg); + + case SNDCTL_DSP_SETFRAGMENT: + if (get_user(val, (int *) arg)) + return -EFAULT; + if (file->f_mode & FMODE_READ) { + stop_adc(s); + s->dma_adc.ossfragshift = val & 0xffff; + s->dma_adc.ossmaxfrags = (val >> 16) & 0xffff; + if (s->dma_adc.ossfragshift < 4) + s->dma_adc.ossfragshift = 4; + if (s->dma_adc.ossfragshift > 15) + s->dma_adc.ossfragshift = 15; + if (s->dma_adc.ossmaxfrags < 4) + s->dma_adc.ossmaxfrags = 4; + if ((ret = prog_dmabuf_adc(s))) + return ret; + } + if (file->f_mode & FMODE_WRITE) { + stop_dac(s); + s->dma_dac.ossfragshift = val & 0xffff; + s->dma_dac.ossmaxfrags = (val >> 16) & 0xffff; + if (s->dma_dac.ossfragshift < 4) + s->dma_dac.ossfragshift = 4; + if (s->dma_dac.ossfragshift > 15) + s->dma_dac.ossfragshift = 15; + if (s->dma_dac.ossmaxfrags < 4) + s->dma_dac.ossmaxfrags = 4; + if ((ret = prog_dmabuf_dac(s))) + return ret; + } + return 0; + + case SNDCTL_DSP_SUBDIVIDE: + if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision) || + (file->f_mode & FMODE_WRITE && s->dma_dac.subdivision)) + return -EINVAL; + if (get_user(val, (int *) arg)) + return -EFAULT; + if (val != 1 && val != 2 && val != 4) + return -EINVAL; + if (file->f_mode & FMODE_READ) { + stop_adc(s); + s->dma_adc.subdivision = val; + if ((ret = prog_dmabuf_adc(s))) + return ret; + } + if (file->f_mode & FMODE_WRITE) { + stop_dac(s); + s->dma_dac.subdivision = val; + if ((ret = prog_dmabuf_dac(s))) + return ret; + } + return 0; + + case SOUND_PCM_READ_RATE: + return put_user((file->f_mode & FMODE_READ) ? + s->dma_adc.sample_rate : + s->dma_dac.sample_rate, + (int *)arg); + + case SOUND_PCM_READ_CHANNELS: + if (file->f_mode & FMODE_READ) + return put_user(s->dma_adc.num_channels, (int *)arg); + else + return put_user(s->dma_dac.num_channels, (int *)arg); + + case SOUND_PCM_READ_BITS: + if (file->f_mode & FMODE_READ) + return put_user(s->dma_adc.sample_size, (int *)arg); + else + return put_user(s->dma_dac.sample_size, (int *)arg); + + case SOUND_PCM_WRITE_FILTER: + case SNDCTL_DSP_SETSYNCRO: + case SOUND_PCM_READ_FILTER: + return -EINVAL; + } + +#if 0 + return mixdev_ioctl(s->codec, cmd, arg); +#else + return 0; +#endif +} + + +static int +au1550_open(struct inode *inode, struct file *file) +{ + int minor = MINOR(inode->i_rdev); + DECLARE_WAITQUEUE(wait, current); + struct au1550_state *s = &au1550_state; + int ret; + +#ifdef AU1000_VERBOSE_DEBUG + if (file->f_flags & O_NONBLOCK) + dbg(__FUNCTION__ ": non-blocking"); + else + dbg(__FUNCTION__ ": blocking"); +#endif + + file->private_data = s; + /* wait for device to become free */ + down(&s->open_sem); + while (s->open_mode & file->f_mode) { + if (file->f_flags & O_NONBLOCK) { + up(&s->open_sem); + return -EBUSY; + } + add_wait_queue(&s->open_wait, &wait); + __set_current_state(TASK_INTERRUPTIBLE); + up(&s->open_sem); + schedule(); + remove_wait_queue(&s->open_wait, &wait); + set_current_state(TASK_RUNNING); + if (signal_pending(current)) + return -ERESTARTSYS; + down(&s->open_sem); + } + + stop_dac(s); + stop_adc(s); + + if (file->f_mode & FMODE_READ) { + s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags = + s->dma_adc.subdivision = s->dma_adc.total_bytes = 0; + s->dma_adc.num_channels = 1; + s->dma_adc.sample_size = 8; + set_adc_rate(s, 8000); + if ((minor & 0xf) == SND_DEV_DSP16) + s->dma_adc.sample_size = 16; + } + + if (file->f_mode & FMODE_WRITE) { + s->dma_dac.ossfragshift = s->dma_dac.ossmaxfrags = + s->dma_dac.subdivision = s->dma_dac.total_bytes = 0; + s->dma_dac.num_channels = 1; + s->dma_dac.sample_size = 8; + set_dac_rate(s, 8000); + if ((minor & 0xf) == SND_DEV_DSP16) + s->dma_dac.sample_size = 16; + } + + if (file->f_mode & FMODE_READ) { + if ((ret = prog_dmabuf_adc(s))) + return ret; + } + if (file->f_mode & FMODE_WRITE) { + if ((ret = prog_dmabuf_dac(s))) + return ret; + } + + s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE); + up(&s->open_sem); + init_MUTEX(&s->sem); + return 0; +} + +static int +au1550_release(struct inode *inode, struct file *file) +{ + struct au1550_state *s = (struct au1550_state *)file->private_data; + + lock_kernel(); + + if (file->f_mode & FMODE_WRITE) { + unlock_kernel(); + drain_dac(s, file->f_flags & O_NONBLOCK); + lock_kernel(); + } + + down(&s->open_sem); + if (file->f_mode & FMODE_WRITE) { + stop_dac(s); + kfree(s->dma_dac.rawbuf); + s->dma_dac.rawbuf = NULL; + } + if (file->f_mode & FMODE_READ) { + stop_adc(s); + kfree(s->dma_adc.rawbuf); + s->dma_adc.rawbuf = NULL; + } + s->open_mode &= ((~file->f_mode) & (FMODE_READ|FMODE_WRITE)); + up(&s->open_sem); + wake_up(&s->open_wait); + unlock_kernel(); + return 0; +} + +static /*const */ struct file_operations au1550_audio_fops = { + owner: THIS_MODULE, + llseek: au1550_llseek, + read: au1550_read, + write: au1550_write, + poll: au1550_poll, + ioctl: au1550_ioctl, + mmap: au1550_mmap, + open: au1550_open, + release: au1550_release, +}; + +MODULE_AUTHOR("Advanced Micro Devices (AMD), dan@embeddededge.com"); +MODULE_DESCRIPTION("Au1550 Audio Driver"); + +/* Set up an internal clock for the PSC3. This will then get + * driven out of the Au1550 as the master. + */ +static void +intclk_setup(void) +{ + uint clk, rate, stat; + + /* Wire up Freq4 as a clock for the PSC3. + * We know SMBus uses Freq3. + * By making changes to this rate, plus the word strobe + * size, we can make fine adjustments to the actual data rate. + */ + rate = get_au1x00_speed(); +#ifdef TRY_441KHz + rate /= (11 * 1000000); +#else + rate /= (12 * 1000000); +#endif + + /* The FRDIV in the frequency control is (FRDIV + 1) * 2 + */ + rate /=2; + rate--; + clk = au_readl(SYS_FREQCTRL1); + au_sync(); + clk &= ~(SYS_FC_FRDIV4_MASK | SYS_FC_FS4);; + clk |= (rate << SYS_FC_FRDIV4_BIT); + clk |= SYS_FC_FE4; + au_writel(clk, SYS_FREQCTRL1); + au_sync(); + + /* Set up the clock source routing to get Freq4 to PSC3_intclk. + */ + clk = au_readl(SYS_CLKSRC); + au_sync(); + clk &= ~0x01f00000; + clk |= (6 << 22); + au_writel(clk, SYS_CLKSRC); + au_sync(); +} + +static int __devinit +au1550_probe(void) +{ + struct au1550_state *s = &au1550_state; + int val; + volatile psc_i2s_t *ip; +#ifdef AU1550_DEBUG + char proc_str[80]; +#endif + + memset(s, 0, sizeof(struct au1550_state)); + + init_waitqueue_head(&s->dma_adc.wait); + init_waitqueue_head(&s->dma_dac.wait); + init_waitqueue_head(&s->open_wait); + init_MUTEX(&s->open_sem); + spin_lock_init(&s->lock); + + + s->psc_addr = (volatile psc_i2s_t *)I2S_PSC_BASE; + ip = s->psc_addr; + + if (!request_region(PHYSADDR(ip), + 0x30, AU1550_MODULE_NAME)) { + err("I2S Audio ports in use"); + } + + /* Allocate the DMA Channels + */ + if ((s->dma_dac.dmanr = au1xxx_dbdma_chan_alloc(DBDMA_MEM_CHAN, + DBDMA_I2S_TX_CHAN, dac_dma_interrupt, (void *)s)) == 0) { + err("Can't get DAC DMA"); + goto err_dma1; + } + au1xxx_dbdma_set_devwidth(s->dma_dac.dmanr, 16); + if (au1xxx_dbdma_ring_alloc(s->dma_dac.dmanr, + NUM_DBDMA_DESCRIPTORS) == 0) { + err("Can't get DAC DMA descriptors"); + goto err_dma1; + } + + if ((s->dma_adc.dmanr = au1xxx_dbdma_chan_alloc(DBDMA_I2S_RX_CHAN, + DBDMA_MEM_CHAN, adc_dma_interrupt, (void *)s)) == 0) { + err("Can't get ADC DMA"); + goto err_dma2; + } + au1xxx_dbdma_set_devwidth(s->dma_adc.dmanr, 16); + if (au1xxx_dbdma_ring_alloc(s->dma_adc.dmanr, + NUM_DBDMA_DESCRIPTORS) == 0) { + err("Can't get ADC DMA descriptors"); + goto err_dma2; + } + + info("DAC: DMA%d, ADC: DMA%d", DBDMA_I2S_TX_CHAN, DBDMA_I2S_RX_CHAN); + + /* register devices */ + + if ((s->dev_audio = register_sound_dsp(&au1550_audio_fops, -1)) < 0) + goto err_dev1; +#if 0 + if ((s->codec->dev_mixer = + register_sound_mixer(&au1550_mixer_fops, -1)) < 0) + goto err_dev2; +#endif + +#ifdef AU1550_DEBUG + /* intialize the debug proc device */ + s->ps = create_proc_read_entry(AU1000_MODULE_NAME, 0, NULL, + proc_au1550_dump, NULL); +#endif /* AU1550_DEBUG */ + + intclk_setup(); + + /* The GPIO for the appropriate PSC was configured by the + * board specific start up. + * + * configure PSC for I2S Audio + */ + ip->psc_ctrl = PSC_CTRL_DISABLE; /* Disable PSC */ + au_sync(); + ip->psc_sel = (PSC_SEL_CLK_INTCLK | PSC_SEL_PS_I2SMODE); + au_sync(); + + /* Enable PSC + */ + ip->psc_ctrl = PSC_CTRL_ENABLE; + au_sync(); + + /* Wait for PSC ready. + */ + do { + val = ip->psc_i2sstat; + au_sync(); + } while ((val & PSC_I2SSTAT_SR) == 0); + + /* Configure I2S controller. + * Deep FIFO, 16-bit sample, DMA, make sure DMA matches fifo size. + * Actual I2S mode (first bit delayed by one clock). + * Master mode (We provide the clock from the PSC). + */ + val = PSC_I2SCFG_SET_LEN(16); +#ifdef TRY_441KHz + /* This really should be 250, but it appears that all of the + * PLLs, dividers and so on in the chain shift it. That's the + * problem with sourceing the clock instead of letting the very + * stable codec provide it. But, the PSC doesn't appear to want + * to work in slave mode, so this is what we get. It's not + * studio quality timing, but it's good enough for listening + * to mp3s. + */ + val |= PSC_I2SCFG_SET_WS(252); +#else + val |= PSC_I2SCFG_SET_WS(250); +#endif + val |= PSC_I2SCFG_RT_FIFO8 | PSC_I2SCFG_TT_FIFO8 | \ + PSC_I2SCFG_BI | PSC_I2SCFG_XM; + + ip->psc_i2scfg = val; + au_sync(); + val |= PSC_I2SCFG_DE_ENABLE; + ip->psc_i2scfg = val; + au_sync(); + + /* Wait for Device ready. + */ + do { + val = ip->psc_i2sstat; + au_sync(); + } while ((val & PSC_I2SSTAT_DR) == 0); + + val = ip->psc_i2scfg; + au_sync(); + + codec_init(); + + s->no_vra = 1; + if (s->no_vra) + info("no VRA, interpolating and decimating"); + +#if 0 + /* set mic to be the recording source */ + val = SOUND_MASK_MIC; + mixdev_ioctl(s->codec, SOUND_MIXER_WRITE_RECSRC, + (unsigned long) &val); +#ifdef AU1550_DEBUG + sprintf(proc_str, "driver/%s/%d/ac97", AU1550_MODULE_NAME, + s->codec->id); + s->ac97_ps = create_proc_read_entry (proc_str, 0, NULL, + ac97_read_proc, &s->codec); +#endif +#endif + + return 0; + +#if 0 + err_dev3: + unregister_sound_mixer(s->codec->dev_mixer); + err_dev2: + unregister_sound_dsp(s->dev_audio); +#endif + err_dev1: + au1xxx_dbdma_chan_free(s->dma_adc.dmanr); + err_dma2: + au1xxx_dbdma_chan_free(s->dma_dac.dmanr); + err_dma1: + release_region(PHYSADDR(I2S_PSC_BASE), 0x30); + + return -1; +} + +static void __devinit +au1550_remove(void) +{ + struct au1550_state *s = &au1550_state; + + if (!s) + return; +#ifdef AU1550_DEBUG + if (s->ps) + remove_proc_entry(AU1000_MODULE_NAME, NULL); +#endif /* AU1000_DEBUG */ + synchronize_irq(); + au1xxx_dbdma_chan_free(s->dma_adc.dmanr); + au1xxx_dbdma_chan_free(s->dma_dac.dmanr); + release_region(PHYSADDR(I2S_PSC_BASE), 0x30); + unregister_sound_dsp(s->dev_audio); +#if 0 + unregister_sound_mixer(s->codec->dev_mixer); +#endif +} + +static int __init +init_au1550(void) +{ + return au1550_probe(); +} + +static void __exit +cleanup_au1550(void) +{ + au1550_remove(); +} + +module_init(init_au1550); +module_exit(cleanup_au1550); + +#ifndef MODULE + +static int __init +au1550_setup(char *options) +{ + char *this_opt; + + if (!options || !*options) + return 0; + + for(this_opt=strtok(options, ","); + this_opt; this_opt=strtok(NULL, ",")) { + if (!strncmp(this_opt, "vra", 3)) { + vra = 1; + } + } + + return 1; +} + +__setup("au1550_audio=", au1550_setup); + +#endif /* MODULE */ diff -urN linux-2.4.28-bk3/drivers/sound/au1550_psc.c linux-2.4.28-bk4/drivers/sound/au1550_psc.c --- linux-2.4.28-bk3/drivers/sound/au1550_psc.c 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.28-bk4/drivers/sound/au1550_psc.c 2004-11-23 02:49:27.555398642 -0800 @@ -0,0 +1,2168 @@ +/* + * au1550.c -- Sound driver for Alchemy Au1550 MIPS Internet Edge + * Processor. + * + * Copyright 2004 Embedded Edge, LLC + * dan@embeddededge.com + * + * Mostly copied from the au1000.c driver and some from the + * PowerMac dbdma driver. + * We assume the processor can do memory coherent DMA. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + * + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#ifdef CONFIG_MIPS_PB1550 +#include +#endif + +#ifdef CONFIG_MIPS_DB1550 +#include +#endif + +#undef OSS_DOCUMENTED_MIXER_SEMANTICS + +#define AU1550_MODULE_NAME "Au1550 psc audio" +#define PFX AU1550_MODULE_NAME + +/* misc stuff */ +/* #define POLL_COUNT 0x5000 */ +#define POLL_COUNT 0x50000 +#define AC97_EXT_DACS (AC97_EXTID_SDAC | AC97_EXTID_CDAC | AC97_EXTID_LDAC) + +/* The number of DBDMA ring descriptors to allocate. No sense making + * this too large....if you can't keep up with a few you aren't likely + * to be able to with lots of them, either. + */ +#define NUM_DBDMA_DESCRIPTORS 4 + +#define err(format, arg...) printk(KERN_ERR PFX ": " format "\n" , ## arg) +#define info(format, arg...) printk(KERN_INFO PFX ": " format "\n" , ## arg) + +/* Boot options + * 0 = no VRA, 1 = use VRA if codec supports it + */ +static int vra = 1; +MODULE_PARM(vra, "i"); +MODULE_PARM_DESC(vra, "if 1 use VRA if codec supports it"); + +static struct au1550_state { + /* soundcore stuff */ + int dev_audio; + +#ifdef AU1000_DEBUG + /* debug /proc entry */ + struct proc_dir_entry *ps; + struct proc_dir_entry *ac97_ps; +#endif /* AU1000_DEBUG */ + + struct ac97_codec *codec; + unsigned codec_base_caps; /* AC'97 reg 00h, "Reset Register" */ + unsigned codec_ext_caps; /* AC'97 reg 28h, "Extended Audio ID" */ + int no_vra; /* do not use VRA */ + + spinlock_t lock; + struct semaphore open_sem; + struct semaphore sem; + mode_t open_mode; + wait_queue_head_t open_wait; + + struct dmabuf { + u32 dmanr; + unsigned sample_rate; + unsigned src_factor; + unsigned sample_size; + int num_channels; + int dma_bytes_per_sample; + int user_bytes_per_sample; + int cnt_factor; + + void *rawbuf; + unsigned buforder; + unsigned numfrag; + unsigned fragshift; + void *nextIn; + void *nextOut; + int count; + unsigned total_bytes; + unsigned error; + wait_queue_head_t wait; + + /* redundant, but makes calculations easier */ + unsigned fragsize; + unsigned dma_fragsize; + unsigned dmasize; + unsigned dma_qcount; + + /* OSS stuff */ + unsigned mapped:1; + unsigned ready:1; + unsigned stopped:1; + unsigned ossfragshift; + int ossmaxfrags; + unsigned subdivision; + } dma_dac, dma_adc; +} au1550_state; + +static unsigned +ld2(unsigned int x) +{ + unsigned r = 0; + + if (x >= 0x10000) { + x >>= 16; + r += 16; + } + if (x >= 0x100) { + x >>= 8; + r += 8; + } + if (x >= 0x10) { + x >>= 4; + r += 4; + } + if (x >= 4) { + x >>= 2; + r += 2; + } + if (x >= 2) + r++; + return r; +} + +static void +au1550_delay(int msec) +{ + unsigned long tmo; + signed long tmo2; + + if (in_interrupt()) + return; + + tmo = jiffies + (msec * HZ) / 1000; + for (;;) { + tmo2 = tmo - jiffies; + if (tmo2 <= 0) + break; + schedule_timeout(tmo2); + } +} + +static u16 +rdcodec(struct ac97_codec *codec, u8 addr) +{ + struct au1550_state *s = (struct au1550_state *)codec->private_data; + unsigned long flags; + u32 cmd, val; + u16 data; + int i; + + spin_lock_irqsave(&s->lock, flags); + + for (i = 0; i < POLL_COUNT; i++) { + val = au_readl(PSC_AC97STAT); + au_sync(); + if (!(val & PSC_AC97STAT_CP)) + break; + } + if (i == POLL_COUNT) + err("rdcodec: codec cmd pending expired!"); + + cmd = (u32)PSC_AC97CDC_INDX(addr); + cmd |= PSC_AC97CDC_RD; /* read command */ + au_writel(cmd, PSC_AC97CDC); + au_sync(); + + /* now wait for the data + */ + for (i = 0; i < POLL_COUNT; i++) { + val = au_readl(PSC_AC97STAT); + au_sync(); + if (!(val & PSC_AC97STAT_CP)) + break; + } + if (i == POLL_COUNT) { + err("rdcodec: read poll expired!"); + return 0; + } + + /* wait for command done? + */ + for (i = 0; i < POLL_COUNT; i++) { + val = au_readl(PSC_AC97EVNT); + au_sync(); + if (val & PSC_AC97EVNT_CD) + break; + } + if (i == POLL_COUNT) { + err("rdcodec: read cmdwait expired!"); + return 0; + } + + data = au_readl(PSC_AC97CDC) & 0xffff; + au_sync(); + + /* Clear command done event. + */ + au_writel(PSC_AC97EVNT_CD, PSC_AC97EVNT); + au_sync(); + + spin_unlock_irqrestore(&s->lock, flags); + + return data; +} + + +static void +wrcodec(struct ac97_codec *codec, u8 addr, u16 data) +{ + struct au1550_state *s = (struct au1550_state *)codec->private_data; + unsigned long flags; + u32 cmd, val; + int i; + + spin_lock_irqsave(&s->lock, flags); + + for (i = 0; i < POLL_COUNT; i++) { + val = au_readl(PSC_AC97STAT); + au_sync(); + if (!(val & PSC_AC97STAT_CP)) + break; + } + if (i == POLL_COUNT) + err("wrcodec: codec cmd pending expired!"); + + cmd = (u32)PSC_AC97CDC_INDX(addr); + cmd |= (u32)data; + au_writel(cmd, PSC_AC97CDC); + au_sync(); + + for (i = 0; i < POLL_COUNT; i++) { + val = au_readl(PSC_AC97STAT); + au_sync(); + if (!(val & PSC_AC97STAT_CP)) + break; + } + if (i == POLL_COUNT) + err("wrcodec: codec cmd pending expired!"); + + for (i = 0; i < POLL_COUNT; i++) { + val = au_readl(PSC_AC97EVNT); + au_sync(); + if (val & PSC_AC97EVNT_CD) + break; + } + if (i == POLL_COUNT) + err("wrcodec: read cmdwait expired!"); + + /* Clear command done event. + */ + au_writel(PSC_AC97EVNT_CD, PSC_AC97EVNT); + au_sync(); + + spin_unlock_irqrestore(&s->lock, flags); +} + +static void +waitcodec(struct ac97_codec *codec) +{ + u16 temp; + u32 val; + int i; + + /* codec_wait is used to wait for a ready state after + * an AC97C_RESET. + */ + au1550_delay(10); + + /* first poll the CODEC_READY tag bit + */ + for (i = 0; i < POLL_COUNT; i++) { + val = au_readl(PSC_AC97STAT); + au_sync(); + if (val & PSC_AC97STAT_CR) + break; + } + if (i == POLL_COUNT) { + err("waitcodec: CODEC_READY poll expired!"); + return; + } + + /* get AC'97 powerdown control/status register + */ + temp = rdcodec(codec, AC97_POWER_CONTROL); + + /* If anything is powered down, power'em up + */ + if (temp & 0x7f00) { + /* Power on + */ + wrcodec(codec, AC97_POWER_CONTROL, 0); + au1550_delay(100); + + /* Reread + */ + temp = rdcodec(codec, AC97_POWER_CONTROL); + } + + /* Check if Codec REF,ANL,DAC,ADC ready + */ + if ((temp & 0x7f0f) != 0x000f) + err("codec reg 26 status (0x%x) not ready!!", temp); +} + +/* stop the ADC before calling */ +static void +set_adc_rate(struct au1550_state *s, unsigned rate) +{ + struct dmabuf *adc = &s->dma_adc; + struct dmabuf *dac = &s->dma_dac; + unsigned adc_rate, dac_rate; + u16 ac97_extstat; + + if (s->no_vra) { + /* calc SRC factor + */ + adc->src_factor = ((96000 / rate) + 1) >> 1; + adc->sample_rate = 48000 / adc->src_factor; + return; + } + + adc->src_factor = 1; + + ac97_extstat = rdcodec(s->codec, AC97_EXTENDED_STATUS); + + rate = rate > 48000 ? 48000 : rate; + + /* enable VRA + */ + wrcodec(s->codec, AC97_EXTENDED_STATUS, + ac97_extstat | AC97_EXTSTAT_VRA); + + /* now write the sample rate + */ + wrcodec(s->codec, AC97_PCM_LR_ADC_RATE, (u16) rate); + + /* read it back for actual supported rate + */ + adc_rate = rdcodec(s->codec, AC97_PCM_LR_ADC_RATE); + +#ifdef AU1000_VERBOSE_DEBUG + dbg(__FUNCTION__ ": set to %d Hz", adc_rate); +#endif + + /* some codec's don't allow unequal DAC and ADC rates, in which case + * writing one rate reg actually changes both. + */ + dac_rate = rdcodec(s->codec, AC97_PCM_FRONT_DAC_RATE); + if (dac->num_channels > 2) + wrcodec(s->codec, AC97_PCM_SURR_DAC_RATE, dac_rate); + if (dac->num_channels > 4) + wrcodec(s->codec, AC97_PCM_LFE_DAC_RATE, dac_rate); + + adc->sample_rate = adc_rate; + dac->sample_rate = dac_rate; +} + +/* stop the DAC before calling */ +static void +set_dac_rate(struct au1550_state *s, unsigned rate) +{ + struct dmabuf *dac = &s->dma_dac; + struct dmabuf *adc = &s->dma_adc; + unsigned adc_rate, dac_rate; + u16 ac97_extstat; + + if (s->no_vra) { + /* calc SRC factor + */ + dac->src_factor = ((96000 / rate) + 1) >> 1; + dac->sample_rate = 48000 / dac->src_factor; + return; + } + + dac->src_factor = 1; + + ac97_extstat = rdcodec(s->codec, AC97_EXTENDED_STATUS); + + rate = rate > 48000 ? 48000 : rate; + + /* enable VRA + */ + wrcodec(s->codec, AC97_EXTENDED_STATUS, + ac97_extstat | AC97_EXTSTAT_VRA); + + /* now write the sample rate + */ + wrcodec(s->codec, AC97_PCM_FRONT_DAC_RATE, (u16) rate); + + /* I don't support different sample rates for multichannel, + * so make these channels the same. + */ + if (dac->num_channels > 2) + wrcodec(s->codec, AC97_PCM_SURR_DAC_RATE, (u16) rate); + if (dac->num_channels > 4) + wrcodec(s->codec, AC97_PCM_LFE_DAC_RATE, (u16) rate); + /* read it back for actual supported rate + */ + dac_rate = rdcodec(s->codec, AC97_PCM_FRONT_DAC_RATE); + +#ifdef AU1000_VERBOSE_DEBUG + dbg(__FUNCTION__ ": set to %d Hz", dac_rate); +#endif + + /* some codec's don't allow unequal DAC and ADC rates, in which case + * writing one rate reg actually changes both. + */ + adc_rate = rdcodec(s->codec, AC97_PCM_LR_ADC_RATE); + + dac->sample_rate = dac_rate; + adc->sample_rate = adc_rate; +} + +static void +stop_dac(struct au1550_state *s) +{ + struct dmabuf *db = &s->dma_dac; + u32 stat; + unsigned long flags; + + if (db->stopped) + return; + + spin_lock_irqsave(&s->lock, flags); + + au_writel(PSC_AC97PCR_TP, PSC_AC97PCR); + au_sync(); + + /* Wait for Transmit Busy to show disabled. + */ + do { + stat = readl(PSC_AC97STAT); + au_sync(); + } while ((stat & PSC_AC97STAT_TB) != 0); + + au1xxx_dbdma_reset(db->dmanr); + + db->stopped = 1; + + spin_unlock_irqrestore(&s->lock, flags); +} + +static void +stop_adc(struct au1550_state *s) +{ + struct dmabuf *db = &s->dma_adc; + unsigned long flags; + u32 stat; + + if (db->stopped) + return; + + spin_lock_irqsave(&s->lock, flags); + + au_writel(PSC_AC97PCR_RP, PSC_AC97PCR); + au_sync(); + + /* Wait for Receive Busy to show disabled. + */ + do { + stat = readl(PSC_AC97STAT); + au_sync(); + } while ((stat & PSC_AC97STAT_RB) != 0); + + au1xxx_dbdma_reset(db->dmanr); + + db->stopped = 1; + + spin_unlock_irqrestore(&s->lock, flags); +} + + +static void +set_xmit_slots(int num_channels) +{ + u32 ac97_config, stat; + + ac97_config = au_readl(PSC_AC97CFG); + au_sync(); + ac97_config &= ~(PSC_AC97CFG_TXSLOT_MASK | PSC_AC97CFG_DE_ENABLE); + au_writel(ac97_config, PSC_AC97CFG); + au_sync(); + + switch (num_channels) { + case 6: /* stereo with surround and center/LFE, + * slots 3,4,6,7,8,9 + */ + ac97_config |= PSC_AC97CFG_TXSLOT_ENA(6); + ac97_config |= PSC_AC97CFG_TXSLOT_ENA(9); + + case 4: /* stereo with surround, slots 3,4,7,8 */ + ac97_config |= PSC_AC97CFG_TXSLOT_ENA(7); + ac97_config |= PSC_AC97CFG_TXSLOT_ENA(8); + + case 2: /* stereo, slots 3,4 */ + case 1: /* mono */ + ac97_config |= PSC_AC97CFG_TXSLOT_ENA(3); + ac97_config |= PSC_AC97CFG_TXSLOT_ENA(4); + } + + au_writel(ac97_config, PSC_AC97CFG); + au_sync(); + + ac97_config |= PSC_AC97CFG_DE_ENABLE; + au_writel(ac97_config, PSC_AC97CFG); + au_sync(); + + /* Wait for Device ready. + */ + do { + stat = readl(PSC_AC97STAT); + au_sync(); + } while ((stat & PSC_AC97STAT_DR) == 0); +} + +static void +set_recv_slots(int num_channels) +{ + u32 ac97_config, stat; + + ac97_config = au_readl(PSC_AC97CFG); + au_sync(); + ac97_config &= ~(PSC_AC97CFG_RXSLOT_MASK | PSC_AC97CFG_DE_ENABLE); + au_writel(ac97_config, PSC_AC97CFG); + au_sync(); + + /* Always enable slots 3 and 4 (stereo). Slot 6 is + * optional Mic ADC, which we don't support yet. + */ + ac97_config |= PSC_AC97CFG_RXSLOT_ENA(3); + ac97_config |= PSC_AC97CFG_RXSLOT_ENA(4); + + au_writel(ac97_config, PSC_AC97CFG); + au_sync(); + + ac97_config |= PSC_AC97CFG_DE_ENABLE; + au_writel(ac97_config, PSC_AC97CFG); + au_sync(); + + /* Wait for Device ready. + */ + do { + stat = readl(PSC_AC97STAT); + au_sync(); + } while ((stat & PSC_AC97STAT_DR) == 0); +} + +static void +start_dac(struct au1550_state *s) +{ + struct dmabuf *db = &s->dma_dac; + unsigned long flags; + + if (!db->stopped) + return; + + spin_lock_irqsave(&s->lock, flags); + + set_xmit_slots(db->num_channels); + au_writel(PSC_AC97PCR_TC, PSC_AC97PCR); + au_sync(); + au_writel(PSC_AC97PCR_TS, PSC_AC97PCR); + au_sync(); + + au1xxx_dbdma_start(db->dmanr); + + db->stopped = 0; + + spin_unlock_irqrestore(&s->lock, flags); +} + +static void +start_adc(struct au1550_state *s) +{ + struct dmabuf *db = &s->dma_adc; + int i; + + if (!db->stopped) + return; + + /* Put two buffers on the ring to get things started. + */ + for (i=0; i<2; i++) { + au1xxx_dbdma_put_dest(db->dmanr, db->nextIn, db->dma_fragsize); + + db->nextIn += db->dma_fragsize; + if (db->nextIn >= db->rawbuf + db->dmasize) + db->nextIn -= db->dmasize; + } + + set_recv_slots(db->num_channels); + au1xxx_dbdma_start(db->dmanr); + au_writel(PSC_AC97PCR_RC, PSC_AC97PCR); + au_sync(); + au_writel(PSC_AC97PCR_RS, PSC_AC97PCR); + au_sync(); + + db->stopped = 0; +} + +static int +prog_dmabuf(struct au1550_state *s, struct dmabuf *db) +{ + unsigned user_bytes_per_sec; + unsigned bufs; + unsigned rate = db->sample_rate; + + if (!db->rawbuf) { + db->ready = db->mapped = 0; + db->buforder = 5; /* 32 * PAGE_SIZE */ + db->rawbuf = kmalloc((PAGE_SIZE << db->buforder), GFP_KERNEL); + if (!db->rawbuf) + return -ENOMEM; + } + + db->cnt_factor = 1; + if (db->sample_size == 8) + db->cnt_factor *= 2; + if (db->num_channels == 1) + db->cnt_factor *= 2; + db->cnt_factor *= db->src_factor; + + db->count = 0; + db->dma_qcount = 0; + db->nextIn = db->nextOut = db->rawbuf; + + db->user_bytes_per_sample = (db->sample_size>>3) * db->num_channels; + db->dma_bytes_per_sample = 2 * ((db->num_channels == 1) ? + 2 : db->num_channels); + + user_bytes_per_sec = rate * db->user_bytes_per_sample; + bufs = PAGE_SIZE << db->buforder; + if (db->ossfragshift) { + if ((1000 << db->ossfragshift) < user_bytes_per_sec) + db->fragshift = ld2(user_bytes_per_sec/1000); + else + db->fragshift = db->ossfragshift; + } else { + db->fragshift = ld2(user_bytes_per_sec / 100 / + (db->subdivision ? db->subdivision : 1)); + if (db->fragshift < 3) + db->fragshift = 3; + } + + db->fragsize = 1 << db->fragshift; + db->dma_fragsize = db->fragsize * db->cnt_factor; + db->numfrag = bufs / db->dma_fragsize; + + while (db->numfrag < 4 && db->fragshift > 3) { + db->fragshift--; + db->fragsize = 1 << db->fragshift; + db->dma_fragsize = db->fragsize * db->cnt_factor; + db->numfrag = bufs / db->dma_fragsize; + } + + if (db->ossmaxfrags >= 4 && db->ossmaxfrags < db->numfrag) + db->numfrag = db->ossmaxfrags; + + db->dmasize = db->dma_fragsize * db->numfrag; + memset(db->rawbuf, 0, bufs); + +#ifdef AU1000_VERBOSE_DEBUG + dbg("rate=%d, samplesize=%d, channels=%d", + rate, db->sample_size, db->num_channels); + dbg("fragsize=%d, cnt_factor=%d, dma_fragsize=%d", + db->fragsize, db->cnt_factor, db->dma_fragsize); + dbg("numfrag=%d, dmasize=%d", db->numfrag, db->dmasize); +#endif + + db->ready = 1; + return 0; +} + +static int +prog_dmabuf_adc(struct au1550_state *s) +{ + stop_adc(s); + return prog_dmabuf(s, &s->dma_adc); + +} + +static int +prog_dmabuf_dac(struct au1550_state *s) +{ + stop_dac(s); + return prog_dmabuf(s, &s->dma_dac); +} + + +/* hold spinlock for the following */ +static void +dac_dma_interrupt(int irq, void *dev_id, struct pt_regs *regs) +{ + struct au1550_state *s = (struct au1550_state *) dev_id; + struct dmabuf *db = &s->dma_dac; + u32 ac97c_stat; + + ac97c_stat = au_readl(PSC_AC97STAT); +#ifdef AU1000_VERBOSE_DEBUG + if (ac97c_stat & (AC97C_XU | AC97C_XO | AC97C_TE)) + dbg("AC97C status = 0x%08x", ac97c_stat); +#endif + db->dma_qcount--; + + if (db->count >= db->fragsize) { + if (au1xxx_dbdma_put_source(db->dmanr, db->nextOut, + db->fragsize) == 0) { + err("qcount < 2 and no ring room!"); + } + db->nextOut += db->fragsize; + if (db->nextOut >= db->rawbuf + db->dmasize) + db->nextOut -= db->dmasize; + db->count -= db->fragsize; + db->total_bytes += db->dma_fragsize; + db->dma_qcount++; + } + + /* wake up anybody listening */ + if (waitqueue_active(&db->wait)) + wake_up(&db->wait); +} + + +static void +adc_dma_interrupt(int irq, void *dev_id, struct pt_regs *regs) +{ + struct au1550_state *s = (struct au1550_state *)dev_id; + struct dmabuf *dp = &s->dma_adc; + u32 obytes; + char *obuf; + + /* Pull the buffer from the dma queue. + */ + au1xxx_dbdma_get_dest(dp->dmanr, (void *)(&obuf), &obytes); + + if ((dp->count + obytes) > dp->dmasize) { + /* Overrun. Stop ADC and log the error + */ + stop_adc(s); + dp->error++; + err("adc overrun"); + return; + } + + /* Put a new empty buffer on the destination DMA. + */ + au1xxx_dbdma_put_dest(dp->dmanr, dp->nextIn, dp->dma_fragsize); + + dp->nextIn += dp->dma_fragsize; + if (dp->nextIn >= dp->rawbuf + dp->dmasize) + dp->nextIn -= dp->dmasize; + + dp->count += obytes; + dp->total_bytes += obytes; + + /* wake up anybody listening + */ + if (waitqueue_active(&dp->wait)) + wake_up(&dp->wait); + +} + +static loff_t +au1550_llseek(struct file *file, loff_t offset, int origin) +{ + return -ESPIPE; +} + + +static int +au1550_open_mixdev(struct inode *inode, struct file *file) +{ + file->private_data = &au1550_state; + return 0; +} + +static int +au1550_release_mixdev(struct inode *inode, struct file *file) +{ + return 0; +} + +static int +mixdev_ioctl(struct ac97_codec *codec, unsigned int cmd, + unsigned long arg) +{ + return codec->mixer_ioctl(codec, cmd, arg); +} + +static int +au1550_ioctl_mixdev(struct inode *inode, struct file *file, + unsigned int cmd, unsigned long arg) +{ + struct au1550_state *s = (struct au1550_state *)file->private_data; + struct ac97_codec *codec = s->codec; + + return mixdev_ioctl(codec, cmd, arg); +} + +static /*const */ struct file_operations au1550_mixer_fops = { + owner:THIS_MODULE, + llseek:au1550_llseek, + ioctl:au1550_ioctl_mixdev, + open:au1550_open_mixdev, + release:au1550_release_mixdev, +}; + +static int +drain_dac(struct au1550_state *s, int nonblock) +{ + unsigned long flags; + int count, tmo; + + if (s->dma_dac.mapped || !s->dma_dac.ready || s->dma_dac.stopped) + return 0; + + for (;;) { + spin_lock_irqsave(&s->lock, flags); + count = s->dma_dac.count; + spin_unlock_irqrestore(&s->lock, flags); + if (count <= s->dma_dac.fragsize) + break; + if (signal_pending(current)) + break; + if (nonblock) + return -EBUSY; + tmo = 1000 * count / (s->no_vra ? + 48000 : s->dma_dac.sample_rate); + tmo /= s->dma_dac.dma_bytes_per_sample; + au1550_delay(tmo); + } + if (signal_pending(current)) + return -ERESTARTSYS; + return 0; +} + +static inline u8 S16_TO_U8(s16 ch) +{ + return (u8) (ch >> 8) + 0x80; +} +static inline s16 U8_TO_S16(u8 ch) +{ + return (s16) (ch - 0x80) << 8; +} + +/* + * Translates user samples to dma buffer suitable for AC'97 DAC data: + * If mono, copy left channel to right channel in dma buffer. + * If 8 bit samples, cvt to 16-bit before writing to dma buffer. + * If interpolating (no VRA), duplicate every audio frame src_factor times. + */ +static int +translate_from_user(struct dmabuf *db, char* dmabuf, char* userbuf, + int dmacount) +{ + int sample, i; + int interp_bytes_per_sample; + int num_samples; + int mono = (db->num_channels == 1); + char usersample[12]; + s16 ch, dmasample[6]; + + if (db->sample_size == 16 && !mono && db->src_factor == 1) { + /* no translation necessary, just copy + */ + if (copy_from_user(dmabuf, userbuf, dmacount)) + return -EFAULT; + return dmacount; + } + + interp_bytes_per_sample = db->dma_bytes_per_sample * db->src_factor; + num_samples = dmacount / interp_bytes_per_sample; + + for (sample = 0; sample < num_samples; sample++) { + if (copy_from_user(usersample, userbuf, + db->user_bytes_per_sample)) { + return -EFAULT; + } + + for (i = 0; i < db->num_channels; i++) { + if (db->sample_size == 8) + ch = U8_TO_S16(usersample[i]); + else + ch = *((s16 *) (&usersample[i * 2])); + dmasample[i] = ch; + if (mono) + dmasample[i + 1] = ch; /* right channel */ + } + + /* duplicate every audio frame src_factor times + */ + for (i = 0; i < db->src_factor; i++) + memcpy(dmabuf, dmasample, db->dma_bytes_per_sample); + + userbuf += db->user_bytes_per_sample; + dmabuf += interp_bytes_per_sample; + } + + return num_samples * interp_bytes_per_sample; +} + +/* + * Translates AC'97 ADC samples to user buffer: + * If mono, send only left channel to user buffer. + * If 8 bit samples, cvt from 16 to 8 bit before writing to user buffer. + * If decimating (no VRA), skip over src_factor audio frames. + */ +static int +translate_to_user(struct dmabuf *db, char* userbuf, char* dmabuf, + int dmacount) +{ + int sample, i; + int interp_bytes_per_sample; + int num_samples; + int mono = (db->num_channels == 1); + char usersample[12]; + + if (db->sample_size == 16 && !mono && db->src_factor == 1) { + /* no translation necessary, just copy + */ + if (copy_to_user(userbuf, dmabuf, dmacount)) + return -EFAULT; + return dmacount; + } + + interp_bytes_per_sample = db->dma_bytes_per_sample * db->src_factor; + num_samples = dmacount / interp_bytes_per_sample; + + for (sample = 0; sample < num_samples; sample++) { + for (i = 0; i < db->num_channels; i++) { + if (db->sample_size == 8) + usersample[i] = + S16_TO_U8(*((s16 *) (&dmabuf[i * 2]))); + else + *((s16 *) (&usersample[i * 2])) = + *((s16 *) (&dmabuf[i * 2])); + } + + if (copy_to_user(userbuf, usersample, + db->user_bytes_per_sample)) { + return -EFAULT; + } + + userbuf += db->user_bytes_per_sample; + dmabuf += interp_bytes_per_sample; + } + + return num_samples * interp_bytes_per_sample; +} + +/* + * Copy audio data to/from user buffer from/to dma buffer, taking care + * that we wrap when reading/writing the dma buffer. Returns actual byte + * count written to or read from the dma buffer. + */ +static int +copy_dmabuf_user(struct dmabuf *db, char* userbuf, int count, int to_user) +{ + char *bufptr = to_user ? db->nextOut : db->nextIn; + char *bufend = db->rawbuf + db->dmasize; + int cnt, ret; + + if (bufptr + count > bufend) { + int partial = (int) (bufend - bufptr); + if (to_user) { + if ((cnt = translate_to_user(db, userbuf, + bufptr, partial)) < 0) + return cnt; + ret = cnt; + if ((cnt = translate_to_user(db, userbuf + partial, + db->rawbuf, + count - partial)) < 0) + return cnt; + ret += cnt; + } else { + if ((cnt = translate_from_user(db, bufptr, userbuf, + partial)) < 0) + return cnt; + ret = cnt; + if ((cnt = translate_from_user(db, db->rawbuf, + userbuf + partial, + count - partial)) < 0) + return cnt; + ret += cnt; + } + } else { + if (to_user) + ret = translate_to_user(db, userbuf, bufptr, count); + else + ret = translate_from_user(db, bufptr, userbuf, count); + } + + return ret; +} + + +static ssize_t +au1550_read(struct file *file, char *buffer, size_t count, loff_t *ppos) +{ + struct au1550_state *s = (struct au1550_state *)file->private_data; + struct dmabuf *db = &s->dma_adc; + DECLARE_WAITQUEUE(wait, current); + ssize_t ret; + unsigned long flags; + int cnt, usercnt, avail; + + if (ppos != &file->f_pos) + return -ESPIPE; + if (db->mapped) + return -ENXIO; + if (!access_ok(VERIFY_WRITE, buffer, count)) + return -EFAULT; + ret = 0; + + count *= db->cnt_factor; + + down(&s->sem); + add_wait_queue(&db->wait, &wait); + + while (count > 0) { + /* wait for samples in ADC dma buffer + */ + do { + if (db->stopped) + start_adc(s); + spin_lock_irqsave(&s->lock, flags); + avail = db->count; + if (avail <= 0) + __set_current_state(TASK_INTERRUPTIBLE); + spin_unlock_irqrestore(&s->lock, flags); + if (avail <= 0) { + if (file->f_flags & O_NONBLOCK) { + if (!ret) + ret = -EAGAIN; + goto out; + } + up(&s->sem); + schedule(); + if (signal_pending(current)) { + if (!ret) + ret = -ERESTARTSYS; + goto out2; + } + down(&s->sem); + } + } while (avail <= 0); + + /* copy from nextOut to user + */ + if ((cnt = copy_dmabuf_user(db, buffer, + count > avail ? + avail : count, 1)) < 0) { + if (!ret) + ret = -EFAULT; + goto out; + } + + spin_lock_irqsave(&s->lock, flags); + db->count -= cnt; + db->nextOut += cnt; + if (db->nextOut >= db->rawbuf + db->dmasize) + db->nextOut -= db->dmasize; + spin_unlock_irqrestore(&s->lock, flags); + + count -= cnt; + usercnt = cnt / db->cnt_factor; + buffer += usercnt; + ret += usercnt; + } /* while (count > 0) */ + +out: + up(&s->sem); +out2: + remove_wait_queue(&db->wait, &wait); + set_current_state(TASK_RUNNING); + return ret; +} + +static ssize_t +au1550_write(struct file *file, const char *buffer, size_t count, loff_t * ppos) +{ + struct au1550_state *s = (struct au1550_state *)file->private_data; + struct dmabuf *db = &s->dma_dac; + DECLARE_WAITQUEUE(wait, current); + ssize_t ret = 0; + unsigned long flags; + int cnt, usercnt, avail; + +#ifdef AU1000_VERBOSE_DEBUG + dbg("write: count=%d", count); +#endif + + if (ppos != &file->f_pos) + return -ESPIPE; + if (db->mapped) + return -ENXIO; + if (!access_ok(VERIFY_READ, buffer, count)) + return -EFAULT; + + count *= db->cnt_factor; + + down(&s->sem); + add_wait_queue(&db->wait, &wait); + + while (count > 0) { + /* wait for space in playback buffer + */ + do { + spin_lock_irqsave(&s->lock, flags); + avail = (int) db->dmasize - db->count; + if (avail <= 0) + __set_current_state(TASK_INTERRUPTIBLE); + spin_unlock_irqrestore(&s->lock, flags); + if (avail <= 0) { + if (file->f_flags & O_NONBLOCK) { + if (!ret) + ret = -EAGAIN; + goto out; + } + up(&s->sem); + schedule(); + if (signal_pending(current)) { + if (!ret) + ret = -ERESTARTSYS; + goto out2; + } + down(&s->sem); + } + } while (avail <= 0); + + /* copy from user to nextIn + */ + if ((cnt = copy_dmabuf_user(db, (char *) buffer, + count > avail ? + avail : count, 0)) < 0) { + if (!ret) + ret = -EFAULT; + goto out; + } + + spin_lock_irqsave(&s->lock, flags); + db->count += cnt; + db->nextIn += cnt; + if (db->nextIn >= db->rawbuf + db->dmasize) + db->nextIn -= db->dmasize; + + /* If the data is available, we want to keep two buffers + * on the dma queue. If the queue count reaches zero, + * we know the dma has stopped. + */ + while ((db->dma_qcount < 2) && (db->count >= db->fragsize)) { + if (au1xxx_dbdma_put_source(db->dmanr, db->nextOut, + db->fragsize) == 0) { + err("qcount < 2 and no ring room!"); + } + db->nextOut += db->fragsize; + if (db->nextOut >= db->rawbuf + db->dmasize) + db->nextOut -= db->dmasize; + db->total_bytes += db->dma_fragsize; + if (db->dma_qcount == 0) + start_dac(s); + db->dma_qcount++; + } + spin_unlock_irqrestore(&s->lock, flags); + + count -= cnt; + usercnt = cnt / db->cnt_factor; + buffer += usercnt; + ret += usercnt; + } /* while (count > 0) */ + +out: + up(&s->sem); +out2: + remove_wait_queue(&db->wait, &wait); + set_current_state(TASK_RUNNING); + return ret; +} + + +/* No kernel lock - we have our own spinlock */ +static unsigned int +au1550_poll(struct file *file, struct poll_table_struct *wait) +{ + struct au1550_state *s = (struct au1550_state *)file->private_data; + unsigned long flags; + unsigned int mask = 0; + + if (file->f_mode & FMODE_WRITE) { + if (!s->dma_dac.ready) + return 0; + poll_wait(file, &s->dma_dac.wait, wait); + } + if (file->f_mode & FMODE_READ) { + if (!s->dma_adc.ready) + return 0; + poll_wait(file, &s->dma_adc.wait, wait); + } + + spin_lock_irqsave(&s->lock, flags); + + if (file->f_mode & FMODE_READ) { + if (s->dma_adc.count >= (signed)s->dma_adc.dma_fragsize) + mask |= POLLIN | POLLRDNORM; + } + if (file->f_mode & FMODE_WRITE) { + if (s->dma_dac.mapped) { + if (s->dma_dac.count >= + (signed)s->dma_dac.dma_fragsize) + mask |= POLLOUT | POLLWRNORM; + } else { + if ((signed) s->dma_dac.dmasize >= + s->dma_dac.count + (signed)s->dma_dac.dma_fragsize) + mask |= POLLOUT | POLLWRNORM; + } + } + spin_unlock_irqrestore(&s->lock, flags); + return mask; +} + +static int +au1550_mmap(struct file *file, struct vm_area_struct *vma) +{ + struct au1550_state *s = (struct au1550_state *)file->private_data; + struct dmabuf *db; + unsigned long size; + int ret = 0; + + lock_kernel(); + down(&s->sem); + if (vma->vm_flags & VM_WRITE) + db = &s->dma_dac; + else if (vma->vm_flags & VM_READ) + db = &s->dma_adc; + else { + ret = -EINVAL; + goto out; + } + if (vma->vm_pgoff != 0) { + ret = -EINVAL; + goto out; + } + size = vma->vm_end - vma->vm_start; + if (size > (PAGE_SIZE << db->buforder)) { + ret = -EINVAL; + goto out; + } + if (remap_page_range(vma->vm_start, virt_to_phys(db->rawbuf), + size, vma->vm_page_prot)) { + ret = -EAGAIN; + goto out; + } + vma->vm_flags &= ~VM_IO; + db->mapped = 1; +out: + up(&s->sem); + unlock_kernel(); + return ret; +} + + +#ifdef AU1000_VERBOSE_DEBUG +static struct ioctl_str_t { + unsigned int cmd; + const char *str; +} ioctl_str[] = { + {SNDCTL_DSP_RESET, "SNDCTL_DSP_RESET"}, + {SNDCTL_DSP_SYNC, "SNDCTL_DSP_SYNC"}, + {SNDCTL_DSP_SPEED, "SNDCTL_DSP_SPEED"}, + {SNDCTL_DSP_STEREO, "SNDCTL_DSP_STEREO"}, + {SNDCTL_DSP_GETBLKSIZE, "SNDCTL_DSP_GETBLKSIZE"}, + {SNDCTL_DSP_SAMPLESIZE, "SNDCTL_DSP_SAMPLESIZE"}, + {SNDCTL_DSP_CHANNELS, "SNDCTL_DSP_CHANNELS"}, + {SOUND_PCM_WRITE_CHANNELS, "SOUND_PCM_WRITE_CHANNELS"}, + {SOUND_PCM_WRITE_FILTER, "SOUND_PCM_WRITE_FILTER"}, + {SNDCTL_DSP_POST, "SNDCTL_DSP_POST"}, + {SNDCTL_DSP_SUBDIVIDE, "SNDCTL_DSP_SUBDIVIDE"}, + {SNDCTL_DSP_SETFRAGMENT, "SNDCTL_DSP_SETFRAGMENT"}, + {SNDCTL_DSP_GETFMTS, "SNDCTL_DSP_GETFMTS"}, + {SNDCTL_DSP_SETFMT, "SNDCTL_DSP_SETFMT"}, + {SNDCTL_DSP_GETOSPACE, "SNDCTL_DSP_GETOSPACE"}, + {SNDCTL_DSP_GETISPACE, "SNDCTL_DSP_GETISPACE"}, + {SNDCTL_DSP_NONBLOCK, "SNDCTL_DSP_NONBLOCK"}, + {SNDCTL_DSP_GETCAPS, "SNDCTL_DSP_GETCAPS"}, + {SNDCTL_DSP_GETTRIGGER, "SNDCTL_DSP_GETTRIGGER"}, + {SNDCTL_DSP_SETTRIGGER, "SNDCTL_DSP_SETTRIGGER"}, + {SNDCTL_DSP_GETIPTR, "SNDCTL_DSP_GETIPTR"}, + {SNDCTL_DSP_GETOPTR, "SNDCTL_DSP_GETOPTR"}, + {SNDCTL_DSP_MAPINBUF, "SNDCTL_DSP_MAPINBUF"}, + {SNDCTL_DSP_MAPOUTBUF, "SNDCTL_DSP_MAPOUTBUF"}, + {SNDCTL_DSP_SETSYNCRO, "SNDCTL_DSP_SETSYNCRO"}, + {SNDCTL_DSP_SETDUPLEX, "SNDCTL_DSP_SETDUPLEX"}, + {SNDCTL_DSP_GETODELAY, "SNDCTL_DSP_GETODELAY"}, + {SNDCTL_DSP_GETCHANNELMASK, "SNDCTL_DSP_GETCHANNELMASK"}, + {SNDCTL_DSP_BIND_CHANNEL, "SNDCTL_DSP_BIND_CHANNEL"}, + {OSS_GETVERSION, "OSS_GETVERSION"}, + {SOUND_PCM_READ_RATE, "SOUND_PCM_READ_RATE"}, + {SOUND_PCM_READ_CHANNELS, "SOUND_PCM_READ_CHANNELS"}, + {SOUND_PCM_READ_BITS, "SOUND_PCM_READ_BITS"}, + {SOUND_PCM_READ_FILTER, "SOUND_PCM_READ_FILTER"} +}; +#endif + +static int +dma_count_done(struct dmabuf *db) +{ + if (db->stopped) + return 0; + + return db->dma_fragsize - au1xxx_get_dma_residue(db->dmanr); +} + + +static int +au1550_ioctl(struct inode *inode, struct file *file, unsigned int cmd, + unsigned long arg) +{ + struct au1550_state *s = (struct au1550_state *)file->private_data; + unsigned long flags; + audio_buf_info abinfo; + count_info cinfo; + int count; + int val, mapped, ret, diff; + + mapped = ((file->f_mode & FMODE_WRITE) && s->dma_dac.mapped) || + ((file->f_mode & FMODE_READ) && s->dma_adc.mapped); + +#ifdef AU1000_VERBOSE_DEBUG + for (count=0; countf_mode & FMODE_WRITE) + return drain_dac(s, file->f_flags & O_NONBLOCK); + return 0; + + case SNDCTL_DSP_SETDUPLEX: + return 0; + + case SNDCTL_DSP_GETCAPS: + return put_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME | + DSP_CAP_TRIGGER | DSP_CAP_MMAP, (int *)arg); + + case SNDCTL_DSP_RESET: + if (file->f_mode & FMODE_WRITE) { + stop_dac(s); + synchronize_irq(); + s->dma_dac.count = s->dma_dac.total_bytes = 0; + s->dma_dac.nextIn = s->dma_dac.nextOut = + s->dma_dac.rawbuf; + } + if (file->f_mode & FMODE_READ) { + stop_adc(s); + synchronize_irq(); + s->dma_adc.count = s->dma_adc.total_bytes = 0; + s->dma_adc.nextIn = s->dma_adc.nextOut = + s->dma_adc.rawbuf; + } + return 0; + + case SNDCTL_DSP_SPEED: + if (get_user(val, (int *) arg)) + return -EFAULT; + if (val >= 0) { + if (file->f_mode & FMODE_READ) { + stop_adc(s); + set_adc_rate(s, val); + } + if (file->f_mode & FMODE_WRITE) { + stop_dac(s); + set_dac_rate(s, val); + } + if (s->open_mode & FMODE_READ) + if ((ret = prog_dmabuf_adc(s))) + return ret; + if (s->open_mode & FMODE_WRITE) + if ((ret = prog_dmabuf_dac(s))) + return ret; + } + return put_user((file->f_mode & FMODE_READ) ? + s->dma_adc.sample_rate : + s->dma_dac.sample_rate, + (int *)arg); + + case SNDCTL_DSP_STEREO: + if (get_user(val, (int *) arg)) + return -EFAULT; + if (file->f_mode & FMODE_READ) { + stop_adc(s); + s->dma_adc.num_channels = val ? 2 : 1; + if ((ret = prog_dmabuf_adc(s))) + return ret; + } + if (file->f_mode & FMODE_WRITE) { + stop_dac(s); + s->dma_dac.num_channels = val ? 2 : 1; + if (s->codec_ext_caps & AC97_EXT_DACS) { + /* disable surround and center/lfe in AC'97 + */ + u16 ext_stat = rdcodec(s->codec, + AC97_EXTENDED_STATUS); + wrcodec(s->codec, AC97_EXTENDED_STATUS, + ext_stat | (AC97_EXTSTAT_PRI | + AC97_EXTSTAT_PRJ | + AC97_EXTSTAT_PRK)); + } + if ((ret = prog_dmabuf_dac(s))) + return ret; + } + return 0; + + case SNDCTL_DSP_CHANNELS: + if (get_user(val, (int *) arg)) + return -EFAULT; + if (val != 0) { + if (file->f_mode & FMODE_READ) { + if (val < 0 || val > 2) + return -EINVAL; + stop_adc(s); + s->dma_adc.num_channels = val; + if ((ret = prog_dmabuf_adc(s))) + return ret; + } + if (file->f_mode & FMODE_WRITE) { + switch (val) { + case 1: + case 2: + break; + case 3: + case 5: + return -EINVAL; + case 4: + if (!(s->codec_ext_caps & + AC97_EXTID_SDAC)) + return -EINVAL; + break; + case 6: + if ((s->codec_ext_caps & + AC97_EXT_DACS) != AC97_EXT_DACS) + return -EINVAL; + break; + default: + return -EINVAL; + } + + stop_dac(s); + if (val <= 2 && + (s->codec_ext_caps & AC97_EXT_DACS)) { + /* disable surround and center/lfe + * channels in AC'97 + */ + u16 ext_stat = + rdcodec(s->codec, + AC97_EXTENDED_STATUS); + wrcodec(s->codec, + AC97_EXTENDED_STATUS, + ext_stat | (AC97_EXTSTAT_PRI | + AC97_EXTSTAT_PRJ | + AC97_EXTSTAT_PRK)); + } else if (val >= 4) { + /* enable surround, center/lfe + * channels in AC'97 + */ + u16 ext_stat = + rdcodec(s->codec, + AC97_EXTENDED_STATUS); + ext_stat &= ~AC97_EXTSTAT_PRJ; + if (val == 6) + ext_stat &= + ~(AC97_EXTSTAT_PRI | + AC97_EXTSTAT_PRK); + wrcodec(s->codec, + AC97_EXTENDED_STATUS, + ext_stat); + } + + s->dma_dac.num_channels = val; + if ((ret = prog_dmabuf_dac(s))) + return ret; + } + } + return put_user(val, (int *) arg); + + case SNDCTL_DSP_GETFMTS: /* Returns a mask */ + return put_user(AFMT_S16_LE | AFMT_U8, (int *) arg); + + case SNDCTL_DSP_SETFMT: /* Selects ONE fmt */ + if (get_user(val, (int *) arg)) + return -EFAULT; + if (val != AFMT_QUERY) { + if (file->f_mode & FMODE_READ) { + stop_adc(s); + if (val == AFMT_S16_LE) + s->dma_adc.sample_size = 16; + else { + val = AFMT_U8; + s->dma_adc.sample_size = 8; + } + if ((ret = prog_dmabuf_adc(s))) + return ret; + } + if (file->f_mode & FMODE_WRITE) { + stop_dac(s); + if (val == AFMT_S16_LE) + s->dma_dac.sample_size = 16; + else { + val = AFMT_U8; + s->dma_dac.sample_size = 8; + } + if ((ret = prog_dmabuf_dac(s))) + return ret; + } + } else { + if (file->f_mode & FMODE_READ) + val = (s->dma_adc.sample_size == 16) ? + AFMT_S16_LE : AFMT_U8; + else + val = (s->dma_dac.sample_size == 16) ? + AFMT_S16_LE : AFMT_U8; + } + return put_user(val, (int *) arg); + + case SNDCTL_DSP_POST: + return 0; + + case SNDCTL_DSP_GETTRIGGER: + val = 0; + spin_lock_irqsave(&s->lock, flags); + if (file->f_mode & FMODE_READ && !s->dma_adc.stopped) + val |= PCM_ENABLE_INPUT; + if (file->f_mode & FMODE_WRITE && !s->dma_dac.stopped) + val |= PCM_ENABLE_OUTPUT; + spin_unlock_irqrestore(&s->lock, flags); + return put_user(val, (int *) arg); + + case SNDCTL_DSP_SETTRIGGER: + if (get_user(val, (int *) arg)) + return -EFAULT; + if (file->f_mode & FMODE_READ) { + if (val & PCM_ENABLE_INPUT) + start_adc(s); + else + stop_adc(s); + } + if (file->f_mode & FMODE_WRITE) { + if (val & PCM_ENABLE_OUTPUT) + start_dac(s); + else + stop_dac(s); + } + return 0; + + case SNDCTL_DSP_GETOSPACE: + if (!(file->f_mode & FMODE_WRITE)) + return -EINVAL; + abinfo.fragsize = s->dma_dac.fragsize; + spin_lock_irqsave(&s->lock, flags); + count = s->dma_dac.count; + count -= dma_count_done(&s->dma_dac); + spin_unlock_irqrestore(&s->lock, flags); + if (count < 0) + count = 0; + abinfo.bytes = (s->dma_dac.dmasize - count) / + s->dma_dac.cnt_factor; + abinfo.fragstotal = s->dma_dac.numfrag; + abinfo.fragments = abinfo.bytes >> s->dma_dac.fragshift; +#ifdef AU1000_VERBOSE_DEBUG + dbg("bytes=%d, fragments=%d", abinfo.bytes, abinfo.fragments); +#endif + return copy_to_user((void *) arg, &abinfo, + sizeof(abinfo)) ? -EFAULT : 0; + + case SNDCTL_DSP_GETISPACE: + if (!(file->f_mode & FMODE_READ)) + return -EINVAL; + abinfo.fragsize = s->dma_adc.fragsize; + spin_lock_irqsave(&s->lock, flags); + count = s->dma_adc.count; + count += dma_count_done(&s->dma_adc); + spin_unlock_irqrestore(&s->lock, flags); + if (count < 0) + count = 0; + abinfo.bytes = count / s->dma_adc.cnt_factor; + abinfo.fragstotal = s->dma_adc.numfrag; + abinfo.fragments = abinfo.bytes >> s->dma_adc.fragshift; + return copy_to_user((void *) arg, &abinfo, + sizeof(abinfo)) ? -EFAULT : 0; + + case SNDCTL_DSP_NONBLOCK: + file->f_flags |= O_NONBLOCK; + return 0; + + case SNDCTL_DSP_GETODELAY: + if (!(file->f_mode & FMODE_WRITE)) + return -EINVAL; + spin_lock_irqsave(&s->lock, flags); + count = s->dma_dac.count; + count -= dma_count_done(&s->dma_dac); + spin_unlock_irqrestore(&s->lock, flags); + if (count < 0) + count = 0; + count /= s->dma_dac.cnt_factor; + return put_user(count, (int *) arg); + + case SNDCTL_DSP_GETIPTR: + if (!(file->f_mode & FMODE_READ)) + return -EINVAL; + spin_lock_irqsave(&s->lock, flags); + cinfo.bytes = s->dma_adc.total_bytes; + count = s->dma_adc.count; + if (!s->dma_adc.stopped) { + diff = dma_count_done(&s->dma_adc); + count += diff; + cinfo.bytes += diff; + cinfo.ptr = virt_to_phys(s->dma_adc.nextIn) + diff - + virt_to_phys(s->dma_adc.rawbuf); + } else + cinfo.ptr = virt_to_phys(s->dma_adc.nextIn) - + virt_to_phys(s->dma_adc.rawbuf); + if (s->dma_adc.mapped) + s->dma_adc.count &= (s->dma_adc.dma_fragsize-1); + spin_unlock_irqrestore(&s->lock, flags); + if (count < 0) + count = 0; + cinfo.blocks = count >> s->dma_adc.fragshift; + return copy_to_user((void *) arg, &cinfo, sizeof(cinfo)); + + case SNDCTL_DSP_GETOPTR: + if (!(file->f_mode & FMODE_READ)) + return -EINVAL; + spin_lock_irqsave(&s->lock, flags); + cinfo.bytes = s->dma_dac.total_bytes; + count = s->dma_dac.count; + if (!s->dma_dac.stopped) { + diff = dma_count_done(&s->dma_dac); + count -= diff; + cinfo.bytes += diff; + cinfo.ptr = virt_to_phys(s->dma_dac.nextOut) + diff - + virt_to_phys(s->dma_dac.rawbuf); + } else + cinfo.ptr = virt_to_phys(s->dma_dac.nextOut) - + virt_to_phys(s->dma_dac.rawbuf); + if (s->dma_dac.mapped) + s->dma_dac.count &= (s->dma_dac.dma_fragsize-1); + spin_unlock_irqrestore(&s->lock, flags); + if (count < 0) + count = 0; + cinfo.blocks = count >> s->dma_dac.fragshift; + return copy_to_user((void *) arg, &cinfo, sizeof(cinfo)); + + case SNDCTL_DSP_GETBLKSIZE: + if (file->f_mode & FMODE_WRITE) + return put_user(s->dma_dac.fragsize, (int *) arg); + else + return put_user(s->dma_adc.fragsize, (int *) arg); + + case SNDCTL_DSP_SETFRAGMENT: + if (get_user(val, (int *) arg)) + return -EFAULT; + if (file->f_mode & FMODE_READ) { + stop_adc(s); + s->dma_adc.ossfragshift = val & 0xffff; + s->dma_adc.ossmaxfrags = (val >> 16) & 0xffff; + if (s->dma_adc.ossfragshift < 4) + s->dma_adc.ossfragshift = 4; + if (s->dma_adc.ossfragshift > 15) + s->dma_adc.ossfragshift = 15; + if (s->dma_adc.ossmaxfrags < 4) + s->dma_adc.ossmaxfrags = 4; + if ((ret = prog_dmabuf_adc(s))) + return ret; + } + if (file->f_mode & FMODE_WRITE) { + stop_dac(s); + s->dma_dac.ossfragshift = val & 0xffff; + s->dma_dac.ossmaxfrags = (val >> 16) & 0xffff; + if (s->dma_dac.ossfragshift < 4) + s->dma_dac.ossfragshift = 4; + if (s->dma_dac.ossfragshift > 15) + s->dma_dac.ossfragshift = 15; + if (s->dma_dac.ossmaxfrags < 4) + s->dma_dac.ossmaxfrags = 4; + if ((ret = prog_dmabuf_dac(s))) + return ret; + } + return 0; + + case SNDCTL_DSP_SUBDIVIDE: + if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision) || + (file->f_mode & FMODE_WRITE && s->dma_dac.subdivision)) + return -EINVAL; + if (get_user(val, (int *) arg)) + return -EFAULT; + if (val != 1 && val != 2 && val != 4) + return -EINVAL; + if (file->f_mode & FMODE_READ) { + stop_adc(s); + s->dma_adc.subdivision = val; + if ((ret = prog_dmabuf_adc(s))) + return ret; + } + if (file->f_mode & FMODE_WRITE) { + stop_dac(s); + s->dma_dac.subdivision = val; + if ((ret = prog_dmabuf_dac(s))) + return ret; + } + return 0; + + case SOUND_PCM_READ_RATE: + return put_user((file->f_mode & FMODE_READ) ? + s->dma_adc.sample_rate : + s->dma_dac.sample_rate, + (int *)arg); + + case SOUND_PCM_READ_CHANNELS: + if (file->f_mode & FMODE_READ) + return put_user(s->dma_adc.num_channels, (int *)arg); + else + return put_user(s->dma_dac.num_channels, (int *)arg); + + case SOUND_PCM_READ_BITS: + if (file->f_mode & FMODE_READ) + return put_user(s->dma_adc.sample_size, (int *)arg); + else + return put_user(s->dma_dac.sample_size, (int *)arg); + + case SOUND_PCM_WRITE_FILTER: + case SNDCTL_DSP_SETSYNCRO: + case SOUND_PCM_READ_FILTER: + return -EINVAL; + } + + return mixdev_ioctl(s->codec, cmd, arg); +} + + +static int +au1550_open(struct inode *inode, struct file *file) +{ + int minor = MINOR(inode->i_rdev); + DECLARE_WAITQUEUE(wait, current); + struct au1550_state *s = &au1550_state; + int ret; + +#ifdef AU1000_VERBOSE_DEBUG + if (file->f_flags & O_NONBLOCK) + dbg(__FUNCTION__ ": non-blocking"); + else + dbg(__FUNCTION__ ": blocking"); +#endif + + file->private_data = s; + /* wait for device to become free */ + down(&s->open_sem); + while (s->open_mode & file->f_mode) { + if (file->f_flags & O_NONBLOCK) { + up(&s->open_sem); + return -EBUSY; + } + add_wait_queue(&s->open_wait, &wait); + __set_current_state(TASK_INTERRUPTIBLE); + up(&s->open_sem); + schedule(); + remove_wait_queue(&s->open_wait, &wait); + set_current_state(TASK_RUNNING); + if (signal_pending(current)) + return -ERESTARTSYS; + down(&s->open_sem); + } + + stop_dac(s); + stop_adc(s); + + if (file->f_mode & FMODE_READ) { + s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags = + s->dma_adc.subdivision = s->dma_adc.total_bytes = 0; + s->dma_adc.num_channels = 1; + s->dma_adc.sample_size = 8; + set_adc_rate(s, 8000); + if ((minor & 0xf) == SND_DEV_DSP16) + s->dma_adc.sample_size = 16; + } + + if (file->f_mode & FMODE_WRITE) { + s->dma_dac.ossfragshift = s->dma_dac.ossmaxfrags = + s->dma_dac.subdivision = s->dma_dac.total_bytes = 0; + s->dma_dac.num_channels = 1; + s->dma_dac.sample_size = 8; + set_dac_rate(s, 8000); + if ((minor & 0xf) == SND_DEV_DSP16) + s->dma_dac.sample_size = 16; + } + + if (file->f_mode & FMODE_READ) { + if ((ret = prog_dmabuf_adc(s))) + return ret; + } + if (file->f_mode & FMODE_WRITE) { + if ((ret = prog_dmabuf_dac(s))) + return ret; + } + + s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE); + up(&s->open_sem); + init_MUTEX(&s->sem); + return 0; +} + +static int +au1550_release(struct inode *inode, struct file *file) +{ + struct au1550_state *s = (struct au1550_state *)file->private_data; + + lock_kernel(); + + if (file->f_mode & FMODE_WRITE) { + unlock_kernel(); + drain_dac(s, file->f_flags & O_NONBLOCK); + lock_kernel(); + } + + down(&s->open_sem); + if (file->f_mode & FMODE_WRITE) { + stop_dac(s); + kfree(s->dma_dac.rawbuf); + s->dma_dac.rawbuf = NULL; + } + if (file->f_mode & FMODE_READ) { + stop_adc(s); + kfree(s->dma_adc.rawbuf); + s->dma_adc.rawbuf = NULL; + } + s->open_mode &= ((~file->f_mode) & (FMODE_READ|FMODE_WRITE)); + up(&s->open_sem); + wake_up(&s->open_wait); + unlock_kernel(); + return 0; +} + +static /*const */ struct file_operations au1550_audio_fops = { + owner: THIS_MODULE, + llseek: au1550_llseek, + read: au1550_read, + write: au1550_write, + poll: au1550_poll, + ioctl: au1550_ioctl, + mmap: au1550_mmap, + open: au1550_open, + release: au1550_release, +}; + +MODULE_AUTHOR("Advanced Micro Devices (AMD), dan@embeddededge.com"); +MODULE_DESCRIPTION("Au1550 Audio Driver"); + +static int __devinit +au1550_probe(void) +{ + struct au1550_state *s = &au1550_state; + int val; +#ifdef AU1550_DEBUG + char proc_str[80]; +#endif + + memset(s, 0, sizeof(struct au1550_state)); + + init_waitqueue_head(&s->dma_adc.wait); + init_waitqueue_head(&s->dma_dac.wait); + init_waitqueue_head(&s->open_wait); + init_MUTEX(&s->open_sem); + spin_lock_init(&s->lock); + + s->codec = ac97_alloc_codec(); + if(s->codec == NULL) { + err("Out of memory"); + return -1; + } + s->codec->private_data = s; + s->codec->id = 0; + s->codec->codec_read = rdcodec; + s->codec->codec_write = wrcodec; + s->codec->codec_wait = waitcodec; + + if (!request_region(PHYSADDR(AC97_PSC_SEL), + 0x30, AU1550_MODULE_NAME)) { + err("AC'97 ports in use"); + } + + /* Allocate the DMA Channels + */ + if ((s->dma_dac.dmanr = au1xxx_dbdma_chan_alloc(DBDMA_MEM_CHAN, + DBDMA_AC97_TX_CHAN, dac_dma_interrupt, (void *)s)) == 0) { + err("Can't get DAC DMA"); + goto err_dma1; + } + au1xxx_dbdma_set_devwidth(s->dma_dac.dmanr, 16); + if (au1xxx_dbdma_ring_alloc(s->dma_dac.dmanr, + NUM_DBDMA_DESCRIPTORS) == 0) { + err("Can't get DAC DMA descriptors"); + goto err_dma1; + } + + if ((s->dma_adc.dmanr = au1xxx_dbdma_chan_alloc(DBDMA_AC97_RX_CHAN, + DBDMA_MEM_CHAN, adc_dma_interrupt, (void *)s)) == 0) { + err("Can't get ADC DMA"); + goto err_dma2; + } + au1xxx_dbdma_set_devwidth(s->dma_adc.dmanr, 16); + if (au1xxx_dbdma_ring_alloc(s->dma_adc.dmanr, + NUM_DBDMA_DESCRIPTORS) == 0) { + err("Can't get ADC DMA descriptors"); + goto err_dma2; + } + + info("DAC: DMA%d, ADC: DMA%d", DBDMA_AC97_TX_CHAN, DBDMA_AC97_RX_CHAN); + + /* register devices */ + + if ((s->dev_audio = register_sound_dsp(&au1550_audio_fops, -1)) < 0) + goto err_dev1; + if ((s->codec->dev_mixer = + register_sound_mixer(&au1550_mixer_fops, -1)) < 0) + goto err_dev2; + +#ifdef AU1550_DEBUG + /* intialize the debug proc device */ + s->ps = create_proc_read_entry(AU1000_MODULE_NAME, 0, NULL, + proc_au1550_dump, NULL); +#endif /* AU1550_DEBUG */ + + /* The GPIO for the appropriate PSC was configured by the + * board specific start up. + * + * configure PSC for AC'97 + */ + au_writel(0, AC97_PSC_CTRL); /* Disable PSC */ + au_sync(); + au_writel((PSC_SEL_CLK_SERCLK | PSC_SEL_PS_AC97MODE), AC97_PSC_SEL); + au_sync(); + + /* cold reset the AC'97 + */ + au_writel(PSC_AC97RST_RST, PSC_AC97RST); + au_sync(); + au1550_delay(10); + au_writel(0, PSC_AC97RST); + au_sync(); + + /* need to delay around 500msec(bleech) to give + some CODECs enough time to wakeup */ + au1550_delay(500); + + /* warm reset the AC'97 to start the bitclk + */ + au_writel(PSC_AC97RST_SNC, PSC_AC97RST); + au_sync(); + udelay(100); + au_writel(0, PSC_AC97RST); + au_sync(); + + /* Enable PSC + */ + au_writel(PSC_CTRL_ENABLE, AC97_PSC_CTRL); + au_sync(); + + /* Wait for PSC ready. + */ + do { + val = readl(PSC_AC97STAT); + au_sync(); + } while ((val & PSC_AC97STAT_SR) == 0); + + /* Configure AC97 controller. + * Deep FIFO, 16-bit sample, DMA, make sure DMA matches fifo size. + */ + val = PSC_AC97CFG_SET_LEN(16); + val |= PSC_AC97CFG_RT_FIFO8 | PSC_AC97CFG_TT_FIFO8; + + /* Enable device so we can at least + * talk over the AC-link. + */ + au_writel(val, PSC_AC97CFG); + au_writel(PSC_AC97MSK_ALLMASK, PSC_AC97MSK); + au_sync(); + val |= PSC_AC97CFG_DE_ENABLE; + au_writel(val, PSC_AC97CFG); + au_sync(); + + /* Wait for Device ready. + */ + do { + val = readl(PSC_AC97STAT); + au_sync(); + } while ((val & PSC_AC97STAT_DR) == 0); + + /* codec init */ + if (!ac97_probe_codec(s->codec)) + goto err_dev3; + + s->codec_base_caps = rdcodec(s->codec, AC97_RESET); + s->codec_ext_caps = rdcodec(s->codec, AC97_EXTENDED_ID); + info("AC'97 Base/Extended ID = %04x/%04x", + s->codec_base_caps, s->codec_ext_caps); + + if (!(s->codec_ext_caps & AC97_EXTID_VRA)) { + /* codec does not support VRA + */ + s->no_vra = 1; + } else if (!vra) { + /* Boot option says disable VRA + */ + u16 ac97_extstat = rdcodec(s->codec, AC97_EXTENDED_STATUS); + wrcodec(s->codec, AC97_EXTENDED_STATUS, + ac97_extstat & ~AC97_EXTSTAT_VRA); + s->no_vra = 1; + } + if (s->no_vra) + info("no VRA, interpolating and decimating"); + + /* set mic to be the recording source */ + val = SOUND_MASK_MIC; + mixdev_ioctl(s->codec, SOUND_MIXER_WRITE_RECSRC, + (unsigned long) &val); +#ifdef AU1550_DEBUG + sprintf(proc_str, "driver/%s/%d/ac97", AU1550_MODULE_NAME, + s->codec->id); + s->ac97_ps = create_proc_read_entry (proc_str, 0, NULL, + ac97_read_proc, &s->codec); +#endif + + return 0; + + err_dev3: + unregister_sound_mixer(s->codec->dev_mixer); + err_dev2: + unregister_sound_dsp(s->dev_audio); + err_dev1: + au1xxx_dbdma_chan_free(s->dma_adc.dmanr); + err_dma2: + au1xxx_dbdma_chan_free(s->dma_dac.dmanr); + err_dma1: + release_region(PHYSADDR(AC97_PSC_SEL), 0x30); + + ac97_release_codec(s->codec); + return -1; +} + +static void __devinit +au1550_remove(void) +{ + struct au1550_state *s = &au1550_state; + + if (!s) + return; +#ifdef AU1550_DEBUG + if (s->ps) + remove_proc_entry(AU1000_MODULE_NAME, NULL); +#endif /* AU1000_DEBUG */ + synchronize_irq(); + au1xxx_dbdma_chan_free(s->dma_adc.dmanr); + au1xxx_dbdma_chan_free(s->dma_dac.dmanr); + release_region(PHYSADDR(AC97_PSC_SEL), 0x30); + unregister_sound_dsp(s->dev_audio); + unregister_sound_mixer(s->codec->dev_mixer); + ac97_release_codec(s->codec); +} + +static int __init +init_au1550(void) +{ + return au1550_probe(); +} + +static void __exit +cleanup_au1550(void) +{ + au1550_remove(); +} + +module_init(init_au1550); +module_exit(cleanup_au1550); + +#ifndef MODULE + +static int __init +au1550_setup(char *options) +{ + char *this_opt; + + if (!options || !*options) + return 0; + + for(this_opt=strtok(options, ","); + this_opt; this_opt=strtok(NULL, ",")) { + if (!strncmp(this_opt, "vra", 3)) { + vra = 1; + } + } + + return 1; +} + +__setup("au1550_audio=", au1550_setup); + +#endif /* MODULE */ diff -urN linux-2.4.28-bk3/drivers/sound/swarm_cs4297a.c linux-2.4.28-bk4/drivers/sound/swarm_cs4297a.c --- linux-2.4.28-bk3/drivers/sound/swarm_cs4297a.c 2003-08-25 04:44:42.000000000 -0700 +++ linux-2.4.28-bk4/drivers/sound/swarm_cs4297a.c 2004-11-23 02:49:27.557398724 -0800 @@ -11,6 +11,7 @@ * -- adapted from cs4281 PCI driver for cs4297a on * BCM1250 Synchronous Serial interface * (Kip Walker, Broadcom Corp.) +* Copyright (C) 2004 Maciej W. Rozycki * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -71,14 +72,16 @@ #include #include #include -#include -#include #include #include #include #include -#include + +#include +#include #include +#include +#include #include #include @@ -758,7 +761,7 @@ descr = &d->descrtab[swptr]; data_p = &d->dma_buf[swptr * 4]; - *data_p = data; + *data_p = cpu_to_be64(data); out64(1, SS_CSR(R_SER_DMA_DSCR_COUNT_TX)); CS_DBGOUT(CS_DESCR, 4, printk(KERN_INFO "cs4297a: add_tx %p (%x -> %x)\n", @@ -950,7 +953,7 @@ s_ptr = (u32 *)&(d->dma_buf[d->swptr*4]); descr = &d->descrtab[d->swptr]; while (diff2--) { - u64 data = *(u64 *)s_ptr; + u64 data = be64_to_cpu(*(u64 *)s_ptr); u64 descr_a; u16 left, right; descr_a = descr->descr_a; @@ -977,10 +980,11 @@ continue; } good_diff++; - left = ((s_ptr[1] & 0xff) << 8) | ((s_ptr[2] >> 24) & 0xff); - right = (s_ptr[2] >> 4) & 0xffff; - *d->sb_hwptr++ = left; - *d->sb_hwptr++ = right; + left = ((be32_to_cpu(s_ptr[1]) & 0xff) << 8) | + ((be32_to_cpu(s_ptr[2]) >> 24) & 0xff); + right = (be32_to_cpu(s_ptr[2]) >> 4) & 0xffff; + *d->sb_hwptr++ = cpu_to_be16(left); + *d->sb_hwptr++ = cpu_to_be16(right); if (d->sb_hwptr == d->sb_end) d->sb_hwptr = d->sample_buf; descr++; @@ -1025,7 +1029,7 @@ here because of an interrupt, so there must be a buffer to process. */ do { - data = *data_p; + data = be64_to_cpu(*data_p); if ((descr->descr_a & M_DMA_DSCRA_A_ADDR) != PHYSADDR((long)data_p)) { printk(KERN_ERR "cs4297a: RX Bad address %d (%llx %lx)\n", d->swptr, (long long)(descr->descr_a & M_DMA_DSCRA_A_ADDR), @@ -1804,7 +1808,6 @@ u32 *s_tmpl; u32 *t_tmpl; u32 left, right; - /* XXXKW check system endian here ... */ int swap = (s->prop_dac.fmt == AFMT_S16_LE) || (s->prop_dac.fmt == AFMT_U16_LE); /* XXXXXX this is broken for BLOAT_FACTOR */ @@ -1845,21 +1848,21 @@ /* XXXKW assuming 16-bit stereo! */ do { - t_tmpl[0] = 0x98000000; - left = s_tmpl[0] >> 16; - if (left & 0x8000) - left |= 0xf0000; - right = s_tmpl[0] & 0xffff; - if (right & 0x8000) - right |= 0xf0000; - if (swap) { - t_tmpl[1] = left & 0xff; - t_tmpl[2] = ((left & 0xff00) << 16) | ((right & 0xff) << 12) | - ((right & 0xff00) >> 4); - } else { - t_tmpl[1] = left >> 8; - t_tmpl[2] = ((left & 0xff) << 24) | (right << 4); - } + u32 tmp; + + t_tmpl[0] = cpu_to_be32(0x98000000); + + tmp = be32_to_cpu(s_tmpl[0]); + left = tmp & 0xffff; + right = tmp >> 16; + if (swap) { + left = swab16(left); + right = swab16(right); + } + t_tmpl[1] = cpu_to_be32(left >> 8); + t_tmpl[2] = cpu_to_be32(((left & 0xff) << 24) | + (right << 4)); + s_tmpl++; t_tmpl += 8; copy_cnt -= 4; @@ -1867,7 +1870,8 @@ /* Mux in any pending read/write accesses */ if (s->reg_request) { - *(u64 *)(d->dma_buf + (swptr * 4)) |= s->reg_request; + *(u64 *)(d->dma_buf + (swptr * 4)) |= + cpu_to_be64(s->reg_request); s->reg_request = 0; wake_up(&s->dma_dac.reg_wait); } diff -urN linux-2.4.28-bk3/fs/isofs/inode.c linux-2.4.28-bk4/fs/isofs/inode.c --- linux-2.4.28-bk3/fs/isofs/inode.c 2002-11-28 15:53:15.000000000 -0800 +++ linux-2.4.28-bk4/fs/isofs/inode.c 2004-11-23 02:49:27.561398887 -0800 @@ -34,11 +34,6 @@ #include "zisofs.h" -/* - * We have no support for "multi volume" CDs, but more and more disks carry - * wrong information within the volume descriptors. - */ -#define IGNORE_WRONG_MULTI_VOLUME_SPECS #define BEQUIET #ifdef LEAK_CHECK @@ -489,19 +484,6 @@ if (!parse_options((char *) data, &opt)) goto out_unlock; -#if 0 - printk("map = %c\n", opt.map); - printk("rock = %c\n", opt.rock); - printk("joliet = %c\n", opt.joliet); - printk("check = %c\n", opt.check); - printk("cruft = %c\n", opt.cruft); - printk("unhide = %c\n", opt.unhide); - printk("blocksize = %d\n", opt.blocksize); - printk("gid = %d\n", opt.gid); - printk("uid = %d\n", opt.uid); - printk("iocharset = %s\n", opt.iocharset); -#endif - /* * First of all, get the hardware blocksize for this device. * If we don't know what it is, or the hardware blocksize is @@ -623,19 +605,11 @@ if(high_sierra){ rootp = (struct iso_directory_record *) h_pri->root_directory_record; -#ifndef IGNORE_WRONG_MULTI_VOLUME_SPECS - if (isonum_723 (h_pri->volume_set_size) != 1) - goto out_no_support; -#endif /* IGNORE_WRONG_MULTI_VOLUME_SPECS */ s->u.isofs_sb.s_nzones = isonum_733 (h_pri->volume_space_size); s->u.isofs_sb.s_log_zone_size = isonum_723 (h_pri->logical_block_size); s->u.isofs_sb.s_max_size = isonum_733(h_pri->volume_space_size); } else { rootp = (struct iso_directory_record *) pri->root_directory_record; -#ifndef IGNORE_WRONG_MULTI_VOLUME_SPECS - if (isonum_723 (pri->volume_set_size) != 1) - goto out_no_support; -#endif /* IGNORE_WRONG_MULTI_VOLUME_SPECS */ s->u.isofs_sb.s_nzones = isonum_733 (pri->volume_space_size); s->u.isofs_sb.s_log_zone_size = isonum_723 (pri->logical_block_size); s->u.isofs_sb.s_max_size = isonum_733(pri->volume_space_size); @@ -855,11 +829,6 @@ printk(KERN_WARNING "Logical zone size(%d) < hardware blocksize(%u)\n", orig_zonesize, blocksize); goto out_freebh; -#ifndef IGNORE_WRONG_MULTI_VOLUME_SPECS -out_no_support: - printk(KERN_WARNING "Multi-volume disks not supported.\n"); - goto out_freebh; -#endif out_unknown_format: if (!silent) printk(KERN_WARNING "Unable to identify CD-ROM format.\n"); @@ -1212,30 +1181,13 @@ } /* - * The ISO-9660 filesystem only stores 32 bits for file size. - * mkisofs handles files up to 2GB-2 = 2147483646 = 0x7FFFFFFE bytes - * in size. This is according to the large file summit paper from 1996. - * WARNING: ISO-9660 filesystems > 1 GB and even > 2 GB are fully - * legal. Do not prevent to use DVD's schilling@fokus.gmd.de - */ - if ((inode->i_size < 0 || inode->i_size > 0x7FFFFFFE) && - inode->i_sb->u.isofs_sb.s_cruft == 'n') { - printk(KERN_WARNING "Warning: defective CD-ROM. " - "Enabling \"cruft\" mount option.\n"); - inode->i_sb->u.isofs_sb.s_cruft = 'y'; - } - - /* * Some dipshit decided to store some other bit of information - * in the high byte of the file length. Catch this and holler. - * WARNING: this will make it impossible for a file to be > 16MB - * on the CDROM. + * in the high byte of the file length. Truncate in case + * this CDROM was mounted with the cruft option. */ - if (inode->i_sb->u.isofs_sb.s_cruft == 'y' && - inode->i_size & 0xff000000) { + if (inode->i_sb->u.isofs_sb.s_cruft == 'y') inode->i_size &= 0x00ffffff; - } if (de->interleave[0]) { printk("Interleaved files not (yet) supported.\n"); @@ -1283,61 +1235,29 @@ /* get the volume sequence number */ volume_seq_no = isonum_723 (de->volume_sequence_number) ; - /* - * Multi volume means tagging a group of CDs with info in their headers. - * All CDs of a group must share the same vol set name and vol set size - * and have different vol set seq num. Deciding that data is wrong based - * in that three fields is wrong. The fields are informative, for - * cataloging purposes in a big jukebox, ie. Read sections 4.17, 4.18, 6.6 - * of ftp://ftp.ecma.ch/ecma-st/Ecma-119.pdf (ECMA 119 2nd Ed = ISO 9660) - */ -#ifndef IGNORE_WRONG_MULTI_VOLUME_SPECS - /* - * Disable checking if we see any volume number other than 0 or 1. - * We could use the cruft option, but that has multiple purposes, one - * of which is limiting the file size to 16Mb. Thus we silently allow - * volume numbers of 0 to go through without complaining. - */ - if (inode->i_sb->u.isofs_sb.s_cruft == 'n' && - (volume_seq_no != 0) && (volume_seq_no != 1)) { - printk(KERN_WARNING "Warning: defective CD-ROM " - "(volume sequence number %d). " - "Enabling \"cruft\" mount option.\n", volume_seq_no); - inode->i_sb->u.isofs_sb.s_cruft = 'y'; - } -#endif /*IGNORE_WRONG_MULTI_VOLUME_SPECS */ - /* Install the inode operations vector */ -#ifndef IGNORE_WRONG_MULTI_VOLUME_SPECS - if (inode->i_sb->u.isofs_sb.s_cruft != 'y' && - (volume_seq_no != 0) && (volume_seq_no != 1)) { - printk(KERN_WARNING "Multi-volume CD somehow got mounted.\n"); - } else -#endif /*IGNORE_WRONG_MULTI_VOLUME_SPECS */ - { - if (S_ISREG(inode->i_mode)) { - inode->i_fop = &generic_ro_fops; - switch ( inode->u.isofs_i.i_file_format ) { + if (S_ISREG(inode->i_mode)) { + inode->i_fop = &generic_ro_fops; + switch ( inode->u.isofs_i.i_file_format ) { #ifdef CONFIG_ZISOFS - case isofs_file_compressed: - inode->i_data.a_ops = &zisofs_aops; - break; -#endif - default: - inode->i_data.a_ops = &isofs_aops; - break; - } - } else if (S_ISDIR(inode->i_mode)) { - inode->i_op = &isofs_dir_inode_operations; - inode->i_fop = &isofs_dir_operations; - } else if (S_ISLNK(inode->i_mode)) { - inode->i_op = &page_symlink_inode_operations; - inode->i_data.a_ops = &isofs_symlink_aops; - } else - /* XXX - parse_rock_ridge_inode() had already set i_rdev. */ - init_special_inode(inode, inode->i_mode, - kdev_t_to_nr(inode->i_rdev)); - } + case isofs_file_compressed: + inode->i_data.a_ops = &zisofs_aops; + break; +#endif + default: + inode->i_data.a_ops = &isofs_aops; + break; + } + } else if (S_ISDIR(inode->i_mode)) { + inode->i_op = &isofs_dir_inode_operations; + inode->i_fop = &isofs_dir_operations; + } else if (S_ISLNK(inode->i_mode)) { + inode->i_op = &page_symlink_inode_operations; + inode->i_data.a_ops = &isofs_symlink_aops; + } else + /* XXX - parse_rock_ridge_inode() had already set i_rdev. */ + init_special_inode(inode, inode->i_mode, + kdev_t_to_nr(inode->i_rdev)); out: if (tmpde) kfree(tmpde); diff -urN linux-2.4.28-bk3/include/asm-mips/au1000.h linux-2.4.28-bk4/include/asm-mips/au1000.h --- linux-2.4.28-bk3/include/asm-mips/au1000.h 2004-02-18 05:36:32.000000000 -0800 +++ linux-2.4.28-bk4/include/asm-mips/au1000.h 2004-11-23 02:49:27.571399294 -0800 @@ -161,6 +161,7 @@ #endif /* SDRAM Controller */ +#if defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1100) #define MEM_SDMODE0 0xB4000000 #define MEM_SDMODE1 0xB4000004 #define MEM_SDMODE2 0xB4000008 @@ -179,6 +180,7 @@ #define MEM_SDSLEEP 0xB4000030 #define MEM_SDSMCKE 0xB4000034 +#endif /* Static Bus Controller */ #define MEM_STCFG0 0xB4001000 @@ -197,6 +199,15 @@ #define MEM_STTIME3 0xB4001034 #define MEM_STADDR3 0xB4001038 +#if defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200) +#define MEM_STNDCTL 0xB4001100 +#define MEM_STSTAT 0xB4001104 + +#define MEM_STNAND_CMD (0x0) +#define MEM_STNAND_ADDR (0x4) +#define MEM_STNAND_DATA (0x20) +#endif + /* Interrupt Controller 0 */ #define IC0_CFG0RD 0xB0400040 #define IC0_CFG0SET 0xB0400040 @@ -283,21 +294,14 @@ #define INTC_INT_HIGH_AND_LOW_LEVEL 0x7 /* Interrupt Numbers */ +/* Au1000 */ +#ifdef CONFIG_SOC_AU1000 #define AU1000_UART0_INT 0 #define AU1000_UART1_INT 1 /* au1000 */ #define AU1000_UART2_INT 2 /* au1000 */ - -#define AU1000_PCI_INTA 1 /* au1500 */ -#define AU1000_PCI_INTB 2 /* au1500 */ - #define AU1000_UART3_INT 3 - #define AU1000_SSI0_INT 4 /* au1000 */ #define AU1000_SSI1_INT 5 /* au1000 */ - -#define AU1000_PCI_INTC 4 /* au1500 */ -#define AU1000_PCI_INTD 5 /* au1500 */ - #define AU1000_DMA_INT_BASE 6 #define AU1000_TOY_INT 14 #define AU1000_TOY_MATCH0_INT 15 @@ -315,11 +319,8 @@ #define AU1000_ACSYNC_INT 27 #define AU1000_MAC0_DMA_INT 28 #define AU1000_MAC1_DMA_INT 29 -#define AU1000_ETH0_IRQ AU1000_MAC0_DMA_INT -#define AU1000_ETH1_IRQ AU1000_MAC1_DMA_INT #define AU1000_I2S_UO_INT 30 /* au1000 */ #define AU1000_AC97C_INT 31 -#define AU1000_LAST_INTC0_INT AU1000_AC97C_INT #define AU1000_GPIO_0 32 #define AU1000_GPIO_1 33 #define AU1000_GPIO_2 34 @@ -336,8 +337,6 @@ #define AU1000_GPIO_13 45 #define AU1000_GPIO_14 46 #define AU1000_GPIO_15 47 - -/* Au1000 only */ #define AU1000_GPIO_16 48 #define AU1000_GPIO_17 49 #define AU1000_GPIO_18 50 @@ -355,7 +354,62 @@ #define AU1000_GPIO_30 62 #define AU1000_GPIO_31 63 -/* Au1500 only */ +#define UART0_ADDR 0xB1100000 +#define UART1_ADDR 0xB1200000 +#define UART2_ADDR 0xB1300000 +#define UART3_ADDR 0xB1400000 + +#define USB_OHCI_BASE 0x10100000 // phys addr for ioremap +#define USB_HOST_CONFIG 0xB017fffc + +#define AU1000_ETH0_BASE 0xB0500000 +#define AU1000_ETH1_BASE 0xB0510000 +#define AU1000_MAC0_ENABLE 0xB0520000 +#define AU1000_MAC1_ENABLE 0xB0520004 +#define NUM_ETH_INTERFACES 2 +#endif // CONFIG_SOC_AU1000 + +/* Au1500 */ +#ifdef CONFIG_SOC_AU1500 +#define AU1500_UART0_INT 0 +#define AU1000_PCI_INTA 1 /* au1500 */ +#define AU1000_PCI_INTB 2 /* au1500 */ +#define AU1500_UART3_INT 3 +#define AU1000_PCI_INTC 4 /* au1500 */ +#define AU1000_PCI_INTD 5 /* au1500 */ +#define AU1000_DMA_INT_BASE 6 +#define AU1000_TOY_INT 14 +#define AU1000_TOY_MATCH0_INT 15 +#define AU1000_TOY_MATCH1_INT 16 +#define AU1000_TOY_MATCH2_INT 17 +#define AU1000_RTC_INT 18 +#define AU1000_RTC_MATCH0_INT 19 +#define AU1000_RTC_MATCH1_INT 20 +#define AU1000_RTC_MATCH2_INT 21 +#define AU1500_PCI_ERR_INT 22 +#define AU1000_USB_DEV_REQ_INT 24 +#define AU1000_USB_DEV_SUS_INT 25 +#define AU1000_USB_HOST_INT 26 +#define AU1000_ACSYNC_INT 27 +#define AU1500_MAC0_DMA_INT 28 +#define AU1500_MAC1_DMA_INT 29 +#define AU1000_AC97C_INT 31 +#define AU1000_GPIO_0 32 +#define AU1000_GPIO_1 33 +#define AU1000_GPIO_2 34 +#define AU1000_GPIO_3 35 +#define AU1000_GPIO_4 36 +#define AU1000_GPIO_5 37 +#define AU1000_GPIO_6 38 +#define AU1000_GPIO_7 39 +#define AU1000_GPIO_8 40 +#define AU1000_GPIO_9 41 +#define AU1000_GPIO_10 42 +#define AU1000_GPIO_11 43 +#define AU1000_GPIO_12 44 +#define AU1000_GPIO_13 45 +#define AU1000_GPIO_14 46 +#define AU1000_GPIO_15 47 #define AU1500_GPIO_200 48 #define AU1500_GPIO_201 49 #define AU1500_GPIO_202 50 @@ -373,14 +427,79 @@ #define AU1500_GPIO_207 62 #define AU1500_GPIO_208_215 63 -#define AU1000_MAX_INTR 63 +#define UART0_ADDR 0xB1100000 +#define UART3_ADDR 0xB1400000 + +#define USB_OHCI_BASE 0x10100000 // phys addr for ioremap +#define USB_HOST_CONFIG 0xB017fffc + +#define AU1500_ETH0_BASE 0xB1500000 +#define AU1500_ETH1_BASE 0xB1510000 +#define AU1500_MAC0_ENABLE 0xB1520000 +#define AU1500_MAC1_ENABLE 0xB1520004 +#define NUM_ETH_INTERFACES 2 +#endif // CONFIG_SOC_AU1500 -#define AU1100_SD 2 +/* Au1100 */ +#ifdef CONFIG_SOC_AU1100 +#define AU1100_UART0_INT 0 +#define AU1100_UART1_INT 1 +#define AU1100_SD_INT 2 +#define AU1100_UART3_INT 3 +#define AU1000_SSI0_INT 4 +#define AU1000_SSI1_INT 5 +#define AU1000_DMA_INT_BASE 6 +#define AU1000_TOY_INT 14 +#define AU1000_TOY_MATCH0_INT 15 +#define AU1000_TOY_MATCH1_INT 16 +#define AU1000_TOY_MATCH2_INT 17 +#define AU1000_RTC_INT 18 +#define AU1000_RTC_MATCH0_INT 19 +#define AU1000_RTC_MATCH1_INT 20 +#define AU1000_RTC_MATCH2_INT 21 +#define AU1000_IRDA_TX_INT 22 +#define AU1000_IRDA_RX_INT 23 +#define AU1000_USB_DEV_REQ_INT 24 +#define AU1000_USB_DEV_SUS_INT 25 +#define AU1000_USB_HOST_INT 26 +#define AU1000_ACSYNC_INT 27 +#define AU1100_MAC0_DMA_INT 28 #define AU1100_GPIO_208_215 29 -// Seperate defines for AU1550 SOC -#define AU1550_UART0_INT AU1000_UART0_INT -#define AU1550_PCI_INTA AU1000_PCI_INTA -#define AU1550_PCI_INTB AU1000_PCI_INTB +#define AU1100_LCD_INT 30 +#define AU1000_AC97C_INT 31 +#define AU1000_GPIO_0 32 +#define AU1000_GPIO_1 33 +#define AU1000_GPIO_2 34 +#define AU1000_GPIO_3 35 +#define AU1000_GPIO_4 36 +#define AU1000_GPIO_5 37 +#define AU1000_GPIO_6 38 +#define AU1000_GPIO_7 39 +#define AU1000_GPIO_8 40 +#define AU1000_GPIO_9 41 +#define AU1000_GPIO_10 42 +#define AU1000_GPIO_11 43 +#define AU1000_GPIO_12 44 +#define AU1000_GPIO_13 45 +#define AU1000_GPIO_14 46 +#define AU1000_GPIO_15 47 + +#define UART0_ADDR 0xB1100000 +#define UART1_ADDR 0xB1200000 +#define UART3_ADDR 0xB1400000 + +#define USB_OHCI_BASE 0x10100000 // phys addr for ioremap +#define USB_HOST_CONFIG 0xB017fffc + +#define AU1100_ETH0_BASE 0xB0500000 +#define AU1100_MAC0_ENABLE 0xB0520000 +#define NUM_ETH_INTERFACES 1 +#endif // CONFIG_SOC_AU1100 + +#ifdef CONFIG_SOC_AU1550 +#define AU1550_UART0_INT 0 +#define AU1550_PCI_INTA 1 +#define AU1550_PCI_INTB 2 #define AU1550_DDMA_INT 3 #define AU1550_CRYPTO_INT 4 #define AU1550_PCI_INTC 5 @@ -404,11 +523,27 @@ #define AU1550_USB_DEV_REQ_INT 24 #define AU1550_USB_DEV_SUS_INT 25 #define AU1550_USB_HOST_INT 26 +#define AU1000_USB_DEV_REQ_INT AU1550_USB_DEV_REQ_INT +#define AU1000_USB_DEV_SUS_INT AU1550_USB_DEV_SUS_INT +#define AU1000_USB_HOST_INT AU1550_USB_HOST_INT #define AU1550_MAC0_DMA_INT 27 #define AU1550_MAC1_DMA_INT 28 -#define AU1550_ETH0_IRQ AU1550_MAC0_DMA_INT -#define AU1550_ETH1_IRQ AU1550_MAC1_DMA_INT - +#define AU1000_GPIO_0 32 +#define AU1000_GPIO_1 33 +#define AU1000_GPIO_2 34 +#define AU1000_GPIO_3 35 +#define AU1000_GPIO_4 36 +#define AU1000_GPIO_5 37 +#define AU1000_GPIO_6 38 +#define AU1000_GPIO_7 39 +#define AU1000_GPIO_8 40 +#define AU1000_GPIO_9 41 +#define AU1000_GPIO_10 42 +#define AU1000_GPIO_11 43 +#define AU1000_GPIO_12 44 +#define AU1000_GPIO_13 45 +#define AU1000_GPIO_14 46 +#define AU1000_GPIO_15 47 #define AU1550_GPIO_200 48 #define AU1500_GPIO_201_205 49 // Logical or of GPIO201:205 #define AU1500_GPIO_16 50 @@ -426,7 +561,101 @@ #define AU1500_GPIO_207 62 #define AU1500_GPIO_208_218 63 // Logical or of GPIO208:218 -// REDEFINE SECONDARY GPIO BLOCK INTO IC1 CONTROLLER HERE +#define UART0_ADDR 0xB1100000 +#define UART1_ADDR 0xB1200000 +#define UART3_ADDR 0xB1400000 + +#define USB_OHCI_BASE 0x14020000 // phys addr for ioremap +#define USB_HOST_CONFIG 0xB4027ffc + +#define AU1550_ETH0_BASE 0xB0500000 +#define AU1550_ETH1_BASE 0xB0510000 +#define AU1550_MAC0_ENABLE 0xB0520000 +#define AU1550_MAC1_ENABLE 0xB0520004 +#define NUM_ETH_INTERFACES 2 +#endif // CONFIG_SOC_AU1550 + +#ifdef CONFIG_SOC_AU1200 +#define AU1200_UART0_INT 0 +#define AU1200_SWT_INT 1 +#define AU1200_SD_INT 2 +#define AU1200_DDMA_INT 3 +#define AU1200_MAE_BE_INT 4 +#define AU1200_GPIO_200 5 +#define AU1200_GPIO_201 6 +#define AU1200_GPIO_202 7 +#define AU1200_UART1_INT 8 +#define AU1200_MAE_FE_INT 9 +#define AU1200_PSC0_INT 10 +#define AU1200_PSC1_INT 11 +#define AU1200_AES_INT 12 +#define AU1200_CAMERA_INT 13 +#define AU1200_TOY_INT 14 +#define AU1200_TOY_MATCH0_INT 15 +#define AU1200_TOY_MATCH1_INT 16 +#define AU1200_TOY_MATCH2_INT 17 +#define AU1200_RTC_INT 18 +#define AU1200_RTC_MATCH0_INT 19 +#define AU1200_RTC_MATCH1_INT 20 +#define AU1200_RTC_MATCH2_INT 21 +#define AU1200_NAND_INT 23 +#define AU1200_GPIO_204 24 +#define AU1200_GPIO_205 25 +#define AU1200_GPIO_206 26 +#define AU1200_GPIO_207 27 +#define AU1200_GPIO_208_215 28 // Logical OR of 208:215 +#define AU1200_USB_INT 29 +#define AU1200_LCD_INT 30 +#define AU1200_MAE_BOTH_INT 31 +#define AU1000_GPIO_0 32 +#define AU1000_GPIO_1 33 +#define AU1000_GPIO_2 34 +#define AU1000_GPIO_3 35 +#define AU1000_GPIO_4 36 +#define AU1000_GPIO_5 37 +#define AU1000_GPIO_6 38 +#define AU1000_GPIO_7 39 +#define AU1000_GPIO_8 40 +#define AU1000_GPIO_9 41 +#define AU1000_GPIO_10 42 +#define AU1000_GPIO_11 43 +#define AU1000_GPIO_12 44 +#define AU1000_GPIO_13 45 +#define AU1000_GPIO_14 46 +#define AU1000_GPIO_15 47 +#define AU1000_GPIO_16 48 +#define AU1000_GPIO_17 49 +#define AU1000_GPIO_18 50 +#define AU1000_GPIO_19 51 +#define AU1000_GPIO_20 52 +#define AU1000_GPIO_21 53 +#define AU1000_GPIO_22 54 +#define AU1000_GPIO_23 55 +#define AU1000_GPIO_24 56 +#define AU1000_GPIO_25 57 +#define AU1000_GPIO_26 58 +#define AU1000_GPIO_27 59 +#define AU1000_GPIO_28 60 +#define AU1000_GPIO_29 61 +#define AU1000_GPIO_30 62 +#define AU1000_GPIO_31 63 + +#define UART0_ADDR 0xB1100000 +#define UART1_ADDR 0xB1200000 + +#define USB_OHCI_BASE 0x14020000 // phys addr for ioremap +#define USB_HOST_CONFIG 0xB4027ffc + +// these are here for prototyping on au1550 (do not exist on au1200) +#define AU1200_ETH0_BASE 0xB0500000 +#define AU1200_ETH1_BASE 0xB0510000 +#define AU1200_MAC0_ENABLE 0xB0520000 +#define AU1200_MAC1_ENABLE 0xB0520004 +#define NUM_ETH_INTERFACES 2 +#endif // CONFIG_SOC_AU1200 + +#define AU1000_LAST_INTC0_INT 31 +#define AU1000_MAX_INTR 63 /* Programmable Counters 0 and 1 */ @@ -500,16 +729,7 @@ #define I2S_CONTROL_CE (1<<0) /* USB Host Controller */ -// We pass USB_OHCI_BASE to ioremap, so it needs to be a physical address -#if defined( CONFIG_SOC_AU1550 ) -#define USB_OHCI_BASE 0x14020000 -#define USB_OHCI_LEN 0x00100000 -#define USB_HOST_CONFIG 0xB4027ffc -#else -#define USB_OHCI_BASE 0x10100000 #define USB_OHCI_LEN 0x00100000 -#define USB_HOST_CONFIG 0xB017fffc -#endif /* USB Device Controller */ #define USBD_EP0RD 0xB0200000 @@ -554,13 +774,6 @@ #define USBDEV_CE (1<<0) /* Ethernet Controllers */ -#define AU1000_ETH0_BASE 0xB0500000 -#define AU1000_ETH1_BASE 0xB0510000 -#define AU1500_ETH0_BASE 0xB1500000 -#define AU1500_ETH1_BASE 0xB1510000 -#define AU1100_ETH0_BASE 0xB0500000 -#define AU1550_ETH0_BASE 0xB0500000 -#define AU1550_ETH1_BASE 0xB0510000 /* 4 byte offsets from AU1000_ETH_BASE */ #define MAC_CONTROL 0x0 @@ -605,11 +818,6 @@ #define MAC_VLAN2_TAG 0x24 /* Ethernet Controller Enable */ -#define AU1000_MAC0_ENABLE 0xB0520000 -#define AU1000_MAC1_ENABLE 0xB0520004 -#define AU1500_MAC0_ENABLE 0xB1520000 -#define AU1500_MAC1_ENABLE 0xB1520004 -#define AU1100_MAC0_ENABLE 0xB0520000 #define MAC_EN_CLOCK_ENABLE (1<<0) #define MAC_EN_RESET0 (1<<1) @@ -693,10 +901,6 @@ /* UARTS 0-3 */ -#define UART0_ADDR 0xB1100000 -#define UART1_ADDR 0xB1200000 -#define UART2_ADDR 0xB1300000 -#define UART3_ADDR 0xB1400000 #define UART_BASE UART0_ADDR #define UART_DEBUG_BASE UART3_ADDR @@ -951,6 +1155,22 @@ #define SYS_PF_CS (1<<16) /* EXTCLK0/32khz to gpio2 */ #define SYS_PF_EX0 (1<<9) /* gpio2/clock */ +/* Au1550 Only. Redefines lots of pins */ + #define SYS_PF_PSC2_MASK (7 << 17) + #define SYS_PF_PSC2_AC97 (0) + #define SYS_PF_PSC2_SPI (0) + #define SYS_PF_PSC2_I2S (1 << 17) + #define SYS_PF_PSC2_SMBUS (3 << 17) + #define SYS_PF_PSC2_GPIO (7 << 17) + #define SYS_PF_PSC3_MASK (7 << 20) + #define SYS_PF_PSC3_AC97 (0) + #define SYS_PF_PSC3_SPI (0) + #define SYS_PF_PSC3_I2S (1 << 20) + #define SYS_PF_PSC3_SMBUS (3 << 20) + #define SYS_PF_PSC3_GPIO (7 << 20) + #define SYS_PF_PSC1_S1 (1 << 1) + #define SYS_PF_MUST_BE_SET ((1 << 5) | (1 << 2)) + #define SYS_TRIOUTRD 0xB1900100 #define SYS_TRIOUTCLR 0xB1900100 #define SYS_OUTPUTRD 0xB1900108 @@ -959,7 +1179,7 @@ #define SYS_PINSTATERD 0xB1900110 #define SYS_PININPUTEN 0xB1900110 -/* GPIO2, Au1500 only */ +/* GPIO2, Au1500, Au1550 only */ #define GPIO2_BASE 0xB1700000 #define GPIO2_DIR (GPIO2_BASE + 0) #define GPIO2_OUTPUT (GPIO2_BASE + 8) @@ -1071,6 +1291,14 @@ #define AC97C_RS (1<<1) #define AC97C_CE (1<<0) + +/* Secure Digital (SD) Controller */ +#define SD0_XMIT_FIFO 0xB0600000 +#define SD0_RECV_FIFO 0xB0600004 +#define SD1_XMIT_FIFO 0xB0680000 +#define SD1_RECV_FIFO 0xB0680004 + + #if defined (CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550) /* Au1500 PCI Controller */ #define Au1500_CFG_BASE 0xB4005000 // virtual, kseg0 addr @@ -1119,6 +1347,20 @@ #define IOMEM_RESOURCE_START 0x10000000 #define IOMEM_RESOURCE_END 0xffffffff + /* + * Borrowed from the PPC arch: + * The following macro is used to lookup irqs in a standard table + * format for those PPC systems that do not already have PCI + * interrupts properly routed. + */ + /* FIXME - double check this from asm-ppc/pci-bridge.h */ +#define PCI_IRQ_TABLE_LOOKUP \ + ({ long _ctl_ = -1; \ + if (idsel >= min_idsel && idsel <= max_idsel && pin <= irqs_per_slot) \ + _ctl_ = pci_irq_table[idsel - min_idsel][pin-1]; \ + _ctl_; }) + + #else /* Au1000 and Au1100 */ /* don't allow any legacy ports probing */ @@ -1146,10 +1388,19 @@ #endif -#if defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550) -#define NUM_ETH_INTERFACES 2 -#elif defined(CONFIG_SOC_AU1100) -#define NUM_ETH_INTERFACES 1 -#endif +/* Processor information base on prid. + * Copied from PowerPC. + */ +struct cpu_spec { + /* CPU is matched via (PRID & prid_mask) == prid_value */ + unsigned int prid_mask; + unsigned int prid_value; + + char *cpu_name; + unsigned char cpu_od; /* Set Config[OD] */ + unsigned char cpu_bclk; /* Enable BCLK switching */ +}; +extern struct cpu_spec cpu_specs[]; +extern struct cpu_spec *cur_cpu_spec[]; #endif diff -urN linux-2.4.28-bk3/include/asm-mips/au1000_dma.h linux-2.4.28-bk4/include/asm-mips/au1000_dma.h --- linux-2.4.28-bk3/include/asm-mips/au1000_dma.h 2003-08-25 04:44:43.000000000 -0700 +++ linux-2.4.28-bk4/include/asm-mips/au1000_dma.h 2004-11-23 02:49:27.572399335 -0800 @@ -51,6 +51,7 @@ #define DMA_DAH_MASK (0x0f << 20) #define DMA_DID_BIT 16 #define DMA_DID_MASK (0x0f << DMA_DID_BIT) +#define DMA_DS (1<<15) #define DMA_BE (1<<13) #define DMA_DR (1<<12) #define DMA_TS8 (1<<11) @@ -100,6 +101,15 @@ DMA_NUM_DEV }; +/* DMA Device ID's for 2nd bank (AU1100) follow */ +enum { + DMA_ID_SD0_TX = 0, + DMA_ID_SD0_RX, + DMA_ID_SD1_TX, + DMA_ID_SD1_RX, + DMA_NUM_DEV_BANK2 +}; + struct dma_chan { int dev_id; // this channel is allocated if >=0, free otherwise unsigned int io; @@ -127,7 +137,7 @@ static __inline__ struct dma_chan *get_dma_chan(unsigned int dmanr) { - if (dmanr > NUM_AU1000_DMA_CHANNELS + if (dmanr >= NUM_AU1000_DMA_CHANNELS || au1000_dma_table[dmanr].dev_id < 0) return NULL; return &au1000_dma_table[dmanr]; @@ -206,8 +216,8 @@ halt_dma(dmanr); - // now we can disable the buffers - au_writel(~DMA_GO, chan->io + DMA_MODE_CLEAR); + // now we can disable the buffers + au_writel(~DMA_GO, chan->io + DMA_MODE_CLEAR); } static __inline__ int dma_halted(unsigned int dmanr) @@ -287,6 +297,9 @@ if (!chan) return; + if (chan->mode & DMA_DS) /* second bank of device ids */ + return; + if (chan->dev_id != DMA_ID_GP04 && chan->dev_id != DMA_ID_GP05) return; @@ -431,3 +444,4 @@ } #endif /* __ASM_AU1000_DMA_H */ + diff -urN linux-2.4.28-bk3/include/asm-mips/au1000_pcmcia.h linux-2.4.28-bk4/include/asm-mips/au1000_pcmcia.h --- linux-2.4.28-bk3/include/asm-mips/au1000_pcmcia.h 2003-08-25 04:44:43.000000000 -0700 +++ linux-2.4.28-bk4/include/asm-mips/au1000_pcmcia.h 2004-11-23 02:49:27.573399376 -0800 @@ -44,7 +44,7 @@ #define AU1X_SOCK1_IO 0xF08000000 #define AU1X_SOCK1_PHYS_ATTR 0xF48000000 #define AU1X_SOCK1_PHYS_MEM 0xF88000000 -#elif defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) || defined(CONFIG_MIPS_DB1500) +#elif defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) || defined(CONFIG_MIPS_DB1500) || defined(CONFIG_MIPS_PB1550) || defined(CONFIG_MIPS_DB1550) #define AU1X_SOCK1_IO 0xF04000000 #define AU1X_SOCK1_PHYS_ATTR 0xF44000000 #define AU1X_SOCK1_PHYS_MEM 0xF84000000 @@ -100,14 +100,5 @@ int (*configure_socket)(const struct pcmcia_configure *); }; -#if defined(CONFIG_MIPS_PB1000) || defined(CONFIG_MIPS_PB1100) || defined(CONFIG_MIPS_PB1500) -extern struct pcmcia_low_level pb1x00_pcmcia_ops; -#elif defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) || defined(CONFIG_MIPS_DB1500) -extern struct pcmcia_low_level db1x00_pcmcia_ops; -#elif defined(CONFIG_MIPS_XXS1500) -extern struct pcmcia_low_level xxs1500_pcmcia_ops; -#else -error unknown Au1000 board -#endif - +extern struct pcmcia_low_level au1x00_pcmcia_ops; #endif /* __ASM_AU1000_PCMCIA_H */ diff -urN linux-2.4.28-bk3/include/asm-mips/au1100_mmc.h linux-2.4.28-bk4/include/asm-mips/au1100_mmc.h --- linux-2.4.28-bk3/include/asm-mips/au1100_mmc.h 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.28-bk4/include/asm-mips/au1100_mmc.h 2004-11-23 02:49:27.573399376 -0800 @@ -0,0 +1,205 @@ +/* + * BRIEF MODULE DESCRIPTION + * Defines for using the MMC/SD controllers on the + * Alchemy Au1100 mips processor. + * + * Copyright (c) 2003 Embedded Edge, LLC. + * Author: Embedded Edge, LLC. + * dan@embeddededge.com or tim@embeddededge.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + * + */ +/* + * AU1100 MMC/SD definitions. + * + * From "AMD Alchemy Solutions Au1100 Processor Data Book - Preliminary" + * June, 2003 + */ + +#ifndef __ASM_AU1100_MMC_H +#define __ASM_AU1100_MMC_H + + +#define NUM_AU1100_MMC_CONTROLLERS 2 + + +#define AU1100_SD_IRQ 2 + + +#define SD0_BASE 0xB0600000 +#define SD1_BASE 0xB0680000 + + +/* + * Register offsets. + */ +#define SD_TXPORT (0x0000) +#define SD_RXPORT (0x0004) +#define SD_CONFIG (0x0008) +#define SD_ENABLE (0x000C) +#define SD_CONFIG2 (0x0010) +#define SD_BLKSIZE (0x0014) +#define SD_STATUS (0x0018) +#define SD_DEBUG (0x001C) +#define SD_CMD (0x0020) +#define SD_CMDARG (0x0024) +#define SD_RESP3 (0x0028) +#define SD_RESP2 (0x002C) +#define SD_RESP1 (0x0030) +#define SD_RESP0 (0x0034) +#define SD_TIMEOUT (0x0038) + + +/* + * SD_TXPORT bit definitions. + */ +#define SD_TXPORT_TXD (0x000000ff) + + +/* + * SD_RXPORT bit definitions. + */ +#define SD_RXPORT_RXD (0x000000ff) + + +/* + * SD_CONFIG bit definitions. + */ +#define SD_CONFIG_DIV (0x000001ff) +#define SD_CONFIG_DE (0x00000200) +#define SD_CONFIG_NE (0x00000400) +#define SD_CONFIG_TU (0x00000800) +#define SD_CONFIG_TO (0x00001000) +#define SD_CONFIG_RU (0x00002000) +#define SD_CONFIG_RO (0x00004000) +#define SD_CONFIG_I (0x00008000) +#define SD_CONFIG_CR (0x00010000) +#define SD_CONFIG_RAT (0x00020000) +#define SD_CONFIG_DD (0x00040000) +#define SD_CONFIG_DT (0x00080000) +#define SD_CONFIG_SC (0x00100000) +#define SD_CONFIG_RC (0x00200000) +#define SD_CONFIG_WC (0x00400000) +#define SD_CONFIG_xxx (0x00800000) +#define SD_CONFIG_TH (0x01000000) +#define SD_CONFIG_TE (0x02000000) +#define SD_CONFIG_TA (0x04000000) +#define SD_CONFIG_RH (0x08000000) +#define SD_CONFIG_RA (0x10000000) +#define SD_CONFIG_RF (0x20000000) +#define SD_CONFIG_CD (0x40000000) +#define SD_CONFIG_SI (0x80000000) + + +/* + * SD_ENABLE bit definitions. + */ +#define SD_ENABLE_CE (0x00000001) +#define SD_ENABLE_R (0x00000002) + + +/* + * SD_CONFIG2 bit definitions. + */ +#define SD_CONFIG2_EN (0x00000001) +#define SD_CONFIG2_FF (0x00000002) +#define SD_CONFIG2_xx1 (0x00000004) +#define SD_CONFIG2_DF (0x00000008) +#define SD_CONFIG2_DC (0x00000010) +#define SD_CONFIG2_xx2 (0x000000e0) +#define SD_CONFIG2_WB (0x00000100) +#define SD_CONFIG2_RW (0x00000200) + + +/* + * SD_BLKSIZE bit definitions. + */ +#define SD_BLKSIZE_BS (0x000007ff) +#define SD_BLKSIZE_BS_SHIFT (0) +#define SD_BLKSIZE_BC (0x01ff0000) +#define SD_BLKSIZE_BC_SHIFT (16) + + +/* + * SD_STATUS bit definitions. + */ +#define SD_STATUS_DCRCW (0x00000007) +#define SD_STATUS_xx1 (0x00000008) +#define SD_STATUS_CB (0x00000010) +#define SD_STATUS_DB (0x00000020) +#define SD_STATUS_CF (0x00000040) +#define SD_STATUS_D3 (0x00000080) +#define SD_STATUS_xx2 (0x00000300) +#define SD_STATUS_NE (0x00000400) +#define SD_STATUS_TU (0x00000800) +#define SD_STATUS_TO (0x00001000) +#define SD_STATUS_RU (0x00002000) +#define SD_STATUS_RO (0x00004000) +#define SD_STATUS_I (0x00008000) +#define SD_STATUS_CR (0x00010000) +#define SD_STATUS_RAT (0x00020000) +#define SD_STATUS_DD (0x00040000) +#define SD_STATUS_DT (0x00080000) +#define SD_STATUS_SC (0x00100000) +#define SD_STATUS_RC (0x00200000) +#define SD_STATUS_WC (0x00400000) +#define SD_STATUS_xx3 (0x00800000) +#define SD_STATUS_TH (0x01000000) +#define SD_STATUS_TE (0x02000000) +#define SD_STATUS_TA (0x04000000) +#define SD_STATUS_RH (0x08000000) +#define SD_STATUS_RA (0x10000000) +#define SD_STATUS_RF (0x20000000) +#define SD_STATUS_CD (0x40000000) +#define SD_STATUS_SI (0x80000000) + + +/* + * SD_CMD bit definitions. + */ +#define SD_CMD_GO (0x00000001) +#define SD_CMD_RY (0x00000002) +#define SD_CMD_xx1 (0x0000000c) +#define SD_CMD_CT_MASK (0x000000f0) +#define SD_CMD_CT_0 (0x00000000) +#define SD_CMD_CT_1 (0x00000010) +#define SD_CMD_CT_2 (0x00000020) +#define SD_CMD_CT_3 (0x00000030) +#define SD_CMD_CT_4 (0x00000040) +#define SD_CMD_CT_5 (0x00000050) +#define SD_CMD_CT_6 (0x00000060) +#define SD_CMD_CT_7 (0x00000070) +#define SD_CMD_CI (0x0000ff00) +#define SD_CMD_CI_SHIFT (8) +#define SD_CMD_RT_MASK (0x00ff0000) +#define SD_CMD_RT_0 (0x00000000) +#define SD_CMD_RT_1 (0x00010000) +#define SD_CMD_RT_2 (0x00020000) +#define SD_CMD_RT_3 (0x00030000) +#define SD_CMD_RT_4 (0x00040000) +#define SD_CMD_RT_5 (0x00050000) +#define SD_CMD_RT_6 (0x00060000) +#define SD_CMD_RT_1B (0x00810000) + + +#endif /* __ASM_AU1100_MMC_H */ + diff -urN linux-2.4.28-bk3/include/asm-mips/au1550_spi.h linux-2.4.28-bk4/include/asm-mips/au1550_spi.h --- linux-2.4.28-bk3/include/asm-mips/au1550_spi.h 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.28-bk4/include/asm-mips/au1550_spi.h 2004-11-23 02:49:27.574399417 -0800 @@ -0,0 +1,38 @@ +/* + * API to Alchemy Au1550 SPI device. + * + * Copyright 2004 Embedded Edge, LLC. + * dan@embeddededge.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef __AU1550_SPI_H +#define __AU1550_SPI_H + +#include + +#define AU1550SPI_IOC_MAGIC 'S' + +#define AU1550SPI_SET_BAUD _IOW(AU1550SPI_IOC_MAGIC, 0, int *) +#define AU1550SPI_WORD_LEN _IOW(AU1550SPI_IOC_MAGIC, 1, int) + +#endif /* __AU1000_SPI_H */ diff -urN linux-2.4.28-bk3/include/asm-mips/au1xxx_dbdma.h linux-2.4.28-bk4/include/asm-mips/au1xxx_dbdma.h --- linux-2.4.28-bk3/include/asm-mips/au1xxx_dbdma.h 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.28-bk4/include/asm-mips/au1xxx_dbdma.h 2004-11-23 02:49:27.575399457 -0800 @@ -0,0 +1,318 @@ +/* + * + * BRIEF MODULE DESCRIPTION + * Include file for Alchemy Semiconductor's Au1550 Descriptor + * Based DMA Controller. + * + * Copyright 2004 Embedded Edge, LLC + * dan@embeddededge.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +/* Specifics for the Au1xxx Descriptor-Based DMA Controllers, first + * seen in the AU1550 part. + */ +#ifndef _AU1000_DBDMA_H_ +#define _AU1000_DBDMA_H_ + +#ifndef _LANGUAGE_ASSEMBLY + +/* The DMA base addresses. + * The Channels are every 256 bytes (0x0100) from the channel 0 base. + * Interrupt status/enable is bits 15:0 for channels 15 to zero. + */ +#define DDMA_GLOBAL_BASE 0xb4003000 +#define DDMA_CHANNEL_BASE 0xb4002000 + +typedef struct dbdma_global { + u32 ddma_config; + u32 ddma_intstat; + u32 ddma_throttle; + u32 ddma_inten; +} dbdma_global_t; + +/* General Configuration. +*/ +#define DDMA_CONFIG_AF (1 << 2) +#define DDMA_CONFIG_AH (1 << 1) +#define DDMA_CONFIG_AL (1 << 0) + +#define DDMA_THROTTLE_EN (1 << 31) + +/* The structure of a DMA Channel. +*/ +typedef struct au1xxx_dma_channel { + u32 ddma_cfg; /* See below */ + u32 ddma_desptr; /* 32-byte aligned pointer to descriptor */ + u32 ddma_statptr; /* word aligned pointer to status word */ + u32 ddma_dbell; /* A write activates channel operation */ + u32 ddma_irq; /* If bit 0 set, interrupt pending */ + u32 ddma_stat; /* See below */ + u32 ddma_bytecnt; /* Byte count, valid only when chan idle */ + /* Remainder, up to the 256 byte boundary, is reserved. + */ +} au1x_dma_chan_t; + +#define DDMA_CFG_SED (1 << 9) /* source DMA level/edge detect */ +#define DDMA_CFG_SP (1 << 8) /* source DMA polarity */ +#define DDMA_CFG_DED (1 << 7) /* destination DMA level/edge detect */ +#define DDMA_CFG_DP (1 << 6) /* destination DMA polarity */ +#define DDMA_CFG_SYNC (1 << 5) /* Sync static bus controller */ +#define DDMA_CFG_PPR (1 << 4) /* PCI posted read/write control */ +#define DDMA_CFG_DFN (1 << 3) /* Descriptor fetch non-coherent */ +#define DDMA_CFG_SBE (1 << 2) /* Source big endian */ +#define DDMA_CFG_DBE (1 << 1) /* Destination big endian */ +#define DDMA_CFG_EN (1 << 0) /* Channel enable */ + +/* Always set when descriptor processing done, regardless of + * interrupt enable state. Reflected in global intstat, don't + * clear this until global intstat is read/used. + */ +#define DDMA_IRQ_IN (1 << 0) + +#define DDMA_STAT_DB (1 << 2) /* Doorbell pushed */ +#define DDMA_STAT_V (1 << 1) /* Descriptor valid */ +#define DDMA_STAT_H (1 << 0) /* Channel Halted */ + +/* "Standard" DDMA Descriptor. + * Must be 32-byte aligned. + */ +typedef struct au1xxx_ddma_desc { + u32 dscr_cmd0; /* See below */ + u32 dscr_cmd1; /* See below */ + u32 dscr_source0; /* source phys address */ + u32 dscr_source1; /* See below */ + u32 dscr_dest0; /* Destination address */ + u32 dscr_dest1; /* See below */ + u32 dscr_stat; /* completion status */ + u32 dscr_nxtptr; /* Next descriptor pointer (mostly) */ +} au1x_ddma_desc_t; + +#define DSCR_CMD0_V (1 << 31) /* Descriptor valid */ +#define DSCR_CMD0_MEM (1 << 30) /* mem-mem transfer */ +#define DSCR_CMD0_SID_MASK (0x1f << 25) /* Source ID */ +#define DSCR_CMD0_DID_MASK (0x1f << 20) /* Destination ID */ +#define DSCR_CMD0_SW_MASK (0x3 << 18) /* Source Width */ +#define DSCR_CMD0_DW_MASK (0x3 << 16) /* Destination Width */ +#define DSCR_CMD0_ARB (0x1 << 15) /* Set for Hi Pri */ +#define DSCR_CMD0_DT_MASK (0x3 << 13) /* Descriptor Type */ +#define DSCR_CMD0_SN (0x1 << 12) /* Source non-coherent */ +#define DSCR_CMD0_DN (0x1 << 11) /* Destination non-coherent */ +#define DSCR_CMD0_SM (0x1 << 10) /* Stride mode */ +#define DSCR_CMD0_IE (0x1 << 8) /* Interrupt Enable */ +#define DSCR_CMD0_SP (0x1 << 4) /* Status pointer select */ +#define DSCR_CMD0_CV (0x1 << 2) /* Clear Valid when done */ +#define DSCR_CMD0_ST_MASK (0x3 << 0) /* Status instruction */ + +/* Command 0 device IDs. +*/ +#ifdef CONFIG_SOC_AU1550 +#define DSCR_CMD0_UART0_TX 0 +#define DSCR_CMD0_UART0_RX 1 +#define DSCR_CMD0_UART3_TX 2 +#define DSCR_CMD0_UART3_RX 3 +#define DSCR_CMD0_DMA_REQ0 4 +#define DSCR_CMD0_DMA_REQ1 5 +#define DSCR_CMD0_DMA_REQ2 6 +#define DSCR_CMD0_DMA_REQ3 7 +#define DSCR_CMD0_USBDEV_RX0 8 +#define DSCR_CMD0_USBDEV_TX0 9 +#define DSCR_CMD0_USBDEV_TX1 10 +#define DSCR_CMD0_USBDEV_TX2 11 +#define DSCR_CMD0_USBDEV_RX3 12 +#define DSCR_CMD0_USBDEV_RX4 13 +#define DSCR_CMD0_PSC0_TX 14 +#define DSCR_CMD0_PSC0_RX 15 +#define DSCR_CMD0_PSC1_TX 16 +#define DSCR_CMD0_PSC1_RX 17 +#define DSCR_CMD0_PSC2_TX 18 +#define DSCR_CMD0_PSC2_RX 19 +#define DSCR_CMD0_PSC3_TX 20 +#define DSCR_CMD0_PSC3_RX 21 +#define DSCR_CMD0_PCI_WRITE 22 +#define DSCR_CMD0_NAND_FLASH 23 +#define DSCR_CMD0_MAC0_RX 24 +#define DSCR_CMD0_MAC0_TX 25 +#define DSCR_CMD0_MAC1_RX 26 +#define DSCR_CMD0_MAC1_TX 27 +#endif /* CONFIG_SOC_AU1550 */ + +#ifdef CONFIG_SOC_AU1200 +#define DSCR_CMD0_UART0_TX 0 +#define DSCR_CMD0_UART0_RX 1 +#define DSCR_CMD0_UART1_TX 2 +#define DSCR_CMD0_UART1_RX 3 +#define DSCR_CMD0_DMA_REQ0 4 +#define DSCR_CMD0_DMA_REQ1 5 +#define DSCR_CMD0_MAE_BE 6 +#define DSCR_CMD0_MAE_FE 7 +#define DSCR_CMD0_SDMS_TX0 8 +#define DSCR_CMD0_SDMS_RX0 9 +#define DSCR_CMD0_SDMS_TX1 10 +#define DSCR_CMD0_SDMS_RX1 11 +#define DSCR_CMD0_AES_TX 12 +#define DSCR_CMD0_AES_RX 13 +#define DSCR_CMD0_PSC0_TX 14 +#define DSCR_CMD0_PSC0_RX 15 +#define DSCR_CMD0_PSC1_TX 16 +#define DSCR_CMD0_PSC1_RX 17 +#define DSCR_CMD0_CIM_RXA 18 +#define DSCR_CMD0_CIM_RXB 19 +#define DSCR_CMD0_CIM_RXC 20 +#define DSCR_CMD0_MAE_BOTH 21 +#define DSCR_CMD0_LCD 22 +#define DSCR_CMD0_NAND_FLASH 23 +#define DSCR_CMD0_PSC0_SYNC 24 +#define DSCR_CMD0_PSC1_SYNC 25 +#define DSCR_CMD0_CIM_SYNC 26 +#endif /* CONFIG_SOC_AU1200 */ + +#define DSCR_CMD0_THROTTLE 30 +#define DSCR_CMD0_ALWAYS 31 +#define DSCR_NDEV_IDS 32 + +#define DSCR_CMD0_SID(x) (((x) & 0x1f) << 25) +#define DSCR_CMD0_DID(x) (((x) & 0x1f) << 20) + +/* Source/Destination transfer width. +*/ +#define DSCR_CMD0_BYTE 0 +#define DSCR_CMD0_HALFWORD 1 +#define DSCR_CMD0_WORD 2 + +#define DSCR_CMD0_SW(x) (((x) & 0x3) << 18) +#define DSCR_CMD0_DW(x) (((x) & 0x3) << 16) + +/* DDMA Descriptor Type. +*/ +#define DSCR_CMD0_STANDARD 0 +#define DSCR_CMD0_LITERAL 1 +#define DSCR_CMD0_CMP_BRANCH 2 + +#define DSCR_CMD0_DT(x) (((x) & 0x3) << 13) + +/* Status Instruction. +*/ +#define DSCR_CMD0_ST_NOCHANGE 0 /* Don't change */ +#define DSCR_CMD0_ST_CURRENT 1 /* Write current status */ +#define DSCR_CMD0_ST_CMD0 2 /* Write cmd0 with V cleared */ +#define DSCR_CMD0_ST_BYTECNT 3 /* Write remaining byte count */ + +#define DSCR_CMD0_ST(x) (((x) & 0x3) << 0) + +/* Descriptor Command 1 +*/ +#define DSCR_CMD1_SUPTR_MASK (0xf << 28) /* upper 4 bits of src addr */ +#define DSCR_CMD1_DUPTR_MASK (0xf << 24) /* upper 4 bits of dest addr */ +#define DSCR_CMD1_FL_MASK (0x3 << 22) /* Flag bits */ +#define DSCR_CMD1_BC_MASK (0x3fffff) /* Byte count */ + +/* Flag description. +*/ +#define DSCR_CMD1_FL_MEM_STRIDE0 0 +#define DSCR_CMD1_FL_MEM_STRIDE1 1 +#define DSCR_CMD1_FL_MEM_STRIDE2 2 + +#define DSCR_CMD1_FL(x) (((x) & 0x3) << 22) + +/* Source1, 1-dimensional stride. +*/ +#define DSCR_SRC1_STS_MASK (3 << 30) /* Src xfer size */ +#define DSCR_SRC1_SAM_MASK (3 << 28) /* Src xfer movement */ +#define DSCR_SRC1_SB_MASK (0x3fff << 14) /* Block size */ +#define DSCR_SRC1_SB(x) (((x) & 0x3fff) << 14) +#define DSCR_SRC1_SS_MASK (0x3fff << 0) /* Stride */ +#define DSCR_SRC1_SS(x) (((x) & 0x3fff) << 0) + +/* Dest1, 1-dimensional stride. +*/ +#define DSCR_DEST1_DTS_MASK (3 << 30) /* Dest xfer size */ +#define DSCR_DEST1_DAM_MASK (3 << 28) /* Dest xfer movement */ +#define DSCR_DEST1_DB_MASK (0x3fff << 14) /* Block size */ +#define DSCR_DEST1_DB(x) (((x) & 0x3fff) << 14) +#define DSCR_DEST1_DS_MASK (0x3fff << 0) /* Stride */ +#define DSCR_DEST1_DS(x) (((x) & 0x3fff) << 0) + +#define DSCR_xTS_SIZE1 0 +#define DSCR_xTS_SIZE2 1 +#define DSCR_xTS_SIZE4 2 +#define DSCR_xTS_SIZE8 3 +#define DSCR_SRC1_STS(x) (((x) & 3) << 30) +#define DSCR_DEST1_DTS(x) (((x) & 3) << 30) + +#define DSCR_xAM_INCREMENT 0 +#define DSCR_xAM_DECREMENT 1 +#define DSCR_xAM_STATIC 2 +#define DSCR_xAM_BURST 3 +#define DSCR_SRC1_SAM(x) (((x) & 3) << 28) +#define DSCR_DEST1_DAM(x) (((x) & 3) << 28) + +/* The next descriptor pointer. +*/ +#define DSCR_NXTPTR_MASK (0x07ffffff) +#define DSCR_NXTPTR(x) ((x) >> 5) +#define DSCR_GET_NXTPTR(x) ((x) << 5) +#define DSCR_NXTPTR_MS (1 << 27) + +/* The number of DBDMA channels. +*/ +#define NUM_DBDMA_CHANS 16 + +/* External functions for drivers to use. +*/ +/* Use this to allocate a dbdma channel. The device ids are one of the + * DSCR_CMD0 devices IDs, which is usually redefined to a more + * meaningful name. The 'callback' is called during dma completion + * interrupt. + */ +u32 au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid, + void (*callback)(int, void *, struct pt_regs *), void *callparam); + +#define DBDMA_MEM_CHAN DSCR_CMD0_ALWAYS + +/* Set the device width of a in/out fifo. +*/ +u32 au1xxx_dbdma_set_devwidth(u32 chanid, int bits); + +/* Allocate a ring of descriptors for dbdma. +*/ +u32 au1xxx_dbdma_ring_alloc(u32 chanid, int entries); + +/* Put buffers on source/destination descriptors. +*/ +u32 au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes); +u32 au1xxx_dbdma_put_dest(u32 chanid, void *buf, int nbytes); + +/* Get a buffer from the destination descriptor. +*/ +u32 au1xxx_dbdma_get_dest(u32 chanid, void **buf, int *nbytes); + +void au1xxx_dbdma_stop(u32 chanid); +void au1xxx_dbdma_start(u32 chanid); +void au1xxx_dbdma_reset(u32 chanid); +u32 au1xxx_get_dma_residue(u32 chanid); + +void au1xxx_dbdma_chan_free(u32 chanid); +void au1xxx_dbdma_dump(u32 chanid); + +#endif /* _LANGUAGE_ASSEMBLY */ +#endif /* _AU1000_DBDMA_H_ */ diff -urN linux-2.4.28-bk3/include/asm-mips/au1xxx_psc.h linux-2.4.28-bk4/include/asm-mips/au1xxx_psc.h --- linux-2.4.28-bk3/include/asm-mips/au1xxx_psc.h 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.28-bk4/include/asm-mips/au1xxx_psc.h 2004-11-23 02:49:27.576399498 -0800 @@ -0,0 +1,522 @@ +/* + * + * BRIEF MODULE DESCRIPTION + * Include file for Alchemy Semiconductor's Au1k CPU. + * + * Copyright 2004 Embedded Edge, LLC + * dan@embeddededge.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +/* Specifics for the Au1xxx Programmable Serial Controllers, first + * seen in the AU1550 part. + */ +#ifndef _AU1000_PSC_H_ +#define _AU1000_PSC_H_ + +/* The PSC base addresses. */ +#ifdef CONFIG_SOC_AU1550 +#define PSC0_BASE_ADDR 0xb1a00000 +#define PSC1_BASE_ADDR 0xb1b00000 +#define PSC2_BASE_ADDR 0xb0a00000 +#define PSC3_BASE_ADDR 0xb0d00000 +#endif + +/* The PSC select and control registers are common to + * all protocols. + */ +#define PSC_SEL_OFFSET 0x00000000 +#define PSC_CTRL_OFFSET 0x00000004 + +#define PSC_SEL_CLK_MASK (3 << 4) +#define PSC_SEL_CLK_INTCLK (0 << 4) +#define PSC_SEL_CLK_EXTCLK (1 << 4) +#define PSC_SEL_CLK_SERCLK (2 << 4) + +#define PSC_SEL_PS_MASK 0x00000007 +#define PSC_SEL_PS_DISABLED (0) +#define PSC_SEL_PS_SPIMODE (2) +#define PSC_SEL_PS_I2SMODE (3) +#define PSC_SEL_PS_AC97MODE (4) +#define PSC_SEL_PS_SMBUSMODE (5) + +#define PSC_CTRL_DISABLE (0) +#define PSC_CTRL_SUSPEND (2) +#define PSC_CTRL_ENABLE (3) + +/* AC97 Registers. +*/ +#define PSC_AC97CFG_OFFSET 0x00000008 +#define PSC_AC97MSK_OFFSET 0x0000000c +#define PSC_AC97PCR_OFFSET 0x00000010 +#define PSC_AC97STAT_OFFSET 0x00000014 +#define PSC_AC97EVNT_OFFSET 0x00000018 +#define PSC_AC97TXRX_OFFSET 0x0000001c +#define PSC_AC97CDC_OFFSET 0x00000020 +#define PSC_AC97RST_OFFSET 0x00000024 +#define PSC_AC97GPO_OFFSET 0x00000028 +#define PSC_AC97GPI_OFFSET 0x0000002c + +#define AC97_PSC_SEL (AC97_PSC_BASE + PSC_SEL_OFFSET) +#define AC97_PSC_CTRL (AC97_PSC_BASE + PSC_CTRL_OFFSET) +#define PSC_AC97CFG (AC97_PSC_BASE + PSC_AC97CFG_OFFSET) +#define PSC_AC97MSK (AC97_PSC_BASE + PSC_AC97MSK_OFFSET) +#define PSC_AC97PCR (AC97_PSC_BASE + PSC_AC97PCR_OFFSET) +#define PSC_AC97STAT (AC97_PSC_BASE + PSC_AC97STAT_OFFSET) +#define PSC_AC97EVNT (AC97_PSC_BASE + PSC_AC97EVNT_OFFSET) +#define PSC_AC97TXRX (AC97_PSC_BASE + PSC_AC97TXRX_OFFSET) +#define PSC_AC97CDC (AC97_PSC_BASE + PSC_AC97CDC_OFFSET) +#define PSC_AC97RST (AC97_PSC_BASE + PSC_AC97RST_OFFSET) +#define PSC_AC97GPO (AC97_PSC_BASE + PSC_AC97GPO_OFFSET) +#define PSC_AC97GPI (AC97_PSC_BASE + PSC_AC97GPI_OFFSET) + +/* AC97 Config Register. +*/ +#define PSC_AC97CFG_RT_MASK (3 << 30) +#define PSC_AC97CFG_RT_FIFO1 (0 << 30) +#define PSC_AC97CFG_RT_FIFO2 (1 << 30) +#define PSC_AC97CFG_RT_FIFO4 (2 << 30) +#define PSC_AC97CFG_RT_FIFO8 (3 << 30) + +#define PSC_AC97CFG_TT_MASK (3 << 28) +#define PSC_AC97CFG_TT_FIFO1 (0 << 28) +#define PSC_AC97CFG_TT_FIFO2 (1 << 28) +#define PSC_AC97CFG_TT_FIFO4 (2 << 28) +#define PSC_AC97CFG_TT_FIFO8 (3 << 28) + +#define PSC_AC97CFG_DD_DISABLE (1 << 27) +#define PSC_AC97CFG_DE_ENABLE (1 << 26) +#define PSC_AC97CFG_SE_ENABLE (1 << 25) + +#define PSC_AC97CFG_LEN_MASK (0xf << 21) +#define PSC_AC97CFG_TXSLOT_MASK (0x3ff << 11) +#define PSC_AC97CFG_RXSLOT_MASK (0x3ff << 1) +#define PSC_AC97CFG_GE_ENABLE (1) + +/* Enable slots 3-12. +*/ +#define PSC_AC97CFG_TXSLOT_ENA(x) (1 << (((x) - 3) + 11)) +#define PSC_AC97CFG_RXSLOT_ENA(x) (1 << (((x) - 3) + 1)) + +/* The word length equation is ((x) * 2) + 2, so choose 'x' appropriately. + * The only sensible numbers are 7, 9, or possibly 11. Nah, just do the + * arithmetic in the macro. + */ +#define PSC_AC97CFG_SET_LEN(x) (((((x)-2)/2) & 0xf) << 21) +#define PSC_AC97CFG_GET_LEN(x) (((((x) >> 21) & 0xf) * 2) + 2) + +/* AC97 Mask Register. +*/ +#define PSC_AC97MSK_GR (1 << 25) +#define PSC_AC97MSK_CD (1 << 24) +#define PSC_AC97MSK_RR (1 << 13) +#define PSC_AC97MSK_RO (1 << 12) +#define PSC_AC97MSK_RU (1 << 11) +#define PSC_AC97MSK_TR (1 << 10) +#define PSC_AC97MSK_TO (1 << 9) +#define PSC_AC97MSK_TU (1 << 8) +#define PSC_AC97MSK_RD (1 << 5) +#define PSC_AC97MSK_TD (1 << 4) +#define PSC_AC97MSK_ALLMASK (PSC_AC97MSK_GR | PSC_AC97MSK_CD | \ + PSC_AC97MSK_RR | PSC_AC97MSK_RO | \ + PSC_AC97MSK_RU | PSC_AC97MSK_TR | \ + PSC_AC97MSK_TO | PSC_AC97MSK_TU | \ + PSC_AC97MSK_RD | PSC_AC97MSK_TD) + +/* AC97 Protocol Control Register. +*/ +#define PSC_AC97PCR_RC (1 << 6) +#define PSC_AC97PCR_RP (1 << 5) +#define PSC_AC97PCR_RS (1 << 4) +#define PSC_AC97PCR_TC (1 << 2) +#define PSC_AC97PCR_TP (1 << 1) +#define PSC_AC97PCR_TS (1 << 0) + +/* AC97 Status register (read only). +*/ +#define PSC_AC97STAT_CB (1 << 26) +#define PSC_AC97STAT_CP (1 << 25) +#define PSC_AC97STAT_CR (1 << 24) +#define PSC_AC97STAT_RF (1 << 13) +#define PSC_AC97STAT_RE (1 << 12) +#define PSC_AC97STAT_RR (1 << 11) +#define PSC_AC97STAT_TF (1 << 10) +#define PSC_AC97STAT_TE (1 << 9) +#define PSC_AC97STAT_TR (1 << 8) +#define PSC_AC97STAT_RB (1 << 5) +#define PSC_AC97STAT_TB (1 << 4) +#define PSC_AC97STAT_DI (1 << 2) +#define PSC_AC97STAT_DR (1 << 1) +#define PSC_AC97STAT_SR (1 << 0) + +/* AC97 Event Register. +*/ +#define PSC_AC97EVNT_GR (1 << 25) +#define PSC_AC97EVNT_CD (1 << 24) +#define PSC_AC97EVNT_RR (1 << 13) +#define PSC_AC97EVNT_RO (1 << 12) +#define PSC_AC97EVNT_RU (1 << 11) +#define PSC_AC97EVNT_TR (1 << 10) +#define PSC_AC97EVNT_TO (1 << 9) +#define PSC_AC97EVNT_TU (1 << 8) +#define PSC_AC97EVNT_RD (1 << 5) +#define PSC_AC97EVNT_TD (1 << 4) + +/* CODEC Command Register. +*/ +#define PSC_AC97CDC_RD (1 << 25) +#define PSC_AC97CDC_ID_MASK (3 << 23) +#define PSC_AC97CDC_INDX_MASK (0x7f << 16) +#define PSC_AC97CDC_ID(x) (((x) & 0x3) << 23) +#define PSC_AC97CDC_INDX(x) (((x) & 0x7f) << 16) + +/* AC97 Reset Control Register. +*/ +#define PSC_AC97RST_RST (1 << 1) +#define PSC_AC97RST_SNC (1 << 0) + + +/* PSC in I2S Mode. +*/ +typedef struct psc_i2s { + u32 psc_sel; + u32 psc_ctrl; + u32 psc_i2scfg; + u32 psc_i2smsk; + u32 psc_i2spcr; + u32 psc_i2sstat; + u32 psc_i2sevent; + u32 psc_i2stxrx; + u32 psc_i2sudf; +} psc_i2s_t; + +/* I2S Config Register. +*/ +#define PSC_I2SCFG_RT_MASK (3 << 30) +#define PSC_I2SCFG_RT_FIFO1 (0 << 30) +#define PSC_I2SCFG_RT_FIFO2 (1 << 30) +#define PSC_I2SCFG_RT_FIFO4 (2 << 30) +#define PSC_I2SCFG_RT_FIFO8 (3 << 30) + +#define PSC_I2SCFG_TT_MASK (3 << 28) +#define PSC_I2SCFG_TT_FIFO1 (0 << 28) +#define PSC_I2SCFG_TT_FIFO2 (1 << 28) +#define PSC_I2SCFG_TT_FIFO4 (2 << 28) +#define PSC_I2SCFG_TT_FIFO8 (3 << 28) + +#define PSC_I2SCFG_DD_DISABLE (1 << 27) +#define PSC_I2SCFG_DE_ENABLE (1 << 26) +#define PSC_I2SCFG_SET_WS(x) (((((x) / 2) - 1) & 0x7f) << 16) +#define PSC_I2SCFG_WI (1 << 15) + +#define PSC_I2SCFG_DIV_MASK (3 << 13) +#define PSC_I2SCFG_DIV2 (0 << 13) +#define PSC_I2SCFG_DIV4 (1 << 13) +#define PSC_I2SCFG_DIV8 (2 << 13) +#define PSC_I2SCFG_DIV16 (3 << 13) + +#define PSC_I2SCFG_BI (1 << 12) +#define PSC_I2SCFG_BUF (1 << 11) +#define PSC_I2SCFG_MLJ (1 << 10) +#define PSC_I2SCFG_XM (1 << 9) + +/* The word length equation is simply LEN+1. + */ +#define PSC_I2SCFG_SET_LEN(x) ((((x) - 1) & 0x1f) << 4) +#define PSC_I2SCFG_GET_LEN(x) ((((x) >> 4) & 0x1f) + 1) + +#define PSC_I2SCFG_LB (1 << 2) +#define PSC_I2SCFG_MLF (1 << 1) +#define PSC_I2SCFG_MS (1 << 0) + +/* I2S Mask Register. +*/ +#define PSC_I2SMSK_RR (1 << 13) +#define PSC_I2SMSK_RO (1 << 12) +#define PSC_I2SMSK_RU (1 << 11) +#define PSC_I2SMSK_TR (1 << 10) +#define PSC_I2SMSK_TO (1 << 9) +#define PSC_I2SMSK_TU (1 << 8) +#define PSC_I2SMSK_RD (1 << 5) +#define PSC_I2SMSK_TD (1 << 4) +#define PSC_I2SMSK_ALLMASK (PSC_I2SMSK_RR | PSC_I2SMSK_RO | \ + PSC_I2SMSK_RU | PSC_I2SMSK_TR | \ + PSC_I2SMSK_TO | PSC_I2SMSK_TU | \ + PSC_I2SMSK_RD | PSC_I2SMSK_TD) + +/* I2S Protocol Control Register. +*/ +#define PSC_I2SPCR_RC (1 << 6) +#define PSC_I2SPCR_RP (1 << 5) +#define PSC_I2SPCR_RS (1 << 4) +#define PSC_I2SPCR_TC (1 << 2) +#define PSC_I2SPCR_TP (1 << 1) +#define PSC_I2SPCR_TS (1 << 0) + +/* I2S Status register (read only). +*/ +#define PSC_I2SSTAT_RF (1 << 13) +#define PSC_I2SSTAT_RE (1 << 12) +#define PSC_I2SSTAT_RR (1 << 11) +#define PSC_I2SSTAT_TF (1 << 10) +#define PSC_I2SSTAT_TE (1 << 9) +#define PSC_I2SSTAT_TR (1 << 8) +#define PSC_I2SSTAT_RB (1 << 5) +#define PSC_I2SSTAT_TB (1 << 4) +#define PSC_I2SSTAT_DI (1 << 2) +#define PSC_I2SSTAT_DR (1 << 1) +#define PSC_I2SSTAT_SR (1 << 0) + +/* I2S Event Register. +*/ +#define PSC_I2SEVNT_RR (1 << 13) +#define PSC_I2SEVNT_RO (1 << 12) +#define PSC_I2SEVNT_RU (1 << 11) +#define PSC_I2SEVNT_TR (1 << 10) +#define PSC_I2SEVNT_TO (1 << 9) +#define PSC_I2SEVNT_TU (1 << 8) +#define PSC_I2SEVNT_RD (1 << 5) +#define PSC_I2SEVNT_TD (1 << 4) + +/* PSC in SPI Mode. +*/ +typedef struct psc_spi { + u32 psc_sel; + u32 psc_ctrl; + u32 psc_spicfg; + u32 psc_spimsk; + u32 psc_spipcr; + u32 psc_spistat; + u32 psc_spievent; + u32 psc_spitxrx; +} psc_spi_t; + +/* SPI Config Register. +*/ +#define PSC_SPICFG_RT_MASK (3 << 30) +#define PSC_SPICFG_RT_FIFO1 (0 << 30) +#define PSC_SPICFG_RT_FIFO2 (1 << 30) +#define PSC_SPICFG_RT_FIFO4 (2 << 30) +#define PSC_SPICFG_RT_FIFO8 (3 << 30) + +#define PSC_SPICFG_TT_MASK (3 << 28) +#define PSC_SPICFG_TT_FIFO1 (0 << 28) +#define PSC_SPICFG_TT_FIFO2 (1 << 28) +#define PSC_SPICFG_TT_FIFO4 (2 << 28) +#define PSC_SPICFG_TT_FIFO8 (3 << 28) + +#define PSC_SPICFG_DD_DISABLE (1 << 27) +#define PSC_SPICFG_DE_ENABLE (1 << 26) +#define PSC_SPICFG_CLR_BAUD(x) ((x) & ~((0x3f) << 15)) +#define PSC_SPICFG_SET_BAUD(x) (((x) & 0x3f) << 15) + +#define PSC_SPICFG_SET_DIV(x) (((x) & 0x03) << 13) +#define PSC_SPICFG_DIV2 0 +#define PSC_SPICFG_DIV4 1 +#define PSC_SPICFG_DIV8 2 +#define PSC_SPICFG_DIV16 3 + +#define PSC_SPICFG_BI (1 << 12) +#define PSC_SPICFG_PSE (1 << 11) +#define PSC_SPICFG_CGE (1 << 10) +#define PSC_SPICFG_CDE (1 << 9) + +#define PSC_SPICFG_CLR_LEN(x) ((x) & ~((0x1f) << 4)) +#define PSC_SPICFG_SET_LEN(x) (((x-1) & 0x1f) << 4) + +#define PSC_SPICFG_LB (1 << 3) +#define PSC_SPICFG_MLF (1 << 1) +#define PSC_SPICFG_MO (1 << 0) + +/* SPI Mask Register. +*/ +#define PSC_SPIMSK_MM (1 << 16) +#define PSC_SPIMSK_RR (1 << 13) +#define PSC_SPIMSK_RO (1 << 12) +#define PSC_SPIMSK_RU (1 << 11) +#define PSC_SPIMSK_TR (1 << 10) +#define PSC_SPIMSK_TO (1 << 9) +#define PSC_SPIMSK_TU (1 << 8) +#define PSC_SPIMSK_SD (1 << 5) +#define PSC_SPIMSK_MD (1 << 4) +#define PSC_SPIMSK_ALLMASK (PSC_SPIMSK_MM | PSC_SPIMSK_RR | \ + PSC_SPIMSK_RO | PSC_SPIMSK_TO | \ + PSC_SPIMSK_TU | PSC_SPIMSK_SD | \ + PSC_SPIMSK_MD) + +/* SPI Protocol Control Register. +*/ +#define PSC_SPIPCR_RC (1 << 6) +#define PSC_SPIPCR_SP (1 << 5) +#define PSC_SPIPCR_SS (1 << 4) +#define PSC_SPIPCR_TC (1 << 2) +#define PSC_SPIPCR_MS (1 << 0) + +/* SPI Status register (read only). +*/ +#define PSC_SPISTAT_RF (1 << 13) +#define PSC_SPISTAT_RE (1 << 12) +#define PSC_SPISTAT_RR (1 << 11) +#define PSC_SPISTAT_TF (1 << 10) +#define PSC_SPISTAT_TE (1 << 9) +#define PSC_SPISTAT_TR (1 << 8) +#define PSC_SPISTAT_SB (1 << 5) +#define PSC_SPISTAT_MB (1 << 4) +#define PSC_SPISTAT_DI (1 << 2) +#define PSC_SPISTAT_DR (1 << 1) +#define PSC_SPISTAT_SR (1 << 0) + +/* SPI Event Register. +*/ +#define PSC_SPIEVNT_MM (1 << 16) +#define PSC_SPIEVNT_RR (1 << 13) +#define PSC_SPIEVNT_RO (1 << 12) +#define PSC_SPIEVNT_RU (1 << 11) +#define PSC_SPIEVNT_TR (1 << 10) +#define PSC_SPIEVNT_TO (1 << 9) +#define PSC_SPIEVNT_TU (1 << 8) +#define PSC_SPIEVNT_SD (1 << 5) +#define PSC_SPIEVNT_MD (1 << 4) + +/* Transmit register control. +*/ +#define PSC_SPITXRX_LC (1 << 29) +#define PSC_SPITXRX_SR (1 << 28) + +/* PSC in SMBus (I2C) Mode. +*/ +typedef struct psc_smb { + u32 psc_sel; + u32 psc_ctrl; + u32 psc_smbcfg; + u32 psc_smbmsk; + u32 psc_smbpcr; + u32 psc_smbstat; + u32 psc_smbevnt; + u32 psc_smbtxrx; + u32 psc_smbtmr; +} psc_smb_t; + +/* SMBus Config Register. +*/ +#define PSC_SMBCFG_RT_MASK (3 << 30) +#define PSC_SMBCFG_RT_FIFO1 (0 << 30) +#define PSC_SMBCFG_RT_FIFO2 (1 << 30) +#define PSC_SMBCFG_RT_FIFO4 (2 << 30) +#define PSC_SMBCFG_RT_FIFO8 (3 << 30) + +#define PSC_SMBCFG_TT_MASK (3 << 28) +#define PSC_SMBCFG_TT_FIFO1 (0 << 28) +#define PSC_SMBCFG_TT_FIFO2 (1 << 28) +#define PSC_SMBCFG_TT_FIFO4 (2 << 28) +#define PSC_SMBCFG_TT_FIFO8 (3 << 28) + +#define PSC_SMBCFG_DD_DISABLE (1 << 27) +#define PSC_SMBCFG_DE_ENABLE (1 << 26) + +#define PSC_SMBCFG_SET_DIV(x) (((x) & 0x03) << 13) +#define PSC_SMBCFG_DIV2 0 +#define PSC_SMBCFG_DIV4 1 +#define PSC_SMBCFG_DIV8 2 +#define PSC_SMBCFG_DIV16 3 + +#define PSC_SMBCFG_GCE (1 << 9) +#define PSC_SMBCFG_SFM (1 << 8) + +#define PSC_SMBCFG_SET_SLV(x) (((x) & 0x7f) << 1) + +/* SMBus Mask Register. +*/ +#define PSC_SMBMSK_DN (1 << 30) +#define PSC_SMBMSK_AN (1 << 29) +#define PSC_SMBMSK_AL (1 << 28) +#define PSC_SMBMSK_RR (1 << 13) +#define PSC_SMBMSK_RO (1 << 12) +#define PSC_SMBMSK_RU (1 << 11) +#define PSC_SMBMSK_TR (1 << 10) +#define PSC_SMBMSK_TO (1 << 9) +#define PSC_SMBMSK_TU (1 << 8) +#define PSC_SMBMSK_SD (1 << 5) +#define PSC_SMBMSK_MD (1 << 4) +#define PSC_SMBMSK_ALLMASK (PSC_SMBMSK_DN | PSC_SMBMSK_AN | \ + PSC_SMBMSK_AL | PSC_SMBMSK_RR | \ + PSC_SMBMSK_RO | PSC_SMBMSK_TO | \ + PSC_SMBMSK_TU | PSC_SMBMSK_SD | \ + PSC_SMBMSK_MD) + +/* SMBus Protocol Control Register. +*/ +#define PSC_SMBPCR_DC (1 << 2) +#define PSC_SMBPCR_MS (1 << 0) + +/* SMBus Status register (read only). +*/ +#define PSC_SMBSTAT_BB (1 << 28) +#define PSC_SMBSTAT_RF (1 << 13) +#define PSC_SMBSTAT_RE (1 << 12) +#define PSC_SMBSTAT_RR (1 << 11) +#define PSC_SMBSTAT_TF (1 << 10) +#define PSC_SMBSTAT_TE (1 << 9) +#define PSC_SMBSTAT_TR (1 << 8) +#define PSC_SMBSTAT_SB (1 << 5) +#define PSC_SMBSTAT_MB (1 << 4) +#define PSC_SMBSTAT_DI (1 << 2) +#define PSC_SMBSTAT_DR (1 << 1) +#define PSC_SMBSTAT_SR (1 << 0) + +/* SMBus Event Register. +*/ +#define PSC_SMBEVNT_DN (1 << 30) +#define PSC_SMBEVNT_AN (1 << 29) +#define PSC_SMBEVNT_AL (1 << 28) +#define PSC_SMBEVNT_RR (1 << 13) +#define PSC_SMBEVNT_RO (1 << 12) +#define PSC_SMBEVNT_RU (1 << 11) +#define PSC_SMBEVNT_TR (1 << 10) +#define PSC_SMBEVNT_TO (1 << 9) +#define PSC_SMBEVNT_TU (1 << 8) +#define PSC_SMBEVNT_SD (1 << 5) +#define PSC_SMBEVNT_MD (1 << 4) +#define PSC_SMBEVNT_ALLCLR (PSC_SMBEVNT_DN | PSC_SMBEVNT_AN | \ + PSC_SMBEVNT_AL | PSC_SMBEVNT_RR | \ + PSC_SMBEVNT_RO | PSC_SMBEVNT_TO | \ + PSC_SMBEVNT_TU | PSC_SMBEVNT_SD | \ + PSC_SMBEVNT_MD) + +/* Transmit register control. +*/ +#define PSC_SMBTXRX_RSR (1 << 30) +#define PSC_SMBTXRX_STP (1 << 29) +#define PSC_SMBTXRX_DATAMASK (0xff) + +/* SMBus protocol timers register. +*/ +#define PSC_SMBTMR_SET_TH(x) (((x) & 0x3) << 30) +#define PSC_SMBTMR_SET_PS(x) (((x) & 0x1f) << 25) +#define PSC_SMBTMR_SET_PU(x) (((x) & 0x1f) << 20) +#define PSC_SMBTMR_SET_SH(x) (((x) & 0x1f) << 15) +#define PSC_SMBTMR_SET_SU(x) (((x) & 0x1f) << 10) +#define PSC_SMBTMR_SET_CL(x) (((x) & 0x1f) << 5) +#define PSC_SMBTMR_SET_CH(x) (((x) & 0x1f) << 0) + + +#endif /* _AU1000_PSC_H_ */ diff -urN linux-2.4.28-bk3/include/asm-mips/checksum.h linux-2.4.28-bk4/include/asm-mips/checksum.h --- linux-2.4.28-bk3/include/asm-mips/checksum.h 2003-08-25 04:44:43.000000000 -0700 +++ linux-2.4.28-bk4/include/asm-mips/checksum.h 2004-11-23 02:49:27.577399539 -0800 @@ -123,10 +123,6 @@ return csum_fold(csum); } -/* - * computes the checksum of the TCP/UDP pseudo-header - * returns a 16-bit checksum, already complemented - */ static inline unsigned long csum_tcpudp_nofold(unsigned long saddr, unsigned long daddr, unsigned short len, diff -urN linux-2.4.28-bk3/include/asm-mips/compiler.h linux-2.4.28-bk4/include/asm-mips/compiler.h --- linux-2.4.28-bk3/include/asm-mips/compiler.h 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.28-bk4/include/asm-mips/compiler.h 2004-11-23 02:49:27.577399539 -0800 @@ -0,0 +1,17 @@ +/* + * Copyright (C) 2004 Maciej W. Rozycki + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#ifndef _ASM_COMPILER_H +#define _ASM_COMPILER_H + +#if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4) +#define GCC_REG_ACCUM "$0" +#else +#define GCC_REG_ACCUM "accum" +#endif + +#endif /* _ASM_COMPILER_H */ diff -urN linux-2.4.28-bk3/include/asm-mips/cpu.h linux-2.4.28-bk4/include/asm-mips/cpu.h --- linux-2.4.28-bk3/include/asm-mips/cpu.h 2004-02-18 05:36:32.000000000 -0800 +++ linux-2.4.28-bk4/include/asm-mips/cpu.h 2004-11-23 02:49:27.578399580 -0800 @@ -173,7 +173,8 @@ #define CPU_VR4133 56 #define CPU_AU1550 57 #define CPU_24K 58 -#define CPU_LAST 58 +#define CPU_AU1200 59 +#define CPU_LAST 59 /* * ISA Level encodings diff -urN linux-2.4.28-bk3/include/asm-mips/db1x00.h linux-2.4.28-bk4/include/asm-mips/db1x00.h --- linux-2.4.28-bk3/include/asm-mips/db1x00.h 2003-08-25 04:44:43.000000000 -0700 +++ linux-2.4.28-bk4/include/asm-mips/db1x00.h 2004-11-23 02:49:27.578399580 -0800 @@ -27,21 +27,42 @@ #ifndef __ASM_DB1X00_H #define __ASM_DB1X00_H +#ifdef CONFIG_MIPS_DB1550 +#define BCSR_KSEG1_ADDR 0xAF000000 +#define NAND_PHYS_ADDR 0x20000000 +#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX +#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX +#define SPI_PSC_BASE PSC0_BASE_ADDR +#define AC97_PSC_BASE PSC1_BASE_ADDR +#define SMBUS_PSC_BASE PSC2_BASE_ADDR +#define I2S_PSC_BASE PSC3_BASE_ADDR + +#else +#define BCSR_KSEG1_ADDR 0xAE000000 +#endif /* * Overlay data structure of the Db1x00 board registers. - * Registers located at physical 1E0000xx, KSEG1 0xAE0000xx + * Registers located at physical 0E0000xx, KSEG1 0xAE0000xx */ typedef volatile struct { - /*00*/ unsigned long whoami; - /*04*/ unsigned long status; - /*08*/ unsigned long switches; - /*0C*/ unsigned long resets; - /*10*/ unsigned long pcmcia; - /*14*/ unsigned long specific; - /*18*/ unsigned long leds; - /*1C*/ unsigned long swreset; + /*00*/ unsigned short whoami; + unsigned short reserved0; + /*04*/ unsigned short status; + unsigned short reserved1; + /*08*/ unsigned short switches; + unsigned short reserved2; + /*0C*/ unsigned short resets; + unsigned short reserved3; + /*10*/ unsigned short pcmcia; + unsigned short reserved4; + /*14*/ unsigned short specific; + unsigned short reserved5; + /*18*/ unsigned short leds; + unsigned short reserved6; + /*1C*/ unsigned short swreset; + unsigned short reserved7; } BCSR; @@ -93,9 +114,13 @@ #define BCSR_PCMCIA_PC1RST 0x8000 #define BCSR_BOARD_PCIM66EN 0x0001 +#define BCSR_BOARD_SD0_PWR 0x0040 +#define BCSR_BOARD_SD1_PWR 0x0080 #define BCSR_BOARD_PCIM33 0x0100 #define BCSR_BOARD_GPIO200RST 0x0400 #define BCSR_BOARD_PCICFG 0x1000 +#define BCSR_BOARD_SD0_WP 0x4000 +#define BCSR_BOARD_SD1_WP 0x8000 #define BCSR_LEDS_DECIMALS 0x0003 #define BCSR_LEDS_LED0 0x0100 @@ -122,4 +147,48 @@ #define DB1X00_USER_ONLY #endif +/* SD controller macros */ +/* + * Detect card. + */ +#define mmc_card_inserted(_n_, _res_) \ + do { \ + BCSR * const bcsr = (BCSR *)0xAE000000; \ + unsigned long mmc_wp, board_specific; \ + if ((_n_)) { \ + mmc_wp = BCSR_BOARD_SD1_WP; \ + } else { \ + mmc_wp = BCSR_BOARD_SD0_WP; \ + } \ + board_specific = au_readl((unsigned long)(&bcsr->specific)); \ + if (!(board_specific & mmc_wp)) {/* low means card present */ \ + *(int *)(_res_) = 1; \ + } else { \ + *(int *)(_res_) = 0; \ + } \ + } while (0) + +/* + * Apply power to card slot(s). + */ +#define mmc_power_on(_n_) \ + do { \ + BCSR * const bcsr = (BCSR *)0xAE000000; \ + unsigned long mmc_pwr, mmc_wp, board_specific; \ + if ((_n_)) { \ + mmc_pwr = BCSR_BOARD_SD1_PWR; \ + mmc_wp = BCSR_BOARD_SD1_WP; \ + } else { \ + mmc_pwr = BCSR_BOARD_SD0_PWR; \ + mmc_wp = BCSR_BOARD_SD0_WP; \ + } \ + board_specific = au_readl((unsigned long)(&bcsr->specific)); \ + if (!(board_specific & mmc_wp)) {/* low means card present */ \ + board_specific |= mmc_pwr; \ + au_writel(board_specific, (int)(&bcsr->specific)); \ + au_sync(); \ + } \ + } while (0) + #endif /* __ASM_DB1X00_H */ + diff -urN linux-2.4.28-bk3/include/asm-mips/dec/prom.h linux-2.4.28-bk4/include/asm-mips/dec/prom.h --- linux-2.4.28-bk3/include/asm-mips/dec/prom.h 2003-08-25 04:44:43.000000000 -0700 +++ linux-2.4.28-bk4/include/asm-mips/dec/prom.h 2004-11-23 02:49:27.579399620 -0800 @@ -164,4 +164,7 @@ extern void prom_identify_arch(u32); extern void prom_init_cmdline(s32, s32 *, u32); +extern void register_prom_console(void); +extern void unregister_prom_console(void); + #endif /* __ASM_DEC_PROM_H */ diff -urN linux-2.4.28-bk3/include/asm-mips/dec/serial.h linux-2.4.28-bk4/include/asm-mips/dec/serial.h --- linux-2.4.28-bk3/include/asm-mips/dec/serial.h 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.28-bk4/include/asm-mips/dec/serial.h 2004-11-23 02:49:27.579399620 -0800 @@ -0,0 +1,36 @@ +/* + * include/asm-mips/dec/serial.h + * + * Definitions common to all DECstation serial devices. + * + * Copyright (C) 2004 Maciej W. Rozycki + * + * Based on bits extracted from drivers/tc/zs.h for which + * the following copyrights apply: + * + * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) + * Copyright (C) 1996 Paul Mackerras (Paul.Mackerras@cs.anu.edu.au) + * Copyright (C) Harald Koerfgen + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ +#ifndef __ASM_MIPS_DEC_SERIAL_H +#define __ASM_MIPS_DEC_SERIAL_H + +struct dec_serial_hook { + int (*init_channel)(void *handle); + void (*init_info)(void *handle); + void (*rx_char)(unsigned char ch, unsigned char fl); + int (*poll_rx_char)(void *handle); + int (*poll_tx_char)(void *handle, unsigned char ch); + unsigned int cflags; +}; + +extern int register_dec_serial_hook(unsigned int channel, + struct dec_serial_hook *hook); +extern int unregister_dec_serial_hook(unsigned int channel); + +#endif /* __ASM_MIPS_DEC_SERIAL_H */ diff -urN linux-2.4.28-bk3/include/asm-mips/delay.h linux-2.4.28-bk4/include/asm-mips/delay.h --- linux-2.4.28-bk3/include/asm-mips/delay.h 2004-02-18 05:36:32.000000000 -0800 +++ linux-2.4.28-bk4/include/asm-mips/delay.h 2004-11-23 02:49:27.580399661 -0800 @@ -12,6 +12,8 @@ #include #include +#include + extern unsigned long loops_per_jiffy; static __inline__ void __delay(unsigned long loops) @@ -45,8 +47,9 @@ usecs *= (unsigned long) (((0x8000000000000000ULL / (500000 / HZ)) + 0x80000000ULL) >> 32); __asm__("multu\t%2,%3" - :"=h" (usecs), "=l" (lo) - :"r" (usecs),"r" (lpj)); + : "=h" (usecs), "=l" (lo) + : "r" (usecs), "r" (lpj) + : GCC_REG_ACCUM); __delay(usecs); } @@ -60,8 +63,9 @@ nsecs *= (unsigned long) (((0x8000000000000000ULL / (500000000 / HZ)) + 0x80000000ULL) >> 32); __asm__("multu\t%2,%3" - :"=h" (nsecs), "=l" (lo) - :"r" (nsecs),"r" (lpj)); + : "=h" (nsecs), "=l" (lo) + : "r" (nsecs), "r" (lpj) + : GCC_REG_ACCUM); __delay(nsecs); } diff -urN linux-2.4.28-bk3/include/asm-mips/div64.h linux-2.4.28-bk4/include/asm-mips/div64.h --- linux-2.4.28-bk3/include/asm-mips/div64.h 2003-08-25 04:44:43.000000000 -0700 +++ linux-2.4.28-bk4/include/asm-mips/div64.h 2004-11-23 02:49:27.580399661 -0800 @@ -1,5 +1,5 @@ /* - * Copyright (C) 2000 Maciej W. Rozycki + * Copyright (C) 2000, 2004 Maciej W. Rozycki * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive @@ -8,6 +8,8 @@ #ifndef _ASM_DIV64_H #define _ASM_DIV64_H +#include + /* * No traps on overflows for any of these... */ @@ -64,7 +66,8 @@ if (__high) \ __asm__("divu $0, %z2, %z3" \ : "=h" (__upper), "=l" (__high) \ - : "Jr" (__high), "Jr" (__base)); \ + : "Jr" (__high), "Jr" (__base) \ + : GCC_REG_ACCUM); \ \ __mod = do_div64_32(__low, __upper, __low, __base); \ \ diff -urN linux-2.4.28-bk3/include/asm-mips/mipsregs.h linux-2.4.28-bk4/include/asm-mips/mipsregs.h --- linux-2.4.28-bk3/include/asm-mips/mipsregs.h 2004-02-18 05:36:32.000000000 -0800 +++ linux-2.4.28-bk4/include/asm-mips/mipsregs.h 2004-11-23 02:49:27.581399702 -0800 @@ -632,6 +632,24 @@ } while (0) /* + * On RM7000/RM9000 these are uses to access cop0 set 1 registers + */ +#define __read_32bit_c0_ctrl_register(source) \ +({ int __res; \ + __asm__ __volatile__( \ + "cfc0\t%0, " #source "\n\t" \ + : "=r" (__res)); \ + __res; \ +}) + +#define __write_32bit_c0_ctrl_register(register, value) \ +do { \ + __asm__ __volatile__( \ + "ctc0\t%z0, " #register "\n\t" \ + : : "Jr" ((unsigned int)value)); \ +} while (0) + +/* * These versions are only needed for systems with more than 38 bits of * physical address space running the 32-bit kernel. That's none atm :-) */ @@ -788,12 +806,30 @@ #define read_c0_xcontext() __read_ulong_c0_register($20, 0) #define write_c0_xcontext(val) __write_ulong_c0_register($20, 0, val) -#define read_c0_intcontrol() __read_32bit_c0_register($20, 1) -#define write_c0_intcontrol(val) __write_32bit_c0_register($20, 1, val) +#define read_c0_intcontrol() __read_32bit_c0_ctrl_register($20) +#define write_c0_intcontrol(val) __write_32bit_c0_ctrl_register($20, val) #define read_c0_framemask() __read_32bit_c0_register($21, 0) #define write_c0_framemask(val) __write_32bit_c0_register($21, 0, val) +#define read_c0_diag() __read_32bit_c0_register($22, 0) +#define write_c0_diag(val) __write_32bit_c0_register($22, 0, val) + +#define read_c0_diag1() __read_32bit_c0_register($22, 1) +#define write_c0_diag1(val) __write_32bit_c0_register($22, 1, val) + +#define read_c0_diag2() __read_32bit_c0_register($22, 2) +#define write_c0_diag2(val) __write_32bit_c0_register($22, 2, val) + +#define read_c0_diag3() __read_32bit_c0_register($22, 3) +#define write_c0_diag3(val) __write_32bit_c0_register($22, 3, val) + +#define read_c0_diag4() __read_32bit_c0_register($22, 4) +#define write_c0_diag4(val) __write_32bit_c0_register($22, 4, val) + +#define read_c0_diag5() __read_32bit_c0_register($22, 5) +#define write_c0_diag5(val) __write_32bit_c0_register($22, 5, val) + #define read_c0_debug() __read_32bit_c0_register($23, 0) #define write_c0_debug(val) __write_32bit_c0_register($23, 0, val) @@ -879,7 +915,7 @@ /* * Manipulate bits in a c0 register. */ -#define __BUILD_SET_C0(name,register) \ +#define __BUILD_SET_C0(name) \ static inline unsigned int \ set_c0_##name(unsigned int set) \ { \ @@ -917,9 +953,10 @@ return res; \ } -__BUILD_SET_C0(status,CP0_STATUS) -__BUILD_SET_C0(cause,CP0_CAUSE) -__BUILD_SET_C0(config,CP0_CONFIG) +__BUILD_SET_C0(status) +__BUILD_SET_C0(cause) +__BUILD_SET_C0(config) +__BUILD_SET_C0(intcontrol) #endif /* !__ASSEMBLY__ */ diff -urN linux-2.4.28-bk3/include/asm-mips/mmu_context.h linux-2.4.28-bk4/include/asm-mips/mmu_context.h --- linux-2.4.28-bk3/include/asm-mips/mmu_context.h 2003-08-25 04:44:43.000000000 -0700 +++ linux-2.4.28-bk4/include/asm-mips/mmu_context.h 2004-11-23 02:49:27.582399743 -0800 @@ -33,13 +33,18 @@ #define cpu_context(cpu, mm) ((mm)->context[cpu]) #define cpu_asid(cpu, mm) (cpu_context((cpu), (mm)) & ASID_MASK) -#define asid_cache(cpu) cpu_data[cpu].asid_cache +#define asid_cache(cpu) (cpu_data[cpu].asid_cache) #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX) #define ASID_INC 0x40 #define ASID_MASK 0xfc0 +#elif defined(CONFIG_CPU_RM9000) + +#define ASID_INC 0x1 +#define ASID_MASK 0xfff + #else /* FIXME: not correct for R6000, R8000 */ #define ASID_INC 0x1 @@ -136,7 +141,7 @@ write_c0_entryhi(cpu_context(cpu, next)); TLBMISS_HANDLER_SETUP_PGD(next->pgd); - /* mark mmu ownership change */ + /* mark mmu ownership change */ clear_bit(cpu, &prev->cpu_vm_mask); set_bit(cpu, &next->cpu_vm_mask); diff -urN linux-2.4.28-bk3/include/asm-mips/param.h linux-2.4.28-bk4/include/asm-mips/param.h --- linux-2.4.28-bk3/include/asm-mips/param.h 2004-02-18 05:36:32.000000000 -0800 +++ linux-2.4.28-bk4/include/asm-mips/param.h 2004-11-23 02:49:27.582399743 -0800 @@ -12,6 +12,8 @@ #include +#include + #ifdef CONFIG_DECSTATION /* * log2(HZ), change this here if you want another HZ value. This is also @@ -28,8 +30,9 @@ ({ unsigned long __res; \ unsigned long __lo; \ __asm__("multu\t%2,%3\n\t" \ - :"=h" (__res), "=l" (__lo) \ - :"r" (a), "r" (QUOTIENT)); \ + : "=h" (__res), "=l" (__lo) \ + : "r" (a), "r" (QUOTIENT) \ + : GCC_REG_ACCUM); \ (__typeof__(a)) __res;}) #else /* Not a DECstation */ diff -urN linux-2.4.28-bk3/include/asm-mips/pb1550.h linux-2.4.28-bk4/include/asm-mips/pb1550.h --- linux-2.4.28-bk3/include/asm-mips/pb1550.h 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.28-bk4/include/asm-mips/pb1550.h 2004-11-23 02:49:27.583399783 -0800 @@ -0,0 +1,168 @@ +/* + * AMD Alchemy Semi PB1550 Referrence Board + * Board Registers defines. + * + * Copyright 2004 Embedded Edge LLC. + * + * ######################################################################## + * + * This program is free software; you can distribute it and/or modify it + * under the terms of the GNU General Public License (Version 2) as + * published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. + * + * ######################################################################## + * + * + */ +#ifndef __ASM_PB1550_H +#define __ASM_PB1550_H + +#include + +#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX +#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX +#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC3_TX +#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC3_RX + +#define SPI_PSC_BASE PSC0_BASE_ADDR +#define AC97_PSC_BASE PSC1_BASE_ADDR +#define SMBUS_PSC_BASE PSC2_BASE_ADDR +#define I2S_PSC_BASE PSC3_BASE_ADDR + +#define BCSR_PHYS_ADDR 0xAF000000 + +typedef volatile struct +{ + /*00*/ u16 whoami; + u16 reserved0; + /*04*/ u16 status; + u16 reserved1; + /*08*/ u16 switches; + u16 reserved2; + /*0C*/ u16 resets; + u16 reserved3; + /*10*/ u16 pcmcia; + u16 reserved4; + /*14*/ u16 pci; + u16 reserved5; + /*18*/ u16 leds; + u16 reserved6; + /*1C*/ u16 system; + u16 reserved7; + +} BCSR; + +static BCSR * const bcsr = (BCSR *)BCSR_PHYS_ADDR; + +/* + * Register bit definitions for the BCSRs + */ +#define BCSR_WHOAMI_DCID 0x000F +#define BCSR_WHOAMI_CPLD 0x00F0 +#define BCSR_WHOAMI_BOARD 0x0F00 + +#define BCSR_STATUS_PCMCIA0VS 0x0003 +#define BCSR_STATUS_PCMCIA1VS 0x000C +#define BCSR_STATUS_PCMCIA0FI 0x0010 +#define BCSR_STATUS_PCMCIA1FI 0x0020 +#define BCSR_STATUS_SWAPBOOT 0x0040 +#define BCSR_STATUS_SRAMWIDTH 0x0080 +#define BCSR_STATUS_FLASHBUSY 0x0100 +#define BCSR_STATUS_ROMBUSY 0x0200 +#define BCSR_STATUS_USBOTGID 0x0800 +#define BCSR_STATUS_U0RXD 0x1000 +#define BCSR_STATUS_U1RXD 0x2000 +#define BCSR_STATUS_U3RXD 0x8000 + +#define BCSR_SWITCHES_OCTAL 0x00FF +#define BCSR_SWITCHES_DIP_1 0x0080 +#define BCSR_SWITCHES_DIP_2 0x0040 +#define BCSR_SWITCHES_DIP_3 0x0020 +#define BCSR_SWITCHES_DIP_4 0x0010 +#define BCSR_SWITCHES_DIP_5 0x0008 +#define BCSR_SWITCHES_DIP_6 0x0004 +#define BCSR_SWITCHES_DIP_7 0x0002 +#define BCSR_SWITCHES_DIP_8 0x0001 +#define BCSR_SWITCHES_ROTARY 0x0F00 + +#define BCSR_RESETS_PHY0 0x0001 +#define BCSR_RESETS_PHY1 0x0002 +#define BCSR_RESETS_DC 0x0004 +#define BCSR_RESETS_WSC 0x2000 +#define BCSR_RESETS_SPISEL 0x4000 +#define BCSR_RESETS_DMAREQ 0x8000 + +#define BCSR_PCMCIA_PC0VPP 0x0003 +#define BCSR_PCMCIA_PC0VCC 0x000C +#define BCSR_PCMCIA_PC0DRVEN 0x0010 +#define BCSR_PCMCIA_PC0RST 0x0080 +#define BCSR_PCMCIA_PC1VPP 0x0300 +#define BCSR_PCMCIA_PC1VCC 0x0C00 +#define BCSR_PCMCIA_PC1DRVEN 0x1000 +#define BCSR_PCMCIA_PC1RST 0x8000 + +#define BCSR_PCI_M66EN 0x0001 +#define BCSR_PCI_M33 0x0100 +#define BCSR_PCI_EXTERNARB 0x0200 +#define BCSR_PCI_GPIO200RST 0x0400 +#define BCSR_PCI_CLKOUT 0x0800 +#define BCSR_PCI_CFGHOST 0x1000 + +#define BCSR_LEDS_DECIMALS 0x00FF +#define BCSR_LEDS_LED0 0x0100 +#define BCSR_LEDS_LED1 0x0200 +#define BCSR_LEDS_LED2 0x0400 +#define BCSR_LEDS_LED3 0x0800 + +#define BCSR_SYSTEM_VDDI 0x001F +#define BCSR_SYSTEM_POWEROFF 0x4000 +#define BCSR_SYSTEM_RESET 0x8000 + +#define PCMCIA_MAX_SOCK 1 +#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1) + +/* VPP/VCC */ +#define SET_VCC_VPP(VCC, VPP, SLOT)\ + ((((VCC)<<2) | ((VPP)<<0)) << ((SLOT)*8)) + +#if defined(CONFIG_MTD_PB1550_BOOT) && defined(CONFIG_MTD_PB1550_USER) +#define PB1550_BOTH_BANKS +#elif defined(CONFIG_MTD_PB1550_BOOT) && !defined(CONFIG_MTD_PB1550_USER) +#define PB1550_BOOT_ONLY +#elif !defined(CONFIG_MTD_PB1550_BOOT) && defined(CONFIG_MTD_PB1550_USER) +#define PB1550_USER_ONLY +#endif + +#define NAND_PHYS_ADDR 0x20000000 +/* Timing values as described in databook, * ns value stripped of + * lower 2 bits. + * These defines are here rather than an SOC1550 generic file because + * the parts chosen on another board may be different and may require + * different timings. + */ +#define NAND_T_H (18 >> 2) +#define NAND_T_PUL (30 >> 2) +#define NAND_T_SU (30 >> 2) +#define NAND_T_WH (30 >> 2) + +/* Bitfield shift amounts */ +#define NAND_T_H_SHIFT 0 +#define NAND_T_PUL_SHIFT 4 +#define NAND_T_SU_SHIFT 8 +#define NAND_T_WH_SHIFT 12 + +#define NAND_TIMING ((NAND_T_H & 0xF) << NAND_T_H_SHIFT) | \ + ((NAND_T_PUL & 0xF) << NAND_T_PUL_SHIFT) | \ + ((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \ + ((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT) + +#endif /* __ASM_PB1550_H */ diff -urN linux-2.4.28-bk3/include/asm-mips/pgtable-bits.h linux-2.4.28-bk4/include/asm-mips/pgtable-bits.h --- linux-2.4.28-bk3/include/asm-mips/pgtable-bits.h 2003-08-25 04:44:44.000000000 -0700 +++ linux-2.4.28-bk4/include/asm-mips/pgtable-bits.h 2004-11-23 02:49:27.584399824 -0800 @@ -49,6 +49,10 @@ #define _PAGE_SILENT_WRITE (1<<2) #define _CACHE_MASK (7<<3) +#ifdef CONFIG_SOC_AU1X00 +#define _CACHE_CACHABLE_COW (3<<3) +#endif + /* MIPS32 defines only values 2 and 3. The rest are implementation * dependent. */ diff -urN linux-2.4.28-bk3/include/asm-mips/prefetch.h linux-2.4.28-bk4/include/asm-mips/prefetch.h --- linux-2.4.28-bk3/include/asm-mips/prefetch.h 2004-02-18 05:36:32.000000000 -0800 +++ linux-2.4.28-bk4/include/asm-mips/prefetch.h 2004-11-23 02:49:27.584399824 -0800 @@ -21,8 +21,9 @@ * RM7000 version 1.0 interprets all hints as Pref_Load; version 2.0 implements * Pref_PrepareForStore also. * - * RM9000 is MIPS IV but implements prefetching like MIPS32/MIPS64; - * it's Pref_WriteBackInvalidate is a nop. + * RM9000 is MIPS IV but implements prefetching like MIPS32/MIPS64; it's + * Pref_WriteBackInvalidate is a nop and Pref_PrepareForStore is broken in + * current versions due to erratum G105. * * VR7701 only implements the Load prefetch. * diff -urN linux-2.4.28-bk3/include/asm-mips/processor.h linux-2.4.28-bk4/include/asm-mips/processor.h --- linux-2.4.28-bk3/include/asm-mips/processor.h 2004-02-18 05:36:32.000000000 -0800 +++ linux-2.4.28-bk4/include/asm-mips/processor.h 2004-11-23 02:49:27.584399824 -0800 @@ -96,6 +96,8 @@ #define cpu_has_dc_aliases (cpu_data[0].dcache.flags & MIPS_CACHE_ALIASES) #define cpu_has_ic_fills_f_dc (cpu_data[0].dcache.flags & MIPS_CACHE_IC_F_DC) #define cpu_has_64bits (cpu_data[0].isa_level & MIPS_CPU_ISA_64BIT) +#define cpu_has_64bit_zero_reg (cpu_data[0].isa_level & MIPS_CPU_ISA_64BIT) +#define cpu_has_64bit_gp_regs 0 #define cpu_has_64bit_addresses 0 #define cpu_has_subset_pcaches (cpu_data[0].options & MIPS_CPU_SUBSET_CACHES) diff -urN linux-2.4.28-bk3/include/asm-mips/serial.h linux-2.4.28-bk4/include/asm-mips/serial.h --- linux-2.4.28-bk3/include/asm-mips/serial.h 2004-02-18 05:36:32.000000000 -0800 +++ linux-2.4.28-bk4/include/asm-mips/serial.h 2004-11-23 02:49:27.585399865 -0800 @@ -160,6 +160,7 @@ #ifdef CONFIG_AU1X00_UART #include +#ifdef CONFIG_SOC_AU1000 #define AU1000_SERIAL_PORT_DEFNS \ { .baud_base = 0, .port = UART0_ADDR, .irq = AU1000_UART0_INT, \ .flags = STD_COM_FLAGS, .type = 1 }, \ @@ -169,6 +170,44 @@ .flags = STD_COM_FLAGS, .type = 1 }, \ { .baud_base = 0, .port = UART3_ADDR, .irq = AU1000_UART3_INT, \ .flags = STD_COM_FLAGS, .type = 1 }, +#endif + +#ifdef CONFIG_SOC_AU1500 +#define AU1000_SERIAL_PORT_DEFNS \ + { .baud_base = 0, .port = UART0_ADDR, .irq = AU1500_UART0_INT, \ + .flags = STD_COM_FLAGS, .type = 1 }, \ + { .baud_base = 0, .port = UART3_ADDR, .irq = AU1500_UART3_INT, \ + .flags = STD_COM_FLAGS, .type = 1 }, +#endif + +#ifdef CONFIG_SOC_AU1100 +#define AU1000_SERIAL_PORT_DEFNS \ + { .baud_base = 0, .port = UART0_ADDR, .irq = AU1100_UART0_INT, \ + .flags = STD_COM_FLAGS, .type = 1 }, \ + { .baud_base = 0, .port = UART1_ADDR, .irq = AU1100_UART1_INT, \ + .flags = STD_COM_FLAGS, .type = 1 }, \ + { .baud_base = 0, .port = UART3_ADDR, .irq = AU1100_UART3_INT, \ + .flags = STD_COM_FLAGS, .type = 1 }, +#endif + +#ifdef CONFIG_SOC_AU1550 +#define AU1000_SERIAL_PORT_DEFNS \ + { .baud_base = 0, .port = UART0_ADDR, .irq = AU1550_UART0_INT, \ + .flags = STD_COM_FLAGS, .type = 1 }, \ + { .baud_base = 0, .port = UART1_ADDR, .irq = AU1550_UART1_INT, \ + .flags = STD_COM_FLAGS, .type = 1 }, \ + { .baud_base = 0, .port = UART3_ADDR, .irq = AU1550_UART3_INT, \ + .flags = STD_COM_FLAGS, .type = 1 }, +#endif + +#ifdef CONFIG_SOC_AU1200 +#define AU1000_SERIAL_PORT_DEFNS \ + { .baud_base = 0, .port = UART0_ADDR, .irq = AU1200_UART0_INT, \ + .flags = STD_COM_FLAGS, .type = 1 }, \ + { .baud_base = 0, .port = UART1_ADDR, .irq = AU1200_UART1_INT, \ + .flags = STD_COM_FLAGS, .type = 1 }, +#endif + #else #define AU1000_SERIAL_PORT_DEFNS #endif @@ -323,6 +362,24 @@ #define MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS #endif +#ifdef CONFIG_PMC_STRETCH +/* 16550 Compatible. FIXME: Need to get the defines below */ + +#define PMC_STRETCH_BASE_BAUD ( 1843200 / 16 ) +#define PMC_STRETCH_IRQ 0 +#define PMC_STRETCH_BASE_ADDRESS 0xbd110000 + +#define _PMC_STRETCH_SERIAL_INIT(int, base) \ + { baud_base: PMC_STRETCH_BASE_BAUD, irq: int, \ + flags: STD_COM_FLAGS, iomem_base: (u8 *) base, \ + iomem_reg_shift: 2, io_type: SERIAL_IO_MEM } + +#define PMC_STRETCH_SERIAL_PORT_DEFNS \ + _PMC_STRETCH_SERIAL_INIT(PMC_STRETCH_IRQ, PMC_STRETCH_BASE_ADDRESS) +#else +#define PMC_STRETCH_SERIAL_PORT_DEFNS +#endif + #ifdef CONFIG_MOMENCO_JAGUAR_ATX /* Ordinary NS16552 duart with a 20MHz crystal. */ #define JAGUAR_ATX_BASE_BAUD ( 20000000 / 16 ) @@ -425,6 +482,7 @@ MOMENCO_OCELOT_G_SERIAL_PORT_DEFNS \ MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS \ MOMENCO_JAGUAR_ATX_SERIAL_PORT_DEFNS \ + PMC_STRETCH_SERIAL_PORT_DEFNS \ SEAD_SERIAL_PORT_DEFNS \ STD_SERIAL_PORT_DEFNS \ TITAN_SERIAL_PORT_DEFNS \ diff -urN linux-2.4.28-bk3/include/asm-mips/sgiarcs.h linux-2.4.28-bk4/include/asm-mips/sgiarcs.h --- linux-2.4.28-bk3/include/asm-mips/sgiarcs.h 2003-08-25 04:44:44.000000000 -0700 +++ linux-2.4.28-bk4/include/asm-mips/sgiarcs.h 2004-11-23 02:49:27.586399906 -0800 @@ -369,7 +369,7 @@ #define __arc_clobbers \ "$2","$3" /* ... */, "$8","$9","$10","$11", \ - "$12","$13","$14","$15","$16","$24","25","$31" + "$12","$13","$14","$15","$16","$24","$25","$31" #define ARC_CALL0(dest) \ ({ long __res; \ @@ -462,7 +462,7 @@ long __vec = (long) romvec->dest; \ __asm__ __volatile__( \ "dsubu\t$29, 32\n\t" \ - "sw\t%6, 16($29)\n\t" \ + "sw\t%7, 16($29)\n\t" \ "jalr\t%1\n\t" \ "daddu\t$29, 32\n\t" \ "move\t%0, $2" \ diff -urN linux-2.4.28-bk3/include/asm-mips/siginfo.h linux-2.4.28-bk4/include/asm-mips/siginfo.h --- linux-2.4.28-bk3/include/asm-mips/siginfo.h 2004-02-18 05:36:32.000000000 -0800 +++ linux-2.4.28-bk4/include/asm-mips/siginfo.h 2004-11-23 02:49:27.587399946 -0800 @@ -3,11 +3,13 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 1998, 1999, 2003 by Ralf Baechle + * Copyright (C) 1998, 1999, 2001, 03, 04 Ralf Baechle + * Copyright (C) 2000, 2001 Silicon Graphics, Inc. */ #ifndef _ASM_SIGINFO_H #define _ASM_SIGINFO_H +#include #include /* This structure matches IRIX 32/n32 ABIs for binary compatibility. */ @@ -21,12 +23,18 @@ has Linux extensions. */ #define SI_MAX_SIZE 128 +#ifdef CONFIG_MIPS32 #define SI_PAD_SIZE ((SI_MAX_SIZE/sizeof(int)) - 3) +#endif +#ifdef CONFIG_MIPS64 +#define SI_PAD_SIZE ((SI_MAX_SIZE/sizeof(int)) - 4) +#endif typedef struct siginfo { int si_signo; int si_code; int si_errno; + int __pad0[SI_MAX_SIZE / sizeof(int) - SI_PAD_SIZE - 3]; union { int _pad[SI_PAD_SIZE]; @@ -41,8 +49,8 @@ struct { pid_t _pid; /* which child */ uid_t _uid; /* sender's uid */ - clock_t _utime; int _status; /* exit code */ + clock_t _utime; clock_t _stime; } _sigchld; @@ -61,7 +69,7 @@ /* SIGPOLL, SIGXFSZ (To do ...) */ struct { - int _band; /* POLL_IN, POLL_OUT, POLL_MSG */ + long _band; /* POLL_IN, POLL_OUT, POLL_MSG */ int _fd; } _sigpoll; diff -urN linux-2.4.28-bk3/include/asm-mips/smp.h linux-2.4.28-bk4/include/asm-mips/smp.h --- linux-2.4.28-bk3/include/asm-mips/smp.h 2004-02-18 05:36:32.000000000 -0800 +++ linux-2.4.28-bk4/include/asm-mips/smp.h 2004-11-23 02:49:27.587399946 -0800 @@ -106,7 +106,7 @@ * Clear all undefined state in the cpu, set up sp and gp to the passed * values, and kick the cpu into smp_bootstrap(); */ -void prom_boot_secondary(int cpu, unsigned long sp, unsigned long gp); +int prom_boot_secondary(int cpu, unsigned long sp, unsigned long gp); /* * After we've done initial boot, this function is called to allow the diff -urN linux-2.4.28-bk3/include/asm-mips/uaccess.h linux-2.4.28-bk4/include/asm-mips/uaccess.h --- linux-2.4.28-bk3/include/asm-mips/uaccess.h 2004-02-18 05:36:32.000000000 -0800 +++ linux-2.4.28-bk4/include/asm-mips/uaccess.h 2004-11-23 02:49:27.589400028 -0800 @@ -3,19 +3,17 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 1996, 1997, 1998, 1999, 2000, 03 by Ralf Baechle + * Copyright (C) 1996, 1997, 1998, 1999, 2000, 03, 04 by Ralf Baechle * Copyright (C) 1999, 2000 Silicon Graphics, Inc. */ #ifndef _ASM_UACCESS_H #define _ASM_UACCESS_H +#include #include #include #include -#define STR(x) __STR(x) -#define __STR(x) #x - /* * The fs value determines whether argument validity checking should be * performed or not. If get_fs() == USER_DS, checking is performed, with @@ -23,15 +21,47 @@ * * For historical reasons, these macros are grossly misnamed. */ -#define KERNEL_DS ((mm_segment_t) { (unsigned long) 0L }) -#define USER_DS ((mm_segment_t) { (unsigned long) -1L }) +#ifdef CONFIG_MIPS32 + +#define __UA_LIMIT 0x80000000UL + +#define __UA_ADDR ".word" +#define __UA_LA "la" +#define __UA_ADDU "addu" +#define __UA_t0 "$8" +#define __UA_t1 "$9" + +#endif /* CONFIG_MIPS32 */ + +#ifdef CONFIG_MIPS64 + +#define __UA_LIMIT (- TASK_SIZE) + +#define __UA_ADDR ".dword" +#define __UA_LA "dla" +#define __UA_ADDU "daddu" +#define __UA_t0 "$12" +#define __UA_t1 "$13" + +#endif /* CONFIG_MIPS64 */ + +/* + * USER_DS is a bitmask that has the bits set that may not be set in a valid + * userspace address. Note that we limit 32-bit userspace to 0x7fff8000 but + * the arithmetic we're doing only works if the limit is a power of two, so + * we use 0x80000000 here on 32-bit kernels. If a process passes an invalid + * address in this range it's the process's problem, not ours :-) + */ + +#define KERNEL_DS ((mm_segment_t) { 0UL }) +#define USER_DS ((mm_segment_t) { __UA_LIMIT }) #define VERIFY_READ 0 #define VERIFY_WRITE 1 -#define get_fs() (current->thread.current_ds) #define get_ds() (KERNEL_DS) -#define set_fs(x) (current->thread.current_ds=(x)) +#define get_fs() (current->thread.current_ds) +#define set_fs(x) (current->thread.current_ds = (x)) #define segment_eq(a,b) ((a).seg == (b).seg) @@ -45,14 +75,12 @@ * - AND "size" doesn't have any high-bits set * - AND "addr+size" doesn't have any high-bits set * - OR we are in kernel mode. + * + * __ua_size() is a trick to avoid runtime checking of positive constant + * sizes; for those we already know at compile time that the size is ok. */ #define __ua_size(size) \ - (__builtin_constant_p(size) && (signed long) (size) > 0 ? 0 : (size)) - -#define __access_ok(addr,size,mask) \ - (((signed long)((mask)&(addr | (addr + size) | __ua_size(size)))) >= 0) - -#define __access_mask ((long)(get_fs().seg)) + ((__builtin_constant_p(size) && (signed long) (size) > 0) ? 0 : (size)) /* * access_ok: - Checks if a user space pointer is valid @@ -73,8 +101,14 @@ * checks that the pointer is in the user space range - after calling * this function, memory access functions may still return -EFAULT. */ + +#define __access_mask get_fs().seg + +#define __access_ok(addr, size, mask) \ + (((signed long)((mask) & ((addr) | ((addr) + (size)) | __ua_size(size)))) == 0) + #define access_ok(type, addr, size) \ - likely(__access_ok((unsigned long)(addr), (size), __access_mask)) + likely(__access_ok((unsigned long)(addr), (size),__access_mask)) /* * verify_area: - Obsolete, use access_ok() @@ -190,89 +224,87 @@ * for 32 bit mode and old iron. */ #ifdef __mips64 -#define __GET_USER_DW __get_user_asm("ld") +#define __GET_USER_DW(__gu_err) __get_user_asm("ld", __gu_err) #else -#define __GET_USER_DW __get_user_asm_ll32 +#define __GET_USER_DW(__gu_err) __get_user_asm_ll32(__gu_err) #endif #define __get_user_nocheck(x,ptr,size) \ ({ \ - long __gu_err; \ - __typeof(*(ptr)) __gu_val; \ + long __gu_err = 0; \ + __typeof(*(ptr)) __gu_val = 0; \ long __gu_addr; \ - __asm__("":"=r" (__gu_val)); \ __gu_addr = (long) (ptr); \ - __asm__("":"=r" (__gu_err)); \ switch (size) { \ - case 1: __get_user_asm("lb"); break; \ - case 2: __get_user_asm("lh"); break; \ - case 4: __get_user_asm("lw"); break; \ - case 8: __GET_USER_DW; break; \ - default: __get_user_unknown(); break; \ - } x = (__typeof__(*(ptr))) __gu_val; \ + case 1: __get_user_asm("lb", __gu_err); break; \ + case 2: __get_user_asm("lh", __gu_err); break; \ + case 4: __get_user_asm("lw", __gu_err); break; \ + case 8: __GET_USER_DW(__gu_err); break; \ + default: __get_user_unknown(); break; \ + } \ + x = (__typeof__(*(ptr))) __gu_val; \ __gu_err; \ }) #define __get_user_check(x,ptr,size) \ ({ \ + __typeof__(*(ptr)) __gu_val = 0; \ + long __gu_addr = (long) (ptr); \ long __gu_err; \ - __typeof__(*(ptr)) __gu_val; \ - long __gu_addr; \ - __asm__("":"=r" (__gu_val)); \ - __gu_addr = (long) (ptr); \ - __asm__("":"=r" (__gu_err)); \ - if (access_ok(VERIFY_READ, __gu_addr, size)) { \ + \ + __gu_err = verify_area(VERIFY_READ, (void *) __gu_addr, size); \ + \ + if (likely(!__gu_err)) { \ switch (size) { \ - case 1: __get_user_asm("lb"); break; \ - case 2: __get_user_asm("lh"); break; \ - case 4: __get_user_asm("lw"); break; \ - case 8: __GET_USER_DW; break; \ + case 1: __get_user_asm("lb", __gu_err); break; \ + case 2: __get_user_asm("lh", __gu_err); break; \ + case 4: __get_user_asm("lw", __gu_err); break; \ + case 8: __GET_USER_DW(__gu_err); break; \ default: __get_user_unknown(); break; \ } \ - } x = (__typeof__(*(ptr))) __gu_val; \ - __gu_err; \ + } \ + x = (__typeof__(*(ptr))) __gu_val; \ + __gu_err; \ }) -#define __get_user_asm(insn) \ +#define __get_user_asm(insn,__gu_err) \ ({ \ __asm__ __volatile__( \ - "1:\t" insn "\t%1,%2\n\t" \ - "move\t%0,$0\n" \ - "2:\n\t" \ - ".section\t.fixup,\"ax\"\n" \ - "3:\tli\t%0,%3\n\t" \ - "move\t%1,$0\n\t" \ - "j\t2b\n\t" \ - ".previous\n\t" \ - ".section\t__ex_table,\"a\"\n\t" \ - ".word\t1b,3b\n\t" \ - ".previous" \ - :"=r" (__gu_err), "=r" (__gu_val) \ - :"o" (__m(__gu_addr)), "i" (-EFAULT)); \ + "1: " insn " %1, %3 \n" \ + "2: \n" \ + " .section .fixup,\"ax\" \n" \ + "3: li %0, %4 \n" \ + " j 2b \n" \ + " .previous \n" \ + " .section __ex_table,\"a\" \n" \ + " "__UA_ADDR "\t1b, 3b \n" \ + " .previous \n" \ + : "=r" (__gu_err), "=r" (__gu_val) \ + : "0" (__gu_err), "o" (__m(__gu_addr)), "i" (-EFAULT)); \ }) /* * Get a long long 64 using 32 bit registers. */ -#define __get_user_asm_ll32 \ +#define __get_user_asm_ll32(__gu_err) \ ({ \ -__asm__ __volatile__( \ - "1:\tlw\t%1,%2\n" \ - "2:\tlw\t%D1,%3\n\t" \ - "move\t%0,$0\n" \ - "3:\t.section\t.fixup,\"ax\"\n" \ - "4:\tli\t%0,%4\n\t" \ - "move\t%1,$0\n\t" \ - "move\t%D1,$0\n\t" \ - "j\t3b\n\t" \ - ".previous\n\t" \ - ".section\t__ex_table,\"a\"\n\t" \ - ".word\t1b,4b\n\t" \ - ".word\t2b,4b\n\t" \ - ".previous" \ - :"=r" (__gu_err), "=&r" (__gu_val) \ - :"o" (__m(__gu_addr)), "o" (__m(__gu_addr + 4)), \ - "i" (-EFAULT)); \ + __asm__ __volatile__( \ + "1: lw %1, %3 \n" \ + "2: lw %D1, %4 \n" \ + " move %0, $0 \n" \ + "3: .section .fixup,\"ax\" \n" \ + "4: li %0, %5 \n" \ + " move %1, $0 \n" \ + " move %D1, $0 \n" \ + " j 3b \n" \ + " .previous \n" \ + " .section __ex_table,\"a\" \n" \ + " " __UA_ADDR " 1b, 4b \n" \ + " " __UA_ADDR " 2b, 4b \n" \ + " .previous \n" \ + : "=r" (__gu_err), "=&r" (__gu_val) \ + : "0" (__gu_err), "o" (__m(__gu_addr)), \ + "o" (__m(__gu_addr + 4)), "i" (-EFAULT)); \ }) extern void __get_user_unknown(void); @@ -282,84 +314,82 @@ * for 32 bit mode and old iron. */ #ifdef __mips64 -#define __PUT_USER_DW __put_user_asm("sd") +#define __PUT_USER_DW(__pu_val) __put_user_asm("sd", __pu_val) #else -#define __PUT_USER_DW __put_user_asm_ll32 +#define __PUT_USER_DW(__pu_val) __put_user_asm_ll32(__pu_val) #endif #define __put_user_nocheck(x,ptr,size) \ ({ \ - long __pu_err; \ + long __pu_err = 0; \ __typeof__(*(ptr)) __pu_val; \ long __pu_addr; \ __pu_val = (x); \ __pu_addr = (long) (ptr); \ - __asm__("":"=r" (__pu_err)); \ switch (size) { \ - case 1: __put_user_asm("sb"); break; \ - case 2: __put_user_asm("sh"); break; \ - case 4: __put_user_asm("sw"); break; \ - case 8: __PUT_USER_DW; break; \ - default: __put_user_unknown(); break; \ + case 1: __put_user_asm("sb", __pu_val); break; \ + case 2: __put_user_asm("sh", __pu_val); break; \ + case 4: __put_user_asm("sw", __pu_val); break; \ + case 8: __PUT_USER_DW(__pu_val); break; \ + default: __put_user_unknown(); break; \ } \ __pu_err; \ }) #define __put_user_check(x,ptr,size) \ ({ \ + __typeof__(*(ptr)) __pu_val = (x); \ + long __pu_addr = (long) (ptr); \ long __pu_err; \ - __typeof__(*(ptr)) __pu_val; \ - long __pu_addr; \ - __pu_val = (x); \ - __pu_addr = (long) (ptr); \ - __asm__("":"=r" (__pu_err)); \ - if (access_ok(VERIFY_WRITE, __pu_addr, size)) { \ + \ + __pu_err = verify_area(VERIFY_WRITE, (void *) __pu_addr, size); \ + \ + if (likely(!__pu_err)) { \ switch (size) { \ - case 1: __put_user_asm("sb"); break; \ - case 2: __put_user_asm("sh"); break; \ - case 4: __put_user_asm("sw"); break; \ - case 8: __PUT_USER_DW; break; \ + case 1: __put_user_asm("sb", __pu_val); break; \ + case 2: __put_user_asm("sh", __pu_val); break; \ + case 4: __put_user_asm("sw", __pu_val); break; \ + case 8: __PUT_USER_DW(__pu_val); break; \ default: __put_user_unknown(); break; \ } \ } \ __pu_err; \ }) -#define __put_user_asm(insn) \ +#define __put_user_asm(insn, __pu_val) \ ({ \ __asm__ __volatile__( \ - "1:\t" insn "\t%z1, %2\t\t\t# __put_user_asm\n\t" \ - "move\t%0, $0\n" \ - "2:\n\t" \ - ".section\t.fixup,\"ax\"\n" \ - "3:\tli\t%0, %3\n\t" \ - "j\t2b\n\t" \ - ".previous\n\t" \ - ".section\t__ex_table,\"a\"\n\t" \ - ".word\t1b, 3b\n\t" \ - ".previous" \ - :"=r" (__pu_err) \ - :"Jr" (__pu_val), "o" (__m(__pu_addr)), "i" (-EFAULT)); \ -}) - -#define __put_user_asm_ll32 \ -({ \ -__asm__ __volatile__( \ - "1:\tsw\t%1, %2\t\t\t# __put_user_asm_ll32\n\t" \ - "2:\tsw\t%D1, %3\n" \ - "move\t%0, $0\n" \ - "3:\n\t" \ - ".section\t.fixup,\"ax\"\n" \ - "4:\tli\t%0, %4\n\t" \ - "j\t3b\n\t" \ - ".previous\n\t" \ - ".section\t__ex_table,\"a\"\n\t" \ - ".word\t1b,4b\n\t" \ - ".word\t2b,4b\n\t" \ - ".previous" \ - :"=r" (__pu_err) \ - :"r" (__pu_val), "o" (__m(__pu_addr)), "o" (__m(__pu_addr + 4)),\ - "i" (-EFAULT)); \ + "1: " insn " %z2, %3 # __put_user_asm\n" \ + "2: \n" \ + " .section .fixup,\"ax\" \n" \ + "3: li %0, %4 \n" \ + " j 2b \n" \ + " .previous \n" \ + " .section __ex_table,\"a\" \n" \ + " " __UA_ADDR " 1b, 3b \n" \ + " .previous \n" \ + : "=r" (__pu_err) \ + : "0" (__pu_err), "Jr" (__pu_val), "o" (__m(__pu_addr)), \ + "i" (-EFAULT)); \ +}) + +#define __put_user_asm_ll32(__pu_val) \ +({ \ + __asm__ __volatile__( \ + "1: sw %2, %3 # __put_user_asm_ll32 \n" \ + "2: sw %D2, %4 \n" \ + "3: \n" \ + " .section .fixup,\"ax\" \n" \ + "4: li %0, %5 \n" \ + " j 3b \n" \ + " .previous \n" \ + " .section __ex_table,\"a\" \n" \ + " " __UA_ADDR " 1b, 4b \n" \ + " " __UA_ADDR " 2b, 4b \n" \ + " .previous" \ + : "=r" (__pu_err) \ + : "0" (__pu_err), "r" (__pu_val), "o" (__m(__pu_addr)), \ + "o" (__m(__pu_addr + 4)), "i" (-EFAULT)); \ }) extern void __put_user_unknown(void); @@ -371,7 +401,7 @@ #ifdef MODULE #define __MODULE_JAL(destination) \ ".set\tnoat\n\t" \ - "la\t$1, " #destination "\n\t" \ + __UA_LA "\t$1, " #destination "\n\t" \ "jalr\t$1\n\t" \ ".set\tat\n\t" #else @@ -426,6 +456,9 @@ __cu_len; \ }) +#define __copy_to_user_inatomic __copy_to_user +#define __copy_from_user_inatomic __copy_from_user + /* * copy_to_user: - Copy a block of data into user space. * @to: Destination address, in user space. @@ -467,9 +500,9 @@ ".set\tnoreorder\n\t" \ __MODULE_JAL(__copy_user) \ ".set\tnoat\n\t" \ - "addu\t$1, %1, %2\n\t" \ + __UA_ADDU "\t$1, %1, %2\n\t" \ ".set\tat\n\t" \ - ".set\treorder\n\t" \ + ".set\treorder" \ : "+r" (__cu_to_r), "+r" (__cu_from_r), "+r" (__cu_len_r) \ : \ : "$8", "$9", "$10", "$11", "$12", "$15", "$24", "$31", \ @@ -562,7 +595,7 @@ "move\t%0, $6" : "=r" (res) : "r" (addr), "r" (size) - : "$4", "$5", "$6", "$8", "$9", "$31"); + : "$4", "$5", "$6", __UA_t0, __UA_t1, "$31"); return res; } @@ -610,7 +643,7 @@ "move\t%0, $2" : "=r" (res) : "r" (__to), "r" (__from), "r" (__len) - : "$2", "$3", "$4", "$5", "$6", "$8", "$31", "memory"); + : "$2", "$3", "$4", "$5", "$6", __UA_t0, "$31", "memory"); return res; } @@ -646,7 +679,7 @@ "move\t%0, $2" : "=r" (res) : "r" (__to), "r" (__from), "r" (__len) - : "$2", "$3", "$4", "$5", "$6", "$8", "$31", "memory"); + : "$2", "$3", "$4", "$5", "$6", __UA_t0, "$31", "memory"); return res; } @@ -662,7 +695,7 @@ "move\t%0, $2" : "=r" (res) : "r" (s) - : "$2", "$4", "$8", "$31"); + : "$2", "$4", __UA_t0, "$31"); return res; } @@ -691,7 +724,24 @@ "move\t%0, $2" : "=r" (res) : "r" (s) - : "$2", "$4", "$8", "$31"); + : "$2", "$4", __UA_t0, "$31"); + + return res; +} + +/* Returns: 0 if bad, string length+1 (memory size) of string if ok */ +static inline long __strnlen_user(const char *s, long n) +{ + long res; + + __asm__ __volatile__( + "move\t$4, %1\n\t" + "move\t$5, %2\n\t" + __MODULE_JAL(__strnlen_user_nocheck_asm) + "move\t%0, $2" + : "=r" (res) + : "r" (s), "r" (n) + : "$2", "$4", "$5", __UA_t0, "$31"); return res; } @@ -699,13 +749,16 @@ /* * strlen_user: - Get the size of a string in user space. * @str: The string to measure. - * @n: The maximum valid length + * + * Context: User context only. This function may sleep. * * Get the size of a NUL-terminated string in user space. * * Returns the size of the string INCLUDING the terminating NUL. * On exception, returns 0. - * If the string is too long, returns a value greater than @n. + * + * If there is a limit on the length of a valid string, you may wish to + * consider using strnlen_user() instead. */ static inline long strnlen_user(const char *s, long n) { @@ -718,7 +771,7 @@ "move\t%0, $2" : "=r" (res) : "r" (s), "r" (n) - : "$2", "$4", "$5", "$8", "$31"); + : "$2", "$4", "$5", __UA_t0, "$31"); return res; } diff -urN linux-2.4.28-bk3/include/asm-mips/unaligned.h linux-2.4.28-bk4/include/asm-mips/unaligned.h --- linux-2.4.28-bk3/include/asm-mips/unaligned.h 2002-11-28 15:53:15.000000000 -0800 +++ linux-2.4.28-bk4/include/asm-mips/unaligned.h 2004-11-23 02:49:27.589400028 -0800 @@ -3,157 +3,142 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 1996, 1999, 2000 by Ralf Baechle - * Copyright (C) 1999, 2000 Silicon Graphics, Inc. + * Copyright (C) 1996, 1999, 2000, 2001, 2003 by Ralf Baechle + * Copyright (C) 1999, 2000, 2001 Silicon Graphics, Inc. */ #ifndef _ASM_UNALIGNED_H #define _ASM_UNALIGNED_H -extern void __get_unaligned_bad_length(void); -extern void __put_unaligned_bad_length(void); +#include /* - * Load double unaligned. + * get_unaligned - get value from possibly mis-aligned location + * @ptr: pointer to value + * + * This macro should be used for accessing values larger in size than + * single bytes at locations that are expected to be improperly aligned, + * e.g. retrieving a u16 value from a location not u16-aligned. * - * This could have been implemented in plain C like IA64 but egcs 1.0.3a - * inflates this to 23 instructions ... + * Note that unaligned accesses can be very expensive on some architectures. */ -static inline unsigned long long __ldq_u(const unsigned long long * __addr) -{ - unsigned long long __res; +#define get_unaligned(ptr) \ + ((__typeof__(*(ptr)))__get_unaligned((ptr), sizeof(*(ptr)))) - __asm__("ulw\t%0, %1\n\t" - "ulw\t%D0, 4+%1" - : "=&r" (__res) - : "m" (*__addr)); - - return __res; -} +/* + * put_unaligned - put value to a possibly mis-aligned location + * @val: value to place + * @ptr: pointer to location + * + * This macro should be used for placing values larger in size than + * single bytes at locations that are expected to be improperly aligned, + * e.g. writing a u16 value to a location not u16-aligned. + * + * Note that unaligned accesses can be very expensive on some architectures. + */ +#define put_unaligned(x,ptr) \ + __put_unaligned((__u64)(x), (ptr), sizeof(*(ptr))) /* - * Load word unaligned. + * This is a silly but good way to make sure that + * the get/put functions are indeed always optimized, + * and that we use the correct sizes. */ -static inline unsigned long __ldl_u(const unsigned int * __addr) -{ - unsigned long __res; +extern void bad_unaligned_access_length(void); - __asm__("ulw\t%0,%1" - : "=&r" (__res) - : "m" (*__addr)); +/* + * EGCS 1.1 knows about arbitrary unaligned loads. Define some + * packed structures to talk about such things with. + */ - return __res; -} +struct __una_u64 { __u64 x __attribute__((packed)); }; +struct __una_u32 { __u32 x __attribute__((packed)); }; +struct __una_u16 { __u16 x __attribute__((packed)); }; /* - * Load halfword unaligned. + * Elemental unaligned loads */ -static inline unsigned long __ldw_u(const unsigned short * __addr) + +static inline __u64 __uldq(const __u64 * r11) { - unsigned long __res; + const struct __una_u64 *ptr = (const struct __una_u64 *) r11; + return ptr->x; +} - __asm__("ulh\t%0,%1" - : "=&r" (__res) - : "m" (*__addr)); +static inline __u32 __uldl(const __u32 * r11) +{ + const struct __una_u32 *ptr = (const struct __una_u32 *) r11; + return ptr->x; +} - return __res; +static inline __u16 __uldw(const __u16 * r11) +{ + const struct __una_u16 *ptr = (const struct __una_u16 *) r11; + return ptr->x; } /* - * Store doubleword ununaligned. + * Elemental unaligned stores */ -static inline void __stq_u(unsigned long __val, unsigned long long * __addr) + +static inline void __ustq(__u64 r5, __u64 * r11) { - __asm__("usw\t%1, %0\n\t" - "usw\t%D1, 4+%0" - : "=m" (*__addr) - : "r" (__val)); + struct __una_u64 *ptr = (struct __una_u64 *) r11; + ptr->x = r5; } -/* - * Store long ununaligned. - */ -static inline void __stl_u(unsigned long __val, unsigned int * __addr) +static inline void __ustl(__u32 r5, __u32 * r11) { - __asm__("usw\t%1, %0" - : "=m" (*__addr) - : "r" (__val)); + struct __una_u32 *ptr = (struct __una_u32 *) r11; + ptr->x = r5; } -/* - * Store word ununaligned. - */ -static inline void __stw_u(unsigned long __val, unsigned short * __addr) +static inline void __ustw(__u16 r5, __u16 * r11) { - __asm__("ush\t%1, %0" - : "=m" (*__addr) - : "r" (__val)); + struct __una_u16 *ptr = (struct __una_u16 *) r11; + ptr->x = r5; } -/* - * get_unaligned - get value from possibly mis-aligned location - * @ptr: pointer to value - * - * This macro should be used for accessing values larger in size than - * single bytes at locations that are expected to be improperly aligned, - * e.g. retrieving a u16 value from a location not u16-aligned. - * - * Note that unaligned accesses can be very expensive on some architectures. - */ -#define get_unaligned(ptr) \ -({ \ - __typeof__(*(ptr)) __val; \ - \ - switch (sizeof(*(ptr))) { \ - case 1: \ - __val = *(const unsigned char *)ptr; \ - break; \ - case 2: \ - __val = __ldw_u((const unsigned short *)ptr); \ - break; \ - case 4: \ - __val = __ldl_u((const unsigned int *)ptr); \ - break; \ - case 8: \ - __val = __ldq_u((const unsigned long long *)ptr); \ - break; \ - default: \ - __get_unaligned_bad_length(); \ - break; \ - } \ - \ - __val; \ -}) +static inline __u64 __get_unaligned(const void *ptr, size_t size) +{ + __u64 val; -/* - * put_unaligned - put value to a possibly mis-aligned location - * @val: value to place - * @ptr: pointer to location - * - * This macro should be used for placing values larger in size than - * single bytes at locations that are expected to be improperly aligned, - * e.g. writing a u16 value to a location not u16-aligned. - * - * Note that unaligned accesses can be very expensive on some architectures. - */ -#define put_unaligned(val,ptr) \ -do { \ - switch (sizeof(*(ptr))) { \ - case 1: \ - *(unsigned char *)(ptr) = (val); \ - break; \ - case 2: \ - __stw_u(val, (unsigned short *)(ptr)); \ - break; \ - case 4: \ - __stl_u(val, (unsigned int *)(ptr)); \ - break; \ - case 8: \ - __stq_u(val, (unsigned long long *)(ptr)); \ - break; \ - default: \ - __put_unaligned_bad_length(); \ - break; \ - } \ -} while(0) + switch (size) { + case 1: + val = *(const __u8 *)ptr; + break; + case 2: + val = __uldw((const __u16 *)ptr); + break; + case 4: + val = __uldl((const __u32 *)ptr); + break; + case 8: + val = __uldq((const __u64 *)ptr); + break; + default: + bad_unaligned_access_length(); + } + return val; +} + +static inline void __put_unaligned(__u64 val, void *ptr, size_t size) +{ + switch (size) { + case 1: + *(__u8 *)ptr = (val); + break; + case 2: + __ustw(val, (__u16 *)ptr); + break; + case 4: + __ustl(val, (__u32 *)ptr); + break; + case 8: + __ustq(val, (__u64 *)ptr); + break; + default: + bad_unaligned_access_length(); + } +} #endif /* _ASM_UNALIGNED_H */ diff -urN linux-2.4.28-bk3/include/asm-mips/unistd.h linux-2.4.28-bk4/include/asm-mips/unistd.h --- linux-2.4.28-bk3/include/asm-mips/unistd.h 2004-02-18 05:36:32.000000000 -0800 +++ linux-2.4.28-bk4/include/asm-mips/unistd.h 2004-11-23 02:49:27.591400109 -0800 @@ -491,7 +491,7 @@ #define __NR_semtimedop (__NR_Linux + 214) /* - * Offset of the last Linux flavoured syscall + * Offset of the last Linux 64-bit flavoured syscall */ #define __NR_Linux_syscalls 214 @@ -730,7 +730,7 @@ /* * Offset of the last N32 flavoured syscall */ -#define __NR_N32_Linux_syscalls 219 +#define __NR_Linux_syscalls 219 #endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */ @@ -754,7 +754,8 @@ ".set\treorder" \ : "=&r" (__v0), "=r" (__a3) \ : "i" (__NR_##name) \ - : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \ + : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ + "memory"); \ \ if (__a3 == 0) \ return (type) __v0; \ @@ -781,7 +782,8 @@ ".set\treorder" \ : "=&r" (__v0), "=r" (__a3) \ : "r" (__a0), "i" (__NR_##name) \ - : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \ + : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ + "memory"); \ \ if (__a3 == 0) \ return (type) __v0; \ @@ -805,7 +807,8 @@ ".set\treorder" \ : "=&r" (__v0), "=r" (__a3) \ : "r" (__a0), "r" (__a1), "i" (__NR_##name) \ - : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \ + : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ + "memory"); \ \ if (__a3 == 0) \ return (type) __v0; \ @@ -830,7 +833,8 @@ ".set\treorder" \ : "=&r" (__v0), "=r" (__a3) \ : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##name) \ - : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \ + : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ + "memory"); \ \ if (__a3 == 0) \ return (type) __v0; \ @@ -855,7 +859,8 @@ ".set\treorder" \ : "=&r" (__v0), "+r" (__a3) \ : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##name) \ - : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \ + : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ + "memory"); \ \ if (__a3 == 0) \ return (type) __v0; \ @@ -863,7 +868,7 @@ return -1; \ } -#if (_MIPS_SIM == _MIPS_SIM_ABIN32) +#if (_MIPS_SIM == _MIPS_SIM_ABI32) /* * Using those means your brain needs more than an oil change ;-) @@ -891,7 +896,8 @@ : "=&r" (__v0), "+r" (__a3) \ : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##name), \ "m" ((unsigned long)e) \ - : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \ + : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ + "memory"); \ \ if (__a3 == 0) \ return (type) __v0; \ @@ -923,7 +929,8 @@ : "=&r" (__v0), "+r" (__a3) \ : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##name), \ "m" ((unsigned long)e), "m" ((unsigned long)f) \ - : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \ + : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ + "memory"); \ \ if (__a3 == 0) \ return (type) __v0; \ @@ -931,9 +938,9 @@ return -1; \ } -#endif /* (_MIPS_SIM == _MIPS_SIM_ABIN32) */ +#endif /* (_MIPS_SIM == _MIPS_SIM_ABI32) */ -#if (_MIPS_SIM == _MIPS_SIM_NABIN32) || (_MIPS_SIM == _MIPS_SIM_ABI64) +#if (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64) #define _syscall5(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e) \ type name (atype a,btype b,ctype c,dtype d,etype e) \ @@ -951,9 +958,10 @@ "syscall\n\t" \ "move\t%0, $2\n\t" \ ".set\treorder" \ - : "=&r" (__v0), "+r" (__a3), "+r" (__a4) \ - : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##name) \ - : "$2","$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \ + : "=&r" (__v0), "+r" (__a3) \ + : "r" (__a0), "r" (__a1), "r" (__a2), "r" (__a4), "i" (__NR_##name) \ + : "$2", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ + "memory"); \ \ if (__a3 == 0) \ return (type) __v0; \ @@ -981,7 +989,8 @@ : "=&r" (__v0), "+r" (__a3) \ : "r" (__a0), "r" (__a1), "r" (__a2), "r" (__a4), "r" (__a5), \ "i" (__NR_##name) \ - : "$2","$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \ + : "$2", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ + "memory"); \ \ if (__a3 == 0) \ return (type) __v0; \ @@ -989,7 +998,7 @@ return -1; \ } -#endif /* (_MIPS_SIM == _MIPS_SIM_NABIN32) || (_MIPS_SIM == _MIPS_SIM_ABI64) */ +#endif /* (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64) */ #ifdef __KERNEL_SYSCALLS__ @@ -1015,7 +1024,7 @@ static inline _syscall3(int,execve,const char *,file,char **,argv,char **,envp) static inline _syscall3(int,open,const char *,file,int,flag,int,mode) static inline _syscall1(int,close,int,fd) -static inline _syscall1(int,_exit,int,exitcode) +static inline _syscall1(void,_exit,int,exitcode) static inline _syscall4(pid_t,wait4,pid_t,pid,int *,stat_addr,int,options,struct rusage *,ru) static inline _syscall1(int,delete_module,const char *,name) diff -urN linux-2.4.28-bk3/include/asm-mips/vr41xx/tb0229.h linux-2.4.28-bk4/include/asm-mips/vr41xx/tb0229.h --- linux-2.4.28-bk3/include/asm-mips/vr41xx/tb0229.h 2003-08-25 04:44:44.000000000 -0700 +++ linux-2.4.28-bk4/include/asm-mips/vr41xx/tb0229.h 2004-11-23 02:49:27.591400109 -0800 @@ -68,6 +68,6 @@ #define TB0219_RESET_REGS KSEG1ADDR(0x0a00000e) -extern void tanbac_tb0229_restart(char *command); +extern void tanbac_tb0219_restart(char *command); #endif /* __TANBAC_TB0229_H */ diff -urN linux-2.4.28-bk3/include/asm-mips/vr41xx/vr41xx.h linux-2.4.28-bk4/include/asm-mips/vr41xx/vr41xx.h --- linux-2.4.28-bk3/include/asm-mips/vr41xx/vr41xx.h 2004-02-18 05:36:32.000000000 -0800 +++ linux-2.4.28-bk4/include/asm-mips/vr41xx/vr41xx.h 2004-11-23 02:49:27.592400150 -0800 @@ -53,8 +53,6 @@ * Clock Mask Unit */ extern void vr41xx_cmu_init(void); -extern void vr41xx_clock_supply(unsigned int clock); -extern void vr41xx_clock_mask(unsigned int clock); enum { PIU_CLOCK, @@ -72,6 +70,9 @@ ETHER1_CLOCK }; +extern void vr41xx_supply_clock(unsigned int clock); +extern void vr41xx_mask_clock(unsigned int clock); + /* * Interrupt Control Unit */ @@ -134,6 +135,11 @@ extern int vr41xx_cascade_irq(unsigned int irq, int (*get_irq_number)(int irq)); /* + * Power Management Unit + */ +extern void vr41xx_pmu_init(void); + +/* * RTC */ extern void vr41xx_set_rtclong1_cycle(uint32_t cycles); @@ -208,9 +214,9 @@ * PCI Control Unit */ struct vr41xx_pci_address_space { - u32 internal_base; - u32 address_mask; - u32 pci_base; + uint32_t internal_base; + uint32_t address_mask; + uint32_t pci_base; }; struct vr41xx_pci_address_map { @@ -221,16 +227,14 @@ extern void vr41xx_pciu_init(struct vr41xx_pci_address_map *map); +extern struct pci_ops vr41xx_pci_ops; + /* * MISC */ extern void vr41xx_time_init(void); extern void vr41xx_timer_setup(struct irqaction *irq); -extern void vr41xx_restart(char *command); -extern void vr41xx_halt(void); -extern void vr41xx_power_off(void); - #if defined(CONFIG_IDE) || defined(CONFIG_IDE_MODULE) extern struct ide_ops vr41xx_ide_ops; #endif diff -urN linux-2.4.28-bk3/include/asm-mips/vr41xx/vrc4173.h linux-2.4.28-bk4/include/asm-mips/vr41xx/vrc4173.h --- linux-2.4.28-bk3/include/asm-mips/vr41xx/vrc4173.h 2004-02-18 05:36:32.000000000 -0800 +++ linux-2.4.28-bk4/include/asm-mips/vr41xx/vrc4173.h 2004-11-23 02:49:27.592400150 -0800 @@ -72,21 +72,23 @@ /* * Clock Mask Unit */ -#define VRC4173_PIU_CLOCK 0x0001 -#define VRC4173_KIU_CLOCK 0x0002 -#define VRC4173_AIU_CLOCK 0x0004 -#define VRC4173_PS2CH1_CLOCK 0x0008 -#define VRC4173_PS2CH2_CLOCK 0x0010 -#define VRC4173_USBU_PCI_CLOCK 0x0020 -#define VRC4173_CARDU1_PCI_CLOCK 0x0040 -#define VRC4173_CARDU2_PCI_CLOCK 0x0080 -#define VRC4173_AC97U_PCI_CLOCK 0x0100 -#define VRC4173_USBU_48MHz_CLOCK 0x0400 -#define VRC4173_EXT_48MHz_CLOCK 0x0800 -#define VRC4173_48MHz_CLOCK 0x1000 +enum { + VRC4173_PIU_CLOCK, + VRC4173_KIU_CLOCK, + VRC4173_AIU_CLOCK, + VRC4173_PS2_CH1_CLOCK, + VRC4173_PS2_CH2_CLOCK, + VRC4173_USBU_PCI_CLOCK, + VRC4173_CARDU1_PCI_CLOCK, + VRC4173_CARDU2_PCI_CLOCK, + VRC4173_AC97U_PCI_CLOCK, + VRC4173_USBU_48MHz_CLOCK, + VRC4173_EXT_48MHz_CLOCK, + VRC4173_48MHz_CLOCK, +}; -extern void vrc4173_clock_supply(u16 mask); -extern void vrc4173_clock_mask(u16 mask); +extern void vrc4173_supply_clock(unsigned int clock); +extern void vrc4173_mask_clock(unsigned int clock); /* * General-Purpose I/O Unit diff -urN linux-2.4.28-bk3/include/asm-mips/war.h linux-2.4.28-bk4/include/asm-mips/war.h --- linux-2.4.28-bk3/include/asm-mips/war.h 2003-08-25 04:44:44.000000000 -0700 +++ linux-2.4.28-bk4/include/asm-mips/war.h 2004-11-23 02:49:27.593400191 -0800 @@ -3,7 +3,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 2002 by Ralf Baechle + * Copyright (C) 2002, 2004 by Ralf Baechle */ #ifndef _ASM_WAR_H #define _ASM_WAR_H @@ -11,6 +11,15 @@ #include /* + * Another R4600 erratum. Due to the lack of errata information the exact + * technical details aren't known. I've experimentally found that disabling + * interrupts during indexed I-cache flushes seems to be sufficient to deal + * with the issue. + * + * #define R4600_V1_INDEX_ICACHEOP_WAR 1 + */ + +/* * Pleasures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata: * * 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D, @@ -59,6 +68,7 @@ */ #ifdef CONFIG_SGI_IP22 +#define R4600_V1_INDEX_ICACHEOP_WAR 1 #define R4600_V1_HIT_CACHEOP_WAR 1 #define R4600_V2_HIT_CACHEOP_WAR 1 @@ -159,8 +169,19 @@ #endif /* + * On the RM9000 there is a problem which makes the CreateDirtyExclusive + * cache operation unusable on SMP systems. + */ +#if defined(CONFIG_MOMENCO_JAGUAR_ATX) || defined(CONFIG_PMC_YOSEMITE) +#define RM9000_CDEX_SMP_WAR 1 +#endif + +/* * Workarounds default to off */ +#ifndef R4600_V1_INDEX_ICACHEOP_WAR +#define R4600_V1_INDEX_ICACHEOP_WAR 0 +#endif #ifndef R4600_V1_HIT_CACHEOP_WAR #define R4600_V1_HIT_CACHEOP_WAR 0 #endif @@ -185,5 +206,8 @@ #ifndef TX49XX_ICACHE_INDEX_INV_WAR #define TX49XX_ICACHE_INDEX_INV_WAR 0 #endif +#ifndef RM9000_CDEX_SMP_WAR +#define RM9000_CDEX_SMP_WAR 0 +#endif #endif /* _ASM_WAR_H */ diff -urN linux-2.4.28-bk3/include/asm-mips64/checksum.h linux-2.4.28-bk4/include/asm-mips64/checksum.h --- linux-2.4.28-bk3/include/asm-mips64/checksum.h 2003-08-25 04:44:44.000000000 -0700 +++ linux-2.4.28-bk4/include/asm-mips64/checksum.h 2004-11-23 02:49:27.593400191 -0800 @@ -127,9 +127,6 @@ } /* - * computes the checksum of the TCP/UDP pseudo-header - * returns a 16-bit checksum, already complemented - * * Cast unsigned short expressions to unsigned long explicitly * to avoid surprises resulting from implicit promotions to * signed int. --macro diff -urN linux-2.4.28-bk3/include/asm-mips64/compiler.h linux-2.4.28-bk4/include/asm-mips64/compiler.h --- linux-2.4.28-bk3/include/asm-mips64/compiler.h 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.28-bk4/include/asm-mips64/compiler.h 2004-11-23 02:49:27.594400232 -0800 @@ -0,0 +1,17 @@ +/* + * Copyright (C) 2004 Maciej W. Rozycki + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#ifndef _ASM_COMPILER_H +#define _ASM_COMPILER_H + +#if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4) +#define GCC_REG_ACCUM "$0" +#else +#define GCC_REG_ACCUM "accum" +#endif + +#endif /* _ASM_COMPILER_H */ diff -urN linux-2.4.28-bk3/include/asm-mips64/cpu.h linux-2.4.28-bk4/include/asm-mips64/cpu.h --- linux-2.4.28-bk3/include/asm-mips64/cpu.h 2004-02-18 05:36:32.000000000 -0800 +++ linux-2.4.28-bk4/include/asm-mips64/cpu.h 2004-11-23 02:49:27.594400232 -0800 @@ -173,7 +173,8 @@ #define CPU_VR4133 56 #define CPU_AU1550 57 #define CPU_24K 58 -#define CPU_LAST 58 +#define CPU_AU1200 59 +#define CPU_LAST 59 /* * ISA Level encodings diff -urN linux-2.4.28-bk3/include/asm-mips64/dec/prom.h linux-2.4.28-bk4/include/asm-mips64/dec/prom.h --- linux-2.4.28-bk3/include/asm-mips64/dec/prom.h 2003-08-25 04:44:44.000000000 -0700 +++ linux-2.4.28-bk4/include/asm-mips64/dec/prom.h 2004-11-23 02:49:27.595400272 -0800 @@ -164,4 +164,7 @@ extern void prom_identify_arch(u32); extern void prom_init_cmdline(s32, s32 *, u32); +extern void register_prom_console(void); +extern void unregister_prom_console(void); + #endif /* __ASM_DEC_PROM_H */ diff -urN linux-2.4.28-bk3/include/asm-mips64/dec/serial.h linux-2.4.28-bk4/include/asm-mips64/dec/serial.h --- linux-2.4.28-bk3/include/asm-mips64/dec/serial.h 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.28-bk4/include/asm-mips64/dec/serial.h 2004-11-23 02:49:27.595400272 -0800 @@ -0,0 +1,36 @@ +/* + * include/asm-mips/dec/serial.h + * + * Definitions common to all DECstation serial devices. + * + * Copyright (C) 2004 Maciej W. Rozycki + * + * Based on bits extracted from drivers/tc/zs.h for which + * the following copyrights apply: + * + * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) + * Copyright (C) 1996 Paul Mackerras (Paul.Mackerras@cs.anu.edu.au) + * Copyright (C) Harald Koerfgen + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ +#ifndef __ASM_MIPS_DEC_SERIAL_H +#define __ASM_MIPS_DEC_SERIAL_H + +struct dec_serial_hook { + int (*init_channel)(void *handle); + void (*init_info)(void *handle); + void (*rx_char)(unsigned char ch, unsigned char fl); + int (*poll_rx_char)(void *handle); + int (*poll_tx_char)(void *handle, unsigned char ch); + unsigned int cflags; +}; + +extern int register_dec_serial_hook(unsigned int channel, + struct dec_serial_hook *hook); +extern int unregister_dec_serial_hook(unsigned int channel); + +#endif /* __ASM_MIPS_DEC_SERIAL_H */ diff -urN linux-2.4.28-bk3/include/asm-mips64/delay.h linux-2.4.28-bk4/include/asm-mips64/delay.h --- linux-2.4.28-bk3/include/asm-mips64/delay.h 2003-08-25 04:44:44.000000000 -0700 +++ linux-2.4.28-bk4/include/asm-mips64/delay.h 2004-11-23 02:49:27.596400313 -0800 @@ -13,6 +13,8 @@ #include #include +#include + extern unsigned long loops_per_jiffy; static __inline__ void @@ -53,8 +55,9 @@ usecs *= (0x8000000000000000UL / (500000 / HZ)); #endif __asm__("dmultu\t%2,%3" - :"=h" (usecs), "=l" (lo) - :"r" (usecs),"r" (lpj)); + : "=h" (usecs), "=l" (lo) + : "r" (usecs), "r" (lpj) + : GCC_REG_ACCUM); __delay(usecs); } @@ -74,8 +77,9 @@ nsecs *= (0x8000000000000000UL / (500000000 / HZ)); #endif __asm__("dmultu\t%2,%3" - :"=h" (nsecs), "=l" (lo) - :"r" (nsecs),"r" (lpj)); + : "=h" (nsecs), "=l" (lo) + : "r" (nsecs), "r" (lpj) + : GCC_REG_ACCUM); __delay(nsecs); } diff -urN linux-2.4.28-bk3/include/asm-mips64/mipsregs.h linux-2.4.28-bk4/include/asm-mips64/mipsregs.h --- linux-2.4.28-bk3/include/asm-mips64/mipsregs.h 2004-02-18 05:36:32.000000000 -0800 +++ linux-2.4.28-bk4/include/asm-mips64/mipsregs.h 2004-11-23 02:49:27.597400354 -0800 @@ -632,6 +632,24 @@ } while (0) /* + * On RM7000/RM9000 these are uses to access cop0 set 1 registers + */ +#define __read_32bit_c0_ctrl_register(source) \ +({ int __res; \ + __asm__ __volatile__( \ + "cfc0\t%0, " #source "\n\t" \ + : "=r" (__res)); \ + __res; \ +}) + +#define __write_32bit_c0_ctrl_register(register, value) \ +do { \ + __asm__ __volatile__( \ + "ctc0\t%z0, " #register "\n\t" \ + : : "Jr" ((unsigned int)value)); \ +} while (0) + +/* * These versions are only needed for systems with more than 38 bits of * physical address space running the 32-bit kernel. That's none atm :-) */ @@ -788,8 +806,8 @@ #define read_c0_xcontext() __read_ulong_c0_register($20, 0) #define write_c0_xcontext(val) __write_ulong_c0_register($20, 0, val) -#define read_c0_intcontrol() __read_32bit_c0_register($20, 1) -#define write_c0_intcontrol(val) __write_32bit_c0_register($20, 1, val) +#define read_c0_intcontrol() __read_32bit_c0_ctrl_register($20) +#define write_c0_intcontrol(val) __write_32bit_c0_ctrl_register($20, val) #define read_c0_framemask() __read_32bit_c0_register($21, 0) #define write_c0_framemask(val) __write_32bit_c0_register($21, 0, val) @@ -879,7 +897,7 @@ /* * Manipulate bits in a c0 register. */ -#define __BUILD_SET_C0(name,register) \ +#define __BUILD_SET_C0(name) \ static inline unsigned int \ set_c0_##name(unsigned int set) \ { \ @@ -917,9 +935,10 @@ return res; \ } -__BUILD_SET_C0(status,CP0_STATUS) -__BUILD_SET_C0(cause,CP0_CAUSE) -__BUILD_SET_C0(config,CP0_CONFIG) +__BUILD_SET_C0(status) +__BUILD_SET_C0(cause) +__BUILD_SET_C0(config) +__BUILD_SET_C0(intcontrol) #endif /* !__ASSEMBLY__ */ diff -urN linux-2.4.28-bk3/include/asm-mips64/mmu_context.h linux-2.4.28-bk4/include/asm-mips64/mmu_context.h --- linux-2.4.28-bk3/include/asm-mips64/mmu_context.h 2003-08-25 04:44:44.000000000 -0700 +++ linux-2.4.28-bk4/include/asm-mips64/mmu_context.h 2004-11-23 02:49:27.597400354 -0800 @@ -35,9 +35,23 @@ #define cpu_asid(cpu, mm) (cpu_context((cpu), (mm)) & ASID_MASK) #define asid_cache(cpu) (cpu_data[cpu].asid_cache) +#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX) + +#define ASID_INC 0x40 +#define ASID_MASK 0xfc0 + +#elif defined(CONFIG_CPU_RM9000) + +#define ASID_INC 0x1 +#define ASID_MASK 0xfff + +#else /* FIXME: not correct for R6000, R8000 */ + #define ASID_INC 0x1 #define ASID_MASK 0xff +#endif + static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk, unsigned cpu) { } @@ -127,7 +141,7 @@ write_c0_entryhi(cpu_context(cpu, next)); TLBMISS_HANDLER_SETUP_PGD(next->pgd); - /* mark mmu ownership change */ + /* mark mmu ownership change */ clear_bit(cpu, &prev->cpu_vm_mask); set_bit(cpu, &next->cpu_vm_mask); diff -urN linux-2.4.28-bk3/include/asm-mips64/param.h linux-2.4.28-bk4/include/asm-mips64/param.h --- linux-2.4.28-bk3/include/asm-mips64/param.h 2004-02-18 05:36:32.000000000 -0800 +++ linux-2.4.28-bk4/include/asm-mips64/param.h 2004-11-23 02:49:27.598400395 -0800 @@ -20,6 +20,8 @@ #include +#include + #ifdef CONFIG_DECSTATION /* * log2(HZ), change this here if you want another HZ value. This is also @@ -36,8 +38,9 @@ ({ unsigned long __res; \ unsigned long __lo; \ __asm__("dmultu\t%2,%3\n\t" \ - :"=h" (__res), "=l" (__lo) \ - :"r" (a), "r" (QUOTIENT)); \ + : "=h" (__res), "=l" (__lo) \ + : "r" (a), "r" (QUOTIENT) \ + : GCC_REG_ACCUM); \ (__typeof__(a)) __res;}) #else /* Not a DECstation */ diff -urN linux-2.4.28-bk3/include/asm-mips64/prefetch.h linux-2.4.28-bk4/include/asm-mips64/prefetch.h --- linux-2.4.28-bk3/include/asm-mips64/prefetch.h 2004-02-18 05:36:32.000000000 -0800 +++ linux-2.4.28-bk4/include/asm-mips64/prefetch.h 2004-11-23 02:49:27.598400395 -0800 @@ -21,8 +21,9 @@ * RM7000 version 1.0 interprets all hints as Pref_Load; version 2.0 implements * Pref_PrepareForStore also. * - * RM9000 is MIPS IV but implements prefetching like MIPS32/MIPS64; - * it's Pref_WriteBackInvalidate is a nop. + * RM9000 is MIPS IV but implements prefetching like MIPS32/MIPS64; it's + * Pref_WriteBackInvalidate is a nop and Pref_PrepareForStore is broken in + * current versions due to erratum G105. * * VR7701 only implements the Load prefetch. * diff -urN linux-2.4.28-bk3/include/asm-mips64/processor.h linux-2.4.28-bk4/include/asm-mips64/processor.h --- linux-2.4.28-bk3/include/asm-mips64/processor.h 2004-02-18 05:36:32.000000000 -0800 +++ linux-2.4.28-bk4/include/asm-mips64/processor.h 2004-11-23 02:49:27.599400435 -0800 @@ -128,6 +128,8 @@ #define cpu_has_dc_aliases (cpu_data[0].dcache.flags & MIPS_CACHE_ALIASES) #define cpu_has_ic_fills_f_dc (cpu_data[0].dcache.flags & MIPS_CACHE_IC_F_DC) #define cpu_has_64bits 1 +#define cpu_has_64bit_zero_reg 1 +#define cpu_has_64bit_gp_regs 1 #define cpu_has_64bit_addresses 1 #define cpu_has_subset_pcaches (cpu_data[0].options & MIPS_CPU_SUBSET_CACHES) diff -urN linux-2.4.28-bk3/include/asm-mips64/sgiarcs.h linux-2.4.28-bk4/include/asm-mips64/sgiarcs.h --- linux-2.4.28-bk3/include/asm-mips64/sgiarcs.h 2003-08-25 04:44:44.000000000 -0700 +++ linux-2.4.28-bk4/include/asm-mips64/sgiarcs.h 2004-11-23 02:49:27.599400435 -0800 @@ -369,7 +369,7 @@ #define __arc_clobbers \ "$2","$3" /* ... */, "$8","$9","$10","$11", \ - "$12","$13","$14","$15","$16","$24","25","$31" + "$12","$13","$14","$15","$16","$24","$25","$31" #define ARC_CALL0(dest) \ ({ long __res; \ @@ -462,7 +462,7 @@ long __vec = (long) romvec->dest; \ __asm__ __volatile__( \ "dsubu\t$29, 32\n\t" \ - "sw\t%6, 16($29)\n\t" \ + "sw\t%7, 16($29)\n\t" \ "jalr\t%1\n\t" \ "daddu\t$29, 32\n\t" \ "move\t%0, $2" \ diff -urN linux-2.4.28-bk3/include/asm-mips64/siginfo.h linux-2.4.28-bk4/include/asm-mips64/siginfo.h --- linux-2.4.28-bk3/include/asm-mips64/siginfo.h 2004-02-18 05:36:32.000000000 -0800 +++ linux-2.4.28-bk4/include/asm-mips64/siginfo.h 2004-11-23 02:49:27.600400476 -0800 @@ -3,12 +3,13 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 1998, 1999, 2001, 2003 Ralf Baechle + * Copyright (C) 1998, 1999, 2001, 03, 04 Ralf Baechle * Copyright (C) 2000, 2001 Silicon Graphics, Inc. */ #ifndef _ASM_SIGINFO_H #define _ASM_SIGINFO_H +#include #include /* This structure matches IRIX 32/n32 ABIs for binary compatibility. */ @@ -18,26 +19,22 @@ void *sival_ptr; } sigval_t; -#ifdef __KERNEL__ - -typedef union sigval32 { - int sival_int; - s32 sival_ptr; -} sigval_t32; - -#endif /* __KERNEL__ */ - /* This structure matches IRIX 32/n32 ABIs for binary compatibility but has Linux extensions. */ #define SI_MAX_SIZE 128 +#ifdef CONFIG_MIPS32 +#define SI_PAD_SIZE ((SI_MAX_SIZE/sizeof(int)) - 3) +#endif +#ifdef CONFIG_MIPS64 #define SI_PAD_SIZE ((SI_MAX_SIZE/sizeof(int)) - 4) -#define SI_PAD_SIZE32 ((SI_MAX_SIZE/sizeof(int)) - 3) +#endif typedef struct siginfo { int si_signo; int si_code; int si_errno; + int __pad0[SI_MAX_SIZE / sizeof(int) - SI_PAD_SIZE - 3]; union { int _pad[SI_PAD_SIZE]; @@ -52,8 +49,8 @@ struct { pid_t _pid; /* which child */ uid_t _uid; /* sender's uid */ - clock_t _utime; int _status; /* exit code */ + clock_t _utime; clock_t _stime; } _sigchld; @@ -92,68 +89,6 @@ } _sifields; } siginfo_t; -#ifdef __KERNEL__ - -typedef struct siginfo32 { - int si_signo; - int si_code; - int si_errno; - - union { - int _pad[SI_PAD_SIZE32]; - - /* kill() */ - struct { - __kernel_pid_t32 _pid; /* sender's pid */ - __kernel_uid_t32 _uid; /* sender's uid */ - } _kill; - - /* SIGCHLD */ - struct { - __kernel_pid_t32 _pid; /* which child */ - __kernel_uid_t32 _uid; /* sender's uid */ - __kernel_clock_t32 _utime; - int _status; /* exit code */ - __kernel_clock_t32 _stime; - } _sigchld; - - /* IRIX SIGCHLD */ - struct { - __kernel_pid_t32 _pid; /* which child */ - __kernel_clock_t32 _utime; - int _status; /* exit code */ - __kernel_clock_t32 _stime; - } _irix_sigchld; - - /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */ - struct { - s32 _addr; /* faulting insn/memory ref. */ - } _sigfault; - - /* SIGPOLL, SIGXFSZ (To do ...) */ - struct { - int _band; /* POLL_IN, POLL_OUT, POLL_MSG */ - int _fd; - } _sigpoll; - - /* POSIX.1b timers */ - struct { - unsigned int _timer1; - unsigned int _timer2; - } _timer; - - /* POSIX.1b signals */ - struct { - __kernel_pid_t32 _pid; /* sender's pid */ - __kernel_uid_t32 _uid; /* sender's uid */ - sigval_t32 _sigval; - } _rt; - - } _sifields; -} siginfo_t32; - -#endif /* __KERNEL__ */ - /* * How these fields are to be accessed. */ diff -urN linux-2.4.28-bk3/include/asm-mips64/smp.h linux-2.4.28-bk4/include/asm-mips64/smp.h --- linux-2.4.28-bk3/include/asm-mips64/smp.h 2004-02-18 05:36:32.000000000 -0800 +++ linux-2.4.28-bk4/include/asm-mips64/smp.h 2004-11-23 02:49:27.601400517 -0800 @@ -106,7 +106,7 @@ * Clear all undefined state in the cpu, set up sp and gp to the passed * values, and kick the cpu into smp_bootstrap(); */ -void prom_boot_secondary(int cpu, unsigned long sp, unsigned long gp); +int prom_boot_secondary(int cpu, unsigned long sp, unsigned long gp); /* * After we've done initial boot, this function is called to allow the diff -urN linux-2.4.28-bk3/include/asm-mips64/uaccess.h linux-2.4.28-bk4/include/asm-mips64/uaccess.h --- linux-2.4.28-bk3/include/asm-mips64/uaccess.h 2004-02-18 05:36:32.000000000 -0800 +++ linux-2.4.28-bk4/include/asm-mips64/uaccess.h 2004-11-23 02:49:27.602400558 -0800 @@ -3,19 +3,17 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 1996, 1997, 1998, 1999, 2000, 03 by Ralf Baechle + * Copyright (C) 1996, 1997, 1998, 1999, 2000, 03, 04 by Ralf Baechle * Copyright (C) 1999, 2000 Silicon Graphics, Inc. */ #ifndef _ASM_UACCESS_H #define _ASM_UACCESS_H +#include #include #include #include -#define STR(x) __STR(x) -#define __STR(x) #x - /* * The fs value determines whether argument validity checking should be * performed or not. If get_fs() == USER_DS, checking is performed, with @@ -23,15 +21,47 @@ * * For historical reasons, these macros are grossly misnamed. */ +#ifdef CONFIG_MIPS32 + +#define __UA_LIMIT 0x80000000UL + +#define __UA_ADDR ".word" +#define __UA_LA "la" +#define __UA_ADDU "addu" +#define __UA_t0 "$8" +#define __UA_t1 "$9" + +#endif /* CONFIG_MIPS32 */ + +#ifdef CONFIG_MIPS64 + +#define __UA_LIMIT (- TASK_SIZE) + +#define __UA_ADDR ".dword" +#define __UA_LA "dla" +#define __UA_ADDU "daddu" +#define __UA_t0 "$12" +#define __UA_t1 "$13" + +#endif /* CONFIG_MIPS64 */ + +/* + * USER_DS is a bitmask that has the bits set that may not be set in a valid + * userspace address. Note that we limit 32-bit userspace to 0x7fff8000 but + * the arithmetic we're doing only works if the limit is a power of two, so + * we use 0x80000000 here on 32-bit kernels. If a process passes an invalid + * address in this range it's the process's problem, not ours :-) + */ + #define KERNEL_DS ((mm_segment_t) { 0UL }) -#define USER_DS ((mm_segment_t) { -TASK_SIZE }) +#define USER_DS ((mm_segment_t) { __UA_LIMIT }) #define VERIFY_READ 0 #define VERIFY_WRITE 1 -#define get_fs() (current->thread.current_ds) #define get_ds() (KERNEL_DS) -#define set_fs(x) (current->thread.current_ds=(x)) +#define get_fs() (current->thread.current_ds) +#define set_fs(x) (current->thread.current_ds = (x)) #define segment_eq(a,b) ((a).seg == (b).seg) @@ -45,14 +75,12 @@ * - AND "size" doesn't have any high-bits set * - AND "addr+size" doesn't have any high-bits set * - OR we are in kernel mode. + * + * __ua_size() is a trick to avoid runtime checking of positive constant + * sizes; for those we already know at compile time that the size is ok. */ #define __ua_size(size) \ - ((__builtin_constant_p(size) && (size)) > 0 ? 0 : (size)) - -#define __access_ok(addr, size, mask) \ - (((mask) & ((addr) | ((addr) + (size)) | __ua_size(size))) == 0) - -#define __access_mask get_fs().seg + ((__builtin_constant_p(size) && (signed long) (size) > 0) ? 0 : (size)) /* * access_ok: - Checks if a user space pointer is valid @@ -73,8 +101,14 @@ * checks that the pointer is in the user space range - after calling * this function, memory access functions may still return -EFAULT. */ + +#define __access_mask get_fs().seg + +#define __access_ok(addr, size, mask) \ + (((signed long)((mask) & ((addr) | ((addr) + (size)) | __ua_size(size)))) == 0) + #define access_ok(type, addr, size) \ - likely(__access_ok((unsigned long)(addr), (size), __access_mask)) + likely(__access_ok((unsigned long)(addr), (size),__access_mask)) /* * verify_area: - Obsolete, use access_ok() @@ -185,117 +219,177 @@ struct __large_struct { unsigned long buf[100]; }; #define __m(x) (*(struct __large_struct *)(x)) +/* + * Yuck. We need two variants, one for 64bit operation and one + * for 32 bit mode and old iron. + */ +#ifdef __mips64 +#define __GET_USER_DW(__gu_err) __get_user_asm("ld", __gu_err) +#else +#define __GET_USER_DW(__gu_err) __get_user_asm_ll32(__gu_err) +#endif + #define __get_user_nocheck(x,ptr,size) \ ({ \ - long __gu_err; \ - __typeof(*(ptr)) __gu_val; \ + long __gu_err = 0; \ + __typeof(*(ptr)) __gu_val = 0; \ long __gu_addr; \ - __asm__("":"=r" (__gu_val)); \ __gu_addr = (long) (ptr); \ - __asm__("":"=r" (__gu_err)); \ switch (size) { \ - case 1: __get_user_asm("lb"); break; \ - case 2: __get_user_asm("lh"); break; \ - case 4: __get_user_asm("lw"); break; \ - case 8: __get_user_asm("ld"); break; \ - default: __get_user_unknown(); break; \ - } x = (__typeof__(*(ptr))) __gu_val; \ + case 1: __get_user_asm("lb", __gu_err); break; \ + case 2: __get_user_asm("lh", __gu_err); break; \ + case 4: __get_user_asm("lw", __gu_err); break; \ + case 8: __GET_USER_DW(__gu_err); break; \ + default: __get_user_unknown(); break; \ + } \ + x = (__typeof__(*(ptr))) __gu_val; \ __gu_err; \ }) #define __get_user_check(x,ptr,size) \ ({ \ + __typeof__(*(ptr)) __gu_val = 0; \ + long __gu_addr = (long) (ptr); \ long __gu_err; \ - __typeof__(*(ptr)) __gu_val; \ - long __gu_addr; \ - __asm__("":"=r" (__gu_val)); \ - __gu_addr = (long) (ptr); \ - __asm__("":"=r" (__gu_err)); \ - if (access_ok(VERIFY_READ, __gu_addr, size)) { \ + \ + __gu_err = verify_area(VERIFY_READ, (void *) __gu_addr, size); \ + \ + if (likely(!__gu_err)) { \ switch (size) { \ - case 1: __get_user_asm("lb"); break; \ - case 2: __get_user_asm("lh"); break; \ - case 4: __get_user_asm("lw"); break; \ - case 8: __get_user_asm("ld"); break; \ + case 1: __get_user_asm("lb", __gu_err); break; \ + case 2: __get_user_asm("lh", __gu_err); break; \ + case 4: __get_user_asm("lw", __gu_err); break; \ + case 8: __GET_USER_DW(__gu_err); break; \ default: __get_user_unknown(); break; \ } \ - } x = (__typeof__(*(ptr))) __gu_val; \ - __gu_err; \ + } \ + x = (__typeof__(*(ptr))) __gu_val; \ + __gu_err; \ }) -#define __get_user_asm(insn) \ +#define __get_user_asm(insn,__gu_err) \ ({ \ __asm__ __volatile__( \ - "1:\t" insn "\t%1,%2\n\t" \ - "move\t%0,$0\n" \ - "2:\n\t" \ - ".section\t.fixup,\"ax\"\n" \ - "3:\tli\t%0,%3\n\t" \ - "move\t%1,$0\n\t" \ - "j\t2b\n\t" \ - ".previous\n\t" \ - ".section\t__ex_table,\"a\"\n\t" \ - ".dword\t1b,3b\n\t" \ - ".previous" \ - :"=r" (__gu_err), "=r" (__gu_val) \ - :"o" (__m(__gu_addr)), "i" (-EFAULT)); \ + "1: " insn " %1, %3 \n" \ + "2: \n" \ + " .section .fixup,\"ax\" \n" \ + "3: li %0, %4 \n" \ + " j 2b \n" \ + " .previous \n" \ + " .section __ex_table,\"a\" \n" \ + " "__UA_ADDR "\t1b, 3b \n" \ + " .previous \n" \ + : "=r" (__gu_err), "=r" (__gu_val) \ + : "0" (__gu_err), "o" (__m(__gu_addr)), "i" (-EFAULT)); \ +}) + +/* + * Get a long long 64 using 32 bit registers. + */ +#define __get_user_asm_ll32(__gu_err) \ +({ \ + __asm__ __volatile__( \ + "1: lw %1, %3 \n" \ + "2: lw %D1, %4 \n" \ + " move %0, $0 \n" \ + "3: .section .fixup,\"ax\" \n" \ + "4: li %0, %5 \n" \ + " move %1, $0 \n" \ + " move %D1, $0 \n" \ + " j 3b \n" \ + " .previous \n" \ + " .section __ex_table,\"a\" \n" \ + " " __UA_ADDR " 1b, 4b \n" \ + " " __UA_ADDR " 2b, 4b \n" \ + " .previous \n" \ + : "=r" (__gu_err), "=&r" (__gu_val) \ + : "0" (__gu_err), "o" (__m(__gu_addr)), \ + "o" (__m(__gu_addr + 4)), "i" (-EFAULT)); \ }) extern void __get_user_unknown(void); +/* + * Yuck. We need two variants, one for 64bit operation and one + * for 32 bit mode and old iron. + */ +#ifdef __mips64 +#define __PUT_USER_DW(__pu_val) __put_user_asm("sd", __pu_val) +#else +#define __PUT_USER_DW(__pu_val) __put_user_asm_ll32(__pu_val) +#endif + #define __put_user_nocheck(x,ptr,size) \ ({ \ - long __pu_err; \ + long __pu_err = 0; \ __typeof__(*(ptr)) __pu_val; \ long __pu_addr; \ __pu_val = (x); \ __pu_addr = (long) (ptr); \ - __asm__("":"=r" (__pu_err)); \ switch (size) { \ - case 1: __put_user_asm("sb"); break; \ - case 2: __put_user_asm("sh"); break; \ - case 4: __put_user_asm("sw"); break; \ - case 8: __put_user_asm("sd"); break; \ - default: __put_user_unknown(); break; \ + case 1: __put_user_asm("sb", __pu_val); break; \ + case 2: __put_user_asm("sh", __pu_val); break; \ + case 4: __put_user_asm("sw", __pu_val); break; \ + case 8: __PUT_USER_DW(__pu_val); break; \ + default: __put_user_unknown(); break; \ } \ __pu_err; \ }) #define __put_user_check(x,ptr,size) \ ({ \ + __typeof__(*(ptr)) __pu_val = (x); \ + long __pu_addr = (long) (ptr); \ long __pu_err; \ - __typeof__(*(ptr)) __pu_val; \ - long __pu_addr; \ - __pu_val = (x); \ - __pu_addr = (long) (ptr); \ - __asm__("":"=r" (__pu_err)); \ - if (access_ok(VERIFY_WRITE, __pu_addr, size)) { \ + \ + __pu_err = verify_area(VERIFY_WRITE, (void *) __pu_addr, size); \ + \ + if (likely(!__pu_err)) { \ switch (size) { \ - case 1: __put_user_asm("sb"); break; \ - case 2: __put_user_asm("sh"); break; \ - case 4: __put_user_asm("sw"); break; \ - case 8: __put_user_asm("sd"); break; \ + case 1: __put_user_asm("sb", __pu_val); break; \ + case 2: __put_user_asm("sh", __pu_val); break; \ + case 4: __put_user_asm("sw", __pu_val); break; \ + case 8: __PUT_USER_DW(__pu_val); break; \ default: __put_user_unknown(); break; \ } \ } \ __pu_err; \ }) -#define __put_user_asm(insn) \ +#define __put_user_asm(insn, __pu_val) \ ({ \ __asm__ __volatile__( \ - "1:\t" insn "\t%z1, %2\t\t\t# __put_user_asm\n\t" \ - "move\t%0, $0\n" \ - "2:\n\t" \ - ".section\t.fixup,\"ax\"\n" \ - "3:\tli\t%0, %3\n\t" \ - "j\t2b\n\t" \ - ".previous\n\t" \ - ".section\t__ex_table,\"a\"\n\t" \ - ".dword\t1b, 3b\n\t" \ - ".previous" \ - :"=r" (__pu_err) \ - :"Jr" (__pu_val), "o" (__m(__pu_addr)), "i" (-EFAULT)); \ + "1: " insn " %z2, %3 # __put_user_asm\n" \ + "2: \n" \ + " .section .fixup,\"ax\" \n" \ + "3: li %0, %4 \n" \ + " j 2b \n" \ + " .previous \n" \ + " .section __ex_table,\"a\" \n" \ + " " __UA_ADDR " 1b, 3b \n" \ + " .previous \n" \ + : "=r" (__pu_err) \ + : "0" (__pu_err), "Jr" (__pu_val), "o" (__m(__pu_addr)), \ + "i" (-EFAULT)); \ +}) + +#define __put_user_asm_ll32(__pu_val) \ +({ \ + __asm__ __volatile__( \ + "1: sw %2, %3 # __put_user_asm_ll32 \n" \ + "2: sw %D2, %4 \n" \ + "3: \n" \ + " .section .fixup,\"ax\" \n" \ + "4: li %0, %5 \n" \ + " j 3b \n" \ + " .previous \n" \ + " .section __ex_table,\"a\" \n" \ + " " __UA_ADDR " 1b, 4b \n" \ + " " __UA_ADDR " 2b, 4b \n" \ + " .previous" \ + : "=r" (__pu_err) \ + : "0" (__pu_err), "r" (__pu_val), "o" (__m(__pu_addr)), \ + "o" (__m(__pu_addr + 4)), "i" (-EFAULT)); \ }) extern void __put_user_unknown(void); @@ -307,7 +401,7 @@ #ifdef MODULE #define __MODULE_JAL(destination) \ ".set\tnoat\n\t" \ - "dla\t$1, " #destination "\n\t" \ + __UA_LA "\t$1, " #destination "\n\t" \ "jalr\t$1\n\t" \ ".set\tat\n\t" #else @@ -362,6 +456,9 @@ __cu_len; \ }) +#define __copy_to_user_inatomic __copy_to_user +#define __copy_from_user_inatomic __copy_from_user + /* * copy_to_user: - Copy a block of data into user space. * @to: Destination address, in user space. @@ -403,10 +500,9 @@ ".set\tnoreorder\n\t" \ __MODULE_JAL(__copy_user) \ ".set\tnoat\n\t" \ - "daddu\t$1, %1, %2\n\t" \ + __UA_ADDU "\t$1, %1, %2\n\t" \ ".set\tat\n\t" \ - ".set\treorder\n\t" \ - "move\t%0, $6" \ + ".set\treorder" \ : "+r" (__cu_to_r), "+r" (__cu_from_r), "+r" (__cu_len_r) \ : \ : "$8", "$9", "$10", "$11", "$12", "$15", "$24", "$31", \ @@ -499,7 +595,7 @@ "move\t%0, $6" : "=r" (res) : "r" (addr), "r" (size) - : "$4", "$5", "$6", "$8", "$9", "$31"); + : "$4", "$5", "$6", __UA_t0, __UA_t1, "$31"); return res; } @@ -547,7 +643,7 @@ "move\t%0, $2" : "=r" (res) : "r" (__to), "r" (__from), "r" (__len) - : "$2", "$3", "$4", "$5", "$6", "$8", "$31", "memory"); + : "$2", "$3", "$4", "$5", "$6", __UA_t0, "$31", "memory"); return res; } @@ -583,7 +679,7 @@ "move\t%0, $2" : "=r" (res) : "r" (__to), "r" (__from), "r" (__len) - : "$2", "$3", "$4", "$5", "$6", "$8", "$31", "memory"); + : "$2", "$3", "$4", "$5", "$6", __UA_t0, "$31", "memory"); return res; } @@ -599,7 +695,7 @@ "move\t%0, $2" : "=r" (res) : "r" (s) - : "$2", "$4", "$8", "$31"); + : "$2", "$4", __UA_t0, "$31"); return res; } @@ -628,7 +724,24 @@ "move\t%0, $2" : "=r" (res) : "r" (s) - : "$2", "$4", "$8", "$31"); + : "$2", "$4", __UA_t0, "$31"); + + return res; +} + +/* Returns: 0 if bad, string length+1 (memory size) of string if ok */ +static inline long __strnlen_user(const char *s, long n) +{ + long res; + + __asm__ __volatile__( + "move\t$4, %1\n\t" + "move\t$5, %2\n\t" + __MODULE_JAL(__strnlen_user_nocheck_asm) + "move\t%0, $2" + : "=r" (res) + : "r" (s), "r" (n) + : "$2", "$4", "$5", __UA_t0, "$31"); return res; } @@ -636,13 +749,16 @@ /* * strlen_user: - Get the size of a string in user space. * @str: The string to measure. - * @n: The maximum valid length + * + * Context: User context only. This function may sleep. * * Get the size of a NUL-terminated string in user space. * * Returns the size of the string INCLUDING the terminating NUL. * On exception, returns 0. - * If the string is too long, returns a value greater than @n. + * + * If there is a limit on the length of a valid string, you may wish to + * consider using strnlen_user() instead. */ static inline long strnlen_user(const char *s, long n) { @@ -655,7 +771,7 @@ "move\t%0, $2" : "=r" (res) : "r" (s), "r" (n) - : "$2", "$4", "$5", "$8", "$31"); + : "$2", "$4", "$5", __UA_t0, "$31"); return res; } diff -urN linux-2.4.28-bk3/include/asm-mips64/unaligned.h linux-2.4.28-bk4/include/asm-mips64/unaligned.h --- linux-2.4.28-bk3/include/asm-mips64/unaligned.h 2003-08-25 04:44:44.000000000 -0700 +++ linux-2.4.28-bk4/include/asm-mips64/unaligned.h 2004-11-23 02:49:27.603400598 -0800 @@ -3,152 +3,142 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 1996, 1999, 2000, 2001 by Ralf Baechle + * Copyright (C) 1996, 1999, 2000, 2001, 2003 by Ralf Baechle * Copyright (C) 1999, 2000, 2001 Silicon Graphics, Inc. */ #ifndef _ASM_UNALIGNED_H #define _ASM_UNALIGNED_H -extern void __get_unaligned_bad_length(void); -extern void __put_unaligned_bad_length(void); +#include /* - * Load quad unaligned. + * get_unaligned - get value from possibly mis-aligned location + * @ptr: pointer to value + * + * This macro should be used for accessing values larger in size than + * single bytes at locations that are expected to be improperly aligned, + * e.g. retrieving a u16 value from a location not u16-aligned. + * + * Note that unaligned accesses can be very expensive on some architectures. */ -static inline unsigned long __ldq_u(const unsigned long * __addr) -{ - unsigned long __res; - - __asm__("uld\t%0,%1" - : "=&r" (__res) - : "m" (*__addr)); +#define get_unaligned(ptr) \ + ((__typeof__(*(ptr)))__get_unaligned((ptr), sizeof(*(ptr)))) - return __res; -} +/* + * put_unaligned - put value to a possibly mis-aligned location + * @val: value to place + * @ptr: pointer to location + * + * This macro should be used for placing values larger in size than + * single bytes at locations that are expected to be improperly aligned, + * e.g. writing a u16 value to a location not u16-aligned. + * + * Note that unaligned accesses can be very expensive on some architectures. + */ +#define put_unaligned(x,ptr) \ + __put_unaligned((__u64)(x), (ptr), sizeof(*(ptr))) /* - * Load long unaligned. + * This is a silly but good way to make sure that + * the get/put functions are indeed always optimized, + * and that we use the correct sizes. */ -static inline unsigned long __ldl_u(const unsigned int * __addr) -{ - unsigned long __res; +extern void bad_unaligned_access_length(void); - __asm__("ulw\t%0,%1" - : "=&r" (__res) - : "m" (*__addr)); +/* + * EGCS 1.1 knows about arbitrary unaligned loads. Define some + * packed structures to talk about such things with. + */ - return __res; -} +struct __una_u64 { __u64 x __attribute__((packed)); }; +struct __una_u32 { __u32 x __attribute__((packed)); }; +struct __una_u16 { __u16 x __attribute__((packed)); }; /* - * Load word unaligned. + * Elemental unaligned loads */ -static inline unsigned long __ldw_u(const unsigned short * __addr) + +static inline __u64 __uldq(const __u64 * r11) { - unsigned long __res; + const struct __una_u64 *ptr = (const struct __una_u64 *) r11; + return ptr->x; +} - __asm__("ulh\t%0,%1" - : "=&r" (__res) - : "m" (*__addr)); +static inline __u32 __uldl(const __u32 * r11) +{ + const struct __una_u32 *ptr = (const struct __una_u32 *) r11; + return ptr->x; +} - return __res; +static inline __u16 __uldw(const __u16 * r11) +{ + const struct __una_u16 *ptr = (const struct __una_u16 *) r11; + return ptr->x; } /* - * Store quad unaligned. + * Elemental unaligned stores */ -static inline void __stq_u(unsigned long __val, unsigned long * __addr) + +static inline void __ustq(__u64 r5, __u64 * r11) { - __asm__("usd\t%1, %0" - : "=m" (*__addr) - : "r" (__val)); + struct __una_u64 *ptr = (struct __una_u64 *) r11; + ptr->x = r5; } -/* - * Store long unaligned. - */ -static inline void __stl_u(unsigned long __val, unsigned int * __addr) +static inline void __ustl(__u32 r5, __u32 * r11) { - __asm__("usw\t%1, %0" - : "=m" (*__addr) - : "r" (__val)); + struct __una_u32 *ptr = (struct __una_u32 *) r11; + ptr->x = r5; } -/* - * Store word unaligned. - */ -static inline void __stw_u(unsigned long __val, unsigned short * __addr) +static inline void __ustw(__u16 r5, __u16 * r11) { - __asm__("ush\t%1, %0" - : "=m" (*__addr) - : "r" (__val)); + struct __una_u16 *ptr = (struct __una_u16 *) r11; + ptr->x = r5; } -/* - * get_unaligned - get value from possibly mis-aligned location - * @ptr: pointer to value - * - * This macro should be used for accessing values larger in size than - * single bytes at locations that are expected to be improperly aligned, - * e.g. retrieving a u16 value from a location not u16-aligned. - * - * Note that unaligned accesses can be very expensive on some architectures. - */ -#define get_unaligned(ptr) \ -({ \ - __typeof__(*(ptr)) __val; \ - \ - switch (sizeof(*(ptr))) { \ - case 1: \ - __val = *(const unsigned char *)(ptr); \ - break; \ - case 2: \ - __val = __ldw_u((const unsigned short *)(ptr)); \ - break; \ - case 4: \ - __val = __ldl_u((const unsigned int *)(ptr)); \ - break; \ - case 8: \ - __val = __ldq_u((const unsigned long *)(ptr)); \ - break; \ - default: \ - __get_unaligned_bad_length(); \ - break; \ - } \ - \ - __val; \ -}) +static inline __u64 __get_unaligned(const void *ptr, size_t size) +{ + __u64 val; -/* - * put_unaligned - put value to a possibly mis-aligned location - * @val: value to place - * @ptr: pointer to location - * - * This macro should be used for placing values larger in size than - * single bytes at locations that are expected to be improperly aligned, - * e.g. writing a u16 value to a location not u16-aligned. - * - * Note that unaligned accesses can be very expensive on some architectures. - */ -#define put_unaligned(val,ptr) \ -do { \ - switch (sizeof(*(ptr))) { \ - case 1: \ - *(unsigned char *)(ptr) = (val); \ - break; \ - case 2: \ - __stw_u((val), (unsigned short *)(ptr)); \ - break; \ - case 4: \ - __stl_u((val), (unsigned int *)(ptr)); \ - break; \ - case 8: \ - __stq_u((val), (unsigned long long *)(ptr)); \ - break; \ - default: \ - __put_unaligned_bad_length(); \ - break; \ - } \ -} while(0) + switch (size) { + case 1: + val = *(const __u8 *)ptr; + break; + case 2: + val = __uldw((const __u16 *)ptr); + break; + case 4: + val = __uldl((const __u32 *)ptr); + break; + case 8: + val = __uldq((const __u64 *)ptr); + break; + default: + bad_unaligned_access_length(); + } + return val; +} + +static inline void __put_unaligned(__u64 val, void *ptr, size_t size) +{ + switch (size) { + case 1: + *(__u8 *)ptr = (val); + break; + case 2: + __ustw(val, (__u16 *)ptr); + break; + case 4: + __ustl(val, (__u32 *)ptr); + break; + case 8: + __ustq(val, (__u64 *)ptr); + break; + default: + bad_unaligned_access_length(); + } +} #endif /* _ASM_UNALIGNED_H */ diff -urN linux-2.4.28-bk3/include/asm-mips64/unistd.h linux-2.4.28-bk4/include/asm-mips64/unistd.h --- linux-2.4.28-bk3/include/asm-mips64/unistd.h 2004-02-18 05:36:32.000000000 -0800 +++ linux-2.4.28-bk4/include/asm-mips64/unistd.h 2004-11-23 02:49:27.604400639 -0800 @@ -268,8 +268,6 @@ #define __NR_O32_Linux 4000 #define __NR_O32_Linux_syscalls 240 -#define __NR_O32_Linux_syscalls 240 - #if _MIPS_SIM == _MIPS_SIM_ABI64 /* @@ -493,7 +491,7 @@ #define __NR_semtimedop (__NR_Linux + 214) /* - * Offset of the last Linux flavoured syscall + * Offset of the last Linux 64-bit flavoured syscall */ #define __NR_Linux_syscalls 214 @@ -732,7 +730,7 @@ /* * Offset of the last N32 flavoured syscall */ -#define __NR_N32_Linux_syscalls 219 +#define __NR_Linux_syscalls 219 #endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */ @@ -756,7 +754,8 @@ ".set\treorder" \ : "=&r" (__v0), "=r" (__a3) \ : "i" (__NR_##name) \ - : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \ + : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ + "memory"); \ \ if (__a3 == 0) \ return (type) __v0; \ @@ -783,7 +782,8 @@ ".set\treorder" \ : "=&r" (__v0), "=r" (__a3) \ : "r" (__a0), "i" (__NR_##name) \ - : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \ + : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ + "memory"); \ \ if (__a3 == 0) \ return (type) __v0; \ @@ -807,7 +807,8 @@ ".set\treorder" \ : "=&r" (__v0), "=r" (__a3) \ : "r" (__a0), "r" (__a1), "i" (__NR_##name) \ - : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \ + : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ + "memory"); \ \ if (__a3 == 0) \ return (type) __v0; \ @@ -832,7 +833,8 @@ ".set\treorder" \ : "=&r" (__v0), "=r" (__a3) \ : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##name) \ - : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \ + : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ + "memory"); \ \ if (__a3 == 0) \ return (type) __v0; \ @@ -857,7 +859,8 @@ ".set\treorder" \ : "=&r" (__v0), "+r" (__a3) \ : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##name) \ - : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \ + : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ + "memory"); \ \ if (__a3 == 0) \ return (type) __v0; \ @@ -865,7 +868,7 @@ return -1; \ } -#if (_MIPS_SIM == _MIPS_SIM_ABIN32) +#if (_MIPS_SIM == _MIPS_SIM_ABI32) /* * Using those means your brain needs more than an oil change ;-) @@ -893,7 +896,8 @@ : "=&r" (__v0), "+r" (__a3) \ : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##name), \ "m" ((unsigned long)e) \ - : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \ + : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ + "memory"); \ \ if (__a3 == 0) \ return (type) __v0; \ @@ -925,7 +929,8 @@ : "=&r" (__v0), "+r" (__a3) \ : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##name), \ "m" ((unsigned long)e), "m" ((unsigned long)f) \ - : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \ + : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ + "memory"); \ \ if (__a3 == 0) \ return (type) __v0; \ @@ -933,9 +938,9 @@ return -1; \ } -#endif /* (_MIPS_SIM == _MIPS_SIM_ABIN32) */ +#endif /* (_MIPS_SIM == _MIPS_SIM_ABI32) */ -#if (_MIPS_SIM == _MIPS_SIM_NABIN32) || (_MIPS_SIM == _MIPS_SIM_ABI64) +#if (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64) #define _syscall5(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e) \ type name (atype a,btype b,ctype c,dtype d,etype e) \ @@ -953,9 +958,10 @@ "syscall\n\t" \ "move\t%0, $2\n\t" \ ".set\treorder" \ - : "=&r" (__v0), "+r" (__a3), "+r" (__a4) \ - : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##name) \ - : "$2","$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \ + : "=&r" (__v0), "+r" (__a3) \ + : "r" (__a0), "r" (__a1), "r" (__a2), "r" (__a4), "i" (__NR_##name) \ + : "$2", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ + "memory"); \ \ if (__a3 == 0) \ return (type) __v0; \ @@ -983,7 +989,8 @@ : "=&r" (__v0), "+r" (__a3) \ : "r" (__a0), "r" (__a1), "r" (__a2), "r" (__a4), "r" (__a5), \ "i" (__NR_##name) \ - : "$2","$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \ + : "$2", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ + "memory"); \ \ if (__a3 == 0) \ return (type) __v0; \ @@ -991,7 +998,7 @@ return -1; \ } -#endif /* (_MIPS_SIM == _MIPS_SIM_NABIN32) || (_MIPS_SIM == _MIPS_SIM_ABI64) */ +#endif /* (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64) */ #ifdef __KERNEL_SYSCALLS__ @@ -1017,7 +1024,7 @@ static inline _syscall3(int,execve,const char *,file,char **,argv,char **,envp) static inline _syscall3(int,open,const char *,file,int,flag,int,mode) static inline _syscall1(int,close,int,fd) -static inline _syscall1(int,_exit,int,exitcode) +static inline _syscall1(void,_exit,int,exitcode) static inline _syscall4(pid_t,wait4,pid_t,pid,int *,stat_addr,int,options,struct rusage *,ru) static inline _syscall1(int,delete_module,const char *,name) diff -urN linux-2.4.28-bk3/include/asm-mips64/vga.h linux-2.4.28-bk4/include/asm-mips64/vga.h --- linux-2.4.28-bk3/include/asm-mips64/vga.h 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.28-bk4/include/asm-mips64/vga.h 2004-11-23 02:49:27.605400680 -0800 @@ -0,0 +1,20 @@ +/* + * Access to VGA videoram + * + * (c) 1998 Martin Mares + */ + +#ifndef _LINUX_ASM_VGA_H_ +#define _LINUX_ASM_VGA_H_ + +/* + * On the PC, we can just recalculate addresses and then + * access the videoram directly without any black magic. + */ + +#define VGA_MAP_MEM(x) ((unsigned long)0xb0000000 + (unsigned long)(x)) + +#define vga_readb(x) (*(x)) +#define vga_writeb(x,y) (*(y) = (x)) + +#endif diff -urN linux-2.4.28-bk3/include/asm-mips64/war.h linux-2.4.28-bk4/include/asm-mips64/war.h --- linux-2.4.28-bk3/include/asm-mips64/war.h 2003-08-25 04:44:44.000000000 -0700 +++ linux-2.4.28-bk4/include/asm-mips64/war.h 2004-11-23 02:49:27.605400680 -0800 @@ -3,7 +3,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 2002 by Ralf Baechle + * Copyright (C) 2002, 2004 by Ralf Baechle */ #ifndef _ASM_WAR_H #define _ASM_WAR_H @@ -11,6 +11,15 @@ #include /* + * Another R4600 erratum. Due to the lack of errata information the exact + * technical details aren't known. I've experimentally found that disabling + * interrupts during indexed I-cache flushes seems to be sufficient to deal + * with the issue. + * + * #define R4600_V1_INDEX_ICACHEOP_WAR 1 + */ + +/* * Pleasures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata: * * 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D, @@ -59,6 +68,7 @@ */ #ifdef CONFIG_SGI_IP22 +#define R4600_V1_INDEX_ICACHEOP_WAR 1 #define R4600_V1_HIT_CACHEOP_WAR 1 #define R4600_V2_HIT_CACHEOP_WAR 1 @@ -159,8 +169,19 @@ #endif /* + * On the RM9000 there is a problem which makes the CreateDirtyExclusive + * cache operation unusable on SMP systems. + */ +#if defined(CONFIG_MOMENCO_JAGUAR_ATX) || defined(CONFIG_PMC_YOSEMITE) +#define RM9000_CDEX_SMP_WAR 1 +#endif + +/* * Workarounds default to off */ +#ifndef R4600_V1_INDEX_ICACHEOP_WAR +#define R4600_V1_INDEX_ICACHEOP_WAR 0 +#endif #ifndef R4600_V1_HIT_CACHEOP_WAR #define R4600_V1_HIT_CACHEOP_WAR 0 #endif @@ -185,5 +206,8 @@ #ifndef TX49XX_ICACHE_INDEX_INV_WAR #define TX49XX_ICACHE_INDEX_INV_WAR 0 #endif +#ifndef RM9000_CDEX_SMP_WAR +#define RM9000_CDEX_SMP_WAR 0 +#endif #endif /* _ASM_WAR_H */ diff -urN linux-2.4.28-bk3/include/linux/i2c.h linux-2.4.28-bk4/include/linux/i2c.h --- linux-2.4.28-bk3/include/linux/i2c.h 2004-02-18 05:36:32.000000000 -0800 +++ linux-2.4.28-bk4/include/linux/i2c.h 2004-11-23 02:49:27.607400761 -0800 @@ -47,11 +47,9 @@ /* --- General options ------------------------------------------------ */ -#define I2C_ALGO_MAX 4 /* control memory consumption */ -#define I2C_ADAP_MAX 16 +#define I2C_ADAP_MAX 16 /* control memory consumption */ #define I2C_DRIVER_MAX 16 #define I2C_CLIENT_MAX 32 -#define I2C_DUMMY_MAX 4 struct i2c_algorithm; struct i2c_adapter; diff -urN linux-2.4.28-bk3/include/linux/iso_fs.h linux-2.4.28-bk4/include/linux/iso_fs.h --- linux-2.4.28-bk3/include/linux/iso_fs.h 2002-02-25 11:38:13.000000000 -0800 +++ linux-2.4.28-bk4/include/linux/iso_fs.h 2004-11-23 02:49:27.607400761 -0800 @@ -179,28 +179,28 @@ { return *(s8 *)p; } -static inline int isonum_721(char *p) +static inline unsigned int isonum_721(char *p) { return le16_to_cpu(get_unaligned((u16 *)p)); } -static inline int isonum_722(char *p) +static inline unsigned int isonum_722(char *p) { return be16_to_cpu(get_unaligned((u16 *)p)); } -static inline int isonum_723(char *p) +static inline unsigned int isonum_723(char *p) { /* Ignore bigendian datum due to broken mastering programs */ return le16_to_cpu(get_unaligned((u16 *)p)); } -static inline int isonum_731(char *p) +static inline unsigned int isonum_731(char *p) { return le32_to_cpu(get_unaligned((u32 *)p)); } -static inline int isonum_732(char *p) +static inline unsigned int isonum_732(char *p) { return be32_to_cpu(get_unaligned((u32 *)p)); } -static inline int isonum_733(char *p) +static inline unsigned int isonum_733(char *p) { /* Ignore bigendian datum due to broken mastering programs */ return le32_to_cpu(get_unaligned((u32 *)p)); diff -urN linux-2.4.28-bk3/include/linux/scc.h linux-2.4.28-bk4/include/linux/scc.h --- linux-2.4.28-bk3/include/linux/scc.h 2001-04-12 12:20:31.000000000 -0700 +++ linux-2.4.28-bk4/include/linux/scc.h 2004-11-23 02:49:27.612400965 -0800 @@ -200,7 +200,7 @@ unsigned char fulldup; /* Full Duplex mode 0=CSMA 1=DUP 2=ALWAYS KEYED */ unsigned char waittime; /* Waittime before any transmit attempt */ unsigned int maxkeyup; /* Maximum time to transmit (seconds) */ - unsigned char mintime; /* Minimal offtime after MAXKEYUP timeout (seconds) */ + unsigned int mintime; /* Minimal offtime after MAXKEYUP timeout (seconds) */ unsigned int idletime; /* Maximum idle time in ALWAYS KEYED mode (seconds) */ unsigned int maxdefer; /* Timer for CSMA channel busy limit */ unsigned char tx_inhibit; /* Transmit is not allowed when set */ diff -urN linux-2.4.28-bk3/net/8021q/vlan_dev.c linux-2.4.28-bk4/net/8021q/vlan_dev.c --- linux-2.4.28-bk3/net/8021q/vlan_dev.c 2004-08-07 16:26:06.000000000 -0700 +++ linux-2.4.28-bk4/net/8021q/vlan_dev.c 2004-11-23 02:49:27.615401087 -0800 @@ -528,7 +528,7 @@ dev->mtu = new_mtu; - return new_mtu; + return 0; } int vlan_dev_set_ingress_priority(char *dev_name, __u32 skb_prio, short vlan_prio) diff -urN linux-2.4.28-bk3/net/ipv4/tcp_input.c linux-2.4.28-bk4/net/ipv4/tcp_input.c --- linux-2.4.28-bk3/net/ipv4/tcp_input.c 2004-11-17 03:54:22.000000000 -0800 +++ linux-2.4.28-bk4/net/ipv4/tcp_input.c 2004-11-23 02:49:27.618401210 -0800 @@ -474,6 +474,8 @@ tp->rcvq_space.space = space; if (sysctl_tcp_moderate_rcvbuf) { + int new_clamp = space; + /* Receive space grows, normalize in order to * take into account packet headers and sk_buff * structure overhead. @@ -483,10 +485,16 @@ space = 1; rcvmem = (tp->advmss + MAX_TCP_HEADER + 16 + sizeof(struct sk_buff)); + while (tcp_win_from_space(rcvmem) < tp->advmss) + rcvmem += 128; space *= rcvmem; space = min(space, sysctl_tcp_rmem[2]); - if (space > sk->rcvbuf) + if (space > sk->rcvbuf) { sk->rcvbuf = space; + + /* Make the window clamp follow along. */ + tp->window_clamp = new_clamp; + } } } diff -urN linux-2.4.28-bk3/net/netlink/af_netlink.c linux-2.4.28-bk4/net/netlink/af_netlink.c --- linux-2.4.28-bk3/net/netlink/af_netlink.c 2004-02-18 05:36:32.000000000 -0800 +++ linux-2.4.28-bk4/net/netlink/af_netlink.c 2004-11-23 02:49:27.620401291 -0800 @@ -40,6 +40,11 @@ #include #include #include +#include +#include +#include +#include +#include #include #include @@ -52,9 +57,9 @@ struct netlink_opt { u32 pid; - unsigned groups; + unsigned int groups; u32 dst_pid; - unsigned dst_groups; + unsigned int dst_groups; unsigned long state; int (*handler)(int unit, struct sk_buff *skb); wait_queue_head_t wait; @@ -63,9 +68,30 @@ void (*data_ready)(struct sock *sk, int bytes); }; -static struct sock *nl_table[MAX_LINKS]; +struct nl_pid_hash { + struct sock **table; + unsigned long rehash_time; + + unsigned int mask; + unsigned int shift; + + unsigned int entries; + unsigned int max_shift; + + u32 rnd; +}; + +struct netlink_table { + struct nl_pid_hash hash; + struct sock *mc_list; +}; + +#define nlk_sk(__sk) ((__sk)->protinfo.af_netlink) + +static struct netlink_table *nl_table; + static DECLARE_WAIT_QUEUE_HEAD(nl_table_wait); -static unsigned nl_nonroot[MAX_LINKS]; +static unsigned int nl_nonroot[MAX_LINKS]; #ifdef NL_EMULATE_DEV static struct socket *netlink_kernel[MAX_LINKS]; @@ -81,6 +107,11 @@ static struct notifier_block *netlink_chain; +static struct sock **nl_pid_hashfn(struct nl_pid_hash *hash, u32 pid) +{ + return &hash->table[jhash_1word(pid, hash->rnd) & hash->mask]; +} + static void netlink_sock_destruct(struct sock *sk) { skb_queue_purge(&sk->receive_queue); @@ -154,10 +185,11 @@ static __inline__ struct sock *netlink_lookup(int protocol, u32 pid) { + struct nl_pid_hash *hash = &nl_table[protocol].hash; struct sock *sk; read_lock(&nl_table_lock); - for (sk=nl_table[protocol]; sk; sk=sk->next) { + for (sk = *nl_pid_hashfn(hash, pid); sk; sk = sk->next) { if (sk->protinfo.af_netlink->pid == pid) { sock_hold(sk); read_unlock(&nl_table_lock); @@ -169,28 +201,123 @@ return NULL; } +static inline struct sock **nl_pid_hash_alloc(size_t size) +{ + if (size <= PAGE_SIZE) + return kmalloc(size, GFP_ATOMIC); + else + return (struct sock **) + __get_free_pages(GFP_ATOMIC, get_order(size)); +} + +static inline void nl_pid_hash_free(struct sock **table, size_t size) +{ + if (size <= PAGE_SIZE) + kfree(table); + else + free_pages((unsigned long)table, get_order(size)); +} + +static int nl_pid_hash_rehash(struct nl_pid_hash *hash, int grow) +{ + unsigned int omask, mask, shift; + size_t osize, size; + struct sock **otable, **table; + int i; + + omask = mask = hash->mask; + osize = size = (mask + 1) * sizeof(*table); + shift = hash->shift; + + if (grow) { + if (++shift > hash->max_shift) + return 0; + mask = mask * 2 + 1; + size *= 2; + } + + table = nl_pid_hash_alloc(size); + if (!table) + return 0; + + memset(table, 0, size); + otable = hash->table; + hash->table = table; + hash->mask = mask; + hash->shift = shift; + get_random_bytes(&hash->rnd, sizeof(hash->rnd)); + + for (i = 0; i <= omask; i++) { + struct sock *sk; + struct sock *tmp, **head; + + for (sk = otable[i]; sk; sk = tmp) { + tmp = sk->next; + head = nl_pid_hashfn(hash, nlk_sk(sk)->pid); + sk->next = *head; + *head = sk; + } + } + + nl_pid_hash_free(otable, osize); + hash->rehash_time = jiffies + 10 * 60 * HZ; + return 1; +} + +static inline int nl_pid_hash_dilute(struct nl_pid_hash *hash, int len) +{ + int avg = hash->entries >> hash->shift; + + if (unlikely(avg > 1) && nl_pid_hash_rehash(hash, 1)) + return 1; + + if (unlikely(len > avg) && time_after(jiffies, hash->rehash_time)) { + nl_pid_hash_rehash(hash, 0); + return 1; + } + + return 0; +} + extern struct proto_ops netlink_ops; static int netlink_insert(struct sock *sk, u32 pid) { + struct nl_pid_hash *hash = &nl_table[sk->sk_protocol].hash; + struct sock **head; int err = -EADDRINUSE; struct sock *osk; + int len; netlink_table_grab(); - for (osk=nl_table[sk->protocol]; osk; osk=osk->next) { + head = nl_pid_hashfn(hash, pid); + len = 0; + for (osk = *head; osk; osk = osk->next) { if (osk->protinfo.af_netlink->pid == pid) break; + len++; } - if (osk == NULL) { - err = -EBUSY; - if (sk->protinfo.af_netlink->pid == 0) { - sk->protinfo.af_netlink->pid = pid; - sk->next = nl_table[sk->protocol]; - nl_table[sk->protocol] = sk; - sock_hold(sk); - err = 0; - } - } + if (osk) + goto err; + + err = -EBUSY; + if (nlk_sk(sk)->pid) + goto err; + + err = -ENOMEM; + if (BITS_PER_LONG > 32 && unlikely(hash->entries >= UINT_MAX)) + goto err; + + if (len && nl_pid_hash_dilute(hash, len)) + head = nl_pid_hashfn(hash, pid); + hash->entries++; + nlk_sk(sk)->pid = pid; + sk->next = *head; + *head = sk; + sock_hold(sk); + err = 0; + +err: netlink_table_ungrab(); return err; } @@ -198,15 +325,27 @@ static void netlink_remove(struct sock *sk) { struct sock **skp; + struct netlink_table *table = &nl_table[sk->sk_protocol]; + struct nl_pid_hash *hash = &table->hash; netlink_table_grab(); - for (skp = &nl_table[sk->protocol]; *skp; skp = &((*skp)->next)) { + hash->entries--; + for (skp = hash->table; *skp; skp = &((*skp)->next)) { if (*skp == sk) { *skp = sk->next; __sock_put(sk); break; } } + if (!nlk_sk(sk)->groups) + goto out; + for (skp = &table->mc_list; *skp; skp = &((*skp)->next)) { + if (*skp == sk) { + *skp = sk->next; + break; + } + } +out: netlink_table_ungrab(); } @@ -286,18 +425,21 @@ static int netlink_autobind(struct socket *sock) { struct sock *sk = sock->sk; + struct nl_pid_hash *hash = &nl_table[sk->sk_protocol].hash; struct sock *osk; s32 pid = current->pid; int err; + static s32 rover = -4097; retry: + cond_resched(); netlink_table_grab(); - for (osk=nl_table[sk->protocol]; osk; osk=osk->next) { + for (osk = *nl_pid_hashfn(hash, pid); osk; osk = osk->next) { if (osk->protinfo.af_netlink->pid == pid) { /* Bind collision, search negative pid values. */ - if (pid > 0) - pid = -4096; - pid--; + pid = rover--; + if (rover > -4097) + rover = -4097; netlink_table_ungrab(); goto retry; } @@ -311,7 +453,7 @@ return 0; } -static inline int netlink_capable(struct socket *sock, unsigned flag) +static inline int netlink_capable(struct socket *sock, unsigned int flag) { return (nl_nonroot[sock->sk->protocol] & flag) || capable(CAP_NET_ADMIN); } @@ -319,7 +461,9 @@ static int netlink_bind(struct socket *sock, struct sockaddr *addr, int addr_len) { struct sock *sk = sock->sk; + struct sock **skp; int err; + struct netlink_opt *nlk = nlk_sk(sk); struct sockaddr_nl *nladdr=(struct sockaddr_nl *)addr; if (nladdr->nl_family != AF_NETLINK) @@ -332,21 +476,34 @@ if (sk->protinfo.af_netlink->pid) { if (nladdr->nl_pid != sk->protinfo.af_netlink->pid) return -EINVAL; - sk->protinfo.af_netlink->groups = nladdr->nl_groups; - return 0; + } else { + err = nladdr->nl_pid ? + netlink_insert(sk, nladdr->nl_pid) : + netlink_autobind(sock); + if (err) + return err; } - if (nladdr->nl_pid == 0) { - err = netlink_autobind(sock); - if (err == 0) - sk->protinfo.af_netlink->groups = nladdr->nl_groups; - return err; + if (!nladdr->nl_groups && !nlk->groups) + return 0; + + netlink_table_grab(); + skp = &nl_table[sk->sk_protocol].mc_list; + if (nlk->groups && !nladdr->nl_groups) { + for (; *skp; skp = &((*skp)->bind_next)) { + if (*skp == sk) { + *skp = sk->bind_next; + break; + } + } + } else if (!nlk->groups && nladdr->nl_groups) { + sk->bind_next = *skp; + *skp = sk; } + nlk->groups = nladdr->nl_groups; + netlink_table_ungrab(); - err = netlink_insert(sk, nladdr->nl_pid); - if (err == 0) - sk->protinfo.af_netlink->groups = nladdr->nl_groups; - return err; + return 0; } static int netlink_connect(struct socket *sock, struct sockaddr *addr, @@ -496,75 +653,120 @@ return -1; } +struct netlink_broadcast_data { + struct sock *exclude_sk; + u32 pid; + u32 group; + int failure; + int allocation; + struct sk_buff *skb, *skb2; +}; + +static inline int do_one_broadcast(struct sock *sk, + struct netlink_broadcast_data *p) +{ + struct netlink_opt *nlk = nlk_sk(sk); + int val; + + if (p->exclude_sk == sk) + goto out; + + if (nlk->pid == p->pid || !(nlk->groups & p->group)) + goto out; + + if (p->failure) { + netlink_overrun(sk); + goto out; + } + + sock_hold(sk); + if (p->skb2 == NULL) { + if (atomic_read(&p->skb->users) != 1) { + p->skb2 = skb_clone(p->skb, p->allocation); + } else { + p->skb2 = p->skb; + atomic_inc(&p->skb->users); + } + } + if (p->skb2 == NULL) { + netlink_overrun(sk); + /* Clone failed. Notify ALL listeners. */ + p->failure = 1; + } else if ((val = netlink_broadcast_deliver(sk, p->skb2)) < 0) { + netlink_overrun(sk); + } else + p->skb2 = NULL; + sock_put(sk); + +out: + return 0; +} + void netlink_broadcast(struct sock *ssk, struct sk_buff *skb, u32 pid, u32 group, int allocation) { + struct netlink_broadcast_data info; struct sock *sk; - struct sk_buff *skb2 = NULL; - int protocol = ssk->protocol; - int failure = 0; + + info.exclude_sk = ssk; + info.pid = pid; + info.group = group; + info.failure = 0; + info.allocation = allocation; + info.skb = skb; + info.skb2 = NULL; /* While we sleep in clone, do not allow to change socket list */ netlink_lock_table(); - for (sk = nl_table[protocol]; sk; sk = sk->next) { - if (ssk == sk) - continue; - - if (sk->protinfo.af_netlink->pid == pid || - !(sk->protinfo.af_netlink->groups&group)) - continue; - - if (failure) { - netlink_overrun(sk); - continue; - } - - sock_hold(sk); - if (skb2 == NULL) { - if (atomic_read(&skb->users) != 1) { - skb2 = skb_clone(skb, allocation); - } else { - skb2 = skb; - atomic_inc(&skb->users); - } - } - if (skb2 == NULL) { - netlink_overrun(sk); - /* Clone failed. Notify ALL listeners. */ - failure = 1; - } else if (netlink_broadcast_deliver(sk, skb2)) { - netlink_overrun(sk); - } else - skb2 = NULL; - sock_put(sk); - } + for (sk = nl_table[ssk->sk_protocol].mc_list; sk; sk = sk->bind_next) + do_one_broadcast(sk, &info); netlink_unlock_table(); - if (skb2) - kfree_skb(skb2); + if (info.skb2) + kfree_skb(info.skb2); kfree_skb(skb); } +struct netlink_set_err_data { + struct sock *exclude_sk; + u32 pid; + u32 group; + int code; +}; + +static inline int do_one_set_err(struct sock *sk, + struct netlink_set_err_data *p) +{ + struct netlink_opt *nlk = nlk_sk(sk); + + if (sk == p->exclude_sk) + goto out; + + if (nlk->pid == p->pid || !(nlk->groups & p->group)) + goto out; + + sk->sk_err = p->code; + sk->sk_error_report(sk); +out: + return 0; +} + void netlink_set_err(struct sock *ssk, u32 pid, u32 group, int code) { + struct netlink_set_err_data info; struct sock *sk; - int protocol = ssk->protocol; - read_lock(&nl_table_lock); - for (sk = nl_table[protocol]; sk; sk = sk->next) { - if (ssk == sk) - continue; - - if (sk->protinfo.af_netlink->pid == pid || - !(sk->protinfo.af_netlink->groups&group)) - continue; + info.exclude_sk = ssk; + info.pid = pid; + info.group = group; + info.code = code; - sk->err = code; - sk->error_report(sk); - } + read_lock(&nl_table_lock); + for (sk = nl_table[ssk->sk_protocol].mc_list; sk; sk = sk->bind_next) + do_one_set_err(sk, &info); read_unlock(&nl_table_lock); } @@ -713,6 +915,9 @@ struct socket *sock; struct sock *sk; + if (!nl_table) + return NULL; + if (unit<0 || unit>=MAX_LINKS) return NULL; @@ -734,9 +939,9 @@ return sk; } -void netlink_set_nonroot(int protocol, unsigned flags) +void netlink_set_nonroot(int protocol, unsigned int flags) { - if ((unsigned)protocol < MAX_LINKS) + if ((unsigned int)protocol < MAX_LINKS) nl_nonroot[protocol] = flags; } @@ -926,42 +1131,51 @@ #ifdef CONFIG_PROC_FS +struct nl_seq_iter { + int link; + int hash_idx; +}; + static int netlink_read_proc(char *buffer, char **start, off_t offset, int length, int *eof, void *data) { off_t pos=0; off_t begin=0; int len=0; - int i; + int i, j; struct sock *s; len+= sprintf(buffer,"sk Eth Pid Groups " "Rmem Wmem Dump Locks\n"); for (i=0; inext) { - len+=sprintf(buffer+len,"%p %-3d %-6d %08x %-8d %-8d %p %d", - s, - s->protocol, - s->protinfo.af_netlink->pid, - s->protinfo.af_netlink->groups, - atomic_read(&s->rmem_alloc), - atomic_read(&s->wmem_alloc), - s->protinfo.af_netlink->cb, - atomic_read(&s->refcnt) - ); + for (j = 0; j <= hash->mask; j++) { + for (s = hash->table[j]; s; s = s->next) { + len += sprintf(buffer + len, + "%p %-3d %-6d %08x %-8d %-8d %p %d", + s, + s->protocol, + s->protinfo.af_netlink->pid, + s->protinfo.af_netlink->groups, + atomic_read(&s->rmem_alloc), + atomic_read(&s->wmem_alloc), + s->protinfo.af_netlink->cb, + atomic_read(&s->refcnt)); - buffer[len++]='\n'; + buffer[len++]='\n'; - pos=begin+len; - if(posoffset+length) { - read_unlock(&nl_table_lock); - goto done; + pos = begin + len; + if (pos < offset) { + len = 0; + begin = pos; + } + if (pos > offset + length) { + read_unlock(&nl_table_lock); + goto done; + } } } read_unlock(&nl_table_lock); @@ -1015,14 +1229,60 @@ netlink_create }; +extern void netlink_skb_parms_too_large(void); + static int __init netlink_proto_init(void) { struct sk_buff *dummy_skb; + int i; + unsigned long max; + unsigned int order; + + if (sizeof(struct netlink_skb_parms) > sizeof(dummy_skb->cb)) + netlink_skb_parms_too_large(); - if (sizeof(struct netlink_skb_parms) > sizeof(dummy_skb->cb)) { - printk(KERN_CRIT "netlink_init: panic\n"); - return -1; + nl_table = kmalloc(sizeof(*nl_table) * MAX_LINKS, GFP_KERNEL); + if (!nl_table) { +enomem: + printk(KERN_CRIT "netlink_init: Cannot allocate nl_table\n"); + return -ENOMEM; + } + + memset(nl_table, 0, sizeof(*nl_table) * MAX_LINKS); + + if (num_physpages >= (128 * 1024)) + max = num_physpages >> (21 - PAGE_SHIFT); + else + max = num_physpages >> (23 - PAGE_SHIFT); + + for (order = 0; (1UL << order) < max + 1; order++) + ; + order += PAGE_SHIFT - 1; + max = (1UL << order) / sizeof(struct sock *); + if (max > UINT_MAX) + max = UINT_MAX; + for (order = 0; (1UL << order) < max + 1; order++) + ; + order--; + + for (i = 0; i < MAX_LINKS; i++) { + struct nl_pid_hash *hash = &nl_table[i].hash; + + hash->table = nl_pid_hash_alloc(1 * sizeof(*hash->table)); + if (!hash->table) { + while (i-- > 0) + nl_pid_hash_free(nl_table[i].hash.table, + 1 * sizeof(*hash->table)); + kfree(nl_table); + goto enomem; + } + memset(hash->table, 0, 1 * sizeof(*hash->table)); + hash->max_shift = order; + hash->shift = 0; + hash->mask = 0; + hash->rehash_time = jiffies; } + sock_register(&netlink_family_ops); #ifdef CONFIG_PROC_FS create_proc_read_entry("net/netlink", 0, 0, netlink_read_proc, NULL); @@ -1034,6 +1294,8 @@ { sock_unregister(PF_NETLINK); remove_proc_entry("net/netlink", NULL); + kfree(nl_table); + nl_table = NULL; } module_init(netlink_proto_init);