diff -Nru a/Documentation/Changes b/Documentation/Changes --- a/Documentation/Changes Mon Dec 23 21:22:00 2002 +++ b/Documentation/Changes Mon Dec 23 21:22:00 2002 @@ -61,6 +61,7 @@ o PPP 2.4.0 # pppd --version o isdn4k-utils 3.1pre1 # isdnctrl 2>&1|grep version o procps 2.0.9 # ps --version +o oprofile 0.5 # oprofiled --version Kernel compilation ================== @@ -368,6 +369,10 @@ --------- o +OProfile +-------- +o + Suggestions and corrections =========================== diff -Nru a/Documentation/DMA-API.txt b/Documentation/DMA-API.txt --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/Documentation/DMA-API.txt Mon Dec 23 21:22:04 2002 @@ -0,0 +1,325 @@ + Dynamic DMA mapping using the generic device + ============================================ + + James E.J. Bottomley + +This document describes the DMA API. For a more gentle introduction +phrased in terms of the pci_ equivalents (and actual examples) see +DMA-mapping.txt + +This API is split into two pieces. Part I describes the API and the +corresponding pci_ API. Part II describes the extensions to the API +for supporting non-consistent memory machines. Unless you know that +your driver absolutely has to support non-consistent platforms (this +is usually only legacy platforms) you should only use the API +described in part I. + +Part I - pci_ and dma_ Equivalent API +------------------------------------- + +To get the pci_ API, you must #include +To get the dma_ API, you must #include + +void * +dma_alloc_coherent(struct device *dev, size_t size, + dma_addr_t *dma_handle) +void * +pci_alloc_consistent(struct pci_dev *dev, size_t size, + dma_addr_t *dma_handle) + +Consistent memory is memory for which a write by either the device or +the processor can immediately be read by the processor or device +without having to worry about caching effects. + +This routine allocates a region of bytes of consistent memory. +it also returns a which may be cast to an unsigned +integer the same width as the bus and used as the physical address +base of the region. + +Returns: a pointer to the allocated region (in the processor's virtual +address space) or NULL if the allocation failed. + +Note: consistent memory can be expensive on some platforms, and the +minimum allocation length may be as big as a page, so you should +consolidate your requests for consistent memory as much as possible. + +void +dma_free_coherent(struct device *dev, size_t size, void *cpu_addr + dma_addr_t dma_handle) +void +pci_free_consistent(struct pci_dev *dev, size_t size, void *cpu_addr + dma_addr_t dma_handle) + +Free the region of consistent memory you previously allocated. dev, +size and dma_handle must all be the same as those passed into the +consistent allocate. cpu_addr must be the virtual address returned by +the consistent allocate + +int +dma_supported(struct device *dev, u64 mask) +int +pci_dma_supported(struct device *dev, u64 mask) + +Checks to see if the device can support DMA to the memory described by +mask. + +Returns: 1 if it can and 0 if it can't. + +Notes: This routine merely tests to see if the mask is possible. It +won't change the current mask settings. It is more intended as an +internal API for use by the platform than an external API for use by +driver writers. + +int +dma_set_mask(struct device *dev, u64 mask) +int +pci_dma_set_mask(struct pci_device *dev, u64 mask) + +Checks to see if the mask is possible and updates the device +parameters if it is. + +Returns: 1 if successful and 0 if not + +dma_addr_t +dma_map_single(struct device *dev, void *cpu_addr, size_t size, + enum dma_data_direction direction) +dma_addr_t +pci_map_single(struct device *dev, void *cpu_addr, size_t size, + int direction) + +Maps a piece of processor virtual memory so it can be accessed by the +device and returns the physical handle of the memory. + +The direction for both api's may be converted freely by casting. +However the dma_ API uses a strongly typed enumerator for its +direction: + +DMA_NONE = PCI_DMA_NONE no direction (used for + debugging) +DMA_TO_DEVICE = PCI_DMA_TODEVICE data is going from the + memory to the device +DMA_FROM_DEVICE = PCI_DMA_FROMDEVICE data is coming from + the device to the + memory +DMA_BIDIRECTIONAL = PCI_DMA_BIDIRECTIONAL direction isn't known + +Notes: Not all memory regions in a machine can be mapped by this +API. Further, regions that appear to be physically contiguous in +kernel virtual space may not be contiguous as physical memory. Since +this API does not provide any scatter/gather capability, it will fail +if the user tries to map a non physically contiguous piece of memory. +For this reason, it is recommended that memory mapped by this API be +obtained only from sources which guarantee to be physically contiguous +(like kmalloc). + +Further, the physical address of the memory must be within the +dma_mask of the device (the dma_mask represents a bit mask of the +addressable region for the device. i.e. if the physical address of +the memory anded with the dma_mask is still equal to the physical +address, then the device can perform DMA to the memory). In order to +ensure that the memory allocated by kmalloc is within the dma_mask, +the driver may specify various platform dependent flags to restrict +the physical memory range of the allocation (e.g. on x86, GFP_DMA +guarantees to be within the first 16Mb of available physical memory, +as required by ISA devices). + +Note also that the above constraints on physical contiguity and +dma_mask may not apply if the platform has an IOMMU (a device which +supplies a physical to virtual mapping between the I/O memory bus and +the device). However, to be portable, device driver writers may *not* +assume that such an IOMMU exists. + +Warnings: Memory coherency operates at a granularity called the cache +line width. In order for memory mapped by this API to operate +correctly, the mapped region must begin exactly on a cache line +boundary and end exactly on one (to prevent two separately mapped +regions from sharing a single cache line). Since the cache line size +may not be known at compile time, the API will not enforce this +requirement. Therefore, it is recommended that driver writers who +don't take special care to determine the cache line size at run time +only map virtual regions that begin and end on page boundaries (which +are guaranteed also to be cache line boundaries). + +DMA_TO_DEVICE synchronisation must be done after the last modification +of the memory region by the software and before it is handed off to +the driver. Once this primitive is used. Memory covered by this +primitive should be treated as read only by the device. If the device +may write to it at any point, it should be DMA_BIDIRECTIONAL (see +below). + +DMA_FROM_DEVICE synchronisation must be done before the driver +accesses data that may be changed by the device. This memory should +be treated as read only by the driver. If the driver needs to write +to it at any point, it should be DMA_BIDIRECTIONAL (see below). + +DMA_BIDIRECTIONAL requires special handling: it means that the driver +isn't sure if the memory was modified before being handed off to the +device and also isn't sure if the device will also modify it. Thus, +you must always sync bidirectional memory twice: once before the +memory is handed off to the device (to make sure all memory changes +are flushed from the processor) and once before the data may be +accessed after being used by the device (to make sure any processor +cache lines are updated with data that the device may have changed. + +void +dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size, + enum dma_data_direction direction) +void +pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr, + size_t size, int direction) + +Unmaps the region previously mapped. All the parameters passed in +must be identical to those passed in (and returned) by the mapping +API. + +dma_addr_t +dma_map_page(struct device *dev, struct page *page, + unsigned long offset, size_t size, + enum dma_data_direction direction) +dma_addr_t +pci_map_page(struct pci_dev *hwdev, struct page *page, + unsigned long offset, size_t size, int direction) +void +dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size, + enum dma_data_direction direction) +void +pci_unmap_page(struct pci_dev *hwdev, dma_addr_t dma_address, + size_t size, int direction) + +API for mapping and unmapping for pages. All the notes and warnings +for the other mapping APIs apply here. Also, although the +and parameters are provided to do partial page mapping, it is +recommended that you never use these unless you really know what the +cache width is. + +int +dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, + enum dma_data_direction direction) +int +pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg, + int nents, int direction) + +Maps a scatter gather list from the block layer. + +Returns: the number of physical segments mapped (this may be shorted +than passed in if the block layer determines that some +elements of the scatter/gather list are physically adjacent and thus +may be mapped with a single entry). + +void +dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries, + enum dma_data_direction direction) +void +pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg, + int nents, int direction) + +unmap the previously mapped scatter/gather list. All the parameters +must be the same as those and passed in to the scatter/gather mapping +API. + +Note: must be the number you passed in, *not* the number of +physical entries returned. + +void +dma_sync_single(struct device *dev, dma_addr_t dma_handle, size_t size, + enum dma_data_direction direction) +void +pci_dma_sync_single(struct pci_dev *hwdev, dma_addr_t dma_handle, + size_t size, int direction) +void +dma_sync_sg(struct device *dev, struct scatterlist *sg, int nelems, + enum dma_data_direction direction) +void +pci_dma_sync_sg(struct pci_dev *hwdev, struct scatterlist *sg, + int nelems, int direction) + +synchronise a single contiguous or scatter/gather mapping. All the +parameters must be the same as those passed into the single mapping +API. + +Notes: You must do this: + +- Before reading values that have been written by DMA from the device + (use the DMA_FROM_DEVICE direction) +- After writing values that will be written to the device using DMA + (use the DMA_TO_DEVICE) direction +- before *and* after handing memory to the device if the memory is + DMA_BIDIRECTIONAL + +See also dma_map_single(). + +Part II - Advanced dma_ usage +----------------------------- + +Warning: These pieces of the DMA API have no PCI equivalent. They +should also not be used in the majority of cases, since they cater for +unlikely corner cases that don't belong in usual drivers. + +If you don't understand how cache line coherency works between a +processor and an I/O device, you should not be using this part of the +API at all. + +void * +dma_alloc_noncoherent(struct device *dev, size_t size, + dma_addr_t *dma_handle) + +Identical to dma_alloc_coherent() except that the platform will +choose to return either consistent or non-consistent memory as it sees +fit. By using this API, you are guaranteeing to the platform that you +have all the correct and necessary sync points for this memory in the +driver should it choose to return non-consistent memory. + +Note: where the platform can return consistent memory, it will +guarantee that the sync points become nops. + +Warning: Handling non-consistent memory is a real pain. You should +only ever use this API if you positively know your driver will be +required to work on one of the rare (usually non-PCI) architectures +that simply cannot make consistent memory. + +void +dma_free_noncoherent(struct device *dev, size_t size, void *cpu_addr, + dma_addr_t dma_handle) + +free memory allocated by the nonconsistent API. All parameters must +be identical to those passed in (and returned by +dma_alloc_noncoherent()). + +int +dma_is_consistent(dma_addr_t dma_handle) + +returns true if the memory pointed to by the dma_handle is actually +consistent. + +int +dma_get_cache_alignment(void) + +returns the processor cache alignment. This is the absolute minimum +alignment *and* width that you must observe when either mapping +memory or doing partial flushes. + +Notes: This API may return a number *larger* than the actual cache +line, but it will guarantee that one or more cache lines fit exactly +into the width returned by this call. It will also always be a power +of two for easy alignment + +void +dma_sync_single_range(struct device *dev, dma_addr_t dma_handle, + unsigned long offset, size_t size, + enum dma_data_direction direction) + +does a partial sync. starting at offset and continuing for size. You +must be careful to observe the cache alignment and width when doing +anything like this. You must also be extra careful about accessing +memory you intend to sync partially. + +void +dma_cache_sync(void *vaddr, size_t size, + enum dma_data_direction direction) + +Do a partial sync of memory that was allocated by +dma_alloc_noncoherent(), starting at virtual address vaddr and +continuing on for size. Again, you *must* observe the cache line +boundaries when doing this. + + diff -Nru a/Documentation/DMA-mapping.txt b/Documentation/DMA-mapping.txt --- a/Documentation/DMA-mapping.txt Mon Dec 23 21:21:55 2002 +++ b/Documentation/DMA-mapping.txt Mon Dec 23 21:21:55 2002 @@ -5,6 +5,10 @@ Richard Henderson Jakub Jelinek +This document describes the DMA mapping system in terms of the pci_ +API. For a similar API that works for generic devices, see +DMA-API.txt. + Most of the 64bit platforms have special hardware that translates bus addresses (DMA addresses) into physical addresses. This is similar to how page tables and/or a TLB translates virtual addresses to physical diff -Nru a/Documentation/filesystems/Locking b/Documentation/filesystems/Locking --- a/Documentation/filesystems/Locking Mon Dec 23 21:22:00 2002 +++ b/Documentation/filesystems/Locking Mon Dec 23 21:22:00 2002 @@ -92,7 +92,7 @@ void (*delete_inode) (struct inode *); void (*put_super) (struct super_block *); void (*write_super) (struct super_block *); - void (*sync_fs) (struct super_block *sb, int wait); + int (*sync_fs) (struct super_block *sb, int wait); int (*statfs) (struct super_block *, struct statfs *); int (*remount_fs) (struct super_block *, int *, char *); void (*clear_inode) (struct inode *); diff -Nru a/Documentation/networking/bonding.txt b/Documentation/networking/bonding.txt --- a/Documentation/networking/bonding.txt Mon Dec 23 21:21:52 2002 +++ b/Documentation/networking/bonding.txt Mon Dec 23 21:21:52 2002 @@ -17,6 +17,23 @@ For new versions of the driver, patches for older kernels and the updated userspace tools, please follow the links at the end of this file. + +Table of Contents +================= + +Installation +Bond Configuration +Module Parameters +Configuring Multiple Bonds +Switch Configuration +Verifying Bond Configuration +Frequently Asked Questions +High Availability +Promiscuous Sniffing notes +Limitations +Resources and Links + + Installation ============ @@ -51,16 +68,21 @@ # gcc -Wall -Wstrict-prototypes -O -I/usr/src/linux/include ifenslave.c -o ifenslave # cp ifenslave /sbin/ifenslave -3) Configure your system ------------------------- -Also see the following section on the module parameters. You will need to add -at least the following line to /etc/conf.modules (or /etc/modules.conf): + +Bond Configuration +================== + +You will need to add at least the following line to /etc/modules.conf +so the bonding driver will automatically load when the bond0 interface is +configured. Refer to the modules.conf manual page for specific modules.conf +syntax details. The Module Parameters section of this document describes each +bonding driver parameter. alias bond0 bonding -Use standard distribution techniques to define bond0 network interface. For -example, on modern RedHat distributions, create ifcfg-bond0 file in -/etc/sysconfig/network-scripts directory that looks like this: +Use standard distribution techniques to define the bond0 network interface. For +example, on modern Red Hat distributions, create an ifcfg-bond0 file in +the /etc/sysconfig/network-scripts directory that resembles the following: DEVICE=bond0 IPADDR=192.168.1.1 @@ -71,12 +93,12 @@ BOOTPROTO=none USERCTL=no -(put the appropriate values for you network instead of 192.168.1). +(use appropriate values for your network above) -All interfaces that are part of the trunk, should have SLAVE and MASTER -definitions. For example, in the case of RedHat, if you wish to make eth0 and -eth1 (or other interfaces) a part of the bonding interface bond0, their config -files (ifcfg-eth0, ifcfg-eth1, etc.) should look like this: +All interfaces that are part of a bond should have SLAVE and MASTER +definitions. For example, in the case of Red Hat, if you wish to make eth0 and +eth1 a part of the bonding interface bond0, their config files (ifcfg-eth0 and +ifcfg-eth1) should resemble the following: DEVICE=eth0 USERCTL=no @@ -85,89 +107,261 @@ SLAVE=yes BOOTPROTO=none -(use DEVICE=eth1 for eth1 and MASTER=bond1 for bond1 if you have configured -second bonding interface). +Use DEVICE=eth1 in the ifcfg-eth1 config file. If you configure a second bonding +interface (bond1), use MASTER=bond1 in the config file to make the network +interface be a slave of bond1. Restart the networking subsystem or just bring up the bonding device if your -administration tools allow it. Otherwise, reboot. (For the case of RedHat -distros, you can do `ifup bond0' or `/etc/rc.d/init.d/network restart'.) +administration tools allow it. Otherwise, reboot. On Red Hat distros you can +issue `ifup bond0' or `/etc/rc.d/init.d/network restart'. If the administration tools of your distribution do not support master/slave -notation in configuration of network interfaces, you will need to configure -the bonding device with the following commands manually: +notation in configuring network interfaces, you will need to manually configure +the bonding device with the following commands: + + # /sbin/ifconfig bond0 192.168.1.1 netmask 255.255.255.0 \ + broadcast 192.168.1.255 up - # /sbin/ifconfig bond0 192.168.1.1 up # /sbin/ifenslave bond0 eth0 # /sbin/ifenslave bond0 eth1 -(substitute 192.168.1.1 with your IP address and add custom network and custom -netmask to the arguments of ifconfig if required). +(use appropriate values for your network above) -You can then create a script with these commands and put it into the appropriate -rc directory. +You can then create a script containing these commands and place it in the +appropriate rc directory. -If you specifically need that all your network drivers are loaded before the -bonding driver, use one of modutils' powerful features : in your modules.conf, -tell that when asked for bond0, modprobe should first load all your interfaces : +If you specifically need all network drivers loaded before the bonding driver, +adding the following line to modules.conf will cause the network driver for +eth0 and eth1 to be loaded before the bonding driver. probeall bond0 eth0 eth1 bonding -Be careful not to reference bond0 itself at the end of the line, or modprobe will -die in an endless recursive loop. - -4) Module parameters. ---------------------- -The following module parameters can be passed: +Be careful not to reference bond0 itself at the end of the line, or modprobe +will die in an endless recursive loop. - mode= +To have device characteristics (such as MTU size) propagate to slave devices, +set the bond characteristics before enslaving the device. The characteristics +are propagated during the enslave process. + +If running SNMP agents, the bonding driver should be loaded before any network +drivers participating in a bond. This requirement is due to the the interface +index (ipAdEntIfIndex) being associated to the first interface found with a +given IP address. That is, there is only one ipAdEntIfIndex for each IP +address. For example, if eth0 and eth1 are slaves of bond0 and the driver for +eth0 is loaded before the bonding driver, the interface for the IP address +will be associated with the eth0 interface. This configuration is shown below, +the IP address 192.168.1.1 has an interface index of 2 which indexes to eth0 +in the ifDescr table (ifDescr.2). + + interfaces.ifTable.ifEntry.ifDescr.1 = lo + interfaces.ifTable.ifEntry.ifDescr.2 = eth0 + interfaces.ifTable.ifEntry.ifDescr.3 = eth1 + interfaces.ifTable.ifEntry.ifDescr.4 = eth2 + interfaces.ifTable.ifEntry.ifDescr.5 = eth3 + interfaces.ifTable.ifEntry.ifDescr.6 = bond0 + ip.ipAddrTable.ipAddrEntry.ipAdEntIfIndex.10.10.10.10 = 5 + ip.ipAddrTable.ipAddrEntry.ipAdEntIfIndex.192.168.1.1 = 2 + ip.ipAddrTable.ipAddrEntry.ipAdEntIfIndex.10.74.20.94 = 4 + ip.ipAddrTable.ipAddrEntry.ipAdEntIfIndex.127.0.0.1 = 1 + +This problem is avoided by loading the bonding driver before any network +drivers participating in a bond. Below is an example of loading the bonding +driver first, the IP address 192.168.1.1 is correctly associated with ifDescr.2. + + interfaces.ifTable.ifEntry.ifDescr.1 = lo + interfaces.ifTable.ifEntry.ifDescr.2 = bond0 + interfaces.ifTable.ifEntry.ifDescr.3 = eth0 + interfaces.ifTable.ifEntry.ifDescr.4 = eth1 + interfaces.ifTable.ifEntry.ifDescr.5 = eth2 + interfaces.ifTable.ifEntry.ifDescr.6 = eth3 + ip.ipAddrTable.ipAddrEntry.ipAdEntIfIndex.10.10.10.10 = 6 + ip.ipAddrTable.ipAddrEntry.ipAdEntIfIndex.192.168.1.1 = 2 + ip.ipAddrTable.ipAddrEntry.ipAdEntIfIndex.10.74.20.94 = 5 + ip.ipAddrTable.ipAddrEntry.ipAdEntIfIndex.127.0.0.1 = 1 + +While some distributions may not report the interface name in ifDescr, +the association between the IP address and IfIndex remains and SNMP +functions such as Interface_Scan_Next will report that association. -Possible values are 0 (round robin policy, default) and 1 (active backup -policy), and 2 (XOR). See question 9 and the HA section for additional info. - miimon= - -Use integer value for the frequency (in ms) of MII link monitoring. Zero value -is default and means the link monitoring will be disabled. A good value is 100 -if you wish to use link monitoring. See HA section for additional info. +Module Parameters +================= - downdelay= +Optional parameters for the bonding driver can be supplied as command line +arguments to the insmod command. Typically, these parameters are specified in +the file /etc/modules.conf (see the manual page for modules.conf). The +available bonding driver parameters are listed below. If a parameter is not +specified the default value is used. When initially configuring a bond, it +is recommended "tail -f /var/log/messages" be run in a separate window to +watch for bonding driver error messages. + +It is critical that either the miimon or arp_interval and arp_ip_target +parameters be specified, otherwise serious network degradation will occur +during link failures. + +mode + Specifies one of four bonding policies. The default is round-robin. + Possible values are: + + 0 Round-robin policy: Transmit in a sequential order from the + first available slave through the last. This mode provides + load balancing and fault tolerance. + + 1 Active-backup policy: Only one slave in the bond is active. A + different slave becomes active if, and only if, the active slave + fails. The bond's MAC address is externally visible on only + one port (network adapter) to avoid confusing the switch. + This mode provides fault tolerance. + + + 2 XOR policy: Transmit based on [(source MAC address XOR'd with + destination MAC address) modula slave count]. This selects the + same slave for each destination MAC address. This mode provides + load balancing and fault tolerance. + + 3 Broadcast policy: transmits everything on all slave interfaces. + This mode provides fault tolerance. + +miimon + + Specifies the frequency in milli-seconds that MII link monitoring will + occur. A value of zero disables MII link monitoring. A value of + 100 is a good starting point. See High Availability section for + additional information. The default value is 0. + +downdelay + + Specifies the delay time in milli-seconds to disable a link after a + link failure has been detected. This should be a multiple of miimon + value, otherwise the value will be rounded. The default value is 0. + +updelay + + Specifies the delay time in milli-seconds to enable a link after a + link up status has been detected. This should be a multiple of miimon + value, otherwise the value will be rounded. The default value is 0. + +arp_interval + + Specifies the ARP monitoring frequency in milli-seconds. + If ARP monitoring is used in a load-balancing mode (mode 0 or 2), the + switch should be configured in a mode that evenly distributes packets + across all links - such as round-robin. If the switch is configured to + distribute the packets in an XOR fashion, all replies from the ARP + targets will be received on the same link which could cause the other + team members to fail. ARP monitoring should not be used in conjunction + with miimon. A value of 0 disables ARP monitoring. The default value + is 0. + +arp_ip_target + + Specifies the ip addresses to use when arp_interval is > 0. These are + the targets of the ARP request sent to determine the health of the link + to the targets. Specify these values in ddd.ddd.ddd.ddd format. + Multiple ip adresses must be seperated by a comma. At least one ip + address needs to be given for ARP monitoring to work. The maximum number + of targets that can be specified is set at 16. + +primary + + A string (eth0, eth2, etc) to equate to a primary device. If this + value is entered, and the device is on-line, it will be used first as + the output media. Only when this device is off-line, will alternate + devices be used. Otherwise, once a failover is detected and a new + default output is chosen, it will remain the output media until it too + fails. This is useful when one slave was preferred over another, i.e. + when one slave is 1000Mbps and another is 100Mbps. If the 1000Mbps + slave fails and is later restored, it may be preferred the faster slave + gracefully become the active slave - without deliberately failing the + 100Mbps slave. Specifying a primary is only valid in active-backup mode. + +multicast + + Integer value for the mode of operation for multicast support. + Possible values are: + + 0 Disabled (no multicast support) + + 1 Enabled on active slave only, useful in active-backup mode + + 2 Enabled on all slaves, this is the default + + +Configuring Multiple Bonds +========================== + +If several bonding interfaces are required, the driver must be loaded +multiple times. For example, to configure two bonding interfaces with link +monitoring performed every 100 milli-seconds, the /etc/conf.modules should +resemble the following: -Use integer value for delaying disabling a link by this number (in ms) after -the link failure has been detected. Must be a multiple of miimon. Default -value is zero. See HA section for additional info. +alias bond0 bonding +alias bond1 bonding - updelay= +options bond0 miimon=100 +options bond1 -o bonding1 miimon=100 -Use integer value for delaying enabling a link by this number (in ms) after -the "link up" status has been detected. Must be a multiple of miimon. Default -value is zero. See HA section for additional info. +Configuring Multiple ARP Targets +================================ - arp_interval= +While ARP monitoring can be done with just one target, it can be usefull +in a High Availability setup to have several targets to monitor. In the +case of just one target, the target itself may go down or have a problem +making it unresponsive to ARP requests. Having an additional target (or +several) would increase the reliability of the ARP monitoring. +Multiple ARP targets must be seperated by commas as follows: -Use integer value for the frequency (in ms) of arp monitoring. Zero value -is default and means the arp monitoring will be disabled. See HA section -for additional info. This field is value in active_backup mode only. +# example options for ARP monitoring with three targets +alias bond0 bonding +options bond0 arp_interval=60 arp_ip_target=192.168.0.1,192.168.0.3,192.168.0.9 - arp_ip_target= +For just a single target the options would resemble: -An ip address to use when arp_interval is > 0. This is the target of the -arp request sent to determine the health of the link to the target. -Specify this value in ddd.ddd.ddd.ddd format. +# example options for ARP monitoring with one target +alias bond0 bonding +options bond0 arp_interval=60 arp_ip_target=192.168.0.100 -If you need to configure several bonding devices, the driver must be loaded -several times. I.e. for two bonding devices, your /etc/conf.modules must look -like this: -alias bond0 bonding -alias bond1 bonding -options bond0 miimon=100 -options bond1 -o bonding1 miimon=100 +Switch Configuration +==================== -5) Testing configuration ------------------------- -You can test the configuration and transmit policy with ifconfig. For example, -for round robin policy, you should get something like this: +While the switch does not need to be configured when the active-backup +policy is used (mode=1), it does need to be configured for the round-robin, +XOR, and broadcast policies (mode=0, mode=2, and mode=3). + + +Verifying Bond Configuration +============================ + +1) Bonding information files +---------------------------- +The bonding driver information files reside in the /proc/net/bond* directories. + +Sample contents of /proc/net/bond0/info after the driver is loaded with +parameters of mode=0 and miimon=1000 is shown below. + + Bonding Mode: load balancing (round-robin) + Currently Active Slave: eth0 + MII Status: up + MII Polling Interval (ms): 1000 + Up Delay (ms): 0 + Down Delay (ms): 0 + + Slave Interface: eth1 + MII Status: up + Link Failure Count: 1 + + Slave Interface: eth0 + MII Status: up + Link Failure Count: 1 + +2) Network verification +----------------------- +The network configuration can be verified using the ifconfig command. In +the example below, the bond0 interface is the master (MASTER) while eth0 and +eth1 are slaves (SLAVE). Notice all slaves of bond0 have the same MAC address +(HWaddr) as bond0. [root]# /sbin/ifconfig bond0 Link encap:Ethernet HWaddr 00:C0:F0:1F:37:B4 @@ -193,12 +387,13 @@ collisions:0 txqueuelen:100 Interrupt:9 Base address:0x1400 -Questions : -=========== + +Frequently Asked Questions +========================== 1. Is it SMP safe? - Yes. The old 2.0.xx channel bonding patch was not SMP safe. + Yes. The old 2.0.xx channel bonding patch was not SMP safe. The new driver was designed to be SMP safe from the start. 2. What type of cards will work with it? @@ -209,31 +404,30 @@ 3. How many bonding devices can I have? - One for each module you load. See section on module parameters for how + One for each module you load. See section on Module Parameters for how to accomplish this. 4. How many slaves can a bonding device have? - Limited by the number of network interfaces Linux supports and the - number of cards you can place in your system. + Limited by the number of network interfaces Linux supports and/or the + number of network cards you can place in your system. 5. What happens when a slave link dies? - If your ethernet cards support MII status monitoring and the MII - monitoring has been enabled in the driver (see description of module - parameters), there will be no adverse consequences. This release - of the bonding driver knows how to get the MII information and + If your ethernet cards support MII or ETHTOOL link status monitoring + and the MII monitoring has been enabled in the driver (see description + of module parameters), there will be no adverse consequences. This + release of the bonding driver knows how to get the MII information and enables or disables its slaves according to their link status. - See section on HA for additional information. + See section on High Availability for additional information. - For ethernet cards not supporting MII status, or if you wish to - verify that packets have been both send and received, you may - configure the arp_interval and arp_ip_target. If packets have - not been sent or received during this interval, an arp request - is sent to the target to generate send and receive traffic. - If after this interval, either the successful send and/or - receive count has not incremented, the next slave in the sequence - will become the active slave. + For ethernet cards not supporting MII status, the arp_interval and + arp_ip_target parameters must be specified for bonding to work + correctly. If packets have not been sent or received during the + specified arp_interval durration, an ARP request is sent to the targets + to generate send and receive traffic. If after this interval, either + the successful send and/or receive count has not incremented, the next + slave in the sequence will become the active slave. If neither mii_monitor and arp_interval is configured, the bonding driver will not handle this situation very well. The driver will @@ -245,11 +439,12 @@ 6. Can bonding be used for High Availability? Yes, if you use MII monitoring and ALL your cards support MII link - status reporting. See section on HA for more information. + status reporting. See section on High Availability for more information. 7. Which switches/systems does it work with? - In round-robin mode, it works with systems that support trunking: + In round-robin and XOR mode, it works with systems that support + trunking: * Cisco 5500 series (look for EtherChannel support). * SunTrunking software. @@ -259,7 +454,8 @@ units. * Linux bonding, of course ! - In Active-backup mode, it should work with any Layer-II switches. + In active-backup mode, it should work with any Layer-II switche. + 8. Where does a bonding device get its MAC address from? @@ -297,55 +493,68 @@ 9. Which transmit polices can be used? - Round robin, based on the order of enslaving, the output device - is selected base on the next available slave. Regardless of + Round-robin, based on the order of enslaving, the output device + is selected base on the next available slave. Regardless of the source and/or destination of the packet. - XOR, based on (src hw addr XOR dst hw addr) % slave cnt. This - selects the same slave for each destination hw address. - Active-backup policy that ensures that one and only one device will transmit at any given moment. Active-backup policy is useful for implementing high availability solutions using two hubs (see - section on HA). + section on High Availability). + + XOR, based on (src hw addr XOR dst hw addr) % slave count. This + policy selects the same slave for each destination hw address. -High availability + Broadcast policy transmits everything on all slave interfaces. + + +High Availability ================= -To implement high availability using the bonding driver, you need to -compile the driver as module because currently it is the only way to pass -parameters to the driver. This may change in the future. - -High availability is achieved by using MII status reporting. You need to -verify that all your interfaces support MII link status reporting. On Linux -kernel 2.2.17, all the 100 Mbps capable drivers and yellowfin gigabit driver -support it. If your system has an interface that does not support MII status -reporting, a failure of its link will not be detected! - -The bonding driver can regularly check all its slaves links by checking the -MII status registers. The check interval is specified by the module argument -"miimon" (MII monitoring). It takes an integer that represents the -checking time in milliseconds. It should not come to close to (1000/HZ) -(10 ms on i386) because it may then reduce the system interactivity. 100 ms -seems to be a good value. It means that a dead link will be detected at most -100 ms after it goes down. +To implement high availability using the bonding driver, the driver needs to be +compiled as a module, because currently it is the only way to pass parameters +to the driver. This may change in the future. + +High availability is achieved by using MII or ETHTOOL status reporting. You +need to verify that all your interfaces support MII or ETHTOOL link status +reporting. On Linux kernel 2.2.17, all the 100 Mbps capable drivers and +yellowfin gigabit driver support MII. To determine if ETHTOOL link reporting +is available for interface eth0, type "ethtool eth0" and the "Link detected:" +line should contain the correct link status. If your system has an interface +that does not support MII or ETHTOOL status reporting, a failure of its link +will not be detected! A message indicating MII and ETHTOOL is not supported by +a network driver is logged when the bonding driver is loaded with a non-zero +miimon value. + +The bonding driver can regularly check all its slaves links using the ETHTOOL +IOCTL (ETHTOOL_GLINK command) or by checking the MII status registers. The +check interval is specified by the module argument "miimon" (MII monitoring). +It takes an integer that represents the checking time in milliseconds. It +should not come to close to (1000/HZ) (10 milli-seconds on i386) because it +may then reduce the system interactivity. A value of 100 seems to be a good +starting point. It means that a dead link will be detected at most 100 +milli-seconds after it goes down. Example: # modprobe bonding miimon=100 -Or, put in your /etc/modules.conf : +Or, put the following lines in /etc/modules.conf: alias bond0 bonding options bond0 miimon=100 -There are currently two policies for high availability, depending on whether -a) hosts are connected to a single host or switch that support trunking -b) hosts are connected to several different switches or a single switch that - does not support trunking. +There are currently two policies for high availability. They are dependent on +whether: + + a) hosts are connected to a single host or switch that support trunking + + b) hosts are connected to several different switches or a single switch that + does not support trunking -1) HA on a single switch or host - load balancing -------------------------------------------------- + +1) High Availability on a single switch or host - load balancing +---------------------------------------------------------------- It is the easiest to set up and to understand. Simply configure the remote equipment (host or switch) to aggregate traffic over several ports (Trunk, EtherChannel, etc.) and configure the bonding interfaces. @@ -356,7 +565,7 @@ long time if all ports in a trunk go down. This is not Linux, but really the switch (reboot it to ensure). -Example 1 : host to host at double speed +Example 1 : host to host at twice the speed +----------+ +----------+ | |eth0 eth0| | @@ -370,7 +579,7 @@ # ifconfig bond0 addr # ifenslave bond0 eth0 eth1 -Example 2 : host to switch at double speed +Example 2 : host to switch at twice the speed +----------+ +----------+ | |eth0 port1| | @@ -384,7 +593,9 @@ # ifconfig bond0 addr and port2 # ifenslave bond0 eth0 eth1 -2) HA on two or more switches (or a single switch without trunking support) + +2) High Availability on two or more switches (or a single switch without + trunking support) --------------------------------------------------------------------------- This mode is more problematic because it relies on the fact that there are multiple ports and the host's MAC address should be visible on one @@ -423,14 +634,14 @@ +--------------+ host2 +----------------+ eth0 +-------+ eth1 -In this configuration, there are an ISL - Inter Switch Link (could be a trunk), +In this configuration, there is an ISL - Inter Switch Link (could be a trunk), several servers (host1, host2 ...) attached to both switches each, and one or more ports to the outside world (port3...). One an only one slave on each host is active at a time, while all links are still monitored (the system can detect a failure of active and backup links). Each time a host changes its active interface, it sticks to the new one until -it goes down. In this example, the hosts are not too much affected by the +it goes down. In this example, the hosts are negligibly affected by the expiration time of the switches' forwarding tables. If host1 and host2 have the same functionality and are used in load balancing @@ -460,6 +671,7 @@ it goes down. In this example, the host is strongly affected by the expiration time of the switch forwarding table. + 3) Adapting to your switches' timing ------------------------------------ If your switches take a long time to go into backup mode, it may be @@ -488,8 +700,34 @@ # modprobe bonding miimon=100 mode=1 downdelay=2000 updelay=5000 # modprobe bonding miimon=100 mode=0 downdelay=0 updelay=5000 -4) Limitations --------------- + +Promiscuous Sniffing notes +========================== + +If you wish to bond channels together for a network sniffing +application --- you wish to run tcpdump, or ethereal, or an IDS like +snort, with its input aggregated from multiple interfaces using the +bonding driver --- then you need to handle the Promiscuous interface +setting by hand. Specifically, when you "ifconfing bond0 up" you +must add the promisc flag there; it will be propagated down to the +slave interfaces at ifenslave time; a full example might look like: + + grep bond0 /etc/modules.conf || echo alias bond0 bonding >/etc/modules.conf + ifconfig bond0 promisc up + for if in eth1 eth2 ...;do + ifconfig $if up + ifenslave bond0 $if + done + snort ... -i bond0 ... + +Ifenslave also wants to propagate addresses from interface to +interface, appropriately for its design functions in HA and channel +capacity aggregating; but it works fine for unnumbered interfaces; +just ignore all the warnings it emits. + + +Limitations +=========== The main limitations are : - only the link status is monitored. If the switch on the other side is partially down (e.g. doesn't forward anymore, but the link is OK), the link @@ -500,7 +738,13 @@ Use the arp_interval/arp_ip_target parameters to count incoming/outgoing frames. -Resources and links + - A Transmit Load Balancing policy is not currently available. This mode + allows every slave in the bond to transmit while only one receives. If + the "receiving" slave fails, another slave takes over the MAC address of + the failed receiving slave. + + +Resources and Links =================== Current development on this driver is posted to: diff -Nru a/Documentation/networking/ifenslave.c b/Documentation/networking/ifenslave.c --- a/Documentation/networking/ifenslave.c Mon Dec 23 21:21:51 2002 +++ b/Documentation/networking/ifenslave.c Mon Dec 23 21:21:51 2002 @@ -41,6 +41,16 @@ * - 2002/02/18 Erik Habbinga : * - ifr2.ifr_flags was not initialized in the hwaddr_notset case, * SIOCGIFFLAGS now called before hwaddr_notset test + * + * - 2002/10/31 Tony Cureington : + * - If the master does not have a hardware address when the first slave + * is enslaved, the master is assigned the hardware address of that + * slave - there is a comment in bonding.c stating "ifenslave takes + * care of this now." This corrects the problem of slaves having + * different hardware addresses in active-backup mode when + * multiple interfaces are specified on a single ifenslave command + * (ifenslave bond0 eth0 eth1). + * */ static char *version = @@ -131,6 +141,7 @@ sa_family_t master_family; char **spp, *master_ifname, *slave_ifname; int hwaddr_notset; + int master_up; while ((c = getopt_long(argc, argv, "acdfrvV?h", longopts, 0)) != EOF) switch (c) { @@ -300,10 +311,86 @@ return 1; } - if (hwaddr_notset) { /* we do nothing */ + if (hwaddr_notset) { + /* assign the slave hw address to the + * master since it currently does not + * have one; otherwise, slaves may + * have different hw addresses in + * active-backup mode as seen when enslaving + * using "ifenslave bond0 eth0 eth1" because + * hwaddr_notset is set outside this loop. + * TODO: put this and the "else" portion in + * a function. + */ + goterr = 0; + master_up = 0; + if (if_flags.ifr_flags & IFF_UP) { + if_flags.ifr_flags &= ~IFF_UP; + if (ioctl(skfd, SIOCSIFFLAGS, + &if_flags) < 0) { + goterr = 1; + fprintf(stderr, + "Shutting down " + "interface %s failed: " + "%s\n", + master_ifname, + strerror(errno)); + } else { + /* we took the master down, + * so we must bring it up + */ + master_up = 1; + } + } - } - else { /* we'll assign master's hwaddr to this slave */ + if (!goterr) { + /* get the slaves MAC address */ + strncpy(if_hwaddr.ifr_name, + slave_ifname, IFNAMSIZ); + if (ioctl(skfd, SIOCGIFHWADDR, + &if_hwaddr) < 0) { + fprintf(stderr, + "Could not get MAC " + "address of %s: %s\n", + slave_ifname, + strerror(errno)); + strncpy(if_hwaddr.ifr_name, + master_ifname, + IFNAMSIZ); + goterr=1; + } + } + + if (!goterr) { + strncpy(if_hwaddr.ifr_name, + master_ifname, IFNAMSIZ); + if (ioctl(skfd, SIOCSIFHWADDR, + &if_hwaddr) < 0) { + fprintf(stderr, + "Could not set MAC " + "address of %s: %s\n", + master_ifname, + strerror(errno)); + goterr=1; + } else { + hwaddr_notset = 0; + } + } + + if (master_up) { + if_flags.ifr_flags |= IFF_UP; + if (ioctl(skfd, SIOCSIFFLAGS, + &if_flags) < 0) { + fprintf(stderr, + "Bringing up interface " + "%s failed: %s\n", + master_ifname, + strerror(errno)); + } + } + + } else { + /* we'll assign master's hwaddr to this slave */ if (ifr2.ifr_flags & IFF_UP) { ifr2.ifr_flags &= ~IFF_UP; if (ioctl(skfd, SIOCSIFFLAGS, &ifr2) < 0) { diff -Nru a/Documentation/scsi/aic79xx.txt b/Documentation/scsi/aic79xx.txt --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/Documentation/scsi/aic79xx.txt Mon Dec 23 21:22:05 2002 @@ -0,0 +1,323 @@ +==================================================================== += Adaptec Ultra320 Family Manager Set v1.1.1 = += = += README for = += The Linux Operating System = +==================================================================== + +The following information is available in this file: + + 1. Supported Hardware + 2. Version History + 3. Command Line Options + 4. Additional Notes + 5. Contacting Adaptec + + +1. Supported Hardware + + The following Adaptec SCSI Host Adapters are supported by this + driver set. + + Ultra320 Adapters Description + ---------------------------------------------------------------- + Adaptec SCSI Card 39320 Dual Channel 64-bit PCI-X 133MHz to + Ultra320 SCSI Card (one external + 68-pin, two internal 68-pin) + Adaptec SCSI Card 39320D Dual Channel 64-bit PCI-X 133MHz to + Ultra320 SCSI Card (two external VHDC + and one internal 68-pin) + Adaptec SCSI Card 29320 Single Channel 64-bit PCI-X 133MHz to + Ultra320 SCSI Card (one external + 68-pin, two internal 68-pin, one + internal 50-pin) + Adaptec SCSI Card 29320LP Single Channel 64-bit Low Profile + PCI-X 133MHz to Ultra320 SCSI Card + (One external VHDC, one internal + 68-pin) + AIC-7901A Single Channel 64-bit PCI-X 133MHz to + Ultra320 SCSI ASIC + AIC-7902A4 Dual Channel 64-bit PCI-X 133MHz to + Ultra320 SCSI ASIC + + +2. Version History + + (V1.1.1, September 2002) Added support for the Linux 2.5.X kernel series + + (V1.1, August 2002) Added support for four additional SCSI + products: ASC-39320, ASC-29320, ASC-29320LP, AIC-7901. + + (V1.0, May 2002) This is the initial release of the + Ultra320 FMS. The following is a list of supported features: + + 2.1. Software/Hardware Features + - Support for the SPI-4 "Ultra320" standard: + - 320MB/s transfer rates + - Packetized SCSI Protocol at 160MB/s and 320MB/s + - Quick Arbitration Selection (QAS) + - Initiator Mode (target mode not currently + supported) + - Support for the PCI-x standard up to 133MHz + - Support for the PCI v2.2 standard + + 2.2. Operating System Support: + - Redhat Linux 7.2, 7.3, Advanced Server 2.1 + - SuSE Linux 7.3, 8.0, Enterprise Server 7 + - only Intel and AMD x86 supported at this time + - >4GB memory configurations supported. + + Refer to the User's Guide for more details on this. + + +3. Command Line Options + + WARNING: ALTERING OR ADDING THESE DRIVER PARAMETERS + INCORRECTLY CAN RENDER YOUR SYSTEM INOPERABLE. + USE THEM WITH CAUTION. + + Edit the file "modules.conf" in the directory /etc and add/edit a + line containing 'options aic79xx=[command[,command...]]' where + 'command' is one or more of the following: + ----------------------------------------------------------------- + Option: verbose + Definition: enable additional informative messages during + driver operation. + Possible Values: This option is a flag + Default Value: disabled + ----------------------------------------------------------------- + Option: debug:[value] + Definition: Enables various levels of debugging information + Possible Values: 0x0000 = no debugging, 0xffff = full debugging + Default Value: 0x0000 + ----------------------------------------------------------------- + Option: no_reset + Definition: Do not reset the bus during the initial probe + phase + Possible Values: This option is a flag + Default Value: disabled + ----------------------------------------------------------------- + Option: extended + Definition: Force extended translation on the controller + Possible Values: This option is a flag + Default Value: disabled + ----------------------------------------------------------------- + Option: periodic_otag + Definition: Send an ordered tag periodically to prevent + tag starvation. Needed for some older devices + Possible Values: This option is a flag + Default Value: disabled + ----------------------------------------------------------------- + Option: reverse_scan + Definition: Probe the scsi bus in reverse order, starting + with target 15 + Possible Values: This option is a flag + Default Value: disabled + ----------------------------------------------------------------- + Option: global_tag_depth + Definition: Global tag depth for all targets on all busses. + This option sets the default tag depth which + may be selectively overridden vi the tag_info + option. + Possible Values: 1 - 253 + Default Value: 32 + ----------------------------------------------------------------- + Option: tag_info:{{value[,value...]}[,{value[,value...]}...]} + Definition: Set the per-target tagged queue depth on a + per controller basis. Both controllers and targets + may be ommitted indicating that they should retain + the default tag depth. + Examples: tag_info:{{16,32,32,64,8,8,,32,32,32,32,32,32,32,32,32} + On Controller 0 + specifies a tag depth of 16 for target 0 + specifies a tag depth of 64 for target 3 + specifies a tag depth of 8 for targets 4 and 5 + leaves target 6 at the default + specifies a tag depth of 32 for targets 1,2,7-15 + All other targets retain the default depth. + + tag_info:{{},{32,,32}} + On Controller 1 + specifies a tag depth of 32 for targets 0 and 2 + All other targets retain the default depth. + + Possible Values: 1 - 253 + Default Value: 32 + ----------------------------------------------------------------- + Option: rd_strm: {rd_strm_bitmask[,rd_strm_bitmask...]} + Definition: Enable read streaming on a per target basis. + The rd_strm_bitmask is a 16 bit hex value in which + each bit represents a target. Setting the target's + bit to '1' enables read streaming for that + target. Controllers may be ommitted indicating that + they should retain the default read streaming setting. + Example: rd_strm:{0x0041} + On Controller 0 + enables read streaming for targets 0 and 6. + disables read streaming for targets 1-5,7-15. + All other targets retain the default read + streaming setting. + Example: rd_strm:{0x0023,,0xFFFF} + On Controller 0 + enables read streaming for targets 1,2, and 5. + disables read streaming for targets 3,4,6-15. + On Controller 2 + enables read streaming for all targets. + All other targets retain the default read + streaming setting. + + Possible Values: 0x0000 - 0xffff + Default Value: 0x0000 + ----------------------------------------------------------------- + Option: precomp: {value[,value...]} + Definition: Set IO Cell precompensation value on a per-controller + basis. + Controllers may be ommitted indicating that + they should retain the default precompensation setting. + Example: precomp:{0x1} + On Controller 0 set precompensation to 1. + Example: precomp:{1,,7} + On Controller 0 set precompensation to 1. + On Controller 2 set precompensation to 8. + + Possible Values: 0 - 7 + Default Value: Varies based on chip revision + ----------------------------------------------------------------- + Option: slewrate: {value[,value...]} + Definition: Set IO Cell slew rate on a per-controller basis. + Controllers may be ommitted indicating that + they should retain the default slew rate setting. + Example: slewrate:{0x1} + On Controller 0 set slew rate to 1. + Example: slewrate :{1,,8} + On Controller 0 set slew rate to 1. + On Controller 2 set slew rate to 8. + + Possible Values: 0 - 15 + Default Value: Varies based on chip revision + ----------------------------------------------------------------- + Option: amplitude: {value[,value...]} + Definition: Set IO Cell signal amplitude on a per-controller basis. + Controllers may be ommitted indicating that + they should retain the default read streaming setting. + Example: amplitude:{0x1} + On Controller 0 set amplitude to 1. + Example: amplitude :{1,,7} + On Controller 0 set amplitude to 1. + On Controller 2 set amplitude to 7. + + Possible Values: 1 - 7 + Default Value: Varies based on chip revision + ----------------------------------------------------------------- + Option: seltime:[value] + Definition: Specifies the selection timeout value + Possible Values: 0 = 256ms, 1 = 128ms, 2 = 64ms, 3 = 32ms + Default Value: 0 + ----------------------------------------------------------------- + + Example: 'options aic79xx=verbose,rd_strm:{{0x0041}}' + enables verbose output in the driver and turns read streaming on + for targets 0 and 6 of Controller 0. + +4. Additional Notes + + 4.1. Known/Unresolved or FYI Issues + + * Domain Validation is not implemented. + * Under SuSE Linux Enterprise 7, the driver may fail to operate + correctly due to a problem with PCI interrupt routing in the + Linux kernel. Please contact SuSE for an updated Linux + kernel. + + 4.2. Third-Party Compatibility Issues + + * Adaptec only supports Ultra320 hard drives running + the latest firmware available. Please check with + your hard drive manufacturer to ensure you have the + latest version. + + 4.3. Operating System or Technology Limitations + + * PCI Hot Plug is untested and may cause the operating system + to stop responding. + + +5. Contacting Adaptec + + A Technical Support Identification (TSID) Number is required for + Adaptec technical support. + - The 12-digit TSID can be found on the white barcode-type label + included inside the box with your product. The TSID helps us + provide more efficient service by accurately identifying your + product and support status. + Support Options + - Search the Adaptec Support Knowledgebase (ASK) at + http://ask.adaptec.com for articles, troubleshooting tips, and + frequently asked questions for your product. + - For support via Email, submit your question to Adaptec's + Technical Support Specialists at http://ask.adaptec.com. + + North America + - Visit our Web site at http://www.adaptec.com. + - To speak with a Fibre Channel/RAID/External Storage Technical + Support Specialist, call 1-321-207-2000, + Hours: Monday-Friday, 3:00 A.M. to 5:00 P.M., PST. + (Not open on holidays) + - For Technical Support in all other technologies including + SCSI, call 1-408-934-7274, + Hours: Monday-Friday, 6:00 A.M. to 5:00 P.M., PST. + (Not open on holidays) + - For after hours support, call 1-800-416-8066 ($99/call, + $149/call on holidays) + - To order Adaptec products including software and cables, call + 1-800-442-7274 or 1-408-957-7274. You can also visit our + online store at http://www.adaptecstore.com + + Europe + - Visit our Web site at http://www.adaptec-europe.com. + - English and French: To speak with a Technical Support + Specialist, call one of the following numbers: + - English: +32-2-352-3470 + - French: +32-2-352-3460 + Hours: Monday-Thursday, 10:00 to 12:30, 13:30 to 17:30 CET + Friday, 10:00 to 12:30, 13:30 to 16:30 CET + - German: To speak with a Technical Support Specialist, + call +49-89-456-40660 + Hours: Monday-Thursday, 09:30 to 12:30, 13:30 to 16:30 CET + Friday, 09:30 to 12:30, 13:30 to 15:00 CET + - To order Adaptec products, including accessories and cables: + - UK: +0800-96-65-26 or fax +0800-731-02-95 + - Other European countries: +32-11-300-379 + + Australia and New Zealand + - Visit our Web site at http://www.adaptec.com.au. + - To speak with a Technical Support Specialist, call + +612-9416-0698 + Hours: Monday-Friday, 10:00 A.M. to 4:30 P.M., EAT + (Not open on holidays) + + Japan + - To speak with a Technical Support Specialist, call + +81-3-5308-6120 + Hours: Monday-Friday, 9:00 a.m. to 12:00 p.m., 1:00 p.m. to + 6:00 p.m. TSC + + Hong Kong and China + - To speak with a Technical Support Specialist, call + +852-2869-7200 + Hours: Monday-Friday, 10:00 to 17:00. + - Fax Technical Support at +852-2869-7100. + + Singapore + - To speak with a Technical Support Specialist, call + +65-245-7470 + Hours: Monday-Friday, 10:00 to 17:00. + - Fax Technical Support at +852-2869-7100 + +------------------------------------------------------------------- + +(c) 2002 Adaptec, Inc. All Rights Reserved. No part of this +publication may be reproduced, stored in a retrieval system, or +transmitted in any form or by any means, electronic, mechanical, +photocopying, recording or otherwise, without prior written consent +of Adaptec, Inc., 691 South Milpitas Blvd., Milpitas, CA 95035. diff -Nru a/Documentation/scsi/aic7xxx.txt b/Documentation/scsi/aic7xxx.txt --- a/Documentation/scsi/aic7xxx.txt Mon Dec 23 21:21:54 2002 +++ b/Documentation/scsi/aic7xxx.txt Mon Dec 23 21:22:04 2002 @@ -1,477 +1,294 @@ - AIC7xxx Driver for Linux - -Introduction ----------------------------- -The AIC7xxx SCSI driver adds support for Adaptec (http://www.adaptec.com) -SCSI controllers and chipsets. Major portions of the driver and driver -development are shared between both Linux and FreeBSD. Support for the -AIC-7xxx chipsets have been in the default Linux kernel since approximately -linux-1.1.x and fairly stable since linux-1.2.x, and are also in FreeBSD -2.1.0 or later. - - Supported cards/chipsets - ---------------------------- - Adaptec Cards - ---------------------------- - AHA-274x - AHA-274xT - AHA-274xW - AHA-284x - AHA-284xW - All PCI based cards using any of the chipsets listed under motherboard - chipsets. In general, this means *all* of the Adaptec SCSI controllers - except the ones specifically excluded later on in this document. - - Motherboard Chipsets - ---------------------------- - AIC-777x - AIC-785x - AIC-786x - AIC-787x - AIC-788x - AIC-789x - AIC-3860 - - Bus Types - ---------------------------- - W - Wide SCSI, SCSI-3, 16bit bus, 68pin connector, will also support - SCSI-1/SCSI-2 50pin devices, transfer rates up to 20MB/s. - U - Ultra SCSI, transfer rates up to 40MB/s. - U2- Ultra 2 SCSI, transfer rates up to 80MB/s. - U3- Ultra 3 SCSI, transfer rates up to 160MB/s. - D - Differential SCSI. - T - Twin Channel SCSI. Up to 14 SCSI devices. - - AHA-274x - EISA SCSI controller - AHA-284x - VLB SCSI controller - AHA-29xx - PCI SCSI controller - AHA-39xx - PCI controllers with multiple separate SCSI channels on-board. - - Not Supported Devices - ------------------------------ - Adaptec Cards - ---------------------------- - AHA-2920 (Only the cards that use the Future Domain chipset are not - supported, any 2920 cards based on Adaptec AIC chipsets, - such as the 2920C, are supported) - AAA-13x Raid Adapters - AAA-113x Raid Port Card - - Motherboard Chipsets - ---------------------------- - AIC-781x - - Bus Types - ---------------------------- - R - Raid Port busses are not supported. - - The hardware RAID devices sold by Adaptec are *NOT* supported by this - driver (and will people please stop emailing me about them, they are - a totally separate beast from the bare SCSI controllers and this driver - can not be retrofitted in any sane manner to support the hardware RAID - features on those cards - Doug Ledford). - - - People - ------------------------------ - Justin T Gibbs gibbs@plutotech.com - (BSD Driver Author) - Dan Eischen deischen@iworks.InterWorks.org - (Original Linux Driver Co-maintainer) - Dean Gehnert deang@teleport.com - (Original Linux FTP/patch maintainer) - Jess Johnson jester@frenzy.com - (AIC7xxx FAQ author) - Doug Ledford dledford@redhat.com - (Current Linux aic7xxx-5.x.x Driver/Patch/FTP maintainer) - - Special thanks go to John Aycock (aycock@cpsc.ucalgary.ca), the original - author of the driver. John has since retired from the project. Thanks - again for all his work! - - Mailing list - ------------------------------ - There is a mailing list available for users who want to track development - and converse with other users and developers. This list is for both - FreeBSD and Linux support of the AIC7xxx chipsets. - - To subscribe to the AIC7xxx mailing list send mail to the list server, - with "subscribe AIC7xxx" in the body (no Subject: required): - To: majordomo@FreeBSD.ORG - --- - subscribe AIC7xxx - - To unsubscribe from the list, send mail to the list server with: - To: majordomo@FreeBSD.ORG - --- - unsubscribe AIC7xxx - - Send regular messages and replies to: AIC7xxx@FreeBSD.ORG - - Boot Command line options - ------------------------------ - "aic7xxx=no_reset" - Eliminate the SCSI bus reset during startup. - Some SCSI devices need the initial reset that this option disables - in order to work. If you have problems at bootup, please make sure - you aren't using this option. - - "aic7xxx=reverse_scan" - Certain PCI motherboards scan for devices at - bootup by scanning from the highest numbered PCI device to the - lowest numbered PCI device, others do just the opposite and scan - from lowest to highest numbered PCI device. There is no reliable - way to autodetect this ordering. So, we default to the most common - order, which is lowest to highest. Then, in case your motherboard - scans from highest to lowest, we have this option. If your BIOS - finds the drives on controller A before controller B but the linux - kernel finds your drives on controller B before A, then you should - use this option. - - "aic7xxx=extended" - Force the driver to detect extended drive translation - on your controller. This helps those people who have cards without - a SEEPROM make sure that linux and all other operating systems think - the same way about your hard drives. - - "aic7xxx=scbram" - Some cards have external SCB RAM that can be used to - give the card more hardware SCB slots. This allows the driver to use - that SCB RAM. Without this option, the driver won't touch the SCB - RAM because it is known to cause problems on a few cards out there - (such as 3985 class cards). - - "aic7xxx=irq_trigger:x" - Replace x with either 0 or 1 to force the kernel - to use the correct IRQ type for your card. This only applies to EISA - based controllers. On these controllers, 0 is for Edge triggered - interrupts, and 1 is for Level triggered interrupts. If you aren't - sure or don't know which IRQ trigger type your EISA card uses, then - let the kernel autodetect the trigger type. - - "aic7xxx=verbose" - This option can be used in one of two ways. If you - simply specify aic7xxx=verbose, then the kernel will automatically - pick the default set of verbose messages for you to see. - Alternatively, you can specify the command as - "aic7xxx=verbose:0xXXXX" where the X entries are replaced with - hexadecimal digits. This option is a bit field type option. For - a full listing of the available options, search for the - #define VERBOSE_xxxxxx lines in the aic7xxx.c file. If you want - verbose messages, then it is recommended that you simply use the - aic7xxx=verbose variant of this command. - - "aic7xxx=pci_parity:x" - This option controls whether or not the driver - enables PCI parity error checking on the PCI bus. By default, this - checking is disabled. To enable the checks, simply specify pci_parity - with no value afterwords. To reverse the parity from even to odd, - supply any number other than 0 or 255. In short: - pci_parity - Even parity checking (even is the normal PCI parity) - pci_parity:x - Where x > 0, Odd parity checking - pci_parity:0 - No check (default) - NOTE: In order to get Even PCI parity checking, you must use the - version of the option that does not include the : and a number at - the end (unless you want to enter exactly 2^32 - 1 as the number). - - "aic7xxx=no_probe" - This option will disable the probing for any VLB - based 2842 controllers and any EISA based controllers. This is - needed on certain newer motherboards where the normal EISA I/O ranges - have been claimed by other PCI devices. Probing on those machines - will often result in the machine crashing or spontaneously rebooting - during startup. Examples of machines that need this are the - Dell PowerEdge 6300 machines. - - "aic7xxx=seltime:2" - This option controls how long the card waits - during a device selection sequence for the device to respond. - The original SCSI spec says that this "should be" 256ms. This - is generally not required with modern devices. However, some - very old SCSI I devices need the full 256ms. Most modern devices - can run fine with only 64ms. The default for this option is - 64ms. If you need to change this option, then use the following - table to set the proper value in the example above: - 0 - 256ms - 1 - 128ms - 2 - 64ms - 3 - 32ms - - "aic7xxx=panic_on_abort" - This option is for debugging and will cause - the driver to panic the linux kernel and freeze the system the first - time the drivers abort or reset routines are called. This is most - helpful when some problem causes infinite reset loops that scroll too - fast to see. By using this option, you can write down what the errors - actually are and send that information to me so it can be fixed. - - "aic7xxx=dump_card" - This option will print out the *entire* set of - configuration registers on the card during the init sequence. This - is a debugging aid used to see exactly what state the card is in - when we finally finish our initialization routines. If you don't - have documentation on the chipsets, this will do you absolutely - no good unless you are simply trying to write all the information - down in order to send it to me. - - "aic7xxx=dump_sequencer" - This is the same as the above options except - that instead of dumping the register contents on the card, this - option dumps the contents of the sequencer program RAM. This gives - the ability to verify that the instructions downloaded to the - card's sequencer are indeed what they are suppossed to be. Again, - unless you have documentation to tell you how to interpret these - numbers, then it is totally useless. - - "aic7xxx=override_term:0xffffffff" - This option is used to force the - termination on your SCSI controllers to a particular setting. This - is a bit mask variable that applies for up to 8 aic7xxx SCSI channels. - Each channel gets 4 bits, divided as follows: - bit 3 2 1 0 - | | | Enable/Disable Single Ended Low Byte Termination - | | En/Disable Single Ended High Byte Termination - | En/Disable Low Byte LVD Termination - En/Disable High Byte LVD Termination - - The upper 2 bits that deal with LVD termination only apply to Ultra2 - controllers. Futhermore, due to the current Ultra2 controller - designs, these bits are tied together such that setting either bit - enables both low and high byte LVD termination. It is not possible - to only set high or low byte LVD termination in this manner. This is - an artifact of the BIOS definition on Ultra2 controllers. For other - controllers, the only important bits are the two lowest bits. Setting - the higher bits on non-Ultra2 controllers has no effect. A few - examples of how to use this option: - - Enable low and high byte termination on a non-ultra2 controller that - is the first aic7xxx controller (the correct bits are 0011), - aic7xxx=override_term:0x3 - - Enable all termination on the third aic7xxx controller, high byte - termination on the second aic7xxx controller, and low and high byte - SE termination on the first aic7xxx controller - (bits are 1111 0010 0011), - aic7xxx=override_term:0xf23 - - No attempt has been made to make this option non-cryptic. It really - shouldn't be used except in dire circumstances, and if that happens, - I'm probably going to be telling you what to set this to anyway :) - - "aic7xxx=stpwlev:0xffffffff" - This option is used to control the STPWLEV - bit in the DEVCONFIG PCI register. Currently, this is one of the - very few registers that we have absolutely *no* way of detecting - what the variable should be. It depends entirely on how the chipset - and external terminators were coupled by the card/motherboard maker. - Further, a chip reset (at power up) always sets this bit to 0. If - there is no BIOS to run on the chipset/card (such as with a 2910C - or a motherboard controller with the BIOS totally disabled) then - the variable may not get set properly. Of course, if the proper - setting was 0, then that's what it would be after the reset, but if - the proper setting is actually 1.....you get the picture. Now, since - we can't detect this at all, I've added this option to force the - setting. If you have a BIOS on your controller then you should never - need to use this option. However, if you are having lots of SCSI - reset problems and can't seem to get them knocked out, this may help. - - Here's a test to know for certain if you need this option. Make - a boot floppy that you can use to boot your computer up and that - will detect the aic7xxx controller. Next, power down your computer. - While it's down, unplug all SCSI cables from your Adaptec SCSI - controller. Boot the system back up to the Adaptec EZ-SCSI BIOS - and then make sure that termination is enabled on your adapter (if - you have an Adaptec BIOS of course). Next, boot up the floppy you - made and wait for it to detect the aic7xxx controller. If the kernel - finds the controller fine, says scsi : x hosts and then tries to - detect your devices like normal, up to the point where it fails to - mount your root file system and panics, then you're fine. If, on - the other hand, the system goes into an infinite reset loop, then - you need to use this option and/or the previous option to force the - proper termination settings on your controller. If this happens, - then you next need to figure out what your settings should be. - - To find the correct settings, power your machine back down, connect - back up the SCSI cables, and boot back into your machine like normal. - However, boot with the aic7xxx=verbose:0x39 option. Record the - initial DEVCONFIG values for each of your aic7xxx controllers as - they are listed, and also record what the machine is detecting as - the proper termination on your controllers. NOTE: the order in - which the initial DEVCONFIG values are printed out is not gauranteed - to be the same order as the SCSI controllers are registered. The - above option and this option both work on the order of the SCSI - controllers as they are registered, so make sure you match the right - DEVCONFIG values with the right controllers if you have more than - one aic7xxx controller. - - Once you have the detected termination settings and the initial - DEVCONFIG values for each controller, then figure out what the - termination on each of the controllers *should* be. Hopefully, that - part is correct, but it could possibly be wrong if there is - bogus cable detection logic on your controller or something similar. - If all the controllers have the correct termination settings, then - don't set the aic7xxx=override_term variable at all, leave it alone. - Next, on any controllers that go into an infinite reset loop when - you unplug all the SCSI cables, get the starting DEVCONFIG value. - If the initial DEVCONFIG value is divisible by 2, then the correct - setting for that controller is 0. If it's an odd number, then - the correct setting for that controller is 1. For any other - controllers that didn't have an infinite reset problem, then reverse - the above options. If DEVCONFIG was even, then the correct setting - is 1, if not then the correct setting is 0. - - Now that you know what the correct setting was for each controller, - we need to encode that into the aic7xxx=stpwlev:0x... variable. - This variable is a bit field encoded variable. Bit 0 is for the first - aic7xxx controller, bit 1 for the next, etc. Put all these bits - together and you get a number. For example, if the third aic7xxx - needed a 1, but the second and first both needed a 0, then the bits - would be 100 in binary. This then translates to 0x04. You would - therefore set aic7xxx=stpwlev:0x04. This is fairly standard binary - to hexadecimal conversions here. If you aren't up to speed on the - binary->hex conversion then send an email to the aic7xxx mailing - list and someone can help you out. - - "aic7xxx=tag_info:{{8,8..},{8,8..},..}" - This option is used to disable - or enable Tagged Command Queueing (TCQ) on specific devices. As of - driver version 5.1.11, TCQ is now either on or off by default - according to the setting you choose during the make config process. - In order to en/disable TCQ for certian devices at boot time, a user - may use this boot param. The driver will then parse this message out - and en/disable the specific device entries that are present based upon - the value given. The param line is parsed in the following manner: - - { - first instance indicates the start of this parameter values - second instance is the start of entries for a particular - device entry - } - end the entries for a particular host adapter, or end the entire - set of parameter entries - , - move to next entry. Inside of a set of device entries, this - moves us to the next device on the list. Outside of device - entries, this moves us to the next host adapter - . - Same effect as , but is safe to use with insmod. - x - the number to enter into the array at this position. - 0 = Enable tagged queueing on this device and use the default - queue depth - 1-254 = Enable tagged queueing on this device and use this - number as the queue depth - 255 = Disable tagged queueing on this device. - Note: anything above 32 for an actual queue depth is wasteful - and not recommended. - - A few examples of how this can be used: - - tag_info:{{8,12,,0,,255,4}} - This line will only effect the first aic7xxx card registered. It - will set scsi id 0 to a queue depth of 8, id 1 to 12, leave id 2 - at the default, set id 3 to tagged queueing enabled and use the - default queue depth, id 4 default, id 5 disabled, and id 6 to 4. - Any not specified entries stay at the default value, repeated - commas with no value specified will simply increment to the next id - without changing anything for the missing values. - - tag_info:{,,,{,,,255}} - First, second, and third adapters at default values. Fourth - adapter, id 3 is disabled. Notice that leading commas simply - increment what the first number effects, and there are no need - for trailing commas. When you close out an adapter, or the - entire entry, anything not explicitly set stays at the default - value. - - A final note on this option. The scanner I used for this isn't - perfect or highly robust. If you mess the line up, the worst that - should happen is that the line will get ignored. If you don't - close out the entire entry with the final bracket, then any other - aic7xxx options after this will get ignored. So, in general, be - sure of what you are entering, and after you have it right, just - add it to the lilo.conf file so there won't be any mistakes. As - a means of checking this parser, the entire tag_info array for - each card is now printed out in the /proc/scsi/aic7xxx/x file. You - can use that to verify that your options were parsed correctly. - - Boot command line options may be combined to form the proper set of options - a user might need. For example, the following is valid: - - aic7xxx=verbose,extended,irq_trigger:1 - - The only requirement is that individual options be separated by a comma or - a period on the command line. - - Module Loading command options - ------------------------------ - When loading the aic7xxx driver as a module, the exact same options are - available to the user. However, the syntax to specify the options changes - slightly. For insmod, you need to wrap the aic7xxx= argument in quotes - and replace all ',' with '.'. So, for example, a valid insmod line - would be: - - insmod aic7xxx aic7xxx='verbose.irq_trigger:1.extended' - - This line should result in the *exact* same behaviour as if you typed - it in at the lilo prompt and the driver was compiled into the kernel - instead of being a module. The reason for the single quote is so that - the shell won't try to interpret anything in the line, such as {. - Insmod assumes any options starting with a letter instead of a number - is a character string (which is what we want) and by switching all of - the commas to periods, insmod won't interpret this as more than one - string and write junk into our binary image. I consider it a bug in - the insmod program that even if you wrap your string in quotes (quotes - that pass the shell mind you and that insmod sees) it still treates - a comma inside of those quotes as starting a new variable, resulting - in memory scribbles if you don't switch the commas to periods. - - - Kernel Compile options - ------------------------------ - The various kernel compile time options for this driver are now fairly - well documented in the file Documentation/Configure.help. In order to - see this documentation, you need to use one of the advanced configuration - programs (menuconfig and xconfig). If you are using the "make menuconfig" - method of configuring your kernel, then you would simply highlight the - option in question and hit the ? key. If you are using the "make xconfig" - method of configuring your kernel, then simply click on the help button - next to the option you have questions about. The help information from - the Configure.help file will then get automatically displayed. - - /proc support - ------------------------------ - The /proc support for the AIC7xxx can be found in the /proc/scsi/aic7xxx/ - directory. That directory contains a file for each SCSI controller in - the system. Each file presents the current configuration and transfer - statistics (enabled with #define in aic7xxx.c) for each controller. - - Thanks to Michael Neuffer for his upper-level SCSI help, and - Matthew Jacob for statistics support. - - Debugging the driver - ------------------------------ - Should you have problems with this driver, and would like some help in - getting them solved, there are a couple debugging items built into - the driver to facilitate getting the needed information from the system. - In general, I need a complete description of the problem, with as many - logs as possible concerning what happens. To help with this, there is - a command option aic7xxx=panic_on_abort. This option, when set, forces - the driver to panic the kernel on the first SCSI abort issued by the - mid level SCSI code. If your system is going to reset loops and you - can't read the screen, then this is what you need. Not only will it - stop the system, but it also prints out a large amount of state - information in the process. Second, if you specify the option - "aic7xxx=verbose:0x1ffff", the system will print out *SOOOO* much - information as it runs that you won't be able to see anything. - However, this can actually be very useful if your machine simply - locks up when trying to boot, since it will pin-point what was last - happening (in regards to the aic7xxx driver) immediately prior to - the lockup. This is really only useful if your machine simply can - not boot up successfully. If you can get your machine to run, then - this will produce far too much information. - - FTP sites - ------------------------------ - ftp://ftp.redhat.com/pub/aic/ - - Out of date. I used to keep stuff here, but too many people - complained about having a hard time getting into Red Hat's ftp - server. So use the web site below instead. - ftp://ftp.pcnet.com/users/eischen/Linux/ - - Dan Eischen's driver distribution area - ftp://ekf2.vsb.cz/pub/linux/kernel/aic7xxx/ftp.teleport.com/ - - European Linux mirror of Teleport site - - Web sites - ------------------------------ - http://people.redhat.com/dledford/ - - My web site, also the primary aic7xxx site with several related - pages. - -Dean W. Gehnert -deang@teleport.com - -$Revision: 3.0 $ - -Modified by Doug Ledford 1998-2000 - +==================================================================== += Adaptec Aic7xxx Fast -> Ultra160 Family Manager Set v6.2.10 = += README for = += The Linux Operating System = +==================================================================== + +The following information is available in this file: + + 1. Supported Hardware + 2. Command Line Options + 3. Contacting Adaptec + +1. Supported Hardware + + The following Adaptec SCSI Chips and Host Adapters are supported by + the aic7xxx driver. + + Chip MIPS Host Bus MaxSync MaxWidth SCBs Notes + --------------------------------------------------------------- + aic7770 10 EISA/VL 10MHz 16Bit 4 1 + aic7850 10 PCI/32 10MHz 8Bit 3 + aic7855 10 PCI/32 10MHz 8Bit 3 + aic7856 10 PCI/32 10MHz 8Bit 3 + aic7859 10 PCI/32 20MHz 8Bit 3 + aic7860 10 PCI/32 20MHz 8Bit 3 + aic7870 10 PCI/32 10MHz 16Bit 16 + aic7880 10 PCI/32 20MHz 16Bit 16 + aic7890 20 PCI/32 40MHz 16Bit 16 3 4 5 6 7 8 + aic7891 20 PCI/64 40MHz 16Bit 16 3 4 5 6 7 8 + aic7892 20 PCI/64-66 80MHz 16Bit 16 3 4 5 6 7 8 + aic7895 15 PCI/32 20MHz 16Bit 16 2 3 4 5 + aic7895C 15 PCI/32 20MHz 16Bit 16 2 3 4 5 8 + aic7896 20 PCI/32 40MHz 16Bit 16 2 3 4 5 6 7 8 + aic7897 20 PCI/64 40MHz 16Bit 16 2 3 4 5 6 7 8 + aic7899 20 PCI/64-66 80MHz 16Bit 16 2 3 4 5 6 7 8 + + 1. Multiplexed Twin Channel Device - One controller servicing two + busses. + 2. Multi-function Twin Channel Device - Two controllers on one chip. + 3. Command Channel Secondary DMA Engine - Allows scatter gather list + and SCB prefetch. + 4. 64 Byte SCB Support - Allows disconnected, unttagged request table + for all possible target/lun combinations. + 5. Block Move Instruction Support - Doubles the speed of certain + sequencer operations. + 6. `Bayonet' style Scatter Gather Engine - Improves S/G prefetch + performance. + 7. Queuing Registers - Allows queuing of new transactions without + pausing the sequencer. + 8. Multiple Target IDs - Allows the controller to respond to selection + as a target on multiple SCSI IDs. + + Controller Chip Host-Bus Int-Connectors Ext-Connectors Notes + -------------------------------------------------------------------------- + AHA-274X[A] aic7770 EISA SE-50M SE-HD50F + AHA-274X[A]W aic7770 EISA SE-HD68F SE-HD68F + SE-50M + AHA-274X[A]T aic7770 EISA 2 X SE-50M SE-HD50F + AHA-2842 aic7770 VL SE-50M SE-HD50F + AHA-2940AU aic7860 PCI/32 SE-50M SE-HD50F + AVA-2902I aic7860 PCI/32 SE-50M + AVA-2902E aic7860 PCI/32 SE-50M + AVA-2906 aic7856 PCI/32 SE-50M SE-DB25F + APC-7850 aic7850 PCI/32 SE-50M 1 + AVA-2940 aic7860 PCI/32 SE-50M + AHA-2920B aic7860 PCI/32 SE-50M + AHA-2930B aic7860 PCI/32 SE-50M + AHA-2920C aic7856 PCI/32 SE-50M SE-HD50F + AHA-2930C aic7860 PCI/32 SE-50M + AHA-2930C aic7860 PCI/32 SE-50M + AHA-2910C aic7860 PCI/32 SE-50M + AHA-2915C aic7860 PCI/32 SE-50M + AHA-2940AU/CN aic7860 PCI/32 SE-50M SE-HD50F + AHA-2944W aic7870 PCI/32 HVD-HD68F HVD-HD68F + HVD-50M + AHA-3940W aic7870 PCI/32 2 X SE-HD68F SE-HD68F 2 + AHA-2940UW aic7880 PCI/32 SE-HD68F + SE-50M SE-HD68F + AHA-2940U aic7880 PCI/32 SE-50M SE-HD50F + AHA-2940D aic7880 PCI/32 + AHA-2940 A/T aic7880 PCI/32 + AHA-2940D A/T aic7880 PCI/32 + AHA-3940UW aic7880 PCI/32 2 X SE-HD68F SE-HD68F 3 + AHA-3940UWD aic7880 PCI/32 2 X SE-HD68F 2 X SE-VHD68F 3 + AHA-3940U aic7880 PCI/32 2 X SE-50M SE-HD50F 3 + AHA-2944UW aic7880 PCI/32 HVD-HD68F HVD-HD68F + HVD-50M + AHA-3944UWD aic7880 PCI/32 2 X HVD-HD68F 2 X HVD-VHD68F 3 + AHA-4944UW aic7880 PCI/32 + AHA-2930UW aic7880 PCI/32 + AHA-2940UW Pro aic7880 PCI/32 SE-HD68F SE-HD68F 4 + SE-50M + AHA-2940UW/CN aic7880 PCI/32 + AHA-2940UDual aic7895 PCI/32 + AHA-2940UWDual aic7895 PCI/32 + AHA-3940UWD aic7895 PCI/32 + AHA-3940AUW aic7895 PCI/32 + AHA-3940AUWD aic7895 PCI/32 + AHA-3940AU aic7895 PCI/32 + AHA-3944AUWD aic7895 PCI/32 2 X HVD-HD68F 2 X HVD-VHD68F + AHA-2940U2B aic7890 PCI/32 LVD-HD68F LVD-HD68F + AHA-2940U2 OEM aic7891 PCI/64 + AHA-2940U2W aic7890 PCI/32 LVD-HD68F LVD-HD68F + SE-HD68F + SE-50M + AHA-2950U2B aic7891 PCI/64 LVD-HD68F LVD-HD68F + AHA-2930U2 aic7890 PCI/32 LVD-HD68F SE-HD50F + SE-50M + AHA-3950U2B aic7897 PCI/64 + AHA-3950U2D aic7897 PCI/64 + AHA-29160 aic7892 PCI/64-66 + AHA-29160 CPQ aic7892 PCI/64-66 + AHA-29160N aic7892 PCI/32 LVD-HD68F SE-HD50F + SE-50M + AHA-29160LP aic7892 PCI/64-66 + AHA-19160 aic7892 PCI/64-66 + AHA-29150LP aic7892 PCI/64-66 + AHA-29130LP aic7892 PCI/64-66 + AHA-3960D aic7899 PCI/64-66 2 X LVD-HD68F 2 X LVD-VHD68F + LVD-50M + AHA-3960D CPQ aic7899 PCI/64-66 2 X LVD-HD68F 2 X LVD-VHD68F + LVD-50M + AHA-39160 aic7899 PCI/64-66 2 X LVD-HD68F 2 X LVD-VHD68F + LVD-50M + + 1. No BIOS support + 2. DEC21050 PCI-PCI bridge with multiple controller chips on secondary bus + 3. DEC2115X PCI-PCI bridge with multiple controller chips on secondary bus + 4. All three SCSI connectors may be used simultaneously without + SCSI "stub" effects. + +2. Command Line Options + + WARNING: ALTERING OR ADDING THESE DRIVER PARAMETERS + INCORRECTLY CAN RENDER YOUR SYSTEM INOPERABLE. + USE THEM WITH CAUTION. + + Edit the file "modules.conf" in the directory /etc and add/edit a + line containing 'options aic7xxx=[command[,command...]]' where + 'command' is one or more of the following: + ----------------------------------------------------------------- + Option: verbose + Definition: enable additional informative messages during + driver operation. + Possible Values: This option is a flag + Default Value: disabled + ----------------------------------------------------------------- + Option: debug:[value] + Definition: Enables various levels of debugging information + Possible Values: 0x0000 = no debugging, 0xffff = full debugging + Default Value: 0x0000 + ----------------------------------------------------------------- + Option: no_reset + Definition: Do not reset the bus during the initial probe + phase + Possible Values: This option is a flag + Default Value: disabled + ----------------------------------------------------------------- + Option: extended + Definition: Force extended translation on the controller + Possible Values: This option is a flag + Default Value: disabled + ----------------------------------------------------------------- + Option: periodic_otag + Definition: Send an ordered tag periodically to prevent + tag starvation. Needed for some older devices + Possible Values: This option is a flag + Default Value: disabled + ----------------------------------------------------------------- + Option: reverse_scan + Definition: Probe the scsi bus in reverse order, starting + with target 15 + Possible Values: This option is a flag + Default Value: disabled + ----------------------------------------------------------------- + Option: global_tag_depth + Definition: Global tag depth for all targets on all busses. + This option sets the default tag depth which + may be selectively overridden vi the tag_info + option. + Possible Values: 1 - 253 + Default Value: 32 + ----------------------------------------------------------------- + Option: tag_info:{{value[,value...]}[,{value[,value...]}...]} + Definition: Set the per-target tagged queue depth on a + per controller basis. Both controllers and targets + may be ommitted indicating that they should retain + the default tag depth. + Examples: tag_info:{{16,32,32,64,8,8,,32,32,32,32,32,32,32,32,32} + On Controller 0 + specifies a tag depth of 16 for target 0 + specifies a tag depth of 64 for target 3 + specifies a tag depth of 8 for targets 4 and 5 + leaves target 6 at the default + specifies a tag depth of 32 for targets 1,2,7-15 + All other targets retain the default depth. + + tag_info:{{},{32,,32}} + On Controller 1 + specifies a tag depth of 32 for targets 0 and 2 + All other targets retain the default depth. + + Possible Values: 1 - 253 + Default Value: 32 + ----------------------------------------------------------------- + Option: seltime:[value] + Definition: Specifies the selection timeout value + Possible Values: 0 = 256ms, 1 = 128ms, 2 = 64ms, 3 = 32ms + Default Value: 0 + ----------------------------------------------------------------- + + Example: 'options aic7xxx=verbose,no_probe,tag_info:{{},{,,10}},seltime:1" + enables verbose logging, Disable EISA/VLB probing, + and set tag depth on Controller 1/Target 2 to 10 tags. + +3. Contacting Adaptec + + A Technical Support Identification (TSID) Number is required for + Adaptec technical support. + - The 12-digit TSID can be found on the white barcode-type label + included inside the box with your product. The TSID helps us + provide more efficient service by accurately identifying your + product and support status. + Support Options + - Search the Adaptec Support Knowledgebase (ASK) at + http://ask.adaptec.com for articles, troubleshooting tips, and + frequently asked questions for your product. + - For support via Email, submit your question to Adaptec's + Technical Support Specialists at http://ask.adaptec.com. + + North America + - Visit our Web site at http://www.adaptec.com. + - To speak with a Fibre Channel/RAID/External Storage Technical + Support Specialist, call 1-321-207-2000, + Hours: Monday-Friday, 3:00 A.M. to 5:00 P.M., PST. + (Not open on holidays) + - For Technical Support in all other technologies including + SCSI, call 1-408-934-7274, + Hours: Monday-Friday, 6:00 A.M. to 5:00 P.M., PST. + (Not open on holidays) + - For after hours support, call 1-800-416-8066 ($99/call, + $149/call on holidays) + - To order Adaptec products including software and cables, call + 1-800-442-7274 or 1-408-957-7274. You can also visit our + online store at http://www.adaptecstore.com + + Europe + - Visit our Web site at http://www.adaptec-europe.com. + - English and French: To speak with a Technical Support + Specialist, call one of the following numbers: + - English: +32-2-352-3470 + - French: +32-2-352-3460 + Hours: Monday-Thursday, 10:00 to 12:30, 13:30 to 17:30 CET + Friday, 10:00 to 12:30, 13:30 to 16:30 CET + - German: To speak with a Technical Support Specialist, + call +49-89-456-40660 + Hours: Monday-Thursday, 09:30 to 12:30, 13:30 to 16:30 CET + Friday, 09:30 to 12:30, 13:30 to 15:00 CET + - To order Adaptec products, including accessories and cables: + - UK: +0800-96-65-26 or fax +0800-731-02-95 + - Other European countries: +32-11-300-379 + + Australia and New Zealand + - Visit our Web site at http://www.adaptec.com.au. + - To speak with a Technical Support Specialist, call + +612-9416-0698 + Hours: Monday-Friday, 10:00 A.M. to 4:30 P.M., EAT + (Not open on holidays) + + Japan + - To speak with a Technical Support Specialist, call + +81-3-5308-6120 + Hours: Monday-Friday, 9:00 a.m. to 12:00 p.m., 1:00 p.m. to + 6:00 p.m. TSC + + Hong Kong and China + - To speak with a Technical Support Specialist, call + +852-2869-7200 + Hours: Monday-Friday, 10:00 to 17:00. + - Fax Technical Support at +852-2869-7100. + + Singapore + - To speak with a Technical Support Specialist, call + +65-245-7470 + Hours: Monday-Friday, 10:00 to 17:00. + - Fax Technical Support at +852-2869-7100 + +------------------------------------------------------------------- + +(c) 2002 Adaptec, Inc. All Rights Reserved. No part of this +publication may be reproduced, stored in a retrieval system, or +transmitted in any form or by any means, electronic, mechanical, +photocopying, recording or otherwise, without prior written consent +of Adaptec, Inc., 691 South Milpitas Blvd., Milpitas, CA 95035. diff -Nru a/Documentation/sound/alsa/ALSA-Configuration.txt b/Documentation/sound/alsa/ALSA-Configuration.txt --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/Documentation/sound/alsa/ALSA-Configuration.txt Mon Dec 23 21:22:04 2002 @@ -0,0 +1,1188 @@ + + Advanced Linux Sound Architecture - Driver + ========================================== + Configuration guide + + +Kernel Configuration +==================== + +To enable the ALSA support, at least you need to build the kernel with +the primary sound card support (CONFIG_SOUND). Since ALSA can emulate +the OSS, you don't have to choose any of the OSS/Free modules. Please +enable "OSS API emulation" (CONFIG_SND_OSSEMUL) and both OSS mixer and +PCM supports if you want to run the OSS application with the ALSA. + +When you want to support the WaveTable functionality on some cards +such like SB Live!, you need to enable "Sequencer support" +(CONFIG_SND_SEQUENCER). + +For getting more verbose debug messages, turn on "Verbose printk" and +"Debug" options. For checking the memory leaks, you can turn on +"Debug memory" option, too. "Debug detection" will put more +additional checks for the detection of cards. + +Please note that all the ALSA ISA drivers support Linux isapnp API (if +the card supports). You don't need to configure the PnP via +isapnptools. + + +Module parameters +================= + + A user can modify or set parameters at the load time of the module. If + the module supports more cards and you have got more than one card + of the same type, you may simply specify more values for the parameter, + delimited by commas. + + Note that module option names were changed in 0.9.0rc4. The 'snd_' + prefix was removed. + + Module snd + ---------- + + The module snd is the ALSA core module, which is used by all ALSA + card drivers. This takes the global options for creating devices, + etc. + + major - major # for sound driver + - default is 116 + cards_limit + - specifies card limit # (1-8) + - good for kmod support if you do not want to search + for soundcards which are not installed in your system + device_mode + - specifies permission mask for dynamic sound device filesystem + - default value = 0666 + - for example 'device_mode=0660' + device_gid + - specifies GID number for dynamic sound device filesystem + - default value = 0 (root) + device_uid + - specifies UID number for dynamic sound device filesystem + - default value = 0 (root) + + + Module snd-pcm-oss + ------------------ + + The PCM OSS emulation module. + This module takes the options to change the mapping of devices. + + dsp_map - PCM device number maps assigned to the 1st OSS device. + (default: 0) + adsp_map - PCM device number maps assigned to the 2st OSS device. + (default: 1) + nonblock_open - Don't block opening busy PCM devices. + + For example, when dsp_map=2, /dev/dsp will be mapped to PCM #2 of + the card #0. Similarly, when adsp_map=0, /dev/adsp will be mapped + to PCM #0 of the card #0. + For changing the second or later card, specify the option with + commas, such like "dsp_map=0,1". + + nonblock_open option is used to change the behavior of the PCM + regarding opening the device. When this option is non-zero, + opening a busy OSS PCM device won't be blocked but return + immediately with EAGAIN (just like O_NONBLOCK flag). + + Module snd-rawmidi + ------------------ + + This module takes the options to change the mapping of OSS + devices like snd-pcm-oss module. + + midi_map - MIDI device number maps assigned to the 1st OSS device. + (default: 0) + amidi_map - MIDI device number maps assigned to the 2st OSS device. + (default: 1) + + Global parameters for top soundcard modules + ------------------------------------------- + + Each of top-level soundcard module takes some general options, + + index - 0-7 - index (slot #) for soundcard + - if not set or -1, first free index (slot #) is assigned + id - user identification for card (up to 15 chars) + - default expression is 'card' (for example card1) + - value is used for /proc/asound filesystem + - this value can be used by applications for identification + of card if user does not want identify card with index number + enable - enable card (only first card is enabled by default) + + Module snd-ad1816a + ------------------ + + Module for soundcards based on Analog Devices AD1816A/AD1815 ISA chips. + + port - port # for AD1816A chip (PnP setup) + mpu_port - port # for MPU-401 UART (PnP setup) + fm_port - port # for OPL3 (PnP setup) + irq - IRQ # for AD1816A chip (PnP setup) + mpu_irq - IRQ # for MPU-401 UART (PnP setup) + dma1 - first DMA # for AD1816A chip (PnP setup) + dma2 - second DMA # for AD1816A chip (PnP setup) + + Module supports up to 8 cards, autoprobe and PnP. + + Module snd-ad1848 + ----------------- + + Module for soundcards based on AD1848/AD1847/CS4248 ISA chips. + + port - port # for AD1848 chip + irq - IRQ # for AD1848 chip + dma1 - DMA # for AD1848 chip (0,1,3) + + Module supports up to 8 cards. This module does not support autoprobe + thus main port must be specified!!! Other ports are optional. + + Module snd-ali5451 + ------------------ + + Module for ALi M5451 PCI chip. + + pcm_channels - Number of hardware channels assigned for PCM + + Module supports autoprobe and multiple chips (max 8). + + The power-management is supported. + + Module snd-als100 + ----------------- + + Module for soundcards based on Avance Logic ALS100/ALS120 ISA chips. + + port - port # for ALS100 (SB16) chip (PnP setup) + irq - IRQ # for ALS100 (SB16) chip (PnP setup) + dma8 - 8-bit DMA # for ALS100 (SB16) chip (PnP setup) + dma16 - 16-bit DMA # for ALS100 (SB16) chip (PnP setup) + mpu_port - port # for MPU-401 UART (PnP setup) + mpu_irq - IRQ # for MPU-401 (PnP setup) + fm_port - port # for OPL3 FM (PnP setup) + + Module supports up to 8 cards, autoprobe and PnP. + + Module snd-als4000 + ------------------ + + Module for soundcards based on Avance Logic ALS4000 PCI chip. + + joystick_port - port # for legacy joystick support. + default: 0x200 for the 1st card. + 0 = disabled + + Module supports up to 8 cards, autoprobe and PnP. + + Module snd-azt2320 + ------------------ + + Module for soundcards based on Aztech System AZT2320 ISA chip (PnP only). + + port - port # for AZT2320 chip (PnP setup) + wss_port - port # for WSS (PnP setup) + mpu_port - port # for MPU-401 UART (PnP setup) + fm_port - FM port # for AZT2320 chip (PnP setup) + irq - IRQ # for AZT2320 (WSS) chip (PnP setup) + mpu_irq - IRQ # for MPU-401 UART (PnP setup) + dma1 - 1st DMA # for AZT2320 (WSS) chip (PnP setup) + dma2 - 2nd DMA # for AZT2320 (WSS) chip (PnP setup) + + Module supports up to 8 cards, PnP and autoprobe. + + Module snd-cmi8330 + ------------------ + + Module for soundcards based on C-Media CMI8330 ISA chips. + + wssport - port # for CMI8330 chip (WSS) + wssirq - IRQ # for CMI8330 chip (WSS) + wssdma - first DMA # for CMI8330 chip (WSS) + sbport - port # for CMI8330 chip (SB16) + sbirq - IRQ # for CMI8330 chip (SB16) + sbdma8 - 8bit DMA # for CMI8330 chip (SB16) + sbdma16 - 16bit DMA # for CMI8330 chip (SB16) + + Module supports up to 8 cards and autoprobe. + + Module snd-cmipci + ----------------- + + Module for C-Media CMI8338 and 8738 PCI soundcards. + + mpu_port - 0x300 (default),0x310,0x320,0x330, -1 (diable) + fm_port - 0x388 (default), -1 (disable) + + Module supports autoprobe and multiple chips (max 8). + + Module snd-cs4231 + ----------------- + + Module for soundcards based on CS4231 ISA chips. + + port - port # for CS4231 chip + mpu_port - port # for MPU-401 UART (optional), -1 = disable + irq - IRQ # for CS4231 chip + mpu_irq - IRQ # for MPU-401 UART + dma1 - first DMA # for CS4231 chip + dma2 - second DMA # for CS4231 chip + + Module supports up to 8 cards. This module does not support autoprobe + thus main port must be specified!!! Other ports are optional. + + The power-management is supported. + + Module snd-cs4232 + ----------------- + + Module for soundcards based on CS4232/CS4232A ISA chips. + + port - port # for CS4232 chip (PnP setup - 0x534) + cport - control port # for CS4232 chip (PnP setup - 0x120,0x210,0xf00) + mpu_port - port # for MPU-401 UART (PnP setup - 0x300), -1 = disable + fm_port - FM port # for CS4232 chip (PnP setup - 0x388), -1 = disable + irq - IRQ # for CS4232 chip (5,7,9,11,12,15) + mpu_irq - IRQ # for MPU-401 UART (9,11,12,15) + dma1 - first DMA # for CS4232 chip (0,1,3) + dma2 - second DMA # for Yamaha CS4232 chip (0,1,3), -1 = disable + isapnp - ISA PnP detection - 0 = disable, 1 = enable (default) + + Module supports up to 8 cards. This module does not support autoprobe + thus main port must be specified!!! Other ports are optional. + + The power-management is supported. + + Module snd-cs4236 + ----------------- + + Module for soundcards based on CS4235/CS4236/CS4236B/CS4237B/ + CS4238B/CS4239 ISA chips. + + port - port # for CS4236 chip (PnP setup - 0x534) + cport - control port # for CS4236 chip (PnP setup - 0x120,0x210,0xf00) + mpu_port - port # for MPU-401 UART (PnP setup - 0x300), -1 = disable + fm_port - FM port # for CS4236 chip (PnP setup - 0x388), -1 = disable + irq - IRQ # for CS4236 chip (5,7,9,11,12,15) + mpu_irq - IRQ # for MPU-401 UART (9,11,12,15) + dma1 - first DMA # for CS4236 chip (0,1,3) + dma2 - second DMA # for CS4236 chip (0,1,3), -1 = disable + isapnp - ISA PnP detection - 0 = disable, 1 = enable (default) + + Module supports up to 8 cards. This module does not support autoprobe + (if ISA PnP is not used) thus main port and control port must be + specified!!! Other ports are optional. + + The power-management is supported. + + Module snd-cs4281 + ----------------- + + Module for Cirrus Logic CS4281 soundchip. + + dual_codec - Secondary codec ID (0 = disable, default) + + Module supports up to 8 cards. + + The power-management is supported. + + Module snd-cs46xx + ----------------- + + Module for PCI soundcards based on CS4610/CS4612/CS4614/CS4615/CS4622/ + CS4624/CS4630/CS4280 PCI chips. + + external_amp - Force to enable external amplifer. + thinkpad - Force to enable Thinkpad's CLKRUN control. + mmap_valid - Support OSS mmap mode (default = 0). + + Module supports up to 8 cards and autoprobe. + Usually external amp and CLKRUN controls are detected automatically + from PCI sub vendor/device ids. If they don't work, give the options + above explicitly. + + The power-management is supported. + + Module snd-dt019x + ----------------- + + Module for Diamond Technologies DT-019X / Avance Logic ALS-007 (PnP + only) + + port - Port # (PnP setup) + mpu_port - Port # for MPU-401 (PnP setup) + fm_port - Port # for FM OPL-3 (PnP setup) + irq - IRQ # (PnP setup) + mpu_irq - IRQ # for MPU-401 (PnP setup) + dma8 - DMA # (PnP setup) + + Module supports up to 8 cards. This module is enabled only with + ISA PnP support. + + Module snd-dummy + ---------------- + + Module for the dummy soundcard. This soundcard doesn't do any output + or input, but you may use this module for any application which + requires a soundcard (like RealPlayer). + + Module snd-emu10k1 + ------------------ + + Module for EMU10K1/EMU10k2 based PCI soundcards. + * Sound Blaster Live! + * Sound Blaster PCI 512 + * Emu APS (partially supported) + * Sound Blaster Audigy + + extin - bitmap of available external inputs for FX8010 (see bellow) + extout - bitmap of available external outputs for FX8010 (see bellow) + seq_ports - allocated sequencer ports (4 by default) + max_synth_voices - limit of voices used for wavetable (64 by default) + max_buffer_size - specifies the maximum size of wavetable/pcm buffers + given in MB unit. Default value is 128. + enable_ir - enable IR + + Module supports up to 8 cards and autoprobe. + + Input & Output configurations [extin/extout] + * Creative Card wo/Digital out [0x0003/0x1f03] + * Creative Card w/Digital out [0x0003/0x1f0f] + * Creative Card w/Digital CD in [0x000f/0x1f0f] + * Creative Card wo/Digital out + LiveDrive [0x3fc3/0x1fc3] + * Creative Card w/Digital out + LiveDrive [0x3fc3/0x1fcf] + * Creative Card w/Digital CD in + LiveDrive [0x3fcf/0x1fcf] + * Creative Card wo/Digital out + Digital I/O 2 [0x0fc3/0x1f0f] + * Creative Card w/Digital out + Digital I/O 2 [0x0fc3/0x1f0f] + * Creative Card w/Digital CD in + Digital I/O 2 [0x0fcf/0x1f0f] + * Creative Card 5.1/w Digital out + LiveDrive [0x3fc3/0x1fff] + * Creative Card all ins and outs [0x3fff/0x1fff] + + Module snd-ens1370 + ------------------ + + Module for Ensoniq AudioPCI ES1370 PCI soundcards. + * SoundBlaster PCI 64 + * SoundBlaster PCI 128 + + Module supports up to 8 cards and autoprobe. + + Module snd-ens1371 + ------------------ + + Module for Ensoniq AudioPCI ES1371 PCI soundcards. + * SoundBlaster PCI 64 + * SoundBlaster PCI 128 + * SoundBlaster Vibra PCI + + Module supports up to 8 cards and autoprobe. + + Module snd-es968 + ---------------- + + Module for soundcards based on ESS ES968 chip (PnP only). + + port - port # for ES968 (SB8) chip (PnP setup) + irq - IRQ # for ES968 (SB8) chip (PnP setup) + dma1 - DMA # for ES968 (SB8) chip (PnP setup) + + Module supports up to 8 cards, PnP and autoprobe. + + Module snd-es1688 + ----------------- + + Module for ESS AudioDrive ES-1688 and ES-688 soundcards. + + port - port # for ES-1688 chip (0x220,0x240,0x260) + mpu_port - port # for MPU-401 port (0x300,0x310,0x320,0x330), -1 = disable (default) + irq - IRQ # for ES-1688 chip (5,7,9,10) + mpu_irq - IRQ # for MPU-401 port (5,7,9,10) + dma8 - DMA # for ES-1688 chip (0,1,3) + + Module supports up to 8 cards and autoprobe (without MPU-401 port). + + Module snd-es18xx + ----------------- + + Module for ESS AudioDrive ES-18xx soundcards. + + port - port # for ES-18xx chip (0x220,0x240,0x260) + mpu_port - port # for MPU-401 port (0x300,0x310,0x320,0x330), -1 = disable (default) + fm_port - port # for FM (optional, not used) + irq - IRQ # for ES-18xx chip (5,7,9,10) + dma1 - first DMA # for ES-18xx chip (0,1,3) + dma2 - first DMA # for ES-18xx chip (0,1,3) + isapnp - ISA PnP detection - 0 = disable, 1 = enable (default) + + Module supports up to 8 cards ISA PnP and autoprobe (without MPU-401 port + if native ISA PnP routines are not used). + When dma2 is equal with dma1, the driver works as half-duplex. + + The power-management is supported. + + Module snd-es1938 + ----------------- + + Module for soundcards based on ESS Solo-1 (ES1938,ES1946) chips. + + Module supports up to 8 cards and autoprobe. + + Module snd-es1968 + ----------------- + + Module for soundcards based on ESS Maestro-1/2/2E (ES1968/ES1978) chips. + + total_bufsize - total buffer size in kB (1-4096kB) + pcm_substreams_p - playback channels (1-8, default=2) + pcm_substreams_c - capture channels (1-8, default=0) + clock - clock (0 = auto-detection) + use_pm - support the power-management (0 = off, 1 = on, + 2 = auto) + + Module supports up to 8 cards and autoprobe. + + The power-management is supported. + + Module snd-fm801 + ---------------- + + Module for ForteMedia FM801 based PCI soundcards. + + Module supports up to 8 cards and autoprobe. + + Module snd-gusclassic + --------------------- + + Module for Gravis UltraSound Classic soundcard. + + port - port # for GF1 chip (0x220,0x230,0x240,0x250,0x260) + irq - IRQ # for GF1 chip (3,5,9,11,12,15) + dma1 - DMA # for GF1 chip (1,3,5,6,7) + dma2 - DMA # for GF1 chip (1,3,5,6,7,-1=disable) + joystick_dac - 0 to 31, (0.59V-4.52V or 0.389V-2.98V) + voices - GF1 voices limit (14-32) + pcm_voices - reserved PCM voices + + Module supports up to 8 cards and autoprobe. + + Module snd-gusextreme + --------------------- + + Module for Gravis UltraSound Extreme (Synergy ViperMax) soundcard. + + port - port # for ES-1688 chip (0x220,0x230,0x240,0x250,0x260) + gf1_port - port # for GF1 chip (0x210,0x220,0x230,0x240,0x250,0x260,0x270) + mpu_port - port # for MPU-401 port (0x300,0x310,0x320,0x330), -1 = disable + irq - IRQ # for ES-1688 chip (5,7,9,10) + gf1_irq - IRQ # for GF1 chip (3,5,9,11,12,15) + mpu_irq - IRQ # for MPU-401 port (5,7,9,10) + dma8 - DMA # for ES-1688 chip (0,1,3) + dma1 - DMA # for GF1 chip (1,3,5,6,7) + joystick_dac - 0 to 31, (0.59V-4.52V or 0.389V-2.98V) + voices - GF1 voices limit (14-32) + pcm_voices - reserved PCM voices + + Module supports up to 8 cards and autoprobe (without MPU-401 port). + + Module snd-gusmax + ----------------- + + Module for Gravis UltraSound MAX soundcard. + + port - port # for GF1 chip (0x220,0x230,0x240,0x250,0x260) + irq - IRQ # for GF1 chip (3,5,9,11,12,15) + dma1 - DMA # for GF1 chip (1,3,5,6,7) + dma2 - DMA # for GF1 chip (1,3,5,6,7,-1=disable) + joystick_dac - 0 to 31, (0.59V-4.52V or 0.389V-2.98V) + voices - GF1 voices limit (14-32) + pcm_voices - reserved PCM voices + + Module supports up to 8 cards and autoprobe. + + Module snd-hdsp + --------------- + + Module for RME Hammerfall DSP audio interface(s) + + precise_ptr - Enable precise pointer (doesn't work reliably). + (default = 0) + line_outs_monitor - Send all input and playback streams to line outs + by default. (default = 0) + force_firmware - Force a reload of the I/O box firmware + (default = 0) + + Module supports up to 8 cards. + + Module snd-ice1712 + ------------------ + + Module for Envy24 (ICE1712) based PCI soundcards. + * MidiMan M Audio Delta 1010 + * MidiMan M Audio Delta DiO 2496 + * MidiMan M Audio Delta 66 + * MidiMan M Audio Delta 44 + * MidiMan M Audio Audiophile 2496 + * TerraTec EWS 88MT + * TerraTec EWS 88D + * TerraTec EWX 24/96 + + omni - Omni I/O support for MidiMan M-Audio Delta44/66 + + Module supports up to 8 cards and autoprobe. Note: The consumer part + is not used with all Envy24 based cards (for example in the MidiMan Delta + serie). + + Module snd-intel8x0 + ------------------- + + Module for AC'97 motherboards from Intel and compatibles. + * Intel i810/810E, i815, i820, i830, i84x, MX440 + * SiS 7012 (SiS 735) + * NVidia NForce, NForce2 + * AMD AMD768, AMD8111 + * ALi m5455 + + ac97_clock - AC'97 codec clock base (0 = auto-detect) + joystick_port - Joystick port # (0 = disabled, 0x200) + mpu_port - MPU401 port # (0 = disabled, 0x330,0x300) + + Module supports autoprobe and multiple bus-master chips (max 8). + Note: the latest driver supports auto-detection of chip clock. + if you still encounter too fast playback, specify the clock + explicitly via the module option "ac97_clock=41194". + + The joystick and MPU-401 are supported only certain hardwares. + MPU401 is experimental, It doesn't work perfectly. + + The power-management is supported. + + Module snd-interwave + -------------------- + + Module for Gravis UltraSound PnP, Dynasonic 3-D/Pro, STB Sound Rage 32 + and other soundcards based on AMD InterWave (tm) chip. + + port - port # for InterWave chip (0x210,0x220,0x230,0x240,0x250,0x260) + irq - IRQ # for InterWave chip (3,5,9,11,12,15) + dma1 - DMA # for InterWave chip (0,1,3,5,6,7) + dma2 - DMA # for InterWave chip (0,1,3,5,6,7,-1=disable) + joystick_dac - 0 to 31, (0.59V-4.52V or 0.389V-2.98V) + midi - 1 = MIDI UART enable, 0 = MIDI UART disable (default) + pcm_voices - reserved PCM voices for the synthesizer (default 2) + effect - 1 = InterWave effects enable (default 0); + requires 8 voices + + Module supports up to 8 cards, autoprobe and ISA PnP. + + Module snd-interwave-stb + ------------------------ + + Module for UltraSound 32-Pro (soundcard from STB used by Compaq) + and other soundcards based on AMD InterWave (tm) chip with TEA6330T + circuit for extended control of bass, treble and master volume. + + port - port # for InterWave chip (0x210,0x220,0x230,0x240,0x250,0x260) + port_tc - tone control (i2c bus) port # for TEA6330T chip (0x350,0x360,0x370,0x380) + irq - IRQ # for InterWave chip (3,5,9,11,12,15) + dma1 - DMA # for InterWave chip (0,1,3,5,6,7) + dma2 - DMA # for InterWave chip (0,1,3,5,6,7,-1=disable) + joystick_dac - 0 to 31, (0.59V-4.52V or 0.389V-2.98V) + midi - 1 = MIDI UART enable, 0 = MIDI UART disable (default) + pcm_voices - reserved PCM voices for the synthesizer (default 2) + effect - 1 = InterWave effects enable (default 0); + requires 8 voices + + Module supports up to 8 cards, autoprobe and ISA PnP. + + Module snd-korg1212 + ------------------- + + Module for Korg 1212 IO PCI card + + Module supports up to 8 cards. + + Module snd-maestro3 + ------------------- + + Module for Allegro/Maestro3 chips + + external_amp - enable external amp (enabled by default) + amp_gpio - GPIO pin number for external amp (0-15) or + -1 for default pin (8 for allegro, 1 for + others) + + Module supports autoprobe and multiple chips (max 8). + Note: the binding of amplifier is dependent on hardware. + If there is no sound even though all channels are unmuted, try to + specify other gpio connection via amp_gpio option. + For example, a Panasonic notebook might need "amp_gpio=0x0d" + option. + + The power-management is supported. + + Module snd-mpu401 + ----------------- + + Module for MPU-401 UART devices. + + port - port number or -1 (disable) + irq - IRQ number or -1 (disable) + + Module supports multiple devices (max 8). + + Module snd-mtpav + ---------------- + + Module for MOTU MidiTimePiece AV multiport MIDI (on the parallel + port). + + port - I/O port # for MTPAV (0x378,0x278, default=0x378) + irq - IRQ # for MTPAV (7,5, default=7) + hwports - number of supported hardware ports, default=8. + + Module supports only 1 card. This module has no enable option. + + Module snd-nm256 + ---------------- + + Module for NeoMagic NM256AV/ZX chips + + playback_bufsize - max playback frame size in kB (4-128kB) + capture_bufsize - max capture frame size in kB (4-128kB) + force_ac97 - 0 or 1 (disabled by default) + buffer_top - specify buffer top address + use_cache - 0 or 1 (disabled by default) + vaio_hack - alias buffer_top=0x25a800 + + Module supports autoprobe and multiple chips (max 8). + Note: on some notebooks the buffer address cannot be detected + automatically, or causes hang-up during initialization. + In such a case, specify the buffer top address explicity via + buffer_top option. + For example, + Sony F250: buffer_top=0x25a800 + Sony F270: buffer_top=0x272800 + The driver supports only ac97 codec. It's possible to force + to initialize/use ac97 although it's not detected. In such a + case, use force_ac97=1 option. + + The power-management is supported. + + Module snd-opl3sa2 + ------------------ + + Module for Yamaha OPL3-SA2/SA3 soundcards. + + port - control port # for OPL3-SA chip (0x370) + sb_port - SB port # for OPL3-SA chip (0x220,0x240) + wss_port - WSS port # for OPL3-SA chip (0x530,0xe80,0xf40,0x604) + midi_port - port # for MPU-401 UART (0x300,0x330), -1 = disable + fm_port - FM port # for OPL3-SA chip (0x388), -1 = disable + irq - IRQ # for OPL3-SA chip (5,7,9,10) + dma1 - first DMA # for Yamaha OPL3-SA chip (0,1,3) + dma2 - second DMA # for Yamaha OPL3-SA chip (0,1,3), -1 = disable + isapnp - ISA PnP detection - 0 = disable, 1 = enable (default) + + Module supports up to 8 cards and ISA PnP. This module does not support + autoprobe (if ISA PnP is not used) thus all ports must be specified!!! + + The power-management is supported. + + Module snd-opti92x-ad1848 + ------------------------- + + Module for soundcards based on OPTi 82c92x and Analog Devices AD1848 chips. + Module works with OAK Mozart cards as well. + + port - port # for WSS chip (0x530,0xe80,0xf40,0x604) + mpu_port - port # for MPU-401 UART (0x300,0x310,0x320,0x330) + fm_port - port # for OPL3 device (0x388) + irq - IRQ # for WSS chip (5,7,9,10,11) + mpu_irq - IRQ # for MPU-401 UART (5,7,9,10) + dma1 - first DMA # for WSS chip (0,1,3) + + This module supports only one card, autoprobe and PnP. + + Module snd-opti92x-cs4231 + ------------------------- + + Module for soundcards based on OPTi 82c92x and Crystal CS4231 chips. + + port - port # for WSS chip (0x530,0xe80,0xf40,0x604) + mpu_port - port # for MPU-401 UART (0x300,0x310,0x320,0x330) + fm_port - port # for OPL3 device (0x388) + irq - IRQ # for WSS chip (5,7,9,10,11) + mpu_irq - IRQ # for MPU-401 UART (5,7,9,10) + dma1 - first DMA # for WSS chip (0,1,3) + dma2 - second DMA # for WSS chip (0,1,3) + + This module supports only one card, autoprobe and PnP. + + Module snd-opti93x + ------------------ + + Module for soundcards based on OPTi 82c93x chips. + + port - port # for WSS chip (0x530,0xe80,0xf40,0x604) + mpu_port - port # for MPU-401 UART (0x300,0x310,0x320,0x330) + fm_port - port # for OPL3 device (0x388) + irq - IRQ # for WSS chip (5,7,9,10,11) + mpu_irq - IRQ # for MPU-401 UART (5,7,9,10) + dma1 - first DMA # for WSS chip (0,1,3) + dma2 - second DMA # for WSS chip (0,1,3) + + This module supports only one card, autoprobe and PnP. + + Module snd-powermac (on ppc only) + --------------------------------- + + Module for PowerMac, iMac and iBook on-board soundchips + + enable_beep - enable beep using PCM (enabled as default) + + Module supports autoprobe a chip. + Note: the driver may have problems regarding endianess. + + The power-management is supported. + + Module snd-rme32 + ---------------- + + Module for RME Digi32, Digi32/8 and Digi32 PRO soundcards. + + Module supports up to 8 cards. + + Module snd-rme96 + ---------------- + + Module for RME Digi96, Digi96/8 and Digi96/8 PRO/PAD/PST soundcards. + + Module supports up to 8 cards. + + Module snd-rme9652 + ------------------ + + Module for RME Digi9652 (Hammerfall, Hammerfall-Light) soundcards. + + precise_ptr - Enable precise pointer (doesn't work reliably). + (default = 0) + + Module supports up to 8 cards. + + Module snd-sa11xx-uda1341 (on arm only) + --------------------------------------- + + Module for Philips UDA1341TS on Compaq iPAQ H3600 soundcard. + + Module supports only one card. + Module has no enable and index options. + + Module snd-sb8 + -------------- + + Module for 8-bit SoundBlaster cards: SoundBlaster 1.0, + SoundBlaster 2.0, + SoundBlaster Pro + + port - port # for SB DSP chip (0x220,0x240,0x260) + irq - IRQ # for SB DSP chip (5,7,9,10) + dma8 - DMA # for SB DSP chip (1,3) + + Module supports up to 8 cards and autoprobe. + + Module snd-sb16 and snd-sbawe + ----------------------------- + + Module for 16-bit SoundBlaster cards: SoundBlaster 16 (PnP), + SoundBlaster AWE 32 (PnP), + SoundBlaster AWE 64 PnP + + port - port # for SB DSP 4.x chip (0x220,0x240,0x260) + mpu_port - port # for MPU-401 UART (0x300,0x330), -1 = disable + awe_port - base port # for EMU8000 synthesizer (0x620,0x640,0x660) + (snd-sbawe module only) + irq - IRQ # for SB DSP 4.x chip (5,7,9,10) + dma8 - 8-bit DMA # for SB DSP 4.x chip (0,1,3) + dma16 - 16-bit DMA # for SB DSP 4.x chip (5,6,7) + mic_agc - Mic Auto-Gain-Control - 0 = disable, 1 = enable (default) + csp - ASP/CSP chip support - 0 = disable (default), 1 = enable + isapnp - ISA PnP detection - 0 = disable, 1 = enable (default) + + Module supports up to 8 cards, autoprobe and ISA PnP. + + Note: To use Vibra16X cards in 16-bit half duplex mode, you must + disable 16bit DMA with dma16 = -1 module parameter. + Also, all Sound Blaster 16 type cards can operate in 16-bit + half duplex mode through 8-bit DMA channel by disabling their + 16-bit DMA channel. + + Module snd-sgalaxy + ------------------ + + Module for Aztech Sound Galaxy soundcard. + + sbport - Port # for SB16 interface (0x220,0x240) + wssport - Port # for WSS interface (0x530,0xe80,0xf40,0x604) + irq - IRQ # (7,9,10,11) + dma1 - DMA # + + Module supports up to 8 cards. + + Module snd-sun-amd7930 (on sparc only) + -------------------------------------- + + Module for AMD7930 sound chips found on Sparcs. + + Module supports up to 8 cards. + + Module snd-sun-cs4231 (on sparc only) + ------------------------------------- + + Module for CS4231 sound chips found on Sparcs. + + Module supports up to 8 cards. + + Module snd-wavefront + -------------------- + + Module for Turtle Beach Maui, Tropez and Tropez+ soundcards. + + cs4232_pcm_port - Port # for CS4232 PCM interface. + cs4232_pcm_irq - IRQ # for CS4232 PCM interface (5,7,9,11,12,15). + cs4232_mpu_port - Port # for CS4232 MPU-401 interface. + cs4232_mpu_irq - IRQ # for CS4232 MPU-401 interface (9,11,12,15). + use_cs4232_midi - Use CS4232 MPU-401 interface + (inaccessibly located inside your computer) + ics2115_port - Port # for ICS2115 + ics2115_irq - IRQ # for ICS2115 + fm_port - FM OPL-3 Port # + dma1 - DMA1 # for CS4232 PCM interface. + dma2 - DMA2 # for CS4232 PCM interface. + isapnp - ISA PnP detection - 0 = disable, 1 = enable (default) + + Module supports up to 8 cards and ISA PnP. + + Module snd-sonicvibes + --------------------- + + Module for S3 SonicVibes PCI soundcards. + * PINE Schubert 32 PCI + + reverb - Reverb Enable - 1 = enable, 0 = disable (default) + - SoundCard must have onboard SRAM for this. + mge - Mic Gain Enable - 1 = enable, 0 = disable (default) + + Module supports up to 8 cards and autoprobe. + + Module snd-serial-u16550 + ------------------------ + + Module for UART16550A serial MIDI ports. + + port - port # for UART16550A chip + irq - IRQ # for UART16550A chip, -1 = poll mode + speed - speed in bauds (9600,19200,38400,57600,115200) + 38400 = default + base - base for divisor in bauds (57600,115200,230400,460800) + 115200 = default + outs - number of MIDI ports in a serial port (1-4) + 1 = default + adaptor - Type of adaptor. + 0 = Soundcanvas, 1 = MS-124T, 2 = MS-124W S/A, + 3 = MS-124W M/B, 4 = Generic + + Module supports up to 8 cards. This module does not support autoprobe + thus the main port must be specified!!! Other options are optional. + + Module snd-trident + ------------------ + + Module for Trident 4DWave DX/NX soundcards. + * Best Union Miss Melody 4DWave PCI + * HIS 4DWave PCI + * Warpspeed ONSpeed 4DWave PCI + * AzTech PCI 64-Q3D + * Addonics SV 750 + * CHIC True Sound 4Dwave + * Shark Predator4D-PCI + * Jaton SonicWave 4D + + pcm_channels - max channels (voices) reserved for PCM + wavetable_size - max wavetable size in kB (4-?kb) + + Module supports up to 8 cards and autoprobe. + + The power-management is supported. + + Module snd-usb-audio + -------------------- + + Module for USB audio and USB MIDI devices. + + vid - Vendor ID for the device (optional) + pid - Product ID for the device (optional) + + This module supports up to 8 cards, autoprobe and hotplugging. + + Module snd-via82xx + ------------------ + + Module for AC'97 motherboards based on VIA 82C686A/686B, 8233 + (south) bridge. + + mpu_port - 0x300,0x310,0x320,0x330, otherwise obtain BIOS setup + ac97_clock - AC'97 codec clock base (default 48000Hz) + + Module supports autoprobe and multiple bus-master chips (max 8). + Note: on some SMP motherboards like MSI 694D the interrupts might + not be generated properly. In such a case, please try to + set the SMP (or MPS) version on BIOS to 1.1 instead of + default value 1.4. Then the interrupt number will be + assigned under 15. You might also upgrade your BIOS. + + Module snd-virmidi + ------------------ + + Module for virtual rawmidi devices. + This module creates virtual rawmidi devices which communicate + to the corresponding ALSA sequencer ports. + + midi_devs - MIDI devices # (1-8, default=4) + + Module supports up to 8 cards. + + Module snd-ymfpci + ----------------- + + Module for Yamaha PCI chips (YMF72x, YMF74x & YMF75x). + + mpu_port - 0x300,0x330,0x332,0x334, -1 (disable) by default + fm_port - 0x388,0x398,0x3a0,0x3a8, -1 (disable) by default + rear_switch - enable shared rear/line-in switch (bool) + + Module supports autoprobe and multiple chips (max 8). + + The power-management is supported. + + +modprobe/kmod support +===================== + +The modprobe program must know which modules are used for the +device major numbers. +Native ALSA devices have got default number 116. Thus a line like +'alias char-major-116 snd' must be added to /etc/modules.conf. If you have +compiled the ALSA driver with the OSS/Free emulation code, then you +will need to add lines as explained below: + +The ALSA driver uses soundcore multiplexer for 2.2+ kernels and OSS compatible +devices. You should add line like 'alias char-major-14 soundcore'. + +Example with OSS/Free emulation turned on: + +----- /etc/modules.conf + +# ALSA portion +alias char-major-116 snd +# OSS/Free portion +alias char-major-14 soundcore + +----- /etc/modules.conf + +After the main multiplexer is loaded, its code requests top-level soundcard +module. String 'snd-card-%i' is requested for native devices where %i is +soundcard number from zero to seven. String 'sound-slot-%i' is requested +for native devices where %i is slot number (for ALSA owner this means soundcard +number). + +----- /etc/modules.conf + +# ALSA portion +alias snd-card-0 snd-interwave +alias snd-card-1 snd-ens1371 +# OSS/Free portion +alias sound-slot-0 snd-card-0 +alias sound-slot-1 snd-card-1 + +----- /etc/modules.conf + +We are finished at this point with the configuration for ALSA native devices, +but you may also need autoloading for ALSA's add-on OSS/Free emulation +modules. At this time only one module does not depend on any others, thus +must be loaded separately - snd-pcm-oss. String 'sound-service-%i-%i' +is requested for OSS/Free service where first %i means slot number +(e.g. card number) and second %i means service number. + +----- /etc/modules.conf + +# OSS/Free portion - card #1 +alias sound-service-0-0 snd-mixer-oss +alias sound-service-0-1 snd-seq-oss +alias sound-service-0-3 snd-pcm-oss +alias sound-service-0-8 snd-seq-oss +alias sound-service-0-12 snd-pcm-oss +# OSS/Free portion - card #2 +alias sound-service-1-0 snd-mixer-oss +alias sound-service-1-3 snd-pcm-oss +alias sound-service-1-12 snd-pcm-oss + +----- /etc/modules.conf + +A complete example for Gravis UltraSound PnP soundcard: + +----- /etc/modules.conf + +# ISA PnP support (don't use IRQs 9,10,11,12,13) +options isapnp isapnp_reserve_irq=9,10,11,12,13 + +# ALSA native device support +alias char-major-116 snd +options snd major=116 cards_limit=1 +alias snd-card-0 snd-interwave +options snd-interwave index=0 id="GusPnP" + +# OSS/Free setup +alias char-major-14 soundcore +alias sound-slot-0 snd-card-0 +alias sound-service-0-0 snd-mixer-oss +alias sound-service-0-1 snd-seq-oss +alias sound-service-0-3 snd-pcm-oss +alias sound-service-0-8 snd-seq-oss +alias sound-service-0-12 snd-pcm-oss + +----- + +A complete example if you want to use more soundcards in one machine +(the configuration below is for Sound Blaster 16 and Gravis UltraSound Classic): + +----- /etc/modules.conf + +# ISA PnP support (don't use IRQs 9,10,11,12,13) +# it's only an example to reserve some IRQs for another hardware +options isapnp isapnp_reserve_irq=9,10,11,12,13 + +# ALSA native device support +alias char-major-116 snd +options snd major=116 cards_limit=2 +alias snd-card-0 snd-gusclassic +alias snd-card-1 snd-sb16 +options snd-gusclassic index=0 id="Gus" \ + port=0x220 irq=5 dma1=6 dma2=7 +options snd-sb16 index=1 id="SB16" + +# OSS/Free setup +alias char-major-14 soundcore +alias sound-slot-0 snd-card-0 +alias sound-service-0-0 snd-mixer-oss +alias sound-service-0-1 snd-seq-oss +alias sound-service-0-3 snd-pcm-oss +alias sound-service-0-8 snd-seq-oss +alias sound-service-0-12 snd-pcm-oss +alias sound-slot-1 snd-card-1 +alias sound-service-1-0 snd-mixer-oss +alias sound-service-1-3 snd-pcm-oss +alias sound-service-1-12 snd-pcm-oss + +----- + +A complete example, two Gravis UltraSound Classic soundcards are installed +in the system: + +----- /etc/modules.conf + +# ALSA native device support +alias char-major-116 snd +options snd major=116 cards_limit=2 +alias snd-card-0 snd-gusclassic +alias snd-card-1 snd-gusclassic +options snd-gusclassic index=0,1 id="Gus1","Gus2" \ + port=0x220,0x240 irq=5,7 dma1=1,5 dma2=3,6 + +# OSS/Free setup +alias char-major-14 soundcore +alias sound-slot-0 snd-card-0 +alias sound-service-0-0 snd-mixer-oss +alias sound-service-0-1 snd-seq-oss +alias sound-service-0-3 snd-pcm-oss +alias sound-service-0-8 snd-seq-oss +alias sound-service-0-12 snd-pcm-oss +alias sound-slot-1 snd-card-1 +alias sound-service-1-0 snd-mixer-oss +alias sound-service-1-3 snd-pcm-oss +alias sound-service-1-12 snd-pcm-oss + +----- + +If you want to autoclean your modules, you should put below line to your +/etc/crontab: + +*/10 * * * * root /sbin/modprobe -rs snd-card-0 snd-card-1; /sbin/rmmod -as + +You may also want to extend the soundcard list to follow your requirements. + + +ALSA PCM devices to OSS devices mapping +======================================= + +/dev/snd/pcmC0D0 -> /dev/audio0 (/dev/audio) -> minor 4 +/dev/snd/pcmC0D0 -> /dev/dsp0 (/dev/dsp) -> minor 3 +/dev/snd/pcmC0D1 -> /dev/adsp0 (/dev/adsp) -> minor 12 +/dev/snd/pcmC1D0 -> /dev/audio1 -> minor 4+16 = 20 +/dev/snd/pcmC1D0 -> /dev/dsp1 -> minor 3+16 = 19 +/dev/snd/pcmC1D1 -> /dev/adsp1 -> minor 12+16 = 28 +/dev/snd/pcmC2D0 -> /dev/audio2 -> minor 4+32 = 36 +/dev/snd/pcmC2D0 -> /dev/dsp2 -> minor 3+32 = 39 +/dev/snd/pcmC2D1 -> /dev/adsp2 -> minor 12+32 = 44 + +The first number from /dev/snd/pcmC{X}D{Y} expression means soundcard number +and second means device number. +Please note that the device mapping above may be varied via the module +options of snd-pcm-oss module. + + +DEVFS support +============= + +The ALSA driver fully supports the devfs extension. +You should add lines below to your devfsd.conf file: + +LOOKUP snd MODLOAD ACTION snd +REGISTER ^sound/.* PERMISSIONS root.audio 660 +REGISTER ^snd/.* PERMISSIONS root.audio 660 + +Warning: These lines assume that you have the audio group in your system. + Otherwise replace audio word with another group name (root for + example). + + +Proc interfaces (/proc/asound) +============================== + +/proc/asound/card#/pcm#[cp]/oss +------------------------------- + String "erase" - erase all additional informations about OSS applications + String " []" + + - name of application with (higher priority) or without path + - number of fragments or zero if auto + - size of fragment in bytes or zero if auto + - optional parameters + - disable the application tries to open a pcm device for + this channel but does not want to use it. + (Cause a bug or mmap needs) + It's good for Quake etc... + - direct don't use plugins + - block force block mode (rvplayer) + - non-block force non-block mode + + Example: echo "x11amp 128 16384" > /proc/asound/card0/pcm0p/oss + echo "squake 0 0 disable" > /proc/asound/card0/pcm0c/oss + echo "rvplayer 0 0 block" > /proc/asound/card0/pcm0p/oss + + +Links +===== + + ALSA project homepage + http://www.alsa-project.org + diff -Nru a/Documentation/sound/alsa/ControlNames.txt b/Documentation/sound/alsa/ControlNames.txt --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/Documentation/sound/alsa/ControlNames.txt Mon Dec 23 21:22:04 2002 @@ -0,0 +1,82 @@ +This document describes standard names of mixer controls. + +Syntax: SOURCE [DIRECTION] FUNCTION + +DIRECTION: + (both directions) + Playback + Capture + Bypass Playback + Bypass Capture + +FUNCTION: + Switch (on/off switch) + Volume + Route (route control, hardware specific) + +SOURCE: + Master + Master Mono + Hardware Master + Headphone + PC Speaker + Phone + Phone Input + Phone Output + Synth + FM + Mic + Line + CD + Video + Zoom Video + Aux + PCM + PCM Front + PCM Rear + PCM Pan + Loopback + Analog Loopback (D/A -> A/D loopback) + Digital Loopback (playback -> capture loopback - without analog path) + Mono + Mono Output + Multi + ADC + Wave + Music + I2S + IEC958 + +Exceptions: + [Digital] Capture Source + [Digital] Capture Switch (aka input gain switch) + [Digital] Capture Volume (aka input gain volume) + [Digital] Playback Switch (aka output gain switch) + [Digital] Playback Volume (aka output gain volume) + Tone Control - Switch + Tone Control - Bass + Tone Control - Treble + 3D Control - Switch + 3D Control - Center + 3D Control - Depth + 3D Control - Wide + 3D Control - Space + 3D Control - Level + Mic Boost [(?dB)] + +PCM interface: + + Sample Clock Source { "Word", "Internal", "AutoSync" } + Clock Sync Status { "Lock", "Sync", "No Lock" } + External Rate /* external capture rate */ + Capture Rate /* capture rate taken from external source */ + +IEC958 (S/PDIF) interface: + + IEC958 [...] [Playback|Capture] Switch /* turn on/off the IEC958 interface */ + IEC958 [...] [Playback|Capture] Volume /* digital volume control */ + IEC958 [...] [Playback|Capture] Default /* default or global value - read/write */ + IEC958 [...] [Playback|Capture] Mask /* consumer and professional mask */ + IEC958 [...] [Playback|Capture] Con Mask /* consumer mask */ + IEC958 [...] [Playback|Capture] Pro Mask /* professional mask */ + IEC958 [...] [Playback|Capture] PCM Stream /* the settings assigned to a PCM stream */ diff -Nru a/MAINTAINERS b/MAINTAINERS --- a/MAINTAINERS Mon Dec 23 21:21:56 2002 +++ b/MAINTAINERS Mon Dec 23 21:21:56 2002 @@ -1521,6 +1521,12 @@ L: linux-scsi@vger.kernel.org S: Maintained +SCTP PROTOCOL +P: Jon Grimm +M: jgrimm2@us.ibm.com +L: lksctp-developers@lists.sourceforge.net +S: Supported + SCx200 CPU SUPPORT P: Christer Weinigel M: christer@weinigel.se diff -Nru a/Makefile b/Makefile --- a/Makefile Mon Dec 23 21:21:51 2002 +++ b/Makefile Mon Dec 23 21:21:51 2002 @@ -1,6 +1,6 @@ VERSION = 2 PATCHLEVEL = 5 -SUBLEVEL = 52 +SUBLEVEL = 53 EXTRAVERSION = # *DOCUMENTATION* @@ -854,7 +854,7 @@ # FIXME Should go into a make.lib or something # =========================================================================== -a_flags = -Wp,-MD,$(depfile) $(AFLAGS) $(NOSTDINC_FLAGS) \ +a_flags = -Wp,-MD,$(depfile) $(AFLAGS) $(AFLAGS_KERNEL) $(NOSTDINC_FLAGS) \ $(modkern_aflags) $(EXTRA_AFLAGS) $(AFLAGS_$(*F).o) quiet_cmd_as_s_S = CPP $@ diff -Nru a/arch/alpha/kernel/traps.c b/arch/alpha/kernel/traps.c --- a/arch/alpha/kernel/traps.c Mon Dec 23 21:21:59 2002 +++ b/arch/alpha/kernel/traps.c Mon Dec 23 21:21:59 2002 @@ -638,7 +638,7 @@ got_exception: /* Ok, we caught the exception, but we don't want it. Is there someone to pass it along to? */ - if ((fixup = search_exception_table(pc, regs.gp)) != 0) { + if ((fixup = search_exception_table(pc)) != 0) { unsigned long newpc; newpc = fixup_exception(una_reg, fixup, pc); diff -Nru a/arch/alpha/lib/clear_user.S b/arch/alpha/lib/clear_user.S --- a/arch/alpha/lib/clear_user.S Mon Dec 23 21:21:53 2002 +++ b/arch/alpha/lib/clear_user.S Mon Dec 23 21:21:53 2002 @@ -29,7 +29,7 @@ #define EX(x,y...) \ 99: x,##y; \ .section __ex_table,"a"; \ - .gprel32 99b; \ + .long 99b - .; \ lda $31, $exception-99b($31); \ .previous @@ -80,7 +80,6 @@ ret $31, ($28), 1 # .. e1 : __do_clear_user: - ldgp $29,0($27) # we do exceptions -- we need the gp. and $6, 7, $4 # e0 : find dest misalignment beq $0, $zerolength # .. e1 : addq $0, $4, $1 # e0 : bias counter diff -Nru a/arch/alpha/lib/copy_user.S b/arch/alpha/lib/copy_user.S --- a/arch/alpha/lib/copy_user.S Mon Dec 23 21:21:51 2002 +++ b/arch/alpha/lib/copy_user.S Mon Dec 23 21:21:51 2002 @@ -30,29 +30,28 @@ #define EXI(x,y...) \ 99: x,##y; \ .section __ex_table,"a"; \ - .gprel32 99b; \ + .long 99b - .; \ lda $31, $exitin-99b($31); \ .previous #define EXO(x,y...) \ 99: x,##y; \ .section __ex_table,"a"; \ - .gprel32 99b; \ + .long 99b - .; \ lda $31, $exitout-99b($31); \ .previous .set noat - .align 3 + .align 4 .globl __copy_user .ent __copy_user __copy_user: - ldgp $29,0($27) # we do exceptions -- we need the gp. - .prologue 1 + .prologue 0 and $6,7,$3 beq $0,$35 beq $3,$36 subq $3,8,$3 - .align 5 + .align 4 $37: EXI( ldq_u $1,0($7) ) EXO( ldq_u $2,0($6) ) @@ -73,7 +72,7 @@ beq $1,$43 beq $4,$48 EXI( ldq_u $3,0($7) ) - .align 5 + .align 4 $50: EXI( ldq_u $2,8($7) ) subq $4,8,$4 @@ -88,7 +87,7 @@ bne $4,$50 $48: beq $0,$41 - .align 5 + .align 4 $57: EXI( ldq_u $1,0($7) ) EXO( ldq_u $2,0($6) ) @@ -105,7 +104,7 @@ .align 4 $43: beq $4,$65 - .align 5 + .align 4 $66: EXI( ldq $1,0($7) ) subq $4,8,$4 diff -Nru a/arch/alpha/lib/ev6-clear_user.S b/arch/alpha/lib/ev6-clear_user.S --- a/arch/alpha/lib/ev6-clear_user.S Mon Dec 23 21:21:57 2002 +++ b/arch/alpha/lib/ev6-clear_user.S Mon Dec 23 21:21:57 2002 @@ -47,7 +47,7 @@ #define EX(x,y...) \ 99: x,##y; \ .section __ex_table,"a"; \ - .gprel32 99b; \ + .long 99b - .; \ lda $31, $exception-99b($31); \ .previous @@ -62,9 +62,6 @@ # Pipeline info : Slotting & Comments __do_clear_user: - ldgp $29,0($27) # we do exceptions -- we need the gp. - # Macro instruction becomes ldah/lda - # .. .. E E : and $6, 7, $4 # .. E .. .. : find dest head misalignment beq $0, $zerolength # U .. .. .. : U L U L diff -Nru a/arch/alpha/lib/ev6-copy_user.S b/arch/alpha/lib/ev6-copy_user.S --- a/arch/alpha/lib/ev6-copy_user.S Mon Dec 23 21:21:50 2002 +++ b/arch/alpha/lib/ev6-copy_user.S Mon Dec 23 21:21:50 2002 @@ -41,14 +41,14 @@ #define EXI(x,y...) \ 99: x,##y; \ .section __ex_table,"a"; \ - .gprel32 99b; \ + .long 99b - .; \ lda $31, $exitin-99b($31); \ .previous #define EXO(x,y...) \ 99: x,##y; \ .section __ex_table,"a"; \ - .gprel32 99b; \ + .long 99b - .; \ lda $31, $exitout-99b($31); \ .previous @@ -58,10 +58,7 @@ .ent __copy_user # Pipeline info: Slotting & Comments __copy_user: - ldgp $29,0($27) # we do exceptions -- we need the gp. - # Macro instruction becomes ldah/lda - # .. .. E E - .prologue 1 + .prologue 0 subq $0, 32, $1 # .. E .. .. : Is this going to be a small copy? beq $0, $zerolength # U .. .. .. : U L U L diff -Nru a/arch/alpha/lib/ev6-strncpy_from_user.S b/arch/alpha/lib/ev6-strncpy_from_user.S --- a/arch/alpha/lib/ev6-strncpy_from_user.S Mon Dec 23 21:22:01 2002 +++ b/arch/alpha/lib/ev6-strncpy_from_user.S Mon Dec 23 21:22:01 2002 @@ -34,7 +34,7 @@ #define EX(x,y...) \ 99: x,##y; \ .section __ex_table,"a"; \ - .gprel32 99b; \ + .long 99b - .; \ lda $31, $exception-99b($0); \ .previous @@ -46,11 +46,10 @@ .globl __strncpy_from_user .ent __strncpy_from_user .frame $30, 0, $26 - .prologue 1 + .prologue 0 .align 4 __strncpy_from_user: - ldgp $29, 0($27) # E E : becomes 2 instructions (for exceptions) and a0, 7, t3 # E : find dest misalignment beq a2, $zerolength # U : diff -Nru a/arch/alpha/lib/ev67-strlen_user.S b/arch/alpha/lib/ev67-strlen_user.S --- a/arch/alpha/lib/ev67-strlen_user.S Mon Dec 23 21:21:54 2002 +++ b/arch/alpha/lib/ev67-strlen_user.S Mon Dec 23 21:21:54 2002 @@ -30,7 +30,7 @@ #define EX(x,y...) \ 99: x,##y; \ .section __ex_table,"a"; \ - .gprel32 99b; \ + .long 99b - .; \ lda v0, $exception-99b(zero); \ .previous @@ -56,9 +56,7 @@ .align 4 __strnlen_user: - ldgp $29,0($27) # E E : we do exceptions -- we need the gp. - /* Decomposes into lda/ldah */ - .prologue 1 + .prologue 0 EX( ldq_u t0, 0(a0) ) # L : load first quadword (a0 may be misaligned) lda t1, -1(zero) # E : diff -Nru a/arch/alpha/lib/strlen_user.S b/arch/alpha/lib/strlen_user.S --- a/arch/alpha/lib/strlen_user.S Mon Dec 23 21:21:55 2002 +++ b/arch/alpha/lib/strlen_user.S Mon Dec 23 21:21:55 2002 @@ -19,7 +19,7 @@ #define EX(x,y...) \ 99: x,##y; \ .section __ex_table,"a"; \ - .gprel32 99b; \ + .long 99b - .; \ lda v0, $exception-99b(zero); \ .previous @@ -42,8 +42,7 @@ .align 3 __strnlen_user: - ldgp $29,0($27) # we do exceptions -- we need the gp. - .prologue 1 + .prologue 0 EX( ldq_u t0, 0(a0) ) # load first quadword (a0 may be misaligned) lda t1, -1(zero) diff -Nru a/arch/alpha/lib/strncpy_from_user.S b/arch/alpha/lib/strncpy_from_user.S --- a/arch/alpha/lib/strncpy_from_user.S Mon Dec 23 21:21:51 2002 +++ b/arch/alpha/lib/strncpy_from_user.S Mon Dec 23 21:21:51 2002 @@ -19,7 +19,7 @@ #define EX(x,y...) \ 99: x,##y; \ .section __ex_table,"a"; \ - .gprel32 99b; \ + .long 99b - .; \ lda $31, $exception-99b($0); \ .previous @@ -31,7 +31,7 @@ .globl __strncpy_from_user .ent __strncpy_from_user .frame $30, 0, $26 - .prologue 1 + .prologue 0 .align 3 $aligned: @@ -100,8 +100,6 @@ /*** The Function Entry Point ***/ .align 3 __strncpy_from_user: - ldgp $29, 0($27) # we do exceptions -- we need the gp. - mov a0, v0 # save the string start beq a2, $zerolength diff -Nru a/arch/alpha/mm/extable.c b/arch/alpha/mm/extable.c --- a/arch/alpha/mm/extable.c Mon Dec 23 21:21:51 2002 +++ b/arch/alpha/mm/extable.c Mon Dec 23 21:21:51 2002 @@ -12,21 +12,17 @@ static inline unsigned search_one_table(const struct exception_table_entry *first, const struct exception_table_entry *last, - signed long value) + unsigned long value) { - /* Abort early if the search value is out of range. */ - if (value != (signed int)value) - return 0; - while (first <= last) { const struct exception_table_entry *mid; - long diff; + unsigned long mid_value; mid = (last - first) / 2 + first; - diff = mid->insn - value; - if (diff == 0) + mid_value = (unsigned long)&mid->insn + mid->insn; + if (mid_value == value) return mid->fixup.unit; - else if (diff < 0) + else if (mid_value < value) first = mid+1; else last = mid-1; @@ -34,48 +30,13 @@ return 0; } -register unsigned long gp __asm__("$29"); - -static unsigned -search_exception_table_without_gp(unsigned long addr) -{ - unsigned ret; - -#ifndef CONFIG_MODULES - /* There is only the kernel to search. */ - ret = search_one_table(__start___ex_table, __stop___ex_table - 1, - addr - gp); -#else - extern spinlock_t modlist_lock; - unsigned long flags; - /* The kernel is the last "module" -- no need to treat it special. */ - struct module *mp; - - ret = 0; - spin_lock_irqsave(&modlist_lock, flags); - for (mp = module_list; mp ; mp = mp->next) { - if (!mp->ex_table_start || !(mp->flags&(MOD_RUNNING|MOD_INITIALIZING))) - continue; - ret = search_one_table(mp->ex_table_start, - mp->ex_table_end - 1, addr - mp->gp); - if (ret) - break; - } - spin_unlock_irqrestore(&modlist_lock, flags); -#endif - - return ret; -} - unsigned -search_exception_table(unsigned long addr, unsigned long exc_gp) +search_exception_table(unsigned long addr) { unsigned ret; #ifndef CONFIG_MODULES - ret = search_one_table(__start___ex_table, __stop___ex_table - 1, - addr - exc_gp); - if (ret) return ret; + ret = search_one_table(__start___ex_table, __stop___ex_table-1, addr); #else extern spinlock_t modlist_lock; unsigned long flags; @@ -88,25 +49,12 @@ if (!mp->ex_table_start || !(mp->flags&(MOD_RUNNING|MOD_INITIALIZING))) continue; ret = search_one_table(mp->ex_table_start, - mp->ex_table_end - 1, addr - exc_gp); + mp->ex_table_end - 1, addr); if (ret) break; } spin_unlock_irqrestore(&modlist_lock, flags); - if (ret) return ret; #endif - /* - * The search failed with the exception gp. To be safe, try the - * old method before giving up. - */ - ret = search_exception_table_without_gp(addr); - if (ret) { - printk(KERN_ALERT "%s: [%lx] EX_TABLE search fail with" - "exc frame GP, success with raw GP\n", - current->comm, addr); - return ret; - } - - return 0; + return ret; } diff -Nru a/arch/alpha/mm/fault.c b/arch/alpha/mm/fault.c --- a/arch/alpha/mm/fault.c Mon Dec 23 21:21:52 2002 +++ b/arch/alpha/mm/fault.c Mon Dec 23 21:21:52 2002 @@ -176,7 +176,7 @@ no_context: /* Are we prepared to handle this fault as an exception? */ - if ((fixup = search_exception_table(regs->pc, regs->gp)) != 0) { + if ((fixup = search_exception_table(regs->pc)) != 0) { unsigned long newpc; newpc = fixup_exception(dpf_reg, fixup, regs->pc); regs->pc = newpc; diff -Nru a/arch/alpha/vmlinux.lds.S b/arch/alpha/vmlinux.lds.S --- a/arch/alpha/vmlinux.lds.S Mon Dec 23 21:21:55 2002 +++ b/arch/alpha/vmlinux.lds.S Mon Dec 23 21:21:55 2002 @@ -55,6 +55,12 @@ __setup_end = .; } + __param ALIGN(8): { + __start___param = .; + *(__param) + __stop___param = .; + } + .initcall.init ALIGN(8): { __initcall_start = .; *(.initcall1.init) diff -Nru a/arch/i386/Kconfig b/arch/i386/Kconfig --- a/arch/i386/Kconfig Mon Dec 23 21:21:51 2002 +++ b/arch/i386/Kconfig Mon Dec 23 21:21:51 2002 @@ -1553,7 +1553,6 @@ config KALLSYMS bool "Load all symbols for debugging/kksymoops" - depends on DEBUG_KERNEL help Say Y here to let the kernel print out symbolic crash information and symbolic stack backtraces. This increases the size of the kernel diff -Nru a/arch/i386/Makefile b/arch/i386/Makefile --- a/arch/i386/Makefile Mon Dec 23 21:21:53 2002 +++ b/arch/i386/Makefile Mon Dec 23 21:21:53 2002 @@ -42,29 +42,41 @@ cflags-$(CONFIG_MWINCHIPC6) += $(call check_gcc,-march=winchip-c6,-march=i586) cflags-$(CONFIG_MWINCHIP2) += $(call check_gcc,-march=winchip2,-march=i586) cflags-$(CONFIG_MWINCHIP3D) += -march=i586 -cflags-$(CONFIG_MCYRIXIII) += $(call check_gcc,-march=c3,-march=i486) -malign-functions=0 -malign-jumps=0 -malign-loops=0 +cflags-$(CONFIG_MCYRIXIII) += $(call check_gcc,-march=c3,-march=i486) +# The alignment flags change with gcc 3.2 +cflags-$(CONFIG_MCYRIXIII) += $(call check_gcc,-falign-functions=0 -falign-jumps=0 -falign-loops=0,-malign-functions=0 -malign-jumps=0 -malign-loops=0) CFLAGS += $(cflags-y) -ifdef CONFIG_VISWS -MACHINE := mach-visws -else -MACHINE := mach-generic -endif +#default subarch .c files +mcore-y := mach-default + +#VISWS subarch support +mflags-$(CONFIG_VISWS) := -Iinclude/asm-i386/mach-visws +mcore-$(CONFIG_VISWS) := mach-visws + +#NUMAQ subarch support +mflags-$(CONFIG_X86_NUMAQ) := -Iinclude/asm-i386/mach-numaq +mcore-$(CONFIG_X86_NUMAQ) := mach-default + +#add other subarch support here + +#default subarch .h files +mflags-y += -Iinclude/asm-i386/mach-default HEAD := arch/i386/kernel/head.o arch/i386/kernel/init_task.o libs-y += arch/i386/lib/ core-y += arch/i386/kernel/ \ arch/i386/mm/ \ - arch/i386/$(MACHINE)/ + arch/i386/$(mcore-y)/ drivers-$(CONFIG_MATH_EMULATION) += arch/i386/math-emu/ drivers-$(CONFIG_PCI) += arch/i386/pci/ # FIXME: is drivers- right ? drivers-$(CONFIG_OPROFILE) += arch/i386/oprofile/ -CFLAGS += -Iarch/i386/$(MACHINE) -AFLAGS += -Iarch/i386/$(MACHINE) +CFLAGS += $(mflags-y) +AFLAGS += $(mflags-y) makeboot =$(Q)$(MAKE) -f scripts/Makefile.build obj=arch/i386/boot $(1) diff -Nru a/arch/i386/kernel/Makefile b/arch/i386/kernel/Makefile --- a/arch/i386/kernel/Makefile Mon Dec 23 21:21:51 2002 +++ b/arch/i386/kernel/Makefile Mon Dec 23 21:21:51 2002 @@ -29,6 +29,7 @@ obj-$(CONFIG_PROFILING) += profile.o obj-$(CONFIG_EDD) += edd.o obj-$(CONFIG_MODULES) += module.o +obj-y += sysenter.o EXTRA_AFLAGS := -traditional diff -Nru a/arch/i386/kernel/apic.c b/arch/i386/kernel/apic.c --- a/arch/i386/kernel/apic.c Mon Dec 23 21:22:02 2002 +++ b/arch/i386/kernel/apic.c Mon Dec 23 21:22:02 2002 @@ -31,7 +31,8 @@ #include #include #include -#include "mach_apic.h" + +#include void __init apic_intr_init(void) { @@ -310,11 +311,9 @@ __error_in_apic_c(); /* - * Double-check wether this APIC is really registered. - * This is meaningless in clustered apic mode, so we skip it. + * Double-check whether this APIC is really registered. */ - if (!clustered_apic_mode && - !test_bit(GET_APIC_ID(apic_read(APIC_ID)), &phys_cpu_present_map)) + if (!apic_id_registered()) BUG(); /* @@ -322,21 +321,7 @@ * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel * document number 292116). So here it goes... */ - - if (!clustered_apic_mode) { - /* - * In clustered apic mode, the firmware does this for us - * Put the APIC into flat delivery mode. - * Must be "all ones" explicitly for 82489DX. - */ - apic_write_around(APIC_DFR, APIC_DFR_VALUE); - - /* - * Set up the logical destination ID. - */ - value = apic_read(APIC_LDR); - apic_write_around(APIC_LDR, calculate_ldr(value)); - } + init_apic_ldr(); /* * Set Task Priority to 'accept all'. We never change this diff -Nru a/arch/i386/kernel/bootflag.c b/arch/i386/kernel/bootflag.c --- a/arch/i386/kernel/bootflag.c Mon Dec 23 21:21:59 2002 +++ b/arch/i386/kernel/bootflag.c Mon Dec 23 21:21:59 2002 @@ -48,7 +48,7 @@ unsigned int i; struct sbf_boot sb; - memcpy_fromio(&sb, tptr, sizeof(sb)); + memcpy_fromio(&sb, (void *)tptr, sizeof(sb)); if(sb.sbf_len != 40 && sb.sbf_len != 39) // 39 on IBM ThinkPad A21m, BIOS version 1.02b (KXET24WW; 2000-12-19). diff -Nru a/arch/i386/kernel/cpu/common.c b/arch/i386/kernel/cpu/common.c --- a/arch/i386/kernel/cpu/common.c Mon Dec 23 21:21:50 2002 +++ b/arch/i386/kernel/cpu/common.c Mon Dec 23 21:21:50 2002 @@ -12,11 +12,14 @@ static int cachesize_override __initdata = -1; static int disable_x86_fxsr __initdata = 0; +static int disable_x86_serial_nr __initdata = 1; struct cpu_dev * cpu_devs[X86_VENDOR_NUM] = {}; extern void mcheck_init(struct cpuinfo_x86 *c); +extern int disable_pse; + static void default_init(struct cpuinfo_x86 * c) { /* Not much we can do here... */ @@ -249,6 +252,31 @@ } } +static void __init squash_the_stupid_serial_number(struct cpuinfo_x86 *c) +{ + if (cpu_has(c, X86_FEATURE_PN) && disable_x86_serial_nr ) { + /* Disable processor serial number */ + unsigned long lo,hi; + rdmsr(MSR_IA32_BBL_CR_CTL,lo,hi); + lo |= 0x200000; + wrmsr(MSR_IA32_BBL_CR_CTL,lo,hi); + printk(KERN_NOTICE "CPU serial number disabled.\n"); + clear_bit(X86_FEATURE_PN, c->x86_capability); + + /* Disabling the serial number may affect the cpuid level */ + c->cpuid_level = cpuid_eax(0); + } +} + +static int __init x86_serial_nr_setup(char *s) +{ + disable_x86_serial_nr = 0; + return 1; +} +__setup("serialnumber", x86_serial_nr_setup); + + + /* * This does the hard work of actually picking apart the CPU stuff... */ @@ -279,12 +307,6 @@ else generic_identify(c); - printk(KERN_DEBUG "CPU: Before vendor init, caps: %08lx %08lx %08lx, vendor = %d\n", - c->x86_capability[0], - c->x86_capability[1], - c->x86_capability[2], - c->x86_vendor); - /* * Vendor-specific initialization. In this section we * canonicalize the feature flags, meaning if there are @@ -298,11 +320,8 @@ if (this_cpu->c_init) this_cpu->c_init(c); - printk(KERN_DEBUG "CPU: After vendor init, caps: %08lx %08lx %08lx %08lx\n", - c->x86_capability[0], - c->x86_capability[1], - c->x86_capability[2], - c->x86_capability[3]); + /* Disable the PN if appropriate */ + squash_the_stupid_serial_number(c); /* * The vendor-specific functions might have changed features. Now @@ -319,6 +338,9 @@ clear_bit(X86_FEATURE_XMM, c->x86_capability); } + if (disable_pse) + clear_bit(X86_FEATURE_PSE, c->x86_capability); + /* If the model name is still unset, do table lookup. */ if ( !c->x86_model_id[0] ) { char *p; @@ -351,12 +373,6 @@ boot_cpu_data.x86_capability[i] &= c->x86_capability[i]; } - printk(KERN_DEBUG "CPU: Common caps: %08lx %08lx %08lx %08lx\n", - boot_cpu_data.x86_capability[0], - boot_cpu_data.x86_capability[1], - boot_cpu_data.x86_capability[2], - boot_cpu_data.x86_capability[3]); - /* Init Machine Check Exception if available. */ #ifdef CONFIG_X86_MCE mcheck_init(c); @@ -487,7 +503,7 @@ BUG(); enter_lazy_tlb(&init_mm, current, cpu); - t->esp0 = thread->esp0; + load_esp0(t, thread->esp0); set_tss_desc(cpu,t); cpu_gdt_table[cpu][GDT_ENTRY_TSS].b &= 0xfffffdff; load_TR_desc(); diff -Nru a/arch/i386/kernel/cpu/intel.c b/arch/i386/kernel/cpu/intel.c --- a/arch/i386/kernel/cpu/intel.c Mon Dec 23 21:21:52 2002 +++ b/arch/i386/kernel/cpu/intel.c Mon Dec 23 21:21:52 2002 @@ -11,7 +11,6 @@ #include "cpu.h" -static int disable_x86_serial_nr __initdata = 1; static int disable_P4_HT __initdata = 0; extern int trap_init_f00f_bug(void); @@ -69,29 +68,6 @@ return 0; } -static void __init squash_the_stupid_serial_number(struct cpuinfo_x86 *c) -{ - if (cpu_has(c, X86_FEATURE_PN) && disable_x86_serial_nr ) { - /* Disable processor serial number */ - unsigned long lo,hi; - rdmsr(MSR_IA32_BBL_CR_CTL,lo,hi); - lo |= 0x200000; - wrmsr(MSR_IA32_BBL_CR_CTL,lo,hi); - printk(KERN_NOTICE "CPU serial number disabled.\n"); - clear_bit(X86_FEATURE_PN, c->x86_capability); - - /* Disabling the serial number may affect the cpuid level */ - c->cpuid_level = cpuid_eax(0); - } -} - -static int __init x86_serial_nr_setup(char *s) -{ - disable_x86_serial_nr = 0; - return 1; -} -__setup("serialnumber", x86_serial_nr_setup); - static int __init P4_disable_ht(char *s) { disable_P4_HT = 1; @@ -351,9 +327,6 @@ if (disable_P4_HT) clear_bit(X86_FEATURE_HT, c->x86_capability); #endif - - /* Disable the PN if appropriate */ - squash_the_stupid_serial_number(c); /* Work around errata */ Intel_errata_workarounds(c); diff -Nru a/arch/i386/kernel/cpu/mtrr/amd.c b/arch/i386/kernel/cpu/mtrr/amd.c --- a/arch/i386/kernel/cpu/mtrr/amd.c Mon Dec 23 21:21:55 2002 +++ b/arch/i386/kernel/cpu/mtrr/amd.c Mon Dec 23 21:21:55 2002 @@ -7,7 +7,7 @@ static void amd_get_mtrr(unsigned int reg, unsigned long *base, - unsigned long *size, mtrr_type * type) + unsigned int *size, mtrr_type * type) { unsigned long low, high; diff -Nru a/arch/i386/kernel/cpu/mtrr/centaur.c b/arch/i386/kernel/cpu/mtrr/centaur.c --- a/arch/i386/kernel/cpu/mtrr/centaur.c Mon Dec 23 21:21:52 2002 +++ b/arch/i386/kernel/cpu/mtrr/centaur.c Mon Dec 23 21:21:52 2002 @@ -26,7 +26,8 @@ { int i, max; mtrr_type ltype; - unsigned long lbase, lsize; + unsigned long lbase; + unsigned int lsize; max = num_var_ranges; for (i = 0; i < max; ++i) { @@ -48,7 +49,7 @@ static void centaur_get_mcr(unsigned int reg, unsigned long *base, - unsigned long *size, mtrr_type * type) + unsigned int *size, mtrr_type * type) { *base = centaur_mcr[reg].high >> PAGE_SHIFT; *size = -(centaur_mcr[reg].low & 0xfffff000) >> PAGE_SHIFT; diff -Nru a/arch/i386/kernel/cpu/mtrr/cyrix.c b/arch/i386/kernel/cpu/mtrr/cyrix.c --- a/arch/i386/kernel/cpu/mtrr/cyrix.c Mon Dec 23 21:21:55 2002 +++ b/arch/i386/kernel/cpu/mtrr/cyrix.c Mon Dec 23 21:21:55 2002 @@ -9,7 +9,7 @@ static void cyrix_get_arr(unsigned int reg, unsigned long *base, - unsigned long *size, mtrr_type * type) + unsigned int *size, mtrr_type * type) { unsigned long flags; unsigned char arr, ccr3, rcr, shift; @@ -86,7 +86,8 @@ { int i; mtrr_type ltype; - unsigned long lbase, lsize; + unsigned long lbase; + unsigned int lsize; /* If we are to set up a region >32M then look at ARR7 immediately */ if (size > 0x2000) { @@ -213,7 +214,7 @@ typedef struct { unsigned long base; - unsigned long size; + unsigned int size; mtrr_type type; } arr_state_t; diff -Nru a/arch/i386/kernel/cpu/mtrr/generic.c b/arch/i386/kernel/cpu/mtrr/generic.c --- a/arch/i386/kernel/cpu/mtrr/generic.c Mon Dec 23 21:21:56 2002 +++ b/arch/i386/kernel/cpu/mtrr/generic.c Mon Dec 23 21:21:56 2002 @@ -1,3 +1,5 @@ +/* This only handles 32bit MTRR on 32bit hosts. This is strictly wrong + because MTRRs can span upto 40 bits (36bits on most modern x86) */ #include #include #include @@ -30,7 +32,7 @@ static void __init get_fixed_ranges(mtrr_type * frs) { - unsigned long *p = (unsigned long *) frs; + unsigned int *p = (unsigned int *) frs; int i; rdmsr(MTRRfix64K_00000_MSR, p[0], p[1]); @@ -46,7 +48,7 @@ { unsigned int i; struct mtrr_var_range *vrs; - unsigned long lo, dummy; + unsigned lo, dummy; if (!mtrr_state.var_ranges) { mtrr_state.var_ranges = kmalloc(num_var_ranges * sizeof (struct mtrr_var_range), @@ -102,7 +104,8 @@ { int i, max; mtrr_type ltype; - unsigned long lbase, lsize; + unsigned long lbase; + unsigned lsize; max = num_var_ranges; for (i = 0; i < max; ++i) { @@ -113,11 +116,10 @@ return -ENOSPC; } - void generic_get_mtrr(unsigned int reg, unsigned long *base, - unsigned long *size, mtrr_type * type) + unsigned int *size, mtrr_type * type) { - unsigned long mask_lo, mask_hi, base_lo, base_hi; + unsigned int mask_lo, mask_hi, base_lo, base_hi; rdmsr(MTRRphysMask_MSR(reg), mask_lo, mask_hi); if ((mask_lo & 0x800) == 0) { @@ -143,10 +145,10 @@ static int __init set_fixed_ranges(mtrr_type * frs) { - unsigned long *p = (unsigned long *) frs; + unsigned int *p = (unsigned int *) frs; int changed = FALSE; int i; - unsigned long lo, hi; + unsigned int lo, hi; rdmsr(MTRRfix64K_00000_MSR, lo, hi); if (p[0] != lo || p[1] != hi) { @@ -228,13 +230,13 @@ } -static u32 cr4 = 0; +static unsigned long cr4 = 0; static u32 deftype_lo, deftype_hi; static spinlock_t set_atomicity_lock = SPIN_LOCK_UNLOCKED; static void prepare_set(void) { - u32 cr0; + unsigned long cr0; /* Note that this is not ideal, since the cache is only flushed/disabled for this CPU while the MTRRs are changed, but changing this requires diff -Nru a/arch/i386/kernel/cpu/mtrr/if.c b/arch/i386/kernel/cpu/mtrr/if.c --- a/arch/i386/kernel/cpu/mtrr/if.c Mon Dec 23 21:21:52 2002 +++ b/arch/i386/kernel/cpu/mtrr/if.c Mon Dec 23 21:21:52 2002 @@ -3,45 +3,39 @@ #include #include #include +#include #include -/* What kind of fucking hack is this? */ -#define MTRR_NEED_STRINGS +#define LINE_SIZE 80 #include #include "mtrr.h" -static char *ascii_buffer; -static unsigned int ascii_buf_bytes; - +/* RED-PEN: this is accessed without any locking */ extern unsigned int *usage_table; -#define LINE_SIZE 80 +static int mtrr_seq_show(struct seq_file *seq, void *offset); + +#define FILE_FCOUNT(f) (((struct seq_file *)((f)->private_data))->private) static int mtrr_file_add(unsigned long base, unsigned long size, unsigned int type, char increment, struct file *file, int page) { int reg, max; - unsigned int *fcount = file->private_data; + unsigned int *fcount = FILE_FCOUNT(file); max = num_var_ranges; if (fcount == NULL) { - if ((fcount = - kmalloc(max * sizeof *fcount, GFP_KERNEL)) == NULL) { - printk("mtrr: could not allocate\n"); + fcount = kmalloc(max * sizeof *fcount, GFP_KERNEL); + if (!fcount) return -ENOMEM; - } memset(fcount, 0, max * sizeof *fcount); - file->private_data = fcount; + FILE_FCOUNT(file) = fcount; } if (!page) { - if ((base & (PAGE_SIZE - 1)) || (size & (PAGE_SIZE - 1))) { - printk - ("mtrr: size and base must be multiples of 4 kiB\n"); - printk("mtrr: size: 0x%lx base: 0x%lx\n", size, base); + if ((base & (PAGE_SIZE - 1)) || (size & (PAGE_SIZE - 1))) return -EINVAL; - } base >>= PAGE_SHIFT; size >>= PAGE_SHIFT; } @@ -59,12 +53,8 @@ unsigned int *fcount = file->private_data; if (!page) { - if ((base & (PAGE_SIZE - 1)) || (size & (PAGE_SIZE - 1))) { - printk - ("mtrr: size and base must be multiples of 4 kiB\n"); - printk("mtrr: size: 0x%lx base: 0x%lx\n", size, base); + if ((base & (PAGE_SIZE - 1)) || (size & (PAGE_SIZE - 1))) return -EINVAL; - } base >>= PAGE_SHIFT; size >>= PAGE_SHIFT; } @@ -79,19 +69,7 @@ return reg; } -static ssize_t -mtrr_read(struct file *file, char *buf, size_t len, loff_t * ppos) -{ - if (*ppos >= ascii_buf_bytes) - return 0; - if (*ppos + len > ascii_buf_bytes) - len = ascii_buf_bytes - *ppos; - if (copy_to_user(buf, ascii_buffer + *ppos, len)) - return -EFAULT; - *ppos += len; - return len; -} - +/* RED-PEN: seq_file can seek now. this is ignored. */ static ssize_t mtrr_write(struct file *file, const char *buf, size_t len, loff_t * ppos) /* Format of control line: @@ -125,31 +103,22 @@ return err; return len; } - if (strncmp(line, "base=", 5)) { - printk("mtrr: no \"base=\" in line: \"%s\"\n", line); + if (strncmp(line, "base=", 5)) return -EINVAL; - } base = simple_strtoull(line + 5, &ptr, 0); for (; isspace(*ptr); ++ptr) ; - if (strncmp(ptr, "size=", 5)) { - printk("mtrr: no \"size=\" in line: \"%s\"\n", line); + if (strncmp(ptr, "size=", 5)) return -EINVAL; - } size = simple_strtoull(ptr + 5, &ptr, 0); - if ((base & 0xfff) || (size & 0xfff)) { - printk("mtrr: size and base must be multiples of 4 kiB\n"); - printk("mtrr: size: 0x%Lx base: 0x%Lx\n", size, base); + if ((base & 0xfff) || (size & 0xfff)) return -EINVAL; - } for (; isspace(*ptr); ++ptr) ; - if (strncmp(ptr, "type=", 5)) { - printk("mtrr: no \"type=\" in line: \"%s\"\n", line); + if (strncmp(ptr, "type=", 5)) return -EINVAL; - } ptr += 5; for (; isspace(*ptr); ++ptr) ; for (i = 0; i < MTRR_NUM_TYPES; ++i) { -// if (strcmp(ptr, mtrr_strings[i])) + if (strcmp(ptr, mtrr_strings[i])) continue; base >>= PAGE_SHIFT; size >>= PAGE_SHIFT; @@ -160,7 +129,6 @@ return err; return len; } - printk("mtrr: illegal type: \"%s\"\n", ptr); return -EINVAL; } @@ -291,26 +259,36 @@ mtrr_close(struct inode *ino, struct file *file) { int i, max; - unsigned int *fcount = file->private_data; + unsigned int *fcount = FILE_FCOUNT(file); - if (fcount == NULL) - return 0; - max = num_var_ranges; - for (i = 0; i < max; ++i) { - while (fcount[i] > 0) { - if (mtrr_del(i, 0, 0) < 0) - printk("mtrr: reg %d not used\n", i); - --fcount[i]; + if (fcount != NULL) { + max = num_var_ranges; + for (i = 0; i < max; ++i) { + while (fcount[i] > 0) { + mtrr_del(i, 0, 0); + --fcount[i]; + } } + kfree(fcount); + FILE_FCOUNT(file) = NULL; } - kfree(fcount); - file->private_data = NULL; - return 0; + return single_release(ino, file); +} + +static int mtrr_open(struct inode *inode, struct file *file) +{ + if (!mtrr_if) + return -EIO; + if (!mtrr_if->get) + return -ENXIO; + return single_open(file, mtrr_seq_show, NULL); } static struct file_operations mtrr_fops = { .owner = THIS_MODULE, - .read = mtrr_read, + .open = mtrr_open, + .read = seq_read, + .llseek = seq_lseek, .write = mtrr_write, .ioctl = mtrr_ioctl, .release = mtrr_close, @@ -329,14 +307,15 @@ return (x <= 6) ? mtrr_strings[x] : "?"; } -void compute_ascii(void) +static int mtrr_seq_show(struct seq_file *seq, void *offset) { char factor; - int i, max; + int i, max, len; mtrr_type type; - unsigned long base, size; + unsigned long base; + unsigned int size; - ascii_buf_bytes = 0; + len = 0; max = num_var_ranges; for (i = 0; i < max; i++) { mtrr_if->get(i, &base, &size, &type); @@ -351,32 +330,19 @@ factor = 'M'; size >>= 20 - PAGE_SHIFT; } - sprintf - (ascii_buffer + ascii_buf_bytes, - "reg%02i: base=0x%05lx000 (%4liMB), size=%4li%cB: %s, count=%d\n", + /* RED-PEN: base can be > 32bit */ + len += seq_printf(seq, + "reg%02i: base=0x%05lx000 (%4liMB), size=%4i%cB: %s, count=%d\n", i, base, base >> (20 - PAGE_SHIFT), size, factor, attrib_to_str(type), usage_table[i]); - ascii_buf_bytes += - strlen(ascii_buffer + ascii_buf_bytes); } } - devfs_set_file_size(devfs_handle, ascii_buf_bytes); -# ifdef CONFIG_PROC_FS - if (proc_root_mtrr) - proc_root_mtrr->size = ascii_buf_bytes; -# endif /* CONFIG_PROC_FS */ + devfs_set_file_size(devfs_handle, len); + return 0; } static int __init mtrr_if_init(void) { - int max = num_var_ranges; - - if ((ascii_buffer = kmalloc(max * LINE_SIZE, GFP_KERNEL)) == NULL) { - printk("mtrr: could not allocate\n"); - return -ENOMEM; - } - ascii_buf_bytes = 0; - compute_ascii(); #ifdef CONFIG_PROC_FS proc_root_mtrr = create_proc_entry("mtrr", S_IWUSR | S_IRUGO, &proc_root); diff -Nru a/arch/i386/kernel/cpu/mtrr/main.c b/arch/i386/kernel/cpu/mtrr/main.c --- a/arch/i386/kernel/cpu/mtrr/main.c Mon Dec 23 21:21:50 2002 +++ b/arch/i386/kernel/cpu/mtrr/main.c Mon Dec 23 21:21:50 2002 @@ -36,7 +36,6 @@ #include #include -#define MTRR_NEED_STRINGS #include #include @@ -54,6 +53,7 @@ u32 size_or_mask, size_and_mask; static struct mtrr_ops * mtrr_ops[X86_VENDOR_NUM] = {}; + struct mtrr_ops * mtrr_if = NULL; __initdata char *mtrr_if_name[] = { @@ -125,14 +125,6 @@ } for (i = 0; i < max; i++) usage_table[i] = 1; -#ifdef USERSPACE_INTERFACE - if ((ascii_buffer = kmalloc(max * LINE_SIZE, GFP_KERNEL)) == NULL) { - printk("mtrr: could not allocate\n"); - return; - } - ascii_buf_bytes = 0; - compute_ascii(); -#endif } struct set_mtrr_data { @@ -163,7 +155,7 @@ } /* The master has cleared me to execute */ - if (data->smp_reg != ~0UL) + if (data->smp_reg != ~0U) mtrr_if->set(data->smp_reg, data->smp_base, data->smp_size, data->smp_type); else @@ -253,7 +245,7 @@ * to replicate across all the APs. * If we're doing that @reg is set to something special... */ - if (reg != ~0UL) + if (reg != ~0U) mtrr_if->set(reg,base,size,type); /* wait for the others */ @@ -306,7 +298,8 @@ { int i; mtrr_type ltype; - unsigned long lbase, lsize; + unsigned long lbase; + unsigned int lsize; int error; if (!mtrr_if) @@ -346,7 +339,7 @@ if ((base < lbase) || (base + size > lbase + lsize)) { printk(KERN_WARNING "mtrr: 0x%lx000,0x%lx000 overlaps existing" - " 0x%lx000,0x%lx000\n", base, size, lbase, + " 0x%lx000,0x%x000\n", base, size, lbase, lsize); goto out; } @@ -361,7 +354,6 @@ } if (increment) ++usage_table[i]; - compute_ascii(); error = i; goto out; } @@ -370,7 +362,6 @@ if (i >= 0) { set_mtrr(i, base, size, type); usage_table[i] = 1; - compute_ascii(); } else printk("mtrr: no more MTRRs available\n"); error = i; @@ -447,7 +438,8 @@ { int i, max; mtrr_type ltype; - unsigned long lbase, lsize; + unsigned long lbase; + unsigned int lsize; int error = -EINVAL; if (!mtrr_if) @@ -491,7 +483,6 @@ } if (--usage_table[reg] < 1) set_mtrr(reg, 0, 0, 0); - compute_ascii(); error = reg; out: up(&main_lock); @@ -547,7 +538,7 @@ get_mtrr_state(); /* bring up the other processors */ - set_mtrr(~0UL,0,0,0); + set_mtrr(~0U,0,0,0); if (use_intel()) { finalize_mtrr_state(); @@ -583,7 +574,7 @@ query the width (in bits) of the physical addressable memory on the Hammer family. */ - if (boot_cpu_data.x86 == 7 + if (boot_cpu_data.x86 >= 7 && (cpuid_eax(0x80000000) >= 0x80000008)) { u32 phys_addr; phys_addr = cpuid_eax(0x80000008) & 0xff; @@ -642,6 +633,17 @@ } return mtrr_if ? -ENXIO : 0; } + +char *mtrr_strings[MTRR_NUM_TYPES] = +{ + "uncachable", /* 0 */ + "write-combining", /* 1 */ + "?", /* 2 */ + "?", /* 3 */ + "write-through", /* 4 */ + "write-protect", /* 5 */ + "write-back", /* 6 */ +}; core_initcall(mtrr_init); diff -Nru a/arch/i386/kernel/cpu/mtrr/mtrr.h b/arch/i386/kernel/cpu/mtrr/mtrr.h --- a/arch/i386/kernel/cpu/mtrr/mtrr.h Mon Dec 23 21:21:52 2002 +++ b/arch/i386/kernel/cpu/mtrr/mtrr.h Mon Dec 23 21:21:52 2002 @@ -43,7 +43,7 @@ void (*set_all)(void); void (*get)(unsigned int reg, unsigned long *base, - unsigned long *size, mtrr_type * type); + unsigned int *size, mtrr_type * type); int (*get_free_region) (unsigned long base, unsigned long size); int (*validate_add_page)(unsigned long base, unsigned long size, @@ -84,9 +84,6 @@ void get_mtrr_state(void); extern void set_mtrr_ops(struct mtrr_ops * ops); - -/* Don't even ask... */ -extern void compute_ascii(void); extern u32 size_or_mask, size_and_mask; extern struct mtrr_ops * mtrr_if; diff -Nru a/arch/i386/kernel/entry.S b/arch/i386/kernel/entry.S --- a/arch/i386/kernel/entry.S Mon Dec 23 21:21:52 2002 +++ b/arch/i386/kernel/entry.S Mon Dec 23 21:21:52 2002 @@ -47,6 +47,7 @@ #include #include #include +#include #include "irq_vectors.h" EBX = 0x00 @@ -94,7 +95,7 @@ movl %edx, %ds; \ movl %edx, %es; -#define RESTORE_ALL \ +#define RESTORE_REGS \ popl %ebx; \ popl %ecx; \ popl %edx; \ @@ -104,14 +105,25 @@ popl %eax; \ 1: popl %ds; \ 2: popl %es; \ - addl $4, %esp; \ -3: iret; \ .section .fixup,"ax"; \ -4: movl $0,(%esp); \ +3: movl $0,(%esp); \ jmp 1b; \ -5: movl $0,(%esp); \ +4: movl $0,(%esp); \ jmp 2b; \ -6: pushl %ss; \ +.previous; \ +.section __ex_table,"a";\ + .align 4; \ + .long 1b,3b; \ + .long 2b,4b; \ +.previous + + +#define RESTORE_ALL \ + RESTORE_REGS \ + addl $4, %esp; \ +1: iret; \ +.section .fixup,"ax"; \ +2: pushl %ss; \ popl %ds; \ pushl %ss; \ popl %es; \ @@ -120,11 +132,11 @@ .previous; \ .section __ex_table,"a";\ .align 4; \ - .long 1b,4b; \ - .long 2b,5b; \ - .long 3b,6b; \ + .long 1b,2b; \ .previous + + ENTRY(lcall7) pushfl # We get a different stack layout with call # gates, which has to be cleaned up later.. @@ -219,6 +231,52 @@ cli jmp need_resched #endif + +/* Points to after the "sysenter" instruction in the vsyscall page */ +#define SYSENTER_RETURN 0xffffe010 + + # sysenter call handler stub + ALIGN +ENTRY(sysenter_entry) + sti + pushl $(__USER_DS) + pushl %ebp + pushfl + pushl $(__USER_CS) + pushl $SYSENTER_RETURN + +/* + * Load the potential sixth argument from user stack. + * Careful about security. + */ + cmpl $__PAGE_OFFSET-3,%ebp + jae syscall_badsys +1: movl (%ebp),%ebp +.section __ex_table,"a" + .align 4 + .long 1b,syscall_badsys +.previous + + pushl %eax + SAVE_ALL + GET_THREAD_INFO(%ebx) + cmpl $(NR_syscalls), %eax + jae syscall_badsys + + testb $_TIF_SYSCALL_TRACE,TI_FLAGS(%ebx) + jnz syscall_trace_entry + call *sys_call_table(,%eax,4) + movl %eax,EAX(%esp) + cli + movl TI_FLAGS(%ebx), %ecx + testw $_TIF_ALLWORK_MASK, %cx + jne syscall_exit_work + RESTORE_REGS + movl 4(%esp),%edx + movl 16(%esp),%ecx + sti + sysexit + # system call handler stub ALIGN diff -Nru a/arch/i386/kernel/head.S b/arch/i386/kernel/head.S --- a/arch/i386/kernel/head.S Mon Dec 23 21:21:51 2002 +++ b/arch/i386/kernel/head.S Mon Dec 23 21:21:51 2002 @@ -23,10 +23,10 @@ #define NEW_CL_POINTER 0x228 /* Relative to real mode data */ /* - * References to members of the boot_cpu_data structure. + * References to members of the new_cpu_data structure. */ -#define CPU_PARAMS boot_cpu_data +#define CPU_PARAMS new_cpu_data #define X86 CPU_PARAMS+0 #define X86_VENDOR CPU_PARAMS+1 #define X86_MODEL CPU_PARAMS+2 @@ -414,8 +414,8 @@ .quad 0x0000000000000000 /* 0x0b reserved */ .quad 0x0000000000000000 /* 0x13 reserved */ .quad 0x0000000000000000 /* 0x1b reserved */ - .quad 0x00cffa000000ffff /* 0x23 user 4GB code at 0x00000000 */ - .quad 0x00cff2000000ffff /* 0x2b user 4GB data at 0x00000000 */ + .quad 0x0000000000000000 /* 0x20 unused */ + .quad 0x0000000000000000 /* 0x28 unused */ .quad 0x0000000000000000 /* 0x33 TLS entry 1 */ .quad 0x0000000000000000 /* 0x3b TLS entry 2 */ .quad 0x0000000000000000 /* 0x43 TLS entry 3 */ @@ -425,22 +425,25 @@ .quad 0x00cf9a000000ffff /* 0x60 kernel 4GB code at 0x00000000 */ .quad 0x00cf92000000ffff /* 0x68 kernel 4GB data at 0x00000000 */ - .quad 0x0000000000000000 /* 0x70 TSS descriptor */ - .quad 0x0000000000000000 /* 0x78 LDT descriptor */ + .quad 0x00cffa000000ffff /* 0x73 user 4GB code at 0x00000000 */ + .quad 0x00cff2000000ffff /* 0x7b user 4GB data at 0x00000000 */ + + .quad 0x0000000000000000 /* 0x80 TSS descriptor */ + .quad 0x0000000000000000 /* 0x88 LDT descriptor */ /* Segments used for calling PnP BIOS */ - .quad 0x00c09a0000000000 /* 0x80 32-bit code */ - .quad 0x00809a0000000000 /* 0x88 16-bit code */ - .quad 0x0080920000000000 /* 0x90 16-bit data */ - .quad 0x0080920000000000 /* 0x98 16-bit data */ + .quad 0x00c09a0000000000 /* 0x90 32-bit code */ + .quad 0x00809a0000000000 /* 0x98 16-bit code */ .quad 0x0080920000000000 /* 0xa0 16-bit data */ + .quad 0x0080920000000000 /* 0xa8 16-bit data */ + .quad 0x0080920000000000 /* 0xb0 16-bit data */ /* * The APM segments have byte granularity and their bases * and limits are set at run time. */ - .quad 0x00409a0000000000 /* 0xa8 APM CS code */ - .quad 0x00009a0000000000 /* 0xb0 APM CS 16 code (16 bit) */ - .quad 0x0040920000000000 /* 0xb8 APM DS data */ + .quad 0x00409a0000000000 /* 0xb8 APM CS code */ + .quad 0x00009a0000000000 /* 0xc0 APM CS 16 code (16 bit) */ + .quad 0x0040920000000000 /* 0xc8 APM DS data */ #if CONFIG_SMP .fill (NR_CPUS-1)*GDT_ENTRIES,8,0 /* other CPU's GDT */ diff -Nru a/arch/i386/kernel/i386_ksyms.c b/arch/i386/kernel/i386_ksyms.c --- a/arch/i386/kernel/i386_ksyms.c Mon Dec 23 21:22:02 2002 +++ b/arch/i386/kernel/i386_ksyms.c Mon Dec 23 21:22:02 2002 @@ -124,8 +124,8 @@ EXPORT_SYMBOL(__copy_to_user); EXPORT_SYMBOL(strnlen_user); -EXPORT_SYMBOL(pci_alloc_consistent); -EXPORT_SYMBOL(pci_free_consistent); +EXPORT_SYMBOL(dma_alloc_coherent); +EXPORT_SYMBOL(dma_free_coherent); #ifdef CONFIG_PCI EXPORT_SYMBOL(pcibios_penalize_isa_irq); diff -Nru a/arch/i386/kernel/io_apic.c b/arch/i386/kernel/io_apic.c --- a/arch/i386/kernel/io_apic.c Mon Dec 23 21:21:53 2002 +++ b/arch/i386/kernel/io_apic.c Mon Dec 23 21:21:53 2002 @@ -35,7 +35,8 @@ #include #include #include -#include "mach_apic.h" + +#include #undef APIC_LOCKUP_DEBUG @@ -261,7 +262,7 @@ irq_balance_t *entry = irq_balance + irq; unsigned long now = jiffies; - if (clustered_apic_mode) + if (no_balance_irq) return; if (unlikely(time_after(now, entry->timestamp + IRQ_BALANCE_INTERVAL))) { @@ -739,7 +740,6 @@ if (irq_trigger(idx)) { entry.trigger = 1; entry.mask = 1; - entry.dest.logical.logical_dest = TARGET_CPUS; } irq = pin_2_irq(idx, apic, pin); @@ -747,7 +747,7 @@ * skip adding the timer int on secondary nodes, which causes * a small but painful rift in the time-space continuum */ - if (clustered_apic_mode && (apic != 0) && (irq == 0)) + if (multi_timer_check(apic, irq)) continue; else add_pin_to_irq(irq, apic, pin); @@ -1135,7 +1135,7 @@ static void __init setup_ioapic_ids_from_mpc (void) { struct IO_APIC_reg_00 reg_00; - unsigned long phys_id_present_map = phys_cpu_present_map; + unsigned long phys_id_present_map; int apic; int i; unsigned char old_id; @@ -1145,9 +1145,8 @@ /* This gets done during IOAPIC enumeration for ACPI. */ return; - if (clustered_apic_mode) - /* We don't have a good way to do this yet - hack */ - phys_id_present_map = (u_long) 0xf; + phys_id_present_map = ioapic_phys_id_map(phys_cpu_present_map); + /* * Set the IOAPIC ID to the value stored in the MPC table. */ diff -Nru a/arch/i386/kernel/mpparse.c b/arch/i386/kernel/mpparse.c --- a/arch/i386/kernel/mpparse.c Mon Dec 23 21:21:52 2002 +++ b/arch/i386/kernel/mpparse.c Mon Dec 23 21:21:52 2002 @@ -30,7 +30,9 @@ #include #include #include -#include "mach_apic.h" + +#include +#include /* Have we found an MP table */ int smp_found_config; @@ -103,28 +105,12 @@ void __init MP_processor_info (struct mpc_config_processor *m) { - int ver, quad, logical_apicid; + int ver, apicid; if (!(m->mpc_cpuflag & CPU_ENABLED)) return; - logical_apicid = m->mpc_apicid; - if (clustered_apic_mode) { - quad = translation_table[mpc_record]->trans_quad; - logical_apicid = (quad << 4) + - (m->mpc_apicid ? m->mpc_apicid << 1 : 1); - printk("Processor #%d %ld:%ld APIC version %d (quad %d, apic %d)\n", - m->mpc_apicid, - (m->mpc_cpufeature & CPU_FAMILY_MASK)>>8, - (m->mpc_cpufeature & CPU_MODEL_MASK)>>4, - m->mpc_apicver, quad, logical_apicid); - } else { - printk("Processor #%d %ld:%ld APIC version %d\n", - m->mpc_apicid, - (m->mpc_cpufeature & CPU_FAMILY_MASK)>>8, - (m->mpc_cpufeature & CPU_MODEL_MASK)>>4, - m->mpc_apicver); - } + apicid = mpc_apic_id(m, translation_table[mpc_record]->trans_quad); if (m->mpc_featureflag&(1<<0)) Dprintk(" Floating point unit present.\n"); @@ -177,7 +163,7 @@ if (m->mpc_cpuflag & CPU_BOOTPROCESSOR) { Dprintk(" Bootup CPU\n"); boot_cpu_physical_apicid = m->mpc_apicid; - boot_cpu_logical_apicid = logical_apicid; + boot_cpu_logical_apicid = apicid; } num_processors++; @@ -190,11 +176,8 @@ } ver = m->mpc_apicver; - if (clustered_apic_mode) { - phys_cpu_present_map |= (logical_apicid&0xf) << (4*quad); - } else { - phys_cpu_present_map |= apicid_to_cpu_present(m->mpc_apicid); - } + phys_cpu_present_map |= apicid_to_cpu_present(apicid); + /* * Validate version */ @@ -209,28 +192,18 @@ static void __init MP_bus_info (struct mpc_config_bus *m) { char str[7]; - int quad; memcpy(str, m->mpc_bustype, 6); str[6] = 0; - - if (clustered_apic_mode) { - quad = translation_table[mpc_record]->trans_quad; - mp_bus_id_to_node[m->mpc_busid] = quad; - mp_bus_id_to_local[m->mpc_busid] = translation_table[mpc_record]->trans_local; - printk("Bus #%d is %s (node %d)\n", m->mpc_busid, str, quad); - } else { - Dprintk("Bus #%d is %s\n", m->mpc_busid, str); - } + + mpc_oem_bus_info(m, str, translation_table[mpc_record]); if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA)-1) == 0) { mp_bus_id_to_type[m->mpc_busid] = MP_BUS_ISA; } else if (strncmp(str, BUSTYPE_EISA, sizeof(BUSTYPE_EISA)-1) == 0) { mp_bus_id_to_type[m->mpc_busid] = MP_BUS_EISA; } else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI)-1) == 0) { - if (clustered_apic_mode){ - quad_local_to_mp_bus_id[quad][translation_table[mpc_record]->trans_local] = m->mpc_busid; - } + mpc_oem_pci_bus(m, translation_table[mpc_record]); mp_bus_id_to_type[m->mpc_busid] = MP_BUS_PCI; mp_bus_id_to_pci_bus[m->mpc_busid] = mp_current_pci_id; mp_current_pci_id++; @@ -318,6 +291,7 @@ int count = sizeof (*oemtable); /* the header size */ unsigned char *oemptr = ((unsigned char *)oemtable)+count; + mpc_record = 0; printk("Found an OEM MPC table at %8p - parsing it ... \n", oemtable); if (memcmp(oemtable->oem_signature,MPC_OEM_SIGNATURE,4)) { @@ -394,7 +368,7 @@ str[12]=0; printk("Product ID: %s ",str); - summit_check(oem, str); + mps_oem_check(mpc, oem, str); printk("APIC at: 0x%lX\n",mpc->mpc_lapic); @@ -405,16 +379,10 @@ if (!acpi_lapic) mp_lapic_addr = mpc->mpc_lapic; - if (clustered_apic_mode && mpc->mpc_oemptr) { - /* We need to process the oem mpc tables to tell us which quad things are in ... */ - mpc_record = 0; - smp_read_mpc_oem((struct mp_config_oemtable *) mpc->mpc_oemptr, mpc->mpc_oemsize); - mpc_record = 0; - } - /* * Now process the configuration blocks. */ + mpc_record = 0; while (count < mpc->mpc_length) { switch(*mpt) { case MP_PROCESSOR: diff -Nru a/arch/i386/kernel/pci-dma.c b/arch/i386/kernel/pci-dma.c --- a/arch/i386/kernel/pci-dma.c Mon Dec 23 21:21:52 2002 +++ b/arch/i386/kernel/pci-dma.c Mon Dec 23 21:21:52 2002 @@ -13,13 +13,13 @@ #include #include -void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size, +void *dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle) { void *ret; int gfp = GFP_ATOMIC; - if (hwdev == NULL || ((u32)hwdev->dma_mask != 0xffffffff)) + if (dev == NULL || ((u32)*dev->dma_mask != 0xffffffff)) gfp |= GFP_DMA; ret = (void *)__get_free_pages(gfp, get_order(size)); @@ -30,7 +30,7 @@ return ret; } -void pci_free_consistent(struct pci_dev *hwdev, size_t size, +void dma_free_coherent(struct device *dev, size_t size, void *vaddr, dma_addr_t dma_handle) { free_pages((unsigned long)vaddr, get_order(size)); diff -Nru a/arch/i386/kernel/process.c b/arch/i386/kernel/process.c --- a/arch/i386/kernel/process.c Mon Dec 23 21:21:50 2002 +++ b/arch/i386/kernel/process.c Mon Dec 23 21:21:50 2002 @@ -44,6 +44,7 @@ #include #include #include +#include #include #ifdef CONFIG_MATH_EMULATION #include @@ -269,6 +270,8 @@ BUG(); } } + + release_x86_irqs(dead_task); } /* @@ -440,7 +443,7 @@ /* * Reload esp0, LDT and the page table pointer: */ - tss->esp0 = next->esp0; + load_esp0(tss, next->esp0); /* * Load the per-thread Thread-Local Storage descriptor. diff -Nru a/arch/i386/kernel/setup.c b/arch/i386/kernel/setup.c --- a/arch/i386/kernel/setup.c Mon Dec 23 21:21:55 2002 +++ b/arch/i386/kernel/setup.c Mon Dec 23 21:21:55 2002 @@ -41,6 +41,8 @@ #include #include "setup_arch_pre.h" +int disable_pse __initdata = 0; + static inline char * __init machine_specific_memory_setup(void); /* @@ -48,6 +50,9 @@ */ char ignore_irq13; /* set if exception 16 works */ +/* cpu data as detected by the assembly code in head.S */ +struct cpuinfo_x86 new_cpu_data __initdata = { 0, 0, 0, 0, -1, 1, 0, 0, -1 }; +/* common cpu data for all cpus */ struct cpuinfo_x86 boot_cpu_data = { 0, 0, 0, 0, -1, 1, 0, 0, -1 }; unsigned long mmu_cr4_features; @@ -523,6 +528,7 @@ if (!memcmp(from+4, "nopentium", 9)) { from += 9+4; clear_bit(X86_FEATURE_PSE, boot_cpu_data.x86_capability); + disable_pse = 1; } else if (!memcmp(from+4, "exactmap", 8)) { from += 8+4; e820.nr_map = 0; @@ -837,6 +843,7 @@ { unsigned long max_low_pfn; + memcpy(&boot_cpu_data, &new_cpu_data, sizeof(new_cpu_data)); pre_setup_arch_hook(); early_cpu_init(); diff -Nru a/arch/i386/kernel/signal.c b/arch/i386/kernel/signal.c --- a/arch/i386/kernel/signal.c Mon Dec 23 21:21:54 2002 +++ b/arch/i386/kernel/signal.c Mon Dec 23 21:21:54 2002 @@ -609,6 +609,11 @@ void do_notify_resume(struct pt_regs *regs, sigset_t *oldset, __u32 thread_info_flags) { + /* Pending single-step? */ + if (thread_info_flags & _TIF_SINGLESTEP) { + regs->eflags |= TF_MASK; + clear_thread_flag(TIF_SINGLESTEP); + } /* deal with pending signal delivery */ if (thread_info_flags & _TIF_SIGPENDING) do_signal(regs,oldset); diff -Nru a/arch/i386/kernel/smp.c b/arch/i386/kernel/smp.c --- a/arch/i386/kernel/smp.c Mon Dec 23 21:21:51 2002 +++ b/arch/i386/kernel/smp.c Mon Dec 23 21:21:51 2002 @@ -24,6 +24,7 @@ #include #include #include +#include /* * Some notes on x86 processor bugs affecting SMP operation: @@ -225,54 +226,6 @@ } } local_irq_restore(flags); -} - -static inline void send_IPI_mask(int mask, int vector) -{ - if (clustered_apic_mode) - send_IPI_mask_sequence(mask, vector); - else - send_IPI_mask_bitmask(mask, vector); -} - -static inline void send_IPI_allbutself(int vector) -{ - /* - * if there are no other CPUs in the system then - * we get an APIC send error if we try to broadcast. - * thus we have to avoid sending IPIs in this case. - */ - if (!(num_online_cpus() > 1)) - return; - - if (clustered_apic_mode) { - // Pointless. Use send_IPI_mask to do this instead - int cpu; - - for (cpu = 0; cpu < NR_CPUS; ++cpu) { - if (cpu_online(cpu) && cpu != smp_processor_id()) - send_IPI_mask(1 << cpu, vector); - } - } else { - __send_IPI_shortcut(APIC_DEST_ALLBUT, vector); - return; - } -} - -static inline void send_IPI_all(int vector) -{ - if (clustered_apic_mode) { - // Pointless. Use send_IPI_mask to do this instead - int cpu; - - for (cpu = 0; cpu < NR_CPUS; ++cpu) { - if (!cpu_online(cpu)) - continue; - send_IPI_mask(1 << cpu, vector); - } - } else { - __send_IPI_shortcut(APIC_DEST_ALLINC, vector); - } } /* diff -Nru a/arch/i386/kernel/smpboot.c b/arch/i386/kernel/smpboot.c --- a/arch/i386/kernel/smpboot.c Mon Dec 23 21:21:55 2002 +++ b/arch/i386/kernel/smpboot.c Mon Dec 23 21:21:55 2002 @@ -51,7 +51,8 @@ #include #include #include "smpboot_hooks.h" -#include "mach_apic.h" + +#include /* Set if we find a B stepping CPU */ static int __initdata smp_b_stepping; @@ -848,11 +849,7 @@ /* * Starting actual IPI sequence... */ - - if (clustered_apic_mode) - boot_error = wakeup_secondary_via_NMI(apicid); - else - boot_error = wakeup_secondary_via_INIT(apicid, start_eip); + wakeup_secondary_cpu(apicid, start_eip); if (!boot_error) { /* @@ -1060,15 +1057,7 @@ if (GET_APIC_ID(apic_read(APIC_ID)) != boot_cpu_physical_apicid) BUG(); - if (clustered_apic_mode && (numnodes > 1)) { - printk("Remapping cross-quad port I/O for %d quads\n", - numnodes); - xquad_portio = ioremap (XQUAD_PORTIO_BASE, - numnodes * XQUAD_PORTIO_QUAD); - printk("xquad_portio vaddr 0x%08lx, len %08lx\n", - (u_long) xquad_portio, - (u_long) numnodes * XQUAD_PORTIO_QUAD); - } + setup_portio_remap(); /* * Scan the CPU present map and fire up the other CPUs via do_boot_cpu diff -Nru a/arch/i386/kernel/sys_i386.c b/arch/i386/kernel/sys_i386.c --- a/arch/i386/kernel/sys_i386.c Mon Dec 23 21:22:00 2002 +++ b/arch/i386/kernel/sys_i386.c Mon Dec 23 21:22:00 2002 @@ -298,17 +298,17 @@ { struct mm_struct *mm = current->mm; struct vm_area_struct *vma; - struct hugetlb_key *key; int retval; - vma = find_vma(current->mm, addr); - if (!vma || !(vma->vm_flags & VM_HUGETLB) || vma->vm_start != addr) - return -EINVAL; down_write(&mm->mmap_sem); - key = (struct hugetlb_key *)vma->vm_private_data; + vma = find_vma(current->mm, addr); + if (!vma || !(vma->vm_flags & VM_HUGETLB) || vma->vm_start != addr) { + retval = -EINVAL; + goto out; + } retval = do_munmap(vma->vm_mm, addr, vma->vm_end - addr); +out: up_write(&mm->mmap_sem); - hugetlb_release_key(key); return retval; } #else diff -Nru a/arch/i386/kernel/sysenter.c b/arch/i386/kernel/sysenter.c --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/arch/i386/kernel/sysenter.c Mon Dec 23 21:22:05 2002 @@ -0,0 +1,89 @@ +/* + * linux/arch/i386/kernel/sysenter.c + * + * (C) Copyright 2002 Linus Torvalds + * + * This file contains the needed initializations to support sysenter. + */ + +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +extern asmlinkage void sysenter_entry(void); + +/* + * Create a per-cpu fake "SEP thread" stack, so that we can + * enter the kernel without having to worry about things like + * "current" etc not working (debug traps and NMI's can happen + * before we can switch over to the "real" thread). + * + * Return the resulting fake stack pointer. + */ +struct fake_sep_struct { + struct thread_info thread; + struct task_struct task; + unsigned char trampoline[32] __attribute__((aligned(1024))); + unsigned char stack[0]; +} __attribute__((aligned(8192))); + +static void __init enable_sep_cpu(void *info) +{ + int cpu = get_cpu(); + struct tss_struct *tss = init_tss + cpu; + + wrmsr(MSR_IA32_SYSENTER_CS, __KERNEL_CS, 0); + wrmsr(MSR_IA32_SYSENTER_ESP, tss->esp0, 0); + wrmsr(MSR_IA32_SYSENTER_EIP, (unsigned long) sysenter_entry, 0); + + printk("Enabling SEP on CPU %d\n", cpu); + put_cpu(); +} + +static int __init sysenter_setup(void) +{ + static const char int80[] = { + 0xcd, 0x80, /* int $0x80 */ + 0xc3 /* ret */ + }; + static const char sysent[] = { + 0x51, /* push %ecx */ + 0x52, /* push %edx */ + 0x55, /* push %ebp */ + /* 3: backjump target */ + 0x89, 0xe5, /* movl %esp,%ebp */ + 0x0f, 0x34, /* sysenter */ + + /* 7: align return point with nop's to make disassembly easier */ + 0x90, 0x90, 0x90, 0x90, + 0x90, 0x90, 0x90, + + /* 14: System call restart point is here! (SYSENTER_RETURN - 2) */ + 0xeb, 0xf3, /* jmp to "movl %esp,%ebp" */ + /* 16: System call normal return point is here! (SYSENTER_RETURN in entry.S) */ + 0x5d, /* pop %ebp */ + 0x5a, /* pop %edx */ + 0x59, /* pop %ecx */ + 0xc3 /* ret */ + }; + unsigned long page = get_zeroed_page(GFP_ATOMIC); + + __set_fixmap(FIX_VSYSCALL, __pa(page), PAGE_READONLY); + memcpy((void *) page, int80, sizeof(int80)); + if (!boot_cpu_has(X86_FEATURE_SEP)) + return 0; + + memcpy((void *) page, sysent, sizeof(sysent)); + enable_sep_cpu(NULL); + smp_call_function(enable_sep_cpu, NULL, 1, 1); + return 0; +} + +__initcall(sysenter_setup); diff -Nru a/arch/i386/kernel/traps.c b/arch/i386/kernel/traps.c --- a/arch/i386/kernel/traps.c Mon Dec 23 21:21:51 2002 +++ b/arch/i386/kernel/traps.c Mon Dec 23 21:21:51 2002 @@ -605,7 +605,7 @@ * interface. */ if ((regs->xcs & 3) == 0) - goto clear_TF; + goto clear_TF_reenable; if ((tsk->ptrace & (PT_DTRACE|PT_PTRACED)) == PT_DTRACE) goto clear_TF; } @@ -637,6 +637,8 @@ handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code, 1); return; +clear_TF_reenable: + set_tsk_thread_flag(tsk, TIF_SINGLESTEP); clear_TF: regs->eflags &= ~TF_MASK; return; diff -Nru a/arch/i386/kernel/vm86.c b/arch/i386/kernel/vm86.c --- a/arch/i386/kernel/vm86.c Mon Dec 23 21:21:51 2002 +++ b/arch/i386/kernel/vm86.c Mon Dec 23 21:21:51 2002 @@ -113,7 +113,8 @@ do_exit(SIGSEGV); } tss = init_tss + smp_processor_id(); - tss->esp0 = current->thread.esp0 = current->thread.saved_esp0; + current->thread.esp0 = current->thread.saved_esp0; + load_esp0(tss, current->thread.esp0); current->thread.saved_esp0 = 0; ret = KVM86->regs32; return ret; @@ -284,6 +285,7 @@ tsk->thread.saved_esp0 = tsk->thread.esp0; tss = init_tss + smp_processor_id(); tss->esp0 = tsk->thread.esp0 = (unsigned long) &info->VM86_TSS_ESP0; + disable_sysenter(); tsk->thread.screen_bitmap = info->screen_bitmap; if (info->flags & VM86_SCREEN_BITMAP) @@ -708,23 +710,6 @@ spin_unlock_irqrestore(&irqbits_lock, flags); } -static inline int task_valid(struct task_struct *tsk) -{ - struct task_struct *g, *p; - int ret = 0; - - read_lock(&tasklist_lock); - do_each_thread(g, p) - if ((p == tsk) && (p->sig)) { - ret = 1; - goto out; - } - while_each_thread(g, p); -out: - read_unlock(&tasklist_lock); - return ret; -} - void release_x86_irqs(struct task_struct *task) { int i; @@ -733,17 +718,6 @@ free_vm86_irq(i); } -static inline void handle_irq_zombies(void) -{ - int i; - for (i=3; i<16; i++) { - if (vm86_irqs[i].tsk) { - if (task_valid(vm86_irqs[i].tsk)) continue; - free_vm86_irq(i); - } - } -} - static inline int get_and_reset_irq(int irqnumber) { int bit; @@ -772,7 +746,6 @@ case VM86_REQUEST_IRQ: { int sig = irqnumber >> 8; int irq = irqnumber & 255; - handle_irq_zombies(); if (!capable(CAP_SYS_ADMIN)) return -EPERM; if (!((1 << sig) & ALLOWED_SIGS)) return -EPERM; if ( (irq<3) || (irq>15) ) return -EPERM; @@ -784,7 +757,6 @@ return irq; } case VM86_FREE_IRQ: { - handle_irq_zombies(); if ( (irqnumber<3) || (irqnumber>15) ) return -EPERM; if (!vm86_irqs[irqnumber].tsk) return 0; if (vm86_irqs[irqnumber].tsk != current) return -EPERM; diff -Nru a/arch/i386/mach-default/Makefile b/arch/i386/mach-default/Makefile --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/arch/i386/mach-default/Makefile Mon Dec 23 21:21:52 2002 @@ -0,0 +1,7 @@ +# +# Makefile for the linux kernel. +# + +EXTRA_CFLAGS += -I../kernel + +obj-y := setup.o topology.o diff -Nru a/arch/i386/mach-default/setup.c b/arch/i386/mach-default/setup.c --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/arch/i386/mach-default/setup.c Mon Dec 23 21:21:53 2002 @@ -0,0 +1,104 @@ +/* + * Machine specific setup for generic + */ + +#include +#include +#include +#include +#include +#include + +/** + * pre_intr_init_hook - initialisation prior to setting up interrupt vectors + * + * Description: + * Perform any necessary interrupt initialisation prior to setting up + * the "ordinary" interrupt call gates. For legacy reasons, the ISA + * interrupts should be initialised here if the machine emulates a PC + * in any way. + **/ +void __init pre_intr_init_hook(void) +{ + init_ISA_irqs(); +} + +/* + * IRQ2 is cascade interrupt to second interrupt controller + */ +static struct irqaction irq2 = { no_action, 0, 0, "cascade", NULL, NULL}; + +/** + * intr_init_hook - post gate setup interrupt initialisation + * + * Description: + * Fill in any interrupts that may have been left out by the general + * init_IRQ() routine. interrupts having to do with the machine rather + * than the devices on the I/O bus (like APIC interrupts in intel MP + * systems) are started here. + **/ +void __init intr_init_hook(void) +{ +#ifdef CONFIG_X86_LOCAL_APIC + apic_intr_init(); +#endif + + setup_irq(2, &irq2); +} + +/** + * pre_setup_arch_hook - hook called prior to any setup_arch() execution + * + * Description: + * generally used to activate any machine specific identification + * routines that may be needed before setup_arch() runs. On VISWS + * this is used to get the board revision and type. + **/ +void __init pre_setup_arch_hook(void) +{ +} + +/** + * trap_init_hook - initialise system specific traps + * + * Description: + * Called as the final act of trap_init(). Used in VISWS to initialise + * the various board specific APIC traps. + **/ +void __init trap_init_hook(void) +{ +} + +static struct irqaction irq0 = { timer_interrupt, SA_INTERRUPT, 0, "timer", NULL, NULL}; + +/** + * time_init_hook - do any specific initialisations for the system timer. + * + * Description: + * Must plug the system timer interrupt source at HZ into the IRQ listed + * in irq_vectors.h:TIMER_IRQ + **/ +void __init time_init_hook(void) +{ + setup_irq(0, &irq0); +} + +#ifdef CONFIG_MCA +/** + * mca_nmi_hook - hook into MCA specific NMI chain + * + * Description: + * The MCA (Microchannel Arcitecture) has an NMI chain for NMI sources + * along the MCA bus. Use this to hook into that chain if you will need + * it. + **/ +void __init mca_nmi_hook(void) +{ + /* If I recall correctly, there's a whole bunch of other things that + * we can do to check for NMI problems, but that's all I know about + * at the moment. + */ + + printk("NMI generated from unknown source!\n"); +} +#endif diff -Nru a/arch/i386/mach-default/topology.c b/arch/i386/mach-default/topology.c --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/arch/i386/mach-default/topology.c Mon Dec 23 21:21:59 2002 @@ -0,0 +1,68 @@ +/* + * arch/i386/mach-generic/topology.c - Populate driverfs with topology information + * + * Written by: Matthew Dobson, IBM Corporation + * Original Code: Paul Dorwin, IBM Corporation, Patrick Mochel, OSDL + * + * Copyright (C) 2002, IBM Corp. + * + * All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or + * NON INFRINGEMENT. See the GNU General Public License for more + * details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + * + * Send feedback to + */ +#include +#include +#include + +struct i386_cpu cpu_devices[NR_CPUS]; + +#ifdef CONFIG_NUMA +#include +#include +#include + +struct i386_node node_devices[MAX_NUMNODES]; +struct i386_memblk memblk_devices[MAX_NR_MEMBLKS]; + +static int __init topology_init(void) +{ + int i; + + for (i = 0; i < num_online_nodes(); i++) + arch_register_node(i); + for (i = 0; i < NR_CPUS; i++) + if (cpu_possible(i)) arch_register_cpu(i); + for (i = 0; i < num_online_memblks(); i++) + arch_register_memblk(i); + return 0; +} + +#else /* !CONFIG_NUMA */ + +static int __init topology_init(void) +{ + int i; + + for (i = 0; i < NR_CPUS; i++) + if (cpu_possible(i)) arch_register_cpu(i); + return 0; +} + +#endif /* CONFIG_NUMA */ + +subsys_initcall(topology_init); diff -Nru a/arch/i386/mach-generic/Makefile b/arch/i386/mach-generic/Makefile --- a/arch/i386/mach-generic/Makefile Mon Dec 23 21:21:52 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,7 +0,0 @@ -# -# Makefile for the linux kernel. -# - -EXTRA_CFLAGS += -I../kernel - -obj-y := setup.o topology.o diff -Nru a/arch/i386/mach-generic/do_timer.h b/arch/i386/mach-generic/do_timer.h --- a/arch/i386/mach-generic/do_timer.h Mon Dec 23 21:22:00 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,82 +0,0 @@ -/* defines for inline arch setup functions */ - -#include - -/** - * do_timer_interrupt_hook - hook into timer tick - * @regs: standard registers from interrupt - * - * Description: - * This hook is called immediately after the timer interrupt is ack'd. - * It's primary purpose is to allow architectures that don't possess - * individual per CPU clocks (like the CPU APICs supply) to broadcast the - * timer interrupt as a means of triggering reschedules etc. - **/ - -static inline void do_timer_interrupt_hook(struct pt_regs *regs) -{ - do_timer(regs); -/* - * In the SMP case we use the local APIC timer interrupt to do the - * profiling, except when we simulate SMP mode on a uniprocessor - * system, in that case we have to call the local interrupt handler. - */ -#ifndef CONFIG_X86_LOCAL_APIC - x86_do_profile(regs); -#else - if (!using_apic_timer) - smp_local_timer_interrupt(regs); -#endif -} - - -/* you can safely undefine this if you don't have the Neptune chipset */ - -#define BUGGY_NEPTUN_TIMER - -/** - * do_timer_overflow - process a detected timer overflow condition - * @count: hardware timer interrupt count on overflow - * - * Description: - * This call is invoked when the jiffies count has not incremented but - * the hardware timer interrupt has. It means that a timer tick interrupt - * came along while the previous one was pending, thus a tick was missed - **/ -static inline int do_timer_overflow(int count) -{ - int i; - - spin_lock(&i8259A_lock); - /* - * This is tricky when I/O APICs are used; - * see do_timer_interrupt(). - */ - i = inb(0x20); - spin_unlock(&i8259A_lock); - - /* assumption about timer being IRQ0 */ - if (i & 0x01) { - /* - * We cannot detect lost timer interrupts ... - * well, that's why we call them lost, don't we? :) - * [hmm, on the Pentium and Alpha we can ... sort of] - */ - count -= LATCH; - } else { -#ifdef BUGGY_NEPTUN_TIMER - /* - * for the Neptun bug we know that the 'latch' - * command doesnt latch the high and low value - * of the counter atomically. Thus we have to - * substract 256 from the counter - * ... funny, isnt it? :) - */ - - count -= 256; -#else - printk("do_slow_gettimeoffset(): hardware timer problem?\n"); -#endif - } - return count; -} diff -Nru a/arch/i386/mach-generic/entry_arch.h b/arch/i386/mach-generic/entry_arch.h --- a/arch/i386/mach-generic/entry_arch.h Mon Dec 23 21:21:50 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,34 +0,0 @@ -/* - * This file is designed to contain the BUILD_INTERRUPT specifications for - * all of the extra named interrupt vectors used by the architecture. - * Usually this is the Inter Process Interrupts (IPIs) - */ - -/* - * The following vectors are part of the Linux architecture, there - * is no hardware IRQ pin equivalent for them, they are triggered - * through the ICC by us (IPIs) - */ -#ifdef CONFIG_X86_SMP -BUILD_INTERRUPT(reschedule_interrupt,RESCHEDULE_VECTOR) -BUILD_INTERRUPT(invalidate_interrupt,INVALIDATE_TLB_VECTOR) -BUILD_INTERRUPT(call_function_interrupt,CALL_FUNCTION_VECTOR) -#endif - -/* - * every pentium local APIC has two 'local interrupts', with a - * soft-definable vector attached to both interrupts, one of - * which is a timer interrupt, the other one is error counter - * overflow. Linux uses the local APIC timer interrupt to get - * a much simpler SMP time architecture: - */ -#ifdef CONFIG_X86_LOCAL_APIC -BUILD_INTERRUPT(apic_timer_interrupt,LOCAL_TIMER_VECTOR) -BUILD_INTERRUPT(error_interrupt,ERROR_APIC_VECTOR) -BUILD_INTERRUPT(spurious_interrupt,SPURIOUS_APIC_VECTOR) - -#ifdef CONFIG_X86_MCE_P4THERMAL -BUILD_INTERRUPT(thermal_interrupt,THERMAL_APIC_VECTOR) -#endif - -#endif diff -Nru a/arch/i386/mach-generic/irq_vectors.h b/arch/i386/mach-generic/irq_vectors.h --- a/arch/i386/mach-generic/irq_vectors.h Mon Dec 23 21:21:52 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,85 +0,0 @@ -/* - * This file should contain #defines for all of the interrupt vector - * numbers used by this architecture. - * - * In addition, there are some standard defines: - * - * FIRST_EXTERNAL_VECTOR: - * The first free place for external interrupts - * - * SYSCALL_VECTOR: - * The IRQ vector a syscall makes the user to kernel transition - * under. - * - * TIMER_IRQ: - * The IRQ number the timer interrupt comes in at. - * - * NR_IRQS: - * The total number of interrupt vectors (including all the - * architecture specific interrupts) needed. - * - */ -#ifndef _ASM_IRQ_VECTORS_H -#define _ASM_IRQ_VECTORS_H - -/* - * IDT vectors usable for external interrupt sources start - * at 0x20: - */ -#define FIRST_EXTERNAL_VECTOR 0x20 - -#define SYSCALL_VECTOR 0x80 - -/* - * Vectors 0x20-0x2f are used for ISA interrupts. - */ - -/* - * Special IRQ vectors used by the SMP architecture, 0xf0-0xff - * - * some of the following vectors are 'rare', they are merged - * into a single vector (CALL_FUNCTION_VECTOR) to save vector space. - * TLB, reschedule and local APIC vectors are performance-critical. - * - * Vectors 0xf0-0xfa are free (reserved for future Linux use). - */ -#define SPURIOUS_APIC_VECTOR 0xff -#define ERROR_APIC_VECTOR 0xfe -#define INVALIDATE_TLB_VECTOR 0xfd -#define RESCHEDULE_VECTOR 0xfc -#define CALL_FUNCTION_VECTOR 0xfb - -#define THERMAL_APIC_VECTOR 0xf0 -/* - * Local APIC timer IRQ vector is on a different priority level, - * to work around the 'lost local interrupt if more than 2 IRQ - * sources per level' errata. - */ -#define LOCAL_TIMER_VECTOR 0xef - -/* - * First APIC vector available to drivers: (vectors 0x30-0xee) - * we start at 0x31 to spread out vectors evenly between priority - * levels. (0x80 is the syscall vector) - */ -#define FIRST_DEVICE_VECTOR 0x31 -#define FIRST_SYSTEM_VECTOR 0xef - -#define TIMER_IRQ 0 - -/* - * 16 8259A IRQ's, 208 potential APIC interrupt sources. - * Right now the APIC is mostly only used for SMP. - * 256 vectors is an architectural limit. (we can have - * more than 256 devices theoretically, but they will - * have to use shared interrupts) - * Since vectors 0x00-0x1f are used/reserved for the CPU, - * the usable vector space is 0x20-0xff (224 vectors) - */ -#ifdef CONFIG_X86_IO_APIC -#define NR_IRQS 224 -#else -#define NR_IRQS 16 -#endif - -#endif /* _ASM_IRQ_VECTORS_H */ diff -Nru a/arch/i386/mach-generic/mach_apic.h b/arch/i386/mach-generic/mach_apic.h --- a/arch/i386/mach-generic/mach_apic.h Mon Dec 23 21:22:02 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,46 +0,0 @@ -#ifndef __ASM_MACH_APIC_H -#define __ASM_MACH_APIC_H - -static inline unsigned long calculate_ldr(unsigned long old) -{ - unsigned long id; - - id = 1UL << smp_processor_id(); - return ((old & ~APIC_LDR_MASK) | SET_APIC_LOGICAL_ID(id)); -} - -#define APIC_DFR_VALUE (APIC_DFR_FLAT) - -#ifdef CONFIG_SMP - #define TARGET_CPUS (clustered_apic_mode ? 0xf : cpu_online_map) -#else - #define TARGET_CPUS 0x01 -#endif - -#define APIC_BROADCAST_ID 0x0F -#define check_apicid_used(bitmap, apicid) (bitmap & (1 << apicid)) - -static inline void summit_check(char *oem, char *productid) -{ -} - -static inline void clustered_apic_check(void) -{ - printk("Enabling APIC mode: %s. Using %d I/O APICs\n", - (clustered_apic_mode ? "NUMA-Q" : "Flat"), nr_ioapics); -} - -static inline int cpu_present_to_apicid(int mps_cpu) -{ - if (clustered_apic_mode) - return ( ((mps_cpu/4)*16) + (1<<(mps_cpu%4)) ); - else - return mps_cpu; -} - -static inline unsigned long apicid_to_cpu_present(int apicid) -{ - return (1ul << apicid); -} - -#endif /* __ASM_MACH_APIC_H */ diff -Nru a/arch/i386/mach-generic/setup.c b/arch/i386/mach-generic/setup.c --- a/arch/i386/mach-generic/setup.c Mon Dec 23 21:21:53 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,104 +0,0 @@ -/* - * Machine specific setup for generic - */ - -#include -#include -#include -#include -#include -#include - -/** - * pre_intr_init_hook - initialisation prior to setting up interrupt vectors - * - * Description: - * Perform any necessary interrupt initialisation prior to setting up - * the "ordinary" interrupt call gates. For legacy reasons, the ISA - * interrupts should be initialised here if the machine emulates a PC - * in any way. - **/ -void __init pre_intr_init_hook(void) -{ - init_ISA_irqs(); -} - -/* - * IRQ2 is cascade interrupt to second interrupt controller - */ -static struct irqaction irq2 = { no_action, 0, 0, "cascade", NULL, NULL}; - -/** - * intr_init_hook - post gate setup interrupt initialisation - * - * Description: - * Fill in any interrupts that may have been left out by the general - * init_IRQ() routine. interrupts having to do with the machine rather - * than the devices on the I/O bus (like APIC interrupts in intel MP - * systems) are started here. - **/ -void __init intr_init_hook(void) -{ -#ifdef CONFIG_X86_LOCAL_APIC - apic_intr_init(); -#endif - - setup_irq(2, &irq2); -} - -/** - * pre_setup_arch_hook - hook called prior to any setup_arch() execution - * - * Description: - * generally used to activate any machine specific identification - * routines that may be needed before setup_arch() runs. On VISWS - * this is used to get the board revision and type. - **/ -void __init pre_setup_arch_hook(void) -{ -} - -/** - * trap_init_hook - initialise system specific traps - * - * Description: - * Called as the final act of trap_init(). Used in VISWS to initialise - * the various board specific APIC traps. - **/ -void __init trap_init_hook(void) -{ -} - -static struct irqaction irq0 = { timer_interrupt, SA_INTERRUPT, 0, "timer", NULL, NULL}; - -/** - * time_init_hook - do any specific initialisations for the system timer. - * - * Description: - * Must plug the system timer interrupt source at HZ into the IRQ listed - * in irq_vectors.h:TIMER_IRQ - **/ -void __init time_init_hook(void) -{ - setup_irq(0, &irq0); -} - -#ifdef CONFIG_MCA -/** - * mca_nmi_hook - hook into MCA specific NMI chain - * - * Description: - * The MCA (Microchannel Arcitecture) has an NMI chain for NMI sources - * along the MCA bus. Use this to hook into that chain if you will need - * it. - **/ -void __init mca_nmi_hook(void) -{ - /* If I recall correctly, there's a whole bunch of other things that - * we can do to check for NMI problems, but that's all I know about - * at the moment. - */ - - printk("NMI generated from unknown source!\n"); -} -#endif diff -Nru a/arch/i386/mach-generic/setup_arch_post.h b/arch/i386/mach-generic/setup_arch_post.h --- a/arch/i386/mach-generic/setup_arch_post.h Mon Dec 23 21:21:59 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,40 +0,0 @@ -/** - * machine_specific_memory_setup - Hook for machine specific memory setup. - * - * Description: - * This is included late in kernel/setup.c so that it can make - * use of all of the static functions. - **/ - -static inline char * __init machine_specific_memory_setup(void) -{ - char *who; - - - who = "BIOS-e820"; - - /* - * Try to copy the BIOS-supplied E820-map. - * - * Otherwise fake a memory map; one section from 0k->640k, - * the next section from 1mb->appropriate_mem_k - */ - sanitize_e820_map(E820_MAP, &E820_MAP_NR); - if (copy_e820_map(E820_MAP, E820_MAP_NR) < 0) { - unsigned long mem_size; - - /* compare results from other methods and take the greater */ - if (ALT_MEM_K < EXT_MEM_K) { - mem_size = EXT_MEM_K; - who = "BIOS-88"; - } else { - mem_size = ALT_MEM_K; - who = "BIOS-e801"; - } - - e820.nr_map = 0; - add_memory_region(0, LOWMEMSIZE(), E820_RAM); - add_memory_region(HIGH_MEMORY, mem_size << 10, E820_RAM); - } - return who; -} diff -Nru a/arch/i386/mach-generic/setup_arch_pre.h b/arch/i386/mach-generic/setup_arch_pre.h --- a/arch/i386/mach-generic/setup_arch_pre.h Mon Dec 23 21:21:51 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,5 +0,0 @@ -/* Hook to call BIOS initialisation function */ - -/* no action for generic */ - -#define ARCH_SETUP diff -Nru a/arch/i386/mach-generic/smpboot_hooks.h b/arch/i386/mach-generic/smpboot_hooks.h --- a/arch/i386/mach-generic/smpboot_hooks.h Mon Dec 23 21:21:52 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,33 +0,0 @@ -/* two abstractions specific to kernel/smpboot.c, mainly to cater to visws - * which needs to alter them. */ - -static inline void smpboot_clear_io_apic_irqs(void) -{ - io_apic_irqs = 0; -} - -static inline void smpboot_setup_warm_reset_vector(void) -{ - /* - * Install writable page 0 entry to set BIOS data area. - */ - local_flush_tlb(); - - /* - * Paranoid: Set warm reset code and vector here back - * to default values. - */ - CMOS_WRITE(0, 0xf); - - *((volatile long *) phys_to_virt(0x467)) = 0; -} - -static inline void smpboot_setup_io_apic(void) -{ - /* - * Here we can be sure that there is an IO-APIC in the system. Let's - * go and set it up: - */ - if (!skip_ioapic_setup && nr_ioapics) - setup_IO_APIC(); -} diff -Nru a/arch/i386/mach-generic/topology.c b/arch/i386/mach-generic/topology.c --- a/arch/i386/mach-generic/topology.c Mon Dec 23 21:21:59 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,68 +0,0 @@ -/* - * arch/i386/mach-generic/topology.c - Populate driverfs with topology information - * - * Written by: Matthew Dobson, IBM Corporation - * Original Code: Paul Dorwin, IBM Corporation, Patrick Mochel, OSDL - * - * Copyright (C) 2002, IBM Corp. - * - * All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or - * NON INFRINGEMENT. See the GNU General Public License for more - * details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - * - * Send feedback to - */ -#include -#include -#include - -struct i386_cpu cpu_devices[NR_CPUS]; - -#ifdef CONFIG_NUMA -#include -#include -#include - -struct i386_node node_devices[MAX_NUMNODES]; -struct i386_memblk memblk_devices[MAX_NR_MEMBLKS]; - -static int __init topology_init(void) -{ - int i; - - for (i = 0; i < num_online_nodes(); i++) - arch_register_node(i); - for (i = 0; i < NR_CPUS; i++) - if (cpu_possible(i)) arch_register_cpu(i); - for (i = 0; i < num_online_memblks(); i++) - arch_register_memblk(i); - return 0; -} - -#else /* !CONFIG_NUMA */ - -static int __init topology_init(void) -{ - int i; - - for (i = 0; i < NR_CPUS; i++) - if (cpu_possible(i)) arch_register_cpu(i); - return 0; -} - -#endif /* CONFIG_NUMA */ - -subsys_initcall(topology_init); diff -Nru a/arch/i386/mach-summit/mach_apic.h b/arch/i386/mach-summit/mach_apic.h --- a/arch/i386/mach-summit/mach_apic.h Mon Dec 23 21:21:57 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,57 +0,0 @@ -#ifndef __ASM_MACH_APIC_H -#define __ASM_MACH_APIC_H - -extern int x86_summit; - -#define XAPIC_DEST_CPUS_MASK 0x0Fu -#define XAPIC_DEST_CLUSTER_MASK 0xF0u - -#define xapic_phys_to_log_apicid(phys_apic) ( (1ul << ((phys_apic) & 0x3)) |\ - ((phys_apic) & XAPIC_DEST_CLUSTER_MASK) ) - -static inline unsigned long calculate_ldr(unsigned long old) -{ - unsigned long id; - - if (x86_summit) - id = xapic_phys_to_log_apicid(hard_smp_processor_id()); - else - id = 1UL << smp_processor_id(); - return ((old & ~APIC_LDR_MASK) | SET_APIC_LOGICAL_ID(id)); -} - -#define APIC_DFR_VALUE (x86_summit ? APIC_DFR_CLUSTER : APIC_DFR_FLAT) -#define TARGET_CPUS (x86_summit ? XAPIC_DEST_CPUS_MASK : cpu_online_map) - -#define APIC_BROADCAST_ID (x86_summit ? 0xFF : 0x0F) -#define check_apicid_used(bitmap, apicid) (0) - -static inline void summit_check(char *oem, char *productid) -{ - if (!strncmp(oem, "IBM ENSW", 8) && !strncmp(str, "VIGIL SMP", 9)) - x86_summit = 1; -} - -static inline void clustered_apic_check(void) -{ - printk("Enabling APIC mode: %s. Using %d I/O APICs\n", - (x86_summit ? "Summit" : "Flat"), nr_ioapics); -} - -static inline int cpu_present_to_apicid(int mps_cpu) -{ - if (x86_summit) - return (int) raw_phys_apicid[mps_cpu]; - else - return mps_cpu; -} - -static inline unsigned long apicid_to_phys_cpu_present(int apicid) -{ - if (x86_summit) - return (1ul << (((apicid >> 4) << 2) | (apicid & 0x3))); - else - return (1ul << apicid); -} - -#endif /* __ASM_MACH_APIC_H */ diff -Nru a/arch/i386/mach-visws/do_timer.h b/arch/i386/mach-visws/do_timer.h --- a/arch/i386/mach-visws/do_timer.h Mon Dec 23 21:21:52 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,49 +0,0 @@ -/* defines for inline arch setup functions */ - -#include -#include - -static inline void do_timer_interrupt_hook(struct pt_regs *regs) -{ - /* Clear the interrupt */ - co_cpu_write(CO_CPU_STAT,co_cpu_read(CO_CPU_STAT) & ~CO_STAT_TIMEINTR); - - do_timer(regs); -/* - * In the SMP case we use the local APIC timer interrupt to do the - * profiling, except when we simulate SMP mode on a uniprocessor - * system, in that case we have to call the local interrupt handler. - */ -#ifndef CONFIG_X86_LOCAL_APIC - x86_do_profile(regs); -#else - if (!using_apic_timer) - smp_local_timer_interrupt(regs); -#endif -} - -static inline int do_timer_overflow(int count) -{ - int i; - - spin_lock(&i8259A_lock); - /* - * This is tricky when I/O APICs are used; - * see do_timer_interrupt(). - */ - i = inb(0x20); - spin_unlock(&i8259A_lock); - - /* assumption about timer being IRQ0 */ - if (i & 0x01) { - /* - * We cannot detect lost timer interrupts ... - * well, that's why we call them lost, don't we? :) - * [hmm, on the Pentium and Alpha we can ... sort of] - */ - count -= LATCH; - } else { - printk("do_slow_gettimeoffset(): hardware timer problem?\n"); - } - return count; -} diff -Nru a/arch/i386/mach-visws/entry_arch.h b/arch/i386/mach-visws/entry_arch.h --- a/arch/i386/mach-visws/entry_arch.h Mon Dec 23 21:22:00 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,23 +0,0 @@ -/* - * The following vectors are part of the Linux architecture, there - * is no hardware IRQ pin equivalent for them, they are triggered - * through the ICC by us (IPIs) - */ -#ifdef CONFIG_X86_SMP -BUILD_INTERRUPT(reschedule_interrupt,RESCHEDULE_VECTOR) -BUILD_INTERRUPT(invalidate_interrupt,INVALIDATE_TLB_VECTOR) -BUILD_INTERRUPT(call_function_interrupt,CALL_FUNCTION_VECTOR) -#endif - -/* - * every pentium local APIC has two 'local interrupts', with a - * soft-definable vector attached to both interrupts, one of - * which is a timer interrupt, the other one is error counter - * overflow. Linux uses the local APIC timer interrupt to get - * a much simpler SMP time architecture: - */ -#ifdef CONFIG_X86_LOCAL_APIC -BUILD_INTERRUPT(apic_timer_interrupt,LOCAL_TIMER_VECTOR) -BUILD_INTERRUPT(error_interrupt,ERROR_APIC_VECTOR) -BUILD_INTERRUPT(spurious_interrupt,SPURIOUS_APIC_VECTOR) -#endif diff -Nru a/arch/i386/mach-visws/irq_vectors.h b/arch/i386/mach-visws/irq_vectors.h --- a/arch/i386/mach-visws/irq_vectors.h Mon Dec 23 21:21:51 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,64 +0,0 @@ -#ifndef _ASM_IRQ_VECTORS_H -#define _ASM_IRQ_VECTORS_H - -/* - * IDT vectors usable for external interrupt sources start - * at 0x20: - */ -#define FIRST_EXTERNAL_VECTOR 0x20 - -#define SYSCALL_VECTOR 0x80 - -/* - * Vectors 0x20-0x2f are used for ISA interrupts. - */ - -/* - * Special IRQ vectors used by the SMP architecture, 0xf0-0xff - * - * some of the following vectors are 'rare', they are merged - * into a single vector (CALL_FUNCTION_VECTOR) to save vector space. - * TLB, reschedule and local APIC vectors are performance-critical. - * - * Vectors 0xf0-0xfa are free (reserved for future Linux use). - */ -#define SPURIOUS_APIC_VECTOR 0xff -#define ERROR_APIC_VECTOR 0xfe -#define INVALIDATE_TLB_VECTOR 0xfd -#define RESCHEDULE_VECTOR 0xfc -#define CALL_FUNCTION_VECTOR 0xfb - -#define THERMAL_APIC_VECTOR 0xf0 -/* - * Local APIC timer IRQ vector is on a different priority level, - * to work around the 'lost local interrupt if more than 2 IRQ - * sources per level' errata. - */ -#define LOCAL_TIMER_VECTOR 0xef - -/* - * First APIC vector available to drivers: (vectors 0x30-0xee) - * we start at 0x31 to spread out vectors evenly between priority - * levels. (0x80 is the syscall vector) - */ -#define FIRST_DEVICE_VECTOR 0x31 -#define FIRST_SYSTEM_VECTOR 0xef - -#define TIMER_IRQ 0 - -/* - * 16 8259A IRQ's, 208 potential APIC interrupt sources. - * Right now the APIC is mostly only used for SMP. - * 256 vectors is an architectural limit. (we can have - * more than 256 devices theoretically, but they will - * have to use shared interrupts) - * Since vectors 0x00-0x1f are used/reserved for the CPU, - * the usable vector space is 0x20-0xff (224 vectors) - */ -#ifdef CONFIG_X86_IO_APIC -#define NR_IRQS 224 -#else -#define NR_IRQS 16 -#endif - -#endif /* _ASM_IRQ_VECTORS_H */ diff -Nru a/arch/i386/mach-visws/setup_arch_post.h b/arch/i386/mach-visws/setup_arch_post.h --- a/arch/i386/mach-visws/setup_arch_post.h Mon Dec 23 21:21:55 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,37 +0,0 @@ -/* Hook for machine specific memory setup. - * - * This is included late in kernel/setup.c so that it can make use of all of - * the static functions. */ - -static inline char * __init machine_specific_memory_setup(void) -{ - char *who; - - - who = "BIOS-e820"; - - /* - * Try to copy the BIOS-supplied E820-map. - * - * Otherwise fake a memory map; one section from 0k->640k, - * the next section from 1mb->appropriate_mem_k - */ - sanitize_e820_map(E820_MAP, &E820_MAP_NR); - if (copy_e820_map(E820_MAP, E820_MAP_NR) < 0) { - unsigned long mem_size; - - /* compare results from other methods and take the greater */ - if (ALT_MEM_K < EXT_MEM_K) { - mem_size = EXT_MEM_K; - who = "BIOS-88"; - } else { - mem_size = ALT_MEM_K; - who = "BIOS-e801"; - } - - e820.nr_map = 0; - add_memory_region(0, LOWMEMSIZE(), E820_RAM); - add_memory_region(HIGH_MEMORY, mem_size << 10, E820_RAM); - } - return who; -} diff -Nru a/arch/i386/mach-visws/setup_arch_pre.h b/arch/i386/mach-visws/setup_arch_pre.h --- a/arch/i386/mach-visws/setup_arch_pre.h Mon Dec 23 21:21:52 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,5 +0,0 @@ -/* Hook to call BIOS initialisation function */ - -/* no action for visws */ - -#define ARCH_SETUP diff -Nru a/arch/i386/mach-visws/smpboot_hooks.h b/arch/i386/mach-visws/smpboot_hooks.h --- a/arch/i386/mach-visws/smpboot_hooks.h Mon Dec 23 21:21:51 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,13 +0,0 @@ -/* for visws do nothing for any of these */ - -static inline void smpboot_clear_io_apic_irqs(void) -{ -} - -static inline void smpboot_setup_warm_reset_vector(void) -{ -} - -static inline void smpboot_setup_io_apic(void) -{ -} diff -Nru a/arch/i386/mach-voyager/do_timer.h b/arch/i386/mach-voyager/do_timer.h --- a/arch/i386/mach-voyager/do_timer.h Mon Dec 23 21:21:59 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,22 +0,0 @@ -/* defines for inline arch setup functions */ -#include - -static inline void do_timer_interrupt_hook(struct pt_regs *regs) -{ - do_timer(regs); - - voyager_timer_interrupt(regs); -} - -static inline int do_timer_overflow(int count) -{ - /* can't read the ISR, just assume 1 tick - overflow */ - if(count > LATCH || count < 0) { - printk(KERN_ERR "VOYAGER PROBLEM: count is %d, latch is %d\n", count, LATCH); - count = LATCH; - } - count -= LATCH; - - return count; -} diff -Nru a/arch/i386/mach-voyager/entry_arch.h b/arch/i386/mach-voyager/entry_arch.h --- a/arch/i386/mach-voyager/entry_arch.h Mon Dec 23 21:21:59 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,26 +0,0 @@ -/* -*- mode: c; c-basic-offset: 8 -*- */ - -/* Copyright (C) 2002 - * - * Author: James.Bottomley@HansenPartnership.com - * - * linux/arch/i386/voyager/entry_arch.h - * - * This file builds the VIC and QIC CPI gates - */ - -/* initialise the voyager interrupt gates - * - * This uses the macros in irq.h to set up assembly jump gates. The - * calls are then redirected to the same routine with smp_ prefixed */ -BUILD_INTERRUPT(vic_sys_interrupt, VIC_SYS_INT) -BUILD_INTERRUPT(vic_cmn_interrupt, VIC_CMN_INT) -BUILD_INTERRUPT(vic_cpi_interrupt, VIC_CPI_LEVEL0); - -/* do all the QIC interrupts */ -BUILD_INTERRUPT(qic_timer_interrupt, QIC_TIMER_CPI); -BUILD_INTERRUPT(qic_invalidate_interrupt, QIC_INVALIDATE_CPI); -BUILD_INTERRUPT(qic_reschedule_interrupt, QIC_RESCHEDULE_CPI); -BUILD_INTERRUPT(qic_enable_irq_interrupt, QIC_ENABLE_IRQ_CPI); -BUILD_INTERRUPT(qic_call_function_interrupt, QIC_CALL_FUNCTION_CPI); - diff -Nru a/arch/i386/mach-voyager/irq_vectors.h b/arch/i386/mach-voyager/irq_vectors.h --- a/arch/i386/mach-voyager/irq_vectors.h Mon Dec 23 21:21:52 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,71 +0,0 @@ -/* -*- mode: c; c-basic-offset: 8 -*- */ - -/* Copyright (C) 2002 - * - * Author: James.Bottomley@HansenPartnership.com - * - * linux/arch/i386/voyager/irq_vectors.h - * - * This file provides definitions for the VIC and QIC CPIs - */ - -#ifndef _ASM_IRQ_VECTORS_H -#define _ASM_IRQ_VECTORS_H - -/* - * IDT vectors usable for external interrupt sources start - * at 0x20: - */ -#define FIRST_EXTERNAL_VECTOR 0x20 - -#define SYSCALL_VECTOR 0x80 - -/* - * Vectors 0x20-0x2f are used for ISA interrupts. - */ - -/* These define the CPIs we use in linux */ -#define VIC_CPI_LEVEL0 0 -#define VIC_CPI_LEVEL1 1 -/* now the fake CPIs */ -#define VIC_TIMER_CPI 2 -#define VIC_INVALIDATE_CPI 3 -#define VIC_RESCHEDULE_CPI 4 -#define VIC_ENABLE_IRQ_CPI 5 -#define VIC_CALL_FUNCTION_CPI 6 - -/* Now the QIC CPIs: Since we don't need the two initial levels, - * these are 2 less than the VIC CPIs */ -#define QIC_CPI_OFFSET 1 -#define QIC_TIMER_CPI (VIC_TIMER_CPI - QIC_CPI_OFFSET) -#define QIC_INVALIDATE_CPI (VIC_INVALIDATE_CPI - QIC_CPI_OFFSET) -#define QIC_RESCHEDULE_CPI (VIC_RESCHEDULE_CPI - QIC_CPI_OFFSET) -#define QIC_ENABLE_IRQ_CPI (VIC_ENABLE_IRQ_CPI - QIC_CPI_OFFSET) -#define QIC_CALL_FUNCTION_CPI (VIC_CALL_FUNCTION_CPI - QIC_CPI_OFFSET) - -#define VIC_START_FAKE_CPI VIC_TIMER_CPI -#define VIC_END_FAKE_CPI VIC_CALL_FUNCTION_CPI - -/* this is the SYS_INT CPI. */ -#define VIC_SYS_INT 8 -#define VIC_CMN_INT 15 - -/* This is the boot CPI for alternate processors. It gets overwritten - * by the above once the system has activated all available processors */ -#define VIC_CPU_BOOT_CPI VIC_CPI_LEVEL0 -#define VIC_CPU_BOOT_ERRATA_CPI (VIC_CPI_LEVEL0 + 8) - -#define NR_IRQS 224 - -#ifndef __ASSEMBLY__ -extern asmlinkage void vic_cpi_interrupt(void); -extern asmlinkage void vic_sys_interrupt(void); -extern asmlinkage void vic_cmn_interrupt(void); -extern asmlinkage void qic_timer_interrupt(void); -extern asmlinkage void qic_invalidate_interrupt(void); -extern asmlinkage void qic_reschedule_interrupt(void); -extern asmlinkage void qic_enable_irq_interrupt(void); -extern asmlinkage void qic_call_function_interrupt(void); -#endif /* !__ASSEMBLY__ */ - -#endif /* _ASM_IRQ_VECTORS_H */ diff -Nru a/arch/i386/mach-voyager/setup_arch_post.h b/arch/i386/mach-voyager/setup_arch_post.h --- a/arch/i386/mach-voyager/setup_arch_post.h Mon Dec 23 21:21:53 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,73 +0,0 @@ -/* Hook for machine specific memory setup. - * - * This is included late in kernel/setup.c so that it can make use of all of - * the static functions. */ - -static inline char * __init machine_specific_memory_setup(void) -{ - char *who; - - who = "NOT VOYAGER"; - - if(voyager_level == 5) { - __u32 addr, length; - int i; - - who = "Voyager-SUS"; - - e820.nr_map = 0; - for(i=0; voyager_memory_detect(i, &addr, &length); i++) { - add_memory_region(addr, length, E820_RAM); - } - return who; - } else if(voyager_level == 4) { - __u32 tom; - __u16 catbase = inb(VOYAGER_SSPB_RELOCATION_PORT)<<8; - /* select the DINO config space */ - outb(VOYAGER_DINO, VOYAGER_CAT_CONFIG_PORT); - /* Read DINO top of memory register */ - tom = ((inb(catbase + 0x4) & 0xf0) << 16) - + ((inb(catbase + 0x5) & 0x7f) << 24); - - if(inb(catbase) != VOYAGER_DINO) { - printk(KERN_ERR "Voyager: Failed to get DINO for L4, setting tom to EXT_MEM_K\n"); - tom = (EXT_MEM_K)<<10; - } - who = "Voyager-TOM"; - add_memory_region(0, 0x9f000, E820_RAM); - /* map from 1M to top of memory */ - add_memory_region(1*1024*1024, tom - 1*1024*1024, E820_RAM); - /* FIXME: Should check the ASICs to see if I need to - * take out the 8M window. Just do it at the moment - * */ - add_memory_region(8*1024*1024, 8*1024*1024, E820_RESERVED); - return who; - } - - who = "BIOS-e820"; - - /* - * Try to copy the BIOS-supplied E820-map. - * - * Otherwise fake a memory map; one section from 0k->640k, - * the next section from 1mb->appropriate_mem_k - */ - sanitize_e820_map(E820_MAP, &E820_MAP_NR); - if (copy_e820_map(E820_MAP, E820_MAP_NR) < 0) { - unsigned long mem_size; - - /* compare results from other methods and take the greater */ - if (ALT_MEM_K < EXT_MEM_K) { - mem_size = EXT_MEM_K; - who = "BIOS-88"; - } else { - mem_size = ALT_MEM_K; - who = "BIOS-e801"; - } - - e820.nr_map = 0; - add_memory_region(0, LOWMEMSIZE(), E820_RAM); - add_memory_region(HIGH_MEMORY, mem_size << 10, E820_RAM); - } - return who; -} diff -Nru a/arch/i386/mach-voyager/setup_arch_pre.h b/arch/i386/mach-voyager/setup_arch_pre.h --- a/arch/i386/mach-voyager/setup_arch_pre.h Mon Dec 23 21:21:53 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,10 +0,0 @@ -#include -#define VOYAGER_BIOS_INFO ((struct voyager_bios_info *)(PARAM+0x40)) - -/* Hook to call BIOS initialisation function */ - -/* for voyager, pass the voyager BIOS/SUS info area to the detection - * routines */ - -#define ARCH_SETUP voyager_detect(VOYAGER_BIOS_INFO); - diff -Nru a/arch/i386/mm/hugetlbpage.c b/arch/i386/mm/hugetlbpage.c --- a/arch/i386/mm/hugetlbpage.c Mon Dec 23 21:22:00 2002 +++ b/arch/i386/mm/hugetlbpage.c Mon Dec 23 21:22:00 2002 @@ -84,7 +84,7 @@ spin_lock(&htlbpage_lock); hugetlb_key = find_key(key); if (!hugetlb_key) { - if (!capable(CAP_SYS_ADMIN) || !in_group_p(0)) + if (!capable(CAP_SYS_ADMIN) || !capable(CAP_IPC_LOCK) || !in_group_p(0)) hugetlb_key = ERR_PTR(-EPERM); else if (!(flag & IPC_CREAT)) hugetlb_key = ERR_PTR(-ENOENT); @@ -110,7 +110,6 @@ hugetlb_key = ERR_PTR(-EAGAIN); spin_unlock(&htlbpage_lock); } else if (check_size_prot(hugetlb_key, len, prot, flag) < 0) { - hugetlb_key->key = 0; hugetlb_key = ERR_PTR(-EINVAL); } } while (hugetlb_key == ERR_PTR(-EAGAIN)); @@ -250,7 +249,7 @@ vma->vm_end = end; } spin_unlock(&mm->page_table_lock); - out_error1: +out_error1: return -1; } @@ -262,7 +261,10 @@ struct page *ptepage; unsigned long addr = vma->vm_start; unsigned long end = vma->vm_end; + struct hugetlb_key *key = vma->vm_private_data; + if (key) + atomic_inc(&key->count); while (addr < end) { dst_pte = huge_pte_alloc(dst, addr); if (!dst_pte) @@ -355,6 +357,8 @@ spin_unlock(&htlbpage_lock); for (address = start; address < end; address += HPAGE_SIZE) { pte = huge_pte_offset(mm, address); + if (pte_none(*pte)) + continue; page = pte_page(*pte); huge_page_release(page); pte_clear(pte); @@ -429,7 +433,6 @@ if (!page) { page = alloc_hugetlb_page(); if (!page) { - spin_unlock(&key->lock); ret = -ENOMEM; goto out; } @@ -437,8 +440,8 @@ } set_huge_pte(mm, vma, page, pte, vma->vm_flags & VM_WRITE); } - spin_unlock(&key->lock); out: + spin_unlock(&key->lock); spin_unlock(&mm->page_table_lock); return ret; } @@ -467,8 +470,6 @@ } retval = prefault_key(hugetlb_key, vma); - if (retval) - goto out; vma->vm_flags |= (VM_HUGETLB | VM_RESERVED); vma->vm_ops = &hugetlb_vm_ops; @@ -477,17 +478,6 @@ clear_key_busy(hugetlb_key); spin_unlock(&htlbpage_lock); return retval; -out: - if (addr > vma->vm_start) { - unsigned long raddr; - raddr = vma->vm_end; - vma->vm_end = addr; - zap_hugepage_range(vma, vma->vm_start, vma->vm_end - vma->vm_start); - vma->vm_end = raddr; - } - spin_lock(&mm->page_table_lock); - do_munmap(mm, vma->vm_start, len); - spin_unlock(&mm->page_table_lock); out_release: hugetlb_release_key(hugetlb_key); return retval; @@ -536,10 +526,8 @@ static int alloc_private_hugetlb_pages(int key, unsigned long addr, unsigned long len, int prot, int flag) { - if (!capable(CAP_SYS_ADMIN)) { - if (!in_group_p(0)) - return -EPERM; - } + if (!capable(CAP_IPC_LOCK) && !in_group_p(0)) + return -EPERM; addr = do_mmap_pgoff(NULL, addr, len, prot, MAP_NORESERVE|MAP_PRIVATE|MAP_FIXED|MAP_ANONYMOUS, 0); if (IS_ERR((void *) addr)) diff -Nru a/arch/i386/mm/init.c b/arch/i386/mm/init.c --- a/arch/i386/mm/init.c Mon Dec 23 21:21:59 2002 +++ b/arch/i386/mm/init.c Mon Dec 23 21:21:59 2002 @@ -72,7 +72,7 @@ static pte_t * __init one_page_table_init(pmd_t *pmd) { pte_t *page_table = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE); - set_pmd(pmd, __pmd(__pa(page_table) | _KERNPG_TABLE)); + set_pmd(pmd, __pmd(__pa(page_table) | _PAGE_TABLE)); if (page_table != pte_offset_kernel(pmd, 0)) BUG(); diff -Nru a/arch/i386/mm/pageattr.c b/arch/i386/mm/pageattr.c --- a/arch/i386/mm/pageattr.c Mon Dec 23 21:21:53 2002 +++ b/arch/i386/mm/pageattr.c Mon Dec 23 21:21:53 2002 @@ -16,7 +16,12 @@ static inline pte_t *lookup_address(unsigned long address) { pgd_t *pgd = pgd_offset_k(address); - pmd_t *pmd = pmd_offset(pgd, address); + pmd_t *pmd; + if (pgd_none(*pgd)) + return NULL; + pmd = pmd_offset(pgd, address); + if (pmd_none(*pmd)) + return NULL; if (pmd_large(*pmd)) return (pte_t *)pmd; return pte_offset_kernel(pmd, address); @@ -95,12 +100,13 @@ address = (unsigned long)page_address(page); kpte = lookup_address(address); + if (!kpte) + return -EINVAL; kpte_page = virt_to_page(((unsigned long)kpte) & PAGE_MASK); if (pgprot_val(prot) != pgprot_val(PAGE_KERNEL)) { if ((pte_val(*kpte) & _PAGE_PSE) == 0) { pte_t old = *kpte; pte_t standard = mk_pte(page, PAGE_KERNEL); - set_pte_atomic(kpte, mk_pte(page, prot)); if (pte_same(old,standard)) atomic_inc(&kpte_page->count); @@ -108,6 +114,7 @@ struct page *split = split_large_page(address, prot); if (!split) return -ENOMEM; + atomic_inc(&kpte_page->count); set_pmd_pte(kpte,address,mk_pte(split, PAGE_KERNEL)); } } else if ((pte_val(*kpte) & _PAGE_PSE) == 0) { diff -Nru a/arch/i386/oprofile/init.c b/arch/i386/oprofile/init.c --- a/arch/i386/oprofile/init.c Mon Dec 23 21:21:56 2002 +++ b/arch/i386/oprofile/init.c Mon Dec 23 21:21:56 2002 @@ -7,7 +7,6 @@ * @author John Levon */ -#include #include #include diff -Nru a/arch/i386/oprofile/nmi_int.c b/arch/i386/oprofile/nmi_int.c --- a/arch/i386/oprofile/nmi_int.c Mon Dec 23 21:22:00 2002 +++ b/arch/i386/oprofile/nmi_int.c Mon Dec 23 21:22:00 2002 @@ -7,19 +7,13 @@ * @author John Levon */ -#include #include #include #include #include -#include -#include #include -#include #include #include -#include -#include #include "op_counter.h" #include "op_x86_model.h" @@ -27,7 +21,6 @@ static struct op_x86_model_spec const * model; static struct op_msrs cpu_msrs[NR_CPUS]; static unsigned long saved_lvtpc[NR_CPUS]; -static unsigned long kernel_only; static int nmi_start(void); static void nmi_stop(void); @@ -53,10 +46,9 @@ } -// FIXME: kernel_only static int nmi_callback(struct pt_regs * regs, int cpu) { - return (model->check_ctrs(cpu, &cpu_msrs[cpu], regs)); + return model->check_ctrs(cpu, &cpu_msrs[cpu], regs); } @@ -210,7 +202,6 @@ oprofilefs_create_ulong(sb, dir, "user", &counter_config[i].user); } - oprofilefs_create_ulong(sb, root, "kernel_only", &kernel_only); return 0; } diff -Nru a/arch/ia64/Kconfig b/arch/ia64/Kconfig --- a/arch/ia64/Kconfig Mon Dec 23 21:22:00 2002 +++ b/arch/ia64/Kconfig Mon Dec 23 21:22:00 2002 @@ -1,3 +1,8 @@ +# +# For a description of the syntax of this configuration file, +# see Documentation/kbuild/kconfig-language.txt. +# + mainmenu "IA-64 Linux Kernel Configuration" source "init/Kconfig" @@ -215,6 +220,22 @@ Access). This option is for configuring high-end multiprocessor server systems. If in doubt, say N. +choice + prompt "Maximum Memory per NUMA Node" if NUMA && IA64_DIG + depends on NUMA && IA64_DIG + default IA64_NODESIZE_16GB + +config IA64_NODESIZE_16GB + bool "16GB" + +config IA64_NODESIZE_64GB + bool "64GB" + +config IA64_NODESIZE_256GB + bool "256GB" + +endchoice + config DISCONTIGMEM bool depends on IA64_SGI_SN1 || IA64_SGI_SN2 || (IA64_GENERIC || IA64_DIG || IA64_HP_ZX1) && NUMA @@ -225,6 +246,21 @@ or have huge holes in the physical address space for other reasons. See for more. +config VIRTUAL_MEM_MAP + bool "Enable Virtual Mem Map" + depends on !NUMA + default y if IA64_GENERIC || IA64_DIG || IA64_HP_ZX1 + help + Say Y to compile the kernel with support for a virtual mem map. + This is an alternate method of supporting large holes in the + physical address space on non NUMA machines. Since the DISCONTIGMEM + option is not supported on machines with the ZX1 chipset, this is + the only way of supporting more than 1 Gb of memory on those + machines. This code also only takes effect if a memory hole of + greater than 1 Gb is found during boot, so it is safe to enable + unless you require the DISCONTIGMEM option for your machine. If you + are unsure, say Y. + config IA64_MCA bool "Enable IA-64 Machine Check Abort" if IA64_GENERIC || IA64_DIG || IA64_HP_ZX1 default y if IA64_SGI_SN1 || IA64_SGI_SN2 @@ -396,6 +432,11 @@ emulation support which makes it possible to transparently run IA-32 Linux binaries on an IA-64 Linux system. If in doubt, say Y. + +config COMPAT + bool + depends on IA32_SUPPORT + default y config PERFMON bool "Performance monitor support" diff -Nru a/arch/ia64/Makefile b/arch/ia64/Makefile --- a/arch/ia64/Makefile Mon Dec 23 21:21:50 2002 +++ b/arch/ia64/Makefile Mon Dec 23 21:21:50 2002 @@ -5,76 +5,69 @@ # License. See the file "COPYING" in the main directory of this archive # for more details. # -# Copyright (C) 1998-2001 by David Mosberger-Tang +# Copyright (C) 1998-2002 by David Mosberger-Tang # NM := $(CROSS_COMPILE)nm -B -AWK := awk export AWK -OBJCOPYFLAGS := --strip-all -LDFLAGS_vmlinux := -static -AFLAGS_KERNEL := -mconstant-gp -EXTRA = - -CFLAGS := $(CFLAGS) -pipe $(EXTRA) -ffixed-r13 -mfixed-range=f10-f15,f32-f127 \ - -falign-functions=32 -# -ffunction-sections -CFLAGS_KERNEL := -mconstant-gp +OBJCOPYFLAGS := --strip-all +LDFLAGS_vmlinux := -static +AFLAGS_KERNEL := -mconstant-gp +EXTRA := + +cflags-y := -pipe $(EXTRA) -ffixed-r13 -mfixed-range=f10-f15,f32-f127 \ + -falign-functions=32 +CFLAGS_KERNEL := -mconstant-gp GCC_VERSION=$(shell $(CC) -v 2>&1 | fgrep 'gcc version' | cut -f3 -d' ' | cut -f1 -d'.') ifneq ($(GCC_VERSION),2) - CFLAGS += -frename-registers --param max-inline-insns=5000 + cflags-y += -frename-registers --param max-inline-insns=5000 endif -ifeq ($(CONFIG_ITANIUM_BSTEP_SPECIFIC),y) - CFLAGS += -mb-step -endif - -HEAD := arch/$(ARCH)/kernel/head.o arch/$(ARCH)/kernel/init_task.o - -libs-y += arch/$(ARCH)/lib/ -core-y += arch/$(ARCH)/kernel/ arch/$(ARCH)/mm/ -core-$(CONFIG_IA32_SUPPORT) += arch/$(ARCH)/ia32/ -core-$(CONFIG_IA64_DIG) += arch/$(ARCH)/dig/ -core-$(CONFIG_IA64_GENERIC) += arch/$(ARCH)/dig/ arch/$(ARCH)/hp/common/ arch/$(ARCH)/hp/zx1/ \ - arch/$(ARCH)/hp/sim/ -core-$(CONFIG_IA64_HP_ZX1) += arch/$(ARCH)/dig/ -core-$(CONFIG_IA64_SGI_SN) += arch/$(ARCH)/sn/kernel arch/$(ARCH)/sn/io \ - arch/$(ARCH)/sn/fakeprom -drivers-$(CONFIG_PCI) += arch/$(ARCH)/pci/ -drivers-$(CONFIG_IA64_HP_SIM) += arch/$(ARCH)/hp/sim/ -drivers-$(CONFIG_IA64_HP_ZX1) += arch/$(ARCH)/hp/common/ arch/$(ARCH)/hp/zx1/ - -ifdef CONFIG_IA64_SGI_SN - CFLAGS += -DBRINGUP - SUBDIRS += arch/$(ARCH)/sn/fakeprom -endif +cflags-$(CONFIG_ITANIUM_BSTEP_SPECIFIC) += -mb-step +cflags-$(CONFIG_IA64_SGI_SN) += -DBRINGUP -makeboot = $(call descend,arch/ia64/boot,$(1)) -maketool = $(call descend,arch/ia64/tools,$(1)) +CFLAGS += $(cflags-y) +HEAD := arch/ia64/kernel/head.o arch/ia64/kernel/init_task.o -.PHONY: compressed archclean archmrproper $(TOPDIR)/include/asm-ia64/offsets.h +libs-y += arch/ia64/lib/ +core-y += arch/ia64/kernel/ arch/ia64/mm/ +core-$(CONFIG_IA32_SUPPORT) += arch/ia64/ia32/ +core-$(CONFIG_IA64_DIG) += arch/ia64/dig/ +core-$(CONFIG_IA64_GENERIC) += arch/ia64/dig/ arch/ia64/hp/common/ arch/ia64/hp/zx1/ \ + arch/ia64/hp/sim/ +core-$(CONFIG_IA64_HP_ZX1) += arch/ia64/dig/ +core-$(CONFIG_IA64_SGI_SN) += arch/ia64/sn/kernel/ \ + arch/ia64/sn/io/ \ + arch/ia64/sn/kernel/sn2/ +drivers-$(CONFIG_PCI) += arch/ia64/pci/ +drivers-$(CONFIG_IA64_HP_SIM) += arch/ia64/hp/sim/ +drivers-$(CONFIG_IA64_HP_ZX1) += arch/ia64/hp/common/ arch/ia64/hp/zx1/ +drivers-$(CONFIG_IA64_SGI_SN) += arch/ia64/sn/fakeprom/ + +makeboot =$(Q)$(MAKE) -f scripts/Makefile.build obj=arch/ia64/boot $(1) +maketool =$(Q)$(MAKE) -f scripts/Makefile.build obj=arch/ia64/tools $(1) -all: compressed boot +.PHONY: boot compressed archclean archmrproper include/asm-ia64/offsets.h -boot: vmlinux - +@$(call makeboot,all) +all compressed: vmlinux.gz -compressed: vmlinux - $(OBJCOPY) $(OBJCOPYFLAGS) vmlinux vmlinux-tmp - gzip vmlinux-tmp - mv vmlinux-tmp.gz vmlinux.gz +vmlinux.gz: vmlinux + $(call makeboot,vmlinux.gz) +archmrproper: archclean: - $(MAKE) -rR -f scripts/Makefile.clean obj=arch/$(ARCH)/boot + $(Q)$(MAKE) -f scripts/Makefile.clean obj=arch/ia64/boot -archmrproper: +CLEAN_FILES += include/asm-ia64/offsets.h vmlinux.gz bootloader + +prepare: include/asm-ia64/offsets.h -prepare: $(TOPDIR)/include/asm-ia64/offsets.h +boot: lib/lib.a vmlinux + $(call makeboot,$@) -$(TOPDIR)/include/asm-ia64/offsets.h: include/asm include/linux/version.h \ - include/config/MARKER - +@$(call maketool,$@) +include/asm-ia64/offsets.h: include/asm include/linux/version.h include/config/MARKER + $(call maketool,$@) diff -Nru a/arch/ia64/boot/Makefile b/arch/ia64/boot/Makefile --- a/arch/ia64/boot/Makefile Mon Dec 23 21:21:56 2002 +++ b/arch/ia64/boot/Makefile Mon Dec 23 21:21:56 2002 @@ -8,20 +8,33 @@ # Copyright (C) 1998 by David Mosberger-Tang # -LINKFLAGS = -static -T $(src)/bootloader.lds +EXTRA_TARGETS := vmlinux.bin vmlinux.gz -OBJS = $(obj)/bootloader.o +targets-$(CONFIG_IA64_HP_SIM) += bootloader +targets-$(CONFIG_IA64_GENERIC) += bootloader +EXTRA_TARGETS += $(sort $(targets-y)) -targets-$(CONFIG_IA64_HP_SIM) += bootloader -targets-$(CONFIG_IA64_GENERIC) += bootloader +quiet_cmd_cptotop = LN $@ + cmd_cptotop = ln -f $< $@ -CFLAGS := $(CFLAGS) $(CFLAGS_KERNEL) +vmlinux.gz: $(obj)/vmlinux.gz $(targets-y) + $(call cmd,cptotop) + @echo ' Kernel: $@ is ready' -all: $(targets-y) +boot: bootloader -bootloader: $(OBJS) - $(LD) $(LINKFLAGS) $(OBJS) $(TOPDIR)/lib/lib.a $(TOPDIR)/arch/$(ARCH)/lib/lib.a \ - -o bootloader +bootloader: $(obj)/bootloader + $(call cmd,cptotop) -clean: - rm -f $(TARGETS) +$(obj)/vmlinux.gz: $(obj)/vmlinux.bin FORCE + $(call if_changed,gzip) + +$(obj)/vmlinux.bin: vmlinux FORCE + $(call if_changed,objcopy) + + +LDFLAGS_bootloader = -static -T + +$(obj)/bootloader: $(src)/bootloader.lds $(obj)/bootloader.o \ + lib/lib.a arch/ia64/lib/lib.a FORCE + $(call if_changed,ld) diff -Nru a/arch/ia64/boot/bootloader.c b/arch/ia64/boot/bootloader.c --- a/arch/ia64/boot/bootloader.c Mon Dec 23 21:22:00 2002 +++ b/arch/ia64/boot/bootloader.c Mon Dec 23 21:22:00 2002 @@ -3,12 +3,14 @@ * * Loads an ELF kernel. * - * Copyright (C) 1998, 1999, 2001 Hewlett-Packard Co - * Copyright (C) 1998, 1999, 2001 David Mosberger-Tang - * Copyright (C) 1998, 1999 Stephane Eranian + * Copyright (C) 1998-2002 Hewlett-Packard Co + * David Mosberger-Tang + * Stephane Eranian * * 01/07/99 S.Eranian modified to pass command line arguments to kernel */ +struct task_struct; /* forward declaration for elf.h */ + #include #include #include @@ -53,6 +55,15 @@ #include "../kernel/fw-emu.c" +/* + * Set a break point on this function so that symbols are available to set breakpoints in + * the kernel being debugged. + */ +static void +debug_break (void) +{ +} + static void cons_write (const char *buf) { @@ -187,6 +198,7 @@ ssc(0, (long) kpath, 0, 0, SSC_LOAD_SYMBOLS); + debug_break(); asm volatile ("mov sp=%2; mov r28=%1; br.sptk.few %0" :: "b"(e_entry), "r"(bp), "r"(__pa(&stack))); diff -Nru a/arch/ia64/hp/sim/simscsi.c b/arch/ia64/hp/sim/simscsi.c --- a/arch/ia64/hp/sim/simscsi.c Mon Dec 23 21:21:54 2002 +++ b/arch/ia64/hp/sim/simscsi.c Mon Dec 23 21:21:54 2002 @@ -23,7 +23,7 @@ #include "../drivers/scsi/hosts.h" #include "simscsi.h" -#define DEBUG_SIMSCSI 1 +#define DEBUG_SIMSCSI 0 /* Simulator system calls: */ @@ -377,6 +377,12 @@ return 0; } +int +simscsi_host_reset (Scsi_Cmnd *sc) +{ + printk ("simscsi_host_reset: not implemented\n"); + return 0; +} static Scsi_Host_Template driver_template = SIMSCSI; diff -Nru a/arch/ia64/hp/sim/simscsi.h b/arch/ia64/hp/sim/simscsi.h --- a/arch/ia64/hp/sim/simscsi.h Mon Dec 23 21:21:50 2002 +++ b/arch/ia64/hp/sim/simscsi.h Mon Dec 23 21:21:50 2002 @@ -1,7 +1,7 @@ /* * Simulated SCSI driver. * - * Copyright (C) 1999 Hewlett-Packard Co + * Copyright (C) 1999, 2002 Hewlett-Packard Co * David Mosberger-Tang */ #ifndef SIMSCSI_H @@ -21,14 +21,17 @@ sector_t, int[]); #define SIMSCSI { \ + .name = "simscsi", \ .detect = simscsi_detect, \ .release = simscsi_release, \ .info = simscsi_info, \ .queuecommand = simscsi_queuecommand, \ + .eh_host_reset_handler = simscsi_host_reset, \ .bios_param = simscsi_biosparam, \ .can_queue = SIMSCSI_REQ_QUEUE_LEN, \ .this_id = -1, \ .sg_tablesize = SG_ALL, \ + .max_sectors = 1024, \ .cmd_per_lun = SIMSCSI_REQ_QUEUE_LEN, \ .present = 0, \ .unchecked_isa_dma = 0, \ diff -Nru a/arch/ia64/hp/zx1/hpzx1_misc.c b/arch/ia64/hp/zx1/hpzx1_misc.c --- a/arch/ia64/hp/zx1/hpzx1_misc.c Mon Dec 23 21:21:54 2002 +++ b/arch/ia64/hp/zx1/hpzx1_misc.c Mon Dec 23 21:21:54 2002 @@ -180,7 +180,6 @@ list_add_tail(&dev->bus_list, &bus->devices); list_add_tail(&dev->global_list, &pci_devices); - strcpy(dev->dev.name, dev->name); strcpy(dev->dev.bus_id, dev->slot_name); ret = device_register(&dev->dev); if (ret < 0) @@ -335,7 +334,7 @@ extern void sba_init(void); -static void +static int hpzx1_init (void) { /* zx1 has a hardware I/O TLB which lets us DMA from any device to any address */ @@ -343,6 +342,7 @@ hpzx1_acpi_dev_init(); sba_init(); + return 0; } subsys_initcall(hpzx1_init); diff -Nru a/arch/ia64/ia32/Makefile b/arch/ia64/ia32/Makefile --- a/arch/ia64/ia32/Makefile Mon Dec 23 21:21:57 2002 +++ b/arch/ia64/ia32/Makefile Mon Dec 23 21:21:57 2002 @@ -2,5 +2,5 @@ # Makefile for the ia32 kernel emulation subsystem. # -obj-y := ia32_entry.o sys_ia32.o ia32_ioctl.o ia32_signal.o ia32_support.o ia32_traps.o \ - binfmt_elf32.o ia32_ldt.o +obj-y := ia32_entry.o sys_ia32.o ia32_ioctl.o ia32_signal.o \ + ia32_support.o ia32_traps.o binfmt_elf32.o ia32_ldt.o diff -Nru a/arch/ia64/ia32/binfmt_elf32.c b/arch/ia64/ia32/binfmt_elf32.c --- a/arch/ia64/ia32/binfmt_elf32.c Mon Dec 23 21:22:00 2002 +++ b/arch/ia64/ia32/binfmt_elf32.c Mon Dec 23 21:22:00 2002 @@ -162,9 +162,11 @@ { unsigned long stack_base; struct vm_area_struct *mpnt; + struct mm_struct *mm = current->mm; int i; stack_base = IA32_STACK_TOP - MAX_ARG_PAGES*PAGE_SIZE; + mm->arg_start = bprm->p + stack_base; bprm->p += stack_base; if (bprm->loader) @@ -174,6 +176,11 @@ mpnt = kmem_cache_alloc(vm_area_cachep, SLAB_KERNEL); if (!mpnt) return -ENOMEM; + + if (!vm_enough_memory((IA32_STACK_TOP - (PAGE_MASK & (unsigned long) bprm->p))>>PAGE_SHIFT)) { + kmem_cache_free(vm_area_cachep, mpnt); + return -ENOMEM; + } down_write(¤t->mm->mmap_sem); { diff -Nru a/arch/ia64/ia32/ia32_entry.S b/arch/ia64/ia32/ia32_entry.S --- a/arch/ia64/ia32/ia32_entry.S Mon Dec 23 21:21:55 2002 +++ b/arch/ia64/ia32/ia32_entry.S Mon Dec 23 21:21:55 2002 @@ -196,7 +196,7 @@ data8 sys32_fork data8 sys_read data8 sys_write - data8 sys_open /* 5 */ + data8 sys32_open /* 5 */ data8 sys_close data8 sys32_waitpid data8 sys_creat @@ -221,7 +221,7 @@ data8 sys32_alarm data8 sys32_ni_syscall data8 sys32_pause - data8 sys32_utime /* 30 */ + data8 compat_sys_utime /* 30 */ data8 sys32_ni_syscall /* old stty syscall holder */ data8 sys32_ni_syscall /* old gtty syscall holder */ data8 sys_access @@ -234,7 +234,7 @@ data8 sys_rmdir /* 40 */ data8 sys_dup data8 sys32_pipe - data8 sys32_times + data8 compat_sys_times data8 sys32_ni_syscall /* old prof syscall holder */ data8 sys32_brk /* 45 */ data8 sys_setgid /* 16-bit version */ @@ -295,11 +295,11 @@ data8 sys32_ioperm data8 sys32_socketcall data8 sys_syslog - data8 sys32_setitimer - data8 sys32_getitimer /* 105 */ - data8 sys32_newstat - data8 sys32_newlstat - data8 sys32_newfstat + data8 compat_sys_setitimer + data8 compat_sys_getitimer /* 105 */ + data8 compat_sys_newstat + data8 compat_sys_newlstat + data8 compat_sys_newfstat data8 sys32_ni_syscall data8 sys32_iopl /* 110 */ data8 sys_vhangup @@ -353,7 +353,7 @@ data8 sys_sched_get_priority_max data8 sys_sched_get_priority_min /* 160 */ data8 sys32_sched_rr_get_interval - data8 sys32_nanosleep + data8 compat_sys_nanosleep data8 sys_mremap data8 sys_setresuid /* 16-bit version */ data8 sys32_getresuid16 /* 16-bit version */ /* 165 */ diff -Nru a/arch/ia64/ia32/ia32_signal.c b/arch/ia64/ia32/ia32_signal.c --- a/arch/ia64/ia32/ia32_signal.c Mon Dec 23 21:21:50 2002 +++ b/arch/ia64/ia32/ia32_signal.c Mon Dec 23 21:21:50 2002 @@ -22,6 +22,7 @@ #include #include #include +#include #include #include @@ -165,10 +166,10 @@ * sw ar.fsr(0:15) * tag ar.fsr(16:31) with odd numbered bits not used * (read returns 0, writes ignored) - * ipoff ar.fir(0:31) RO - * cssel ar.fir(32:47) RO - * dataoff ar.fdr(0:31) RO - * datasel ar.fdr(32:47) RO + * ipoff ar.fir(0:31) + * cssel ar.fir(32:47) + * dataoff ar.fdr(0:31) + * datasel ar.fdr(32:47) * * _st[(0+TOS)%8] f8 * _st[(1+TOS)%8] f9 (f8, f9 from ptregs) @@ -328,7 +329,7 @@ unsigned long num64, mxcsr; struct _fpreg_ia32 *fpregp; char buf[32]; - unsigned long fsr, fcr; + unsigned long fsr, fcr, fir, fdr; int fp_tos, fr8_st_map; if (!access_ok(VERIFY_READ, save, sizeof(*save))) @@ -345,6 +346,8 @@ */ asm volatile ( "mov %0=ar.fsr;" : "=r"(fsr)); asm volatile ( "mov %0=ar.fcr;" : "=r"(fcr)); + asm volatile ( "mov %0=ar.fir;" : "=r"(fir)); + asm volatile ( "mov %0=ar.fdr;" : "=r"(fdr)); __get_user(mxcsr, (unsigned int *)&save->mxcsr); /* setting bits 0..5 8..12 with cw and 39..47 from mxcsr */ @@ -355,14 +358,34 @@ /* setting bits 0..31 with sw and tag and 32..37 from mxcsr */ __get_user(lo, (unsigned int *)&save->sw); + /* set bits 15,7 (fsw.b, fsw.es) to reflect the current error status */ + if ( !(lo & 0x7f) ) + lo &= (~0x8080); __get_user(hi, (unsigned int *)&save->tag); num64 = mxcsr & 0x3f; num64 = (num64 << 16) | (hi & 0xffff); num64 = (num64 << 16) | (lo & 0xffff); fsr = (fsr & (~0x3fffffffff)) | num64; + /* setting bits 0..47 with cssel and ipoff */ + __get_user(lo, (unsigned int *)&save->ipoff); + __get_user(hi, (unsigned int *)&save->cssel); + num64 = hi & 0xffff; + num64 = (num64 << 32) | lo; + fir = (fir & (~0xffffffffffff)) | num64; + + /* setting bits 0..47 with datasel and dataoff */ + __get_user(lo, (unsigned int *)&save->dataoff); + __get_user(hi, (unsigned int *)&save->datasel); + num64 = hi & 0xffff; + num64 = (num64 << 32) | lo; + fdr = (fdr & (~0xffffffffffff)) | num64; + asm volatile ( "mov ar.fsr=%0;" :: "r"(fsr)); asm volatile ( "mov ar.fcr=%0;" :: "r"(fcr)); + asm volatile ( "mov ar.fir=%0;" :: "r"(fir)); + asm volatile ( "mov ar.fdr=%0;" :: "r"(fdr)); + /* * restore f8, f9 onto pt_regs * restore f10..f15 onto live registers @@ -570,8 +593,8 @@ } asmlinkage long -sys32_rt_sigtimedwait (sigset32_t *uthese, siginfo_t32 *uinfo, struct timespec32 *uts, - unsigned int sigsetsize) +sys32_rt_sigtimedwait (sigset32_t *uthese, siginfo_t32 *uinfo, + struct compat_timespec *uts, unsigned int sigsetsize) { extern asmlinkage long sys_rt_sigtimedwait (const sigset_t *, siginfo_t *, const struct timespec *, size_t); diff -Nru a/arch/ia64/ia32/sys_ia32.c b/arch/ia64/ia32/sys_ia32.c --- a/arch/ia64/ia32/sys_ia32.c Mon Dec 23 21:21:57 2002 +++ b/arch/ia64/ia32/sys_ia32.c Mon Dec 23 21:21:57 2002 @@ -20,7 +20,6 @@ #include #include #include -#include #include #include #include @@ -38,7 +37,6 @@ #include #include #include -#include #include #include #include @@ -49,6 +47,7 @@ #include #include #include +#include #include #include @@ -175,8 +174,7 @@ return r; } -static inline int -putstat (struct stat32 *ubuf, struct kstat *stat) +int cp_compat_stat(struct kstat *stat, struct compat_stat *ubuf) { int err; @@ -194,50 +192,17 @@ err |= __put_user(high2lowgid(stat->gid), &ubuf->st_gid); err |= __put_user(stat->rdev, &ubuf->st_rdev); err |= __put_user(stat->size, &ubuf->st_size); - err |= __put_user(stat->atime, &ubuf->st_atime); - err |= __put_user(stat->mtime, &ubuf->st_mtime); - err |= __put_user(stat->ctime, &ubuf->st_ctime); + err |= __put_user(stat->atime.tv_sec, &ubuf->st_atime); + err |= __put_user(stat->atime.tv_nsec, &ubuf->st_atime_nsec); + err |= __put_user(stat->mtime.tv_sec, &ubuf->st_mtime); + err |= __put_user(stat->mtime.tv_nsec, &ubuf->st_mtime_nsec); + err |= __put_user(stat->ctime.tv_sec, &ubuf->st_ctime); + err |= __put_user(stat->ctime.tv_nsec, &ubuf->st_ctime_nsec); err |= __put_user(stat->blksize, &ubuf->st_blksize); err |= __put_user(stat->blocks, &ubuf->st_blocks); return err; } -asmlinkage long -sys32_newstat (char *filename, struct stat32 *statbuf) -{ - struct kstat stat; - int ret = vfs_stat(filename, &stat); - - if (!ret) - ret = putstat(statbuf, &stat); - - return ret; -} - -asmlinkage long -sys32_newlstat (char *filename, struct stat32 *statbuf) -{ - struct kstat stat; - int ret = vfs_lstat(filename, &stat); - - if (!ret) - ret = putstat(statbuf, &stat); - - return ret; -} - -asmlinkage long -sys32_newfstat (unsigned int fd, struct stat32 *statbuf) -{ - struct kstat stat; - int ret = vfs_fstat(fd, &stat); - - if (!ret) - ret = putstat(statbuf, &stat); - - return ret; -} - #if PAGE_SHIFT > IA32_PAGE_SHIFT @@ -616,7 +581,8 @@ /* end address is 4KB aligned but not page aligned. */ retval = mprotect_subpage(PAGE_START(end), prot); if (retval < 0) - return retval; + goto out; + end = PAGE_START(end); } retval = sys_mprotect(start, end - start, prot); @@ -697,90 +663,20 @@ return ret; } -struct timeval32 -{ - int tv_sec, tv_usec; -}; - -struct itimerval32 -{ - struct timeval32 it_interval; - struct timeval32 it_value; -}; - static inline long -get_tv32 (struct timeval *o, struct timeval32 *i) +get_tv32 (struct timeval *o, struct compat_timeval *i) { return (!access_ok(VERIFY_READ, i, sizeof(*i)) || (__get_user(o->tv_sec, &i->tv_sec) | __get_user(o->tv_usec, &i->tv_usec))); } static inline long -put_tv32 (struct timeval32 *o, struct timeval *i) +put_tv32 (struct compat_timeval *o, struct timeval *i) { return (!access_ok(VERIFY_WRITE, o, sizeof(*o)) || (__put_user(i->tv_sec, &o->tv_sec) | __put_user(i->tv_usec, &o->tv_usec))); } -static inline long -get_it32 (struct itimerval *o, struct itimerval32 *i) -{ - return (!access_ok(VERIFY_READ, i, sizeof(*i)) || - (__get_user(o->it_interval.tv_sec, &i->it_interval.tv_sec) | - __get_user(o->it_interval.tv_usec, &i->it_interval.tv_usec) | - __get_user(o->it_value.tv_sec, &i->it_value.tv_sec) | - __get_user(o->it_value.tv_usec, &i->it_value.tv_usec))); -} - -static inline long -put_it32 (struct itimerval32 *o, struct itimerval *i) -{ - return (!access_ok(VERIFY_WRITE, o, sizeof(*o)) || - (__put_user(i->it_interval.tv_sec, &o->it_interval.tv_sec) | - __put_user(i->it_interval.tv_usec, &o->it_interval.tv_usec) | - __put_user(i->it_value.tv_sec, &o->it_value.tv_sec) | - __put_user(i->it_value.tv_usec, &o->it_value.tv_usec))); -} - -extern int do_getitimer (int which, struct itimerval *value); - -asmlinkage long -sys32_getitimer (int which, struct itimerval32 *it) -{ - struct itimerval kit; - int error; - - error = do_getitimer(which, &kit); - if (!error && put_it32(it, &kit)) - error = -EFAULT; - - return error; -} - -extern int do_setitimer (int which, struct itimerval *, struct itimerval *); - -asmlinkage long -sys32_setitimer (int which, struct itimerval32 *in, struct itimerval32 *out) -{ - struct itimerval kin, kout; - int error; - - if (in) { - if (get_it32(&kin, in)) - return -EFAULT; - } else - memset(&kin, 0, sizeof(kin)); - - error = do_setitimer(which, &kin, out ? &kout : NULL); - if (error || !out) - return error; - if (put_it32(out, &kout)) - return -EFAULT; - - return 0; - -} - asmlinkage unsigned long sys32_alarm (unsigned int seconds) { @@ -802,42 +698,11 @@ /* Translations due to time_t size differences. Which affects all sorts of things, like timeval and itimerval. */ -struct utimbuf_32 { - int atime; - int mtime; -}; - -extern asmlinkage long sys_utimes(char * filename, struct timeval * utimes); -extern asmlinkage long sys_gettimeofday (struct timeval *tv, struct timezone *tz); - -asmlinkage long -sys32_utime (char *filename, struct utimbuf_32 *times32) -{ - mm_segment_t old_fs = get_fs(); - struct timeval tv[2], *tvp; - long ret; - - if (times32) { - if (get_user(tv[0].tv_sec, ×32->atime)) - return -EFAULT; - tv[0].tv_usec = 0; - if (get_user(tv[1].tv_sec, ×32->mtime)) - return -EFAULT; - tv[1].tv_usec = 0; - set_fs(KERNEL_DS); - tvp = tv; - } else - tvp = NULL; - ret = sys_utimes(filename, tvp); - set_fs(old_fs); - return ret; -} - extern struct timezone sys_tz; extern int do_sys_settimeofday (struct timeval *tv, struct timezone *tz); asmlinkage long -sys32_gettimeofday (struct timeval32 *tv, struct timezone *tz) +sys32_gettimeofday (struct compat_timeval *tv, struct timezone *tz) { if (tv) { struct timeval ktv; @@ -853,7 +718,7 @@ } asmlinkage long -sys32_settimeofday (struct timeval32 *tv, struct timezone *tz) +sys32_settimeofday (struct compat_timeval *tv, struct timezone *tz) { struct timeval ktv; struct timezone ktz; @@ -1003,7 +868,7 @@ #define ROUND_UP_TIME(x,y) (((x)+(y)-1)/(y)) asmlinkage long -sys32_select (int n, fd_set *inp, fd_set *outp, fd_set *exp, struct timeval32 *tvp32) +sys32_select (int n, fd_set *inp, fd_set *outp, fd_set *exp, struct compat_timeval *tvp32) { fd_set_bits fds; char *bits; @@ -1110,28 +975,7 @@ if (copy_from_user(&a, arg, sizeof(a))) return -EFAULT; return sys32_select(a.n, (fd_set *) A(a.inp), (fd_set *) A(a.outp), (fd_set *) A(a.exp), - (struct timeval32 *) A(a.tvp)); -} - -extern asmlinkage long sys_nanosleep (struct timespec *rqtp, struct timespec *rmtp); - -asmlinkage long -sys32_nanosleep (struct timespec32 *rqtp, struct timespec32 *rmtp) -{ - struct timespec t; - int ret; - mm_segment_t old_fs = get_fs(); - - if (get_user (t.tv_sec, &rqtp->tv_sec) || get_user (t.tv_nsec, &rqtp->tv_nsec)) - return -EFAULT; - set_fs(KERNEL_DS); - ret = sys_nanosleep(&t, rmtp ? &t : NULL); - set_fs(old_fs); - if (rmtp && ret == -EINTR) { - if (put_user(t.tv_sec, &rmtp->tv_sec) || put_user(t.tv_nsec, &rmtp->tv_nsec)) - return -EFAULT; - } - return ret; + (struct compat_timeval *) A(a.tvp)); } struct iovec32 { unsigned int iov_base; int iov_len; }; @@ -1304,7 +1148,7 @@ }; struct cmsghdr32 { - __kernel_size_t32 cmsg_len; + compat_size_t cmsg_len; int cmsg_level; int cmsg_type; }; @@ -1369,7 +1213,7 @@ { struct cmsghdr *kcmsg, *kcmsg_base; __kernel_size_t kcmlen, tmp; - __kernel_size_t32 ucmlen; + compat_size_t ucmlen; struct cmsghdr32 *ucmsg; long err; @@ -1893,10 +1737,10 @@ extern asmlinkage long sys_getpeername(int fd, struct sockaddr *usockaddr, int *usockaddr_len); extern asmlinkage long sys_send(int fd, void *buff, size_t len, unsigned flags); -extern asmlinkage long sys_sendto(int fd, u32 buff, __kernel_size_t32 len, +extern asmlinkage long sys_sendto(int fd, u32 buff, compat_size_t len, unsigned flags, u32 addr, int addr_len); extern asmlinkage long sys_recv(int fd, void *ubuf, size_t size, unsigned flags); -extern asmlinkage long sys_recvfrom(int fd, u32 ubuf, __kernel_size_t32 size, +extern asmlinkage long sys_recvfrom(int fd, u32 ubuf, compat_size_t size, unsigned flags, u32 addr, u32 addr_len); extern asmlinkage long sys_setsockopt(int fd, int level, int optname, char *optval, int optlen); @@ -1994,11 +1838,11 @@ struct ipc_perm32 { key_t key; - __kernel_uid_t32 uid; - __kernel_gid_t32 gid; - __kernel_uid_t32 cuid; - __kernel_gid_t32 cgid; - __kernel_mode_t32 mode; + compat_uid_t uid; + compat_gid_t gid; + compat_uid_t cuid; + compat_gid_t cgid; + compat_mode_t mode; unsigned short seq; }; @@ -2008,7 +1852,7 @@ __kernel_gid32_t32 gid; __kernel_uid32_t32 cuid; __kernel_gid32_t32 cgid; - __kernel_mode_t32 mode; + compat_mode_t mode; unsigned short __pad1; unsigned short seq; unsigned short __pad2; @@ -2018,8 +1862,8 @@ struct semid_ds32 { struct ipc_perm32 sem_perm; /* permissions .. see ipc.h */ - __kernel_time_t32 sem_otime; /* last semop time */ - __kernel_time_t32 sem_ctime; /* last change time */ + compat_time_t sem_otime; /* last semop time */ + compat_time_t sem_ctime; /* last change time */ u32 sem_base; /* ptr to first semaphore in array */ u32 sem_pending; /* pending operations to be processed */ u32 sem_pending_last; /* last pending operation */ @@ -2029,9 +1873,9 @@ struct semid64_ds32 { struct ipc64_perm32 sem_perm; - __kernel_time_t32 sem_otime; + compat_time_t sem_otime; unsigned int __unused1; - __kernel_time_t32 sem_ctime; + compat_time_t sem_ctime; unsigned int __unused2; unsigned int sem_nsems; unsigned int __unused3; @@ -2042,9 +1886,9 @@ struct ipc_perm32 msg_perm; u32 msg_first; u32 msg_last; - __kernel_time_t32 msg_stime; - __kernel_time_t32 msg_rtime; - __kernel_time_t32 msg_ctime; + compat_time_t msg_stime; + compat_time_t msg_rtime; + compat_time_t msg_ctime; u32 wwait; u32 rwait; unsigned short msg_cbytes; @@ -2056,17 +1900,17 @@ struct msqid64_ds32 { struct ipc64_perm32 msg_perm; - __kernel_time_t32 msg_stime; + compat_time_t msg_stime; unsigned int __unused1; - __kernel_time_t32 msg_rtime; + compat_time_t msg_rtime; unsigned int __unused2; - __kernel_time_t32 msg_ctime; + compat_time_t msg_ctime; unsigned int __unused3; unsigned int msg_cbytes; unsigned int msg_qnum; unsigned int msg_qbytes; - __kernel_pid_t32 msg_lspid; - __kernel_pid_t32 msg_lrpid; + compat_pid_t msg_lspid; + compat_pid_t msg_lrpid; unsigned int __unused4; unsigned int __unused5; }; @@ -2074,9 +1918,9 @@ struct shmid_ds32 { struct ipc_perm32 shm_perm; int shm_segsz; - __kernel_time_t32 shm_atime; - __kernel_time_t32 shm_dtime; - __kernel_time_t32 shm_ctime; + compat_time_t shm_atime; + compat_time_t shm_dtime; + compat_time_t shm_ctime; __kernel_ipc_pid_t32 shm_cpid; __kernel_ipc_pid_t32 shm_lpid; unsigned short shm_nattch; @@ -2084,15 +1928,15 @@ struct shmid64_ds32 { struct ipc64_perm shm_perm; - __kernel_size_t32 shm_segsz; - __kernel_time_t32 shm_atime; + compat_size_t shm_segsz; + compat_time_t shm_atime; unsigned int __unused1; - __kernel_time_t32 shm_dtime; + compat_time_t shm_dtime; unsigned int __unused2; - __kernel_time_t32 shm_ctime; + compat_time_t shm_ctime; unsigned int __unused3; - __kernel_pid_t32 shm_cpid; - __kernel_pid_t32 shm_lpid; + compat_pid_t shm_cpid; + compat_pid_t shm_lpid; unsigned int shm_nattch; unsigned int __unused4; unsigned int __unused5; @@ -2615,8 +2459,8 @@ } struct rusage32 { - struct timeval32 ru_utime; - struct timeval32 ru_stime; + struct compat_timeval ru_utime; + struct compat_timeval ru_stime; int ru_maxrss; int ru_ixrss; int ru_idrss; @@ -2708,37 +2552,6 @@ return ret; } -struct tms32 { - __kernel_clock_t32 tms_utime; - __kernel_clock_t32 tms_stime; - __kernel_clock_t32 tms_cutime; - __kernel_clock_t32 tms_cstime; -}; - -extern asmlinkage long sys_times (struct tms * tbuf); - -asmlinkage long -sys32_times (struct tms32 *tbuf) -{ - mm_segment_t old_fs = get_fs(); - struct tms t; - long ret; - int err; - - set_fs(KERNEL_DS); - ret = sys_times(tbuf ? &t : NULL); - set_fs(old_fs); - if (tbuf) { - err = put_user (IA32_TICK(t.tms_utime), &tbuf->tms_utime); - err |= put_user (IA32_TICK(t.tms_stime), &tbuf->tms_stime); - err |= put_user (IA32_TICK(t.tms_cutime), &tbuf->tms_cutime); - err |= put_user (IA32_TICK(t.tms_cstime), &tbuf->tms_cstime); - if (err) - ret = -EFAULT; - } - return IA32_TICK(ret); -} - static unsigned int ia32_peek (struct pt_regs *regs, struct task_struct *child, unsigned long addr, unsigned int *val) { @@ -2899,57 +2712,152 @@ } static int -save_ia32_fpstate (struct task_struct *tsk, struct _fpstate_ia32 *save) +save_ia32_fpstate (struct task_struct *tsk, struct ia32_user_i387_struct *save) { struct switch_stack *swp; struct pt_regs *ptp; int i, tos; if (!access_ok(VERIFY_WRITE, save, sizeof(*save))) - return -EIO; - __put_user(tsk->thread.fcr, &save->cw); - __put_user(tsk->thread.fsr, &save->sw); - __put_user(tsk->thread.fsr >> 32, &save->tag); - __put_user(tsk->thread.fir, &save->ipoff); - __put_user(__USER_CS, &save->cssel); - __put_user(tsk->thread.fdr, &save->dataoff); - __put_user(__USER_DS, &save->datasel); + return -EFAULT; + + __put_user(tsk->thread.fcr & 0xffff, &save->cwd); + __put_user(tsk->thread.fsr & 0xffff, &save->swd); + __put_user((tsk->thread.fsr>>16) & 0xffff, &save->twd); + __put_user(tsk->thread.fir, &save->fip); + __put_user((tsk->thread.fir>>32) & 0xffff, &save->fcs); + __put_user(tsk->thread.fdr, &save->foo); + __put_user((tsk->thread.fdr>>32) & 0xffff, &save->fos); + /* * Stack frames start with 16-bytes of temp space */ swp = (struct switch_stack *)(tsk->thread.ksp + 16); ptp = ia64_task_regs(tsk); - tos = (tsk->thread.fsr >> 11) & 3; + tos = (tsk->thread.fsr >> 11) & 7; for (i = 0; i < 8; i++) - put_fpreg(i, &save->_st[i], ptp, swp, tos); + put_fpreg(i, (struct _fpreg_ia32 *)&save->st_space[4*i], ptp, swp, tos); return 0; } static int -restore_ia32_fpstate (struct task_struct *tsk, struct _fpstate_ia32 *save) +restore_ia32_fpstate (struct task_struct *tsk, struct ia32_user_i387_struct *save) { struct switch_stack *swp; struct pt_regs *ptp; - int i, tos, ret; - int fsrlo, fsrhi; + int i, tos; + unsigned int fsrlo, fsrhi, num32; if (!access_ok(VERIFY_READ, save, sizeof(*save))) - return(-EIO); - ret = __get_user(tsk->thread.fcr, (unsigned int *)&save->cw); - ret |= __get_user(fsrlo, (unsigned int *)&save->sw); - ret |= __get_user(fsrhi, (unsigned int *)&save->tag); - tsk->thread.fsr = ((long)fsrhi << 32) | (long)fsrlo; - ret |= __get_user(tsk->thread.fir, (unsigned int *)&save->ipoff); - ret |= __get_user(tsk->thread.fdr, (unsigned int *)&save->dataoff); + return(-EFAULT); + + __get_user(num32, (unsigned int *)&save->cwd); + tsk->thread.fcr = (tsk->thread.fcr & (~0x1f3f)) | (num32 & 0x1f3f); + __get_user(fsrlo, (unsigned int *)&save->swd); + __get_user(fsrhi, (unsigned int *)&save->twd); + num32 = (fsrhi << 16) | fsrlo; + tsk->thread.fsr = (tsk->thread.fsr & (~0xffffffff)) | num32; + __get_user(num32, (unsigned int *)&save->fip); + tsk->thread.fir = (tsk->thread.fir & (~0xffffffff)) | num32; + __get_user(num32, (unsigned int *)&save->foo); + tsk->thread.fdr = (tsk->thread.fdr & (~0xffffffff)) | num32; + /* * Stack frames start with 16-bytes of temp space */ swp = (struct switch_stack *)(tsk->thread.ksp + 16); ptp = ia64_task_regs(tsk); - tos = (tsk->thread.fsr >> 11) & 3; + tos = (tsk->thread.fsr >> 11) & 7; for (i = 0; i < 8; i++) - get_fpreg(i, &save->_st[i], ptp, swp, tos); - return ret ? -EFAULT : 0; + get_fpreg(i, (struct _fpreg_ia32 *)&save->st_space[4*i], ptp, swp, tos); + return 0; +} + +static int +save_ia32_fpxstate (struct task_struct *tsk, struct ia32_user_fxsr_struct *save) +{ + struct switch_stack *swp; + struct pt_regs *ptp; + int i, tos; + unsigned long mxcsr=0; + unsigned long num128[2]; + + if (!access_ok(VERIFY_WRITE, save, sizeof(*save))) + return -EFAULT; + + __put_user(tsk->thread.fcr & 0xffff, &save->cwd); + __put_user(tsk->thread.fsr & 0xffff, &save->swd); + __put_user((tsk->thread.fsr>>16) & 0xffff, &save->twd); + __put_user(tsk->thread.fir, &save->fip); + __put_user((tsk->thread.fir>>32) & 0xffff, &save->fcs); + __put_user(tsk->thread.fdr, &save->foo); + __put_user((tsk->thread.fdr>>32) & 0xffff, &save->fos); + + /* + * Stack frames start with 16-bytes of temp space + */ + swp = (struct switch_stack *)(tsk->thread.ksp + 16); + ptp = ia64_task_regs(tsk); + tos = (tsk->thread.fsr >> 11) & 7; + for (i = 0; i < 8; i++) + put_fpreg(i, (struct _fpreg_ia32 *)&save->st_space[4*i], ptp, swp, tos); + + mxcsr = ((tsk->thread.fcr>>32) & 0xff80) | ((tsk->thread.fsr>>32) & 0x3f); + __put_user(mxcsr & 0xffff, &save->mxcsr); + for (i = 0; i < 8; i++) { + memcpy(&(num128[0]), &(swp->f16) + i*2, sizeof(unsigned long)); + memcpy(&(num128[1]), &(swp->f17) + i*2, sizeof(unsigned long)); + copy_to_user(&save->xmm_space[0] + 4*i, num128, sizeof(struct _xmmreg_ia32)); + } + return 0; +} + +static int +restore_ia32_fpxstate (struct task_struct *tsk, struct ia32_user_fxsr_struct *save) +{ + struct switch_stack *swp; + struct pt_regs *ptp; + int i, tos; + unsigned int fsrlo, fsrhi, num32; + int mxcsr; + unsigned long num64; + unsigned long num128[2]; + + if (!access_ok(VERIFY_READ, save, sizeof(*save))) + return(-EFAULT); + + __get_user(num32, (unsigned int *)&save->cwd); + tsk->thread.fcr = (tsk->thread.fcr & (~0x1f3f)) | (num32 & 0x1f3f); + __get_user(fsrlo, (unsigned int *)&save->swd); + __get_user(fsrhi, (unsigned int *)&save->twd); + num32 = (fsrhi << 16) | fsrlo; + tsk->thread.fsr = (tsk->thread.fsr & (~0xffffffff)) | num32; + __get_user(num32, (unsigned int *)&save->fip); + tsk->thread.fir = (tsk->thread.fir & (~0xffffffff)) | num32; + __get_user(num32, (unsigned int *)&save->foo); + tsk->thread.fdr = (tsk->thread.fdr & (~0xffffffff)) | num32; + + /* + * Stack frames start with 16-bytes of temp space + */ + swp = (struct switch_stack *)(tsk->thread.ksp + 16); + ptp = ia64_task_regs(tsk); + tos = (tsk->thread.fsr >> 11) & 7; + for (i = 0; i < 8; i++) + get_fpreg(i, (struct _fpreg_ia32 *)&save->st_space[4*i], ptp, swp, tos); + + __get_user(mxcsr, (unsigned int *)&save->mxcsr); + num64 = mxcsr & 0xff10; + tsk->thread.fcr = (tsk->thread.fcr & (~0xff1000000000)) | (num64<<32); + num64 = mxcsr & 0x3f; + tsk->thread.fsr = (tsk->thread.fsr & (~0x3f00000000)) | (num64<<32); + + for (i = 0; i < 8; i++) { + copy_from_user(num128, &save->xmm_space[0] + 4*i, sizeof(struct _xmmreg_ia32)); + memcpy(&(swp->f16) + i*2, &(num128[0]), sizeof(unsigned long)); + memcpy(&(swp->f17) + i*2, &(num128[1]), sizeof(unsigned long)); + } + return 0; } extern asmlinkage long sys_ptrace (long, pid_t, unsigned long, unsigned long, long, long, long, @@ -3061,11 +2969,19 @@ break; case IA32_PTRACE_GETFPREGS: - ret = save_ia32_fpstate(child, (struct _fpstate_ia32 *) A(data)); + ret = save_ia32_fpstate(child, (struct ia32_user_i387_struct *) A(data)); + break; + + case IA32_PTRACE_GETFPXREGS: + ret = save_ia32_fpxstate(child, (struct ia32_user_fxsr_struct *) A(data)); break; case IA32_PTRACE_SETFPREGS: - ret = restore_ia32_fpstate(child, (struct _fpstate_ia32 *) A(data)); + ret = restore_ia32_fpstate(child, (struct ia32_user_i387_struct *) A(data)); + break; + + case IA32_PTRACE_SETFPXREGS: + ret = restore_ia32_fpxstate(child, (struct ia32_user_fxsr_struct *) A(data)); break; case PTRACE_SYSCALL: /* continue, stop after next syscall */ @@ -3535,9 +3451,12 @@ err |= __put_user(kbuf->rdev, &ubuf->st_rdev); err |= __put_user(kbuf->size, &ubuf->st_size_lo); err |= __put_user((kbuf->size >> 32), &ubuf->st_size_hi); - err |= __put_user(kbuf->atime, &ubuf->st_atime); - err |= __put_user(kbuf->mtime, &ubuf->st_mtime); - err |= __put_user(kbuf->ctime, &ubuf->st_ctime); + err |= __put_user(kbuf->atime.tv_sec, &ubuf->st_atime); + err |= __put_user(kbuf->atime.tv_nsec, &ubuf->st_atime_nsec); + err |= __put_user(kbuf->mtime.tv_sec, &ubuf->st_mtime); + err |= __put_user(kbuf->mtime.tv_nsec, &ubuf->st_mtime_nsec); + err |= __put_user(kbuf->ctime.tv_sec, &ubuf->st_ctime); + err |= __put_user(kbuf->ctime.tv_nsec, &ubuf->st_ctime_nsec); err |= __put_user(kbuf->blksize, &ubuf->st_blksize); err |= __put_user(kbuf->blocks, &ubuf->st_blocks); return err; @@ -3624,7 +3543,7 @@ } asmlinkage long -sys32_sched_rr_get_interval (pid_t pid, struct timespec32 *interval) +sys32_sched_rr_get_interval (pid_t pid, struct compat_timespec *interval) { extern asmlinkage long sys_sched_rr_get_interval (pid_t, struct timespec *); mm_segment_t old_fs = get_fs(); @@ -3701,21 +3620,52 @@ return ret; } +/* + * Exactly like fs/open.c:sys_open(), except that it doesn't set the O_LARGEFILE flag. + */ +asmlinkage long +sys32_open (const char * filename, int flags, int mode) +{ + char * tmp; + int fd, error; + + tmp = getname(filename); + fd = PTR_ERR(tmp); + if (!IS_ERR(tmp)) { + fd = get_unused_fd(); + if (fd >= 0) { + struct file *f = filp_open(tmp, flags, mode); + error = PTR_ERR(f); + if (IS_ERR(f)) + goto out_error; + fd_install(fd, f); + } +out: + putname(tmp); + } + return fd; + +out_error: + put_unused_fd(fd); + fd = error; + goto out; +} + #ifdef NOTYET /* UNTESTED FOR IA64 FROM HERE DOWN */ struct ncp_mount_data32 { int version; unsigned int ncp_fd; - __kernel_uid_t32 mounted_uid; + compat_uid_t mounted_uid; int wdog_pid; unsigned char mounted_vol[NCP_VOLNAME_LEN + 1]; unsigned int time_out; unsigned int retry_count; unsigned int flags; - __kernel_uid_t32 uid; - __kernel_gid_t32 gid; - __kernel_mode_t32 file_mode; - __kernel_mode_t32 dir_mode; + compat_uid_t uid; + compat_gid_t gid; + compat_mode_t file_mode; + compat_mode_t dir_mode; }; static void * @@ -3737,11 +3687,11 @@ struct smb_mount_data32 { int version; - __kernel_uid_t32 mounted_uid; - __kernel_uid_t32 uid; - __kernel_gid_t32 gid; - __kernel_mode_t32 file_mode; - __kernel_mode_t32 dir_mode; + compat_uid_t mounted_uid; + compat_uid_t uid; + compat_gid_t gid; + compat_mode_t file_mode; + compat_mode_t dir_mode; }; static void * @@ -3859,52 +3809,52 @@ extern asmlinkage long sys_setreuid(uid_t ruid, uid_t euid); -asmlinkage long sys32_setreuid(__kernel_uid_t32 ruid, __kernel_uid_t32 euid) +asmlinkage long sys32_setreuid(compat_uid_t ruid, compat_uid_t euid) { uid_t sruid, seuid; - sruid = (ruid == (__kernel_uid_t32)-1) ? ((uid_t)-1) : ((uid_t)ruid); - seuid = (euid == (__kernel_uid_t32)-1) ? ((uid_t)-1) : ((uid_t)euid); + sruid = (ruid == (compat_uid_t)-1) ? ((uid_t)-1) : ((uid_t)ruid); + seuid = (euid == (compat_uid_t)-1) ? ((uid_t)-1) : ((uid_t)euid); return sys_setreuid(sruid, seuid); } extern asmlinkage long sys_setresuid(uid_t ruid, uid_t euid, uid_t suid); asmlinkage long -sys32_setresuid(__kernel_uid_t32 ruid, __kernel_uid_t32 euid, - __kernel_uid_t32 suid) +sys32_setresuid(compat_uid_t ruid, compat_uid_t euid, + compat_uid_t suid) { uid_t sruid, seuid, ssuid; - sruid = (ruid == (__kernel_uid_t32)-1) ? ((uid_t)-1) : ((uid_t)ruid); - seuid = (euid == (__kernel_uid_t32)-1) ? ((uid_t)-1) : ((uid_t)euid); - ssuid = (suid == (__kernel_uid_t32)-1) ? ((uid_t)-1) : ((uid_t)suid); + sruid = (ruid == (compat_uid_t)-1) ? ((uid_t)-1) : ((uid_t)ruid); + seuid = (euid == (compat_uid_t)-1) ? ((uid_t)-1) : ((uid_t)euid); + ssuid = (suid == (compat_uid_t)-1) ? ((uid_t)-1) : ((uid_t)suid); return sys_setresuid(sruid, seuid, ssuid); } extern asmlinkage long sys_setregid(gid_t rgid, gid_t egid); asmlinkage long -sys32_setregid(__kernel_gid_t32 rgid, __kernel_gid_t32 egid) +sys32_setregid(compat_gid_t rgid, compat_gid_t egid) { gid_t srgid, segid; - srgid = (rgid == (__kernel_gid_t32)-1) ? ((gid_t)-1) : ((gid_t)rgid); - segid = (egid == (__kernel_gid_t32)-1) ? ((gid_t)-1) : ((gid_t)egid); + srgid = (rgid == (compat_gid_t)-1) ? ((gid_t)-1) : ((gid_t)rgid); + segid = (egid == (compat_gid_t)-1) ? ((gid_t)-1) : ((gid_t)egid); return sys_setregid(srgid, segid); } extern asmlinkage long sys_setresgid(gid_t rgid, gid_t egid, gid_t sgid); asmlinkage long -sys32_setresgid(__kernel_gid_t32 rgid, __kernel_gid_t32 egid, - __kernel_gid_t32 sgid) +sys32_setresgid(compat_gid_t rgid, compat_gid_t egid, + compat_gid_t sgid) { gid_t srgid, segid, ssgid; - srgid = (rgid == (__kernel_gid_t32)-1) ? ((gid_t)-1) : ((gid_t)rgid); - segid = (egid == (__kernel_gid_t32)-1) ? ((gid_t)-1) : ((gid_t)egid); - ssgid = (sgid == (__kernel_gid_t32)-1) ? ((gid_t)-1) : ((gid_t)sgid); + srgid = (rgid == (compat_gid_t)-1) ? ((gid_t)-1) : ((gid_t)rgid); + segid = (egid == (compat_gid_t)-1) ? ((gid_t)-1) : ((gid_t)egid); + ssgid = (sgid == (compat_gid_t)-1) ? ((gid_t)-1) : ((gid_t)sgid); return sys_setresgid(srgid, segid, ssgid); } @@ -3926,27 +3876,27 @@ struct nfsctl_export32 { s8 ex32_client[NFSCLNT_IDMAX+1]; s8 ex32_path[NFS_MAXPATHLEN+1]; - __kernel_dev_t32 ex32_dev; - __kernel_ino_t32 ex32_ino; + compat_dev_t ex32_dev; + compat_ino_t ex32_ino; s32 ex32_flags; - __kernel_uid_t32 ex32_anon_uid; - __kernel_gid_t32 ex32_anon_gid; + compat_uid_t ex32_anon_uid; + compat_gid_t ex32_anon_gid; }; struct nfsctl_uidmap32 { u32 ug32_ident; /* char * */ - __kernel_uid_t32 ug32_uidbase; + compat_uid_t ug32_uidbase; s32 ug32_uidlen; u32 ug32_udimap; /* uid_t * */ - __kernel_uid_t32 ug32_gidbase; + compat_uid_t ug32_gidbase; s32 ug32_gidlen; u32 ug32_gdimap; /* gid_t * */ }; struct nfsctl_fhparm32 { struct sockaddr gf32_addr; - __kernel_dev_t32 gf32_dev; - __kernel_ino_t32 gf32_ino; + compat_dev_t gf32_dev; + compat_ino_t gf32_ino; s32 gf32_version; }; @@ -4066,7 +4016,7 @@ return -ENOMEM; for(i = 0; i < karg->ca_umap.ug_uidlen; i++) err |= __get_user(karg->ca_umap.ug_udimap[i], - &(((__kernel_uid_t32 *)A(uaddr))[i])); + &(((compat_uid_t *)A(uaddr))[i])); err |= __get_user(karg->ca_umap.ug_gidbase, &arg32->ca32_umap.ug32_gidbase); err |= __get_user(karg->ca_umap.ug_uidlen, @@ -4081,7 +4031,7 @@ return -ENOMEM; for(i = 0; i < karg->ca_umap.ug_gidlen; i++) err |= __get_user(karg->ca_umap.ug_gdimap[i], - &(((__kernel_gid_t32 *)A(uaddr))[i])); + &(((compat_gid_t *)A(uaddr))[i])); return err; } @@ -4193,7 +4143,7 @@ u32 modes; s32 offset, freq, maxerror, esterror; s32 status, constant, precision, tolerance; - struct timeval32 time; + struct compat_timeval time; s32 tick; s32 ppsfreq, jitter, shift, stabil; s32 jitcnt, calcnt, errcnt, stbcnt; diff -Nru a/arch/ia64/kernel/Makefile b/arch/ia64/kernel/Makefile --- a/arch/ia64/kernel/Makefile Mon Dec 23 21:22:02 2002 +++ b/arch/ia64/kernel/Makefile Mon Dec 23 21:22:02 2002 @@ -6,9 +6,12 @@ export-objs := ia64_ksyms.o -obj-y := acpi.o entry.o gate.o efi.o efi_stub.o ia64_ksyms.o irq.o irq_ia64.o irq_lsapic.o ivt.o \ - machvec.o pal.o process.o perfmon.o ptrace.o sal.o semaphore.o setup.o \ +obj-y := acpi.o entry.o gate.o efi.o efi_stub.o ia64_ksyms.o \ + irq.o irq_ia64.o irq_lsapic.o ivt.o \ + machvec.o pal.o process.o perfmon.o ptrace.o sal.o \ + semaphore.o setup.o \ signal.o sys_ia64.o traps.o time.o unaligned.o unwind.o + obj-$(CONFIG_IOSAPIC) += iosapic.o obj-$(CONFIG_IA64_PALINFO) += palinfo.o obj-$(CONFIG_EFI_VARS) += efivars.o diff -Nru a/arch/ia64/kernel/efi.c b/arch/ia64/kernel/efi.c --- a/arch/ia64/kernel/efi.c Mon Dec 23 21:21:50 2002 +++ b/arch/ia64/kernel/efi.c Mon Dec 23 21:21:50 2002 @@ -306,7 +306,7 @@ u64 start; u64 end; } prev, curr; - void *efi_map_start, *efi_map_end, *p, *q; + void *efi_map_start, *efi_map_end, *p, *q, *r; efi_memory_desc_t *md, *check_md; u64 efi_desc_size, start, end, granule_addr, first_non_wb_addr = 0; @@ -351,11 +351,10 @@ if (!(first_non_wb_addr > granule_addr)) continue; /* couldn't find enough contiguous memory */ - } - - /* BUG_ON((md->phys_addr >> IA64_GRANULE_SHIFT) < first_non_wb_addr); */ - trim_top(md, first_non_wb_addr); + for (r = p; r < q; r += efi_desc_size) + trim_top(r, first_non_wb_addr); + } if (is_available_memory(md)) { if (md->phys_addr + (md->num_pages << EFI_PAGE_SHIFT) > mem_limit) { diff -Nru a/arch/ia64/kernel/efivars.c b/arch/ia64/kernel/efivars.c --- a/arch/ia64/kernel/efivars.c Mon Dec 23 21:21:54 2002 +++ b/arch/ia64/kernel/efivars.c Mon Dec 23 21:21:54 2002 @@ -29,6 +29,9 @@ * * Changelog: * + * 10 Dec 2002 - Matt Domsch + * fix locking per Peter Chubb's findings + * * 25 Mar 2002 - Matt Domsch * move uuid_unparse() to include/asm-ia64/efi.h:efi_guid_unparse() * @@ -73,7 +76,7 @@ MODULE_DESCRIPTION("/proc interface to EFI Variables"); MODULE_LICENSE("GPL"); -#define EFIVARS_VERSION "0.05 2002-Mar-26" +#define EFIVARS_VERSION "0.06 2002-Dec-10" static int efivar_read(char *page, char **start, off_t off, @@ -106,6 +109,14 @@ struct list_head list; } efivar_entry_t; +/* + efivars_lock protects two things: + 1) efivar_list - adds, removals, reads, writes + 2) efi.[gs]et_variable() calls. + It must not be held when creating proc entries or calling kmalloc. + efi.get_next_variable() is only called from efivars_init(), + which is protected by the BKL, so that path is safe. +*/ static spinlock_t efivars_lock = SPIN_LOCK_UNLOCKED; static LIST_HEAD(efivar_list); static struct proc_dir_entry *efi_vars_dir = NULL; @@ -150,6 +161,7 @@ * variable_name_size = number of bytes required to hold * variable_name (not counting the NULL * character at the end. + * efivars_lock is not held on entry or exit. * Returns 1 on failure, 0 on success */ static int @@ -160,10 +172,12 @@ int i, short_name_size = variable_name_size / sizeof(efi_char16_t) + 38; - char *short_name = kmalloc(short_name_size+1, - GFP_KERNEL); - efivar_entry_t *new_efivar = kmalloc(sizeof(efivar_entry_t), - GFP_KERNEL); + char *short_name; + efivar_entry_t *new_efivar; + + short_name = kmalloc(short_name_size+1, GFP_KERNEL); + new_efivar = kmalloc(sizeof(efivar_entry_t), GFP_KERNEL); + if (!short_name || !new_efivar) { if (short_name) kfree(short_name); if (new_efivar) kfree(new_efivar); @@ -188,20 +202,19 @@ *(short_name + strlen(short_name)) = '-'; efi_guid_unparse(vendor_guid, short_name + strlen(short_name)); - /* Create the entry in proc */ new_efivar->entry = create_proc_entry(short_name, 0600, efi_vars_dir); kfree(short_name); short_name = NULL; if (!new_efivar->entry) return 1; - new_efivar->entry->owner = THIS_MODULE; new_efivar->entry->data = new_efivar; new_efivar->entry->read_proc = efivar_read; new_efivar->entry->write_proc = efivar_write; - list_add(&new_efivar->list, &efivar_list); - + spin_lock(&efivars_lock); + list_add(&new_efivar->list, &efivar_list); + spin_unlock(&efivars_lock); return 0; } @@ -319,6 +332,8 @@ kfree(efivar); } + spin_unlock(&efivars_lock); + /* If this is a new variable, set up the proc entry for it. */ if (!found) { efivar_create_proc_entry(utf8_strsize(var_data->VariableName, @@ -328,7 +343,6 @@ } kfree(var_data); - spin_unlock(&efivars_lock); return size; } @@ -343,8 +357,6 @@ efi_char16_t *variable_name = kmalloc(1024, GFP_KERNEL); unsigned long variable_name_size = 1024; - spin_lock(&efivars_lock); - printk(KERN_INFO "EFI Variables Facility v%s\n", EFIVARS_VERSION); /* Since efi.c happens before procfs is available, @@ -357,8 +369,6 @@ efi_vars_dir = proc_mkdir("vars", efi_dir); - - /* Per EFI spec, the maximum storage allocated for both the variable name and variable data is 1024 bytes. */ @@ -390,7 +400,6 @@ } while (status != EFI_NOT_FOUND); kfree(variable_name); - spin_unlock(&efivars_lock); return 0; } @@ -400,17 +409,16 @@ struct list_head *pos, *n; efivar_entry_t *efivar; - spin_lock(&efivars_lock); - + spin_lock(&efivars_lock); list_for_each_safe(pos, n, &efivar_list) { efivar = efivar_entry(pos); remove_proc_entry(efivar->entry->name, efi_vars_dir); list_del(&efivar->list); kfree(efivar); } - remove_proc_entry(efi_vars_dir->name, efi_dir); spin_unlock(&efivars_lock); + remove_proc_entry(efi_vars_dir->name, efi_dir); } module_init(efivars_init); diff -Nru a/arch/ia64/kernel/entry.S b/arch/ia64/kernel/entry.S --- a/arch/ia64/kernel/entry.S Mon Dec 23 21:21:52 2002 +++ b/arch/ia64/kernel/entry.S Mon Dec 23 21:21:52 2002 @@ -91,11 +91,12 @@ END(ia64_execve) /* - * sys_clone2(u64 flags, u64 ustack_base, u64 ustack_size, u64 user_tid, u64 tls) + * sys_clone2(u64 flags, u64 ustack_base, u64 ustack_size, u64 child_tidptr, u64 parent_tidptr, + * u64 tls) */ GLOBAL_ENTRY(sys_clone2) .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(2) - alloc r16=ar.pfs,5,2,5,0 + alloc r16=ar.pfs,6,2,6,0 DO_SAVE_SWITCH_STACK adds r2=PT(R16)+IA64_SWITCH_STACK_SIZE+16,sp mov loc0=rp @@ -104,9 +105,10 @@ mov out1=in1 mov out3=in2 tbit.nz p6,p0=in0,CLONE_SETTLS_BIT - mov out4=in3 // valid only w/CLONE_SETTID and/or CLONE_CLEARTID + mov out4=in3 // child_tidptr: valid only w/CLONE_CHILD_SETTID or CLONE_CHILD_CLEARTID ;; -(p6) st8 [r2]=in4 // store TLS in r13 (tp) +(p6) st8 [r2]=in5 // store TLS in r16 for copy_thread() + mov out5=in4 // parent_tidptr: valid only w/CLONE_PARENT_SETTID adds out2=IA64_SWITCH_STACK_SIZE+16,sp // out2 = ®s dep out0=0,in0,CLONE_IDLETASK_BIT,1 // out0 = clone_flags & ~CLONE_IDLETASK br.call.sptk.many rp=do_fork @@ -535,7 +537,6 @@ GLOBAL_ENTRY(ia64_ret_from_clone) PT_REGS_UNWIND_INFO(0) -#if defined(CONFIG_SMP) || defined(CONFIG_PREEMPT) /* * We need to call schedule_tail() to complete the scheduling process. * Called by ia64_switch_to() after do_fork()->copy_thread(). r8 contains the @@ -543,7 +544,6 @@ */ br.call.sptk.many rp=ia64_invoke_schedule_tail .ret8: -#endif adds r2=TI_FLAGS+IA64_TASK_SIZE,r13 ;; ld4 r2=[r2] @@ -844,7 +844,6 @@ br.cond.sptk ia64_leave_kernel END(handle_syscall_error) -#ifdef CONFIG_SMP /* * Invoke schedule_tail(task) while preserving in0-in7, which may be needed * in case a system call gets restarted. @@ -861,8 +860,6 @@ br.ret.sptk.many rp END(ia64_invoke_schedule_tail) -#endif /* CONFIG_SMP */ - #if __GNUC__ < 3 /* @@ -1129,18 +1126,18 @@ data8 ia64_ni_syscall /* was: ia64_oldfstat */ data8 sys_vhangup data8 sys_lchown - data8 sys_vm86 // 1125 + data8 sys_remap_file_pages // 1125 data8 sys_wait4 data8 sys_sysinfo data8 sys_clone data8 sys_setdomainname data8 sys_newuname // 1130 data8 sys_adjtimex - data8 ia64_create_module + data8 ia64_ni_syscall /* was: ia64_create_module */ data8 sys_init_module data8 sys_delete_module - data8 sys_get_kernel_syms // 1135 - data8 sys_query_module + data8 ia64_ni_syscall // 1135 /* was: sys_get_kernel_syms */ + data8 ia64_ni_syscall /* was: sys_query_module */ data8 sys_quotactl data8 sys_bdflush data8 sys_sysfs @@ -1160,7 +1157,7 @@ data8 sys_mlock data8 sys_mlockall data8 sys_mprotect // 1155 - data8 sys_mremap + data8 ia64_mremap data8 sys_msync data8 sys_munlock data8 sys_munlockall @@ -1173,11 +1170,7 @@ data8 sys_sched_get_priority_min data8 sys_sched_rr_get_interval data8 sys_nanosleep -#if defined(CONFIG_NFSD) || defined(CONFIG_NFSD_MODULE) data8 sys_nfsservctl -#else - data8 sys_ni_syscall -#endif data8 sys_prctl // 1170 data8 sys_getpagesize data8 sys_mmap2 @@ -1241,7 +1234,7 @@ data8 sys_futex // 1230 data8 sys_sched_setaffinity data8 sys_sched_getaffinity - data8 sys_ni_syscall + data8 sys_set_tid_address data8 sys_alloc_hugepages data8 sys_free_hugepages // 1235 data8 sys_exit_group @@ -1254,8 +1247,8 @@ data8 sys_epoll_create data8 sys_epoll_ctl data8 sys_epoll_wait // 1245 + data8 sys_restart_syscall data8 sys_semtimedop - data8 ia64_ni_syscall data8 ia64_ni_syscall data8 ia64_ni_syscall data8 ia64_ni_syscall // 1250 diff -Nru a/arch/ia64/kernel/fw-emu.c b/arch/ia64/kernel/fw-emu.c --- a/arch/ia64/kernel/fw-emu.c Mon Dec 23 21:21:50 2002 +++ b/arch/ia64/kernel/fw-emu.c Mon Dec 23 21:21:50 2002 @@ -20,7 +20,13 @@ #define MB (1024*1024UL) -#define NUM_MEM_DESCS 3 +#define SIMPLE_MEMMAP 1 + +#if SIMPLE_MEMMAP +# define NUM_MEM_DESCS 4 +#else +# define NUM_MEM_DESCS 16 +#endif static char fw_mem[( sizeof(struct ia64_boot_param) + sizeof(efi_system_table_t) @@ -379,6 +385,17 @@ struct ia64_boot_param *bp; unsigned char checksum = 0; char *cp, *cmd_line; + int i = 0; +# define MAKE_MD(typ, attr, start, end) \ + do { \ + md = efi_memmap + i++; \ + md->type = typ; \ + md->pad = 0; \ + md->phys_addr = start; \ + md->virt_addr = 0; \ + md->num_pages = (end - start) >> 12; \ + md->attribute = attr; \ + } while (0) memset(fw_mem, 0, sizeof(fw_mem)); @@ -464,47 +481,29 @@ sal_systab->checksum = -checksum; +#if SIMPLE_MEMMAP /* simulate free memory at physical address zero */ - md = &efi_memmap[0]; - md->type = EFI_BOOT_SERVICES_DATA; - md->pad = 0; - md->phys_addr = 0*MB; - md->virt_addr = 0; - md->num_pages = (1*MB) >> 12; /* 1MB (in 4KB pages) */ - md->attribute = EFI_MEMORY_WB; - - /* fill in a memory descriptor: */ - md = &efi_memmap[1]; - md->type = EFI_CONVENTIONAL_MEMORY; - md->pad = 0; - md->phys_addr = 2*MB; - md->virt_addr = 0; - md->num_pages = (128*MB) >> 12; /* 128MB (in 4KB pages) */ - md->attribute = EFI_MEMORY_WB; - - /* descriptor for firmware emulator: */ - md = &efi_memmap[2]; - md->type = EFI_PAL_CODE; - md->pad = 0; - md->phys_addr = 1*MB; - md->virt_addr = 1*MB; - md->num_pages = (1*MB) >> 12; /* 1MB (in 4KB pages) */ - md->attribute = EFI_MEMORY_WB; - -#if 0 - /* - * XXX bootmem is broken for now... (remember to NUM_MEM_DESCS - * if you re-enable this!) - */ - - /* descriptor for high memory (>4GB): */ - md = &efi_memmap[3]; - md->type = EFI_CONVENTIONAL_MEMORY; - md->pad = 0; - md->phys_addr = 4096*MB; - md->virt_addr = 0; - md->num_pages = (32*MB) >> 12; /* 32MB (in 4KB pages) */ - md->attribute = EFI_MEMORY_WB; + MAKE_MD(EFI_BOOT_SERVICES_DATA, EFI_MEMORY_WB, 0*MB, 1*MB); + MAKE_MD(EFI_PAL_CODE, EFI_MEMORY_WB, 1*MB, 2*MB); + MAKE_MD(EFI_CONVENTIONAL_MEMORY, EFI_MEMORY_WB, 2*MB, 130*MB); + MAKE_MD(EFI_CONVENTIONAL_MEMORY, EFI_MEMORY_WB, 4096*MB, 4128*MB); +#else + MAKE_MD( 4, 0x9, 0x0000000000000000, 0x0000000000001000); + MAKE_MD( 7, 0x9, 0x0000000000001000, 0x000000000008a000); + MAKE_MD( 4, 0x9, 0x000000000008a000, 0x00000000000a0000); + MAKE_MD( 5, 0x8000000000000009, 0x00000000000c0000, 0x0000000000100000); + MAKE_MD( 7, 0x9, 0x0000000000100000, 0x0000000004400000); + MAKE_MD( 2, 0x9, 0x0000000004400000, 0x0000000004be5000); + MAKE_MD( 7, 0x9, 0x0000000004be5000, 0x000000007f77e000); + MAKE_MD( 6, 0x8000000000000009, 0x000000007f77e000, 0x000000007fb94000); + MAKE_MD( 6, 0x8000000000000009, 0x000000007fb94000, 0x000000007fb95000); + MAKE_MD( 6, 0x8000000000000009, 0x000000007fb95000, 0x000000007fc00000); + MAKE_MD(13, 0x8000000000000009, 0x000000007fc00000, 0x000000007fc3a000); + MAKE_MD( 7, 0x9, 0x000000007fc3a000, 0x000000007fea0000); + MAKE_MD( 5, 0x8000000000000009, 0x000000007fea0000, 0x000000007fea8000); + MAKE_MD( 7, 0x9, 0x000000007fea8000, 0x000000007feab000); + MAKE_MD( 5, 0x8000000000000009, 0x000000007feab000, 0x000000007ffff000); + MAKE_MD( 7, 0x9, 0x00000000ff400000, 0x0000000104000000); #endif bp->efi_systab = __pa(&fw_mem); diff -Nru a/arch/ia64/kernel/ia64_ksyms.c b/arch/ia64/kernel/ia64_ksyms.c --- a/arch/ia64/kernel/ia64_ksyms.c Mon Dec 23 21:21:54 2002 +++ b/arch/ia64/kernel/ia64_ksyms.c Mon Dec 23 21:21:54 2002 @@ -86,7 +86,7 @@ EXPORT_SYMBOL(ia64_cpu_to_sapicid); #else /* !CONFIG_SMP */ -EXPORT_SYMBOL(__flush_tlb_all); +EXPORT_SYMBOL(local_flush_tlb_all); #endif /* !CONFIG_SMP */ diff -Nru a/arch/ia64/kernel/mca.c b/arch/ia64/kernel/mca.c --- a/arch/ia64/kernel/mca.c Mon Dec 23 21:21:54 2002 +++ b/arch/ia64/kernel/mca.c Mon Dec 23 21:21:54 2002 @@ -69,10 +69,10 @@ u64 ia64_mca_bspstore[1024]; u64 ia64_init_stack[KERNEL_STACK_SIZE] __attribute__((aligned(16))); u64 ia64_mca_sal_data_area[1356]; -u64 ia64_mca_min_state_save_info; u64 ia64_tlb_functional; u64 ia64_os_mca_recovery_successful; - +/* TODO: need to assign min-state structure to UC memory */ +u64 ia64_mca_min_state_save_info[MIN_STATE_AREA_SIZE] __attribute__((aligned(512))); static void ia64_mca_wakeup_ipi_wait(void); static void ia64_mca_wakeup(int cpu); static void ia64_mca_wakeup_all(void); @@ -116,7 +116,7 @@ * Outputs : platform error status */ int -ia64_mca_log_sal_error_record(int sal_info_type) +ia64_mca_log_sal_error_record(int sal_info_type, int called_from_init) { int platform_err = 0; @@ -131,7 +131,10 @@ */ platform_err = ia64_log_print(sal_info_type, (prfunc_t)printk); - ia64_sal_clear_state_info(sal_info_type); + /* temporary: only clear SAL logs on hardware-corrected errors + or if we're logging an error after an MCA-initiated reboot */ + if ((sal_info_type > 1) || (called_from_init)) + ia64_sal_clear_state_info(sal_info_type); return platform_err; } @@ -152,7 +155,7 @@ IA64_MCA_DEBUG("ia64_mca_cpe_int_handler: received interrupt. vector = %#x\n", cpe_irq); /* Get the CMC error record and log it */ - ia64_mca_log_sal_error_record(SAL_INFO_TYPE_CPE); + ia64_mca_log_sal_error_record(SAL_INFO_TYPE_CPE, 0); } /* @@ -199,13 +202,15 @@ * * Outputs : None */ -void +int ia64_mca_check_errors (void) { /* * If there is an MCA error record pending, get it and log it. */ - ia64_mca_log_sal_error_record(SAL_INFO_TYPE_MCA); + ia64_mca_log_sal_error_record(SAL_INFO_TYPE_MCA, 1); + + return 0; } device_initcall(ia64_mca_check_errors); @@ -237,49 +242,26 @@ #endif /* PLATFORM_MCA_HANDLERS */ -static char *min_state_labels[] = { - "nat", - "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", - "r9", "r10","r11", "r12","r13","r14", "r15", - "b0r16","b0r17", "b0r18", "b0r19", "b0r20", - "b0r21", "b0r22","b0r23", "b0r24", "b0r25", - "b0r26", "b0r27", "b0r28","b0r29", "b0r30", "b0r31", - "r16", "r17", "r18","r19", "r20", "r21","r22", - "r23", "r24","r25", "r26", "r27","r28", "r29", "r30","r31", - "preds", "br0", "rsc", - "iip", "ipsr", "ifs", - "xip", "xpsr", "xfs" -}; - -int ia64_pmss_dump_bank0=0; /* dump bank 0 ? */ - /* * routine to process and prepare to dump min_state_save * information for debugging purposes. * */ void -ia64_process_min_state_save (pal_min_state_area_t *pmss, struct pt_regs *ptregs) +ia64_process_min_state_save (pal_min_state_area_t *pmss) { - int i, max=57; - u64 *tpmss_ptr=(u64 *)pmss; + int i, max = MIN_STATE_AREA_SIZE; + u64 *tpmss_ptr = (u64 *)pmss; + u64 *return_min_state_ptr = ia64_mca_min_state_save_info; /* dump out the min_state_area information */ for (i=0;iproc_err; - ia64_process_min_state_save(&proc_ptr->processor_static_info.min_state_area, - regs); + ia64_process_min_state_save(&proc_ptr->processor_static_info.min_state_area); /* Clear the INIT SAL logs now that they have been saved in the OS buffer */ ia64_sal_clear_state_info(SAL_INFO_TYPE_INIT); @@ -1676,6 +1654,9 @@ /* Print processor static info if any */ if (slpi->valid.psi_static_struct) { spsi = (sal_processor_static_info_t *)p_data; + + /* copy interrupted context PAL min-state info */ + ia64_process_min_state_save(&spsi->min_state_area); /* Print branch register contents if valid */ if (spsi->valid.br) diff -Nru a/arch/ia64/kernel/palinfo.c b/arch/ia64/kernel/palinfo.c --- a/arch/ia64/kernel/palinfo.c Mon Dec 23 21:21:50 2002 +++ b/arch/ia64/kernel/palinfo.c Mon Dec 23 21:21:50 2002 @@ -101,26 +101,15 @@ #define RSE_HINTS_COUNT (sizeof(rse_hints)/sizeof(const char *)) -/* - * The current revision of the Volume 2 (July 2000) of - * IA-64 Architecture Software Developer's Manual is wrong. - * Table 4-10 has invalid information concerning the ma field: - * Correct table is: - * bit 0 - 001 - UC - * bit 4 - 100 - UC - * bit 5 - 101 - UCE - * bit 6 - 110 - WC - * bit 7 - 111 - NatPage - */ static const char *mem_attrib[]={ - "Write Back (WB)", /* 000 */ - "Uncacheable (UC)", /* 001 */ - "Reserved", /* 010 */ - "Reserved", /* 011 */ - "Uncacheable (UC)", /* 100 */ - "Uncacheable Exported (UCE)", /* 101 */ - "Write Coalescing (WC)", /* 110 */ - "NaTPage" /* 111 */ + "WB", /* 000 */ + "SW", /* 001 */ + "010", /* 010 */ + "011", /* 011 */ + "UC", /* 100 */ + "UCE", /* 101 */ + "WC", /* 110 */ + "NaTPage" /* 111 */ }; /* @@ -315,6 +304,7 @@ pal_vm_info_2_u_t vm_info_2; pal_tc_info_u_t tc_info; ia64_ptce_info_t ptce; + const char *sep; int i, j; s64 status; @@ -339,7 +329,15 @@ if (ia64_pal_mem_attrib(&attrib) != 0) return 0; - p += sprintf(p, "Supported memory attributes : %s\n", mem_attrib[attrib&0x7]); + p += sprintf(p, "Supported memory attributes : "); + sep = ""; + for (i = 0; i < 8; i++) { + if (attrib & (1 << i)) { + p += sprintf(p, "%s%s", sep, mem_attrib[i]); + sep = ", "; + } + } + p += sprintf(p, "\n"); if ((status=ia64_pal_vm_page_size(&tr_pages, &vw_pages)) !=0) { printk("ia64_pal_vm_page_size=%ld\n", status); diff -Nru a/arch/ia64/kernel/process.c b/arch/ia64/kernel/process.c --- a/arch/ia64/kernel/process.c Mon Dec 23 21:21:54 2002 +++ b/arch/ia64/kernel/process.c Mon Dec 23 21:21:54 2002 @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -376,36 +377,12 @@ /* clear list of sampling buffer to free for new task */ p->thread.pfm_smpl_buf_list = NULL; - if (current->thread.pfm_context) retval = pfm_inherit(p, child_ptregs); + if (current->thread.pfm_context) + retval = pfm_inherit(p, child_ptregs); #endif return retval; } -void -do_copy_regs (struct unw_frame_info *info, void *arg) -{ - do_copy_task_regs(current, info, arg); -} - -void -do_dump_fpu (struct unw_frame_info *info, void *arg) -{ - do_dump_task_fpu(current, info, arg); -} - -void -ia64_elf_core_copy_regs (struct pt_regs *pt, elf_gregset_t dst) -{ - unw_init_running(do_copy_regs, dst); -} - -int -dump_fpu (struct pt_regs *pt, elf_fpregset_t dst) -{ - unw_init_running(do_dump_fpu, dst); - return 1; /* f0-f31 are always valid so we always return 1 */ -} - static void do_copy_task_regs (struct task_struct *task, struct unw_frame_info *info, void *arg) { @@ -497,36 +474,59 @@ memcpy(dst + 32, task->thread.fph, 96*16); } -int dump_task_regs(struct task_struct *task, elf_gregset_t *regs) +void +do_copy_regs (struct unw_frame_info *info, void *arg) +{ + do_copy_task_regs(current, info, arg); +} + +void +do_dump_fpu (struct unw_frame_info *info, void *arg) +{ + do_dump_task_fpu(current, info, arg); +} + +int +dump_task_regs(struct task_struct *task, elf_gregset_t *regs) { struct unw_frame_info tcore_info; - if(current == task) { + if (current == task) { unw_init_running(do_copy_regs, regs); - } - else { - memset(&tcore_info, 0, sizeof(tcore_info)); + } else { + memset(&tcore_info, 0, sizeof(tcore_info)); unw_init_from_blocked_task(&tcore_info, task); do_copy_task_regs(task, &tcore_info, regs); } - return 1; } -int dump_task_fpu (struct task_struct *task, elf_fpregset_t *dst) +void +ia64_elf_core_copy_regs (struct pt_regs *pt, elf_gregset_t dst) +{ + unw_init_running(do_copy_regs, dst); +} + +int +dump_task_fpu (struct task_struct *task, elf_fpregset_t *dst) { struct unw_frame_info tcore_info; - if(current == task) { + if (current == task) { unw_init_running(do_dump_fpu, dst); - } - else { - memset(&tcore_info, 0, sizeof(tcore_info)); + } else { + memset(&tcore_info, 0, sizeof(tcore_info)); unw_init_from_blocked_task(&tcore_info, task); do_dump_task_fpu(task, &tcore_info, dst); } + return 1; +} - return 1; +int +dump_fpu (struct pt_regs *pt, elf_fpregset_t dst) +{ + unw_init_running(do_dump_fpu, dst); + return 1; /* f0-f31 are always valid so we always return 1 */ } asmlinkage long diff -Nru a/arch/ia64/kernel/ptrace.c b/arch/ia64/kernel/ptrace.c --- a/arch/ia64/kernel/ptrace.c Mon Dec 23 21:22:01 2002 +++ b/arch/ia64/kernel/ptrace.c Mon Dec 23 21:22:01 2002 @@ -1,7 +1,7 @@ /* * Kernel support for the ptrace() and syscall tracing interfaces. * - * Copyright (C) 1999-2001 Hewlett-Packard Co + * Copyright (C) 1999-2002 Hewlett-Packard Co * David Mosberger-Tang * * Derived from the x86 and Alpha versions. Most of the code in here @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -460,6 +461,60 @@ pt->loadrs = 0; } +static inline void +sync_user_rbs_one_thread (struct task_struct *p, int make_writable) +{ + struct switch_stack *sw; + unsigned long urbs_end; + struct pt_regs *pt; + + sw = (struct switch_stack *) (p->thread.ksp + 16); + pt = ia64_task_regs(p); + urbs_end = ia64_get_user_rbs_end(p, pt, NULL); + ia64_sync_user_rbs(p, sw, pt->ar_bspstore, urbs_end); + if (make_writable) + user_flushrs(p, pt); +} + +struct task_list { + struct task_list *next; + struct task_struct *task; +}; + +#ifdef CONFIG_SMP + +static inline void +collect_task (struct task_list **listp, struct task_struct *p, int make_writable) +{ + struct task_list *e; + + e = kmalloc(sizeof(*e), GFP_KERNEL); + if (!e) + /* oops, can't collect more: finish at least what we collected so far... */ + return; + + get_task_struct(p); + e->task = p; + e->next = *listp; + *listp = e; +} + +static inline struct task_list * +finish_task (struct task_list *list, int make_writable) +{ + struct task_list *next = list->next; + + sync_user_rbs_one_thread(list->task, make_writable); + put_task_struct(list->task); + kfree(list); + return next; +} + +#else +# define collect_task(list, p, make_writable) sync_user_rbs_one_thread(p, make_writable) +# define finish_task(list, make_writable) (NULL) +#endif + /* * Synchronize the RSE backing store of CHILD and all tasks that share the address space * with it. CHILD_URBS_END is the address of the end of the register backing store of @@ -473,7 +528,6 @@ threads_sync_user_rbs (struct task_struct *child, unsigned long child_urbs_end, int make_writable) { struct switch_stack *sw; - unsigned long urbs_end; struct task_struct *g, *p; struct mm_struct *mm; struct pt_regs *pt; @@ -493,20 +547,27 @@ if (make_writable) user_flushrs(child, pt); } else { + /* + * Note: we can't call ia64_sync_user_rbs() while holding the + * tasklist_lock because that may cause a dead-lock: ia64_sync_user_rbs() + * may indirectly call tlb_flush_all(), which triggers an IPI. + * Furthermore, tasklist_lock is acquired by fork() with interrupts + * disabled, so with the right timing, the IPI never completes, hence + * tasklist_lock never gets released, hence fork() never completes... + */ + struct task_list *list = NULL; + read_lock(&tasklist_lock); { do_each_thread(g, p) { - if (p->mm == mm && p->state != TASK_RUNNING) { - sw = (struct switch_stack *) (p->thread.ksp + 16); - pt = ia64_task_regs(p); - urbs_end = ia64_get_user_rbs_end(p, pt, NULL); - ia64_sync_user_rbs(p, sw, pt->ar_bspstore, urbs_end); - if (make_writable) - user_flushrs(p, pt); - } + if (p->mm == mm && p->state != TASK_RUNNING) + collect_task(&list, p, make_writable); } while_each_thread(g, p); } read_unlock(&tasklist_lock); + + while (list) + list = finish_task(list, make_writable); } child->thread.flags |= IA64_THREAD_KRBS_SYNCED; /* set the flag in the child thread only */ } diff -Nru a/arch/ia64/kernel/sal.c b/arch/ia64/kernel/sal.c --- a/arch/ia64/kernel/sal.c Mon Dec 23 21:22:00 2002 +++ b/arch/ia64/kernel/sal.c Mon Dec 23 21:22:00 2002 @@ -77,7 +77,7 @@ return str; } -static void __init +void __init ia64_sal_handler_init (void *entry_point, void *gpval) { /* fill in the SAL procedure descriptor and point ia64_sal to it: */ diff -Nru a/arch/ia64/kernel/setup.c b/arch/ia64/kernel/setup.c --- a/arch/ia64/kernel/setup.c Mon Dec 23 21:21:51 2002 +++ b/arch/ia64/kernel/setup.c Mon Dec 23 21:21:51 2002 @@ -364,11 +364,13 @@ #ifdef CONFIG_ACPI_BOOT /* Initialize the ACPI boot-time table parser */ acpi_table_init(*cmdline_p); - -#ifdef CONFIG_ACPI_NUMA +# ifdef CONFIG_ACPI_NUMA acpi_numa_init(); -#endif - +# endif +#else +# ifdef CONFIG_SMP + smp_build_cpu_map(); /* happens, e.g., with the Ski simulator */ +# endif #endif /* CONFIG_APCI_BOOT */ find_memory(); @@ -469,9 +471,18 @@ # define lpj loops_per_jiffy # define cpunum 0 #endif - char family[32], features[128], *cp; + static struct { + unsigned long mask; + const char *feature_name; + } feature_bits[] = { + { 1UL << 0, "branchlong" }, + { 1UL << 1, "spontaneous deferral"}, + { 1UL << 2, "16-byte atomic ops" } + }; + char family[32], features[128], *cp, sep; struct cpuinfo_ia64 *c = v; unsigned long mask; + int i; mask = c->features; @@ -484,13 +495,24 @@ /* build the feature string: */ memcpy(features, " standard", 10); cp = features; - if (mask & 1) { - strcpy(cp, " branchlong"); - cp = strchr(cp, '\0'); - mask &= ~1UL; + sep = 0; + for (i = 0; i < sizeof(feature_bits)/sizeof(feature_bits[0]); ++i) { + if (mask & feature_bits[i].mask) { + if (sep) + *cp++ = sep; + sep = ','; + *cp++ = ' '; + strcpy(cp, feature_bits[i].feature_name); + cp += strlen(feature_bits[i].feature_name); + mask &= ~feature_bits[i].mask; + } } - if (mask) + if (mask) { + /* print unknown features as a hex value: */ + if (sep) + *cp++ = sep; sprintf(cp, " 0x%lx", mask); + } seq_printf(m, "processor : %d\n" @@ -630,9 +652,8 @@ * "NR_CPUS" pages for all CPUs to avoid that AP calls get_zeroed_page(). */ if (smp_processor_id() == 0) { - cpu_data = (unsigned long) __alloc_bootmem(PERCPU_PAGE_SIZE * NR_CPUS, - PERCPU_PAGE_SIZE, - __pa(MAX_DMA_ADDRESS)); + cpu_data = __alloc_bootmem(PERCPU_PAGE_SIZE * NR_CPUS, PERCPU_PAGE_SIZE, + __pa(MAX_DMA_ADDRESS)); for (cpu = 0; cpu < NR_CPUS; cpu++) { memcpy(cpu_data, __phys_per_cpu_start, __per_cpu_end - __per_cpu_start); __per_cpu_offset[cpu] = (char *) cpu_data - __per_cpu_start; diff -Nru a/arch/ia64/kernel/signal.c b/arch/ia64/kernel/signal.c --- a/arch/ia64/kernel/signal.c Mon Dec 23 21:21:56 2002 +++ b/arch/ia64/kernel/signal.c Mon Dec 23 21:21:56 2002 @@ -385,15 +385,14 @@ frame = (void *) scr->pt.r12; tramp_addr = GATE_ADDR + (ia64_sigtramp - __start_gate_section); - if (ka->sa.sa_flags & SA_ONSTACK) { + if ((ka->sa.sa_flags & SA_ONSTACK) && sas_ss_flags((unsigned long) frame) == 0) { + frame = (void *) ((current->sas_ss_sp + current->sas_ss_size) + & ~(STACK_ALIGN - 1)); /* - * We need to check the memory and register stacks separately, because - * they're switched separately (memory stack is switched in the kernel, - * register stack is switched in the signal trampoline). + * We need to check for the register stack being on the signal stack + * separately, because it's switched separately (memory stack is switched + * in the kernel, register stack is switched in the signal trampoline). */ - if (!on_sig_stack((unsigned long) frame)) - frame = (void *) ((current->sas_ss_sp + current->sas_ss_size) - & ~(STACK_ALIGN - 1)); if (!rbs_on_sig_stack(scr->pt.ar_bspstore)) new_rbs = (current->sas_ss_sp + sizeof(long) - 1) & ~(sizeof(long) - 1); } @@ -453,16 +452,14 @@ handle_signal (unsigned long sig, struct k_sigaction *ka, siginfo_t *info, sigset_t *oldset, struct sigscratch *scr) { -#ifdef CONFIG_IA32_SUPPORT if (IS_IA32_PROCESS(&scr->pt)) { /* send signal to IA-32 process */ if (!ia32_setup_frame1(sig, ka, info, oldset, &scr->pt)) return 0; } else -#endif - /* send signal to IA-64 process */ - if (!setup_frame(sig, ka, info, oldset, scr)) - return 0; + /* send signal to IA-64 process */ + if (!setup_frame(sig, ka, info, oldset, scr)) + return 0; if (ka->sa.sa_flags & SA_ONESHOT) ka->sa.sa_handler = SIG_DFL; @@ -490,6 +487,7 @@ siginfo_t info; long restart = in_syscall; long errno = scr->pt.r8; +# define ERR_CODE(c) (IS_IA32_PROCESS(&scr->pt) ? -(c) : (c)) /* * In the ia64_leave_kernel code path, we want the common case to go fast, which @@ -502,7 +500,6 @@ if (!oldset) oldset = ¤t->blocked; -#ifdef CONFIG_IA32_SUPPORT if (IS_IA32_PROCESS(&scr->pt)) { if (in_syscall) { if (errno >= 0) @@ -510,9 +507,7 @@ else errno = -errno; } - } else -#endif - if (scr->pt.r10 != -1) + } else if (scr->pt.r10 != -1) /* * A system calls has to be restarted only if one of the error codes * ERESTARTNOHAND, ERESTARTSYS, or ERESTARTNOINTR is returned. If r10 @@ -531,25 +526,24 @@ if (restart) { switch (errno) { + case ERESTART_RESTARTBLOCK: + current_thread_info()->restart_block.fn = do_no_restart_syscall; + case ERESTARTNOHAND: + scr->pt.r8 = ERR_CODE(EINTR); + /* note: scr->pt.r10 is already -1 */ + break; + case ERESTARTSYS: if ((ka->sa.sa_flags & SA_RESTART) == 0) { - case ERESTARTNOHAND: -#ifdef CONFIG_IA32_SUPPORT - if (IS_IA32_PROCESS(&scr->pt)) - scr->pt.r8 = -EINTR; - else -#endif - scr->pt.r8 = EINTR; + scr->pt.r8 = ERR_CODE(EINTR); /* note: scr->pt.r10 is already -1 */ break; } case ERESTARTNOINTR: -#ifdef CONFIG_IA32_SUPPORT if (IS_IA32_PROCESS(&scr->pt)) { scr->pt.r8 = scr->pt.r1; scr->pt.cr_iip -= 2; } else -#endif ia64_decrement_ip(&scr->pt); } } @@ -565,19 +559,26 @@ /* Did we come from a system call? */ if (restart) { /* Restart the system call - no handlers present */ - if (errno == ERESTARTNOHAND || errno == ERESTARTSYS || errno == ERESTARTNOINTR) { -#ifdef CONFIG_IA32_SUPPORT + if (errno == ERESTARTNOHAND || errno == ERESTARTSYS || errno == ERESTARTNOINTR + || errno == ERESTART_RESTARTBLOCK) + { if (IS_IA32_PROCESS(&scr->pt)) { scr->pt.r8 = scr->pt.r1; scr->pt.cr_iip -= 2; - } else -#endif - /* - * Note: the syscall number is in r15 which is saved in pt_regs so - * all we need to do here is adjust ip so that the "break" - * instruction gets re-executed. - */ - ia64_decrement_ip(&scr->pt); + if (errno == ERESTART_RESTARTBLOCK) { + scr->pt.r8 = 0; /* x86 version of __NR_restart_syscall */ + scr->pt.cr_iip -= 2; + } + } else { + /* + * Note: the syscall number is in r15 which is saved in + * pt_regs so all we need to do here is adjust ip so that + * the "break" instruction gets re-executed. + */ + ia64_decrement_ip(&scr->pt); + if (errno == ERESTART_RESTARTBLOCK) + scr->pt.r15 = __NR_restart_syscall; + } } } return 0; diff -Nru a/arch/ia64/kernel/smp.c b/arch/ia64/kernel/smp.c --- a/arch/ia64/kernel/smp.c Mon Dec 23 21:22:01 2002 +++ b/arch/ia64/kernel/smp.c Mon Dec 23 21:22:01 2002 @@ -206,8 +206,27 @@ void smp_flush_tlb_all (void) { - smp_call_function((void (*)(void *))__flush_tlb_all, 0, 1, 1); - __flush_tlb_all(); + smp_call_function((void (*)(void *))local_flush_tlb_all, 0, 1, 1); + local_flush_tlb_all(); +} + +void +smp_flush_tlb_mm (struct mm_struct *mm) +{ + local_finish_flush_tlb_mm(mm); + + /* this happens for the common case of a single-threaded fork(): */ + if (likely(mm == current->active_mm && atomic_read(&mm->mm_users) == 1)) + return; + + /* + * We could optimize this further by using mm->cpu_vm_mask to track which CPUs + * have been running in the address space. It's not clear that this is worth the + * trouble though: to avoid races, we have to raise the IPI on the target CPU + * anyhow, and once a CPU is interrupted, the cost of local_flush_tlb_all() is + * rather trivial. + */ + smp_call_function((void (*)(void *))local_finish_flush_tlb_mm, mm, 1, 1); } /* diff -Nru a/arch/ia64/kernel/smpboot.c b/arch/ia64/kernel/smpboot.c --- a/arch/ia64/kernel/smpboot.c Mon Dec 23 21:21:52 2002 +++ b/arch/ia64/kernel/smpboot.c Mon Dec 23 21:21:52 2002 @@ -337,7 +337,7 @@ * don't care about the eip and regs settings since we'll never reschedule the * forked task. */ - return do_fork(CLONE_VM|CLONE_IDLETASK, 0, 0, 0, NULL); + return do_fork(CLONE_VM|CLONE_IDLETASK, 0, 0, 0, NULL, NULL); } static int __init @@ -499,7 +499,7 @@ /* * If SMP should be disabled, then really disable it! */ - if (!max_cpus || (max_cpus < -1)) { + if (!max_cpus) { printk(KERN_INFO "SMP mode deactivated.\n"); cpu_online_map = phys_cpu_present_map = 1; return; diff -Nru a/arch/ia64/kernel/sys_ia64.c b/arch/ia64/kernel/sys_ia64.c --- a/arch/ia64/kernel/sys_ia64.c Mon Dec 23 21:21:55 2002 +++ b/arch/ia64/kernel/sys_ia64.c Mon Dec 23 21:21:55 2002 @@ -12,6 +12,7 @@ #include #include #include +#include #include /* doh, must come after sched.h... */ #include #include @@ -317,22 +318,26 @@ #endif /* !CONFIG_HUGETLB_PAGE */ -asmlinkage long -sys_vm86 (long arg0, long arg1, long arg2, long arg3) -{ - printk(KERN_ERR "sys_vm86(%lx, %lx, %lx, %lx)!\n", arg0, arg1, arg2, arg3); - return -ENOSYS; -} - asmlinkage unsigned long -ia64_create_module (const char *name_user, size_t size) +ia64_mremap (unsigned long addr, unsigned long old_len, unsigned long new_len, unsigned long flags, + unsigned long new_addr) { - extern unsigned long sys_create_module (const char *, size_t); - unsigned long addr; + extern unsigned long do_mremap (unsigned long addr, + unsigned long old_len, + unsigned long new_len, + unsigned long flags, + unsigned long new_addr); - addr = sys_create_module (name_user, size); - if (!IS_ERR((void *) addr)) - force_successful_syscall_return(); + down_write(¤t->mm->mmap_sem); + { + addr = do_mremap(addr, old_len, new_len, flags, new_addr); + } + up_write(¤t->mm->mmap_sem); + + if (IS_ERR((void *) addr)) + return addr; + + force_successful_syscall_return(); return addr; } diff -Nru a/arch/ia64/kernel/unaligned.c b/arch/ia64/kernel/unaligned.c --- a/arch/ia64/kernel/unaligned.c Mon Dec 23 21:22:00 2002 +++ b/arch/ia64/kernel/unaligned.c Mon Dec 23 21:22:00 2002 @@ -5,6 +5,10 @@ * Stephane Eranian * David Mosberger-Tang * + * 2002/12/09 Fix rotating register handling (off-by-1 error, missing fr-rotation). Fix + * get_rse_reg() to not leak kernel bits to user-level (reading an out-of-frame + * stacked register returns an undefined value; it does NOT trigger a + * "rsvd register fault"). * 2001/10/11 Fix unaligned access to rotating registers in s/w pipelined loops. * 2001/08/13 Correct size of extended floats (float_fsz) from 16 to 10 bytes. * 2001/01/17 Add support emulation of unaligned kernel accesses. @@ -276,6 +280,15 @@ # undef F } +static inline unsigned long +rotate_reg (unsigned long sor, unsigned long rrb, unsigned long reg) +{ + reg += rrb; + if (reg >= sor) + reg -= sor; + return reg; +} + static void set_rse_reg (struct pt_regs *regs, unsigned long r1, unsigned long val, int nat) { @@ -287,26 +300,22 @@ long sof = (regs->cr_ifs) & 0x7f; long sor = 8 * ((regs->cr_ifs >> 14) & 0xf); long rrb_gr = (regs->cr_ifs >> 18) & 0x7f; - long ridx; - - if ((r1 - 32) > sor) - ridx = -sof + (r1 - 32); - else if ((r1 - 32) < (sor - rrb_gr)) - ridx = -sof + (r1 - 32) + rrb_gr; - else - ridx = -sof + (r1 - 32) - (sor - rrb_gr); - - DPRINT("r%lu, sw.bspstore=%lx pt.bspstore=%lx sof=%ld sol=%ld ridx=%ld\n", - r1, sw->ar_bspstore, regs->ar_bspstore, sof, (regs->cr_ifs >> 7) & 0x7f, ridx); + long ridx = r1 - 32; - if ((r1 - 32) >= sof) { + if (ridx >= sof) { /* this should never happen, as the "rsvd register fault" has higher priority */ DPRINT("ignoring write to r%lu; only %lu registers are allocated!\n", r1, sof); return; } + if (ridx < sor) + ridx = rotate_reg(sor, rrb_gr, ridx); + + DPRINT("r%lu, sw.bspstore=%lx pt.bspstore=%lx sof=%ld sol=%ld ridx=%ld\n", + r1, sw->ar_bspstore, regs->ar_bspstore, sof, (regs->cr_ifs >> 7) & 0x7f, ridx); + on_kbs = ia64_rse_num_regs(kbs, (unsigned long *) sw->ar_bspstore); - addr = ia64_rse_skip_regs((unsigned long *) sw->ar_bspstore, ridx); + addr = ia64_rse_skip_regs((unsigned long *) sw->ar_bspstore, -sof + ridx); if (addr >= kbs) { /* the register is on the kernel backing store: easy... */ rnat_addr = ia64_rse_rnat_addr(addr); @@ -334,7 +343,7 @@ bspstore = (unsigned long *)regs->ar_bspstore; ubs_end = ia64_rse_skip_regs(bspstore, on_kbs); bsp = ia64_rse_skip_regs(ubs_end, -sof); - addr = ia64_rse_skip_regs(bsp, ridx + sof); + addr = ia64_rse_skip_regs(bsp, ridx); DPRINT("ubs_end=%p bsp=%p addr=%p\n", (void *) ubs_end, (void *) bsp, (void *) addr); @@ -368,26 +377,22 @@ long sof = (regs->cr_ifs) & 0x7f; long sor = 8 * ((regs->cr_ifs >> 14) & 0xf); long rrb_gr = (regs->cr_ifs >> 18) & 0x7f; - long ridx; + long ridx = r1 - 32; - if ((r1 - 32) > sor) - ridx = -sof + (r1 - 32); - else if ((r1 - 32) < (sor - rrb_gr)) - ridx = -sof + (r1 - 32) + rrb_gr; - else - ridx = -sof + (r1 - 32) - (sor - rrb_gr); + if (ridx >= sof) { + /* read of out-of-frame register returns an undefined value; 0 in our case. */ + DPRINT("ignoring read from r%lu; only %lu registers are allocated!\n", r1, sof); + goto fail; + } + + if (ridx < sor) + ridx = rotate_reg(sor, rrb_gr, ridx); DPRINT("r%lu, sw.bspstore=%lx pt.bspstore=%lx sof=%ld sol=%ld ridx=%ld\n", r1, sw->ar_bspstore, regs->ar_bspstore, sof, (regs->cr_ifs >> 7) & 0x7f, ridx); - if ((r1 - 32) >= sof) { - /* this should never happen, as the "rsvd register fault" has higher priority */ - DPRINT("ignoring read from r%lu; only %lu registers are allocated!\n", r1, sof); - return; - } - on_kbs = ia64_rse_num_regs(kbs, (unsigned long *) sw->ar_bspstore); - addr = ia64_rse_skip_regs((unsigned long *) sw->ar_bspstore, ridx); + addr = ia64_rse_skip_regs((unsigned long *) sw->ar_bspstore, -sof + ridx); if (addr >= kbs) { /* the register is on the kernel backing store: easy... */ *val = *addr; @@ -407,13 +412,13 @@ */ if (regs->r12 >= TASK_SIZE) { DPRINT("ignoring kernel read of r%lu; register isn't on the RBS!", r1); - return; + goto fail; } bspstore = (unsigned long *)regs->ar_bspstore; ubs_end = ia64_rse_skip_regs(bspstore, on_kbs); bsp = ia64_rse_skip_regs(ubs_end, -sof); - addr = ia64_rse_skip_regs(bsp, ridx + sof); + addr = ia64_rse_skip_regs(bsp, ridx); DPRINT("ubs_end=%p bsp=%p addr=%p\n", (void *) ubs_end, (void *) bsp, (void *) addr); @@ -428,6 +433,13 @@ ia64_peek(current, sw, (unsigned long) ubs_end, (unsigned long) rnat_addr, &rnats); *nat = (rnats & nat_mask) != 0; } + return; + + fail: + *val = 0; + if (nat) + *nat = 0; + return; } @@ -486,7 +498,16 @@ DPRINT("*0x%lx=0x%lx NaT=%d new unat: %p=%lx\n", addr, val, nat, (void *) unat,*unat); } -#define IA64_FPH_OFFS(r) (r - IA64_FIRST_ROTATING_FR) +/* + * Return the (rotated) index for floating point register REGNUM (REGNUM must be in the + * range from 32-127, result is in the range from 0-95. + */ +static inline unsigned long +fph_index (struct pt_regs *regs, long regnum) +{ + unsigned long rrb_fr = (regs->cr_ifs >> 25) & 0x7f; + return rotate_reg(96, rrb_fr, (regnum - IA64_FIRST_ROTATING_FR)); +} static void setfpreg (unsigned long regnum, struct ia64_fpreg *fpval, struct pt_regs *regs) @@ -507,7 +528,7 @@ */ if (regnum >= IA64_FIRST_ROTATING_FR) { ia64_sync_fph(current); - current->thread.fph[IA64_FPH_OFFS(regnum)] = *fpval; + current->thread.fph[fph_index(regs, regnum)] = *fpval; } else { /* * pt_regs or switch_stack ? @@ -566,7 +587,7 @@ */ if (regnum >= IA64_FIRST_ROTATING_FR) { ia64_flush_fph(current); - *fpval = current->thread.fph[IA64_FPH_OFFS(regnum)]; + *fpval = current->thread.fph[fph_index(regs, regnum)]; } else { /* * f0 = 0.0, f1= 1.0. Those registers are constant and are thus @@ -651,8 +672,8 @@ * just in case. */ if (ld.x6_op == 1 || ld.x6_op == 3) { - printk("%s %s: register update on speculative load, error\n", KERN_ERR, __FUNCTION__); - die_if_kernel("unaligned reference on specualtive load with register update\n", + printk(KERN_ERR "%s: register update on speculative load, error\n", __FUNCTION__); + die_if_kernel("unaligned reference on speculative load with register update\n", regs, 30); } @@ -1081,8 +1102,8 @@ * For this reason we keep this sanity check */ if (ld.x6_op == 1 || ld.x6_op == 3) - printk("%s %s: register update on speculative load pair, " - "error\n",KERN_ERR, __FUNCTION__); + printk(KERN_ERR "%s: register update on speculative load pair, error\n", + __FUNCTION__); setreg(ld.r3, ifa, 0, regs); } diff -Nru a/arch/ia64/mm/Makefile b/arch/ia64/mm/Makefile --- a/arch/ia64/mm/Makefile Mon Dec 23 21:21:52 2002 +++ b/arch/ia64/mm/Makefile Mon Dec 23 21:21:52 2002 @@ -1,13 +1,9 @@ # # Makefile for the ia64-specific parts of the memory manager. # -# Note! Dependencies are done automagically by 'make dep', which also -# removes any old dependencies. DON'T put your own dependencies here -# unless it's something special (ie not a .c file). -# -# Note 2! The CFLAGS definition is now in the main makefile... -obj-y := init.o fault.o tlb.o extable.o +obj-y := init.o fault.o tlb.o extable.o + obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o -obj-$(CONFIG_NUMA) += numa.o +obj-$(CONFIG_NUMA) += numa.o obj-$(CONFIG_DISCONTIGMEM) += discontig.o diff -Nru a/arch/ia64/mm/fault.c b/arch/ia64/mm/fault.c --- a/arch/ia64/mm/fault.c Mon Dec 23 21:22:00 2002 +++ b/arch/ia64/mm/fault.c Mon Dec 23 21:22:00 2002 @@ -96,13 +96,13 @@ * fault. */ switch (handle_mm_fault(mm, vma, address, (mask & VM_WRITE) != 0)) { - case 1: + case VM_FAULT_MINOR: ++current->min_flt; break; - case 2: + case VM_FAULT_MAJOR: ++current->maj_flt; break; - case 0: + case VM_FAULT_SIGBUS: /* * We ran out of memory, or some other thing happened * to us that made us unable to handle the page fault @@ -110,8 +110,10 @@ */ signal = SIGBUS; goto bad_area; - default: + case VM_FAULT_OOM: goto out_of_memory; + default: + BUG(); } up_read(&mm->mmap_sem); return; diff -Nru a/arch/ia64/mm/tlb.c b/arch/ia64/mm/tlb.c --- a/arch/ia64/mm/tlb.c Mon Dec 23 21:21:58 2002 +++ b/arch/ia64/mm/tlb.c Mon Dec 23 21:21:58 2002 @@ -84,7 +84,7 @@ for (i = 0; i < NR_CPUS; ++i) if (i != smp_processor_id()) per_cpu(ia64_need_tlb_flush, i) = 1; - __flush_tlb_all(); + local_flush_tlb_all(); } void @@ -108,7 +108,7 @@ } void -__flush_tlb_all (void) +local_flush_tlb_all (void) { unsigned long i, j, flags, count0, count1, stride0, stride1, addr; @@ -194,5 +194,5 @@ local_cpu_data->ptce_stride[0] = ptce_info.stride[0]; local_cpu_data->ptce_stride[1] = ptce_info.stride[1]; - __flush_tlb_all(); /* nuke left overs from bootstrapping... */ + local_flush_tlb_all(); /* nuke left overs from bootstrapping... */ } diff -Nru a/arch/ia64/pci/Makefile b/arch/ia64/pci/Makefile --- a/arch/ia64/pci/Makefile Mon Dec 23 21:21:55 2002 +++ b/arch/ia64/pci/Makefile Mon Dec 23 21:21:55 2002 @@ -1 +1,4 @@ +# +# Makefile for the ia64-specific parts of the pci bus +# obj-y := pci.o diff -Nru a/arch/ia64/pci/pci.c b/arch/ia64/pci/pci.c --- a/arch/ia64/pci/pci.c Mon Dec 23 21:21:54 2002 +++ b/arch/ia64/pci/pci.c Mon Dec 23 21:21:54 2002 @@ -44,10 +44,6 @@ #define DBG(x...) #endif -#ifdef CONFIG_IA64_MCA -extern void ia64_mca_check_errors( void ); -#endif - struct pci_fixup pcibios_fixups[1]; /* diff -Nru a/arch/ia64/sn/configs/sn1/defconfig-bigsur-mp b/arch/ia64/sn/configs/sn1/defconfig-bigsur-mp --- a/arch/ia64/sn/configs/sn1/defconfig-bigsur-mp Mon Dec 23 21:21:53 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,765 +0,0 @@ -# -# Automatically generated make config: don't edit -# - -# -# Code maturity level options -# -CONFIG_EXPERIMENTAL=y - -# -# Loadable module support -# -# CONFIG_MODULES is not set - -# -# General setup -# -CONFIG_IA64=y -# CONFIG_ISA is not set -# CONFIG_EISA is not set -# CONFIG_MCA is not set -# CONFIG_SBUS is not set -CONFIG_RWSEM_GENERIC_SPINLOCK=y -# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set -CONFIG_ACPI=y -CONFIG_ACPI_EFI=y -CONFIG_ACPI_INTERPRETER=y -CONFIG_ACPI_KERNEL_CONFIG=y -CONFIG_ITANIUM=y -# CONFIG_MCKINLEY is not set -# CONFIG_IA64_GENERIC is not set -CONFIG_IA64_DIG=y -# CONFIG_IA64_HP_SIM is not set -# CONFIG_IA64_SGI_SN1 is not set -# CONFIG_IA64_SGI_SN2 is not set -# CONFIG_IA64_PAGE_SIZE_4KB is not set -# CONFIG_IA64_PAGE_SIZE_8KB is not set -CONFIG_IA64_PAGE_SIZE_16KB=y -# CONFIG_IA64_PAGE_SIZE_64KB is not set -CONFIG_IA64_BRL_EMU=y -CONFIG_ITANIUM_BSTEP_SPECIFIC=y -CONFIG_IA64_L1_CACHE_SHIFT=6 -# CONFIG_NUMA is not set -# CONFIG_IA64_MCA is not set -CONFIG_PM=y -CONFIG_IA64_HAVE_SYNCRONIZED_ITC=y -CONFIG_DEVFS_FS=y -CONFIG_DEVFS_DEBUG=y -CONFIG_KCORE_ELF=y -CONFIG_SMP=y -CONFIG_IA32_SUPPORT=y -CONFIG_PERFMON=y -CONFIG_IA64_PALINFO=y -# CONFIG_EFI_VARS is not set -CONFIG_NET=y -CONFIG_SYSVIPC=y -# CONFIG_BSD_PROCESS_ACCT is not set -CONFIG_SYSCTL=y -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set -# CONFIG_ACPI_DEBUG is not set -# CONFIG_ACPI_BUSMGR is not set -# CONFIG_ACPI_SYS is not set -# CONFIG_ACPI_CPU is not set -# CONFIG_ACPI_BUTTON is not set -# CONFIG_ACPI_AC is not set -# CONFIG_ACPI_EC is not set -# CONFIG_ACPI_CMBATT is not set -# CONFIG_ACPI_THERMAL is not set -CONFIG_PCI=y -# CONFIG_PCI_NAMES is not set -# CONFIG_HOTPLUG is not set -# CONFIG_PCMCIA is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Networking options -# -# CONFIG_PACKET is not set -# CONFIG_NETLINK is not set -# CONFIG_NETFILTER is not set -# CONFIG_FILTER is not set -CONFIG_UNIX=y -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -# CONFIG_IP_PNP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_INET_ECN is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_IPV6 is not set -# CONFIG_KHTTPD is not set -# CONFIG_ATM is not set - -# -# -# -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_DECNET is not set -# CONFIG_BRIDGE is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_LLC is not set -# CONFIG_NET_DIVERT is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_NET_FASTROUTE is not set -# CONFIG_NET_HW_FLOWCONTROL is not set - -# -# QoS and/or fair queueing -# -# CONFIG_NET_SCHED is not set - -# -# Memory Technology Devices (MTD) -# -# CONFIG_MTD is not set - -# -# Plug and Play configuration -# -# CONFIG_PNP is not set -# CONFIG_ISAPNP is not set -# CONFIG_PNPBIOS is not set - -# -# Block devices -# -# CONFIG_BLK_DEV_FD is not set -# CONFIG_BLK_DEV_XD is not set -# CONFIG_PARIDE is not set -# CONFIG_BLK_CPQ_DA is not set -# CONFIG_BLK_CPQ_CISS_DA is not set -# CONFIG_BLK_DEV_DAC960 is not set -# CONFIG_BLK_DEV_LOOP is not set -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_RAM is not set -# CONFIG_BLK_DEV_INITRD is not set - -# -# I2O device support -# -# CONFIG_I2O is not set -# CONFIG_I2O_PCI is not set -# CONFIG_I2O_BLOCK is not set -# CONFIG_I2O_LAN is not set -# CONFIG_I2O_SCSI is not set -# CONFIG_I2O_PROC is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set -# CONFIG_BLK_DEV_MD is not set -# CONFIG_MD_LINEAR is not set -# CONFIG_MD_RAID0 is not set -# CONFIG_MD_RAID1 is not set -# CONFIG_MD_RAID5 is not set -# CONFIG_MD_MULTIPATH is not set -# CONFIG_BLK_DEV_LVM is not set - -# -# ATA/IDE/MFM/RLL support -# -CONFIG_IDE=y - -# -# IDE, ATA and ATAPI Block devices -# -CONFIG_BLK_DEV_IDE=y - -# -# Please see Documentation/ide.txt for help/info on IDE drives -# -# CONFIG_BLK_DEV_HD_IDE is not set -# CONFIG_BLK_DEV_HD is not set -CONFIG_BLK_DEV_IDEDISK=y -# CONFIG_IDEDISK_MULTI_MODE is not set -# CONFIG_BLK_DEV_IDECS is not set -CONFIG_BLK_DEV_IDECD=y -# CONFIG_BLK_DEV_IDETAPE is not set -CONFIG_BLK_DEV_IDEFLOPPY=y -# CONFIG_BLK_DEV_IDESCSI is not set - -# -# IDE chipset support/bugfixes -# -# CONFIG_BLK_DEV_CMD640 is not set -# CONFIG_BLK_DEV_CMD640_ENHANCED is not set -# CONFIG_BLK_DEV_ISAPNP is not set -# CONFIG_BLK_DEV_RZ1000 is not set -# CONFIG_IDEPCI_SHARE_IRQ is not set -CONFIG_BLK_DEV_IDEDMA_PCI=y -CONFIG_BLK_DEV_ADMA=y -# CONFIG_BLK_DEV_OFFBOARD is not set -# CONFIG_IDEDMA_PCI_AUTO is not set -CONFIG_BLK_DEV_IDEDMA=y -# CONFIG_IDEDMA_NEW_DRIVE_LISTINGS is not set -# CONFIG_BLK_DEV_AEC62XX is not set -# CONFIG_AEC62XX_TUNING is not set -# CONFIG_BLK_DEV_ALI15X3 is not set -# CONFIG_WDC_ALI15X3 is not set -# CONFIG_BLK_DEV_AMD74XX is not set -# CONFIG_AMD74XX_OVERRIDE is not set -# CONFIG_BLK_DEV_CMD64X is not set -# CONFIG_BLK_DEV_CY82C693 is not set -# CONFIG_BLK_DEV_CS5530 is not set -# CONFIG_BLK_DEV_HPT34X is not set -# CONFIG_HPT34X_AUTODMA is not set -# CONFIG_BLK_DEV_HPT366 is not set -# CONFIG_BLK_DEV_PIIX is not set -# CONFIG_PIIX_TUNING is not set -# CONFIG_BLK_DEV_NS87415 is not set -# CONFIG_BLK_DEV_OPTI621 is not set -# CONFIG_BLK_DEV_PDC202XX is not set -# CONFIG_PDC202XX_BURST is not set -# CONFIG_PDC202XX_FORCE is not set -# CONFIG_BLK_DEV_SVWKS is not set -# CONFIG_BLK_DEV_SIS5513 is not set -# CONFIG_BLK_DEV_TRM290 is not set -# CONFIG_BLK_DEV_VIA82CXXX is not set -# CONFIG_IDE_CHIPSETS is not set -# CONFIG_IDEDMA_AUTO is not set -# CONFIG_IDEDMA_IVB is not set -# CONFIG_BLK_DEV_IDE_MODES is not set -# CONFIG_BLK_DEV_ATARAID is not set -# CONFIG_BLK_DEV_ATARAID_PDC is not set -# CONFIG_BLK_DEV_ATARAID_HPT is not set - -# -# Alternate 1394 support -# -# CONFIG_X1394 is not set - -# -# Alternate SCSI support -# -# CONFIG_XSCSI is not set - -# -# SCSI support -# -CONFIG_SCSI=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -CONFIG_SD_EXTRA_DEVS=40 -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -# CONFIG_BLK_DEV_SR is not set -# CONFIG_CHR_DEV_SG is not set - -# -# Some SCSI devices (e.g. CD jukebox) support multiple LUNs -# -# CONFIG_SCSI_DEBUG_QUEUES is not set -CONFIG_SCSI_MULTI_LUN=y -CONFIG_SCSI_CONSTANTS=y -CONFIG_SCSI_LOGGING=y - -# -# SCSI low-level drivers -# -# CONFIG_BLK_DEV_3W_XXXX_RAID is not set -# CONFIG_SCSI_7000FASST is not set -# CONFIG_SCSI_ACARD is not set -# CONFIG_SCSI_AHA152X is not set -# CONFIG_SCSI_AHA1542 is not set -# CONFIG_SCSI_AHA1740 is not set -# CONFIG_SCSI_AIC7XXX is not set -# CONFIG_SCSI_AIC7XXX_OLD is not set -# CONFIG_SCSI_DPT_I2O is not set -# CONFIG_SCSI_ADVANSYS is not set -# CONFIG_SCSI_IN2000 is not set -# CONFIG_SCSI_AM53C974 is not set -# CONFIG_SCSI_MEGARAID is not set -# CONFIG_SCSI_BUSLOGIC is not set -# CONFIG_SCSI_CPQFCTS is not set -# CONFIG_SCSI_DMX3191D is not set -# CONFIG_SCSI_DTC3280 is not set -# CONFIG_SCSI_EATA is not set -# CONFIG_SCSI_EATA_DMA is not set -# CONFIG_SCSI_EATA_PIO is not set -# CONFIG_SCSI_FUTURE_DOMAIN is not set -# CONFIG_SCSI_GDTH is not set -# CONFIG_SCSI_GENERIC_NCR5380 is not set -# CONFIG_SCSI_INITIO is not set -# CONFIG_SCSI_INIA100 is not set -# CONFIG_SCSI_NCR53C406A is not set -# CONFIG_SCSI_NCR53C7xx is not set -# CONFIG_SCSI_NCR53C8XX is not set -# CONFIG_SCSI_SYM53C8XX is not set -# CONFIG_SCSI_PAS16 is not set -# CONFIG_SCSI_PCI2000 is not set -# CONFIG_SCSI_PCI2220I is not set -# CONFIG_SCSI_PSI240I is not set -# CONFIG_SCSI_QLOGIC_FAS is not set -# CONFIG_SCSI_QLOGIC_ISP is not set -# CONFIG_SCSI_QLOGIC_FC is not set -CONFIG_SCSI_QLOGIC_1280=y -# CONFIG_SCSI_QLOGIC_QLA2100 is not set -# CONFIG_SCSI_SIM710 is not set -# CONFIG_SCSI_SYM53C416 is not set -# CONFIG_SCSI_DC390T is not set -# CONFIG_SCSI_T128 is not set -# CONFIG_SCSI_U14_34F is not set -# CONFIG_SCSI_DEBUG is not set - -# -# Network device support -# -CONFIG_NETDEVICES=y - -# -# ARCnet devices -# -# CONFIG_ARCNET is not set -CONFIG_DUMMY=y -# CONFIG_BONDING is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set - -# -# Ethernet (10 or 100Mbit) -# -CONFIG_NET_ETHERNET=y -# CONFIG_SUNLANCE is not set -# CONFIG_HAPPYMEAL is not set -# CONFIG_SUNBMAC is not set -# CONFIG_SUNQE is not set -# CONFIG_SUNLANCE is not set -# CONFIG_SUNGEM is not set -# CONFIG_NET_VENDOR_3COM is not set -# CONFIG_LANCE is not set -# CONFIG_NET_VENDOR_SMC is not set -# CONFIG_NET_VENDOR_RACAL is not set -# CONFIG_HP100 is not set -# CONFIG_NET_ISA is not set -CONFIG_NET_PCI=y -# CONFIG_PCNET32 is not set -# CONFIG_ADAPTEC_STARFIRE is not set -# CONFIG_APRICOT is not set -# CONFIG_CS89x0 is not set -# CONFIG_TULIP is not set -# CONFIG_DE4X5 is not set -# CONFIG_DGRS is not set -# CONFIG_DM9102 is not set -CONFIG_EEPRO100=y -# CONFIG_LNE390 is not set -# CONFIG_FEALNX is not set -# CONFIG_NATSEMI is not set -# CONFIG_NE2K_PCI is not set -# CONFIG_NE3210 is not set -# CONFIG_ES3210 is not set -# CONFIG_8139CP is not set -# CONFIG_8139TOO is not set -# CONFIG_8139TOO_PIO is not set -# CONFIG_8139TOO_TUNE_TWISTER is not set -# CONFIG_8139TOO_8129 is not set -# CONFIG_SIS900 is not set -# CONFIG_EPIC100 is not set -# CONFIG_SUNDANCE is not set -# CONFIG_TLAN is not set -# CONFIG_VIA_RHINE is not set -# CONFIG_WINBOND_840 is not set -# CONFIG_NET_POCKET is not set - -# -# Ethernet (1000 Mbit) -# -# CONFIG_ACENIC is not set -# CONFIG_DL2K is not set -# CONFIG_MYRI_SBUS is not set -# CONFIG_NS83820 is not set -# CONFIG_HAMACHI is not set -# CONFIG_YELLOWFIN is not set -# CONFIG_SK98LIN is not set -# CONFIG_FDDI is not set -# CONFIG_HIPPI is not set -# CONFIG_PLIP is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set - -# -# Wireless LAN (non-hamradio) -# -# CONFIG_NET_RADIO is not set - -# -# Token Ring devices -# -# CONFIG_TR is not set -# CONFIG_NET_FC is not set -# CONFIG_RCPCI is not set -# CONFIG_SHAPER is not set - -# -# Wan interfaces -# -# CONFIG_WAN is not set - -# -# Amateur Radio support -# -# CONFIG_HAMRADIO is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# CD-ROM drivers (not for SCSI or IDE/ATAPI drives) -# -# CONFIG_CD_NO_IDESCSI is not set - -# -# Input core support -# -# CONFIG_INPUT is not set -# CONFIG_INPUT_KEYBDEV is not set -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_EVDEV is not set - -# -# Character devices -# -CONFIG_VT=y -CONFIG_VT_CONSOLE=y -CONFIG_SERIAL=y -CONFIG_SERIAL_CONSOLE=y -# CONFIG_SERIAL_EXTENDED is not set -# CONFIG_SERIAL_NONSTANDARD is not set -CONFIG_UNIX98_PTYS=y -CONFIG_UNIX98_PTY_COUNT=256 - -# -# I2C support -# -# CONFIG_I2C is not set - -# -# Mice -# -# CONFIG_BUSMOUSE is not set -CONFIG_MOUSE=y -CONFIG_PSMOUSE=y -# CONFIG_82C710_MOUSE is not set -# CONFIG_PC110_PAD is not set - -# -# Joysticks -# -# CONFIG_INPUT_GAMEPORT is not set - -# -# Input core support is needed for gameports -# - -# -# Input core support is needed for joysticks -# -# CONFIG_QIC02_TAPE is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_INTEL_RNG is not set -# CONFIG_NVRAM is not set -# CONFIG_RTC is not set -# CONFIG_EFI_RTC is not set -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_FTAPE is not set -# CONFIG_AGP is not set -# CONFIG_DRM is not set -# CONFIG_MWAVE is not set - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# File systems -# -# CONFIG_QUOTA is not set -CONFIG_AUTOFS_FS=y -CONFIG_AUTOFS4_FS=y -# CONFIG_REISERFS_FS is not set -# CONFIG_REISERFS_CHECK is not set -# CONFIG_ADFS_FS is not set -# CONFIG_ADFS_FS_RW is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_BFS_FS is not set -CONFIG_FAT_FS=y -CONFIG_MSDOS_FS=y -# CONFIG_UMSDOS_FS is not set -CONFIG_VFAT_FS=y -# CONFIG_EFS_FS is not set -# CONFIG_JFFS_FS is not set -# CONFIG_JFFS2_FS is not set -# CONFIG_CRAMFS is not set -CONFIG_TMPFS=y -# CONFIG_RAMFS is not set -CONFIG_ISO9660_FS=y -CONFIG_JOLIET=y -# CONFIG_MINIX_FS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_NTFS_FS is not set -# CONFIG_NTFS_DEBUG is not set -# CONFIG_NTFS_RW is not set -# CONFIG_HPFS_FS is not set -CONFIG_PROC_FS=y -CONFIG_DEVFS_FS=y -CONFIG_DEVFS_MOUNT=y -CONFIG_DEVFS_DEBUG=y -CONFIG_DEVPTS_FS=y -# CONFIG_QNX4FS_FS is not set -# CONFIG_QNX4FS_RW is not set -# CONFIG_ROMFS_FS is not set -CONFIG_EXT2_FS=y -# CONFIG_SYSV_FS is not set -# CONFIG_UDF_FS is not set -# CONFIG_UDF_RW is not set -# CONFIG_UFS_FS is not set -# CONFIG_UFS_FS_WRITE is not set -# CONFIG_XFS_SUPPORT is not set - -# -# Network File Systems -# -# CONFIG_CODA_FS is not set -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -# CONFIG_ROOT_NFS is not set -CONFIG_NFSD=y -CONFIG_NFSD_V3=y -CONFIG_SUNRPC=y -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -# CONFIG_SMB_FS is not set -# CONFIG_NCP_FS is not set -# CONFIG_NCPFS_PACKET_SIGNING is not set -# CONFIG_NCPFS_IOCTL_LOCKING is not set -# CONFIG_NCPFS_STRONG is not set -# CONFIG_NCPFS_NFS_NS is not set -# CONFIG_NCPFS_OS2_NS is not set -# CONFIG_NCPFS_SMALLDOS is not set -# CONFIG_NCPFS_NLS is not set -# CONFIG_NCPFS_EXTRAS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y -# CONFIG_SMB_NLS is not set -CONFIG_NLS=y - -# -# Native Language Support -# -CONFIG_NLS_DEFAULT="iso8859-1" -# CONFIG_NLS_CODEPAGE_437 is not set -# CONFIG_NLS_CODEPAGE_737 is not set -# CONFIG_NLS_CODEPAGE_775 is not set -# CONFIG_NLS_CODEPAGE_850 is not set -# CONFIG_NLS_CODEPAGE_852 is not set -# CONFIG_NLS_CODEPAGE_855 is not set -# CONFIG_NLS_CODEPAGE_857 is not set -# CONFIG_NLS_CODEPAGE_860 is not set -# CONFIG_NLS_CODEPAGE_861 is not set -# CONFIG_NLS_CODEPAGE_862 is not set -# CONFIG_NLS_CODEPAGE_863 is not set -# CONFIG_NLS_CODEPAGE_864 is not set -# CONFIG_NLS_CODEPAGE_865 is not set -# CONFIG_NLS_CODEPAGE_866 is not set -# CONFIG_NLS_CODEPAGE_869 is not set -# CONFIG_NLS_CODEPAGE_936 is not set -# CONFIG_NLS_CODEPAGE_950 is not set -# CONFIG_NLS_CODEPAGE_932 is not set -# CONFIG_NLS_CODEPAGE_949 is not set -# CONFIG_NLS_CODEPAGE_874 is not set -# CONFIG_NLS_ISO8859_8 is not set -# CONFIG_NLS_CODEPAGE_1251 is not set -# CONFIG_NLS_ISO8859_1 is not set -# CONFIG_NLS_ISO8859_2 is not set -# CONFIG_NLS_ISO8859_3 is not set -# CONFIG_NLS_ISO8859_4 is not set -# CONFIG_NLS_ISO8859_5 is not set -# CONFIG_NLS_ISO8859_6 is not set -# CONFIG_NLS_ISO8859_7 is not set -# CONFIG_NLS_ISO8859_9 is not set -# CONFIG_NLS_ISO8859_13 is not set -# CONFIG_NLS_ISO8859_14 is not set -# CONFIG_NLS_ISO8859_15 is not set -# CONFIG_NLS_KOI8_R is not set -# CONFIG_NLS_KOI8_U is not set -# CONFIG_NLS_UTF8 is not set - -# -# Console drivers -# -CONFIG_VGA_CONSOLE=y - -# -# Frame-buffer support -# -# CONFIG_FB is not set - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# -# CONFIG_USB is not set - -# -# USB Controllers -# -# CONFIG_USB_UHCI is not set -# CONFIG_USB_UHCI_ALT is not set -# CONFIG_USB_OHCI is not set - -# -# USB Device Class drivers -# -# CONFIG_USB_AUDIO is not set -# CONFIG_USB_BLUETOOTH is not set -# CONFIG_USB_STORAGE is not set -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_DPCM is not set -# CONFIG_USB_STORAGE_HP8200e is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_ACM is not set -# CONFIG_USB_PRINTER is not set - -# -# USB Human Interface Devices (HID) -# - -# -# Input core support is needed for USB HID -# - -# -# USB Imaging devices -# -# CONFIG_USB_DC2XX is not set -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_SCANNER is not set -# CONFIG_USB_MICROTEK is not set -# CONFIG_USB_HPUSBSCSI is not set - -# -# USB Multimedia devices -# - -# -# Video4Linux support is needed for USB Multimedia device support -# - -# -# USB Network adaptors -# -# CONFIG_USB_PEGASUS is not set -# CONFIG_USB_KAWETH is not set -# CONFIG_USB_CATC is not set -# CONFIG_USB_CDCETHER is not set -# CONFIG_USB_USBNET is not set - -# -# USB port drivers -# -# CONFIG_USB_USS720 is not set - -# -# USB Serial Converter support -# -# CONFIG_USB_SERIAL is not set -# CONFIG_USB_SERIAL_GENERIC is not set -# CONFIG_USB_SERIAL_BELKIN is not set -# CONFIG_USB_SERIAL_WHITEHEAT is not set -# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set -# CONFIG_USB_SERIAL_EMPEG is not set -# CONFIG_USB_SERIAL_FTDI_SIO is not set -# CONFIG_USB_SERIAL_VISOR is not set -# CONFIG_USB_SERIAL_IR is not set -# CONFIG_USB_SERIAL_EDGEPORT is not set -# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set -# CONFIG_USB_SERIAL_KEYSPAN is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set -# CONFIG_USB_SERIAL_MCT_U232 is not set -# CONFIG_USB_SERIAL_PL2303 is not set -# CONFIG_USB_SERIAL_CYBERJACK is not set -# CONFIG_USB_SERIAL_XIRCOM is not set -# CONFIG_USB_SERIAL_OMNINET is not set - -# -# USB Miscellaneous drivers -# -# CONFIG_USB_RIO500 is not set - -# -# IEEE 1394 (FireWire) support (EXPERIMENTAL) -# -# CONFIG_IEEE1394 is not set - -# -# Bluetooth support -# -# CONFIG_BT is not set - -# -# Kernel hacking -# -CONFIG_DEBUG_KERNEL=y -CONFIG_IA64_PRINT_HAZARDS=y -# CONFIG_DISABLE_VHPT is not set -CONFIG_MAGIC_SYSRQ=y -CONFIG_IA64_EARLY_PRINTK=y -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_IA64_DEBUG_CMPXCHG is not set -# CONFIG_IA64_DEBUG_IRQ is not set -CONFIG_KDB=y -CONFIG_KDB_MODULES=y -# CONFIG_KDB_OFF is not set - -# -# Load all symbols for debugging is required for KDB -# -CONFIG_KALLSYMS=y diff -Nru a/arch/ia64/sn/configs/sn1/defconfig-bigsur-sp b/arch/ia64/sn/configs/sn1/defconfig-bigsur-sp --- a/arch/ia64/sn/configs/sn1/defconfig-bigsur-sp Mon Dec 23 21:21:52 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,760 +0,0 @@ -# -# Automatically generated make config: don't edit -# - -# -# Code maturity level options -# -CONFIG_EXPERIMENTAL=y - -# -# Loadable module support -# -# CONFIG_MODULES is not set - -# -# General setup -# -CONFIG_IA64=y -# CONFIG_ISA is not set -# CONFIG_EISA is not set -# CONFIG_MCA is not set -# CONFIG_SBUS is not set -CONFIG_RWSEM_GENERIC_SPINLOCK=y -# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set -CONFIG_ACPI=y -CONFIG_ACPI_EFI=y -CONFIG_ACPI_INTERPRETER=y -CONFIG_ACPI_KERNEL_CONFIG=y -CONFIG_ITANIUM=y -# CONFIG_MCKINLEY is not set -# CONFIG_IA64_GENERIC is not set -CONFIG_IA64_DIG=y -# CONFIG_IA64_HP_SIM is not set -# CONFIG_IA64_SGI_SN1 is not set -# CONFIG_IA64_SGI_SN2 is not set -# CONFIG_IA64_PAGE_SIZE_4KB is not set -# CONFIG_IA64_PAGE_SIZE_8KB is not set -CONFIG_IA64_PAGE_SIZE_16KB=y -# CONFIG_IA64_PAGE_SIZE_64KB is not set -CONFIG_IA64_BRL_EMU=y -CONFIG_ITANIUM_BSTEP_SPECIFIC=y -CONFIG_IA64_L1_CACHE_SHIFT=6 -# CONFIG_NUMA is not set -# CONFIG_IA64_MCA is not set -CONFIG_PM=y -CONFIG_IA64_HAVE_SYNCRONIZED_ITC=y -CONFIG_DEVFS_FS=y -CONFIG_DEVFS_DEBUG=y -CONFIG_KCORE_ELF=y -# CONFIG_SMP is not set -CONFIG_IA32_SUPPORT=y -CONFIG_PERFMON=y -CONFIG_IA64_PALINFO=y -# CONFIG_EFI_VARS is not set -CONFIG_NET=y -CONFIG_SYSVIPC=y -# CONFIG_BSD_PROCESS_ACCT is not set -CONFIG_SYSCTL=y -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set -# CONFIG_ACPI_DEBUG is not set -# CONFIG_ACPI_BUSMGR is not set -# CONFIG_ACPI_SYS is not set -# CONFIG_ACPI_CPU is not set -# CONFIG_ACPI_BUTTON is not set -# CONFIG_ACPI_AC is not set -# CONFIG_ACPI_EC is not set -# CONFIG_ACPI_CMBATT is not set -# CONFIG_ACPI_THERMAL is not set -CONFIG_PCI=y -# CONFIG_PCI_NAMES is not set -# CONFIG_HOTPLUG is not set -# CONFIG_PCMCIA is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Networking options -# -# CONFIG_PACKET is not set -# CONFIG_NETLINK is not set -# CONFIG_NETFILTER is not set -# CONFIG_FILTER is not set -CONFIG_UNIX=y -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -# CONFIG_IP_PNP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_INET_ECN is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_IPV6 is not set -# CONFIG_KHTTPD is not set -# CONFIG_ATM is not set - -# -# -# -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_DECNET is not set -# CONFIG_BRIDGE is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_LLC is not set -# CONFIG_NET_DIVERT is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_NET_FASTROUTE is not set -# CONFIG_NET_HW_FLOWCONTROL is not set - -# -# QoS and/or fair queueing -# -# CONFIG_NET_SCHED is not set - -# -# Memory Technology Devices (MTD) -# -# CONFIG_MTD is not set - -# -# Plug and Play configuration -# -# CONFIG_PNP is not set -# CONFIG_ISAPNP is not set -# CONFIG_PNPBIOS is not set - -# -# Block devices -# -# CONFIG_BLK_DEV_FD is not set -# CONFIG_BLK_DEV_XD is not set -# CONFIG_PARIDE is not set -# CONFIG_BLK_CPQ_DA is not set -# CONFIG_BLK_CPQ_CISS_DA is not set -# CONFIG_BLK_DEV_DAC960 is not set -# CONFIG_BLK_DEV_LOOP is not set -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_RAM is not set -# CONFIG_BLK_DEV_INITRD is not set - -# -# I2O device support -# -# CONFIG_I2O is not set -# CONFIG_I2O_PCI is not set -# CONFIG_I2O_BLOCK is not set -# CONFIG_I2O_LAN is not set -# CONFIG_I2O_SCSI is not set -# CONFIG_I2O_PROC is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set -# CONFIG_BLK_DEV_MD is not set -# CONFIG_MD_LINEAR is not set -# CONFIG_MD_RAID0 is not set -# CONFIG_MD_RAID1 is not set -# CONFIG_MD_RAID5 is not set -# CONFIG_MD_MULTIPATH is not set -# CONFIG_BLK_DEV_LVM is not set - -# -# ATA/IDE/MFM/RLL support -# -CONFIG_IDE=y - -# -# IDE, ATA and ATAPI Block devices -# -CONFIG_BLK_DEV_IDE=y - -# -# Please see Documentation/ide.txt for help/info on IDE drives -# -# CONFIG_BLK_DEV_HD_IDE is not set -# CONFIG_BLK_DEV_HD is not set -CONFIG_BLK_DEV_IDEDISK=y -# CONFIG_IDEDISK_MULTI_MODE is not set -# CONFIG_BLK_DEV_IDECS is not set -CONFIG_BLK_DEV_IDECD=y -# CONFIG_BLK_DEV_IDETAPE is not set -CONFIG_BLK_DEV_IDEFLOPPY=y -# CONFIG_BLK_DEV_IDESCSI is not set - -# -# IDE chipset support/bugfixes -# -# CONFIG_BLK_DEV_CMD640 is not set -# CONFIG_BLK_DEV_CMD640_ENHANCED is not set -# CONFIG_BLK_DEV_ISAPNP is not set -# CONFIG_BLK_DEV_RZ1000 is not set -# CONFIG_IDEPCI_SHARE_IRQ is not set -CONFIG_BLK_DEV_IDEDMA_PCI=y -CONFIG_BLK_DEV_ADMA=y -# CONFIG_BLK_DEV_OFFBOARD is not set -# CONFIG_IDEDMA_PCI_AUTO is not set -CONFIG_BLK_DEV_IDEDMA=y -# CONFIG_IDEDMA_NEW_DRIVE_LISTINGS is not set -# CONFIG_BLK_DEV_AEC62XX is not set -# CONFIG_AEC62XX_TUNING is not set -# CONFIG_BLK_DEV_ALI15X3 is not set -# CONFIG_WDC_ALI15X3 is not set -# CONFIG_BLK_DEV_AMD74XX is not set -# CONFIG_AMD74XX_OVERRIDE is not set -# CONFIG_BLK_DEV_CMD64X is not set -# CONFIG_BLK_DEV_CY82C693 is not set -# CONFIG_BLK_DEV_CS5530 is not set -# CONFIG_BLK_DEV_HPT34X is not set -# CONFIG_HPT34X_AUTODMA is not set -# CONFIG_BLK_DEV_HPT366 is not set -# CONFIG_BLK_DEV_PIIX is not set -# CONFIG_PIIX_TUNING is not set -# CONFIG_BLK_DEV_NS87415 is not set -# CONFIG_BLK_DEV_OPTI621 is not set -# CONFIG_BLK_DEV_PDC202XX is not set -# CONFIG_PDC202XX_BURST is not set -# CONFIG_PDC202XX_FORCE is not set -# CONFIG_BLK_DEV_SVWKS is not set -# CONFIG_BLK_DEV_SIS5513 is not set -# CONFIG_BLK_DEV_TRM290 is not set -# CONFIG_BLK_DEV_VIA82CXXX is not set -# CONFIG_IDE_CHIPSETS is not set -# CONFIG_IDEDMA_AUTO is not set -# CONFIG_IDEDMA_IVB is not set -# CONFIG_BLK_DEV_IDE_MODES is not set -# CONFIG_BLK_DEV_ATARAID is not set -# CONFIG_BLK_DEV_ATARAID_PDC is not set -# CONFIG_BLK_DEV_ATARAID_HPT is not set - -# -# Alternate 1394 support -# -# CONFIG_X1394 is not set - -# -# Alternate SCSI support -# -# CONFIG_XSCSI is not set - -# -# SCSI support -# -CONFIG_SCSI=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -CONFIG_SD_EXTRA_DEVS=40 -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -# CONFIG_BLK_DEV_SR is not set -# CONFIG_CHR_DEV_SG is not set - -# -# Some SCSI devices (e.g. CD jukebox) support multiple LUNs -# -# CONFIG_SCSI_DEBUG_QUEUES is not set -CONFIG_SCSI_MULTI_LUN=y -CONFIG_SCSI_CONSTANTS=y -CONFIG_SCSI_LOGGING=y - -# -# SCSI low-level drivers -# -# CONFIG_BLK_DEV_3W_XXXX_RAID is not set -# CONFIG_SCSI_7000FASST is not set -# CONFIG_SCSI_ACARD is not set -# CONFIG_SCSI_AHA152X is not set -# CONFIG_SCSI_AHA1542 is not set -# CONFIG_SCSI_AHA1740 is not set -# CONFIG_SCSI_AIC7XXX is not set -# CONFIG_SCSI_AIC7XXX_OLD is not set -# CONFIG_SCSI_DPT_I2O is not set -# CONFIG_SCSI_ADVANSYS is not set -# CONFIG_SCSI_IN2000 is not set -# CONFIG_SCSI_AM53C974 is not set -# CONFIG_SCSI_MEGARAID is not set -# CONFIG_SCSI_BUSLOGIC is not set -# CONFIG_SCSI_CPQFCTS is not set -# CONFIG_SCSI_DMX3191D is not set -# CONFIG_SCSI_DTC3280 is not set -# CONFIG_SCSI_EATA is not set -# CONFIG_SCSI_EATA_DMA is not set -# CONFIG_SCSI_EATA_PIO is not set -# CONFIG_SCSI_FUTURE_DOMAIN is not set -# CONFIG_SCSI_GDTH is not set -# CONFIG_SCSI_GENERIC_NCR5380 is not set -# CONFIG_SCSI_INITIO is not set -# CONFIG_SCSI_INIA100 is not set -# CONFIG_SCSI_NCR53C406A is not set -# CONFIG_SCSI_NCR53C7xx is not set -# CONFIG_SCSI_NCR53C8XX is not set -# CONFIG_SCSI_SYM53C8XX is not set -# CONFIG_SCSI_PAS16 is not set -# CONFIG_SCSI_PCI2000 is not set -# CONFIG_SCSI_PCI2220I is not set -# CONFIG_SCSI_PSI240I is not set -# CONFIG_SCSI_QLOGIC_FAS is not set -# CONFIG_SCSI_QLOGIC_ISP is not set -# CONFIG_SCSI_QLOGIC_FC is not set -CONFIG_SCSI_QLOGIC_1280=y -# CONFIG_SCSI_QLOGIC_QLA2100 is not set -# CONFIG_SCSI_SIM710 is not set -# CONFIG_SCSI_SYM53C416 is not set -# CONFIG_SCSI_DC390T is not set -# CONFIG_SCSI_T128 is not set -# CONFIG_SCSI_U14_34F is not set -# CONFIG_SCSI_DEBUG is not set - -# -# Network device support -# -CONFIG_NETDEVICES=y - -# -# ARCnet devices -# -# CONFIG_ARCNET is not set -CONFIG_DUMMY=y -# CONFIG_BONDING is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set - -# -# Ethernet (10 or 100Mbit) -# -CONFIG_NET_ETHERNET=y -# CONFIG_SUNLANCE is not set -# CONFIG_HAPPYMEAL is not set -# CONFIG_SUNBMAC is not set -# CONFIG_SUNQE is not set -# CONFIG_SUNLANCE is not set -# CONFIG_SUNGEM is not set -# CONFIG_NET_VENDOR_3COM is not set -# CONFIG_LANCE is not set -# CONFIG_NET_VENDOR_SMC is not set -# CONFIG_NET_VENDOR_RACAL is not set -# CONFIG_HP100 is not set -# CONFIG_NET_ISA is not set -CONFIG_NET_PCI=y -# CONFIG_PCNET32 is not set -# CONFIG_ADAPTEC_STARFIRE is not set -# CONFIG_APRICOT is not set -# CONFIG_CS89x0 is not set -# CONFIG_TULIP is not set -# CONFIG_DE4X5 is not set -# CONFIG_DGRS is not set -# CONFIG_DM9102 is not set -CONFIG_EEPRO100=y -# CONFIG_LNE390 is not set -# CONFIG_FEALNX is not set -# CONFIG_NATSEMI is not set -# CONFIG_NE2K_PCI is not set -# CONFIG_NE3210 is not set -# CONFIG_ES3210 is not set -# CONFIG_8139CP is not set -# CONFIG_8139TOO is not set -# CONFIG_8139TOO_PIO is not set -# CONFIG_8139TOO_TUNE_TWISTER is not set -# CONFIG_8139TOO_8129 is not set -# CONFIG_SIS900 is not set -# CONFIG_EPIC100 is not set -# CONFIG_SUNDANCE is not set -# CONFIG_TLAN is not set -# CONFIG_VIA_RHINE is not set -# CONFIG_WINBOND_840 is not set -# CONFIG_NET_POCKET is not set - -# -# Ethernet (1000 Mbit) -# -# CONFIG_ACENIC is not set -# CONFIG_DL2K is not set -# CONFIG_MYRI_SBUS is not set -# CONFIG_NS83820 is not set -# CONFIG_HAMACHI is not set -# CONFIG_YELLOWFIN is not set -# CONFIG_SK98LIN is not set -# CONFIG_FDDI is not set -# CONFIG_HIPPI is not set -# CONFIG_PLIP is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set - -# -# Wireless LAN (non-hamradio) -# -# CONFIG_NET_RADIO is not set - -# -# Token Ring devices -# -# CONFIG_TR is not set -# CONFIG_NET_FC is not set -# CONFIG_RCPCI is not set -# CONFIG_SHAPER is not set - -# -# Wan interfaces -# -# CONFIG_WAN is not set - -# -# Amateur Radio support -# -# CONFIG_HAMRADIO is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# CD-ROM drivers (not for SCSI or IDE/ATAPI drives) -# -# CONFIG_CD_NO_IDESCSI is not set - -# -# Input core support -# -# CONFIG_INPUT is not set -# CONFIG_INPUT_KEYBDEV is not set -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_EVDEV is not set - -# -# Character devices -# -CONFIG_VT=y -CONFIG_VT_CONSOLE=y -CONFIG_SERIAL=y -CONFIG_SERIAL_CONSOLE=y -# CONFIG_SERIAL_EXTENDED is not set -# CONFIG_SERIAL_NONSTANDARD is not set -CONFIG_UNIX98_PTYS=y -CONFIG_UNIX98_PTY_COUNT=256 - -# -# I2C support -# -# CONFIG_I2C is not set - -# -# Mice -# -# CONFIG_BUSMOUSE is not set -CONFIG_MOUSE=y -CONFIG_PSMOUSE=y -# CONFIG_82C710_MOUSE is not set -# CONFIG_PC110_PAD is not set - -# -# Joysticks -# -# CONFIG_INPUT_GAMEPORT is not set - -# -# Input core support is needed for gameports -# - -# -# Input core support is needed for joysticks -# -# CONFIG_QIC02_TAPE is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_INTEL_RNG is not set -# CONFIG_NVRAM is not set -# CONFIG_RTC is not set -# CONFIG_EFI_RTC is not set -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_FTAPE is not set -# CONFIG_AGP is not set -# CONFIG_DRM is not set -# CONFIG_MWAVE is not set - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# File systems -# -# CONFIG_QUOTA is not set -CONFIG_AUTOFS_FS=y -CONFIG_AUTOFS4_FS=y -# CONFIG_REISERFS_FS is not set -# CONFIG_REISERFS_CHECK is not set -# CONFIG_ADFS_FS is not set -# CONFIG_ADFS_FS_RW is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_BFS_FS is not set -CONFIG_FAT_FS=y -CONFIG_MSDOS_FS=y -# CONFIG_UMSDOS_FS is not set -CONFIG_VFAT_FS=y -# CONFIG_EFS_FS is not set -# CONFIG_JFFS_FS is not set -# CONFIG_JFFS2_FS is not set -# CONFIG_CRAMFS is not set -CONFIG_TMPFS=y -# CONFIG_RAMFS is not set -CONFIG_ISO9660_FS=y -CONFIG_JOLIET=y -# CONFIG_MINIX_FS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_NTFS_FS is not set -# CONFIG_NTFS_DEBUG is not set -# CONFIG_NTFS_RW is not set -# CONFIG_HPFS_FS is not set -CONFIG_PROC_FS=y -CONFIG_DEVFS_FS=y -CONFIG_DEVFS_MOUNT=y -CONFIG_DEVFS_DEBUG=y -CONFIG_DEVPTS_FS=y -# CONFIG_QNX4FS_FS is not set -# CONFIG_QNX4FS_RW is not set -# CONFIG_ROMFS_FS is not set -CONFIG_EXT2_FS=y -# CONFIG_SYSV_FS is not set -# CONFIG_UDF_FS is not set -# CONFIG_UDF_RW is not set -# CONFIG_UFS_FS is not set -# CONFIG_UFS_FS_WRITE is not set -# CONFIG_XFS_SUPPORT is not set - -# -# Network File Systems -# -# CONFIG_CODA_FS is not set -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -# CONFIG_ROOT_NFS is not set -CONFIG_NFSD=y -CONFIG_NFSD_V3=y -CONFIG_SUNRPC=y -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -# CONFIG_SMB_FS is not set -# CONFIG_NCP_FS is not set -# CONFIG_NCPFS_PACKET_SIGNING is not set -# CONFIG_NCPFS_IOCTL_LOCKING is not set -# CONFIG_NCPFS_STRONG is not set -# CONFIG_NCPFS_NFS_NS is not set -# CONFIG_NCPFS_OS2_NS is not set -# CONFIG_NCPFS_SMALLDOS is not set -# CONFIG_NCPFS_NLS is not set -# CONFIG_NCPFS_EXTRAS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y -# CONFIG_SMB_NLS is not set -CONFIG_NLS=y - -# -# Native Language Support -# -CONFIG_NLS_DEFAULT="iso8859-1" -# CONFIG_NLS_CODEPAGE_437 is not set -# CONFIG_NLS_CODEPAGE_737 is not set -# CONFIG_NLS_CODEPAGE_775 is not set -# CONFIG_NLS_CODEPAGE_850 is not set -# CONFIG_NLS_CODEPAGE_852 is not set -# CONFIG_NLS_CODEPAGE_855 is not set -# CONFIG_NLS_CODEPAGE_857 is not set -# CONFIG_NLS_CODEPAGE_860 is not set -# CONFIG_NLS_CODEPAGE_861 is not set -# CONFIG_NLS_CODEPAGE_862 is not set -# CONFIG_NLS_CODEPAGE_863 is not set -# CONFIG_NLS_CODEPAGE_864 is not set -# CONFIG_NLS_CODEPAGE_865 is not set -# CONFIG_NLS_CODEPAGE_866 is not set -# CONFIG_NLS_CODEPAGE_869 is not set -# CONFIG_NLS_CODEPAGE_936 is not set -# CONFIG_NLS_CODEPAGE_950 is not set -# CONFIG_NLS_CODEPAGE_932 is not set -# CONFIG_NLS_CODEPAGE_949 is not set -# CONFIG_NLS_CODEPAGE_874 is not set -# CONFIG_NLS_ISO8859_8 is not set -# CONFIG_NLS_CODEPAGE_1251 is not set -# CONFIG_NLS_ISO8859_1 is not set -# CONFIG_NLS_ISO8859_2 is not set -# CONFIG_NLS_ISO8859_3 is not set -# CONFIG_NLS_ISO8859_4 is not set -# CONFIG_NLS_ISO8859_5 is not set -# CONFIG_NLS_ISO8859_6 is not set -# CONFIG_NLS_ISO8859_7 is not set -# CONFIG_NLS_ISO8859_9 is not set -# CONFIG_NLS_ISO8859_13 is not set -# CONFIG_NLS_ISO8859_14 is not set -# CONFIG_NLS_ISO8859_15 is not set -# CONFIG_NLS_KOI8_R is not set -# CONFIG_NLS_KOI8_U is not set -# CONFIG_NLS_UTF8 is not set - -# -# Console drivers -# -CONFIG_VGA_CONSOLE=y - -# -# Frame-buffer support -# -# CONFIG_FB is not set - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# -# CONFIG_USB is not set - -# -# USB Controllers -# -# CONFIG_USB_UHCI is not set -# CONFIG_USB_UHCI_ALT is not set -# CONFIG_USB_OHCI is not set - -# -# USB Device Class drivers -# -# CONFIG_USB_AUDIO is not set -# CONFIG_USB_BLUETOOTH is not set -# CONFIG_USB_STORAGE is not set -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_DPCM is not set -# CONFIG_USB_STORAGE_HP8200e is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_ACM is not set -# CONFIG_USB_PRINTER is not set - -# -# USB Human Interface Devices (HID) -# - -# -# Input core support is needed for USB HID -# - -# -# USB Imaging devices -# -# CONFIG_USB_DC2XX is not set -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_SCANNER is not set -# CONFIG_USB_MICROTEK is not set -# CONFIG_USB_HPUSBSCSI is not set - -# -# USB Multimedia devices -# - -# -# Video4Linux support is needed for USB Multimedia device support -# - -# -# USB Network adaptors -# -# CONFIG_USB_PEGASUS is not set -# CONFIG_USB_KAWETH is not set -# CONFIG_USB_CATC is not set -# CONFIG_USB_CDCETHER is not set -# CONFIG_USB_USBNET is not set - -# -# USB port drivers -# -# CONFIG_USB_USS720 is not set - -# -# USB Serial Converter support -# -# CONFIG_USB_SERIAL is not set -# CONFIG_USB_SERIAL_GENERIC is not set -# CONFIG_USB_SERIAL_BELKIN is not set -# CONFIG_USB_SERIAL_WHITEHEAT is not set -# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set -# CONFIG_USB_SERIAL_EMPEG is not set -# CONFIG_USB_SERIAL_FTDI_SIO is not set -# CONFIG_USB_SERIAL_VISOR is not set -# CONFIG_USB_SERIAL_IR is not set -# CONFIG_USB_SERIAL_EDGEPORT is not set -# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set -# CONFIG_USB_SERIAL_KEYSPAN is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set -# CONFIG_USB_SERIAL_MCT_U232 is not set -# CONFIG_USB_SERIAL_PL2303 is not set -# CONFIG_USB_SERIAL_CYBERJACK is not set -# CONFIG_USB_SERIAL_XIRCOM is not set -# CONFIG_USB_SERIAL_OMNINET is not set - -# -# USB Miscellaneous drivers -# -# CONFIG_USB_RIO500 is not set - -# -# IEEE 1394 (FireWire) support (EXPERIMENTAL) -# -# CONFIG_IEEE1394 is not set - -# -# Bluetooth support -# -# CONFIG_BT is not set - -# -# Kernel hacking -# -CONFIG_DEBUG_KERNEL=y -CONFIG_IA64_PRINT_HAZARDS=y -# CONFIG_DISABLE_VHPT is not set -CONFIG_MAGIC_SYSRQ=y -CONFIG_IA64_EARLY_PRINTK=y -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_IA64_DEBUG_CMPXCHG is not set -# CONFIG_IA64_DEBUG_IRQ is not set -# CONFIG_KDB is not set -# CONFIG_KDB_MODULES is not set -# CONFIG_KALLSYMS is not set diff -Nru a/arch/ia64/sn/configs/sn1/defconfig-dig-mp b/arch/ia64/sn/configs/sn1/defconfig-dig-mp --- a/arch/ia64/sn/configs/sn1/defconfig-dig-mp Mon Dec 23 21:21:58 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,449 +0,0 @@ -# -# Automatically generated make config: don't edit -# - -# -# Code maturity level options -# -# CONFIG_EXPERIMENTAL is not set - -# -# Loadable module support -# -# CONFIG_MODULES is not set - -# -# General setup -# -CONFIG_IA64=y -# CONFIG_ISA is not set -# CONFIG_EISA is not set -# CONFIG_MCA is not set -# CONFIG_SBUS is not set -CONFIG_RWSEM_GENERIC_SPINLOCK=y -# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set -CONFIG_ACPI=y -CONFIG_ACPI_EFI=y -CONFIG_ACPI_INTERPRETER=y -CONFIG_ACPI_KERNEL_CONFIG=y -CONFIG_ITANIUM=y -# CONFIG_MCKINLEY is not set -# CONFIG_IA64_GENERIC is not set -CONFIG_IA64_DIG=y -# CONFIG_IA64_HP_SIM is not set -# CONFIG_IA64_SGI_SN1 is not set -# CONFIG_IA64_SGI_SN2 is not set -# CONFIG_IA64_PAGE_SIZE_4KB is not set -# CONFIG_IA64_PAGE_SIZE_8KB is not set -CONFIG_IA64_PAGE_SIZE_16KB=y -# CONFIG_IA64_PAGE_SIZE_64KB is not set -CONFIG_IA64_BRL_EMU=y -CONFIG_ITANIUM_BSTEP_SPECIFIC=y -CONFIG_IA64_L1_CACHE_SHIFT=6 -# CONFIG_NUMA is not set -# CONFIG_IA64_MCA is not set -CONFIG_PM=y -CONFIG_IA64_HAVE_SYNCRONIZED_ITC=y -# CONFIG_DEVFS_FS is not set -CONFIG_KCORE_ELF=y -CONFIG_SMP=y -# CONFIG_IA32_SUPPORT is not set -# CONFIG_PERFMON is not set -# CONFIG_IA64_PALINFO is not set -# CONFIG_EFI_VARS is not set -# CONFIG_NET is not set -CONFIG_SYSVIPC=y -# CONFIG_BSD_PROCESS_ACCT is not set -# CONFIG_SYSCTL is not set -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set -# CONFIG_ACPI_DEBUG is not set -# CONFIG_ACPI_BUSMGR is not set -# CONFIG_ACPI_SYS is not set -# CONFIG_ACPI_CPU is not set -# CONFIG_ACPI_BUTTON is not set -# CONFIG_ACPI_AC is not set -# CONFIG_ACPI_EC is not set -# CONFIG_ACPI_CMBATT is not set -# CONFIG_ACPI_THERMAL is not set -CONFIG_PCI=y -# CONFIG_PCI_NAMES is not set -# CONFIG_HOTPLUG is not set -# CONFIG_PCMCIA is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Memory Technology Devices (MTD) -# -# CONFIG_MTD is not set - -# -# Plug and Play configuration -# -# CONFIG_PNP is not set -# CONFIG_ISAPNP is not set - -# -# Block devices -# -# CONFIG_BLK_DEV_FD is not set -# CONFIG_BLK_DEV_XD is not set -# CONFIG_PARIDE is not set -# CONFIG_BLK_CPQ_DA is not set -# CONFIG_BLK_CPQ_CISS_DA is not set -# CONFIG_BLK_DEV_DAC960 is not set -# CONFIG_BLK_DEV_LOOP is not set -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_RAM is not set -# CONFIG_BLK_DEV_INITRD is not set - -# -# I2O device support -# -# CONFIG_I2O is not set -# CONFIG_I2O_PCI is not set -# CONFIG_I2O_BLOCK is not set -# CONFIG_I2O_SCSI is not set -# CONFIG_I2O_PROC is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set -# CONFIG_BLK_DEV_MD is not set -# CONFIG_MD_LINEAR is not set -# CONFIG_MD_RAID0 is not set -# CONFIG_MD_RAID1 is not set -# CONFIG_MD_RAID5 is not set -# CONFIG_MD_MULTIPATH is not set -# CONFIG_BLK_DEV_LVM is not set - -# -# ATA/IDE/MFM/RLL support -# -CONFIG_IDE=y - -# -# IDE, ATA and ATAPI Block devices -# -CONFIG_BLK_DEV_IDE=y - -# -# Please see Documentation/ide.txt for help/info on IDE drives -# -# CONFIG_BLK_DEV_HD_IDE is not set -# CONFIG_BLK_DEV_HD is not set -CONFIG_BLK_DEV_IDEDISK=y -# CONFIG_IDEDISK_MULTI_MODE is not set -# CONFIG_BLK_DEV_IDECS is not set -# CONFIG_BLK_DEV_IDECD is not set -# CONFIG_BLK_DEV_IDETAPE is not set -# CONFIG_BLK_DEV_IDEFLOPPY is not set -# CONFIG_BLK_DEV_IDESCSI is not set - -# -# IDE chipset support/bugfixes -# -# CONFIG_BLK_DEV_CMD640 is not set -# CONFIG_BLK_DEV_CMD640_ENHANCED is not set -# CONFIG_BLK_DEV_ISAPNP is not set -# CONFIG_BLK_DEV_RZ1000 is not set -# CONFIG_IDE_CHIPSETS is not set -# CONFIG_IDEDMA_AUTO is not set -# CONFIG_BLK_DEV_IDE_MODES is not set -# CONFIG_BLK_DEV_ATARAID is not set -# CONFIG_BLK_DEV_ATARAID_PDC is not set -# CONFIG_BLK_DEV_ATARAID_HPT is not set - -# -# Alternate 1394 support -# -# CONFIG_X1394 is not set - -# -# Alternate SCSI support -# -# CONFIG_XSCSI is not set - -# -# SCSI support -# -# CONFIG_SCSI is not set - -# -# Amateur Radio support -# -# CONFIG_HAMRADIO is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# CD-ROM drivers (not for SCSI or IDE/ATAPI drives) -# -# CONFIG_CD_NO_IDESCSI is not set - -# -# Input core support -# -# CONFIG_INPUT is not set -# CONFIG_INPUT_KEYBDEV is not set -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_EVDEV is not set - -# -# Character devices -# -CONFIG_VT=y -CONFIG_VT_CONSOLE=y -# CONFIG_SERIAL is not set -# CONFIG_SERIAL_EXTENDED is not set -# CONFIG_SERIAL_NONSTANDARD is not set -CONFIG_UNIX98_PTYS=y -CONFIG_UNIX98_PTY_COUNT=256 - -# -# I2C support -# -# CONFIG_I2C is not set - -# -# Mice -# -# CONFIG_BUSMOUSE is not set -# CONFIG_MOUSE is not set - -# -# Joysticks -# -# CONFIG_INPUT_GAMEPORT is not set - -# -# Input core support is needed for gameports -# - -# -# Input core support is needed for joysticks -# -# CONFIG_QIC02_TAPE is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_INTEL_RNG is not set -# CONFIG_NVRAM is not set -# CONFIG_RTC is not set -# CONFIG_EFI_RTC is not set -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_FTAPE is not set -# CONFIG_AGP is not set -# CONFIG_DRM is not set -# CONFIG_MWAVE is not set - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# File systems -# -# CONFIG_QUOTA is not set -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set -# CONFIG_REISERFS_FS is not set -# CONFIG_REISERFS_CHECK is not set -# CONFIG_ADFS_FS is not set -# CONFIG_ADFS_FS_RW is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_FAT_FS is not set -# CONFIG_MSDOS_FS is not set -# CONFIG_UMSDOS_FS is not set -# CONFIG_VFAT_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_JFFS_FS is not set -# CONFIG_JFFS2_FS is not set -# CONFIG_CRAMFS is not set -CONFIG_TMPFS=y -# CONFIG_RAMFS is not set -# CONFIG_ISO9660_FS is not set -# CONFIG_JOLIET is not set -# CONFIG_MINIX_FS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_NTFS_FS is not set -# CONFIG_NTFS_DEBUG is not set -# CONFIG_NTFS_RW is not set -# CONFIG_HPFS_FS is not set -CONFIG_PROC_FS=y -# CONFIG_DEVFS_FS is not set -# CONFIG_DEVFS_MOUNT is not set -# CONFIG_DEVFS_DEBUG is not set -CONFIG_DEVPTS_FS=y -# CONFIG_QNX4FS_FS is not set -# CONFIG_QNX4FS_RW is not set -# CONFIG_ROMFS_FS is not set -CONFIG_EXT2_FS=y -# CONFIG_SYSV_FS is not set -# CONFIG_UDF_FS is not set -# CONFIG_UDF_RW is not set -# CONFIG_UFS_FS is not set -# CONFIG_UFS_FS_WRITE is not set -# CONFIG_XFS_SUPPORT is not set -# CONFIG_NCPFS_NLS is not set -# CONFIG_SMB_FS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y -# CONFIG_SMB_NLS is not set -# CONFIG_NLS is not set - -# -# Console drivers -# -CONFIG_VGA_CONSOLE=y - -# -# Frame-buffer support -# -# CONFIG_FB is not set - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# -# CONFIG_USB is not set - -# -# USB Controllers -# -# CONFIG_USB_UHCI is not set -# CONFIG_USB_UHCI_ALT is not set -# CONFIG_USB_OHCI is not set - -# -# USB Device Class drivers -# -# CONFIG_USB_AUDIO is not set -# CONFIG_USB_BLUETOOTH is not set -# CONFIG_USB_STORAGE is not set -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_DPCM is not set -# CONFIG_USB_STORAGE_HP8200e is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_ACM is not set -# CONFIG_USB_PRINTER is not set - -# -# USB Human Interface Devices (HID) -# - -# -# Input core support is needed for USB HID -# - -# -# USB Imaging devices -# -# CONFIG_USB_DC2XX is not set -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_SCANNER is not set -# CONFIG_USB_MICROTEK is not set -# CONFIG_USB_HPUSBSCSI is not set - -# -# USB Multimedia devices -# - -# -# Video4Linux support is needed for USB Multimedia device support -# - -# -# USB Network adaptors -# - -# -# Networking support is needed for USB Networking device support -# - -# -# USB port drivers -# -# CONFIG_USB_USS720 is not set - -# -# USB Serial Converter support -# -# CONFIG_USB_SERIAL is not set -# CONFIG_USB_SERIAL_GENERIC is not set -# CONFIG_USB_SERIAL_BELKIN is not set -# CONFIG_USB_SERIAL_WHITEHEAT is not set -# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set -# CONFIG_USB_SERIAL_EMPEG is not set -# CONFIG_USB_SERIAL_FTDI_SIO is not set -# CONFIG_USB_SERIAL_VISOR is not set -# CONFIG_USB_SERIAL_IR is not set -# CONFIG_USB_SERIAL_EDGEPORT is not set -# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set -# CONFIG_USB_SERIAL_KEYSPAN is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set -# CONFIG_USB_SERIAL_MCT_U232 is not set -# CONFIG_USB_SERIAL_PL2303 is not set -# CONFIG_USB_SERIAL_CYBERJACK is not set -# CONFIG_USB_SERIAL_XIRCOM is not set -# CONFIG_USB_SERIAL_OMNINET is not set - -# -# USB Miscellaneous drivers -# -# CONFIG_USB_RIO500 is not set - -# -# Kernel hacking -# -CONFIG_DEBUG_KERNEL=y -CONFIG_IA64_PRINT_HAZARDS=y -# CONFIG_DISABLE_VHPT is not set -CONFIG_MAGIC_SYSRQ=y -CONFIG_IA64_EARLY_PRINTK=y -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_IA64_DEBUG_CMPXCHG is not set -# CONFIG_IA64_DEBUG_IRQ is not set -# CONFIG_KDB is not set -# CONFIG_KDB_MODULES is not set -# CONFIG_KALLSYMS is not set diff -Nru a/arch/ia64/sn/configs/sn1/defconfig-dig-sp b/arch/ia64/sn/configs/sn1/defconfig-dig-sp --- a/arch/ia64/sn/configs/sn1/defconfig-dig-sp Mon Dec 23 21:21:57 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,449 +0,0 @@ -# -# Automatically generated make config: don't edit -# - -# -# Code maturity level options -# -# CONFIG_EXPERIMENTAL is not set - -# -# Loadable module support -# -# CONFIG_MODULES is not set - -# -# General setup -# -CONFIG_IA64=y -# CONFIG_ISA is not set -# CONFIG_EISA is not set -# CONFIG_MCA is not set -# CONFIG_SBUS is not set -CONFIG_RWSEM_GENERIC_SPINLOCK=y -# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set -CONFIG_ACPI=y -CONFIG_ACPI_EFI=y -CONFIG_ACPI_INTERPRETER=y -CONFIG_ACPI_KERNEL_CONFIG=y -CONFIG_ITANIUM=y -# CONFIG_MCKINLEY is not set -# CONFIG_IA64_GENERIC is not set -CONFIG_IA64_DIG=y -# CONFIG_IA64_HP_SIM is not set -# CONFIG_IA64_SGI_SN1 is not set -# CONFIG_IA64_SGI_SN2 is not set -# CONFIG_IA64_PAGE_SIZE_4KB is not set -# CONFIG_IA64_PAGE_SIZE_8KB is not set -CONFIG_IA64_PAGE_SIZE_16KB=y -# CONFIG_IA64_PAGE_SIZE_64KB is not set -CONFIG_IA64_BRL_EMU=y -CONFIG_ITANIUM_BSTEP_SPECIFIC=y -CONFIG_IA64_L1_CACHE_SHIFT=6 -# CONFIG_NUMA is not set -# CONFIG_IA64_MCA is not set -CONFIG_PM=y -CONFIG_IA64_HAVE_SYNCRONIZED_ITC=y -# CONFIG_DEVFS_FS is not set -CONFIG_KCORE_ELF=y -# CONFIG_SMP is not set -# CONFIG_IA32_SUPPORT is not set -# CONFIG_PERFMON is not set -# CONFIG_IA64_PALINFO is not set -# CONFIG_EFI_VARS is not set -# CONFIG_NET is not set -CONFIG_SYSVIPC=y -# CONFIG_BSD_PROCESS_ACCT is not set -# CONFIG_SYSCTL is not set -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set -# CONFIG_ACPI_DEBUG is not set -# CONFIG_ACPI_BUSMGR is not set -# CONFIG_ACPI_SYS is not set -# CONFIG_ACPI_CPU is not set -# CONFIG_ACPI_BUTTON is not set -# CONFIG_ACPI_AC is not set -# CONFIG_ACPI_EC is not set -# CONFIG_ACPI_CMBATT is not set -# CONFIG_ACPI_THERMAL is not set -CONFIG_PCI=y -# CONFIG_PCI_NAMES is not set -# CONFIG_HOTPLUG is not set -# CONFIG_PCMCIA is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Memory Technology Devices (MTD) -# -# CONFIG_MTD is not set - -# -# Plug and Play configuration -# -# CONFIG_PNP is not set -# CONFIG_ISAPNP is not set - -# -# Block devices -# -# CONFIG_BLK_DEV_FD is not set -# CONFIG_BLK_DEV_XD is not set -# CONFIG_PARIDE is not set -# CONFIG_BLK_CPQ_DA is not set -# CONFIG_BLK_CPQ_CISS_DA is not set -# CONFIG_BLK_DEV_DAC960 is not set -# CONFIG_BLK_DEV_LOOP is not set -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_RAM is not set -# CONFIG_BLK_DEV_INITRD is not set - -# -# I2O device support -# -# CONFIG_I2O is not set -# CONFIG_I2O_PCI is not set -# CONFIG_I2O_BLOCK is not set -# CONFIG_I2O_SCSI is not set -# CONFIG_I2O_PROC is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set -# CONFIG_BLK_DEV_MD is not set -# CONFIG_MD_LINEAR is not set -# CONFIG_MD_RAID0 is not set -# CONFIG_MD_RAID1 is not set -# CONFIG_MD_RAID5 is not set -# CONFIG_MD_MULTIPATH is not set -# CONFIG_BLK_DEV_LVM is not set - -# -# ATA/IDE/MFM/RLL support -# -CONFIG_IDE=y - -# -# IDE, ATA and ATAPI Block devices -# -CONFIG_BLK_DEV_IDE=y - -# -# Please see Documentation/ide.txt for help/info on IDE drives -# -# CONFIG_BLK_DEV_HD_IDE is not set -# CONFIG_BLK_DEV_HD is not set -CONFIG_BLK_DEV_IDEDISK=y -# CONFIG_IDEDISK_MULTI_MODE is not set -# CONFIG_BLK_DEV_IDECS is not set -# CONFIG_BLK_DEV_IDECD is not set -# CONFIG_BLK_DEV_IDETAPE is not set -# CONFIG_BLK_DEV_IDEFLOPPY is not set -# CONFIG_BLK_DEV_IDESCSI is not set - -# -# IDE chipset support/bugfixes -# -# CONFIG_BLK_DEV_CMD640 is not set -# CONFIG_BLK_DEV_CMD640_ENHANCED is not set -# CONFIG_BLK_DEV_ISAPNP is not set -# CONFIG_BLK_DEV_RZ1000 is not set -# CONFIG_IDE_CHIPSETS is not set -# CONFIG_IDEDMA_AUTO is not set -# CONFIG_BLK_DEV_IDE_MODES is not set -# CONFIG_BLK_DEV_ATARAID is not set -# CONFIG_BLK_DEV_ATARAID_PDC is not set -# CONFIG_BLK_DEV_ATARAID_HPT is not set - -# -# Alternate 1394 support -# -# CONFIG_X1394 is not set - -# -# Alternate SCSI support -# -# CONFIG_XSCSI is not set - -# -# SCSI support -# -# CONFIG_SCSI is not set - -# -# Amateur Radio support -# -# CONFIG_HAMRADIO is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# CD-ROM drivers (not for SCSI or IDE/ATAPI drives) -# -# CONFIG_CD_NO_IDESCSI is not set - -# -# Input core support -# -# CONFIG_INPUT is not set -# CONFIG_INPUT_KEYBDEV is not set -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_EVDEV is not set - -# -# Character devices -# -CONFIG_VT=y -CONFIG_VT_CONSOLE=y -# CONFIG_SERIAL is not set -# CONFIG_SERIAL_EXTENDED is not set -# CONFIG_SERIAL_NONSTANDARD is not set -CONFIG_UNIX98_PTYS=y -CONFIG_UNIX98_PTY_COUNT=256 - -# -# I2C support -# -# CONFIG_I2C is not set - -# -# Mice -# -# CONFIG_BUSMOUSE is not set -# CONFIG_MOUSE is not set - -# -# Joysticks -# -# CONFIG_INPUT_GAMEPORT is not set - -# -# Input core support is needed for gameports -# - -# -# Input core support is needed for joysticks -# -# CONFIG_QIC02_TAPE is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_INTEL_RNG is not set -# CONFIG_NVRAM is not set -# CONFIG_RTC is not set -# CONFIG_EFI_RTC is not set -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_FTAPE is not set -# CONFIG_AGP is not set -# CONFIG_DRM is not set -# CONFIG_MWAVE is not set - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# File systems -# -# CONFIG_QUOTA is not set -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set -# CONFIG_REISERFS_FS is not set -# CONFIG_REISERFS_CHECK is not set -# CONFIG_ADFS_FS is not set -# CONFIG_ADFS_FS_RW is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_FAT_FS is not set -# CONFIG_MSDOS_FS is not set -# CONFIG_UMSDOS_FS is not set -# CONFIG_VFAT_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_JFFS_FS is not set -# CONFIG_JFFS2_FS is not set -# CONFIG_CRAMFS is not set -CONFIG_TMPFS=y -# CONFIG_RAMFS is not set -# CONFIG_ISO9660_FS is not set -# CONFIG_JOLIET is not set -# CONFIG_MINIX_FS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_NTFS_FS is not set -# CONFIG_NTFS_DEBUG is not set -# CONFIG_NTFS_RW is not set -# CONFIG_HPFS_FS is not set -CONFIG_PROC_FS=y -# CONFIG_DEVFS_FS is not set -# CONFIG_DEVFS_MOUNT is not set -# CONFIG_DEVFS_DEBUG is not set -CONFIG_DEVPTS_FS=y -# CONFIG_QNX4FS_FS is not set -# CONFIG_QNX4FS_RW is not set -# CONFIG_ROMFS_FS is not set -CONFIG_EXT2_FS=y -# CONFIG_SYSV_FS is not set -# CONFIG_UDF_FS is not set -# CONFIG_UDF_RW is not set -# CONFIG_UFS_FS is not set -# CONFIG_UFS_FS_WRITE is not set -# CONFIG_XFS_SUPPORT is not set -# CONFIG_NCPFS_NLS is not set -# CONFIG_SMB_FS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y -# CONFIG_SMB_NLS is not set -# CONFIG_NLS is not set - -# -# Console drivers -# -CONFIG_VGA_CONSOLE=y - -# -# Frame-buffer support -# -# CONFIG_FB is not set - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# -# CONFIG_USB is not set - -# -# USB Controllers -# -# CONFIG_USB_UHCI is not set -# CONFIG_USB_UHCI_ALT is not set -# CONFIG_USB_OHCI is not set - -# -# USB Device Class drivers -# -# CONFIG_USB_AUDIO is not set -# CONFIG_USB_BLUETOOTH is not set -# CONFIG_USB_STORAGE is not set -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_DPCM is not set -# CONFIG_USB_STORAGE_HP8200e is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_ACM is not set -# CONFIG_USB_PRINTER is not set - -# -# USB Human Interface Devices (HID) -# - -# -# Input core support is needed for USB HID -# - -# -# USB Imaging devices -# -# CONFIG_USB_DC2XX is not set -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_SCANNER is not set -# CONFIG_USB_MICROTEK is not set -# CONFIG_USB_HPUSBSCSI is not set - -# -# USB Multimedia devices -# - -# -# Video4Linux support is needed for USB Multimedia device support -# - -# -# USB Network adaptors -# - -# -# Networking support is needed for USB Networking device support -# - -# -# USB port drivers -# -# CONFIG_USB_USS720 is not set - -# -# USB Serial Converter support -# -# CONFIG_USB_SERIAL is not set -# CONFIG_USB_SERIAL_GENERIC is not set -# CONFIG_USB_SERIAL_BELKIN is not set -# CONFIG_USB_SERIAL_WHITEHEAT is not set -# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set -# CONFIG_USB_SERIAL_EMPEG is not set -# CONFIG_USB_SERIAL_FTDI_SIO is not set -# CONFIG_USB_SERIAL_VISOR is not set -# CONFIG_USB_SERIAL_IR is not set -# CONFIG_USB_SERIAL_EDGEPORT is not set -# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set -# CONFIG_USB_SERIAL_KEYSPAN is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set -# CONFIG_USB_SERIAL_MCT_U232 is not set -# CONFIG_USB_SERIAL_PL2303 is not set -# CONFIG_USB_SERIAL_CYBERJACK is not set -# CONFIG_USB_SERIAL_XIRCOM is not set -# CONFIG_USB_SERIAL_OMNINET is not set - -# -# USB Miscellaneous drivers -# -# CONFIG_USB_RIO500 is not set - -# -# Kernel hacking -# -CONFIG_DEBUG_KERNEL=y -CONFIG_IA64_PRINT_HAZARDS=y -# CONFIG_DISABLE_VHPT is not set -CONFIG_MAGIC_SYSRQ=y -CONFIG_IA64_EARLY_PRINTK=y -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_IA64_DEBUG_CMPXCHG is not set -# CONFIG_IA64_DEBUG_IRQ is not set -# CONFIG_KDB is not set -# CONFIG_KDB_MODULES is not set -# CONFIG_KALLSYMS is not set diff -Nru a/arch/ia64/sn/configs/sn1/defconfig-generic-mp b/arch/ia64/sn/configs/sn1/defconfig-generic-mp --- a/arch/ia64/sn/configs/sn1/defconfig-generic-mp Mon Dec 23 21:21:59 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,450 +0,0 @@ -# -# Automatically generated make config: don't edit -# - -# -# Code maturity level options -# -# CONFIG_EXPERIMENTAL is not set - -# -# Loadable module support -# -# CONFIG_MODULES is not set - -# -# General setup -# -CONFIG_IA64=y -# CONFIG_ISA is not set -# CONFIG_EISA is not set -# CONFIG_MCA is not set -# CONFIG_SBUS is not set -CONFIG_RWSEM_GENERIC_SPINLOCK=y -# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set -CONFIG_ACPI=y -CONFIG_ACPI_EFI=y -CONFIG_ACPI_INTERPRETER=y -CONFIG_ACPI_KERNEL_CONFIG=y -CONFIG_ITANIUM=y -# CONFIG_MCKINLEY is not set -CONFIG_IA64_GENERIC=y -# CONFIG_IA64_DIG is not set -# CONFIG_IA64_HP_SIM is not set -# CONFIG_IA64_SGI_SN1 is not set -# CONFIG_IA64_SGI_SN2 is not set -# CONFIG_IA64_PAGE_SIZE_4KB is not set -# CONFIG_IA64_PAGE_SIZE_8KB is not set -CONFIG_IA64_PAGE_SIZE_16KB=y -# CONFIG_IA64_PAGE_SIZE_64KB is not set -CONFIG_IA64_BRL_EMU=y -CONFIG_ITANIUM_BSTEP_SPECIFIC=y -CONFIG_IA64_L1_CACHE_SHIFT=6 -CONFIG_KCORE_ELF=y -CONFIG_SMP=y -# CONFIG_IA32_SUPPORT is not set -CONFIG_PERFMON=y -CONFIG_IA64_PALINFO=y -# CONFIG_EFI_VARS is not set -# CONFIG_NET is not set -CONFIG_SYSVIPC=y -# CONFIG_BSD_PROCESS_ACCT is not set -# CONFIG_SYSCTL is not set -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set -# CONFIG_ACPI_DEBUG is not set -# CONFIG_ACPI_BUSMGR is not set -# CONFIG_ACPI_SYS is not set -# CONFIG_ACPI_CPU is not set -# CONFIG_ACPI_BUTTON is not set -# CONFIG_ACPI_AC is not set -# CONFIG_ACPI_EC is not set -# CONFIG_ACPI_CMBATT is not set -# CONFIG_ACPI_THERMAL is not set -CONFIG_PCI=y -# CONFIG_PCI_NAMES is not set -# CONFIG_HOTPLUG is not set -# CONFIG_PCMCIA is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Memory Technology Devices (MTD) -# -# CONFIG_MTD is not set - -# -# Plug and Play configuration -# -# CONFIG_PNP is not set -# CONFIG_ISAPNP is not set - -# -# Block devices -# -# CONFIG_BLK_DEV_FD is not set -# CONFIG_BLK_DEV_XD is not set -# CONFIG_PARIDE is not set -# CONFIG_BLK_CPQ_DA is not set -# CONFIG_BLK_CPQ_CISS_DA is not set -# CONFIG_BLK_DEV_DAC960 is not set -# CONFIG_BLK_DEV_LOOP is not set -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_RAM is not set -# CONFIG_BLK_DEV_INITRD is not set - -# -# I2O device support -# -# CONFIG_I2O is not set -# CONFIG_I2O_PCI is not set -# CONFIG_I2O_BLOCK is not set -# CONFIG_I2O_SCSI is not set -# CONFIG_I2O_PROC is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set -# CONFIG_BLK_DEV_MD is not set -# CONFIG_MD_LINEAR is not set -# CONFIG_MD_RAID0 is not set -# CONFIG_MD_RAID1 is not set -# CONFIG_MD_RAID5 is not set -# CONFIG_MD_MULTIPATH is not set -# CONFIG_BLK_DEV_LVM is not set - -# -# ATA/IDE/MFM/RLL support -# -CONFIG_IDE=y - -# -# IDE, ATA and ATAPI Block devices -# -CONFIG_BLK_DEV_IDE=y - -# -# Please see Documentation/ide.txt for help/info on IDE drives -# -# CONFIG_BLK_DEV_HD_IDE is not set -# CONFIG_BLK_DEV_HD is not set -CONFIG_BLK_DEV_IDEDISK=y -# CONFIG_IDEDISK_MULTI_MODE is not set -# CONFIG_BLK_DEV_IDECS is not set -# CONFIG_BLK_DEV_IDECD is not set -# CONFIG_BLK_DEV_IDETAPE is not set -# CONFIG_BLK_DEV_IDEFLOPPY is not set -# CONFIG_BLK_DEV_IDESCSI is not set - -# -# IDE chipset support/bugfixes -# -# CONFIG_BLK_DEV_CMD640 is not set -# CONFIG_BLK_DEV_CMD640_ENHANCED is not set -# CONFIG_BLK_DEV_ISAPNP is not set -# CONFIG_BLK_DEV_RZ1000 is not set -# CONFIG_IDE_CHIPSETS is not set -# CONFIG_IDEDMA_AUTO is not set -# CONFIG_BLK_DEV_IDE_MODES is not set -# CONFIG_BLK_DEV_ATARAID is not set -# CONFIG_BLK_DEV_ATARAID_PDC is not set -# CONFIG_BLK_DEV_ATARAID_HPT is not set - -# -# Alternate 1394 support -# -# CONFIG_X1394 is not set - -# -# Alternate SCSI support -# -# CONFIG_XSCSI is not set - -# -# SCSI support -# -# CONFIG_SCSI is not set - -# -# Amateur Radio support -# -# CONFIG_HAMRADIO is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# CD-ROM drivers (not for SCSI or IDE/ATAPI drives) -# -# CONFIG_CD_NO_IDESCSI is not set - -# -# Input core support -# -# CONFIG_INPUT is not set -# CONFIG_INPUT_KEYBDEV is not set -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_EVDEV is not set - -# -# Character devices -# -CONFIG_VT=y -CONFIG_VT_CONSOLE=y -# CONFIG_SERIAL is not set -# CONFIG_SERIAL_EXTENDED is not set -# CONFIG_SERIAL_NONSTANDARD is not set -CONFIG_UNIX98_PTYS=y -CONFIG_UNIX98_PTY_COUNT=256 - -# -# I2C support -# -# CONFIG_I2C is not set - -# -# Mice -# -# CONFIG_BUSMOUSE is not set -# CONFIG_MOUSE is not set - -# -# Joysticks -# -# CONFIG_INPUT_GAMEPORT is not set - -# -# Input core support is needed for gameports -# - -# -# Input core support is needed for joysticks -# -# CONFIG_QIC02_TAPE is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_INTEL_RNG is not set -# CONFIG_NVRAM is not set -# CONFIG_RTC is not set -# CONFIG_EFI_RTC is not set -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_FTAPE is not set -# CONFIG_AGP is not set -# CONFIG_DRM is not set -# CONFIG_MWAVE is not set - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# File systems -# -# CONFIG_QUOTA is not set -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set -# CONFIG_REISERFS_FS is not set -# CONFIG_REISERFS_CHECK is not set -# CONFIG_ADFS_FS is not set -# CONFIG_ADFS_FS_RW is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_FAT_FS is not set -# CONFIG_MSDOS_FS is not set -# CONFIG_UMSDOS_FS is not set -# CONFIG_VFAT_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_JFFS_FS is not set -# CONFIG_JFFS2_FS is not set -# CONFIG_CRAMFS is not set -CONFIG_TMPFS=y -# CONFIG_RAMFS is not set -# CONFIG_ISO9660_FS is not set -# CONFIG_JOLIET is not set -# CONFIG_MINIX_FS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_NTFS_FS is not set -# CONFIG_NTFS_DEBUG is not set -# CONFIG_NTFS_RW is not set -# CONFIG_HPFS_FS is not set -CONFIG_PROC_FS=y -# CONFIG_DEVFS_FS is not set -# CONFIG_DEVFS_MOUNT is not set -# CONFIG_DEVFS_DEBUG is not set -CONFIG_DEVPTS_FS=y -# CONFIG_QNX4FS_FS is not set -# CONFIG_QNX4FS_RW is not set -# CONFIG_ROMFS_FS is not set -CONFIG_EXT2_FS=y -# CONFIG_SYSV_FS is not set -# CONFIG_UDF_FS is not set -# CONFIG_UDF_RW is not set -# CONFIG_UFS_FS is not set -# CONFIG_UFS_FS_WRITE is not set -# CONFIG_XFS_SUPPORT is not set -# CONFIG_NCPFS_NLS is not set -# CONFIG_SMB_FS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y -# CONFIG_SMB_NLS is not set -# CONFIG_NLS is not set - -# -# Console drivers -# -CONFIG_VGA_CONSOLE=y - -# -# Frame-buffer support -# -# CONFIG_FB is not set - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# -# CONFIG_USB is not set - -# -# USB Controllers -# -# CONFIG_USB_UHCI is not set -# CONFIG_USB_UHCI_ALT is not set -# CONFIG_USB_OHCI is not set - -# -# USB Device Class drivers -# -# CONFIG_USB_AUDIO is not set -# CONFIG_USB_BLUETOOTH is not set -# CONFIG_USB_STORAGE is not set -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_DPCM is not set -# CONFIG_USB_STORAGE_HP8200e is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_ACM is not set -# CONFIG_USB_PRINTER is not set - -# -# USB Human Interface Devices (HID) -# - -# -# Input core support is needed for USB HID -# - -# -# USB Imaging devices -# -# CONFIG_USB_DC2XX is not set -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_SCANNER is not set -# CONFIG_USB_MICROTEK is not set -# CONFIG_USB_HPUSBSCSI is not set - -# -# USB Multimedia devices -# - -# -# Video4Linux support is needed for USB Multimedia device support -# - -# -# USB Network adaptors -# - -# -# Networking support is needed for USB Networking device support -# - -# -# USB port drivers -# -# CONFIG_USB_USS720 is not set - -# -# USB Serial Converter support -# -# CONFIG_USB_SERIAL is not set -# CONFIG_USB_SERIAL_GENERIC is not set -# CONFIG_USB_SERIAL_BELKIN is not set -# CONFIG_USB_SERIAL_WHITEHEAT is not set -# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set -# CONFIG_USB_SERIAL_EMPEG is not set -# CONFIG_USB_SERIAL_FTDI_SIO is not set -# CONFIG_USB_SERIAL_VISOR is not set -# CONFIG_USB_SERIAL_IR is not set -# CONFIG_USB_SERIAL_EDGEPORT is not set -# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set -# CONFIG_USB_SERIAL_KEYSPAN is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set -# CONFIG_USB_SERIAL_MCT_U232 is not set -# CONFIG_USB_SERIAL_PL2303 is not set -# CONFIG_USB_SERIAL_CYBERJACK is not set -# CONFIG_USB_SERIAL_XIRCOM is not set -# CONFIG_USB_SERIAL_OMNINET is not set - -# -# USB Miscellaneous drivers -# -# CONFIG_USB_RIO500 is not set - -# -# Simulated drivers -# -# CONFIG_SIMETH is not set -# CONFIG_SIM_SERIAL is not set - -# -# Kernel hacking -# -CONFIG_DEBUG_KERNEL=y -CONFIG_IA64_PRINT_HAZARDS=y -# CONFIG_DISABLE_VHPT is not set -CONFIG_MAGIC_SYSRQ=y -CONFIG_IA64_EARLY_PRINTK=y -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_IA64_DEBUG_CMPXCHG is not set -# CONFIG_IA64_DEBUG_IRQ is not set -# CONFIG_KDB is not set -# CONFIG_KDB_MODULES is not set -# CONFIG_KALLSYMS is not set diff -Nru a/arch/ia64/sn/configs/sn1/defconfig-generic-sp b/arch/ia64/sn/configs/sn1/defconfig-generic-sp --- a/arch/ia64/sn/configs/sn1/defconfig-generic-sp Mon Dec 23 21:22:00 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,450 +0,0 @@ -# -# Automatically generated make config: don't edit -# - -# -# Code maturity level options -# -# CONFIG_EXPERIMENTAL is not set - -# -# Loadable module support -# -# CONFIG_MODULES is not set - -# -# General setup -# -CONFIG_IA64=y -# CONFIG_ISA is not set -# CONFIG_EISA is not set -# CONFIG_MCA is not set -# CONFIG_SBUS is not set -CONFIG_RWSEM_GENERIC_SPINLOCK=y -# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set -CONFIG_ACPI=y -CONFIG_ACPI_EFI=y -CONFIG_ACPI_INTERPRETER=y -CONFIG_ACPI_KERNEL_CONFIG=y -CONFIG_ITANIUM=y -# CONFIG_MCKINLEY is not set -CONFIG_IA64_GENERIC=y -# CONFIG_IA64_DIG is not set -# CONFIG_IA64_HP_SIM is not set -# CONFIG_IA64_SGI_SN1 is not set -# CONFIG_IA64_SGI_SN2 is not set -# CONFIG_IA64_PAGE_SIZE_4KB is not set -# CONFIG_IA64_PAGE_SIZE_8KB is not set -CONFIG_IA64_PAGE_SIZE_16KB=y -# CONFIG_IA64_PAGE_SIZE_64KB is not set -CONFIG_IA64_BRL_EMU=y -CONFIG_ITANIUM_BSTEP_SPECIFIC=y -CONFIG_IA64_L1_CACHE_SHIFT=6 -CONFIG_KCORE_ELF=y -# CONFIG_SMP is not set -# CONFIG_IA32_SUPPORT is not set -CONFIG_PERFMON=y -CONFIG_IA64_PALINFO=y -# CONFIG_EFI_VARS is not set -# CONFIG_NET is not set -CONFIG_SYSVIPC=y -# CONFIG_BSD_PROCESS_ACCT is not set -# CONFIG_SYSCTL is not set -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set -# CONFIG_ACPI_DEBUG is not set -# CONFIG_ACPI_BUSMGR is not set -# CONFIG_ACPI_SYS is not set -# CONFIG_ACPI_CPU is not set -# CONFIG_ACPI_BUTTON is not set -# CONFIG_ACPI_AC is not set -# CONFIG_ACPI_EC is not set -# CONFIG_ACPI_CMBATT is not set -# CONFIG_ACPI_THERMAL is not set -CONFIG_PCI=y -# CONFIG_PCI_NAMES is not set -# CONFIG_HOTPLUG is not set -# CONFIG_PCMCIA is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Memory Technology Devices (MTD) -# -# CONFIG_MTD is not set - -# -# Plug and Play configuration -# -# CONFIG_PNP is not set -# CONFIG_ISAPNP is not set - -# -# Block devices -# -# CONFIG_BLK_DEV_FD is not set -# CONFIG_BLK_DEV_XD is not set -# CONFIG_PARIDE is not set -# CONFIG_BLK_CPQ_DA is not set -# CONFIG_BLK_CPQ_CISS_DA is not set -# CONFIG_BLK_DEV_DAC960 is not set -# CONFIG_BLK_DEV_LOOP is not set -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_RAM is not set -# CONFIG_BLK_DEV_INITRD is not set - -# -# I2O device support -# -# CONFIG_I2O is not set -# CONFIG_I2O_PCI is not set -# CONFIG_I2O_BLOCK is not set -# CONFIG_I2O_SCSI is not set -# CONFIG_I2O_PROC is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set -# CONFIG_BLK_DEV_MD is not set -# CONFIG_MD_LINEAR is not set -# CONFIG_MD_RAID0 is not set -# CONFIG_MD_RAID1 is not set -# CONFIG_MD_RAID5 is not set -# CONFIG_MD_MULTIPATH is not set -# CONFIG_BLK_DEV_LVM is not set - -# -# ATA/IDE/MFM/RLL support -# -CONFIG_IDE=y - -# -# IDE, ATA and ATAPI Block devices -# -CONFIG_BLK_DEV_IDE=y - -# -# Please see Documentation/ide.txt for help/info on IDE drives -# -# CONFIG_BLK_DEV_HD_IDE is not set -# CONFIG_BLK_DEV_HD is not set -CONFIG_BLK_DEV_IDEDISK=y -# CONFIG_IDEDISK_MULTI_MODE is not set -# CONFIG_BLK_DEV_IDECS is not set -# CONFIG_BLK_DEV_IDECD is not set -# CONFIG_BLK_DEV_IDETAPE is not set -# CONFIG_BLK_DEV_IDEFLOPPY is not set -# CONFIG_BLK_DEV_IDESCSI is not set - -# -# IDE chipset support/bugfixes -# -# CONFIG_BLK_DEV_CMD640 is not set -# CONFIG_BLK_DEV_CMD640_ENHANCED is not set -# CONFIG_BLK_DEV_ISAPNP is not set -# CONFIG_BLK_DEV_RZ1000 is not set -# CONFIG_IDE_CHIPSETS is not set -# CONFIG_IDEDMA_AUTO is not set -# CONFIG_BLK_DEV_IDE_MODES is not set -# CONFIG_BLK_DEV_ATARAID is not set -# CONFIG_BLK_DEV_ATARAID_PDC is not set -# CONFIG_BLK_DEV_ATARAID_HPT is not set - -# -# Alternate 1394 support -# -# CONFIG_X1394 is not set - -# -# Alternate SCSI support -# -# CONFIG_XSCSI is not set - -# -# SCSI support -# -# CONFIG_SCSI is not set - -# -# Amateur Radio support -# -# CONFIG_HAMRADIO is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# CD-ROM drivers (not for SCSI or IDE/ATAPI drives) -# -# CONFIG_CD_NO_IDESCSI is not set - -# -# Input core support -# -# CONFIG_INPUT is not set -# CONFIG_INPUT_KEYBDEV is not set -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_EVDEV is not set - -# -# Character devices -# -CONFIG_VT=y -CONFIG_VT_CONSOLE=y -# CONFIG_SERIAL is not set -# CONFIG_SERIAL_EXTENDED is not set -# CONFIG_SERIAL_NONSTANDARD is not set -CONFIG_UNIX98_PTYS=y -CONFIG_UNIX98_PTY_COUNT=256 - -# -# I2C support -# -# CONFIG_I2C is not set - -# -# Mice -# -# CONFIG_BUSMOUSE is not set -# CONFIG_MOUSE is not set - -# -# Joysticks -# -# CONFIG_INPUT_GAMEPORT is not set - -# -# Input core support is needed for gameports -# - -# -# Input core support is needed for joysticks -# -# CONFIG_QIC02_TAPE is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_INTEL_RNG is not set -# CONFIG_NVRAM is not set -# CONFIG_RTC is not set -# CONFIG_EFI_RTC is not set -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_FTAPE is not set -# CONFIG_AGP is not set -# CONFIG_DRM is not set -# CONFIG_MWAVE is not set - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# File systems -# -# CONFIG_QUOTA is not set -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set -# CONFIG_REISERFS_FS is not set -# CONFIG_REISERFS_CHECK is not set -# CONFIG_ADFS_FS is not set -# CONFIG_ADFS_FS_RW is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_FAT_FS is not set -# CONFIG_MSDOS_FS is not set -# CONFIG_UMSDOS_FS is not set -# CONFIG_VFAT_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_JFFS_FS is not set -# CONFIG_JFFS2_FS is not set -# CONFIG_CRAMFS is not set -CONFIG_TMPFS=y -# CONFIG_RAMFS is not set -# CONFIG_ISO9660_FS is not set -# CONFIG_JOLIET is not set -# CONFIG_MINIX_FS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_NTFS_FS is not set -# CONFIG_NTFS_DEBUG is not set -# CONFIG_NTFS_RW is not set -# CONFIG_HPFS_FS is not set -CONFIG_PROC_FS=y -# CONFIG_DEVFS_FS is not set -# CONFIG_DEVFS_MOUNT is not set -# CONFIG_DEVFS_DEBUG is not set -CONFIG_DEVPTS_FS=y -# CONFIG_QNX4FS_FS is not set -# CONFIG_QNX4FS_RW is not set -# CONFIG_ROMFS_FS is not set -CONFIG_EXT2_FS=y -# CONFIG_SYSV_FS is not set -# CONFIG_UDF_FS is not set -# CONFIG_UDF_RW is not set -# CONFIG_UFS_FS is not set -# CONFIG_UFS_FS_WRITE is not set -# CONFIG_XFS_SUPPORT is not set -# CONFIG_NCPFS_NLS is not set -# CONFIG_SMB_FS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y -# CONFIG_SMB_NLS is not set -# CONFIG_NLS is not set - -# -# Console drivers -# -CONFIG_VGA_CONSOLE=y - -# -# Frame-buffer support -# -# CONFIG_FB is not set - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# -# CONFIG_USB is not set - -# -# USB Controllers -# -# CONFIG_USB_UHCI is not set -# CONFIG_USB_UHCI_ALT is not set -# CONFIG_USB_OHCI is not set - -# -# USB Device Class drivers -# -# CONFIG_USB_AUDIO is not set -# CONFIG_USB_BLUETOOTH is not set -# CONFIG_USB_STORAGE is not set -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_DPCM is not set -# CONFIG_USB_STORAGE_HP8200e is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_ACM is not set -# CONFIG_USB_PRINTER is not set - -# -# USB Human Interface Devices (HID) -# - -# -# Input core support is needed for USB HID -# - -# -# USB Imaging devices -# -# CONFIG_USB_DC2XX is not set -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_SCANNER is not set -# CONFIG_USB_MICROTEK is not set -# CONFIG_USB_HPUSBSCSI is not set - -# -# USB Multimedia devices -# - -# -# Video4Linux support is needed for USB Multimedia device support -# - -# -# USB Network adaptors -# - -# -# Networking support is needed for USB Networking device support -# - -# -# USB port drivers -# -# CONFIG_USB_USS720 is not set - -# -# USB Serial Converter support -# -# CONFIG_USB_SERIAL is not set -# CONFIG_USB_SERIAL_GENERIC is not set -# CONFIG_USB_SERIAL_BELKIN is not set -# CONFIG_USB_SERIAL_WHITEHEAT is not set -# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set -# CONFIG_USB_SERIAL_EMPEG is not set -# CONFIG_USB_SERIAL_FTDI_SIO is not set -# CONFIG_USB_SERIAL_VISOR is not set -# CONFIG_USB_SERIAL_IR is not set -# CONFIG_USB_SERIAL_EDGEPORT is not set -# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set -# CONFIG_USB_SERIAL_KEYSPAN is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set -# CONFIG_USB_SERIAL_MCT_U232 is not set -# CONFIG_USB_SERIAL_PL2303 is not set -# CONFIG_USB_SERIAL_CYBERJACK is not set -# CONFIG_USB_SERIAL_XIRCOM is not set -# CONFIG_USB_SERIAL_OMNINET is not set - -# -# USB Miscellaneous drivers -# -# CONFIG_USB_RIO500 is not set - -# -# Simulated drivers -# -# CONFIG_SIMETH is not set -# CONFIG_SIM_SERIAL is not set - -# -# Kernel hacking -# -CONFIG_DEBUG_KERNEL=y -CONFIG_IA64_PRINT_HAZARDS=y -# CONFIG_DISABLE_VHPT is not set -CONFIG_MAGIC_SYSRQ=y -CONFIG_IA64_EARLY_PRINTK=y -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_IA64_DEBUG_CMPXCHG is not set -# CONFIG_IA64_DEBUG_IRQ is not set -# CONFIG_KDB is not set -# CONFIG_KDB_MODULES is not set -# CONFIG_KALLSYMS is not set diff -Nru a/arch/ia64/sn/configs/sn1/defconfig-hp-sp b/arch/ia64/sn/configs/sn1/defconfig-hp-sp --- a/arch/ia64/sn/configs/sn1/defconfig-hp-sp Mon Dec 23 21:21:55 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,335 +0,0 @@ -# -# Automatically generated make config: don't edit -# - -# -# Code maturity level options -# -# CONFIG_EXPERIMENTAL is not set - -# -# Loadable module support -# -# CONFIG_MODULES is not set - -# -# General setup -# -CONFIG_IA64=y -# CONFIG_ISA is not set -# CONFIG_EISA is not set -# CONFIG_MCA is not set -# CONFIG_SBUS is not set -CONFIG_RWSEM_GENERIC_SPINLOCK=y -# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set -CONFIG_ITANIUM=y -# CONFIG_MCKINLEY is not set -# CONFIG_IA64_GENERIC is not set -# CONFIG_IA64_DIG is not set -CONFIG_IA64_HP_SIM=y -# CONFIG_IA64_SGI_SN1 is not set -# CONFIG_IA64_SGI_SN2 is not set -# CONFIG_IA64_PAGE_SIZE_4KB is not set -# CONFIG_IA64_PAGE_SIZE_8KB is not set -CONFIG_IA64_PAGE_SIZE_16KB=y -# CONFIG_IA64_PAGE_SIZE_64KB is not set -CONFIG_IA64_BRL_EMU=y -CONFIG_ITANIUM_BSTEP_SPECIFIC=y -CONFIG_IA64_L1_CACHE_SHIFT=6 -CONFIG_KCORE_ELF=y -# CONFIG_SMP is not set -# CONFIG_IA32_SUPPORT is not set -# CONFIG_PERFMON is not set -# CONFIG_IA64_PALINFO is not set -# CONFIG_EFI_VARS is not set -CONFIG_NET=y -CONFIG_SYSVIPC=y -# CONFIG_BSD_PROCESS_ACCT is not set -CONFIG_SYSCTL=y -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set - -# -# Networking options -# -# CONFIG_PACKET is not set -# CONFIG_NETLINK is not set -# CONFIG_NETFILTER is not set -# CONFIG_FILTER is not set -CONFIG_UNIX=y -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -# CONFIG_IP_PNP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_INET_ECN is not set -# CONFIG_SYN_COOKIES is not set - -# -# -# -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_DECNET is not set -# CONFIG_BRIDGE is not set - -# -# QoS and/or fair queueing -# -# CONFIG_NET_SCHED is not set - -# -# Alternate 1394 support -# -# CONFIG_X1394 is not set - -# -# Alternate SCSI support -# -# CONFIG_XSCSI is not set - -# -# SCSI support -# -CONFIG_SCSI=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -CONFIG_SD_EXTRA_DEVS=40 -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -# CONFIG_BLK_DEV_SR is not set -# CONFIG_CHR_DEV_SG is not set - -# -# Some SCSI devices (e.g. CD jukebox) support multiple LUNs -# -# CONFIG_SCSI_DEBUG_QUEUES is not set -# CONFIG_SCSI_MULTI_LUN is not set -CONFIG_SCSI_CONSTANTS=y -# CONFIG_SCSI_LOGGING is not set - -# -# SCSI low-level drivers -# -# CONFIG_SCSI_7000FASST is not set -# CONFIG_SCSI_ACARD is not set -# CONFIG_SCSI_AHA152X is not set -# CONFIG_SCSI_AHA1542 is not set -# CONFIG_SCSI_AHA1740 is not set -# CONFIG_SCSI_AIC7XXX is not set -# CONFIG_SCSI_AIC7XXX_OLD is not set -# CONFIG_SCSI_DPT_I2O is not set -# CONFIG_SCSI_ADVANSYS is not set -# CONFIG_SCSI_IN2000 is not set -# CONFIG_SCSI_AM53C974 is not set -# CONFIG_SCSI_MEGARAID is not set -# CONFIG_SCSI_BUSLOGIC is not set -# CONFIG_SCSI_DMX3191D is not set -# CONFIG_SCSI_DTC3280 is not set -# CONFIG_SCSI_EATA is not set -# CONFIG_SCSI_EATA_DMA is not set -# CONFIG_SCSI_EATA_PIO is not set -# CONFIG_SCSI_FUTURE_DOMAIN is not set -# CONFIG_SCSI_GDTH is not set -# CONFIG_SCSI_GENERIC_NCR5380 is not set -# CONFIG_SCSI_INITIO is not set -# CONFIG_SCSI_INIA100 is not set -# CONFIG_SCSI_PPA is not set -# CONFIG_SCSI_IMM is not set -# CONFIG_SCSI_NCR53C406A is not set -# CONFIG_SCSI_NCR53C7xx is not set -# CONFIG_SCSI_PAS16 is not set -# CONFIG_SCSI_PCI2000 is not set -# CONFIG_SCSI_PCI2220I is not set -# CONFIG_SCSI_PSI240I is not set -# CONFIG_SCSI_QLOGIC_FAS is not set -# CONFIG_SCSI_SIM710 is not set -# CONFIG_SCSI_SYM53C416 is not set -# CONFIG_SCSI_T128 is not set -# CONFIG_SCSI_U14_34F is not set - -# -# Input core support -# -# CONFIG_INPUT is not set -# CONFIG_INPUT_KEYBDEV is not set -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_EVDEV is not set - -# -# Character devices -# -CONFIG_VT=y -CONFIG_VT_CONSOLE=y -# CONFIG_SERIAL is not set -# CONFIG_SERIAL_EXTENDED is not set -# CONFIG_SERIAL_NONSTANDARD is not set -CONFIG_UNIX98_PTYS=y -CONFIG_UNIX98_PTY_COUNT=256 -# CONFIG_PRINTER is not set -# CONFIG_PPDEV is not set - -# -# I2C support -# -# CONFIG_I2C is not set - -# -# Mice -# -# CONFIG_BUSMOUSE is not set -# CONFIG_MOUSE is not set - -# -# Joysticks -# -# CONFIG_INPUT_GAMEPORT is not set - -# -# Input core support is needed for gameports -# - -# -# Input core support is needed for joysticks -# -# CONFIG_QIC02_TAPE is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_INTEL_RNG is not set -# CONFIG_NVRAM is not set -# CONFIG_RTC is not set -CONFIG_EFI_RTC=y -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_FTAPE is not set -# CONFIG_AGP is not set -# CONFIG_DRM is not set -# CONFIG_MWAVE is not set - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# File systems -# -# CONFIG_QUOTA is not set -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set -# CONFIG_REISERFS_FS is not set -# CONFIG_REISERFS_CHECK is not set -# CONFIG_ADFS_FS is not set -# CONFIG_ADFS_FS_RW is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_FAT_FS is not set -# CONFIG_MSDOS_FS is not set -# CONFIG_UMSDOS_FS is not set -# CONFIG_VFAT_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_JFFS_FS is not set -# CONFIG_JFFS2_FS is not set -# CONFIG_CRAMFS is not set -CONFIG_TMPFS=y -# CONFIG_RAMFS is not set -# CONFIG_ISO9660_FS is not set -# CONFIG_JOLIET is not set -# CONFIG_MINIX_FS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_NTFS_FS is not set -# CONFIG_NTFS_DEBUG is not set -# CONFIG_NTFS_RW is not set -# CONFIG_HPFS_FS is not set -CONFIG_PROC_FS=y -# CONFIG_DEVFS_FS is not set -# CONFIG_DEVFS_MOUNT is not set -# CONFIG_DEVFS_DEBUG is not set -CONFIG_DEVPTS_FS=y -# CONFIG_QNX4FS_FS is not set -# CONFIG_QNX4FS_RW is not set -# CONFIG_ROMFS_FS is not set -CONFIG_EXT2_FS=y -# CONFIG_SYSV_FS is not set -# CONFIG_UDF_FS is not set -# CONFIG_UDF_RW is not set -# CONFIG_UFS_FS is not set -# CONFIG_UFS_FS_WRITE is not set -# CONFIG_XFS_SUPPORT is not set - -# -# Network File Systems -# -# CONFIG_CODA_FS is not set -# CONFIG_NFS_FS is not set -# CONFIG_NFS_V3 is not set -# CONFIG_ROOT_NFS is not set -# CONFIG_NFSD is not set -# CONFIG_NFSD_V3 is not set -# CONFIG_SUNRPC is not set -# CONFIG_LOCKD is not set -# CONFIG_SMB_FS is not set -# CONFIG_NCP_FS is not set -# CONFIG_NCPFS_PACKET_SIGNING is not set -# CONFIG_NCPFS_IOCTL_LOCKING is not set -# CONFIG_NCPFS_STRONG is not set -# CONFIG_NCPFS_NFS_NS is not set -# CONFIG_NCPFS_OS2_NS is not set -# CONFIG_NCPFS_SMALLDOS is not set -# CONFIG_NCPFS_NLS is not set -# CONFIG_NCPFS_EXTRAS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y -# CONFIG_SMB_NLS is not set -# CONFIG_NLS is not set - -# -# Console drivers -# -CONFIG_VGA_CONSOLE=y - -# -# Frame-buffer support -# -# CONFIG_FB is not set - -# -# Simulated drivers -# -CONFIG_SIMETH=y -CONFIG_SIM_SERIAL=y -CONFIG_SCSI_SIM=y - -# -# Kernel hacking -# -CONFIG_DEBUG_KERNEL=y -CONFIG_IA64_PRINT_HAZARDS=y -# CONFIG_DISABLE_VHPT is not set -CONFIG_MAGIC_SYSRQ=y -CONFIG_IA64_EARLY_PRINTK=y -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_IA64_DEBUG_CMPXCHG is not set -# CONFIG_IA64_DEBUG_IRQ is not set -# CONFIG_KDB is not set -# CONFIG_KDB_MODULES is not set -# CONFIG_KALLSYMS is not set diff -Nru a/arch/ia64/sn/configs/sn1/defconfig-prom-medusa b/arch/ia64/sn/configs/sn1/defconfig-prom-medusa --- a/arch/ia64/sn/configs/sn1/defconfig-prom-medusa Mon Dec 23 21:21:53 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,519 +0,0 @@ -# -# Automatically generated make config: don't edit -# - -# -# Code maturity level options -# -CONFIG_EXPERIMENTAL=y - -# -# Loadable module support -# -# CONFIG_MODULES is not set - -# -# General setup -# -CONFIG_IA64=y -# CONFIG_ISA is not set -# CONFIG_EISA is not set -# CONFIG_MCA is not set -# CONFIG_SBUS is not set -CONFIG_RWSEM_GENERIC_SPINLOCK=y -# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set -CONFIG_ACPI=y -CONFIG_ACPI_EFI=y -CONFIG_ACPI_INTERPRETER=y -CONFIG_ACPI_KERNEL_CONFIG=y -CONFIG_ITANIUM=y -# CONFIG_MCKINLEY is not set -# CONFIG_IA64_GENERIC is not set -# CONFIG_IA64_DIG is not set -# CONFIG_IA64_HP_SIM is not set -CONFIG_IA64_SGI_SN1=y -# CONFIG_IA64_SGI_SN2 is not set -# CONFIG_IA64_PAGE_SIZE_4KB is not set -# CONFIG_IA64_PAGE_SIZE_8KB is not set -CONFIG_IA64_PAGE_SIZE_16KB=y -# CONFIG_IA64_PAGE_SIZE_64KB is not set -CONFIG_IA64_BRL_EMU=y -CONFIG_ITANIUM_BSTEP_SPECIFIC=y -CONFIG_IA64_L1_CACHE_SHIFT=7 -CONFIG_IA64_SGI_SN=y -CONFIG_IA64_SGI_SN_DEBUG=y -CONFIG_IA64_SGI_SN_SIM=y -CONFIG_IA64_SGI_AUTOTEST=y -CONFIG_DEVFS_FS=y -# CONFIG_DEVFS_DEBUG is not set -CONFIG_SERIAL_SGI_L1_PROTOCOL=y -CONFIG_DISCONTIGMEM=y -CONFIG_IA64_MCA=y -CONFIG_NUMA=y -CONFIG_PERCPU_IRQ=y -CONFIG_PCIBA=y -CONFIG_KCORE_ELF=y -CONFIG_SMP=y -# CONFIG_IA32_SUPPORT is not set -CONFIG_PERFMON=y -CONFIG_IA64_PALINFO=y -# CONFIG_EFI_VARS is not set -# CONFIG_NET is not set -CONFIG_SYSVIPC=y -# CONFIG_BSD_PROCESS_ACCT is not set -CONFIG_SYSCTL=y -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set -# CONFIG_ACPI_DEBUG is not set -# CONFIG_ACPI_BUSMGR is not set -# CONFIG_ACPI_SYS is not set -# CONFIG_ACPI_CPU is not set -# CONFIG_ACPI_BUTTON is not set -# CONFIG_ACPI_AC is not set -# CONFIG_ACPI_EC is not set -# CONFIG_ACPI_CMBATT is not set -# CONFIG_ACPI_THERMAL is not set -CONFIG_PCI=y -# CONFIG_PCI_NAMES is not set -# CONFIG_HOTPLUG is not set -# CONFIG_PCMCIA is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Memory Technology Devices (MTD) -# -# CONFIG_MTD is not set - -# -# Plug and Play configuration -# -# CONFIG_PNP is not set -# CONFIG_ISAPNP is not set -# CONFIG_PNPBIOS is not set - -# -# Block devices -# -# CONFIG_BLK_DEV_FD is not set -# CONFIG_BLK_DEV_XD is not set -# CONFIG_PARIDE is not set -# CONFIG_BLK_CPQ_DA is not set -# CONFIG_BLK_CPQ_CISS_DA is not set -# CONFIG_BLK_DEV_DAC960 is not set -# CONFIG_BLK_DEV_LOOP is not set -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_RAM is not set -# CONFIG_BLK_DEV_INITRD is not set - -# -# I2O device support -# -# CONFIG_I2O is not set -# CONFIG_I2O_PCI is not set -# CONFIG_I2O_BLOCK is not set -# CONFIG_I2O_SCSI is not set -# CONFIG_I2O_PROC is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set -# CONFIG_BLK_DEV_MD is not set -# CONFIG_MD_LINEAR is not set -# CONFIG_MD_RAID0 is not set -# CONFIG_MD_RAID1 is not set -# CONFIG_MD_RAID5 is not set -# CONFIG_MD_MULTIPATH is not set -# CONFIG_BLK_DEV_LVM is not set - -# -# ATA/IDE/MFM/RLL support -# -CONFIG_IDE=y - -# -# IDE, ATA and ATAPI Block devices -# -CONFIG_BLK_DEV_IDE=y - -# -# Please see Documentation/ide.txt for help/info on IDE drives -# -# CONFIG_BLK_DEV_HD_IDE is not set -# CONFIG_BLK_DEV_HD is not set -CONFIG_BLK_DEV_IDEDISK=y -# CONFIG_IDEDISK_MULTI_MODE is not set -# CONFIG_BLK_DEV_IDECS is not set -# CONFIG_BLK_DEV_IDECD is not set -# CONFIG_BLK_DEV_IDETAPE is not set -# CONFIG_BLK_DEV_IDEFLOPPY is not set -# CONFIG_BLK_DEV_IDESCSI is not set - -# -# IDE chipset support/bugfixes -# -# CONFIG_BLK_DEV_CMD640 is not set -# CONFIG_BLK_DEV_CMD640_ENHANCED is not set -# CONFIG_BLK_DEV_ISAPNP is not set -# CONFIG_BLK_DEV_RZ1000 is not set -# CONFIG_IDE_CHIPSETS is not set -# CONFIG_IDEDMA_AUTO is not set -# CONFIG_BLK_DEV_IDE_MODES is not set -# CONFIG_BLK_DEV_ATARAID is not set -# CONFIG_BLK_DEV_ATARAID_PDC is not set -# CONFIG_BLK_DEV_ATARAID_HPT is not set - -# -# Alternate 1394 support -# -# CONFIG_X1394 is not set - -# -# Alternate SCSI support -# -# CONFIG_XSCSI is not set - -# -# SCSI support -# -CONFIG_SCSI=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -CONFIG_SD_EXTRA_DEVS=40 -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -# CONFIG_BLK_DEV_SR is not set -# CONFIG_CHR_DEV_SG is not set - -# -# Some SCSI devices (e.g. CD jukebox) support multiple LUNs -# -# CONFIG_SCSI_DEBUG_QUEUES is not set -# CONFIG_SCSI_MULTI_LUN is not set -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set - -# -# SCSI low-level drivers -# -# CONFIG_BLK_DEV_3W_XXXX_RAID is not set -# CONFIG_SCSI_7000FASST is not set -# CONFIG_SCSI_ACARD is not set -# CONFIG_SCSI_AHA152X is not set -# CONFIG_SCSI_AHA1542 is not set -# CONFIG_SCSI_AHA1740 is not set -# CONFIG_SCSI_AIC7XXX is not set -# CONFIG_SCSI_AIC7XXX_OLD is not set -# CONFIG_SCSI_DPT_I2O is not set -# CONFIG_SCSI_ADVANSYS is not set -# CONFIG_SCSI_IN2000 is not set -# CONFIG_SCSI_AM53C974 is not set -# CONFIG_SCSI_MEGARAID is not set -# CONFIG_SCSI_BUSLOGIC is not set -# CONFIG_SCSI_CPQFCTS is not set -# CONFIG_SCSI_DMX3191D is not set -# CONFIG_SCSI_DTC3280 is not set -# CONFIG_SCSI_EATA is not set -# CONFIG_SCSI_EATA_DMA is not set -# CONFIG_SCSI_EATA_PIO is not set -# CONFIG_SCSI_FUTURE_DOMAIN is not set -# CONFIG_SCSI_GDTH is not set -# CONFIG_SCSI_GENERIC_NCR5380 is not set -# CONFIG_SCSI_INITIO is not set -# CONFIG_SCSI_INIA100 is not set -# CONFIG_SCSI_NCR53C406A is not set -# CONFIG_SCSI_NCR53C7xx is not set -# CONFIG_SCSI_NCR53C8XX is not set -# CONFIG_SCSI_SYM53C8XX is not set -# CONFIG_SCSI_PAS16 is not set -# CONFIG_SCSI_PCI2000 is not set -# CONFIG_SCSI_PCI2220I is not set -# CONFIG_SCSI_PSI240I is not set -# CONFIG_SCSI_QLOGIC_FAS is not set -# CONFIG_SCSI_QLOGIC_ISP is not set -CONFIG_SCSI_QLOGIC_FC=y -# CONFIG_SCSI_QLOGIC_FC_FIRMWARE is not set -# CONFIG_SCSI_QLOGIC_1280 is not set -# CONFIG_SCSI_QLOGIC_QLA2100 is not set -# CONFIG_SCSI_SIM710 is not set -# CONFIG_SCSI_SYM53C416 is not set -# CONFIG_SCSI_DC390T is not set -# CONFIG_SCSI_T128 is not set -# CONFIG_SCSI_U14_34F is not set -# CONFIG_SCSI_DEBUG is not set - -# -# Amateur Radio support -# -# CONFIG_HAMRADIO is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# CD-ROM drivers (not for SCSI or IDE/ATAPI drives) -# -# CONFIG_CD_NO_IDESCSI is not set - -# -# Input core support -# -# CONFIG_INPUT is not set -# CONFIG_INPUT_KEYBDEV is not set -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_EVDEV is not set - -# -# Character devices -# -# CONFIG_VT is not set -CONFIG_SERIAL=y -# CONFIG_SERIAL_CONSOLE is not set -# CONFIG_SERIAL_EXTENDED is not set -# CONFIG_SERIAL_NONSTANDARD is not set -CONFIG_UNIX98_PTYS=y -CONFIG_UNIX98_PTY_COUNT=256 - -# -# I2C support -# -# CONFIG_I2C is not set - -# -# Mice -# -# CONFIG_BUSMOUSE is not set -# CONFIG_MOUSE is not set - -# -# Joysticks -# -# CONFIG_INPUT_GAMEPORT is not set - -# -# Input core support is needed for gameports -# - -# -# Input core support is needed for joysticks -# -# CONFIG_QIC02_TAPE is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_INTEL_RNG is not set -# CONFIG_NVRAM is not set -# CONFIG_RTC is not set -# CONFIG_EFI_RTC is not set -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_FTAPE is not set -# CONFIG_AGP is not set -# CONFIG_DRM is not set -# CONFIG_MWAVE is not set - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# File systems -# -# CONFIG_QUOTA is not set -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set -# CONFIG_REISERFS_FS is not set -# CONFIG_REISERFS_CHECK is not set -# CONFIG_ADFS_FS is not set -# CONFIG_ADFS_FS_RW is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_FAT_FS is not set -# CONFIG_MSDOS_FS is not set -# CONFIG_UMSDOS_FS is not set -# CONFIG_VFAT_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_JFFS_FS is not set -# CONFIG_JFFS2_FS is not set -# CONFIG_CRAMFS is not set -CONFIG_TMPFS=y -# CONFIG_RAMFS is not set -# CONFIG_ISO9660_FS is not set -# CONFIG_JOLIET is not set -# CONFIG_MINIX_FS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_NTFS_FS is not set -# CONFIG_NTFS_DEBUG is not set -# CONFIG_NTFS_RW is not set -# CONFIG_HPFS_FS is not set -CONFIG_PROC_FS=y -CONFIG_DEVFS_FS=y -# CONFIG_DEVFS_MOUNT is not set -# CONFIG_DEVFS_DEBUG is not set -CONFIG_DEVPTS_FS=y -# CONFIG_QNX4FS_FS is not set -# CONFIG_QNX4FS_RW is not set -# CONFIG_ROMFS_FS is not set -CONFIG_EXT2_FS=y -# CONFIG_SYSV_FS is not set -# CONFIG_UDF_FS is not set -# CONFIG_UDF_RW is not set -# CONFIG_UFS_FS is not set -# CONFIG_UFS_FS_WRITE is not set -# CONFIG_XFS_SUPPORT is not set -# CONFIG_NCPFS_NLS is not set -# CONFIG_SMB_FS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y -# CONFIG_SMB_NLS is not set -# CONFIG_NLS is not set - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# -# CONFIG_USB is not set - -# -# USB Controllers -# -# CONFIG_USB_UHCI is not set -# CONFIG_USB_UHCI_ALT is not set -# CONFIG_USB_OHCI is not set - -# -# USB Device Class drivers -# -# CONFIG_USB_AUDIO is not set -# CONFIG_USB_BLUETOOTH is not set -# CONFIG_USB_STORAGE is not set -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_DPCM is not set -# CONFIG_USB_STORAGE_HP8200e is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_ACM is not set -# CONFIG_USB_PRINTER is not set - -# -# USB Human Interface Devices (HID) -# - -# -# Input core support is needed for USB HID -# - -# -# USB Imaging devices -# -# CONFIG_USB_DC2XX is not set -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_SCANNER is not set -# CONFIG_USB_MICROTEK is not set -# CONFIG_USB_HPUSBSCSI is not set - -# -# USB Multimedia devices -# - -# -# Video4Linux support is needed for USB Multimedia device support -# - -# -# USB Network adaptors -# - -# -# Networking support is needed for USB Networking device support -# - -# -# USB port drivers -# -# CONFIG_USB_USS720 is not set - -# -# USB Serial Converter support -# -# CONFIG_USB_SERIAL is not set -# CONFIG_USB_SERIAL_GENERIC is not set -# CONFIG_USB_SERIAL_BELKIN is not set -# CONFIG_USB_SERIAL_WHITEHEAT is not set -# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set -# CONFIG_USB_SERIAL_EMPEG is not set -# CONFIG_USB_SERIAL_FTDI_SIO is not set -# CONFIG_USB_SERIAL_VISOR is not set -# CONFIG_USB_SERIAL_IR is not set -# CONFIG_USB_SERIAL_EDGEPORT is not set -# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set -# CONFIG_USB_SERIAL_KEYSPAN is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set -# CONFIG_USB_SERIAL_MCT_U232 is not set -# CONFIG_USB_SERIAL_PL2303 is not set -# CONFIG_USB_SERIAL_CYBERJACK is not set -# CONFIG_USB_SERIAL_XIRCOM is not set -# CONFIG_USB_SERIAL_OMNINET is not set - -# -# USB Miscellaneous drivers -# -# CONFIG_USB_RIO500 is not set - -# -# IEEE 1394 (FireWire) support (EXPERIMENTAL) -# -# CONFIG_IEEE1394 is not set - -# -# Kernel hacking -# -CONFIG_DEBUG_KERNEL=y -CONFIG_IA64_PRINT_HAZARDS=y -# CONFIG_DISABLE_VHPT is not set -CONFIG_MAGIC_SYSRQ=y -CONFIG_IA64_EARLY_PRINTK=y -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_IA64_DEBUG_CMPXCHG is not set -# CONFIG_IA64_DEBUG_IRQ is not set -# CONFIG_KDB is not set -# CONFIG_KDB_MODULES is not set -# CONFIG_KALLSYMS is not set diff -Nru a/arch/ia64/sn/configs/sn1/defconfig-sn1-mp b/arch/ia64/sn/configs/sn1/defconfig-sn1-mp --- a/arch/ia64/sn/configs/sn1/defconfig-sn1-mp Mon Dec 23 21:21:59 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,726 +0,0 @@ -# -# Automatically generated make config: don't edit -# - -# -# Code maturity level options -# -CONFIG_EXPERIMENTAL=y - -# -# Loadable module support -# -# CONFIG_MODULES is not set - -# -# General setup -# -CONFIG_IA64=y -# CONFIG_ISA is not set -# CONFIG_EISA is not set -# CONFIG_MCA is not set -# CONFIG_SBUS is not set -CONFIG_RWSEM_GENERIC_SPINLOCK=y -# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set -CONFIG_ACPI=y -CONFIG_ACPI_EFI=y -CONFIG_ACPI_INTERPRETER=y -CONFIG_ACPI_KERNEL_CONFIG=y -CONFIG_ITANIUM=y -# CONFIG_MCKINLEY is not set -# CONFIG_IA64_GENERIC is not set -# CONFIG_IA64_DIG is not set -# CONFIG_IA64_HP_SIM is not set -CONFIG_IA64_SGI_SN1=y -# CONFIG_IA64_SGI_SN2 is not set -# CONFIG_IA64_PAGE_SIZE_4KB is not set -# CONFIG_IA64_PAGE_SIZE_8KB is not set -CONFIG_IA64_PAGE_SIZE_16KB=y -# CONFIG_IA64_PAGE_SIZE_64KB is not set -CONFIG_IA64_BRL_EMU=y -CONFIG_ITANIUM_BSTEP_SPECIFIC=y -CONFIG_IA64_L1_CACHE_SHIFT=7 -CONFIG_IA64_SGI_SN=y -CONFIG_IA64_SGI_SN_DEBUG=y -CONFIG_IA64_SGI_SN_SIM=y -CONFIG_IA64_SGI_AUTOTEST=y -CONFIG_DEVFS_FS=y -CONFIG_DEVFS_DEBUG=y -CONFIG_SERIAL_SGI_L1_PROTOCOL=y -CONFIG_DISCONTIGMEM=y -CONFIG_IA64_MCA=y -CONFIG_NUMA=y -CONFIG_PERCPU_IRQ=y -CONFIG_PCIBA=y -CONFIG_KCORE_ELF=y -CONFIG_SMP=y -CONFIG_IA32_SUPPORT=y -CONFIG_PERFMON=y -CONFIG_IA64_PALINFO=y -# CONFIG_EFI_VARS is not set -CONFIG_NET=y -CONFIG_SYSVIPC=y -# CONFIG_BSD_PROCESS_ACCT is not set -CONFIG_SYSCTL=y -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set -# CONFIG_ACPI_DEBUG is not set -# CONFIG_ACPI_BUSMGR is not set -# CONFIG_ACPI_SYS is not set -# CONFIG_ACPI_CPU is not set -# CONFIG_ACPI_BUTTON is not set -# CONFIG_ACPI_AC is not set -# CONFIG_ACPI_EC is not set -# CONFIG_ACPI_CMBATT is not set -# CONFIG_ACPI_THERMAL is not set -CONFIG_PCI=y -# CONFIG_PCI_NAMES is not set -# CONFIG_HOTPLUG is not set -# CONFIG_PCMCIA is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Networking options -# -CONFIG_PACKET=y -# CONFIG_PACKET_MMAP is not set -CONFIG_NETLINK=y -CONFIG_RTNETLINK=y -CONFIG_NETLINK_DEV=y -CONFIG_NETFILTER=y -CONFIG_NETFILTER_DEBUG=y -CONFIG_FILTER=y -CONFIG_UNIX=y -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -# CONFIG_IP_ADVANCED_ROUTER is not set -# CONFIG_IP_PNP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_IP_MROUTE is not set -# CONFIG_ARPD is not set -# CONFIG_INET_ECN is not set -CONFIG_SYN_COOKIES=y - -# -# IP: Netfilter Configuration -# -# CONFIG_IP_NF_CONNTRACK is not set -# CONFIG_IP_NF_QUEUE is not set -# CONFIG_IP_NF_IPTABLES is not set -# CONFIG_IP_NF_COMPAT_IPCHAINS is not set -# CONFIG_IP_NF_COMPAT_IPFWADM is not set -# CONFIG_IPV6 is not set -# CONFIG_KHTTPD is not set -# CONFIG_ATM is not set - -# -# -# -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_DECNET is not set -# CONFIG_BRIDGE is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_LLC is not set -# CONFIG_NET_DIVERT is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_NET_FASTROUTE is not set -# CONFIG_NET_HW_FLOWCONTROL is not set - -# -# QoS and/or fair queueing -# -# CONFIG_NET_SCHED is not set - -# -# Memory Technology Devices (MTD) -# -# CONFIG_MTD is not set - -# -# Plug and Play configuration -# -# CONFIG_PNP is not set -# CONFIG_ISAPNP is not set -# CONFIG_PNPBIOS is not set - -# -# Block devices -# -# CONFIG_BLK_DEV_FD is not set -# CONFIG_BLK_DEV_XD is not set -# CONFIG_PARIDE is not set -# CONFIG_BLK_CPQ_DA is not set -# CONFIG_BLK_CPQ_CISS_DA is not set -# CONFIG_BLK_DEV_DAC960 is not set -CONFIG_BLK_DEV_LOOP=y -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_RAM is not set -# CONFIG_BLK_DEV_INITRD is not set - -# -# I2O device support -# -# CONFIG_I2O is not set -# CONFIG_I2O_PCI is not set -# CONFIG_I2O_BLOCK is not set -# CONFIG_I2O_LAN is not set -# CONFIG_I2O_SCSI is not set -# CONFIG_I2O_PROC is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set -# CONFIG_BLK_DEV_MD is not set -# CONFIG_MD_LINEAR is not set -# CONFIG_MD_RAID0 is not set -# CONFIG_MD_RAID1 is not set -# CONFIG_MD_RAID5 is not set -# CONFIG_MD_MULTIPATH is not set -# CONFIG_BLK_DEV_LVM is not set - -# -# ATA/IDE/MFM/RLL support -# -CONFIG_IDE=y - -# -# IDE, ATA and ATAPI Block devices -# -CONFIG_BLK_DEV_IDE=y - -# -# Please see Documentation/ide.txt for help/info on IDE drives -# -# CONFIG_BLK_DEV_HD_IDE is not set -# CONFIG_BLK_DEV_HD is not set -CONFIG_BLK_DEV_IDEDISK=y -# CONFIG_IDEDISK_MULTI_MODE is not set -# CONFIG_BLK_DEV_IDECS is not set -# CONFIG_BLK_DEV_IDECD is not set -# CONFIG_BLK_DEV_IDETAPE is not set -# CONFIG_BLK_DEV_IDEFLOPPY is not set -# CONFIG_BLK_DEV_IDESCSI is not set - -# -# IDE chipset support/bugfixes -# -# CONFIG_BLK_DEV_CMD640 is not set -# CONFIG_BLK_DEV_CMD640_ENHANCED is not set -# CONFIG_BLK_DEV_ISAPNP is not set -# CONFIG_BLK_DEV_RZ1000 is not set -# CONFIG_IDE_CHIPSETS is not set -# CONFIG_IDEDMA_AUTO is not set -# CONFIG_BLK_DEV_IDE_MODES is not set -# CONFIG_BLK_DEV_ATARAID is not set -# CONFIG_BLK_DEV_ATARAID_PDC is not set -# CONFIG_BLK_DEV_ATARAID_HPT is not set - -# -# Alternate 1394 support -# -# CONFIG_X1394 is not set - -# -# Alternate SCSI support -# -CONFIG_XSCSI=y - -# -# Alternate SCSI support -# -CONFIG_XSCSI_DKSC=y -# CONFIG_XSCSI_QLFC is not set -# CONFIG_XSCSI_QL is not set -# CONFIG_XSCSI_SBP2 is not set - -# -# SCSI support -# -CONFIG_SCSI=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -CONFIG_SD_EXTRA_DEVS=40 -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -# CONFIG_BLK_DEV_SR is not set -# CONFIG_CHR_DEV_SG is not set - -# -# Some SCSI devices (e.g. CD jukebox) support multiple LUNs -# -# CONFIG_SCSI_DEBUG_QUEUES is not set -# CONFIG_SCSI_MULTI_LUN is not set -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set - -# -# SCSI low-level drivers -# -# CONFIG_BLK_DEV_3W_XXXX_RAID is not set -# CONFIG_SCSI_7000FASST is not set -# CONFIG_SCSI_ACARD is not set -# CONFIG_SCSI_AHA152X is not set -# CONFIG_SCSI_AHA1542 is not set -# CONFIG_SCSI_AHA1740 is not set -# CONFIG_SCSI_AIC7XXX is not set -# CONFIG_SCSI_AIC7XXX_OLD is not set -# CONFIG_SCSI_DPT_I2O is not set -# CONFIG_SCSI_ADVANSYS is not set -# CONFIG_SCSI_IN2000 is not set -# CONFIG_SCSI_AM53C974 is not set -# CONFIG_SCSI_MEGARAID is not set -# CONFIG_SCSI_BUSLOGIC is not set -# CONFIG_SCSI_CPQFCTS is not set -# CONFIG_SCSI_DMX3191D is not set -# CONFIG_SCSI_DTC3280 is not set -# CONFIG_SCSI_EATA is not set -# CONFIG_SCSI_EATA_DMA is not set -# CONFIG_SCSI_EATA_PIO is not set -# CONFIG_SCSI_FUTURE_DOMAIN is not set -# CONFIG_SCSI_GDTH is not set -# CONFIG_SCSI_GENERIC_NCR5380 is not set -# CONFIG_SCSI_INITIO is not set -# CONFIG_SCSI_INIA100 is not set -# CONFIG_SCSI_NCR53C406A is not set -# CONFIG_SCSI_NCR53C7xx is not set -# CONFIG_SCSI_NCR53C8XX is not set -# CONFIG_SCSI_SYM53C8XX is not set -# CONFIG_SCSI_PAS16 is not set -# CONFIG_SCSI_PCI2000 is not set -# CONFIG_SCSI_PCI2220I is not set -# CONFIG_SCSI_PSI240I is not set -# CONFIG_SCSI_QLOGIC_FAS is not set -# CONFIG_SCSI_QLOGIC_ISP is not set -CONFIG_SCSI_QLOGIC_FC=y -# CONFIG_SCSI_QLOGIC_FC_FIRMWARE is not set -# CONFIG_SCSI_QLOGIC_1280 is not set -# CONFIG_SCSI_QLOGIC_QLA2100 is not set -# CONFIG_SCSI_SIM710 is not set -# CONFIG_SCSI_SYM53C416 is not set -# CONFIG_SCSI_DC390T is not set -# CONFIG_SCSI_T128 is not set -# CONFIG_SCSI_U14_34F is not set -# CONFIG_SCSI_DEBUG is not set - -# -# Network device support -# -CONFIG_NETDEVICES=y - -# -# ARCnet devices -# -# CONFIG_ARCNET is not set -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set -# CONFIG_ETHERTAP is not set - -# -# Ethernet (10 or 100Mbit) -# -CONFIG_NET_ETHERNET=y -CONFIG_SGI_IOC3_ETH=y -# CONFIG_SUNLANCE is not set -# CONFIG_HAPPYMEAL is not set -# CONFIG_SUNBMAC is not set -# CONFIG_SUNQE is not set -# CONFIG_SUNLANCE is not set -# CONFIG_SUNGEM is not set -# CONFIG_NET_VENDOR_3COM is not set -# CONFIG_LANCE is not set -# CONFIG_NET_VENDOR_SMC is not set -# CONFIG_NET_VENDOR_RACAL is not set -# CONFIG_HP100 is not set -# CONFIG_NET_ISA is not set -# CONFIG_NET_PCI is not set -# CONFIG_NET_POCKET is not set - -# -# Ethernet (1000 Mbit) -# -# CONFIG_ACENIC is not set -# CONFIG_DL2K is not set -# CONFIG_MYRI_SBUS is not set -# CONFIG_NS83820 is not set -# CONFIG_HAMACHI is not set -# CONFIG_YELLOWFIN is not set -# CONFIG_SK98LIN is not set -# CONFIG_FDDI is not set -# CONFIG_HIPPI is not set -# CONFIG_PLIP is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set - -# -# Wireless LAN (non-hamradio) -# -# CONFIG_NET_RADIO is not set - -# -# Token Ring devices -# -# CONFIG_TR is not set -# CONFIG_NET_FC is not set -# CONFIG_RCPCI is not set -# CONFIG_SHAPER is not set - -# -# Wan interfaces -# -# CONFIG_WAN is not set - -# -# Amateur Radio support -# -# CONFIG_HAMRADIO is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# CD-ROM drivers (not for SCSI or IDE/ATAPI drives) -# -# CONFIG_CD_NO_IDESCSI is not set - -# -# Input core support -# -# CONFIG_INPUT is not set -# CONFIG_INPUT_KEYBDEV is not set -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_EVDEV is not set - -# -# Character devices -# -# CONFIG_VT is not set -CONFIG_SERIAL=y -# CONFIG_SERIAL_CONSOLE is not set -# CONFIG_SERIAL_EXTENDED is not set -# CONFIG_SERIAL_NONSTANDARD is not set -CONFIG_UNIX98_PTYS=y -CONFIG_UNIX98_PTY_COUNT=256 - -# -# I2C support -# -# CONFIG_I2C is not set - -# -# Mice -# -# CONFIG_BUSMOUSE is not set -# CONFIG_MOUSE is not set - -# -# Joysticks -# -# CONFIG_INPUT_GAMEPORT is not set - -# -# Input core support is needed for gameports -# - -# -# Input core support is needed for joysticks -# -# CONFIG_QIC02_TAPE is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_INTEL_RNG is not set -# CONFIG_NVRAM is not set -# CONFIG_RTC is not set -CONFIG_EFI_RTC=y -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_FTAPE is not set -# CONFIG_AGP is not set -# CONFIG_DRM is not set -# CONFIG_MWAVE is not set - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# File systems -# -CONFIG_QUOTA=y -CONFIG_AUTOFS_FS=y -CONFIG_AUTOFS4_FS=y -# CONFIG_REISERFS_FS is not set -# CONFIG_REISERFS_CHECK is not set -# CONFIG_ADFS_FS is not set -# CONFIG_ADFS_FS_RW is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_BFS_FS is not set -CONFIG_FAT_FS=y -CONFIG_MSDOS_FS=y -# CONFIG_UMSDOS_FS is not set -CONFIG_VFAT_FS=y -# CONFIG_EFS_FS is not set -# CONFIG_JFFS_FS is not set -# CONFIG_JFFS2_FS is not set -# CONFIG_CRAMFS is not set -CONFIG_TMPFS=y -# CONFIG_RAMFS is not set -CONFIG_ISO9660_FS=y -# CONFIG_JOLIET is not set -# CONFIG_MINIX_FS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_NTFS_FS is not set -# CONFIG_NTFS_DEBUG is not set -# CONFIG_NTFS_RW is not set -# CONFIG_HPFS_FS is not set -CONFIG_PROC_FS=y -CONFIG_DEVFS_FS=y -CONFIG_DEVFS_MOUNT=y -CONFIG_DEVFS_DEBUG=y -CONFIG_DEVPTS_FS=y -# CONFIG_QNX4FS_FS is not set -# CONFIG_QNX4FS_RW is not set -# CONFIG_ROMFS_FS is not set -CONFIG_EXT2_FS=y -# CONFIG_SYSV_FS is not set -# CONFIG_UDF_FS is not set -# CONFIG_UDF_RW is not set -# CONFIG_UFS_FS is not set -# CONFIG_UFS_FS_WRITE is not set -CONFIG_XFS_SUPPORT=y - -# -# Network File Systems -# -# CONFIG_CODA_FS is not set -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -# CONFIG_ROOT_NFS is not set -CONFIG_NFSD=y -CONFIG_NFSD_V3=y -CONFIG_SUNRPC=y -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -# CONFIG_SMB_FS is not set -# CONFIG_NCP_FS is not set -# CONFIG_NCPFS_PACKET_SIGNING is not set -# CONFIG_NCPFS_IOCTL_LOCKING is not set -# CONFIG_NCPFS_STRONG is not set -# CONFIG_NCPFS_NFS_NS is not set -# CONFIG_NCPFS_OS2_NS is not set -# CONFIG_NCPFS_SMALLDOS is not set -# CONFIG_NCPFS_NLS is not set -# CONFIG_NCPFS_EXTRAS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y -# CONFIG_SMB_NLS is not set -CONFIG_NLS=y - -# -# Native Language Support -# -CONFIG_NLS_DEFAULT="n" -# CONFIG_NLS_CODEPAGE_437 is not set -# CONFIG_NLS_CODEPAGE_737 is not set -# CONFIG_NLS_CODEPAGE_775 is not set -# CONFIG_NLS_CODEPAGE_850 is not set -# CONFIG_NLS_CODEPAGE_852 is not set -# CONFIG_NLS_CODEPAGE_855 is not set -# CONFIG_NLS_CODEPAGE_857 is not set -# CONFIG_NLS_CODEPAGE_860 is not set -# CONFIG_NLS_CODEPAGE_861 is not set -# CONFIG_NLS_CODEPAGE_862 is not set -# CONFIG_NLS_CODEPAGE_863 is not set -# CONFIG_NLS_CODEPAGE_864 is not set -# CONFIG_NLS_CODEPAGE_865 is not set -# CONFIG_NLS_CODEPAGE_866 is not set -# CONFIG_NLS_CODEPAGE_869 is not set -# CONFIG_NLS_CODEPAGE_936 is not set -# CONFIG_NLS_CODEPAGE_950 is not set -# CONFIG_NLS_CODEPAGE_932 is not set -# CONFIG_NLS_CODEPAGE_949 is not set -# CONFIG_NLS_CODEPAGE_874 is not set -# CONFIG_NLS_ISO8859_8 is not set -# CONFIG_NLS_CODEPAGE_1251 is not set -# CONFIG_NLS_ISO8859_1 is not set -# CONFIG_NLS_ISO8859_2 is not set -# CONFIG_NLS_ISO8859_3 is not set -# CONFIG_NLS_ISO8859_4 is not set -# CONFIG_NLS_ISO8859_5 is not set -# CONFIG_NLS_ISO8859_6 is not set -# CONFIG_NLS_ISO8859_7 is not set -# CONFIG_NLS_ISO8859_9 is not set -# CONFIG_NLS_ISO8859_13 is not set -# CONFIG_NLS_ISO8859_14 is not set -# CONFIG_NLS_ISO8859_15 is not set -# CONFIG_NLS_KOI8_R is not set -# CONFIG_NLS_KOI8_U is not set -# CONFIG_NLS_UTF8 is not set - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# -# CONFIG_USB is not set - -# -# USB Controllers -# -# CONFIG_USB_UHCI is not set -# CONFIG_USB_UHCI_ALT is not set -# CONFIG_USB_OHCI is not set - -# -# USB Device Class drivers -# -# CONFIG_USB_AUDIO is not set -# CONFIG_USB_BLUETOOTH is not set -# CONFIG_USB_STORAGE is not set -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_DPCM is not set -# CONFIG_USB_STORAGE_HP8200e is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_ACM is not set -# CONFIG_USB_PRINTER is not set - -# -# USB Human Interface Devices (HID) -# - -# -# Input core support is needed for USB HID -# - -# -# USB Imaging devices -# -# CONFIG_USB_DC2XX is not set -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_SCANNER is not set -# CONFIG_USB_MICROTEK is not set -# CONFIG_USB_HPUSBSCSI is not set - -# -# USB Multimedia devices -# - -# -# Video4Linux support is needed for USB Multimedia device support -# - -# -# USB Network adaptors -# -# CONFIG_USB_PEGASUS is not set -# CONFIG_USB_KAWETH is not set -# CONFIG_USB_CATC is not set -# CONFIG_USB_CDCETHER is not set -# CONFIG_USB_USBNET is not set - -# -# USB port drivers -# -# CONFIG_USB_USS720 is not set - -# -# USB Serial Converter support -# -# CONFIG_USB_SERIAL is not set -# CONFIG_USB_SERIAL_GENERIC is not set -# CONFIG_USB_SERIAL_BELKIN is not set -# CONFIG_USB_SERIAL_WHITEHEAT is not set -# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set -# CONFIG_USB_SERIAL_EMPEG is not set -# CONFIG_USB_SERIAL_FTDI_SIO is not set -# CONFIG_USB_SERIAL_VISOR is not set -# CONFIG_USB_SERIAL_IR is not set -# CONFIG_USB_SERIAL_EDGEPORT is not set -# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set -# CONFIG_USB_SERIAL_KEYSPAN is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set -# CONFIG_USB_SERIAL_MCT_U232 is not set -# CONFIG_USB_SERIAL_PL2303 is not set -# CONFIG_USB_SERIAL_CYBERJACK is not set -# CONFIG_USB_SERIAL_XIRCOM is not set -# CONFIG_USB_SERIAL_OMNINET is not set - -# -# USB Miscellaneous drivers -# -# CONFIG_USB_RIO500 is not set - -# -# IEEE 1394 (FireWire) support (EXPERIMENTAL) -# -# CONFIG_IEEE1394 is not set - -# -# Bluetooth support -# -# CONFIG_BT is not set - -# -# Kernel hacking -# -CONFIG_DEBUG_KERNEL=y -CONFIG_IA64_PRINT_HAZARDS=y -# CONFIG_DISABLE_VHPT is not set -CONFIG_MAGIC_SYSRQ=y -CONFIG_IA64_EARLY_PRINTK=y -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_IA64_DEBUG_CMPXCHG is not set -# CONFIG_IA64_DEBUG_IRQ is not set -CONFIG_KDB=y -CONFIG_KDB_MODULES=y -# CONFIG_KDB_OFF is not set - -# -# Load all symbols for debugging is required for KDB -# -CONFIG_KALLSYMS=y diff -Nru a/arch/ia64/sn/configs/sn1/defconfig-sn1-mp-modules b/arch/ia64/sn/configs/sn1/defconfig-sn1-mp-modules --- a/arch/ia64/sn/configs/sn1/defconfig-sn1-mp-modules Mon Dec 23 21:21:58 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,728 +0,0 @@ -# -# Automatically generated make config: don't edit -# - -# -# Code maturity level options -# -CONFIG_EXPERIMENTAL=y - -# -# Loadable module support -# -CONFIG_MODULES=y -# CONFIG_MODVERSIONS is not set -CONFIG_KMOD=y - -# -# General setup -# -CONFIG_IA64=y -# CONFIG_ISA is not set -# CONFIG_EISA is not set -# CONFIG_MCA is not set -# CONFIG_SBUS is not set -CONFIG_RWSEM_GENERIC_SPINLOCK=y -# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set -CONFIG_ACPI=y -CONFIG_ACPI_EFI=y -CONFIG_ACPI_INTERPRETER=y -CONFIG_ACPI_KERNEL_CONFIG=y -CONFIG_ITANIUM=y -# CONFIG_MCKINLEY is not set -# CONFIG_IA64_GENERIC is not set -# CONFIG_IA64_DIG is not set -# CONFIG_IA64_HP_SIM is not set -CONFIG_IA64_SGI_SN1=y -# CONFIG_IA64_SGI_SN2 is not set -# CONFIG_IA64_PAGE_SIZE_4KB is not set -# CONFIG_IA64_PAGE_SIZE_8KB is not set -CONFIG_IA64_PAGE_SIZE_16KB=y -# CONFIG_IA64_PAGE_SIZE_64KB is not set -CONFIG_IA64_BRL_EMU=y -CONFIG_ITANIUM_BSTEP_SPECIFIC=y -CONFIG_IA64_L1_CACHE_SHIFT=7 -CONFIG_IA64_SGI_SN=y -CONFIG_IA64_SGI_SN_DEBUG=y -CONFIG_IA64_SGI_SN_SIM=y -CONFIG_IA64_SGI_AUTOTEST=y -CONFIG_DEVFS_FS=y -CONFIG_DEVFS_DEBUG=y -CONFIG_SERIAL_SGI_L1_PROTOCOL=y -CONFIG_DISCONTIGMEM=y -CONFIG_IA64_MCA=y -CONFIG_NUMA=y -CONFIG_PERCPU_IRQ=y -CONFIG_PCIBA=y -CONFIG_KCORE_ELF=y -CONFIG_SMP=y -CONFIG_IA32_SUPPORT=y -CONFIG_PERFMON=y -CONFIG_IA64_PALINFO=y -# CONFIG_EFI_VARS is not set -CONFIG_NET=y -CONFIG_SYSVIPC=y -# CONFIG_BSD_PROCESS_ACCT is not set -CONFIG_SYSCTL=y -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set -# CONFIG_ACPI_DEBUG is not set -# CONFIG_ACPI_BUSMGR is not set -# CONFIG_ACPI_SYS is not set -# CONFIG_ACPI_CPU is not set -# CONFIG_ACPI_BUTTON is not set -# CONFIG_ACPI_AC is not set -# CONFIG_ACPI_EC is not set -# CONFIG_ACPI_CMBATT is not set -# CONFIG_ACPI_THERMAL is not set -CONFIG_PCI=y -# CONFIG_PCI_NAMES is not set -# CONFIG_HOTPLUG is not set -# CONFIG_PCMCIA is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Networking options -# -CONFIG_PACKET=y -# CONFIG_PACKET_MMAP is not set -CONFIG_NETLINK=y -CONFIG_RTNETLINK=y -CONFIG_NETLINK_DEV=y -CONFIG_NETFILTER=y -CONFIG_NETFILTER_DEBUG=y -CONFIG_FILTER=y -CONFIG_UNIX=y -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -# CONFIG_IP_ADVANCED_ROUTER is not set -# CONFIG_IP_PNP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_IP_MROUTE is not set -# CONFIG_ARPD is not set -# CONFIG_INET_ECN is not set -CONFIG_SYN_COOKIES=y - -# -# IP: Netfilter Configuration -# -# CONFIG_IP_NF_CONNTRACK is not set -# CONFIG_IP_NF_QUEUE is not set -# CONFIG_IP_NF_IPTABLES is not set -# CONFIG_IP_NF_COMPAT_IPCHAINS is not set -# CONFIG_IP_NF_COMPAT_IPFWADM is not set -# CONFIG_IPV6 is not set -# CONFIG_KHTTPD is not set -# CONFIG_ATM is not set - -# -# -# -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_DECNET is not set -# CONFIG_BRIDGE is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_LLC is not set -# CONFIG_NET_DIVERT is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_NET_FASTROUTE is not set -# CONFIG_NET_HW_FLOWCONTROL is not set - -# -# QoS and/or fair queueing -# -# CONFIG_NET_SCHED is not set - -# -# Memory Technology Devices (MTD) -# -# CONFIG_MTD is not set - -# -# Plug and Play configuration -# -# CONFIG_PNP is not set -# CONFIG_ISAPNP is not set -# CONFIG_PNPBIOS is not set - -# -# Block devices -# -# CONFIG_BLK_DEV_FD is not set -# CONFIG_BLK_DEV_XD is not set -# CONFIG_PARIDE is not set -# CONFIG_BLK_CPQ_DA is not set -# CONFIG_BLK_CPQ_CISS_DA is not set -# CONFIG_BLK_DEV_DAC960 is not set -CONFIG_BLK_DEV_LOOP=y -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_RAM is not set -# CONFIG_BLK_DEV_INITRD is not set - -# -# I2O device support -# -# CONFIG_I2O is not set -# CONFIG_I2O_PCI is not set -# CONFIG_I2O_BLOCK is not set -# CONFIG_I2O_LAN is not set -# CONFIG_I2O_SCSI is not set -# CONFIG_I2O_PROC is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set -# CONFIG_BLK_DEV_MD is not set -# CONFIG_MD_LINEAR is not set -# CONFIG_MD_RAID0 is not set -# CONFIG_MD_RAID1 is not set -# CONFIG_MD_RAID5 is not set -# CONFIG_MD_MULTIPATH is not set -# CONFIG_BLK_DEV_LVM is not set - -# -# ATA/IDE/MFM/RLL support -# -CONFIG_IDE=y - -# -# IDE, ATA and ATAPI Block devices -# -CONFIG_BLK_DEV_IDE=y - -# -# Please see Documentation/ide.txt for help/info on IDE drives -# -# CONFIG_BLK_DEV_HD_IDE is not set -# CONFIG_BLK_DEV_HD is not set -CONFIG_BLK_DEV_IDEDISK=y -# CONFIG_IDEDISK_MULTI_MODE is not set -# CONFIG_BLK_DEV_IDECS is not set -# CONFIG_BLK_DEV_IDECD is not set -# CONFIG_BLK_DEV_IDETAPE is not set -# CONFIG_BLK_DEV_IDEFLOPPY is not set -# CONFIG_BLK_DEV_IDESCSI is not set - -# -# IDE chipset support/bugfixes -# -# CONFIG_BLK_DEV_CMD640 is not set -# CONFIG_BLK_DEV_CMD640_ENHANCED is not set -# CONFIG_BLK_DEV_ISAPNP is not set -# CONFIG_BLK_DEV_RZ1000 is not set -# CONFIG_IDE_CHIPSETS is not set -# CONFIG_IDEDMA_AUTO is not set -# CONFIG_BLK_DEV_IDE_MODES is not set -# CONFIG_BLK_DEV_ATARAID is not set -# CONFIG_BLK_DEV_ATARAID_PDC is not set -# CONFIG_BLK_DEV_ATARAID_HPT is not set - -# -# Alternate 1394 support -# -# CONFIG_X1394 is not set - -# -# Alternate SCSI support -# -CONFIG_XSCSI=y - -# -# Alternate SCSI support -# -CONFIG_XSCSI_DKSC=y -# CONFIG_XSCSI_QLFC is not set -# CONFIG_XSCSI_QL is not set -# CONFIG_XSCSI_SBP2 is not set - -# -# SCSI support -# -CONFIG_SCSI=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -CONFIG_SD_EXTRA_DEVS=40 -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -# CONFIG_BLK_DEV_SR is not set -# CONFIG_CHR_DEV_SG is not set - -# -# Some SCSI devices (e.g. CD jukebox) support multiple LUNs -# -# CONFIG_SCSI_DEBUG_QUEUES is not set -# CONFIG_SCSI_MULTI_LUN is not set -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set - -# -# SCSI low-level drivers -# -# CONFIG_BLK_DEV_3W_XXXX_RAID is not set -# CONFIG_SCSI_7000FASST is not set -# CONFIG_SCSI_ACARD is not set -# CONFIG_SCSI_AHA152X is not set -# CONFIG_SCSI_AHA1542 is not set -# CONFIG_SCSI_AHA1740 is not set -# CONFIG_SCSI_AIC7XXX is not set -# CONFIG_SCSI_AIC7XXX_OLD is not set -# CONFIG_SCSI_DPT_I2O is not set -# CONFIG_SCSI_ADVANSYS is not set -# CONFIG_SCSI_IN2000 is not set -# CONFIG_SCSI_AM53C974 is not set -# CONFIG_SCSI_MEGARAID is not set -# CONFIG_SCSI_BUSLOGIC is not set -# CONFIG_SCSI_CPQFCTS is not set -# CONFIG_SCSI_DMX3191D is not set -# CONFIG_SCSI_DTC3280 is not set -# CONFIG_SCSI_EATA is not set -# CONFIG_SCSI_EATA_DMA is not set -# CONFIG_SCSI_EATA_PIO is not set -# CONFIG_SCSI_FUTURE_DOMAIN is not set -# CONFIG_SCSI_GDTH is not set -# CONFIG_SCSI_GENERIC_NCR5380 is not set -# CONFIG_SCSI_INITIO is not set -# CONFIG_SCSI_INIA100 is not set -# CONFIG_SCSI_NCR53C406A is not set -# CONFIG_SCSI_NCR53C7xx is not set -# CONFIG_SCSI_NCR53C8XX is not set -# CONFIG_SCSI_SYM53C8XX is not set -# CONFIG_SCSI_PAS16 is not set -# CONFIG_SCSI_PCI2000 is not set -# CONFIG_SCSI_PCI2220I is not set -# CONFIG_SCSI_PSI240I is not set -# CONFIG_SCSI_QLOGIC_FAS is not set -# CONFIG_SCSI_QLOGIC_ISP is not set -CONFIG_SCSI_QLOGIC_FC=y -# CONFIG_SCSI_QLOGIC_FC_FIRMWARE is not set -# CONFIG_SCSI_QLOGIC_1280 is not set -# CONFIG_SCSI_QLOGIC_QLA2100 is not set -# CONFIG_SCSI_SIM710 is not set -# CONFIG_SCSI_SYM53C416 is not set -# CONFIG_SCSI_DC390T is not set -# CONFIG_SCSI_T128 is not set -# CONFIG_SCSI_U14_34F is not set -# CONFIG_SCSI_DEBUG is not set - -# -# Network device support -# -CONFIG_NETDEVICES=y - -# -# ARCnet devices -# -# CONFIG_ARCNET is not set -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set -# CONFIG_ETHERTAP is not set - -# -# Ethernet (10 or 100Mbit) -# -CONFIG_NET_ETHERNET=y -CONFIG_SGI_IOC3_ETH=y -# CONFIG_SUNLANCE is not set -# CONFIG_HAPPYMEAL is not set -# CONFIG_SUNBMAC is not set -# CONFIG_SUNQE is not set -# CONFIG_SUNLANCE is not set -# CONFIG_SUNGEM is not set -# CONFIG_NET_VENDOR_3COM is not set -# CONFIG_LANCE is not set -# CONFIG_NET_VENDOR_SMC is not set -# CONFIG_NET_VENDOR_RACAL is not set -# CONFIG_HP100 is not set -# CONFIG_NET_ISA is not set -# CONFIG_NET_PCI is not set -# CONFIG_NET_POCKET is not set - -# -# Ethernet (1000 Mbit) -# -# CONFIG_ACENIC is not set -# CONFIG_DL2K is not set -# CONFIG_MYRI_SBUS is not set -# CONFIG_NS83820 is not set -# CONFIG_HAMACHI is not set -# CONFIG_YELLOWFIN is not set -# CONFIG_SK98LIN is not set -# CONFIG_FDDI is not set -# CONFIG_HIPPI is not set -# CONFIG_PLIP is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set - -# -# Wireless LAN (non-hamradio) -# -# CONFIG_NET_RADIO is not set - -# -# Token Ring devices -# -# CONFIG_TR is not set -# CONFIG_NET_FC is not set -# CONFIG_RCPCI is not set -# CONFIG_SHAPER is not set - -# -# Wan interfaces -# -# CONFIG_WAN is not set - -# -# Amateur Radio support -# -# CONFIG_HAMRADIO is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# CD-ROM drivers (not for SCSI or IDE/ATAPI drives) -# -# CONFIG_CD_NO_IDESCSI is not set - -# -# Input core support -# -# CONFIG_INPUT is not set -# CONFIG_INPUT_KEYBDEV is not set -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_EVDEV is not set - -# -# Character devices -# -# CONFIG_VT is not set -CONFIG_SERIAL=y -# CONFIG_SERIAL_CONSOLE is not set -# CONFIG_SERIAL_EXTENDED is not set -# CONFIG_SERIAL_NONSTANDARD is not set -CONFIG_UNIX98_PTYS=y -CONFIG_UNIX98_PTY_COUNT=256 - -# -# I2C support -# -# CONFIG_I2C is not set - -# -# Mice -# -# CONFIG_BUSMOUSE is not set -# CONFIG_MOUSE is not set - -# -# Joysticks -# -# CONFIG_INPUT_GAMEPORT is not set - -# -# Input core support is needed for gameports -# - -# -# Input core support is needed for joysticks -# -# CONFIG_QIC02_TAPE is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_INTEL_RNG is not set -# CONFIG_NVRAM is not set -# CONFIG_RTC is not set -CONFIG_EFI_RTC=y -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_FTAPE is not set -# CONFIG_AGP is not set -# CONFIG_DRM is not set -# CONFIG_MWAVE is not set - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# File systems -# -CONFIG_QUOTA=y -CONFIG_AUTOFS_FS=y -CONFIG_AUTOFS4_FS=y -# CONFIG_REISERFS_FS is not set -# CONFIG_REISERFS_CHECK is not set -# CONFIG_ADFS_FS is not set -# CONFIG_ADFS_FS_RW is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_BFS_FS is not set -CONFIG_FAT_FS=y -CONFIG_MSDOS_FS=y -# CONFIG_UMSDOS_FS is not set -CONFIG_VFAT_FS=y -# CONFIG_EFS_FS is not set -# CONFIG_JFFS_FS is not set -# CONFIG_JFFS2_FS is not set -# CONFIG_CRAMFS is not set -CONFIG_TMPFS=y -# CONFIG_RAMFS is not set -CONFIG_ISO9660_FS=y -# CONFIG_JOLIET is not set -# CONFIG_MINIX_FS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_NTFS_FS is not set -# CONFIG_NTFS_DEBUG is not set -# CONFIG_NTFS_RW is not set -# CONFIG_HPFS_FS is not set -CONFIG_PROC_FS=y -CONFIG_DEVFS_FS=y -CONFIG_DEVFS_MOUNT=y -CONFIG_DEVFS_DEBUG=y -CONFIG_DEVPTS_FS=y -# CONFIG_QNX4FS_FS is not set -# CONFIG_QNX4FS_RW is not set -# CONFIG_ROMFS_FS is not set -CONFIG_EXT2_FS=y -# CONFIG_SYSV_FS is not set -# CONFIG_UDF_FS is not set -# CONFIG_UDF_RW is not set -# CONFIG_UFS_FS is not set -# CONFIG_UFS_FS_WRITE is not set -CONFIG_XFS_SUPPORT=y - -# -# Network File Systems -# -# CONFIG_CODA_FS is not set -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -# CONFIG_ROOT_NFS is not set -CONFIG_NFSD=y -CONFIG_NFSD_V3=y -CONFIG_SUNRPC=y -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -# CONFIG_SMB_FS is not set -# CONFIG_NCP_FS is not set -# CONFIG_NCPFS_PACKET_SIGNING is not set -# CONFIG_NCPFS_IOCTL_LOCKING is not set -# CONFIG_NCPFS_STRONG is not set -# CONFIG_NCPFS_NFS_NS is not set -# CONFIG_NCPFS_OS2_NS is not set -# CONFIG_NCPFS_SMALLDOS is not set -# CONFIG_NCPFS_NLS is not set -# CONFIG_NCPFS_EXTRAS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y -# CONFIG_SMB_NLS is not set -CONFIG_NLS=y - -# -# Native Language Support -# -CONFIG_NLS_DEFAULT="n" -# CONFIG_NLS_CODEPAGE_437 is not set -# CONFIG_NLS_CODEPAGE_737 is not set -# CONFIG_NLS_CODEPAGE_775 is not set -# CONFIG_NLS_CODEPAGE_850 is not set -# CONFIG_NLS_CODEPAGE_852 is not set -# CONFIG_NLS_CODEPAGE_855 is not set -# CONFIG_NLS_CODEPAGE_857 is not set -# CONFIG_NLS_CODEPAGE_860 is not set -# CONFIG_NLS_CODEPAGE_861 is not set -# CONFIG_NLS_CODEPAGE_862 is not set -# CONFIG_NLS_CODEPAGE_863 is not set -# CONFIG_NLS_CODEPAGE_864 is not set -# CONFIG_NLS_CODEPAGE_865 is not set -# CONFIG_NLS_CODEPAGE_866 is not set -# CONFIG_NLS_CODEPAGE_869 is not set -# CONFIG_NLS_CODEPAGE_936 is not set -# CONFIG_NLS_CODEPAGE_950 is not set -# CONFIG_NLS_CODEPAGE_932 is not set -# CONFIG_NLS_CODEPAGE_949 is not set -# CONFIG_NLS_CODEPAGE_874 is not set -# CONFIG_NLS_ISO8859_8 is not set -# CONFIG_NLS_CODEPAGE_1251 is not set -# CONFIG_NLS_ISO8859_1 is not set -# CONFIG_NLS_ISO8859_2 is not set -# CONFIG_NLS_ISO8859_3 is not set -# CONFIG_NLS_ISO8859_4 is not set -# CONFIG_NLS_ISO8859_5 is not set -# CONFIG_NLS_ISO8859_6 is not set -# CONFIG_NLS_ISO8859_7 is not set -# CONFIG_NLS_ISO8859_9 is not set -# CONFIG_NLS_ISO8859_13 is not set -# CONFIG_NLS_ISO8859_14 is not set -# CONFIG_NLS_ISO8859_15 is not set -# CONFIG_NLS_KOI8_R is not set -# CONFIG_NLS_KOI8_U is not set -# CONFIG_NLS_UTF8 is not set - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# -# CONFIG_USB is not set - -# -# USB Controllers -# -# CONFIG_USB_UHCI is not set -# CONFIG_USB_UHCI_ALT is not set -# CONFIG_USB_OHCI is not set - -# -# USB Device Class drivers -# -# CONFIG_USB_AUDIO is not set -# CONFIG_USB_BLUETOOTH is not set -# CONFIG_USB_STORAGE is not set -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_DPCM is not set -# CONFIG_USB_STORAGE_HP8200e is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_ACM is not set -# CONFIG_USB_PRINTER is not set - -# -# USB Human Interface Devices (HID) -# - -# -# Input core support is needed for USB HID -# - -# -# USB Imaging devices -# -# CONFIG_USB_DC2XX is not set -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_SCANNER is not set -# CONFIG_USB_MICROTEK is not set -# CONFIG_USB_HPUSBSCSI is not set - -# -# USB Multimedia devices -# - -# -# Video4Linux support is needed for USB Multimedia device support -# - -# -# USB Network adaptors -# -# CONFIG_USB_PEGASUS is not set -# CONFIG_USB_KAWETH is not set -# CONFIG_USB_CATC is not set -# CONFIG_USB_CDCETHER is not set -# CONFIG_USB_USBNET is not set - -# -# USB port drivers -# -# CONFIG_USB_USS720 is not set - -# -# USB Serial Converter support -# -# CONFIG_USB_SERIAL is not set -# CONFIG_USB_SERIAL_GENERIC is not set -# CONFIG_USB_SERIAL_BELKIN is not set -# CONFIG_USB_SERIAL_WHITEHEAT is not set -# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set -# CONFIG_USB_SERIAL_EMPEG is not set -# CONFIG_USB_SERIAL_FTDI_SIO is not set -# CONFIG_USB_SERIAL_VISOR is not set -# CONFIG_USB_SERIAL_IR is not set -# CONFIG_USB_SERIAL_EDGEPORT is not set -# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set -# CONFIG_USB_SERIAL_KEYSPAN is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set -# CONFIG_USB_SERIAL_MCT_U232 is not set -# CONFIG_USB_SERIAL_PL2303 is not set -# CONFIG_USB_SERIAL_CYBERJACK is not set -# CONFIG_USB_SERIAL_XIRCOM is not set -# CONFIG_USB_SERIAL_OMNINET is not set - -# -# USB Miscellaneous drivers -# -# CONFIG_USB_RIO500 is not set - -# -# IEEE 1394 (FireWire) support (EXPERIMENTAL) -# -# CONFIG_IEEE1394 is not set - -# -# Bluetooth support -# -# CONFIG_BT is not set - -# -# Kernel hacking -# -CONFIG_DEBUG_KERNEL=y -CONFIG_IA64_PRINT_HAZARDS=y -# CONFIG_DISABLE_VHPT is not set -CONFIG_MAGIC_SYSRQ=y -CONFIG_IA64_EARLY_PRINTK=y -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_IA64_DEBUG_CMPXCHG is not set -# CONFIG_IA64_DEBUG_IRQ is not set -CONFIG_KDB=y -CONFIG_KDB_MODULES=y -# CONFIG_KDB_OFF is not set - -# -# Load all symbols for debugging is required for KDB -# -CONFIG_KALLSYMS=y diff -Nru a/arch/ia64/sn/configs/sn1/defconfig-sn1-mp-syn1-0 b/arch/ia64/sn/configs/sn1/defconfig-sn1-mp-syn1-0 --- a/arch/ia64/sn/configs/sn1/defconfig-sn1-mp-syn1-0 Mon Dec 23 21:21:53 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,726 +0,0 @@ -# -# Automatically generated make config: don't edit -# - -# -# Code maturity level options -# -CONFIG_EXPERIMENTAL=y - -# -# Loadable module support -# -# CONFIG_MODULES is not set - -# -# General setup -# -CONFIG_IA64=y -# CONFIG_ISA is not set -# CONFIG_EISA is not set -# CONFIG_MCA is not set -# CONFIG_SBUS is not set -CONFIG_RWSEM_GENERIC_SPINLOCK=y -# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set -CONFIG_ACPI=y -CONFIG_ACPI_EFI=y -CONFIG_ACPI_INTERPRETER=y -CONFIG_ACPI_KERNEL_CONFIG=y -CONFIG_ITANIUM=y -# CONFIG_MCKINLEY is not set -# CONFIG_IA64_GENERIC is not set -# CONFIG_IA64_DIG is not set -# CONFIG_IA64_HP_SIM is not set -CONFIG_IA64_SGI_SN1=y -# CONFIG_IA64_SGI_SN2 is not set -# CONFIG_IA64_PAGE_SIZE_4KB is not set -# CONFIG_IA64_PAGE_SIZE_8KB is not set -CONFIG_IA64_PAGE_SIZE_16KB=y -# CONFIG_IA64_PAGE_SIZE_64KB is not set -CONFIG_IA64_BRL_EMU=y -CONFIG_ITANIUM_BSTEP_SPECIFIC=y -CONFIG_IA64_L1_CACHE_SHIFT=7 -CONFIG_IA64_SGI_SN=y -CONFIG_IA64_SGI_SN_DEBUG=y -CONFIG_IA64_SGI_SN_SIM=y -CONFIG_IA64_SGI_AUTOTEST=y -CONFIG_DEVFS_FS=y -CONFIG_DEVFS_DEBUG=y -CONFIG_SERIAL_SGI_L1_PROTOCOL=y -CONFIG_DISCONTIGMEM=y -CONFIG_IA64_MCA=y -CONFIG_NUMA=y -CONFIG_PERCPU_IRQ=y -CONFIG_PCIBA=y -CONFIG_KCORE_ELF=y -CONFIG_SMP=y -CONFIG_IA32_SUPPORT=y -CONFIG_PERFMON=y -CONFIG_IA64_PALINFO=y -# CONFIG_EFI_VARS is not set -CONFIG_NET=y -CONFIG_SYSVIPC=y -# CONFIG_BSD_PROCESS_ACCT is not set -CONFIG_SYSCTL=y -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set -# CONFIG_ACPI_DEBUG is not set -# CONFIG_ACPI_BUSMGR is not set -# CONFIG_ACPI_SYS is not set -# CONFIG_ACPI_CPU is not set -# CONFIG_ACPI_BUTTON is not set -# CONFIG_ACPI_AC is not set -# CONFIG_ACPI_EC is not set -# CONFIG_ACPI_CMBATT is not set -# CONFIG_ACPI_THERMAL is not set -CONFIG_PCI=y -# CONFIG_PCI_NAMES is not set -# CONFIG_HOTPLUG is not set -# CONFIG_PCMCIA is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Networking options -# -CONFIG_PACKET=y -# CONFIG_PACKET_MMAP is not set -CONFIG_NETLINK=y -CONFIG_RTNETLINK=y -CONFIG_NETLINK_DEV=y -CONFIG_NETFILTER=y -CONFIG_NETFILTER_DEBUG=y -CONFIG_FILTER=y -CONFIG_UNIX=y -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -# CONFIG_IP_ADVANCED_ROUTER is not set -# CONFIG_IP_PNP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_IP_MROUTE is not set -# CONFIG_ARPD is not set -# CONFIG_INET_ECN is not set -CONFIG_SYN_COOKIES=y - -# -# IP: Netfilter Configuration -# -# CONFIG_IP_NF_CONNTRACK is not set -# CONFIG_IP_NF_QUEUE is not set -# CONFIG_IP_NF_IPTABLES is not set -# CONFIG_IP_NF_COMPAT_IPCHAINS is not set -# CONFIG_IP_NF_COMPAT_IPFWADM is not set -# CONFIG_IPV6 is not set -# CONFIG_KHTTPD is not set -# CONFIG_ATM is not set - -# -# -# -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_DECNET is not set -# CONFIG_BRIDGE is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_LLC is not set -# CONFIG_NET_DIVERT is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_NET_FASTROUTE is not set -# CONFIG_NET_HW_FLOWCONTROL is not set - -# -# QoS and/or fair queueing -# -# CONFIG_NET_SCHED is not set - -# -# Memory Technology Devices (MTD) -# -# CONFIG_MTD is not set - -# -# Plug and Play configuration -# -# CONFIG_PNP is not set -# CONFIG_ISAPNP is not set -# CONFIG_PNPBIOS is not set - -# -# Block devices -# -# CONFIG_BLK_DEV_FD is not set -# CONFIG_BLK_DEV_XD is not set -# CONFIG_PARIDE is not set -# CONFIG_BLK_CPQ_DA is not set -# CONFIG_BLK_CPQ_CISS_DA is not set -# CONFIG_BLK_DEV_DAC960 is not set -CONFIG_BLK_DEV_LOOP=y -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_RAM is not set -# CONFIG_BLK_DEV_INITRD is not set - -# -# I2O device support -# -# CONFIG_I2O is not set -# CONFIG_I2O_PCI is not set -# CONFIG_I2O_BLOCK is not set -# CONFIG_I2O_LAN is not set -# CONFIG_I2O_SCSI is not set -# CONFIG_I2O_PROC is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set -# CONFIG_BLK_DEV_MD is not set -# CONFIG_MD_LINEAR is not set -# CONFIG_MD_RAID0 is not set -# CONFIG_MD_RAID1 is not set -# CONFIG_MD_RAID5 is not set -# CONFIG_MD_MULTIPATH is not set -# CONFIG_BLK_DEV_LVM is not set - -# -# ATA/IDE/MFM/RLL support -# -CONFIG_IDE=y - -# -# IDE, ATA and ATAPI Block devices -# -CONFIG_BLK_DEV_IDE=y - -# -# Please see Documentation/ide.txt for help/info on IDE drives -# -# CONFIG_BLK_DEV_HD_IDE is not set -# CONFIG_BLK_DEV_HD is not set -CONFIG_BLK_DEV_IDEDISK=y -# CONFIG_IDEDISK_MULTI_MODE is not set -# CONFIG_BLK_DEV_IDECS is not set -# CONFIG_BLK_DEV_IDECD is not set -# CONFIG_BLK_DEV_IDETAPE is not set -# CONFIG_BLK_DEV_IDEFLOPPY is not set -# CONFIG_BLK_DEV_IDESCSI is not set - -# -# IDE chipset support/bugfixes -# -# CONFIG_BLK_DEV_CMD640 is not set -# CONFIG_BLK_DEV_CMD640_ENHANCED is not set -# CONFIG_BLK_DEV_ISAPNP is not set -# CONFIG_BLK_DEV_RZ1000 is not set -# CONFIG_IDE_CHIPSETS is not set -# CONFIG_IDEDMA_AUTO is not set -# CONFIG_BLK_DEV_IDE_MODES is not set -# CONFIG_BLK_DEV_ATARAID is not set -# CONFIG_BLK_DEV_ATARAID_PDC is not set -# CONFIG_BLK_DEV_ATARAID_HPT is not set - -# -# Alternate 1394 support -# -# CONFIG_X1394 is not set - -# -# Alternate SCSI support -# -CONFIG_XSCSI=y - -# -# Alternate SCSI support -# -CONFIG_XSCSI_DKSC=y -# CONFIG_XSCSI_QLFC is not set -# CONFIG_XSCSI_QL is not set -# CONFIG_XSCSI_SBP2 is not set - -# -# SCSI support -# -CONFIG_SCSI=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -CONFIG_SD_EXTRA_DEVS=40 -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -# CONFIG_BLK_DEV_SR is not set -# CONFIG_CHR_DEV_SG is not set - -# -# Some SCSI devices (e.g. CD jukebox) support multiple LUNs -# -# CONFIG_SCSI_DEBUG_QUEUES is not set -# CONFIG_SCSI_MULTI_LUN is not set -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set - -# -# SCSI low-level drivers -# -# CONFIG_BLK_DEV_3W_XXXX_RAID is not set -# CONFIG_SCSI_7000FASST is not set -# CONFIG_SCSI_ACARD is not set -# CONFIG_SCSI_AHA152X is not set -# CONFIG_SCSI_AHA1542 is not set -# CONFIG_SCSI_AHA1740 is not set -# CONFIG_SCSI_AIC7XXX is not set -# CONFIG_SCSI_AIC7XXX_OLD is not set -# CONFIG_SCSI_DPT_I2O is not set -# CONFIG_SCSI_ADVANSYS is not set -# CONFIG_SCSI_IN2000 is not set -# CONFIG_SCSI_AM53C974 is not set -# CONFIG_SCSI_MEGARAID is not set -# CONFIG_SCSI_BUSLOGIC is not set -# CONFIG_SCSI_CPQFCTS is not set -# CONFIG_SCSI_DMX3191D is not set -# CONFIG_SCSI_DTC3280 is not set -# CONFIG_SCSI_EATA is not set -# CONFIG_SCSI_EATA_DMA is not set -# CONFIG_SCSI_EATA_PIO is not set -# CONFIG_SCSI_FUTURE_DOMAIN is not set -# CONFIG_SCSI_GDTH is not set -# CONFIG_SCSI_GENERIC_NCR5380 is not set -# CONFIG_SCSI_INITIO is not set -# CONFIG_SCSI_INIA100 is not set -# CONFIG_SCSI_NCR53C406A is not set -# CONFIG_SCSI_NCR53C7xx is not set -# CONFIG_SCSI_NCR53C8XX is not set -# CONFIG_SCSI_SYM53C8XX is not set -# CONFIG_SCSI_PAS16 is not set -# CONFIG_SCSI_PCI2000 is not set -# CONFIG_SCSI_PCI2220I is not set -# CONFIG_SCSI_PSI240I is not set -# CONFIG_SCSI_QLOGIC_FAS is not set -# CONFIG_SCSI_QLOGIC_ISP is not set -CONFIG_SCSI_QLOGIC_FC=y -# CONFIG_SCSI_QLOGIC_FC_FIRMWARE is not set -# CONFIG_SCSI_QLOGIC_1280 is not set -# CONFIG_SCSI_QLOGIC_QLA2100 is not set -# CONFIG_SCSI_SIM710 is not set -# CONFIG_SCSI_SYM53C416 is not set -# CONFIG_SCSI_DC390T is not set -# CONFIG_SCSI_T128 is not set -# CONFIG_SCSI_U14_34F is not set -# CONFIG_SCSI_DEBUG is not set - -# -# Network device support -# -CONFIG_NETDEVICES=y - -# -# ARCnet devices -# -# CONFIG_ARCNET is not set -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set -# CONFIG_ETHERTAP is not set - -# -# Ethernet (10 or 100Mbit) -# -CONFIG_NET_ETHERNET=y -CONFIG_SGI_IOC3_ETH=y -# CONFIG_SUNLANCE is not set -# CONFIG_HAPPYMEAL is not set -# CONFIG_SUNBMAC is not set -# CONFIG_SUNQE is not set -# CONFIG_SUNLANCE is not set -# CONFIG_SUNGEM is not set -# CONFIG_NET_VENDOR_3COM is not set -# CONFIG_LANCE is not set -# CONFIG_NET_VENDOR_SMC is not set -# CONFIG_NET_VENDOR_RACAL is not set -# CONFIG_HP100 is not set -# CONFIG_NET_ISA is not set -# CONFIG_NET_PCI is not set -# CONFIG_NET_POCKET is not set - -# -# Ethernet (1000 Mbit) -# -# CONFIG_ACENIC is not set -# CONFIG_DL2K is not set -# CONFIG_MYRI_SBUS is not set -# CONFIG_NS83820 is not set -# CONFIG_HAMACHI is not set -# CONFIG_YELLOWFIN is not set -# CONFIG_SK98LIN is not set -# CONFIG_FDDI is not set -# CONFIG_HIPPI is not set -# CONFIG_PLIP is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set - -# -# Wireless LAN (non-hamradio) -# -# CONFIG_NET_RADIO is not set - -# -# Token Ring devices -# -# CONFIG_TR is not set -# CONFIG_NET_FC is not set -# CONFIG_RCPCI is not set -# CONFIG_SHAPER is not set - -# -# Wan interfaces -# -# CONFIG_WAN is not set - -# -# Amateur Radio support -# -# CONFIG_HAMRADIO is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# CD-ROM drivers (not for SCSI or IDE/ATAPI drives) -# -# CONFIG_CD_NO_IDESCSI is not set - -# -# Input core support -# -# CONFIG_INPUT is not set -# CONFIG_INPUT_KEYBDEV is not set -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_EVDEV is not set - -# -# Character devices -# -# CONFIG_VT is not set -CONFIG_SERIAL=y -# CONFIG_SERIAL_CONSOLE is not set -# CONFIG_SERIAL_EXTENDED is not set -# CONFIG_SERIAL_NONSTANDARD is not set -CONFIG_UNIX98_PTYS=y -CONFIG_UNIX98_PTY_COUNT=256 - -# -# I2C support -# -# CONFIG_I2C is not set - -# -# Mice -# -# CONFIG_BUSMOUSE is not set -# CONFIG_MOUSE is not set - -# -# Joysticks -# -# CONFIG_INPUT_GAMEPORT is not set - -# -# Input core support is needed for gameports -# - -# -# Input core support is needed for joysticks -# -# CONFIG_QIC02_TAPE is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_INTEL_RNG is not set -# CONFIG_NVRAM is not set -# CONFIG_RTC is not set -CONFIG_EFI_RTC=y -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_FTAPE is not set -# CONFIG_AGP is not set -# CONFIG_DRM is not set -# CONFIG_MWAVE is not set - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# File systems -# -CONFIG_QUOTA=y -CONFIG_AUTOFS_FS=y -CONFIG_AUTOFS4_FS=y -# CONFIG_REISERFS_FS is not set -# CONFIG_REISERFS_CHECK is not set -# CONFIG_ADFS_FS is not set -# CONFIG_ADFS_FS_RW is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_BFS_FS is not set -CONFIG_FAT_FS=y -CONFIG_MSDOS_FS=y -# CONFIG_UMSDOS_FS is not set -CONFIG_VFAT_FS=y -# CONFIG_EFS_FS is not set -# CONFIG_JFFS_FS is not set -# CONFIG_JFFS2_FS is not set -# CONFIG_CRAMFS is not set -CONFIG_TMPFS=y -# CONFIG_RAMFS is not set -CONFIG_ISO9660_FS=y -# CONFIG_JOLIET is not set -# CONFIG_MINIX_FS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_NTFS_FS is not set -# CONFIG_NTFS_DEBUG is not set -# CONFIG_NTFS_RW is not set -# CONFIG_HPFS_FS is not set -CONFIG_PROC_FS=y -CONFIG_DEVFS_FS=y -CONFIG_DEVFS_MOUNT=y -CONFIG_DEVFS_DEBUG=y -CONFIG_DEVPTS_FS=y -# CONFIG_QNX4FS_FS is not set -# CONFIG_QNX4FS_RW is not set -# CONFIG_ROMFS_FS is not set -CONFIG_EXT2_FS=y -# CONFIG_SYSV_FS is not set -# CONFIG_UDF_FS is not set -# CONFIG_UDF_RW is not set -# CONFIG_UFS_FS is not set -# CONFIG_UFS_FS_WRITE is not set -CONFIG_XFS_SUPPORT=y - -# -# Network File Systems -# -# CONFIG_CODA_FS is not set -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -# CONFIG_ROOT_NFS is not set -CONFIG_NFSD=y -CONFIG_NFSD_V3=y -CONFIG_SUNRPC=y -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -# CONFIG_SMB_FS is not set -# CONFIG_NCP_FS is not set -# CONFIG_NCPFS_PACKET_SIGNING is not set -# CONFIG_NCPFS_IOCTL_LOCKING is not set -# CONFIG_NCPFS_STRONG is not set -# CONFIG_NCPFS_NFS_NS is not set -# CONFIG_NCPFS_OS2_NS is not set -# CONFIG_NCPFS_SMALLDOS is not set -# CONFIG_NCPFS_NLS is not set -# CONFIG_NCPFS_EXTRAS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y -# CONFIG_SMB_NLS is not set -CONFIG_NLS=y - -# -# Native Language Support -# -CONFIG_NLS_DEFAULT="n" -# CONFIG_NLS_CODEPAGE_437 is not set -# CONFIG_NLS_CODEPAGE_737 is not set -# CONFIG_NLS_CODEPAGE_775 is not set -# CONFIG_NLS_CODEPAGE_850 is not set -# CONFIG_NLS_CODEPAGE_852 is not set -# CONFIG_NLS_CODEPAGE_855 is not set -# CONFIG_NLS_CODEPAGE_857 is not set -# CONFIG_NLS_CODEPAGE_860 is not set -# CONFIG_NLS_CODEPAGE_861 is not set -# CONFIG_NLS_CODEPAGE_862 is not set -# CONFIG_NLS_CODEPAGE_863 is not set -# CONFIG_NLS_CODEPAGE_864 is not set -# CONFIG_NLS_CODEPAGE_865 is not set -# CONFIG_NLS_CODEPAGE_866 is not set -# CONFIG_NLS_CODEPAGE_869 is not set -# CONFIG_NLS_CODEPAGE_936 is not set -# CONFIG_NLS_CODEPAGE_950 is not set -# CONFIG_NLS_CODEPAGE_932 is not set -# CONFIG_NLS_CODEPAGE_949 is not set -# CONFIG_NLS_CODEPAGE_874 is not set -# CONFIG_NLS_ISO8859_8 is not set -# CONFIG_NLS_CODEPAGE_1251 is not set -# CONFIG_NLS_ISO8859_1 is not set -# CONFIG_NLS_ISO8859_2 is not set -# CONFIG_NLS_ISO8859_3 is not set -# CONFIG_NLS_ISO8859_4 is not set -# CONFIG_NLS_ISO8859_5 is not set -# CONFIG_NLS_ISO8859_6 is not set -# CONFIG_NLS_ISO8859_7 is not set -# CONFIG_NLS_ISO8859_9 is not set -# CONFIG_NLS_ISO8859_13 is not set -# CONFIG_NLS_ISO8859_14 is not set -# CONFIG_NLS_ISO8859_15 is not set -# CONFIG_NLS_KOI8_R is not set -# CONFIG_NLS_KOI8_U is not set -# CONFIG_NLS_UTF8 is not set - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# -# CONFIG_USB is not set - -# -# USB Controllers -# -# CONFIG_USB_UHCI is not set -# CONFIG_USB_UHCI_ALT is not set -# CONFIG_USB_OHCI is not set - -# -# USB Device Class drivers -# -# CONFIG_USB_AUDIO is not set -# CONFIG_USB_BLUETOOTH is not set -# CONFIG_USB_STORAGE is not set -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_DPCM is not set -# CONFIG_USB_STORAGE_HP8200e is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_ACM is not set -# CONFIG_USB_PRINTER is not set - -# -# USB Human Interface Devices (HID) -# - -# -# Input core support is needed for USB HID -# - -# -# USB Imaging devices -# -# CONFIG_USB_DC2XX is not set -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_SCANNER is not set -# CONFIG_USB_MICROTEK is not set -# CONFIG_USB_HPUSBSCSI is not set - -# -# USB Multimedia devices -# - -# -# Video4Linux support is needed for USB Multimedia device support -# - -# -# USB Network adaptors -# -# CONFIG_USB_PEGASUS is not set -# CONFIG_USB_KAWETH is not set -# CONFIG_USB_CATC is not set -# CONFIG_USB_CDCETHER is not set -# CONFIG_USB_USBNET is not set - -# -# USB port drivers -# -# CONFIG_USB_USS720 is not set - -# -# USB Serial Converter support -# -# CONFIG_USB_SERIAL is not set -# CONFIG_USB_SERIAL_GENERIC is not set -# CONFIG_USB_SERIAL_BELKIN is not set -# CONFIG_USB_SERIAL_WHITEHEAT is not set -# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set -# CONFIG_USB_SERIAL_EMPEG is not set -# CONFIG_USB_SERIAL_FTDI_SIO is not set -# CONFIG_USB_SERIAL_VISOR is not set -# CONFIG_USB_SERIAL_IR is not set -# CONFIG_USB_SERIAL_EDGEPORT is not set -# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set -# CONFIG_USB_SERIAL_KEYSPAN is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set -# CONFIG_USB_SERIAL_MCT_U232 is not set -# CONFIG_USB_SERIAL_PL2303 is not set -# CONFIG_USB_SERIAL_CYBERJACK is not set -# CONFIG_USB_SERIAL_XIRCOM is not set -# CONFIG_USB_SERIAL_OMNINET is not set - -# -# USB Miscellaneous drivers -# -# CONFIG_USB_RIO500 is not set - -# -# IEEE 1394 (FireWire) support (EXPERIMENTAL) -# -# CONFIG_IEEE1394 is not set - -# -# Bluetooth support -# -# CONFIG_BT is not set - -# -# Kernel hacking -# -CONFIG_DEBUG_KERNEL=y -CONFIG_IA64_PRINT_HAZARDS=y -# CONFIG_DISABLE_VHPT is not set -CONFIG_MAGIC_SYSRQ=y -CONFIG_IA64_EARLY_PRINTK=y -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_IA64_DEBUG_CMPXCHG is not set -# CONFIG_IA64_DEBUG_IRQ is not set -CONFIG_KDB=y -CONFIG_KDB_MODULES=y -# CONFIG_KDB_OFF is not set - -# -# Load all symbols for debugging is required for KDB -# -CONFIG_KALLSYMS=y diff -Nru a/arch/ia64/sn/configs/sn1/defconfig-sn1-sp b/arch/ia64/sn/configs/sn1/defconfig-sn1-sp --- a/arch/ia64/sn/configs/sn1/defconfig-sn1-sp Mon Dec 23 21:21:50 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,726 +0,0 @@ -# -# Automatically generated make config: don't edit -# - -# -# Code maturity level options -# -CONFIG_EXPERIMENTAL=y - -# -# Loadable module support -# -# CONFIG_MODULES is not set - -# -# General setup -# -CONFIG_IA64=y -# CONFIG_ISA is not set -# CONFIG_EISA is not set -# CONFIG_MCA is not set -# CONFIG_SBUS is not set -CONFIG_RWSEM_GENERIC_SPINLOCK=y -# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set -CONFIG_ACPI=y -CONFIG_ACPI_EFI=y -CONFIG_ACPI_INTERPRETER=y -CONFIG_ACPI_KERNEL_CONFIG=y -CONFIG_ITANIUM=y -# CONFIG_MCKINLEY is not set -# CONFIG_IA64_GENERIC is not set -# CONFIG_IA64_DIG is not set -# CONFIG_IA64_HP_SIM is not set -CONFIG_IA64_SGI_SN1=y -# CONFIG_IA64_SGI_SN2 is not set -# CONFIG_IA64_PAGE_SIZE_4KB is not set -# CONFIG_IA64_PAGE_SIZE_8KB is not set -CONFIG_IA64_PAGE_SIZE_16KB=y -# CONFIG_IA64_PAGE_SIZE_64KB is not set -CONFIG_IA64_BRL_EMU=y -CONFIG_ITANIUM_BSTEP_SPECIFIC=y -CONFIG_IA64_L1_CACHE_SHIFT=7 -CONFIG_IA64_SGI_SN=y -CONFIG_IA64_SGI_SN_DEBUG=y -CONFIG_IA64_SGI_SN_SIM=y -CONFIG_IA64_SGI_AUTOTEST=y -CONFIG_DEVFS_FS=y -CONFIG_DEVFS_DEBUG=y -CONFIG_SERIAL_SGI_L1_PROTOCOL=y -CONFIG_DISCONTIGMEM=y -CONFIG_IA64_MCA=y -CONFIG_NUMA=y -CONFIG_PERCPU_IRQ=y -CONFIG_PCIBA=y -CONFIG_KCORE_ELF=y -# CONFIG_SMP is not set -CONFIG_IA32_SUPPORT=y -CONFIG_PERFMON=y -CONFIG_IA64_PALINFO=y -# CONFIG_EFI_VARS is not set -CONFIG_NET=y -CONFIG_SYSVIPC=y -# CONFIG_BSD_PROCESS_ACCT is not set -CONFIG_SYSCTL=y -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set -# CONFIG_ACPI_DEBUG is not set -# CONFIG_ACPI_BUSMGR is not set -# CONFIG_ACPI_SYS is not set -# CONFIG_ACPI_CPU is not set -# CONFIG_ACPI_BUTTON is not set -# CONFIG_ACPI_AC is not set -# CONFIG_ACPI_EC is not set -# CONFIG_ACPI_CMBATT is not set -# CONFIG_ACPI_THERMAL is not set -CONFIG_PCI=y -# CONFIG_PCI_NAMES is not set -# CONFIG_HOTPLUG is not set -# CONFIG_PCMCIA is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Networking options -# -CONFIG_PACKET=y -# CONFIG_PACKET_MMAP is not set -CONFIG_NETLINK=y -CONFIG_RTNETLINK=y -CONFIG_NETLINK_DEV=y -CONFIG_NETFILTER=y -CONFIG_NETFILTER_DEBUG=y -CONFIG_FILTER=y -CONFIG_UNIX=y -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -# CONFIG_IP_ADVANCED_ROUTER is not set -# CONFIG_IP_PNP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_IP_MROUTE is not set -# CONFIG_ARPD is not set -# CONFIG_INET_ECN is not set -CONFIG_SYN_COOKIES=y - -# -# IP: Netfilter Configuration -# -# CONFIG_IP_NF_CONNTRACK is not set -# CONFIG_IP_NF_QUEUE is not set -# CONFIG_IP_NF_IPTABLES is not set -# CONFIG_IP_NF_COMPAT_IPCHAINS is not set -# CONFIG_IP_NF_COMPAT_IPFWADM is not set -# CONFIG_IPV6 is not set -# CONFIG_KHTTPD is not set -# CONFIG_ATM is not set - -# -# -# -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_DECNET is not set -# CONFIG_BRIDGE is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_LLC is not set -# CONFIG_NET_DIVERT is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_NET_FASTROUTE is not set -# CONFIG_NET_HW_FLOWCONTROL is not set - -# -# QoS and/or fair queueing -# -# CONFIG_NET_SCHED is not set - -# -# Memory Technology Devices (MTD) -# -# CONFIG_MTD is not set - -# -# Plug and Play configuration -# -# CONFIG_PNP is not set -# CONFIG_ISAPNP is not set -# CONFIG_PNPBIOS is not set - -# -# Block devices -# -# CONFIG_BLK_DEV_FD is not set -# CONFIG_BLK_DEV_XD is not set -# CONFIG_PARIDE is not set -# CONFIG_BLK_CPQ_DA is not set -# CONFIG_BLK_CPQ_CISS_DA is not set -# CONFIG_BLK_DEV_DAC960 is not set -CONFIG_BLK_DEV_LOOP=y -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_RAM is not set -# CONFIG_BLK_DEV_INITRD is not set - -# -# I2O device support -# -# CONFIG_I2O is not set -# CONFIG_I2O_PCI is not set -# CONFIG_I2O_BLOCK is not set -# CONFIG_I2O_LAN is not set -# CONFIG_I2O_SCSI is not set -# CONFIG_I2O_PROC is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set -# CONFIG_BLK_DEV_MD is not set -# CONFIG_MD_LINEAR is not set -# CONFIG_MD_RAID0 is not set -# CONFIG_MD_RAID1 is not set -# CONFIG_MD_RAID5 is not set -# CONFIG_MD_MULTIPATH is not set -# CONFIG_BLK_DEV_LVM is not set - -# -# ATA/IDE/MFM/RLL support -# -CONFIG_IDE=y - -# -# IDE, ATA and ATAPI Block devices -# -CONFIG_BLK_DEV_IDE=y - -# -# Please see Documentation/ide.txt for help/info on IDE drives -# -# CONFIG_BLK_DEV_HD_IDE is not set -# CONFIG_BLK_DEV_HD is not set -CONFIG_BLK_DEV_IDEDISK=y -# CONFIG_IDEDISK_MULTI_MODE is not set -# CONFIG_BLK_DEV_IDECS is not set -# CONFIG_BLK_DEV_IDECD is not set -# CONFIG_BLK_DEV_IDETAPE is not set -# CONFIG_BLK_DEV_IDEFLOPPY is not set -# CONFIG_BLK_DEV_IDESCSI is not set - -# -# IDE chipset support/bugfixes -# -# CONFIG_BLK_DEV_CMD640 is not set -# CONFIG_BLK_DEV_CMD640_ENHANCED is not set -# CONFIG_BLK_DEV_ISAPNP is not set -# CONFIG_BLK_DEV_RZ1000 is not set -# CONFIG_IDE_CHIPSETS is not set -# CONFIG_IDEDMA_AUTO is not set -# CONFIG_BLK_DEV_IDE_MODES is not set -# CONFIG_BLK_DEV_ATARAID is not set -# CONFIG_BLK_DEV_ATARAID_PDC is not set -# CONFIG_BLK_DEV_ATARAID_HPT is not set - -# -# Alternate 1394 support -# -# CONFIG_X1394 is not set - -# -# Alternate SCSI support -# -CONFIG_XSCSI=y - -# -# Alternate SCSI support -# -CONFIG_XSCSI_DKSC=y -# CONFIG_XSCSI_QLFC is not set -# CONFIG_XSCSI_QL is not set -# CONFIG_XSCSI_SBP2 is not set - -# -# SCSI support -# -CONFIG_SCSI=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -CONFIG_SD_EXTRA_DEVS=40 -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -# CONFIG_BLK_DEV_SR is not set -# CONFIG_CHR_DEV_SG is not set - -# -# Some SCSI devices (e.g. CD jukebox) support multiple LUNs -# -# CONFIG_SCSI_DEBUG_QUEUES is not set -# CONFIG_SCSI_MULTI_LUN is not set -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set - -# -# SCSI low-level drivers -# -# CONFIG_BLK_DEV_3W_XXXX_RAID is not set -# CONFIG_SCSI_7000FASST is not set -# CONFIG_SCSI_ACARD is not set -# CONFIG_SCSI_AHA152X is not set -# CONFIG_SCSI_AHA1542 is not set -# CONFIG_SCSI_AHA1740 is not set -# CONFIG_SCSI_AIC7XXX is not set -# CONFIG_SCSI_AIC7XXX_OLD is not set -# CONFIG_SCSI_DPT_I2O is not set -# CONFIG_SCSI_ADVANSYS is not set -# CONFIG_SCSI_IN2000 is not set -# CONFIG_SCSI_AM53C974 is not set -# CONFIG_SCSI_MEGARAID is not set -# CONFIG_SCSI_BUSLOGIC is not set -# CONFIG_SCSI_CPQFCTS is not set -# CONFIG_SCSI_DMX3191D is not set -# CONFIG_SCSI_DTC3280 is not set -# CONFIG_SCSI_EATA is not set -# CONFIG_SCSI_EATA_DMA is not set -# CONFIG_SCSI_EATA_PIO is not set -# CONFIG_SCSI_FUTURE_DOMAIN is not set -# CONFIG_SCSI_GDTH is not set -# CONFIG_SCSI_GENERIC_NCR5380 is not set -# CONFIG_SCSI_INITIO is not set -# CONFIG_SCSI_INIA100 is not set -# CONFIG_SCSI_NCR53C406A is not set -# CONFIG_SCSI_NCR53C7xx is not set -# CONFIG_SCSI_NCR53C8XX is not set -# CONFIG_SCSI_SYM53C8XX is not set -# CONFIG_SCSI_PAS16 is not set -# CONFIG_SCSI_PCI2000 is not set -# CONFIG_SCSI_PCI2220I is not set -# CONFIG_SCSI_PSI240I is not set -# CONFIG_SCSI_QLOGIC_FAS is not set -# CONFIG_SCSI_QLOGIC_ISP is not set -CONFIG_SCSI_QLOGIC_FC=y -# CONFIG_SCSI_QLOGIC_FC_FIRMWARE is not set -# CONFIG_SCSI_QLOGIC_1280 is not set -# CONFIG_SCSI_QLOGIC_QLA2100 is not set -# CONFIG_SCSI_SIM710 is not set -# CONFIG_SCSI_SYM53C416 is not set -# CONFIG_SCSI_DC390T is not set -# CONFIG_SCSI_T128 is not set -# CONFIG_SCSI_U14_34F is not set -# CONFIG_SCSI_DEBUG is not set - -# -# Network device support -# -CONFIG_NETDEVICES=y - -# -# ARCnet devices -# -# CONFIG_ARCNET is not set -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set -# CONFIG_ETHERTAP is not set - -# -# Ethernet (10 or 100Mbit) -# -CONFIG_NET_ETHERNET=y -CONFIG_SGI_IOC3_ETH=y -# CONFIG_SUNLANCE is not set -# CONFIG_HAPPYMEAL is not set -# CONFIG_SUNBMAC is not set -# CONFIG_SUNQE is not set -# CONFIG_SUNLANCE is not set -# CONFIG_SUNGEM is not set -# CONFIG_NET_VENDOR_3COM is not set -# CONFIG_LANCE is not set -# CONFIG_NET_VENDOR_SMC is not set -# CONFIG_NET_VENDOR_RACAL is not set -# CONFIG_HP100 is not set -# CONFIG_NET_ISA is not set -# CONFIG_NET_PCI is not set -# CONFIG_NET_POCKET is not set - -# -# Ethernet (1000 Mbit) -# -# CONFIG_ACENIC is not set -# CONFIG_DL2K is not set -# CONFIG_MYRI_SBUS is not set -# CONFIG_NS83820 is not set -# CONFIG_HAMACHI is not set -# CONFIG_YELLOWFIN is not set -# CONFIG_SK98LIN is not set -# CONFIG_FDDI is not set -# CONFIG_HIPPI is not set -# CONFIG_PLIP is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set - -# -# Wireless LAN (non-hamradio) -# -# CONFIG_NET_RADIO is not set - -# -# Token Ring devices -# -# CONFIG_TR is not set -# CONFIG_NET_FC is not set -# CONFIG_RCPCI is not set -# CONFIG_SHAPER is not set - -# -# Wan interfaces -# -# CONFIG_WAN is not set - -# -# Amateur Radio support -# -# CONFIG_HAMRADIO is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# CD-ROM drivers (not for SCSI or IDE/ATAPI drives) -# -# CONFIG_CD_NO_IDESCSI is not set - -# -# Input core support -# -# CONFIG_INPUT is not set -# CONFIG_INPUT_KEYBDEV is not set -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_EVDEV is not set - -# -# Character devices -# -# CONFIG_VT is not set -CONFIG_SERIAL=y -# CONFIG_SERIAL_CONSOLE is not set -# CONFIG_SERIAL_EXTENDED is not set -# CONFIG_SERIAL_NONSTANDARD is not set -CONFIG_UNIX98_PTYS=y -CONFIG_UNIX98_PTY_COUNT=256 - -# -# I2C support -# -# CONFIG_I2C is not set - -# -# Mice -# -# CONFIG_BUSMOUSE is not set -# CONFIG_MOUSE is not set - -# -# Joysticks -# -# CONFIG_INPUT_GAMEPORT is not set - -# -# Input core support is needed for gameports -# - -# -# Input core support is needed for joysticks -# -# CONFIG_QIC02_TAPE is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_INTEL_RNG is not set -# CONFIG_NVRAM is not set -# CONFIG_RTC is not set -CONFIG_EFI_RTC=y -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_FTAPE is not set -# CONFIG_AGP is not set -# CONFIG_DRM is not set -# CONFIG_MWAVE is not set - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# File systems -# -CONFIG_QUOTA=y -CONFIG_AUTOFS_FS=y -CONFIG_AUTOFS4_FS=y -# CONFIG_REISERFS_FS is not set -# CONFIG_REISERFS_CHECK is not set -# CONFIG_ADFS_FS is not set -# CONFIG_ADFS_FS_RW is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_BFS_FS is not set -CONFIG_FAT_FS=y -CONFIG_MSDOS_FS=y -# CONFIG_UMSDOS_FS is not set -CONFIG_VFAT_FS=y -# CONFIG_EFS_FS is not set -# CONFIG_JFFS_FS is not set -# CONFIG_JFFS2_FS is not set -# CONFIG_CRAMFS is not set -CONFIG_TMPFS=y -# CONFIG_RAMFS is not set -CONFIG_ISO9660_FS=y -# CONFIG_JOLIET is not set -# CONFIG_MINIX_FS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_NTFS_FS is not set -# CONFIG_NTFS_DEBUG is not set -# CONFIG_NTFS_RW is not set -# CONFIG_HPFS_FS is not set -CONFIG_PROC_FS=y -CONFIG_DEVFS_FS=y -CONFIG_DEVFS_MOUNT=y -CONFIG_DEVFS_DEBUG=y -CONFIG_DEVPTS_FS=y -# CONFIG_QNX4FS_FS is not set -# CONFIG_QNX4FS_RW is not set -# CONFIG_ROMFS_FS is not set -CONFIG_EXT2_FS=y -# CONFIG_SYSV_FS is not set -# CONFIG_UDF_FS is not set -# CONFIG_UDF_RW is not set -# CONFIG_UFS_FS is not set -# CONFIG_UFS_FS_WRITE is not set -CONFIG_XFS_SUPPORT=y - -# -# Network File Systems -# -# CONFIG_CODA_FS is not set -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -# CONFIG_ROOT_NFS is not set -CONFIG_NFSD=y -CONFIG_NFSD_V3=y -CONFIG_SUNRPC=y -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -# CONFIG_SMB_FS is not set -# CONFIG_NCP_FS is not set -# CONFIG_NCPFS_PACKET_SIGNING is not set -# CONFIG_NCPFS_IOCTL_LOCKING is not set -# CONFIG_NCPFS_STRONG is not set -# CONFIG_NCPFS_NFS_NS is not set -# CONFIG_NCPFS_OS2_NS is not set -# CONFIG_NCPFS_SMALLDOS is not set -# CONFIG_NCPFS_NLS is not set -# CONFIG_NCPFS_EXTRAS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y -# CONFIG_SMB_NLS is not set -CONFIG_NLS=y - -# -# Native Language Support -# -CONFIG_NLS_DEFAULT="n" -# CONFIG_NLS_CODEPAGE_437 is not set -# CONFIG_NLS_CODEPAGE_737 is not set -# CONFIG_NLS_CODEPAGE_775 is not set -# CONFIG_NLS_CODEPAGE_850 is not set -# CONFIG_NLS_CODEPAGE_852 is not set -# CONFIG_NLS_CODEPAGE_855 is not set -# CONFIG_NLS_CODEPAGE_857 is not set -# CONFIG_NLS_CODEPAGE_860 is not set -# CONFIG_NLS_CODEPAGE_861 is not set -# CONFIG_NLS_CODEPAGE_862 is not set -# CONFIG_NLS_CODEPAGE_863 is not set -# CONFIG_NLS_CODEPAGE_864 is not set -# CONFIG_NLS_CODEPAGE_865 is not set -# CONFIG_NLS_CODEPAGE_866 is not set -# CONFIG_NLS_CODEPAGE_869 is not set -# CONFIG_NLS_CODEPAGE_936 is not set -# CONFIG_NLS_CODEPAGE_950 is not set -# CONFIG_NLS_CODEPAGE_932 is not set -# CONFIG_NLS_CODEPAGE_949 is not set -# CONFIG_NLS_CODEPAGE_874 is not set -# CONFIG_NLS_ISO8859_8 is not set -# CONFIG_NLS_CODEPAGE_1251 is not set -# CONFIG_NLS_ISO8859_1 is not set -# CONFIG_NLS_ISO8859_2 is not set -# CONFIG_NLS_ISO8859_3 is not set -# CONFIG_NLS_ISO8859_4 is not set -# CONFIG_NLS_ISO8859_5 is not set -# CONFIG_NLS_ISO8859_6 is not set -# CONFIG_NLS_ISO8859_7 is not set -# CONFIG_NLS_ISO8859_9 is not set -# CONFIG_NLS_ISO8859_13 is not set -# CONFIG_NLS_ISO8859_14 is not set -# CONFIG_NLS_ISO8859_15 is not set -# CONFIG_NLS_KOI8_R is not set -# CONFIG_NLS_KOI8_U is not set -# CONFIG_NLS_UTF8 is not set - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# -# CONFIG_USB is not set - -# -# USB Controllers -# -# CONFIG_USB_UHCI is not set -# CONFIG_USB_UHCI_ALT is not set -# CONFIG_USB_OHCI is not set - -# -# USB Device Class drivers -# -# CONFIG_USB_AUDIO is not set -# CONFIG_USB_BLUETOOTH is not set -# CONFIG_USB_STORAGE is not set -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_DPCM is not set -# CONFIG_USB_STORAGE_HP8200e is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_ACM is not set -# CONFIG_USB_PRINTER is not set - -# -# USB Human Interface Devices (HID) -# - -# -# Input core support is needed for USB HID -# - -# -# USB Imaging devices -# -# CONFIG_USB_DC2XX is not set -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_SCANNER is not set -# CONFIG_USB_MICROTEK is not set -# CONFIG_USB_HPUSBSCSI is not set - -# -# USB Multimedia devices -# - -# -# Video4Linux support is needed for USB Multimedia device support -# - -# -# USB Network adaptors -# -# CONFIG_USB_PEGASUS is not set -# CONFIG_USB_KAWETH is not set -# CONFIG_USB_CATC is not set -# CONFIG_USB_CDCETHER is not set -# CONFIG_USB_USBNET is not set - -# -# USB port drivers -# -# CONFIG_USB_USS720 is not set - -# -# USB Serial Converter support -# -# CONFIG_USB_SERIAL is not set -# CONFIG_USB_SERIAL_GENERIC is not set -# CONFIG_USB_SERIAL_BELKIN is not set -# CONFIG_USB_SERIAL_WHITEHEAT is not set -# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set -# CONFIG_USB_SERIAL_EMPEG is not set -# CONFIG_USB_SERIAL_FTDI_SIO is not set -# CONFIG_USB_SERIAL_VISOR is not set -# CONFIG_USB_SERIAL_IR is not set -# CONFIG_USB_SERIAL_EDGEPORT is not set -# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set -# CONFIG_USB_SERIAL_KEYSPAN is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set -# CONFIG_USB_SERIAL_MCT_U232 is not set -# CONFIG_USB_SERIAL_PL2303 is not set -# CONFIG_USB_SERIAL_CYBERJACK is not set -# CONFIG_USB_SERIAL_XIRCOM is not set -# CONFIG_USB_SERIAL_OMNINET is not set - -# -# USB Miscellaneous drivers -# -# CONFIG_USB_RIO500 is not set - -# -# IEEE 1394 (FireWire) support (EXPERIMENTAL) -# -# CONFIG_IEEE1394 is not set - -# -# Bluetooth support -# -# CONFIG_BT is not set - -# -# Kernel hacking -# -CONFIG_DEBUG_KERNEL=y -CONFIG_IA64_PRINT_HAZARDS=y -# CONFIG_DISABLE_VHPT is not set -CONFIG_MAGIC_SYSRQ=y -CONFIG_IA64_EARLY_PRINTK=y -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_IA64_DEBUG_CMPXCHG is not set -# CONFIG_IA64_DEBUG_IRQ is not set -CONFIG_KDB=y -CONFIG_KDB_MODULES=y -# CONFIG_KDB_OFF is not set - -# -# Load all symbols for debugging is required for KDB -# -CONFIG_KALLSYMS=y diff -Nru a/arch/ia64/sn/configs/sn2/defconfig-dig-numa b/arch/ia64/sn/configs/sn2/defconfig-dig-numa --- a/arch/ia64/sn/configs/sn2/defconfig-dig-numa Mon Dec 23 21:21:51 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,450 +0,0 @@ -# -# Automatically generated make config: don't edit -# - -# -# Code maturity level options -# -# CONFIG_EXPERIMENTAL is not set - -# -# Loadable module support -# -# CONFIG_MODULES is not set - -# -# General setup -# -CONFIG_IA64=y -# CONFIG_ISA is not set -# CONFIG_EISA is not set -# CONFIG_MCA is not set -# CONFIG_SBUS is not set -CONFIG_RWSEM_GENERIC_SPINLOCK=y -# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set -CONFIG_ACPI=y -CONFIG_ACPI_EFI=y -CONFIG_ACPI_INTERPRETER=y -CONFIG_ACPI_KERNEL_CONFIG=y -CONFIG_ITANIUM=y -# CONFIG_MCKINLEY is not set -# CONFIG_IA64_GENERIC is not set -CONFIG_IA64_DIG=y -# CONFIG_IA64_HP_SIM is not set -# CONFIG_IA64_SGI_SN1 is not set -# CONFIG_IA64_SGI_SN2 is not set -# CONFIG_IA64_PAGE_SIZE_4KB is not set -# CONFIG_IA64_PAGE_SIZE_8KB is not set -CONFIG_IA64_PAGE_SIZE_16KB=y -# CONFIG_IA64_PAGE_SIZE_64KB is not set -CONFIG_IA64_BRL_EMU=y -CONFIG_ITANIUM_BSTEP_SPECIFIC=y -CONFIG_IA64_L1_CACHE_SHIFT=6 -CONFIG_NUMA=y -CONFIG_DISCONTIGMEM=y -# CONFIG_IA64_MCA is not set -CONFIG_PM=y -CONFIG_IA64_HAVE_SYNCRONIZED_ITC=y -# CONFIG_DEVFS_FS is not set -CONFIG_KCORE_ELF=y -CONFIG_SMP=y -# CONFIG_IA32_SUPPORT is not set -# CONFIG_PERFMON is not set -# CONFIG_IA64_PALINFO is not set -# CONFIG_EFI_VARS is not set -# CONFIG_NET is not set -CONFIG_SYSVIPC=y -# CONFIG_BSD_PROCESS_ACCT is not set -# CONFIG_SYSCTL is not set -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set -# CONFIG_ACPI_DEBUG is not set -# CONFIG_ACPI_BUSMGR is not set -# CONFIG_ACPI_SYS is not set -# CONFIG_ACPI_CPU is not set -# CONFIG_ACPI_BUTTON is not set -# CONFIG_ACPI_AC is not set -# CONFIG_ACPI_EC is not set -# CONFIG_ACPI_CMBATT is not set -# CONFIG_ACPI_THERMAL is not set -CONFIG_PCI=y -# CONFIG_PCI_NAMES is not set -# CONFIG_HOTPLUG is not set -# CONFIG_PCMCIA is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Memory Technology Devices (MTD) -# -# CONFIG_MTD is not set - -# -# Plug and Play configuration -# -# CONFIG_PNP is not set -# CONFIG_ISAPNP is not set - -# -# Block devices -# -# CONFIG_BLK_DEV_FD is not set -# CONFIG_BLK_DEV_XD is not set -# CONFIG_PARIDE is not set -# CONFIG_BLK_CPQ_DA is not set -# CONFIG_BLK_CPQ_CISS_DA is not set -# CONFIG_BLK_DEV_DAC960 is not set -# CONFIG_BLK_DEV_LOOP is not set -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_RAM is not set -# CONFIG_BLK_DEV_INITRD is not set - -# -# I2O device support -# -# CONFIG_I2O is not set -# CONFIG_I2O_PCI is not set -# CONFIG_I2O_BLOCK is not set -# CONFIG_I2O_SCSI is not set -# CONFIG_I2O_PROC is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set -# CONFIG_BLK_DEV_MD is not set -# CONFIG_MD_LINEAR is not set -# CONFIG_MD_RAID0 is not set -# CONFIG_MD_RAID1 is not set -# CONFIG_MD_RAID5 is not set -# CONFIG_MD_MULTIPATH is not set -# CONFIG_BLK_DEV_LVM is not set - -# -# ATA/IDE/MFM/RLL support -# -CONFIG_IDE=y - -# -# IDE, ATA and ATAPI Block devices -# -CONFIG_BLK_DEV_IDE=y - -# -# Please see Documentation/ide.txt for help/info on IDE drives -# -# CONFIG_BLK_DEV_HD_IDE is not set -# CONFIG_BLK_DEV_HD is not set -CONFIG_BLK_DEV_IDEDISK=y -# CONFIG_IDEDISK_MULTI_MODE is not set -# CONFIG_BLK_DEV_IDECS is not set -# CONFIG_BLK_DEV_IDECD is not set -# CONFIG_BLK_DEV_IDETAPE is not set -# CONFIG_BLK_DEV_IDEFLOPPY is not set -# CONFIG_BLK_DEV_IDESCSI is not set - -# -# IDE chipset support/bugfixes -# -# CONFIG_BLK_DEV_CMD640 is not set -# CONFIG_BLK_DEV_CMD640_ENHANCED is not set -# CONFIG_BLK_DEV_ISAPNP is not set -# CONFIG_BLK_DEV_RZ1000 is not set -# CONFIG_IDE_CHIPSETS is not set -# CONFIG_IDEDMA_AUTO is not set -# CONFIG_BLK_DEV_IDE_MODES is not set -# CONFIG_BLK_DEV_ATARAID is not set -# CONFIG_BLK_DEV_ATARAID_PDC is not set -# CONFIG_BLK_DEV_ATARAID_HPT is not set - -# -# Alternate 1394 support -# -# CONFIG_X1394 is not set - -# -# Alternate SCSI support -# -# CONFIG_XSCSI is not set - -# -# SCSI support -# -# CONFIG_SCSI is not set - -# -# Amateur Radio support -# -# CONFIG_HAMRADIO is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# CD-ROM drivers (not for SCSI or IDE/ATAPI drives) -# -# CONFIG_CD_NO_IDESCSI is not set - -# -# Input core support -# -# CONFIG_INPUT is not set -# CONFIG_INPUT_KEYBDEV is not set -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_EVDEV is not set - -# -# Character devices -# -CONFIG_VT=y -CONFIG_VT_CONSOLE=y -# CONFIG_SERIAL is not set -# CONFIG_SERIAL_EXTENDED is not set -# CONFIG_SERIAL_NONSTANDARD is not set -CONFIG_UNIX98_PTYS=y -CONFIG_UNIX98_PTY_COUNT=256 - -# -# I2C support -# -# CONFIG_I2C is not set - -# -# Mice -# -# CONFIG_BUSMOUSE is not set -# CONFIG_MOUSE is not set - -# -# Joysticks -# -# CONFIG_INPUT_GAMEPORT is not set - -# -# Input core support is needed for gameports -# - -# -# Input core support is needed for joysticks -# -# CONFIG_QIC02_TAPE is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_INTEL_RNG is not set -# CONFIG_NVRAM is not set -# CONFIG_RTC is not set -# CONFIG_EFI_RTC is not set -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_FTAPE is not set -# CONFIG_AGP is not set -# CONFIG_DRM is not set -# CONFIG_MWAVE is not set - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# File systems -# -# CONFIG_QUOTA is not set -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set -# CONFIG_REISERFS_FS is not set -# CONFIG_REISERFS_CHECK is not set -# CONFIG_ADFS_FS is not set -# CONFIG_ADFS_FS_RW is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_FAT_FS is not set -# CONFIG_MSDOS_FS is not set -# CONFIG_UMSDOS_FS is not set -# CONFIG_VFAT_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_JFFS_FS is not set -# CONFIG_JFFS2_FS is not set -# CONFIG_CRAMFS is not set -CONFIG_TMPFS=y -# CONFIG_RAMFS is not set -# CONFIG_ISO9660_FS is not set -# CONFIG_JOLIET is not set -# CONFIG_MINIX_FS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_NTFS_FS is not set -# CONFIG_NTFS_DEBUG is not set -# CONFIG_NTFS_RW is not set -# CONFIG_HPFS_FS is not set -CONFIG_PROC_FS=y -# CONFIG_DEVFS_FS is not set -# CONFIG_DEVFS_MOUNT is not set -# CONFIG_DEVFS_DEBUG is not set -CONFIG_DEVPTS_FS=y -# CONFIG_QNX4FS_FS is not set -# CONFIG_QNX4FS_RW is not set -# CONFIG_ROMFS_FS is not set -CONFIG_EXT2_FS=y -# CONFIG_SYSV_FS is not set -# CONFIG_UDF_FS is not set -# CONFIG_UDF_RW is not set -# CONFIG_UFS_FS is not set -# CONFIG_UFS_FS_WRITE is not set -# CONFIG_XFS_SUPPORT is not set -# CONFIG_NCPFS_NLS is not set -# CONFIG_SMB_FS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y -# CONFIG_SMB_NLS is not set -# CONFIG_NLS is not set - -# -# Console drivers -# -CONFIG_VGA_CONSOLE=y - -# -# Frame-buffer support -# -# CONFIG_FB is not set - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# -# CONFIG_USB is not set - -# -# USB Controllers -# -# CONFIG_USB_UHCI is not set -# CONFIG_USB_UHCI_ALT is not set -# CONFIG_USB_OHCI is not set - -# -# USB Device Class drivers -# -# CONFIG_USB_AUDIO is not set -# CONFIG_USB_BLUETOOTH is not set -# CONFIG_USB_STORAGE is not set -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_DPCM is not set -# CONFIG_USB_STORAGE_HP8200e is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_ACM is not set -# CONFIG_USB_PRINTER is not set - -# -# USB Human Interface Devices (HID) -# - -# -# Input core support is needed for USB HID -# - -# -# USB Imaging devices -# -# CONFIG_USB_DC2XX is not set -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_SCANNER is not set -# CONFIG_USB_MICROTEK is not set -# CONFIG_USB_HPUSBSCSI is not set - -# -# USB Multimedia devices -# - -# -# Video4Linux support is needed for USB Multimedia device support -# - -# -# USB Network adaptors -# - -# -# Networking support is needed for USB Networking device support -# - -# -# USB port drivers -# -# CONFIG_USB_USS720 is not set - -# -# USB Serial Converter support -# -# CONFIG_USB_SERIAL is not set -# CONFIG_USB_SERIAL_GENERIC is not set -# CONFIG_USB_SERIAL_BELKIN is not set -# CONFIG_USB_SERIAL_WHITEHEAT is not set -# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set -# CONFIG_USB_SERIAL_EMPEG is not set -# CONFIG_USB_SERIAL_FTDI_SIO is not set -# CONFIG_USB_SERIAL_VISOR is not set -# CONFIG_USB_SERIAL_IR is not set -# CONFIG_USB_SERIAL_EDGEPORT is not set -# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set -# CONFIG_USB_SERIAL_KEYSPAN is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set -# CONFIG_USB_SERIAL_MCT_U232 is not set -# CONFIG_USB_SERIAL_PL2303 is not set -# CONFIG_USB_SERIAL_CYBERJACK is not set -# CONFIG_USB_SERIAL_XIRCOM is not set -# CONFIG_USB_SERIAL_OMNINET is not set - -# -# USB Miscellaneous drivers -# -# CONFIG_USB_RIO500 is not set - -# -# Kernel hacking -# -CONFIG_DEBUG_KERNEL=y -CONFIG_IA64_PRINT_HAZARDS=y -# CONFIG_DISABLE_VHPT is not set -CONFIG_MAGIC_SYSRQ=y -CONFIG_IA64_EARLY_PRINTK=y -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_IA64_DEBUG_CMPXCHG is not set -# CONFIG_IA64_DEBUG_IRQ is not set -# CONFIG_KDB is not set -# CONFIG_KDB_MODULES is not set -# CONFIG_KALLSYMS is not set diff -Nru a/arch/ia64/sn/configs/sn2/defconfig-sn2-dig-mp b/arch/ia64/sn/configs/sn2/defconfig-sn2-dig-mp --- a/arch/ia64/sn/configs/sn2/defconfig-sn2-dig-mp Mon Dec 23 21:22:00 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,449 +0,0 @@ -# -# Automatically generated make config: don't edit -# - -# -# Code maturity level options -# -# CONFIG_EXPERIMENTAL is not set - -# -# Loadable module support -# -# CONFIG_MODULES is not set - -# -# General setup -# -CONFIG_IA64=y -# CONFIG_ISA is not set -# CONFIG_EISA is not set -# CONFIG_MCA is not set -# CONFIG_SBUS is not set -CONFIG_RWSEM_GENERIC_SPINLOCK=y -# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set -CONFIG_ACPI=y -CONFIG_ACPI_EFI=y -CONFIG_ACPI_INTERPRETER=y -CONFIG_ACPI_KERNEL_CONFIG=y -CONFIG_ITANIUM=y -# CONFIG_MCKINLEY is not set -# CONFIG_IA64_GENERIC is not set -CONFIG_IA64_DIG=y -# CONFIG_IA64_HP_SIM is not set -# CONFIG_IA64_SGI_SN1 is not set -# CONFIG_IA64_SGI_SN2 is not set -# CONFIG_IA64_PAGE_SIZE_4KB is not set -# CONFIG_IA64_PAGE_SIZE_8KB is not set -CONFIG_IA64_PAGE_SIZE_16KB=y -# CONFIG_IA64_PAGE_SIZE_64KB is not set -CONFIG_IA64_BRL_EMU=y -CONFIG_ITANIUM_BSTEP_SPECIFIC=y -CONFIG_IA64_L1_CACHE_SHIFT=6 -# CONFIG_NUMA is not set -# CONFIG_IA64_MCA is not set -CONFIG_PM=y -CONFIG_IA64_HAVE_SYNCRONIZED_ITC=y -# CONFIG_DEVFS_FS is not set -CONFIG_KCORE_ELF=y -CONFIG_SMP=y -# CONFIG_IA32_SUPPORT is not set -# CONFIG_PERFMON is not set -# CONFIG_IA64_PALINFO is not set -# CONFIG_EFI_VARS is not set -# CONFIG_NET is not set -CONFIG_SYSVIPC=y -# CONFIG_BSD_PROCESS_ACCT is not set -# CONFIG_SYSCTL is not set -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set -# CONFIG_ACPI_DEBUG is not set -# CONFIG_ACPI_BUSMGR is not set -# CONFIG_ACPI_SYS is not set -# CONFIG_ACPI_CPU is not set -# CONFIG_ACPI_BUTTON is not set -# CONFIG_ACPI_AC is not set -# CONFIG_ACPI_EC is not set -# CONFIG_ACPI_CMBATT is not set -# CONFIG_ACPI_THERMAL is not set -CONFIG_PCI=y -# CONFIG_PCI_NAMES is not set -# CONFIG_HOTPLUG is not set -# CONFIG_PCMCIA is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Memory Technology Devices (MTD) -# -# CONFIG_MTD is not set - -# -# Plug and Play configuration -# -# CONFIG_PNP is not set -# CONFIG_ISAPNP is not set - -# -# Block devices -# -# CONFIG_BLK_DEV_FD is not set -# CONFIG_BLK_DEV_XD is not set -# CONFIG_PARIDE is not set -# CONFIG_BLK_CPQ_DA is not set -# CONFIG_BLK_CPQ_CISS_DA is not set -# CONFIG_BLK_DEV_DAC960 is not set -# CONFIG_BLK_DEV_LOOP is not set -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_RAM is not set -# CONFIG_BLK_DEV_INITRD is not set - -# -# I2O device support -# -# CONFIG_I2O is not set -# CONFIG_I2O_PCI is not set -# CONFIG_I2O_BLOCK is not set -# CONFIG_I2O_SCSI is not set -# CONFIG_I2O_PROC is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set -# CONFIG_BLK_DEV_MD is not set -# CONFIG_MD_LINEAR is not set -# CONFIG_MD_RAID0 is not set -# CONFIG_MD_RAID1 is not set -# CONFIG_MD_RAID5 is not set -# CONFIG_MD_MULTIPATH is not set -# CONFIG_BLK_DEV_LVM is not set - -# -# ATA/IDE/MFM/RLL support -# -CONFIG_IDE=y - -# -# IDE, ATA and ATAPI Block devices -# -CONFIG_BLK_DEV_IDE=y - -# -# Please see Documentation/ide.txt for help/info on IDE drives -# -# CONFIG_BLK_DEV_HD_IDE is not set -# CONFIG_BLK_DEV_HD is not set -CONFIG_BLK_DEV_IDEDISK=y -# CONFIG_IDEDISK_MULTI_MODE is not set -# CONFIG_BLK_DEV_IDECS is not set -# CONFIG_BLK_DEV_IDECD is not set -# CONFIG_BLK_DEV_IDETAPE is not set -# CONFIG_BLK_DEV_IDEFLOPPY is not set -# CONFIG_BLK_DEV_IDESCSI is not set - -# -# IDE chipset support/bugfixes -# -# CONFIG_BLK_DEV_CMD640 is not set -# CONFIG_BLK_DEV_CMD640_ENHANCED is not set -# CONFIG_BLK_DEV_ISAPNP is not set -# CONFIG_BLK_DEV_RZ1000 is not set -# CONFIG_IDE_CHIPSETS is not set -# CONFIG_IDEDMA_AUTO is not set -# CONFIG_BLK_DEV_IDE_MODES is not set -# CONFIG_BLK_DEV_ATARAID is not set -# CONFIG_BLK_DEV_ATARAID_PDC is not set -# CONFIG_BLK_DEV_ATARAID_HPT is not set - -# -# Alternate 1394 support -# -# CONFIG_X1394 is not set - -# -# Alternate SCSI support -# -# CONFIG_XSCSI is not set - -# -# SCSI support -# -# CONFIG_SCSI is not set - -# -# Amateur Radio support -# -# CONFIG_HAMRADIO is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# CD-ROM drivers (not for SCSI or IDE/ATAPI drives) -# -# CONFIG_CD_NO_IDESCSI is not set - -# -# Input core support -# -# CONFIG_INPUT is not set -# CONFIG_INPUT_KEYBDEV is not set -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_EVDEV is not set - -# -# Character devices -# -CONFIG_VT=y -CONFIG_VT_CONSOLE=y -# CONFIG_SERIAL is not set -# CONFIG_SERIAL_EXTENDED is not set -# CONFIG_SERIAL_NONSTANDARD is not set -CONFIG_UNIX98_PTYS=y -CONFIG_UNIX98_PTY_COUNT=256 - -# -# I2C support -# -# CONFIG_I2C is not set - -# -# Mice -# -# CONFIG_BUSMOUSE is not set -# CONFIG_MOUSE is not set - -# -# Joysticks -# -# CONFIG_INPUT_GAMEPORT is not set - -# -# Input core support is needed for gameports -# - -# -# Input core support is needed for joysticks -# -# CONFIG_QIC02_TAPE is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_INTEL_RNG is not set -# CONFIG_NVRAM is not set -# CONFIG_RTC is not set -# CONFIG_EFI_RTC is not set -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_FTAPE is not set -# CONFIG_AGP is not set -# CONFIG_DRM is not set -# CONFIG_MWAVE is not set - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# File systems -# -# CONFIG_QUOTA is not set -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set -# CONFIG_REISERFS_FS is not set -# CONFIG_REISERFS_CHECK is not set -# CONFIG_ADFS_FS is not set -# CONFIG_ADFS_FS_RW is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_FAT_FS is not set -# CONFIG_MSDOS_FS is not set -# CONFIG_UMSDOS_FS is not set -# CONFIG_VFAT_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_JFFS_FS is not set -# CONFIG_JFFS2_FS is not set -# CONFIG_CRAMFS is not set -CONFIG_TMPFS=y -# CONFIG_RAMFS is not set -# CONFIG_ISO9660_FS is not set -# CONFIG_JOLIET is not set -# CONFIG_MINIX_FS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_NTFS_FS is not set -# CONFIG_NTFS_DEBUG is not set -# CONFIG_NTFS_RW is not set -# CONFIG_HPFS_FS is not set -CONFIG_PROC_FS=y -# CONFIG_DEVFS_FS is not set -# CONFIG_DEVFS_MOUNT is not set -# CONFIG_DEVFS_DEBUG is not set -CONFIG_DEVPTS_FS=y -# CONFIG_QNX4FS_FS is not set -# CONFIG_QNX4FS_RW is not set -# CONFIG_ROMFS_FS is not set -CONFIG_EXT2_FS=y -# CONFIG_SYSV_FS is not set -# CONFIG_UDF_FS is not set -# CONFIG_UDF_RW is not set -# CONFIG_UFS_FS is not set -# CONFIG_UFS_FS_WRITE is not set -# CONFIG_XFS_SUPPORT is not set -# CONFIG_NCPFS_NLS is not set -# CONFIG_SMB_FS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y -# CONFIG_SMB_NLS is not set -# CONFIG_NLS is not set - -# -# Console drivers -# -CONFIG_VGA_CONSOLE=y - -# -# Frame-buffer support -# -# CONFIG_FB is not set - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# -# CONFIG_USB is not set - -# -# USB Controllers -# -# CONFIG_USB_UHCI is not set -# CONFIG_USB_UHCI_ALT is not set -# CONFIG_USB_OHCI is not set - -# -# USB Device Class drivers -# -# CONFIG_USB_AUDIO is not set -# CONFIG_USB_BLUETOOTH is not set -# CONFIG_USB_STORAGE is not set -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_DPCM is not set -# CONFIG_USB_STORAGE_HP8200e is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_ACM is not set -# CONFIG_USB_PRINTER is not set - -# -# USB Human Interface Devices (HID) -# - -# -# Input core support is needed for USB HID -# - -# -# USB Imaging devices -# -# CONFIG_USB_DC2XX is not set -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_SCANNER is not set -# CONFIG_USB_MICROTEK is not set -# CONFIG_USB_HPUSBSCSI is not set - -# -# USB Multimedia devices -# - -# -# Video4Linux support is needed for USB Multimedia device support -# - -# -# USB Network adaptors -# - -# -# Networking support is needed for USB Networking device support -# - -# -# USB port drivers -# -# CONFIG_USB_USS720 is not set - -# -# USB Serial Converter support -# -# CONFIG_USB_SERIAL is not set -# CONFIG_USB_SERIAL_GENERIC is not set -# CONFIG_USB_SERIAL_BELKIN is not set -# CONFIG_USB_SERIAL_WHITEHEAT is not set -# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set -# CONFIG_USB_SERIAL_EMPEG is not set -# CONFIG_USB_SERIAL_FTDI_SIO is not set -# CONFIG_USB_SERIAL_VISOR is not set -# CONFIG_USB_SERIAL_IR is not set -# CONFIG_USB_SERIAL_EDGEPORT is not set -# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set -# CONFIG_USB_SERIAL_KEYSPAN is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set -# CONFIG_USB_SERIAL_MCT_U232 is not set -# CONFIG_USB_SERIAL_PL2303 is not set -# CONFIG_USB_SERIAL_CYBERJACK is not set -# CONFIG_USB_SERIAL_XIRCOM is not set -# CONFIG_USB_SERIAL_OMNINET is not set - -# -# USB Miscellaneous drivers -# -# CONFIG_USB_RIO500 is not set - -# -# Kernel hacking -# -CONFIG_DEBUG_KERNEL=y -CONFIG_IA64_PRINT_HAZARDS=y -# CONFIG_DISABLE_VHPT is not set -CONFIG_MAGIC_SYSRQ=y -CONFIG_IA64_EARLY_PRINTK=y -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_IA64_DEBUG_CMPXCHG is not set -# CONFIG_IA64_DEBUG_IRQ is not set -# CONFIG_KDB is not set -# CONFIG_KDB_MODULES is not set -# CONFIG_KALLSYMS is not set diff -Nru a/arch/ia64/sn/configs/sn2/defconfig-sn2-dig-sp b/arch/ia64/sn/configs/sn2/defconfig-sn2-dig-sp --- a/arch/ia64/sn/configs/sn2/defconfig-sn2-dig-sp Mon Dec 23 21:22:00 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,449 +0,0 @@ -# -# Automatically generated make config: don't edit -# - -# -# Code maturity level options -# -# CONFIG_EXPERIMENTAL is not set - -# -# Loadable module support -# -# CONFIG_MODULES is not set - -# -# General setup -# -CONFIG_IA64=y -# CONFIG_ISA is not set -# CONFIG_EISA is not set -# CONFIG_MCA is not set -# CONFIG_SBUS is not set -CONFIG_RWSEM_GENERIC_SPINLOCK=y -# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set -CONFIG_ACPI=y -CONFIG_ACPI_EFI=y -CONFIG_ACPI_INTERPRETER=y -CONFIG_ACPI_KERNEL_CONFIG=y -CONFIG_ITANIUM=y -# CONFIG_MCKINLEY is not set -# CONFIG_IA64_GENERIC is not set -CONFIG_IA64_DIG=y -# CONFIG_IA64_HP_SIM is not set -# CONFIG_IA64_SGI_SN1 is not set -# CONFIG_IA64_SGI_SN2 is not set -# CONFIG_IA64_PAGE_SIZE_4KB is not set -# CONFIG_IA64_PAGE_SIZE_8KB is not set -CONFIG_IA64_PAGE_SIZE_16KB=y -# CONFIG_IA64_PAGE_SIZE_64KB is not set -CONFIG_IA64_BRL_EMU=y -CONFIG_ITANIUM_BSTEP_SPECIFIC=y -CONFIG_IA64_L1_CACHE_SHIFT=6 -# CONFIG_NUMA is not set -# CONFIG_IA64_MCA is not set -CONFIG_PM=y -CONFIG_IA64_HAVE_SYNCRONIZED_ITC=y -# CONFIG_DEVFS_FS is not set -CONFIG_KCORE_ELF=y -# CONFIG_SMP is not set -# CONFIG_IA32_SUPPORT is not set -# CONFIG_PERFMON is not set -# CONFIG_IA64_PALINFO is not set -# CONFIG_EFI_VARS is not set -# CONFIG_NET is not set -CONFIG_SYSVIPC=y -# CONFIG_BSD_PROCESS_ACCT is not set -# CONFIG_SYSCTL is not set -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set -# CONFIG_ACPI_DEBUG is not set -# CONFIG_ACPI_BUSMGR is not set -# CONFIG_ACPI_SYS is not set -# CONFIG_ACPI_CPU is not set -# CONFIG_ACPI_BUTTON is not set -# CONFIG_ACPI_AC is not set -# CONFIG_ACPI_EC is not set -# CONFIG_ACPI_CMBATT is not set -# CONFIG_ACPI_THERMAL is not set -CONFIG_PCI=y -# CONFIG_PCI_NAMES is not set -# CONFIG_HOTPLUG is not set -# CONFIG_PCMCIA is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Memory Technology Devices (MTD) -# -# CONFIG_MTD is not set - -# -# Plug and Play configuration -# -# CONFIG_PNP is not set -# CONFIG_ISAPNP is not set - -# -# Block devices -# -# CONFIG_BLK_DEV_FD is not set -# CONFIG_BLK_DEV_XD is not set -# CONFIG_PARIDE is not set -# CONFIG_BLK_CPQ_DA is not set -# CONFIG_BLK_CPQ_CISS_DA is not set -# CONFIG_BLK_DEV_DAC960 is not set -# CONFIG_BLK_DEV_LOOP is not set -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_RAM is not set -# CONFIG_BLK_DEV_INITRD is not set - -# -# I2O device support -# -# CONFIG_I2O is not set -# CONFIG_I2O_PCI is not set -# CONFIG_I2O_BLOCK is not set -# CONFIG_I2O_SCSI is not set -# CONFIG_I2O_PROC is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set -# CONFIG_BLK_DEV_MD is not set -# CONFIG_MD_LINEAR is not set -# CONFIG_MD_RAID0 is not set -# CONFIG_MD_RAID1 is not set -# CONFIG_MD_RAID5 is not set -# CONFIG_MD_MULTIPATH is not set -# CONFIG_BLK_DEV_LVM is not set - -# -# ATA/IDE/MFM/RLL support -# -CONFIG_IDE=y - -# -# IDE, ATA and ATAPI Block devices -# -CONFIG_BLK_DEV_IDE=y - -# -# Please see Documentation/ide.txt for help/info on IDE drives -# -# CONFIG_BLK_DEV_HD_IDE is not set -# CONFIG_BLK_DEV_HD is not set -CONFIG_BLK_DEV_IDEDISK=y -# CONFIG_IDEDISK_MULTI_MODE is not set -# CONFIG_BLK_DEV_IDECS is not set -# CONFIG_BLK_DEV_IDECD is not set -# CONFIG_BLK_DEV_IDETAPE is not set -# CONFIG_BLK_DEV_IDEFLOPPY is not set -# CONFIG_BLK_DEV_IDESCSI is not set - -# -# IDE chipset support/bugfixes -# -# CONFIG_BLK_DEV_CMD640 is not set -# CONFIG_BLK_DEV_CMD640_ENHANCED is not set -# CONFIG_BLK_DEV_ISAPNP is not set -# CONFIG_BLK_DEV_RZ1000 is not set -# CONFIG_IDE_CHIPSETS is not set -# CONFIG_IDEDMA_AUTO is not set -# CONFIG_BLK_DEV_IDE_MODES is not set -# CONFIG_BLK_DEV_ATARAID is not set -# CONFIG_BLK_DEV_ATARAID_PDC is not set -# CONFIG_BLK_DEV_ATARAID_HPT is not set - -# -# Alternate 1394 support -# -# CONFIG_X1394 is not set - -# -# Alternate SCSI support -# -# CONFIG_XSCSI is not set - -# -# SCSI support -# -# CONFIG_SCSI is not set - -# -# Amateur Radio support -# -# CONFIG_HAMRADIO is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# CD-ROM drivers (not for SCSI or IDE/ATAPI drives) -# -# CONFIG_CD_NO_IDESCSI is not set - -# -# Input core support -# -# CONFIG_INPUT is not set -# CONFIG_INPUT_KEYBDEV is not set -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_EVDEV is not set - -# -# Character devices -# -CONFIG_VT=y -CONFIG_VT_CONSOLE=y -# CONFIG_SERIAL is not set -# CONFIG_SERIAL_EXTENDED is not set -# CONFIG_SERIAL_NONSTANDARD is not set -CONFIG_UNIX98_PTYS=y -CONFIG_UNIX98_PTY_COUNT=256 - -# -# I2C support -# -# CONFIG_I2C is not set - -# -# Mice -# -# CONFIG_BUSMOUSE is not set -# CONFIG_MOUSE is not set - -# -# Joysticks -# -# CONFIG_INPUT_GAMEPORT is not set - -# -# Input core support is needed for gameports -# - -# -# Input core support is needed for joysticks -# -# CONFIG_QIC02_TAPE is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_INTEL_RNG is not set -# CONFIG_NVRAM is not set -# CONFIG_RTC is not set -# CONFIG_EFI_RTC is not set -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_FTAPE is not set -# CONFIG_AGP is not set -# CONFIG_DRM is not set -# CONFIG_MWAVE is not set - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# File systems -# -# CONFIG_QUOTA is not set -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set -# CONFIG_REISERFS_FS is not set -# CONFIG_REISERFS_CHECK is not set -# CONFIG_ADFS_FS is not set -# CONFIG_ADFS_FS_RW is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_FAT_FS is not set -# CONFIG_MSDOS_FS is not set -# CONFIG_UMSDOS_FS is not set -# CONFIG_VFAT_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_JFFS_FS is not set -# CONFIG_JFFS2_FS is not set -# CONFIG_CRAMFS is not set -CONFIG_TMPFS=y -# CONFIG_RAMFS is not set -# CONFIG_ISO9660_FS is not set -# CONFIG_JOLIET is not set -# CONFIG_MINIX_FS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_NTFS_FS is not set -# CONFIG_NTFS_DEBUG is not set -# CONFIG_NTFS_RW is not set -# CONFIG_HPFS_FS is not set -CONFIG_PROC_FS=y -# CONFIG_DEVFS_FS is not set -# CONFIG_DEVFS_MOUNT is not set -# CONFIG_DEVFS_DEBUG is not set -CONFIG_DEVPTS_FS=y -# CONFIG_QNX4FS_FS is not set -# CONFIG_QNX4FS_RW is not set -# CONFIG_ROMFS_FS is not set -CONFIG_EXT2_FS=y -# CONFIG_SYSV_FS is not set -# CONFIG_UDF_FS is not set -# CONFIG_UDF_RW is not set -# CONFIG_UFS_FS is not set -# CONFIG_UFS_FS_WRITE is not set -# CONFIG_XFS_SUPPORT is not set -# CONFIG_NCPFS_NLS is not set -# CONFIG_SMB_FS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y -# CONFIG_SMB_NLS is not set -# CONFIG_NLS is not set - -# -# Console drivers -# -CONFIG_VGA_CONSOLE=y - -# -# Frame-buffer support -# -# CONFIG_FB is not set - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# -# CONFIG_USB is not set - -# -# USB Controllers -# -# CONFIG_USB_UHCI is not set -# CONFIG_USB_UHCI_ALT is not set -# CONFIG_USB_OHCI is not set - -# -# USB Device Class drivers -# -# CONFIG_USB_AUDIO is not set -# CONFIG_USB_BLUETOOTH is not set -# CONFIG_USB_STORAGE is not set -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_DPCM is not set -# CONFIG_USB_STORAGE_HP8200e is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_ACM is not set -# CONFIG_USB_PRINTER is not set - -# -# USB Human Interface Devices (HID) -# - -# -# Input core support is needed for USB HID -# - -# -# USB Imaging devices -# -# CONFIG_USB_DC2XX is not set -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_SCANNER is not set -# CONFIG_USB_MICROTEK is not set -# CONFIG_USB_HPUSBSCSI is not set - -# -# USB Multimedia devices -# - -# -# Video4Linux support is needed for USB Multimedia device support -# - -# -# USB Network adaptors -# - -# -# Networking support is needed for USB Networking device support -# - -# -# USB port drivers -# -# CONFIG_USB_USS720 is not set - -# -# USB Serial Converter support -# -# CONFIG_USB_SERIAL is not set -# CONFIG_USB_SERIAL_GENERIC is not set -# CONFIG_USB_SERIAL_BELKIN is not set -# CONFIG_USB_SERIAL_WHITEHEAT is not set -# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set -# CONFIG_USB_SERIAL_EMPEG is not set -# CONFIG_USB_SERIAL_FTDI_SIO is not set -# CONFIG_USB_SERIAL_VISOR is not set -# CONFIG_USB_SERIAL_IR is not set -# CONFIG_USB_SERIAL_EDGEPORT is not set -# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set -# CONFIG_USB_SERIAL_KEYSPAN is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set -# CONFIG_USB_SERIAL_MCT_U232 is not set -# CONFIG_USB_SERIAL_PL2303 is not set -# CONFIG_USB_SERIAL_CYBERJACK is not set -# CONFIG_USB_SERIAL_XIRCOM is not set -# CONFIG_USB_SERIAL_OMNINET is not set - -# -# USB Miscellaneous drivers -# -# CONFIG_USB_RIO500 is not set - -# -# Kernel hacking -# -CONFIG_DEBUG_KERNEL=y -CONFIG_IA64_PRINT_HAZARDS=y -# CONFIG_DISABLE_VHPT is not set -CONFIG_MAGIC_SYSRQ=y -CONFIG_IA64_EARLY_PRINTK=y -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_IA64_DEBUG_CMPXCHG is not set -# CONFIG_IA64_DEBUG_IRQ is not set -# CONFIG_KDB is not set -# CONFIG_KDB_MODULES is not set -# CONFIG_KALLSYMS is not set diff -Nru a/arch/ia64/sn/configs/sn2/defconfig-sn2-mp b/arch/ia64/sn/configs/sn2/defconfig-sn2-mp --- a/arch/ia64/sn/configs/sn2/defconfig-sn2-mp Mon Dec 23 21:21:51 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,720 +0,0 @@ -# -# Automatically generated make config: don't edit -# - -# -# Code maturity level options -# -CONFIG_EXPERIMENTAL=y - -# -# Loadable module support -# -# CONFIG_MODULES is not set - -# -# General setup -# -CONFIG_IA64=y -# CONFIG_ISA is not set -# CONFIG_EISA is not set -# CONFIG_MCA is not set -# CONFIG_SBUS is not set -CONFIG_RWSEM_GENERIC_SPINLOCK=y -# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set -CONFIG_ACPI=y -CONFIG_ACPI_EFI=y -CONFIG_ACPI_INTERPRETER=y -CONFIG_ACPI_KERNEL_CONFIG=y -# CONFIG_ITANIUM is not set -CONFIG_MCKINLEY=y -# CONFIG_IA64_GENERIC is not set -# CONFIG_IA64_DIG is not set -# CONFIG_IA64_HP_SIM is not set -# CONFIG_IA64_SGI_SN1 is not set -CONFIG_IA64_SGI_SN2=y -# CONFIG_IA64_PAGE_SIZE_4KB is not set -# CONFIG_IA64_PAGE_SIZE_8KB is not set -CONFIG_IA64_PAGE_SIZE_16KB=y -# CONFIG_IA64_PAGE_SIZE_64KB is not set -CONFIG_IA64_L1_CACHE_SHIFT=7 -CONFIG_MCKINLEY_ASTEP_SPECIFIC=y -CONFIG_MCKINLEY_A0_SPECIFIC=y -CONFIG_IA64_SGI_SN=y -CONFIG_IA64_SGI_SN_DEBUG=y -CONFIG_IA64_SGI_SN_SIM=y -CONFIG_IA64_SGI_AUTOTEST=y -CONFIG_DEVFS_FS=y -CONFIG_DEVFS_DEBUG=y -CONFIG_SERIAL_SGI_L1_PROTOCOL=y -CONFIG_DISCONTIGMEM=y -CONFIG_IA64_MCA=y -CONFIG_NUMA=y -CONFIG_PERCPU_IRQ=y -CONFIG_PCIBA=y -CONFIG_KCORE_ELF=y -CONFIG_SMP=y -CONFIG_IA32_SUPPORT=y -CONFIG_PERFMON=y -CONFIG_IA64_PALINFO=y -# CONFIG_EFI_VARS is not set -CONFIG_NET=y -CONFIG_SYSVIPC=y -# CONFIG_BSD_PROCESS_ACCT is not set -CONFIG_SYSCTL=y -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set -# CONFIG_ACPI_DEBUG is not set -# CONFIG_ACPI_BUSMGR is not set -# CONFIG_ACPI_SYS is not set -# CONFIG_ACPI_CPU is not set -# CONFIG_ACPI_BUTTON is not set -# CONFIG_ACPI_AC is not set -# CONFIG_ACPI_EC is not set -# CONFIG_ACPI_CMBATT is not set -# CONFIG_ACPI_THERMAL is not set -CONFIG_PCI=y -# CONFIG_PCI_NAMES is not set -# CONFIG_HOTPLUG is not set -# CONFIG_PCMCIA is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Networking options -# -CONFIG_PACKET=y -# CONFIG_PACKET_MMAP is not set -CONFIG_NETLINK=y -CONFIG_RTNETLINK=y -CONFIG_NETLINK_DEV=y -CONFIG_NETFILTER=y -CONFIG_NETFILTER_DEBUG=y -CONFIG_FILTER=y -CONFIG_UNIX=y -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -# CONFIG_IP_ADVANCED_ROUTER is not set -# CONFIG_IP_PNP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_IP_MROUTE is not set -# CONFIG_ARPD is not set -# CONFIG_INET_ECN is not set -CONFIG_SYN_COOKIES=y - -# -# IP: Netfilter Configuration -# -# CONFIG_IP_NF_CONNTRACK is not set -# CONFIG_IP_NF_QUEUE is not set -# CONFIG_IP_NF_IPTABLES is not set -# CONFIG_IP_NF_COMPAT_IPCHAINS is not set -# CONFIG_IP_NF_COMPAT_IPFWADM is not set -# CONFIG_IPV6 is not set -# CONFIG_KHTTPD is not set -# CONFIG_ATM is not set - -# -# -# -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_DECNET is not set -# CONFIG_BRIDGE is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_LLC is not set -# CONFIG_NET_DIVERT is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_NET_FASTROUTE is not set -# CONFIG_NET_HW_FLOWCONTROL is not set - -# -# QoS and/or fair queueing -# -# CONFIG_NET_SCHED is not set - -# -# Memory Technology Devices (MTD) -# -# CONFIG_MTD is not set - -# -# Plug and Play configuration -# -# CONFIG_PNP is not set -# CONFIG_ISAPNP is not set -# CONFIG_PNPBIOS is not set - -# -# Block devices -# -# CONFIG_BLK_DEV_FD is not set -# CONFIG_BLK_DEV_XD is not set -# CONFIG_PARIDE is not set -# CONFIG_BLK_CPQ_DA is not set -# CONFIG_BLK_CPQ_CISS_DA is not set -# CONFIG_BLK_DEV_DAC960 is not set -CONFIG_BLK_DEV_LOOP=y -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_RAM is not set -# CONFIG_BLK_DEV_INITRD is not set - -# -# I2O device support -# -# CONFIG_I2O is not set -# CONFIG_I2O_PCI is not set -# CONFIG_I2O_BLOCK is not set -# CONFIG_I2O_LAN is not set -# CONFIG_I2O_SCSI is not set -# CONFIG_I2O_PROC is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set -# CONFIG_BLK_DEV_MD is not set -# CONFIG_MD_LINEAR is not set -# CONFIG_MD_RAID0 is not set -# CONFIG_MD_RAID1 is not set -# CONFIG_MD_RAID5 is not set -# CONFIG_MD_MULTIPATH is not set -# CONFIG_BLK_DEV_LVM is not set - -# -# ATA/IDE/MFM/RLL support -# -CONFIG_IDE=y - -# -# IDE, ATA and ATAPI Block devices -# -CONFIG_BLK_DEV_IDE=y - -# -# Please see Documentation/ide.txt for help/info on IDE drives -# -# CONFIG_BLK_DEV_HD_IDE is not set -# CONFIG_BLK_DEV_HD is not set -CONFIG_BLK_DEV_IDEDISK=y -# CONFIG_IDEDISK_MULTI_MODE is not set -# CONFIG_BLK_DEV_IDECS is not set -# CONFIG_BLK_DEV_IDECD is not set -# CONFIG_BLK_DEV_IDETAPE is not set -# CONFIG_BLK_DEV_IDEFLOPPY is not set -# CONFIG_BLK_DEV_IDESCSI is not set - -# -# IDE chipset support/bugfixes -# -# CONFIG_BLK_DEV_CMD640 is not set -# CONFIG_BLK_DEV_CMD640_ENHANCED is not set -# CONFIG_BLK_DEV_ISAPNP is not set -# CONFIG_BLK_DEV_RZ1000 is not set -# CONFIG_IDE_CHIPSETS is not set -# CONFIG_IDEDMA_AUTO is not set -# CONFIG_BLK_DEV_IDE_MODES is not set -# CONFIG_BLK_DEV_ATARAID is not set -# CONFIG_BLK_DEV_ATARAID_PDC is not set -# CONFIG_BLK_DEV_ATARAID_HPT is not set - -# -# Alternate 1394 support -# -# CONFIG_X1394 is not set - -# -# Alternate SCSI support -# -CONFIG_XSCSI=y - -# -# Alternate SCSI support -# -CONFIG_XSCSI_DKSC=y -# CONFIG_XSCSI_QLFC is not set -# CONFIG_XSCSI_QL is not set -# CONFIG_XSCSI_SBP2 is not set - -# -# SCSI support -# -CONFIG_SCSI=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -CONFIG_SD_EXTRA_DEVS=40 -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -# CONFIG_BLK_DEV_SR is not set -# CONFIG_CHR_DEV_SG is not set - -# -# Some SCSI devices (e.g. CD jukebox) support multiple LUNs -# -# CONFIG_SCSI_DEBUG_QUEUES is not set -# CONFIG_SCSI_MULTI_LUN is not set -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set - -# -# SCSI low-level drivers -# -# CONFIG_BLK_DEV_3W_XXXX_RAID is not set -# CONFIG_SCSI_7000FASST is not set -# CONFIG_SCSI_ACARD is not set -# CONFIG_SCSI_AHA152X is not set -# CONFIG_SCSI_AHA1542 is not set -# CONFIG_SCSI_AHA1740 is not set -# CONFIG_SCSI_AIC7XXX is not set -# CONFIG_SCSI_AIC7XXX_OLD is not set -# CONFIG_SCSI_DPT_I2O is not set -# CONFIG_SCSI_ADVANSYS is not set -# CONFIG_SCSI_IN2000 is not set -# CONFIG_SCSI_AM53C974 is not set -# CONFIG_SCSI_MEGARAID is not set -# CONFIG_SCSI_BUSLOGIC is not set -# CONFIG_SCSI_CPQFCTS is not set -# CONFIG_SCSI_DMX3191D is not set -# CONFIG_SCSI_DTC3280 is not set -# CONFIG_SCSI_EATA is not set -# CONFIG_SCSI_EATA_DMA is not set -# CONFIG_SCSI_EATA_PIO is not set -# CONFIG_SCSI_FUTURE_DOMAIN is not set -# CONFIG_SCSI_GDTH is not set -# CONFIG_SCSI_GENERIC_NCR5380 is not set -# CONFIG_SCSI_INITIO is not set -# CONFIG_SCSI_INIA100 is not set -# CONFIG_SCSI_NCR53C406A is not set -# CONFIG_SCSI_NCR53C7xx is not set -# CONFIG_SCSI_NCR53C8XX is not set -# CONFIG_SCSI_SYM53C8XX is not set -# CONFIG_SCSI_PAS16 is not set -# CONFIG_SCSI_PCI2000 is not set -# CONFIG_SCSI_PCI2220I is not set -# CONFIG_SCSI_PSI240I is not set -# CONFIG_SCSI_QLOGIC_FAS is not set -# CONFIG_SCSI_QLOGIC_ISP is not set -CONFIG_SCSI_QLOGIC_FC=y -# CONFIG_SCSI_QLOGIC_FC_FIRMWARE is not set -# CONFIG_SCSI_QLOGIC_1280 is not set -# CONFIG_SCSI_QLOGIC_QLA2100 is not set -# CONFIG_SCSI_SIM710 is not set -# CONFIG_SCSI_SYM53C416 is not set -# CONFIG_SCSI_DC390T is not set -# CONFIG_SCSI_T128 is not set -# CONFIG_SCSI_U14_34F is not set -# CONFIG_SCSI_DEBUG is not set - -# -# Network device support -# -CONFIG_NETDEVICES=y - -# -# ARCnet devices -# -# CONFIG_ARCNET is not set -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set -# CONFIG_ETHERTAP is not set - -# -# Ethernet (10 or 100Mbit) -# -CONFIG_NET_ETHERNET=y -# CONFIG_SUNLANCE is not set -# CONFIG_HAPPYMEAL is not set -# CONFIG_SUNBMAC is not set -# CONFIG_SUNQE is not set -# CONFIG_SUNLANCE is not set -# CONFIG_SUNGEM is not set -# CONFIG_NET_VENDOR_3COM is not set -# CONFIG_LANCE is not set -# CONFIG_NET_VENDOR_SMC is not set -# CONFIG_NET_VENDOR_RACAL is not set -# CONFIG_HP100 is not set -# CONFIG_NET_ISA is not set -# CONFIG_NET_PCI is not set -# CONFIG_NET_POCKET is not set - -# -# Ethernet (1000 Mbit) -# -# CONFIG_ACENIC is not set -# CONFIG_DL2K is not set -# CONFIG_MYRI_SBUS is not set -# CONFIG_NS83820 is not set -# CONFIG_HAMACHI is not set -# CONFIG_YELLOWFIN is not set -# CONFIG_SK98LIN is not set -# CONFIG_FDDI is not set -# CONFIG_HIPPI is not set -# CONFIG_PLIP is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set - -# -# Wireless LAN (non-hamradio) -# -# CONFIG_NET_RADIO is not set - -# -# Token Ring devices -# -# CONFIG_TR is not set -# CONFIG_NET_FC is not set -# CONFIG_RCPCI is not set -# CONFIG_SHAPER is not set - -# -# Wan interfaces -# -# CONFIG_WAN is not set - -# -# Amateur Radio support -# -# CONFIG_HAMRADIO is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# CD-ROM drivers (not for SCSI or IDE/ATAPI drives) -# -# CONFIG_CD_NO_IDESCSI is not set - -# -# Input core support -# -# CONFIG_INPUT is not set -# CONFIG_INPUT_KEYBDEV is not set -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_EVDEV is not set - -# -# Character devices -# -# CONFIG_VT is not set -CONFIG_SERIAL=y -# CONFIG_SERIAL_CONSOLE is not set -# CONFIG_SERIAL_EXTENDED is not set -# CONFIG_SERIAL_NONSTANDARD is not set -CONFIG_UNIX98_PTYS=y -CONFIG_UNIX98_PTY_COUNT=256 - -# -# I2C support -# -# CONFIG_I2C is not set - -# -# Mice -# -# CONFIG_BUSMOUSE is not set -# CONFIG_MOUSE is not set - -# -# Joysticks -# -# CONFIG_INPUT_GAMEPORT is not set - -# -# Input core support is needed for gameports -# - -# -# Input core support is needed for joysticks -# -# CONFIG_QIC02_TAPE is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_INTEL_RNG is not set -# CONFIG_NVRAM is not set -# CONFIG_RTC is not set -CONFIG_EFI_RTC=y -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_FTAPE is not set -# CONFIG_AGP is not set -# CONFIG_DRM is not set -# CONFIG_MWAVE is not set - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# File systems -# -CONFIG_QUOTA=y -CONFIG_AUTOFS_FS=y -CONFIG_AUTOFS4_FS=y -# CONFIG_REISERFS_FS is not set -# CONFIG_REISERFS_CHECK is not set -# CONFIG_ADFS_FS is not set -# CONFIG_ADFS_FS_RW is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_BFS_FS is not set -CONFIG_FAT_FS=y -CONFIG_MSDOS_FS=y -# CONFIG_UMSDOS_FS is not set -CONFIG_VFAT_FS=y -# CONFIG_EFS_FS is not set -# CONFIG_JFFS_FS is not set -# CONFIG_JFFS2_FS is not set -# CONFIG_CRAMFS is not set -CONFIG_TMPFS=y -# CONFIG_RAMFS is not set -CONFIG_ISO9660_FS=y -# CONFIG_JOLIET is not set -# CONFIG_MINIX_FS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_NTFS_FS is not set -# CONFIG_NTFS_DEBUG is not set -# CONFIG_NTFS_RW is not set -# CONFIG_HPFS_FS is not set -CONFIG_PROC_FS=y -CONFIG_DEVFS_FS=y -CONFIG_DEVFS_MOUNT=y -CONFIG_DEVFS_DEBUG=y -CONFIG_DEVPTS_FS=y -# CONFIG_QNX4FS_FS is not set -# CONFIG_QNX4FS_RW is not set -# CONFIG_ROMFS_FS is not set -CONFIG_EXT2_FS=y -# CONFIG_SYSV_FS is not set -# CONFIG_UDF_FS is not set -# CONFIG_UDF_RW is not set -# CONFIG_UFS_FS is not set -# CONFIG_UFS_FS_WRITE is not set -CONFIG_XFS_SUPPORT=y - -# -# Network File Systems -# -# CONFIG_CODA_FS is not set -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -# CONFIG_ROOT_NFS is not set -CONFIG_NFSD=y -CONFIG_NFSD_V3=y -CONFIG_SUNRPC=y -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -# CONFIG_SMB_FS is not set -# CONFIG_NCP_FS is not set -# CONFIG_NCPFS_PACKET_SIGNING is not set -# CONFIG_NCPFS_IOCTL_LOCKING is not set -# CONFIG_NCPFS_STRONG is not set -# CONFIG_NCPFS_NFS_NS is not set -# CONFIG_NCPFS_OS2_NS is not set -# CONFIG_NCPFS_SMALLDOS is not set -# CONFIG_NCPFS_NLS is not set -# CONFIG_NCPFS_EXTRAS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y -# CONFIG_SMB_NLS is not set -CONFIG_NLS=y - -# -# Native Language Support -# -CONFIG_NLS_DEFAULT="n" -# CONFIG_NLS_CODEPAGE_437 is not set -# CONFIG_NLS_CODEPAGE_737 is not set -# CONFIG_NLS_CODEPAGE_775 is not set -# CONFIG_NLS_CODEPAGE_850 is not set -# CONFIG_NLS_CODEPAGE_852 is not set -# CONFIG_NLS_CODEPAGE_855 is not set -# CONFIG_NLS_CODEPAGE_857 is not set -# CONFIG_NLS_CODEPAGE_860 is not set -# CONFIG_NLS_CODEPAGE_861 is not set -# CONFIG_NLS_CODEPAGE_862 is not set -# CONFIG_NLS_CODEPAGE_863 is not set -# CONFIG_NLS_CODEPAGE_864 is not set -# CONFIG_NLS_CODEPAGE_865 is not set -# CONFIG_NLS_CODEPAGE_866 is not set -# CONFIG_NLS_CODEPAGE_869 is not set -# CONFIG_NLS_CODEPAGE_936 is not set -# CONFIG_NLS_CODEPAGE_950 is not set -# CONFIG_NLS_CODEPAGE_932 is not set -# CONFIG_NLS_CODEPAGE_949 is not set -# CONFIG_NLS_CODEPAGE_874 is not set -# CONFIG_NLS_ISO8859_8 is not set -# CONFIG_NLS_CODEPAGE_1251 is not set -# CONFIG_NLS_ISO8859_1 is not set -# CONFIG_NLS_ISO8859_2 is not set -# CONFIG_NLS_ISO8859_3 is not set -# CONFIG_NLS_ISO8859_4 is not set -# CONFIG_NLS_ISO8859_5 is not set -# CONFIG_NLS_ISO8859_6 is not set -# CONFIG_NLS_ISO8859_7 is not set -# CONFIG_NLS_ISO8859_9 is not set -# CONFIG_NLS_ISO8859_13 is not set -# CONFIG_NLS_ISO8859_14 is not set -# CONFIG_NLS_ISO8859_15 is not set -# CONFIG_NLS_KOI8_R is not set -# CONFIG_NLS_KOI8_U is not set -# CONFIG_NLS_UTF8 is not set - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# -# CONFIG_USB is not set - -# -# USB Controllers -# -# CONFIG_USB_UHCI is not set -# CONFIG_USB_UHCI_ALT is not set -# CONFIG_USB_OHCI is not set - -# -# USB Device Class drivers -# -# CONFIG_USB_AUDIO is not set -# CONFIG_USB_BLUETOOTH is not set -# CONFIG_USB_STORAGE is not set -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_DPCM is not set -# CONFIG_USB_STORAGE_HP8200e is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_ACM is not set -# CONFIG_USB_PRINTER is not set - -# -# USB Human Interface Devices (HID) -# - -# -# Input core support is needed for USB HID -# - -# -# USB Imaging devices -# -# CONFIG_USB_DC2XX is not set -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_SCANNER is not set -# CONFIG_USB_MICROTEK is not set -# CONFIG_USB_HPUSBSCSI is not set - -# -# USB Multimedia devices -# - -# -# Video4Linux support is needed for USB Multimedia device support -# - -# -# USB Network adaptors -# -# CONFIG_USB_PEGASUS is not set -# CONFIG_USB_KAWETH is not set -# CONFIG_USB_CATC is not set -# CONFIG_USB_CDCETHER is not set -# CONFIG_USB_USBNET is not set - -# -# USB port drivers -# -# CONFIG_USB_USS720 is not set - -# -# USB Serial Converter support -# -# CONFIG_USB_SERIAL is not set -# CONFIG_USB_SERIAL_GENERIC is not set -# CONFIG_USB_SERIAL_BELKIN is not set -# CONFIG_USB_SERIAL_WHITEHEAT is not set -# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set -# CONFIG_USB_SERIAL_EMPEG is not set -# CONFIG_USB_SERIAL_FTDI_SIO is not set -# CONFIG_USB_SERIAL_VISOR is not set -# CONFIG_USB_SERIAL_IR is not set -# CONFIG_USB_SERIAL_EDGEPORT is not set -# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set -# CONFIG_USB_SERIAL_KEYSPAN is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set -# CONFIG_USB_SERIAL_MCT_U232 is not set -# CONFIG_USB_SERIAL_PL2303 is not set -# CONFIG_USB_SERIAL_CYBERJACK is not set -# CONFIG_USB_SERIAL_XIRCOM is not set -# CONFIG_USB_SERIAL_OMNINET is not set - -# -# USB Miscellaneous drivers -# -# CONFIG_USB_RIO500 is not set - -# -# IEEE 1394 (FireWire) support (EXPERIMENTAL) -# -# CONFIG_IEEE1394 is not set - -# -# Bluetooth support -# -# CONFIG_BT is not set - -# -# Kernel hacking -# -CONFIG_DEBUG_KERNEL=y -CONFIG_IA64_PRINT_HAZARDS=y -# CONFIG_DISABLE_VHPT is not set -CONFIG_MAGIC_SYSRQ=y -CONFIG_IA64_EARLY_PRINTK=y -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_IA64_DEBUG_CMPXCHG is not set -# CONFIG_IA64_DEBUG_IRQ is not set -# CONFIG_KDB is not set -# CONFIG_KDB_MODULES is not set -CONFIG_KALLSYMS=y diff -Nru a/arch/ia64/sn/configs/sn2/defconfig-sn2-mp-modules b/arch/ia64/sn/configs/sn2/defconfig-sn2-mp-modules --- a/arch/ia64/sn/configs/sn2/defconfig-sn2-mp-modules Mon Dec 23 21:21:58 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,722 +0,0 @@ -# -# Automatically generated make config: don't edit -# - -# -# Code maturity level options -# -CONFIG_EXPERIMENTAL=y - -# -# Loadable module support -# -CONFIG_MODULES=y -# CONFIG_MODVERSIONS is not set -CONFIG_KMOD=y - -# -# General setup -# -CONFIG_IA64=y -# CONFIG_ISA is not set -# CONFIG_EISA is not set -# CONFIG_MCA is not set -# CONFIG_SBUS is not set -CONFIG_RWSEM_GENERIC_SPINLOCK=y -# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set -CONFIG_ACPI=y -CONFIG_ACPI_EFI=y -CONFIG_ACPI_INTERPRETER=y -CONFIG_ACPI_KERNEL_CONFIG=y -# CONFIG_ITANIUM is not set -CONFIG_MCKINLEY=y -# CONFIG_IA64_GENERIC is not set -# CONFIG_IA64_DIG is not set -# CONFIG_IA64_HP_SIM is not set -# CONFIG_IA64_SGI_SN1 is not set -CONFIG_IA64_SGI_SN2=y -# CONFIG_IA64_PAGE_SIZE_4KB is not set -# CONFIG_IA64_PAGE_SIZE_8KB is not set -CONFIG_IA64_PAGE_SIZE_16KB=y -# CONFIG_IA64_PAGE_SIZE_64KB is not set -CONFIG_IA64_L1_CACHE_SHIFT=7 -CONFIG_MCKINLEY_ASTEP_SPECIFIC=y -CONFIG_MCKINLEY_A0_SPECIFIC=y -CONFIG_IA64_SGI_SN=y -CONFIG_IA64_SGI_SN_DEBUG=y -CONFIG_IA64_SGI_SN_SIM=y -CONFIG_IA64_SGI_AUTOTEST=y -CONFIG_DEVFS_FS=y -CONFIG_DEVFS_DEBUG=y -# CONFIG_SERIAL_SGI_L1_PROTOCOL is not set -CONFIG_DISCONTIGMEM=y -CONFIG_IA64_MCA=y -CONFIG_NUMA=y -CONFIG_PERCPU_IRQ=y -CONFIG_PCIBA=y -CONFIG_KCORE_ELF=y -CONFIG_SMP=y -CONFIG_IA32_SUPPORT=y -CONFIG_PERFMON=y -CONFIG_IA64_PALINFO=y -# CONFIG_EFI_VARS is not set -CONFIG_NET=y -CONFIG_SYSVIPC=y -# CONFIG_BSD_PROCESS_ACCT is not set -CONFIG_SYSCTL=y -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set -# CONFIG_ACPI_DEBUG is not set -# CONFIG_ACPI_BUSMGR is not set -# CONFIG_ACPI_SYS is not set -# CONFIG_ACPI_CPU is not set -# CONFIG_ACPI_BUTTON is not set -# CONFIG_ACPI_AC is not set -# CONFIG_ACPI_EC is not set -# CONFIG_ACPI_CMBATT is not set -# CONFIG_ACPI_THERMAL is not set -CONFIG_PCI=y -# CONFIG_PCI_NAMES is not set -# CONFIG_HOTPLUG is not set -# CONFIG_PCMCIA is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Networking options -# -CONFIG_PACKET=y -# CONFIG_PACKET_MMAP is not set -CONFIG_NETLINK=y -CONFIG_RTNETLINK=y -CONFIG_NETLINK_DEV=y -CONFIG_NETFILTER=y -CONFIG_NETFILTER_DEBUG=y -CONFIG_FILTER=y -CONFIG_UNIX=y -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -# CONFIG_IP_ADVANCED_ROUTER is not set -# CONFIG_IP_PNP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_IP_MROUTE is not set -# CONFIG_ARPD is not set -# CONFIG_INET_ECN is not set -CONFIG_SYN_COOKIES=y - -# -# IP: Netfilter Configuration -# -# CONFIG_IP_NF_CONNTRACK is not set -# CONFIG_IP_NF_QUEUE is not set -# CONFIG_IP_NF_IPTABLES is not set -# CONFIG_IP_NF_COMPAT_IPCHAINS is not set -# CONFIG_IP_NF_COMPAT_IPFWADM is not set -# CONFIG_IPV6 is not set -# CONFIG_KHTTPD is not set -# CONFIG_ATM is not set - -# -# -# -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_DECNET is not set -# CONFIG_BRIDGE is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_LLC is not set -# CONFIG_NET_DIVERT is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_NET_FASTROUTE is not set -# CONFIG_NET_HW_FLOWCONTROL is not set - -# -# QoS and/or fair queueing -# -# CONFIG_NET_SCHED is not set - -# -# Memory Technology Devices (MTD) -# -# CONFIG_MTD is not set - -# -# Plug and Play configuration -# -# CONFIG_PNP is not set -# CONFIG_ISAPNP is not set -# CONFIG_PNPBIOS is not set - -# -# Block devices -# -# CONFIG_BLK_DEV_FD is not set -# CONFIG_BLK_DEV_XD is not set -# CONFIG_PARIDE is not set -# CONFIG_BLK_CPQ_DA is not set -# CONFIG_BLK_CPQ_CISS_DA is not set -# CONFIG_BLK_DEV_DAC960 is not set -CONFIG_BLK_DEV_LOOP=y -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_RAM is not set -# CONFIG_BLK_DEV_INITRD is not set - -# -# I2O device support -# -# CONFIG_I2O is not set -# CONFIG_I2O_PCI is not set -# CONFIG_I2O_BLOCK is not set -# CONFIG_I2O_LAN is not set -# CONFIG_I2O_SCSI is not set -# CONFIG_I2O_PROC is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set -# CONFIG_BLK_DEV_MD is not set -# CONFIG_MD_LINEAR is not set -# CONFIG_MD_RAID0 is not set -# CONFIG_MD_RAID1 is not set -# CONFIG_MD_RAID5 is not set -# CONFIG_MD_MULTIPATH is not set -# CONFIG_BLK_DEV_LVM is not set - -# -# ATA/IDE/MFM/RLL support -# -CONFIG_IDE=y - -# -# IDE, ATA and ATAPI Block devices -# -CONFIG_BLK_DEV_IDE=y - -# -# Please see Documentation/ide.txt for help/info on IDE drives -# -# CONFIG_BLK_DEV_HD_IDE is not set -# CONFIG_BLK_DEV_HD is not set -CONFIG_BLK_DEV_IDEDISK=y -# CONFIG_IDEDISK_MULTI_MODE is not set -# CONFIG_BLK_DEV_IDECS is not set -# CONFIG_BLK_DEV_IDECD is not set -# CONFIG_BLK_DEV_IDETAPE is not set -# CONFIG_BLK_DEV_IDEFLOPPY is not set -# CONFIG_BLK_DEV_IDESCSI is not set - -# -# IDE chipset support/bugfixes -# -# CONFIG_BLK_DEV_CMD640 is not set -# CONFIG_BLK_DEV_CMD640_ENHANCED is not set -# CONFIG_BLK_DEV_ISAPNP is not set -# CONFIG_BLK_DEV_RZ1000 is not set -# CONFIG_IDE_CHIPSETS is not set -# CONFIG_IDEDMA_AUTO is not set -# CONFIG_BLK_DEV_IDE_MODES is not set -# CONFIG_BLK_DEV_ATARAID is not set -# CONFIG_BLK_DEV_ATARAID_PDC is not set -# CONFIG_BLK_DEV_ATARAID_HPT is not set - -# -# Alternate 1394 support -# -# CONFIG_X1394 is not set - -# -# Alternate SCSI support -# -CONFIG_XSCSI=y - -# -# Alternate SCSI support -# -CONFIG_XSCSI_DKSC=y -# CONFIG_XSCSI_QLFC is not set -# CONFIG_XSCSI_QL is not set -# CONFIG_XSCSI_SBP2 is not set - -# -# SCSI support -# -CONFIG_SCSI=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -CONFIG_SD_EXTRA_DEVS=40 -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -# CONFIG_BLK_DEV_SR is not set -# CONFIG_CHR_DEV_SG is not set - -# -# Some SCSI devices (e.g. CD jukebox) support multiple LUNs -# -# CONFIG_SCSI_DEBUG_QUEUES is not set -# CONFIG_SCSI_MULTI_LUN is not set -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set - -# -# SCSI low-level drivers -# -# CONFIG_BLK_DEV_3W_XXXX_RAID is not set -# CONFIG_SCSI_7000FASST is not set -# CONFIG_SCSI_ACARD is not set -# CONFIG_SCSI_AHA152X is not set -# CONFIG_SCSI_AHA1542 is not set -# CONFIG_SCSI_AHA1740 is not set -# CONFIG_SCSI_AIC7XXX is not set -# CONFIG_SCSI_AIC7XXX_OLD is not set -# CONFIG_SCSI_DPT_I2O is not set -# CONFIG_SCSI_ADVANSYS is not set -# CONFIG_SCSI_IN2000 is not set -# CONFIG_SCSI_AM53C974 is not set -# CONFIG_SCSI_MEGARAID is not set -# CONFIG_SCSI_BUSLOGIC is not set -# CONFIG_SCSI_CPQFCTS is not set -# CONFIG_SCSI_DMX3191D is not set -# CONFIG_SCSI_DTC3280 is not set -# CONFIG_SCSI_EATA is not set -# CONFIG_SCSI_EATA_DMA is not set -# CONFIG_SCSI_EATA_PIO is not set -# CONFIG_SCSI_FUTURE_DOMAIN is not set -# CONFIG_SCSI_GDTH is not set -# CONFIG_SCSI_GENERIC_NCR5380 is not set -# CONFIG_SCSI_INITIO is not set -# CONFIG_SCSI_INIA100 is not set -# CONFIG_SCSI_NCR53C406A is not set -# CONFIG_SCSI_NCR53C7xx is not set -# CONFIG_SCSI_NCR53C8XX is not set -# CONFIG_SCSI_SYM53C8XX is not set -# CONFIG_SCSI_PAS16 is not set -# CONFIG_SCSI_PCI2000 is not set -# CONFIG_SCSI_PCI2220I is not set -# CONFIG_SCSI_PSI240I is not set -# CONFIG_SCSI_QLOGIC_FAS is not set -# CONFIG_SCSI_QLOGIC_ISP is not set -CONFIG_SCSI_QLOGIC_FC=y -# CONFIG_SCSI_QLOGIC_FC_FIRMWARE is not set -# CONFIG_SCSI_QLOGIC_1280 is not set -# CONFIG_SCSI_QLOGIC_QLA2100 is not set -# CONFIG_SCSI_SIM710 is not set -# CONFIG_SCSI_SYM53C416 is not set -# CONFIG_SCSI_DC390T is not set -# CONFIG_SCSI_T128 is not set -# CONFIG_SCSI_U14_34F is not set -# CONFIG_SCSI_DEBUG is not set - -# -# Network device support -# -CONFIG_NETDEVICES=y - -# -# ARCnet devices -# -# CONFIG_ARCNET is not set -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set -# CONFIG_ETHERTAP is not set - -# -# Ethernet (10 or 100Mbit) -# -CONFIG_NET_ETHERNET=y -# CONFIG_SUNLANCE is not set -# CONFIG_HAPPYMEAL is not set -# CONFIG_SUNBMAC is not set -# CONFIG_SUNQE is not set -# CONFIG_SUNLANCE is not set -# CONFIG_SUNGEM is not set -# CONFIG_NET_VENDOR_3COM is not set -# CONFIG_LANCE is not set -# CONFIG_NET_VENDOR_SMC is not set -# CONFIG_NET_VENDOR_RACAL is not set -# CONFIG_HP100 is not set -# CONFIG_NET_ISA is not set -# CONFIG_NET_PCI is not set -# CONFIG_NET_POCKET is not set - -# -# Ethernet (1000 Mbit) -# -# CONFIG_ACENIC is not set -# CONFIG_DL2K is not set -# CONFIG_MYRI_SBUS is not set -# CONFIG_NS83820 is not set -# CONFIG_HAMACHI is not set -# CONFIG_YELLOWFIN is not set -# CONFIG_SK98LIN is not set -# CONFIG_FDDI is not set -# CONFIG_HIPPI is not set -# CONFIG_PLIP is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set - -# -# Wireless LAN (non-hamradio) -# -# CONFIG_NET_RADIO is not set - -# -# Token Ring devices -# -# CONFIG_TR is not set -# CONFIG_NET_FC is not set -# CONFIG_RCPCI is not set -# CONFIG_SHAPER is not set - -# -# Wan interfaces -# -# CONFIG_WAN is not set - -# -# Amateur Radio support -# -# CONFIG_HAMRADIO is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# CD-ROM drivers (not for SCSI or IDE/ATAPI drives) -# -# CONFIG_CD_NO_IDESCSI is not set - -# -# Input core support -# -# CONFIG_INPUT is not set -# CONFIG_INPUT_KEYBDEV is not set -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_EVDEV is not set - -# -# Character devices -# -# CONFIG_VT is not set -CONFIG_SERIAL=y -# CONFIG_SERIAL_CONSOLE is not set -# CONFIG_SERIAL_EXTENDED is not set -# CONFIG_SERIAL_NONSTANDARD is not set -CONFIG_UNIX98_PTYS=y -CONFIG_UNIX98_PTY_COUNT=256 - -# -# I2C support -# -# CONFIG_I2C is not set - -# -# Mice -# -# CONFIG_BUSMOUSE is not set -# CONFIG_MOUSE is not set - -# -# Joysticks -# -# CONFIG_INPUT_GAMEPORT is not set - -# -# Input core support is needed for gameports -# - -# -# Input core support is needed for joysticks -# -# CONFIG_QIC02_TAPE is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_INTEL_RNG is not set -# CONFIG_NVRAM is not set -# CONFIG_RTC is not set -CONFIG_EFI_RTC=y -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_FTAPE is not set -# CONFIG_AGP is not set -# CONFIG_DRM is not set -# CONFIG_MWAVE is not set - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# File systems -# -CONFIG_QUOTA=y -CONFIG_AUTOFS_FS=y -CONFIG_AUTOFS4_FS=y -# CONFIG_REISERFS_FS is not set -# CONFIG_REISERFS_CHECK is not set -# CONFIG_ADFS_FS is not set -# CONFIG_ADFS_FS_RW is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_BFS_FS is not set -CONFIG_FAT_FS=y -CONFIG_MSDOS_FS=y -# CONFIG_UMSDOS_FS is not set -CONFIG_VFAT_FS=y -# CONFIG_EFS_FS is not set -# CONFIG_JFFS_FS is not set -# CONFIG_JFFS2_FS is not set -# CONFIG_CRAMFS is not set -CONFIG_TMPFS=y -# CONFIG_RAMFS is not set -CONFIG_ISO9660_FS=y -# CONFIG_JOLIET is not set -# CONFIG_MINIX_FS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_NTFS_FS is not set -# CONFIG_NTFS_DEBUG is not set -# CONFIG_NTFS_RW is not set -# CONFIG_HPFS_FS is not set -CONFIG_PROC_FS=y -CONFIG_DEVFS_FS=y -CONFIG_DEVFS_MOUNT=y -CONFIG_DEVFS_DEBUG=y -CONFIG_DEVPTS_FS=y -# CONFIG_QNX4FS_FS is not set -# CONFIG_QNX4FS_RW is not set -# CONFIG_ROMFS_FS is not set -CONFIG_EXT2_FS=y -# CONFIG_SYSV_FS is not set -# CONFIG_UDF_FS is not set -# CONFIG_UDF_RW is not set -# CONFIG_UFS_FS is not set -# CONFIG_UFS_FS_WRITE is not set -CONFIG_XFS_SUPPORT=y - -# -# Network File Systems -# -# CONFIG_CODA_FS is not set -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -# CONFIG_ROOT_NFS is not set -CONFIG_NFSD=y -CONFIG_NFSD_V3=y -CONFIG_SUNRPC=y -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -# CONFIG_SMB_FS is not set -# CONFIG_NCP_FS is not set -# CONFIG_NCPFS_PACKET_SIGNING is not set -# CONFIG_NCPFS_IOCTL_LOCKING is not set -# CONFIG_NCPFS_STRONG is not set -# CONFIG_NCPFS_NFS_NS is not set -# CONFIG_NCPFS_OS2_NS is not set -# CONFIG_NCPFS_SMALLDOS is not set -# CONFIG_NCPFS_NLS is not set -# CONFIG_NCPFS_EXTRAS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y -# CONFIG_SMB_NLS is not set -CONFIG_NLS=y - -# -# Native Language Support -# -CONFIG_NLS_DEFAULT="n" -# CONFIG_NLS_CODEPAGE_437 is not set -# CONFIG_NLS_CODEPAGE_737 is not set -# CONFIG_NLS_CODEPAGE_775 is not set -# CONFIG_NLS_CODEPAGE_850 is not set -# CONFIG_NLS_CODEPAGE_852 is not set -# CONFIG_NLS_CODEPAGE_855 is not set -# CONFIG_NLS_CODEPAGE_857 is not set -# CONFIG_NLS_CODEPAGE_860 is not set -# CONFIG_NLS_CODEPAGE_861 is not set -# CONFIG_NLS_CODEPAGE_862 is not set -# CONFIG_NLS_CODEPAGE_863 is not set -# CONFIG_NLS_CODEPAGE_864 is not set -# CONFIG_NLS_CODEPAGE_865 is not set -# CONFIG_NLS_CODEPAGE_866 is not set -# CONFIG_NLS_CODEPAGE_869 is not set -# CONFIG_NLS_CODEPAGE_936 is not set -# CONFIG_NLS_CODEPAGE_950 is not set -# CONFIG_NLS_CODEPAGE_932 is not set -# CONFIG_NLS_CODEPAGE_949 is not set -# CONFIG_NLS_CODEPAGE_874 is not set -# CONFIG_NLS_ISO8859_8 is not set -# CONFIG_NLS_CODEPAGE_1251 is not set -# CONFIG_NLS_ISO8859_1 is not set -# CONFIG_NLS_ISO8859_2 is not set -# CONFIG_NLS_ISO8859_3 is not set -# CONFIG_NLS_ISO8859_4 is not set -# CONFIG_NLS_ISO8859_5 is not set -# CONFIG_NLS_ISO8859_6 is not set -# CONFIG_NLS_ISO8859_7 is not set -# CONFIG_NLS_ISO8859_9 is not set -# CONFIG_NLS_ISO8859_13 is not set -# CONFIG_NLS_ISO8859_14 is not set -# CONFIG_NLS_ISO8859_15 is not set -# CONFIG_NLS_KOI8_R is not set -# CONFIG_NLS_KOI8_U is not set -# CONFIG_NLS_UTF8 is not set - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# -# CONFIG_USB is not set - -# -# USB Controllers -# -# CONFIG_USB_UHCI is not set -# CONFIG_USB_UHCI_ALT is not set -# CONFIG_USB_OHCI is not set - -# -# USB Device Class drivers -# -# CONFIG_USB_AUDIO is not set -# CONFIG_USB_BLUETOOTH is not set -# CONFIG_USB_STORAGE is not set -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_DPCM is not set -# CONFIG_USB_STORAGE_HP8200e is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_ACM is not set -# CONFIG_USB_PRINTER is not set - -# -# USB Human Interface Devices (HID) -# - -# -# Input core support is needed for USB HID -# - -# -# USB Imaging devices -# -# CONFIG_USB_DC2XX is not set -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_SCANNER is not set -# CONFIG_USB_MICROTEK is not set -# CONFIG_USB_HPUSBSCSI is not set - -# -# USB Multimedia devices -# - -# -# Video4Linux support is needed for USB Multimedia device support -# - -# -# USB Network adaptors -# -# CONFIG_USB_PEGASUS is not set -# CONFIG_USB_KAWETH is not set -# CONFIG_USB_CATC is not set -# CONFIG_USB_CDCETHER is not set -# CONFIG_USB_USBNET is not set - -# -# USB port drivers -# -# CONFIG_USB_USS720 is not set - -# -# USB Serial Converter support -# -# CONFIG_USB_SERIAL is not set -# CONFIG_USB_SERIAL_GENERIC is not set -# CONFIG_USB_SERIAL_BELKIN is not set -# CONFIG_USB_SERIAL_WHITEHEAT is not set -# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set -# CONFIG_USB_SERIAL_EMPEG is not set -# CONFIG_USB_SERIAL_FTDI_SIO is not set -# CONFIG_USB_SERIAL_VISOR is not set -# CONFIG_USB_SERIAL_IR is not set -# CONFIG_USB_SERIAL_EDGEPORT is not set -# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set -# CONFIG_USB_SERIAL_KEYSPAN is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set -# CONFIG_USB_SERIAL_MCT_U232 is not set -# CONFIG_USB_SERIAL_PL2303 is not set -# CONFIG_USB_SERIAL_CYBERJACK is not set -# CONFIG_USB_SERIAL_XIRCOM is not set -# CONFIG_USB_SERIAL_OMNINET is not set - -# -# USB Miscellaneous drivers -# -# CONFIG_USB_RIO500 is not set - -# -# IEEE 1394 (FireWire) support (EXPERIMENTAL) -# -# CONFIG_IEEE1394 is not set - -# -# Bluetooth support -# -# CONFIG_BT is not set - -# -# Kernel hacking -# -CONFIG_DEBUG_KERNEL=y -CONFIG_IA64_PRINT_HAZARDS=y -# CONFIG_DISABLE_VHPT is not set -CONFIG_MAGIC_SYSRQ=y -CONFIG_IA64_EARLY_PRINTK=y -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_IA64_DEBUG_CMPXCHG is not set -# CONFIG_IA64_DEBUG_IRQ is not set -# CONFIG_KDB is not set -# CONFIG_KDB_MODULES is not set -CONFIG_KALLSYMS=y diff -Nru a/arch/ia64/sn/configs/sn2/defconfig-sn2-prom-medusa b/arch/ia64/sn/configs/sn2/defconfig-sn2-prom-medusa --- a/arch/ia64/sn/configs/sn2/defconfig-sn2-prom-medusa Mon Dec 23 21:21:53 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,527 +0,0 @@ -# -# Automatically generated make config: don't edit -# - -# -# Code maturity level options -# -CONFIG_EXPERIMENTAL=y - -# -# Loadable module support -# -# CONFIG_MODULES is not set - -# -# General setup -# -CONFIG_IA64=y -# CONFIG_ISA is not set -# CONFIG_EISA is not set -# CONFIG_MCA is not set -# CONFIG_SBUS is not set -CONFIG_RWSEM_GENERIC_SPINLOCK=y -# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set -CONFIG_ACPI=y -CONFIG_ACPI_EFI=y -CONFIG_ACPI_INTERPRETER=y -CONFIG_ACPI_KERNEL_CONFIG=y -# CONFIG_ITANIUM is not set -CONFIG_MCKINLEY=y -# CONFIG_IA64_GENERIC is not set -# CONFIG_IA64_DIG is not set -# CONFIG_IA64_HP_SIM is not set -# CONFIG_IA64_SGI_SN1 is not set -CONFIG_IA64_SGI_SN2=y -# CONFIG_IA64_PAGE_SIZE_4KB is not set -# CONFIG_IA64_PAGE_SIZE_8KB is not set -CONFIG_IA64_PAGE_SIZE_16KB=y -# CONFIG_IA64_PAGE_SIZE_64KB is not set -CONFIG_IA64_L1_CACHE_SHIFT=7 -CONFIG_MCKINLEY_ASTEP_SPECIFIC=y -CONFIG_MCKINLEY_A0_SPECIFIC=y -CONFIG_IA64_SGI_SN=y -CONFIG_IA64_SGI_SN_DEBUG=y -CONFIG_IA64_SGI_SN_SIM=y -CONFIG_IA64_SGI_AUTOTEST=y -CONFIG_DEVFS_FS=y -CONFIG_DEVFS_DEBUG=y -CONFIG_SERIAL_SGI_L1_PROTOCOL=y -CONFIG_DISCONTIGMEM=y -CONFIG_IA64_MCA=y -CONFIG_NUMA=y -CONFIG_PERCPU_IRQ=y -CONFIG_PCIBA=y -CONFIG_KCORE_ELF=y -CONFIG_SMP=y -# CONFIG_IA32_SUPPORT is not set -CONFIG_PERFMON=y -CONFIG_IA64_PALINFO=y -# CONFIG_EFI_VARS is not set -# CONFIG_NET is not set -CONFIG_SYSVIPC=y -# CONFIG_BSD_PROCESS_ACCT is not set -CONFIG_SYSCTL=y -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set -# CONFIG_ACPI_DEBUG is not set -# CONFIG_ACPI_BUSMGR is not set -# CONFIG_ACPI_SYS is not set -# CONFIG_ACPI_CPU is not set -# CONFIG_ACPI_BUTTON is not set -# CONFIG_ACPI_AC is not set -# CONFIG_ACPI_EC is not set -# CONFIG_ACPI_CMBATT is not set -# CONFIG_ACPI_THERMAL is not set -CONFIG_PCI=y -# CONFIG_PCI_NAMES is not set -# CONFIG_HOTPLUG is not set -# CONFIG_PCMCIA is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Memory Technology Devices (MTD) -# -# CONFIG_MTD is not set - -# -# Plug and Play configuration -# -# CONFIG_PNP is not set -# CONFIG_ISAPNP is not set -# CONFIG_PNPBIOS is not set - -# -# Block devices -# -# CONFIG_BLK_DEV_FD is not set -# CONFIG_BLK_DEV_XD is not set -# CONFIG_PARIDE is not set -# CONFIG_BLK_CPQ_DA is not set -# CONFIG_BLK_CPQ_CISS_DA is not set -# CONFIG_BLK_DEV_DAC960 is not set -# CONFIG_BLK_DEV_LOOP is not set -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_RAM is not set -# CONFIG_BLK_DEV_INITRD is not set - -# -# I2O device support -# -# CONFIG_I2O is not set -# CONFIG_I2O_PCI is not set -# CONFIG_I2O_BLOCK is not set -# CONFIG_I2O_SCSI is not set -# CONFIG_I2O_PROC is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set -# CONFIG_BLK_DEV_MD is not set -# CONFIG_MD_LINEAR is not set -# CONFIG_MD_RAID0 is not set -# CONFIG_MD_RAID1 is not set -# CONFIG_MD_RAID5 is not set -# CONFIG_MD_MULTIPATH is not set -# CONFIG_BLK_DEV_LVM is not set - -# -# ATA/IDE/MFM/RLL support -# -CONFIG_IDE=y - -# -# IDE, ATA and ATAPI Block devices -# -CONFIG_BLK_DEV_IDE=y - -# -# Please see Documentation/ide.txt for help/info on IDE drives -# -# CONFIG_BLK_DEV_HD_IDE is not set -# CONFIG_BLK_DEV_HD is not set -CONFIG_BLK_DEV_IDEDISK=y -# CONFIG_IDEDISK_MULTI_MODE is not set -# CONFIG_BLK_DEV_IDECS is not set -# CONFIG_BLK_DEV_IDECD is not set -# CONFIG_BLK_DEV_IDETAPE is not set -# CONFIG_BLK_DEV_IDEFLOPPY is not set -# CONFIG_BLK_DEV_IDESCSI is not set - -# -# IDE chipset support/bugfixes -# -# CONFIG_BLK_DEV_CMD640 is not set -# CONFIG_BLK_DEV_CMD640_ENHANCED is not set -# CONFIG_BLK_DEV_ISAPNP is not set -# CONFIG_BLK_DEV_RZ1000 is not set -# CONFIG_IDE_CHIPSETS is not set -# CONFIG_IDEDMA_AUTO is not set -# CONFIG_BLK_DEV_IDE_MODES is not set -# CONFIG_BLK_DEV_ATARAID is not set -# CONFIG_BLK_DEV_ATARAID_PDC is not set -# CONFIG_BLK_DEV_ATARAID_HPT is not set - -# -# Alternate 1394 support -# -# CONFIG_X1394 is not set - -# -# Alternate SCSI support -# -CONFIG_XSCSI=y - -# -# Alternate SCSI support -# -CONFIG_XSCSI_DKSC=y -# CONFIG_XSCSI_QLFC is not set -# CONFIG_XSCSI_QL is not set -# CONFIG_XSCSI_SBP2 is not set - -# -# SCSI support -# -CONFIG_SCSI=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -CONFIG_SD_EXTRA_DEVS=40 -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -# CONFIG_BLK_DEV_SR is not set -# CONFIG_CHR_DEV_SG is not set - -# -# Some SCSI devices (e.g. CD jukebox) support multiple LUNs -# -# CONFIG_SCSI_DEBUG_QUEUES is not set -# CONFIG_SCSI_MULTI_LUN is not set -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set - -# -# SCSI low-level drivers -# -# CONFIG_BLK_DEV_3W_XXXX_RAID is not set -# CONFIG_SCSI_7000FASST is not set -# CONFIG_SCSI_ACARD is not set -# CONFIG_SCSI_AHA152X is not set -# CONFIG_SCSI_AHA1542 is not set -# CONFIG_SCSI_AHA1740 is not set -# CONFIG_SCSI_AIC7XXX is not set -# CONFIG_SCSI_AIC7XXX_OLD is not set -# CONFIG_SCSI_DPT_I2O is not set -# CONFIG_SCSI_ADVANSYS is not set -# CONFIG_SCSI_IN2000 is not set -# CONFIG_SCSI_AM53C974 is not set -# CONFIG_SCSI_MEGARAID is not set -# CONFIG_SCSI_BUSLOGIC is not set -# CONFIG_SCSI_CPQFCTS is not set -# CONFIG_SCSI_DMX3191D is not set -# CONFIG_SCSI_DTC3280 is not set -# CONFIG_SCSI_EATA is not set -# CONFIG_SCSI_EATA_DMA is not set -# CONFIG_SCSI_EATA_PIO is not set -# CONFIG_SCSI_FUTURE_DOMAIN is not set -# CONFIG_SCSI_GDTH is not set -# CONFIG_SCSI_GENERIC_NCR5380 is not set -# CONFIG_SCSI_INITIO is not set -# CONFIG_SCSI_INIA100 is not set -# CONFIG_SCSI_NCR53C406A is not set -# CONFIG_SCSI_NCR53C7xx is not set -# CONFIG_SCSI_NCR53C8XX is not set -# CONFIG_SCSI_SYM53C8XX is not set -# CONFIG_SCSI_PAS16 is not set -# CONFIG_SCSI_PCI2000 is not set -# CONFIG_SCSI_PCI2220I is not set -# CONFIG_SCSI_PSI240I is not set -# CONFIG_SCSI_QLOGIC_FAS is not set -# CONFIG_SCSI_QLOGIC_ISP is not set -CONFIG_SCSI_QLOGIC_FC=y -# CONFIG_SCSI_QLOGIC_FC_FIRMWARE is not set -# CONFIG_SCSI_QLOGIC_1280 is not set -# CONFIG_SCSI_QLOGIC_QLA2100 is not set -# CONFIG_SCSI_SIM710 is not set -# CONFIG_SCSI_SYM53C416 is not set -# CONFIG_SCSI_DC390T is not set -# CONFIG_SCSI_T128 is not set -# CONFIG_SCSI_U14_34F is not set -# CONFIG_SCSI_DEBUG is not set - -# -# Amateur Radio support -# -# CONFIG_HAMRADIO is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# CD-ROM drivers (not for SCSI or IDE/ATAPI drives) -# -# CONFIG_CD_NO_IDESCSI is not set - -# -# Input core support -# -# CONFIG_INPUT is not set -# CONFIG_INPUT_KEYBDEV is not set -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_EVDEV is not set - -# -# Character devices -# -# CONFIG_VT is not set -CONFIG_SERIAL=y -# CONFIG_SERIAL_CONSOLE is not set -# CONFIG_SERIAL_EXTENDED is not set -# CONFIG_SERIAL_NONSTANDARD is not set -CONFIG_UNIX98_PTYS=y -CONFIG_UNIX98_PTY_COUNT=256 - -# -# I2C support -# -# CONFIG_I2C is not set - -# -# Mice -# -# CONFIG_BUSMOUSE is not set -# CONFIG_MOUSE is not set - -# -# Joysticks -# -# CONFIG_INPUT_GAMEPORT is not set - -# -# Input core support is needed for gameports -# - -# -# Input core support is needed for joysticks -# -# CONFIG_QIC02_TAPE is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_INTEL_RNG is not set -# CONFIG_NVRAM is not set -# CONFIG_RTC is not set -# CONFIG_EFI_RTC is not set -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_FTAPE is not set -# CONFIG_AGP is not set -# CONFIG_DRM is not set -# CONFIG_MWAVE is not set - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# File systems -# -# CONFIG_QUOTA is not set -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set -# CONFIG_REISERFS_FS is not set -# CONFIG_REISERFS_CHECK is not set -# CONFIG_ADFS_FS is not set -# CONFIG_ADFS_FS_RW is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_FAT_FS is not set -# CONFIG_MSDOS_FS is not set -# CONFIG_UMSDOS_FS is not set -# CONFIG_VFAT_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_JFFS_FS is not set -# CONFIG_JFFS2_FS is not set -# CONFIG_CRAMFS is not set -CONFIG_TMPFS=y -# CONFIG_RAMFS is not set -# CONFIG_ISO9660_FS is not set -# CONFIG_JOLIET is not set -# CONFIG_MINIX_FS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_NTFS_FS is not set -# CONFIG_NTFS_DEBUG is not set -# CONFIG_NTFS_RW is not set -# CONFIG_HPFS_FS is not set -CONFIG_PROC_FS=y -CONFIG_DEVFS_FS=y -CONFIG_DEVFS_MOUNT=y -CONFIG_DEVFS_DEBUG=y -CONFIG_DEVPTS_FS=y -# CONFIG_QNX4FS_FS is not set -# CONFIG_QNX4FS_RW is not set -# CONFIG_ROMFS_FS is not set -CONFIG_EXT2_FS=y -# CONFIG_SYSV_FS is not set -# CONFIG_UDF_FS is not set -# CONFIG_UDF_RW is not set -# CONFIG_UFS_FS is not set -# CONFIG_UFS_FS_WRITE is not set -CONFIG_XFS_SUPPORT=y -# CONFIG_NCPFS_NLS is not set -# CONFIG_SMB_FS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y -# CONFIG_SMB_NLS is not set -# CONFIG_NLS is not set - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# -# CONFIG_USB is not set - -# -# USB Controllers -# -# CONFIG_USB_UHCI is not set -# CONFIG_USB_UHCI_ALT is not set -# CONFIG_USB_OHCI is not set - -# -# USB Device Class drivers -# -# CONFIG_USB_AUDIO is not set -# CONFIG_USB_BLUETOOTH is not set -# CONFIG_USB_STORAGE is not set -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_DPCM is not set -# CONFIG_USB_STORAGE_HP8200e is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_ACM is not set -# CONFIG_USB_PRINTER is not set - -# -# USB Human Interface Devices (HID) -# - -# -# Input core support is needed for USB HID -# - -# -# USB Imaging devices -# -# CONFIG_USB_DC2XX is not set -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_SCANNER is not set -# CONFIG_USB_MICROTEK is not set -# CONFIG_USB_HPUSBSCSI is not set - -# -# USB Multimedia devices -# - -# -# Video4Linux support is needed for USB Multimedia device support -# - -# -# USB Network adaptors -# - -# -# Networking support is needed for USB Networking device support -# - -# -# USB port drivers -# -# CONFIG_USB_USS720 is not set - -# -# USB Serial Converter support -# -# CONFIG_USB_SERIAL is not set -# CONFIG_USB_SERIAL_GENERIC is not set -# CONFIG_USB_SERIAL_BELKIN is not set -# CONFIG_USB_SERIAL_WHITEHEAT is not set -# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set -# CONFIG_USB_SERIAL_EMPEG is not set -# CONFIG_USB_SERIAL_FTDI_SIO is not set -# CONFIG_USB_SERIAL_VISOR is not set -# CONFIG_USB_SERIAL_IR is not set -# CONFIG_USB_SERIAL_EDGEPORT is not set -# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set -# CONFIG_USB_SERIAL_KEYSPAN is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set -# CONFIG_USB_SERIAL_MCT_U232 is not set -# CONFIG_USB_SERIAL_PL2303 is not set -# CONFIG_USB_SERIAL_CYBERJACK is not set -# CONFIG_USB_SERIAL_XIRCOM is not set -# CONFIG_USB_SERIAL_OMNINET is not set - -# -# USB Miscellaneous drivers -# -# CONFIG_USB_RIO500 is not set - -# -# IEEE 1394 (FireWire) support (EXPERIMENTAL) -# -# CONFIG_IEEE1394 is not set - -# -# Kernel hacking -# -CONFIG_DEBUG_KERNEL=y -CONFIG_IA64_PRINT_HAZARDS=y -# CONFIG_DISABLE_VHPT is not set -CONFIG_MAGIC_SYSRQ=y -CONFIG_IA64_EARLY_PRINTK=y -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_IA64_DEBUG_CMPXCHG is not set -# CONFIG_IA64_DEBUG_IRQ is not set -# CONFIG_KDB is not set -# CONFIG_KDB_MODULES is not set -# CONFIG_KALLSYMS is not set diff -Nru a/arch/ia64/sn/configs/sn2/defconfig-sn2-sp b/arch/ia64/sn/configs/sn2/defconfig-sn2-sp --- a/arch/ia64/sn/configs/sn2/defconfig-sn2-sp Mon Dec 23 21:21:51 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,720 +0,0 @@ -# -# Automatically generated make config: don't edit -# - -# -# Code maturity level options -# -CONFIG_EXPERIMENTAL=y - -# -# Loadable module support -# -# CONFIG_MODULES is not set - -# -# General setup -# -CONFIG_IA64=y -# CONFIG_ISA is not set -# CONFIG_EISA is not set -# CONFIG_MCA is not set -# CONFIG_SBUS is not set -CONFIG_RWSEM_GENERIC_SPINLOCK=y -# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set -CONFIG_ACPI=y -CONFIG_ACPI_EFI=y -CONFIG_ACPI_INTERPRETER=y -CONFIG_ACPI_KERNEL_CONFIG=y -# CONFIG_ITANIUM is not set -CONFIG_MCKINLEY=y -# CONFIG_IA64_GENERIC is not set -# CONFIG_IA64_DIG is not set -# CONFIG_IA64_HP_SIM is not set -# CONFIG_IA64_SGI_SN1 is not set -CONFIG_IA64_SGI_SN2=y -# CONFIG_IA64_PAGE_SIZE_4KB is not set -# CONFIG_IA64_PAGE_SIZE_8KB is not set -CONFIG_IA64_PAGE_SIZE_16KB=y -# CONFIG_IA64_PAGE_SIZE_64KB is not set -CONFIG_IA64_L1_CACHE_SHIFT=7 -CONFIG_MCKINLEY_ASTEP_SPECIFIC=y -CONFIG_MCKINLEY_A0_SPECIFIC=y -CONFIG_IA64_SGI_SN=y -CONFIG_IA64_SGI_SN_DEBUG=y -CONFIG_IA64_SGI_SN_SIM=y -CONFIG_IA64_SGI_AUTOTEST=y -CONFIG_DEVFS_FS=y -CONFIG_DEVFS_DEBUG=y -CONFIG_SERIAL_SGI_L1_PROTOCOL=y -CONFIG_DISCONTIGMEM=y -CONFIG_IA64_MCA=y -CONFIG_NUMA=y -CONFIG_PERCPU_IRQ=y -CONFIG_PCIBA=y -CONFIG_KCORE_ELF=y -# CONFIG_SMP is not set -CONFIG_IA32_SUPPORT=y -CONFIG_PERFMON=y -CONFIG_IA64_PALINFO=y -# CONFIG_EFI_VARS is not set -CONFIG_NET=y -CONFIG_SYSVIPC=y -# CONFIG_BSD_PROCESS_ACCT is not set -CONFIG_SYSCTL=y -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set -# CONFIG_ACPI_DEBUG is not set -# CONFIG_ACPI_BUSMGR is not set -# CONFIG_ACPI_SYS is not set -# CONFIG_ACPI_CPU is not set -# CONFIG_ACPI_BUTTON is not set -# CONFIG_ACPI_AC is not set -# CONFIG_ACPI_EC is not set -# CONFIG_ACPI_CMBATT is not set -# CONFIG_ACPI_THERMAL is not set -CONFIG_PCI=y -# CONFIG_PCI_NAMES is not set -# CONFIG_HOTPLUG is not set -# CONFIG_PCMCIA is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Networking options -# -CONFIG_PACKET=y -# CONFIG_PACKET_MMAP is not set -CONFIG_NETLINK=y -CONFIG_RTNETLINK=y -CONFIG_NETLINK_DEV=y -CONFIG_NETFILTER=y -CONFIG_NETFILTER_DEBUG=y -CONFIG_FILTER=y -CONFIG_UNIX=y -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -# CONFIG_IP_ADVANCED_ROUTER is not set -# CONFIG_IP_PNP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_IP_MROUTE is not set -# CONFIG_ARPD is not set -# CONFIG_INET_ECN is not set -CONFIG_SYN_COOKIES=y - -# -# IP: Netfilter Configuration -# -# CONFIG_IP_NF_CONNTRACK is not set -# CONFIG_IP_NF_QUEUE is not set -# CONFIG_IP_NF_IPTABLES is not set -# CONFIG_IP_NF_COMPAT_IPCHAINS is not set -# CONFIG_IP_NF_COMPAT_IPFWADM is not set -# CONFIG_IPV6 is not set -# CONFIG_KHTTPD is not set -# CONFIG_ATM is not set - -# -# -# -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_DECNET is not set -# CONFIG_BRIDGE is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_LLC is not set -# CONFIG_NET_DIVERT is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_NET_FASTROUTE is not set -# CONFIG_NET_HW_FLOWCONTROL is not set - -# -# QoS and/or fair queueing -# -# CONFIG_NET_SCHED is not set - -# -# Memory Technology Devices (MTD) -# -# CONFIG_MTD is not set - -# -# Plug and Play configuration -# -# CONFIG_PNP is not set -# CONFIG_ISAPNP is not set -# CONFIG_PNPBIOS is not set - -# -# Block devices -# -# CONFIG_BLK_DEV_FD is not set -# CONFIG_BLK_DEV_XD is not set -# CONFIG_PARIDE is not set -# CONFIG_BLK_CPQ_DA is not set -# CONFIG_BLK_CPQ_CISS_DA is not set -# CONFIG_BLK_DEV_DAC960 is not set -CONFIG_BLK_DEV_LOOP=y -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_RAM is not set -# CONFIG_BLK_DEV_INITRD is not set - -# -# I2O device support -# -# CONFIG_I2O is not set -# CONFIG_I2O_PCI is not set -# CONFIG_I2O_BLOCK is not set -# CONFIG_I2O_LAN is not set -# CONFIG_I2O_SCSI is not set -# CONFIG_I2O_PROC is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set -# CONFIG_BLK_DEV_MD is not set -# CONFIG_MD_LINEAR is not set -# CONFIG_MD_RAID0 is not set -# CONFIG_MD_RAID1 is not set -# CONFIG_MD_RAID5 is not set -# CONFIG_MD_MULTIPATH is not set -# CONFIG_BLK_DEV_LVM is not set - -# -# ATA/IDE/MFM/RLL support -# -CONFIG_IDE=y - -# -# IDE, ATA and ATAPI Block devices -# -CONFIG_BLK_DEV_IDE=y - -# -# Please see Documentation/ide.txt for help/info on IDE drives -# -# CONFIG_BLK_DEV_HD_IDE is not set -# CONFIG_BLK_DEV_HD is not set -CONFIG_BLK_DEV_IDEDISK=y -# CONFIG_IDEDISK_MULTI_MODE is not set -# CONFIG_BLK_DEV_IDECS is not set -# CONFIG_BLK_DEV_IDECD is not set -# CONFIG_BLK_DEV_IDETAPE is not set -# CONFIG_BLK_DEV_IDEFLOPPY is not set -# CONFIG_BLK_DEV_IDESCSI is not set - -# -# IDE chipset support/bugfixes -# -# CONFIG_BLK_DEV_CMD640 is not set -# CONFIG_BLK_DEV_CMD640_ENHANCED is not set -# CONFIG_BLK_DEV_ISAPNP is not set -# CONFIG_BLK_DEV_RZ1000 is not set -# CONFIG_IDE_CHIPSETS is not set -# CONFIG_IDEDMA_AUTO is not set -# CONFIG_BLK_DEV_IDE_MODES is not set -# CONFIG_BLK_DEV_ATARAID is not set -# CONFIG_BLK_DEV_ATARAID_PDC is not set -# CONFIG_BLK_DEV_ATARAID_HPT is not set - -# -# Alternate 1394 support -# -# CONFIG_X1394 is not set - -# -# Alternate SCSI support -# -CONFIG_XSCSI=y - -# -# Alternate SCSI support -# -CONFIG_XSCSI_DKSC=y -# CONFIG_XSCSI_QLFC is not set -# CONFIG_XSCSI_QL is not set -# CONFIG_XSCSI_SBP2 is not set - -# -# SCSI support -# -CONFIG_SCSI=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -CONFIG_SD_EXTRA_DEVS=40 -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -# CONFIG_BLK_DEV_SR is not set -# CONFIG_CHR_DEV_SG is not set - -# -# Some SCSI devices (e.g. CD jukebox) support multiple LUNs -# -# CONFIG_SCSI_DEBUG_QUEUES is not set -# CONFIG_SCSI_MULTI_LUN is not set -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set - -# -# SCSI low-level drivers -# -# CONFIG_BLK_DEV_3W_XXXX_RAID is not set -# CONFIG_SCSI_7000FASST is not set -# CONFIG_SCSI_ACARD is not set -# CONFIG_SCSI_AHA152X is not set -# CONFIG_SCSI_AHA1542 is not set -# CONFIG_SCSI_AHA1740 is not set -# CONFIG_SCSI_AIC7XXX is not set -# CONFIG_SCSI_AIC7XXX_OLD is not set -# CONFIG_SCSI_DPT_I2O is not set -# CONFIG_SCSI_ADVANSYS is not set -# CONFIG_SCSI_IN2000 is not set -# CONFIG_SCSI_AM53C974 is not set -# CONFIG_SCSI_MEGARAID is not set -# CONFIG_SCSI_BUSLOGIC is not set -# CONFIG_SCSI_CPQFCTS is not set -# CONFIG_SCSI_DMX3191D is not set -# CONFIG_SCSI_DTC3280 is not set -# CONFIG_SCSI_EATA is not set -# CONFIG_SCSI_EATA_DMA is not set -# CONFIG_SCSI_EATA_PIO is not set -# CONFIG_SCSI_FUTURE_DOMAIN is not set -# CONFIG_SCSI_GDTH is not set -# CONFIG_SCSI_GENERIC_NCR5380 is not set -# CONFIG_SCSI_INITIO is not set -# CONFIG_SCSI_INIA100 is not set -# CONFIG_SCSI_NCR53C406A is not set -# CONFIG_SCSI_NCR53C7xx is not set -# CONFIG_SCSI_NCR53C8XX is not set -# CONFIG_SCSI_SYM53C8XX is not set -# CONFIG_SCSI_PAS16 is not set -# CONFIG_SCSI_PCI2000 is not set -# CONFIG_SCSI_PCI2220I is not set -# CONFIG_SCSI_PSI240I is not set -# CONFIG_SCSI_QLOGIC_FAS is not set -# CONFIG_SCSI_QLOGIC_ISP is not set -CONFIG_SCSI_QLOGIC_FC=y -# CONFIG_SCSI_QLOGIC_FC_FIRMWARE is not set -# CONFIG_SCSI_QLOGIC_1280 is not set -# CONFIG_SCSI_QLOGIC_QLA2100 is not set -# CONFIG_SCSI_SIM710 is not set -# CONFIG_SCSI_SYM53C416 is not set -# CONFIG_SCSI_DC390T is not set -# CONFIG_SCSI_T128 is not set -# CONFIG_SCSI_U14_34F is not set -# CONFIG_SCSI_DEBUG is not set - -# -# Network device support -# -CONFIG_NETDEVICES=y - -# -# ARCnet devices -# -# CONFIG_ARCNET is not set -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set -# CONFIG_ETHERTAP is not set - -# -# Ethernet (10 or 100Mbit) -# -CONFIG_NET_ETHERNET=y -# CONFIG_SUNLANCE is not set -# CONFIG_HAPPYMEAL is not set -# CONFIG_SUNBMAC is not set -# CONFIG_SUNQE is not set -# CONFIG_SUNLANCE is not set -# CONFIG_SUNGEM is not set -# CONFIG_NET_VENDOR_3COM is not set -# CONFIG_LANCE is not set -# CONFIG_NET_VENDOR_SMC is not set -# CONFIG_NET_VENDOR_RACAL is not set -# CONFIG_HP100 is not set -# CONFIG_NET_ISA is not set -# CONFIG_NET_PCI is not set -# CONFIG_NET_POCKET is not set - -# -# Ethernet (1000 Mbit) -# -# CONFIG_ACENIC is not set -# CONFIG_DL2K is not set -# CONFIG_MYRI_SBUS is not set -# CONFIG_NS83820 is not set -# CONFIG_HAMACHI is not set -# CONFIG_YELLOWFIN is not set -# CONFIG_SK98LIN is not set -# CONFIG_FDDI is not set -# CONFIG_HIPPI is not set -# CONFIG_PLIP is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set - -# -# Wireless LAN (non-hamradio) -# -# CONFIG_NET_RADIO is not set - -# -# Token Ring devices -# -# CONFIG_TR is not set -# CONFIG_NET_FC is not set -# CONFIG_RCPCI is not set -# CONFIG_SHAPER is not set - -# -# Wan interfaces -# -# CONFIG_WAN is not set - -# -# Amateur Radio support -# -# CONFIG_HAMRADIO is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# CD-ROM drivers (not for SCSI or IDE/ATAPI drives) -# -# CONFIG_CD_NO_IDESCSI is not set - -# -# Input core support -# -# CONFIG_INPUT is not set -# CONFIG_INPUT_KEYBDEV is not set -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_EVDEV is not set - -# -# Character devices -# -# CONFIG_VT is not set -CONFIG_SERIAL=y -# CONFIG_SERIAL_CONSOLE is not set -# CONFIG_SERIAL_EXTENDED is not set -# CONFIG_SERIAL_NONSTANDARD is not set -CONFIG_UNIX98_PTYS=y -CONFIG_UNIX98_PTY_COUNT=256 - -# -# I2C support -# -# CONFIG_I2C is not set - -# -# Mice -# -# CONFIG_BUSMOUSE is not set -# CONFIG_MOUSE is not set - -# -# Joysticks -# -# CONFIG_INPUT_GAMEPORT is not set - -# -# Input core support is needed for gameports -# - -# -# Input core support is needed for joysticks -# -# CONFIG_QIC02_TAPE is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_INTEL_RNG is not set -# CONFIG_NVRAM is not set -# CONFIG_RTC is not set -CONFIG_EFI_RTC=y -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_FTAPE is not set -# CONFIG_AGP is not set -# CONFIG_DRM is not set -# CONFIG_MWAVE is not set - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# File systems -# -CONFIG_QUOTA=y -CONFIG_AUTOFS_FS=y -CONFIG_AUTOFS4_FS=y -# CONFIG_REISERFS_FS is not set -# CONFIG_REISERFS_CHECK is not set -# CONFIG_ADFS_FS is not set -# CONFIG_ADFS_FS_RW is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_BFS_FS is not set -CONFIG_FAT_FS=y -CONFIG_MSDOS_FS=y -# CONFIG_UMSDOS_FS is not set -CONFIG_VFAT_FS=y -# CONFIG_EFS_FS is not set -# CONFIG_JFFS_FS is not set -# CONFIG_JFFS2_FS is not set -# CONFIG_CRAMFS is not set -CONFIG_TMPFS=y -# CONFIG_RAMFS is not set -CONFIG_ISO9660_FS=y -# CONFIG_JOLIET is not set -# CONFIG_MINIX_FS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_NTFS_FS is not set -# CONFIG_NTFS_DEBUG is not set -# CONFIG_NTFS_RW is not set -# CONFIG_HPFS_FS is not set -CONFIG_PROC_FS=y -CONFIG_DEVFS_FS=y -CONFIG_DEVFS_MOUNT=y -CONFIG_DEVFS_DEBUG=y -CONFIG_DEVPTS_FS=y -# CONFIG_QNX4FS_FS is not set -# CONFIG_QNX4FS_RW is not set -# CONFIG_ROMFS_FS is not set -CONFIG_EXT2_FS=y -# CONFIG_SYSV_FS is not set -# CONFIG_UDF_FS is not set -# CONFIG_UDF_RW is not set -# CONFIG_UFS_FS is not set -# CONFIG_UFS_FS_WRITE is not set -CONFIG_XFS_SUPPORT=y - -# -# Network File Systems -# -# CONFIG_CODA_FS is not set -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -# CONFIG_ROOT_NFS is not set -CONFIG_NFSD=y -CONFIG_NFSD_V3=y -CONFIG_SUNRPC=y -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -# CONFIG_SMB_FS is not set -# CONFIG_NCP_FS is not set -# CONFIG_NCPFS_PACKET_SIGNING is not set -# CONFIG_NCPFS_IOCTL_LOCKING is not set -# CONFIG_NCPFS_STRONG is not set -# CONFIG_NCPFS_NFS_NS is not set -# CONFIG_NCPFS_OS2_NS is not set -# CONFIG_NCPFS_SMALLDOS is not set -# CONFIG_NCPFS_NLS is not set -# CONFIG_NCPFS_EXTRAS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y -# CONFIG_SMB_NLS is not set -CONFIG_NLS=y - -# -# Native Language Support -# -CONFIG_NLS_DEFAULT="n" -# CONFIG_NLS_CODEPAGE_437 is not set -# CONFIG_NLS_CODEPAGE_737 is not set -# CONFIG_NLS_CODEPAGE_775 is not set -# CONFIG_NLS_CODEPAGE_850 is not set -# CONFIG_NLS_CODEPAGE_852 is not set -# CONFIG_NLS_CODEPAGE_855 is not set -# CONFIG_NLS_CODEPAGE_857 is not set -# CONFIG_NLS_CODEPAGE_860 is not set -# CONFIG_NLS_CODEPAGE_861 is not set -# CONFIG_NLS_CODEPAGE_862 is not set -# CONFIG_NLS_CODEPAGE_863 is not set -# CONFIG_NLS_CODEPAGE_864 is not set -# CONFIG_NLS_CODEPAGE_865 is not set -# CONFIG_NLS_CODEPAGE_866 is not set -# CONFIG_NLS_CODEPAGE_869 is not set -# CONFIG_NLS_CODEPAGE_936 is not set -# CONFIG_NLS_CODEPAGE_950 is not set -# CONFIG_NLS_CODEPAGE_932 is not set -# CONFIG_NLS_CODEPAGE_949 is not set -# CONFIG_NLS_CODEPAGE_874 is not set -# CONFIG_NLS_ISO8859_8 is not set -# CONFIG_NLS_CODEPAGE_1251 is not set -# CONFIG_NLS_ISO8859_1 is not set -# CONFIG_NLS_ISO8859_2 is not set -# CONFIG_NLS_ISO8859_3 is not set -# CONFIG_NLS_ISO8859_4 is not set -# CONFIG_NLS_ISO8859_5 is not set -# CONFIG_NLS_ISO8859_6 is not set -# CONFIG_NLS_ISO8859_7 is not set -# CONFIG_NLS_ISO8859_9 is not set -# CONFIG_NLS_ISO8859_13 is not set -# CONFIG_NLS_ISO8859_14 is not set -# CONFIG_NLS_ISO8859_15 is not set -# CONFIG_NLS_KOI8_R is not set -# CONFIG_NLS_KOI8_U is not set -# CONFIG_NLS_UTF8 is not set - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# -# CONFIG_USB is not set - -# -# USB Controllers -# -# CONFIG_USB_UHCI is not set -# CONFIG_USB_UHCI_ALT is not set -# CONFIG_USB_OHCI is not set - -# -# USB Device Class drivers -# -# CONFIG_USB_AUDIO is not set -# CONFIG_USB_BLUETOOTH is not set -# CONFIG_USB_STORAGE is not set -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_DPCM is not set -# CONFIG_USB_STORAGE_HP8200e is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_ACM is not set -# CONFIG_USB_PRINTER is not set - -# -# USB Human Interface Devices (HID) -# - -# -# Input core support is needed for USB HID -# - -# -# USB Imaging devices -# -# CONFIG_USB_DC2XX is not set -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_SCANNER is not set -# CONFIG_USB_MICROTEK is not set -# CONFIG_USB_HPUSBSCSI is not set - -# -# USB Multimedia devices -# - -# -# Video4Linux support is needed for USB Multimedia device support -# - -# -# USB Network adaptors -# -# CONFIG_USB_PEGASUS is not set -# CONFIG_USB_KAWETH is not set -# CONFIG_USB_CATC is not set -# CONFIG_USB_CDCETHER is not set -# CONFIG_USB_USBNET is not set - -# -# USB port drivers -# -# CONFIG_USB_USS720 is not set - -# -# USB Serial Converter support -# -# CONFIG_USB_SERIAL is not set -# CONFIG_USB_SERIAL_GENERIC is not set -# CONFIG_USB_SERIAL_BELKIN is not set -# CONFIG_USB_SERIAL_WHITEHEAT is not set -# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set -# CONFIG_USB_SERIAL_EMPEG is not set -# CONFIG_USB_SERIAL_FTDI_SIO is not set -# CONFIG_USB_SERIAL_VISOR is not set -# CONFIG_USB_SERIAL_IR is not set -# CONFIG_USB_SERIAL_EDGEPORT is not set -# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set -# CONFIG_USB_SERIAL_KEYSPAN is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set -# CONFIG_USB_SERIAL_MCT_U232 is not set -# CONFIG_USB_SERIAL_PL2303 is not set -# CONFIG_USB_SERIAL_CYBERJACK is not set -# CONFIG_USB_SERIAL_XIRCOM is not set -# CONFIG_USB_SERIAL_OMNINET is not set - -# -# USB Miscellaneous drivers -# -# CONFIG_USB_RIO500 is not set - -# -# IEEE 1394 (FireWire) support (EXPERIMENTAL) -# -# CONFIG_IEEE1394 is not set - -# -# Bluetooth support -# -# CONFIG_BT is not set - -# -# Kernel hacking -# -CONFIG_DEBUG_KERNEL=y -CONFIG_IA64_PRINT_HAZARDS=y -# CONFIG_DISABLE_VHPT is not set -CONFIG_MAGIC_SYSRQ=y -CONFIG_IA64_EARLY_PRINTK=y -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_IA64_DEBUG_CMPXCHG is not set -# CONFIG_IA64_DEBUG_IRQ is not set -# CONFIG_KDB is not set -# CONFIG_KDB_MODULES is not set -CONFIG_KALLSYMS=y diff -Nru a/arch/ia64/sn/fakeprom/Makefile b/arch/ia64/sn/fakeprom/Makefile --- a/arch/ia64/sn/fakeprom/Makefile Mon Dec 23 21:22:00 2002 +++ b/arch/ia64/sn/fakeprom/Makefile Mon Dec 23 21:22:00 2002 @@ -6,15 +6,15 @@ # Copyright (c) 2000-2001 Silicon Graphics, Inc. All rights reserved. # -TOPDIR=../../../.. - -LIB = ../../lib/lib.a - -OBJ=fpromasm.o main.o fw-emu.o fpmem.o klgraph_init.o -obj-y=fprom +obj-y=fpromasm.o main.o fw-emu.o fpmem.o klgraph_init.o fprom: $(OBJ) $(LD) -static -Tfprom.lds -o fprom $(OBJ) $(LIB) + +.S.o: + $(CC) -D__ASSEMBLY__ $(AFLAGS) $(AFLAGS_KERNEL) -c -o $*.o $< +.c.o: + $(CC) $(CFLAGS) $(CFLAGS_KERNEL) -c -o $*.o $< clean: rm -f *.o fprom diff -Nru a/arch/ia64/sn/fakeprom/README b/arch/ia64/sn/fakeprom/README --- a/arch/ia64/sn/fakeprom/README Mon Dec 23 21:22:02 2002 +++ b/arch/ia64/sn/fakeprom/README Mon Dec 23 21:22:02 2002 @@ -71,7 +71,7 @@ 1GB*, where dn is the digit number. The amount of memory is 8MB*2**. (If = 0, the memory size is 0). - SN1 doesn't support dimms this small but small memory systems + SN1 doesnt support dimms this small but small memory systems boot faster on Medusa. diff -Nru a/arch/ia64/sn/fakeprom/fpmem.c b/arch/ia64/sn/fakeprom/fpmem.c --- a/arch/ia64/sn/fakeprom/fpmem.c Mon Dec 23 21:21:53 2002 +++ b/arch/ia64/sn/fakeprom/fpmem.c Mon Dec 23 21:21:53 2002 @@ -54,10 +54,10 @@ #define PROMRESERVED_SIZE (1*MB) #ifdef CONFIG_IA64_SGI_SN1 -#define PHYS_ADDRESS(_n, _x) (((long)_n<<33L) | (long)_x) +#define PHYS_ADDRESS(_n, _x) (((long)_n<<33) | (long)_x) #define MD_BANK_SHFT 30 #else -#define PHYS_ADDRESS(_n, _x) (((long)_n<<38L) | (long)_x | 0x3000000000UL) +#define PHYS_ADDRESS(_n, _x) (((long)_n<<38) | (long)_x | 0x3000000000UL) #define MD_BANK_SHFT 34 #endif @@ -94,7 +94,7 @@ int IsCpuPresent(int cnode, int cpu) { - return sn_memmap[cnode].cpuconfig & (1< 128*1024*1024) { + numbytes -= 1000; + } /* * Check for the node 0 hole. Since banks cant diff -Nru a/arch/ia64/sn/fakeprom/fpmem.h b/arch/ia64/sn/fakeprom/fpmem.h --- a/arch/ia64/sn/fakeprom/fpmem.h Mon Dec 23 21:21:55 2002 +++ b/arch/ia64/sn/fakeprom/fpmem.h Mon Dec 23 21:21:55 2002 @@ -4,7 +4,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 2000-2001 Silicon Graphics, Inc. All rights reserved. + * Copyright (C) 2000-2002 Silicon Graphics, Inc. All rights reserved. */ #include @@ -71,7 +71,8 @@ } node_memmap_t ; #define SN2_BANK_SIZE_SHIFT (MBSHIFT+6) /* 64 MB */ -#define BankSizeBytes(bsize) (1UL<<((bsize)+SN2_BANK_SIZE_SHIFT)) +#define BankPresent(bsize) (bsize<6) +#define BankSizeBytes(bsize) (BankPresent(bsize) ? 1UL<<((bsize)+SN2_BANK_SIZE_SHIFT) : 0) #endif typedef struct sn_memmap_s diff -Nru a/arch/ia64/sn/fakeprom/fpromasm.S b/arch/ia64/sn/fakeprom/fpromasm.S --- a/arch/ia64/sn/fakeprom/fpromasm.S Mon Dec 23 21:21:52 2002 +++ b/arch/ia64/sn/fakeprom/fpromasm.S Mon Dec 23 21:21:52 2002 @@ -180,7 +180,7 @@ // Now call main & pass it the current LID value. - alloc r0=ar.pfs,0,0,2,0 + alloc r2=ar.pfs,0,0,2,0 mov r32=r26 mov r33=r8;; br.call.sptk.few rp=fmain diff -Nru a/arch/ia64/sn/fakeprom/fw-emu.c b/arch/ia64/sn/fakeprom/fw-emu.c --- a/arch/ia64/sn/fakeprom/fw-emu.c Mon Dec 23 21:21:59 2002 +++ b/arch/ia64/sn/fakeprom/fw-emu.c Mon Dec 23 21:21:59 2002 @@ -36,6 +36,7 @@ * http://oss.sgi.com/projects/GenInfo/NoticeExplan */ #include +#include #include #include #include @@ -46,10 +47,26 @@ #include #include #endif -#include +#include #include "fpmem.h" -#define zzACPI_1_0 1 /* Include ACPI 1.0 tables */ +#define RSDP_NAME "RSDP" +#define RSDP_SIG "RSD PTR " /* RSDT Pointer signature */ +#define APIC_SIG "APIC" /* Multiple APIC Description Table */ +#define DSDT_SIG "DSDT" /* Differentiated System Description Table */ +#define FADT_SIG "FACP" /* Fixed ACPI Description Table */ +#define FACS_SIG "FACS" /* Firmware ACPI Control Structure */ +#define PSDT_SIG "PSDT" /* Persistent System Description Table */ +#define RSDT_SIG "RSDT" /* Root System Description Table */ +#define XSDT_SIG "XSDT" /* Extended System Description Table */ +#define SSDT_SIG "SSDT" /* Secondary System Description Table */ +#define SBST_SIG "SBST" /* Smart Battery Specification Table */ +#define SPIC_SIG "SPIC" /* IOSAPIC table */ +#define SRAT_SIG "SRAT" /* SRAT table */ +#define SLIT_SIG "SLIT" /* SLIT table */ +#define BOOT_SIG "BOOT" /* Boot table */ +#define ACPI_SRAT_REVISION 1 +#define ACPI_SLIT_REVISION 1 #define OEMID "SGI" #ifdef CONFIG_IA64_SGI_SN1 @@ -77,11 +94,7 @@ #define CPUS_PER_FSB 2 #define CPUS_PER_FSB_MASK (CPUS_PER_FSB-1) -#ifdef ACPI_1_0 -#define NUM_EFI_DESCS 3 -#else #define NUM_EFI_DESCS 2 -#endif #define RSDP_CHECKSUM_LENGTH 20 @@ -139,22 +152,16 @@ + sizeof(struct ia64_sal_systab) + sizeof(struct ia64_sal_desc_entry_point) + sizeof(struct ia64_sal_desc_ap_wakeup) -#ifdef ACPI_1_0 - + sizeof(acpi_rsdp_t) - + sizeof(acpi_rsdt_t) - + sizeof(acpi_sapic_t) - + MAX_LSAPICS*(sizeof(acpi_entry_lsapic_t)) -#endif - + sizeof(acpi20_rsdp_t) - + sizeof(acpi_xsdt_t) - + sizeof(acpi_slit_t) + + sizeof(struct acpi20_table_rsdp) + + sizeof(struct acpi_table_xsdt) + + sizeof(struct acpi_table_slit) + MAX_SN_NODES*MAX_SN_NODES+8 - + sizeof(acpi_madt_t) + + sizeof(struct acpi_table_madt) + 16*MAX_CPUS + (1+8*MAX_SN_NODES)*(sizeof(efi_memory_desc_t)) - + sizeof(acpi_srat_t) - + MAX_CPUS*sizeof(srat_cpu_affinity_t) - + MAX_SN_NODES*sizeof(srat_memory_affinity_t) + + sizeof(struct acpi_table_srat) + + MAX_CPUS*sizeof(struct acpi_table_processor_affinity) + + MAX_SN_NODES*sizeof(struct acpi_table_memory_affinity) + sizeof(ia64_sal_desc_ptc_t) + + MAX_SN_NODES*sizeof(ia64_sal_ptc_domain_info_t) + + MAX_CPUS*sizeof(ia64_sal_ptc_domain_proc_entry_t) + @@ -280,6 +287,7 @@ } else if (index == SAL_GET_STATE_INFO) { ; } else if (index == SAL_GET_STATE_INFO_SIZE) { + r9 = 10000; ; } else if (index == SAL_CLEAR_STATE_INFO) { ; @@ -328,6 +336,14 @@ } } else if (index == SN_SAL_GET_KLCONFIG_ADDR) { r9 = 0x30000; + } else if (index == SN_SAL_CONSOLE_PUTC) { + status = -1; + } else if (index == SN_SAL_CONSOLE_GETC) { + status = -1; + } else if (index == SN_SAL_CONSOLE_POLL) { + status = -1; + } else if (index == SN_SAL_SYSCTL_IOBRICK_MODULE_GET) { + status = -1; } else { status = -1; } @@ -396,7 +412,7 @@ } void -acpi_table_init(acpi_desc_table_hdr_t *p, char *sig, int siglen, int revision, int oem_revision) +acpi_table_initx(struct acpi_table_header *p, char *sig, int siglen, int revision, int oem_revision) { memcpy(p->signature, sig, siglen); memcpy(p->oem_id, OEMID, 6); @@ -404,12 +420,12 @@ memcpy(p->oem_table_id+4, PRODUCT, 4); p->revision = revision; p->oem_revision = (revision<<16) + oem_revision; - p->creator_id = 1; - p->creator_revision = 1; + memcpy(p->asl_compiler_id, "FPRM", 4); + p->asl_compiler_revision = 1; } void -acpi_checksum(acpi_desc_table_hdr_t *p, int length) +acpi_checksum(struct acpi_table_header *p, int length) { u8 *cp, *cpe, checksum; @@ -422,16 +438,22 @@ } void -acpi_checksum_rsdp20(acpi20_rsdp_t *p, int length) +acpi_checksum_rsdp20(struct acpi20_table_rsdp *p, int length) { u8 *cp, *cpe, checksum; p->checksum = 0; + p->ext_checksum = 0; p->length = length; checksum = 0; - for (cp=(u8*)p, cpe=cp+RSDP_CHECKSUM_LENGTH; cpchecksum = -checksum; + + checksum = 0; + for (cp=(u8*)p, cpe=cp+length; cpext_checksum = -checksum; } int @@ -456,21 +478,15 @@ static ia64_sal_desc_ptc_t *sal_ptc; static ia64_sal_ptc_domain_info_t *sal_ptcdi; static ia64_sal_ptc_domain_proc_entry_t *sal_ptclid; -#ifdef ACPI_1_0 - static acpi_rsdp_t *acpi_rsdp; - static acpi_rsdt_t *acpi_rsdt; - static acpi_sapic_t *acpi_sapic; - static acpi_entry_lsapic_t *acpi_lsapic; -#endif - static acpi20_rsdp_t *acpi20_rsdp; - static acpi_xsdt_t *acpi_xsdt; - static acpi_slit_t *acpi_slit; - static acpi_madt_t *acpi_madt; - static acpi20_entry_lsapic_t *lsapic20; + static struct acpi20_table_rsdp *acpi20_rsdp; + static struct acpi_table_xsdt *acpi_xsdt; + static struct acpi_table_slit *acpi_slit; + static struct acpi_table_madt *acpi_madt; + static struct acpi_table_lsapic *lsapic20; static struct ia64_sal_systab *sal_systab; - static acpi_srat_t *acpi_srat; - static srat_cpu_affinity_t *srat_cpu_affinity; - static srat_memory_affinity_t *srat_memory_affinity; + static struct acpi_table_srat *acpi_srat; + static struct acpi_table_processor_affinity *srat_cpu_affinity; + static struct acpi_table_memory_affinity *srat_memory_affinity; static efi_memory_desc_t *efi_memmap, *md; static unsigned long *pal_desc, *sal_desc; static struct ia64_sal_desc_entry_point *sal_ed; @@ -519,16 +535,10 @@ acpi_xsdt = (void *) cp; cp += ALIGN8(sizeof(*acpi_xsdt) + 64); /* save space for more OS defined table pointers. */ -#ifdef ACPI_1_0 - acpi_rsdp = (void *) cp; cp += ALIGN8(sizeof(*acpi_rsdp)); - acpi_rsdt = (void *) cp; cp += ALIGN8(sizeof(*acpi_rsdt)); - acpi_sapic = (void *) cp; cp += sizeof(*acpi_sapic); - acpi_lsapic = (void *) cp; cp += num_cpus*sizeof(*acpi_lsapic); -#endif acpi_slit = (void *) cp; cp += ALIGN8(sizeof(*acpi_slit) + 8 + (max_nasid+1)*(max_nasid+1)); - acpi_madt = (void *) cp; cp += ALIGN8(sizeof(*acpi_madt) + 8 * num_cpus+ 8); - acpi_srat = (void *) cp; cp += ALIGN8(sizeof(acpi_srat_t)); - cp += sizeof(srat_cpu_affinity_t)*num_cpus + sizeof(srat_memory_affinity_t)*num_nodes; + acpi_madt = (void *) cp; cp += ALIGN8(sizeof(*acpi_madt) + sizeof(struct acpi_table_lsapic) * (num_cpus+1)); + acpi_srat = (void *) cp; cp += ALIGN8(sizeof(struct acpi_table_srat)); + cp += sizeof(struct acpi_table_processor_affinity)*num_cpus + sizeof(struct acpi_table_memory_affinity)*num_nodes; vendor = (char *) cp; cp += ALIGN8(40); efi_memmap = (void *) cp; cp += ALIGN8(8*32*sizeof(*efi_memmap)); sal_ptcdi = (void *) cp; cp += ALIGN8(CPUS_PER_FSB*(1+num_nodes)*sizeof(*sal_ptcdi)); @@ -547,8 +557,9 @@ * For now, just bring up bash. * If you want to execute all the startup scripts, delete the "init=..". * You can also edit this line to pass other arguments to the kernel. + * Note: disable kernel text replication. */ - strcpy(cmd_line, "init=/bin/bash"); + strcpy(cmd_line, "init=/bin/bash ktreplicate=0"); memset(efi_systab, 0, sizeof(efi_systab)); efi_systab->hdr.signature = EFI_SYSTEM_TABLE_SIGNATURE; @@ -578,11 +589,6 @@ efi_tables->guid = SAL_SYSTEM_TABLE_GUID; efi_tables->table = __fwtab_pa(base_nasid, sal_systab); efi_tables++; -#ifdef ACPI_1_0 - efi_tables->guid = ACPI_TABLE_GUID; - efi_tables->table = __fwtab_pa(base_nasid, acpi_rsdp); - efi_tables++; -#endif efi_tables->guid = ACPI_20_TABLE_GUID; efi_tables->table = __fwtab_pa(base_nasid, acpi20_rsdp); efi_tables++; @@ -593,65 +599,32 @@ fix_function_pointer(&efi_reset_system); fix_function_pointer(&efi_set_virtual_address_map); -#ifdef ACPI_1_0 - /* fill in the ACPI system table - has a pointer to the ACPI table header */ - memcpy(acpi_rsdp->signature, "RSD PTR ", 8); - acpi_rsdp->rsdt = (struct acpi_rsdt*)__fwtab_pa(base_nasid, acpi_rsdt); - - acpi_table_init(&acpi_rsdt->header, ACPI_RSDT_SIG, ACPI_RSDT_SIG_LEN, 1, 1); - acpi_rsdt->header.length = sizeof(acpi_rsdt_t); - acpi_rsdt->entry_ptrs[0] = __fwtab_pa(base_nasid, acpi_sapic); - - memcpy(acpi_sapic->header.signature, "SPIC ", 4); - acpi_sapic->header.length = sizeof(acpi_sapic_t)+num_cpus*sizeof(acpi_entry_lsapic_t); - - for (cnode=0; cnodetype = ACPI_ENTRY_LOCAL_SAPIC; - acpi_lsapic->length = sizeof(acpi_entry_lsapic_t); - acpi_lsapic->acpi_processor_id = cnode*4+cpu; - acpi_lsapic->flags = LSAPIC_ENABLED|LSAPIC_PRESENT; -#if defined(CONFIG_IA64_SGI_SN1) - acpi_lsapic->eid = cpu; - acpi_lsapic->id = nasid; -#else - acpi_lsapic->eid = nasid&0xffff; - acpi_lsapic->id = (cpu<<4) | (nasid>>16); -#endif - acpi_lsapic++; - } - } -#endif - /* fill in the ACPI20 system table - has a pointer to the ACPI table header */ memcpy(acpi20_rsdp->signature, "RSD PTR ", 8); - acpi20_rsdp->xsdt = (struct acpi_xsdt*)__fwtab_pa(base_nasid, acpi_xsdt); + acpi20_rsdp->xsdt_address = (u64)__fwtab_pa(base_nasid, acpi_xsdt); acpi20_rsdp->revision = 2; - acpi_checksum_rsdp20(acpi20_rsdp, sizeof(acpi20_rsdp_t)); + acpi_checksum_rsdp20(acpi20_rsdp, sizeof(struct acpi20_table_rsdp)); /* Set up the XSDT table - contains pointers to the other ACPI tables */ - acpi_table_init(&acpi_xsdt->header, ACPI_XSDT_SIG, ACPI_XSDT_SIG_LEN, 1, 1); - acpi_xsdt->entry_ptrs[0] = __fwtab_pa(base_nasid, acpi_madt); - acpi_xsdt->entry_ptrs[1] = __fwtab_pa(base_nasid, acpi_slit); - acpi_xsdt->entry_ptrs[2] = __fwtab_pa(base_nasid, acpi_srat); - acpi_checksum(&acpi_xsdt->header, sizeof(acpi_xsdt_t) + 16); - - /* Set up the MADT table */ - acpi_table_init(&acpi_madt->header, ACPI_MADT_SIG, ACPI_MADT_SIG_LEN, 1, 1); - lsapic20 = (acpi20_entry_lsapic_t*) (acpi_madt + 1); + acpi_table_initx(&acpi_xsdt->header, XSDT_SIG, 4, 1, 1); + acpi_xsdt->entry[0] = __fwtab_pa(base_nasid, acpi_madt); + acpi_xsdt->entry[1] = __fwtab_pa(base_nasid, acpi_slit); + acpi_xsdt->entry[2] = __fwtab_pa(base_nasid, acpi_srat); + acpi_checksum(&acpi_xsdt->header, sizeof(struct acpi_table_xsdt) + 16); + + /* Set up the APIC table */ + acpi_table_initx(&acpi_madt->header, APIC_SIG, 4, 1, 1); + lsapic20 = (struct acpi_table_lsapic*) (acpi_madt + 1); for (cnode=0; cnodetype = ACPI20_ENTRY_LOCAL_SAPIC; - lsapic20->length = sizeof(acpi_entry_lsapic_t); - lsapic20->acpi_processor_id = cnode*4+cpu; - lsapic20->flags = LSAPIC_ENABLED|LSAPIC_PRESENT; + lsapic20->header.type = ACPI_MADT_LSAPIC; + lsapic20->header.length = sizeof(struct acpi_table_lsapic); + lsapic20->acpi_id = cnode*4+cpu; + lsapic20->flags.enabled = 1; #if defined(CONFIG_IA64_SGI_SN1) lsapic20->eid = cpu; lsapic20->id = nasid; @@ -659,20 +632,20 @@ lsapic20->eid = nasid&0xffff; lsapic20->id = (cpu<<4) | (nasid>>16); #endif - lsapic20 = (acpi20_entry_lsapic_t*) ((long)lsapic20+sizeof(acpi_entry_lsapic_t)); + lsapic20 = (struct acpi_table_lsapic*) ((long)lsapic20+sizeof(struct acpi_table_lsapic)); } } acpi_checksum(&acpi_madt->header, (char*)lsapic20 - (char*)acpi_madt); /* Set up the SRAT table */ - acpi_table_init(&acpi_srat->header, ACPI_SRAT_SIG, ACPI_SRAT_SIG_LEN, ACPI_SRAT_REVISION, 1); + acpi_table_initx(&acpi_srat->header, SRAT_SIG, 4, ACPI_SRAT_REVISION, 1); ptr = acpi_srat+1; for (cnode=0; cnodetype = SRAT_MEMORY_STRUCTURE; - srat_memory_affinity->length = sizeof(srat_memory_affinity_t); + srat_memory_affinity->header.type = ACPI_SRAT_MEMORY_AFFINITY; + srat_memory_affinity->header.length = sizeof(struct acpi_table_memory_affinity); srat_memory_affinity->proximity_domain = PROXIMITY_DOMAIN(nasid); srat_memory_affinity->base_addr_lo = 0; srat_memory_affinity->length_lo = 0; @@ -684,7 +657,7 @@ srat_memory_affinity->length_hi = SN2_NODE_SIZE>>32; #endif srat_memory_affinity->memory_type = ACPI_ADDRESS_RANGE_MEMORY; - srat_memory_affinity->flags = SRAT_MEMORY_FLAGS_ENABLED; + srat_memory_affinity->flags.enabled = 1; } for (cnode=0; cnodetype = SRAT_CPU_STRUCTURE; - srat_cpu_affinity->length = sizeof(srat_cpu_affinity_t); + srat_cpu_affinity->header.type = ACPI_SRAT_PROCESSOR_AFFINITY; + srat_cpu_affinity->header.length = sizeof(struct acpi_table_processor_affinity); srat_cpu_affinity->proximity_domain = PROXIMITY_DOMAIN(nasid); - srat_cpu_affinity->flags = SRAT_CPU_FLAGS_ENABLED; + srat_cpu_affinity->flags.enabled = 1; #if defined(CONFIG_IA64_SGI_SN1) srat_cpu_affinity->apic_id = nasid; - srat_cpu_affinity->local_sapic_eid = cpu; + srat_cpu_affinity->lsapic_eid = cpu; #else - srat_cpu_affinity->local_sapic_eid = nasid&0xffff; + srat_cpu_affinity->lsapic_eid = nasid&0xffff; srat_cpu_affinity->apic_id = (cpu<<4) | (nasid>>16); #endif } @@ -711,9 +684,9 @@ /* Set up the SLIT table */ - acpi_table_init(&acpi_slit->header, ACPI_SLIT_SIG, ACPI_SLIT_SIG_LEN, ACPI_SLIT_REVISION, 1); + acpi_table_initx(&acpi_slit->header, SLIT_SIG, 4, ACPI_SLIT_REVISION, 1); acpi_slit->localities = PROXIMITY_DOMAIN(max_nasid)+1; - cp=acpi_slit->entries; + cp=acpi_slit->entry; memset(cp, 255, acpi_slit->localities*acpi_slit->localities); for (i=0; i<=max_nasid; i++) @@ -721,7 +694,7 @@ if (nasid_present(i) && nasid_present(j)) *(cp+PROXIMITY_DOMAIN(i)*acpi_slit->localities+PROXIMITY_DOMAIN(j)) = 10 + MIN(254, 5*ABS(i-j)); - cp = acpi_slit->entries + acpi_slit->localities*acpi_slit->localities; + cp = acpi_slit->entry + acpi_slit->localities*acpi_slit->localities; acpi_checksum(&acpi_slit->header, cp - (char*)acpi_slit); @@ -731,6 +704,8 @@ sal_systab->sal_rev_minor = 1; sal_systab->sal_rev_major = 0; sal_systab->entry_count = 3; + sal_systab->sal_b_rev_major = 0x1; /* set the SN SAL rev to */ + sal_systab->sal_b_rev_minor = 0x0; /* 1.00 */ strcpy(sal_systab->oem_id, "SGI"); strcpy(sal_systab->product_id, "SN1"); @@ -785,11 +760,6 @@ * table. We dont build enough table & the kernel aborts. * Note that the PROM hasd thhhe same problem!! */ -#ifdef DOESNT_WORK - for (checksum=0, cp=(char*)acpi_rsdp, cpe=cp+RSDP_CHECKSUM_LENGTH; cpchecksum = -checksum; -#endif md = &efi_memmap[0]; num_memmd = build_efi_memmap((void *)md, mdsize) ; diff -Nru a/arch/ia64/sn/fakeprom/klgraph_init.c b/arch/ia64/sn/fakeprom/klgraph_init.c --- a/arch/ia64/sn/fakeprom/klgraph_init.c Mon Dec 23 21:21:50 2002 +++ b/arch/ia64/sn/fakeprom/klgraph_init.c Mon Dec 23 21:21:50 2002 @@ -1,4 +1,4 @@ -/* $Id: klgraph_init.c,v 1.2 2001/12/05 16:58:41 jh Exp $ +/* $Id: klgraph_init.c,v 1.1 2002/02/28 17:31:25 marcelo Exp $ * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive @@ -49,8 +49,9 @@ klgraph_init(void) { - u64 *temp; - +#ifdef CONFIG_IA64_SGI_SN1 + u64 *temp; +#endif /* * Initialize some hub/xbow registers that allows access to * Xbridge etc. These are normally done in PROM. @@ -109,6 +110,8 @@ // [PI] *(volatile u32 *)0xc00000080f000288L = 0xba98; #endif /* CONFIG_IA64_SGI_SN1 */ +#ifdef CONFIG_IA64_SGI_SN1 + /* * kldir entries initialization - mankato */ @@ -282,6 +285,7 @@ convert(0x8000000000002560, 0xffffffffffffffff, 0xffffffffffffffff); convert(0x8000000000002570, 0xffffffffffffffff, 0xffffffffffffffff); convert(0x8000000000002580, 0x000000000000ffff, 0x0000000000000000); +#endif } diff -Nru a/arch/ia64/sn/fakeprom/main.c b/arch/ia64/sn/fakeprom/main.c --- a/arch/ia64/sn/fakeprom/main.c Mon Dec 23 21:21:55 2002 +++ b/arch/ia64/sn/fakeprom/main.c Mon Dec 23 21:21:55 2002 @@ -98,7 +98,7 @@ /* * Enable all FSB flashed interrupts. - * ZZZ - I'd really like defines for this...... + * I'd really like defines for this...... */ base = (long*)0x80000e0000000000LL; /* base of synergy regs */ for (off = 0x2a0; off < 0x2e0; off+=8) /* offset for VEC_MASK_{0-3}_A/B */ diff -Nru a/arch/ia64/sn/io/Makefile b/arch/ia64/sn/io/Makefile --- a/arch/ia64/sn/io/Makefile Mon Dec 23 21:21:52 2002 +++ b/arch/ia64/sn/io/Makefile Mon Dec 23 21:21:52 2002 @@ -5,35 +5,20 @@ # # Copyright (C) 2000-2002 Silicon Graphics, Inc. All Rights Reserved. # -# -# Makefile for the linux kernel. -# -# Note! Dependencies are done automagically by 'make dep', which also -# removes any old dependencies. DON'T put your own dependencies here -# unless it's something special (ie not a .c file). -# +# Makefile for the sn kernel routines. EXTRA_CFLAGS := -DLITTLE_ENDIAN -export-objs = pciio.o hcl.o +ifdef CONFIG_IA64_SGI_SN2 +EXTRA_CFLAGS += -DSHUB_SWAP_WAR +endif + +export-objs := hcl.o pci_dma.o + +obj-$(CONFIG_IA64_SGI_SN) += stubs.o sgi_if.o xswitch.o klgraph_hack.o \ + hcl.o labelcl.o invent.o sgi_io_sim.o \ + klgraph_hack.o hcl_util.o cdl.o hubdev.o hubspc.o \ + alenlist.o pci.o pci_dma.o ate_utils.o \ + ifconfig_net.o io.o ifconfig_bus.o -obj-y := stubs.o sgi_if.o pciio.o xtalk.o xbow.o xswitch.o klgraph_hack.o \ - hcl.o labelcl.o invent.o klgraph.o klconflib.o sgi_io_sim.o \ - module.o sgi_io_init.o klgraph_hack.o ml_SN_init.o \ - ml_iograph.o hcl_util.o cdl.o hubdev.o hubspc.o \ - alenlist.o pci_bus_cvlink.o \ - eeprom.o pci.o pci_dma.o l1.o l1_command.o ate_utils.o \ - ifconfig_net.o efi-rtc.o io.o - -obj-$(CONFIG_IA64_SGI_SN1) += sn1/ml_SN_intr.o sn1/mem_refcnt.o sn1/hubcounters.o \ - sn1/ip37.o sn1/huberror.o sn1/hub_intr.o sn1/pcibr.o - -obj-$(CONFIG_IA64_SGI_SN2) += sn2/ml_SN_intr.o sn2/shub_intr.o sn2/shuberror.o \ - sn2/bte_error.o \ - sn2/pcibr/pcibr_dvr.o sn2/pcibr/pcibr_ate.o \ - sn2/pcibr/pcibr_config.o sn2/pcibr/pcibr_dvr.o \ - sn2/pcibr/pcibr_hints.o \ - sn2/pcibr/pcibr_idbg.o sn2/pcibr/pcibr_intr.o \ - sn2/pcibr/pcibr_rrb.o sn2/pcibr/pcibr_slot.o - -obj-$(CONFIG_PCIBA) += pciba.o +obj-$(CONFIG_PCIBA) += pciba.o diff -Nru a/arch/ia64/sn/io/alenlist.c b/arch/ia64/sn/io/alenlist.c --- a/arch/ia64/sn/io/alenlist.c Mon Dec 23 21:21:55 2002 +++ b/arch/ia64/sn/io/alenlist.c Mon Dec 23 21:21:55 2002 @@ -192,9 +192,9 @@ #define AL_FIXED_SIZE 0x1 /* List is pre-allocated, and of fixed size */ -zone_t *alenlist_zone = NULL; -zone_t *alenlist_chunk_zone = NULL; -zone_t *alenlist_cursor_zone = NULL; +struct zone *alenlist_zone = NULL; +struct zone *alenlist_chunk_zone = NULL; +struct zone *alenlist_cursor_zone = NULL; #if DEBUG int alenlist_count=0; /* Currently allocated Lists */ diff -Nru a/arch/ia64/sn/io/ate_utils.c b/arch/ia64/sn/io/ate_utils.c --- a/arch/ia64/sn/io/ate_utils.c Mon Dec 23 21:21:54 2002 +++ b/arch/ia64/sn/io/ate_utils.c Mon Dec 23 21:21:54 2002 @@ -1,4 +1,4 @@ -/* $Id$ +/* $Id: ate_utils.c,v 1.1 2002/02/28 17:31:25 marcelo Exp $ * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive diff -Nru a/arch/ia64/sn/io/cdl.c b/arch/ia64/sn/io/cdl.c --- a/arch/ia64/sn/io/cdl.c Mon Dec 23 21:21:52 2002 +++ b/arch/ia64/sn/io/cdl.c Mon Dec 23 21:21:52 2002 @@ -7,6 +7,7 @@ * Copyright (C) 1992 - 1997, 2000-2002 Silicon Graphics, Inc. All rights reserved. */ +#include #include #include #include @@ -19,6 +20,8 @@ /* these get called directly in cdl_add_connpt in fops bypass hack */ extern int pcibr_attach(devfs_handle_t); extern int xbow_attach(devfs_handle_t); +extern int pic_attach(devfs_handle_t); + /* * cdl: Connection and Driver List @@ -35,13 +38,24 @@ int (*attach) (devfs_handle_t); } dummy_reg; +#ifdef CONFIG_IA64_SGI_SN1 #define MAX_SGI_IO_INFRA_DRVR 4 -struct cdl sgi_infrastructure_drivers[MAX_SGI_IO_INFRA_DRVR] = +#else +#define MAX_SGI_IO_INFRA_DRVR 7 +#endif +static struct cdl sgi_infrastructure_drivers[MAX_SGI_IO_INFRA_DRVR] = { { XBRIDGE_WIDGET_PART_NUM, XBRIDGE_WIDGET_MFGR_NUM, pcibr_attach /* &pcibr_fops */}, { BRIDGE_WIDGET_PART_NUM, BRIDGE_WIDGET_MFGR_NUM, pcibr_attach /* &pcibr_fops */}, +#ifndef CONFIG_IA64_SGI_SN1 + { PIC_WIDGET_PART_NUM_BUS0, PIC_WIDGET_MFGR_NUM, pic_attach /* &pic_fops */}, + { PIC_WIDGET_PART_NUM_BUS1, PIC_WIDGET_MFGR_NUM, pic_attach /* &pic_fops */}, +#endif { XXBOW_WIDGET_PART_NUM, XXBOW_WIDGET_MFGR_NUM, xbow_attach /* &xbow_fops */}, { XBOW_WIDGET_PART_NUM, XBOW_WIDGET_MFGR_NUM, xbow_attach /* &xbow_fops */}, +#ifndef CONFIG_IA64_SGI_SN1 + { PXBOW_WIDGET_PART_NUM, XXBOW_WIDGET_MFGR_NUM, xbow_attach /* &xbow_fops */}, +#endif }; /* diff -Nru a/arch/ia64/sn/io/hcl.c b/arch/ia64/sn/io/hcl.c --- a/arch/ia64/sn/io/hcl.c Mon Dec 23 21:21:59 2002 +++ b/arch/ia64/sn/io/hcl.c Mon Dec 23 21:21:59 2002 @@ -6,7 +6,7 @@ * * hcl - SGI's Hardware Graph compatibility layer. * - * Copyright (C) 1992 - 1997, 2000-2001 Silicon Graphics, Inc. All rights reserved. + * Copyright (C) 1992 - 1997, 2000-2002 Silicon Graphics, Inc. All rights reserved. */ #include @@ -155,7 +155,7 @@ /* * Create the hwgraph_root on devfs. */ - rv = hwgraph_path_add(NULL, "hw", &hwgraph_root); + rv = hwgraph_path_add(NULL, EDGE_LBL_HW, &hwgraph_root); if (rv) printk ("WARNING: init_hcl: Failed to create hwgraph_root. Error = %d.\n", rv); @@ -183,9 +183,9 @@ /* * Create the directory that links Linux bus numbers to our Xwidget. */ - rv = hwgraph_path_add(hwgraph_root, "linux/busnum", &linux_busnum); + rv = hwgraph_path_add(hwgraph_root, EDGE_LBL_LINUX_BUS, &linux_busnum); if (linux_busnum == NULL) { - panic("HCL: Unable to create hw/linux/busnum\n"); + panic("HCL: Unable to create %s\n", EDGE_LBL_LINUX_BUS); return(0); } @@ -674,7 +674,6 @@ */ namelen = (int) strlen(name); target_handle = devfs_get_handle(from, name, 1); /* Yes traverse symbolic links */ - devfs_put(target_handle); /* Assume we're the owner */ if (target_handle == NULL) return(-1); else @@ -955,7 +954,6 @@ *vertex_handle_ptr = devfs_get_handle(start_vertex_handle, /* start dir */ lookup_path, /* path */ 1); /* traverse symlinks */ - devfs_put(*vertex_handle_ptr); /* Assume we're the owner */ if (*vertex_handle_ptr == NULL) return(-1); else @@ -963,20 +961,19 @@ } /* - * hwgraph_traverse - Find and return the devfs handle starting from dir. + * hwgraph_traverse - Find and return the devfs handle starting from de. * */ graph_error_t -hwgraph_traverse(devfs_handle_t dir, char *path, devfs_handle_t *found) +hwgraph_traverse(devfs_handle_t de, char *path, devfs_handle_t *found) { /* * get the directory entry (path should end in a directory) */ - *found = devfs_get_handle(dir, /* start dir */ + *found = devfs_get_handle(de, /* start dir */ path, /* path */ 1); /* traverse symlinks */ - devfs_put(*found); /* Assume we're the owner */ if (*found == NULL) return(GRAPH_NOT_FOUND); else @@ -990,13 +987,9 @@ devfs_handle_t hwgraph_path_to_vertex(char *path) { - devfs_handle_t de; - - de = devfs_get_handle(NULL, /* start dir */ + return(devfs_get_handle(NULL, /* start dir */ path, /* path */ - 1); - devfs_put(de); /* Assume we're the owner */ - return(de); + 1)); /* traverse symlinks */ } /* @@ -1014,34 +1007,26 @@ /* * hwgraph_block_device_get - return the handle of the block device file. - * The assumption here is that dir is a directory. + * The assumption here is that de is a directory. */ devfs_handle_t -hwgraph_block_device_get(devfs_handle_t dir) +hwgraph_block_device_get(devfs_handle_t de) { - devfs_handle_t de; - - de = devfs_get_handle(dir, /* start dir */ + return(devfs_get_handle(de, /* start dir */ "block", /* path */ - 1); /* traverse symlinks */ - devfs_put(de); /* Assume we're the owner */ - return(de); + 1)); /* traverse symlinks */ } /* * hwgraph_char_device_get - return the handle of the char device file. - * The assumption here is that dir is a directory. + * The assumption here is that de is a directory. */ devfs_handle_t -hwgraph_char_device_get(devfs_handle_t dir) +hwgraph_char_device_get(devfs_handle_t de) { - devfs_handle_t de; - - de = devfs_get_handle(dir, /* start dir */ + return(devfs_get_handle(de, /* start dir */ "char", /* path */ - 1); /* traverse symlinks */ - devfs_put(de); /* Assume we're the owner */ - return(de); + 1)); /* traverse symlinks */ } /* diff -Nru a/arch/ia64/sn/io/hcl_util.c b/arch/ia64/sn/io/hcl_util.c --- a/arch/ia64/sn/io/hcl_util.c Mon Dec 23 21:21:56 2002 +++ b/arch/ia64/sn/io/hcl_util.c Mon Dec 23 21:21:56 2002 @@ -4,7 +4,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 1992 - 1997, 2000-2001 Silicon Graphics, Inc. All rights reserved. + * Copyright (C) 1992 - 1997, 2000-2002 Silicon Graphics, Inc. All rights reserved. */ #include @@ -93,6 +93,33 @@ } vhdl = master; + } +} + +static devfs_handle_t hwgraph_all_cpuids = GRAPH_VERTEX_NONE; +extern int maxcpus; + +void +mark_cpuvertex_as_cpu(devfs_handle_t vhdl, cpuid_t cpuid) +{ + if (cpuid == CPU_NONE) + return; + + (void)labelcl_info_add_LBL(vhdl, INFO_LBL_CPUID, INFO_DESC_EXPORT, + (arbitrary_info_t)cpuid); + { + char cpuid_buffer[10]; + + if (hwgraph_all_cpuids == GRAPH_VERTEX_NONE) { + (void)hwgraph_path_add( hwgraph_root, + EDGE_LBL_CPUNUM, + &hwgraph_all_cpuids); + } + + sprintf(cpuid_buffer, "%ld", cpuid); + (void)hwgraph_edge_add( hwgraph_all_cpuids, + vhdl, + cpuid_buffer); } } diff -Nru a/arch/ia64/sn/io/hubdev.c b/arch/ia64/sn/io/hubdev.c --- a/arch/ia64/sn/io/hubdev.c Mon Dec 23 21:21:58 2002 +++ b/arch/ia64/sn/io/hubdev.c Mon Dec 23 21:21:58 2002 @@ -4,7 +4,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 1992 - 1997, 2000-2001 Silicon Graphics, Inc. All rights reserved. + * Copyright (C) 1992 - 1997, 2000-2002 Silicon Graphics, Inc. All rights reserved. */ #include diff -Nru a/arch/ia64/sn/io/hubspc.c b/arch/ia64/sn/io/hubspc.c --- a/arch/ia64/sn/io/hubspc.c Mon Dec 23 21:21:56 2002 +++ b/arch/ia64/sn/io/hubspc.c Mon Dec 23 21:21:56 2002 @@ -52,7 +52,7 @@ }cpuprom_info_t; static cpuprom_info_t *cpuprom_head; -spinlock_t cpuprom_spinlock; +static spinlock_t cpuprom_spinlock; #define PROM_LOCK() mutex_spinlock(&cpuprom_spinlock) #define PROM_UNLOCK(s) mutex_spinunlock(&cpuprom_spinlock, (s)) @@ -161,69 +161,8 @@ sizeof(invent_miscinfo_t)); } -#define FPROM_CONFIG_ADDR MD_JUNK_BUS_TIMING -#define FPROM_ENABLE_MASK MJT_FPROM_ENABLE_MASK -#define FPROM_ENABLE_SHFT MJT_FPROM_ENABLE_SHFT -#define FPROM_SETUP_MASK MJT_FPROM_SETUP_MASK -#define FPROM_SETUP_SHFT MJT_FPROM_SETUP_SHFT +#endif /* CONFIG_IA64_SGI_SN1 */ -/*ARGSUSED*/ -int -cpuprom_map(devfs_handle_t dev, vhandl_t *vt, off_t addr, size_t len) -{ - int errcode = 0; - caddr_t kvaddr; - devfs_handle_t node; - cnodeid_t cnode; - - node = prominfo_nodeget(dev); - - if (!node) - return EIO; - - - kvaddr = hubdev_prombase_get(node); - cnode = hubdev_cnodeid_get(node); -#ifdef HUBSPC_DEBUG - printk("cpuprom_map: hubnode %d kvaddr 0x%x\n", node, kvaddr); -#endif - - if (len > RBOOT_SIZE) - len = RBOOT_SIZE; - /* - * Map in the prom space - */ - errcode = v_mapphys(vt, kvaddr, len); - - if (errcode == 0 ){ - /* - * Set the MD configuration registers suitably. - */ - nasid_t nasid; - uint64_t value; - volatile hubreg_t *regaddr; - - nasid = COMPACT_TO_NASID_NODEID(cnode); - regaddr = REMOTE_HUB_ADDR(nasid, FPROM_CONFIG_ADDR); - value = HUB_L(regaddr); - value &= ~(FPROM_SETUP_MASK | FPROM_ENABLE_MASK); - { - value |= (((long)CONFIG_FPROM_SETUP << FPROM_SETUP_SHFT) | - ((long)CONFIG_FPROM_ENABLE << FPROM_ENABLE_SHFT)); - } - HUB_S(regaddr, value); - - } - return (errcode); -} -#endif /* CONFIG_IA64_SGI_SN1 */ - -/*ARGSUSED*/ -int -cpuprom_unmap(devfs_handle_t dev, vhandl_t *vt) -{ - return 0; -} /***********************************************************************/ /* Base Hub Space Driver */ @@ -245,15 +184,14 @@ hubdev_register(mem_refcnt_attach); #endif -#if defined(CONFIG_SERIAL_SGI_L1_PROTOCOL) +#ifdef CONFIG_IA64_SGI_SN1 /* L1 system controller link */ if ( !IS_RUNNING_ON_SIMULATOR() ) { /* initialize the L1 link */ extern void l1_init(void); l1_init(); } -#endif - +#endif /* CONFIG_IA64_SGI_SN1 */ #ifdef HUBSPC_DEBUG printk("hubspc_init: Completed\n"); #endif /* HUBSPC_DEBUG */ @@ -285,7 +223,7 @@ /* check validity of request */ if( len == 0 ) { - return ENXIO; + return -ENXIO; } return errcode; diff -Nru a/arch/ia64/sn/io/ifconfig_net.c b/arch/ia64/sn/io/ifconfig_net.c --- a/arch/ia64/sn/io/ifconfig_net.c Mon Dec 23 21:21:53 2002 +++ b/arch/ia64/sn/io/ifconfig_net.c Mon Dec 23 21:21:53 2002 @@ -1,4 +1,4 @@ -/* $Id$ +/* $Id: ifconfig_net.c,v 1.1 2002/02/28 17:31:25 marcelo Exp $ * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive @@ -202,30 +202,16 @@ * Read in the header and see how big of a buffer we really need to * allocate. */ - ifname_num = kmalloc(sizeof(struct ifname_num), GFP_KERNEL); - if (!ifname_num) - return -ENOMEM; - if (copy_from_user(ifname_num, (char *)arg, - sizeof(struct ifname_num))) { - kfree(ifname_num); - return -EFAULT; - } + ifname_num = (struct ifname_num *) kmalloc(sizeof(struct ifname_num), + GFP_KERNEL); + copy_from_user( ifname_num, (char *) arg, sizeof(struct ifname_num)); size = ifname_num->size; kfree(ifname_num); - ifname_num = kmalloc(size, GFP_KERNEL); - if (!ifname_num) - return -ENOMEM; + ifname_num = (struct ifname_num *) kmalloc(size, GFP_KERNEL); ifname_MAC = (struct ifname_MAC *) ((char *)ifname_num + (sizeof(struct ifname_num)) ); - if (copy_from_user(ifname_num, (char *)arg, size)) { - kfree(ifname_num); - return -EFAULT; - } + copy_from_user( ifname_num, (char *) arg, size); new_devices = kmalloc(size - sizeof(struct ifname_num), GFP_KERNEL); - if (!new_devices) { - kfree(ifname_num); - return -EFAULT; - } temp_new_devices = new_devices; memset(new_devices, 0, size - sizeof(struct ifname_num)); @@ -271,17 +257,17 @@ /* * Copy back to the User Buffer area any new devices encountered. */ - if (copy_to_user((char *)arg + (sizeof(struct ifname_num)), - new_devices, size - sizeof(struct ifname_num))) - return -EFAULT; + copy_to_user((char *)arg + (sizeof(struct ifname_num)), new_devices, + size - sizeof(struct ifname_num)); + return(0); } struct file_operations ifconfig_net_fops = { - .ioctl =ifconfig_net_ioctl, /* ioctl */ - .open =ifconfig_net_open, /* open */ - .release =ifconfig_net_close /* release */ + ioctl:ifconfig_net_ioctl, /* ioctl */ + open:ifconfig_net_open, /* open */ + release:ifconfig_net_close /* release */ }; diff -Nru a/arch/ia64/sn/io/invent.c b/arch/ia64/sn/io/invent.c --- a/arch/ia64/sn/io/invent.c Mon Dec 23 21:21:55 2002 +++ b/arch/ia64/sn/io/invent.c Mon Dec 23 21:21:55 2002 @@ -4,7 +4,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 1992 - 1997, 2000-2001 Silicon Graphics, Inc. All rights reserved. + * Copyright (C) 1992 - 1997, 2000-2002 Silicon Graphics, Inc. All rights reserved. */ /* diff -Nru a/arch/ia64/sn/io/io.c b/arch/ia64/sn/io/io.c --- a/arch/ia64/sn/io/io.c Mon Dec 23 21:21:54 2002 +++ b/arch/ia64/sn/io/io.c Mon Dec 23 21:21:54 2002 @@ -7,6 +7,7 @@ * Copyright (C) 1992-1997, 2000-2002 Silicon Graphics, Inc. All Rights Reserved. */ +#include #include #include #include @@ -31,21 +32,6 @@ extern void hub_intr_init(devfs_handle_t hubv); -/* - * hub_device_desc_update - * Update the passed in device descriptor with the actual the - * target cpu number and interrupt priority level. - * NOTE : These might be the same as the ones passed in thru - * the descriptor. - */ -void -hub_device_desc_update(device_desc_t dev_desc, - ilvl_t intr_swlevel, - cpuid_t cpu) -{ -} - - /* * Perform any initializations needed to support hub-based I/O. * Called once during startup. @@ -53,11 +39,6 @@ void hubio_init(void) { -#ifdef LATER - /* This isn't needed unless we port the entire sio driver ... */ - extern void early_brl1_port_init( void ); - early_brl1_port_init(); -#endif } /* @@ -149,6 +130,10 @@ nasid_t nasid; volatile hubreg_t junk; unsigned long s; + caddr_t kvaddr; +#ifdef PIOMAP_UNC_ACC_SPACE + uint64_t addr; +#endif /* sanity check */ if (byte_count_max > byte_count) @@ -159,8 +144,19 @@ /* If xtalk_addr range is mapped by a small window, we don't have * to do much */ - if (xtalk_addr + byte_count <= SWIN_SIZE) - return(hubinfo_swin_piomap_get(hubinfo, (int)widget)); + if (xtalk_addr + byte_count <= SWIN_SIZE) { + hub_piomap_t piomap; + + piomap = hubinfo_swin_piomap_get(hubinfo, (int)widget); +#ifdef PIOMAP_UNC_ACC_SPACE + if (flags & PIOMAP_UNC_ACC) { + addr = (uint64_t)piomap->hpio_xtalk_info.xp_kvaddr; + addr |= PIOMAP_UNC_ACC_SPACE; + piomap->hpio_xtalk_info.xp_kvaddr = (caddr_t)addr; + } +#endif + return piomap; + } /* We need to use a big window mapping. */ @@ -257,7 +253,15 @@ bw_piomap->hpio_xtalk_info.xp_dev = dev; bw_piomap->hpio_xtalk_info.xp_target = widget; bw_piomap->hpio_xtalk_info.xp_xtalk_addr = xtalk_addr; - bw_piomap->hpio_xtalk_info.xp_kvaddr = (caddr_t)NODE_BWIN_BASE(nasid, free_bw_index); + kvaddr = (caddr_t)NODE_BWIN_BASE(nasid, free_bw_index); +#ifdef PIOMAP_UNC_ACC_SPACE + if (flags & PIOMAP_UNC_ACC) { + addr = (uint64_t)kvaddr; + addr |= PIOMAP_UNC_ACC_SPACE; + kvaddr = (caddr_t)addr; + } +#endif + bw_piomap->hpio_xtalk_info.xp_kvaddr = kvaddr; bw_piomap->hpio_holdcnt++; bw_piomap->hpio_bigwin_num = free_bw_index; @@ -378,12 +382,22 @@ devfs_handle_t hubv = xwidget_info_master_get(widget_info); hub_piomap_t hub_piomap; hubinfo_t hubinfo; + caddr_t addr; hubinfo_get(hubv, &hubinfo); if (xtalk_addr + byte_count <= SWIN_SIZE) { hub_piomap = hubinfo_swin_piomap_get(hubinfo, (int)widget); - return(hub_piomap_addr(hub_piomap, xtalk_addr, byte_count)); + addr = hub_piomap_addr(hub_piomap, xtalk_addr, byte_count); +#ifdef PIOMAP_UNC_ACC_SPACE + if (flags & PIOMAP_UNC_ACC) { + uint64_t iaddr; + iaddr = (uint64_t)addr; + iaddr |= PIOMAP_UNC_ACC_SPACE; + addr = (caddr_t)iaddr; + } +#endif + return(addr); } else return(0); } @@ -392,19 +406,6 @@ /* DMA MANAGEMENT */ /* Mapping from crosstalk space to system physical space */ -/* - * There's not really very much to do here, since crosstalk maps - * directly to system physical space. It's quite possible that this - * DMA layer will be bypassed in performance kernels. - */ - - -/* ARGSUSED */ -void -hub_dma_init(devfs_handle_t hubv) -{ -} - /* * Allocate resources needed to set up DMA mappings up to a specified size @@ -478,7 +479,12 @@ } /* There isn't actually any DMA mapping hardware on the hub. */ - return(paddr); +#ifdef CONFIG_IA64_SGI_SN2 + return( (PHYS_TO_DMA(paddr)) ); +#else + /* no translation needed */ + return(paddr); +#endif } /* @@ -549,8 +555,12 @@ size_t byte_count, /* length */ unsigned flags) /* defined in dma.h */ { +#ifdef CONFIG_IA64_SGI_SN2 + return( (PHYS_TO_DMA(paddr)) ); +#else /* no translation needed */ return(paddr); +#endif } /* @@ -565,6 +575,7 @@ alenlist_t palenlist, /* system address/length list */ unsigned flags) /* defined in dma.h */ { + BUG(); /* no translation needed */ return(palenlist); } @@ -603,11 +614,9 @@ void hub_provider_startup(devfs_handle_t hubv) { - extern void hub_dma_init(devfs_handle_t hubv); extern void hub_pio_init(devfs_handle_t hubv); hub_pio_init(hubv); - hub_dma_init(hubv); hub_intr_init(hubv); } @@ -707,14 +716,12 @@ { iprb_t prb; int prb_offset; -#ifdef LATER extern int force_fire_and_forget; extern volatile int ignore_conveyor_override; if (force_fire_and_forget && !ignore_conveyor_override) if (conveyor == HUB_PIO_CONVEYOR) conveyor = HUB_PIO_FIRE_N_FORGET; -#endif /* * Get the current register value. diff -Nru a/arch/ia64/sn/io/klgraph_hack.c b/arch/ia64/sn/io/klgraph_hack.c --- a/arch/ia64/sn/io/klgraph_hack.c Mon Dec 23 21:21:55 2002 +++ b/arch/ia64/sn/io/klgraph_hack.c Mon Dec 23 21:21:55 2002 @@ -13,13 +13,16 @@ * initial klgraph information that is normally provided by prom. */ +#include #include #include #include #include #include #include +#include +extern u64 klgraph_addr[]; void * real_port; void * real_io_base; void * real_addr; @@ -45,10 +48,15 @@ #define HUBREG ((char *)0xc0000a0001e00000) #define WIDGET0 ((char *)0xc0000a0000000000) +#define convert(a,b,c) temp = (u64 *)a; *temp = b; temp++; *temp = c + void klgraph_hack_init(void) { + u64 *temp; + +#ifdef CONFIG_IA64_SGI_SN1 /* * We need to know whether we are booting from PROM or * boot from disk. @@ -59,6 +67,139 @@ } else { panic("klgraph_hack_init: Unable to locate KLCONFIG TABLE\n"); } + + convert(0x0000000000030000, 0x00000000beedbabe, 0x0000004800000000); + +#else + + if (IS_RUNNING_ON_SIMULATOR()) { + printk("Creating FAKE Klconfig Structure for Embeded Kernel\n"); + klgraph_addr[0] = 0xe000003000030000; + + /* + * klconfig entries initialization - mankato + */ + convert(0xe000003000030000, 0x00000000beedbabe, 0x0000004800000000); + convert(0xe000003000030010, 0x0003007000000018, 0x800002000f820178); + convert(0xe000003000030020, 0x80000a000f024000, 0x800002000f800000); + convert(0xe000003000030030, 0x0300fafa00012580, 0x00000000040f0000); + convert(0xe000003000030040, 0x0000000000000000, 0x0003097000030070); + convert(0xe000003000030050, 0x00030970000303b0, 0x0003181000033f70); + convert(0xe000003000030060, 0x0003d51000037570, 0x0000000000038330); + convert(0xe000003000030070, 0x0203110100030140, 0x0001000000000101); + convert(0xe000003000030080, 0x0900000000000000, 0x000000004e465e67); + convert(0xe000003000030090, 0x0003097000000000, 0x00030b1000030a40); + convert(0xe0000030000300a0, 0x00030cb000030be0, 0x000315a0000314d0); + convert(0xe0000030000300b0, 0x0003174000031670, 0x0000000000000000); + convert(0xe000003000030100, 0x000000000000001a, 0x3350490000000000); + convert(0xe000003000030110, 0x0000000000000037, 0x0000000000000000); + convert(0xe000003000030140, 0x0002420100030210, 0x0001000000000101); + convert(0xe000003000030150, 0x0100000000000000, 0xffffffffffffffff); + convert(0xe000003000030160, 0x00030d8000000000, 0x0000000000030e50); + convert(0xe0000030000301c0, 0x0000000000000000, 0x0000000000030070); + convert(0xe0000030000301d0, 0x0000000000000025, 0x424f490000000000); + convert(0xe0000030000301e0, 0x000000004b434952, 0x0000000000000000); + convert(0xe000003000030210, 0x00027101000302e0, 0x00010000000e4101); + convert(0xe000003000030220, 0x0200000000000000, 0xffffffffffffffff); + convert(0xe000003000030230, 0x00030f2000000000, 0x0000000000030ff0); + convert(0xe000003000030290, 0x0000000000000000, 0x0000000000030140); + convert(0xe0000030000302a0, 0x0000000000000026, 0x7262490000000000); + convert(0xe0000030000302b0, 0x00000000006b6369, 0x0000000000000000); + convert(0xe0000030000302e0, 0x0002710100000000, 0x00010000000f3101); + convert(0xe0000030000302f0, 0x0500000000000000, 0xffffffffffffffff); + convert(0xe000003000030300, 0x000310c000000000, 0x0003126000031190); + convert(0xe000003000030310, 0x0003140000031330, 0x0000000000000000); + convert(0xe000003000030360, 0x0000000000000000, 0x0000000000030140); + convert(0xe000003000030370, 0x0000000000000029, 0x7262490000000000); + convert(0xe000003000030380, 0x00000000006b6369, 0x0000000000000000); + convert(0xe000003000030970, 0x0000000002010102, 0x0000000000000000); + convert(0xe000003000030980, 0x000000004e465e67, 0xffffffff00000000); + /* convert(0x00000000000309a0, 0x0000000000037570, 0x0000000100000000); */ + convert(0xe0000030000309a0, 0x0000000000037570, 0xffffffff00000000); + convert(0xe0000030000309b0, 0x0000000000030070, 0x0000000000000000); + convert(0xe0000030000309c0, 0x000000000003f420, 0x0000000000000000); + convert(0xe000003000030a40, 0x0000000002010125, 0x0000000000000000); + convert(0xe000003000030a50, 0xffffffffffffffff, 0xffffffff00000000); + convert(0xe000003000030a70, 0x0000000000037b78, 0x0000000000000000); + convert(0xe000003000030b10, 0x0000000002010125, 0x0000000000000000); + convert(0xe000003000030b20, 0xffffffffffffffff, 0xffffffff00000000); + convert(0xe000003000030b40, 0x0000000000037d30, 0x0000000000000001); + convert(0xe000003000030be0, 0x00000000ff010203, 0x0000000000000000); + convert(0xe000003000030bf0, 0xffffffffffffffff, 0xffffffff000000ff); + convert(0xe000003000030c10, 0x0000000000037ee8, 0x0100010000000200); + convert(0xe000003000030cb0, 0x00000000ff310111, 0x0000000000000000); + convert(0xe000003000030cc0, 0xffffffffffffffff, 0x0000000000000000); + convert(0xe000003000030d80, 0x0000000002010104, 0x0000000000000000); + convert(0xe000003000030d90, 0xffffffffffffffff, 0x00000000000000ff); + convert(0xe000003000030db0, 0x0000000000037f18, 0x0000000000000000); + convert(0xe000003000030dc0, 0x0000000000000000, 0x0003007000060000); + convert(0xe000003000030de0, 0x0000000000000000, 0x0003021000050000); + convert(0xe000003000030df0, 0x000302e000050000, 0x0000000000000000); + convert(0xe000003000030e30, 0x0000000000000000, 0x000000000000000a); + convert(0xe000003000030e50, 0x00000000ff00011a, 0x0000000000000000); + convert(0xe000003000030e60, 0xffffffffffffffff, 0x0000000000000000); + convert(0xe000003000030e80, 0x0000000000037fe0, 0x9e6e9e9e9e9e9e9e); + convert(0xe000003000030e90, 0x000000000000bc6e, 0x0000000000000000); + convert(0xe000003000030f20, 0x0000000002010205, 0x00000000d0020000); + convert(0xe000003000030f30, 0xffffffffffffffff, 0x0000000e0000000e); + convert(0xe000003000030f40, 0x000000000000000e, 0x0000000000000000); + convert(0xe000003000030f50, 0x0000000000038010, 0x00000000000007ff); + convert(0xe000003000030f70, 0x0000000000000000, 0x0000000022001077); + convert(0xe000003000030fa0, 0x0000000000000000, 0x000000000003f4a8); + convert(0xe000003000030ff0, 0x0000000000310120, 0x0000000000000000); + convert(0xe000003000031000, 0xffffffffffffffff, 0xffffffff00000002); + convert(0xe000003000031010, 0x000000000000000e, 0x0000000000000000); + convert(0xe000003000031020, 0x0000000000038088, 0x0000000000000000); + convert(0xe0000030000310c0, 0x0000000002010205, 0x00000000d0020000); + convert(0xe0000030000310d0, 0xffffffffffffffff, 0x0000000f0000000f); + convert(0xe0000030000310e0, 0x000000000000000f, 0x0000000000000000); + convert(0xe0000030000310f0, 0x00000000000380b8, 0x00000000000007ff); + convert(0xe000003000031120, 0x0000000022001077, 0x00000000000310a9); + convert(0xe000003000031130, 0x00000000580211c1, 0x000000008009104c); + convert(0xe000003000031140, 0x0000000000000000, 0x000000000003f4c0); + convert(0xe000003000031190, 0x0000000000310120, 0x0000000000000000); + convert(0xe0000030000311a0, 0xffffffffffffffff, 0xffffffff00000003); + convert(0xe0000030000311b0, 0x000000000000000f, 0x0000000000000000); + convert(0xe0000030000311c0, 0x0000000000038130, 0x0000000000000000); + convert(0xe000003000031260, 0x0000000000110106, 0x0000000000000000); + convert(0xe000003000031270, 0xffffffffffffffff, 0xffffffff00000004); + convert(0xe000003000031270, 0xffffffffffffffff, 0xffffffff00000004); + convert(0xe000003000031280, 0x000000000000000f, 0x0000000000000000); + convert(0xe0000030000312a0, 0x00000000ff110013, 0x0000000000000000); + convert(0xe0000030000312b0, 0xffffffffffffffff, 0xffffffff00000000); + convert(0xe0000030000312c0, 0x000000000000000f, 0x0000000000000000); + convert(0xe0000030000312e0, 0x0000000000110012, 0x0000000000000000); + convert(0xe0000030000312f0, 0xffffffffffffffff, 0xffffffff00000000); + convert(0xe000003000031300, 0x000000000000000f, 0x0000000000000000); + convert(0xe000003000031310, 0x0000000000038160, 0x0000000000000000); + convert(0xe000003000031330, 0x00000000ff310122, 0x0000000000000000); + convert(0xe000003000031340, 0xffffffffffffffff, 0xffffffff00000005); + convert(0xe000003000031350, 0x000000000000000f, 0x0000000000000000); + convert(0xe000003000031360, 0x0000000000038190, 0x0000000000000000); + convert(0xe000003000031400, 0x0000000000310121, 0x0000000000000000); + convert(0xe000003000031400, 0x0000000000310121, 0x0000000000000000); + convert(0xe000003000031410, 0xffffffffffffffff, 0xffffffff00000006); + convert(0xe000003000031420, 0x000000000000000f, 0x0000000000000000); + convert(0xe000003000031430, 0x00000000000381c0, 0x0000000000000000); + convert(0xe0000030000314d0, 0x00000000ff010201, 0x0000000000000000); + convert(0xe0000030000314e0, 0xffffffffffffffff, 0xffffffff00000000); + convert(0xe000003000031500, 0x00000000000381f0, 0x000030430000ffff); + convert(0xe000003000031510, 0x000000000000ffff, 0x0000000000000000); + convert(0xe0000030000315a0, 0x00000020ff000201, 0x0000000000000000); + convert(0xe0000030000315b0, 0xffffffffffffffff, 0xffffffff00000001); + convert(0xe0000030000315d0, 0x0000000000038240, 0x00003f3f0000ffff); + convert(0xe0000030000315e0, 0x000000000000ffff, 0x0000000000000000); + convert(0xe000003000031670, 0x00000000ff010201, 0x0000000000000000); + convert(0xe000003000031680, 0xffffffffffffffff, 0x0000000100000002); + convert(0xe0000030000316a0, 0x0000000000038290, 0x000030430000ffff); + convert(0xe0000030000316b0, 0x000000000000ffff, 0x0000000000000000); + convert(0xe000003000031740, 0x00000020ff000201, 0x0000000000000000); + convert(0xe000003000031750, 0xffffffffffffffff, 0x0000000500000003); + convert(0xe000003000031770, 0x00000000000382e0, 0x00003f3f0000ffff); + convert(0xe000003000031780, 0x000000000000ffff, 0x0000000000000000); +} + +#endif } diff -Nru a/arch/ia64/sn/io/labelcl.c b/arch/ia64/sn/io/labelcl.c --- a/arch/ia64/sn/io/labelcl.c Mon Dec 23 21:21:53 2002 +++ b/arch/ia64/sn/io/labelcl.c Mon Dec 23 21:21:53 2002 @@ -4,7 +4,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (c) 2001 Silicon Graphics, Inc. All rights reserved. + * Copyright (c) 2001-2002 Silicon Graphics, Inc. All rights reserved. */ #include diff -Nru a/arch/ia64/sn/io/pci.c b/arch/ia64/sn/io/pci.c --- a/arch/ia64/sn/io/pci.c Mon Dec 23 21:21:52 2002 +++ b/arch/ia64/sn/io/pci.c Mon Dec 23 21:21:52 2002 @@ -6,7 +6,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (c) 1997, 1998, 2000-2001 Silicon Graphics, Inc. All rights reserved. + * Copyright (c) 1997, 1998, 2000-2002 Silicon Graphics, Inc. All rights reserved. */ #include #include @@ -44,21 +44,22 @@ extern devfs_handle_t devfn_to_vertex(unsigned char bus, unsigned char devfn); /* - * snia64_read - Read from the config area of the device. + * snia64_read_config_byte - Read a byte from the config area of the device. */ -static int snia64_read (struct pci_bus *bus, unsigned char devfn, - int where, int size, unsigned char *val) +static int snia64_read_config_byte (struct pci_dev *dev, + int where, unsigned char *val) { unsigned long res = 0; + unsigned size = 1; devfs_handle_t device_vertex; - if ( (bus == NULL) || (val == (unsigned char *)0) ) { + if ( (dev == (struct pci_dev *)0) || (val == (unsigned char *)0) ) { return PCIBIOS_DEVICE_NOT_FOUND; } - device_vertex = devfn_to_vertex(bus->number, devfn); + device_vertex = devfn_to_vertex(dev->bus->number, dev->devfn); if (!device_vertex) { DBG("%s : nonexistent device: bus= 0x%x slot= 0x%x func= 0x%x\n", - __FUNCTION__, bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn)); + __FUNCTION__, dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn)); return(-1); } res = pciio_config_get(device_vertex, (unsigned) where, size); @@ -67,49 +68,169 @@ } /* - * snia64_write - Writes to the config area of the device. + * snia64_read_config_word - Read 2 bytes from the config area of the device. */ -static int snia64_write (struct pci_bus *bus, unsigned char devfn, - int where, int size, unsigned char val) +static int snia64_read_config_word (struct pci_dev *dev, + int where, unsigned short *val) { + unsigned long res = 0; + unsigned size = 2; /* 2 bytes */ devfs_handle_t device_vertex; - if ( bus == NULL) { + if ( (dev == (struct pci_dev *)0) || (val == (unsigned short *)0) ) { + return PCIBIOS_DEVICE_NOT_FOUND; + } + device_vertex = devfn_to_vertex(dev->bus->number, dev->devfn); + if (!device_vertex) { + DBG("%s : nonexistent device: bus= 0x%x slot= 0x%x func= 0x%x\n", + __FUNCTION__, dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn)); + return(-1); + } + res = pciio_config_get(device_vertex, (unsigned) where, size); + *val = (unsigned short) res; + return PCIBIOS_SUCCESSFUL; +} + +/* + * snia64_read_config_dword - Read 4 bytes from the config area of the device. + */ +static int snia64_read_config_dword (struct pci_dev *dev, + int where, unsigned int *val) +{ + unsigned long res = 0; + unsigned size = 4; /* 4 bytes */ + devfs_handle_t device_vertex; + + if (where & 3) { + return PCIBIOS_BAD_REGISTER_NUMBER; + } + if ( (dev == (struct pci_dev *)0) || (val == (unsigned int *)0) ) { + return PCIBIOS_DEVICE_NOT_FOUND; + } + + device_vertex = devfn_to_vertex(dev->bus->number, dev->devfn); + if (!device_vertex) { + DBG("%s : nonexistent device: bus= 0x%x slot= 0x%x func= 0x%x\n", + __FUNCTION__, dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn)); + return(-1); + } + res = pciio_config_get(device_vertex, (unsigned) where, size); + *val = (unsigned int) res; + return PCIBIOS_SUCCESSFUL; +} + +/* + * snia64_write_config_byte - Writes 1 byte to the config area of the device. + */ +static int snia64_write_config_byte (struct pci_dev *dev, + int where, unsigned char val) +{ + devfs_handle_t device_vertex; + + if ( dev == (struct pci_dev *)0 ) { return PCIBIOS_DEVICE_NOT_FOUND; } /* * if it's an IOC3 then we bail out, we special * case them with pci_fixup_ioc3 */ - /* Starting 2.5.32 struct pci_dev is not passed down */ - /*if (dev->vendor == PCI_VENDOR_ID_SGI && + if (dev->vendor == PCI_VENDOR_ID_SGI && dev->device == PCI_DEVICE_ID_SGI_IOC3 ) return PCIBIOS_SUCCESSFUL; - */ - device_vertex = devfn_to_vertex(bus->number, devfn); + device_vertex = devfn_to_vertex(dev->bus->number, dev->devfn); + if (!device_vertex) { + DBG("%s : nonexistent device: bus= 0x%x slot= 0x%x func= 0x%x\n", + __FUNCTION__, dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn)); + return(-1); + } + pciio_config_set( device_vertex, (unsigned)where, 1, (uint64_t) val); + + return PCIBIOS_SUCCESSFUL; +} + +/* + * snia64_write_config_word - Writes 2 bytes to the config area of the device. + */ +static int snia64_write_config_word (struct pci_dev *dev, + int where, unsigned short val) +{ + devfs_handle_t device_vertex = NULL; + + if (where & 1) { + return PCIBIOS_BAD_REGISTER_NUMBER; + } + if ( dev == (struct pci_dev *)0 ) { + return PCIBIOS_DEVICE_NOT_FOUND; + } + /* + * if it's an IOC3 then we bail out, we special + * case them with pci_fixup_ioc3 + */ + if (dev->vendor == PCI_VENDOR_ID_SGI && + dev->device == PCI_DEVICE_ID_SGI_IOC3) + return PCIBIOS_SUCCESSFUL; + + device_vertex = devfn_to_vertex(dev->bus->number, dev->devfn); if (!device_vertex) { DBG("%s : nonexistent device: bus= 0x%x slot= 0x%x func= 0x%x\n", - __FUNCTION__, bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn)); + __FUNCTION__, dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn)); return(-1); } - pciio_config_set( device_vertex, (unsigned)where, size, (uint64_t) val); + pciio_config_set( device_vertex, (unsigned)where, 2, (uint64_t) val); + + return PCIBIOS_SUCCESSFUL; +} + +/* + * snia64_write_config_dword - Writes 4 bytes to the config area of the device. + */ +static int snia64_write_config_dword (struct pci_dev *dev, + int where, unsigned int val) +{ + devfs_handle_t device_vertex; + + if (where & 3) { + return PCIBIOS_BAD_REGISTER_NUMBER; + } + if ( dev == (struct pci_dev *)0 ) { + return PCIBIOS_DEVICE_NOT_FOUND; + } + /* + * if it's an IOC3 then we bail out, we special + * case them with pci_fixup_ioc3 + */ + if (dev->vendor == PCI_VENDOR_ID_SGI && + dev->device == PCI_DEVICE_ID_SGI_IOC3) + return PCIBIOS_SUCCESSFUL; + + device_vertex = devfn_to_vertex(dev->bus->number, dev->devfn); + if (!device_vertex) { + DBG("%s : nonexistent device: bus= 0x%x slot= 0x%x func= 0x%x\n", + __FUNCTION__, dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn)); + return(-1); + } + pciio_config_set( device_vertex, (unsigned)where, 4, (uint64_t) val); return PCIBIOS_SUCCESSFUL; } static struct pci_ops snia64_pci_ops = { - .read = snia64_read, - .write = snia64_write, + snia64_read_config_byte, + snia64_read_config_word, + snia64_read_config_dword, + snia64_write_config_byte, + snia64_write_config_word, + snia64_write_config_dword }; /* * snia64_pci_find_bios - SNIA64 pci_find_bios() platform specific code. */ void __init -sn1_pci_find_bios(void) +sn_pci_find_bios(void) { - extern struct pci_ops pci_conf; + extern struct pci_ops *pci_root_ops; /* * Go initialize our IO Infrastructure .. */ @@ -117,8 +238,8 @@ sgi_master_io_infr_init(); - /* sn1_io_infrastructure_init(); */ - pci_conf = snia64_pci_ops; + /* sn_io_infrastructure_init(); */ + pci_root_ops = &snia64_pci_ops; } void @@ -155,22 +276,16 @@ d->resource[i].flags = 0UL; } - /* - * Hardcode Device 4 register(IOC3 is in Slot 4) to set the - * DEV_DIRECT bit. This will not work if IOC3 is not on Slot - * 4. - */ - DBG("pci_fixup_ioc3: FIXME .. need to take NASID into account when setting IOC3 devreg 0x%x\n", *(volatile u32 *)0xc0000a000f000220); - - *(volatile u32 *)0xc0000a000f000220 |= 0x90000; - +#ifdef CONFIG_IA64_SGI_SN1 + *(volatile u32 *)0xc0000a000f000220 |= 0x90000; +#endif d->subsystem_vendor = 0; d->subsystem_device = 0; } #else -void sn1_pci_find_bios(void) {} +void sn_pci_find_bios(void) {} void pci_fixup_ioc3(struct pci_dev *d) {} struct list_head pci_root_buses; struct list_head pci_root_buses; diff -Nru a/arch/ia64/sn/io/pci_dma.c b/arch/ia64/sn/io/pci_dma.c --- a/arch/ia64/sn/io/pci_dma.c Mon Dec 23 21:21:52 2002 +++ b/arch/ia64/sn/io/pci_dma.c Mon Dec 23 21:21:52 2002 @@ -9,6 +9,7 @@ * a description of how these routines should be used. */ +#include #include #include #include @@ -31,232 +32,316 @@ #include #include +/* + * For ATE allocations + */ pciio_dmamap_t get_free_pciio_dmamap(devfs_handle_t); void free_pciio_dmamap(pcibr_dmamap_t); -struct sn1_dma_maps_s *find_sn1_dma_map(dma_addr_t, unsigned char); +static struct sn_dma_maps_s *find_sn_dma_map(dma_addr_t, unsigned char); + +/* + * Toplogy stuff + */ extern devfs_handle_t busnum_to_pcibr_vhdl[]; extern nasid_t busnum_to_nid[]; extern void * busnum_to_atedmamaps[]; -/* - * Get a free pciio_dmamap_t entry. +/** + * get_free_pciio_dmamap - find and allocate an ATE + * @pci_bus: PCI bus to get an entry for + * + * Finds and allocates an ATE on the PCI bus specified + * by @pci_bus. */ pciio_dmamap_t get_free_pciio_dmamap(devfs_handle_t pci_bus) { int i; - struct sn1_dma_maps_s *sn1_dma_map = NULL; + struct sn_dma_maps_s *sn_dma_map = NULL; /* * Darn, we need to get the maps allocated for this bus. */ for (i = 0; i < MAX_PCI_XWIDGET; i++) { if (busnum_to_pcibr_vhdl[i] == pci_bus) { - sn1_dma_map = busnum_to_atedmamaps[i]; + sn_dma_map = busnum_to_atedmamaps[i]; } } /* * Now get a free dmamap entry from this list. */ - for (i=0; idma_addr) { - sn1_dma_map->dma_addr = -1; - return( (pciio_dmamap_t) sn1_dma_map ); + for (i = 0; i < MAX_ATE_MAPS; i++, sn_dma_map++) { + if (!sn_dma_map->dma_addr) { + sn_dma_map->dma_addr = -1; + return( (pciio_dmamap_t) sn_dma_map ); } } - return(NULL); - + return NULL; } -/* - * Free pciio_dmamap_t entry. +/** + * free_pciio_dmamap - free an ATE + * @dma_map: ATE to free + * + * Frees the ATE specified by @dma_map. */ void free_pciio_dmamap(pcibr_dmamap_t dma_map) { - struct sn1_dma_maps_s *sn1_dma_map; + struct sn_dma_maps_s *sn_dma_map; + + sn_dma_map = (struct sn_dma_maps_s *) dma_map; + sn_dma_map->dma_addr = 0; +} + +/** + * find_sn_dma_map - find an ATE associated with @dma_addr and @busnum + * @dma_addr: DMA address to look for + * @busnum: PCI bus to look on + * + * Finds the ATE associated with @dma_addr and @busnum. + */ +static struct sn_dma_maps_s * +find_sn_dma_map(dma_addr_t dma_addr, unsigned char busnum) +{ - sn1_dma_map = (struct sn1_dma_maps_s *) dma_map; - sn1_dma_map->dma_addr = 0; + struct sn_dma_maps_s *sn_dma_map = NULL; + int i; + + sn_dma_map = busnum_to_atedmamaps[busnum]; + + for (i = 0; i < MAX_ATE_MAPS; i++, sn_dma_map++) { + if (sn_dma_map->dma_addr == dma_addr) { + return sn_dma_map; + } + } + return NULL; } -/* - * sn_dma_sync: This routine flushes all DMA buffers for the device into the II. - * This does not mean that the data is in the "Coherence Domain". But it - * is very close. +/** + * sn_dma_sync - try to flush DMA buffers into the coherence domain + * @hwdev: device to flush + * + * This routine flushes all DMA buffers for the device into the II of + * the destination hub. + * + * NOTE!: this does not mean that the data is in the "coherence domain", + * but it is very close. In other words, this routine *does not work* + * as advertised due to hardware bugs. That said, it should be good enough for + * most situations. */ void -sn_dma_sync( struct pci_dev *hwdev ) +sn_dma_sync(struct pci_dev *hwdev) { - struct sn1_device_sysdata *device_sysdata; +#ifdef SN_DMA_SYNC + + struct sn_device_sysdata *device_sysdata; volatile unsigned long dummy; /* - * It is expected that on IA64 platform, a DMA sync ensures that all - * the DMA (dma_handle) are complete and coherent. - * 1. Flush Write Buffers from Bridge. - * 2. Flush Xbow Port. + * A DMA sync is supposed to ensure that + * all the DMA from a particular device + * is complete and coherent. We + * try to do this by + * 1. flushing the write wuffers from Bridge + * 2. flushing the Xbow port. + * Unfortunately, this only gets the DMA transactions 'very close' to + * the coherence domain, but not quite in it. */ - device_sysdata = (struct sn1_device_sysdata *)hwdev->sysdata; + device_sysdata = (struct sn_device_sysdata *)hwdev->sysdata; dummy = (volatile unsigned long ) *device_sysdata->dma_buf_sync; /* - * For the Xbow Port flush, we maybe denied the request because - * someone else may be flushing the Port .. try again. + * For the Xbow port flush, we may be denied the request because + * someone else may be flushing the port .. try again. */ while((volatile unsigned long ) *device_sysdata->xbow_buf_sync) { udelay(2); } +#endif } - -struct sn1_dma_maps_s * -find_sn1_dma_map(dma_addr_t dma_addr, unsigned char busnum) -{ - - struct sn1_dma_maps_s *sn1_dma_map = NULL; - int i; - - sn1_dma_map = busnum_to_atedmamaps[busnum]; - - for (i=0; idma_addr == dma_addr) { - return( sn1_dma_map ); - } - } - -printk("find_pciio_dmamap: Unable find the corresponding dma map\n"); - - return(NULL); - -} - -/* - * sn1 platform specific pci_alloc_consistent() +/** + * sn_pci_alloc_consistent - allocate memory for coherent DMA + * @hwdev: device to allocate for + * @size: size of the region + * @dma_handle: DMA (bus) address + * + * pci_alloc_consistent() returns a pointer to a memory region suitable for + * coherent DMA traffic to/from a PCI device. On SN platforms, this means + * that @dma_handle will have the %PCIIO_DMA_CMD flag set. + * + * This interface is usually used for "command" streams (e.g. the command + * queue for a SCSI controller). See Documentation/DMA-mapping.txt for + * more information. Note that this routine will always put a 32 bit + * DMA address into @dma_handle. This is because most devices + * that are capable of 64 bit PCI DMA transactions can't do 64 bit _coherent_ + * DMAs, and unfortunately this interface has to cater to the LCD. Oh well. * - * this interface is meant for "command" streams, i.e. called only - * once for initializing a device, so we don't want prefetching or - * write gathering turned on, hence the PCIIO_DMA_CMD flag + * Also known as platform_pci_alloc_consistent() by the IA64 machvec code. */ void * -sn1_pci_alloc_consistent (struct pci_dev *hwdev, size_t size, dma_addr_t *dma_handle) +sn_pci_alloc_consistent(struct pci_dev *hwdev, size_t size, dma_addr_t *dma_handle) { - void *ret; - int gfp = GFP_ATOMIC; - devfs_handle_t vhdl; - struct sn1_device_sysdata *device_sysdata; - paddr_t temp_ptr; + void *cpuaddr; + devfs_handle_t vhdl; + struct sn_device_sysdata *device_sysdata; + unsigned long phys_addr; + pciio_dmamap_t dma_map = 0; + struct sn_dma_maps_s *sn_dma_map; - *dma_handle = (dma_addr_t) NULL; + *dma_handle = 0; + + /* We can't easily support < 32 bit devices */ + if (IS_PCI32L(hwdev)) + return NULL; /* - * get vertex for the device + * Get hwgraph vertex for the device */ - device_sysdata = (struct sn1_device_sysdata *) hwdev->sysdata; + device_sysdata = (struct sn_device_sysdata *) hwdev->sysdata; vhdl = device_sysdata->vhdl; - if ( (ret = (void *)__get_free_pages(gfp, get_order(size))) ) { - memset(ret, 0, size); - } else { - return(NULL); - } + /* + * Allocate the memory. FIXME: if we're allocating for + * two devices on the same bus, we should at least try to + * allocate memory in the same 2 GB window to avoid using + * ATEs for the translation. See the comment above about the + * 32 bit requirement for this function. + */ + if(!(cpuaddr = (void *)__get_free_pages(GFP_ATOMIC, get_order(size)))) + return NULL; - temp_ptr = (paddr_t) __pa(ret); - if (IS_PCIA64(hwdev)) { + memset(cpuaddr, 0, size); /* have to zero it out */ - /* - * This device supports 64bits DMA addresses. - */ + /* physical addr. of the memory we just got */ + phys_addr = __pa(cpuaddr); + + /* + * This will try to use a Direct Map register to do the + * 32 bit DMA mapping, but it may not succeed if another + * device on the same bus is already mapped with different + * attributes or to a different memory region. + */ #ifdef CONFIG_IA64_SGI_SN1 - *dma_handle = pciio_dmatrans_addr(vhdl, NULL, temp_ptr, size, - PCIBR_BARRIER | PCIIO_BYTE_STREAM | PCIIO_DMA_CMD - | PCIIO_DMA_A64 ); -#else /* SN2 */ - *dma_handle = pciio_dmatrans_addr(vhdl, NULL, temp_ptr, size, - PCIBR_BARRIER | PCIIO_DMA_CMD | PCIIO_DMA_A64 ); + *dma_handle = pciio_dmatrans_addr(vhdl, NULL, phys_addr, size, + PCIIO_BYTE_STREAM | + PCIIO_DMA_CMD); +#elif defined(CONFIG_IA64_SGI_SN2) + *dma_handle = pciio_dmatrans_addr(vhdl, NULL, phys_addr, size, + ((IS_PIC_DEVICE(hwdev)) ? 0 : PCIIO_BYTE_STREAM) | + PCIIO_DMA_CMD); +#else +#error unsupported platform #endif - return (ret); - } - /* - * Devices that supports 32 Bits upto 63 Bits DMA Address gets - * 32 Bits DMA addresses. - * - * First try to get 32 Bit Direct Map Support. + * It is a 32 bit card and we cannot do direct mapping, + * so we try to use an ATE. */ - if (IS_PCI32G(hwdev)) { + if (!(*dma_handle)) { #ifdef CONFIG_IA64_SGI_SN1 - *dma_handle = pciio_dmatrans_addr(vhdl, NULL, temp_ptr, size, - PCIBR_BARRIER | PCIIO_BYTE_STREAM | PCIIO_DMA_CMD); -#else /* SN2 */ - *dma_handle = pciio_dmatrans_addr(vhdl, NULL, temp_ptr, size, - PCIBR_BARRIER | PCIIO_DMA_CMD); + dma_map = pciio_dmamap_alloc(vhdl, NULL, size, + PCIIO_BYTE_STREAM | + PCIIO_DMA_CMD); +#elif defined(CONFIG_IA64_SGI_SN2) + dma_map = pciio_dmamap_alloc(vhdl, NULL, size, + ((IS_PIC_DEVICE(hwdev)) ? 0 : PCIIO_BYTE_STREAM) | + PCIIO_DMA_CMD); +#else +#error unsupported platform #endif - - if (dma_handle) { - return (ret); - } else { - /* - * We need to map this request by using ATEs. - */ - printk("sn1_pci_alloc_consistent: 32Bits DMA Page Map support not available yet!"); + if (!dma_map) { + printk(KERN_ERR "sn_pci_alloc_consistent: Unable to " + "allocate anymore 32 bit page map entries.\n"); BUG(); } + *dma_handle = (dma_addr_t) pciio_dmamap_addr(dma_map,phys_addr, + size); + sn_dma_map = (struct sn_dma_maps_s *)dma_map; + sn_dma_map->dma_addr = *dma_handle; } - if (IS_PCI32L(hwdev)) { - /* - * SNIA64 cannot support DMA Addresses smaller than 32 bits. - */ - return (NULL); - } - - return NULL; + return cpuaddr; } +/** + * sn_pci_free_consistent - free memory associated with coherent DMAable region + * @hwdev: device to free for + * @size: size to free + * @vaddr: kernel virtual address to free + * @dma_handle: DMA address associated with this region + * + * Frees the memory allocated by pci_alloc_consistent(). Also known + * as platform_pci_free_consistent() by the IA64 machvec code. + */ void -sn1_pci_free_consistent(struct pci_dev *hwdev, size_t size, void *vaddr, dma_addr_t dma_handle) +sn_pci_free_consistent(struct pci_dev *hwdev, size_t size, void *vaddr, dma_addr_t dma_handle) { + struct sn_dma_maps_s *sn_dma_map = NULL; + + /* + * Get the sn_dma_map entry. + */ + if (IS_PCI32_MAPPED(dma_handle)) + sn_dma_map = find_sn_dma_map(dma_handle, hwdev->bus->number); + + /* + * and free it if necessary... + */ + if (sn_dma_map) { + pciio_dmamap_done((pciio_dmamap_t)sn_dma_map); + pciio_dmamap_free((pciio_dmamap_t)sn_dma_map); + sn_dma_map->dma_addr = (dma_addr_t)NULL; + } free_pages((unsigned long) vaddr, get_order(size)); } -/* - * On sn1 we use the page entry of the scatterlist to store - * the physical address corresponding to the given virtual address +/** + * sn_pci_map_sg - map a scatter-gather list for DMA + * @hwdev: device to map for + * @sg: scatterlist to map + * @nents: number of entries + * @direction: direction of the DMA transaction + * + * Maps each entry of @sg for DMA. Also known as platform_pci_map_sg by the + * IA64 machvec code. */ int -sn1_pci_map_sg (struct pci_dev *hwdev, - struct scatterlist *sg, int nents, int direction) +sn_pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nents, int direction) { int i; - devfs_handle_t vhdl; + devfs_handle_t vhdl; dma_addr_t dma_addr; - paddr_t temp_ptr; - struct sn1_device_sysdata *device_sysdata; + unsigned long phys_addr; + struct sn_device_sysdata *device_sysdata; pciio_dmamap_t dma_map; - - + /* can't go anywhere w/o a direction in life */ if (direction == PCI_DMA_NONE) BUG(); /* - * Handle 64 bit cards. + * Get the hwgraph vertex for the device */ - device_sysdata = (struct sn1_device_sysdata *) hwdev->sysdata; + device_sysdata = (struct sn_device_sysdata *) hwdev->sysdata; vhdl = device_sysdata->vhdl; + + /* + * Setup a DMA address for each entry in the + * scatterlist. + */ for (i = 0; i < nents; i++, sg++) { /* this catches incorrectly written drivers that attempt to map scatterlists that they have previously mapped. we print a warning and continue, but the driver should be fixed */ - switch (((u64)sg->address) >> 60) { + switch (((u64)sg->dma_address) >> 60) { case 0xa: case 0xb: #ifdef DEBUG @@ -264,54 +349,53 @@ NAG("A PCI driver (for device at%8s) has attempted to " "map a scatterlist that was previously mapped at " "%p - this is currently being worked around.\n", - hwdev->slot_name, (void *)sg->address); -#endif - temp_ptr = (u64)sg->address & TO_PHYS_MASK; + hwdev->slot_name, (void *)sg->dma_address); + phys_addr = (u64)sg->dma_address & TO_PHYS_MASK; break; - case 0xe: /* a good address, we now map it. */ - temp_ptr = (paddr_t) __pa(sg->address); +#endif + default: /* not previously mapped, get the phys. addr */ + phys_addr = __pa(sg->dma_address); break; - default: - printk(KERN_ERR - "Very bad address (%p) passed to sn1_pci_map_sg\n", - (void *)sg->address); - BUG(); } - sg->page = (char *)NULL; + sg->page = NULL; dma_addr = 0; /* - * Handle the most common case 64Bit cards. + * Handle the most common case: 64 bit cards. This + * call should always succeed. */ if (IS_PCIA64(hwdev)) { -#ifdef CONFIG_IA64_SGI_SN1 - dma_addr = (dma_addr_t) pciio_dmatrans_addr(vhdl, NULL, - temp_ptr, sg->length, - PCIIO_BYTE_STREAM | PCIIO_DMA_DATA | - PCIIO_DMA_A64 ); -#else - dma_addr = (dma_addr_t) pciio_dmatrans_addr(vhdl, NULL, - temp_ptr, sg->length, - PCIIO_DMA_DATA | PCIIO_DMA_A64 ); -#endif - sg->address = (char *)dma_addr; + dma_addr = pciio_dmatrans_addr(vhdl, NULL, phys_addr, + sg->length, + ((IS_PIC_DEVICE(hwdev)) ? 0 : PCIIO_BYTE_STREAM) | + PCIIO_DMA_DATA | + PCIIO_DMA_A64); + sg->dma_address = (char *)dma_addr; continue; } /* - * Handle 32Bits and greater cards. + * Handle 32-63 bit cards via direct mapping */ if (IS_PCI32G(hwdev)) { #ifdef CONFIG_IA64_SGI_SN1 - dma_addr = (dma_addr_t) pciio_dmatrans_addr(vhdl, NULL, - temp_ptr, sg->length, - PCIIO_BYTE_STREAM | PCIIO_DMA_DATA); + dma_addr = pciio_dmatrans_addr(vhdl, NULL, phys_addr, + sg->length, + PCIIO_BYTE_STREAM | + PCIIO_DMA_DATA); +#elif defined(CONFIG_IA64_SGI_SN2) + dma_addr = pciio_dmatrans_addr(vhdl, NULL, phys_addr, + sg->length, + ((IS_PIC_DEVICE(hwdev)) ? 0 : PCIIO_BYTE_STREAM) | + PCIIO_DMA_DATA); #else - dma_addr = (dma_addr_t) pciio_dmatrans_addr(vhdl, NULL, - temp_ptr, sg->length, PCIIO_DMA_DATA); +#error unsupported platform #endif + /* + * See if we got a direct map entry + */ if (dma_addr) { - sg->address = (char *)dma_addr; + sg->dma_address = (char *)dma_addr; continue; } @@ -322,16 +406,25 @@ * so we use an ATE. */ dma_map = 0; +#ifdef CONFIG_IA64_SGI_SN1 + dma_map = pciio_dmamap_alloc(vhdl, NULL, sg->length, + PCIIO_BYTE_STREAM | + PCIIO_DMA_DATA); +#elif defined(CONFIG_IA64_SGI_SN2) dma_map = pciio_dmamap_alloc(vhdl, NULL, sg->length, - DMA_DATA_FLAGS); + ((IS_PIC_DEVICE(hwdev)) ? 0 : PCIIO_BYTE_STREAM) | + PCIIO_DMA_DATA); +#else +#error unsupported platform +#endif if (!dma_map) { printk(KERN_ERR "sn_pci_map_sg: Unable to allocate " "anymore 32 bit page map entries.\n"); BUG(); } dma_addr = pciio_dmamap_addr(dma_map, phys_addr, sg->length); - sg->address = (char *)dma_addr; - sg->page = (char *)dma_map; + sg->dma_address = (char *)dma_addr; + sg->page = (struct page *)dma_map; } @@ -339,34 +432,38 @@ } -/* - * Unmap a set of streaming mode DMA translations. - * Again, cpu read rules concerning calls here are the same as for - * pci_unmap_single() above. +/** + * sn_pci_unmap_sg - unmap a scatter-gather list + * @hwdev: device to unmap + * @sg: scatterlist to unmap + * @nents: number of scatterlist entries + * @direction: DMA direction + * + * Unmap a set of streaming mode DMA translations. Again, cpu read rules + * concerning calls here are the same as for pci_unmap_single() below. Also + * known as sn_pci_unmap_sg() by the IA64 machvec code. */ void -sn1_pci_unmap_sg (struct pci_dev *hwdev, struct scatterlist *sg, int nelems, int direction) +sn_pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nents, int direction) { int i; - struct sn1_dma_maps_s *sn1_dma_map; - + struct sn_dma_maps_s *sn_dma_map; + /* can't go anywhere w/o a direction in life */ if (direction == PCI_DMA_NONE) BUG(); - for (i = 0; i < nelems; i++, sg++) + for (i = 0; i < nents; i++, sg++) if (sg->page) { /* * We maintain the DMA Map pointer in sg->page if * it is ever allocated. */ - /* phys_to_virt((dma_addr_t)sg->address | ~0x80000000); */ - /* sg->address = sg->page; */ - sg->address = (char *)-1; - sn1_dma_map = (struct sn1_dma_maps_s *)sg->page; - pciio_dmamap_done((pciio_dmamap_t)sn1_dma_map); - pciio_dmamap_free((pciio_dmamap_t)sn1_dma_map); - sn1_dma_map->dma_addr = 0; + sg->dma_address = 0; + sn_dma_map = (struct sn_dma_maps_s *)sg->page; + pciio_dmamap_done((pciio_dmamap_t)sn_dma_map); + pciio_dmamap_free((pciio_dmamap_t)sn_dma_map); + sn_dma_map->dma_addr = 0; sg->page = 0; } @@ -392,146 +489,212 @@ * get rid of dev_desc and vhdl (seems redundant given a pci_dev); * figure out how to save dmamap handle so can use two step. */ -dma_addr_t sn1_pci_map_single (struct pci_dev *hwdev, - void *ptr, size_t size, int direction) +dma_addr_t +sn_pci_map_single(struct pci_dev *hwdev, void *ptr, size_t size, int direction) { - devfs_handle_t vhdl; + devfs_handle_t vhdl; dma_addr_t dma_addr; - paddr_t temp_ptr; - struct sn1_device_sysdata *device_sysdata; + unsigned long phys_addr; + struct sn_device_sysdata *device_sysdata; pciio_dmamap_t dma_map = NULL; - struct sn1_dma_maps_s *sn1_dma_map; - + struct sn_dma_maps_s *sn_dma_map; if (direction == PCI_DMA_NONE) BUG(); + /* SN cannot support DMA addresses smaller than 32 bits. */ + if (IS_PCI32L(hwdev)) + return 0; /* * find vertex for the device */ - device_sysdata = (struct sn1_device_sysdata *)hwdev->sysdata; + device_sysdata = (struct sn_device_sysdata *)hwdev->sysdata; vhdl = device_sysdata->vhdl; /* * Call our dmamap interface */ dma_addr = 0; - temp_ptr = (paddr_t) __pa(ptr); + phys_addr = __pa(ptr); if (IS_PCIA64(hwdev)) { - /* - * This device supports 64bits DMA addresses. - */ -#ifdef CONFIG_IA64_SGI_SN1 - dma_addr = (dma_addr_t) pciio_dmatrans_addr(vhdl, NULL, - temp_ptr, size, - PCIIO_BYTE_STREAM | PCIIO_DMA_DATA | PCIIO_DMA_A64 ); -#else - dma_addr = (dma_addr_t) pciio_dmatrans_addr(vhdl, NULL, - temp_ptr, size, PCIIO_DMA_DATA | PCIIO_DMA_A64 ); -#endif - return (dma_addr); + /* This device supports 64 bit DMA addresses. */ + dma_addr = pciio_dmatrans_addr(vhdl, NULL, phys_addr, size, + ((IS_PIC_DEVICE(hwdev)) ? 0 : PCIIO_BYTE_STREAM) | + PCIIO_DMA_DATA | + PCIIO_DMA_A64); + return dma_addr; } /* - * Devices that supports 32 Bits upto 63 Bits DMA Address gets - * 32 Bits DMA addresses. + * Devices that support 32 bit to 63 bit DMA addresses get + * 32 bit DMA addresses. * - * First try to get 32 Bit Direct Map Support. + * First try to get a 32 bit direct map register. */ if (IS_PCI32G(hwdev)) { #ifdef CONFIG_IA64_SGI_SN1 - dma_addr = (dma_addr_t) pciio_dmatrans_addr(vhdl, NULL, - temp_ptr, size, - PCIIO_BYTE_STREAM | PCIIO_DMA_DATA); + dma_addr = pciio_dmatrans_addr(vhdl, NULL, phys_addr, size, + PCIIO_BYTE_STREAM | + PCIIO_DMA_DATA); +#elif defined(CONFIG_IA64_SGI_SN2) + dma_addr = pciio_dmatrans_addr(vhdl, NULL, phys_addr, size, + ((IS_PIC_DEVICE(hwdev)) ? 0 : PCIIO_BYTE_STREAM) | + PCIIO_DMA_DATA); #else - dma_addr = (dma_addr_t) pciio_dmatrans_addr(vhdl, NULL, - temp_ptr, size, PCIIO_DMA_DATA); +#error unsupported platform #endif - if (dma_addr) { - return (dma_addr); - } + if (dma_addr) + return dma_addr; } - if (IS_PCI32L(hwdev)) { - /* - * SNIA64 cannot support DMA Addresses smaller than 32 bits. - */ - return ((dma_addr_t) NULL); - } - /* - * It is a 32bit card and we cannot do Direct mapping. - * Let's 32Bit Page map the request. + * It's a 32 bit card and we cannot do direct mapping so + * let's use the PMU instead. */ dma_map = NULL; #ifdef CONFIG_IA64_SGI_SN1 - dma_map = pciio_dmamap_alloc(vhdl, NULL, size, PCIIO_BYTE_STREAM | + dma_map = pciio_dmamap_alloc(vhdl, NULL, size, PCIIO_BYTE_STREAM | PCIIO_DMA_DATA); +#elif defined(CONFIG_IA64_SGI_SN2) + dma_map = pciio_dmamap_alloc(vhdl, NULL, size, + ((IS_PIC_DEVICE(hwdev)) ? 0 : PCIIO_BYTE_STREAM) | + PCIIO_DMA_DATA); #else - dma_map = pciio_dmamap_alloc(vhdl, NULL, size, PCIIO_DMA_DATA); +#error unsupported platform #endif + if (!dma_map) { - printk("pci_map_single: Unable to allocate anymore 32Bits Page Map entries.\n"); + printk(KERN_ERR "pci_map_single: Unable to allocate anymore " + "32 bit page map entries.\n"); BUG(); } - dma_addr = (dma_addr_t) pciio_dmamap_addr(dma_map, temp_ptr, size); - /* printk("pci_map_single: dma_map 0x%p Phys Addr 0x%p dma_addr 0x%p\n", dma_map, - temp_ptr, dma_addr); */ - sn1_dma_map = (struct sn1_dma_maps_s *)dma_map; - sn1_dma_map->dma_addr = dma_addr; + dma_addr = (dma_addr_t) pciio_dmamap_addr(dma_map, phys_addr, size); + sn_dma_map = (struct sn_dma_maps_s *)dma_map; + sn_dma_map->dma_addr = dma_addr; return ((dma_addr_t)dma_addr); } +/** + * sn_pci_unmap_single - unmap a region used for DMA + * @hwdev: device to unmap + * @dma_addr: DMA address to unmap + * @size: size of region + * @direction: DMA direction + * + * Unmaps the region pointed to by @dma_addr. Also known as + * platform_pci_unmap_single() by the IA64 machvec code. + */ void -sn1_pci_unmap_single (struct pci_dev *hwdev, dma_addr_t dma_addr, size_t size, int direction) +sn_pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr, size_t size, int direction) { - - struct sn1_dma_maps_s *sn1_dma_map = NULL; + struct sn_dma_maps_s *sn_dma_map = NULL; if (direction == PCI_DMA_NONE) BUG(); /* - * Get the sn1_dma_map entry. + * Get the sn_dma_map entry. */ if (IS_PCI32_MAPPED(dma_addr)) - sn1_dma_map = find_sn1_dma_map(dma_addr, hwdev->bus->number); + sn_dma_map = find_sn_dma_map(dma_addr, hwdev->bus->number); - if (sn1_dma_map) { - pciio_dmamap_done((pciio_dmamap_t)sn1_dma_map); - pciio_dmamap_free((pciio_dmamap_t)sn1_dma_map); - sn1_dma_map->dma_addr = (dma_addr_t)NULL; + /* + * and free it if necessary... + */ + if (sn_dma_map) { + pciio_dmamap_done((pciio_dmamap_t)sn_dma_map); + pciio_dmamap_free((pciio_dmamap_t)sn_dma_map); + sn_dma_map->dma_addr = (dma_addr_t)NULL; } - } +/** + * sn_pci_dma_sync_single - make sure all DMAs have completed + * @hwdev: device to sync + * @dma_handle: DMA address to sync + * @size: size of region + * @direction: DMA direction + * + * This routine is supposed to sync the DMA region specified + * by @dma_handle into the 'coherence domain'. See sn_dma_sync() + * above for more information. Also known as + * platform_pci_dma_sync_single() by the IA64 machvec code. + */ void -sn1_pci_dma_sync_single (struct pci_dev *hwdev, dma_addr_t dma_handle, size_t size, int direction) +sn_pci_dma_sync_single(struct pci_dev *hwdev, dma_addr_t dma_handle, size_t size, int direction) { - - if (direction == PCI_DMA_NONE) + if (direction == PCI_DMA_NONE) BUG(); sn_dma_sync(hwdev); - } +/** + * sn_pci_dma_sync_sg - make sure all DMAs have completed + * @hwdev: device to sync + * @sg: scatterlist to sync + * @nents: number of entries in the scatterlist + * @direction: DMA direction + * + * This routine is supposed to sync the DMA regions specified + * by @sg into the 'coherence domain'. See sn_dma_sync() + * above for more information. Also known as + * platform_pci_dma_sync_sg() by the IA64 machvec code. + */ void -sn1_pci_dma_sync_sg (struct pci_dev *hwdev, struct scatterlist *sg, int nelems, int direction) +sn_pci_dma_sync_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nents, int direction) { if (direction == PCI_DMA_NONE) BUG(); sn_dma_sync(hwdev); - } +/** + * sn_dma_address - get the DMA address for the first entry of a scatterlist + * @sg: sg to look at + * + * Gets the DMA address for the scatterlist @sg. Also known as + * platform_dma_address() by the IA64 machvec code. + */ unsigned long -sn1_dma_address (struct scatterlist *sg) +sn_dma_address(struct scatterlist *sg) { - return ((unsigned long)sg->address); + return ((unsigned long)sg->dma_address); } + +/** + * sn_dma_supported - test a DMA mask + * @hwdev: device to test + * @mask: DMA mask to test + * + * Return whether the given PCI device DMA address mask can be supported + * properly. For example, if your device can only drive the low 24-bits + * during PCI bus mastering, then you would pass 0x00ffffff as the mask to + * this function. Of course, SN only supports devices that have 32 or more + * address bits when using the PMU. We could theoretically support <32 bit + * cards using direct mapping, but we'll worry about that later--on the off + * chance that someone actually wants to use such a card. + */ +int +sn_pci_dma_supported(struct pci_dev *hwdev, u64 mask) +{ + if (mask < 0xffffffff) + return 0; + return 1; +} + +EXPORT_SYMBOL(sn_pci_unmap_single); +EXPORT_SYMBOL(sn_pci_map_single); +EXPORT_SYMBOL(sn_pci_dma_sync_single); +EXPORT_SYMBOL(sn_pci_map_sg); +EXPORT_SYMBOL(sn_pci_unmap_sg); +EXPORT_SYMBOL(sn_pci_alloc_consistent); +EXPORT_SYMBOL(sn_pci_free_consistent); +EXPORT_SYMBOL(sn_dma_address); +EXPORT_SYMBOL(sn_pci_dma_supported); + diff -Nru a/arch/ia64/sn/io/pciba.c b/arch/ia64/sn/io/pciba.c --- a/arch/ia64/sn/io/pciba.c Mon Dec 23 21:21:50 2002 +++ b/arch/ia64/sn/io/pciba.c Mon Dec 23 21:21:50 2002 @@ -210,31 +210,31 @@ /* file operations for each type of node */ static struct file_operations rom_fops = { - .owner = THIS_MODULE, - .mmap = rom_mmap, - .open = generic_open, - .release = rom_release + owner: THIS_MODULE, + mmap: rom_mmap, + open: generic_open, + release: rom_release }; static struct file_operations base_fops = { - .owner = THIS_MODULE, - .mmap = base_mmap, - .open = generic_open + owner: THIS_MODULE, + mmap: base_mmap, + open: generic_open }; static struct file_operations config_fops = { - .owner = THIS_MODULE, - .ioctl = config_ioctl, - .open = generic_open + owner: THIS_MODULE, + ioctl: config_ioctl, + open: generic_open }; static struct file_operations dma_fops = { - .owner = THIS_MODULE, - .ioctl = dma_ioctl, - .mmap = dma_mmap, - .open = generic_open + owner: THIS_MODULE, + ioctl: dma_ioctl, + mmap: dma_mmap, + open: generic_open }; @@ -346,9 +346,6 @@ return success; } - -#endif /* CONFIG_IA64_SGI_SN1 */ - static void __exit unregister_with_devfs(void) diff -Nru a/arch/ia64/sn/io/sgi_if.c b/arch/ia64/sn/io/sgi_if.c --- a/arch/ia64/sn/io/sgi_if.c Mon Dec 23 21:21:55 2002 +++ b/arch/ia64/sn/io/sgi_if.c Mon Dec 23 21:21:55 2002 @@ -4,7 +4,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 1992 - 1997, 2000-2001 Silicon Graphics, Inc. All rights reserved. + * Copyright (C) 1992 - 1997, 2000-2002 Silicon Graphics, Inc. All rights reserved. */ #include @@ -20,14 +20,50 @@ #include #include +unsigned char Is_pic_on_this_nasid[512]; /* non-0 when this is a pic shub */ + void * snia_kmem_zalloc(size_t size, int flag) { void *ptr = kmalloc(size, GFP_KERNEL); - BZERO(ptr, size); - return ptr; + if ( ptr ) + BZERO(ptr, size); + return(ptr); } +void +snia_kmem_free(void *ptr, size_t size) +{ + kfree(ptr); +} + +int +nic_vertex_info_match(devfs_handle_t v, char *s) +{ + /* we don't support this */ + return(0); +} + +/* + * the alloc/free_node routines do a simple kmalloc for now .. + */ +void * +snia_kmem_alloc_node(register size_t size, register int flags, cnodeid_t node) +{ + /* someday will Allocate on node 'node' */ + return(kmalloc(size, GFP_KERNEL)); +} + +void * +snia_kmem_zalloc_node(register size_t size, register int flags, cnodeid_t node) +{ + void *ptr = kmalloc(size, GFP_KERNEL); + if ( ptr ) + BZERO(ptr, size); + return(ptr); +} + + #define xtod(c) ((c) <= '9' ? '0' - (c) : 'a' - (c) - 10) long atoi(register char *p) @@ -66,4 +102,112 @@ } } return (neg ? n : -n); +} + +char * +strtok_r(char *string, const char *sepset, char **lasts) +{ + register char *q, *r; + + /*first or subsequent call*/ + if (string == NULL) + string = *lasts; + + if(string == 0) /* return if no tokens remaining */ + return(NULL); + + q = string + strspn(string, sepset); /* skip leading separators */ + + if(*q == '\0') { /* return if no tokens remaining */ + *lasts = 0; /* indicate this is last token */ + return(NULL); + } + + if((r = strpbrk(q, sepset)) == NULL) /* move past token */ + *lasts = 0; /* indicate this is last token */ + else { + *r = '\0'; + *lasts = r+1; + } + return(q); +} + +/* + * print_register() allows formatted printing of bit fields. individual + * bit fields are described by a struct reg_desc, multiple bit fields within + * a single word can be described by multiple reg_desc structures. + * %r outputs a string of the format "" + * %R outputs a string of the format "0x%x" + * + * The fields in a reg_desc are: + * unsigned long long rd_mask; An appropriate mask to isolate the bit field + * within a word, and'ed with val + * + * int rd_shift; A shift amount to be done to the isolated + * bit field. done before printing the isolate + * bit field with rd_format and before searching + * for symbolic value names in rd_values + * + * char *rd_name; If non-null, a bit field name to label any + * out from rd_format or searching rd_values. + * if neither rd_format or rd_values is non-null + * rd_name is printed only if the isolated + * bit field is non-null. + * + * char *rd_format; If non-null, the shifted bit field value + * is printed using this format. + * + * struct reg_values *rd_values; If non-null, a pointer to a table + * matching numeric values with symbolic names. + * rd_values are searched and the symbolic + * value is printed if a match is found, if no + * match is found "???" is printed. + * + */ + +void +print_register(unsigned long long reg, struct reg_desc *addr) +{ + register struct reg_desc *rd; + register struct reg_values *rv; + unsigned long long field; + int any; + + printk("<"); + any = 0; + for (rd = addr; rd->rd_mask; rd++) { + field = reg & rd->rd_mask; + field = (rd->rd_shift > 0) ? field << rd->rd_shift : field >> -rd->rd_shift; + if (any && (rd->rd_format || rd->rd_values || (rd->rd_name && field))) + printk(","); + if (rd->rd_name) { + if (rd->rd_format || rd->rd_values || field) { + printk("%s", rd->rd_name); + any = 1; + } + if (rd->rd_format || rd->rd_values) { + printk("="); + any = 1; + } + } + /* You can have any format so long as it is %x */ + if (rd->rd_format) { + printk("%llx", field); + any = 1; + if (rd->rd_values) + printk(":"); + } + if (rd->rd_values) { + any = 1; + for (rv = rd->rd_values; rv->rv_name; rv++) { + if (field == rv->rv_value) { + printk("%s", rv->rv_name); + break; + } + } + if (rv->rv_name == NULL) + printk("???"); + } + } + printk(">\n"); } diff -Nru a/arch/ia64/sn/io/sgi_io_sim.c b/arch/ia64/sn/io/sgi_io_sim.c --- a/arch/ia64/sn/io/sgi_io_sim.c Mon Dec 23 21:21:53 2002 +++ b/arch/ia64/sn/io/sgi_io_sim.c Mon Dec 23 21:21:53 2002 @@ -4,7 +4,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 1992 - 1997, 2000-2001 Silicon Graphics, Inc. All rights reserved. + * Copyright (C) 1992 - 1997, 2000-2002 Silicon Graphics, Inc. All rights reserved. */ #include @@ -71,6 +71,9 @@ */ static __psunsigned_t master_bridge_base = (__psunsigned_t)NULL; nasid_t console_nasid = (nasid_t)-1; +#if !defined(CONFIG_IA64_SGI_SN1) +char master_baseio_wid; +#endif static char console_wid; static char console_pcislot; @@ -92,6 +95,7 @@ return 0; } +#if defined(CONFIG_IA64_SGI_SN1) int is_master_nasid_widget(nasid_t test_nasid, xwidgetnum_t test_wid) { @@ -111,6 +115,29 @@ return 0; } } +#else +int +is_master_baseio_nasid_widget(nasid_t test_nasid, xwidgetnum_t test_wid) +{ + extern nasid_t master_baseio_nasid; + + /* + * If the widget numbers are different, we're not the master. + */ + if (test_wid != (xwidgetnum_t)master_baseio_wid) { + return 0; + } + + /* + * If the NASIDs are the same or equivalent, we're the master. + */ + if (check_nasid_equiv(test_nasid, master_baseio_nasid)) { + return 1; + } else { + return 0; + } +} +#endif /* CONFIG_IA64_SGI_SN1 */ /* * Routines provided by ml/SN/nvram.c diff -Nru a/arch/ia64/sn/io/sn1/hub_intr.c b/arch/ia64/sn/io/sn1/hub_intr.c --- a/arch/ia64/sn/io/sn1/hub_intr.c Mon Dec 23 21:21:55 2002 +++ b/arch/ia64/sn/io/sn1/hub_intr.c Mon Dec 23 21:21:55 2002 @@ -1,4 +1,4 @@ -/* $Id: io.c,v 1.2 2001/06/26 14:02:43 pfg Exp $ +/* $Id: hub_intr.c,v 1.1 2002/02/28 17:31:25 marcelo Exp $ * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive diff -Nru a/arch/ia64/sn/io/sn1/hubcounters.c b/arch/ia64/sn/io/sn1/hubcounters.c --- a/arch/ia64/sn/io/sn1/hubcounters.c Mon Dec 23 21:21:52 2002 +++ b/arch/ia64/sn/io/sn1/hubcounters.c Mon Dec 23 21:21:52 2002 @@ -1,10 +1,10 @@ -/* $Id:$ +/* $Id: hubcounters.c,v 1.1 2002/02/28 17:31:25 marcelo Exp $ * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 1992 - 1997, 2000 - 2001 Silicon Graphics, Inc. + * Copyright (C) 1992-1997,2000-2002 Silicon Graphics, Inc. * All rights reserved. */ #include @@ -24,7 +24,7 @@ static int hubstats_ioctl(struct inode *, struct file *, unsigned int, unsigned long); struct file_operations hub_mon_fops = { - .ioctl = hubstats_ioctl, + ioctl: hubstats_ioctl, }; #define HUB_CAPTURE_TICKS (2 * HZ) diff -Nru a/arch/ia64/sn/io/sn1/huberror.c b/arch/ia64/sn/io/sn1/huberror.c --- a/arch/ia64/sn/io/sn1/huberror.c Mon Dec 23 21:21:51 2002 +++ b/arch/ia64/sn/io/sn1/huberror.c Mon Dec 23 21:21:51 2002 @@ -1,4 +1,4 @@ -/* $Id$ +/* $Id: huberror.c,v 1.1 2002/02/28 17:31:25 marcelo Exp $ * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive diff -Nru a/arch/ia64/sn/io/sn1/mem_refcnt.c b/arch/ia64/sn/io/sn1/mem_refcnt.c --- a/arch/ia64/sn/io/sn1/mem_refcnt.c Mon Dec 23 21:21:52 2002 +++ b/arch/ia64/sn/io/sn1/mem_refcnt.c Mon Dec 23 21:21:52 2002 @@ -1,4 +1,4 @@ -/* $Id$ +/* $Id: mem_refcnt.c,v 1.1 2002/02/28 17:31:25 marcelo Exp $ * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive @@ -7,7 +7,6 @@ * Copyright (C) 1992 - 1997, 2000-2002 Silicon Graphics, Inc. All rights reserved. */ -#include #include #include #include @@ -43,7 +42,7 @@ int mem_refcnt_attach(devfs_handle_t hub) { -#ifndef CONFIG_IA64_SGI_SN +#if 0 devfs_handle_t refcnt_dev; hwgraph_char_device_add(hub, diff -Nru a/arch/ia64/sn/io/sn1/ml_SN_intr.c b/arch/ia64/sn/io/sn1/ml_SN_intr.c --- a/arch/ia64/sn/io/sn1/ml_SN_intr.c Mon Dec 23 21:21:57 2002 +++ b/arch/ia64/sn/io/sn1/ml_SN_intr.c Mon Dec 23 21:21:57 2002 @@ -1,4 +1,4 @@ -/* $Id$ +/* $Id: ml_SN_intr.c,v 1.1 2002/02/28 17:31:25 marcelo Exp $ * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive @@ -13,7 +13,7 @@ * handle interrupts on an IP27 board. */ -#ident "$Revision: 1.167 $" +#ident "$Revision: 1.1 $" #include #include @@ -987,13 +987,12 @@ char subnode_done[NUM_SUBNODES]; // cpu = cnodetocpu(cnode); - for (cpu = 0; cpu < NR_CPUS; cpu++) { - if (!cpu_online(cpu)) continue; + for (cpu = 0; cpu < smp_num_cpus; cpu++) { if (cpuid_to_cnodeid(cpu) == cnode) { break; } } - if (cpu == NR_CPUS) cpu = CPU_NONE; + if (cpu == smp_num_cpus) cpu = CPU_NONE; if (cpu == CPU_NONE) { printk("Node %d has no CPUs", cnode); return; @@ -1002,7 +1001,7 @@ for (i=0; i -#include #include #include #include @@ -307,22 +306,22 @@ * appropriate function name below. */ struct file_operations pcibr_fops = { - .owner = THIS_MODULE, - .llseek = NULL, - .read = NULL, - .write = NULL, - .readdir = NULL, - .poll = NULL, - .ioctl = NULL, - .mmap = NULL, - .open = NULL, - .flush = NULL, - .release = NULL, - .fsync = NULL, - .fasync = NULL, - .lock = NULL, - .readv = NULL, - .writev = NULL + owner: THIS_MODULE, + llseek: NULL, + read: NULL, + write: NULL, + readdir: NULL, + poll: NULL, + ioctl: NULL, + mmap: NULL, + open: NULL, + flush: NULL, + release: NULL, + fsync: NULL, + fasync: NULL, + lock: NULL, + readv: NULL, + writev: NULL }; extern devfs_handle_t hwgraph_root; @@ -332,7 +331,6 @@ extern void rmfree(struct map *mp, size_t size, uint64_t a); extern int hwgraph_vertex_name_get(devfs_handle_t vhdl, char *buf, uint buflen); extern long atoi(register char *p); -extern void *swap_ptr(void **loc, void *new); extern char *dev_to_name(devfs_handle_t dev, char *buf, uint buflen); extern cnodeid_t nodevertex_to_cnodeid(devfs_handle_t vhdl); extern graph_error_t hwgraph_edge_remove(devfs_handle_t from, char *name, devfs_handle_t *toptr); @@ -1628,243 +1626,6 @@ "BAD"}; -#ifdef LATER - -void -pcibr_slot_func_info_return(pcibr_info_h pcibr_infoh, - int func, - pcibr_slot_func_info_resp_t funcp) -{ - pcibr_info_t pcibr_info = pcibr_infoh[func]; - int win; - - funcp->resp_f_status = 0; - - if (!pcibr_info) { - return; - } - - funcp->resp_f_status |= FUNC_IS_VALID; -#ifdef SUPPORT_PRINTING_V_FORMAT - sprintf(funcp->resp_f_slot_name, "%v", pcibr_info->f_vertex); -#else - sprintf(funcp->resp_f_slot_name, "%x", pcibr_info->f_vertex); -#endif - - if(is_sys_critical_vertex(pcibr_info->f_vertex)) { - funcp->resp_f_status |= FUNC_IS_SYS_CRITICAL; - } - - funcp->resp_f_bus = pcibr_info->f_bus; - funcp->resp_f_slot = pcibr_info->f_slot; - funcp->resp_f_func = pcibr_info->f_func; -#ifdef SUPPORT_PRINTING_V_FORMAT - sprintf(funcp->resp_f_master_name, "%v", pcibr_info->f_master); -#else - sprintf(funcp->resp_f_master_name, "%x", pcibr_info->f_master); -#endif - funcp->resp_f_pops = pcibr_info->f_pops; - funcp->resp_f_efunc = pcibr_info->f_efunc; - funcp->resp_f_einfo = pcibr_info->f_einfo; - - funcp->resp_f_vendor = pcibr_info->f_vendor; - funcp->resp_f_device = pcibr_info->f_device; - - for(win = 0 ; win < 6 ; win++) { - funcp->resp_f_window[win].resp_w_base = - pcibr_info->f_window[win].w_base; - funcp->resp_f_window[win].resp_w_size = - pcibr_info->f_window[win].w_size; - sprintf(funcp->resp_f_window[win].resp_w_space, - "%s", - pci_space_name[pcibr_info->f_window[win].w_space]); - } - - funcp->resp_f_rbase = pcibr_info->f_rbase; - funcp->resp_f_rsize = pcibr_info->f_rsize; - - for (win = 0 ; win < 4; win++) { - funcp->resp_f_ibit[win] = pcibr_info->f_ibit[win]; - } - - funcp->resp_f_att_det_error = pcibr_info->f_att_det_error; - -} - -int -pcibr_slot_info_return(pcibr_soft_t pcibr_soft, - pciio_slot_t slot, - pcibr_slot_info_resp_t respp) -{ - pcibr_soft_slot_t pss; - int func; - bridge_t *bridge = pcibr_soft->bs_base; - reg_p b_respp; - pcibr_slot_info_resp_t slotp; - pcibr_slot_func_info_resp_t funcp; - - slotp = snia_kmem_zalloc(sizeof(*slotp), KM_SLEEP); - if (slotp == NULL) { - return(ENOMEM); - } - - pss = &pcibr_soft->bs_slot[slot]; - - printk("\nPCI INFRASTRUCTURAL INFO FOR SLOT %d\n\n", slot); - - slotp->resp_has_host = pss->has_host; - slotp->resp_host_slot = pss->host_slot; -#ifdef SUPPORT_PRINTING_V_FORMAT - sprintf(slotp->resp_slot_conn_name, "%v", pss->slot_conn); -#else - sprintf(slotp->resp_slot_conn_name, "%x", pss->slot_conn); -#endif - slotp->resp_slot_status = pss->slot_status; - slotp->resp_l1_bus_num = io_path_map_widget(pcibr_soft->bs_vhdl); - - if (is_sys_critical_vertex(pss->slot_conn)) { - slotp->resp_slot_status |= SLOT_IS_SYS_CRITICAL; - } - - slotp->resp_bss_ninfo = pss->bss_ninfo; - - for (func = 0; func < pss->bss_ninfo; func++) { - funcp = &(slotp->resp_func[func]); - pcibr_slot_func_info_return(pss->bss_infos, func, funcp); - } - - sprintf(slotp->resp_bss_devio_bssd_space, "%s", - pci_space_name[pss->bss_devio.bssd_space]); - slotp->resp_bss_devio_bssd_base = pss->bss_devio.bssd_base; - slotp->resp_bss_device = pss->bss_device; - - slotp->resp_bss_pmu_uctr = pss->bss_pmu_uctr; - slotp->resp_bss_d32_uctr = pss->bss_d32_uctr; - slotp->resp_bss_d64_uctr = pss->bss_d64_uctr; - - slotp->resp_bss_d64_base = pss->bss_d64_base; - slotp->resp_bss_d64_flags = pss->bss_d64_flags; - slotp->resp_bss_d32_base = pss->bss_d32_base; - slotp->resp_bss_d32_flags = pss->bss_d32_flags; - - slotp->resp_bss_ext_ates_active = atomic_read(&pss->bss_ext_ates_active); - - slotp->resp_bss_cmd_pointer = pss->bss_cmd_pointer; - slotp->resp_bss_cmd_shadow = pss->bss_cmd_shadow; - - slotp->resp_bs_rrb_valid = pcibr_soft->bs_rrb_valid[slot]; - slotp->resp_bs_rrb_valid_v = pcibr_soft->bs_rrb_valid[slot + - PCIBR_RRB_SLOT_VIRTUAL]; - slotp->resp_bs_rrb_res = pcibr_soft->bs_rrb_res[slot]; - - if (slot & 1) { - b_respp = &bridge->b_odd_resp; - } else { - b_respp = &bridge->b_even_resp; - } - - slotp->resp_b_resp = *b_respp; - - slotp->resp_b_int_device = bridge->b_int_device; - slotp->resp_b_int_enable = bridge->b_int_enable; - slotp->resp_b_int_host = bridge->b_int_addr[slot].addr; - - if (COPYOUT(slotp, respp, sizeof(*respp))) { - return(EFAULT); - } - - snia_kmem_free(slotp, sizeof(*slotp)); - - return(0); -} - -/* - * pcibr_slot_query - * Return information about the PCI slot maintained by the infrastructure. - * Information is requested in the request structure. - * - * Information returned in the response structure: - * Slot hwgraph name - * Vendor/Device info - * Base register info - * Interrupt mapping from device pins to the bridge pins - * Devio register - * Software RRB info - * RRB register info - * Host/Gues info - * PCI Bus #,slot #, function # - * Slot provider hwgraph name - * Provider Functions - * Error handler - * DMA mapping usage counters - * DMA direct translation info - * External SSRAM workaround info - */ -int -pcibr_slot_query(devfs_handle_t pcibr_vhdl, pcibr_slot_info_req_t reqp) -{ - pcibr_soft_t pcibr_soft = pcibr_soft_get(pcibr_vhdl); - pciio_slot_t slot = reqp->req_slot; - pciio_slot_t tmp_slot; - pcibr_slot_info_resp_t respp = (pcibr_slot_info_resp_t) reqp->req_respp; - int size = reqp->req_size; - int error; - - /* Make sure that we are dealing with a bridge device vertex */ - if (!pcibr_soft) { - return(EINVAL); - } - - /* Make sure that we have a valid PCI slot number or PCIIO_SLOT_NONE */ - if ((!PCIBR_VALID_SLOT(slot)) && (slot != PCIIO_SLOT_NONE)) { - return(EINVAL); - } - - /* Return information for the requested PCI slot */ - if (slot != PCIIO_SLOT_NONE) { - if (size < sizeof(*respp)) { - return(EINVAL); - } - - /* Acquire read access to the slot */ - mrlock(pcibr_soft->bs_slot[slot].slot_lock, MR_ACCESS, PZERO); - - error = pcibr_slot_info_return(pcibr_soft, slot, respp); - - /* Release the slot lock */ - mrunlock(pcibr_soft->bs_slot[slot].slot_lock); - - return(error); - } - - /* Return information for all the slots */ - for (tmp_slot = 0; tmp_slot < 8; tmp_slot++) { - - if (size < sizeof(*respp)) { - return(EINVAL); - } - - /* Acquire read access to the slot */ - mrlock(pcibr_soft->bs_slot[tmp_slot].slot_lock, MR_ACCESS, PZERO); - - error = pcibr_slot_info_return(pcibr_soft, tmp_slot, respp); - - /* Release the slot lock */ - mrunlock(pcibr_soft->bs_slot[tmp_slot].slot_lock); - - if (error) { - return(error); - } - - ++respp; - size -= sizeof(*respp); - } - - return(error); -} -#endif /* LATER */ - - /*ARGSUSED */ int pcibr_ioctl(devfs_handle_t dev, @@ -3617,7 +3378,7 @@ self->bl_soft = pcibr_soft; self->bl_vhdl = pcibr_vhdl; self->bl_next = pcibr_list; - self->bl_next = swap_ptr((void **) &pcibr_list, (void *)self); + pcibr_list = self; } #endif @@ -6455,9 +6216,7 @@ intr_bit = (short) xtalk_intr_vector_get(xtalk_intr); cpu = cpuvertex_to_cpuid(xtalk_intr_cpu_get(xtalk_intr)); -#if defined(CONFIG_IA64_SGI_SN1) REMOTE_CPU_SEND_INTR(cpu, intr_bit); -#endif } } @@ -6822,13 +6581,8 @@ bridgereg_t *int_addr = (bridgereg_t *) xtalk_intr_sfarg_get(xtalk_intr); -#ifdef CONFIG_IA64_SGI_SN2 - *int_addr = ((BRIDGE_INT_ADDR_HOST & (addr >> 26)) | - (BRIDGE_INT_ADDR_FLD & vect)); -#elif CONFIG_IA64_SGI_SN1 *int_addr = ((BRIDGE_INT_ADDR_HOST & (addr >> 30)) | (BRIDGE_INT_ADDR_FLD & vect)); -#endif } /*ARGSUSED */ @@ -7485,7 +7239,7 @@ #ifdef LITTLE_ENDIAN /* - * on sn-ia we need to twiddle the addresses going out + * on sn-ia we need to twiddle the the addresses going out * the pci bus because we use the unswizzled synergy space * (the alternative is to use the swizzled synergy space * and byte swap the data) diff -Nru a/arch/ia64/sn/io/sn2/bte_error.c b/arch/ia64/sn/io/sn2/bte_error.c --- a/arch/ia64/sn/io/sn2/bte_error.c Mon Dec 23 21:21:58 2002 +++ b/arch/ia64/sn/io/sn2/bte_error.c Mon Dec 23 21:21:58 2002 @@ -1,4 +1,4 @@ -/* $Id$ +/* $Id: bte_error.c,v 1.1 2002/02/28 17:31:25 marcelo Exp $ * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive @@ -54,96 +54,14 @@ * * ************************************************************************/ -#ifdef BTE_ERROR -// This routine is not called. Yet. It may be someday. It probably -// *should* be someday. Until then, ifdef it out. -bte_result_t -bte_error_handler(bte_handle_t *bh) -/* - * Function: bte_error_handler - * Purpose: Process a BTE error after a transfer has failed. - * Parameters: bh - bte handle of bte that failed. - * Returns: The BTE error type. - * Notes: +/* + * >>> bte_crb_error_handler needs to be broken into two parts. The + * first should cleanup the CRB. The second should wait until all bte + * related CRB's are complete and then do the error reset. */ -{ - devfs_handle_t hub_v; - hubinfo_t hinfo; - int il; - hubreg_t iidsr, imem, ieclr; - hubreg_t bte_status; - - bh->bh_bte->bte_error_count++; - - /* - * Process any CRB logs - we know that the bte_context contains - * the BTE completion status, but to avoid a race with error - * processing, we force a call to pick up any CRB errors pending. - * After this call, we know that we have any CRB errors related to - * this BTE transfer in the context. - */ - hub_v = cnodeid_to_vertex(bh->bh_bte->bte_cnode); - hubinfo_get(hub_v, &hinfo); - (void)hubiio_crb_error_handler(hub_v, hinfo); - - /* Be sure BTE is stopped */ - - (void)BTE_LOAD(bh->bh_bte->bte_base, BTEOFF_CTRL); - - /* - * Now clear up the rest of the error - be sure to hold crblock - * to avoid race with other cpu on this node. - */ - imem = REMOTE_HUB_L(hinfo->h_nasid, IIO_IMEM); - ieclr = REMOTE_HUB_L(hinfo->h_nasid, IIO_IECLR); - if (bh->bh_bte->bte_num == 0) { - imem |= IIO_IMEM_W0ESD | IIO_IMEM_B0ESD; - ieclr|= IECLR_BTE0; - } else { - imem |= IIO_IMEM_W0ESD | IIO_IMEM_B1ESD; - ieclr|= IECLR_BTE1; - } - - REMOTE_HUB_S(hinfo->h_nasid, IIO_IMEM, imem); - REMOTE_HUB_S(hinfo->h_nasid, IIO_IECLR, ieclr); - - iidsr = REMOTE_HUB_L(hinfo->h_nasid, IIO_IIDSR); - iidsr &= ~IIO_IIDSR_SENT_MASK; - iidsr |= IIO_IIDSR_ENB_MASK; - REMOTE_HUB_S(hinfo->h_nasid, IIO_IIDSR, iidsr); - mutex_spinunlock(&hinfo->h_crblock, il); - - bte_status = BTE_LOAD(bh->bh_bte->bte_base, BTEOFF_STAT); - BTE_STORE(bh->bh_bte->bte_base, BTEOFF_STAT, bte_status & ~IBLS_BUSY); - ASSERT(!BTE_IS_BUSY(BTE_LOAD(bh->bh_bte->bte_base, BTEOFF_STAT))); - - switch(bh->bh_error) { - case IIO_ICRB_ECODE_PERR: - return(BTEFAIL_POISON); - case IIO_ICRB_ECODE_WERR: - return(BTEFAIL_PROT); - case IIO_ICRB_ECODE_AERR: - return(BTEFAIL_ACCESS); - case IIO_ICRB_ECODE_TOUT: - return(BTEFAIL_TOUT); - case IIO_ICRB_ECODE_XTERR: - return(BTEFAIL_ERROR); - case IIO_ICRB_ECODE_DERR: - return(BTEFAIL_DIR); - case IIO_ICRB_ECODE_PWERR: - case IIO_ICRB_ECODE_PRERR: - /* NO BREAK */ - default: - printk("BTE failure (%d) unexpected\n", - bh->bh_error); - return(BTEFAIL_ERROR); - } -} -#endif // BTE_ERROR - void bte_crb_error_handler(devfs_handle_t hub_v, int btenum, - int crbnum, ioerror_t *ioe) + int crbnum, ioerror_t *ioe, int bteop) /* * Function: bte_crb_error_handler * Purpose: Process a CRB for a specific HUB/BTE @@ -162,29 +80,70 @@ icrba_t crba; icrbb_t crbb; nasid_t n; + hubreg_t iidsr, imem, ieclr; hubinfo_get(hub_v, &hinfo); n = hinfo->h_nasid; - /* Step 1 */ - crba.ii_icrb0_a_regval = REMOTE_HUB_L(n, IIO_ICRB_A(crbnum)); - crbb.ii_icrb0_b_regval = REMOTE_HUB_L(n, IIO_ICRB_B(crbnum)); + /* + * The following 10 lines (or so) are adapted from IRIXs + * bte_crb_error function. No clear documentation tells + * why the crb needs to complete normally in order for + * the BTE to resume normal operations. This first step + * appears vital! + */ - /* Zero error and error code to prevent error_dump complaining - * about these CRBs. + /* + * Zero error and error code to prevent error_dump complaining + * about these CRBs. Copy the CRB to the notification line. + * The crb address is in shub format (physical address shifted + * right by cacheline size). */ + crbb.ii_icrb0_b_regval = REMOTE_HUB_L(n, IIO_ICRB_B(crbnum)); crbb.b_error=0; crbb.b_ecode=0; + REMOTE_HUB_S(n, IIO_ICRB_B(crbnum), crbb.ii_icrb0_b_regval); - /* Step 2 */ + crba.ii_icrb0_a_regval = REMOTE_HUB_L(n, IIO_ICRB_A(crbnum)); + crba.a_addr = TO_PHYS((u64)&nodepda->bte_if[btenum].notify) >> 3; + crba.a_valid = 1; REMOTE_HUB_S(n, IIO_ICRB_A(crbnum), crba.ii_icrb0_a_regval); - /* Step 3 */ + REMOTE_HUB_S(n, IIO_ICCR, IIO_ICCR_PENDING | IIO_ICCR_CMD_FLUSH | crbnum); + while (REMOTE_HUB_L(n, IIO_ICCR) & IIO_ICCR_PENDING) ; + + + /* Terminate the BTE. */ + /* >>> The other bte transfer will need to be restarted. */ + HUB_L((shubreg_t *)((nodepda->bte_if[btenum].bte_base_addr + + IIO_IBCT0 - IIO_IBLS0))); + + imem = REMOTE_HUB_L(n, IIO_IMEM); + ieclr = REMOTE_HUB_L(n, IIO_IECLR); + if (btenum == 0) { + imem |= IIO_IMEM_W0ESD | IIO_IMEM_B0ESD; + ieclr|= IECLR_BTE0; + } else { + imem |= IIO_IMEM_W0ESD | IIO_IMEM_B1ESD; + ieclr|= IECLR_BTE1; + } + REMOTE_HUB_S(n, IIO_IMEM, imem); + REMOTE_HUB_S(n, IIO_IECLR, ieclr); + + iidsr = REMOTE_HUB_L(n, IIO_IIDSR); + iidsr &= ~IIO_IIDSR_SENT_MASK; + iidsr |= IIO_IIDSR_ENB_MASK; + REMOTE_HUB_S(n, IIO_IIDSR, iidsr); + + + bte_reset_nasid(n); + + *nodepda->bte_if[btenum].most_rcnt_na = IBLS_ERROR; } diff -Nru a/arch/ia64/sn/io/sn2/ml_SN_intr.c b/arch/ia64/sn/io/sn2/ml_SN_intr.c --- a/arch/ia64/sn/io/sn2/ml_SN_intr.c Mon Dec 23 21:21:58 2002 +++ b/arch/ia64/sn/io/sn2/ml_SN_intr.c Mon Dec 23 21:21:58 2002 @@ -1,4 +1,4 @@ -/* $Id$ +/* $Id: ml_SN_intr.c,v 1.1 2002/02/28 17:31:25 marcelo Exp $ * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive @@ -13,7 +13,7 @@ * handle interrupts on an IPXX board. */ -#ident "$Revision: 1.167 $" +#ident "$Revision: 1.1 $" #include #include @@ -36,6 +36,7 @@ #include #include #include +#include #include #include @@ -51,24 +52,15 @@ int sn) { int nasid = cnodeid_to_nasid(node); - nasid_t console_nasid; sh_ii_int0_config_u_t ii_int_config; cpuid_t cpu; cpuid_t cpu0, cpu1; nodepda_t *lnodepda; sh_ii_int0_enable_u_t ii_int_enable; - sh_local_int0_config_u_t local_int_config; - sh_local_int0_enable_u_t local_int_enable; - sh_fsb_system_agent_config_u_t fsb_system_agent; sh_int_node_id_config_u_t node_id_config; - int is_console; + extern void sn_init_cpei_timer(void); + static int timer_added = 0; - console_nasid = get_console_nasid(); - if (console_nasid < 0) { - console_nasid = master_nasid; - } - - is_console = nasid == console_nasid; if (is_headless_node(node) ) { int cnode; @@ -95,13 +87,15 @@ } // Get the physical id's of the cpu's on this node. - cpu0 = id_eid_to_cpu_physical_id(nasid, 0); - cpu1 = id_eid_to_cpu_physical_id(nasid, 1); + cpu0 = nasid_slice_to_cpu_physical_id(nasid, 0); + cpu1 = nasid_slice_to_cpu_physical_id(nasid, 2); HUB_S( (unsigned long *)GLOBAL_MMR_ADDR(nasid, SH_PI_ERROR_MASK), 0); HUB_S( (unsigned long *)GLOBAL_MMR_ADDR(nasid, SH_PI_CRBP_ERROR_MASK), 0); + // The II_INT_CONFIG register for cpu 0. + ii_int_config.sh_ii_int0_config_regval = 0; ii_int_config.sh_ii_int0_config_s.type = 0; ii_int_config.sh_ii_int0_config_s.agt = 0; ii_int_config.sh_ii_int0_config_s.pid = cpu0; @@ -110,7 +104,9 @@ HUB_S((unsigned long *)GLOBAL_MMR_ADDR(nasid, SH_II_INT0_CONFIG), ii_int_config.sh_ii_int0_config_regval); + // The II_INT_CONFIG register for cpu 1. + ii_int_config.sh_ii_int0_config_regval = 0; ii_int_config.sh_ii_int0_config_s.type = 0; ii_int_config.sh_ii_int0_config_s.agt = 0; ii_int_config.sh_ii_int0_config_s.pid = cpu1; @@ -119,101 +115,28 @@ HUB_S((unsigned long *)GLOBAL_MMR_ADDR(nasid, SH_II_INT1_CONFIG), ii_int_config.sh_ii_int0_config_regval); + // Enable interrupts for II_INT0 and 1. + ii_int_enable.sh_ii_int0_enable_regval = 0; ii_int_enable.sh_ii_int0_enable_s.ii_enable = 1; +#ifdef BUS_INT_WAR + /* Dont enable any ints from II. We will poll for interrupts. */ + ii_int_enable.sh_ii_int0_enable_s.ii_enable = 0; + + /* Enable IPIs. We use them ONLY for send INITs to hung cpus */ + *(volatile long*)GLOBAL_MMR_ADDR(nasid, SH_IPI_INT_ENABLE) = 1; +#endif HUB_S((unsigned long *)GLOBAL_MMR_ADDR(nasid, SH_II_INT0_ENABLE), ii_int_enable.sh_ii_int0_enable_regval); HUB_S((unsigned long *)GLOBAL_MMR_ADDR(nasid, SH_II_INT1_ENABLE), ii_int_enable.sh_ii_int0_enable_regval); - // init error regs - // LOCAL_INT0 is for the UART only. - - local_int_config.sh_local_int0_config_s.type = 0; - local_int_config.sh_local_int0_config_s.agt = 0; - local_int_config.sh_local_int0_config_s.pid = cpu; - local_int_config.sh_local_int0_config_s.base = 0; - local_int_config.sh_local_int0_config_s.idx = SGI_UART_VECTOR; - - HUB_S((unsigned long *)GLOBAL_MMR_ADDR(nasid, SH_LOCAL_INT0_CONFIG), - local_int_config.sh_local_int0_config_regval); - - // LOCAL_INT1 is for all hardware errors. - // It will send a BERR, which will result in an MCA. - local_int_config.sh_local_int0_config_s.idx = 0; - - HUB_S((unsigned long *)GLOBAL_MMR_ADDR(nasid, SH_LOCAL_INT1_CONFIG), - local_int_config.sh_local_int0_config_regval); - - // Clear the LOCAL_INT_ENABLE register. - local_int_enable.sh_local_int0_enable_regval = 0; - - if (is_console) { - // Enable the UART interrupt. Only applies to the console nasid. - local_int_enable.sh_local_int0_enable_s.uart_int = 1; - - HUB_S((unsigned long *)GLOBAL_MMR_ADDR(nasid, SH_LOCAL_INT0_ENABLE), - local_int_enable.sh_local_int0_enable_regval); - } - - // Enable all the error interrupts. - local_int_enable.sh_local_int0_enable_s.uart_int = 0; - local_int_enable.sh_local_int0_enable_s.pi_hw_int = 1; - local_int_enable.sh_local_int0_enable_s.md_hw_int = 1; - local_int_enable.sh_local_int0_enable_s.xn_hw_int = 1; - local_int_enable.sh_local_int0_enable_s.lb_hw_int = 1; - local_int_enable.sh_local_int0_enable_s.ii_hw_int = 1; - local_int_enable.sh_local_int0_enable_s.pi_uce_int = 1; - local_int_enable.sh_local_int0_enable_s.md_uce_int = 1; - local_int_enable.sh_local_int0_enable_s.xn_uce_int = 1; - local_int_enable.sh_local_int0_enable_s.system_shutdown_int = 1; - local_int_enable.sh_local_int0_enable_s.l1_nmi_int = 1; - local_int_enable.sh_local_int0_enable_s.stop_clock = 1; - - - // Send BERR, rather than an interrupt, for shub errors. - local_int_config.sh_local_int0_config_s.agt = 1; - HUB_S((unsigned long *)GLOBAL_MMR_ADDR(nasid, SH_LOCAL_INT1_CONFIG), - local_int_config.sh_local_int0_config_regval); - - HUB_S((unsigned long *)GLOBAL_MMR_ADDR(nasid, SH_LOCAL_INT1_ENABLE), - local_int_enable.sh_local_int0_enable_regval); - - // Make sure BERR is enabled. - fsb_system_agent.sh_fsb_system_agent_config_regval = - HUB_L( (unsigned long *)GLOBAL_MMR_ADDR(nasid, SH_FSB_SYSTEM_AGENT_CONFIG) ); - fsb_system_agent.sh_fsb_system_agent_config_s.berr_assert_en = 1; - HUB_S((unsigned long *)GLOBAL_MMR_ADDR(nasid, SH_FSB_SYSTEM_AGENT_CONFIG), - fsb_system_agent.sh_fsb_system_agent_config_regval); - - // Set LOCAL_INT2 to field CEs - - local_int_enable.sh_local_int0_enable_regval = 0; - - local_int_config.sh_local_int0_config_s.agt = 0; - local_int_config.sh_local_int0_config_s.idx = SGI_SHUB_ERROR_VECTOR; - HUB_S((unsigned long *)GLOBAL_MMR_ADDR(nasid, SH_LOCAL_INT2_CONFIG), - local_int_config.sh_local_int0_config_regval); - - local_int_enable.sh_local_int0_enable_s.pi_ce_int = 1; - local_int_enable.sh_local_int0_enable_s.md_ce_int = 1; - local_int_enable.sh_local_int0_enable_s.xn_ce_int = 1; - - HUB_S((unsigned long *)GLOBAL_MMR_ADDR(nasid, SH_LOCAL_INT2_ENABLE), - local_int_enable.sh_local_int0_enable_regval); - - // Make sure all the rest of the LOCAL_INT regs are disabled. - local_int_enable.sh_local_int0_enable_regval = 0; - HUB_S((unsigned long *)GLOBAL_MMR_ADDR(nasid, SH_LOCAL_INT3_ENABLE), - local_int_enable.sh_local_int0_enable_regval); - - HUB_S((unsigned long *)GLOBAL_MMR_ADDR(nasid, SH_LOCAL_INT4_ENABLE), - local_int_enable.sh_local_int0_enable_regval); - - HUB_S((unsigned long *)GLOBAL_MMR_ADDR(nasid, SH_LOCAL_INT5_ENABLE), - local_int_enable.sh_local_int0_enable_regval); + if (!timer_added) { // can only init the timer once. + timer_added = 1; + sn_init_cpei_timer(); + } } // (Un)Reserve an irq on this cpu. @@ -393,31 +316,40 @@ int *resp_bit) { cpuid_t cpuid; - cnodeid_t candidate = -1; + cpuid_t candidate = CPU_NONE; + cnodeid_t candidate_node; devfs_handle_t pconn_vhdl; pcibr_soft_t pcibr_soft; + int bit; /* SN2 + pcibr addressing limitation */ /* Due to this limitation, all interrupts from a given bridge must go to the name node.*/ +/* The interrupt must also be targetted for the same processor. */ /* This limitation does not exist on PIC. */ +/* But, the processor limitation will stay. The limitation will be similar to */ +/* the bedrock/xbridge limit regarding PI's */ if ( (hwgraph_edge_get(dev, EDGE_LBL_PCI, &pconn_vhdl) == GRAPH_SUCCESS) && ( (pcibr_soft = pcibr_soft_get(pconn_vhdl) ) != NULL) ) { if (pcibr_soft->bsi_err_intr) { - candidate = cpuid_to_cnodeid( ((hub_intr_t)pcibr_soft->bsi_err_intr)->i_cpuid); + candidate = ((hub_intr_t)pcibr_soft->bsi_err_intr)->i_cpuid; } } - if (candidate >= 0) { - // The node was chosen already when we assigned the error interrupt. - cpuid = intr_bit_reserve_test(CPU_NONE, - 0, - candidate, - req_bit, - 0, - owner_dev, - name, - resp_bit); + + if (candidate != CPU_NONE) { + // The cpu was chosen already when we assigned the error interrupt. + bit = intr_reserve_level(candidate, + req_bit, + resflags, + owner_dev, + name); + if (bit < 0) { + cpuid = CPU_NONE; + } else { + cpuid = candidate; + *resp_bit = bit; + } } else { // Need to choose one. Try the controlling c-brick first. cpuid = intr_bit_reserve_test(CPU_NONE, @@ -434,10 +366,9 @@ return cpuid; } - if (candidate >= 0) { - printk("Cannot target interrupt to target node (%d).\n",candidate); - return CPU_NONE; - } else { + if (candidate != CPU_NONE) { + printk("Cannot target interrupt to target node (%ld).\n",candidate); + return CPU_NONE; } else { printk("Cannot target interrupt to closest node (%d) 0x%p\n", master_node_get(dev), (void *)owner_dev); } @@ -448,11 +379,11 @@ { static cnodeid_t last_node = -1; if (last_node >= numnodes) last_node = 0; - for (candidate = last_node + 1; candidate != last_node; candidate++) { - if (candidate == numnodes) candidate = 0; + for (candidate_node = last_node + 1; candidate_node != last_node; candidate_node++) { + if (candidate_node == numnodes) candidate_node = 0; cpuid = intr_bit_reserve_test(CPU_NONE, 0, - candidate, + candidate_node, req_bit, 0, owner_dev, diff -Nru a/arch/ia64/sn/io/sn2/pcibr/pcibr_ate.c b/arch/ia64/sn/io/sn2/pcibr/pcibr_ate.c --- a/arch/ia64/sn/io/sn2/pcibr/pcibr_ate.c Mon Dec 23 21:21:51 2002 +++ b/arch/ia64/sn/io/sn2/pcibr/pcibr_ate.c Mon Dec 23 21:21:51 2002 @@ -44,24 +44,6 @@ #endif -#ifdef LATER -#if (PCIBR_FREEZE_TIME) || PCIBR_ATE_DEBUG -LOCAL struct reg_desc ate_bits[] = -{ - {0xFFFF000000000000ull, -48, "RMF", "%x"}, - {~(IOPGSIZE - 1) & /* may trim off some low bits */ - 0x0000FFFFFFFFF000ull, 0, "XIO", "%x"}, - {0x0000000000000F00ull, -8, "port", "%x"}, - {0x0000000000000010ull, 0, "Barrier"}, - {0x0000000000000008ull, 0, "Prefetch"}, - {0x0000000000000004ull, 0, "Precise"}, - {0x0000000000000002ull, 0, "Coherent"}, - {0x0000000000000001ull, 0, "Valid"}, - {0} -}; -#endif -#endif /* LATER */ - #ifndef LOCAL #define LOCAL static #endif @@ -79,7 +61,7 @@ unsigned *freeze_time_ptr, #endif unsigned *cmd_regs); -void ate_write(bridge_ate_p ate_ptr, int ate_count, bridge_ate_t ate); +void ate_write(pcibr_soft_t pcibr_soft, bridge_ate_p ate_ptr, int ate_count, bridge_ate_t ate); void ate_thaw(pcibr_dmamap_t pcibr_dmamap, int ate_index, #if PCIBR_FREEZE_TIME @@ -119,26 +101,73 @@ int i, j; bridgereg_t old_enable, new_enable; int s; + int this_is_pic = is_pic(bridge); /* Probe SSRAM to determine its size. */ - old_enable = bridge->b_int_enable; - new_enable = old_enable & ~BRIDGE_IMR_PCI_MST_TIMEOUT; - bridge->b_int_enable = new_enable; + if ( this_is_pic ) { + old_enable = bridge->b_int_enable; + new_enable = old_enable & ~BRIDGE_IMR_PCI_MST_TIMEOUT; + bridge->b_int_enable = new_enable; + } + else { + if (io_get_sh_swapper(NASID_GET(bridge))) { + old_enable = BRIDGE_REG_GET32((&bridge->b_int_enable)); + new_enable = old_enable & ~BRIDGE_IMR_PCI_MST_TIMEOUT; + BRIDGE_REG_SET32((&bridge->b_int_enable)) = new_enable; + } + else { + old_enable = bridge->b_int_enable; + new_enable = old_enable & ~BRIDGE_IMR_PCI_MST_TIMEOUT; + bridge->b_int_enable = new_enable; + } + } for (i = 1; i < ATE_NUM_SIZES; i++) { /* Try writing a value */ - bridge->b_ext_ate_ram[ATE_NUM_ENTRIES(i) - 1] = ATE_PROBE_VALUE; + if ( this_is_pic ) { + bridge->b_ext_ate_ram[ATE_NUM_ENTRIES(i) - 1] = ATE_PROBE_VALUE; + } + else { + if (io_get_sh_swapper(NASID_GET(bridge))) + bridge->b_ext_ate_ram[ATE_NUM_ENTRIES(i) - 1] = __swab64(ATE_PROBE_VALUE); + else + bridge->b_ext_ate_ram[ATE_NUM_ENTRIES(i) - 1] = ATE_PROBE_VALUE; + } /* Guard against wrap */ for (j = 1; j < i; j++) bridge->b_ext_ate_ram[ATE_NUM_ENTRIES(j) - 1] = 0; /* See if value was written */ - if (bridge->b_ext_ate_ram[ATE_NUM_ENTRIES(i) - 1] == ATE_PROBE_VALUE) - largest_working_size = i; + if ( this_is_pic ) { + if (bridge->b_ext_ate_ram[ATE_NUM_ENTRIES(i) - 1] == ATE_PROBE_VALUE) + largest_working_size = i; + } + else { + if (io_get_sh_swapper(NASID_GET(bridge))) { + if (bridge->b_ext_ate_ram[ATE_NUM_ENTRIES(i) - 1] == __swab64(ATE_PROBE_VALUE)) + largest_working_size = i; + else { + if (bridge->b_ext_ate_ram[ATE_NUM_ENTRIES(i) - 1] == ATE_PROBE_VALUE) + largest_working_size = i; + } + } + } + } + if ( this_is_pic ) { + bridge->b_int_enable = old_enable; + bridge->b_wid_tflush; /* wait until Bridge PIO complete */ + } + else { + if (io_get_sh_swapper(NASID_GET(bridge))) { + BRIDGE_REG_SET32((&bridge->b_int_enable)) = old_enable; + BRIDGE_REG_GET32((&bridge->b_wid_tflush)); /* wait until Bridge PIO complete */ + } + else { + bridge->b_int_enable = old_enable; + bridge->b_wid_tflush; /* wait until Bridge PIO complete */ + } } - bridge->b_int_enable = old_enable; - bridge->b_wid_tflush; /* wait until Bridge PIO complete */ /* * ensure that we write and read without any interruption. @@ -146,20 +175,41 @@ */ s = splhi(); - bridge->b_wid_control = (bridge->b_wid_control - & ~BRIDGE_CTRL_SSRAM_SIZE_MASK) - | BRIDGE_CTRL_SSRAM_SIZE(largest_working_size); - bridge->b_wid_control; /* inval addr bug war */ + if ( this_is_pic ) { + bridge->b_wid_control = (bridge->b_wid_control + & ~BRIDGE_CTRL_SSRAM_SIZE_MASK) + | BRIDGE_CTRL_SSRAM_SIZE(largest_working_size); + bridge->b_wid_control; /* inval addr bug war */ + } + else { + if (io_get_sh_swapper(NASID_GET(bridge))) { + BRIDGE_REG_SET32((&(bridge->b_wid_control))) = + __swab32((BRIDGE_REG_GET32((&bridge->b_wid_control)) + & ~BRIDGE_CTRL_SSRAM_SIZE_MASK) + | BRIDGE_CTRL_SSRAM_SIZE(largest_working_size)); + BRIDGE_REG_GET32((&bridge->b_wid_control));/* inval addr bug war */ + } + else { + bridge->b_wid_control = (bridge->b_wid_control & ~BRIDGE_CTRL_SSRAM_SIZE_MASK) + | BRIDGE_CTRL_SSRAM_SIZE(largest_working_size); + bridge->b_wid_control; /* inval addr bug war */ + } + } splx(s); num_entries = ATE_NUM_ENTRIES(largest_working_size); -#if PCIBR_ATE_DEBUG - if (num_entries) - printk("bridge at 0x%x: clearing %d external ATEs\n", bridge, num_entries); - else - printk("bridge at 0x%x: no external ATE RAM found\n", bridge); -#endif + if (pcibr_debug_mask & PCIBR_DEBUG_ATE) { + if (num_entries) { + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_ATE, NULL, + "bridge at 0x%x: clearing %d external ATEs\n", + bridge, num_entries)); + } else { + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_ATE, NULL, + "bridge at 0x%x: no external ATE RAM found\n", + bridge)); + } + } /* Initialize external mapping entries */ for (entry = 0; entry < num_entries; entry++) @@ -339,7 +389,8 @@ #endif cmd_lwa = 0; - for (slot = 0; slot < 8; ++slot) + for (slot = pcibr_soft->bs_min_slot; + slot < PCIBR_NUM_SLOTS(pcibr_soft); ++slot) if (atomic_read(&pcibr_soft->bs_slot[slot].bss_ext_ates_active)) { cmd_reg = pcibr_soft-> bs_slot[slot]. @@ -366,28 +417,54 @@ cmd_lwa[0]; /* Flush all the write buffers in the bridge */ - for (slot = 0; slot < 8; ++slot) + for (slot = pcibr_soft->bs_min_slot; + slot < PCIBR_NUM_SLOTS(pcibr_soft); ++slot) { if (atomic_read(&pcibr_soft->bs_slot[slot].bss_ext_ates_active)) { /* Flush the write buffer associated with this * PCI device which might be using dma map RAM. */ - bridge->b_wr_req_buf[slot].reg; + if ( is_pic(bridge) ) { + bridge->b_wr_req_buf[slot].reg; + } + else { + if (io_get_sh_swapper(NASID_GET(bridge)) ) { + BRIDGE_REG_GET32((&bridge->b_wr_req_buf[slot].reg)); + } + else + bridge->b_wr_req_buf[slot].reg; + } } + } } return s; } -#define ATE_WRITE() ate_write(ate_ptr, ate_count, ate) - void -ate_write(bridge_ate_p ate_ptr, +ate_write(pcibr_soft_t pcibr_soft, + bridge_ate_p ate_ptr, int ate_count, bridge_ate_t ate) { - while (ate_count-- > 0) { - *ate_ptr++ = ate; - ate += IOPGSIZE; - } + if (IS_PIC_SOFT(pcibr_soft) ) { + while (ate_count-- > 0) { + *ate_ptr++ = ate; + ate += IOPGSIZE; + } + } + else { + if (io_get_sh_swapper(NASID_GET(ate_ptr))) { + while (ate_count-- > 0) { + *ate_ptr++ = __swab64(ate); + ate += IOPGSIZE; + } + } + else { + while (ate_count-- > 0) { + *ate_ptr++ = ate; + ate += IOPGSIZE; + } + } + } } #if PCIBR_FREEZE_TIME @@ -425,10 +502,24 @@ return; /* restore cmd regs */ - for (slot = 0; slot < 8; ++slot) - if ((cmd_reg = cmd_regs[slot]) & PCI_CMD_BUS_MASTER) - bridge->b_type0_cfg_dev[slot].l[PCI_CFG_COMMAND / 4] = cmd_reg; - + for (slot = pcibr_soft->bs_min_slot; + slot < PCIBR_NUM_SLOTS(pcibr_soft); ++slot) { + if ((cmd_reg = cmd_regs[slot]) & PCI_CMD_BUS_MASTER) { + if ( IS_PIC_SOFT(pcibr_soft) ) { + pcibr_slot_config_set(bridge, slot, PCI_CFG_COMMAND/4, cmd_reg); + } + else { + if (io_get_sh_swapper(NASID_GET(bridge))) { + bridge->b_type0_cfg_dev[slot].l[PCI_CFG_COMMAND / 4] = __swab32(cmd_reg); + } + else { +// BUG(); /* Does this really work if called when io_get_sh_swapper = 0? */ +// bridge->b_type0_cfg_dev[slot].l[PCI_CFG_COMMAND / 4] = cmd_reg; + pcibr_slot_config_set(bridge, slot, PCI_CFG_COMMAND/4, cmd_reg); + } + } + } + } pcibr_dmamap->bd_flags |= PCIBR_DMAMAP_BUSY; atomic_inc(&(pcibr_soft->bs_slot[dma_slot]. bss_ext_ates_active)); @@ -442,7 +533,7 @@ if (max_ate_total < ate_total) max_ate_total = ate_total; pcibr_unlock(pcibr_soft, s); - printk("%s: pci freeze time %d usec for %d ATEs\n" + printk( "%s: pci freeze time %d usec for %d ATEs\n" "\tfirst ate: %R\n", pcibr_soft->bs_name, freeze_time * 1000 / 1250, diff -Nru a/arch/ia64/sn/io/sn2/pcibr/pcibr_config.c b/arch/ia64/sn/io/sn2/pcibr/pcibr_config.c --- a/arch/ia64/sn/io/sn2/pcibr/pcibr_config.c Mon Dec 23 21:21:59 2002 +++ b/arch/ia64/sn/io/sn2/pcibr/pcibr_config.c Mon Dec 23 21:21:59 2002 @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -34,64 +35,233 @@ extern pcibr_info_t pcibr_info_get(devfs_handle_t); uint64_t pcibr_config_get(devfs_handle_t, unsigned, unsigned); -uint64_t do_pcibr_config_get(cfg_p, unsigned, unsigned); +uint64_t do_pcibr_config_get(int, cfg_p, unsigned, unsigned); void pcibr_config_set(devfs_handle_t, unsigned, unsigned, uint64_t); -void do_pcibr_config_set(cfg_p, unsigned, unsigned, uint64_t); +void do_pcibr_config_set(int, cfg_p, unsigned, unsigned, uint64_t); +static void swap_do_pcibr_config_set(cfg_p, unsigned, unsigned, uint64_t); +#ifdef LITTLE_ENDIAN +/* + * on sn-ia we need to twiddle the the addresses going out + * the pci bus because we use the unswizzled synergy space + * (the alternative is to use the swizzled synergy space + * and byte swap the data) + */ +#define CB(b,r) (((volatile uint8_t *) b)[((r)^4)]) +#define CS(b,r) (((volatile uint16_t *) b)[((r^4)/2)]) +#define CW(b,r) (((volatile uint32_t *) b)[((r^4)/4)]) + +#define CBP(b,r) (((volatile uint8_t *) b)[(r)^3]) +#define CSP(b,r) (((volatile uint16_t *) b)[((r)/2)^1]) +#define CWP(b,r) (((volatile uint32_t *) b)[(r)/4]) + +#define SCB(b,r) (((volatile uint8_t *) b)[((r)^3)]) +#define SCS(b,r) (((volatile uint16_t *) b)[((r^2)/2)]) +#define SCW(b,r) (((volatile uint32_t *) b)[((r)/4)]) +#else #define CB(b,r) (((volatile uint8_t *) cfgbase)[(r)^3]) #define CS(b,r) (((volatile uint16_t *) cfgbase)[((r)/2)^1]) #define CW(b,r) (((volatile uint32_t *) cfgbase)[(r)/4]) +#endif +/* + * Return a config space address for given slot / func / offset. Note the + * returned pointer is a 32bit word (ie. cfg_p) aligned pointer pointing to + * the 32bit word that contains the "offset" byte. + */ +cfg_p +pcibr_func_config_addr(bridge_t *bridge, pciio_bus_t bus, pciio_slot_t slot, + pciio_function_t func, int offset) +{ + /* + * Type 1 config space + */ + if (bus > 0) { + bridge->b_pci_cfg = ((bus << 16) | (slot << 11)); + return &bridge->b_type1_cfg.f[func].l[(offset)]; + } + + /* + * Type 0 config space + */ + if (is_pic(bridge)) + slot++; + return &bridge->b_type0_cfg_dev[slot].f[func].l[offset]; +} + +/* + * Return config space address for given slot / offset. Note the returned + * pointer is a 32bit word (ie. cfg_p) aligned pointer pointing to the + * 32bit word that contains the "offset" byte. + */ +cfg_p +pcibr_slot_config_addr(bridge_t *bridge, pciio_slot_t slot, int offset) +{ + return pcibr_func_config_addr(bridge, 0, slot, 0, offset); +} + +/* + * Return config space data for given slot / offset + */ +unsigned +pcibr_slot_config_get(bridge_t *bridge, pciio_slot_t slot, int offset) +{ + cfg_p cfg_base; + + cfg_base = pcibr_slot_config_addr(bridge, slot, 0); + return (do_pcibr_config_get(is_pic(bridge), cfg_base, offset, sizeof(unsigned))); +} + +/* + * Return config space data for given slot / func / offset + */ +unsigned +pcibr_func_config_get(bridge_t *bridge, pciio_slot_t slot, + pciio_function_t func, int offset) +{ + cfg_p cfg_base; + + cfg_base = pcibr_func_config_addr(bridge, 0, slot, func, 0); + return (do_pcibr_config_get(is_pic(bridge), cfg_base, offset, sizeof(unsigned))); +} + +/* + * Set config space data for given slot / offset + */ +void +pcibr_slot_config_set(bridge_t *bridge, pciio_slot_t slot, + int offset, unsigned val) +{ + cfg_p cfg_base; + + cfg_base = pcibr_slot_config_addr(bridge, slot, 0); + do_pcibr_config_set(is_pic(bridge), cfg_base, offset, sizeof(unsigned), val); +} + +/* + * Set config space data for given slot / func / offset + */ +void +pcibr_func_config_set(bridge_t *bridge, pciio_slot_t slot, + pciio_function_t func, int offset, unsigned val) +{ + cfg_p cfg_base; + + cfg_base = pcibr_func_config_addr(bridge, 0, slot, func, 0); + do_pcibr_config_set(is_pic(bridge), cfg_base, offset, sizeof(unsigned), val); +} + +int pcibr_config_debug = 0; cfg_p pcibr_config_addr(devfs_handle_t conn, unsigned reg) { pcibr_info_t pcibr_info; + pciio_bus_t pciio_bus; pciio_slot_t pciio_slot; pciio_function_t pciio_func; pcibr_soft_t pcibr_soft; bridge_t *bridge; cfg_p cfgbase = (cfg_p)0; + pciio_info_t pciio_info; + pciio_info = pciio_info_get(conn); pcibr_info = pcibr_info_get(conn); - pciio_slot = pcibr_info->f_slot; + /* + * Determine the PCI bus/slot/func to generate a config address for. + */ + + if (pciio_info_type1_get(pciio_info)) { + /* + * Conn is a vhdl which uses TYPE 1 addressing explicitly passed + * in reg. + */ + pciio_bus = PCI_TYPE1_BUS(reg); + pciio_slot = PCI_TYPE1_SLOT(reg); + pciio_func = PCI_TYPE1_FUNC(reg); + + ASSERT(pciio_bus != 0); +#if 0 + } else if (conn != pciio_info_hostdev_get(pciio_info)) { + /* + * Conn is on a subordinate bus, so get bus/slot/func directly from + * its pciio_info_t structure. + */ + pciio_bus = pciio_info->c_bus; + pciio_slot = pciio_info->c_slot; + pciio_func = pciio_info->c_func; + if (pciio_func == PCIIO_FUNC_NONE) { + pciio_func = 0; + } +#endif + } else { + /* + * Conn is directly connected to the host bus. PCI bus number is + * hardcoded to 0 (even though it may have a logical bus number != 0) + * and slot/function are derived from the pcibr_info_t associated + * with the device. + */ + pciio_bus = 0; + + pciio_slot = PCIBR_INFO_SLOT_GET_INT(pcibr_info); if (pciio_slot == PCIIO_SLOT_NONE) pciio_slot = PCI_TYPE1_SLOT(reg); pciio_func = pcibr_info->f_func; if (pciio_func == PCIIO_FUNC_NONE) pciio_func = PCI_TYPE1_FUNC(reg); + } pcibr_soft = (pcibr_soft_t) pcibr_info->f_mfast; bridge = pcibr_soft->bs_base; - cfgbase = bridge->b_type0_cfg_dev[pciio_slot].f[pciio_func].l; + cfgbase = pcibr_func_config_addr(bridge, + pciio_bus, pciio_slot, pciio_func, 0); return cfgbase; } +extern unsigned char Is_pic_on_this_nasid[]; uint64_t pcibr_config_get(devfs_handle_t conn, unsigned reg, unsigned size) { - return do_pcibr_config_get(pcibr_config_addr(conn, reg), - PCI_TYPE1_REG(reg), size); + if ( !Is_pic_on_this_nasid[ NASID_GET((pcibr_config_addr(conn, reg)))] ) + return do_pcibr_config_get(0, pcibr_config_addr(conn, reg), + PCI_TYPE1_REG(reg), size); + else + return do_pcibr_config_get(1, pcibr_config_addr(conn, reg), + PCI_TYPE1_REG(reg), size); } uint64_t do_pcibr_config_get( + int pic, cfg_p cfgbase, unsigned reg, unsigned size) { unsigned value; - value = CW(cfgbase, reg); - + if ( pic ) { + value = CWP(cfgbase, reg); + } + else { + if ( io_get_sh_swapper(NASID_GET(cfgbase)) ) { + /* + * Shub Swapper on - 0 returns PCI Offset 0 but byte swapped! + * Do not swizzle address and byte swap the result. + */ + value = SCW(cfgbase, reg); + value = __swab32(value); + } else { + value = CW(cfgbase, reg); + } + } if (reg & 3) value >>= 8 * (reg & 3); if (size < 4) @@ -105,39 +275,103 @@ unsigned size, uint64_t value) { - do_pcibr_config_set(pcibr_config_addr(conn, reg), + if ( Is_pic_on_this_nasid[ NASID_GET((pcibr_config_addr(conn, reg)))] ) + do_pcibr_config_set(1, pcibr_config_addr(conn, reg), + PCI_TYPE1_REG(reg), size, value); + else + swap_do_pcibr_config_set(pcibr_config_addr(conn, reg), PCI_TYPE1_REG(reg), size, value); } void -do_pcibr_config_set(cfg_p cfgbase, +do_pcibr_config_set(int pic, + cfg_p cfgbase, unsigned reg, unsigned size, uint64_t value) { + if ( pic ) { + switch (size) { + case 1: + CBP(cfgbase, reg) = value; + break; + case 2: + if (reg & 1) { + CBP(cfgbase, reg) = value; + CBP(cfgbase, reg + 1) = value >> 8; + } else + CSP(cfgbase, reg) = value; + break; + case 3: + if (reg & 1) { + CBP(cfgbase, reg) = value; + CSP(cfgbase, (reg + 1)) = value >> 8; + } else { + CSP(cfgbase, reg) = value; + CBP(cfgbase, reg + 2) = value >> 16; + } + break; + case 4: + CWP(cfgbase, reg) = value; + break; + } + } + else { + switch (size) { + case 1: + CB(cfgbase, reg) = value; + break; + case 2: + if (reg & 1) { + CB(cfgbase, reg) = value; + CB(cfgbase, reg + 1) = value >> 8; + } else + CS(cfgbase, reg) = value; + break; + case 3: + if (reg & 1) { + CB(cfgbase, reg) = value; + CS(cfgbase, (reg + 1)) = value >> 8; + } else { + CS(cfgbase, reg) = value; + CB(cfgbase, reg + 2) = value >> 16; + } + break; + case 4: + CW(cfgbase, reg) = value; + break; + } + } +} + +void +swap_do_pcibr_config_set(cfg_p cfgbase, + unsigned reg, + unsigned size, + uint64_t value) +{ + + uint64_t temp_value = 0; + switch (size) { case 1: - CB(cfgbase, reg) = value; - break; + SCB(cfgbase, reg) = value; + break; case 2: - if (reg & 1) { - CB(cfgbase, reg) = value; - CB(cfgbase, reg + 1) = value >> 8; - } else - CS(cfgbase, reg) = value; - break; + temp_value = __swab16(value); + if (reg & 1) { + SCB(cfgbase, reg) = temp_value; + SCB(cfgbase, reg + 1) = temp_value >> 8; + } else + SCS(cfgbase, reg) = temp_value; + break; case 3: - if (reg & 1) { - CB(cfgbase, reg) = value; - CS(cfgbase, (reg + 1)) = value >> 8; - } else { - CS(cfgbase, reg) = value; - CB(cfgbase, reg + 2) = value >> 16; - } - break; + BUG(); + break; case 4: - CW(cfgbase, reg) = value; - break; + temp_value = __swab32(value); + SCW(cfgbase, reg) = temp_value; + break; } } diff -Nru a/arch/ia64/sn/io/sn2/pcibr/pcibr_dvr.c b/arch/ia64/sn/io/sn2/pcibr/pcibr_dvr.c --- a/arch/ia64/sn/io/sn2/pcibr/pcibr_dvr.c Mon Dec 23 21:21:55 2002 +++ b/arch/ia64/sn/io/sn2/pcibr/pcibr_dvr.c Mon Dec 23 21:21:55 2002 @@ -7,7 +7,6 @@ * Copyright (C) 2001-2002 Silicon Graphics, Inc. All rights reserved. */ - #include #include #include @@ -40,6 +39,25 @@ #endif /* + * global variables to toggle the different levels of pcibr debugging. + * -pcibr_debug_mask is the mask of the different types of debugging + * you want to enable. See sys/PCI/pcibr_private.h + * -pcibr_debug_module is the module you want to trace. By default + * all modules are trace. For IP35 this value has the format of + * something like "001c10". For IP27 this value is a node number, + * i.e. "1", "2"... For IP30 this is undefined and should be set to + * 'all'. + * -pcibr_debug_widget is the widget you want to trace. For IP27 + * the widget isn't exposed in the hwpath so use the xio slot num. + * i.e. for 'io2' set pcibr_debug_widget to "2". + * -pcibr_debug_slot is the pci slot you want to trace. + */ +uint32_t pcibr_debug_mask = 0x0; /* 0x00000000 to disable */ +char *pcibr_debug_module = "all"; /* 'all' for all modules */ +int pcibr_debug_widget = -1; /* '-1' for all widgets */ +int pcibr_debug_slot = -1; /* '-1' for all slots */ + +/* * Macros related to the Lucent USS 302/312 usb timeout workaround. It * appears that if the lucent part can get into a retry loop if it sees a * DAC on the bus during a pio read retry. The loop is broken after about @@ -64,62 +82,24 @@ * appropriate function name below. */ struct file_operations pcibr_fops = { - .owner =THIS_MODULE, - .llseek = NULL, - .read = NULL, - .write = NULL, - .readdir = NULL, - .poll = NULL, - .ioctl = NULL, - .mmap = NULL, - .open = NULL, - .flush = NULL, - .release = NULL, - .fsync = NULL, - .fasync = NULL, - .lock = NULL, - .readv = NULL, - .writev = NULL -}; - -#ifdef LATER - -#if PCIBR_ATE_DEBUG -static struct reg_values ssram_sizes[] = -{ - {BRIDGE_CTRL_SSRAM_512K, "512k"}, - {BRIDGE_CTRL_SSRAM_128K, "128k"}, - {BRIDGE_CTRL_SSRAM_64K, "64k"}, - {BRIDGE_CTRL_SSRAM_1K, "1k"}, - {0} + owner: THIS_MODULE, + llseek: NULL, + read: NULL, + write: NULL, + readdir: NULL, + poll: NULL, + ioctl: NULL, + mmap: NULL, + open: NULL, + flush: NULL, + release: NULL, + fsync: NULL, + fasync: NULL, + lock: NULL, + readv: NULL, + writev: NULL }; -static struct reg_desc control_bits[] = -{ - {BRIDGE_CTRL_FLASH_WR_EN, 0, "FLASH_WR_EN"}, - {BRIDGE_CTRL_EN_CLK50, 0, "EN_CLK50"}, - {BRIDGE_CTRL_EN_CLK40, 0, "EN_CLK40"}, - {BRIDGE_CTRL_EN_CLK33, 0, "EN_CLK33"}, - {BRIDGE_CTRL_RST_MASK, -24, "RST", "%x"}, - {BRIDGE_CTRL_IO_SWAP, 0, "IO_SWAP"}, - {BRIDGE_CTRL_MEM_SWAP, 0, "MEM_SWAP"}, - {BRIDGE_CTRL_PAGE_SIZE, 0, "PAGE_SIZE"}, - {BRIDGE_CTRL_SS_PAR_BAD, 0, "SS_PAR_BAD"}, - {BRIDGE_CTRL_SS_PAR_EN, 0, "SS_PAR_EN"}, - {BRIDGE_CTRL_SSRAM_SIZE_MASK, 0, "SSRAM_SIZE", 0, ssram_sizes}, - {BRIDGE_CTRL_F_BAD_PKT, 0, "F_BAD_PKT"}, - {BRIDGE_CTRL_LLP_XBAR_CRD_MASK, -12, "LLP_XBAR_CRD", "%d"}, - {BRIDGE_CTRL_CLR_RLLP_CNT, 0, "CLR_RLLP_CNT"}, - {BRIDGE_CTRL_CLR_TLLP_CNT, 0, "CLR_TLLP_CNT"}, - {BRIDGE_CTRL_SYS_END, 0, "SYS_END"}, - - {BRIDGE_CTRL_BUS_SPEED_MASK, -4, "BUS_SPEED", "%d"}, - {BRIDGE_CTRL_WIDGET_ID_MASK, 0, "WIDGET_ID", "%x"}, - {0} -}; -#endif -#endif /* LATER */ - /* kbrick widgetnum-to-bus layout */ int p_busnum[MAX_PORT_NUM] = { /* widget# */ 0, 0, 0, 0, 0, 0, 0, 0, /* 0x0 - 0x7 */ @@ -132,18 +112,6 @@ 3, /* 0xf */ }; -/* - * Additional PIO spaces per slot are - * recorded in this structure. - */ -struct pciio_piospace_s { - pciio_piospace_t next; /* another space for this device */ - char free; /* 1 if free, 0 if in use */ - pciio_space_t space; /* Which space is in use */ - iopaddr_t start; /* Starting address of the PIO space */ - size_t count; /* size of PIO space */ -}; - #if PCIBR_SOFT_LIST pcibr_list_p pcibr_list = 0; #endif @@ -152,15 +120,15 @@ extern int hub_device_flags_set(devfs_handle_t widget_dev, hub_widget_flags_t flags); extern long atoi(register char *p); extern cnodeid_t nodevertex_to_cnodeid(devfs_handle_t vhdl); -extern void *swap_ptr(void **loc, void *new); extern char *dev_to_name(devfs_handle_t dev, char *buf, uint buflen); extern struct map *atemapalloc(uint64_t); extern void atefree(struct map *, size_t, uint64_t); extern void atemapfree(struct map *); extern pciio_dmamap_t get_free_pciio_dmamap(devfs_handle_t); extern void free_pciio_dmamap(pcibr_dmamap_t); +extern void xwidget_error_register(devfs_handle_t, error_handler_f *, error_handler_arg_t); -#define ATE_WRITE() ate_write(ate_ptr, ate_count, ate) +#define ATE_WRITE() ate_write(pcibr_soft, ate_ptr, ate_count, ate) #if PCIBR_FREEZE_TIME #define ATE_FREEZE() s = ate_freeze(pcibr_dmamap, &freeze_time, cmd_regs) #else @@ -173,7 +141,6 @@ #define ATE_THAW() ate_thaw(pcibr_dmamap, ate_index, cmd_regs, s) #endif - /* ===================================================================== * Function Table of Contents * @@ -183,58 +150,54 @@ * perhaps bust this file into smaller chunks. */ -extern void do_pcibr_rrb_clear(bridge_t *, int); -extern void do_pcibr_rrb_flush(bridge_t *, int); -extern int do_pcibr_rrb_count_valid(bridge_t *, pciio_slot_t); -extern int do_pcibr_rrb_count_avail(bridge_t *, pciio_slot_t); -extern int do_pcibr_rrb_alloc(bridge_t *, pciio_slot_t, int); -extern int do_pcibr_rrb_free(bridge_t *, pciio_slot_t, int); - -extern void do_pcibr_rrb_autoalloc(pcibr_soft_t, int, int); +extern int do_pcibr_rrb_free_all(pcibr_soft_t, bridge_t *, pciio_slot_t); +extern void do_pcibr_rrb_autoalloc(pcibr_soft_t, int, int, int); extern int pcibr_wrb_flush(devfs_handle_t); extern int pcibr_rrb_alloc(devfs_handle_t, int *, int *); -extern int pcibr_rrb_check(devfs_handle_t, int *, int *, int *, int *); -extern int pcibr_alloc_all_rrbs(devfs_handle_t, int, int, int, int, int, int, int, int, int); extern void pcibr_rrb_flush(devfs_handle_t); static int pcibr_try_set_device(pcibr_soft_t, pciio_slot_t, unsigned, bridgereg_t); void pcibr_release_device(pcibr_soft_t, pciio_slot_t, bridgereg_t); -extern void pcibr_clearwidint(bridge_t *); extern void pcibr_setwidint(xtalk_intr_t); +extern void pcibr_clearwidint(bridge_t *); + +extern iopaddr_t pcibr_bus_addr_alloc(pcibr_soft_t, pciio_win_info_t, + pciio_space_t, int, int, int); void pcibr_init(void); int pcibr_attach(devfs_handle_t); +int pcibr_attach2(devfs_handle_t, bridge_t *, devfs_handle_t, + int, pcibr_soft_t *); int pcibr_detach(devfs_handle_t); int pcibr_open(devfs_handle_t *, int, int, cred_t *); int pcibr_close(devfs_handle_t, int, int, cred_t *); int pcibr_map(devfs_handle_t, vhandl_t *, off_t, size_t, uint); int pcibr_unmap(devfs_handle_t, vhandl_t *); int pcibr_ioctl(devfs_handle_t, int, void *, int, struct cred *, int *); - -void pcibr_freeblock_sub(iopaddr_t *, iopaddr_t *, iopaddr_t, size_t); - +int pcibr_pcix_rbars_calc(pcibr_soft_t); extern int pcibr_init_ext_ate_ram(bridge_t *); extern int pcibr_ate_alloc(pcibr_soft_t, int); extern void pcibr_ate_free(pcibr_soft_t, int, int); +extern int pcibr_widget_to_bus(devfs_handle_t pcibr_vhdl); -extern unsigned ate_freeze(pcibr_dmamap_t pcibr_dmamap, +extern unsigned ate_freeze(pcibr_dmamap_t pcibr_dmamap, #if PCIBR_FREEZE_TIME unsigned *freeze_time_ptr, #endif - unsigned *cmd_regs); -extern void ate_write(bridge_ate_p ate_ptr, int ate_count, bridge_ate_t ate); -extern void ate_thaw(pcibr_dmamap_t pcibr_dmamap, int ate_index, + unsigned *cmd_regs); +extern void ate_write(pcibr_soft_t pcibr_soft, bridge_ate_p ate_ptr, int ate_count, bridge_ate_t ate); +extern void ate_thaw(pcibr_dmamap_t pcibr_dmamap, int ate_index, #if PCIBR_FREEZE_TIME - bridge_ate_t ate, - int ate_total, - unsigned freeze_time_start, + bridge_ate_t ate, + int ate_total, + unsigned freeze_time_start, #endif - unsigned *cmd_regs, - unsigned s); + unsigned *cmd_regs, + unsigned s); -pcibr_info_t pcibr_info_get(devfs_handle_t); +pcibr_info_t pcibr_info_get(devfs_handle_t); static iopaddr_t pcibr_addr_pci_to_xio(devfs_handle_t, pciio_slot_t, pciio_space_t, iopaddr_t, size_t, unsigned); @@ -264,23 +227,23 @@ void pcibr_dmalist_drain(devfs_handle_t, alenlist_t); iopaddr_t pcibr_dmamap_pciaddr_get(pcibr_dmamap_t); -extern unsigned pcibr_intr_bits(pciio_info_t info, pciio_intr_line_t lines); +extern unsigned pcibr_intr_bits(pciio_info_t info, + pciio_intr_line_t lines, int nslots); extern pcibr_intr_t pcibr_intr_alloc(devfs_handle_t, device_desc_t, pciio_intr_line_t, devfs_handle_t); extern void pcibr_intr_free(pcibr_intr_t); extern void pcibr_setpciint(xtalk_intr_t); -extern int pcibr_intr_connect(pcibr_intr_t); +extern int pcibr_intr_connect(pcibr_intr_t, intr_func_t, intr_arg_t); extern void pcibr_intr_disconnect(pcibr_intr_t); extern devfs_handle_t pcibr_intr_cpu_get(pcibr_intr_t); -extern void pcibr_xintr_preset(void *, int, xwidgetnum_t, iopaddr_t, xtalk_intr_vector_t); extern void pcibr_intr_func(intr_arg_t); extern void print_bridge_errcmd(uint32_t, char *); extern void pcibr_error_dump(pcibr_soft_t); -extern uint32_t pcibr_errintr_group(uint32_t); +extern uint32_t pcibr_errintr_group(uint32_t); extern void pcibr_pioerr_check(pcibr_soft_t); -extern void pcibr_error_intr_handler(intr_arg_t); +extern void pcibr_error_intr_handler(int, void *, struct pt_regs *); extern int pcibr_addr_toslot(pcibr_soft_t, iopaddr_t, pciio_space_t *, iopaddr_t *, pciio_function_t *); extern void pcibr_error_cleanup(pcibr_soft_t, int); @@ -289,8 +252,7 @@ extern int pcibr_dmard_error(pcibr_soft_t, int, ioerror_mode_t, ioerror_t *); extern int pcibr_dmawr_error(pcibr_soft_t, int, ioerror_mode_t, ioerror_t *); extern int pcibr_error_handler(error_handler_arg_t, int, ioerror_mode_t, ioerror_t *); -extern int pcibr_error_devenable(devfs_handle_t, int); - +extern int pcibr_error_handler_wrapper(error_handler_arg_t, int, ioerror_mode_t, ioerror_t *); void pcibr_provider_startup(devfs_handle_t); void pcibr_provider_shutdown(devfs_handle_t); @@ -303,7 +265,6 @@ extern cfg_p pcibr_config_addr(devfs_handle_t, unsigned); extern uint64_t pcibr_config_get(devfs_handle_t, unsigned, unsigned); extern void pcibr_config_set(devfs_handle_t, unsigned, unsigned, uint64_t); -extern void do_pcibr_config_set(cfg_p, unsigned, unsigned, uint64_t); extern pcibr_hints_t pcibr_hints_get(devfs_handle_t, int); extern void pcibr_hints_fix_rrbs(devfs_handle_t); @@ -313,38 +274,31 @@ extern void pcibr_hints_handsoff(devfs_handle_t); extern void pcibr_hints_subdevs(devfs_handle_t, pciio_slot_t, uint64_t); -#ifdef BRIDGE_B_DATACORR_WAR -extern int ql_bridge_rev_b_war(devfs_handle_t); -extern int bridge_rev_b_data_check_disable; -char *rev_b_datacorr_warning = -"***************************** WARNING! ******************************\n"; -char *rev_b_datacorr_mesg = -"UNRECOVERABLE IO LINK ERROR. CONTACT SERVICE PROVIDER\n"; -#endif - extern int pcibr_slot_reset(devfs_handle_t,pciio_slot_t); extern int pcibr_slot_info_init(devfs_handle_t,pciio_slot_t); extern int pcibr_slot_info_free(devfs_handle_t,pciio_slot_t); +extern int pcibr_slot_info_return(pcibr_soft_t, pciio_slot_t, + pcibr_slot_info_resp_t); +extern void pcibr_slot_func_info_return(pcibr_info_h, int, + pcibr_slot_func_info_resp_t); extern int pcibr_slot_addr_space_init(devfs_handle_t,pciio_slot_t); +extern int pcibr_slot_pcix_rbar_init(pcibr_soft_t, pciio_slot_t); extern int pcibr_slot_device_init(devfs_handle_t, pciio_slot_t); extern int pcibr_slot_guest_info_init(devfs_handle_t,pciio_slot_t); -extern int pcibr_slot_call_device_attach(devfs_handle_t, pciio_slot_t, int); -extern int pcibr_slot_call_device_detach(devfs_handle_t, pciio_slot_t, int); -extern int pcibr_slot_attach(devfs_handle_t, pciio_slot_t, int, char *, int *); -extern int pcibr_slot_detach(devfs_handle_t, pciio_slot_t, int); +extern int pcibr_slot_call_device_attach(devfs_handle_t, + pciio_slot_t, int); +extern int pcibr_slot_call_device_detach(devfs_handle_t, + pciio_slot_t, int); +extern int pcibr_slot_attach(devfs_handle_t, pciio_slot_t, int, + char *, int *); +extern int pcibr_slot_detach(devfs_handle_t, pciio_slot_t, int, + char *, int *); extern int pcibr_is_slot_sys_critical(devfs_handle_t, pciio_slot_t); -#ifdef LATER -extern int pcibr_slot_startup(devfs_handle_t, pcibr_slot_req_t); -extern int pcibr_slot_shutdown(devfs_handle_t, pcibr_slot_req_t); -extern int pcibr_slot_query(devfs_handle_t, pcibr_slot_req_t); -#endif - extern int pcibr_slot_initial_rrb_alloc(devfs_handle_t, pciio_slot_t); extern int pcibr_initial_rrb(devfs_handle_t, pciio_slot_t, pciio_slot_t); - /* ===================================================================== * Device(x) register management */ @@ -377,7 +331,7 @@ bridgereg_t xmask; xmask = mask; - if (pcibr_soft->bs_xbridge) { + if (IS_XBRIDGE_OR_PIC_SOFT(pcibr_soft)) { if (mask == BRIDGE_DEV_PMU_BITS) xmask = XBRIDGE_DEV_PMU_BITS; if (mask == BRIDGE_DEV_D64_BITS) @@ -464,10 +418,10 @@ new &= ~BRIDGE_DEV_WRGA_BITS; if (flags & PCIIO_BYTE_STREAM) - new |= (pcibr_soft->bs_xbridge) ? + new |= (IS_XBRIDGE_OR_PIC_SOFT(pcibr_soft)) ? BRIDGE_DEV_SWAP_DIR : BRIDGE_DEV_SWAP_BITS; if (flags & PCIIO_WORD_VALUES) - new &= (pcibr_soft->bs_xbridge) ? + new &= (IS_XBRIDGE_OR_PIC_SOFT(pcibr_soft)) ? ~BRIDGE_DEV_SWAP_DIR : ~BRIDGE_DEV_SWAP_BITS; /* Provider-specific flags @@ -492,13 +446,28 @@ if (flags & PCIBR_NO64BIT) new &= ~BRIDGE_DEV_DEV_SIZE; + /* + * PIC BRINGUP WAR (PV# 855271): + * Allow setting BRIDGE_DEV_VIRTUAL_EN on PIC iff we're a 64-bit + * device. The bit is only intended for 64-bit devices and, on + * PIC, can cause problems for 32-bit devices. + */ + if (IS_PIC_SOFT(pcibr_soft) && mask == BRIDGE_DEV_D64_BITS && + PCIBR_WAR_ENABLED(PV855271, pcibr_soft)) { + if (flags & PCIBR_VCHAN1) { + new |= BRIDGE_DEV_VIRTUAL_EN; + xmask |= BRIDGE_DEV_VIRTUAL_EN; + } + } + + chg = old ^ new; /* what are we changing, */ chg &= xmask; /* of the interesting bits */ if (chg) { badd32 = slotp->bss_d32_uctr ? (BRIDGE_DEV_D32_BITS & chg) : 0; - if (pcibr_soft->bs_xbridge) { + if (IS_XBRIDGE_OR_PIC_SOFT(pcibr_soft)) { badpmu = slotp->bss_pmu_uctr ? (XBRIDGE_DEV_PMU_BITS & chg) : 0; badd64 = slotp->bss_d64_uctr ? (XBRIDGE_DEV_D64_BITS & chg) : 0; } else { @@ -517,7 +486,7 @@ * the new stream at all. */ if ( (fix = bad & (BRIDGE_DEV_PRECISE | - BRIDGE_DEV_BARRIER)) ){ + BRIDGE_DEV_BARRIER)) ) { bad &= ~fix; /* don't change these bits if * they are already set in "old" @@ -546,8 +515,10 @@ */ if (bad) { pcibr_unlock(pcibr_soft, s); -#if (DEBUG && PCIBR_DEV_DEBUG) - printk("pcibr_try_set_device: mod blocked by %R\n", bad, device_bits); +#ifdef PIC_LATER + PCIBR_DEBUG((PCIBR_DEBUG_DEVREG, pcibr_soft->bs_vhdl, + "pcibr_try_set_device: mod blocked by %x\n", + bad, device_bits)); #endif return bad; } @@ -571,14 +542,31 @@ pcibr_unlock(pcibr_soft, s); return 0; } - bridge->b_device[slot].reg = new; - slotp->bss_device = new; - bridge->b_wid_tflush; /* wait until Bridge PIO complete */ + if ( IS_PIC_SOFT(pcibr_soft) ) { + bridge->b_device[slot].reg = new; + slotp->bss_device = new; + bridge->b_wid_tflush; /* wait until Bridge PIO complete */ + } + else { + if (io_get_sh_swapper(NASID_GET(bridge))) { + BRIDGE_REG_SET32((&bridge->b_device[slot].reg)) = __swab32(new); + slotp->bss_device = new; + BRIDGE_REG_GET32((&bridge->b_wid_tflush)); /* wait until Bridge PIO complete */ + } else { + bridge->b_device[slot].reg = new; + slotp->bss_device = new; + bridge->b_wid_tflush; /* wait until Bridge PIO complete */ + } + } pcibr_unlock(pcibr_soft, s); -#if DEBUG && PCIBR_DEV_DEBUG - printk("pcibr Device(%d): 0x%p\n", slot, bridge->b_device[slot].reg); -#endif +#ifdef PIC_LATER + PCIBR_DEBUG((PCIBR_DEBUG_DEVREG, pcibr_soft->bs_vhdl, + "pcibr_try_set_device: Device(%d): %x\n", + slot, new, device_bits)); +#else + printk("pcibr_try_set_device: Device(%d): %x\n", slot, new); +#endif return 0; } @@ -616,7 +604,17 @@ volatile uint32_t wrf; s = pcibr_lock(pcibr_soft); bridge = pcibr_soft->bs_base; - wrf = bridge->b_wr_req_buf[slot].reg; + + if ( IS_PIC_SOFT(pcibr_soft) ) { + wrf = bridge->b_wr_req_buf[slot].reg; + } + else { + if (io_get_sh_swapper(NASID_GET(bridge))) { + wrf = BRIDGE_REG_GET32((&bridge->b_wr_req_buf[slot].reg)); + } else { + wrf = bridge->b_wr_req_buf[slot].reg; + } + } pcibr_unlock(pcibr_soft, s); } @@ -637,9 +635,7 @@ void pcibr_init(void) { -#if DEBUG && ATTACH_DEBUG - printk("pcibr_init\n"); -#endif + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_INIT, NULL, "pcibr_init()\n")); xwidget_driver_register(XBRIDGE_WIDGET_PART_NUM, XBRIDGE_WIDGET_MFGR_NUM, @@ -700,7 +696,7 @@ * XXX- deprecate this in favor of using the * real flash driver ... */ - if (!error && + if (IS_BRIDGE_SOFT(pcibr_soft) && !error && ((off == BRIDGE_EXTERNAL_FLASH) || (len > BRIDGE_EXTERNAL_FLASH))) { int s; @@ -710,11 +706,16 @@ * The read following the write is required for the Bridge war */ s = splhi(); - bridge->b_wid_control |= BRIDGE_CTRL_FLASH_WR_EN; - bridge->b_wid_control; /* inval addr bug war */ + + if (io_get_sh_swapper(NASID_GET(bridge))) { + BRIDGE_REG_SET32((&bridge->b_wid_control)) |= __swab32(BRIDGE_CTRL_FLASH_WR_EN); + BRIDGE_REG_GET32((&bridge->b_wid_control)); /* inval addr bug war */ + } else { + bridge->b_wid_control |= BRIDGE_CTRL_FLASH_WR_EN; + bridge->b_wid_control; /* inval addr bug war */ + } splx(s); } - return error; } @@ -728,21 +729,53 @@ hwgraph_vertex_unref(pcibr_vhdl); - /* - * If flashprom write was enabled, disable it, as - * this is the last unmap. - */ - if (bridge->b_wid_control & BRIDGE_CTRL_FLASH_WR_EN) { - int s; - + if ( IS_PIC_SOFT(pcibr_soft) ) { /* - * ensure that we write and read without any interruption. - * The read following the write is required for the Bridge war + * If flashprom write was enabled, disable it, as + * this is the last unmap. */ - s = splhi(); - bridge->b_wid_control &= ~BRIDGE_CTRL_FLASH_WR_EN; - bridge->b_wid_control; /* inval addr bug war */ - splx(s); + if (IS_BRIDGE_SOFT(pcibr_soft) && + (bridge->b_wid_control & BRIDGE_CTRL_FLASH_WR_EN)) { + int s; + + /* + * ensure that we write and read without any interruption. + * The read following the write is required for the Bridge war + */ + s = splhi(); + bridge->b_wid_control &= ~BRIDGE_CTRL_FLASH_WR_EN; + bridge->b_wid_control; /* inval addr bug war */ + splx(s); + } + } + else { + if (io_get_sh_swapper(NASID_GET(bridge))) { + if (BRIDGE_REG_GET32((&bridge->b_wid_control)) & BRIDGE_CTRL_FLASH_WR_EN) { + int s; + + /* + * ensure that we write and read without any interruption. + * The read following the write is required for the Bridge war + */ + s = splhi(); + BRIDGE_REG_SET32((&bridge->b_wid_control)) &= __swab32((unsigned int)~BRIDGE_CTRL_FLASH_WR_EN); + BRIDGE_REG_GET32((&bridge->b_wid_control)); /* inval addr bug war */ + splx(s); + } else { + if (bridge->b_wid_control & BRIDGE_CTRL_FLASH_WR_EN) { + int s; + + /* + * ensure that we write and read without any interruption. + * The read following the write is required for the Bridge war + */ + s = splhi(); + bridge->b_wid_control &= ~BRIDGE_CTRL_FLASH_WR_EN; + bridge->b_wid_control; /* inval addr bug war */ + splx(s); + } + } + } } return 0; } @@ -768,7 +801,7 @@ while (tdev != GRAPH_VERTEX_NONE) { pciio_info = pciio_info_chk(tdev); if (pciio_info) { - slot = pciio_info_slot_get(pciio_info); + slot = PCIBR_INFO_SLOT_GET_INT(pciio_info); break; } hwgraph_vertex_unref(tdev); @@ -788,167 +821,7 @@ struct cred *cr, int *rvalp) { - devfs_handle_t pcibr_vhdl = hwgraph_connectpt_get((devfs_handle_t)dev); -#ifdef LATER - pcibr_soft_t pcibr_soft = pcibr_soft_get(pcibr_vhdl); -#endif - int error = 0; - - hwgraph_vertex_unref(pcibr_vhdl); - - switch (cmd) { -#ifdef LATER - case GIOCSETBW: - { - grio_ioctl_info_t info; - pciio_slot_t slot = 0; - - if (!cap_able((uint64_t)CAP_DEVICE_MGT)) { - error = EPERM; - break; - } - if (COPYIN(arg, &info, sizeof(grio_ioctl_info_t))) { - error = EFAULT; - break; - } -#ifdef GRIO_DEBUG - printk("pcibr:: prev_vhdl: %d reqbw: %lld\n", - info.prev_vhdl, info.reqbw); -#endif /* GRIO_DEBUG */ - - if ((slot = pcibr_device_slot_get(info.prev_vhdl)) == - PCIIO_SLOT_NONE) { - error = EIO; - break; - } - if (info.reqbw) - pcibr_priority_bits_set(pcibr_soft, slot, PCI_PRIO_HIGH); - break; - } - - case GIOCRELEASEBW: - { - grio_ioctl_info_t info; - pciio_slot_t slot = 0; - - if (!cap_able(CAP_DEVICE_MGT)) { - error = EPERM; - break; - } - if (COPYIN(arg, &info, sizeof(grio_ioctl_info_t))) { - error = EFAULT; - break; - } -#ifdef GRIO_DEBUG - printk("pcibr:: prev_vhdl: %d reqbw: %lld\n", - info.prev_vhdl, info.reqbw); -#endif /* GRIO_DEBUG */ - - if ((slot = pcibr_device_slot_get(info.prev_vhdl)) == - PCIIO_SLOT_NONE) { - error = EIO; - break; - } - if (info.reqbw) - pcibr_priority_bits_set(pcibr_soft, slot, PCI_PRIO_LOW); - break; - } - - case PCIBR_SLOT_STARTUP: - { - struct pcibr_slot_req_s req; - - if (!cap_able(CAP_DEVICE_MGT)) { - error = EPERM; - break; - } - - if (COPYIN(arg, &req, sizeof(req))) { - error = EFAULT; - break; - } - - error = pcibr_slot_startup(pcibr_vhdl, &req); - break; - } - case PCIBR_SLOT_SHUTDOWN: - { - struct pcibr_slot_req_s req; - - if (!cap_able(CAP_DEVICE_MGT)) { - error = EPERM; - break; - } - - if (COPYIN(arg, &req, sizeof(req))) { - error = EFAULT; - break; - } - - error = pcibr_slot_shutdown(pcibr_vhdl, &req); - break; - } - case PCIBR_SLOT_QUERY: - { - struct pcibr_slot_req_s req; - - if (!cap_able(CAP_DEVICE_MGT)) { - error = EPERM; - break; - } - - if (COPYIN(arg, &req, sizeof(req))) { - error = EFAULT; - break; - } - - error = pcibr_slot_query(pcibr_vhdl, &req); - break; - } -#endif /* LATER */ - default: - break; - - } - - return error; -} - -void -pcibr_freeblock_sub(iopaddr_t *free_basep, - iopaddr_t *free_lastp, - iopaddr_t base, - size_t size) -{ - iopaddr_t free_base = *free_basep; - iopaddr_t free_last = *free_lastp; - iopaddr_t last = base + size - 1; - - if ((last < free_base) || (base > free_last)); /* free block outside arena */ - - else if ((base <= free_base) && (last >= free_last)) - /* free block contains entire arena */ - *free_basep = *free_lastp = 0; - - else if (base <= free_base) - /* free block is head of arena */ - *free_basep = last + 1; - - else if (last >= free_last) - /* free block is tail of arena */ - *free_lastp = base - 1; - - /* - * We are left with two regions: the free area - * in the arena "below" the block, and the free - * area in the arena "above" the block. Keep - * the one that is bigger. - */ - - else if ((base - free_base) > (free_last - last)) - *free_lastp = base - 1; /* keep lower chunk */ - else - *free_basep = last + 1; /* keep upper chunk */ + return 0; } pcibr_info_t @@ -971,16 +844,22 @@ func = (rfunc == PCIIO_FUNC_NONE) ? 0 : rfunc; + /* + * Create a pciio_info_s for this device. pciio_device_info_new() + * will set the c_slot (which is suppose to represent the external + * slot (i.e the slot number silk screened on the back of the I/O + * brick)). So for PIC we need to adjust this "internal slot" num + * passed into us, into it's external representation. See comment + * for the PCIBR_DEVICE_TO_SLOT macro for more information. + */ NEW(pcibr_info); + pciio_device_info_new(&pcibr_info->f_c, pcibr_soft->bs_vhdl, + PCIBR_DEVICE_TO_SLOT(pcibr_soft, slot), + rfunc, vendor, device); + pcibr_info->f_dev = slot; - pciio_device_info_new(&pcibr_info->f_c, - pcibr_soft->bs_vhdl, - slot, rfunc, - vendor, device); - -/* pfg - this is new ..... */ /* Set PCI bus number */ - pcibr_info->f_bus = io_path_map_widget(pcibr_soft->bs_vhdl); + pcibr_info->f_bus = pcibr_widget_to_bus(pcibr_soft->bs_vhdl); if (slot != PCIIO_SLOT_NONE) { @@ -1016,30 +895,6 @@ } -/* FIXME: for now this is needed by both pcibr.c and - * pcibr_slot.c. Need to find a better way, the least - * of which would be to move it to pcibr_private.h - */ - -/* - * PCI_ADDR_SPACE_LIMITS_STORE - * Sets the current values of - * pci io base, - * pci io last, - * pci low memory base, - * pci low memory last, - * pci high memory base, - * pci high memory last - */ -#define PCI_ADDR_SPACE_LIMITS_STORE() \ - pcibr_soft->bs_spinfo.pci_io_base = pci_io_fb; \ - pcibr_soft->bs_spinfo.pci_io_last = pci_io_fl; \ - pcibr_soft->bs_spinfo.pci_swin_base = pci_lo_fb; \ - pcibr_soft->bs_spinfo.pci_swin_last = pci_lo_fl; \ - pcibr_soft->bs_spinfo.pci_mem_base = pci_hi_fb; \ - pcibr_soft->bs_spinfo.pci_mem_last = pci_hi_fl; - - /* * pcibr_device_unregister * This frees up any hardware resources reserved for this PCI device @@ -1062,7 +917,7 @@ pciio_info = pciio_info_get(pconn_vhdl); pcibr_vhdl = pciio_info_master_get(pciio_info); - slot = pciio_info_slot_get(pciio_info); + slot = PCIBR_INFO_SLOT_GET_INT(pciio_info); pcibr_soft = pcibr_soft_get(pcibr_vhdl); bridge = pcibr_soft->bs_base; @@ -1077,27 +932,24 @@ * If the RRB configuration for this slot has changed, set it * back to the boot-time default */ - if (pcibr_soft->bs_rrb_valid_dflt[slot] >= 0) { + if (pcibr_soft->bs_rrb_valid_dflt[slot][VCHAN0] >= 0) { s = pcibr_lock(pcibr_soft); - /* Free the rrbs allocated to this slot */ - error_call = do_pcibr_rrb_free(bridge, slot, - pcibr_soft->bs_rrb_valid[slot] + - pcibr_soft->bs_rrb_valid[slot + - PCIBR_RRB_SLOT_VIRTUAL]); - - if (error_call) - error = ERANGE; - - pcibr_soft->bs_rrb_res[slot] = pcibr_soft->bs_rrb_res[slot] + - pcibr_soft->bs_rrb_valid[slot] + - pcibr_soft->bs_rrb_valid[slot + - PCIBR_RRB_SLOT_VIRTUAL]; - - count_vchan0 = pcibr_soft->bs_rrb_valid_dflt[slot]; - count_vchan1 = pcibr_soft->bs_rrb_valid_dflt[slot + - PCIBR_RRB_SLOT_VIRTUAL]; + /* PIC NOTE: If this is a BRIDGE, VCHAN2 & VCHAN3 will be zero so + * no need to conditionalize this (ie. "if (IS_PIC_SOFT())" ). + */ + pcibr_soft->bs_rrb_res[slot] = pcibr_soft->bs_rrb_res[slot] + + pcibr_soft->bs_rrb_valid[slot][VCHAN0] + + pcibr_soft->bs_rrb_valid[slot][VCHAN1] + + pcibr_soft->bs_rrb_valid[slot][VCHAN2] + + pcibr_soft->bs_rrb_valid[slot][VCHAN3]; + + /* Free the rrbs allocated to this slot, both the normal & virtual */ + do_pcibr_rrb_free_all(pcibr_soft, bridge, slot); + + count_vchan0 = pcibr_soft->bs_rrb_valid_dflt[slot][VCHAN0]; + count_vchan1 = pcibr_soft->bs_rrb_valid_dflt[slot][VCHAN1]; pcibr_unlock(pcibr_soft, s); @@ -1147,12 +999,14 @@ pcibr_info = pcibr_info_get(pconn_vhdl); pcibr_vhdl = pciio_info_master_get(pciio_info); - slot = pciio_info_slot_get(pciio_info); + slot = PCIBR_INFO_SLOT_GET_INT(pciio_info); pcibr_soft = pcibr_soft_get(pcibr_vhdl); +#ifdef PIC_LATER /* This may be a loadable driver so lock out any pciconfig actions */ mrlock(pcibr_soft->bs_bus_lock, MR_UPDATE, PZERO); +#endif pcibr_info->f_att_det_error = error; @@ -1164,9 +1018,10 @@ pcibr_soft->bs_slot[slot].slot_status |= SLOT_STARTUP_CMPLT; } +#ifdef PIC_LATER /* Release the bus lock */ mrunlock(pcibr_soft->bs_bus_lock); - +#endif } /* @@ -1195,12 +1050,14 @@ pcibr_info = pcibr_info_get(pconn_vhdl); pcibr_vhdl = pciio_info_master_get(pciio_info); - slot = pciio_info_slot_get(pciio_info); + slot = PCIBR_INFO_SLOT_GET_INT(pciio_info); pcibr_soft = pcibr_soft_get(pcibr_vhdl); +#ifdef PIC_LATER /* This may be a loadable driver so lock out any pciconfig actions */ mrlock(pcibr_soft->bs_bus_lock, MR_UPDATE, PZERO); +#endif pcibr_info->f_att_det_error = error; @@ -1211,10 +1068,11 @@ } else { pcibr_soft->bs_slot[slot].slot_status |= SLOT_SHUTDOWN_CMPLT; } - + +#ifdef PIC_LATER /* Release the bus lock */ mrunlock(pcibr_soft->bs_bus_lock); - +#endif } /* @@ -1226,7 +1084,7 @@ * depends on hwgraph separator == '/' */ int -pcibr_bus_cnvlink(devfs_handle_t f_c, int slot) +pcibr_bus_cnvlink(devfs_handle_t f_c) { char dst[MAXDEVNAME]; char *dp = dst; @@ -1236,16 +1094,7 @@ devfs_handle_t nvtx, svtx; int rv; -#if DEBUG - printk("pcibr_bus_cnvlink: slot= %d f_c= %p\n", - slot, f_c); - { - int pos; - char dname[256]; - pos = devfs_generate_path(f_c, dname, 256); - printk("%s : path= %s\n", __FUNCTION__, &dname[pos]); - } -#endif + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_ATTACH, f_c, "pcibr_bus_cnvlink\n")); if (GRAPH_SUCCESS != hwgraph_vertex_name_get(f_c, dst, MAXDEVNAME)) return 0; @@ -1261,7 +1110,7 @@ return 0; /* remove "/pci/direct" from path */ - cp = strstr(dst, "/" EDGE_LBL_PCI "/" "direct"); + cp = strstr(dst, "/" EDGE_LBL_PCI "/" EDGE_LBL_DIRECT); if (cp == NULL) return 0; *cp = (char)NULL; @@ -1275,7 +1124,8 @@ /* dst example now == /hw/module/001c02/Pbrick */ /* get the bus number */ - strcat(dst, "/bus"); + strcat(dst, "/"); + strcat(dst, EDGE_LBL_BUS); sprintf(pcibus, "%d", p_busnum[widgetnum]); /* link to bus to widget */ @@ -1300,75 +1150,74 @@ /* REFERENCED */ graph_error_t rc; devfs_handle_t pcibr_vhdl; + bridge_t *bridge; + + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_ATTACH, xconn_vhdl, "pcibr_attach\n")); + + bridge = (bridge_t *) + xtalk_piotrans_addr(xconn_vhdl, NULL, + 0, sizeof(bridge_t), 0); + /* + * Create the vertex for the PCI bus, which we + * will also use to hold the pcibr_soft and + * which will be the "master" vertex for all the + * pciio connection points we will hang off it. + * This needs to happen before we call nic_bridge_vertex_info + * as we are some of the *_vmc functions need access to the edges. + * + * Opening this vertex will provide access to + * the Bridge registers themselves. + */ + rc = hwgraph_path_add(xconn_vhdl, EDGE_LBL_PCI, &pcibr_vhdl); + ASSERT(rc == GRAPH_SUCCESS); + + pciio_provider_register(pcibr_vhdl, &pcibr_provider); + pciio_provider_startup(pcibr_vhdl); + + return pcibr_attach2(xconn_vhdl, bridge, pcibr_vhdl, 0, NULL); +} + + +/*ARGSUSED */ +int +pcibr_attach2(devfs_handle_t xconn_vhdl, bridge_t *bridge, + devfs_handle_t pcibr_vhdl, int busnum, pcibr_soft_t *ret_softp) +{ + /* REFERENCED */ devfs_handle_t ctlr_vhdl; - bridge_t *bridge = NULL; bridgereg_t id; int rev; pcibr_soft_t pcibr_soft; pcibr_info_t pcibr_info; xwidget_info_t info; xtalk_intr_t xtalk_intr; - device_desc_t dev_desc = (device_desc_t)0; int slot; int ibit; devfs_handle_t noslot_conn; char devnm[MAXDEVNAME], *s; pcibr_hints_t pcibr_hints; - bridgereg_t b_int_enable; + uint64_t int_enable; + bridgereg_t int_enable_32; + picreg_t int_enable_64; unsigned rrb_fixed = 0; - iopaddr_t pci_io_fb, pci_io_fl; - iopaddr_t pci_lo_fb, pci_lo_fl; - iopaddr_t pci_hi_fb, pci_hi_fl; - int spl_level; -#ifdef LATER - char *nicinfo = (char *)0; -#endif #if PCI_FBBE int fast_back_to_back_enable; #endif - l1sc_t *scp; nasid_t nasid; + int iobrick_type_get_nasid(nasid_t nasid); + int iobrick_module_get_nasid(nasid_t nasid); + extern unsigned char Is_pic_on_this_nasid[512]; - async_attach_t aa = NULL; - aa = async_attach_get_info(xconn_vhdl); - -#if DEBUG && ATTACH_DEBUG - printk("pcibr_attach: xconn_vhdl= %p\n", xconn_vhdl); - { - int pos; - char dname[256]; - pos = devfs_generate_path(xconn_vhdl, dname, 256); - printk("%s : path= %s \n", __FUNCTION__, &dname[pos]); - } -#endif + async_attach_t aa = NULL; - /* Setup the PRB for the bridge in CONVEYOR BELT - * mode. PRBs are setup in default FIRE-AND-FORGET - * mode during the initialization. - */ - hub_device_flags_set(xconn_vhdl, HUB_PIO_CONVEYOR); + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_ATTACH, pcibr_vhdl, + "pcibr_attach2: bridge=0x%p, busnum=%d\n", bridge, busnum)); - bridge = (bridge_t *) - xtalk_piotrans_addr(xconn_vhdl, NULL, - 0, sizeof(bridge_t), 0); - - /* - * Create the vertex for the PCI bus, which we - * will also use to hold the pcibr_soft and - * which will be the "master" vertex for all the - * pciio connection points we will hang off it. - * This needs to happen before we call nic_bridge_vertex_info - * as we are some of the *_vmc functions need access to the edges. - * - * Opening this vertex will provide access to - * the Bridge registers themselves. - */ - rc = hwgraph_path_add(xconn_vhdl, EDGE_LBL_PCI, &pcibr_vhdl); - ASSERT(rc == GRAPH_SUCCESS); + aa = async_attach_get_info(xconn_vhdl); ctlr_vhdl = NULL; ctlr_vhdl = hwgraph_register(pcibr_vhdl, EDGE_LBL_CONTROLLER, @@ -1380,15 +1229,6 @@ ASSERT(ctlr_vhdl != NULL); /* - * decode the nic, and hang its stuff off our - * connection point where other drivers can get - * at it. - */ -#ifdef LATER - nicinfo = BRIDGE_VERTEX_MFG_INFO(xconn_vhdl, (nic_data_t) & bridge->b_nic); -#endif - - /* * Get the hint structure; if some NIC callback * marked this vertex as "hands-off" then we * just return here, before doing anything else. @@ -1408,26 +1248,63 @@ * fields, and hook it up to our vertex. */ NEW(pcibr_soft); + if (ret_softp) + *ret_softp = pcibr_soft; BZERO(pcibr_soft, sizeof *pcibr_soft); pcibr_soft_set(pcibr_vhdl, pcibr_soft); - pcibr_soft->bs_conn = xconn_vhdl; pcibr_soft->bs_vhdl = pcibr_vhdl; pcibr_soft->bs_base = bridge; pcibr_soft->bs_rev_num = rev; - pcibr_soft->bs_intr_bits = pcibr_intr_bits; + pcibr_soft->bs_intr_bits = (pcibr_intr_bits_f *)pcibr_intr_bits; + + pcibr_soft->bs_min_slot = 0; /* lowest possible slot# */ + pcibr_soft->bs_max_slot = 7; /* highest possible slot# */ + pcibr_soft->bs_busnum = busnum; if (is_xbridge(bridge)) { - pcibr_soft->bs_int_ate_size = XBRIDGE_INTERNAL_ATES; - pcibr_soft->bs_xbridge = 1; + pcibr_soft->bs_bridge_type = PCIBR_BRIDGETYPE_XBRIDGE; + } else if (is_pic(bridge)) { + pcibr_soft->bs_bridge_type = PCIBR_BRIDGETYPE_PIC; } else { + pcibr_soft->bs_bridge_type = PCIBR_BRIDGETYPE_BRIDGE; + } + switch(pcibr_soft->bs_bridge_type) { + case PCIBR_BRIDGETYPE_BRIDGE: pcibr_soft->bs_int_ate_size = BRIDGE_INTERNAL_ATES; - pcibr_soft->bs_xbridge = 0; + pcibr_soft->bs_bridge_mode = 0; /* speed is not available in bridge */ + break; + case PCIBR_BRIDGETYPE_PIC: + pcibr_soft->bs_min_slot = 0; + pcibr_soft->bs_max_slot = 3; + pcibr_soft->bs_int_ate_size = XBRIDGE_INTERNAL_ATES; + pcibr_soft->bs_bridge_mode = + (((bridge->p_wid_stat_64 & PIC_STAT_PCIX_SPEED) >> 33) | + ((bridge->p_wid_stat_64 & PIC_STAT_PCIX_ACTIVE) >> 33)); + + /* We have to clear PIC's write request buffer to avoid parity + * errors. See PV#854845. + */ + { + int i; + + for (i=0; i < PIC_WR_REQ_BUFSIZE; i++) { + bridge->p_wr_req_lower[i] = 0; + bridge->p_wr_req_upper[i] = 0; + bridge->p_wr_req_parity[i] = 0; + } + } + + break; + case PCIBR_BRIDGETYPE_XBRIDGE: + pcibr_soft->bs_int_ate_size = XBRIDGE_INTERNAL_ATES; + pcibr_soft->bs_bridge_mode = + ((bridge->b_wid_control & BRIDGE_CTRL_PCI_SPEED) >> 3); + break; } - nasid = NASID_GET(bridge); - scp = &NODEPDA( NASID_TO_COMPACT_NODEID(nasid) )->module->elsc; - pcibr_soft->bs_l1sc = scp; - pcibr_soft->bs_moduleid = iobrick_module_get(scp); + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_ATTACH, pcibr_vhdl, + "pcibr_attach2: pcibr_soft=0x%x, mode=0x%x\n", + pcibr_soft, pcibr_soft->bs_bridge_mode)); pcibr_soft->bsi_err_intr = 0; /* Bridges up through REV C @@ -1439,6 +1316,9 @@ pcibr_soft->bs_pio_end_mem = PCIIO_WORD_VALUES; } #if PCIBR_SOFT_LIST + /* + * link all the pcibr_soft structs + */ { pcibr_list_p self; @@ -1446,9 +1326,9 @@ self->bl_soft = pcibr_soft; self->bl_vhdl = pcibr_vhdl; self->bl_next = pcibr_list; - self->bl_next = swap_ptr((void **) &pcibr_list, (void *)self); + pcibr_list = self; } -#endif +#endif /* PCIBR_SOFT_LIST */ /* * get the name of this bridge vertex and keep the info. Use this @@ -1458,45 +1338,114 @@ pcibr_soft->bs_name = kmalloc(strlen(s) + 1, GFP_KERNEL); strcpy(pcibr_soft->bs_name, s); -#if SHOW_REVS || DEBUG -#if !DEBUG - if (kdebug) -#endif - printk("%sBridge ASIC: rev %s (code=0x%x) at %s\n", - is_xbridge(bridge) ? "X" : "", - (rev == BRIDGE_PART_REV_A) ? "A" : - (rev == BRIDGE_PART_REV_B) ? "B" : - (rev == BRIDGE_PART_REV_C) ? "C" : - (rev == BRIDGE_PART_REV_D) ? "D" : - (rev == XBRIDGE_PART_REV_A) ? "A" : - (rev == XBRIDGE_PART_REV_B) ? "B" : - "unknown", - rev, pcibr_soft->bs_name); -#endif + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_ATTACH, pcibr_vhdl, + "pcibr_attach2: %s ASIC: rev %s (code=0x%x)\n", + IS_XBRIDGE_SOFT(pcibr_soft) ? "XBridge" : + IS_PIC_SOFT(pcibr_soft) ? "PIC" : "Bridge", + (rev == BRIDGE_PART_REV_A) ? "A" : + (rev == BRIDGE_PART_REV_B) ? "B" : + (rev == BRIDGE_PART_REV_C) ? "C" : + (rev == BRIDGE_PART_REV_D) ? "D" : + (rev == XBRIDGE_PART_REV_A) ? "A" : + (rev == XBRIDGE_PART_REV_B) ? "B" : + (IS_PIC_PART_REV_A(rev)) ? "A" : + "unknown", rev, pcibr_soft->bs_name)); info = xwidget_info_get(xconn_vhdl); pcibr_soft->bs_xid = xwidget_info_id_get(info); pcibr_soft->bs_master = xwidget_info_master_get(info); pcibr_soft->bs_mxid = xwidget_info_masterid_get(info); + pcibr_soft->bs_first_slot = pcibr_soft->bs_min_slot; + pcibr_soft->bs_last_slot = pcibr_soft->bs_max_slot; /* - * Init bridge lock. + * Bridge can only reset slots 0, 1, 2, and 3. Ibrick internal + * slots 4, 5, 6, and 7 must be reset as a group, so do not + * reset them. */ - spin_lock_init(&pcibr_soft->bs_lock); + pcibr_soft->bs_last_reset = 3; + + nasid = NASID_GET(bridge); + + /* set whether it is a PIC or not */ + Is_pic_on_this_nasid[nasid] = (IS_PIC_SOFT(pcibr_soft)) ? 1 : 0; + + + if ((pcibr_soft->bs_bricktype = iobrick_type_get_nasid(nasid)) < 0) + printk(KERN_WARNING "0x%p: Unknown bricktype : 0x%x\n", (void *)xconn_vhdl, + (unsigned int)pcibr_soft->bs_bricktype); + + pcibr_soft->bs_moduleid = iobrick_module_get_nasid(nasid); + + if (pcibr_soft->bs_bricktype > 0) { + switch (pcibr_soft->bs_bricktype) { + case MODULE_PXBRICK: + pcibr_soft->bs_first_slot = 0; + pcibr_soft->bs_last_slot = 1; + pcibr_soft->bs_last_reset = 1; + break; + case MODULE_PEBRICK: + case MODULE_PBRICK: + pcibr_soft->bs_first_slot = 1; + pcibr_soft->bs_last_slot = 2; + pcibr_soft->bs_last_reset = 2; + break; + + case MODULE_IBRICK: + /* + * Here's the current baseio layout for SN1 style systems: + * + * 0 1 2 3 4 5 6 7 slot# + * + * x scsi x x ioc3 usb x x O300 Ibrick + * + * x == never occupied + * E == external (add-in) slot + * + */ + pcibr_soft->bs_first_slot = 1; /* Ibrick first slot == 1 */ + if (pcibr_soft->bs_xid == 0xe) { + pcibr_soft->bs_last_slot = 2; + pcibr_soft->bs_last_reset = 2; + } else { + pcibr_soft->bs_last_slot = 6; + } + break; + default: + break; + } + + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_ATTACH, pcibr_vhdl, + "pcibr_attach2: %cbrick, slots %d-%d\n", + MODULE_GET_BTCHAR(pcibr_soft->bs_moduleid), + pcibr_soft->bs_first_slot, pcibr_soft->bs_last_slot)); + } /* + * Initialize bridge and bus locks + */ + spin_lock_init(&pcibr_soft->bs_lock); +#ifdef PIC_LATER + mrinit(pcibr_soft->bs_bus_lock, "bus_lock"); +#endif + /* * If we have one, process the hints structure. */ if (pcibr_hints) { + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_HINTS, pcibr_vhdl, + "pcibr_attach2: pcibr_hints=0x%x\n", pcibr_hints)); + rrb_fixed = pcibr_hints->ph_rrb_fixed; pcibr_soft->bs_rrb_fixed = rrb_fixed; - if (pcibr_hints->ph_intr_bits) + if (pcibr_hints->ph_intr_bits) { pcibr_soft->bs_intr_bits = pcibr_hints->ph_intr_bits; + } - for (slot = 0; slot < 8; ++slot) { - int hslot = pcibr_hints->ph_host_slot[slot] - 1; + for (slot = pcibr_soft->bs_min_slot; + slot < PCIBR_NUM_SLOTS(pcibr_soft); ++slot) { + int hslot = pcibr_hints->ph_host_slot[slot] - 1; if (hslot < 0) { pcibr_soft->bs_slot[slot].host_slot = slot; @@ -1507,13 +1456,16 @@ } } /* - * set up initial values for state fields + * Set-up initial values for state fields */ - for (slot = 0; slot < 8; ++slot) { + for (slot = pcibr_soft->bs_min_slot; + slot < PCIBR_NUM_SLOTS(pcibr_soft); ++slot) { pcibr_soft->bs_slot[slot].bss_devio.bssd_space = PCIIO_SPACE_NONE; + pcibr_soft->bs_slot[slot].bss_devio.bssd_ref_cnt = 0; pcibr_soft->bs_slot[slot].bss_d64_base = PCIBR_D64_BASE_UNSET; pcibr_soft->bs_slot[slot].bss_d32_base = PCIBR_D32_BASE_UNSET; pcibr_soft->bs_slot[slot].bss_ext_ates_active = ATOMIC_INIT(0); + pcibr_soft->bs_rrb_valid_dflt[slot][VCHAN0] = -1; } for (ibit = 0; ibit < 8; ++ibit) { @@ -1522,15 +1474,31 @@ pcibr_soft->bs_intr[ibit].bsi_pcibr_intr_wrap.iw_list = NULL; pcibr_soft->bs_intr[ibit].bsi_pcibr_intr_wrap.iw_stat = &(bridge->b_int_status); + pcibr_soft->bs_intr[ibit].bsi_pcibr_intr_wrap.iw_ibit = ibit; pcibr_soft->bs_intr[ibit].bsi_pcibr_intr_wrap.iw_hdlrcnt = 0; pcibr_soft->bs_intr[ibit].bsi_pcibr_intr_wrap.iw_shared = 0; pcibr_soft->bs_intr[ibit].bsi_pcibr_intr_wrap.iw_connected = 0; } /* + * connect up our error handler. PIC has 2 busses (thus resulting in 2 + * pcibr_soft structs under 1 widget), so only register a xwidget error + * handler for PIC's bus0. NOTE: for PIC pcibr_error_handler_wrapper() + * is a wrapper routine we register that will call the real error handler + * pcibr_error_handler() with the correct pcibr_soft struct. + */ + if (IS_PIC_SOFT(pcibr_soft)) { + if (busnum == 0) { + xwidget_error_register(xconn_vhdl, pcibr_error_handler_wrapper, pcibr_soft); + } + } else { + xwidget_error_register(xconn_vhdl, pcibr_error_handler, pcibr_soft); + } + + /* * Initialize various Bridge registers. */ - + /* * On pre-Rev.D bridges, set the PCI_RETRY_CNT * to zero to avoid dropping stores. (#475347) @@ -1543,12 +1511,43 @@ */ bridge->b_int_rst_stat = (BRIDGE_IRR_ALL_CLR); + /* Initialize some PIC specific registers. */ + if (IS_PIC_SOFT(pcibr_soft)) { + picreg_t pic_ctrl_reg = bridge->p_wid_control_64; + + /* Bridges Requester ID: bus = busnum, dev = 0, func = 0 */ + pic_ctrl_reg &= ~PIC_CTRL_BUS_NUM_MASK; + pic_ctrl_reg |= PIC_CTRL_BUS_NUM(busnum); + pic_ctrl_reg &= ~PIC_CTRL_DEV_NUM_MASK; + pic_ctrl_reg &= ~PIC_CTRL_FUN_NUM_MASK; + + pic_ctrl_reg &= ~PIC_CTRL_NO_SNOOP; + pic_ctrl_reg &= ~PIC_CTRL_RELAX_ORDER; + + /* enable parity checking on PICs internal RAM */ + pic_ctrl_reg |= PIC_CTRL_PAR_EN_RESP; + pic_ctrl_reg |= PIC_CTRL_PAR_EN_ATE; + /* PIC BRINGUP WAR (PV# 862253): dont enable write request + * parity checking. + */ + if (!PCIBR_WAR_ENABLED(PV862253, pcibr_soft)) { + pic_ctrl_reg |= PIC_CTRL_PAR_EN_REQ; + } + + bridge->p_wid_control_64 = pic_ctrl_reg; + } + /* * Until otherwise set up, * assume all interrupts are - * from slot 7. + * from slot 7(Bridge/Xbridge) or 3(PIC). + * XXX. Not sure why we're doing this, made change for PIC + * just to avoid setting reserved bits. */ - bridge->b_int_device = (uint32_t) 0xffffffff; + if (IS_PIC_SOFT(pcibr_soft)) + bridge->b_int_device = (uint32_t) 0x006db6db; + else + bridge->b_int_device = (uint32_t) 0xffffffff; { bridgereg_t dirmap; @@ -1560,6 +1559,11 @@ int entry; cnodeid_t cnodeid; nasid_t nasid; +#ifdef PIC_LATER + char *node_val; + devfs_handle_t node_vhdl; + char vname[MAXDEVNAME]; +#endif /* Set the Bridge's 32-bit PCI to XTalk * Direct Map register to the most useful @@ -1578,6 +1582,30 @@ */ cnodeid = 0; /* default node id */ + /* + * Determine the base address node id to be used for all 32-bit + * Direct Mapping I/O. The default is node 0, but this can be changed + * via a DEVICE_ADMIN directive and the PCIBUS_DMATRANS_NODE + * attribute in the irix.sm config file. A device driver can obtain + * this node value via a call to pcibr_get_dmatrans_node(). + */ +#ifdef PIC_LATER +// This probably needs to be addressed - pfg + node_val = device_admin_info_get(pcibr_vhdl, ADMIN_LBL_DMATRANS_NODE); + if (node_val != NULL) { + node_vhdl = hwgraph_path_to_vertex(node_val); + if (node_vhdl != GRAPH_VERTEX_NONE) { + cnodeid = nodevertex_to_cnodeid(node_vhdl); + } + if ((node_vhdl == GRAPH_VERTEX_NONE) || (cnodeid == CNODEID_NONE)) { + cnodeid = 0; + vertex_to_name(pcibr_vhdl, vname, sizeof(vname)); + printk(KERN_WARNING "Invalid hwgraph node path specified:\n" + " DEVICE_ADMIN: %s %s=%s\n", + vname, ADMIN_LBL_DMATRANS_NODE, node_val); + } + } +#endif /* PIC_LATER */ nasid = COMPACT_TO_NASID_NODEID(cnodeid); paddr = NODE_OFFSET(nasid) + 0; @@ -1619,9 +1647,17 @@ */ spl_level = splhi(); #if IOPGSIZE == 4096 - bridge->b_wid_control &= ~BRIDGE_CTRL_PAGE_SIZE; + if (IS_PIC_SOFT(pcibr_soft)) { + bridge->p_wid_control_64 &= ~BRIDGE_CTRL_PAGE_SIZE; + } else { + bridge->b_wid_control &= ~BRIDGE_CTRL_PAGE_SIZE; + } #elif IOPGSIZE == 16384 - bridge->b_wid_control |= BRIDGE_CTRL_PAGE_SIZE; + if (IS_PIC_SOFT(pcibr_soft)) { + bridge->p_wid_control_64 |= BRIDGE_CTRL_PAGE_SIZE; + } else { + bridge->b_wid_control |= BRIDGE_CTRL_PAGE_SIZE; + } #else <<>>; #endif @@ -1652,7 +1688,8 @@ * recomparing against BRIDGE_INTERNAL_ATES every * time. */ - if (is_xbridge(bridge)) + + if (IS_XBRIDGE_OR_PIC_SOFT(pcibr_soft)) num_entries = 0; else num_entries = pcibr_init_ext_ate_ram(bridge); @@ -1662,9 +1699,6 @@ */ pcibr_soft->bs_int_ate_map = rmallocmap(pcibr_soft->bs_int_ate_size); pcibr_ate_free(pcibr_soft, 0, pcibr_soft->bs_int_ate_size); -#if PCIBR_ATE_DEBUG - printk("pcibr_attach: %d INTERNAL ATEs\n", pcibr_soft->bs_int_ate_size); -#endif if (num_entries > pcibr_soft->bs_int_ate_size) { #if PCIBR_ATE_NOTBOTH /* for debug -- forces us to use external ates */ @@ -1674,11 +1708,12 @@ pcibr_soft->bs_ext_ate_map = rmallocmap(num_entries); pcibr_ate_free(pcibr_soft, pcibr_soft->bs_int_ate_size, num_entries - pcibr_soft->bs_int_ate_size); -#if PCIBR_ATE_DEBUG - printk("pcibr_attach: %d EXTERNAL ATEs\n", - num_entries - pcibr_soft->bs_int_ate_size); -#endif } + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_ATE, pcibr_vhdl, + "pcibr_attach2: %d ATEs, %d internal & %d external\n", + num_entries ? num_entries : pcibr_soft->bs_int_ate_size, + pcibr_soft->bs_int_ate_size, + num_entries ? num_entries-pcibr_soft->bs_int_ate_size : 0)); } { @@ -1727,7 +1762,7 @@ * knows to do this. */ - xtalk_intr = xtalk_intr_alloc(xconn_vhdl, dev_desc, pcibr_vhdl); + xtalk_intr = xtalk_intr_alloc(xconn_vhdl, (device_desc_t)0, pcibr_vhdl); ASSERT(xtalk_intr != NULL); pcibr_soft->bsi_err_intr = xtalk_intr; @@ -1740,17 +1775,124 @@ */ pcibr_clearwidint(bridge); - xtalk_intr_connect(xtalk_intr, (xtalk_intr_setfunc_t)pcibr_setwidint, (void *)bridge); + xtalk_intr_connect(xtalk_intr, (intr_func_t) pcibr_error_intr_handler, + (intr_arg_t) pcibr_soft, (xtalk_intr_setfunc_t)pcibr_setwidint, (void *)bridge); + +#ifdef BUS_INT_WAR_NOT_YET + request_irq(CPU_VECTOR_TO_IRQ(((hub_intr_t)xtalk_intr)->i_cpuid, + ((hub_intr_t)xtalk_intr)->i_bit), + (intr_func_t)pcibr_error_intr_handler, 0, "PCIBR error", + (intr_arg_t) pcibr_soft); +#endif + + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_INTR_ALLOC, pcibr_vhdl, + "pcibr_setwidint: b_wid_int_upper=0x%x, b_wid_int_lower=0x%x\n", + bridge->b_wid_int_upper, bridge->b_wid_int_lower)); /* * now we can start handling error interrupts; * enable all of them. * NOTE: some PCI ints may already be enabled. */ - b_int_enable = bridge->b_int_enable | BRIDGE_ISR_ERRORS; + /* We read the INT_ENABLE register as a 64bit picreg_t for PIC and a + * 32bit bridgereg_t for BRIDGE, but always process the result as a + * 64bit value so the code can be "common" for both PIC and BRIDGE... + */ + if (IS_PIC_SOFT(pcibr_soft)) { + int_enable_64 = bridge->p_int_enable_64 | BRIDGE_ISR_ERRORS; + int_enable = (uint64_t)int_enable_64; + } else { + int_enable_32 = bridge->b_int_enable | (BRIDGE_ISR_ERRORS & 0xffffffff); + int_enable = ((uint64_t)int_enable_32 & 0xffffffff); + } +#ifdef BUS_INT_WAR_NOT_YET + { + extern void sn_add_polled_interrupt(int irq, int interval); + + sn_add_polled_interrupt(CPU_VECTOR_TO_IRQ(((hub_intr_t)xtalk_intr)->i_cpuid, + ((hub_intr_t)xtalk_intr)->i_bit), 20000); + } +#endif + + +#if BRIDGE_ERROR_INTR_WAR + if (pcibr_soft->bs_rev_num == BRIDGE_PART_REV_A) { + /* + * We commonly get master timeouts when talking to ql. + * We also see RESP_XTALK_ERROR and LLP_TX_RETRY interrupts. + * Insure that these are all disabled for now. + */ + int_enable &= ~(BRIDGE_IMR_PCI_MST_TIMEOUT | + BRIDGE_ISR_RESP_XTLK_ERR | + BRIDGE_ISR_LLP_TX_RETRY); + } + if (pcibr_soft->bs_rev_num < BRIDGE_PART_REV_C) { + int_enable &= ~BRIDGE_ISR_BAD_XRESP_PKT; + } +#endif /* BRIDGE_ERROR_INTR_WAR */ + +#ifdef QL_SCSI_CTRL_WAR /* for IP30 only */ + /* Really a QL rev A issue, but all newer hearts have newer QLs. + * Forces all IO6/MSCSI to be new. + */ + if (heart_rev() == HEART_REV_A) + int_enable &= ~BRIDGE_IMR_PCI_MST_TIMEOUT; +#endif + +#ifdef BRIDGE1_TIMEOUT_WAR + if (pcibr_soft->bs_rev_num == BRIDGE_PART_REV_A) { + /* + * Turn off these interrupts. They can't be trusted in bridge 1 + */ + int_enable &= ~(BRIDGE_IMR_XREAD_REQ_TIMEOUT | + BRIDGE_IMR_UNEXP_RESP); + } +#endif + +#ifdef BRIDGE_B_DATACORR_WAR + + /* WAR panic for Rev B silent data corruption. + * PIOERR turned off here because there is a problem + * with not re-arming it in pcibr_error_intr_handler. + * We don't get LLP error interrupts if we don't + * re-arm PIOERR interrupts! Just disable them here + */ + + if (pcibr_soft->bs_rev_num == BRIDGE_PART_REV_B) { + int_enable |= BRIDGE_IMR_LLP_REC_CBERR; + int_enable &= ~BRIDGE_ISR_PCIBUS_PIOERR; + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_ATTACH, pcibr_vhdl, + "Turning on LLP_REC_CBERR for Rev B Bridge.\n")); + } +#endif - bridge->b_int_enable = b_int_enable; + /* PIC BRINGUP WAR (PV# 856864 & 856865): allow the tnums that are + * locked out to be freed up sooner (by timing out) so that the + * read tnums are never completely used up. + */ + if (IS_PIC_SOFT(pcibr_soft) && PCIBR_WAR_ENABLED(PV856864, pcibr_soft)) { + int_enable &= ~PIC_ISR_PCIX_REQ_TOUT; + int_enable &= ~BRIDGE_ISR_XREAD_REQ_TIMEOUT; + + bridge->b_wid_req_timeout = 0x750; + } + + /* + * PIC BRINGUP WAR (PV# 856866, 859504, 861476, 861478): Don't use + * RRB0, RRB8, RRB1, and RRB9. Assign them to DEVICE[2|3]--VCHAN3 + * so they are not used + */ + if (IS_PIC_SOFT(pcibr_soft) && PCIBR_WAR_ENABLED(PV856866, pcibr_soft)) { + bridge->b_even_resp |= 0x000f000f; + bridge->b_odd_resp |= 0x000f000f; + } + + if (IS_PIC_SOFT(pcibr_soft)) { + bridge->p_int_enable_64 = (picreg_t)int_enable; + } else { + bridge->b_int_enable = (bridgereg_t)int_enable; + } bridge->b_int_mode = 0; /* do not send "clear interrupt" packets */ bridge->b_wid_tflush; /* wait until Bridge PIO complete */ @@ -1788,20 +1930,59 @@ (BRIDGE_WIDGET_PART_NUM << 4 | pcibr_wg_enable_rev)) pcibr_soft->bs_dma_flags |= PCIBR_NOWRITE_GATHER; - pciio_provider_register(pcibr_vhdl, &pcibr_provider); - pciio_provider_startup(pcibr_vhdl); - - pci_io_fb = 0x00000004; /* I/O FreeBlock Base */ - pci_io_fl = 0xFFFFFFFF; /* I/O FreeBlock Last */ - - pci_lo_fb = 0x00000010; /* Low Memory FreeBlock Base */ - pci_lo_fl = 0x001FFFFF; /* Low Memory FreeBlock Last */ + /* PIC only supports 64-bit direct mapping in PCI-X mode. Since + * all PCI-X devices that initiate memory transactions must be + * capable of generating 64-bit addressed, we force 64-bit DMAs. + */ + if (IS_PCIX(pcibr_soft)) { + pcibr_soft->bs_dma_flags |= PCIIO_DMA_A64; + } - pci_hi_fb = 0x00200000; /* High Memory FreeBlock Base */ - pci_hi_fl = 0x3FFFFFFF; /* High Memory FreeBlock Last */ + { + pciio_win_map_t win_map_p; + iopaddr_t prom_base_addr = pcibr_soft->bs_xid << 24; + int prom_base_size = 0x1000000; + iopaddr_t prom_base_limit = prom_base_addr + prom_base_size; + + /* Allocate resource maps based on bus page size; for I/O and memory + * space, free all pages except those in the base area and in the + * range set by the PROM. + * + * PROM creates BAR addresses in this format: 0x0ws00000 where w is + * the widget number and s is the device register offset for the slot. + */ - PCI_ADDR_SPACE_LIMITS_STORE(); + win_map_p = &pcibr_soft->bs_io_win_map; + pciio_device_win_map_new(win_map_p, + PCIBR_BUS_IO_MAX + 1, + PCIBR_BUS_IO_PAGE); + pciio_device_win_populate(win_map_p, + PCIBR_BUS_IO_BASE, + prom_base_addr - PCIBR_BUS_IO_BASE); + pciio_device_win_populate(win_map_p, + prom_base_limit, + (PCIBR_BUS_IO_MAX + 1) - prom_base_limit); + + win_map_p = &pcibr_soft->bs_swin_map; + pciio_device_win_map_new(win_map_p, + PCIBR_BUS_SWIN_MAX + 1, + PCIBR_BUS_SWIN_PAGE); + pciio_device_win_populate(win_map_p, + PCIBR_BUS_SWIN_BASE, + (PCIBR_BUS_SWIN_MAX + 1) - PCIBR_BUS_SWIN_PAGE); + + win_map_p = &pcibr_soft->bs_mem_win_map; + pciio_device_win_map_new(win_map_p, + PCIBR_BUS_MEM_MAX + 1, + PCIBR_BUS_MEM_PAGE); + pciio_device_win_populate(win_map_p, + PCIBR_BUS_MEM_BASE, + prom_base_addr - PCIBR_BUS_MEM_BASE); + pciio_device_win_populate(win_map_p, + prom_base_limit, + (PCIBR_BUS_MEM_MAX + 1) - prom_base_limit); + } /* build "no-slot" connection point */ @@ -1830,59 +2011,91 @@ } #endif -#ifdef LATER - /* If the bridge has been reset then there is no need to reset - * the individual PCI slots. - */ - for (slot = 0; slot < 8; ++slot) - /* Reset all the slots */ - (void)pcibr_slot_reset(pcibr_vhdl, slot); -#endif - - for (slot = 0; slot < 8; ++slot) + for (slot = pcibr_soft->bs_min_slot; + slot < PCIBR_NUM_SLOTS(pcibr_soft); ++slot) { /* Find out what is out there */ (void)pcibr_slot_info_init(pcibr_vhdl,slot); + } + for (slot = pcibr_soft->bs_min_slot; + slot < PCIBR_NUM_SLOTS(pcibr_soft); ++slot) + /* Set up the address space for this slot in the PCI land */ + (void)pcibr_slot_addr_space_init(pcibr_vhdl, slot); - for (slot = 0; slot < 8; ++slot) - /* Set up the address space for this slot in the pci land */ - (void)pcibr_slot_addr_space_init(pcibr_vhdl,slot); - - for (slot = 0; slot < 8; ++slot) + for (slot = pcibr_soft->bs_min_slot; + slot < PCIBR_NUM_SLOTS(pcibr_soft); ++slot) /* Setup the device register */ (void)pcibr_slot_device_init(pcibr_vhdl, slot); - for (slot = 0; slot < 8; ++slot) - /* Setup host/guest relations */ - (void)pcibr_slot_guest_info_init(pcibr_vhdl,slot); - - for (slot = 0; slot < 8; ++slot) - /* Initial RRB management */ - (void)pcibr_slot_initial_rrb_alloc(pcibr_vhdl,slot); + if (IS_PCIX(pcibr_soft)) { + pcibr_soft->bs_pcix_rbar_inuse = 0; + pcibr_soft->bs_pcix_rbar_avail = NUM_RBAR; + pcibr_soft->bs_pcix_rbar_percent_allowed = + pcibr_pcix_rbars_calc(pcibr_soft); + + for (slot = pcibr_soft->bs_min_slot; + slot < PCIBR_NUM_SLOTS(pcibr_soft); ++slot) + /* Setup the PCI-X Read Buffer Attribute Registers (RBARs) */ + (void)pcibr_slot_pcix_rbar_init(pcibr_soft, slot); + } + + /* Set up convenience links */ + if (IS_XBRIDGE_OR_PIC_SOFT(pcibr_soft)) + pcibr_bus_cnvlink(pcibr_soft->bs_vhdl); - /* driver attach routines should be called out from generic linux code */ - for (slot = 0; slot < 8; ++slot) - /* Call the device attach */ - (void)pcibr_slot_call_device_attach(pcibr_vhdl, slot, 0); + for (slot = pcibr_soft->bs_min_slot; + slot < PCIBR_NUM_SLOTS(pcibr_soft); ++slot) + /* Setup host/guest relations */ + (void)pcibr_slot_guest_info_init(pcibr_vhdl, slot); + /* Handle initial RRB management for Bridge and Xbridge */ + pcibr_initial_rrb(pcibr_vhdl, + pcibr_soft->bs_first_slot, pcibr_soft->bs_last_slot); + +{ /* Before any drivers get called that may want to re-allocate + * RRB's, let's get some special cases pre-allocated. Drivers + * may override these pre-allocations, but by doing pre-allocations + * now we're assured not to step all over what the driver intended. + * + * Note: Someday this should probably be moved over to pcibr_rrb.c + */ /* * Each Pbrick PCI bus only has slots 1 and 2. Similarly for * widget 0xe on Ibricks. Allocate RRB's accordingly. */ - if (pcibr_soft->bs_moduleid > 0) { - switch (MODULE_GET_BTCHAR(pcibr_soft->bs_moduleid)) { - case 'p': /* Pbrick */ - do_pcibr_rrb_autoalloc(pcibr_soft, 1, 8); - do_pcibr_rrb_autoalloc(pcibr_soft, 2, 8); + if (pcibr_soft->bs_bricktype > 0) { + switch (pcibr_soft->bs_bricktype) { + case MODULE_PXBRICK: + /* + * If the IO9 is in the PXBrick (bus1, slot1) allocate + * RRBs to all the devices + */ + if ((pcibr_widget_to_bus(pcibr_vhdl) == 1) && + (pcibr_soft->bs_slot[0].bss_vendor_id == 0x10A9) && + (pcibr_soft->bs_slot[0].bss_device_id == 0x100A)) { + do_pcibr_rrb_autoalloc(pcibr_soft, 0, VCHAN0, 4); + do_pcibr_rrb_autoalloc(pcibr_soft, 1, VCHAN0, 4); + do_pcibr_rrb_autoalloc(pcibr_soft, 2, VCHAN0, 4); + do_pcibr_rrb_autoalloc(pcibr_soft, 3, VCHAN0, 4); + } else { + do_pcibr_rrb_autoalloc(pcibr_soft, 0, VCHAN0, 8); + do_pcibr_rrb_autoalloc(pcibr_soft, 1, VCHAN0, 8); + } + break; - case 'i': /* Ibrick */ + case MODULE_PEBRICK: + case MODULE_PBRICK: + do_pcibr_rrb_autoalloc(pcibr_soft, 1, VCHAN0, 8); + do_pcibr_rrb_autoalloc(pcibr_soft, 2, VCHAN0, 8); + break; + case MODULE_IBRICK: /* port 0xe on the Ibrick only has slots 1 and 2 */ if (pcibr_soft->bs_xid == 0xe) { - do_pcibr_rrb_autoalloc(pcibr_soft, 1, 8); - do_pcibr_rrb_autoalloc(pcibr_soft, 2, 8); + do_pcibr_rrb_autoalloc(pcibr_soft, 1, VCHAN0, 8); + do_pcibr_rrb_autoalloc(pcibr_soft, 2, VCHAN0, 8); } else { /* allocate one RRB for the serial port */ - do_pcibr_rrb_autoalloc(pcibr_soft, 0, 1); + do_pcibr_rrb_autoalloc(pcibr_soft, 0, VCHAN0, 1); } break; } /* switch */ @@ -1890,33 +2103,80 @@ #ifdef LATER if (strstr(nicinfo, XTALK_PCI_PART_NUM)) { - do_pcibr_rrb_autoalloc(pcibr_soft, 1, 8); -#if PCIBR_RRB_DEBUG - printf("\n\nFound XTALK_PCI (030-1275) at %v\n", xconn_vhdl); - - printf("pcibr_attach: %v Shoebox RRB MANAGEMENT: %d+%d free\n", - pcibr_vhdl, - pcibr_soft->bs_rrb_avail[0], - pcibr_soft->bs_rrb_avail[1]); - - for (slot = 0; slot < 8; ++slot) - printf("\t%d+%d+%d", - 0xFFF & pcibr_soft->bs_rrb_valid[slot], - 0xFFF & pcibr_soft->bs_rrb_valid[slot + PCIBR_RRB_SLOT_VIRTUAL], - pcibr_soft->bs_rrb_res[slot]); - - printf("\n"); + do_pcibr_rrb_autoalloc(pcibr_soft, 1, VCHAN0, 8); + } #endif +} /* OK Special RRB allocations are done. */ + + for (slot = pcibr_soft->bs_min_slot; + slot < PCIBR_NUM_SLOTS(pcibr_soft); ++slot) + /* Call the device attach */ + (void)pcibr_slot_call_device_attach(pcibr_vhdl, slot, 0); + +#ifdef PIC_LATER +#if (defined(USS302_TIMEOUT_WAR)) + /* + * If this bridge holds a Lucent USS-302 or USS-312 pci/usb controller, + * increase the Bridge PCI retry backoff interval. This part seems + * to go away for long periods of time if a DAC appears on the bus during + * a read command that is being retried. + */ + +{ + ii_ixtt_u_t ixtt; + + for (slot = pcibr_soft->bs_min_slot; + slot < PCIBR_NUM_SLOTS(pcibr_soft); ++slot) { + if (pcibr_soft->bs_slot[slot].bss_vendor_id == + LUCENT_USBHC_VENDOR_ID_NUM && + (pcibr_soft->bs_slot[slot].bss_device_id == + LUCENT_USBHC302_DEVICE_ID_NUM || + pcibr_soft->bs_slot[slot].bss_device_id == + LUCENT_USBHC312_DEVICE_ID_NUM)) { + printk(KERN_NOTICE + "pcibr_attach: %x Bus holds a usb part - setting" + "bridge PCI_RETRY_HLD to %d\n", + pcibr_vhdl, USS302_BRIDGE_TIMEOUT_HLD); + + bridge->b_bus_timeout &= ~BRIDGE_BUS_PCI_RETRY_HLD_MASK; + bridge->b_bus_timeout |= + BRIDGE_BUS_PCI_RETRY_HLD(USS302_BRIDGE_TIMEOUT_HLD); + + /* + * Have to consider the read response timer in the hub II as well + */ + + hubii_ixtt_get(xconn_vhdl, &ixtt); + + /* + * bump rrsp_ps to allow at least 1ms for read + * responses from this widget + */ + + ixtt.ii_ixtt_fld_s.i_rrsp_ps = 20000; + hubii_ixtt_set(xconn_vhdl, &ixtt); + + /* + * print the current setting + */ + + hubii_ixtt_get(xconn_vhdl, &ixtt); + printk( "Setting hub ixtt.rrsp_ps field to 0x%x\n", + ixtt.ii_ixtt_fld_s.i_rrsp_ps); + + break; /* only need to do it once */ + } } +} +#endif /* (defined(USS302_TIMEOUT_WAR)) */ #else FIXME("pcibr_attach: Call do_pcibr_rrb_autoalloc nicinfo\n"); -#endif +#endif /* PIC_LATER */ if (aa) async_attach_add_info(noslot_conn, aa); - pciio_device_attach(noslot_conn, 0); - + pciio_device_attach(noslot_conn, (int)0); /* * Tear down pointer to async attach info -- async threads for @@ -1927,11 +2187,13 @@ return 0; } + /* * pcibr_detach: * Detach the bridge device from the hwgraph after cleaning out all the * underlying vertices. */ + int pcibr_detach(devfs_handle_t xconn) { @@ -1939,6 +2201,9 @@ devfs_handle_t pcibr_vhdl; pcibr_soft_t pcibr_soft; bridge_t *bridge; + unsigned s; + + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_DETACH, xconn, "pcibr_detach\n")); /* Get the bridge vertex from its xtalk connection point */ if (hwgraph_traverse(xconn, EDGE_LBL_PCI, &pcibr_vhdl) != GRAPH_SUCCESS) @@ -1947,16 +2212,20 @@ pcibr_soft = pcibr_soft_get(pcibr_vhdl); bridge = pcibr_soft->bs_base; + + s = pcibr_lock(pcibr_soft); /* Disable the interrupts from the bridge */ - bridge->b_int_enable = 0; + if (IS_PIC_SOFT(pcibr_soft)) { + bridge->p_int_enable_64 = 0; + } else { + bridge->b_int_enable = 0; + } + pcibr_unlock(pcibr_soft, s); /* Detach all the PCI devices talking to this bridge */ - for(slot = 0; slot < 8; slot++) { -#ifdef DEBUG - printk("pcibr_device_detach called for %p/%d\n", - pcibr_vhdl,slot); -#endif - pcibr_slot_detach(pcibr_vhdl, slot, 0); + for (slot = pcibr_soft->bs_min_slot; + slot < PCIBR_NUM_SLOTS(pcibr_soft); ++slot) { + pcibr_slot_detach(pcibr_vhdl, slot, 0, (char *)NULL, (int *)NULL); } /* Unregister the no-slot connection point */ @@ -1998,17 +2267,29 @@ int pcibr_asic_rev(devfs_handle_t pconn_vhdl) { - devfs_handle_t pcibr_vhdl; + devfs_handle_t pcibr_vhdl; + int tmp_vhdl; arbitrary_info_t ainfo; if (GRAPH_SUCCESS != hwgraph_traverse(pconn_vhdl, EDGE_LBL_MASTER, &pcibr_vhdl)) return -1; - if (GRAPH_SUCCESS != - hwgraph_info_get_LBL(pcibr_vhdl, INFO_LBL_PCIBR_ASIC_REV, &ainfo)) - return -1; + tmp_vhdl = hwgraph_info_get_LBL(pcibr_vhdl, INFO_LBL_PCIBR_ASIC_REV, &ainfo); + /* + * Any hwgraph function that returns a vertex handle will implicity + * increment that vertex's reference count. The caller must explicity + * decrement the vertex's referece count after the last reference to + * that vertex. + * + * Decrement reference count incremented by call to hwgraph_traverse(). + * + */ + hwgraph_vertex_unref(pcibr_vhdl); + + if (tmp_vhdl != GRAPH_SUCCESS) + return -1; return (int) ainfo; } @@ -2018,7 +2299,7 @@ pciio_info_t pciio_info = pciio_info_get(pconn_vhdl); pcibr_soft_t pcibr_soft = (pcibr_soft_t) pciio_info_mfast_get(pciio_info); pciio_slot_t slot; - slot = pciio_info_slot_get(pciio_info); + slot = PCIBR_INFO_SLOT_GET_INT(pciio_info); pcibr_device_write_gather_flush(pcibr_soft, slot); return 0; } @@ -2048,11 +2329,13 @@ size_t wsize; /* size of device decode on PCI */ int try; /* DevIO(x) window scanning order control */ + int maxtry, halftry; int win; /* which DevIO(x) window is being used */ pciio_space_t mspace; /* target space for devio(x) register */ iopaddr_t mbase; /* base of devio(x) mapped area on PCI */ size_t msize; /* size of devio(x) mapped area on PCI */ size_t mmask; /* addr bits stored in Device(x) */ + char tmp_str[512]; unsigned long s; @@ -2061,6 +2344,17 @@ if (pcibr_soft->bs_slot[slot].has_host) { slot = pcibr_soft->bs_slot[slot].host_slot; pcibr_info = pcibr_soft->bs_slot[slot].bss_infos[0]; + + /* + * Special case for dual-slot pci devices such as ioc3 on IP27 + * baseio. In these cases, pconn_vhdl should never be for a pci + * function on a subordiate PCI bus, so we can safely reset pciio_info + * to be the info struct embedded in pcibr_info. Failure to do this + * results in using a bogus pciio_info_t for calculations done later + * in this routine. + */ + + pciio_info = &pcibr_info->f_c; } if (space == PCIIO_SPACE_NONE) goto done; @@ -2080,7 +2374,7 @@ */ if (((flags & PCIIO_BYTE_STREAM) == 0) && ((pci_addr + req_size) <= BRIDGE_TYPE0_CFG_FUNC_OFF)) - xio_addr = pci_addr + BRIDGE_TYPE0_CFG_DEV(slot); + xio_addr = pci_addr + PCIBR_TYPE0_CFG_DEV(pcibr_soft, slot); goto done; } @@ -2090,8 +2384,8 @@ * enabling and disabling * decodes properly. */ - wbase = pcibr_info->f_rbase; - wsize = pcibr_info->f_rsize; + wbase = pciio_info->c_rbase; + wsize = pciio_info->c_rsize; /* * While the driver should know better @@ -2113,13 +2407,13 @@ */ bar = space - PCIIO_SPACE_WIN0; if (bar < 6) { - wspace = pcibr_info->f_window[bar].w_space; + wspace = pciio_info->c_window[bar].w_space; if (wspace == PCIIO_SPACE_NONE) goto done; /* get PCI base and size */ - wbase = pcibr_info->f_window[bar].w_base; - wsize = pcibr_info->f_window[bar].w_size; + wbase = pciio_info->c_window[bar].w_base; + wsize = pciio_info->c_window[bar].w_size; /* * While the driver should know better @@ -2147,11 +2441,15 @@ * We will not attempt to satisfy a single request * by concatinating multiple windows. */ - for (try = 0; try < 16; ++try) { + maxtry = PCIBR_NUM_SLOTS(pcibr_soft) * 2; + halftry = PCIBR_NUM_SLOTS(pcibr_soft) - 1; + for (try = 0; try < maxtry; ++try) { bridgereg_t devreg; unsigned offset; - win = (try + slot) % 8; + /* calculate win based on slot, attempt, and max possible + devices on bus */ + win = (try + slot) % PCIBR_NUM_SLOTS(pcibr_soft); /* If this DevIO(x) mapping area can provide * a mapping to this address, use it. @@ -2176,7 +2474,7 @@ * (only check this the second time through) */ mspace = pcibr_soft->bs_slot[win].bss_devio.bssd_space; - if ((try > 7) && (mspace == PCIIO_SPACE_NONE)) { + if ((try > halftry) && (mspace == PCIIO_SPACE_NONE)) { /* If this is the primary DevIO(x) window * for some other device, skip it. @@ -2214,25 +2512,61 @@ devreg &= ~BRIDGE_DEV_DEV_SWAP; if (pcibr_soft->bs_slot[win].bss_device != devreg) { - bridge->b_device[win].reg = devreg; - pcibr_soft->bs_slot[win].bss_device = devreg; - bridge->b_wid_tflush; /* wait until Bridge PIO complete */ + if ( IS_PIC_SOFT(pcibr_soft) ) { + bridge->b_device[win].reg = devreg; + pcibr_soft->bs_slot[win].bss_device = devreg; + bridge->b_wid_tflush; /* wait until Bridge PIO complete */ + } + else { + if (io_get_sh_swapper(NASID_GET(bridge))) { + BRIDGE_REG_SET32((&bridge->b_device[win].reg)) = __swab32(devreg); + pcibr_soft->bs_slot[win].bss_device = devreg; + BRIDGE_REG_GET32((&bridge->b_wid_tflush)); /* wait until Bridge PIO complete */ + } else { + bridge->b_device[win].reg = devreg; + pcibr_soft->bs_slot[win].bss_device = devreg; + bridge->b_wid_tflush; /* wait until Bridge PIO complete */ + } + } -#if DEBUG && PCI_DEBUG - printk("pcibr Device(%d): 0x%lx\n", win, bridge->b_device[win].reg); +#ifdef PCI_LATER + PCIBR_DEBUG((PCIBR_DEBUG_DEVREG, pconn_vhdl, + "pcibr_addr_pci_to_xio: Device(%d): %x\n", + win, devreg, device_bits)); +#else + printk("pcibr_addr_pci_to_xio: Device(%d): %x\n", win, devreg); #endif } pcibr_soft->bs_slot[win].bss_devio.bssd_space = space; pcibr_soft->bs_slot[win].bss_devio.bssd_base = mbase; - xio_addr = BRIDGE_DEVIO(win) + (pci_addr - mbase); + xio_addr = PCIBR_BRIDGE_DEVIO(pcibr_soft, win) + (pci_addr - mbase); -#if DEBUG && PCI_DEBUG - printk("%s LINE %d map to space %d space desc 0x%x[%lx..%lx] for slot %d allocates DevIO(%d) devreg 0x%x\n", - __FUNCTION__, __LINE__, space, space_desc, - pci_addr, pci_addr + req_size - 1, - slot, win, devreg); -#endif + /* Increment this DevIO's use count */ + pcibr_soft->bs_slot[win].bss_devio.bssd_ref_cnt++; + /* Save the DevIO register index used to access this BAR */ + if (bar != -1) + pcibr_info->f_window[bar].w_devio_index = win; + + /* + * The kernel only allows functions to have so many variable args, + * attempting to call PCIBR_DEBUG_ALWAYS() with more than 5 printk + * arguments fails so sprintf() it into a temporary string. + */ + if (pcibr_debug_mask & PCIBR_DEBUG_PIOMAP) { +#ifdef PIC_LATER + sprintf(tmp_str, "pcibr_addr_pci_to_xio: map to %x[%x..%x] for " + "slot %d allocates DevIO(%d) Device(%d) set to %x\n", + space, space_desc, pci_addr, pci_addr + req_size - 1, + slot, win, win, devreg, device_bits); +#else + sprintf(tmp_str, "pcibr_addr_pci_to_xio: map to [%lx..%lx] for " + "slot %d allocates DevIO(%d) Device(%d) set to %lx\n", + (unsigned long)pci_addr, (unsigned long)(pci_addr + req_size - 1), + (unsigned int)slot, win, win, (unsigned long)devreg); +#endif + PCIBR_DEBUG((PCIBR_DEBUG_PIOMAP, pconn_vhdl, "%s", tmp_str)); + } goto done; } /* endif DevIO(x) not pointed */ mbase = pcibr_soft->bs_slot[win].bss_devio.bssd_base; @@ -2251,12 +2585,23 @@ * final XIO address, release the lock and * return. */ - xio_addr = BRIDGE_DEVIO(win) + (pci_addr - mbase); + xio_addr = PCIBR_BRIDGE_DEVIO(pcibr_soft, win) + (pci_addr - mbase); + + /* Increment this DevIO's use count */ + pcibr_soft->bs_slot[win].bss_devio.bssd_ref_cnt++; -#if DEBUG && PCI_DEBUG - printk("%s LINE %d map to space %d [0x%p..0x%p] for slot %d uses DevIO(%d)\n", - __FUNCTION__, __LINE__, space, pci_addr, pci_addr + req_size - 1, slot, win); + /* Save the DevIO register index used to access this BAR */ + if (bar != -1) + pcibr_info->f_window[bar].w_devio_index = win; + + if (pcibr_debug_mask & PCIBR_DEBUG_PIOMAP) { +#ifdef PIC_LATER + sprintf(tmp_str, "pcibr_addr_pci_to_xio: map to %x[%x..%x] for " + "slot %d uses DevIO(%d)\n", space, space_desc, pci_addr, + pci_addr + req_size - 1, slot, win); #endif + PCIBR_DEBUG((PCIBR_DEBUG_PIOMAP, pconn_vhdl, "%s", tmp_str)); + } goto done; } @@ -2322,33 +2667,55 @@ if (bfn == bfo) { /* we already match. */ ; } else if (bfo != 0) { /* we have a conflict. */ -#if DEBUG && PCI_DEBUG - printk("pcibr_addr_pci_to_xio: swap conflict in space %d , was%s%s, want%s%s\n", - space, - bfo & PCIIO_BYTE_STREAM ? " BYTE_STREAM" : "", - bfo & PCIIO_WORD_VALUES ? " WORD_VALUES" : "", - bfn & PCIIO_BYTE_STREAM ? " BYTE_STREAM" : "", - bfn & PCIIO_WORD_VALUES ? " WORD_VALUES" : ""); + if (pcibr_debug_mask & PCIBR_DEBUG_PIOMAP) { +#ifdef PIC_LATER + sprintf(tmp_str, "pcibr_addr_pci_to_xio: swap conflict in %x, " + "was%s%s, want%s%s\n", space, space_desc, + bfo & PCIIO_BYTE_STREAM ? " BYTE_STREAM" : "", + bfo & PCIIO_WORD_VALUES ? " WORD_VALUES" : "", + bfn & PCIIO_BYTE_STREAM ? " BYTE_STREAM" : "", + bfn & PCIIO_WORD_VALUES ? " WORD_VALUES" : ""); #endif + PCIBR_DEBUG((PCIBR_DEBUG_PIOMAP, pconn_vhdl, "%s", tmp_str)); + } xio_addr = XIO_NOWHERE; } else { /* OK to make the change. */ - bridgereg_t octl, nctl; - swb = (space == PCIIO_SPACE_IO) ? BRIDGE_CTRL_IO_SWAP : BRIDGE_CTRL_MEM_SWAP; - octl = bridge->b_wid_control; - nctl = bst ? octl | swb : octl & ~swb; + if ( IS_PIC_SOFT(pcibr_soft) ) { + picreg_t octl, nctl; + octl = bridge->p_wid_control_64; + nctl = bst ? octl | (uint64_t)swb : octl & ((uint64_t)~swb); - if (octl != nctl) /* make the change if any */ - bridge->b_wid_control = nctl; + if (octl != nctl) /* make the change if any */ + bridge->b_wid_control = nctl; + } + else { + picreg_t octl, nctl; + if (io_get_sh_swapper(NASID_GET(bridge))) { + octl = BRIDGE_REG_GET32((&bridge->b_wid_control)); + nctl = bst ? octl | swb : octl & ~swb; + + if (octl != nctl) /* make the change if any */ + BRIDGE_REG_SET32((&bridge->b_wid_control)) = __swab32(nctl); + } else { + octl = bridge->b_wid_control; + nctl = bst ? octl | swb : octl & ~swb; + if (octl != nctl) /* make the change if any */ + bridge->b_wid_control = nctl; + } + } *bfp = bfn; /* record the assignment */ -#if DEBUG && PCI_DEBUG - printk("pcibr_addr_pci_to_xio: swap for space %d set to%s%s\n", - space, - bfn & PCIIO_BYTE_STREAM ? " BYTE_STREAM" : "", - bfn & PCIIO_WORD_VALUES ? " WORD_VALUES" : ""); + if (pcibr_debug_mask & PCIBR_DEBUG_PIOMAP) { +#ifdef PIC_LATER + sprintf(tmp_str, "pcibr_addr_pci_to_xio: swap for %x set " + "to%s%s\n", space, space_desc, + bfn & PCIIO_BYTE_STREAM ? " BYTE_STREAM" : "", + bfn & PCIIO_WORD_VALUES ? " WORD_VALUES" : ""); #endif + PCIBR_DEBUG((PCIBR_DEBUG_PIOMAP, pconn_vhdl, "%s", tmp_str)); + } } } done: @@ -2368,7 +2735,7 @@ { pcibr_info_t pcibr_info = pcibr_info_get(pconn_vhdl); pciio_info_t pciio_info = &pcibr_info->f_c; - pciio_slot_t pciio_slot = pciio_info_slot_get(pciio_info); + pciio_slot_t pciio_slot = PCIBR_INFO_SLOT_GET_INT(pciio_info); pcibr_soft_t pcibr_soft = (pcibr_soft_t) pciio_info_mfast_get(pciio_info); devfs_handle_t xconn_vhdl = pcibr_soft->bs_conn; @@ -2380,8 +2747,11 @@ unsigned long s; /* Make sure that the req sizes are non-zero */ - if ((req_size < 1) || (req_size_max < 1)) + if ((req_size < 1) || (req_size_max < 1)) { + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_PIOMAP, pconn_vhdl, + "pcibr_piomap_alloc: req_size | req_size_max < 1\n")); return NULL; + } /* * Code to translate slot/space/addr @@ -2390,8 +2760,11 @@ */ xio_addr = pcibr_addr_pci_to_xio(pconn_vhdl, pciio_slot, space, pci_addr, req_size, flags); - if (xio_addr == XIO_NOWHERE) + if (xio_addr == XIO_NOWHERE) { + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_PIOMAP, pconn_vhdl, + "pcibr_piomap_alloc: xio_addr == XIO_NOWHERE\n")); return NULL; + } /* Check the piomap list to see if there is already an allocated * piomap entry but not in use. If so use that one. Otherwise @@ -2415,7 +2788,7 @@ } pcibr_piomap->bp_dev = pconn_vhdl; - pcibr_piomap->bp_slot = pciio_slot; + pcibr_piomap->bp_slot = PCIBR_DEVICE_TO_SLOT(pcibr_soft, pciio_slot); pcibr_piomap->bp_flags = flags; pcibr_piomap->bp_space = space; pcibr_piomap->bp_pciaddr = pci_addr; @@ -2446,6 +2819,10 @@ pcibr_piomap = 0; } } + + PCIBR_DEBUG((PCIBR_DEBUG_PIOMAP, pconn_vhdl, + "pcibr_piomap_alloc: map=0x%x\n", pcibr_piomap)); + return pcibr_piomap; } @@ -2453,6 +2830,9 @@ void pcibr_piomap_free(pcibr_piomap_t pcibr_piomap) { + PCIBR_DEBUG((PCIBR_DEBUG_PIOMAP, pcibr_piomap->bp_dev, + "pcibr_piomap_free: map=0x%x\n", pcibr_piomap)); + xtalk_piomap_free(pcibr_piomap->bp_xtalk_pio); pcibr_piomap->bp_xtalk_pio = 0; pcibr_piomap->bp_mapsz = 0; @@ -2464,16 +2844,24 @@ iopaddr_t pci_addr, size_t req_size) { - return xtalk_piomap_addr(pcibr_piomap->bp_xtalk_pio, + caddr_t addr; + addr = xtalk_piomap_addr(pcibr_piomap->bp_xtalk_pio, pcibr_piomap->bp_xtalk_addr + pci_addr - pcibr_piomap->bp_pciaddr, req_size); + PCIBR_DEBUG((PCIBR_DEBUG_PIOMAP, pcibr_piomap->bp_dev, + "pcibr_piomap_free: map=0x%x, addr=0x%x\n", + pcibr_piomap, addr)); + + return(addr); } /*ARGSUSED */ void pcibr_piomap_done(pcibr_piomap_t pcibr_piomap) { + PCIBR_DEBUG((PCIBR_DEBUG_PIOMAP, pcibr_piomap->bp_dev, + "pcibr_piomap_done: map=0x%x\n", pcibr_piomap)); xtalk_piomap_done(pcibr_piomap->bp_xtalk_pio); } @@ -2487,26 +2875,34 @@ unsigned flags) { pciio_info_t pciio_info = pciio_info_get(pconn_vhdl); - pciio_slot_t pciio_slot = pciio_info_slot_get(pciio_info); + pciio_slot_t pciio_slot = PCIBR_INFO_SLOT_GET_INT(pciio_info); pcibr_soft_t pcibr_soft = (pcibr_soft_t) pciio_info_mfast_get(pciio_info); devfs_handle_t xconn_vhdl = pcibr_soft->bs_conn; iopaddr_t xio_addr; + caddr_t addr; xio_addr = pcibr_addr_pci_to_xio(pconn_vhdl, pciio_slot, space, pci_addr, req_size, flags); - if (xio_addr == XIO_NOWHERE) + if (xio_addr == XIO_NOWHERE) { + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_PIODIR, pconn_vhdl, + "pcibr_piotrans_addr: xio_addr == XIO_NOWHERE\n")); return NULL; + } - return xtalk_piotrans_addr(xconn_vhdl, 0, xio_addr, req_size, flags & PIOMAP_FLAGS); + addr = xtalk_piotrans_addr(xconn_vhdl, 0, xio_addr, req_size, flags & PIOMAP_FLAGS); + PCIBR_DEBUG((PCIBR_DEBUG_PIODIR, pconn_vhdl, + "pcibr_piotrans_addr: xio_addr=0x%x, addr=0x%x\n", + xio_addr, addr)); + return(addr); } /* * PIO Space allocation and management. * Allocate and Manage the PCI PIO space (mem and io space) * This routine is pretty simplistic at this time, and - * does pretty trivial management of allocation and freeing.. - * The current scheme is prone for fragmentation.. + * does pretty trivial management of allocation and freeing. + * The current scheme is prone for fragmentation. * Change the scheme to use bitmaps. */ @@ -2525,7 +2921,6 @@ pciio_piospace_t piosp; unsigned long s; - iopaddr_t *pciaddr, *pcilast; iopaddr_t start_addr; size_t align_mask; @@ -2559,38 +2954,43 @@ } ASSERT(!piosp); + /* + * Allocate PCI bus address, usually for the Universe chip driver; + * do not pass window info since the actual PCI bus address + * space will never be freed. The space may be reused after it + * is logically released by pcibr_piospace_free(). + */ switch (space) { case PCIIO_SPACE_IO: - pciaddr = &pcibr_soft->bs_spinfo.pci_io_base; - pcilast = &pcibr_soft->bs_spinfo.pci_io_last; + start_addr = pcibr_bus_addr_alloc(pcibr_soft, NULL, + PCIIO_SPACE_IO, + 0, req_size, alignment); break; + case PCIIO_SPACE_MEM: case PCIIO_SPACE_MEM32: - pciaddr = &pcibr_soft->bs_spinfo.pci_mem_base; - pcilast = &pcibr_soft->bs_spinfo.pci_mem_last; + start_addr = pcibr_bus_addr_alloc(pcibr_soft, NULL, + PCIIO_SPACE_MEM32, + 0, req_size, alignment); break; + default: ASSERT(0); pcibr_unlock(pcibr_soft, s); + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_PIOMAP, pconn_vhdl, + "pcibr_piospace_alloc: unknown space %d\n", space)); return 0; } - start_addr = *pciaddr; - /* - * Align start_addr. + * If too big a request, reject it. */ - if (start_addr & align_mask) - start_addr = (start_addr + align_mask) & ~align_mask; - - if ((start_addr + req_size) > *pcilast) { - /* - * If too big a request, reject it. - */ + if (!start_addr) { pcibr_unlock(pcibr_soft, s); + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_PIOMAP, pconn_vhdl, + "pcibr_piospace_alloc: request 0x%x to big\n", req_size)); return 0; } - *pciaddr = (start_addr + req_size); NEW(piosp); piosp->free = 0; @@ -2601,6 +3001,10 @@ pcibr_info->f_piospace = piosp; pcibr_unlock(pcibr_soft, s); + + PCIBR_DEBUG((PCIBR_DEBUG_PIOMAP, pconn_vhdl, + "pcibr_piospace_alloc: piosp=0x%x\n", piosp)); + return start_addr; } @@ -2612,7 +3016,9 @@ size_t req_size) { pcibr_info_t pcibr_info = pcibr_info_get(pconn_vhdl); +#ifdef PIC_LATER pcibr_soft_t pcibr_soft = (pcibr_soft_t) pcibr_info->f_mfast; +#endif pciio_piospace_t piosp; unsigned long s; @@ -2655,6 +3061,9 @@ } piosp->free = 1; pcibr_unlock(pcibr_soft, s); + + PCIBR_DEBUG((PCIBR_DEBUG_PIOMAP, pconn_vhdl, + "pcibr_piospace_free: piosp=0x%x\n", piosp)); return; } @@ -2713,7 +3122,7 @@ attributes &= ~PCI64_ATTR_PREF; /* the swap bit is in the address attributes for xbridge */ - if (pcibr_soft->bs_xbridge) { + if (IS_XBRIDGE_OR_PIC_SOFT(pcibr_soft)) { if (flags & PCIIO_BYTE_STREAM) attributes |= PCI64_ATTR_SWAP; if (flags & PCIIO_WORD_VALUES) @@ -2742,6 +3151,11 @@ if (flags & PCIBR_VCHAN0) attributes &= ~PCI64_ATTR_VIRTUAL; + /* PIC in PCI-X mode only supports barrier & swap */ + if (IS_PCIX(pcibr_soft)) { + attributes &= (PCI64_ATTR_BAR | PCI64_ATTR_SWAP); + } + return (attributes); } @@ -2762,6 +3176,7 @@ pcibr_dmamap_t pcibr_dmamap; int ate_count; int ate_index; + int vchan = VCHAN0; /* merge in forced flags */ flags |= pcibr_soft->bs_dma_flags; @@ -2778,17 +3193,16 @@ xtalk_dmamap = xtalk_dmamap_alloc(xconn_vhdl, dev_desc, req_size_max, flags & DMAMAP_FLAGS); if (!xtalk_dmamap) { -#if PCIBR_ATE_DEBUG - printk("pcibr_attach: xtalk_dmamap_alloc failed\n"); -#endif + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_DMAMAP, pconn_vhdl, + "pcibr_dmamap_alloc: xtalk_dmamap_alloc failed\n")); free_pciio_dmamap(pcibr_dmamap); return 0; } xio_port = pcibr_soft->bs_mxid; - slot = pciio_info_slot_get(pciio_info); + slot = PCIBR_INFO_SLOT_GET_INT(pciio_info); pcibr_dmamap->bd_dev = pconn_vhdl; - pcibr_dmamap->bd_slot = slot; + pcibr_dmamap->bd_slot = PCIBR_DEVICE_TO_SLOT(pcibr_soft, slot); pcibr_dmamap->bd_soft = pcibr_soft; pcibr_dmamap->bd_xtalk = xtalk_dmamap; pcibr_dmamap->bd_max_size = req_size_max; @@ -2812,29 +3226,37 @@ pcibr_dmamap->bd_xio_addr = 0; pcibr_dmamap->bd_pci_addr = pci_addr; - /* Make sure we have an RRB (or two). + /* If in PCI mode, make sure we have an RRB (or two). */ - if (!(pcibr_soft->bs_rrb_fixed & (1 << slot))) { + if (IS_PCI(pcibr_soft) && + !(pcibr_soft->bs_rrb_fixed & (1 << slot))) { if (flags & PCIBR_VCHAN1) - slot += PCIBR_RRB_SLOT_VIRTUAL; - have_rrbs = pcibr_soft->bs_rrb_valid[slot]; + vchan = VCHAN1; + have_rrbs = pcibr_soft->bs_rrb_valid[slot][vchan]; if (have_rrbs < 2) { if (pci_addr & PCI64_ATTR_PREF) min_rrbs = 2; else min_rrbs = 1; if (have_rrbs < min_rrbs) - do_pcibr_rrb_autoalloc(pcibr_soft, slot, min_rrbs - have_rrbs); + do_pcibr_rrb_autoalloc(pcibr_soft, slot, vchan, + min_rrbs - have_rrbs); } } -#if PCIBR_ATE_DEBUG - printk("pcibr_dmamap_alloc: using direct64\n"); -#endif + PCIBR_DEBUG((PCIBR_DEBUG_DMAMAP | PCIBR_DEBUG_DMADIR, pconn_vhdl, + "pcibr_dmamap_alloc: using direct64, map=0x%x\n", + pcibr_dmamap)); return pcibr_dmamap; } -#if PCIBR_ATE_DEBUG - printk("pcibr_dmamap_alloc: unable to use direct64\n"); -#endif + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_DMAMAP | PCIBR_DEBUG_DMADIR, pconn_vhdl, + "pcibr_dmamap_alloc: unable to use direct64\n")); + + /* PIC only supports 64-bit direct mapping in PCI-X mode. */ + if (IS_PCIX(pcibr_soft)) { + DEL(pcibr_dmamap); + return 0; + } + flags &= ~PCIIO_DMA_A64; } if (flags & PCIIO_FIXED) { @@ -2849,17 +3271,17 @@ * Mapping calls may fail if target * is outside the direct32 range. */ -#if PCIBR_ATE_DEBUG - printk("pcibr_dmamap_alloc: using direct32\n"); -#endif + PCIBR_DEBUG((PCIBR_DEBUG_DMAMAP | PCIBR_DEBUG_DMADIR, pconn_vhdl, + "pcibr_dmamap_alloc: using direct32, map=0x%x\n", + pcibr_dmamap)); pcibr_dmamap->bd_flags = flags; pcibr_dmamap->bd_xio_addr = pcibr_soft->bs_dir_xbase; pcibr_dmamap->bd_pci_addr = PCI32_DIRECT_BASE; return pcibr_dmamap; } -#if PCIBR_ATE_DEBUG - printk("pcibr_dmamap_alloc: unable to use direct32\n"); -#endif + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_DMAMAP | PCIBR_DEBUG_DMADIR, pconn_vhdl, + "pcibr_dmamap_alloc: unable to use direct32\n")); + /* If the user demands FIXED and we can't * give it to him, fail. */ @@ -2892,9 +3314,9 @@ int have_rrbs; int min_rrbs; -#if PCIBR_ATE_DEBUG - printk("pcibr_dmamap_alloc: using PMU\n"); -#endif + PCIBR_DEBUG((PCIBR_DEBUG_DMAMAP, pconn_vhdl, + "pcibr_dmamap_alloc: using PMU, ate_index=%d, " + "pcibr_dmamap=0x%x\n", ate_index, pcibr_dmamap)); ate_proto = pcibr_flags_to_ate(flags); @@ -2904,7 +3326,7 @@ /* * for xbridge the byte-swap bit == bit 29 of PCI address */ - if (pcibr_soft->bs_xbridge) { + if (IS_XBRIDGE_OR_PIC_SOFT(pcibr_soft)) { if (flags & PCIIO_BYTE_STREAM) ATE_SWAP_ON(pcibr_dmamap->bd_pci_addr); /* @@ -2926,18 +3348,19 @@ /* Make sure we have an RRB (or two). */ if (!(pcibr_soft->bs_rrb_fixed & (1 << slot))) { - have_rrbs = pcibr_soft->bs_rrb_valid[slot]; + have_rrbs = pcibr_soft->bs_rrb_valid[slot][vchan]; if (have_rrbs < 2) { if (ate_proto & ATE_PREF) min_rrbs = 2; else min_rrbs = 1; if (have_rrbs < min_rrbs) - do_pcibr_rrb_autoalloc(pcibr_soft, slot, min_rrbs - have_rrbs); + do_pcibr_rrb_autoalloc(pcibr_soft, slot, vchan, + min_rrbs - have_rrbs); } } if (ate_index >= pcibr_soft->bs_int_ate_size && - !pcibr_soft->bs_xbridge) { + !IS_XBRIDGE_OR_PIC_SOFT(pcibr_soft)) { bridge_t *bridge = pcibr_soft->bs_base; volatile unsigned *cmd_regp; unsigned cmd_reg; @@ -2946,27 +3369,35 @@ pcibr_dmamap->bd_flags |= PCIBR_DMAMAP_SSRAM; s = pcibr_lock(pcibr_soft); - cmd_regp = &(bridge-> - b_type0_cfg_dev[slot]. - l[PCI_CFG_COMMAND / 4]); - cmd_reg = *cmd_regp; + cmd_regp = pcibr_slot_config_addr(bridge, slot, + PCI_CFG_COMMAND/4); + if ( IS_PIC_SOFT(pcibr_soft) ) { + cmd_reg = pcibr_slot_config_get(bridge, slot, PCI_CFG_COMMAND/4); + } + else { + if (io_get_sh_swapper(NASID_GET(bridge))) { + BRIDGE_REG_SET32((&cmd_reg)) = __swab32(*cmd_regp); + } else { + cmd_reg = pcibr_slot_config_get(bridge, slot, PCI_CFG_COMMAND/4); + } + } pcibr_soft->bs_slot[slot].bss_cmd_pointer = cmd_regp; pcibr_soft->bs_slot[slot].bss_cmd_shadow = cmd_reg; pcibr_unlock(pcibr_soft, s); } return pcibr_dmamap; } -#if PCIBR_ATE_DEBUG - printk("pcibr_dmamap_alloc: unable to use PMU\n"); -#endif + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_DMAMAP, pconn_vhdl, + "pcibr_dmamap_alloc: PMU use failed, ate_index=%d\n", + ate_index)); + pcibr_ate_free(pcibr_soft, ate_index, ate_count); } /* total failure: sorry, you just can't * get from here to there that way. */ -#if PCIBR_ATE_DEBUG - printk("pcibr_dmamap_alloc: complete failure.\n"); -#endif + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_DMAMAP, pconn_vhdl, + "pcibr_dmamap_alloc: complete failure.\n")); xtalk_dmamap_free(xtalk_dmamap); free_pciio_dmamap(pcibr_dmamap); return 0; @@ -2977,7 +3408,8 @@ pcibr_dmamap_free(pcibr_dmamap_t pcibr_dmamap) { pcibr_soft_t pcibr_soft = pcibr_dmamap->bd_soft; - pciio_slot_t slot = pcibr_dmamap->bd_slot; + pciio_slot_t slot = PCIBR_SLOT_TO_DEVICE(pcibr_soft, + pcibr_dmamap->bd_slot); unsigned flags = pcibr_dmamap->bd_flags; @@ -3001,6 +3433,9 @@ pcibr_release_device(pcibr_soft, slot, BRIDGE_DEV_PMU_BITS); } + PCIBR_DEBUG((PCIBR_DEBUG_DMAMAP, pcibr_dmamap->bd_dev, + "pcibr_dmamap_free: pcibr_dmamap=0x%x\n", pcibr_dmamap)); + free_pciio_dmamap(pcibr_dmamap); } @@ -3029,15 +3464,15 @@ pci_addr = xio_addr - BRIDGE_PCI_MEM64_BASE; return pci_addr; } - for (slot = 0; slot < 8; ++slot) - if ((xio_addr >= BRIDGE_DEVIO(slot)) && - (xio_lim < BRIDGE_DEVIO(slot + 1))) { + for (slot = soft->bs_min_slot; slot < PCIBR_NUM_SLOTS(soft); ++slot) + if ((xio_addr >= PCIBR_BRIDGE_DEVIO(soft, slot)) && + (xio_lim < PCIBR_BRIDGE_DEVIO(soft, slot + 1))) { bridgereg_t dev; dev = soft->bs_slot[slot].bss_device; pci_addr = dev & BRIDGE_DEV_OFF_MASK; pci_addr <<= BRIDGE_DEV_OFF_ADDR_SHFT; - pci_addr += xio_addr - BRIDGE_DEVIO(slot); + pci_addr += xio_addr - PCIBR_BRIDGE_DEVIO(soft, slot); return (dev & BRIDGE_DEV_DEV_IO_MEM) ? pci_addr : PCI_NOWHERE; } return 0; @@ -3070,7 +3505,7 @@ } else xio_port = pcibr_dmamap->bd_xio_port; - /* If this DMA is to an address that + /* If this DMA is to an addres that * refers back to this Bridge chip, * reduce it back to the correct * PCI MEM address. @@ -3099,14 +3534,12 @@ if (flags & PCIBR_NOPREFETCH) pci_addr &= ~PCI64_ATTR_PREF; -#if DEBUG && PCIBR_DMA_DEBUG - printk("pcibr_dmamap_addr (direct64):\n" - "\twanted paddr [0x%x..0x%x]\n" - "\tXIO port 0x%x offset 0x%x\n" - "\treturning PCI 0x%x\n", - paddr, paddr + req_size - 1, - xio_port, xio_addr, pci_addr); -#endif + PCIBR_DEBUG((PCIBR_DEBUG_DMAMAP | PCIBR_DEBUG_DMADIR, + pcibr_dmamap->bd_dev, + "pcibr_dmamap_addr: (direct64): wanted paddr [0x%x..0x%x] " + "XIO port 0x%x offset 0x%x, returning PCI 0x%x\n", + paddr, paddr + req_size - 1, xio_port, xio_addr, pci_addr)); + } else if (flags & PCIIO_FIXED) { /* A32 direct DMA: * always use 32-bit direct mapping, @@ -3126,14 +3559,12 @@ pci_addr = pcibr_dmamap->bd_pci_addr + xio_addr - pcibr_dmamap->bd_xio_addr; -#if DEBUG && PCIBR_DMA_DEBUG - printk("pcibr_dmamap_addr (direct32):\n" - "\twanted paddr [0x%x..0x%x]\n" - "\tXIO port 0x%x offset 0x%x\n" - "\treturning PCI 0x%x\n", - paddr, paddr + req_size - 1, - xio_port, xio_addr, pci_addr); -#endif + PCIBR_DEBUG((PCIBR_DEBUG_DMAMAP | PCIBR_DEBUG_DMADIR, + pcibr_dmamap->bd_dev, + "pcibr_dmamap_addr (direct32): wanted paddr [0x%x..0x%x] " + "XIO port 0x%x offset 0x%x, returning PCI 0x%x\n", + paddr, paddr + req_size - 1, xio_port, xio_addr, pci_addr)); + } else { bridge_t *bridge = pcibr_soft->bs_base; iopaddr_t offset = IOPGOFF(xio_addr); @@ -3148,14 +3579,6 @@ int ate_total = ate_count; unsigned freeze_time; #endif - -#if PCIBR_ATE_DEBUG - bridge_ate_t ate_cmp; - bridge_ate_p ate_cptr; - unsigned ate_lo, ate_hi; - int ate_bad = 0; - int ate_rbc = 0; -#endif bridge_ate_p ate_ptr = pcibr_dmamap->bd_ate_ptr; bridge_ate_t ate; @@ -3183,7 +3606,21 @@ ATE_FREEZE(); ATE_WRITE(); ATE_THAW(); - bridge->b_wid_tflush; /* wait until Bridge PIO complete */ + if ( IS_PIC_SOFT(pcibr_soft) ) { + bridge->b_wid_tflush; /* wait until Bridge PIO complete */ + } + else { + if (io_get_sh_swapper(NASID_GET(bridge))) { + BRIDGE_REG_GET32((&bridge->b_wid_tflush)); + } else { + bridge->b_wid_tflush; + } + } + PCIBR_DEBUG((PCIBR_DEBUG_DMAMAP, pcibr_dmamap->bd_dev, + "pcibr_dmamap_addr (PMU) : wanted paddr " + "[0x%x..0x%x] returning PCI 0x%x\n", + paddr, paddr + req_size - 1, pci_addr)); + } else { /* The number of ATE's required is greater than the number * allocated for this map. One way this can happen is if @@ -3193,14 +3630,12 @@ * The other possibility is that the map is just plain too * small to handle the requested target area. */ -#if PCIBR_ATE_DEBUG - printk(KERN_WARNING "pcibr_dmamap_addr :\n" - "\twanted paddr [0x%x..0x%x]\n" - "\tate_count 0x%x bd_ate_count 0x%x\n" - "\tATE's required > number allocated\n", - paddr, paddr + req_size - 1, - ate_count, pcibr_dmamap->bd_ate_count); -#endif + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_DMAMAP, pcibr_dmamap->bd_dev, + "pcibr_dmamap_addr (PMU) : wanted paddr " + "[0x%x..0x%x] ate_count 0x%x bd_ate_count 0x%x " + "ATE's required > number allocated\n", + paddr, paddr + req_size - 1, + ate_count, pcibr_dmamap->bd_ate_count)); pci_addr = 0; } @@ -3250,17 +3685,24 @@ xtalk_alenlist = xtalk_dmamap_list(pcibr_dmamap->bd_xtalk, palenlist, flags & DMAMAP_FLAGS); - if (!xtalk_alenlist) + if (!xtalk_alenlist) { + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_DMAMAP, pcibr_dmamap->bd_dev, + "pcibr_dmamap_list: xtalk_dmamap_list() failed, " + "pcibr_dmamap=0x%x\n", pcibr_dmamap)); goto fail; - + } alenlist_cursor_init(xtalk_alenlist, 0, NULL); if (inplace) { pciio_alenlist = xtalk_alenlist; } else { pciio_alenlist = alenlist_create(al_flags); - if (!pciio_alenlist) + if (!pciio_alenlist) { + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_DMAMAP, pcibr_dmamap->bd_dev, + "pcibr_dmamap_list: alenlist_create() failed, " + "pcibr_dmamap=0x%lx\n", (unsigned long)pcibr_dmamap)); goto fail; + } } direct64 = pcibr_dmamap->bd_flags & PCIIO_DMA_A64; @@ -3286,8 +3728,12 @@ if (xio_port == pcibr_soft->bs_xid) { new_addr = pcibr_addr_xio_to_pci(pcibr_soft, xio_addr, length); - if (new_addr == PCI_NOWHERE) + if (new_addr == PCI_NOWHERE) { + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_DMAMAP, pcibr_dmamap->bd_dev, + "pcibr_dmamap_list: pcibr_addr_xio_to_pci failed, " + "pcibr_dmamap=0x%x\n", pcibr_dmamap)); goto fail; + } } else if (direct64) { new_addr = pci_addr | xio_addr | ((uint64_t) xio_port << PCI64_ATTR_TARG_SHFT); @@ -3318,9 +3764,8 @@ | (xio_port << ATE_TIDSHIFT) | (xio_addr - offset); if (ate == ate_prev) { -#if PCIBR_ATE_DEBUG - printk("pcibr_dmamap_list: ATE share\n"); -#endif + PCIBR_DEBUG((PCIBR_DEBUG_ATE, pcibr_dmamap->bd_dev, + "pcibr_dmamap_list: ATE share\n")); ate_ptr--; ate_index--; pci_addr -= IOPGSIZE; @@ -3335,14 +3780,13 @@ /* Ensure that this map contains enough ATE's */ if (ate_total > pcibr_dmamap->bd_ate_count) { -#if PCIBR_ATE_DEBUG - printk(KERN_WARNING "pcibr_dmamap_list :\n" - "\twanted xio_addr [0x%x..0x%x]\n" - "\tate_total 0x%x bd_ate_count 0x%x\n" - "\tATE's required > number allocated\n", - xio_addr, xio_addr + length - 1, - ate_total, pcibr_dmamap->bd_ate_count); -#endif + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_ATE, pcibr_dmamap->bd_dev, + "pcibr_dmamap_list :\n" + "\twanted xio_addr [0x%x..0x%x]\n" + "\tate_total 0x%x bd_ate_count 0x%x\n" + "\tATE's required > number allocated\n", + xio_addr, xio_addr + length - 1, + ate_total, pcibr_dmamap->bd_ate_count)); goto fail; } @@ -3362,13 +3806,22 @@ if (inplace) { if (ALENLIST_SUCCESS != alenlist_replace(pciio_alenlist, NULL, - &new_addr, &length, al_flags)) + &new_addr, &length, al_flags)) { + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_DMAMAP, pcibr_dmamap->bd_dev, + "pcibr_dmamap_list: alenlist_replace() failed, " + "pcibr_dmamap=0x%x\n", pcibr_dmamap)); + goto fail; + } } else { if (ALENLIST_SUCCESS != alenlist_append(pciio_alenlist, - new_addr, length, al_flags)) + new_addr, length, al_flags)) { + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_DMAMAP, pcibr_dmamap->bd_dev, + "pcibr_dmamap_list: alenlist_append() failed, " + "pcibr_dmamap=0x%x\n", pcibr_dmamap)); goto fail; + } } } if (!inplace) @@ -3386,8 +3839,21 @@ */ if (ate_freeze_done) { ATE_THAW(); - bridge->b_wid_tflush; /* wait until Bridge PIO complete */ + if ( IS_PIC_SOFT(pcibr_soft) ) { + bridge->b_wid_tflush; /* wait until Bridge PIO complete */ + } + else { + if (io_get_sh_swapper(NASID_GET(bridge))) { + BRIDGE_REG_GET32((&bridge->b_wid_tflush)); + } else { + bridge->b_wid_tflush; + } + } } + PCIBR_DEBUG((PCIBR_DEBUG_DMAMAP, pcibr_dmamap->bd_dev, + "pcibr_dmamap_list: pcibr_dmamap=0x%x, pciio_alenlist=0x%x\n", + pcibr_dmamap, pciio_alenlist)); + return pciio_alenlist; fail: @@ -3398,7 +3864,16 @@ */ if (ate_freeze_done) { ATE_THAW(); - bridge->b_wid_tflush; + if ( IS_PIC_SOFT(pcibr_soft) ) { + bridge->b_wid_tflush; + } + else { + if (io_get_sh_swapper(NASID_GET(bridge))) { + BRIDGE_REG_GET32((&bridge->b_wid_tflush)); + } else { + bridge->b_wid_tflush; + } + } } if (pciio_alenlist && !inplace) alenlist_destroy(pciio_alenlist); @@ -3409,6 +3884,10 @@ void pcibr_dmamap_done(pcibr_dmamap_t pcibr_dmamap) { +#ifdef PIC_LATER + pcibr_soft_t pcibr_soft = pcibr_dmamap->bd_soft; + pciio_slot_t slot = PCIBR_SLOT_TO_DEVICE(pcibr_soft, +#endif /* * We could go through and invalidate ATEs here; * for performance reasons, we don't. @@ -3423,6 +3902,9 @@ atomic_dec(&(pcibr_dmamap->bd_soft->bs_slot[pcibr_dmamap->bd_slot]. bss_ext_ates_active)); } xtalk_dmamap_done(pcibr_dmamap->bd_xtalk); + + PCIBR_DEBUG((PCIBR_DEBUG_DMAMAP, pcibr_dmamap->bd_dev, + "pcibr_dmamap_done: pcibr_dmamap=0x%x\n", pcibr_dmamap)); } @@ -3455,7 +3937,7 @@ pciio_info_t pciio_info = pciio_info_get(pconn_vhdl); pcibr_soft_t pcibr_soft = (pcibr_soft_t) pciio_info_mfast_get(pciio_info); devfs_handle_t xconn_vhdl = pcibr_soft->bs_conn; - pciio_slot_t pciio_slot = pciio_info_slot_get(pciio_info); + pciio_slot_t pciio_slot = PCIBR_INFO_SLOT_GET_INT(pciio_info); pcibr_soft_slot_t slotp = &pcibr_soft->bs_slot[pciio_slot]; xwidgetnum_t xio_port; @@ -3464,24 +3946,18 @@ int have_rrbs; int min_rrbs; + int vchan = VCHAN0; /* merge in forced flags */ flags |= pcibr_soft->bs_dma_flags; xio_addr = xtalk_dmatrans_addr(xconn_vhdl, 0, paddr, req_size, flags & DMAMAP_FLAGS); - if (!xio_addr) { -#if PCIBR_DMA_DEBUG - printk("pcibr_dmatrans_addr:\n" - "\tpciio connection point %v\n" - "\txtalk connection point %v\n" - "\twanted paddr [0x%x..0x%x]\n" - "\txtalk_dmatrans_addr returned 0x%x\n", - pconn_vhdl, xconn_vhdl, - paddr, paddr + req_size - 1, - xio_addr); -#endif + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_DMADIR, pconn_vhdl, + "pcibr_dmatrans_addr: wanted paddr [0x%x..0x%x], " + "xtalk_dmatrans_addr failed with 0x%x\n", + paddr, paddr + req_size - 1, xio_addr)); return 0; } /* @@ -3489,16 +3965,10 @@ */ if (XIO_PACKED(xio_addr)) { if (xio_addr == XIO_NOWHERE) { -#if PCIBR_DMA_DEBUG - printk("pcibr_dmatrans_addr:\n" - "\tpciio connection point %v\n" - "\txtalk connection point %v\n" - "\twanted paddr [0x%x..0x%x]\n" - "\txtalk_dmatrans_addr returned 0x%x\n", - pconn_vhdl, xconn_vhdl, - paddr, paddr + req_size - 1, - xio_addr); -#endif + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_DMADIR, pconn_vhdl, + "pcibr_dmatrans_addr: wanted paddr [0x%x..0x%x], " + "xtalk_dmatrans_addr failed with XIO_NOWHERE\n", + paddr, paddr + req_size - 1)); return 0; } xio_port = XIO_PORT(xio_addr); @@ -3516,6 +3986,10 @@ */ if (xio_port == pcibr_soft->bs_xid) { pci_addr = pcibr_addr_xio_to_pci(pcibr_soft, xio_addr, req_size); + PCIBR_DEBUG((PCIBR_DEBUG_DMADIR, pconn_vhdl, + "pcibr_dmatrans_addr: wanted paddr [0x%x..0x%x], " + "xio_port=0x%x, pci_addr=0x%x\n", + paddr, paddr + req_size - 1, xio_port, pci_addr)); return pci_addr; } /* If the caller can use A64, try to @@ -3532,82 +4006,65 @@ if ((pci_addr != PCIBR_D64_BASE_UNSET) && (flags == slotp->bss_d64_flags)) { - pci_addr |= xio_addr + pci_addr |= xio_addr | ((uint64_t) xio_port << PCI64_ATTR_TARG_SHFT); -#if DEBUG && PCIBR_DMA_DEBUG #if HWG_PERF_CHECK if (xio_addr != 0x20000000) #endif - printk("pcibr_dmatrans_addr: [reuse]\n" - "\tpciio connection point %v\n" - "\txtalk connection point %v\n" - "\twanted paddr [0x%x..0x%x]\n" - "\txtalk_dmatrans_addr returned 0x%x\n" - "\tdirect 64bit address is 0x%x\n", - pconn_vhdl, xconn_vhdl, - paddr, paddr + req_size - 1, - xio_addr, pci_addr); -#endif + PCIBR_DEBUG((PCIBR_DEBUG_DMADIR, pconn_vhdl, + "pcibr_dmatrans_addr: wanted paddr [0x%x..0x%x], " + "xio_port=0x%x, direct64: pci_addr=0x%x\n", + paddr, paddr + req_size - 1, xio_addr, pci_addr)); return (pci_addr); } if (!pcibr_try_set_device(pcibr_soft, pciio_slot, flags, BRIDGE_DEV_D64_BITS)) { pci_addr = pcibr_flags_to_d64(flags, pcibr_soft); slotp->bss_d64_flags = flags; slotp->bss_d64_base = pci_addr; - pci_addr |= xio_addr + pci_addr |= xio_addr | ((uint64_t) xio_port << PCI64_ATTR_TARG_SHFT); - /* Make sure we have an RRB (or two). + /* If in PCI mode, make sure we have an RRB (or two). */ - if (!(pcibr_soft->bs_rrb_fixed & (1 << pciio_slot))) { + if (IS_PCI(pcibr_soft) && + !(pcibr_soft->bs_rrb_fixed & (1 << pciio_slot))) { if (flags & PCIBR_VCHAN1) - pciio_slot += PCIBR_RRB_SLOT_VIRTUAL; - have_rrbs = pcibr_soft->bs_rrb_valid[pciio_slot]; + vchan = VCHAN1; + have_rrbs = pcibr_soft->bs_rrb_valid[pciio_slot][vchan]; if (have_rrbs < 2) { if (pci_addr & PCI64_ATTR_PREF) min_rrbs = 2; else min_rrbs = 1; if (have_rrbs < min_rrbs) - do_pcibr_rrb_autoalloc(pcibr_soft, pciio_slot, min_rrbs - have_rrbs); + do_pcibr_rrb_autoalloc(pcibr_soft, pciio_slot, vchan, + min_rrbs - have_rrbs); } } -#if PCIBR_DMA_DEBUG #if HWG_PERF_CHECK if (xio_addr != 0x20000000) #endif - printk("pcibr_dmatrans_addr:\n" - "\tpciio connection point %v\n" - "\txtalk connection point %v\n" - "\twanted paddr [0x%x..0x%x]\n" - "\txtalk_dmatrans_addr returned 0x%x\n" - "\tdirect 64bit address is 0x%x\n" - "\tnew flags: 0x%x\n", - pconn_vhdl, xconn_vhdl, - paddr, paddr + req_size - 1, - xio_addr, pci_addr, (uint64_t) flags); -#endif + PCIBR_DEBUG((PCIBR_DEBUG_DMADIR, pconn_vhdl, + "pcibr_dmatrans_addr: wanted paddr [0x%x..0x%x], " + "xio_port=0x%x, direct64: pci_addr=0x%x, " + "new flags: 0x%x\n", paddr, paddr + req_size - 1, + xio_addr, pci_addr, (uint64_t) flags)); return (pci_addr); } - /* our flags conflict with Device(x). - */ - flags = flags - & ~PCIIO_DMA_A64 - & ~PCIBR_VCHAN0 - ; -#if PCIBR_DMA_DEBUG - printk("pcibr_dmatrans_addr:\n" - "\tpciio connection point %v\n" - "\txtalk connection point %v\n" - "\twanted paddr [0x%x..0x%x]\n" - "\txtalk_dmatrans_addr returned 0x%x\n" - "\tUnable to set Device(x) bits for Direct-64\n", - pconn_vhdl, xconn_vhdl, - paddr, paddr + req_size - 1, - xio_addr); -#endif + PCIBR_DEBUG((PCIBR_DEBUG_DMADIR, pconn_vhdl, + "pcibr_dmatrans_addr: wanted paddr [0x%x..0x%x], " + "xio_port=0x%x, Unable to set direct64 Device(x) bits\n", + paddr, paddr + req_size - 1, xio_addr)); + + /* PIC only supports 64-bit direct mapping in PCI-X mode */ + if (IS_PCIX(pcibr_soft)) { + return 0; + } + + /* our flags conflict with Device(x). try direct32*/ + flags = flags & ~(PCIIO_DMA_A64 | PCIBR_VCHAN0); } /* Try to satisfy the request with the 32-bit direct * map. This can fail if the configuration bits in @@ -3624,17 +4081,11 @@ (xio_addr < xio_base) || (xio_port != pcibr_soft->bs_dir_xport) || (endoff > map_size)) { -#if PCIBR_DMA_DEBUG - printk("pcibr_dmatrans_addr:\n" - "\tpciio connection point %v\n" - "\txtalk connection point %v\n" - "\twanted paddr [0x%x..0x%x]\n" - "\txtalk_dmatrans_addr returned 0x%x\n" - "\txio region outside direct32 target\n", - pconn_vhdl, xconn_vhdl, - paddr, paddr + req_size - 1, - xio_addr); -#endif + + PCIBR_DEBUG((PCIBR_DEBUG_DMADIR, pconn_vhdl, + "pcibr_dmatrans_addr: wanted paddr [0x%x..0x%x], " + "xio_port=0x%x, xio region outside direct32 target\n", + paddr, paddr + req_size - 1, xio_addr)); } else { pci_addr = slotp->bss_d32_base; if ((pci_addr != PCIBR_D32_BASE_UNSET) && @@ -3642,18 +4093,11 @@ pci_addr |= offset; -#if DEBUG && PCIBR_DMA_DEBUG - printk("pcibr_dmatrans_addr: [reuse]\n" - "\tpciio connection point %v\n" - "\txtalk connection point %v\n" - "\twanted paddr [0x%x..0x%x]\n" - "\txtalk_dmatrans_addr returned 0x%x\n" - "\tmapped via direct32 offset 0x%x\n" - "\twill DMA via pci addr 0x%x\n", - pconn_vhdl, xconn_vhdl, - paddr, paddr + req_size - 1, - xio_addr, offset, pci_addr); -#endif + PCIBR_DEBUG((PCIBR_DEBUG_DMADIR, pconn_vhdl, + "pcibr_dmatrans_addr: wanted paddr [0x%x..0x%x], " + "xio_port=0x%x, direct32: pci_addr=0x%x\n", + paddr, paddr + req_size - 1, xio_addr, pci_addr)); + return (pci_addr); } if (!pcibr_try_set_device(pcibr_soft, pciio_slot, flags, BRIDGE_DEV_D32_BITS)) { @@ -3666,61 +4110,41 @@ /* Make sure we have an RRB (or two). */ if (!(pcibr_soft->bs_rrb_fixed & (1 << pciio_slot))) { - have_rrbs = pcibr_soft->bs_rrb_valid[pciio_slot]; + have_rrbs = pcibr_soft->bs_rrb_valid[pciio_slot][vchan]; if (have_rrbs < 2) { if (slotp->bss_device & BRIDGE_DEV_PREF) min_rrbs = 2; else min_rrbs = 1; if (have_rrbs < min_rrbs) - do_pcibr_rrb_autoalloc(pcibr_soft, pciio_slot, min_rrbs - have_rrbs); + do_pcibr_rrb_autoalloc(pcibr_soft, pciio_slot, + vchan, min_rrbs - have_rrbs); } } -#if PCIBR_DMA_DEBUG #if HWG_PERF_CHECK if (xio_addr != 0x20000000) #endif - printk("pcibr_dmatrans_addr:\n" - "\tpciio connection point %v\n" - "\txtalk connection point %v\n" - "\twanted paddr [0x%x..0x%x]\n" - "\txtalk_dmatrans_addr returned 0x%x\n" - "\tmapped via direct32 offset 0x%x\n" - "\twill DMA via pci addr 0x%x\n" - "\tnew flags: 0x%x\n", - pconn_vhdl, xconn_vhdl, - paddr, paddr + req_size - 1, - xio_addr, offset, pci_addr, (uint64_t) flags); -#endif + PCIBR_DEBUG((PCIBR_DEBUG_DMADIR, pconn_vhdl, + "pcibr_dmatrans_addr: wanted paddr [0x%x..0x%x], " + "xio_port=0x%x, direct32: pci_addr=0x%x, " + "new flags: 0x%x\n", paddr, paddr + req_size - 1, + xio_addr, pci_addr, (uint64_t) flags)); + return (pci_addr); } /* our flags conflict with Device(x). */ -#if PCIBR_DMA_DEBUG - printk("pcibr_dmatrans_addr:\n" - "\tpciio connection point %v\n" - "\txtalk connection point %v\n" - "\twanted paddr [0x%x..0x%x]\n" - "\txtalk_dmatrans_addr returned 0x%x\n" - "\tUnable to set Device(x) bits for Direct-32\n", - pconn_vhdl, xconn_vhdl, - paddr, paddr + req_size - 1, - xio_addr); -#endif + PCIBR_DEBUG((PCIBR_DEBUG_DMADIR, pconn_vhdl, + "pcibr_dmatrans_addr: wanted paddr [0x%x..0x%x], " + "xio_port=0x%x, Unable to set direct32 Device(x) bits\n", + paddr, paddr + req_size - 1, xio_port)); } } -#if PCIBR_DMA_DEBUG - printk("pcibr_dmatrans_addr:\n" - "\tpciio connection point %v\n" - "\txtalk connection point %v\n" - "\twanted paddr [0x%x..0x%x]\n" - "\txtalk_dmatrans_addr returned 0x%x\n" - "\tno acceptable PCI address found or constructable\n", - pconn_vhdl, xconn_vhdl, - paddr, paddr + req_size - 1, - xio_addr); -#endif + PCIBR_DEBUG((PCIBR_DEBUG_DMADIR, pconn_vhdl, + "pcibr_dmatrans_addr: wanted paddr [0x%x..0x%x], " + "xio_port=0x%x, No acceptable PCI address found\n", + paddr, paddr + req_size - 1, xio_port)); return 0; } @@ -3735,7 +4159,7 @@ pciio_info_t pciio_info = pciio_info_get(pconn_vhdl); pcibr_soft_t pcibr_soft = (pcibr_soft_t) pciio_info_mfast_get(pciio_info); devfs_handle_t xconn_vhdl = pcibr_soft->bs_conn; - pciio_slot_t pciio_slot = pciio_info_slot_get(pciio_info); + pciio_slot_t pciio_slot = PCIBR_INFO_SLOT_GET_INT(pciio_info); pcibr_soft_slot_t slotp = &pcibr_soft->bs_slot[pciio_slot]; xwidgetnum_t xio_port; @@ -3772,6 +4196,9 @@ /* reuse previous base info */ } else if (pcibr_try_set_device(pcibr_soft, pciio_slot, flags, BRIDGE_DEV_D64_BITS) < 0) { /* DMA configuration conflict */ + PCIBR_DEBUG((PCIBR_DEBUG_DMADIR, pconn_vhdl, + "pcibr_dmatrans_list: DMA configuration conflict " + "for direct64, flags=0x%x\n", flags)); goto fail; } else { relbits = BRIDGE_DEV_D64_BITS; @@ -3787,6 +4214,9 @@ /* reuse previous base info */ } else if (pcibr_try_set_device(pcibr_soft, pciio_slot, flags, BRIDGE_DEV_D32_BITS) < 0) { /* DMA configuration conflict */ + PCIBR_DEBUG((PCIBR_DEBUG_DMADIR, pconn_vhdl, + "pcibr_dmatrans_list: DMA configuration conflict " + "for direct32, flags=0x%x\n", flags)); goto fail; } else { relbits = BRIDGE_DEV_D32_BITS; @@ -3796,8 +4226,12 @@ xtalk_alenlist = xtalk_dmatrans_list(xconn_vhdl, 0, palenlist, flags & DMAMAP_FLAGS); - if (!xtalk_alenlist) + if (!xtalk_alenlist) { + PCIBR_DEBUG((PCIBR_DEBUG_DMADIR, pconn_vhdl, + "pcibr_dmatrans_list: xtalk_dmatrans_list failed " + "xtalk_alenlist=0x%x\n", xtalk_alenlist)); goto fail; + } alenlist_cursor_init(xtalk_alenlist, 0, NULL); @@ -3805,8 +4239,12 @@ pciio_alenlist = xtalk_alenlist; } else { pciio_alenlist = alenlist_create(al_flags); - if (!pciio_alenlist) + if (!pciio_alenlist) { + PCIBR_DEBUG((PCIBR_DEBUG_DMADIR, pconn_vhdl, + "pcibr_dmatrans_list: alenlist_create failed with " + " 0x%x\n", pciio_alenlist)); goto fail; + } } while (ALENLIST_SUCCESS == @@ -3818,16 +4256,8 @@ */ if (XIO_PACKED(xio_addr)) { if (xio_addr == XIO_NOWHERE) { -#if PCIBR_DMA_DEBUG - printk("pcibr_dmatrans_addr:\n" - "\tpciio connection point %v\n" - "\txtalk connection point %v\n" - "\twanted paddr [0x%x..0x%x]\n" - "\txtalk_dmatrans_addr returned 0x%x\n", - pconn_vhdl, xconn_vhdl, - paddr, paddr + req_size - 1, - xio_addr); -#endif + PCIBR_DEBUG((PCIBR_DEBUG_DMADIR, pconn_vhdl, + "pcibr_dmatrans_list: xio_addr == XIO_NOWHERE\n")); return 0; } xio_port = XIO_PORT(xio_addr); @@ -3844,8 +4274,12 @@ */ if (xio_port == pcibr_soft->bs_xid) { pci_addr = pcibr_addr_xio_to_pci(pcibr_soft, xio_addr, xio_size); - if ( (pci_addr == (alenaddr_t)NULL) ) + if (pci_addr == (alenaddr_t)NULL) { + PCIBR_DEBUG((PCIBR_DEBUG_DMADIR, pconn_vhdl, + "pcibr_dmatrans_list: pcibr_addr_xio_to_pci failed " + "xio_addr=0x%x, xio_size=0x%x\n", xio_addr, xio_size)); goto fail; + } } else if (direct64) { ASSERT(xio_port != 0); pci_addr = pci_base | xio_addr @@ -3857,8 +4291,14 @@ if ((xio_size > map_size) || (xio_addr < xio_base) || (xio_port != pcibr_soft->bs_dir_xport) || - (endoff > map_size)) + (endoff > map_size)) { + PCIBR_DEBUG((PCIBR_DEBUG_DMADIR, pconn_vhdl, + "pcibr_dmatrans_list: xio_size > map_size fail\n" + "xio_addr=0x%x, xio_size=0x%x. map_size=0x%x, " + "xio_port=0x%x, endoff=0x%x\n", + xio_addr, xio_size, map_size, xio_port, endoff)); goto fail; + } pci_addr = pci_base + (xio_addr - xio_base); } @@ -3869,13 +4309,19 @@ if (inplace) { if (ALENLIST_SUCCESS != alenlist_replace(pciio_alenlist, NULL, - &pci_addr, &xio_size, al_flags)) + &pci_addr, &xio_size, al_flags)) { + PCIBR_DEBUG((PCIBR_DEBUG_DMADIR, pconn_vhdl, + "pcibr_dmatrans_list: alenlist_replace failed\n")); goto fail; + } } else { if (ALENLIST_SUCCESS != alenlist_append(pciio_alenlist, - pci_addr, xio_size, al_flags)) + pci_addr, xio_size, al_flags)) { + PCIBR_DEBUG((PCIBR_DEBUG_DMADIR, pconn_vhdl, + "pcibr_dmatrans_list: alenlist_append failed\n")); goto fail; + } } } @@ -3895,6 +4341,11 @@ * to the caller. */ alenlist_cursor_init(pciio_alenlist, 0, NULL); + + PCIBR_DEBUG((PCIBR_DEBUG_DMADIR, pconn_vhdl, + "pcibr_dmatrans_list: pciio_alenlist=0x%x\n", + pciio_alenlist)); + return pciio_alenlist; fail: @@ -3964,8 +4415,9 @@ int pcibr_reset(devfs_handle_t conn) { +#ifdef PIC_LATER pciio_info_t pciio_info = pciio_info_get(conn); - pciio_slot_t pciio_slot = pciio_info_slot_get(pciio_info); + pciio_slot_t pciio_slot = PCIBR_INFO_SLOT_GET_INT(pciio_info); pcibr_soft_t pcibr_soft = (pcibr_soft_t) pciio_info_mfast_get(pciio_info); bridge_t *bridge = pcibr_soft->bs_base; bridgereg_t ctlreg; @@ -3975,42 +4427,59 @@ pcibr_info_h pcibr_infoh; pcibr_info_t pcibr_info; int win; + int error = 0; +#endif /* PIC_LATER */ + BUG(); +#ifdef PIC_LATER if (pcibr_soft->bs_slot[pciio_slot].has_host) { pciio_slot = pcibr_soft->bs_slot[pciio_slot].host_slot; pcibr_info = pcibr_soft->bs_slot[pciio_slot].bss_infos[0]; } - if (pciio_slot < 4) { + + if ((pciio_slot >= pcibr_soft->bs_first_slot) && + (pciio_slot <= pcibr_soft->bs_last_reset)) { s = pcibr_lock(pcibr_soft); nf = pcibr_soft->bs_slot[pciio_slot].bss_ninfo; pcibr_infoh = pcibr_soft->bs_slot[pciio_slot].bss_infos; for (f = 0; f < nf; ++f) if (pcibr_infoh[f]) - cfgctl[f] = bridge->b_type0_cfg_dev[pciio_slot].f[f].l[PCI_CFG_COMMAND / 4]; + cfgctl[f] = pcibr_func_config_get(bridge, pciio_slot, f, + PCI_CFG_COMMAND/4); + + error = iobrick_pci_slot_rst(pcibr_soft->bs_l1sc, + pcibr_widget_to_bus(pcibr_soft->bs_vhdl), + PCIBR_DEVICE_TO_SLOT(pcibr_soft,pciio_slot), + NULL); ctlreg = bridge->b_wid_control; - bridge->b_wid_control = ctlreg | BRIDGE_CTRL_RST(pciio_slot); - /* XXX delay? */ - bridge->b_wid_control = ctlreg; - /* XXX delay? */ + bridge->b_wid_control = ctlreg & ~BRIDGE_CTRL_RST_PIN(pciio_slot); + nano_delay(&ts); + bridge->b_wid_control = ctlreg | BRIDGE_CTRL_RST_PIN(pciio_slot); + nano_delay(&ts); for (f = 0; f < nf; ++f) if ((pcibr_info = pcibr_infoh[f])) for (win = 0; win < 6; ++win) if (pcibr_info->f_window[win].w_base != 0) - bridge->b_type0_cfg_dev[pciio_slot].f[f].l[PCI_CFG_BASE_ADDR(win) / 4] = - pcibr_info->f_window[win].w_base; + pcibr_func_config_set(bridge, pciio_slot, f, + PCI_CFG_BASE_ADDR(win) / 4, + pcibr_info->f_window[win].w_base); for (f = 0; f < nf; ++f) if (pcibr_infoh[f]) - bridge->b_type0_cfg_dev[pciio_slot].f[f].l[PCI_CFG_COMMAND / 4] = cfgctl[f]; + pcibr_func_config_set(bridge, pciio_slot, f, + PCI_CFG_COMMAND / 4, + cfgctl[f]); pcibr_unlock(pcibr_soft, s); + if (error) + return(-1); + return 0; } -#ifdef SUPPORT_PRINTING_V_FORMAT - printk(KERN_WARNING "%v: pcibr_reset unimplemented for slot %d\n", - conn, pciio_slot); -#endif + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_DETACH, conn, + "pcibr_reset unimplemented for slot %d\n", conn, pciio_slot)); +#endif /* PIC_LATER */ return -1; } @@ -4020,7 +4489,7 @@ pciio_endian_t desired_end) { pciio_info_t pciio_info = pciio_info_get(pconn_vhdl); - pciio_slot_t pciio_slot = pciio_info_slot_get(pciio_info); + pciio_slot_t pciio_slot = PCIBR_INFO_SLOT_GET_INT(pciio_info); pcibr_soft_t pcibr_soft = (pcibr_soft_t) pciio_info_mfast_get(pciio_info); bridgereg_t devreg; unsigned long s; @@ -4044,16 +4513,32 @@ if (pcibr_soft->bs_slot[pciio_slot].bss_device != devreg) { bridge_t *bridge = pcibr_soft->bs_base; - bridge->b_device[pciio_slot].reg = devreg; - pcibr_soft->bs_slot[pciio_slot].bss_device = devreg; - bridge->b_wid_tflush; /* wait until Bridge PIO complete */ + if ( IS_PIC_SOFT(pcibr_soft) ) { + bridge->b_device[pciio_slot].reg = devreg; + pcibr_soft->bs_slot[pciio_slot].bss_device = devreg; + bridge->b_wid_tflush; /* wait until Bridge PIO complete */ + } + else { + if (io_get_sh_swapper(NASID_GET(bridge))) { + BRIDGE_REG_SET32((&bridge->b_device[pciio_slot].reg)) = __swab32(devreg); + pcibr_soft->bs_slot[pciio_slot].bss_device = devreg; + BRIDGE_REG_GET32((&bridge->b_wid_tflush));/* wait until Bridge PIO complete */ + } else { + bridge->b_device[pciio_slot].reg = devreg; + pcibr_soft->bs_slot[pciio_slot].bss_device = devreg; + bridge->b_wid_tflush; /* wait until Bridge PIO complete */ + } + } } pcibr_unlock(pcibr_soft, s); -#if DEBUG && PCIBR_DEV_DEBUG - printk("pcibr Device(%d): 0x%p\n", pciio_slot, bridge->b_device[pciio_slot].reg); +#ifdef PIC_LATER + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_DEVREG, pconn_vhdl, + "pcibr_endian_set: Device(%d): %x\n", + pciio_slot, devreg, device_bits)); +#else + printk("pcibr_endian_set: Device(%d): %x\n", pciio_slot, devreg); #endif - return desired_end; } @@ -4121,9 +4606,22 @@ if (pcibr_soft->bs_slot[pciio_slot].bss_device != devreg) { bridge_t *bridge = pcibr_soft->bs_base; - bridge->b_device[pciio_slot].reg = devreg; - pcibr_soft->bs_slot[pciio_slot].bss_device = devreg; - bridge->b_wid_tflush; /* wait until Bridge PIO complete */ + if ( IS_PIC_SOFT(pcibr_soft) ) { + bridge->b_device[pciio_slot].reg = devreg; + pcibr_soft->bs_slot[pciio_slot].bss_device = devreg; + bridge->b_wid_tflush; /* wait until Bridge PIO complete */ + } + else { + if (io_get_sh_swapper(NASID_GET(bridge))) { + BRIDGE_REG_SET32((&bridge->b_device[pciio_slot].reg)) = __swab32(devreg); + pcibr_soft->bs_slot[pciio_slot].bss_device = devreg; + BRIDGE_REG_GET32((&bridge->b_wid_tflush));/* wait until Bridge PIO complete */ + } else { + bridge->b_device[pciio_slot].reg = devreg; + pcibr_soft->bs_slot[pciio_slot].bss_device = devreg; + bridge->b_wid_tflush; /* wait until Bridge PIO complete */ + } + } } pcibr_unlock(pcibr_soft, s); @@ -4135,7 +4633,7 @@ pciio_priority_t device_prio) { pciio_info_t pciio_info = pciio_info_get(pconn_vhdl); - pciio_slot_t pciio_slot = pciio_info_slot_get(pciio_info); + pciio_slot_t pciio_slot = PCIBR_INFO_SLOT_GET_INT(pciio_info); pcibr_soft_t pcibr_soft = (pcibr_soft_t) pciio_info_mfast_get(pciio_info); (void) pcibr_priority_bits_set(pcibr_soft, pciio_slot, device_prio); @@ -4159,7 +4657,7 @@ pcibr_device_flags_t flags) { pciio_info_t pciio_info = pciio_info_get(pconn_vhdl); - pciio_slot_t pciio_slot = pciio_info_slot_get(pciio_info); + pciio_slot_t pciio_slot = PCIBR_INFO_SLOT_GET_INT(pciio_info); pcibr_soft_t pcibr_soft = (pcibr_soft_t) pciio_info_mfast_get(pciio_info); bridgereg_t set = 0; bridgereg_t clr = 0; @@ -4206,18 +4704,81 @@ if (pcibr_soft->bs_slot[pciio_slot].bss_device != devreg) { bridge_t *bridge = pcibr_soft->bs_base; - bridge->b_device[pciio_slot].reg = devreg; - pcibr_soft->bs_slot[pciio_slot].bss_device = devreg; - bridge->b_wid_tflush; /* wait until Bridge PIO complete */ + if ( IS_PIC_SOFT(pcibr_soft) ) { + bridge->b_device[pciio_slot].reg = devreg; + pcibr_soft->bs_slot[pciio_slot].bss_device = devreg; + bridge->b_wid_tflush; /* wait until Bridge PIO complete */ + } + else { + if (io_get_sh_swapper(NASID_GET(bridge))) { + BRIDGE_REG_SET32((&bridge->b_device[pciio_slot].reg)) = __swab32(devreg); + pcibr_soft->bs_slot[pciio_slot].bss_device = devreg; + BRIDGE_REG_GET32((&bridge->b_wid_tflush));/* wait until Bridge PIO complete */ + } else { + bridge->b_device[pciio_slot].reg = devreg; + pcibr_soft->bs_slot[pciio_slot].bss_device = devreg; + bridge->b_wid_tflush; /* wait until Bridge PIO complete */ + } + } } pcibr_unlock(pcibr_soft, s); -#if DEBUG && PCIBR_DEV_DEBUG - printk("pcibr Device(%d): %R\n", pciio_slot, bridge->b_device[pciio_slot].regbridge->b_device[pciio_slot].reg, device_bits); +#ifdef PIC_LATER + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_DEVREG, pconn_vhdl, + "pcibr_device_flags_set: Device(%d): %x\n", + pciio_slot, devreg, device_bits)); +#else + printk("pcibr_device_flags_set: Device(%d): %x\n", pciio_slot, devreg); #endif } return (1); } +/* + * PIC has 16 RBARs per bus; meaning it can have a total of 16 outstanding + * split transactions. If the functions on the bus have requested a total + * of 16 or less, then we can give them what they requested (ie. 100%). + * Otherwise we have make sure each function can get at least one buffer + * and then divide the rest of the buffers up among the functions as ``A + * PERCENTAGE OF WHAT THEY REQUESTED'' (i.e. 0% - 100% of a function's + * pcix_type0_status.max_out_split). This percentage does not include the + * one RBAR that all functions get by default. + */ +int +pcibr_pcix_rbars_calc(pcibr_soft_t pcibr_soft) +{ + /* 'percent_allowed' is the percentage of requested RBARs that functions + * are allowed, ***less the 1 RBAR that all functions get by default*** + */ + int percent_allowed; + + if (pcibr_soft->bs_pcix_num_funcs) { + if (pcibr_soft->bs_pcix_num_funcs > NUM_RBAR) { + printk(KERN_WARNING + "%lx: Must oversubscribe Read Buffer Attribute Registers" + "(RBAR). Bus has %d RBARs but %d funcs need them.\n", + (unsigned long)pcibr_soft->bs_vhdl, NUM_RBAR, pcibr_soft->bs_pcix_num_funcs); + percent_allowed = 0; + } else { + percent_allowed = (((NUM_RBAR-pcibr_soft->bs_pcix_num_funcs)*100) / + pcibr_soft->bs_pcix_split_tot); + + /* +1 to percentage to solve rounding errors that occur because + * we're not doing fractional math. (ie. ((3 * 66%) / 100) = 1) + * but should be "2" if doing true fractional math. NOTE: Since + * the greatest number of outstanding transactions a function + * can request is 32, this "+1" will always work (i.e. we won't + * accidentally oversubscribe the RBARs because of this rounding + * of the percentage). + */ + percent_allowed=(percent_allowed > 100) ? 100 : percent_allowed+1; + } + } else { + return(ENODEV); + } + + return(percent_allowed); +} + pciio_provider_t pcibr_provider = { (pciio_piomap_alloc_f *) pcibr_piomap_alloc, @@ -4253,17 +4814,17 @@ (pciio_priority_set_f *) pcibr_priority_set, (pciio_config_get_f *) pcibr_config_get, (pciio_config_set_f *) pcibr_config_set, - - (pciio_error_devenable_f *) 0, - (pciio_error_extract_f *) 0, - -#ifdef LATER +#ifdef PIC_LATER + (pciio_error_devenable_f *) pcibr_error_devenable, + (pciio_error_extract_f *) pcibr_error_extract, (pciio_driver_reg_callback_f *) pcibr_driver_reg_callback, (pciio_driver_unreg_callback_f *) pcibr_driver_unreg_callback, #else + (pciio_error_devenable_f *) 0, + (pciio_error_extract_f *) 0, (pciio_driver_reg_callback_f *) 0, (pciio_driver_unreg_callback_f *) 0, -#endif +#endif /* PIC_LATER */ (pciio_device_unregister_f *) pcibr_device_unregister, (pciio_dma_enabled_f *) pcibr_dma_enabled, }; @@ -4276,4 +4837,84 @@ return xtalk_dma_enabled(pcibr_soft->bs_conn); +} + + +/* + * pcibr_debug() is used to print pcibr debug messages to the console. A + * user enables tracing by setting the following global variables: + * + * pcibr_debug_mask -Bitmask of what to trace. see pcibr_private.h + * pcibr_debug_module -Module to trace. 'all' means trace all modules + * pcibr_debug_widget -Widget to trace. '-1' means trace all widgets + * pcibr_debug_slot -Slot to trace. '-1' means trace all slots + * + * 'type' is the type of debugging that the current PCIBR_DEBUG macro is + * tracing. 'vhdl' (which can be NULL) is the vhdl associated with the + * debug statement. If there is a 'vhdl' associated with this debug + * statement, it is parsed to obtain the module, widget, and slot. If the + * globals above match the PCIBR_DEBUG params, then the debug info in the + * parameter 'format' is sent to the console. + */ +void +pcibr_debug(uint32_t type, devfs_handle_t vhdl, char *format, ...) +{ + char hwpath[MAXDEVNAME] = "\0"; + char copy_of_hwpath[MAXDEVNAME]; + char *module = "all"; + short widget = -1; + short slot = -1; + va_list ap; + char *strtok_r(char *string, const char *sepset, char **lasts); + + if (pcibr_debug_mask & type) { + if (vhdl) { + if (!hwgraph_vertex_name_get(vhdl, hwpath, MAXDEVNAME)) { + char *cp; + + if (strcmp(module, pcibr_debug_module)) { + /* strtok_r() wipes out string, use a copy */ + (void)strcpy(copy_of_hwpath, hwpath); + cp = strstr(copy_of_hwpath, "/module/"); + if (cp) { + char *last = NULL; + cp += strlen("/module"); + module = strtok_r(cp, "/", &last); + } + } + if (pcibr_debug_widget != -1) { + cp = strstr(hwpath, "/xtalk/"); + if (cp) { + cp += strlen("/xtalk/"); + widget = atoi(cp); + } + } + if (pcibr_debug_slot != -1) { + cp = strstr(hwpath, "/pci/"); + if (cp) { + cp += strlen("/pci/"); + slot = atoi(cp); + } + } + } + } + if ((vhdl == NULL) || + (!strcmp(module, pcibr_debug_module) && + (widget == pcibr_debug_widget) && + (slot == pcibr_debug_slot))) { +#ifdef LATER + printk("PCIBR_DEBUG<%d>\t: %s :", cpuid(), hwpath); +#else + printk("PCIBR_DEBUG\t: %s :", hwpath); +#endif + /* + * Kernel printk translates to this 3 line sequence. + * Since we have a variable length argument list, we + * need to call printk this way rather than directly + */ + va_start(ap, format); + printk(format, ap); + va_end(ap); + } + } } diff -Nru a/arch/ia64/sn/io/sn2/pcibr/pcibr_error.c b/arch/ia64/sn/io/sn2/pcibr/pcibr_error.c --- a/arch/ia64/sn/io/sn2/pcibr/pcibr_error.c Mon Dec 23 21:21:50 2002 +++ b/arch/ia64/sn/io/sn2/pcibr/pcibr_error.c Mon Dec 23 21:21:50 2002 @@ -39,6 +39,14 @@ #endif extern int hubii_check_widget_disabled(nasid_t, int); +#ifdef BRIDGE_B_DATACORR_WAR +extern int ql_bridge_rev_b_war(devfs_handle_t); +extern int bridge_rev_b_data_check_disable; +char *rev_b_datacorr_warning = +"***************************** WARNING! ******************************\n"; +char *rev_b_datacorr_mesg = +"UNRECOVERABLE IO LINK ERROR. CONTACT SERVICE PROVIDER\n"; +#endif /* ===================================================================== * ERROR HANDLING @@ -54,15 +62,18 @@ #define BRIDGE_PIOERR_TIMEOUT 1 /* Timeout in non-debug mode */ #endif +/* PIC has 64bit interrupt error registers, but BRIDGE has 32bit registers. + * Thus 'bridge_errors_to_dump needs' to default to the larger of the two. + */ #ifdef DEBUG #ifdef ERROR_DEBUG -bridgereg_t bridge_errors_to_dump = ~BRIDGE_ISR_INT_MSK; +uint64_t bridge_errors_to_dump = ~BRIDGE_ISR_INT_MSK; #else -bridgereg_t bridge_errors_to_dump = BRIDGE_ISR_ERROR_DUMP; +uint64_t bridge_errors_to_dump = BRIDGE_ISR_ERROR_DUMP; #endif #else -bridgereg_t bridge_errors_to_dump = BRIDGE_ISR_ERROR_FATAL | - BRIDGE_ISR_PCIBUS_PIOERR; +uint64_t bridge_errors_to_dump = BRIDGE_ISR_ERROR_FATAL | + BRIDGE_ISR_PCIBUS_PIOERR; #endif #if defined (PCIBR_LLP_CONTROL_WAR) @@ -71,8 +82,6 @@ /* FIXME: can these arrays be local ? */ -#ifdef LATER - struct reg_values xio_cmd_pactyp[] = { {0x0, "RdReq"}, @@ -113,7 +122,21 @@ struct reg_desc bridge_int_status_desc[] = { - F(31, "MULTI_ERR"), + F(45, "PCI_X_SPLIT_MES_PE"),/* PIC ONLY */ + F(44, "PCI_X_SPLIT_EMES"), /* PIC ONLY */ + F(43, "PCI_X_SPLIT_TO"), /* PIC ONLY */ + F(42, "PCI_X_UNEX_COMP"), /* PIC ONLY */ + F(41, "INT_RAM_PERR"), /* PIC ONLY */ + F(40, "PCI_X_ARB_ERR"), /* PIC ONLY */ + F(39, "PCI_X_REQ_TOUT"), /* PIC ONLY */ + F(38, "PCI_X_TABORT"), /* PIC ONLY */ + F(37, "PCI_X_PERR"), /* PIC ONLY */ + F(36, "PCI_X_SERR"), /* PIC ONLY */ + F(35, "PCI_X_MRETRY"), /* PIC ONLY */ + F(34, "PCI_X_MTOUT"), /* PIC ONLY */ + F(33, "PCI_X_DA_PARITY"), /* PIC ONLY */ + F(32, "PCI_X_AD_PARITY"), /* PIC ONLY */ + F(31, "MULTI_ERR"), /* BRIDGE ONLY */ F(30, "PMU_ESIZE_EFAULT"), F(29, "UNEXPECTED_RESP"), F(28, "BAD_XRESP_PACKET"), @@ -128,7 +151,7 @@ F(19, "LLP_RCTY"), F(18, "LLP_TX_RETRY"), F(17, "LLP_TCTY"), - F(16, "SSRAM_PERR"), + F(16, "SSRAM_PERR"), /* BRIDGE ONLY */ F(15, "PCI_ABORT"), F(14, "PCI_PARITY"), F(13, "PCI_SERR"), @@ -136,7 +159,7 @@ F(11, "PCI_MASTER_TOUT"), F(10, "PCI_RETRY_CNT"), F(9, "XREAD_REQ_TOUT"), - F(8, "GIO_BENABLE_ERR"), + F(8, "GIO_BENABLE_ERR"), /* BRIDGE ONLY */ F(7, "INT7"), F(6, "INT6"), F(5, "INT5"), @@ -195,20 +218,17 @@ {0} }; -#endif /* LATER */ - void print_bridge_errcmd(uint32_t cmdword, char *errtype) { - printk( - "\t Bridge %s Error Command Word Register %R\n", - errtype, cmdword, xio_cmd_bits); + printk("\t Bridge %s Error Command Word Register ", errtype); + print_register(cmdword, xio_cmd_bits); } char *pcibr_isr_errs[] = { "", "", "", "", "", "", "", "", - "08: GIO non-contiguous byte enable in crosstalk packet", + "08: GIO non-contiguous byte enable in crosstalk packet", /* BRIDGE ONLY */ "09: PCI to Crosstalk read request timeout", "10: PCI retry operation count exhausted.", "11: PCI bus device select timeout", @@ -216,7 +236,7 @@ "13: PCI Address/Cmd parity error ", "14: PCI Bridge detected parity error", "15: PCI abort condition", - "16: SSRAM parity error", + "16: SSRAM parity error", /* BRIDGE ONLY */ "17: LLP Transmitter Retry count wrapped", "18: LLP Transmitter side required Retry", "19: LLP Receiver retry count wrapped", @@ -231,13 +251,29 @@ "28: Framing error, response cmd data size does not match actual", "29: Unexpected response arrived", "30: PMU Access Fault", - "31: Multiple errors occurred", + "31: Multiple errors occurred", /* BRIDGE ONLY */ + + /* bits 32-45 are PIC ONLY */ + "32: PCI-X address or attribute cycle parity error", + "33: PCI-X data cycle parity error", + "34: PCI-X master timeout (ie. master abort)", + "35: PCI-X pio retry counter exhausted", + "36: PCI-X SERR", + "37: PCI-X PERR", + "38: PCI-X target abort", + "39: PCI-X read request timeout", + "40: PCI / PCI-X device requestin arbitration error", + "41: internal RAM parity error", + "42: PCI-X unexpected completion cycle to master", + "43: PCI-X split completion timeout", + "44: PCI-X split completion error message", + "45: PCI-X split completion message parity error", }; #define BEM_ADD_STR(s) printk("%s", (s)) -#define BEM_ADD_VAR(v) printk("\t%20s: 0x%x\n", #v, (v)) -#define BEM_ADD_REG(r) printk("\t%20s: %R\n", #r, (r), r ## _desc) -#define BEM_ADD_NSPC(n,s) printk("\t%20s: %R\n", n, s, space_desc) +#define BEM_ADD_VAR(v) printk("\t%20s: 0x%llx\n", #v, ((unsigned long long)v)) +#define BEM_ADD_REG(r) printk("\t%20s: ", #r); print_register((r), r ## _desc) +#define BEM_ADD_NSPC(n,s) printk("\t%20s: ", n); print_register(s, space_desc) #define BEM_ADD_SPC(s) BEM_ADD_NSPC(#s, s) /* @@ -246,6 +282,7 @@ void pcibr_show_dir_state(paddr_t paddr, char *prefix) { +#ifdef LATER int state; uint64_t vec_ptr; hubreg_t elo; @@ -254,8 +291,9 @@ get_dir_ent(paddr, &state, &vec_ptr, &elo); - printf("%saddr 0x%x: state 0x%x owner 0x%x (%s)\n", + printk("%saddr 0x%lx: state 0x%x owner 0x%lx (%s)\n", prefix, paddr, state, vec_ptr, dir_state_str[state]); +#endif } @@ -267,40 +305,70 @@ pcibr_error_dump(pcibr_soft_t pcibr_soft) { bridge_t *bridge = pcibr_soft->bs_base; - bridgereg_t int_status; - bridgereg_t mult_int; - int bit; + uint64_t int_status; + bridgereg_t int_status_32; + picreg_t int_status_64; + uint64_t mult_int; + bridgereg_t mult_int_32; + picreg_t mult_int_64; + uint64_t bit; + int number_bits; int i; char *reg_desc; - paddr_t addr; + paddr_t addr = (paddr_t)0; + + /* We read the INT_STATUS register as a 64bit picreg_t for PIC and a + * 32bit bridgereg_t for BRIDGE, but always process the result as a + * 64bit value so the code can be "common" for both PIC and BRIDGE... + */ + if (IS_PIC_SOFT(pcibr_soft)) { + int_status_64 = (bridge->p_int_status_64 & ~BRIDGE_ISR_INT_MSK); + int_status = (uint64_t)int_status_64; + number_bits = PCIBR_ISR_MAX_ERRS_PIC; + } else { + int_status_32 = (bridge->b_int_status & ~BRIDGE_ISR_INT_MSK); + int_status = ((uint64_t)int_status_32) & 0xffffffff; + number_bits = PCIBR_ISR_MAX_ERRS_BRIDGE; + } - int_status = (bridge->b_int_status & ~BRIDGE_ISR_INT_MSK); if (!int_status) { /* No error bits set */ return; } /* Check if dumping the same error information multiple times */ - if (test_and_set_int((int *) &pcibr_soft->bs_errinfo.bserr_intstat, - int_status) == int_status) { + if ( pcibr_soft->bs_errinfo.bserr_intstat == int_status ) return; - } + pcibr_soft->bs_errinfo.bserr_intstat = int_status; - printk(KERN_ALERT "PCI BRIDGE ERROR: int_status is 0x%X for %s\n" - " Dumping relevant %sBridge registers for each bit set...\n", + printk(KERN_ALERT "PCI BRIDGE ERROR: int_status is 0x%lx for %s\n" + " Dumping relevant %s registers for each bit set...\n", int_status, pcibr_soft->bs_name, - (is_xbridge(bridge) ? "X" : "")); + (IS_PIC_SOFT(pcibr_soft) ? "PIC" : + (IS_BRIDGE_SOFT(pcibr_soft) ? "BRIDGE" : "XBRIDGE"))); - for (i = PCIBR_ISR_ERR_START; i < PCIBR_ISR_MAX_ERRS; i++) { - bit = 1 << i; + for (i = PCIBR_ISR_ERR_START; i < number_bits; i++) { + bit = 1ull << i; /* * A number of int_status bits are only defined for Bridge. - * Ignore them in the case of an XBridge. + * Ignore them in the case of an XBridge or PIC. */ - if (is_xbridge(bridge) && ((bit == BRIDGE_ISR_MULTI_ERR) || - (bit == BRIDGE_ISR_SSRAM_PERR) || - (bit == BRIDGE_ISR_GIO_B_ENBL_ERR))) { + if ((IS_XBRIDGE_SOFT(pcibr_soft) || IS_PIC_SOFT(pcibr_soft)) && + ((bit == BRIDGE_ISR_MULTI_ERR) || + (bit == BRIDGE_ISR_SSRAM_PERR) || + (bit == BRIDGE_ISR_GIO_B_ENBL_ERR))) { + continue; + } + + /* A number of int_status bits are only valid for PIC's bus0 */ + if ((IS_PIC_SOFT(pcibr_soft) && (pcibr_soft->bs_busnum != 0)) && + ((bit == BRIDGE_ISR_UNSUPPORTED_XOP) || + (bit == BRIDGE_ISR_LLP_REC_SNERR) || + (bit == BRIDGE_ISR_LLP_REC_CBERR) || + (bit == BRIDGE_ISR_LLP_RCTY) || + (bit == BRIDGE_ISR_LLP_TX_RETRY) || + (bit == BRIDGE_ISR_LLP_TCTY))) { continue; } @@ -308,91 +376,241 @@ printk("\t%s\n", pcibr_isr_errs[i]); switch (bit) { - case BRIDGE_ISR_PAGE_FAULT: /* PMU_PAGE_FAULT (XBridge) */ -/* case BRIDGE_ISR_PMU_ESIZE_FAULT: PMU_ESIZE_FAULT (Bridge) */ - if (is_xbridge(bridge)) + + case PIC_ISR_INT_RAM_PERR: /* bit41 INT_RAM_PERR */ + /* XXX: should breakdown meaning of bits in reg */ + printk( "\t Internal RAM Parity Error: 0x%lx\n", + bridge->p_ate_parity_err_64); + break; + + case PIC_ISR_PCIX_ARB_ERR: /* bit40 PCI_X_ARB_ERR */ + /* XXX: should breakdown meaning of bits in reg */ + printk( "\t Arbitration Reg: 0x%x\n", + bridge->b_arb); + break; + + case PIC_ISR_PCIX_REQ_TOUT: /* bit39 PCI_X_REQ_TOUT */ + /* XXX: should breakdown meaning of attribute bit */ + printk( + "\t PCI-X DMA Request Error Address Reg: 0x%lx\n" + "\t PCI-X DMA Request Error Attribute Reg: 0x%lx\n", + bridge->p_pcix_dma_req_err_addr_64, + bridge->p_pcix_dma_req_err_attr_64); + break; + + case PIC_ISR_PCIX_SPLIT_MSG_PE: /* bit45 PCI_X_SPLIT_MES_PE */ + case PIC_ISR_PCIX_SPLIT_EMSG: /* bit44 PCI_X_SPLIT_EMESS */ + case PIC_ISR_PCIX_SPLIT_TO: /* bit43 PCI_X_SPLIT_TO */ + /* XXX: should breakdown meaning of attribute bit */ + printk( + "\t PCI-X Split Request Address Reg: 0x%lx\n" + "\t PCI-X Split Request Attribute Reg: 0x%lx\n", + bridge->p_pcix_pio_split_addr_64, + bridge->p_pcix_pio_split_attr_64); + /* FALL THRU */ + + case PIC_ISR_PCIX_UNEX_COMP: /* bit42 PCI_X_UNEX_COMP */ + case PIC_ISR_PCIX_TABORT: /* bit38 PCI_X_TABORT */ + case PIC_ISR_PCIX_PERR: /* bit37 PCI_X_PERR */ + case PIC_ISR_PCIX_SERR: /* bit36 PCI_X_SERR */ + case PIC_ISR_PCIX_MRETRY: /* bit35 PCI_X_MRETRY */ + case PIC_ISR_PCIX_MTOUT: /* bit34 PCI_X_MTOUT */ + case PIC_ISR_PCIX_DA_PARITY: /* bit33 PCI_X_DA_PARITY */ + case PIC_ISR_PCIX_AD_PARITY: /* bit32 PCI_X_AD_PARITY */ + /* XXX: should breakdown meaning of attribute bit */ + printk( + "\t PCI-X Bus Error Address Reg: 0x%lx\n" + "\t PCI-X Bus Error Attribute Reg: 0x%lx\n" + "\t PCI-X Bus Error Data Reg: 0x%lx\n", + bridge->p_pcix_bus_err_addr_64, + bridge->p_pcix_bus_err_attr_64, + bridge->p_pcix_bus_err_data_64); + break; + + case BRIDGE_ISR_PAGE_FAULT: /* bit30 PMU_PAGE_FAULT */ +/* case BRIDGE_ISR_PMU_ESIZE_FAULT: bit30 PMU_ESIZE_FAULT */ + if (IS_XBRIDGE_OR_PIC_SOFT(pcibr_soft)) reg_desc = "Map Fault Address"; else reg_desc = "SSRAM Parity Error"; - printk("\t %s Register: 0x%x\n", reg_desc, + printk( "\t %s Register: 0x%x\n", reg_desc, bridge->b_ram_perr_or_map_fault); break; - case BRIDGE_ISR_UNEXP_RESP: /* UNEXPECTED_RESP */ - print_bridge_errcmd(bridge->b_wid_aux_err, "Aux"); - break; + case BRIDGE_ISR_UNEXP_RESP: /* bit29 UNEXPECTED_RESP */ + print_bridge_errcmd(bridge->b_wid_aux_err, "Aux "); - case BRIDGE_ISR_BAD_XRESP_PKT: /* BAD_RESP_PACKET */ - case BRIDGE_ISR_RESP_XTLK_ERR: /* RESP_XTALK_ERROR */ - case BRIDGE_ISR_XREAD_REQ_TIMEOUT: /* XREAD_REQ_TOUT */ + /* PIC in PCI-X mode, dump the PCIX DMA Request registers */ + if (IS_PIC_SOFT(pcibr_soft) && IS_PCIX(pcibr_soft)) { + /* XXX: should breakdown meaning of attr bit */ + printk( + "\t PCI-X DMA Request Error Addr Reg: 0x%lx\n" + "\t PCI-X DMA Request Error Attr Reg: 0x%lx\n", + bridge->p_pcix_dma_req_err_addr_64, + bridge->p_pcix_dma_req_err_attr_64); + } + break; - addr = (((uint64_t) (bridge->b_wid_resp_upper & 0xFFFF) << 32) - | bridge->b_wid_resp_lower); - printk( - "\t Bridge Response Buffer Error Upper Address Register: 0x%x\n" - "\t Bridge Response Buffer Error Lower Address Register: 0x%x\n" - "\t dev-num %d buff-num %d addr 0x%x\n", - bridge->b_wid_resp_upper, bridge->b_wid_resp_lower, - ((bridge->b_wid_resp_upper >> 20) & 0x3), - ((bridge->b_wid_resp_upper >> 16) & 0xF), - addr); + case BRIDGE_ISR_BAD_XRESP_PKT: /* bit28 BAD_RESP_PACKET */ + case BRIDGE_ISR_RESP_XTLK_ERR: /* bit26 RESP_XTALK_ERROR */ + if (IS_PIC_SOFT(pcibr_soft)) { + print_bridge_errcmd(bridge->b_wid_aux_err, "Aux "); + } + + /* If PIC in PCI-X mode, DMA Request Error registers are + * valid. But PIC in PCI mode, Response Buffer Address + * register are valid. + */ + if (IS_PCIX(pcibr_soft)) { + /* XXX: should breakdown meaning of attribute bit */ + printk( + "\t PCI-X DMA Request Error Addr Reg: 0x%lx\n" + "\t PCI-X DMA Request Error Attribute Reg: 0x%lx\n", + bridge->p_pcix_dma_req_err_addr_64, + bridge->p_pcix_dma_req_err_attr_64); + } else { + addr= (((uint64_t)(bridge->b_wid_resp_upper & 0xFFFF)<<32) + | bridge->b_wid_resp_lower); + printk("\t Bridge Response Buf Error Upper Addr Reg: 0x%x\n" + "\t Bridge Response Buf Error Lower Addr Reg: 0x%x\n" + "\t dev-num %d buff-num %d addr 0x%lx\n", + bridge->b_wid_resp_upper, bridge->b_wid_resp_lower, + ((bridge->b_wid_resp_upper >> 20) & 0x3), + ((bridge->b_wid_resp_upper >> 16) & 0xF), + addr); + } if (bit == BRIDGE_ISR_RESP_XTLK_ERR) { /* display memory directory associated with cacheline */ pcibr_show_dir_state(addr, "\t "); } break; - case BRIDGE_ISR_BAD_XREQ_PKT: /* BAD_XREQ_PACKET */ - case BRIDGE_ISR_REQ_XTLK_ERR: /* REQ_XTALK_ERROR */ - case BRIDGE_ISR_INVLD_ADDR: /* INVALID_ADDRESS */ - case BRIDGE_ISR_UNSUPPORTED_XOP: /* UNSUPPORTED_XOP */ - print_bridge_errcmd(bridge->b_wid_aux_err, ""); - printk("\t Bridge Error Upper Address Register: 0x%x\n" - "\t Bridge Error Lower Address Register: 0x%x\n" - "\t Bridge Error Address: 0x%x\n", + case BRIDGE_ISR_BAD_XREQ_PKT: /* bit27 BAD_XREQ_PACKET */ + case BRIDGE_ISR_REQ_XTLK_ERR: /* bit25 REQ_XTALK_ERROR */ + case BRIDGE_ISR_INVLD_ADDR: /* bit24 INVALID_ADDRESS */ + print_bridge_errcmd(bridge->b_wid_err_cmdword, ""); + printk( + "\t Bridge Error Upper Address Register: 0x%lx\n" + "\t Bridge Error Lower Address Register: 0x%lx\n" + "\t Bridge Error Address: 0x%lx\n", (uint64_t) bridge->b_wid_err_upper, (uint64_t) bridge->b_wid_err_lower, (((uint64_t) bridge->b_wid_err_upper << 32) | bridge->b_wid_err_lower)); break; - case BRIDGE_ISR_SSRAM_PERR: /* SSRAM_PERR */ - if (!is_xbridge(bridge)) { /* only defined on Bridge */ + case BRIDGE_ISR_UNSUPPORTED_XOP:/* bit23 UNSUPPORTED_XOP */ + if (IS_PIC_SOFT(pcibr_soft)) { + print_bridge_errcmd(bridge->b_wid_aux_err, "Aux "); + printk( + "\t Address Holding Link Side Error Reg: 0x%lx\n", + bridge->p_addr_lkerr_64); + } else { + print_bridge_errcmd(bridge->b_wid_err_cmdword, ""); + printk( + "\t Bridge Error Upper Address Register: 0x%lx\n" + "\t Bridge Error Lower Address Register: 0x%lx\n" + "\t Bridge Error Address: 0x%lx\n", + (uint64_t) bridge->b_wid_err_upper, + (uint64_t) bridge->b_wid_err_lower, + (((uint64_t) bridge->b_wid_err_upper << 32) | + bridge->b_wid_err_lower)); + } + break; + + case BRIDGE_ISR_XREQ_FIFO_OFLOW:/* bit22 XREQ_FIFO_OFLOW */ + /* Link side error registers are only valid for PIC */ + if (IS_PIC_SOFT(pcibr_soft)) { + print_bridge_errcmd(bridge->b_wid_aux_err, "Aux "); + printk( + "\t Address Holding Link Side Error Reg: 0x%lx\n", + bridge->p_addr_lkerr_64); + } + break; + + case BRIDGE_ISR_SSRAM_PERR: /* bit16 SSRAM_PERR */ + if (IS_BRIDGE_SOFT(pcibr_soft)) { printk( "\t Bridge SSRAM Parity Error Register: 0x%x\n", bridge->b_ram_perr); } break; - case BRIDGE_ISR_PCI_ABORT: /* PCI_ABORT */ - case BRIDGE_ISR_PCI_PARITY: /* PCI_PARITY */ - case BRIDGE_ISR_PCI_SERR: /* PCI_SERR */ - case BRIDGE_ISR_PCI_PERR: /* PCI_PERR */ - case BRIDGE_ISR_PCI_MST_TIMEOUT: /* PCI_MASTER_TOUT */ - case BRIDGE_ISR_PCI_RETRY_CNT: /* PCI_RETRY_CNT */ - case BRIDGE_ISR_GIO_B_ENBL_ERR: /* GIO BENABLE_ERR */ - printk("\t PCI Error Upper Address Register: 0x%x\n" - "\t PCI Error Lower Address Register: 0x%x\n" - "\t PCI Error Address: 0x%x\n", + case BRIDGE_ISR_PCI_ABORT: /* bit15 PCI_ABORT */ + case BRIDGE_ISR_PCI_PARITY: /* bit14 PCI_PARITY */ + case BRIDGE_ISR_PCI_SERR: /* bit13 PCI_SERR */ + case BRIDGE_ISR_PCI_PERR: /* bit12 PCI_PERR */ + case BRIDGE_ISR_PCI_MST_TIMEOUT:/* bit11 PCI_MASTER_TOUT */ + case BRIDGE_ISR_PCI_RETRY_CNT: /* bit10 PCI_RETRY_CNT */ + case BRIDGE_ISR_GIO_B_ENBL_ERR: /* bit08 GIO BENABLE_ERR */ + printk( + "\t PCI Error Upper Address Register: 0x%lx\n" + "\t PCI Error Lower Address Register: 0x%lx\n" + "\t PCI Error Address: 0x%lx\n", (uint64_t) bridge->b_pci_err_upper, (uint64_t) bridge->b_pci_err_lower, (((uint64_t) bridge->b_pci_err_upper << 32) | bridge->b_pci_err_lower)); break; + + case BRIDGE_ISR_XREAD_REQ_TIMEOUT: /* bit09 XREAD_REQ_TOUT */ + addr = (((uint64_t)(bridge->b_wid_resp_upper & 0xFFFF) << 32) + | bridge->b_wid_resp_lower); + printk( + "\t Bridge Response Buf Error Upper Addr Reg: 0x%x\n" + "\t Bridge Response Buf Error Lower Addr Reg: 0x%x\n" + "\t dev-num %d buff-num %d addr 0x%lx\n", + bridge->b_wid_resp_upper, bridge->b_wid_resp_lower, + ((bridge->b_wid_resp_upper >> 20) & 0x3), + ((bridge->b_wid_resp_upper >> 16) & 0xF), + addr); + break; } } } - if (is_xbridge(bridge) && (bridge->b_mult_int & ~BRIDGE_ISR_INT_MSK)) { - mult_int = bridge->b_mult_int; - printk(" XBridge Multiple Interrupt Register is 0x%x\n", - mult_int); - for (i = PCIBR_ISR_ERR_START; i < PCIBR_ISR_MAX_ERRS; i++) { - if (mult_int & (1 << i)) - printk("\t%s\n", pcibr_isr_errs[i]); - } + /* We read the INT_MULT register as a 64bit picreg_t for PIC and a + * 32bit bridgereg_t for BRIDGE, but always process the result as a + * 64bit value so the code can be "common" for both PIC and BRIDGE... + */ + if (IS_PIC_SOFT(pcibr_soft)) { + mult_int_64 = (bridge->p_mult_int_64 & ~BRIDGE_ISR_INT_MSK); + mult_int = (uint64_t)mult_int_64; + number_bits = PCIBR_ISR_MAX_ERRS_PIC; + } else { + mult_int_32 = (bridge->b_mult_int & ~BRIDGE_ISR_INT_MSK); + mult_int = ((uint64_t)mult_int_32) & 0xffffffff; + number_bits = PCIBR_ISR_MAX_ERRS_BRIDGE; + } + + if (IS_XBRIDGE_OR_PIC_SOFT(pcibr_soft)&&(mult_int & ~BRIDGE_ISR_INT_MSK)) { + printk( " %s Multiple Interrupt Register is 0x%lx\n", + IS_PIC_SOFT(pcibr_soft) ? "PIC" : "XBridge", mult_int); + for (i = PCIBR_ISR_ERR_START; i < number_bits; i++) { + if (mult_int & (1ull << i)) + printk( "\t%s\n", pcibr_isr_errs[i]); } + } + +#if BRIDGE_ERROR_INTR_WAR + if (pcibr_soft->bs_rev_num == BRIDGE_PART_REV_A) { /* known bridge bug */ + /* + * Should never receive interrupts for these reasons on Rev 1 bridge + * as they are not enabled. Assert for it. + */ + ASSERT((int_status & (BRIDGE_IMR_PCI_MST_TIMEOUT | + BRIDGE_ISR_RESP_XTLK_ERR | + BRIDGE_ISR_LLP_TX_RETRY)) == 0); + } + if (pcibr_soft->bs_rev_num < BRIDGE_PART_REV_C) { /* known bridge bug */ + /* + * This interrupt is turned off at init time. So, should never + * see this interrupt. + */ + ASSERT((int_status & BRIDGE_ISR_BAD_XRESP_PKT) == 0); + } +#endif } #define PCIBR_ERRINTR_GROUP(error) \ @@ -430,9 +648,11 @@ pcibr_pioerr_check(pcibr_soft_t soft) { bridge_t *bridge; - bridgereg_t b_int_status; - bridgereg_t b_pci_err_lower; - bridgereg_t b_pci_err_upper; + uint64_t int_status; + bridgereg_t int_status_32; + picreg_t int_status_64; + bridgereg_t pci_err_lower; + bridgereg_t pci_err_upper; iopaddr_t pci_addr; pciio_slot_t slot; pcibr_piomap_t map; @@ -442,40 +662,48 @@ int func; bridge = soft->bs_base; - b_int_status = bridge->b_int_status; - if (b_int_status & BRIDGE_ISR_PCIBUS_PIOERR) { - b_pci_err_lower = bridge->b_pci_err_lower; - b_pci_err_upper = bridge->b_pci_err_upper; - b_int_status = bridge->b_int_status; - if (b_int_status & BRIDGE_ISR_PCIBUS_PIOERR) { - - pci_addr = b_pci_err_upper & BRIDGE_ERRUPPR_ADDRMASK; - pci_addr = (pci_addr << 32) | b_pci_err_lower; - - slot = 8; - while (slot-- > 0) { - int nfunc = soft->bs_slot[slot].bss_ninfo; - pcibr_info_h pcibr_infoh = soft->bs_slot[slot].bss_infos; - - for (func = 0; func < nfunc; func++) { - pcibr_info_t pcibr_info = pcibr_infoh[func]; - - if (!pcibr_info) - continue; - - for (map = pcibr_info->f_piomap; - map != NULL; map = map->bp_next) { - base = map->bp_pciaddr; - size = map->bp_mapsz; - win = map->bp_space - PCIIO_SPACE_WIN(0); - if (win < 6) - base += - soft->bs_slot[slot].bss_window[win].bssw_base; - else if (map->bp_space == PCIIO_SPACE_ROM) - base += pcibr_info->f_rbase; - if ((pci_addr >= base) && (pci_addr < (base + size))) - atomicAddInt(map->bp_toc, 1); - } + + /* We read the INT_STATUS register as a 64bit picreg_t for PIC and a + * 32bit bridgereg_t for BRIDGE, but always process the result as a + * 64bit value so the code can be "common" for both PIC and BRIDGE... + */ + if (IS_PIC_SOFT(soft)) { + int_status_64 = (bridge->p_int_status_64 & ~BRIDGE_ISR_INT_MSK); + int_status = (uint64_t)int_status_64; + } else { + int_status_32 = (bridge->b_int_status & ~BRIDGE_ISR_INT_MSK); + int_status = ((uint64_t)int_status_32) & 0xffffffff; + } + + if (int_status & BRIDGE_ISR_PCIBUS_PIOERR) { + pci_err_lower = bridge->b_pci_err_lower; + pci_err_upper = bridge->b_pci_err_upper; + + pci_addr = pci_err_upper & BRIDGE_ERRUPPR_ADDRMASK; + pci_addr = (pci_addr << 32) | pci_err_lower; + + slot = PCIBR_NUM_SLOTS(soft); + while (slot-- > 0) { + int nfunc = soft->bs_slot[slot].bss_ninfo; + pcibr_info_h pcibr_infoh = soft->bs_slot[slot].bss_infos; + + for (func = 0; func < nfunc; func++) { + pcibr_info_t pcibr_info = pcibr_infoh[func]; + + if (!pcibr_info) + continue; + + for (map = pcibr_info->f_piomap; + map != NULL; map = map->bp_next) { + base = map->bp_pciaddr; + size = map->bp_mapsz; + win = map->bp_space - PCIIO_SPACE_WIN(0); + if (win < 6) + base += soft->bs_slot[slot].bss_window[win].bssw_base; + else if (map->bp_space == PCIIO_SPACE_ROM) + base += pcibr_info->f_rbase; + if ((pci_addr >= base) && (pci_addr < (base + size))) + atomic_inc(&map->bp_toc[0]); } } } @@ -502,25 +730,33 @@ * due to read or write error!. */ - void -pcibr_error_intr_handler(intr_arg_t arg) +pcibr_error_intr_handler(int irq, void *arg, struct pt_regs *ep) { pcibr_soft_t pcibr_soft; bridge_t *bridge; - bridgereg_t int_status; - bridgereg_t err_status; + uint64_t int_status; + uint64_t err_status; + bridgereg_t int_status_32; + picreg_t int_status_64; + int number_bits; int i; /* REFERENCED */ - bridgereg_t disable_errintr_mask = 0; + uint64_t disable_errintr_mask = 0; +#ifdef EHE_ENABLE int rv; int error_code = IOECODE_DMA | IOECODE_READ; ioerror_mode_t mode = MODE_DEVERROR; ioerror_t ioe; +#endif /* EHE_ENABLE */ nasid_t nasid; + #if PCIBR_SOFT_LIST + /* + * Defensive code for linked pcibr_soft structs + */ { extern pcibr_list_p pcibr_list; pcibr_list_p entry; @@ -528,17 +764,14 @@ entry = pcibr_list; while (1) { if (entry == NULL) { - PRINT_PANIC( - "pcibr_error_intr_handler:\n" - "\tmy parameter (0x%x) is not a pcibr_soft!", - arg); + PRINT_PANIC("pcibr_error_intr_handler:\tmy parameter (0x%p) is not a pcibr_soft!", arg); } if ((intr_arg_t) entry->bl_soft == arg) break; entry = entry->bl_next; } } -#endif +#endif /* PCIBR_SOFT_LIST */ pcibr_soft = (pcibr_soft_t) arg; bridge = pcibr_soft->bs_base; @@ -568,16 +801,37 @@ nasid = NASID_GET(bridge); if (hubii_check_widget_disabled(nasid, pcibr_soft->bs_xid)) { - timeout(pcibr_error_intr_handler, pcibr_soft, BRIDGE_PIOERR_TIMEOUT); + DECLARE_WAIT_QUEUE_HEAD(wq); + sleep_on_timeout(&wq, BRIDGE_PIOERR_TIMEOUT*HZ ); /* sleep */ pcibr_soft->bs_errinfo.bserr_toutcnt++; + /* Let's go recursive */ + return(pcibr_error_intr_handler(irq, arg, ep)); +#ifdef LATER + timeout(pcibr_error_intr_handler, pcibr_soft, BRIDGE_PIOERR_TIMEOUT); +#endif return; } + /* We read the INT_STATUS register as a 64bit picreg_t for PIC and a + * 32bit bridgereg_t for BRIDGE, but always process the result as a + * 64bit value so the code can be "common" for both PIC and BRIDGE... + */ + if (IS_PIC_SOFT(pcibr_soft)) { + int_status_64 = (bridge->p_int_status_64 & ~BRIDGE_ISR_INT_MSK); + int_status = (uint64_t)int_status_64; + number_bits = PCIBR_ISR_MAX_ERRS_PIC; + } else { + int_status_32 = (bridge->b_int_status & ~BRIDGE_ISR_INT_MSK); + int_status = ((uint64_t)int_status_32) & 0xffffffff; + number_bits = PCIBR_ISR_MAX_ERRS_BRIDGE; + } + + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_INTR_ERROR, pcibr_soft->bs_conn, + "pcibr_error_intr_handler: int_status=0x%x\n", int_status)); + /* int_status is which bits we have to clear; * err_status is the bits we haven't handled yet. */ - - int_status = bridge->b_int_status & ~BRIDGE_ISR_INT_MSK; err_status = int_status & ~BRIDGE_ISR_MULTI_ERR; if (!(int_status & ~BRIDGE_ISR_INT_MSK)) { @@ -593,11 +847,29 @@ pcibr_pioerr_check(pcibr_soft); } +#ifdef BRIDGE_B_DATACORR_WAR + if ((pcibr_soft->bs_rev_num == BRIDGE_PART_REV_B) && + (err_status & BRIDGE_IMR_LLP_REC_CBERR)) { + if (bridge_rev_b_data_check_disable) + printk(KERN_WARNING "\n%s%s: %s%s\n", rev_b_datacorr_warning, + pcibr_soft->bs_name, rev_b_datacorr_mesg, + rev_b_datacorr_warning); + else { + ql_bridge_rev_b_war(pcibr_soft->bs_vhdl); + PRINT_PANIC( "\n%s%s: %s%s\n", rev_b_datacorr_warning, + pcibr_soft->bs_name, rev_b_datacorr_mesg, + rev_b_datacorr_warning); + } + + err_status &= ~BRIDGE_IMR_LLP_REC_CBERR; + } +#endif /* BRIDGE_B_DATACORR_WAR */ + if (err_status) { struct bs_errintr_stat_s *bs_estat = pcibr_soft->bs_errintr_stat; - for (i = PCIBR_ISR_ERR_START; i < PCIBR_ISR_MAX_ERRS; i++, bs_estat++) { - if (err_status & (1 << i)) { + for (i = PCIBR_ISR_ERR_START; i < number_bits; i++, bs_estat++) { + if (err_status & (1ull << i)) { uint32_t errrate = 0; uint32_t errcount = 0; uint32_t errinterval = 0, current_tick = 0; @@ -606,12 +878,14 @@ bs_estat->bs_errcount_total++; - current_tick = lbolt; + current_tick = jiffies; errinterval = (current_tick - bs_estat->bs_lasterr_timestamp); errcount = (bs_estat->bs_errcount_total - bs_estat->bs_lasterr_snapshot); - is_llp_tx_retry_intr = (BRIDGE_ISR_LLP_TX_RETRY == (1 << i)); + /* LLP interrrupt errors are only valid on BUS0 of the PIC */ + if (pcibr_soft->bs_busnum == 0) + is_llp_tx_retry_intr = (BRIDGE_ISR_LLP_TX_RETRY==(1ull << i)); /* Check for the divide by zero condition while * calculating the error rates. @@ -698,6 +972,15 @@ bs_estat->bs_errcount_total; } } + /* PIC BRINGUP WAR (PV# 856155): + * Dont disable PCI_X_ARB_ERR interrupts, we need the + * interrupt inorder to clear the DEV_BROKE bits in + * b_arb register to re-enable the device. + */ + if (IS_PIC_SOFT(pcibr_soft) && + !(err_status & PIC_ISR_PCIX_ARB_ERR) && + PCIBR_WAR_ENABLED(PV856155, pcibr_soft)) { + if (bs_estat->bs_errcount_total > PCIBR_ERRINTR_DISABLE_LEVEL) { /* * We have seen a fairly large number of errors of @@ -709,18 +992,26 @@ pcibr_soft->bs_name, pcibr_isr_errs[i], bs_estat->bs_errcount_total); - disable_errintr_mask |= (1 << i); + disable_errintr_mask |= (1ull << i); } + } /* PIC: WAR for PV 856155 end-of-if */ } } } if (disable_errintr_mask) { + unsigned s; /* * Disable some high frequency errors as they * could eat up too much cpu time. */ - bridge->b_int_enable &= ~disable_errintr_mask; + s = pcibr_lock(pcibr_soft); + if (IS_PIC_SOFT(pcibr_soft)) { + bridge->p_int_enable_64 &= (picreg_t)(~disable_errintr_mask); + } else { + bridge->b_int_enable &= (bridgereg_t)(~disable_errintr_mask); + } + pcibr_unlock(pcibr_soft, s); } /* * If we leave the PROM cacheable, T5 might @@ -783,15 +1074,34 @@ if (rv != IOERROR_HANDLED) { #endif /* EHE_ENABLE */ + bridge_errors_to_dump |= BRIDGE_ISR_PCIBUS_PIOERR; + /* Dump/Log Bridge error interrupt info */ if (err_status & bridge_errors_to_dump) { - printk("BRIDGE ERR_STATUS 0x%x\n", err_status); + printk("BRIDGE ERR_STATUS 0x%lx\n", err_status); pcibr_error_dump(pcibr_soft); } + /* PIC BRINGUP WAR (PV# 867308): + * Make BRIDGE_ISR_LLP_REC_SNERR & BRIDGE_ISR_LLP_REC_CBERR fatal errors + * so we know we've hit the problem defined in PV 867308 that we believe + * has only been seen in simulation + */ + if (IS_PIC_SOFT(pcibr_soft) && PCIBR_WAR_ENABLED(PV867308, pcibr_soft) && + (err_status & (BRIDGE_ISR_LLP_REC_SNERR | BRIDGE_ISR_LLP_REC_CBERR))) { + printk("BRIDGE ERR_STATUS 0x%x\n", err_status); + pcibr_error_dump(pcibr_soft); +#ifdef LATER + machine_error_dump(""); +#endif + PRINT_PANIC("PCI Bridge Error interrupt killed the system"); + } + if (err_status & BRIDGE_ISR_ERROR_FATAL) { +#ifdef LATER machine_error_dump(""); - cmn_err_tag(14, CE_PANIC, "PCI Bridge Error interrupt killed the system"); +#endif + PRINT_PANIC("PCI Bridge Error interrupt killed the system"); /*NOTREACHED */ } @@ -804,11 +1114,27 @@ * it would cause problems for devices like IOC3 (Lost * interrupts ?.). So, just cleanup the interrupt, and * use saved values later.. + * + * PIC doesn't require groups of interrupts to be cleared... */ - bridge->b_int_rst_stat = pcibr_errintr_group(int_status); + if (IS_PIC_SOFT(pcibr_soft)) { + bridge->p_int_rst_stat_64 = (picreg_t)(int_status | BRIDGE_IRR_MULTI_CLR); + } else { + bridge->b_int_rst_stat = (bridgereg_t)pcibr_errintr_group(int_status); + } + + /* PIC BRINGUP WAR (PV# 856155): + * On a PCI_X_ARB_ERR error interrupt clear the DEV_BROKE bits from + * the b_arb register to re-enable the device. + */ + if (IS_PIC_SOFT(pcibr_soft) && + (err_status & PIC_ISR_PCIX_ARB_ERR) && + PCIBR_WAR_ENABLED(PV856155, pcibr_soft)) { + bridge->b_arb |= (0xf << 20); + } /* Zero out bserr_intstat field */ - test_and_set_int((int *) &pcibr_soft->bs_errinfo.bserr_intstat, 0); + pcibr_soft->bs_errinfo.bserr_intstat = 0; } /* @@ -832,7 +1158,7 @@ iopaddr_t *offsetp, pciio_function_t *funcp) { - int s, f, w; + int s, f = 0, w; iopaddr_t base; size_t size; pciio_piospace_t piosp; @@ -864,7 +1190,7 @@ return s; } - for (s = 0; s < 8; s++) { + for (s = pcibr_soft->bs_min_slot; s < PCIBR_NUM_SLOTS(pcibr_soft); ++s) { int nf = pcibr_soft->bs_slot[s].bss_ninfo; pcibr_info_h pcibr_infoh = pcibr_soft->bs_slot[s].bss_infos; @@ -874,8 +1200,7 @@ if (!pcibr_info) continue; for (w = 0; w < 6; w++) { - if (pcibr_info->f_window[w].w_space - == PCIIO_SPACE_NONE) { + if (pcibr_info->f_window[w].w_space == PCIIO_SPACE_NONE) { continue; } base = pcibr_info->f_window[w].w_base; @@ -898,7 +1223,7 @@ * Check if the address was allocated as part of the * pcibr_piospace_alloc calls. */ - for (s = 0; s < 8; s++) { + for (s = pcibr_soft->bs_min_slot; s < PCIBR_NUM_SLOTS(pcibr_soft); ++s) { int nf = pcibr_soft->bs_slot[s].bss_ninfo; pcibr_info_h pcibr_infoh = pcibr_soft->bs_slot[s].bss_infos; @@ -950,8 +1275,14 @@ ASSERT(error_code & IOECODE_PIO); error_code = error_code; - bridge->b_int_rst_stat = - (BRIDGE_IRR_PCI_GRP_CLR | BRIDGE_IRR_MULTI_CLR); + if (IS_PIC_SOFT(pcibr_soft)) { + bridge->p_int_rst_stat_64 = BRIDGE_IRR_PCI_GRP_CLR | + PIC_PCIX_GRP_CLR | + BRIDGE_IRR_MULTI_CLR; + } else { + bridge->b_int_rst_stat = BRIDGE_IRR_PCI_GRP_CLR | BRIDGE_IRR_MULTI_CLR; + } + (void) bridge->b_wid_tflush; /* flushbus */ } @@ -1040,13 +1371,6 @@ * associated with this device. */ -#define BEM_ADD_STR(s) printk("%s", (s)) -#define BEM_ADD_VAR(v) printk("\t%20s: 0x%x\n", #v, (v)) -#define BEM_ADD_REG(r) printk("\t%20s: %R\n", #r, (r), r ## _desc) - -#define BEM_ADD_NSPC(n,s) printk("\t%20s: %R\n", n, s, space_desc) -#define BEM_ADD_SPC(s) BEM_ADD_NSPC(#s, s) - /* BEM_ADD_IOE doesn't dump the whole ioerror, it just * decodes the PCI specific portions -- we count on our * callers to dump the raw IOE data. @@ -1054,40 +1378,38 @@ #define BEM_ADD_IOE(ioe) \ do { \ if (IOERROR_FIELDVALID(ioe, busspace)) { \ - unsigned spc; \ - unsigned win; \ + iopaddr_t spc; \ + iopaddr_t win; \ + short widdev; \ + iopaddr_t busaddr; \ \ - spc = IOERROR_GETVALUE(ioe, busspace); \ + IOERROR_GETVALUE(spc, ioe, busspace); \ win = spc - PCIIO_SPACE_WIN(0); \ + IOERROR_GETVALUE(busaddr, ioe, busaddr); \ + IOERROR_GETVALUE(widdev, ioe, widgetdev); \ \ switch (spc) { \ case PCIIO_SPACE_CFG: \ - printk( \ - "\tPCI Slot %d Func %d CFG space Offset 0x%x\n", \ - pciio_widgetdev_slot_get(IOERROR_GETVALUE(ioe, widgetdev)), \ - pciio_widgetdev_func_get(IOERROR_GETVALUE(ioe, widgetdev)), \ - IOERROR_GETVALUE(ioe, busaddr)); \ + printk("\tPCI Slot %d Func %d CFG space Offset 0x%lx\n",\ + pciio_widgetdev_slot_get(widdev), \ + pciio_widgetdev_func_get(widdev), \ + busaddr); \ break; \ case PCIIO_SPACE_IO: \ - printk( \ - "\tPCI I/O space Offset 0x%x\n", \ - IOERROR_GETVALUE(ioe, busaddr)); \ + printk("\tPCI I/O space Offset 0x%lx\n", busaddr); \ break; \ case PCIIO_SPACE_MEM: \ case PCIIO_SPACE_MEM32: \ case PCIIO_SPACE_MEM64: \ - printk( \ - "\tPCI MEM space Offset 0x%x\n", \ - IOERROR_GETVALUE(ioe, busaddr)); \ + printk("\tPCI MEM space Offset 0x%lx\n", busaddr); \ break; \ default: \ if (win < 6) { \ - printk( \ - "\tPCI Slot %d Func %d Window %d Offset 0x%x\n",\ - pciio_widgetdev_slot_get(IOERROR_GETVALUE(ioe, widgetdev)), \ - pciio_widgetdev_func_get(IOERROR_GETVALUE(ioe, widgetdev)), \ - win, \ - IOERROR_GETVALUE(ioe, busaddr)); \ + printk("\tPCI Slot %d Func %d Window %ld Offset 0x%lx\n",\ + pciio_widgetdev_slot_get(widdev), \ + pciio_widgetdev_func_get(widdev), \ + win, \ + busaddr); \ } \ break; \ } \ @@ -1129,34 +1451,38 @@ * and need to construct the slot/space/offset. */ - bad_xaddr = IOERROR_GETVALUE(ioe, xtalkaddr); + IOERROR_GETVALUE(bad_xaddr, ioe, xtalkaddr); + + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_ERROR_HDLR, pcibr_soft->bs_conn, + "pcibr_pioerror: pcibr_soft=0x%x, bad_xaddr=0x%x\n", + pcibr_soft, bad_xaddr)); slot = PCIIO_SLOT_NONE; func = PCIIO_FUNC_NONE; raw_space = PCIIO_SPACE_NONE; raw_paddr = 0; - if ((bad_xaddr >= BRIDGE_TYPE0_CFG_DEV0) && - (bad_xaddr < BRIDGE_TYPE1_CFG)) { - raw_paddr = bad_xaddr - BRIDGE_TYPE0_CFG_DEV0; + if ((bad_xaddr >= PCIBR_BUS_TYPE0_CFG_DEV0(pcibr_soft)) && + (bad_xaddr < PCIBR_TYPE1_CFG(pcibr_soft))) { + raw_paddr = bad_xaddr - PCIBR_BUS_TYPE0_CFG_DEV0(pcibr_soft); slot = raw_paddr / BRIDGE_TYPE0_CFG_SLOT_OFF; raw_paddr = raw_paddr % BRIDGE_TYPE0_CFG_SLOT_OFF; raw_space = PCIIO_SPACE_CFG; } - if ((bad_xaddr >= BRIDGE_TYPE1_CFG) && - (bad_xaddr < (BRIDGE_TYPE1_CFG + 0x1000))) { + if ((bad_xaddr >= PCIBR_TYPE1_CFG(pcibr_soft)) && + (bad_xaddr < (PCIBR_TYPE1_CFG(pcibr_soft) + 0x1000))) { /* Type 1 config space: * slot and function numbers not known. * Perhaps we can read them back? */ - raw_paddr = bad_xaddr - BRIDGE_TYPE1_CFG; + raw_paddr = bad_xaddr - PCIBR_TYPE1_CFG(pcibr_soft); raw_space = PCIIO_SPACE_CFG; } - if ((bad_xaddr >= BRIDGE_DEVIO0) && - (bad_xaddr < BRIDGE_DEVIO(BRIDGE_DEV_CNT))) { + if ((bad_xaddr >= PCIBR_BRIDGE_DEVIO0(pcibr_soft)) && + (bad_xaddr < PCIBR_BRIDGE_DEVIO(pcibr_soft, BRIDGE_DEV_CNT))) { int x; - raw_paddr = bad_xaddr - BRIDGE_DEVIO0; + raw_paddr = bad_xaddr - PCIBR_BRIDGE_DEVIO0(pcibr_soft); x = raw_paddr / BRIDGE_DEVIO_OFF; raw_paddr %= BRIDGE_DEVIO_OFF; /* first two devio windows are double-sized */ @@ -1223,7 +1549,9 @@ * going on (no guessing). */ - for (cs = 0; (cs < 8) && (slot == PCIIO_SLOT_NONE); cs++) { + for (cs = pcibr_soft->bs_min_slot; + (cs < PCIBR_NUM_SLOTS(pcibr_soft)) && + (slot == PCIIO_SLOT_NONE); cs++) { int nf = pcibr_soft->bs_slot[cs].bss_ninfo; pcibr_info_h pcibr_infoh = pcibr_soft->bs_slot[cs].bss_infos; @@ -1283,7 +1611,8 @@ * strict count, the excess counts are not a * problem. */ - for (cs = 0; cs < 8; ++cs) { + for (cs = pcibr_soft->bs_min_slot; + cs < PCIBR_NUM_SLOTS(pcibr_soft); ++cs) { int nf = pcibr_soft->bs_slot[cs].bss_ninfo; pcibr_info_h pcibr_infoh = pcibr_soft->bs_slot[cs].bss_infos; @@ -1313,7 +1642,7 @@ wx = PCIIO_SPACE_MEM; wl = wb + ws; if ((wx == raw_space) && (raw_paddr >= wb) && (raw_paddr < wl)) { - atomicAddInt(map->bp_toc, 1); + atomic_inc(&map->bp_toc[0]); if (slot == PCIIO_SLOT_NONE) { slot = cs; space = map->bp_space; @@ -1325,15 +1654,21 @@ } } + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_ERROR_HDLR, pcibr_soft->bs_conn, + "pcibr_pioerror: offset=0x%x, slot=0x%x, func=0x%x\n", + offset, slot, func)); + if (space != PCIIO_SPACE_NONE) { - if (slot != PCIIO_SLOT_NONE) - if (func != PCIIO_FUNC_NONE) + if (slot != PCIIO_SLOT_NONE) { + if (func != PCIIO_FUNC_NONE) { IOERROR_SETVALUE(ioe, widgetdev, pciio_widgetdev_create(slot,func)); - else + } + else { IOERROR_SETVALUE(ioe, widgetdev, pciio_widgetdev_create(slot,0)); - + } + } IOERROR_SETVALUE(ioe, busspace, space); IOERROR_SETVALUE(ioe, busaddr, offset); } @@ -1360,7 +1695,7 @@ if (space == PCIIO_SPACE_NONE) { printk("XIO Bus Error at %s\n" - "\taccess to XIO bus offset 0x%x\n" + "\taccess to XIO bus offset 0x%lx\n" "\tdoes not correspond to any PCI address\n", pcibr_soft->bs_name, bad_xaddr); @@ -1434,17 +1769,21 @@ */ BEM_ADD_STR("Raw info from Bridge/PCI layer:\n"); - if (bridge->b_int_status & BRIDGE_ISR_PCIBUS_PIOERR) - pcibr_error_dump(pcibr_soft); + if (IS_PIC_SOFT(pcibr_soft)) { + if (bridge->p_int_status_64 & (picreg_t)BRIDGE_ISR_PCIBUS_PIOERR) + pcibr_error_dump(pcibr_soft); + } else { + if (bridge->b_int_status & (bridgereg_t)BRIDGE_ISR_PCIBUS_PIOERR) + pcibr_error_dump(pcibr_soft); + } BEM_ADD_SPC(raw_space); BEM_ADD_VAR(raw_paddr); if (IOERROR_FIELDVALID(ioe, widgetdev)) { - - slot = pciio_widgetdev_slot_get(IOERROR_GETVALUE(ioe, - widgetdev)); - func = pciio_widgetdev_func_get(IOERROR_GETVALUE(ioe, - widgetdev)); - if (slot < 8) { + short widdev; + IOERROR_GETVALUE(widdev, ioe, widgetdev); + slot = pciio_widgetdev_slot_get(widdev); + func = pciio_widgetdev_func_get(widdev); + if (slot < PCIBR_NUM_SLOTS(pcibr_soft)) { bridgereg_t device = bridge->b_device[slot].reg; BEM_ADD_VAR(slot); @@ -1472,11 +1811,12 @@ * Need a way to ensure we don't inadvertently clear some * other errors. */ - if (IOERROR_FIELDVALID(ioe, widgetdev)) - pcibr_device_disable(pcibr_soft, - pciio_widgetdev_slot_get( - IOERROR_GETVALUE(ioe, widgetdev))); - + if (IOERROR_FIELDVALID(ioe, widgetdev)) { + short widdev; + IOERROR_GETVALUE(widdev, ioe, widgetdev); + pcibr_device_disable(pcibr_soft, + pciio_widgetdev_slot_get(widdev)); + } if (mode == MODE_DEVUSERERROR) pcibr_error_cleanup(pcibr_soft, error_code); } @@ -1490,8 +1830,6 @@ * and try to invoke the appropriate bus service to handle this. */ -#define BRIDGE_DMA_READ_ERROR (BRIDGE_ISR_RESP_XTLK_ERR|BRIDGE_ISR_XREAD_REQ_TIMEOUT) - int pcibr_dmard_error( pcibr_soft_t pcibr_soft, @@ -1511,7 +1849,11 @@ * Look up the address, in the bridge error registers, and * take appropriate action */ - ASSERT(IOERROR_GETVALUE(ioe, widgetnum) == pcibr_soft->bs_xid); + { + short tmp; + IOERROR_GETVALUE(tmp, ioe, widgetnum); + ASSERT(tmp == pcibr_soft->bs_xid); + } ASSERT(bridge); /* @@ -1540,10 +1882,11 @@ */ retval = pciio_error_handler(pcibr_vhdl, error_code, mode, ioe); - if (retval != IOERROR_HANDLED) - pcibr_device_disable(pcibr_soft, - pciio_widgetdev_slot_get( - IOERROR_GETVALUE(ioe,widgetdev))); + if (retval != IOERROR_HANDLED) { + short tmp; + IOERROR_GETVALUE(tmp, ioe, widgetdev); + pcibr_device_disable(pcibr_soft, pciio_widgetdev_slot_get(tmp)); + } /* * Re-enable bridge to interrupt on BRIDGE_IRR_RESP_BUF_GRP_CLR @@ -1609,10 +1952,10 @@ retval = pciio_error_handler(pcibr_vhdl, error_code, mode, ioe); if (retval != IOERROR_HANDLED) { - pcibr_device_disable(pcibr_soft, - pciio_widgetdev_slot_get( - IOERROR_GETVALUE(ioe, widgetdev))); + short tmp; + IOERROR_GETVALUE(tmp, ioe, widgetdev); + pcibr_device_disable(pcibr_soft, pciio_widgetdev_slot_get(tmp)); } return retval; } @@ -1646,6 +1989,10 @@ pcibr_soft = (pcibr_soft_t) einfo; + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_ERROR_HDLR, pcibr_soft->bs_conn, + "pcibr_error_handler: pcibr_soft=0x%x, error_code=0x%x\n", + pcibr_soft, error_code)); + #ifdef EHE_ENABLE xconn_vhdl = pcibr_soft->bs_conn; pcibr_vhdl = pcibr_soft->bs_vhdl; @@ -1664,7 +2011,7 @@ #endif /* EHE_ENABLE */ #if DEBUG && ERROR_DEBUG - printk("%s: pcibr_error_handler\n", pcibr_soft->bs_name); + printk( "%s: pcibr_error_handler\n", pcibr_soft->bs_name); #endif ASSERT(pcibr_soft != NULL); @@ -1704,6 +2051,159 @@ } /* + * PIC has 2 busses under a single widget so pcibr_attach2 registers this + * wrapper function rather than pcibr_error_handler() for PIC. It's upto + * this wrapper to call pcibr_error_handler() with the correct pcibr_soft + * struct (ie. the pcibr_soft struct for the bus that saw the error). + * + * NOTE: this wrapper function is only registered for PIC ASICs and will + * only be called for a PIC + */ +int +pcibr_error_handler_wrapper( + error_handler_arg_t einfo, + int error_code, + ioerror_mode_t mode, + ioerror_t *ioe) +{ + pcibr_soft_t pcibr_soft = (pcibr_soft_t) einfo; + int pio_retval = -1; + int dma_retval = -1; + + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_ERROR_HDLR, pcibr_soft->bs_conn, + "pcibr_error_handler_wrapper: pcibr_soft=0x%x, " + "error_code=0x%x\n", pcibr_soft, error_code)); + + /* + * It is possible that both a IOECODE_PIO and a IOECODE_DMA, and both + * IOECODE_READ and IOECODE_WRITE could be set in error_code so we must + * process all. Since we are a wrapper for pcibr_error_handler(), and + * will be calling it several times within this routine, we turn off the + * error_code bits we don't want it to be processing during that call. + */ + /* + * If the error was a result of a PIO, we tell what bus on the PIC saw + * the error from the PIO address. + */ + +#if 0 + if (mode == MODE_DEVPROBE) + pio_retval = IOERROR_HANDLED; + else { +#endif + if (error_code & IOECODE_PIO) { + iopaddr_t bad_xaddr; + /* + * PIC bus0 PIO space 0x000000 - 0x7fffff or 0x40000000 - 0xbfffffff + * bus1 PIO space 0x800000 - 0xffffff or 0xc0000000 - 0x13fffffff + */ + IOERROR_GETVALUE(bad_xaddr, ioe, xtalkaddr); + if ((bad_xaddr <= 0x7fffff) || + ((bad_xaddr >= 0x40000000) && (bad_xaddr <= 0xbfffffff))) { + /* bus 0 saw the error */ + pio_retval = pcibr_error_handler((error_handler_arg_t)pcibr_soft, + (error_code & ~IOECODE_DMA), mode, ioe); + } else if (((bad_xaddr >= 0x800000) && (bad_xaddr <= 0xffffff)) || + ((bad_xaddr >= 0xc0000000) && (bad_xaddr <= 0x13fffffff))) { + /* bus 1 saw the error */ + pcibr_soft = pcibr_soft->bs_peers_soft; + if (!pcibr_soft) { +#if DEBUG + printk(KERN_WARNING "pcibr_error_handler: " + "bs_peers_soft==NULL. bad_xaddr= 0x%x mode= 0x%x\n", + bad_xaddr, mode); +#endif + pio_retval = IOERROR_HANDLED; + } else + pio_retval= pcibr_error_handler((error_handler_arg_t)pcibr_soft, + (error_code & ~IOECODE_DMA), mode, ioe); + } else { + printk(KERN_WARNING "pcibr_error_handler_wrapper(): IOECODE_PIO: " + "saw an invalid pio address: 0x%lx\n", bad_xaddr); + pio_retval = IOERROR_UNHANDLED; + } + } +#if 0 + } /* MODE_DEVPROBE */ +#endif + + /* + * If the error was a result of a DMA Write, we tell what bus on the PIC + * saw the error by looking at tnum. + */ + if ((error_code & IOECODE_DMA) && (error_code & IOECODE_WRITE)) { + short tmp; + /* + * For DMA writes [X]Bridge encodes the TNUM field of a Xtalk + * packet like this: + * bits value + * 4:3 10b + * 2:0 device number + * + * BUT PIC needs the bus number so it does this: + * bits value + * 4:3 10b + * 2 busnumber + * 1:0 device number + * + * Pull out the bus number from `tnum' and reset the `widgetdev' + * since when hubiio_crb_error_handler() set `widgetdev' it had + * no idea if it was a PIC or a BRIDGE ASIC so it set it based + * off bits 2:0 + */ + IOERROR_GETVALUE(tmp, ioe, tnum); + IOERROR_SETVALUE(ioe, widgetdev, (tmp & 0x3)); + if ((tmp & 0x4) == 0) { + /* bus 0 saw the error. */ + dma_retval = pcibr_error_handler((error_handler_arg_t)pcibr_soft, + (error_code & ~(IOECODE_PIO|IOECODE_READ)), mode, ioe); + } else { + /* bus 1 saw the error */ + pcibr_soft = pcibr_soft->bs_peers_soft; + dma_retval = pcibr_error_handler((error_handler_arg_t)pcibr_soft, + (error_code & ~(IOECODE_PIO|IOECODE_READ)), mode, ioe); + } + } + + /* + * If the error was a result of a DMA READ, XXX ??? + */ + if ((error_code & IOECODE_DMA) && (error_code & IOECODE_READ)) { + /* + * A DMA Read error will result in a BRIDGE_ISR_RESP_XTLK_ERR + * or BRIDGE_ISR_BAD_XRESP_PKT bridge error interrupt which + * are fatal interrupts (ie. BRIDGE_ISR_ERROR_FATAL) causing + * pcibr_error_intr_handler() to panic the system. So is the + * error handler even going to get called??? It appears that + * the pcibr_dmard_error() attempts to clear the interrupts + * so pcibr_error_intr_handler() won't see them, but there + * appears to be nothing to prevent pcibr_error_intr_handler() + * from running before pcibr_dmard_error() has a chance to + * clear the interrupt. + * + * Since we'll be panicing anyways, don't bother handling the + * error for now until we can fix this race condition mentioned + * above. + */ + dma_retval = IOERROR_UNHANDLED; + } + + /* XXX: pcibr_error_handler() should probably do the same thing, it over- + * write it's return value as it processes the different "error_code"s. + */ + if ((pio_retval == -1) && (dma_retval == -1)) { + return IOERROR_BADERRORCODE; + } else if (dma_retval != IOERROR_HANDLED) { + return dma_retval; + } else if (pio_retval != IOERROR_HANDLED) { + return pio_retval; + } else { + return IOERROR_HANDLED; + } +} + + +/* * Reenable a device after handling the error. * This is called by the lower layers when they wish to be reenabled * after an error. @@ -1715,7 +2215,7 @@ pcibr_error_devenable(devfs_handle_t pconn_vhdl, int error_code) { pciio_info_t pciio_info = pciio_info_get(pconn_vhdl); - pciio_slot_t pciio_slot = pciio_info_slot_get(pciio_info); + pciio_slot_t pciio_slot = PCIBR_INFO_SLOT_GET_INT(pciio_info); pcibr_soft_t pcibr_soft = (pcibr_soft_t) pciio_info_mfast_get(pciio_info); ASSERT(error_code & IOECODE_PIO); diff -Nru a/arch/ia64/sn/io/sn2/pcibr/pcibr_hints.c b/arch/ia64/sn/io/sn2/pcibr/pcibr_hints.c --- a/arch/ia64/sn/io/sn2/pcibr/pcibr_hints.c Mon Dec 23 21:22:00 2002 +++ b/arch/ia64/sn/io/sn2/pcibr/pcibr_hints.c Mon Dec 23 21:22:00 2002 @@ -85,11 +85,9 @@ if (hint) hint->ph_rrb_fixed = mask; -#if DEBUG else - printk("pcibr_hints_fix_rrbs: pcibr_hints_get failed at\n" - "\t%p\n", xconn_vhdl); -#endif + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_HINTS, xconn_vhdl, + "pcibr_hints_fix_rrbs: pcibr_hints_get failed\n")); } void @@ -107,11 +105,9 @@ if (hint) hint->ph_host_slot[guest] = host + 1; -#if DEBUG else - printk("pcibr_hints_dualslot: pcibr_hints_get failed at\n" - "\t%p\n", xconn_vhdl); -#endif + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_HINTS, xconn_vhdl, + "pcibr_hints_dualslot: pcibr_hints_get failed\n")); } void @@ -122,11 +118,9 @@ if (hint) hint->ph_intr_bits = xxx_intr_bits; -#if DEBUG else - printk("pcibr_hints_intr_bits: pcibr_hints_get failed at\n" - "\t%p\n", xconn_vhdl); -#endif + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_HINTS, xconn_vhdl, + "pcibr_hints_intr_bits: pcibr_hints_get failed\n")); } void @@ -145,11 +139,9 @@ if (hint) hint->ph_hands_off = 1; -#if DEBUG else - printk("pcibr_hints_handsoff: pcibr_hints_get failed at\n" - "\t%p\n", xconn_vhdl); -#endif + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_HINTS, xconn_vhdl, + "pcibr_hints_handsoff: pcibr_hints_get failed\n")); } void @@ -161,13 +153,11 @@ char sdname[16]; devfs_handle_t pconn_vhdl = GRAPH_VERTEX_NONE; - sprintf(sdname, "pci/%d", slot); + sprintf(sdname, "%s/%d", EDGE_LBL_PCI, slot); (void) hwgraph_path_add(xconn_vhdl, sdname, &pconn_vhdl); if (pconn_vhdl == GRAPH_VERTEX_NONE) { -#if DEBUG - printk("pcibr_hints_subdevs: hwgraph_path_create failed at\n" - "\t%p (seeking %s)\n", xconn_vhdl, sdname); -#endif + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_HINTS, xconn_vhdl, + "pcibr_hints_subdevs: hwgraph_path_create failed\n")); return; } hwgraph_info_get_LBL(pconn_vhdl, INFO_LBL_SUBDEVS, &ainfo); @@ -176,10 +166,8 @@ NEW(subdevp); if (!subdevp) { -#if DEBUG - printk("pcibr_hints_subdevs: subdev ptr alloc failed at\n" - "\t%p\n", pconn_vhdl); -#endif + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_HINTS, xconn_vhdl, + "pcibr_hints_subdevs: subdev ptr alloc failed\n")); return; } *subdevp = subdevs; @@ -189,16 +177,12 @@ return; DEL(subdevp); if (ainfo == (arbitrary_info_t) NULL) { -#if DEBUG - printk("pcibr_hints_subdevs: null subdevs ptr at\n" - "\t%p\n", pconn_vhdl); -#endif + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_HINTS, xconn_vhdl, + "pcibr_hints_subdevs: null subdevs ptr\n")); return; } -#if DEBUG - printk("pcibr_subdevs_get: dup subdev add_LBL at\n" - "\t%p\n", pconn_vhdl); -#endif + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_HINTS, xconn_vhdl, + "pcibr_subdevs_get: dup subdev add_LBL\n")); } *(uint64_t *) ainfo = subdevs; } diff -Nru a/arch/ia64/sn/io/sn2/pcibr/pcibr_intr.c b/arch/ia64/sn/io/sn2/pcibr/pcibr_intr.c --- a/arch/ia64/sn/io/sn2/pcibr/pcibr_intr.c Mon Dec 23 21:21:58 2002 +++ b/arch/ia64/sn/io/sn2/pcibr/pcibr_intr.c Mon Dec 23 21:21:58 2002 @@ -4,11 +4,10 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 2001 Silicon Graphics, Inc. All rights reserved. + * Copyright (C) 2001-2002 Silicon Graphics, Inc. All rights reserved. */ #include -#include #include #include #include @@ -39,11 +38,11 @@ #define rmalloc atealloc #endif -unsigned pcibr_intr_bits(pciio_info_t info, pciio_intr_line_t lines); +unsigned pcibr_intr_bits(pciio_info_t info, pciio_intr_line_t lines, int nslots); pcibr_intr_t pcibr_intr_alloc(devfs_handle_t, device_desc_t, pciio_intr_line_t, devfs_handle_t); void pcibr_intr_free(pcibr_intr_t); void pcibr_setpciint(xtalk_intr_t); -int pcibr_intr_connect(pcibr_intr_t); +int pcibr_intr_connect(pcibr_intr_t, intr_func_t, intr_arg_t); void pcibr_intr_disconnect(pcibr_intr_t); devfs_handle_t pcibr_intr_cpu_get(pcibr_intr_t); @@ -58,9 +57,9 @@ unsigned pcibr_intr_bits(pciio_info_t info, - pciio_intr_line_t lines) + pciio_intr_line_t lines, int nslots) { - pciio_slot_t slot = pciio_info_slot_get(info); + pciio_slot_t slot = PCIBR_INFO_SLOT_GET_INT(info); unsigned bbits = 0; /* @@ -79,7 +78,7 @@ * 7 7 3 7 3 */ - if (slot < 8) { + if (slot < nslots) { if (lines & (PCIIO_INTR_LINE_A| PCIIO_INTR_LINE_C)) bbits |= 1 << slot; if (lines & (PCIIO_INTR_LINE_B| PCIIO_INTR_LINE_D)) @@ -165,20 +164,26 @@ * to check if a specific Bridge b_int_status bit is set, and if so, * cause the setting of the corresponding interrupt bit. * - * On a XBridge (IP35), we do this by writing the appropriate Bridge Force - * Interrupt register. + * On a XBridge (SN1), we do this by writing the appropriate Bridge Force + * Interrupt register. On SN0, or SN1 with an older Bridge, the Bridge + * Force Interrupt register does not exist, so we write the Hub + * INT_PEND_MOD register directly. Likewise for Octane, where we write the + * Heart Set Interrupt Status register directly. */ void pcibr_force_interrupt(pcibr_intr_wrap_t wrap) { +#ifdef PIC_LATER unsigned bit; pcibr_soft_t pcibr_soft = wrap->iw_soft; bridge_t *bridge = pcibr_soft->bs_base; - cpuid_t cpuvertex_to_cpuid(devfs_handle_t vhdl); - bit = wrap->iw_intr; + bit = wrap->iw_ibit; - if (pcibr_soft->bs_xbridge) { + PCIBR_DEBUG((PCIBR_DEBUG_INTR, pcibr_soft->bs_vhdl, + "pcibr_force_interrupt: bit=0x%x\n", bit)); + + if (IS_XBRIDGE_OR_PIC_SOFT(pcibr_soft)) { bridge->b_force_pin[bit].intr = 1; } else if ((1 << bit) & *wrap->iw_stat) { cpuid_t cpu; @@ -187,11 +192,10 @@ pcibr_soft->bs_intr[bit].bsi_xtalk_intr; intr_bit = (short) xtalk_intr_vector_get(xtalk_intr); - cpu = cpuvertex_to_cpuid(xtalk_intr_cpu_get(xtalk_intr)); -#if defined(CONFIG_IA64_SGI_SN1) + cpu = xtalk_intr_cpuid_get(xtalk_intr); REMOTE_CPU_SEND_INTR(cpu, intr_bit); -#endif } +#endif /* PIC_LATER */ } /*ARGSUSED */ @@ -202,12 +206,11 @@ devfs_handle_t owner_dev) { pcibr_info_t pcibr_info = pcibr_info_get(pconn_vhdl); - pciio_slot_t pciio_slot = pcibr_info->f_slot; + pciio_slot_t pciio_slot = PCIBR_INFO_SLOT_GET_INT(pcibr_info); pcibr_soft_t pcibr_soft = (pcibr_soft_t) pcibr_info->f_mfast; devfs_handle_t xconn_vhdl = pcibr_soft->bs_conn; bridge_t *bridge = pcibr_soft->bs_base; int is_threaded = 0; - int thread_swlevel; xtalk_intr_t *xtalk_intr_p; pcibr_intr_t *pcibr_intr_p; @@ -222,41 +225,32 @@ pcibr_intr_list_t intr_list; bridgereg_t int_dev; -#if DEBUG && INTR_DEBUG - printk("%v: pcibr_intr_alloc\n" - "%v:%s%s%s%s%s\n", - owner_dev, pconn_vhdl, - !(lines & 15) ? " No INTs?" : "", - lines & 1 ? " INTA" : "", - lines & 2 ? " INTB" : "", - lines & 4 ? " INTC" : "", - lines & 8 ? " INTD" : ""); -#endif + + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_INTR_ALLOC, pconn_vhdl, + "pcibr_intr_alloc: %s%s%s%s%s\n", + !(lines & 15) ? " No INTs?" : "", + lines & 1 ? " INTA" : "", + lines & 2 ? " INTB" : "", + lines & 4 ? " INTC" : "", + lines & 8 ? " INTD" : "")); NEW(pcibr_intr); if (!pcibr_intr) return NULL; - if (dev_desc) { - cpuid_t intr_target_from_desc(device_desc_t, int); - } else { - extern int default_intr_pri; - - is_threaded = 1; /* PCI interrupts are threaded, by default */ - thread_swlevel = default_intr_pri; - } - pcibr_intr->bi_dev = pconn_vhdl; pcibr_intr->bi_lines = lines; pcibr_intr->bi_soft = pcibr_soft; pcibr_intr->bi_ibits = 0; /* bits will be added below */ + pcibr_intr->bi_func = 0; /* unset until connect */ + pcibr_intr->bi_arg = 0; /* unset until connect */ pcibr_intr->bi_flags = is_threaded ? 0 : PCIIO_INTR_NOTHREAD; pcibr_intr->bi_mustruncpu = CPU_NONE; pcibr_intr->bi_ibuf.ib_in = 0; pcibr_intr->bi_ibuf.ib_out = 0; mutex_spinlock_init(&pcibr_intr->bi_ibuf.ib_lock); - - pcibr_int_bits = pcibr_soft->bs_intr_bits((pciio_info_t)pcibr_info, lines); + pcibr_int_bits = pcibr_soft->bs_intr_bits((pciio_info_t)pcibr_info, lines, + PCIBR_NUM_SLOTS(pcibr_soft)); /* @@ -265,9 +259,8 @@ * to, and make sure there are xtalk resources * allocated for it. */ -#if DEBUG && INTR_DEBUG - printk("pcibr_int_bits: 0x%X\n", pcibr_int_bits); -#endif + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_INTR_ALLOC, pconn_vhdl, + "pcibr_intr_alloc: pcibr_int_bits: 0x%x\n", pcibr_int_bits)); for (pcibr_int_bit = 0; pcibr_int_bit < 8; pcibr_int_bit ++) { if (pcibr_int_bits & (1 << pcibr_int_bit)) { xtalk_intr_p = &pcibr_soft->bs_intr[pcibr_int_bit].bsi_xtalk_intr; @@ -282,10 +275,9 @@ * ordering problems with DMA, completion interrupts, and error * interrupts. (Use of xconn_vhdl forces this.) * - * 2) On IP35, addressing constraints on IP35 and Bridge force + * 2) On SN1, addressing constraints on SN1 and Bridge force * us to use a single PI number for all interrupts from a - * single Bridge. (IP35-specific code forces this, and we - * verify in pcibr_setwidint.) + * single Bridge. (SN1-specific code forces this). */ /* @@ -298,9 +290,9 @@ */ xtalk_intr = xtalk_intr_alloc_nothd(xconn_vhdl, dev_desc, owner_dev); -#if DEBUG && INTR_DEBUG - printk("%v: xtalk_intr=0x%X\n", xconn_vhdl, xtalk_intr); -#endif + + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_INTR_ALLOC, pconn_vhdl, + "pcibr_intr_alloc: xtalk_intr=0x%x\n", xtalk_intr)); /* both an assert and a runtime check on this: * we need to check in non-DEBUG kernels, and @@ -338,10 +330,9 @@ int_dev |= pciio_slot << BRIDGE_INT_DEV_SHFT(pcibr_int_bit); bridge->b_int_device = int_dev; /* XXXMP */ -#if DEBUG && INTR_DEBUG - printk("%v: bridge intr bit %d clears my wrb\n", - pconn_vhdl, pcibr_int_bit); -#endif + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_INTR_ALLOC, pconn_vhdl, + "bridge intr bit %d clears my wrb\n", + pcibr_int_bit)); } else { /* someone else got one allocated first; * free the one we just created, and @@ -373,25 +364,17 @@ intr_entry->il_wrbf = &(bridge->b_wr_req_buf[pciio_slot].reg); intr_list_p = &pcibr_soft->bs_intr[pcibr_int_bit].bsi_pcibr_intr_wrap.iw_list; -#if DEBUG && INTR_DEBUG -#if defined(SUPPORT_PRINTING_V_FORMAT) - printk("0x%x: Bridge bit %d wrap=0x%x\n", - pconn_vhdl, pcibr_int_bit, - pcibr_soft->bs_intr[pcibr_int_bit].bsi_pcibr_intr_wrap); -#else - printk("%v: Bridge bit %d wrap=0x%x\n", - pconn_vhdl, pcibr_int_bit, - pcibr_soft->bs_intr[pcibr_int_bit].bsi_pcibr_intr_wrap); -#endif -#endif + + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_INTR_ALLOC, pconn_vhdl, + "Bridge bit 0x%x wrap=0x%x\n", pcibr_int_bit, + pcibr_soft->bs_intr[pcibr_int_bit].bsi_pcibr_intr_wrap)); if (compare_and_swap_ptr((void **) intr_list_p, NULL, intr_entry)) { /* we are the first interrupt on this bridge bit. */ -#if DEBUG && INTR_DEBUG - printk("%v INT 0x%x (bridge bit %d) allocated [FIRST]\n", - pconn_vhdl, pcibr_int_bits, pcibr_int_bit); -#endif + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_INTR_ALLOC, pconn_vhdl, + "INT 0x%x (bridge bit %d) allocated [FIRST]\n", + pcibr_int_bits, pcibr_int_bit)); continue; } intr_list = *intr_list_p; @@ -402,10 +385,9 @@ * don't need our intr_entry. */ DEL(intr_entry); -#if DEBUG && INTR_DEBUG - printk("%v INT 0x%x (bridge bit %d) replaces erased first\n", - pconn_vhdl, pcibr_int_bits, pcibr_int_bit); -#endif + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_INTR_ALLOC, pconn_vhdl, + "INT 0x%x (bridge bit %d) replaces erased first\n", + pcibr_int_bits, pcibr_int_bit)); continue; } intr_list_p = &intr_list->il_next; @@ -413,10 +395,9 @@ /* we are the new second interrupt on this bit. */ pcibr_soft->bs_intr[pcibr_int_bit].bsi_pcibr_intr_wrap.iw_shared = 1; -#if DEBUG && INTR_DEBUG - printk("%v INT 0x%x (bridge bit %d) is new SECOND\n", - pconn_vhdl, pcibr_int_bits, pcibr_int_bit); -#endif + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_INTR_ALLOC, pconn_vhdl, + "INT 0x%x (bridge bit %d) is new SECOND\n", + pcibr_int_bits, pcibr_int_bit)); continue; } while (1) { @@ -427,20 +408,19 @@ * don't need our intr_entry. */ DEL(intr_entry); -#if DEBUG && INTR_DEBUG - printk("%v INT 0x%x (bridge bit %d) replaces erased Nth\n", - pconn_vhdl, pcibr_int_bits, pcibr_int_bit); -#endif + + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_INTR_ALLOC, pconn_vhdl, + "INT 0x%x (bridge bit %d) replaces erase Nth\n", + pcibr_int_bits, pcibr_int_bit)); break; } intr_list_p = &intr_list->il_next; if (compare_and_swap_ptr((void **) intr_list_p, NULL, intr_entry)) { /* entry appended to share list */ -#if DEBUG && INTR_DEBUG - printk("%v INT 0x%x (bridge bit %d) is new Nth\n", - pconn_vhdl, pcibr_int_bits, pcibr_int_bit); -#endif + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_INTR_ALLOC, pconn_vhdl, + "INT 0x%x (bridge bit %d) is new Nth\n", + pcibr_int_bits, pcibr_int_bit)); break; } /* step to next record in chain @@ -479,10 +459,11 @@ if (compare_and_swap_ptr((void **) &intr_list->il_intr, pcibr_intr, NULL)) { -#if DEBUG && INTR_DEBUG - printk("%s: cleared a handler from bit %d\n", - pcibr_soft->bs_name, pcibr_int_bit); -#endif + + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_INTR_ALLOC, + pcibr_intr->bi_dev, + "pcibr_intr_free: cleared hdlr from bit 0x%x\n", + pcibr_int_bit)); } /* If this interrupt line is not being shared between multiple * devices release the xtalk interrupt resources. @@ -515,34 +496,49 @@ void pcibr_setpciint(xtalk_intr_t xtalk_intr) { - iopaddr_t addr = xtalk_intr_addr_get(xtalk_intr); - xtalk_intr_vector_t vect = xtalk_intr_vector_get(xtalk_intr); - bridgereg_t *int_addr = (bridgereg_t *) - xtalk_intr_sfarg_get(xtalk_intr); - - *int_addr = ((BRIDGE_INT_ADDR_HOST & (addr >> 30)) | - (BRIDGE_INT_ADDR_FLD & vect)); + iopaddr_t addr; + xtalk_intr_vector_t vect; + devfs_handle_t vhdl; + bridge_t *bridge; + + addr = xtalk_intr_addr_get(xtalk_intr); + vect = xtalk_intr_vector_get(xtalk_intr); + vhdl = xtalk_intr_dev_get(xtalk_intr); + bridge = (bridge_t *)xtalk_piotrans_addr(vhdl, 0, 0, sizeof(bridge_t), 0); + + if (is_pic(bridge)) { + picreg_t *int_addr; + int_addr = (picreg_t *)xtalk_intr_sfarg_get(xtalk_intr); + *int_addr = ((PIC_INT_ADDR_FLD & ((uint64_t)vect << 48)) | + (PIC_INT_ADDR_HOST & addr)); + } else { + bridgereg_t *int_addr; + int_addr = (bridgereg_t *)xtalk_intr_sfarg_get(xtalk_intr); + *int_addr = ((BRIDGE_INT_ADDR_HOST & (addr >> 30)) | + (BRIDGE_INT_ADDR_FLD & vect)); + } } /*ARGSUSED */ int -pcibr_intr_connect(pcibr_intr_t pcibr_intr) +pcibr_intr_connect(pcibr_intr_t pcibr_intr, intr_func_t intr_func, intr_arg_t intr_arg) { pcibr_soft_t pcibr_soft = pcibr_intr->bi_soft; bridge_t *bridge = pcibr_soft->bs_base; unsigned pcibr_int_bits = pcibr_intr->bi_ibits; unsigned pcibr_int_bit; - bridgereg_t b_int_enable; + uint64_t int_enable; unsigned long s; if (pcibr_intr == NULL) return -1; -#if DEBUG && INTR_DEBUG - printk("%v: pcibr_intr_connect\n", - pcibr_intr->bi_dev); -#endif + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_INTR_ALLOC, pcibr_intr->bi_dev, + "pcibr_intr_connect: intr_func=0x%x\n", + pcibr_intr)); + pcibr_intr->bi_func = intr_func; + pcibr_intr->bi_arg = intr_arg; *((volatile unsigned *)&pcibr_intr->bi_flags) |= PCIIO_INTR_CONNECTED; /* @@ -553,9 +549,12 @@ */ for (pcibr_int_bit = 0; pcibr_int_bit < 8; pcibr_int_bit++) if (pcibr_int_bits & (1 << pcibr_int_bit)) { + pcibr_intr_wrap_t intr_wrap; xtalk_intr_t xtalk_intr; + void *int_addr; xtalk_intr = pcibr_soft->bs_intr[pcibr_int_bit].bsi_xtalk_intr; + intr_wrap = &pcibr_soft->bs_intr[pcibr_int_bit].bsi_pcibr_intr_wrap; /* * If this interrupt line is being shared and the connect has @@ -569,21 +568,43 @@ * Use the pcibr wrapper function to handle all Bridge interrupts * regardless of whether the interrupt line is shared or not. */ - xtalk_intr_connect(xtalk_intr, (xtalk_intr_setfunc_t) pcibr_setpciint, - (void *)&(bridge->b_int_addr[pcibr_int_bit].addr)); + if (IS_PIC_SOFT(pcibr_soft)) + int_addr = (void *)&(bridge->p_int_addr_64[pcibr_int_bit]); + else + int_addr = (void *)&(bridge->b_int_addr[pcibr_int_bit].addr); + + xtalk_intr_connect(xtalk_intr, pcibr_intr_func, (intr_arg_t) intr_wrap, + (xtalk_intr_setfunc_t) pcibr_setpciint, + (void *)int_addr); + pcibr_soft->bs_intr[pcibr_int_bit].bsi_pcibr_intr_wrap.iw_connected = 1; -#if DEBUG && INTR_DEBUG - printk("%v bridge bit %d wrapper connected\n", - pcibr_intr->bi_dev, pcibr_int_bit); -#endif + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_INTR_ALLOC, pcibr_intr->bi_dev, + "pcibr_setpciint: int_addr=0x%x, *int_addr=0x%x, " + "pcibr_int_bit=0x%x\n", int_addr, + (is_pic(bridge) ? + *(picreg_t *)int_addr : *(bridgereg_t *)int_addr), + pcibr_int_bit)); } - s = pcibr_lock(pcibr_soft); - b_int_enable = bridge->b_int_enable; - b_int_enable |= pcibr_int_bits; - bridge->b_int_enable = b_int_enable; - bridge->b_wid_tflush; /* wait until Bridge PIO complete */ - pcibr_unlock(pcibr_soft, s); + + /* PIC WAR. PV# 854697 + * On PIC we must write 64-bit MMRs with 64-bit stores + */ + s = pcibr_lock(pcibr_soft); + if (IS_PIC_SOFT(pcibr_soft) && + PCIBR_WAR_ENABLED(PV854697, pcibr_soft)) { + int_enable = bridge->p_int_enable_64; + int_enable |= pcibr_int_bits; + bridge->p_int_enable_64 = int_enable; + } else { + bridgereg_t int_enable; + + int_enable = bridge->b_int_enable; + int_enable |= pcibr_int_bits; + bridge->b_int_enable = int_enable; + } + bridge->b_wid_tflush; /* wait until Bridge PIO complete */ + pcibr_unlock(pcibr_soft, s); return 0; } @@ -596,13 +617,15 @@ bridge_t *bridge = pcibr_soft->bs_base; unsigned pcibr_int_bits = pcibr_intr->bi_ibits; unsigned pcibr_int_bit; - bridgereg_t b_int_enable; + pcibr_intr_wrap_t intr_wrap; + uint64_t int_enable; unsigned long s; /* Stop calling the function. Now. */ *((volatile unsigned *)&pcibr_intr->bi_flags) &= ~PCIIO_INTR_CONNECTED; - + pcibr_intr->bi_func = 0; + pcibr_intr->bi_arg = 0; /* * For each PCI interrupt line requested, figure * out which Bridge PCI Interrupt Line it maps @@ -619,15 +642,30 @@ if (!pcibr_int_bits) return; + /* PIC WAR. PV# 854697 + * On PIC we must write 64-bit MMRs with 64-bit stores + */ s = pcibr_lock(pcibr_soft); - b_int_enable = bridge->b_int_enable; - b_int_enable &= ~pcibr_int_bits; - bridge->b_int_enable = b_int_enable; + if (IS_PIC_SOFT(pcibr_soft) && PCIBR_WAR_ENABLED(PV854697, pcibr_soft)) { + int_enable = bridge->p_int_enable_64; + int_enable &= ~pcibr_int_bits; + bridge->p_int_enable_64 = int_enable; + } else { + int_enable = (uint64_t)bridge->b_int_enable; + int_enable &= ~pcibr_int_bits; + bridge->b_int_enable = (bridgereg_t)int_enable; + } bridge->b_wid_tflush; /* wait until Bridge PIO complete */ pcibr_unlock(pcibr_soft, s); + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_INTR_ALLOC, pcibr_intr->bi_dev, + "pcibr_intr_disconnect: disabled int_bits=0x%x\n", + pcibr_int_bits)); + for (pcibr_int_bit = 0; pcibr_int_bit < 8; pcibr_int_bit++) if (pcibr_int_bits & (1 << pcibr_int_bit)) { + void *int_addr; + /* if the interrupt line is now shared, * do not disconnect it. */ @@ -637,10 +675,9 @@ xtalk_intr_disconnect(pcibr_soft->bs_intr[pcibr_int_bit].bsi_xtalk_intr); pcibr_soft->bs_intr[pcibr_int_bit].bsi_pcibr_intr_wrap.iw_connected = 0; -#if DEBUG && INTR_DEBUG - printk("%s: xtalk disconnect done for Bridge bit %d\n", - pcibr_soft->bs_name, pcibr_int_bit); -#endif + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_INTR_ALLOC, pcibr_intr->bi_dev, + "pcibr_intr_disconnect: disconnect int_bits=0x%x\n", + pcibr_int_bits)); /* if we are sharing the interrupt line, * connect us up; this closes the hole @@ -650,9 +687,22 @@ if (!pcibr_soft->bs_intr[pcibr_int_bit].bsi_pcibr_intr_wrap.iw_shared) continue; + intr_wrap = &pcibr_soft->bs_intr[pcibr_int_bit].bsi_pcibr_intr_wrap; + if (!pcibr_soft->bs_intr[pcibr_int_bit].bsi_pcibr_intr_wrap.iw_shared) + continue; + + if (IS_PIC_SOFT(pcibr_soft)) + int_addr = (void *)&(bridge->p_int_addr_64[pcibr_int_bit]); + else + int_addr = (void *)&(bridge->b_int_addr[pcibr_int_bit].addr); + xtalk_intr_connect(pcibr_soft->bs_intr[pcibr_int_bit].bsi_xtalk_intr, + pcibr_intr_func, (intr_arg_t) intr_wrap, (xtalk_intr_setfunc_t)pcibr_setpciint, - (void *) &(bridge->b_int_addr[pcibr_int_bit].addr)); + (void *)pcibr_int_bit); + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_INTR_ALLOC, pcibr_intr->bi_dev, + "pcibr_intr_disconnect: now-sharing int_bits=0x%x\n", + pcibr_int_bit)); } } @@ -729,6 +779,10 @@ bridge->b_wid_int_upper = NEW_b_wid_int_upper; bridge->b_wid_int_lower = NEW_b_wid_int_lower; bridge->b_int_host_err = vect; + +printk("pcibr_setwidint: b_wid_int_upper 0x%x b_wid_int_lower 0x%x b_int_host_err 0x%x\n", + NEW_b_wid_int_upper, NEW_b_wid_int_lower, vect); + } /* @@ -752,6 +806,9 @@ XTALK_ADDR_TO_UPPER(addr)); bridge->b_wid_int_lower = XTALK_ADDR_TO_LOWER(addr); bridge->b_int_host_err = vect; +printk("pcibr_xintr_preset: b_wid_int_upper 0x%lx b_wid_int_lower 0x%lx b_int_host_err 0x%x\n", + ( (0x000F0000 & (targ << 16)) | XTALK_ADDR_TO_UPPER(addr)), + XTALK_ADDR_TO_LOWER(addr), vect); /* turn on all interrupts except * the PCI interrupt requests, @@ -794,12 +851,37 @@ { pcibr_intr_wrap_t wrap = (pcibr_intr_wrap_t) arg; reg_p wrbf; + intr_func_t func; pcibr_intr_t intr; pcibr_intr_list_t list; int clearit; int do_nonthreaded = 1; int is_threaded = 0; int x = 0; + pcibr_soft_t pcibr_soft = wrap->iw_soft; + bridge_t *bridge = pcibr_soft->bs_base; + uint64_t p_enable = pcibr_soft->bs_int_enable; + int bit = wrap->iw_ibit; + + /* + * PIC WAR. PV#855272 + * Early attempt at a workaround for the runaway + * interrupt problem. Briefly disable the enable bit for + * this device. + */ + if (IS_PIC_SOFT(pcibr_soft) && + PCIBR_WAR_ENABLED(PV855272, pcibr_soft)) { + unsigned s; + + /* disable-enable interrupts for this bridge pin */ + + p_enable &= ~(1 << bit); + s = pcibr_lock(pcibr_soft); + bridge->p_int_enable_64 = p_enable; + p_enable |= (1 << bit); + bridge->p_int_enable_64 = p_enable; + pcibr_unlock(pcibr_soft, s); + } /* * If any handler is still running from a previous interrupt @@ -821,35 +903,31 @@ clearit = 1; while (do_nonthreaded) { for (list = wrap->iw_list; list != NULL; list = list->il_next) { - if ((intr = list->il_intr) && - (intr->bi_flags & PCIIO_INTR_CONNECTED)) { + if ((intr = list->il_intr) && (intr->bi_flags & PCIIO_INTR_CONNECTED)) { - /* - * This device may have initiated write - * requests since the bridge last saw - * an edge on this interrupt input; flushing - * the buffer prior to invoking the handler - * should help but may not be sufficient if we - * get more requests after the flush, followed - * by the card deciding it wants service, before - * the interrupt handler checks to see if things need - * to be done. - * - * There is a similar race condition if - * an interrupt handler loops around and - * notices further service is required. - * Perhaps we need to have an explicit - * call that interrupt handlers need to - * do between noticing that DMA to memory - * has completed, but before observing the - * contents of memory? - */ - - if ((do_nonthreaded) && (!is_threaded)) { - /* Non-threaded. - * Call the interrupt handler at interrupt level - */ + /* + * This device may have initiated write + * requests since the bridge last saw + * an edge on this interrupt input; flushing + * the buffer prior to invoking the handler + * should help but may not be sufficient if we + * get more requests after the flush, followed + * by the card deciding it wants service, before + * the interrupt handler checks to see if things need + * to be done. + * + * There is a similar race condition if + * an interrupt handler loops around and + * notices further service is required. + * Perhaps we need to have an explicit + * call that interrupt handlers need to + * do between noticing that DMA to memory + * has completed, but before observing the + * contents of memory? + */ + if ((do_nonthreaded) && (!is_threaded)) { + /* Non-threaded - Call the interrupt handler at interrupt level */ /* Only need to flush write buffers if sharing */ if ((wrap->iw_shared) && (wrbf = list->il_wrbf)) { @@ -864,21 +942,23 @@ (void *)list->il_intr->bi_dev, (long) wrbf); #endif } + func = intr->bi_func; + if ( func ) + func(intr->bi_arg); } - clearit = 0; } } + do_nonthreaded = 0; - do_nonthreaded = 0; - /* - * If the non-threaded handler was the last to complete, - * (i.e., no threaded handlers still running) force an - * interrupt to avoid a potential deadlock situation. - */ - if (wrap->iw_hdlrcnt == 0) { - pcibr_force_interrupt(wrap); - } + /* + * If the non-threaded handler was the last to complete, + * (i.e., no threaded handlers still running) force an + * interrupt to avoid a potential deadlock situation. + */ + if (wrap->iw_hdlrcnt == 0) { + pcibr_force_interrupt(wrap); + } } /* If there were no handlers, @@ -892,14 +972,24 @@ if (clearit) { pcibr_soft_t pcibr_soft = wrap->iw_soft; bridge_t *bridge = pcibr_soft->bs_base; - bridgereg_t b_int_enable; - bridgereg_t mask = 1 << wrap->iw_intr; + bridgereg_t int_enable; + bridgereg_t mask = 1 << wrap->iw_ibit; unsigned long s; + /* PIC BRINUGP WAR (PV# 854697): + * On PIC we must write 64-bit MMRs with 64-bit stores + */ s = pcibr_lock(pcibr_soft); - b_int_enable = bridge->b_int_enable; - b_int_enable &= ~mask; - bridge->b_int_enable = b_int_enable; + if (IS_PIC_SOFT(pcibr_soft) && + PCIBR_WAR_ENABLED(PV854697, pcibr_soft)) { + int_enable = bridge->p_int_enable_64; + int_enable &= ~mask; + bridge->p_int_enable_64 = int_enable; + } else { + int_enable = (uint64_t)bridge->b_int_enable; + int_enable &= ~mask; + bridge->b_int_enable = (bridgereg_t)int_enable; + } bridge->b_wid_tflush; /* wait until Bridge PIO complete */ pcibr_unlock(pcibr_soft, s); return; diff -Nru a/arch/ia64/sn/io/sn2/pcibr/pcibr_rrb.c b/arch/ia64/sn/io/sn2/pcibr/pcibr_rrb.c --- a/arch/ia64/sn/io/sn2/pcibr/pcibr_rrb.c Mon Dec 23 21:22:01 2002 +++ b/arch/ia64/sn/io/sn2/pcibr/pcibr_rrb.c Mon Dec 23 21:22:01 2002 @@ -33,259 +33,478 @@ void do_pcibr_rrb_clear(bridge_t *, int); void do_pcibr_rrb_flush(bridge_t *, int); -int do_pcibr_rrb_count_valid(bridge_t *, pciio_slot_t); +int do_pcibr_rrb_count_valid(bridge_t *, pciio_slot_t, int); int do_pcibr_rrb_count_avail(bridge_t *, pciio_slot_t); -int do_pcibr_rrb_alloc(bridge_t *, pciio_slot_t, int); -int do_pcibr_rrb_free(bridge_t *, pciio_slot_t, int); +int do_pcibr_rrb_alloc(bridge_t *, pciio_slot_t, int, int); +int do_pcibr_rrb_free(bridge_t *, pciio_slot_t, int, int); +void do_pcibr_rrb_free_all(pcibr_soft_t, bridge_t *, pciio_slot_t); -void do_pcibr_rrb_autoalloc(pcibr_soft_t, int, int); +void do_pcibr_rrb_autoalloc(pcibr_soft_t, int, int, int); int pcibr_wrb_flush(devfs_handle_t); int pcibr_rrb_alloc(devfs_handle_t, int *, int *); int pcibr_rrb_check(devfs_handle_t, int *, int *, int *, int *); -int pcibr_alloc_all_rrbs(devfs_handle_t, int, int, int, int, int, int, int, int, int); void pcibr_rrb_flush(devfs_handle_t); int pcibr_slot_initial_rrb_alloc(devfs_handle_t,pciio_slot_t); -/* - * RRB Management - */ - -#define LSBIT(word) ((word) &~ ((word)-1)) - -void -do_pcibr_rrb_clear(bridge_t *bridge, int rrb) -{ - bridgereg_t status; - - /* bridge_lock must be held; - * this RRB must be disabled. - */ - - /* wait until RRB has no outstanduing XIO packets. */ - while ((status = bridge->b_resp_status) & BRIDGE_RRB_INUSE(rrb)) { - ; /* XXX- beats on bridge. bad idea? */ - } - - /* if the RRB has data, drain it. */ - if (status & BRIDGE_RRB_VALID(rrb)) { - bridge->b_resp_clear = BRIDGE_RRB_CLEAR(rrb); - - /* wait until RRB is no longer valid. */ - while ((status = bridge->b_resp_status) & BRIDGE_RRB_VALID(rrb)) { - ; /* XXX- beats on bridge. bad idea? */ - } - } -} - -void -do_pcibr_rrb_flush(bridge_t *bridge, int rrbn) -{ - reg_p rrbp = &bridge->b_rrb_map[rrbn & 1].reg; - bridgereg_t rrbv; - int shft = 4 * (rrbn >> 1); - unsigned ebit = BRIDGE_RRB_EN << shft; - - rrbv = *rrbp; - if (rrbv & ebit) - *rrbp = rrbv & ~ebit; - - do_pcibr_rrb_clear(bridge, rrbn); - - if (rrbv & ebit) - *rrbp = rrbv; -} +void pcibr_rrb_debug(char *, pcibr_soft_t); /* - * pcibr_rrb_count_valid: count how many RRBs are - * marked valid for the specified PCI slot on this - * bridge. - * - * NOTE: The "slot" parameter for all pcibr_rrb - * management routines must include the "virtual" - * bit; when manageing both the normal and the - * virtual channel, separate calls to these - * routines must be made. To denote the virtual - * channel, add PCIBR_RRB_SLOT_VIRTUAL to the slot - * number. - * - * IMPL NOTE: The obvious algorithm is to iterate - * through the RRB fields, incrementing a count if - * the RRB is valid and matches the slot. However, - * it is much simpler to use an algorithm derived - * from the "partitioned add" idea. First, XOR in a - * pattern such that the fields that match this - * slot come up "all ones" and all other fields - * have zeros in the mismatching bits. Then AND - * together the bits in the field, so we end up - * with one bit turned on for each field that - * matched. Now we need to count these bits. This - * can be done either with a series of shift/add - * instructions or by using "tmp % 15"; I expect - * that the cascaded shift/add will be faster. - */ - + * RRB Management + * + * All the do_pcibr_rrb_ routines manipulate the Read Response Buffer (rrb) + * registers within the Bridge. Two 32 registers (b_rrb_map[2] also known + * as the b_even_resp & b_odd_resp registers) are used to allocate the 16 + * rrbs to devices. The b_even_resp register represents even num devices, + * and b_odd_resp represent odd number devices. Each rrb is represented by + * 4-bits within a register. + * BRIDGE & XBRIDGE: 1 enable bit, 1 virtual channel bit, 2 device bits + * PIC: 1 enable bit, 2 virtual channel bits, 1 device bit + * PIC has 4 devices per bus, and 4 virtual channels (1 normal & 3 virtual) + * per device. BRIDGE & XBRIDGE have 8 devices per bus and 2 virtual + * channels (1 normal & 1 virtual) per device. See the BRIDGE and PIC ASIC + * Programmers Reference guides for more information. + */ + +#define RRB_MASK (0xf) /* mask a single rrb within reg */ +#define RRB_SIZE (4) /* sizeof rrb within reg (bits) */ + +#define RRB_ENABLE_BIT(bridge) (0x8) /* [BRIDGE | PIC]_RRB_EN */ +#define NUM_PDEV_BITS(bridge) (is_pic((bridge)) ? 1 : 2) +#define NUM_VDEV_BITS(bridge) (is_pic((bridge)) ? 2 : 1) +#define NUMBER_VCHANNELS(bridge) (is_pic((bridge)) ? 4 : 2) +#define SLOT_2_PDEV(bridge, slot) ((slot) >> 1) +#define SLOT_2_RRB_REG(bridge, slot) ((slot) & 0x1) + +/* validate that the slot and virtual channel are valid for a given bridge */ +#define VALIDATE_SLOT_n_VCHAN(bridge, s, v) \ + (is_pic((bridge)) ? \ + (((((s) != PCIIO_SLOT_NONE) && ((s) <= (pciio_slot_t)3)) && (((v) >= 0) && ((v) <= 3))) ? 1 : 0) : \ + (((((s) != PCIIO_SLOT_NONE) && ((s) <= (pciio_slot_t)7)) && (((v) >= 0) && ((v) <= 1))) ? 1 : 0)) + +/* + * Count how many RRBs are marked valid for the specified PCI slot + * and virtual channel. Return the count. + */ int do_pcibr_rrb_count_valid(bridge_t *bridge, - pciio_slot_t slot) + pciio_slot_t slot, + int vchan) { - bridgereg_t tmp; + bridgereg_t tmp; + uint16_t enable_bit, vchan_bits, pdev_bits, rrb_bits; + int rrb_index, cnt=0; + + if (!VALIDATE_SLOT_n_VCHAN(bridge, slot, vchan)) { + printk(KERN_WARNING "do_pcibr_rrb_count_valid() invalid slot/vchan [%d/%d]\n", slot, vchan); + return 0; + } + + enable_bit = RRB_ENABLE_BIT(bridge); + vchan_bits = vchan << NUM_PDEV_BITS(bridge); + pdev_bits = SLOT_2_PDEV(bridge, slot); + rrb_bits = enable_bit | vchan_bits | pdev_bits; + + if ( is_pic(bridge) ) { + tmp = bridge->b_rrb_map[SLOT_2_RRB_REG(bridge, slot)].reg; + } + else { + if (io_get_sh_swapper(NASID_GET(bridge))) { + tmp = BRIDGE_REG_GET32((&bridge->b_rrb_map[SLOT_2_RRB_REG(bridge, slot)].reg)); + } else { + tmp = bridge->b_rrb_map[SLOT_2_RRB_REG(bridge, slot)].reg; + } + } - tmp = bridge->b_rrb_map[slot & 1].reg; - tmp ^= 0x11111111 * (7 - slot / 2); - tmp &= (0xCCCCCCCC & tmp) >> 2; - tmp &= (0x22222222 & tmp) >> 1; - tmp += tmp >> 4; - tmp += tmp >> 8; - tmp += tmp >> 16; - return tmp & 15; + for (rrb_index = 0; rrb_index < 8; rrb_index++) { + if ((tmp & RRB_MASK) == rrb_bits) + cnt++; + tmp = (tmp >> RRB_SIZE); + } + return cnt; } - -/* - * do_pcibr_rrb_count_avail: count how many RRBs are - * available to be allocated for the specified slot. - * - * IMPL NOTE: similar to the above, except we are - * just counting how many fields have the valid bit - * turned off. - */ + + +/* + * Count how many RRBs are available to be allocated to the specified + * slot. Return the count. + */ int do_pcibr_rrb_count_avail(bridge_t *bridge, pciio_slot_t slot) { - bridgereg_t tmp; + bridgereg_t tmp; + uint16_t enable_bit; + int rrb_index, cnt=0; + + if (!VALIDATE_SLOT_n_VCHAN(bridge, slot, 0)) { + printk(KERN_WARNING "do_pcibr_rrb_count_avail() invalid slot/vchan"); + return 0; + } + + enable_bit = RRB_ENABLE_BIT(bridge); + + if ( is_pic(bridge) ) { + tmp = bridge->b_rrb_map[SLOT_2_RRB_REG(bridge, slot)].reg; + } + else { + if (io_get_sh_swapper(NASID_GET(bridge))) { + tmp = BRIDGE_REG_GET32((&bridge->b_rrb_map[SLOT_2_RRB_REG(bridge, slot)].reg)); + } else { + tmp = bridge->b_rrb_map[SLOT_2_RRB_REG(bridge, slot)].reg; + } + } - tmp = bridge->b_rrb_map[slot & 1].reg; - tmp = (0x88888888 & ~tmp) >> 3; - tmp += tmp >> 4; - tmp += tmp >> 8; - tmp += tmp >> 16; - return tmp & 15; + for (rrb_index = 0; rrb_index < 8; rrb_index++) { + if ((tmp & enable_bit) != enable_bit) + cnt++; + tmp = (tmp >> RRB_SIZE); + } + return cnt; } - -/* - * do_pcibr_rrb_alloc: allocate some additional RRBs - * for the specified slot. Returns -1 if there were - * insufficient free RRBs to satisfy the request, - * or 0 if the request was fulfilled. - * - * Note that if a request can be partially filled, - * it will be, even if we return failure. - * - * IMPL NOTE: again we avoid iterating across all - * the RRBs; instead, we form up a word containing - * one bit for each free RRB, then peel the bits - * off from the low end. - */ + + +/* + * Allocate some additional RRBs for the specified slot and the specified + * virtual channel. Returns -1 if there were insufficient free RRBs to + * satisfy the request, or 0 if the request was fulfilled. + * + * Note that if a request can be partially filled, it will be, even if + * we return failure. + */ int do_pcibr_rrb_alloc(bridge_t *bridge, pciio_slot_t slot, + int vchan, int more) { - int rv = 0; - bridgereg_t reg, tmp, bit; + bridgereg_t reg, tmp = (bridgereg_t)0; + uint16_t enable_bit, vchan_bits, pdev_bits, rrb_bits; + int rrb_index; + + if (!VALIDATE_SLOT_n_VCHAN(bridge, slot, vchan)) { + printk(KERN_WARNING "do_pcibr_rrb_alloc() invalid slot/vchan"); + return -1; + } + + enable_bit = RRB_ENABLE_BIT(bridge); + vchan_bits = vchan << NUM_PDEV_BITS(bridge); + pdev_bits = SLOT_2_PDEV(bridge, slot); + rrb_bits = enable_bit | vchan_bits | pdev_bits; + + if ( is_pic(bridge) ) { + reg = tmp = bridge->b_rrb_map[SLOT_2_RRB_REG(bridge, slot)].reg; + } + else { + if (io_get_sh_swapper(NASID_GET(bridge))) { + reg = tmp = BRIDGE_REG_GET32((&bridge->b_rrb_map[SLOT_2_RRB_REG(bridge, slot)].reg)); + } else { + reg = tmp = bridge->b_rrb_map[SLOT_2_RRB_REG(bridge, slot)].reg; + } + } + + for (rrb_index = 0; ((rrb_index < 8) && (more > 0)); rrb_index++) { + if ((tmp & enable_bit) != enable_bit) { + /* clear the rrb and OR in the new rrb into 'reg' */ + reg = reg & ~(RRB_MASK << (RRB_SIZE * rrb_index)); + reg = reg | (rrb_bits << (RRB_SIZE * rrb_index)); + more--; + } + tmp = (tmp >> RRB_SIZE); + } - reg = bridge->b_rrb_map[slot & 1].reg; - tmp = (0x88888888 & ~reg) >> 3; - while (more-- > 0) { - bit = LSBIT(tmp); - if (!bit) { - rv = -1; - break; + if ( is_pic(bridge) ) { + bridge->b_rrb_map[SLOT_2_RRB_REG(bridge, slot)].reg = reg; + } + else { + if (io_get_sh_swapper(NASID_GET(bridge))) { + BRIDGE_REG_SET32((&bridge->b_rrb_map[SLOT_2_RRB_REG(bridge, slot)].reg)) = reg; + } else { + bridge->b_rrb_map[SLOT_2_RRB_REG(bridge, slot)].reg = reg; } - tmp &= ~bit; - reg = ((reg & ~(bit * 15)) | (bit * (8 + slot / 2))); } - bridge->b_rrb_map[slot & 1].reg = reg; - return rv; + return (more ? -1 : 0); } - -/* - * do_pcibr_rrb_free: release some of the RRBs that - * have been allocated for the specified - * slot. Returns zero for success, or negative if - * it was unable to free that many RRBs. - * - * IMPL NOTE: We form up a bit for each RRB - * allocated to the slot, aligned with the VALID - * bitfield this time; then we peel bits off one at - * a time, releasing the corresponding RRB. - */ + + +/* + * Release some of the RRBs that have been allocated for the specified + * slot. Returns zero for success, or negative if it was unable to free + * that many RRBs. + * + * Note that if a request can be partially fulfilled, it will be, even + * if we return failure. + */ int do_pcibr_rrb_free(bridge_t *bridge, pciio_slot_t slot, + int vchan, int less) { - int rv = 0; - bridgereg_t reg, tmp, clr, bit; - int i; + bridgereg_t reg, tmp = (bridgereg_t)0, clr = 0; + uint16_t enable_bit, vchan_bits, pdev_bits, rrb_bits; + int rrb_index; + + if (!VALIDATE_SLOT_n_VCHAN(bridge, slot, vchan)) { + printk(KERN_WARNING "do_pcibr_rrb_free() invalid slot/vchan"); + return -1; + } + + enable_bit = RRB_ENABLE_BIT(bridge); + vchan_bits = vchan << NUM_PDEV_BITS(bridge); + pdev_bits = SLOT_2_PDEV(bridge, slot); + rrb_bits = enable_bit | vchan_bits | pdev_bits; + + if ( is_pic(bridge) ) { + reg = tmp = bridge->b_rrb_map[SLOT_2_RRB_REG(bridge, slot)].reg; + } + else { + if (io_get_sh_swapper(NASID_GET(bridge))) { + reg = BRIDGE_REG_GET32((&bridge->b_rrb_map[SLOT_2_RRB_REG(bridge, slot)].reg)); + } else { + reg = tmp = bridge->b_rrb_map[SLOT_2_RRB_REG(bridge, slot)].reg; + } + } + + for (rrb_index = 0; ((rrb_index < 8) && (less > 0)); rrb_index++) { + if ((tmp & RRB_MASK) == rrb_bits) { + /* + * the old do_pcibr_rrb_free() code only clears the enable bit + * but I say we should clear the whole rrb (ie): + * reg = reg & ~(RRB_MASK << (RRB_SIZE * rrb_index)); + * But to be compatable with old code we'll only clear enable. + */ + reg = reg & ~(RRB_ENABLE_BIT(bridge) << (RRB_SIZE * rrb_index)); + clr = clr | (enable_bit << (RRB_SIZE * rrb_index)); + less--; + } + tmp = (tmp >> RRB_SIZE); + } - clr = 0; - reg = bridge->b_rrb_map[slot & 1].reg; + if ( is_pic(bridge) ) { + bridge->b_rrb_map[SLOT_2_RRB_REG(bridge, slot)].reg = reg; + } + else { + if (io_get_sh_swapper(NASID_GET(bridge))) { + BRIDGE_REG_SET32((&bridge->b_rrb_map[SLOT_2_RRB_REG(bridge, slot)].reg)) = reg; + } else { + bridge->b_rrb_map[SLOT_2_RRB_REG(bridge, slot)].reg = reg; + } + } - /* This needs to be done otherwise the rrb's on the virtual channel - * for this slot won't be freed !! + /* call do_pcibr_rrb_clear() for all the rrbs we've freed */ + for (rrb_index = 0; rrb_index < 8; rrb_index++) { + int evn_odd = SLOT_2_RRB_REG(bridge, slot); + if (clr & (enable_bit << (RRB_SIZE * rrb_index))) + do_pcibr_rrb_clear(bridge, (2 * rrb_index) + evn_odd); + } + + return (less ? -1 : 0); +} + + +/* + * free all the rrbs (both the normal and virtual channels) for the + * specified slot. + */ +void +do_pcibr_rrb_free_all(pcibr_soft_t pcibr_soft, + bridge_t *bridge, + pciio_slot_t slot) +{ + int vchan; + int vchan_total = NUMBER_VCHANNELS(bridge); + + /* pretend we own all 8 rrbs and just ignore the return value */ + for (vchan = 0; vchan < vchan_total; vchan++) { + (void)do_pcibr_rrb_free(bridge, slot, vchan, 8); + pcibr_soft->bs_rrb_valid[slot][vchan] = 0; + } +} + + +/* + * Wait for the the specified rrb to have no outstanding XIO pkts + * and for all data to be drained. Mark the rrb as no longer being + * valid. + */ +void +do_pcibr_rrb_clear(bridge_t *bridge, int rrb) +{ + bridgereg_t status; + + /* bridge_lock must be held; + * this RRB must be disabled. */ - tmp = reg & 0xbbbbbbbb; - tmp ^= (0x11111111 * (7 - slot / 2)); - tmp &= (0x33333333 & tmp) << 2; - tmp &= (0x44444444 & tmp) << 1; - while (less-- > 0) { - bit = LSBIT(tmp); - if (!bit) { - rv = -1; - break; + if ( is_pic(bridge) ) { + /* wait until RRB has no outstanduing XIO packets. */ + while ((status = bridge->b_resp_status) & BRIDGE_RRB_INUSE(rrb)) { + ; /* XXX- beats on bridge. bad idea? */ + } + + /* if the RRB has data, drain it. */ + if (status & BRIDGE_RRB_VALID(rrb)) { + bridge->b_resp_clear = BRIDGE_RRB_CLEAR(rrb); + + /* wait until RRB is no longer valid. */ + while ((status = bridge->b_resp_status) & BRIDGE_RRB_VALID(rrb)) { + ; /* XXX- beats on bridge. bad idea? */ + } + } + } + else { + if (io_get_sh_swapper(NASID_GET(bridge))) { + while ((status = BRIDGE_REG_GET32((&bridge->b_resp_status))) & BRIDGE_RRB_INUSE(rrb)) { + ; /* XXX- beats on bridge. bad idea? */ + } + + /* if the RRB has data, drain it. */ + if (status & BRIDGE_RRB_VALID(rrb)) { + BRIDGE_REG_SET32((&bridge->b_resp_clear)) = __swab32(BRIDGE_RRB_CLEAR(rrb)); + + /* wait until RRB is no longer valid. */ + while ((status = BRIDGE_REG_GET32((&bridge->b_resp_status))) & BRIDGE_RRB_VALID(rrb)) { + ; /* XXX- beats on bridge. bad idea? */ + } + } + } else { /* io_get_sh_swapper(NASID_GET(bridge)) */ + while ((status = bridge->b_resp_status) & BRIDGE_RRB_INUSE(rrb)) { + ; /* XXX- beats on bridge. bad idea? */ + } + + /* if the RRB has data, drain it. */ + if (status & BRIDGE_RRB_VALID(rrb)) { + bridge->b_resp_clear = BRIDGE_RRB_CLEAR(rrb); + /* wait until RRB is no longer valid. */ + while ((status = bridge->b_resp_status) & BRIDGE_RRB_VALID(rrb)) { + ; /* XXX- beats on bridge. bad idea? */ + } + } + } + } +} + + +/* + * Flush the specified rrb by calling do_pcibr_rrb_clear(). This + * routine is just a wrapper to make sure the rrb is disabled + * before calling do_pcibr_rrb_clear(). + */ +void +do_pcibr_rrb_flush(bridge_t *bridge, int rrbn) +{ + reg_p rrbp = &bridge->b_rrb_map[rrbn & 1].reg; + bridgereg_t rrbv; + int shft = (RRB_SIZE * (rrbn >> 1)); + unsigned long ebit = RRB_ENABLE_BIT(bridge) << shft; + + if ( is_pic(bridge) ) { + rrbv = *rrbp; + } + else { + if (io_get_sh_swapper(NASID_GET(bridge))) { + rrbv = BRIDGE_REG_GET32((&rrbp)); + } else { + rrbv = *rrbp; + } + } + + if (rrbv & ebit) { + if ( is_pic(bridge) ) { + *rrbp = rrbv & ~ebit; + } + else { + if (io_get_sh_swapper(NASID_GET(bridge))) { + BRIDGE_REG_SET32((&rrbp)) = __swab32((rrbv & ~ebit)); + } else { + *rrbp = rrbv & ~ebit; + } } - tmp &= ~bit; - reg &= ~bit; - clr |= bit; } - bridge->b_rrb_map[slot & 1].reg = reg; - for (i = 0; i < 8; i++) - if (clr & (8 << (4 * i))) - do_pcibr_rrb_clear(bridge, (2 * i) + (slot & 1)); + do_pcibr_rrb_clear(bridge, rrbn); - return rv; + if (rrbv & ebit) { + if ( is_pic(bridge) ) { + *rrbp = rrbv; + } + else { + if (io_get_sh_swapper(NASID_GET(bridge))) { + BRIDGE_REG_SET32((&rrbp)) = __swab32(rrbv); + } else { + *rrbp = rrbv; + } + } + } } + void do_pcibr_rrb_autoalloc(pcibr_soft_t pcibr_soft, int slot, + int vchan, int more_rrbs) { bridge_t *bridge = pcibr_soft->bs_base; int got; for (got = 0; got < more_rrbs; ++got) { - if (pcibr_soft->bs_rrb_res[slot & 7] > 0) - pcibr_soft->bs_rrb_res[slot & 7]--; + if (pcibr_soft->bs_rrb_res[slot] > 0) + pcibr_soft->bs_rrb_res[slot]--; else if (pcibr_soft->bs_rrb_avail[slot & 1] > 0) pcibr_soft->bs_rrb_avail[slot & 1]--; else break; - if (do_pcibr_rrb_alloc(bridge, slot, 1) < 0) + if (do_pcibr_rrb_alloc(bridge, slot, vchan, 1) < 0) break; -#if PCIBR_RRB_DEBUG - printk("do_pcibr_rrb_autoalloc: add one to slot %d%s\n", - slot & 7, slot & 8 ? "v" : ""); -#endif - pcibr_soft->bs_rrb_valid[slot]++; - } -#if PCIBR_RRB_DEBUG - printk("%s: %d+%d free RRBs. Allocation list:\n", pcibr_soft->bs_name, - pcibr_soft->bs_rrb_avail[0], - pcibr_soft->bs_rrb_avail[1]); - for (slot = 0; slot < 8; ++slot) - printk("\t%d+%d+%d", - 0xFFF & pcibr_soft->bs_rrb_valid[slot], - 0xFFF & pcibr_soft->bs_rrb_valid[slot + PCIBR_RRB_SLOT_VIRTUAL], - pcibr_soft->bs_rrb_res[slot]); - printk("\n"); -#endif + + pcibr_soft->bs_rrb_valid[slot][vchan]++; + } + + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_RRB, pcibr_soft->bs_vhdl, + "do_pcibr_rrb_autoalloc: added %d (of %d requested) RRBs " + "to slot %d, vchan %d\n", got, more_rrbs, + PCIBR_DEVICE_TO_SLOT(pcibr_soft, slot), vchan)); + + pcibr_rrb_debug("do_pcibr_rrb_autoalloc", pcibr_soft); } + +/* + * Flush all the rrb's assigned to the specified connection point. + */ +void +pcibr_rrb_flush(devfs_handle_t pconn_vhdl) +{ + pciio_info_t pciio_info = pciio_info_get(pconn_vhdl); + pcibr_soft_t pcibr_soft = (pcibr_soft_t)pciio_info_mfast_get(pciio_info); + pciio_slot_t slot = PCIBR_INFO_SLOT_GET_INT(pciio_info); + bridge_t *bridge = pcibr_soft->bs_base; + + bridgereg_t tmp; + uint16_t enable_bit, pdev_bits, rrb_bits, rrb_mask; + int rrb_index; + unsigned long s; + + enable_bit = RRB_ENABLE_BIT(bridge); + pdev_bits = SLOT_2_PDEV(bridge, slot); + rrb_bits = enable_bit | pdev_bits; + rrb_mask = enable_bit | ((NUM_PDEV_BITS(bridge) << 1) - 1); + + tmp = bridge->b_rrb_map[SLOT_2_RRB_REG(bridge, slot)].reg; + + s = pcibr_lock(pcibr_soft); + for (rrb_index = 0; rrb_index < 8; rrb_index++) { + int evn_odd = SLOT_2_RRB_REG(bridge, slot); + if ((tmp & rrb_mask) == rrb_bits) + do_pcibr_rrb_flush(bridge, (2 * rrb_index) + evn_odd); + tmp = (tmp >> RRB_SIZE); + } + pcibr_unlock(pcibr_soft, s); +} + + /* * Device driver interface to flush the write buffers for a specified * device hanging off the bridge. @@ -294,14 +513,24 @@ pcibr_wrb_flush(devfs_handle_t pconn_vhdl) { pciio_info_t pciio_info = pciio_info_get(pconn_vhdl); - pciio_slot_t pciio_slot = pciio_info_slot_get(pciio_info); + pciio_slot_t pciio_slot = PCIBR_INFO_SLOT_GET_INT(pciio_info); pcibr_soft_t pcibr_soft = (pcibr_soft_t) pciio_info_mfast_get(pciio_info); bridge_t *bridge = pcibr_soft->bs_base; volatile bridgereg_t *wrb_flush; wrb_flush = &(bridge->b_wr_req_buf[pciio_slot].reg); - while (*wrb_flush); - + if ( IS_PIC_SOFT(pcibr_soft) ) { + while (*wrb_flush) + ; + } + else { + if (io_get_sh_swapper(NASID_GET(bridge))) { + while (BRIDGE_REG_GET32((wrb_flush))); + } else { + while (*wrb_flush) + ; + } + } return(0); } @@ -322,7 +551,7 @@ int *count_vchan1) { pciio_info_t pciio_info = pciio_info_get(pconn_vhdl); - pciio_slot_t pciio_slot = pciio_info_slot_get(pciio_info); + pciio_slot_t pciio_slot = PCIBR_INFO_SLOT_GET_INT(pciio_info); pcibr_soft_t pcibr_soft = (pcibr_soft_t) pciio_info_mfast_get(pciio_info); bridge_t *bridge = pcibr_soft->bs_base; int desired_vchan0; @@ -335,7 +564,9 @@ int final_vchan1; int avail_rrbs; int res_rrbs; - unsigned long s; + int vchan_total; + int vchan; + unsigned long s; int error; /* @@ -352,20 +583,21 @@ s = pcibr_lock(pcibr_soft); + vchan_total = NUMBER_VCHANNELS(bridge); + /* Save the boot-time RRB configuration for this slot */ - if (pcibr_soft->bs_rrb_valid_dflt[pciio_slot] < 0) { - pcibr_soft->bs_rrb_valid_dflt[pciio_slot] = - pcibr_soft->bs_rrb_valid[pciio_slot]; - pcibr_soft->bs_rrb_valid_dflt[pciio_slot + PCIBR_RRB_SLOT_VIRTUAL] = - pcibr_soft->bs_rrb_valid[pciio_slot + PCIBR_RRB_SLOT_VIRTUAL]; + if (pcibr_soft->bs_rrb_valid_dflt[pciio_slot][VCHAN0] < 0) { + for (vchan = 0; vchan < vchan_total; vchan++) + pcibr_soft->bs_rrb_valid_dflt[pciio_slot][vchan] = + pcibr_soft->bs_rrb_valid[pciio_slot][vchan]; pcibr_soft->bs_rrb_res_dflt[pciio_slot] = pcibr_soft->bs_rrb_res[pciio_slot]; } /* How many RRBs do we own? */ - orig_vchan0 = pcibr_soft->bs_rrb_valid[pciio_slot]; - orig_vchan1 = pcibr_soft->bs_rrb_valid[pciio_slot + PCIBR_RRB_SLOT_VIRTUAL]; + orig_vchan0 = pcibr_soft->bs_rrb_valid[pciio_slot][VCHAN0]; + orig_vchan1 = pcibr_soft->bs_rrb_valid[pciio_slot][VCHAN1]; /* How many RRBs do we want? */ desired_vchan0 = count_vchan0 ? *count_vchan0 : orig_vchan0; @@ -417,14 +649,14 @@ /* Commit the allocations: free, then alloc. */ if (delta_vchan0 < 0) - (void) do_pcibr_rrb_free(bridge, pciio_slot, -delta_vchan0); + (void) do_pcibr_rrb_free(bridge, pciio_slot, VCHAN0, -delta_vchan0); if (delta_vchan1 < 0) - (void) do_pcibr_rrb_free(bridge, PCIBR_RRB_SLOT_VIRTUAL + pciio_slot, -delta_vchan1); + (void) do_pcibr_rrb_free(bridge, pciio_slot, VCHAN1, -delta_vchan1); if (delta_vchan0 > 0) - (void) do_pcibr_rrb_alloc(bridge, pciio_slot, delta_vchan0); + (void) do_pcibr_rrb_alloc(bridge, pciio_slot, VCHAN0, delta_vchan0); if (delta_vchan1 > 0) - (void) do_pcibr_rrb_alloc(bridge, PCIBR_RRB_SLOT_VIRTUAL + pciio_slot, delta_vchan1); + (void) do_pcibr_rrb_alloc(bridge, pciio_slot, VCHAN1, delta_vchan1); /* Return final values to caller. */ @@ -442,8 +674,8 @@ * number of available RRBs. */ - pcibr_soft->bs_rrb_valid[pciio_slot] = final_vchan0; - pcibr_soft->bs_rrb_valid[pciio_slot + PCIBR_RRB_SLOT_VIRTUAL] = final_vchan1; + pcibr_soft->bs_rrb_valid[pciio_slot][VCHAN0] = final_vchan0; + pcibr_soft->bs_rrb_valid[pciio_slot][VCHAN1] = final_vchan1; pcibr_soft->bs_rrb_avail[pciio_slot & 1] = pcibr_soft->bs_rrb_avail[pciio_slot & 1] + pcibr_soft->bs_rrb_res[pciio_slot] @@ -455,34 +687,21 @@ * Reserve enough RRBs so this slot's RRB configuration can be * reset to its boot-time default following a hot-plug shut-down */ - res_rrbs = (pcibr_soft->bs_rrb_valid_dflt[pciio_slot] - - pcibr_soft->bs_rrb_valid[pciio_slot]) - + (pcibr_soft->bs_rrb_valid_dflt[pciio_slot + - PCIBR_RRB_SLOT_VIRTUAL] - - pcibr_soft->bs_rrb_valid[pciio_slot + - PCIBR_RRB_SLOT_VIRTUAL]) - + (pcibr_soft->bs_rrb_res_dflt[pciio_slot] - - pcibr_soft->bs_rrb_res[pciio_slot]); - - if (res_rrbs > 0) { - pcibr_soft->bs_rrb_res[pciio_slot] = res_rrbs; - pcibr_soft->bs_rrb_avail[pciio_slot & 1] = - pcibr_soft->bs_rrb_avail[pciio_slot & 1] - - res_rrbs; - } - -#if PCIBR_RRB_DEBUG - printk("pcibr_rrb_alloc: slot %d set to %d+%d; %d+%d free\n", - pciio_slot, final_vchan0, final_vchan1, - pcibr_soft->bs_rrb_avail[0], - pcibr_soft->bs_rrb_avail[1]); - for (pciio_slot = 0; pciio_slot < 8; ++pciio_slot) - printk("\t%d+%d+%d", - 0xFFF & pcibr_soft->bs_rrb_valid[pciio_slot], - 0xFFF & pcibr_soft->bs_rrb_valid[pciio_slot + PCIBR_RRB_SLOT_VIRTUAL], + res_rrbs = (pcibr_soft->bs_rrb_res_dflt[pciio_slot] - pcibr_soft->bs_rrb_res[pciio_slot]); - printk("\n"); -#endif + for (vchan = 0; vchan < vchan_total; vchan++) { + res_rrbs += (pcibr_soft->bs_rrb_valid_dflt[pciio_slot][vchan] - + pcibr_soft->bs_rrb_valid[pciio_slot][vchan]); + } + + if (res_rrbs > 0) { + pcibr_soft->bs_rrb_res[pciio_slot] = res_rrbs; + pcibr_soft->bs_rrb_avail[pciio_slot & 1] = + pcibr_soft->bs_rrb_avail[pciio_slot & 1] + - res_rrbs; + } + + pcibr_rrb_debug("pcibr_rrb_alloc", pcibr_soft); error = 0; } @@ -543,22 +762,22 @@ pciio_info_t pciio_info; pciio_slot_t pciio_slot; pcibr_soft_t pcibr_soft; - unsigned long s; + unsigned long s; int error = -1; if ((pciio_info = pciio_info_get(pconn_vhdl)) && (pcibr_soft = (pcibr_soft_t) pciio_info_mfast_get(pciio_info)) && - ((pciio_slot = pciio_info_slot_get(pciio_info)) < 8)) { + ((pciio_slot = PCIBR_INFO_SLOT_GET_INT(pciio_info)) < PCIBR_NUM_SLOTS(pcibr_soft))) { s = pcibr_lock(pcibr_soft); if (count_vchan0) *count_vchan0 = - pcibr_soft->bs_rrb_valid[pciio_slot]; + pcibr_soft->bs_rrb_valid[pciio_slot][VCHAN0]; if (count_vchan1) *count_vchan1 = - pcibr_soft->bs_rrb_valid[pciio_slot + PCIBR_RRB_SLOT_VIRTUAL]; + pcibr_soft->bs_rrb_valid[pciio_slot][VCHAN1]; if (count_reserved) *count_reserved = @@ -575,159 +794,6 @@ return error; } -/* pcibr_alloc_all_rrbs allocates all the rrbs available in the quantities - * requested for each of the devices. The evn_odd argument indicates whether - * allocation is for the odd or even rrbs. The next group of four argument - * pairs indicate the amount of rrbs to be assigned to each device. The first - * argument of each pair indicate the total number of rrbs to allocate for that - * device. The second argument of each pair indicates how many rrb's from the - * first argument should be assigned to the virtual channel. The total of all - * of the first arguments should be <= 8. The second argument should be <= the - * first argument. - * if even_odd = 0 the devices in order are 0, 2, 4, 6 - * if even_odd = 1 the devices in order are 1, 3, 5, 7 - * returns 0 if no errors else returns -1 - */ - -int -pcibr_alloc_all_rrbs(devfs_handle_t vhdl, int even_odd, - int dev_1_rrbs, int virt1, int dev_2_rrbs, int virt2, - int dev_3_rrbs, int virt3, int dev_4_rrbs, int virt4) -{ - devfs_handle_t pcibr_vhdl; - pcibr_soft_t pcibr_soft = (pcibr_soft_t)0; - bridge_t *bridge = NULL; - - uint32_t rrb_setting = 0; - int rrb_shift = 7; - uint32_t cur_rrb; - int dev_rrbs[4]; - int virt[4]; - int i, j; - unsigned long s; - - if (GRAPH_SUCCESS == - hwgraph_traverse(vhdl, EDGE_LBL_PCI, &pcibr_vhdl)) { - pcibr_soft = pcibr_soft_get(pcibr_vhdl); - if (pcibr_soft) - bridge = pcibr_soft->bs_base; - hwgraph_vertex_unref(pcibr_vhdl); - } - if (bridge == NULL) - bridge = (bridge_t *) xtalk_piotrans_addr - (vhdl, NULL, 0, sizeof(bridge_t), 0); - - even_odd &= 1; - - dev_rrbs[0] = dev_1_rrbs; - dev_rrbs[1] = dev_2_rrbs; - dev_rrbs[2] = dev_3_rrbs; - dev_rrbs[3] = dev_4_rrbs; - - virt[0] = virt1; - virt[1] = virt2; - virt[2] = virt3; - virt[3] = virt4; - - if ((dev_1_rrbs + dev_2_rrbs + dev_3_rrbs + dev_4_rrbs) > 8) { - return -1; - } - if ((dev_1_rrbs < 0) || (dev_2_rrbs < 0) || (dev_3_rrbs < 0) || (dev_4_rrbs < 0)) { - return -1; - } - /* walk through rrbs */ - for (i = 0; i < 4; i++) { - if (virt[i]) { - for( j = 0; j < virt[i]; j++) { - cur_rrb = i | 0xc; - cur_rrb = cur_rrb << (rrb_shift * 4); - rrb_shift--; - rrb_setting = rrb_setting | cur_rrb; - dev_rrbs[i] = dev_rrbs[i] - 1; - } - } - for (j = 0; j < dev_rrbs[i]; j++) { - cur_rrb = i | 0x8; - cur_rrb = cur_rrb << (rrb_shift * 4); - rrb_shift--; - rrb_setting = rrb_setting | cur_rrb; - } - } - - if (pcibr_soft) - s = pcibr_lock(pcibr_soft); - - bridge->b_rrb_map[even_odd].reg = rrb_setting; - - if (pcibr_soft) { - - pcibr_soft->bs_rrb_fixed |= 0x55 << even_odd; - - /* since we've "FIXED" the allocations - * for these slots, we probably can dispense - * with tracking avail/res/valid data, but - * keeping it up to date helps debugging. - */ - - pcibr_soft->bs_rrb_avail[even_odd] = - 8 - (dev_1_rrbs + dev_2_rrbs + dev_3_rrbs + dev_4_rrbs); - - pcibr_soft->bs_rrb_res[even_odd + 0] = 0; - pcibr_soft->bs_rrb_res[even_odd + 2] = 0; - pcibr_soft->bs_rrb_res[even_odd + 4] = 0; - pcibr_soft->bs_rrb_res[even_odd + 6] = 0; - - pcibr_soft->bs_rrb_valid[even_odd + 0] = dev_1_rrbs - virt1; - pcibr_soft->bs_rrb_valid[even_odd + 2] = dev_2_rrbs - virt2; - pcibr_soft->bs_rrb_valid[even_odd + 4] = dev_3_rrbs - virt3; - pcibr_soft->bs_rrb_valid[even_odd + 6] = dev_4_rrbs - virt4; - - pcibr_soft->bs_rrb_valid[even_odd + 0 + PCIBR_RRB_SLOT_VIRTUAL] = virt1; - pcibr_soft->bs_rrb_valid[even_odd + 2 + PCIBR_RRB_SLOT_VIRTUAL] = virt2; - pcibr_soft->bs_rrb_valid[even_odd + 4 + PCIBR_RRB_SLOT_VIRTUAL] = virt3; - pcibr_soft->bs_rrb_valid[even_odd + 6 + PCIBR_RRB_SLOT_VIRTUAL] = virt4; - - pcibr_unlock(pcibr_soft, s); - } - return 0; -} - -/* - * pcibr_rrb_flush: chase down all the RRBs assigned - * to the specified connection point, and flush - * them. - */ -void -pcibr_rrb_flush(devfs_handle_t pconn_vhdl) -{ - pciio_info_t pciio_info = pciio_info_get(pconn_vhdl); - pcibr_soft_t pcibr_soft = (pcibr_soft_t) pciio_info_mfast_get(pciio_info); - pciio_slot_t pciio_slot = pciio_info_slot_get(pciio_info); - bridge_t *bridge = pcibr_soft->bs_base; - unsigned long s; - reg_p rrbp; - unsigned rrbm; - int i; - int rrbn; - unsigned sval; - unsigned mask; - - sval = BRIDGE_RRB_EN | (pciio_slot >> 1); - mask = BRIDGE_RRB_EN | BRIDGE_RRB_PDEV; - rrbn = pciio_slot & 1; - rrbp = &bridge->b_rrb_map[rrbn].reg; - - s = pcibr_lock(pcibr_soft); - rrbm = *rrbp; - for (i = 0; i < 8; ++i) { - if ((rrbm & mask) == sval) - do_pcibr_rrb_flush(bridge, rrbn); - rrbm >>= 4; - rrbn += 2; - } - pcibr_unlock(pcibr_soft, s); -} - /* * pcibr_slot_initial_rrb_alloc * Allocate a default number of rrbs for this slot on @@ -743,75 +809,82 @@ pcibr_info_h pcibr_infoh; pcibr_info_t pcibr_info; bridge_t *bridge; - int c0, c1, r; + int vchan_total; + int vchan; + int chan[4]; pcibr_soft = pcibr_soft_get(pcibr_vhdl); - if (!pcibr_soft || !PCIBR_VALID_SLOT(slot)) + if (!pcibr_soft) return(EINVAL); - bridge = pcibr_soft->bs_base; + if (!PCIBR_VALID_SLOT(pcibr_soft, slot)) + return(EINVAL); - /* How may RRBs are on this slot? - */ - c0 = do_pcibr_rrb_count_valid(bridge, slot); - c1 = do_pcibr_rrb_count_valid(bridge, slot + PCIBR_RRB_SLOT_VIRTUAL); + bridge = pcibr_soft->bs_base; -#if PCIBR_RRB_DEBUG - printk( + /* How many RRBs are on this slot? */ + vchan_total = NUMBER_VCHANNELS(bridge); + for (vchan = 0; vchan < vchan_total; vchan++) + chan[vchan] = do_pcibr_rrb_count_valid(bridge, slot, vchan); + + if (IS_PIC_SOFT(pcibr_soft)) { + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_RRB, pcibr_vhdl, + "pcibr_slot_initial_rrb_alloc: slot %d started with %d+%d+%d+%d\n", + PCIBR_DEVICE_TO_SLOT(pcibr_soft, slot), + chan[VCHAN0], chan[VCHAN1], chan[VCHAN2], chan[VCHAN3])); + } else { + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_RRB, pcibr_vhdl, "pcibr_slot_initial_rrb_alloc: slot %d started with %d+%d\n", - slot, c0, c1); -#endif + PCIBR_DEVICE_TO_SLOT(pcibr_soft, slot), + chan[VCHAN0], chan[VCHAN1])); + } /* Do we really need any? */ pcibr_infoh = pcibr_soft->bs_slot[slot].bss_infos; pcibr_info = pcibr_infoh[0]; - if ((pcibr_info->f_vendor == PCIIO_VENDOR_ID_NONE) && - !pcibr_soft->bs_slot[slot].has_host) { - if (c0 > 0) - do_pcibr_rrb_free(bridge, slot, c0); - if (c1 > 0) - do_pcibr_rrb_free(bridge, slot + PCIBR_RRB_SLOT_VIRTUAL, c1); - pcibr_soft->bs_rrb_valid[slot] = 0x1000; - pcibr_soft->bs_rrb_valid[slot + PCIBR_RRB_SLOT_VIRTUAL] = 0x1000; - return(ENODEV); - } - pcibr_soft->bs_rrb_avail[slot & 1] -= c0 + c1; - pcibr_soft->bs_rrb_valid[slot] = c0; - pcibr_soft->bs_rrb_valid[slot + PCIBR_RRB_SLOT_VIRTUAL] = c1; - - pcibr_soft->bs_rrb_avail[0] = do_pcibr_rrb_count_avail(bridge, 0); - pcibr_soft->bs_rrb_avail[1] = do_pcibr_rrb_count_avail(bridge, 1); + if (PCIBR_WAR_ENABLED(PV856866, pcibr_soft) && IS_PIC_SOFT(pcibr_soft) && + (slot == 2 || slot == 3) && + (pcibr_info->f_vendor == PCIIO_VENDOR_ID_NONE) && + !pcibr_soft->bs_slot[slot].has_host) { + + for (vchan = 0; vchan < 2; vchan++) { + do_pcibr_rrb_free(bridge, slot, vchan, 8); + pcibr_soft->bs_rrb_valid[slot][vchan] = 0; + } - r = 3 - (c0 + c1); + pcibr_soft->bs_rrb_valid[slot][3] = chan[3]; - if (r > 0) { - pcibr_soft->bs_rrb_res[slot] = r; - pcibr_soft->bs_rrb_avail[slot & 1] -= r; + return(ENODEV); } -#if PCIBR_RRB_DEBUG - printk("\t%d+%d+%d", - 0xFFF & pcibr_soft->bs_rrb_valid[slot], - 0xFFF & pcibr_soft->bs_rrb_valid[slot + PCIBR_RRB_SLOT_VIRTUAL], - pcibr_soft->bs_rrb_res[slot]); - printk("\n"); -#endif + for (vchan = 0; vchan < vchan_total; vchan++) + pcibr_soft->bs_rrb_valid[slot][vchan] = chan[vchan]; return(0); } +void +rrb_reserved_free(pcibr_soft_t pcibr_soft, int slot) +{ + int res = pcibr_soft->bs_rrb_res[slot]; + + if (res) { + pcibr_soft->bs_rrb_avail[slot & 1] += res; + pcibr_soft->bs_rrb_res[slot] = 0; + } +} + /* * pcibr_initial_rrb * Assign an equal total number of RRBs to all candidate slots, * where the total is the sum of the number of RRBs assigned to * the normal channel, the number of RRBs assigned to the virtual - * channel, and the number of RRBs assigned as reserved. + * channels, and the number of RRBs assigned as reserved. * - * A candidate slot is a populated slot on a non-SN1 system or - * any existing (populated or empty) slot on an SN1 system. + * A candidate slot is any existing (populated or empty) slot. * Empty SN1 slots need RRBs to support hot-plug operations. */ @@ -822,7 +895,9 @@ pcibr_soft_t pcibr_soft = pcibr_soft_get(pcibr_vhdl); bridge_t *bridge = pcibr_soft->bs_base; pciio_slot_t slot; - int c0, c1; + int rrb_total; + int vchan_total; + int vchan; int have[2][3]; int res[2]; int eo; @@ -831,16 +906,21 @@ have[1][0] = have[1][1] = have[1][2] = 0; res[0] = res[1] = 0; - for (slot = 0; slot < 8; ++slot) { + vchan_total = NUMBER_VCHANNELS(bridge); + + for (slot = pcibr_soft->bs_min_slot; + slot < PCIBR_NUM_SLOTS(pcibr_soft); ++slot) { /* Initial RRB management; give back RRBs in all non-existent slots */ (void) pcibr_slot_initial_rrb_alloc(pcibr_vhdl, slot); /* Base calculations only on existing slots */ if ((slot >= first) && (slot <= last)) { - c0 = pcibr_soft->bs_rrb_valid[slot]; - c1 = pcibr_soft->bs_rrb_valid[slot + PCIBR_RRB_SLOT_VIRTUAL]; - if ((c0 + c1) < 3) - have[slot & 1][c0 + c1]++; + rrb_total = 0; + for (vchan = 0; vchan < vchan_total; vchan++) + rrb_total += pcibr_soft->bs_rrb_valid[slot][vchan]; + + if (rrb_total < 3) + have[slot & 1][rrb_total]++; } } @@ -867,30 +947,70 @@ for (slot = first; slot <= last; ++slot) { int r; - c0 = pcibr_soft->bs_rrb_valid[slot]; - c1 = pcibr_soft->bs_rrb_valid[slot + PCIBR_RRB_SLOT_VIRTUAL]; - r = res[slot & 1] - (c0 + c1); + rrb_total = 0; + for (vchan = 0; vchan < vchan_total; vchan++) + rrb_total += pcibr_soft->bs_rrb_valid[slot][vchan]; + + r = res[slot & 1] - (rrb_total); if (r > 0) { pcibr_soft->bs_rrb_res[slot] = r; pcibr_soft->bs_rrb_avail[slot & 1] -= r; - } + } } -#if PCIBR_RRB_DEBUG - printk("%v RRB MANAGEMENT: %d+%d free\n", - pcibr_vhdl, - pcibr_soft->bs_rrb_avail[0], - pcibr_soft->bs_rrb_avail[1]); - for (slot = first; slot <= last; ++slot) - printk("\tslot %d: %d+%d+%d", slot, - 0xFFF & pcibr_soft->bs_rrb_valid[slot], - 0xFFF & pcibr_soft->bs_rrb_valid[slot + PCIBR_RRB_SLOT_VIRTUAL], - pcibr_soft->bs_rrb_res[slot]); - printk("\n"); -#endif + pcibr_rrb_debug("pcibr_initial_rrb", pcibr_soft); return 0; } +/* + * Dump the pcibr_soft_t RRB state variable + */ +void +pcibr_rrb_debug(char *calling_func, pcibr_soft_t pcibr_soft) +{ + pciio_slot_t slot; + char tmp_str[256]; + + if (pcibr_debug_mask & PCIBR_DEBUG_RRB) { + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_RRB, pcibr_soft->bs_vhdl, + "%s: rrbs available, even=%d, odd=%d\n", calling_func, + pcibr_soft->bs_rrb_avail[0], pcibr_soft->bs_rrb_avail[1])); + + if (IS_PIC_SOFT(pcibr_soft)) { + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_RRB, pcibr_soft->bs_vhdl, + "\tslot\tvchan0\tvchan1\tvchan2\tvchan3\treserved\n")); + } else { + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_RRB, pcibr_soft->bs_vhdl, + "\tslot\tvchan0\tvchan1\treserved\n")); + } + + for (slot=0; slot < PCIBR_NUM_SLOTS(pcibr_soft); slot++) { + /* + * The kernel only allows functions to have so many variable args, + * attempting to call PCIBR_DEBUG_ALWAYS() with more than 5 printf + * arguments fails so sprintf() it into a temporary string. + */ + if (IS_PIC_SOFT(pcibr_soft)) { + sprintf(tmp_str, "\t %d\t %d\t %d\t %d\t %d\t %d\n", + PCIBR_DEVICE_TO_SLOT(pcibr_soft, slot), + 0xFFF & pcibr_soft->bs_rrb_valid[slot][VCHAN0], + 0xFFF & pcibr_soft->bs_rrb_valid[slot][VCHAN1], + 0xFFF & pcibr_soft->bs_rrb_valid[slot][VCHAN2], + 0xFFF & pcibr_soft->bs_rrb_valid[slot][VCHAN3], + pcibr_soft->bs_rrb_res[slot]); + } else { + sprintf(tmp_str, "\t %d\t %d\t %d\t %d\n", + PCIBR_DEVICE_TO_SLOT(pcibr_soft, slot), + 0xFFF & pcibr_soft->bs_rrb_valid[slot][VCHAN0], + 0xFFF & pcibr_soft->bs_rrb_valid[slot][VCHAN1], + pcibr_soft->bs_rrb_res[slot]); + } + + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_RRB, pcibr_soft->bs_vhdl, + "%s", tmp_str)); + } + } +} diff -Nru a/arch/ia64/sn/io/sn2/pcibr/pcibr_slot.c b/arch/ia64/sn/io/sn2/pcibr/pcibr_slot.c --- a/arch/ia64/sn/io/sn2/pcibr/pcibr_slot.c Mon Dec 23 21:21:55 2002 +++ b/arch/ia64/sn/io/sn2/pcibr/pcibr_slot.c Mon Dec 23 21:21:55 2002 @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -30,70 +31,90 @@ #include #include #include +#include + +#ifdef __ia64 +#define rmallocmap atemapalloc +#define rmfreemap atemapfree +#define rmfree atefree +#define rmalloc atealloc +#endif + extern pcibr_info_t pcibr_info_get(devfs_handle_t); -extern int pcibr_widget_to_bus(int); +extern int pcibr_widget_to_bus(devfs_handle_t pcibr_vhdl); extern pcibr_info_t pcibr_device_info_new(pcibr_soft_t, pciio_slot_t, pciio_function_t, pciio_vendor_id_t, pciio_device_id_t); -extern void pcibr_freeblock_sub(iopaddr_t *, iopaddr_t *, iopaddr_t, size_t); extern int pcibr_slot_initial_rrb_alloc(devfs_handle_t,pciio_slot_t); -#if 0 -int pcibr_slot_reset(devfs_handle_t pcibr_vhdl, pciio_slot_t slot); -#endif +extern int pcibr_pcix_rbars_calc(pcibr_soft_t); int pcibr_slot_info_init(devfs_handle_t pcibr_vhdl, pciio_slot_t slot); int pcibr_slot_info_free(devfs_handle_t pcibr_vhdl, pciio_slot_t slot); int pcibr_slot_addr_space_init(devfs_handle_t pcibr_vhdl, pciio_slot_t slot); +int pcibr_slot_pcix_rbar_init(pcibr_soft_t pcibr_soft, pciio_slot_t slot); int pcibr_slot_device_init(devfs_handle_t pcibr_vhdl, pciio_slot_t slot); int pcibr_slot_guest_info_init(devfs_handle_t pcibr_vhdl, pciio_slot_t slot); int pcibr_slot_call_device_attach(devfs_handle_t pcibr_vhdl, pciio_slot_t slot, int drv_flags); int pcibr_slot_call_device_detach(devfs_handle_t pcibr_vhdl, pciio_slot_t slot, int drv_flags); -int pcibr_slot_detach(devfs_handle_t pcibr_vhdl, pciio_slot_t slot, int drv_flags); +int pcibr_slot_detach(devfs_handle_t pcibr_vhdl, pciio_slot_t slot, + int drv_flags, char *l1_msg, int *sub_errorp); int pcibr_is_slot_sys_critical(devfs_handle_t pcibr_vhdl, pciio_slot_t slot); -int pcibr_probe_slot(bridge_t *, cfg_p, unsigned int *); -void pcibr_device_info_free(devfs_handle_t, pciio_slot_t); -extern uint64_t do_pcibr_config_get(cfg_p, unsigned, unsigned); +static int pcibr_probe_slot(bridge_t *, cfg_p, unsigned int *); +void pcibr_device_info_free(devfs_handle_t, pciio_slot_t); +iopaddr_t pcibr_bus_addr_alloc(pcibr_soft_t, pciio_win_info_t, + pciio_space_t, int, int, int); +void pciibr_bus_addr_free(pcibr_soft_t, pciio_win_info_t); +cfg_p pcibr_find_capability(cfg_p, unsigned); +extern uint64_t do_pcibr_config_get(int, cfg_p, unsigned, unsigned); +void do_pcibr_config_set(int, cfg_p, unsigned, unsigned, uint64_t); -#ifdef LATER int pcibr_slot_attach(devfs_handle_t pcibr_vhdl, pciio_slot_t slot, int drv_flags, char *l1_msg, int *sub_errorp); -int pcibr_slot_pwr(devfs_handle_t, pciio_slot_t, int, char *); -int pcibr_slot_startup(devfs_handle_t, pcibr_slot_req_t); -int pcibr_slot_shutdown(devfs_handle_t, pcibr_slot_req_t); -void pcibr_slot_func_info_return(pcibr_info_h pcibr_infoh, int func, - pcibr_slot_func_info_resp_t funcp); + int pcibr_slot_info_return(pcibr_soft_t pcibr_soft, pciio_slot_t slot, pcibr_slot_info_resp_t respp); -int pcibr_slot_query(devfs_handle_t, pcibr_slot_req_t); -#endif /* LATER */ extern devfs_handle_t baseio_pci_vhdl; int scsi_ctlr_nums_add(devfs_handle_t, devfs_handle_t); + /* For now .... */ /* * PCI Hot-Plug Capability Flags + */ #define D_PCI_HOT_PLUG_ATTACH 0x200 /* Driver supports PCI hot-plug attach */ #define D_PCI_HOT_PLUG_DETACH 0x400 /* Driver supports PCI hot-plug detach */ +/* + * PCI-X Max Outstanding Split Transactions translation array and Max Memory + * Read Byte Count translation array, as defined in the PCI-X Specification. + * Section 7.2.3 & 7.2.4 of PCI-X Specification - rev 1.0 + */ +#define MAX_SPLIT_TABLE 8 +#define MAX_READCNT_TABLE 4 +int max_splittrans_to_numbuf[MAX_SPLIT_TABLE] = {1, 2, 3, 4, 8, 12, 16, 32}; +int max_readcount_to_bufsize[MAX_READCNT_TABLE] = {512, 1024, 2048, 4096 }; + + /*========================================================================== * BRIDGE PCI SLOT RELATED IOCTLs */ -#ifdef LATER - /* * pcibr_slot_startup * Software start-up the PCI slot. */ + +#ifdef PIC_LATER + int pcibr_slot_startup(devfs_handle_t pcibr_vhdl, pcibr_slot_req_t reqp) { pcibr_soft_t pcibr_soft = pcibr_soft_get(pcibr_vhdl); - pciio_slot_t slot = reqp->req_slot; + pciio_slot_t slot; int error = 0; char l1_msg[BRL1_QSIZE+1]; struct pcibr_slot_up_resp_s tmp_up_resp; @@ -103,17 +124,22 @@ return(PCI_NOT_A_BRIDGE); } + /* req_slot is the 'external' slot number, convert for internal use */ + slot = PCIBR_SLOT_TO_DEVICE(pcibr_soft, reqp->req_slot); + /* Do not allow start-up of a slot in a shoehorn */ if(nic_vertex_info_match(pcibr_soft->bs_conn, XTALK_PCI_PART_NUM)) { return(PCI_SLOT_IN_SHOEHORN); } /* Check for the valid slot */ - if (!PCIBR_VALID_SLOT(slot)) + if (!PCIBR_VALID_SLOT(pcibr_soft, slot)) return(PCI_NOT_A_SLOT); +#ifdef PIC_LATER /* Acquire update access to the bus */ mrlock(pcibr_soft->bs_bus_lock, MR_UPDATE, PZERO); +#endif if (pcibr_soft->bs_slot[slot].slot_status & SLOT_STARTUP_CMPLT) { error = PCI_SLOT_ALREADY_UP; @@ -132,9 +158,10 @@ startup_unlock: +#ifdef PIC_LATER /* Release the bus lock */ mrunlock(pcibr_soft->bs_bus_lock); - +#endif return(error); } @@ -147,7 +174,7 @@ { pcibr_soft_t pcibr_soft = pcibr_soft_get(pcibr_vhdl); bridge_t *bridge; - pciio_slot_t slot = reqp->req_slot; + pciio_slot_t slot; int error = 0; char l1_msg[BRL1_QSIZE+1]; struct pcibr_slot_down_resp_s tmp_down_resp; @@ -158,10 +185,13 @@ return(PCI_NOT_A_BRIDGE); } + /* req_slot is the 'external' slot number, convert for internal use */ + slot = PCIBR_SLOT_TO_DEVICE(pcibr_soft, reqp->req_slot); + bridge = pcibr_soft->bs_base; /* Check for valid slot */ - if (!PCIBR_VALID_SLOT(slot)) + if (!PCIBR_VALID_SLOT(pcibr_soft, slot)) return(PCI_NOT_A_SLOT); /* Do not allow shut-down of a slot in a shoehorn */ @@ -169,8 +199,10 @@ return(PCI_SLOT_IN_SHOEHORN); } +#ifdef PIC_LATER /* Acquire update access to the bus */ mrlock(pcibr_soft->bs_bus_lock, MR_UPDATE, PZERO); +#endif if ((pcibr_soft->bs_slot[slot].slot_status & SLOT_SHUTDOWN_CMPLT) || ((pcibr_soft->bs_slot[slot].slot_status & SLOT_STATUS_MASK) == 0)) { @@ -182,6 +214,13 @@ goto shutdown_unlock; } + /* Do not allow a multi-function card to be hot-plug removed */ + if (pcibr_soft->bs_slot[slot].bss_ninfo > 1) { + tmp_down_resp.resp_sub_errno = EPERM; + error = PCI_MULTI_FUNC_ERR; + goto shutdown_copyout; + } + /* Do not allow the last 33 MHz card to be removed */ if ((bridge->b_wid_control & BRIDGE_CTRL_BUS_SPEED_MASK) == BRIDGE_CTRL_BUS_SPEED_33) { @@ -204,17 +243,22 @@ strncpy(tmp_down_resp.resp_l1_msg, l1_msg, L1_QSIZE); tmp_down_resp.resp_l1_msg[L1_QSIZE] = '\0'; + shutdown_copyout: + if (COPYOUT(&tmp_down_resp, reqp->req_respp.down, reqp->req_size)) { return(EFAULT); } shutdown_unlock: +#ifdef PIC_LATER /* Release the bus lock */ mrunlock(pcibr_soft->bs_bus_lock); +#endif return(error); } +#endif /* PIC_LATER */ char *pci_space_name[] = {"NONE", "ROM", @@ -240,6 +284,7 @@ { pcibr_info_t pcibr_info = pcibr_infoh[func]; int win; + boolean_t is_sys_critical_vertex(devfs_handle_t); funcp->resp_f_status = 0; @@ -248,16 +293,19 @@ } funcp->resp_f_status |= FUNC_IS_VALID; +#if defined(SUPPORT_PRINTING_V_FORMAT) sprintf(funcp->resp_f_slot_name, "%v", pcibr_info->f_vertex); - +#endif if(is_sys_critical_vertex(pcibr_info->f_vertex)) { funcp->resp_f_status |= FUNC_IS_SYS_CRITICAL; } funcp->resp_f_bus = pcibr_info->f_bus; - funcp->resp_f_slot = pcibr_info->f_slot; + funcp->resp_f_slot = PCIBR_INFO_SLOT_GET_EXT(pcibr_info); funcp->resp_f_func = pcibr_info->f_func; +#if defined(SUPPORT_PRINTING_V_FORMAT) sprintf(funcp->resp_f_master_name, "%v", pcibr_info->f_master); +#endif funcp->resp_f_pops = pcibr_info->f_pops; funcp->resp_f_efunc = pcibr_info->f_efunc; funcp->resp_f_einfo = pcibr_info->f_einfo; @@ -297,20 +345,29 @@ reg_p b_respp; pcibr_slot_info_resp_t slotp; pcibr_slot_func_info_resp_t funcp; + boolean_t is_sys_critical_vertex(devfs_handle_t); + extern void snia_kmem_free(void *, int); - slotp = kmem_zalloc(sizeof(*slotp), KM_SLEEP); + slotp = snia_kmem_zalloc(sizeof(*slotp), 0); if (slotp == NULL) { return(ENOMEM); } pss = &pcibr_soft->bs_slot[slot]; + slotp->resp_bs_bridge_mode = pcibr_soft->bs_bridge_mode; + slotp->resp_bs_bridge_type = pcibr_soft->bs_bridge_type; + slotp->resp_has_host = pss->has_host; slotp->resp_host_slot = pss->host_slot; +#if defined(SUPPORT_PRINTING_V_FORMAT) sprintf(slotp->resp_slot_conn_name, "%v", pss->slot_conn); +#else + sprintf(slotp->resp_slot_conn_name, "%p", (void *)pss->slot_conn); +#endif slotp->resp_slot_status = pss->slot_status; - slotp->resp_l1_bus_num = io_path_map_widget(pcibr_soft->bs_vhdl); + slotp->resp_l1_bus_num = pcibr_widget_to_bus(pcibr_soft->bs_vhdl); if (is_sys_critical_vertex(pss->slot_conn)) { slotp->resp_slot_status |= SLOT_IS_SYS_CRITICAL; @@ -342,9 +399,10 @@ slotp->resp_bss_cmd_pointer = pss->bss_cmd_pointer; slotp->resp_bss_cmd_shadow = pss->bss_cmd_shadow; - slotp->resp_bs_rrb_valid = pcibr_soft->bs_rrb_valid[slot]; - slotp->resp_bs_rrb_valid_v = pcibr_soft->bs_rrb_valid[slot + - PCIBR_RRB_SLOT_VIRTUAL]; + slotp->resp_bs_rrb_valid = pcibr_soft->bs_rrb_valid[slot][VCHAN0]; + slotp->resp_bs_rrb_valid_v1 = pcibr_soft->bs_rrb_valid[slot][VCHAN1]; + slotp->resp_bs_rrb_valid_v2 = pcibr_soft->bs_rrb_valid[slot][VCHAN2]; + slotp->resp_bs_rrb_valid_v3 = pcibr_soft->bs_rrb_valid[slot][VCHAN3]; slotp->resp_bs_rrb_res = pcibr_soft->bs_rrb_res[slot]; if (slot & 1) { @@ -355,16 +413,21 @@ slotp->resp_b_resp = *b_respp; - slotp->resp_b_wid_control = bridge->b_wid_control; slotp->resp_b_int_device = bridge->b_int_device; - slotp->resp_b_int_enable = bridge->b_int_enable; - slotp->resp_b_int_host = bridge->b_int_addr[slot].addr; + + if (IS_PIC_SOFT(pcibr_soft)) { + slotp->resp_p_int_enable = bridge->p_int_enable_64; + slotp->resp_p_int_host = bridge->p_int_addr_64[slot]; + } else { + slotp->resp_b_int_enable = bridge->b_int_enable; + slotp->resp_b_int_host = bridge->b_int_addr[slot].addr; + } if (COPYOUT(slotp, respp, sizeof(*respp))) { return(EFAULT); } - kmem_free(slotp, sizeof(*slotp)); + snia_kmem_free(slotp, sizeof(*slotp)); return(0); } @@ -395,19 +458,26 @@ pcibr_slot_query(devfs_handle_t pcibr_vhdl, pcibr_slot_req_t reqp) { pcibr_soft_t pcibr_soft = pcibr_soft_get(pcibr_vhdl); - pciio_slot_t slot = reqp->req_slot; + pciio_slot_t slot; pciio_slot_t tmp_slot; pcibr_slot_info_resp_t respp = reqp->req_respp.query; int size = reqp->req_size; - int error; + int error = 0; /* Make sure that we are dealing with a bridge device vertex */ if (!pcibr_soft) { return(PCI_NOT_A_BRIDGE); } + /* req_slot is the 'external' slot number, convert for internal use */ + slot = PCIBR_SLOT_TO_DEVICE(pcibr_soft, reqp->req_slot); + + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_HOTPLUG, pcibr_vhdl, + "pcibr_slot_query: pcibr_soft=0x%x, slot=%d, reqp=0x%x\n", + pcibr_soft, slot, reqp)); + /* Make sure that we have a valid PCI slot number or PCIIO_SLOT_NONE */ - if ((!PCIBR_VALID_SLOT(slot)) && (slot != PCIIO_SLOT_NONE)) { + if ((!PCIBR_VALID_SLOT(pcibr_soft, slot)) && (slot != PCIIO_SLOT_NONE)) { return(PCI_NOT_A_SLOT); } @@ -422,32 +492,37 @@ return(PCI_RESP_AREA_TOO_SMALL); } +#ifdef PIC_LATER /* Acquire read access to the bus */ mrlock(pcibr_soft->bs_bus_lock, MR_ACCESS, PZERO); - +#endif error = pcibr_slot_info_return(pcibr_soft, slot, respp); +#ifdef PIC_LATER /* Release the bus lock */ mrunlock(pcibr_soft->bs_bus_lock); - +#endif return(error); } /* Return information for all the slots */ - for (tmp_slot = 0; tmp_slot < 8; tmp_slot++) { + for (tmp_slot = pcibr_soft->bs_min_slot; + tmp_slot < PCIBR_NUM_SLOTS(pcibr_soft); tmp_slot++) { if (size < sizeof(*respp)) { return(PCI_RESP_AREA_TOO_SMALL); } +#ifdef PIC_LATER /* Acquire read access to the bus */ mrlock(pcibr_soft->bs_bus_lock, MR_ACCESS, PZERO); - +#endif error = pcibr_slot_info_return(pcibr_soft, tmp_slot, respp); +#ifdef PCI_LATER /* Release the bus lock */ mrunlock(pcibr_soft->bs_bus_lock); - +#endif if (error) { return(error); } @@ -458,60 +533,92 @@ return(error); } -#endif /* LATER */ -/* FIXME: there should be a better way to do this. - * pcibr_attach() needs PCI_ADDR_SPACE_LIMITS_STORE +#if 0 +/* + * pcibr_slot_reset + * Reset the PCI device in the particular slot. + * + * The Xbridge does not comply with the PCI Specification + * when resetting an indiviaudl slot. An individual slot is + * is reset by toggling the slot's bit in the Xbridge Control + * Register. The Xbridge will assert the target slot's + * (non-bussed) RST signal, but does not assert the (bussed) + * REQ64 signal as required by the specification. As + * designed, the Xbridge cannot assert the REQ64 signal + * becuase it may interfere with a bus transaction in progress. + * The practical effects of this Xbridge implementation is + * device dependent; it probably will not adversely effect + * 32-bit cards, but may disable 64-bit data transfers by those + * cards that normally support 64-bit data transfers. + * + * The Xbridge will assert REQ64 when all four slots are reset + * by simultaneously toggling all four slot reset bits in the + * Xbridge Control Register. This is basically a PCI bus reset + * and asserting the (bussed) REQ64 signal will not interfere + * with any bus transactions in progress. + * + * The Xbridge (and the SN0 Bridge) support resetting only + * four PCI bus slots via the (X)bridge Control Register. + * + * To reset an individual slot for the PCI Hot-Plug feature + * use the L1 console commands to power-down and then + * power-up the slot, or use the kernel infrastructure + * functions to power-down/up the slot when they are + * implemented for SN1. */ +int +pcibr_slot_reset(devfs_handle_t pcibr_vhdl, pciio_slot_t slot) +{ + pcibr_soft_t pcibr_soft = pcibr_soft_get(pcibr_vhdl); + bridge_t *bridge; + bridgereg_t ctrlreg,tmp; + volatile bridgereg_t *wrb_flush; -/* - * PCI_ADDR_SPACE_LIMITS_LOAD - * Gets the current values of - * pci io base, - * pci io last, - * pci low memory base, - * pci low memory last, - * pci high memory base, - * pci high memory last - */ -#define PCI_ADDR_SPACE_LIMITS_LOAD() \ - pci_io_fb = pcibr_soft->bs_spinfo.pci_io_base; \ - pci_io_fl = pcibr_soft->bs_spinfo.pci_io_last; \ - pci_lo_fb = pcibr_soft->bs_spinfo.pci_swin_base; \ - pci_lo_fl = pcibr_soft->bs_spinfo.pci_swin_last; \ - pci_hi_fb = pcibr_soft->bs_spinfo.pci_mem_base; \ - pci_hi_fl = pcibr_soft->bs_spinfo.pci_mem_last; -/* - * PCI_ADDR_SPACE_LIMITS_STORE - * Sets the current values of - * pci io base, - * pci io last, - * pci low memory base, - * pci low memory last, - * pci high memory base, - * pci high memory last - */ -#define PCI_ADDR_SPACE_LIMITS_STORE() \ - pcibr_soft->bs_spinfo.pci_io_base = pci_io_fb; \ - pcibr_soft->bs_spinfo.pci_io_last = pci_io_fl; \ - pcibr_soft->bs_spinfo.pci_swin_base = pci_lo_fb; \ - pcibr_soft->bs_spinfo.pci_swin_last = pci_lo_fl; \ - pcibr_soft->bs_spinfo.pci_mem_base = pci_hi_fb; \ - pcibr_soft->bs_spinfo.pci_mem_last = pci_hi_fl; - -#define PCI_ADDR_SPACE_LIMITS_PRINT() \ - printf("+++++++++++++++++++++++\n" \ - "IO base 0x%x last 0x%x\n" \ - "SWIN base 0x%x last 0x%x\n" \ - "MEM base 0x%x last 0x%x\n" \ - "+++++++++++++++++++++++\n", \ - pcibr_soft->bs_spinfo.pci_io_base, \ - pcibr_soft->bs_spinfo.pci_io_last, \ - pcibr_soft->bs_spinfo.pci_swin_base, \ - pcibr_soft->bs_spinfo.pci_swin_last, \ - pcibr_soft->bs_spinfo.pci_mem_base, \ - pcibr_soft->bs_spinfo.pci_mem_last); + if (!pcibr_soft) + return(EINVAL); + + if (!PCIBR_VALID_SLOT(pcibr_soft, slot)) + return(EINVAL); + + /* Enable the DMA operations from this device of the xtalk widget + * (PCI host bridge in this case). + */ + xtalk_widgetdev_enable(pcibr_soft->bs_conn, slot); + + /* Set the reset slot bit in the bridge's wid control register + * to reset the PCI slot + */ + bridge = pcibr_soft->bs_base; + + /* Read the bridge widget control and clear out the reset pin + * bit for the corresponding slot. + */ + tmp = ctrlreg = bridge->b_wid_control; + + tmp &= ~BRIDGE_CTRL_RST_PIN(slot); + + bridge->b_wid_control = tmp; + tmp = bridge->b_wid_control; + + /* Restore the old control register back. + * NOTE : PCI card gets reset when the reset pin bit + * changes from 0 (set above) to 1 (going to be set now). + */ + + bridge->b_wid_control = ctrlreg; + /* Flush the write buffers if any !! */ + wrb_flush = &(bridge->b_wr_req_buf[slot].reg); + while (*wrb_flush); + + return(0); +} +#endif + +#define PROBE_LOCK 0 /* FIXME: we're attempting to lock around accesses + * to b_int_enable. This hangs pcibr_probe_slot() + */ /* * pcibr_slot_info_init @@ -534,12 +641,12 @@ pciio_vendor_id_t vendor; pciio_device_id_t device; unsigned htype; + unsigned lt_time; + int nbars; cfg_p wptr; + cfg_p pcix_cap; int win; pciio_space_t space; - iopaddr_t pci_io_fb, pci_io_fl; - iopaddr_t pci_lo_fb, pci_lo_fl; - iopaddr_t pci_hi_fb, pci_hi_fl; int nfunc; pciio_function_t rfunc; int func; @@ -552,7 +659,7 @@ return(EINVAL); bridge = pcibr_soft->bs_base; - if (!PCIBR_VALID_SLOT(slot)) + if (!PCIBR_VALID_SLOT(pcibr_soft, slot)) return(EINVAL); /* If we have a host slot (eg:- IOC3 has 2 PCI slots and the initialization @@ -566,28 +673,35 @@ if (pcibr_is_slot_sys_critical(pcibr_vhdl, slot)) return(EPERM); - /* Load the current values of allocated PCI address spaces */ - PCI_ADDR_SPACE_LIMITS_LOAD(); - /* Try to read the device-id/vendor-id from the config space */ - cfgw = bridge->b_type0_cfg_dev[slot].l; + cfgw = pcibr_slot_config_addr(bridge, slot, 0); +#if PROBE_LOCK + s = pcibr_lock(pcibr_soft); +#endif if (pcibr_probe_slot(bridge, cfgw, &idword)) return(ENODEV); +#if PROBE_LOCK + pcibr_unlock(pcibr_soft, s); +#endif slotp = &pcibr_soft->bs_slot[slot]; slotp->slot_status |= SLOT_POWER_UP; vendor = 0xFFFF & idword; + device = 0xFFFF & (idword >> 16); + + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_PROBE, pcibr_vhdl, + "pcibr_slot_info_init: slot=%d, vendor=0x%x, device=0x%x\n", + PCIBR_DEVICE_TO_SLOT(pcibr_soft, slot), vendor, device)); + /* If the vendor id is not valid then the slot is not populated * and we are done. */ if (vendor == 0xFFFF) return(ENODEV); - device = 0xFFFF & (idword >> 16); - htype = do_pcibr_config_get(cfgw, PCI_CFG_HEADER_TYPE, 1); - + htype = do_pcibr_config_get(IS_PIC_SOFT(pcibr_soft), cfgw, PCI_CFG_HEADER_TYPE, 1); nfunc = 1; rfunc = PCIIO_FUNC_NONE; pfail = 0; @@ -599,11 +713,17 @@ if (htype & 0x80) { /* MULTIFUNCTION */ for (func = 1; func < 8; ++func) { - cfgw = bridge->b_type0_cfg_dev[slot].f[func].l; + cfgw = pcibr_func_config_addr(bridge, 0, slot, func, 0); +#if PROBE_LOCK + s = pcibr_lock(pcibr_soft); +#endif if (pcibr_probe_slot(bridge, cfgw, &idwords[func])) { pfail |= 1 << func; continue; } +#if PROBE_LOCK + pcibr_unlock(pcibr_soft, s); +#endif vendor = 0xFFFF & idwords[func]; if (vendor == 0xFFFF) { pfail |= 1 << func; @@ -612,7 +732,7 @@ nfunc = func + 1; rfunc = 0; } - cfgw = bridge->b_type0_cfg_dev[slot].l; + cfgw = pcibr_slot_config_addr(bridge, slot, 0); } NEWA(pcibr_infoh, nfunc); @@ -627,39 +747,162 @@ continue; idword = idwords[func]; - cfgw = bridge->b_type0_cfg_dev[slot].f[func].l; + cfgw = pcibr_func_config_addr(bridge, 0, slot, func, 0); device = 0xFFFF & (idword >> 16); - htype = do_pcibr_config_get(cfgw, PCI_CFG_HEADER_TYPE, 1); + htype = do_pcibr_config_get(IS_PIC_SOFT(pcibr_soft), cfgw, PCI_CFG_HEADER_TYPE, 1); rfunc = func; } htype &= 0x7f; if (htype != 0x00) { - printk(KERN_WARNING "%s pcibr: pci slot %d func %d has strange header type 0x%x\n", + printk(KERN_WARNING + "%s pcibr: pci slot %d func %d has strange header type 0x%x\n", pcibr_soft->bs_name, slot, func, htype); - continue; + nbars = 2; + } else { + nbars = PCI_CFG_BASE_ADDRS; + } + + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_CONFIG, pcibr_vhdl, + "pcibr_slot_info_init: slot=%d, func=%d, cfgw=0x%x\n", + PCIBR_DEVICE_TO_SLOT(pcibr_soft,slot), func, cfgw)); + +#ifdef PIC_LATER + /* + * Check for a Quad ATM PCI "card" and return all the PCI bus + * memory and I/O space. This will work-around an apparent + * hardware problem with the Quad ATM XIO card handling large + * PIO addresses. Releasing all the space for use by the card + * will lower the PIO addresses with the PCI bus address space. + * This is OK since the PROM did not assign any BAR addresses. + * + * Only release all the PCI bus addresses once. + * + */ + if ((vendor == LINC_VENDOR_ID_NUM) && (device == LINC_DEVICE_ID_NUM)) { + iopaddr_t prom_base_addr = pcibr_soft->bs_xid << 24; + int prom_base_size = 0x1000000; + + if (!(pcibr_soft->bs_bus_addr_status & PCIBR_BUS_ADDR_MEM_FREED)) { + pciio_device_win_populate(&pcibr_soft->bs_mem_win_map, + prom_base_addr, prom_base_size); + pcibr_soft->bs_bus_addr_status |= PCIBR_BUS_ADDR_MEM_FREED; + } + + if (!(pcibr_soft->bs_bus_addr_status & PCIBR_BUS_ADDR_IO_FREED)) { + pciio_device_win_populate(&pcibr_soft->bs_io_win_map, + prom_base_addr, prom_base_size); + pcibr_soft->bs_bus_addr_status |= PCIBR_BUS_ADDR_IO_FREED; + } + } +#endif /* PIC_LATER */ + + /* + * If the latency timer has already been set, by prom or by the + * card itself, use that value. Otherwise look at the device's + * 'min_gnt' and attempt to calculate a latency time. + * + * NOTE: For now if the device is on the 'real time' arbitration + * ring we dont set the latency timer. + * + * WAR: SGI's IOC3 and RAD devices target abort if you write a + * single byte into their config space. So don't set the Latency + * Timer for these devices + */ + + lt_time = do_pcibr_config_get(IS_PIC_SOFT(pcibr_soft), cfgw, PCI_CFG_LATENCY_TIMER, 1); + + if ((lt_time == 0) && !(bridge->b_device[slot].reg & BRIDGE_DEV_RT) && + !((vendor == IOC3_VENDOR_ID_NUM) && + ( +#ifdef PIC_LATER + (device == IOC3_DEVICE_ID_NUM) || + (device == LINC_DEVICE_ID_NUM) || +#endif + (device == 0x5 /* RAD_DEV */)))) { + unsigned min_gnt; + unsigned min_gnt_mult; + + /* 'min_gnt' indicates how long of a burst period a device + * needs in increments of 250ns. But latency timer is in + * PCI clock cycles, so a conversion is needed. + */ + min_gnt = do_pcibr_config_get(IS_PIC_SOFT(pcibr_soft), cfgw, PCI_MIN_GNT, 1); + + if (IS_133MHZ(pcibr_soft)) + min_gnt_mult = 32; /* 250ns @ 133MHz in clocks */ + else if (IS_100MHZ(pcibr_soft)) + min_gnt_mult = 24; /* 250ns @ 100MHz in clocks */ + else if (IS_66MHZ(pcibr_soft)) + min_gnt_mult = 16; /* 250ns @ 66MHz, in clocks */ + else + min_gnt_mult = 8; /* 250ns @ 33MHz, in clocks */ + + if ((min_gnt != 0) && ((min_gnt * min_gnt_mult) < 256)) + lt_time = (min_gnt * min_gnt_mult); + else + lt_time = 4 * min_gnt_mult; /* 1 micro second */ + + do_pcibr_config_set(IS_PIC_SOFT(pcibr_soft), cfgw, PCI_CFG_LATENCY_TIMER, 1, lt_time); + + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_CONFIG, pcibr_vhdl, + "pcibr_slot_info_init: set Latency Timer for slot=%d, " + "func=%d, to 0x%x\n", + PCIBR_DEVICE_TO_SLOT(pcibr_soft, slot), func, lt_time)); + } + + /* Get the PCI-X capability if running in PCI-X mode. If the func + * doesnt have a pcix capability, allocate a PCIIO_VENDOR_ID_NONE + * pcibr_info struct so the device driver for that function is not + * called. + */ + if (IS_PCIX(pcibr_soft)) { + if (!(pcix_cap = pcibr_find_capability(cfgw, PCI_CAP_PCIX))) { + printk(KERN_WARNING +#if defined(SUPPORT_PRINTING_V_FORMAT) + "%v: Bus running in PCI-X mode, But card in slot %d, " + "func %d not PCI-X capable\n", pcibr_vhdl, slot, func); +#else + "0x%lx: Bus running in PCI-X mode, But card in slot %d, " + "func %d not PCI-X capable\n", (unsigned long)pcibr_vhdl, slot, func); +#endif + pcibr_device_info_new(pcibr_soft, slot, PCIIO_FUNC_NONE, + PCIIO_VENDOR_ID_NONE, PCIIO_DEVICE_ID_NONE); + continue; + } + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_CONFIG, pcibr_vhdl, + "pcibr_slot_info_init: PCI-X capability at 0x%x for " + "slot=%d, func=%d\n", + pcix_cap, PCIBR_DEVICE_TO_SLOT(pcibr_soft, slot), func)); + } else { + pcix_cap = NULL; } -#if DEBUG && ATTACH_DEBUG - printk(KERN_NOTICE - "%s pcibr: pci slot %d func %d: vendor 0x%x device 0x%x", - pcibr_soft->bs_name, slot, func, vendor, device); -#endif pcibr_info = pcibr_device_info_new (pcibr_soft, slot, rfunc, vendor, device); + + /* Keep a running total of the number of PIC-X functions on the bus + * and the number of max outstanding split trasnactions that they + * have requested. NOTE: "pcix_cap != NULL" implies IS_PCIX() + */ + pcibr_info->f_pcix_cap = (cap_pcix_type0_t *)pcix_cap; + if (pcibr_info->f_pcix_cap) { + int max_out; /* max outstanding splittrans from status reg */ + + pcibr_soft->bs_pcix_num_funcs++; + max_out = pcibr_info->f_pcix_cap->pcix_type0_status.max_out_split; + pcibr_soft->bs_pcix_split_tot += max_splittrans_to_numbuf[max_out]; + } + conn_vhdl = pciio_device_info_register(pcibr_vhdl, &pcibr_info->f_c); if (func == 0) slotp->slot_conn = conn_vhdl; -#ifdef LITTLE_ENDIAN - cmd_reg = cfgw[(PCI_CFG_COMMAND ^ 4) / 4]; -#else - cmd_reg = cfgw[PCI_CFG_COMMAND / 4]; -#endif + cmd_reg = do_pcibr_config_get(IS_PIC_SOFT(pcibr_soft), cfgw, PCI_CFG_COMMAND, 4); wptr = cfgw + PCI_CFG_BASE_ADDR_0 / 4; - for (win = 0; win < PCI_CFG_BASE_ADDRS; ++win) { + for (win = 0; win < nbars; ++win) { iopaddr_t base, mask, code; size_t size; @@ -706,11 +949,7 @@ * this could be pushed up into pciio, when we * start supporting more PCI providers. */ -#ifdef LITTLE_ENDIAN - base = wptr[((win*4)^4)/4]; -#else - base = wptr[win]; -#endif + base = do_pcibr_config_get(IS_PIC_SOFT(pcibr_soft), wptr, (win * 4), 4); if (base & PCI_BA_IO_SPACE) { /* BASE is in I/O space. */ @@ -736,11 +975,7 @@ } else if (base & 0xC0000000) { base = 0; /* outside permissable range */ } else if ((code == PCI_BA_MEM_64BIT) && -#ifdef LITTLE_ENDIAN - (wptr[(((win + 1)*4)^4)/4] != 0)) { -#else - (wptr[win + 1] != 0)) { -#endif /* LITTLE_ENDIAN */ + (do_pcibr_config_get(IS_PIC_SOFT(pcibr_soft), wptr, ((win + 1)*4), 4) != 0)) { base = 0; /* outside permissable range */ } } @@ -748,13 +983,8 @@ if (base != 0) { /* estimate size */ size = base & -base; } else { /* calculate size */ -#ifdef LITTLE_ENDIAN - wptr[((win*4)^4)/4] = ~0; /* turn on all bits */ - size = wptr[((win*4)^4)/4]; /* get stored bits */ -#else - wptr[win] = ~0; /* turn on all bits */ - size = wptr[win]; /* get stored bits */ -#endif /* LITTLE_ENDIAN */ + do_pcibr_config_set(IS_PIC_SOFT(pcibr_soft), wptr, (win * 4), 4, ~0); /* write 1's */ + size = do_pcibr_config_get(IS_PIC_SOFT(pcibr_soft), wptr, (win * 4), 4); /* read back */ size &= mask; /* keep addr */ size &= -size; /* keep lsbit */ if (size == 0) @@ -765,28 +995,6 @@ pcibr_info->f_window[win].w_base = base; pcibr_info->f_window[win].w_size = size; - /* - * If this window already has PCI space - * allocated for it, "subtract" that space from - * our running freeblocks. Don't worry about - * overlaps in existing allocated windows; we - * may be overstating their sizes anyway. - */ - - if (base && size) { - if (space == PCIIO_SPACE_IO) { - pcibr_freeblock_sub(&pci_io_fb, - &pci_io_fl, - base, size); - } else { - pcibr_freeblock_sub(&pci_lo_fb, - &pci_lo_fl, - base, size); - pcibr_freeblock_sub(&pci_hi_fb, - &pci_hi_fl, - base, size); - } - } #if defined(IOC3_VENDOR_ID_NUM) && defined(IOC3_DEVICE_ID_NUM) /* * IOC3 BASE_ADDR* BUG WORKAROUND @@ -825,21 +1033,55 @@ #endif if (code == PCI_BA_MEM_64BIT) { win++; /* skip upper half */ -#ifdef LITTLE_ENDIAN - wptr[((win*4)^4)/4] = 0; /* which must be zero */ -#else - wptr[win] = 0; /* which must be zero */ -#endif /* LITTLE_ENDIAN */ + do_pcibr_config_set(IS_PIC_SOFT(pcibr_soft), wptr, (win * 4), 4, 0); /* must be zero */ } } /* next win */ } /* next func */ - /* Store back the values for allocated PCI address spaces */ - PCI_ADDR_SPACE_LIMITS_STORE(); return(0); } /* + * pcibr_find_capability + * Walk the list of capabilities (if it exists) looking for + * the requested capability. Return a cfg_p pointer to the + * capability if found, else return NULL + */ +cfg_p +pcibr_find_capability(cfg_p cfgw, + unsigned capability) +{ + unsigned cap_nxt; + unsigned cap_id; + int defend_against_circular_linkedlist = 0; + + /* Check to see if there is a capabilities pointer in the cfg header */ + if (!(do_pcibr_config_get(1, cfgw, PCI_CFG_STATUS, 2) & PCI_STAT_CAP_LIST)) { + return (NULL); + } + + /* + * Read up the capabilities head pointer from the configuration header. + * Capabilities are stored as a linked list in the lower 48 dwords of + * config space and are dword aligned. (Note: spec states the least two + * significant bits of the next pointer must be ignored, so we mask + * with 0xfc). + */ + cap_nxt = (do_pcibr_config_get(1, cfgw, PCI_CAPABILITIES_PTR, 1) & 0xfc); + + while (cap_nxt && (defend_against_circular_linkedlist <= 48)) { + cap_id = do_pcibr_config_get(1, cfgw, cap_nxt, 1); + if (cap_id == capability) { + return ((cfg_p)((char *)cfgw + cap_nxt)); + } + cap_nxt = (do_pcibr_config_get(1, cfgw, cap_nxt+1, 1) & 0xfc); + defend_against_circular_linkedlist++; + } + + return (NULL); +} + +/* * pcibr_slot_info_free * Remove all the PCI infrastructural information associated * with a particular PCI device. @@ -854,7 +1096,10 @@ pcibr_soft = pcibr_soft_get(pcibr_vhdl); - if (!pcibr_soft || !PCIBR_VALID_SLOT(slot)) + if (!pcibr_soft) + return(EINVAL); + + if (!PCIBR_VALID_SLOT(pcibr_soft, slot)) return(EINVAL); nfunc = pcibr_soft->bs_slot[slot].bss_ninfo; @@ -868,6 +1113,109 @@ return(0); } +/* + * pcibr_slot_pcix_rbar_init + * Allocate RBARs to the PCI-X functions on a given device + */ +int +pcibr_slot_pcix_rbar_init(pcibr_soft_t pcibr_soft, + pciio_slot_t slot) +{ + pcibr_info_h pcibr_infoh; + pcibr_info_t pcibr_info; + char tmp_str[256]; + int nfunc; + int func; + + if (!PCIBR_VALID_SLOT(pcibr_soft, slot)) + return(EINVAL); + + if ((nfunc = pcibr_soft->bs_slot[slot].bss_ninfo) < 1) + return(EINVAL); + + if (!(pcibr_infoh = pcibr_soft->bs_slot[slot].bss_infos)) + return(EINVAL); + + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_RBAR, pcibr_soft->bs_vhdl, + "pcibr_slot_pcix_rbar_init for slot %d\n", + PCIBR_DEVICE_TO_SLOT(pcibr_soft, slot))); + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_RBAR, pcibr_soft->bs_vhdl, + "\tslot/func\trequested\tgiven\tinuse\tavail\n")); + + for (func = 0; func < nfunc; ++func) { + cap_pcix_type0_t *pcix_cap_p; + cap_pcix_stat_reg_t *pcix_statreg_p; + cap_pcix_cmd_reg_t *pcix_cmdreg_p; + int num_rbar; + + if (!(pcibr_info = pcibr_infoh[func])) + continue; + + if (pcibr_info->f_vendor == PCIIO_VENDOR_ID_NONE) + continue; + + if (!(pcix_cap_p = pcibr_info->f_pcix_cap)) + continue; + + pcix_statreg_p = &pcix_cap_p->pcix_type0_status; + pcix_cmdreg_p = &pcix_cap_p->pcix_type0_command; + + /* If there are enough RBARs to satify the number of "max outstanding + * transactions" each function requested (bs_pcix_rbar_percent_allowed + * is 100%), then give each function what it requested, otherwise give + * the functions a "percentage of what they requested". + */ + if (pcibr_soft->bs_pcix_rbar_percent_allowed >= 100) { + pcix_cmdreg_p->max_split = pcix_statreg_p->max_out_split; + num_rbar = max_splittrans_to_numbuf[pcix_cmdreg_p->max_split]; + pcibr_soft->bs_pcix_rbar_inuse += num_rbar; + pcibr_soft->bs_pcix_rbar_avail -= num_rbar; + pcix_cmdreg_p->max_mem_read_cnt = pcix_statreg_p->max_mem_read_cnt; + } else { + int index; /* index into max_splittrans_to_numbuf table */ + int max_out; /* max outstanding transactions given to func */ + + /* Calculate the percentage of RBARs this function can have. + * NOTE: Every function gets at least 1 RBAR (thus the "+1"). + * bs_pcix_rbar_percent_allowed is the percentage of what was + * requested less this 1 RBAR that all functions automatically + * gets + */ + max_out = ((max_splittrans_to_numbuf[pcix_statreg_p->max_out_split] + * pcibr_soft->bs_pcix_rbar_percent_allowed) / 100) + 1; + + /* round down the newly caclulated max_out to a valid number in + * max_splittrans_to_numbuf[] + */ + for (index = 0; index < MAX_SPLIT_TABLE-1; index++) + if (max_splittrans_to_numbuf[index + 1] > max_out) + break; + + pcix_cmdreg_p->max_split = index; + num_rbar = max_splittrans_to_numbuf[pcix_cmdreg_p->max_split]; + pcibr_soft->bs_pcix_rbar_inuse += num_rbar; + pcibr_soft->bs_pcix_rbar_avail -= num_rbar; + pcix_cmdreg_p->max_mem_read_cnt = pcix_statreg_p->max_mem_read_cnt; + } + /* + * The kernel only allows functions to have so many variable args, + * attempting to call PCIBR_DEBUG_ALWAYS() with more than 5 printf + * arguments fails so sprintf() it into a temporary string. + */ + if (pcibr_debug_mask & PCIBR_DEBUG_RBAR) { + sprintf(tmp_str,"\t %d/%d \t %d \t %d \t %d \t %d\n", + PCIBR_DEVICE_TO_SLOT(pcibr_soft, slot), func, + max_splittrans_to_numbuf[pcix_statreg_p->max_out_split], + max_splittrans_to_numbuf[pcix_cmdreg_p->max_split], + pcibr_soft->bs_pcix_rbar_inuse, + pcibr_soft->bs_pcix_rbar_avail); + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_RBAR, pcibr_soft->bs_vhdl, + "%s", tmp_str)); + } + } + return(0); +} + int as_debug = 0; /* * pcibr_slot_addr_space_init @@ -878,34 +1226,27 @@ pcibr_slot_addr_space_init(devfs_handle_t pcibr_vhdl, pciio_slot_t slot) { - pcibr_soft_t pcibr_soft; - pcibr_info_h pcibr_infoh; - pcibr_info_t pcibr_info; + pcibr_soft_t pcibr_soft; + pcibr_info_h pcibr_infoh; + pcibr_info_t pcibr_info; bridge_t *bridge; - iopaddr_t pci_io_fb, pci_io_fl; - iopaddr_t pci_lo_fb, pci_lo_fl; - iopaddr_t pci_hi_fb, pci_hi_fl; - size_t align; - iopaddr_t mask; - int nbars; - int nfunc; - int func; - int win; + size_t align_slot; + iopaddr_t mask; + int nbars; + int nfunc; + int func; + int win; + int rc = 0; pcibr_soft = pcibr_soft_get(pcibr_vhdl); - if (!pcibr_soft || !PCIBR_VALID_SLOT(slot)) + if (!pcibr_soft) return(EINVAL); - bridge = pcibr_soft->bs_base; - - /* Get the current values for the allocated PCI address spaces */ - PCI_ADDR_SPACE_LIMITS_LOAD(); + if (!PCIBR_VALID_SLOT(pcibr_soft, slot)) + return(EINVAL); - if (as_debug) -#ifdef LATER - PCI_ADDR_SPACE_LIMITS_PRINT(); -#endif + bridge = pcibr_soft->bs_base; /* allocate address space, * for windows that have not been @@ -934,10 +1275,7 @@ * the entire "lo" area is only a * megabyte, total ... */ - align = (slot < 2) ? 0x200000 : 0x100000; - mask = -align; - pci_io_fb = (pci_io_fb + align - 1) & mask; - pci_hi_fb = (pci_hi_fb + align - 1) & mask; + align_slot = (slot < 2) ? 0x200000 : 0x100000; for (func = 0; func < nfunc; ++func) { cfg_p cfgw; @@ -945,7 +1283,9 @@ pciio_space_t space; iopaddr_t base; size_t size; - cfg_p pci_cfg_cmd_reg_p; +#ifdef PCI_LATER + char tmp_str[256]; +#endif unsigned pci_cfg_cmd_reg; unsigned pci_cfg_cmd_reg_add = 0; @@ -957,13 +1297,15 @@ if (pcibr_info->f_vendor == PCIIO_VENDOR_ID_NONE) continue; - cfgw = bridge->b_type0_cfg_dev[slot].f[func].l; + cfgw = pcibr_func_config_addr(bridge, 0, slot, func, 0); wptr = cfgw + PCI_CFG_BASE_ADDR_0 / 4; - nbars = PCI_CFG_BASE_ADDRS; + if ((do_pcibr_config_get(IS_PIC_SOFT(pcibr_soft), cfgw, PCI_CFG_HEADER_TYPE, 1) & 0x7f) != 0) + nbars = 2; + else + nbars = PCI_CFG_BASE_ADDRS; for (win = 0; win < nbars; ++win) { - space = pcibr_info->f_window[win].w_space; base = pcibr_info->f_window[win].w_base; size = pcibr_info->f_window[win].w_size; @@ -972,77 +1314,93 @@ continue; if (base >= size) { -#if DEBUG && PCI_DEBUG - printk("pcibr: slot %d func %d window %d is in %d[0x%x..0x%x], alloc by prom\n", - slot, func, win, space, base, base + size - 1); -#endif + /* + * The kernel only allows functions to have so many variable + * args attempting to call PCIBR_DEBUG_ALWAYS() with more than + * 5 printf arguments fails so sprintf() it into a temporary + * string (tmp_str). + */ +#if defined(SUPPORT_PRINTING_R_FORMAT) + if (pcibr_debug_mask & PCIBR_DEBUG_BAR) { + sprintf(tmp_str, "pcibr_slot_addr_space_init: slot=%d, " + "func=%d win %d is in %r [0x%x..0x%x], allocated by " + "prom\n", PCIBR_DEVICE_TO_SLOT(pcibr_soft, slot), + func, win, space, space_desc, base, base + size - 1); + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_BAR, pcibr_vhdl, + "%s",tmp_str)); + } +#endif /* SUPPORT_PRINTING_R_FORMAT */ continue; /* already allocated */ } - align = size; /* ie. 0x00001000 */ - if (align < _PAGESZ) - align = _PAGESZ; /* ie. 0x00004000 */ - mask = -align; /* ie. 0xFFFFC000 */ switch (space) { case PCIIO_SPACE_IO: - base = (pci_io_fb + align - 1) & mask; - if ((base + size) > pci_io_fl) { - base = 0; - break; - } - pci_io_fb = base + size; + base = pcibr_bus_addr_alloc(pcibr_soft, + &pcibr_info->f_window[win], + PCIIO_SPACE_IO, + 0, size, align_slot); + if (!base) + rc = ENOSPC; break; case PCIIO_SPACE_MEM: -#ifdef LITTLE_ENDIAN - if ((wptr[((win*4)^4)/4] & PCI_BA_MEM_LOCATION) == -#else - if ((wptr[win] & PCI_BA_MEM_LOCATION) == -#endif /* LITTLE_ENDIAN */ - PCI_BA_MEM_1MEG) { + if ((do_pcibr_config_get(IS_PIC_SOFT(pcibr_soft), wptr, (win * 4), 4) & + PCI_BA_MEM_LOCATION) == PCI_BA_MEM_1MEG) { + int align = size; /* ie. 0x00001000 */ + + if (align < _PAGESZ) + align = _PAGESZ; /* ie. 0x00004000 */ + /* allocate from 20-bit PCI space */ - base = (pci_lo_fb + align - 1) & mask; - if ((base + size) > pci_lo_fl) { - base = 0; - break; - } - pci_lo_fb = base + size; + base = pcibr_bus_addr_alloc(pcibr_soft, + &pcibr_info->f_window[win], + PCIIO_SPACE_MEM, + 0, size, align); + if (!base) + rc = ENOSPC; } else { /* allocate from 32-bit or 64-bit PCI space */ - base = (pci_hi_fb + align - 1) & mask; - if ((base + size) > pci_hi_fl) { - base = 0; - break; - } - pci_hi_fb = base + size; + base = pcibr_bus_addr_alloc(pcibr_soft, + &pcibr_info->f_window[win], + PCIIO_SPACE_MEM32, + 0, size, align_slot); + if (!base) + rc = ENOSPC; } break; default: base = 0; -#if DEBUG && PCI_DEBUG - printk("pcibr: slot %d window %d had bad space code %d\n", - slot, win, space); -#endif + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_BAR, pcibr_vhdl, + "pcibr_slot_addr_space_init: slot=%d, window %d " + "had bad space code %d\n", + PCIBR_DEVICE_TO_SLOT(pcibr_soft,slot), win, space)); } pcibr_info->f_window[win].w_base = base; -#ifdef LITTLE_ENDIAN - wptr[((win*4)^4)/4] = base; -#if DEBUG && PCI_DEBUG - printk("Setting base address 0x%p base 0x%x\n", &(wptr[((win*4)^4)/4]), base); -#endif -#else - wptr[win] = base; -#endif /* LITTLE_ENDIAN */ + do_pcibr_config_set(IS_PIC_SOFT(pcibr_soft), wptr, (win * 4), 4, base); -#if DEBUG && PCI_DEBUG - if (base >= size) - printk("pcibr: slot %d func %d window %d is in %d [0x%x..0x%x], alloc by pcibr\n", - slot, func, win, space, base, base + size - 1); - else - printk("pcibr: slot %d func %d window %d, unable to alloc 0x%x in 0x%p\n", - slot, func, win, size, space); -#endif +#if defined(SUPPORT_PRINTING_R_FORMAT) + if (pcibr_debug_mask & PCIBR_DEBUG_BAR) { + if (base >= size) { + sprintf(tmp_str,"pcibr_slot_addr_space_init: slot=%d, func=" + "%d, win %d is in %r[0x%x..0x%x], " + "allocated by pcibr\n", + PCIBR_DEVICE_TO_SLOT(pcibr_soft, slot), + func, win, space, space_desc, base, + base + size - 1); + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_BAR, pcibr_vhdl, + "%s",tmp_str)); + } + else { + sprintf(tmp_str,"pcibr_slot_addr_space_init: slot=%d, func=" + "%d, win %d, unable to alloc 0x%x in %r\n", + PCIBR_DEVICE_TO_SLOT(pcibr_soft, slot), + func, win, size, space, space_desc); + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_BAR, pcibr_vhdl, + "%s",tmp_str)); + } + } +#endif /* SUPPORT_PRINTING_R_FORMAT */ } /* next base */ /* @@ -1055,34 +1413,23 @@ (pcibr_soft->bs_slot[slot].bss_device_id != IOC3_DEVICE_ID_NUM)) { wptr = cfgw + PCI_EXPANSION_ROM / 4; -#ifdef LITTLE_ENDIAN - wptr[1] = 0xFFFFF000; - mask = wptr[1]; -#else - *wptr = 0xFFFFF000; - mask = *wptr; -#endif /* LITTLE_ENDIAN */ + do_pcibr_config_set(IS_PIC_SOFT(pcibr_soft), wptr, 0, 4, 0xFFFFF000); + mask = do_pcibr_config_get(IS_PIC_SOFT(pcibr_soft), wptr, 0, 4); if (mask & 0xFFFFF000) { size = mask & -mask; - align = size; - if (align < _PAGESZ) - align = _PAGESZ; - mask = -align; - base = (pci_hi_fb + align - 1) & mask; - if ((base + size) > pci_hi_fl) - base = size = 0; + base = pcibr_bus_addr_alloc(pcibr_soft, + &pcibr_info->f_rwindow, + PCIIO_SPACE_MEM32, + 0, size, align_slot); + if (!base) + rc = ENOSPC; else { - pci_hi_fb = base + size; -#ifdef LITTLE_ENDIAN - wptr[1] = base; -#else - *wptr = base; -#endif /* LITTLE_ENDIAN */ -#if DEBUG && PCI_DEBUG - printk("%s/%d ROM in 0x%lx..0x%lx (alloc by pcibr)\n", - pcibr_soft->bs_name, slot, - base, base + size - 1); -#endif + do_pcibr_config_set(IS_PIC_SOFT(pcibr_soft), wptr, 0, 4, base); + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_BAR, pcibr_vhdl, + "pcibr_slot_addr_space_init: slot=%d, func=%d, " + "ROM in [0x%X..0x%X], allocated by pcibr\n", + PCIBR_DEVICE_TO_SLOT(pcibr_soft, slot), + func, base, base + size - 1)); } } } @@ -1116,30 +1463,25 @@ pci_cfg_cmd_reg_add |= PCI_CMD_BUS_MASTER; - pci_cfg_cmd_reg_p = cfgw + PCI_CFG_COMMAND / 4; - pci_cfg_cmd_reg = *pci_cfg_cmd_reg_p; + pci_cfg_cmd_reg = do_pcibr_config_get(IS_PIC_SOFT(pcibr_soft), cfgw, PCI_CFG_COMMAND, 4); + #if PCI_FBBE /* XXX- check here to see if dev can do fast-back-to-back */ if (!((pci_cfg_cmd_reg >> 16) & PCI_STAT_F_BK_BK_CAP)) fast_back_to_back_enable = 0; #endif pci_cfg_cmd_reg &= 0xFFFF; if (pci_cfg_cmd_reg_add & ~pci_cfg_cmd_reg) - *pci_cfg_cmd_reg_p = pci_cfg_cmd_reg | pci_cfg_cmd_reg_add; - + do_pcibr_config_set(IS_PIC_SOFT(pcibr_soft), cfgw, PCI_CFG_COMMAND, 4, + pci_cfg_cmd_reg | pci_cfg_cmd_reg_add); } /* next func */ - - /* Now that we have allocated new chunks of PCI address spaces to this - * card we need to update the bookkeeping values which indicate - * the current PCI address space allocations. - */ - PCI_ADDR_SPACE_LIMITS_STORE(); - return(0); + return(rc); } /* * pcibr_slot_device_init * Setup the device register in the bridge for this PCI slot. */ + int pcibr_slot_device_init(devfs_handle_t pcibr_vhdl, pciio_slot_t slot) @@ -1150,7 +1492,10 @@ pcibr_soft = pcibr_soft_get(pcibr_vhdl); - if (!pcibr_soft || !PCIBR_VALID_SLOT(slot)) + if (!pcibr_soft) + return(EINVAL); + + if (!PCIBR_VALID_SLOT(pcibr_soft, slot)) return(EINVAL); bridge = pcibr_soft->bs_base; @@ -1161,21 +1506,28 @@ */ devreg = bridge->b_device[slot].reg; devreg &= ~BRIDGE_DEV_PAGE_CHK_DIS; - devreg |= BRIDGE_DEV_COH | BRIDGE_DEV_VIRTUAL_EN; -#ifdef LITTLE_ENDIAN - devreg |= BRIDGE_DEV_DEV_SWAP; -#endif + + /* + * PIC WAR. PV# 855271 + * Don't enable virtual channels in the PIC by default. + * Can cause problems with 32-bit devices. (The bit is only intended + * for 64-bit devices). We set the bit in pcibr_try_set_device() + * if we're 64-bit and requesting virtual channels. + */ + if (IS_PIC_SOFT(pcibr_soft) && PCIBR_WAR_ENABLED(PV855271, pcibr_soft)) + devreg |= BRIDGE_DEV_COH; + else + devreg |= BRIDGE_DEV_COH | BRIDGE_DEV_VIRTUAL_EN; pcibr_soft->bs_slot[slot].bss_device = devreg; bridge->b_device[slot].reg = devreg; -#if DEBUG && PCI_DEBUG - printk("pcibr Device(%d): 0x%lx\n", slot, bridge->b_device[slot].reg); -#endif - -#if DEBUG && PCI_DEBUG - printk("pcibr: PCI space allocation done.\n"); +#ifdef PIC_LATER + PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_DEVREG, pcibr_vhdl, + "pcibr_slot_device_init: Device(%d): %R\n", + slot, devreg, device_bits)); +#else + printk("pcibr_slot_device_init: Device(%d) 0x%x\n", slot, devreg); #endif - return(0); } @@ -1194,7 +1546,10 @@ pcibr_soft = pcibr_soft_get(pcibr_vhdl); - if (!pcibr_soft || !PCIBR_VALID_SLOT(slot)) + if (!pcibr_soft) + return(EINVAL); + + if (!PCIBR_VALID_SLOT(pcibr_soft, slot)) return(EINVAL); slotp = &pcibr_soft->bs_slot[slot]; @@ -1259,17 +1614,25 @@ pcibr_info_t pcibr_info; async_attach_t aa = NULL; int func; - devfs_handle_t xconn_vhdl,conn_vhdl; + devfs_handle_t xconn_vhdl, conn_vhdl; +#ifdef PIC_LATER + devfs_handle_t scsi_vhdl; +#endif int nfunc; int error_func; int error_slot = 0; int error = ENODEV; +#ifdef PIC_LATER + int hwg_err; +#endif pcibr_soft = pcibr_soft_get(pcibr_vhdl); - if (!pcibr_soft || !PCIBR_VALID_SLOT(slot)) + if (!pcibr_soft) return(EINVAL); + if (!PCIBR_VALID_SLOT(pcibr_soft, slot)) + return(EINVAL); if (pcibr_soft->bs_slot[slot].has_host) { return(EPERM); @@ -1303,6 +1666,40 @@ error_func = pciio_device_attach(conn_vhdl, drv_flags); +#ifdef PIC_LATER + /* + * Try to assign well-known SCSI controller numbers for hot-plug + * insert + */ + if (drv_flags) { + + hwg_err = hwgraph_path_lookup(conn_vhdl, EDGE_LBL_SCSI_CTLR "/0", + &scsi_vhdl, NULL); + + if (hwg_err == GRAPH_SUCCESS) + scsi_ctlr_nums_add(baseio_pci_vhdl, scsi_vhdl); + + /* scsi_vhdl will be the final vertex in either the complete path + * on success or a partial path on failure; in either case, + * unreference that vertex. + */ + hwgraph_vertex_unref(scsi_vhdl); + + hwg_err = hwgraph_path_lookup(conn_vhdl, EDGE_LBL_SCSI_CTLR "/1", + &scsi_vhdl, NULL); + + if (hwg_err == GRAPH_SUCCESS) + scsi_ctlr_nums_add(baseio_pci_vhdl, scsi_vhdl); + + /* scsi_vhdl will be the final vertex in either the complete path + * on success or a partial path on failure; in either case, + * unreference that vertex. + */ + hwgraph_vertex_unref(scsi_vhdl); + + } +#endif /* PIC_LATER */ + pcibr_info->f_att_det_error = error_func; if (error_func) @@ -1313,9 +1710,12 @@ } /* next func */ if (error) { - if ((error != ENODEV) && (error != EUNATCH)) + if ((error != ENODEV) && (error != EUNATCH) && (error != EPERM)) { + pcibr_soft->bs_slot[slot].slot_status &= ~SLOT_STATUS_MASK; pcibr_soft->bs_slot[slot].slot_status |= SLOT_STARTUP_INCMPLT; + } } else { + pcibr_soft->bs_slot[slot].slot_status &= ~SLOT_STATUS_MASK; pcibr_soft->bs_slot[slot].slot_status |= SLOT_STARTUP_CMPLT; } @@ -1344,16 +1744,15 @@ pcibr_soft = pcibr_soft_get(pcibr_vhdl); - if (!pcibr_soft || !PCIBR_VALID_SLOT(slot)) + if (!pcibr_soft) + return(EINVAL); + + if (!PCIBR_VALID_SLOT(pcibr_soft, slot)) return(EINVAL); if (pcibr_soft->bs_slot[slot].has_host) return(EPERM); - /* Make sure that we do not detach a system critical function vertex */ - if(pcibr_is_slot_sys_critical(pcibr_vhdl, slot)) - return(EPERM); - nfunc = pcibr_soft->bs_slot[slot].bss_ninfo; pcibr_infoh = pcibr_soft->bs_slot[slot].bss_infos; @@ -1367,6 +1766,14 @@ if (pcibr_info->f_vendor == PCIIO_VENDOR_ID_NONE) continue; + if (IS_PCIX(pcibr_soft) && pcibr_info->f_pcix_cap) { + int max_out; + + pcibr_soft->bs_pcix_num_funcs--; + max_out = pcibr_info->f_pcix_cap->pcix_type0_status.max_out_split; + pcibr_soft->bs_pcix_split_tot -= max_splittrans_to_numbuf[max_out]; + } + conn_vhdl = pcibr_info->f_vertex; error_func = pciio_device_detach(conn_vhdl, drv_flags); @@ -1380,22 +1787,22 @@ } /* next func */ - pcibr_soft->bs_slot[slot].slot_status &= ~SLOT_STATUS_MASK; if (error) { - if ((error != ENODEV) && (error != EUNATCH)) + if ((error != ENODEV) && (error != EUNATCH) && (error != EPERM)) { + pcibr_soft->bs_slot[slot].slot_status &= ~SLOT_STATUS_MASK; pcibr_soft->bs_slot[slot].slot_status |= SLOT_SHUTDOWN_INCMPLT; + } } else { if (conn_vhdl != GRAPH_VERTEX_NONE) pcibr_device_unregister(conn_vhdl); + pcibr_soft->bs_slot[slot].slot_status &= ~SLOT_STATUS_MASK; pcibr_soft->bs_slot[slot].slot_status |= SLOT_SHUTDOWN_CMPLT; } return(error); } -#ifdef LATER - /* * pcibr_slot_attach * This is a place holder routine to keep track of all the @@ -1411,81 +1818,16 @@ int *sub_errorp) { pcibr_soft_t pcibr_soft = pcibr_soft_get(pcibr_vhdl); +#ifdef PIC_LATER timespec_t ts; - int error; - - if (!(pcibr_soft->bs_slot[slot].slot_status & SLOT_POWER_UP)) { - /* Power-up the slot */ - error = pcibr_slot_pwr(pcibr_vhdl, slot, L1_REQ_PCI_UP, l1_msg); - if (error) { - if (sub_errorp) - *sub_errorp = error; - return(PCI_L1_ERR); - } else { - pcibr_soft->bs_slot[slot].slot_status &= ~SLOT_POWER_MASK; - pcibr_soft->bs_slot[slot].slot_status |= SLOT_POWER_UP; - } - -#ifdef LATER - /* - * Allow cards like the Alteon Gigabit Ethernet Adapter to complete - * on-card initialization following the slot reset - */ - ts.tv_sec = 0; /* 0 secs */ - ts.tv_nsec = 500 * (1000 * 1000); /* 500 msecs */ - nano_delay(&ts); -#else #endif -#if 0 - /* Reset the slot */ - error = pcibr_slot_reset(pcibr_vhdl, slot) - if (error) { - if (sub_errorp) - *sub_errorp = error; - return(PCI_SLOT_RESET_ERR); - } -#endif - - /* Find out what is out there */ - error = pcibr_slot_info_init(pcibr_vhdl, slot); - if (error) { - if (sub_errorp) - *sub_errorp = error; - return(PCI_SLOT_INFO_INIT_ERR); - } - - /* Set up the address space for this slot in the PCI land */ - error = pcibr_slot_addr_space_init(pcibr_vhdl, slot); - if (error) { - if (sub_errorp) - *sub_errorp = error; - return(PCI_SLOT_ADDR_INIT_ERR); - } - - /* Setup the device register */ - error = pcibr_slot_device_init(pcibr_vhdl, slot); - if (error) { - if (sub_errorp) - *sub_errorp = error; - return(PCI_SLOT_DEV_INIT_ERR); - } - - /* Setup host/guest relations */ - error = pcibr_slot_guest_info_init(pcibr_vhdl, slot); - if (error) { - if (sub_errorp) - *sub_errorp = error; - return(PCI_SLOT_GUEST_INIT_ERR); - } - - /* Initial RRB management */ - error = pcibr_slot_initial_rrb_alloc(pcibr_vhdl, slot); - if (error) { - if (sub_errorp) - *sub_errorp = error; - return(PCI_SLOT_RRB_ALLOC_ERR); - } + int error; + /* Do not allow a multi-function card to be hot-plug inserted */ + if (pcibr_soft->bs_slot[slot].bss_ninfo > 1) { + if (sub_errorp) + *sub_errorp = EPERM; + return(PCI_MULTI_FUNC_ERR); } /* Call the device attach */ @@ -1501,7 +1843,6 @@ return(0); } -#endif /* LATER */ /* * pcibr_slot_detach @@ -1511,13 +1852,42 @@ int pcibr_slot_detach(devfs_handle_t pcibr_vhdl, pciio_slot_t slot, - int drv_flags) + int drv_flags, + char *l1_msg, + int *sub_errorp) { + pcibr_soft_t pcibr_soft = pcibr_soft_get(pcibr_vhdl); int error; + /* Make sure that we do not detach a system critical function vertex */ + if(pcibr_is_slot_sys_critical(pcibr_vhdl, slot)) + return(PCI_IS_SYS_CRITICAL); + /* Call the device detach function */ error = (pcibr_slot_call_device_detach(pcibr_vhdl, slot, drv_flags)); - return (error); + if (error) { + if (sub_errorp) + *sub_errorp = error; + return(PCI_SLOT_DRV_DETACH_ERR); + } + + /* Recalculate the RBARs for all the devices on the bus since we've + * just freed some up and some of the devices could use them. + */ + if (IS_PCIX(pcibr_soft)) { + int tmp_slot; + + pcibr_soft->bs_pcix_rbar_inuse = 0; + pcibr_soft->bs_pcix_rbar_avail = NUM_RBAR; + pcibr_soft->bs_pcix_rbar_percent_allowed = + pcibr_pcix_rbars_calc(pcibr_soft); + + for (tmp_slot = pcibr_soft->bs_min_slot; + tmp_slot < PCIBR_NUM_SLOTS(pcibr_soft); ++tmp_slot) + (void)pcibr_slot_pcix_rbar_init(pcibr_soft, tmp_slot); + } + + return (0); } @@ -1540,11 +1910,14 @@ devfs_handle_t conn_vhdl = GRAPH_VERTEX_NONE; int nfunc; int func; - boolean_t is_sys_critical_vertex(devfs_handle_t); + boolean_t is_sys_critical_vertex(devfs_handle_t); pcibr_soft = pcibr_soft_get(pcibr_vhdl); - if (!pcibr_soft || !PCIBR_VALID_SLOT(slot)) - return(0); + if (!pcibr_soft) + return(EINVAL); + + if (!PCIBR_VALID_SLOT(pcibr_soft, slot)) + return(EINVAL); nfunc = pcibr_soft->bs_slot[slot].bss_ninfo; pcibr_infoh = pcibr_soft->bs_slot[slot].bss_infos; @@ -1574,57 +1947,112 @@ } /* - * pcibr_probe_slot: read a config space word - * while trapping any errors; reutrn zero if + * pcibr_probe_slot_pic: read a config space word + * while trapping any errors; return zero if * all went OK, or nonzero if there was an error. * The value read, if any, is passed back * through the valp parameter. */ -int -pcibr_probe_slot(bridge_t *bridge, - cfg_p cfg, - unsigned *valp) +static int +pcibr_probe_slot_pic(bridge_t *bridge, + cfg_p cfg, + unsigned *valp) { - int rv; - bridgereg_t old_enable, new_enable; - int badaddr_val(volatile void *, int, volatile void *); - - old_enable = bridge->b_int_enable; - new_enable = old_enable & ~BRIDGE_IMR_PCI_MST_TIMEOUT; + int rv; + picreg_t p_old_enable = (picreg_t)0, p_new_enable; + extern int badaddr_val(volatile void *, int, volatile void *); + + p_old_enable = bridge->p_int_enable_64; + p_new_enable = p_old_enable & ~(BRIDGE_IMR_PCI_MST_TIMEOUT | PIC_ISR_PCIX_MTOUT); + bridge->p_int_enable_64 = p_new_enable; + + if (bridge->p_err_int_view_64 & (BRIDGE_ISR_PCI_MST_TIMEOUT | PIC_ISR_PCIX_MTOUT)) + bridge->p_int_rst_stat_64 = BRIDGE_IRR_MULTI_CLR; + + if (bridge->p_int_status_64 & (BRIDGE_IRR_PCI_GRP | PIC_PCIX_GRP_CLR)) { + bridge->p_int_rst_stat_64 = (BRIDGE_IRR_PCI_GRP_CLR | PIC_PCIX_GRP_CLR); + (void) bridge->b_wid_tflush; /* flushbus */ + } + rv = badaddr_val((void *) cfg, 4, valp); + if (bridge->p_err_int_view_64 & (BRIDGE_ISR_PCI_MST_TIMEOUT | PIC_ISR_PCIX_MTOUT)) { + bridge->p_int_rst_stat_64 = BRIDGE_IRR_MULTI_CLR; + rv = 1; /* unoccupied slot */ + } + bridge->p_int_enable_64 = p_old_enable; + bridge->b_wid_tflush; /* wait until Bridge PIO complete */ + return(rv); +} - bridge->b_int_enable = new_enable; +/* + * pcibr_probe_slot_non_pic: read a config space word + * while trapping any errors; return zero if + * all went OK, or nonzero if there was an error. + * The value read, if any, is passed back + * through the valp parameter. + */ +static int +pcibr_probe_slot_non_pic(bridge_t *bridge, + cfg_p cfg, + unsigned *valp) +{ + int rv; + bridgereg_t b_old_enable = (bridgereg_t)0, b_new_enable = (bridgereg_t)0; + extern int badaddr_val(volatile void *, int, volatile void *); + + b_old_enable = bridge->b_int_enable; + b_new_enable = b_old_enable & ~BRIDGE_IMR_PCI_MST_TIMEOUT; + bridge->b_int_enable = b_new_enable; /* * The xbridge doesn't clear b_err_int_view unless * multi-err is cleared... */ - if (is_xbridge(bridge)) - if (bridge->b_err_int_view & BRIDGE_ISR_PCI_MST_TIMEOUT) { + if (is_xbridge(bridge)) { + if (bridge->b_err_int_view & BRIDGE_ISR_PCI_MST_TIMEOUT) bridge->b_int_rst_stat = BRIDGE_IRR_MULTI_CLR; - } - - if (bridge->b_int_status & BRIDGE_IRR_PCI_GRP) { - bridge->b_int_rst_stat = BRIDGE_IRR_PCI_GRP_CLR; - (void) bridge->b_wid_tflush; /* flushbus */ - } - rv = badaddr_val((void *) cfg, 4, valp); + } + if (bridge->b_int_status & BRIDGE_IRR_PCI_GRP) { + bridge->b_int_rst_stat = BRIDGE_IRR_PCI_GRP_CLR; + (void) bridge->b_wid_tflush; /* flushbus */ + } + rv = badaddr_val((void *) (((uint64_t)cfg) ^ 4), 4, valp); /* * The xbridge doesn't set master timeout in b_int_status * here. Fortunately it's in error_interrupt_view. */ - if (is_xbridge(bridge)) + if (is_xbridge(bridge)) { if (bridge->b_err_int_view & BRIDGE_ISR_PCI_MST_TIMEOUT) { bridge->b_int_rst_stat = BRIDGE_IRR_MULTI_CLR; rv = 1; /* unoccupied slot */ } + } + bridge->b_int_enable = b_old_enable; + bridge->b_wid_tflush; /* wait until Bridge PIO complete */ + + return(rv); +} - bridge->b_int_enable = old_enable; - bridge->b_wid_tflush; /* wait until Bridge PIO complete */ - return rv; +/* + * pcibr_probe_slot: read a config space word + * while trapping any errors; return zero if + * all went OK, or nonzero if there was an error. + * The value read, if any, is passed back + * through the valp parameter. + */ +static int +pcibr_probe_slot(bridge_t *bridge, + cfg_p cfg, + unsigned *valp) +{ + if ( is_pic(bridge) ) + return(pcibr_probe_slot_pic(bridge, cfg, valp)); + else + return(pcibr_probe_slot_non_pic(bridge, cfg, valp)); } + void pcibr_device_info_free(devfs_handle_t pcibr_vhdl, pciio_slot_t slot) { @@ -1632,10 +2060,13 @@ pcibr_info_t pcibr_info; pciio_function_t func; pcibr_soft_slot_t slotp = &pcibr_soft->bs_slot[slot]; + bridge_t *bridge = pcibr_soft->bs_base; + cfg_p cfgw; int nfunc = slotp->bss_ninfo; int bar; int devio_index; int s; + unsigned cmd_reg; for (func = 0; func < nfunc; func++) { @@ -1646,10 +2077,19 @@ s = pcibr_lock(pcibr_soft); + /* Disable memory and I/O BARs */ + cfgw = pcibr_func_config_addr(bridge, 0, slot, func, 0); + cmd_reg = do_pcibr_config_get(IS_PIC_SOFT(pcibr_soft), cfgw, PCI_CFG_COMMAND, 4); + cmd_reg &= (PCI_CMD_MEM_SPACE | PCI_CMD_IO_SPACE); + do_pcibr_config_set(IS_PIC_SOFT(pcibr_soft), cfgw, PCI_CFG_COMMAND, 4, cmd_reg); + for (bar = 0; bar < PCI_CFG_BASE_ADDRS; bar++) { if (pcibr_info->f_window[bar].w_space == PCIIO_SPACE_NONE) continue; + /* Free the PCI bus space */ + pciibr_bus_addr_free(pcibr_soft, &pcibr_info->f_window[bar]); + /* Get index of the DevIO(x) register used to access this BAR */ devio_index = pcibr_info->f_window[bar].w_devio_index; @@ -1664,6 +2104,11 @@ } } + /* Free the Expansion ROM PCI bus space */ + if(pcibr_info->f_rbase && pcibr_info->f_rsize) { + pciibr_bus_addr_free(pcibr_soft, &pcibr_info->f_rwindow); + } + pcibr_unlock(pcibr_soft, s); slotp->bss_infos[func] = 0; @@ -1689,4 +2134,69 @@ slotp->bss_cmd_pointer = 0; slotp->bss_cmd_shadow = 0; +} + + +iopaddr_t +pcibr_bus_addr_alloc(pcibr_soft_t pcibr_soft, pciio_win_info_t win_info_p, + pciio_space_t space, int start, int size, int align) +{ + pciio_win_map_t win_map_p; + + switch (space) { + + case PCIIO_SPACE_IO: + win_map_p = &pcibr_soft->bs_io_win_map; + break; + + case PCIIO_SPACE_MEM: + win_map_p = &pcibr_soft->bs_swin_map; + break; + + case PCIIO_SPACE_MEM32: + win_map_p = &pcibr_soft->bs_mem_win_map; + break; + + default: + return 0; + + } + return pciio_device_win_alloc(win_map_p, + win_info_p + ? &win_info_p->w_win_alloc + : NULL, + start, size, align); +} + + +void +pciibr_bus_addr_free(pcibr_soft_t pcibr_soft, pciio_win_info_t win_info_p) +{ + pciio_device_win_free(&win_info_p->w_win_alloc); +} + +/* + * given a vertex_hdl to the pcibr_vhdl, return the brick's bus number + * associated with that vertex_hdl. The true mapping happens from the + * io_brick_tab[] array defined in ml/SN/iograph.c + */ +int +pcibr_widget_to_bus(devfs_handle_t pcibr_vhdl) +{ + pcibr_soft_t pcibr_soft = pcibr_soft_get(pcibr_vhdl); + xwidgetnum_t widget = pcibr_soft->bs_xid; + int bricktype = pcibr_soft->bs_bricktype; + int bus = pcibr_soft->bs_busnum; + + /* + * For PIC there are 2 busses per widget and pcibr_soft->bs_busnum + * will be 0 or 1. For [X]BRIDGE there is 1 bus per widget and + * pcibr_soft->bs_busnum will always be zero. So we add bs_busnum + * to what io_brick_map_widget returns to get the bus number. + */ + if ((bus += io_brick_map_widget(bricktype, widget)) > 0) { + return bus; + } else { + return 0; + } } diff -Nru a/arch/ia64/sn/io/sn2/shub_intr.c b/arch/ia64/sn/io/sn2/shub_intr.c --- a/arch/ia64/sn/io/sn2/shub_intr.c Mon Dec 23 21:21:55 2002 +++ b/arch/ia64/sn/io/sn2/shub_intr.c Mon Dec 23 21:21:55 2002 @@ -1,4 +1,4 @@ -/* $Id: shub_intr.c,v 1.2 2001/06/26 14:02:43 pfg Exp $ +/* $Id: shub_intr.c,v 1.1 2002/02/28 17:31:25 marcelo Exp $ * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive @@ -25,21 +25,13 @@ #include #include #include +#include #include -extern void hub_device_desc_update(device_desc_t, ilvl_t, cpuid_t); - /* ARGSUSED */ void hub_intr_init(devfs_handle_t hubv) { - extern void sn_cpei_handler(int, void *, struct pt_regs *); - extern void sn_init_cpei_timer(void); - - if (request_irq(SGI_SHUB_ERROR_VECTOR, sn_cpei_handler, 0, "SN hub error", NULL) ) { - printk("hub_intr_init: Couldn't register SGI_SHUB_ERROR_VECTOR = %x\n",SGI_SHUB_ERROR_VECTOR); - } - sn_init_cpei_timer(); } xwidgetnum_t @@ -79,14 +71,12 @@ cpuphys = cpu_physical_id(cpu); slice = cpu_physical_id_to_slice(cpuphys); nasid = cpu_physical_id_to_nasid(cpuphys); - cnode = cpuid_to_cnodeid(cpu); + cnode = cpu_to_node_map[cpu]; if (slice) { - xtalk_addr = SH_II_INT1 | GLOBAL_MMR_SPACE | - ((unsigned long)nasid << 36) | (1UL << 47); + xtalk_addr = SH_II_INT1 | ((unsigned long)nasid << 36) | (1UL << 47); } else { - xtalk_addr = SH_II_INT0 | GLOBAL_MMR_SPACE | - ((unsigned long)nasid << 36) | (1UL << 47); + xtalk_addr = SH_II_INT0 | ((unsigned long)nasid << 36) | (1UL << 47); } intr_hdl = snia_kmem_alloc_node(sizeof(struct hub_intr_s), KM_NOSLEEP, cnode); @@ -107,7 +97,6 @@ intr_hdl->i_bit = vector; intr_hdl->i_flags |= HUB_INTR_IS_ALLOCED; - hub_device_desc_update(dev_desc, intr_swlevel, cpu); return(intr_hdl); } @@ -136,7 +125,7 @@ if (intr_hdl->i_flags & HUB_INTR_IS_CONNECTED) { xtalk_info = &intr_hdl->i_xtalk_info; - xtalk_info->xi_dev = NODEV; + xtalk_info->xi_dev = 0; xtalk_info->xi_vector = 0; xtalk_info->xi_addr = 0; hub_intr_disconnect(intr_hdl); @@ -150,6 +139,8 @@ int hub_intr_connect(hub_intr_t intr_hdl, + intr_func_t intr_func, /* xtalk intr handler */ + void *intr_arg, /* arg to intr handler */ xtalk_intr_setfunc_t setfunc, void *setfunc_arg) { @@ -160,7 +151,6 @@ ASSERT(intr_hdl->i_flags & HUB_INTR_IS_ALLOCED); rv = intr_connect_level(cpu, vector, intr_hdl->i_swlevel, NULL); - if (rv < 0) { return rv; } diff -Nru a/arch/ia64/sn/io/sn2/shuberror.c b/arch/ia64/sn/io/sn2/shuberror.c --- a/arch/ia64/sn/io/sn2/shuberror.c Mon Dec 23 21:22:00 2002 +++ b/arch/ia64/sn/io/sn2/shuberror.c Mon Dec 23 21:22:00 2002 @@ -1,4 +1,4 @@ -/* $Id$ +/* $Id: shuberror.c,v 1.1 2002/02/28 17:31:25 marcelo Exp $ * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive @@ -10,6 +10,8 @@ #include #include +#include +#include #include #include #include @@ -34,12 +36,18 @@ extern void hubii_eint_handler (int irq, void *arg, struct pt_regs *ep); int hubiio_crb_error_handler(devfs_handle_t hub_v, hubinfo_t hinfo); int hubiio_prb_error_handler(devfs_handle_t hub_v, hubinfo_t hinfo); -extern void bte_crb_error_handler(devfs_handle_t hub_v, int btenum, int crbnum, ioerror_t *ioe); +extern void bte_crb_error_handler(devfs_handle_t hub_v, int btenum, int crbnum, ioerror_t *ioe, int bteop); extern int maxcpus; #define HUB_ERROR_PERIOD (120 * HZ) /* 2 minutes */ +#ifdef BUS_INT_WAR +void sn_add_polled_interrupt(int irq, int interval); +void sn_delete_polled_interrupt(int irq); +extern int bus_int_war_ide_irq; +#endif + void hub_error_clear(nasid_t nasid) @@ -118,9 +126,7 @@ hubinfo_t hinfo; cpuid_t intr_cpu; devfs_handle_t hub_v; - ii_ilcsr_u_t ilcsr; int bit_pos_to_irq(int bit); - int synergy_intr_connect(int bit, int cpuid); hub_v = (devfs_handle_t)cnodeid_to_vertex(cnode); @@ -130,17 +136,6 @@ ASSERT(hinfo); ASSERT(hinfo->h_cnodeid == cnode); - ilcsr.ii_ilcsr_regval = REMOTE_HUB_L(hinfo->h_nasid, IIO_ILCSR); - - if ((ilcsr.ii_ilcsr_fld_s.i_llp_stat & 0x2) == 0) { - /* - * HUB II link is not up. - * Just disable LLP, and don't connect any interrupts. - */ - ilcsr.ii_ilcsr_fld_s.i_llp_en = 0; - REMOTE_HUB_S(hinfo->h_nasid, IIO_ILCSR, ilcsr.ii_ilcsr_regval); - return; - } /* Select a possible interrupt target where there is a free interrupt * bit and also reserve the interrupt bit for this IO error interrupt */ @@ -152,7 +147,11 @@ } rv = intr_connect_level(intr_cpu, bit, 0, NULL); - request_irq(bit + (intr_cpu << 8), hubii_eint_handler, 0, "SN hub error", (void *)hub_v); + request_irq(bit + (intr_cpu << 8), hubii_eint_handler, 0, "SN_hub_error", (void *)hub_v); + irq_desc(bit + (intr_cpu << 8))->status |= SN2_IRQ_PER_HUB; +#ifdef BUS_INT_WAR + sn_add_polled_interrupt(bit + (intr_cpu << 8), (0.01 * HZ)); +#endif ASSERT_ALWAYS(rv >= 0); hubio_eint.ii_iidsr_regval = 0; hubio_eint.ii_iidsr_fld_s.i_enable = 1; @@ -257,15 +256,16 @@ void hubiio_crb_free(hubinfo_t hinfo, int crbnum) { - ii_icrb0_a_u_t icrba; + ii_icrb0_b_u_t icrbb; /* * The hardware does NOT clear the mark bit, so it must get cleared * here to be sure the error is not processed twice. */ - icrba.ii_icrb0_a_regval = REMOTE_HUB_L(hinfo->h_nasid, IIO_ICRB_A(crbnum)); - icrba.a_valid = 0; - REMOTE_HUB_S(hinfo->h_nasid, IIO_ICRB_A(crbnum), icrba.ii_icrb0_a_regval); + icrbb.ii_icrb0_b_regval = REMOTE_HUB_L(hinfo->h_nasid, IIO_ICRB_B(crbnum)); + icrbb.b_mark = 0; + REMOTE_HUB_S(hinfo->h_nasid, IIO_ICRB_B(crbnum), icrbb.ii_icrb0_b_regval); + /* * Deallocate the register. */ @@ -325,9 +325,11 @@ ii_icrb0_b_u_t icrbb; /* II CRB Register B */ ii_icrb0_c_u_t icrbc; /* II CRB Register C */ ii_icrb0_d_u_t icrbd; /* II CRB Register D */ + ii_icrb0_e_u_t icrbe; /* II CRB Register D */ int i; int num_errors = 0; /* Num of errors handled */ ioerror_t ioerror; + int rc; nasid = hinfo->h_nasid; cnode = NASID_TO_COMPACT_NODEID(nasid); @@ -337,16 +339,24 @@ * in any of the CRBs marked. */ for (i = 0; i < IIO_NUM_CRBS; i++) { + /* Check this crb entry to see if it is in error. */ + icrbb.ii_icrb0_b_regval = REMOTE_HUB_L(nasid, IIO_ICRB_B(i)); + + if (icrbb.b_mark == 0) { + continue; + } + icrba.ii_icrb0_a_regval = REMOTE_HUB_L(nasid, IIO_ICRB_A(i)); IOERROR_INIT(&ioerror); /* read other CRB error registers. */ - icrbb.ii_icrb0_b_regval = REMOTE_HUB_L(nasid, IIO_ICRB_B(i)); icrbc.ii_icrb0_c_regval = REMOTE_HUB_L(nasid, IIO_ICRB_C(i)); icrbd.ii_icrb0_d_regval = REMOTE_HUB_L(nasid, IIO_ICRB_D(i)); + icrbe.ii_icrb0_e_regval = REMOTE_HUB_L(nasid, IIO_ICRB_E(i)); IOERROR_SETVALUE(&ioerror,errortype,icrbb.b_ecode); + /* Check if this error is due to BTE operation, * and handle it separately. */ @@ -363,8 +373,15 @@ else /* b_initiator bit 2 gives BTE number */ bte_num = (icrbb.b_initiator & 0x4) >> 2; + /* >>> bte_crb_error_handler needs to be + * broken into two parts. The first should + * cleanup the CRB. The second should wait + * until all bte related CRB's are complete + * and then do the error reset. + */ bte_crb_error_handler(hub_v, bte_num, - i, &ioerror); + i, &ioerror, + icrbd.d_bteop); hubiio_crb_free(hinfo, i); num_errors++; continue; @@ -401,11 +418,142 @@ */ IOERROR_SETVALUE(&ioerror,widgetdev, TNUM_TO_WIDGET_DEV(icrba.a_tnum)); + /* + * The encoding of TNUM (see comments above) is + * different for PIC. So we'll save TNUM here and + * deal with the differences later when we can + * determine if we're using a Bridge or the PIC. + * + * XXX: We may be able to remove saving the widgetdev + * above and just sort it out of TNUM later. + */ + IOERROR_SETVALUE(&ioerror, tnum, icrba.a_tnum); + + } + + if (icrbb.b_error) { + /* + * CRB 'i' has some error. Identify the type of error, + * and try to handle it. + */ + switch(icrbb.b_ecode) { + case IIO_ICRB_ECODE_PERR: + case IIO_ICRB_ECODE_WERR: + case IIO_ICRB_ECODE_AERR: + case IIO_ICRB_ECODE_PWERR: + + printk("%s on hub cnodeid: %d", + hubiio_crb_errors[icrbb.b_ecode], cnode); + /* + * Any sort of write error is mostly due + * bad programming (Note it's not a timeout.) + * So, invoke hub_iio_error_handler with + * appropriate information. + */ + IOERROR_SETVALUE(&ioerror,errortype,icrbb.b_ecode); + + rc = hub_ioerror_handler( + hub_v, + DMA_WRITE_ERROR, + MODE_DEVERROR, + &ioerror); + + if (rc == IOERROR_HANDLED) { + rc = hub_ioerror_handler( + hub_v, + DMA_WRITE_ERROR, + MODE_DEVREENABLE, + &ioerror); + ASSERT(rc == IOERROR_HANDLED); + }else { + + panic("Unable to handle %s on hub %d", + hubiio_crb_errors[icrbb.b_ecode], + cnode); + /*NOTREACHED*/ + } + /* Go to Next error */ + hubiio_crb_free(hinfo, i); + continue; + + case IIO_ICRB_ECODE_PRERR: + + case IIO_ICRB_ECODE_TOUT: + case IIO_ICRB_ECODE_XTERR: + + case IIO_ICRB_ECODE_DERR: + panic("Fatal %s on hub : %d", + hubiio_crb_errors[icrbb.b_ecode], cnode); + /*NOTREACHED*/ + + default: + panic("Fatal error (code : %d) on hub : %d", + cnode); + /*NOTREACHED*/ + + } + } /* if (icrbb.b_error) */ + /* + * Error is not indicated via the errcode field + * Check other error indications in this register. + */ + + if (icrbb.b_xerr) { + panic("Xtalk Packet with error bit set to hub %d", + cnode); + /*NOTREACHED*/ + } + + if (icrbb.b_lnetuce) { + panic("Uncorrectable data error detected on data " + " from Craylink to node %d", + cnode); + /*NOTREACHED*/ } } return num_errors; +} + +/* + * hubii_check_widget_disabled + * + * Check if PIO access to the specified widget is disabled due + * to any II errors that are currently set. + * + * The specific error bits checked are: + * IPRBx register: SPUR_RD (51) + * SPUR_WR (50) + * RD_TO (49) + * ERROR (48) + * + * WSTAT register: CRAZY (32) + */ + +int +hubii_check_widget_disabled(nasid_t nasid, int wnum) +{ + iprb_t iprb; + ii_wstat_u_t wstat; + + iprb.iprb_regval = REMOTE_HUB_L(nasid, IIO_IOPRB(wnum)); + if (iprb.iprb_regval & (IIO_PRB_SPUR_RD | IIO_PRB_SPUR_WR | + IIO_PRB_RD_TO | IIO_PRB_ERROR)) { +#ifdef DEBUG + printk(KERN_WARNING "II error, IPRB%x=0x%lx\n", wnum, iprb.iprb_regval); +#endif + return(1); + } + + wstat.ii_wstat_regval = REMOTE_HUB_L(nasid, IIO_WSTAT); + if (wstat.ii_wstat_regval & IIO_WSTAT_ECRAZY) { +#ifdef DEBUG + printk(KERN_WARNING "II error, WSTAT=0x%lx\n", wstat.ii_wstat_regval); +#endif + return(1); + } + return(0); } /*ARGSUSED*/ diff -Nru a/arch/ia64/sn/io/stubs.c b/arch/ia64/sn/io/stubs.c --- a/arch/ia64/sn/io/stubs.c Mon Dec 23 21:21:59 2002 +++ b/arch/ia64/sn/io/stubs.c Mon Dec 23 21:21:59 2002 @@ -9,8 +9,9 @@ #include #include -#include +#include #include +#include #include #include #include @@ -28,8 +29,8 @@ int pcibr_prefetch_enable_rev, pcibr_wg_enable_rev; int default_intr_pri; -int force_fire_and_forget; -int ignore_conveyor_override; +int force_fire_and_forget = 1; +int ignore_conveyor_override = 0; devfs_handle_t dummy_vrtx; /* Needed for cpuid_to_vertex() in hack.h */ @@ -53,54 +54,24 @@ return(0); } -char * -nic_bridge_vertex_info(devfs_handle_t v, nic_data_t mcr) -{ - FIXME("nic_bridge_vertex_info : returns NULL"); - return((char *)0); -} - -void * -snia_kmem_alloc_node(register size_t size, register int flags, cnodeid_t node) -{ - /* Allocates on node 'node' */ - FIXME("snia_kmem_alloc_node : use kmalloc"); - return(kmalloc(size, GFP_KERNEL)); -} - -void * -snia_kmem_zalloc_node(register size_t size, register int flags, cnodeid_t node) -{ - FIXME("snia_kmem_zalloc_node : use kmalloc"); - return(kmalloc(size, GFP_KERNEL)); -} - -void -snia_kmem_free(void *where, int size) -{ - FIXME("snia_kmem_free : use kfree"); - return(kfree(where)); -} - - void * -snia_kmem_zone_alloc(register zone_t *zone, int flags) +snia_kmem_zone_alloc(register struct zone *zone, int flags) { FIXME("snia_kmem_zone_alloc : return null"); return((void *)0); } void -snia_kmem_zone_free(register zone_t *zone, void *ptr) +snia_kmem_zone_free(register struct zone *zone, void *ptr) { FIXME("snia_kmem_zone_free : no-op"); } -zone_t * +struct zone * snia_kmem_zone_init(register int size, char *zone_name) { FIXME("snia_kmem_zone_free : returns NULL"); - return((zone_t *)0); + return((struct zone *)0); } int @@ -115,13 +86,6 @@ return(0); } -void * -swap_ptr(void **loc, void *new) -{ - FIXME("swap_ptr : returns null"); - return((void *)0); -} - /* For ml/SN/SN1/slots.c */ /* ARGSUSED */ slotid_t get_widget_slotnum(int xbow, int widget) @@ -153,10 +117,8 @@ char * nic_vertex_info_get(devfs_handle_t v) { - FIXME("nic_vertex_info_get\n"); return(NULL); - } int diff -Nru a/arch/ia64/sn/io/xswitch.c b/arch/ia64/sn/io/xswitch.c --- a/arch/ia64/sn/io/xswitch.c Mon Dec 23 21:21:51 2002 +++ b/arch/ia64/sn/io/xswitch.c Mon Dec 23 21:21:51 2002 @@ -4,7 +4,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 1992 - 1997, 2000-2001 Silicon Graphics, Inc. All rights reserved. + * Copyright (C) 1992-1997,2000-2002 Silicon Graphics, Inc. All rights reserved. */ #include diff -Nru a/arch/ia64/sn/kernel/Makefile b/arch/ia64/sn/kernel/Makefile --- a/arch/ia64/sn/kernel/Makefile Mon Dec 23 21:21:51 2002 +++ b/arch/ia64/sn/kernel/Makefile Mon Dec 23 21:21:51 2002 @@ -1,4 +1,4 @@ -# arch/ia64/sn/Makefile +# arch/ia64/sn/kernel/Makefile # # Copyright (C) 1999,2001-2002 Silicon Graphics, Inc. All Rights Reserved. # @@ -33,11 +33,17 @@ EXTRA_CFLAGS := -DLITTLE_ENDIAN -export-objs := sn_ksyms.o +.S.s: + $(CPP) $(AFLAGS) $(AFLAGS_KERNEL) -o $*.s $< +.S.o: + $(CC) $(AFLAGS) $(AFLAGS_KERNEL) -c -o $*.o $< -obj-y = probe.o setup.o sn_asm.o sv.o bte.o -obj-$(CONFIG_IA64_SGI_SN1) += irq.o mca.o sn1/ -obj-$(CONFIG_IA64_SGI_SN2) += irq.o mca.o sn2/ +export-objs = sn_ksyms.o iomv.o + +obj-y = probe.o setup.o sn_asm.o sv.o bte.o iomv.o +obj-$(CONFIG_IA64_SGI_SN1) += irq.o mca.o +obj-$(CONFIG_IA64_SGI_SN2) += irq.o mca.o obj-$(CONFIG_IA64_SGI_AUTOTEST) += llsc4.o misctest.o obj-$(CONFIG_IA64_GENERIC) += machvec.o obj-$(CONFIG_MODULES) += sn_ksyms.o +obj-$(CONFIG_IA64_SGI_SN_BRT) += bte_regr_test.o diff -Nru a/arch/ia64/sn/kernel/bte.c b/arch/ia64/sn/kernel/bte.c --- a/arch/ia64/sn/kernel/bte.c Mon Dec 23 21:21:55 2002 +++ b/arch/ia64/sn/kernel/bte.c Mon Dec 23 21:21:55 2002 @@ -1,18 +1,49 @@ /* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. + * + * + * Copyright (c) 2000-2002 Silicon Graphics, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it would be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + * + * Further, this software is distributed without any warranty that it is + * free of the rightful claim of any third person regarding infringement + * or the like. Any license provided herein, whether implied or + * otherwise, applies only to this software file. Patent licenses, if + * any, provided herein do not apply to combinations of this program with + * other software, or any other product whatsoever. + * + * You should have received a copy of the GNU General Public + * License along with this program; if not, write the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. + * + * Contact information: Silicon Graphics, Inc., 1600 Amphitheatre Pkwy, + * Mountain View, CA 94043, or: + * + * http://www.sgi.com * - * Copyright (c) 2001-2002 Silicon Graphics, Inc. All rights reserved. + * For further information regarding this notice, see: + * + * http://oss.sgi.com/projects/GenInfo/NoticeExplan */ +#include #include #include #include #include #include +#ifdef CONFIG_IA64_SGI_SN2 +#include +#endif #include +#include #include #include @@ -26,12 +57,16 @@ * Initialize the nodepda structure with BTE base addresses and * spinlocks. * + * NOTE: The kernel parameter btetest will cause the initialization + * code to reserve blocks of physically contiguous memory to be + * used by the bte test module. */ void -bte_init_node(nodepda_t * mynodepda, cnodeid_t cNode) +bte_init_node(nodepda_t * mynodepda, cnodeid_t cnode) { int i; + /* * Indicate that all the block transfer engines on this node * are available. @@ -39,27 +74,76 @@ for (i = 0; i < BTES_PER_NODE; i++) { #ifdef CONFIG_IA64_SGI_SN2 /* >>> Don't know why the 0x1800000L is here. Robin */ - mynodepda->node_bte_info[i].bte_base_addr = + mynodepda->bte_if[i].bte_base_addr = (char *)LOCAL_MMR_ADDR(bte_offsets[i] | 0x1800000L); + #elif CONFIG_IA64_SGI_SN1 - mynodepda->node_bte_info[i].bte_base_addr = + mynodepda->bte_if[i].bte_base_addr = (char *)LOCAL_HUB_ADDR(bte_offsets[i]); #else #error BTE Not defined for this hardware platform. #endif + /* + * Initialize the notification and spinlock + * so the first transfer can occur. + */ + mynodepda->bte_if[i].most_rcnt_na = + &(mynodepda->bte_if[i].notify); + mynodepda->bte_if[i].notify = 0L; #ifdef CONFIG_IA64_SGI_BTE_LOCKING - /* Initialize the notification and spinlock */ - /* so the first transfer can occur. */ - mynodepda->node_bte_info[i].mostRecentNotification = - &(mynodepda->node_bte_info[i].notify); - mynodepda->node_bte_info[i].notify = 0L; - spin_lock_init(&mynodepda->node_bte_info[i].spinlock); + spin_lock_init(&mynodepda->bte_if[i].spinlock); #endif /* CONFIG_IA64_SGI_BTE_LOCKING */ + mynodepda->bte_if[i].bte_test_buf = + alloc_bootmem_node(NODE_DATA(cnode), BTE_MAX_XFER); + } + +} + + +/* + * bte_reset_nasid(nasid_t) + * + * Does a soft reset of the BTEs on the specified nasid. + * This is followed by a one-line transfer from each of the + * virtual interfaces. + */ +void +bte_reset_nasid(nasid_t n) +{ + ii_ibcr_u_t ibcr; + + ibcr.ii_ibcr_regval = REMOTE_HUB_L(n, IIO_IBCR); + ibcr.ii_ibcr_fld_s.i_soft_reset = 1; + REMOTE_HUB_S(n, IIO_IBCR, ibcr.ii_ibcr_regval); + + /* One line transfer on virtual interface 0 */ + REMOTE_HUB_S(n, IIO_IBLS_0, IBLS_BUSY | 1); + REMOTE_HUB_S(n, IIO_IBSA_0, TO_PHYS(__pa(&nodepda->bte_cleanup))); + REMOTE_HUB_S(n, IIO_IBDA_0, + TO_PHYS(__pa(&nodepda->bte_cleanup[4*L1_CACHE_BYTES]))); + REMOTE_HUB_S(n, IIO_IBNA_0, + TO_PHYS(__pa(&nodepda->bte_cleanup[4*L1_CACHE_BYTES]))); + REMOTE_HUB_S(n, IIO_IBCT_0, BTE_NOTIFY); + while (REMOTE_HUB_L(n, IIO_IBLS0)) { + /* >>> Need some way out in case of hang... */ + } + + /* One line transfer on virtual interface 1 */ + REMOTE_HUB_S(n, IIO_IBLS_1, IBLS_BUSY | 1); + REMOTE_HUB_S(n, IIO_IBSA_1, TO_PHYS(__pa(nodepda->bte_cleanup))); + REMOTE_HUB_S(n, IIO_IBDA_1, + TO_PHYS(__pa(nodepda->bte_cleanup[4 * L1_CACHE_BYTES]))); + REMOTE_HUB_S(n, IIO_IBNA_1, + TO_PHYS(__pa(nodepda->bte_cleanup[5 * L1_CACHE_BYTES]))); + REMOTE_HUB_S(n, IIO_IBCT_1, BTE_NOTIFY); + while (REMOTE_HUB_L(n, IIO_IBLS1)) { + /* >>> Need some way out in case of hang... */ } } + /* * bte_init_cpu() * @@ -70,14 +154,8 @@ void bte_init_cpu(void) { - /* Called by setup.c as each cpu is being added to the nodepda */ - if (local_node_data->active_cpu_count & 0x1) { - pda.cpubte[0] = &(nodepda->node_bte_info[0]); - pda.cpubte[1] = &(nodepda->node_bte_info[1]); - } else { - pda.cpubte[0] = &(nodepda->node_bte_info[1]); - pda.cpubte[1] = &(nodepda->node_bte_info[0]); - } + pda->cpu_bte_if[0] = &(nodepda->bte_if[1]); + pda->cpu_bte_if[1] = &(nodepda->bte_if[0]); } @@ -93,14 +171,12 @@ * len - number of bytes to transfer from source to dest. * mode - hardware defined. See reference information * for IBCT0/1 in the SGI documentation. - * bteBlock - kernel virtual address of a temporary - * buffer used during unaligned transfers. * * NOTE: If the source, dest, and len are all cache line aligned, * then it would be _FAR_ preferrable to use bte_copy instead. */ bte_result_t -bte_unaligned_copy(u64 src, u64 dest, u64 len, u64 mode, char *bteBlock) +bte_unaligned_copy(u64 src, u64 dest, u64 len, u64 mode) { int destFirstCacheOffset; u64 headBteSource; @@ -113,10 +189,18 @@ u64 footBcopyDest; u64 footBcopyLen; bte_result_t rv; + char *bteBlock; if (len == 0) { return (BTE_SUCCESS); } + +#ifdef CONFIG_IA64_SGI_BTE_LOCKING +#error bte_unaligned_copy() assumes single BTE selection in bte_copy(). +#else + /* temporary buffer used during unaligned transfers */ + bteBlock = pda->cpu_bte_if[0]->bte_test_buf; +#endif headBcopySrcOffset = src & L1_CACHE_MASK; destFirstCacheOffset = dest & L1_CACHE_MASK; diff -Nru a/arch/ia64/sn/kernel/irq.c b/arch/ia64/sn/kernel/irq.c --- a/arch/ia64/sn/kernel/irq.c Mon Dec 23 21:21:51 2002 +++ b/arch/ia64/sn/kernel/irq.c Mon Dec 23 21:21:51 2002 @@ -59,34 +59,33 @@ #include #include #include +#include int irq_to_bit_pos(int irq); - - static unsigned int -sn1_startup_irq(unsigned int irq) +sn_startup_irq(unsigned int irq) { return(0); } static void -sn1_shutdown_irq(unsigned int irq) +sn_shutdown_irq(unsigned int irq) { } static void -sn1_disable_irq(unsigned int irq) +sn_disable_irq(unsigned int irq) { } static void -sn1_enable_irq(unsigned int irq) +sn_enable_irq(unsigned int irq) { } static void -sn1_ack_irq(unsigned int irq) +sn_ack_irq(unsigned int irq) { #ifdef CONFIG_IA64_SGI_SN1 int bit = -1; @@ -149,7 +148,7 @@ } static void -sn1_end_irq(unsigned int irq) +sn_end_irq(unsigned int irq) { #ifdef CONFIG_IA64_SGI_SN1 unsigned long long intpend_val, mask = 0x70L; @@ -187,87 +186,82 @@ } static void -sn1_set_affinity_irq(unsigned int irq, unsigned long mask) +sn_set_affinity_irq(unsigned int irq, unsigned long mask) { } struct hw_interrupt_type irq_type_iosapic_level = { "SN hub", - sn1_startup_irq, - sn1_shutdown_irq, - sn1_enable_irq, - sn1_disable_irq, - sn1_ack_irq, - sn1_end_irq, - sn1_set_affinity_irq + sn_startup_irq, + sn_shutdown_irq, + sn_enable_irq, + sn_disable_irq, + sn_ack_irq, + sn_end_irq, + sn_set_affinity_irq }; -#define irq_type_sn1 irq_type_iosapic_level -struct irq_desc *_sn1_irq_desc[NR_CPUS]; +#define irq_type_sn irq_type_iosapic_level +struct irq_desc *_sn_irq_desc[NR_CPUS]; struct irq_desc * -sn1_irq_desc(unsigned int irq) { +sn_irq_desc(unsigned int irq) { int cpu = irq >> 8; irq = irq & 0xff; - return(_sn1_irq_desc[cpu] + irq); + return(_sn_irq_desc[cpu] + irq); } u8 -sn1_irq_to_vector(u8 irq) { +sn_irq_to_vector(u8 irq) { return(irq & 0xff); } -unsigned int -sn1_local_vector_to_irq(u8 vector) { - return ( (smp_processor_id() << 8) + vector); +int gsi_to_vector(u32 irq) { + return irq & 0xff; } -int -sn1_valid_irq(u8 irq) { +int gsi_to_irq(u32 irq) { + return irq & 0xff; +} - return( ((irq & 0xff) < NR_IRQS) && ((irq >> 8) < NR_CPUS) ); +unsigned int +sn_local_vector_to_irq(u8 vector) { + return (CPU_VECTOR_TO_IRQ(smp_processor_id(), vector)); } void *kmalloc(size_t, int); void -sn1_irq_init (void) +sn_irq_init (void) { int i; irq_desc_t *base_desc = _irq_desc; - for (i=IA64_FIRST_DEVICE_VECTOR; i @@ -113,7 +113,8 @@ * PORTING NOTE: revisit this statement. On hardware we put mbase at 0 and * the rest of the tables have to start at 1MB to skip PROM tables. */ -#define THREADPRIVATE(t) ((threadprivate_t*)(((long)mbase)+1024*1024+t*((sizeof(threadprivate_t)+511)/512*512))) +#define THREADPRIVATESZ() ((sizeof(threadprivate_t)+511)/512*512) +#define THREADPRIVATE(t) ((threadprivate_t*)(((long)mbase)+4096+t*THREADPRIVATESZ())) #define k_capture mbase->sk_capture #define k_go mbase->sk_go @@ -797,27 +798,31 @@ k_threadprivate[cpuid]->threadstate = state; } +#define MINBLK (16*1024*1024) static int build_mem_map(unsigned long start, unsigned long end, void *arg) { - long lstart; + long lstart, lend; long align = 8*MB; - /* - * HACK - skip the kernel on the first node - */ - printk ("LLSC memmap: start 0x%lx, end 0x%lx, (0x%lx - 0x%lx)\n", start, end, (long) virt_to_page(start), (long) virt_to_page(end-PAGE_SIZE)); - if (memmapx >= MAPCHUNKS) + if (memmapx >= MAPCHUNKS || (end-start) < MINBLK) return 0; - while (end > start && (PageReserved(virt_to_page(end-PAGE_SIZE)) || virt_to_page(end-PAGE_SIZE)->count.counter > 0)) - end -= PAGE_SIZE; - lstart = end; - while (lstart > start && (!PageReserved(virt_to_page(lstart-PAGE_SIZE)) && virt_to_page(lstart-PAGE_SIZE)->count.counter == 0)) + /* + * Start in the middle of the range & find the first non-free page in both directions + * from the midpoint. This is likely to be the bigest free block. + */ + lend = lstart = start + (end-start)/2; + while (lend < end && !PageReserved(virt_to_page(lend)) && virt_to_page(lend)->count.counter == 0) + lend += PAGE_SIZE; + lend -= PAGE_SIZE; + + while (lstart >= start && !PageReserved(virt_to_page(lstart)) && virt_to_page(lstart)->count.counter == 0) lstart -= PAGE_SIZE; + lstart += PAGE_SIZE; lstart = (lstart + align -1) /align * align; end = end / align * align; @@ -834,7 +839,7 @@ void int_test(void); int -llsc_main (int cpuid, long mbasex) +llsc_main (int cpuid) { int i, cpu, is_master, repeatcnt=0; unsigned int preverr=0, errs=0, pass=0; @@ -856,10 +861,11 @@ if (is_master) { + mbase = (control_t*) __get_free_pages(GFP_KERNEL, get_order(4096+THREADPRIVATESZ()*LLSC_MAXCPUS)); + printk("LLSC: mbase 0x%lx\n", (long)mbase); print_params(); if(!IS_RUNNING_ON_SIMULATOR()) spin(10); - mbase = (control_t*)mbasex; k_currentpass = 0; k_go = ST_IDLE; k_passes = DEF_PASSES; @@ -882,6 +888,7 @@ memset(k_threadprivate[i], 0, sizeof(*k_threadprivate[i])); init_private[i] = i; } + mb(); initialized = 1; } else { while (initialized == 0) @@ -1005,15 +1012,14 @@ printk("Testing cross interrupts\n"); - while (control_cpu != NR_CPUS) { - if (mycpu == control_cpu) { - for (cpu=0; cpu + +#ifdef CONFIG_IA64_SGI_SN1 #define MACHVEC_PLATFORM_NAME sn1 +#else CONFIG_IA64_SGI_SN1 +#define MACHVEC_PLATFORM_NAME sn2 +#else +#error "unknown platform" +#endif + #include #include #include void* -sn1_mk_io_addr_MACRO +sn_mk_io_addr_MACRO dma_addr_t -sn1_pci_map_single_MACRO +sn_pci_map_single_MACRO int -sn1_pci_map_sg_MACRO +sn_pci_map_sg_MACRO unsigned long -sn1_virt_to_phys_MACRO +sn_virt_to_phys_MACRO void * -sn1_phys_to_virt_MACRO +sn_phys_to_virt_MACRO diff -Nru a/arch/ia64/sn/kernel/misctest.c b/arch/ia64/sn/kernel/misctest.c --- a/arch/ia64/sn/kernel/misctest.c Mon Dec 23 21:21:59 2002 +++ b/arch/ia64/sn/kernel/misctest.c Mon Dec 23 21:21:59 2002 @@ -4,119 +4,368 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 2000-2001 Silicon Graphics, Inc. All rights reserved. + * Copyright (C) 2000-2002 Silicon Graphics, Inc. All rights reserved. */ #include #include #include +#include #include #include #include #include - +#include +#include +#include +#include +#include +#include +#include extern int autotest_enabled; -int mcatest=0; - +long mcatest=0, debug0, debug1, debug2, debug3; +#define HDELAY(t) (IS_RUNNING_ON_SIMULATOR() ? udelay(1) : udelay(t)) /* * mcatest - * 1 = expected MCA - * 2 = unexpected MCA - * 3 = expected MCA + unexpected MCA - * 4 = INIT - * 5 = speculative load to garbage memory address - * 6 = speculative load with ld8.s (needs poison hack in PROM) - * 7 = speculative load from mis-predicted branch (needs poison hack in PROM) + * mactest contains a decimal number (RPTT) where + * R - flag, if non zero, run forever + * + * P - identifies when to run the test + * 0 execute test at cpu 0 early init + * 1 execute test at cpu 0 idle + * 2 execute test at last (highest numbered) cpu idle + * 3 execute test on all cpus at idle + * + * TT- identifies test to run + * 01 = MCA via dup TLB dropin + * 02 = MCA via garbage address + * 03 = lfetch via garbage address + * 05 = INIT self + * 06 = INIT other cpu + * 07 = INIT non-existent cpu + * 10 = IPI stress test. Target cpu 0 + * 11 = IPI stress test. Target all cpus + * 12 = TLB stress test + * 13 = Park cpu (spinloop) + * 14 = One shot TLB test with tlb spinlock + * 15 = One shot TLB test + * 16 = One shot TLB test sync'ed with RTC + * 20 = set led to the cpuid & spin. + * 21 = Try mixed cache/uncached refs & see what happens + * 22 = Call SAL reboot + * 23 = Call PAL halt */ static int __init set_mcatest(char *str) { - get_option(&str, &mcatest); + int val; + get_option(&str, &val); + mcatest = val; return 1; } - __setup("mcatest=", set_mcatest); +static int __init set_debug0(char *str) +{ + int val; + get_option(&str, &val); + debug0 = val; + return 1; +} +__setup("debug0=", set_debug0); + +static int __init set_debug1(char *str) +{ + int val; + get_option(&str, &val); + debug1 = val; + return 1; +} +__setup("debug1=", set_debug1); + +static int __init set_debug2(char *str) +{ + int val; + get_option(&str, &val); + debug2 = val; + return 1; +} +__setup("debug2=", set_debug2); + +static int __init set_debug3(char *str) +{ + int val; + get_option(&str, &val); + debug3 = val; + return 1; +} +__setup("debug3=", set_debug3); + +static volatile int go; + +static void +do_sync(int pos) { + if (pos != 3) + return; + else if (smp_processor_id() == 0) + go = 1; + else + while (!go); +} + +static void +sgi_mcatest_bkpt(void) +{ +} + + +/* + * Optional test + * pos - 0 called from early init + * pos - called when cpu about to go idle (fully initialized + */ void -sgi_mcatest(void) +sgi_mcatest(int pos) { - if (mcatest == 1 || mcatest == 3) { - long *p, result, adrs[] = {0xc0000a000f021004UL, 0xc0000a000f026004UL, 0x800000000, 0x500000, 0}; - long size[] = {1,2,4,8}; - int r, i, j; - p = (long*)0xc000000000000000UL; - ia64_fc(p); - *p = 0x0123456789abcdefL; - for (i=0; i<5; i++) { - for (j=0; j<4; j++) { - printk("Probing 0x%lx, size %ld\n", adrs[i], size[j]); - result = -1; - r = ia64_sn_probe_io_slot (adrs[i], size[j], &result); - printk(" status %d, val 0x%lx\n", r, result); + long spos, test, repeat; + int cpu, curcpu, i, n; + + //if (IS_RUNNING_ON_SIMULATOR()) mcatest=1323; + repeat = mcatest/1000; + spos = (mcatest/100)%10; + test = mcatest % 100; + curcpu = smp_processor_id(); + + if ( mcatest == 0 || !((pos == 0 && spos == 0) || + (pos == 1 && spos == 3) || + (pos == 1 && spos == 1 && curcpu == 0) || + (pos == 1 && spos == 2 && curcpu == smp_num_cpus-1))) + return; + +again: + if (test == 1 || test == 2 || test == 3) { + void zzzmca(int); + printk("CPU %d: About to cause unexpected MCA\n", curcpu); + HDELAY(100000); + sgi_mcatest_bkpt(); + do_sync(spos); + + zzzmca(test-1); + + HDELAY(100000); + } + + if (test == 4) { + long result, adrs[] = {0xe0021000009821e0UL, 0xc0003f3000000000UL, 0xc0000081101c0000UL, 0xc00000180e021004UL, 0xc00000180e022004UL, 0xc00000180e023004UL }; + long size[] = {1,2,4,8}; + int r, i, j, k; + + for (k=0; k<2; k++) { + for (i=0; i<6; i++) { + for (j=0; j<4; j++) { + printk("Probing 0x%lx, size %ld\n", adrs[i], size[j]); + result = -1; + r = ia64_sn_probe_io_slot (adrs[i], size[j], &result); + printk(" status %d, val 0x%lx\n", r, result); + udelay(100000); + } } } + } - if (mcatest == 2 || mcatest == 3) { - void zzzmca(int, int, int); - printk("About to cause unexpected MCA\n"); - zzzmca(mcatest, 0x32dead, 0x33dead); - } - if (mcatest == 4) { - long *p; - int delivery_mode = 5; - printk("About to try to cause an INIT on cpu 0\n"); - p = (long*)((0xc0000a0000000000LL | ((long)get_nasid())<<33) | 0x1800080); - *p = (delivery_mode << 8); - udelay(10000); - printk("Returned from INIT\n"); - } - if (mcatest == 5) { - int zzzspec(long); - int i; - long psr, dcr, res, val, addr=0xff00000000UL; - - dcr = ia64_get_dcr(); - for (i=0; i<5; i++) { - printk("Default DCR: 0x%lx\n", ia64_get_dcr()); - printk("zzzspec: 0x%x\n", zzzspec(addr)); - ia64_set_dcr(0); - printk("New DCR: 0x%lx\n", ia64_get_dcr()); - printk("zzzspec: 0x%x\n", zzzspec(addr)); - ia64_set_dcr(dcr); - res = ia64_sn_probe_io_slot(0xff00000000UL, 8, &val); - printk("zzzspec: probe %ld, 0x%lx\n", res, val); - psr = ia64_clear_ic(); - ia64_itc(0x2, 0xe00000ff00000000UL, - pte_val(pfn_pte(0xff00000000UL >> PAGE_SHIFT, - __pgprot(__DIRTY_BITS|_PAGE_PL_0|_PAGE_AR_RW))), _PAGE_SIZE_256M); - ia64_set_psr(psr); - ia64_srlz_i (); - } + if (test == 5) { + cpu = curcpu; + printk("CPU %d: About to send INIT to self (cpu %d)\n", curcpu, cpu); + HDELAY(100000); + sgi_mcatest_bkpt(); + do_sync(spos); + + platform_send_ipi(cpu, 0, IA64_IPI_DM_INIT, 0); + + HDELAY(100000); + printk("CPU %d: Returned from INIT\n", curcpu); } - if (mcatest == 6) { - int zzzspec(long); - int i; - long dcr, addr=0xe000000008000000UL; - - dcr = ia64_get_dcr(); - for (i=0; i<5; i++) { - printk("zzzspec: 0x%x\n", zzzspec(addr)); - ia64_set_dcr(0); - } - ia64_set_dcr(dcr); - } - if (mcatest == 7) { - int zzzspec2(long, long); - int i; - long addr=0xe000000008000000UL; - long addr2=0xe000000007000000UL; - - for (i=0; i<5; i++) { - printk("zzzspec2\n"); - zzzspec2(addr, addr2); + + if (test == 6) { + cpu = curcpu ^ 1; + printk("CPU %d: About to send INIT to other cpu (cpu %d)\n", curcpu, cpu); + HDELAY(100000); + sgi_mcatest_bkpt(); + do_sync(spos); + + platform_send_ipi(cpu, 0, IA64_IPI_DM_INIT, 0); + + HDELAY(100000); + printk("CPU %d: Done\n", curcpu); + } + + if (test == 7) { + printk("CPU %d: About to send INIT to non-existent cpu\n", curcpu); + HDELAY(100000); + sgi_mcatest_bkpt(); + do_sync(spos); + + sn_send_IPI_phys(0xffff, 0, IA64_IPI_DM_INIT); + + HDELAY(100000); + printk("CPU %d: Done\n", curcpu); + } + + if (test == 10) { + n = IS_RUNNING_ON_SIMULATOR() ? 10 : 10000000; + cpu = 0; + printk("CPU %d: IPI stress test. Target cpu 0\n", curcpu); + HDELAY(100000); + sgi_mcatest_bkpt(); + do_sync(spos); + + for (i=0; i 2 && cpu != curcpu) + platform_send_ipi(cpu, IA64_IPI_RESCHEDULE, IA64_IPI_DM_INT, 0); + + HDELAY(100000); + printk("CPU %d: Done\n", curcpu); + } + + if (test == 12) { + long adr = 0xe002200000000000UL; + n = IS_RUNNING_ON_SIMULATOR() ? 1000 : 100000; + printk("CPU %d: TLB flush stress test\n", curcpu); + HDELAY(100000); + sgi_mcatest_bkpt(); + do_sync(spos); + + for (i=0; i= smp_num_cpus-2) { + printk("Parking cpu %d\n", curcpu); + local_irq_disable(); + while(1); + } else { + printk("Waiting cpu %d\n", curcpu); + HDELAY(1000000); + } + HDELAY(1000000); + inited = 1; + } + if (test == 16 || test == 17) { + unsigned long t, shift, mask; + mask = (smp_num_cpus > 16) ? 0x1f : 0xf; + shift = 25-debug1; + do { + t = get_cycles(); + if (IS_RUNNING_ON_SIMULATOR()) + t = (t>>8); + else + t = (t>>shift); + t = t & mask; + } while (t == curcpu); + do { + t = get_cycles(); + if (IS_RUNNING_ON_SIMULATOR()) + t = (t>>8); + else + t = (t>>shift); + t = t & mask; + } while (t != curcpu); + } + if(debug3) printk("CPU %d: One TLB start\n", curcpu); + if (test != 17) platform_global_tlb_purge(adr, adr+PAGE_SIZE*debug0, 14); + if(debug3) printk("CPU %d: One TLB flush done\n", curcpu); + } + if (test == 20) { + local_irq_disable(); + set_led_bits(smp_processor_id(), 0xff); + while(1); + } + if (test == 21) { + extern long ia64_mca_stack[]; + int i, n; + volatile long *p, *up; + p = (volatile long*)__imva(ia64_mca_stack); + up = (volatile long*)(__pa(p) | __IA64_UNCACHED_OFFSET); + + if(!IS_RUNNING_ON_SIMULATOR()) printk("ZZZ get data in cache\n"); + for (n=0, i=0; i<100; i++) + n += *(p+i); + if(!IS_RUNNING_ON_SIMULATOR()) printk("ZZZ Make uncached refs to same data\n"); + for (n=0, i=0; i<100; i++) + n += *(up+i); + if(!IS_RUNNING_ON_SIMULATOR()) printk("ZZZ dirty the data via cached refs\n"); + for (n=0, i=0; i<100; i++) + *(p+i) = i; + if(!IS_RUNNING_ON_SIMULATOR()) printk("ZZZ Make uncached refs to same data\n"); + for (n=0, i=0; i<100; i++) + n += *(up+i); + if(!IS_RUNNING_ON_SIMULATOR()) printk("ZZZ Flushing cache\n"); + for (n=0, i=0; i<100; i++) + ia64_fc((void*)(p+i)); + printk("ZZZ done\n"); + } + if (test == 21) { + int i; + volatile long tb, t[10]; + for (i=0; i<10; i++) { + tb = debug3+ia64_get_itc(); + sgi_mcatest_bkpt(); + t[i] = ia64_get_itc() - tb; + } + for (i=0; i<10; i++) { + printk("ZZZ NULL 0x%lx\n", t[i]); + } + for (i=0; i<10; i++) { + tb = debug3+ia64_get_itc(); + ia64_pal_call_static(PAL_MC_DRAIN, 0, 0, 0, 0); + t[i] = ia64_get_itc() - tb; } + for (i=0; i<10; i++) { + printk("ZZZ DRAIN 0x%lx\n", t[i]); + } + } + if (test == 22) { + extern void machine_restart(char*); + printk("ZZZ machine_restart\n"); + machine_restart(0); } + if (test == 23) { + printk("ZZZ ia64_pal_halt_light\n"); + ia64_pal_halt_light(); + } + if (repeat) + goto again; + } diff -Nru a/arch/ia64/sn/kernel/setup.c b/arch/ia64/sn/kernel/setup.c --- a/arch/ia64/sn/kernel/setup.c Mon Dec 23 21:21:52 2002 +++ b/arch/ia64/sn/kernel/setup.c Mon Dec 23 21:21:52 2002 @@ -47,15 +47,14 @@ #include #include #include -#include +#include +#include +#include #include #include #include #include -#ifdef CONFIG_IA64_MCA -#include -#endif #include #include #include @@ -68,15 +67,24 @@ #include #include #include +#include +#include #ifdef CONFIG_IA64_SGI_SN2 #include #endif +DEFINE_PER_CPU(struct pda_s, pda_percpu); + extern void bte_init_node (nodepda_t *, cnodeid_t); extern void bte_init_cpu (void); -long sn_rtc_cycles_per_second; +unsigned long sn_rtc_cycles_per_second; +unsigned long sn_rtc_usec_per_cyc; + +partid_t sn_partid = -1; +char sn_system_serial_number_string[128]; +u64 sn_partition_serial_number; /* * This is the address of the RRegs in the HSpace of the global @@ -88,9 +96,9 @@ */ u64 master_node_bedrock_address = 0UL; -static void sn_init_pdas(void); +static void sn_init_pdas(char **); -extern struct irq_desc *_sn1_irq_desc[]; +extern struct irq_desc *_sn_irq_desc[]; #if defined(CONFIG_IA64_SGI_SN1) extern synergy_da_t *Synergy_da_indr[]; @@ -108,15 +116,15 @@ * code. This is just enough to make the console code think we're on a * VGA color display. */ -struct screen_info sn1_screen_info = { - .orig_x = 0, - .orig_y = 0, - .orig_video_mode = 3, - .orig_video_cols = 80, - .orig_video_ega_bx = 3, - .orig_video_lines = 25, - .orig_video_isVGA = 1, - .orig_video_points = 16 +struct screen_info sn_screen_info = { + orig_x: 0, + orig_y: 0, + orig_video_mode: 3, + orig_video_cols: 80, + orig_video_ega_bx: 3, + orig_video_lines: 25, + orig_video_isVGA: 1, + orig_video_points: 16 }; /* @@ -130,59 +138,81 @@ char drive_info[4*16]; /** - * sn1_map_nr - return the mem_map entry for a given kernel address + * sn_map_nr - return the mem_map entry for a given kernel address * @addr: kernel address to query * * Finds the mem_map entry for the kernel address given. Used by * virt_to_page() (asm-ia64/page.h), among other things. */ unsigned long -sn1_map_nr (unsigned long addr) +sn_map_nr (unsigned long addr) { - return MAP_NR_DISCONTIG(addr); + return BANK_MAP_NR(addr); } /** - * early_sn1_setup - early setup routine for SN platforms + * early_sn_setup - early setup routine for SN platforms * * Sets up an intial console to aid debugging. Intended primarily * for bringup, it's only called if %BRINGUP and %CONFIG_IA64_EARLY_PRINTK * are turned on. See start_kernel() in init/main.c. */ #if defined(CONFIG_IA64_EARLY_PRINTK) + void __init -early_sn1_setup(void) +early_sn_setup(void) { -#if defined(CONFIG_SERIAL_SGI_L1_PROTOCOL) - if ( IS_RUNNING_ON_SIMULATOR() ) -#endif - { -#ifdef CONFIG_IA64_SGI_SN2 - master_node_bedrock_address = (u64)REMOTE_HUB(get_nasid(), SH_JUNK_BUS_UART0); -#else + void ia64_sal_handler_init (void *entry_point, void *gpval); + efi_system_table_t *efi_systab; + efi_config_table_t *config_tables; + struct ia64_sal_systab *sal_systab; + struct ia64_sal_desc_entry_point *ep; + char *p; + int i; + + /* + * Parse enough of the SAL tables to locate the SAL entry point. Since, console + * IO on SN2 is done via SAL calls, early_printk wont work without this. + * + * This code duplicates some of the ACPI table parsing that is in efi.c & sal.c. + * Any changes to those file may have to be made hereas well. + */ + efi_systab = (efi_system_table_t*)__va(ia64_boot_param->efi_systab); + config_tables = __va(efi_systab->tables); + for (i = 0; i < efi_systab->nr_tables; i++) { + if (efi_guidcmp(config_tables[i].guid, SAL_SYSTEM_TABLE_GUID) == 0) { + sal_systab = __va(config_tables[i].table); + p = (char*)(sal_systab+1); + for (i = 0; i < sal_systab->entry_count; i++) { + if (*p == SAL_DESC_ENTRY_POINT) { + ep = (struct ia64_sal_desc_entry_point *) p; + ia64_sal_handler_init(__va(ep->sal_proc), __va(ep->gp)); + break; + } + p += SAL_DESC_SIZE(*p); + } + } + } + + if ( IS_RUNNING_ON_SIMULATOR() ) { +#if defined(CONFIG_IA64_SGI_SN1) master_node_bedrock_address = (u64)REMOTE_HSPEC_ADDR(get_nasid(), 0); +#else + master_node_bedrock_address = (u64)REMOTE_HUB(get_nasid(), SH_JUNK_BUS_UART0); #endif - printk(KERN_DEBUG "early_sn1_setup: setting master_node_bedrock_address to 0x%lx\n", master_node_bedrock_address); + printk(KERN_DEBUG "early_sn_setup: setting master_node_bedrock_address to 0x%lx\n", master_node_bedrock_address); } } -#endif /* CONFIG_IA64_EARLY_PRINTK */ +#endif /* CONFIG_IA64_SGI_SN1 */ -#ifdef NOT_YET_CONFIG_IA64_MCA -extern void ia64_mca_cpe_int_handler (int cpe_irq, void *arg, struct pt_regs *ptregs); -static struct irqaction mca_cpe_irqaction = { - .handler = ia64_mca_cpe_int_handler, - .flags = SA_INTERRUPT, - .name = "cpe_hndlr" -}; -#endif #ifdef CONFIG_IA64_MCA -extern int platform_irq_list[]; +extern int platform_intr_list[]; #endif extern nasid_t master_nasid; /** - * sn1_setup - SN platform setup routine + * sn_setup - SN platform setup routine * @cmdline_p: kernel command line * * Handles platform setup for SN machines. This includes determining @@ -190,82 +220,77 @@ * setting up per-node data areas. The console is also initialized here. */ void __init -sn1_setup(char **cmdline_p) +sn_setup(char **cmdline_p) { long status, ticks_per_sec, drift; int i; + int major = sn_sal_rev_major(), minor = sn_sal_rev_minor(); -#if defined(CONFIG_SERIAL) && !defined(CONFIG_SERIAL_SGI_L1_PROTOCOL) - struct serial_struct req; + printk("SGI SAL version %x.%02x\n", major, minor); + + /* + * Confirm the SAL we're running on is recent enough... + */ + if ((major < SN_SAL_MIN_MAJOR) || (major == SN_SAL_MIN_MAJOR && + minor < SN_SAL_MIN_MINOR)) { + printk(KERN_ERR "This kernel needs SGI SAL version >= " + "%x.%02x\n", SN_SAL_MIN_MAJOR, SN_SAL_MIN_MINOR); + panic("PROM version too old\n"); + } + +#ifdef CONFIG_IA64_SGI_SN2 + { + extern void io_sh_swapper(int, int); + io_sh_swapper(get_nasid(), 0); + } #endif master_nasid = get_nasid(); (void)get_console_nasid(); +#ifndef CONFIG_IA64_SGI_SN1 + { + extern nasid_t get_master_baseio_nasid(void); + (void)get_master_baseio_nasid(); + } +#endif status = ia64_sal_freq_base(SAL_FREQ_BASE_REALTIME_CLOCK, &ticks_per_sec, &drift); - if (status != 0 || ticks_per_sec < 100000) - printk(KERN_WARNING "unable to determine platform RTC clock frequency\n"); + if (status != 0 || ticks_per_sec < 100000) { + printk(KERN_WARNING "unable to determine platform RTC clock frequency, guessing.\n"); + /* PROM gives wrong value for clock freq. so guess */ + sn_rtc_cycles_per_second = 1000000000000UL/30000UL; + } else sn_rtc_cycles_per_second = ticks_per_sec; + +#ifdef CONFIG_IA64_SGI_SN1 + /* PROM has wrong value on SN1 */ + sn_rtc_cycles_per_second = 990177; +#endif + sn_rtc_usec_per_cyc = ((1000000UL< PAGE_SIZE) + if ( (((unsigned long)pda & ~PAGE_MASK) + sizeof(pda_t)) > PAGE_SIZE) panic("overflow of cpu_data page"); /* @@ -348,11 +373,7 @@ void __init sn_cpu_init(void) { - int cpuid; - int cpuphyid; - int nasid; - int slice; - int cnode; + int cpuid, cpuphyid, nasid, nodeid, slice; /* * The boot cpu makes this call again after platform initialization is @@ -364,77 +385,104 @@ cpuid = smp_processor_id(); cpuphyid = ((ia64_get_lid() >> 16) & 0xffff); nasid = cpu_physical_id_to_nasid(cpuphyid); - cnode = nasid_to_cnodeid(nasid); + nodeid = cpu_to_node_map[cpuphyid]; slice = cpu_physical_id_to_slice(cpuphyid); - pda.p_nodepda = nodepdaindr[cnode]; - pda.led_address = (long*) (LED0 + (slice<active_cpu_count == 1) - nodepda->node_first_cpu = cpuid; - -#ifdef CONFIG_IA64_SGI_SN1 - { - int synergy; - synergy = cpu_physical_id_to_synergy(cpuphyid); - pda.p_subnodepda = &nodepdaindr[cnode]->snpda[synergy]; + memset(pda, 0, sizeof(pda_t)); + pda->p_nodepda = nodepdaindr[nodeid]; + pda->hb_count = HZ/2; + pda->hb_state = 0; + pda->idle_flag = 0; + pda->pio_write_status_addr = (volatile unsigned long *) + LOCAL_MMR_ADDR((slice < 2 ? SH_PIO_WRITE_STATUS_0 : SH_PIO_WRITE_STATUS_1 ) ); + pda->mem_write_status_addr = (volatile u64 *) + LOCAL_MMR_ADDR((slice < 2 ? SH_MEMORY_WRITE_STATUS_0 : SH_MEMORY_WRITE_STATUS_1 ) ); + + if (nodepda->node_first_cpu == cpuid) { + int buddy_nasid; + buddy_nasid = cnodeid_to_nasid(local_nodeid == numnodes - 1 ? 0 : local_nodeid + 1); + pda->pio_shub_war_cam_addr = (volatile unsigned long*)GLOBAL_MMR_ADDR(nasid, SH_PI_CAM_CONTROL); } -#endif -#ifdef CONFIG_IA64_SGI_SN2 + bte_init_cpu(); +} - /* - * We must use different memory allocators for first cpu (bootmem - * allocator) than for the other cpus (regular allocator). - */ - if (cpuid == 0) - irqpdaindr[cpuid] = alloc_bootmem_node(NODE_DATA(cpuid_to_cnodeid(cpuid)),sizeof(irqpda_t)); - else - irqpdaindr[cpuid] = page_address(alloc_pages_node(local_cnodeid(), GFP_KERNEL, get_order(sizeof(irqpda_t)))); - memset(irqpdaindr[cpuid], 0, sizeof(irqpda_t)); - pda.p_irqpda = irqpdaindr[cpuid]; - pda.pio_write_status_addr = (volatile unsigned long *)LOCAL_MMR_ADDR((slice < 2 ? SH_PIO_WRITE_STATUS_0 : SH_PIO_WRITE_STATUS_1 ) ); +#ifdef II_PRTE_TLB_WAR +long iiprt_lock[16*64] __cacheline_aligned; /* allow for NASIDs up to 64 */ #endif -#ifdef CONFIG_IA64_SGI_SN1 - pda.bedrock_rev_id = (volatile unsigned long *) LOCAL_HUB(LB_REV_ID); - if (cpuid_to_synergy(cpuid)) - /* CPU B */ - pda.pio_write_status_addr = (volatile unsigned long *) GBL_PERF_B_ADDR; - else - /* CPU A */ - pda.pio_write_status_addr = (volatile unsigned long *) GBL_PERF_A_ADDR; -#endif +#ifdef BUS_INT_WAR + +#include +#include + +void ia64_handle_irq (ia64_vector vector, struct pt_regs *regs); + +static spinlock_t irq_lock = SPIN_LOCK_UNLOCKED; + +#define IRQCPU(irq) ((irq)>>8) + +void +sn_add_polled_interrupt(int irq, int interval) +{ + unsigned long flags, irq_cnt; + sn_poll_entry_t *irq_list; + + irq_list = pdacpu(IRQCPU(irq)).pda_poll_entries;; + + spin_lock_irqsave(&irq_lock, flags); + irq_cnt = pdacpu(IRQCPU(irq)).pda_poll_entry_count; + irq_list[irq_cnt].irq = irq; + irq_list[irq_cnt].interval = interval; + irq_list[irq_cnt].tick = interval; + pdacpu(IRQCPU(irq)).pda_poll_entry_count++; + spin_unlock_irqrestore(&irq_lock, flags); - bte_init_cpu(); } +void +sn_delete_polled_interrupt(int irq) +{ + unsigned long flags, i, irq_cnt; + sn_poll_entry_t *irq_list; -/** - * cnodeid_to_cpuid - convert a cnode to a cpuid of a cpu on the node. - * @cnode: node to get a cpuid from - * - * Returns -1 if no cpus exist on the node. - * NOTE:BRINGUP ZZZ This is NOT a good way to find cpus on the node. - * Need a better way!! - */ -int -cnodeid_to_cpuid(int cnode) { - int cpu; - - for (cpu = 0; cpu < NR_CPUS; cpu++) { - if (!cpu_online(cpu)) continue; - if (cpuid_to_cnodeid(cpu) == cnode) + irq_list = pdacpu(IRQCPU(irq)).pda_poll_entries; + + spin_lock_irqsave(&irq_lock, flags); + irq_cnt = pdacpu(IRQCPU(irq)).pda_poll_entry_count; + for (i=0; ipda_poll_entries; + + for (i=0; ipda_poll_entry_count; i++, irq_list++) { + if (--irq_list->tick <= 0) { + irq_list->tick = irq_list->interval; + local_irq_save(flags); + ia64_handle_irq(irq_to_vector(irq_list->irq), 0); + local_irq_restore(flags); + } + } +} + +#endif diff -Nru a/arch/ia64/sn/kernel/sn1/Makefile b/arch/ia64/sn/kernel/sn1/Makefile --- a/arch/ia64/sn/kernel/sn1/Makefile Mon Dec 23 21:21:55 2002 +++ b/arch/ia64/sn/kernel/sn1/Makefile Mon Dec 23 21:21:55 2002 @@ -1,5 +1,5 @@ # -# ia64/platform/sn/sn1/Makefile +# arch/ia64/sn/kernel/sn1/Makefile # # Copyright (C) 1999,2001-2002 Silicon Graphics, Inc. All rights reserved. # @@ -32,6 +32,14 @@ # http://oss.sgi.com/projects/GenInfo/NoticeExplan # -obj-y := cache.o error.o iomv.o synergy.o sn1_smp.o -EXTRA_CFLAGS := -DLITTLE_ENDIAN +EXTRA_CFLAGS := -DLITTLE_ENDIAN + +.S.s: + $(CPP) $(AFLAGS) $(AFLAGS_KERNEL) -o $*.s $< +.S.o: + $(CC) $(AFLAGS) $(AFLAGS_KERNEL) -c -o $*.o $< + +O_TARGET = sn1.o + +obj-y = cache.o error.o iomv.o synergy.o sn1_smp.o diff -Nru a/arch/ia64/sn/kernel/sn1/iomv.c b/arch/ia64/sn/kernel/sn1/iomv.c --- a/arch/ia64/sn/kernel/sn1/iomv.c Mon Dec 23 21:21:55 2002 +++ b/arch/ia64/sn/kernel/sn1/iomv.c Mon Dec 23 21:21:55 2002 @@ -3,17 +3,25 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 2000-2001 Silicon Graphics, Inc. All rights reserved. + * Copyright (C) 2000-2002 Silicon Graphics, Inc. All rights reserved. */ -#include #include +#include #include -#include #include +#include -static inline void * -sn1_io_addr(unsigned long port) +/** + * sn_io_addr - convert an in/out port to an i/o address + * @port: port to convert + * + * Legacy in/out instructions are converted to ld/st instructions + * on IA64. This routine will convert a port number into a valid + * SN i/o address. Used by sn_in*() and sn_out*(). + */ +void * +sn_io_addr(unsigned long port) { if (!IS_RUNNING_ON_SIMULATOR()) { return( (void *) (port | __IA64_UNCACHED_OFFSET)); @@ -38,182 +46,20 @@ } /** - * sn1_inb - read a byte from a port - * @port: port to read from - * - * Reads a byte from @port and returns it to the caller. - */ -unsigned int -sn1_inb (unsigned long port) -{ -return __ia64_inb ( port ); -} - -/** - * sn1_inw - read a word from a port - * @port: port to read from + * sn1_mmiob - I/O space memory barrier * - * Reads a word from @port and returns it to the caller. - */ -unsigned int -sn1_inw (unsigned long port) -{ -return __ia64_inw ( port ); -} - -/** - * sn1_inl - read a word from a port - * @port: port to read from - * - * Reads a word from @port and returns it to the caller. - */ -unsigned int -sn1_inl (unsigned long port) -{ -return __ia64_inl ( port ); -} - -/** - * sn1_outb - write a byte to a port - * @port: port to write to - * @val: value to write - * - * Writes @val to @port. - */ -void -sn1_outb (unsigned char val, unsigned long port) -{ -return __ia64_outb ( val, port ); -} - -/** - * sn1_outw - write a word to a port - * @port: port to write to - * @val: value to write - * - * Writes @val to @port. - */ -void -sn1_outw (unsigned short val, unsigned long port) -{ -return __ia64_outw ( val, port ); -} - -/** - * sn1_outl - write a word to a port - * @port: port to write to - * @val: value to write - * - * Writes @val to @port. - */ -void -sn1_outl (unsigned int val, unsigned long port) -{ -return __ia64_outl ( val, port ); -} - -/** - * sn1_inb - read a byte from a port - * @port: port to read from + * Acts as a memory mapped I/O barrier for platforms that queue writes to + * I/O space. This ensures that subsequent writes to I/O space arrive after + * all previous writes. For most ia64 platforms, this is a simple + * 'mf.a' instruction. For other platforms, mmiob() may have to read + * a chipset register to ensure ordering. * - * Reads a byte from @port and returns it to the caller. + * On SN1, we wait for the PIO_WRITE_STATUS Bedrock register to clear. */ -unsigned int -sn1_inb (unsigned long port) -{ - volatile unsigned char *addr = sn1_io_addr(port); - unsigned char ret; - - ret = *addr; - __ia64_mf_a(); - return ret; -} - -/** - * sn1_inw - read a word from a port - * 2port: port to read from - * - * Reads a word from @port and returns it to the caller. - */ -unsigned int -sn1_inw (unsigned long port) -{ - volatile unsigned short *addr = sn1_io_addr(port); - unsigned short ret; - - ret = *addr; - __ia64_mf_a(); - return ret; -} - -/** - * sn1_inl - read a word from a port - * @port: port to read from - * - * Reads a word from @port and returns it to the caller. - */ -unsigned int -sn1_inl (unsigned long port) -{ - volatile unsigned int *addr = sn1_io_addr(port); - unsigned int ret; - - ret = *addr; - __ia64_mf_a(); - return ret; -} - -/** - * sn1_outb - write a byte to a port - * @port: port to write to - * @val: value to write - * - * Writes @val to @port. - */ -void -sn1_outb (unsigned char val, unsigned long port) -{ - volatile unsigned char *addr = sn1_io_addr(port); - - *addr = val; - __ia64_mf_a(); -} - -/** - * sn1_outw - write a word to a port - * @port: port to write to - * @val: value to write - * - * Writes @val to @port. - */ -void -sn1_outw (unsigned short val, unsigned long port) -{ - volatile unsigned short *addr = sn1_io_addr(port); - - *addr = val; - __ia64_mf_a(); -} - -/** - * sn1_outl - write a word to a port - * @port: port to write to - * @val: value to write - * - * Writes @val to @port. - */ -void -sn1_outl (unsigned int val, unsigned long port) -{ - volatile unsigned int *addr = sn1_io_addr(port); - - *addr = val; - __ia64_mf_a(); -} -#endif /* SN1_IOPORTS */ - void -sn_mmiob () +sn1_mmiob (void) { - PIO_FLUSH(); + (volatile unsigned long) (*pda.bedrock_rev_id); + while (!(volatile unsigned long) (*pda.pio_write_status_addr)) + udelay(5); } diff -Nru a/arch/ia64/sn/kernel/sn1/sn1_smp.c b/arch/ia64/sn/kernel/sn1/sn1_smp.c --- a/arch/ia64/sn/kernel/sn1/sn1_smp.c Mon Dec 23 21:21:53 2002 +++ b/arch/ia64/sn/kernel/sn1/sn1_smp.c Mon Dec 23 21:21:53 2002 @@ -59,11 +59,16 @@ * to other cpus for flushing TLB ranges. */ typedef struct { - unsigned long start; - unsigned long end; - unsigned long nbits; - unsigned int rid; - atomic_t unfinished_count; + union { + struct { + unsigned long start; + unsigned long end; + unsigned long nbits; + unsigned int rid; + atomic_t unfinished_count; + } ptc; + char pad[SMP_CACHE_BYTES]; + }; } ptc_params_t; #define NUMPTC 512 @@ -149,11 +154,11 @@ return; do { - start = ptcParams->start; + start = ptcParams->ptc.start; saved_rid = (unsigned int) ia64_get_rr(start); - end = ptcParams->end; - nbits = ptcParams->nbits; - rid = ptcParams->rid; + end = ptcParams->ptc.end; + nbits = ptcParams->ptc.nbits; + rid = ptcParams->ptc.rid; if (saved_rid != rid) { ia64_set_rr(start, (unsigned long)rid); @@ -167,7 +172,7 @@ ia64_srlz_i(); - result = atomic_dec(&ptcParams->unfinished_count); + result = atomic_dec(&ptcParams->ptc.unfinished_count); #ifdef PTCDEBUG { int i = ptcParams-&ptcParamArray[0]; @@ -203,7 +208,7 @@ int backlog = 0; #endif - if (num_online_cpus() == 1) { + if (smp_num_cpus == 1) { sn1_ptc_l_range(start, end, nbits); return; } @@ -256,7 +261,7 @@ /* check the current pointer to the beginning */ ptr = params; while(--ptr >= &ptcParamArray[0]) { - if (atomic_read(&ptr->unfinished_count) == 0) + if (atomic_read(&ptr->ptc.unfinished_count) == 0) break; ++backlog; } @@ -265,7 +270,7 @@ /* check the end of the array */ ptr = &ptcParamArray[NUMPTC]; while (--ptr > params) { - if (atomic_read(&ptr->unfinished_count) == 0) + if (atomic_read(&ptr->ptc.unfinished_count) == 0) break; ++backlog; } @@ -275,12 +280,12 @@ #endif /* PTCDEBUG */ /* wait for the next entry to clear...should be rare */ - if (atomic_read(&next->unfinished_count) > 0) { + if (atomic_read(&next->ptc.unfinished_count) > 0) { #ifdef PTCDEBUG ptcParamsAllBusy++; - if (atomic_read(&nextnext->unfinished_count) == 0) { - if (atomic_read(&next->unfinished_count) > 0) { + if (atomic_read(&nextnext->ptc.unfinished_count) == 0) { + if (atomic_read(&next->ptc.unfinished_count) > 0) { panic("\nnonzero next zero nextnext %lx %lx\n", (long)next, (long)nextnext); } @@ -293,16 +298,16 @@ local_irq_restore(irqflags); /* now we know it's not this cpu, so just wait */ - while (atomic_read(&next->unfinished_count) > 0) { + while (atomic_read(&next->ptc.unfinished_count) > 0) { barrier(); } } - params->start = start; - params->end = end; - params->nbits = nbits; - params->rid = (unsigned int) ia64_get_rr(start); - atomic_set(¶ms->unfinished_count, num_online_cpus()); + params->ptc.start = start; + params->ptc.end = end; + params->ptc.nbits = nbits; + params->ptc.rid = (unsigned int) ia64_get_rr(start); + atomic_set(¶ms->ptc.unfinished_count, smp_num_cpus); /* The atomic_set above can hit memory *after* the update * to ptcParamsEmpty below, which opens a timing window @@ -335,25 +340,24 @@ * shouldn't be using user TLB entries. To change this to wait * for all the flushes to complete, enable the following code. */ -#ifdef SN1_SYNCHRONOUS_GLOBAL_TLB_PURGE +#if defined(SN1_SYNCHRONOUS_GLOBAL_TLB_PURGE) || defined(BUS_INT_WAR) /* this code is not tested */ /* wait for the flush to complete */ - while (atomic_read(¶ms.unfinished_count) > 1) + while (atomic_read(¶ms->ptc.unfinished_count) > 0) barrier(); - - atomic_set(¶ms->unfinished_count, 0); #endif } /** - * sn1_send_IPI - send an IPI to a processor - * @cpuid: target of the IPI + * sn_send_IPI_phys - send an IPI to a Nasid and slice + * @physid: physical cpuid to receive the interrupt. * @vector: command to send * @delivery_mode: delivery mechanism - * @redirect: redirect the IPI? * * Sends an IPI (interprocessor interrupt) to the processor specified by - * @cpuid. @delivery_mode can be one of the following + * @physid + * + * @delivery_mode can be one of the following * * %IA64_IPI_DM_INT - pend an interrupt * %IA64_IPI_DM_PMI - pend a PMI @@ -361,30 +365,53 @@ * %IA64_IPI_DM_INIT - pend an INIT interrupt */ void -sn1_send_IPI(int cpuid, int vector, int delivery_mode, int redirect) +sn_send_IPI_phys(long physid, int vector, int delivery_mode) { - long *p, nasid, slice; - static int off[4] = {0x1800080, 0x1800088, 0x1a00080, 0x1a00088}; + long *p; + long nasid, slice; - /* - * ZZZ - Replace with standard macros when available. - */ - nasid = cpuid_to_nasid(cpuid); - slice = cpuid_to_slice(cpuid); - p = (long*)(0xc0000a0000000000LL | (nasid<<33) | off[slice]); + static int off[4] = {0x1800080, 0x1800088, 0x1a00080, 0x1a00088}; -#if defined(ZZZBRINGUP) - { - static int count=0; - if (count++ < 10) printk("ZZ sendIPI 0x%x->0x%x, vec %d, nasid 0x%lx, slice %ld, adr 0x%lx\n", - smp_processor_id(), cpuid, vector, nasid, slice, (long)p); +#ifdef BUS_INT_WAR + if (vector != ap_wakeup_vector) { + return; } #endif + + nasid = cpu_physical_id_to_nasid(physid); + slice = cpu_physical_id_to_slice(physid); + + p = (long*)(0xc0000a0000000000LL | (nasid<<33) | off[slice]); + mb(); *p = (delivery_mode << 8) | (vector & 0xff); } +/** + * sn1_send_IPI - send an IPI to a processor + * @cpuid: target of the IPI + * @vector: command to send + * @delivery_mode: delivery mechanism + * @redirect: redirect the IPI? + * + * Sends an IPI (interprocessor interrupt) to the processor specified by + * @cpuid. @delivery_mode can be one of the following + * + * %IA64_IPI_DM_INT - pend an interrupt + * %IA64_IPI_DM_PMI - pend a PMI + * %IA64_IPI_DM_NMI - pend an NMI + * %IA64_IPI_DM_INIT - pend an INIT interrupt + */ +void +sn1_send_IPI(int cpuid, int vector, int delivery_mode, int redirect) +{ + long physid; + + physid = cpu_physical_id(cpuid); + + sn_send_IPI_phys(physid, vector, delivery_mode); +} #ifdef CONFIG_SMP #ifdef PTC_NOTYET @@ -425,7 +452,7 @@ { if (!ia64_ptc_domain_info) { printk("SMP: Can't find PTC domain info. Forcing UP mode\n"); - cpu_online_map = 1; + smp_num_cpus = 1; return; } diff -Nru a/arch/ia64/sn/kernel/sn1/synergy.c b/arch/ia64/sn/kernel/sn1/synergy.c --- a/arch/ia64/sn/kernel/sn1/synergy.c Mon Dec 23 21:22:00 2002 +++ b/arch/ia64/sn/kernel/sn1/synergy.c Mon Dec 23 21:22:00 2002 @@ -240,6 +240,7 @@ synergy_perf_t *p; int checked = 0; int err = 0; + unsigned long flags; /* bit 45 is enable */ modesel |= (1UL << 45); @@ -279,7 +280,7 @@ memset(p, 0, sizeof(synergy_perf_t)); p->modesel = modesel; - spin_lock_irq(&npdap->synergy_perf_lock); + spin_lock_irqsave(&npdap->synergy_perf_lock, flags); if (npdap->synergy_perf_data == NULL) { /* circular list */ p->next = p; @@ -290,7 +291,7 @@ p->next = npdap->synergy_perf_data->next; npdap->synergy_perf_data->next = p; } - spin_unlock_irq(&npdap->synergy_perf_lock); + spin_unlock_irqrestore(&npdap->synergy_perf_lock, flags); } } diff -Nru a/arch/ia64/sn/kernel/sn2/Makefile b/arch/ia64/sn/kernel/sn2/Makefile --- a/arch/ia64/sn/kernel/sn2/Makefile Mon Dec 23 21:22:01 2002 +++ b/arch/ia64/sn/kernel/sn2/Makefile Mon Dec 23 21:22:01 2002 @@ -1,5 +1,5 @@ # -# ia64/platform/sn/sn1/Makefile +# arch/ia64/sn/kernel/sn2/Makefile # # Copyright (C) 1999,2001-2002 Silicon Graphics, Inc. All rights reserved. # @@ -32,6 +32,5 @@ # http://oss.sgi.com/projects/GenInfo/NoticeExplan # -obj-y := cache.o iomv.o sn2_smp.o EXTRA_CFLAGS := -DLITTLE_ENDIAN diff -Nru a/arch/ia64/sn/kernel/sn2/iomv.c b/arch/ia64/sn/kernel/sn2/iomv.c --- a/arch/ia64/sn/kernel/sn2/iomv.c Mon Dec 23 21:21:58 2002 +++ b/arch/ia64/sn/kernel/sn2/iomv.c Mon Dec 23 21:21:58 2002 @@ -6,22 +6,23 @@ * Copyright (C) 2000-2002 Silicon Graphics, Inc. All rights reserved. */ -#include #include -#include +#include +#include #include +#include +#include -#ifdef Colin /* Use the same calls as Generic IA64 defined in io.h */ /** - * sn1_io_addr - convert a in/out port to an i/o address + * sn_io_addr - convert an in/out port to an i/o address * @port: port to convert * * Legacy in/out instructions are converted to ld/st instructions * on IA64. This routine will convert a port number into a valid - * SN i/o address. Used by sn1_in*() and sn1_out*(). + * SN i/o address. Used by sn_in*() and sn_out*(). */ -static inline void * -sn1_io_addr(unsigned long port) +void * +sn_io_addr(unsigned long port) { if (!IS_RUNNING_ON_SIMULATOR()) { return( (void *) (port | __IA64_UNCACHED_OFFSET)); @@ -46,177 +47,22 @@ } /** - * sn1_inb - read a byte from a port - * @port: port to read from - * - * Reads a byte from @port and returns it to the caller. - */ -unsigned int -sn1_inb (unsigned long port) -{ -return __ia64_inb ( port ); -} - -/** - * sn1_inw - read a word from a port - * @port: port to read from - * - * Reads a word from @port and returns it to the caller. - */ -unsigned int -sn1_inw (unsigned long port) -{ -return __ia64_inw ( port ); -} - -/** - * sn1_inl - read a word from a port - * @port: port to read from - * - * Reads a word from @port and returns it to the caller. - */ -unsigned int -sn1_inl (unsigned long port) -{ -return __ia64_inl ( port ); -} - -/** - * sn1_outb - write a byte to a port - * @port: port to write to - * @val: value to write - * - * Writes @val to @port. - */ -void -sn1_outb (unsigned char val, unsigned long port) -{ -return __ia64_outb ( val, port ); -} - -/** - * sn1_outw - write a word to a port - * @port: port to write to - * @val: value to write - * - * Writes @val to @port. - */ -void -sn1_outw (unsigned short val, unsigned long port) -{ -return __ia64_outw ( val, port ); -} - -/** - * sn1_outl - write a word to a port - * @port: port to write to - * @val: value to write - * - * Writes @val to @port. - */ -void -sn1_outl (unsigned int val, unsigned long port) -{ -return __ia64_outl ( val, port ); -} - -/** - * sn1_inb - read a byte from a port - * @port: port to read from - * - * Reads a byte from @port and returns it to the caller. - */ -unsigned int -sn1_inb (unsigned long port) -{ - volatile unsigned char *addr = sn1_io_addr(port); - unsigned char ret; - - ret = *addr; - __ia64_mf_a(); - return ret; -} - -/** - * sn1_inw - read a word from a port - * 2port: port to read from - * - * Reads a word from @port and returns it to the caller. - */ -unsigned int -sn1_inw (unsigned long port) -{ - volatile unsigned short *addr = sn1_io_addr(port); - unsigned short ret; - - ret = *addr; - __ia64_mf_a(); - return ret; -} - -/** - * sn1_inl - read a word from a port - * @port: port to read from - * - * Reads a word from @port and returns it to the caller. - */ -unsigned int -sn1_inl (unsigned long port) -{ - volatile unsigned int *addr = sn1_io_addr(port); - unsigned int ret; - - ret = *addr; - __ia64_mf_a(); - return ret; -} - -/** - * sn1_outb - write a byte to a port - * @port: port to write to - * @val: value to write + * sn2_mmiob - I/O space memory barrier * - * Writes @val to @port. - */ -void -sn1_outb (unsigned char val, unsigned long port) -{ - volatile unsigned char *addr = sn1_io_addr(port); - - *addr = val; - __ia64_mf_a(); -} - -/** - * sn1_outw - write a word to a port - * @port: port to write to - * @val: value to write + * Acts as a memory mapped I/O barrier for platforms that queue writes to + * I/O space. This ensures that subsequent writes to I/O space arrive after + * all previous writes. For most ia64 platforms, this is a simple + * 'mf.a' instruction. For other platforms, mmiob() may have to read + * a chipset register to ensure ordering. * - * Writes @val to @port. - */ -void -sn1_outw (unsigned short val, unsigned long port) -{ - volatile unsigned short *addr = sn1_io_addr(port); - - *addr = val; - __ia64_mf_a(); -} - -/** - * sn1_outl - write a word to a port - * @port: port to write to - * @val: value to write + * On SN2, we wait for the PIO_WRITE_STATUS SHub register to clear. + * See PV 871084 for details about the WAR about zero value. * - * Writes @val to @port. */ void -sn1_outl (unsigned int val, unsigned long port) +sn2_mmiob (void) { - volatile unsigned int *addr = sn1_io_addr(port); - - *addr = val; - __ia64_mf_a(); + while ((((volatile unsigned long) (*pda->pio_write_status_addr)) & SH_PIO_WRITE_STATUS_0_PENDING_WRITE_COUNT_MASK) != + SH_PIO_WRITE_STATUS_0_PENDING_WRITE_COUNT_MASK) + udelay(1); } - -#endif diff -Nru a/arch/ia64/sn/kernel/sn2/sn2_smp.c b/arch/ia64/sn/kernel/sn2/sn2_smp.c --- a/arch/ia64/sn/kernel/sn2/sn2_smp.c Mon Dec 23 21:22:00 2002 +++ b/arch/ia64/sn/kernel/sn2/sn2_smp.c Mon Dec 23 21:22:00 2002 @@ -46,6 +46,7 @@ #include #include #include +#include #include #include #include @@ -53,6 +54,310 @@ #include #include #include +#include +#include + +void sn2_ptc_deadlock_recovery(unsigned long data0, unsigned long data1); + + +static spinlock_t sn2_global_ptc_lock __cacheline_aligned = SPIN_LOCK_UNLOCKED; + +static unsigned long sn2_ptc_deadlock_count; + + +static inline unsigned long +wait_piowc(void) +{ + volatile unsigned long *piows; + unsigned long ws; + + piows = pda->pio_write_status_addr; + do { + __asm__ __volatile__ ("mf.a" ::: "memory"); + } while (((ws = *piows) & SH_PIO_WRITE_STATUS_0_PENDING_WRITE_COUNT_MASK) != + SH_PIO_WRITE_STATUS_0_PENDING_WRITE_COUNT_MASK); + return ws; +} + +#ifdef PTCG_WAR +/* + * The following structure is used to pass params thru smp_call_function + * to other cpus for flushing TLB ranges. + */ +typedef struct { + unsigned long start; + unsigned long end; + unsigned long nbits; + unsigned int rid; + atomic_t unfinished_count; + char fill[96]; +} ptc_params_t; + +#define NUMPTC 512 + +static ptc_params_t ptcParamArray[NUMPTC] __attribute__((__aligned__(128))); + +/* use separate cache lines on ptcParamsNextByCpu to avoid false sharing */ +static ptc_params_t *ptcParamsNextByCpu[NR_CPUS*16] __attribute__((__aligned__(128))); +static volatile ptc_params_t *ptcParamsEmpty __cacheline_aligned; + +/*REFERENCED*/ +static spinlock_t ptcParamsLock __cacheline_aligned = SPIN_LOCK_UNLOCKED; + +static int ptcInit = 0; +#ifdef PTCDEBUG +static int ptcParamsAllBusy = 0; /* debugging/statistics */ +static int ptcCountBacklog = 0; +static int ptcBacklog[NUMPTC+1]; +static char ptcParamsCounts[NR_CPUS][NUMPTC] __attribute__((__aligned__(128))); +static char ptcParamsResults[NR_CPUS][NUMPTC] __attribute__((__aligned__(128))); +#endif + +/* + * Make smp_send_flush_tlbsmp_send_flush_tlb() a weak reference, + * so that we get a clean compile with the ia64 patch without the + * actual SN1 specific code in arch/ia64/kernel/smp.c. + */ +extern void smp_send_flush_tlb (void) __attribute((weak)); + + +/** + * sn1_ptc_l_range - purge local translation cache + * @start: start of virtual address range + * @end: end of virtual address range + * @nbits: specifies number of bytes to purge per instruction (num = 1<<(nbits & 0xfc)) + * + * Purges the range specified from the local processor's translation cache + * (as opposed to the translation registers). Note that more than the specified + * range *may* be cleared from the cache by some processors. + * + * This is probably not good enough, but I don't want to try to make it better + * until I get some statistics on a running system. At a minimum, we should only + * send IPIs to 1 processor in each TLB domain & have it issue a ptc.g on it's + * own FSB. Also, we only have to serialize per FSB, not globally. + * + * More likely, we will have to do some work to reduce the frequency of calls to + * this routine. + */ +static inline void +sn1_ptc_l_range(unsigned long start, unsigned long end, unsigned long nbits) +{ + do { + __asm__ __volatile__ ("ptc.l %0,%1" :: "r"(start), "r"(nbits<<2) : "memory"); + start += (1UL << nbits); + } while (start < end); + ia64_srlz_d(); +} + +/** + * sn1_received_flush_tlb - cpu tlb flush routine + * + * Flushes the TLB of a given processor. + */ +void +sn1_received_flush_tlb(void) +{ + unsigned long start, end, nbits; + unsigned int rid, saved_rid; + int cpu = smp_processor_id(); + int result; + ptc_params_t *ptcParams; + + ptcParams = ptcParamsNextByCpu[cpu*16]; + if (ptcParams == ptcParamsEmpty) + return; + + do { + start = ptcParams->start; + saved_rid = (unsigned int) ia64_get_rr(start); + end = ptcParams->end; + nbits = ptcParams->nbits; + rid = ptcParams->rid; + + if (saved_rid != rid) { + ia64_set_rr(start, (unsigned long)rid); + ia64_srlz_d(); + } + + sn1_ptc_l_range(start, end, nbits); + + if (saved_rid != rid) + ia64_set_rr(start, (unsigned long)saved_rid); + + ia64_srlz_i(); + + result = atomic_dec(&ptcParams->unfinished_count); +#ifdef PTCDEBUG + { + int i = ptcParams-&ptcParamArray[0]; + ptcParamsResults[cpu][i] = (char) result; + ptcParamsCounts[cpu][i]++; + } +#endif /* PTCDEBUG */ + + if (++ptcParams == &ptcParamArray[NUMPTC]) + ptcParams = &ptcParamArray[0]; + + } while (ptcParams != ptcParamsEmpty); + + ptcParamsNextByCpu[cpu*16] = ptcParams; +} + +/** + * sn1_global_tlb_purge - flush a translation cache range on all processors + * @start: start of virtual address range to flush + * @end: end of virtual address range + * @nbits: specifies number of bytes to purge per instruction (num = 1<<(nbits & 0xfc)) + * + * Flushes the translation cache of all processors from @start to @end. + */ +void +sn1_global_tlb_purge (unsigned long start, unsigned long end, unsigned long nbits) +{ + ptc_params_t *params; + ptc_params_t *next; + unsigned long irqflags; +#ifdef PTCDEBUG + ptc_params_t *nextnext; + int backlog = 0; +#endif + + if (smp_num_cpus == 1) { + sn1_ptc_l_range(start, end, nbits); + return; + } + + if (in_interrupt()) { + /* + * If at interrupt level and cannot get spinlock, + * then do something useful by flushing own tlbflush queue + * so as to avoid a possible deadlock. + */ + while (!spin_trylock(&ptcParamsLock)) { + local_irq_save(irqflags); + sn1_received_flush_tlb(); + local_irq_restore(irqflags); + udelay(10); /* take it easier on the bus */ + } + } else { + spin_lock(&ptcParamsLock); + } + + if (!ptcInit) { + int cpu; + ptcInit = 1; + memset(ptcParamArray, 0, sizeof(ptcParamArray)); + ptcParamsEmpty = &ptcParamArray[0]; + for (cpu=0; cpu= &ptcParamArray[0]) { + if (atomic_read(&ptr->unfinished_count) == 0) + break; + ++backlog; + } + + if (backlog) { + /* check the end of the array */ + ptr = &ptcParamArray[NUMPTC]; + while (--ptr > params) { + if (atomic_read(&ptr->unfinished_count) == 0) + break; + ++backlog; + } + } + ptcBacklog[backlog]++; + } +#endif /* PTCDEBUG */ + + /* wait for the next entry to clear...should be rare */ + if (atomic_read(&next->unfinished_count) > 0) { +#ifdef PTCDEBUG + ptcParamsAllBusy++; + + if (atomic_read(&nextnext->unfinished_count) == 0) { + if (atomic_read(&next->unfinished_count) > 0) { + panic("\nnonzero next zero nextnext %lx %lx\n", + (long)next, (long)nextnext); + } + } +#endif + + /* it could be this cpu that is behind */ + local_irq_save(irqflags); + sn1_received_flush_tlb(); + local_irq_restore(irqflags); + + /* now we know it's not this cpu, so just wait */ + while (atomic_read(&next->unfinished_count) > 0) { + barrier(); + } + } + + params->start = start; + params->end = end; + params->nbits = nbits; + params->rid = (unsigned int) ia64_get_rr(start); + atomic_set(¶ms->unfinished_count, smp_num_cpus); + + /* The atomic_set above can hit memory *after* the update + * to ptcParamsEmpty below, which opens a timing window + * that other cpus can squeeze into! + */ + mb(); + + /* everything is ready to process: + * -- global lock is held + * -- new entry + 1 is free + * -- new entry is set up + * so now: + * -- update the global next pointer + * -- unlock the global lock + * -- send IPI to notify other cpus + * -- process the data ourselves + */ + ptcParamsEmpty = next; + spin_unlock(&ptcParamsLock); + smp_send_flush_tlb(); + + local_irq_save(irqflags); + sn1_received_flush_tlb(); + local_irq_restore(irqflags); + + /* + * Since IPIs are polled event (for now), we need to wait til the + * TLB flush has started. + * wait for the flush to complete + */ + while (atomic_read(¶ms->unfinished_count) > 0) + barrier(); +} + +#endif /* PTCG_WAR */ + /** * sn2_global_tlb_purge - globally purge translation cache of virtual address range @@ -63,54 +368,111 @@ * Purges the translation caches of all processors of the given virtual address * range. */ + void sn2_global_tlb_purge (unsigned long start, unsigned long end, unsigned long nbits) { - int cnode, nasid; - volatile long *ptc0, *ptc1, *piows; - unsigned long ws, next, data0, data1; - - piows = (long*)LOCAL_MMR_ADDR(get_slice() ? SH_PIO_WRITE_STATUS_1 : SH_PIO_WRITE_STATUS_0); + int cnode, mycnode, nasid; + volatile unsigned long *ptc0, *ptc1; + unsigned long flags=0, data0, data1; + + /* + * Special case 1 cpu & 1 node. Use local purges. + */ +#ifdef PTCG_WAR + sn1_global_tlb_purge(start, end, nbits); + return; +#endif /* PTCG_WAR */ + data0 = (1UL<>8)<pio_write_status_addr; + + mycnode = local_nodeid; + + for (cnode = 0; cnode < numnodes; cnode++) { + if (is_headless_node(cnode) || cnode == mycnode) + continue; + nasid = cnodeid_to_nasid(cnode); + ptc0 = CHANGE_NASID(nasid, ptc0); + ptc1 = CHANGE_NASID(nasid, ptc1); + sn2_ptc_deadlock_recovery_core(ptc0, data0, ptc1, data1, piows); + } } /** - * sn2_send_IPI - send an IPI to a processor - * @cpuid: target of the IPI + * sn_send_IPI_phys - send an IPI to a Nasid and slice + * @physid: physical cpuid to receive the interrupt. * @vector: command to send * @delivery_mode: delivery mechanism - * @redirect: redirect the IPI? * - * Sends an IPI (InterProcessor Interrupt) to the processor specified by - * @cpuid. @vector specifies the command to send, while @delivery_mode can - * be one of the following + * Sends an IPI (interprocessor interrupt) to the processor specified by + * @physid + * + * @delivery_mode can be one of the following * * %IA64_IPI_DM_INT - pend an interrupt * %IA64_IPI_DM_PMI - pend a PMI @@ -118,42 +480,60 @@ * %IA64_IPI_DM_INIT - pend an INIT interrupt */ void -sn2_send_IPI(int cpuid, int vector, int delivery_mode, int redirect) +sn_send_IPI_phys(long physid, int vector, int delivery_mode) { - long *p, val; - long physid; long nasid, slice; + long val; + volatile long *p; + +#ifdef BUS_INT_WAR + if (vector != ap_wakeup_vector && delivery_mode == IA64_IPI_DM_INT) { + return; + } +#endif - physid = cpu_physical_id(cpuid); nasid = cpu_physical_id_to_nasid(physid); slice = cpu_physical_id_to_slice(physid); - p = (long*)GLOBAL_MMR_ADDR(nasid, SH_IPI_INT); + p = (long*)GLOBAL_MMR_PHYS_ADDR(nasid, SH_IPI_INT); val = (1UL<0x%x, vec %d, nasid 0x%lx, slice %ld, adr 0x%lx, val 0x%lx\n", - smp_processor_id(), cpuid, vector, nasid, slice, (long)p, val); - } -#endif mb(); - *p = val; - + pio_phys_write_mmr(p, val); + +#ifndef CONFIG_SHUB_1_0_SPECIFIC + /* doesnt work on shub 1.0 */ + wait_piowc(); +#endif } /** - * init_sn2_smp_config - initialize SN2 smp configuration + * sn2_send_IPI - send an IPI to a processor + * @cpuid: target of the IPI + * @vector: command to send + * @delivery_mode: delivery mechanism + * @redirect: redirect the IPI? * - * currently a NOP. + * Sends an IPI (InterProcessor Interrupt) to the processor specified by + * @cpuid. @vector specifies the command to send, while @delivery_mode can + * be one of the following + * + * %IA64_IPI_DM_INT - pend an interrupt + * %IA64_IPI_DM_PMI - pend a PMI + * %IA64_IPI_DM_NMI - pend an NMI + * %IA64_IPI_DM_INIT - pend an INIT interrupt */ -void __init -init_sn2_smp_config(void) +void +sn2_send_IPI(int cpuid, int vector, int delivery_mode, int redirect) { + long physid; + physid = cpu_physical_id(cpuid); + + sn_send_IPI_phys(physid, vector, delivery_mode); } + diff -Nru a/arch/ia64/sn/kernel/sn_asm.S b/arch/ia64/sn/kernel/sn_asm.S --- a/arch/ia64/sn/kernel/sn_asm.S Mon Dec 23 21:21:51 2002 +++ b/arch/ia64/sn/kernel/sn_asm.S Mon Dec 23 21:21:51 2002 @@ -1,6 +1,33 @@ - /* - * Copyright (c) 2000-2001 Silicon Graphics, Inc. All rights reserved. + * Copyright (c) 2000-2002 Silicon Graphics, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it would be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + * + * Further, this software is distributed without any warranty that it is + * free of the rightful claim of any third person regarding infringement + * or the like. Any license provided herein, whether implied or + * otherwise, applies only to this software file. Patent licenses, if + * any, provided herein do not apply to combinations of this program with + * other software, or any other product whatsoever. + * + * You should have received a copy of the GNU General Public + * License along with this program; if not, write the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. + * + * Contact information: Silicon Graphics, Inc., 1600 Amphitheatre Pkwy, + * Mountain View, CA 94043, or: + * + * http://www.sgi.com + * + * For further information regarding this notice, see: + * + * http://oss.sgi.com/projects/GenInfo/NoticeExplan */ #include @@ -8,9 +35,10 @@ // Testing only. // Routine will cause MCAs -// zzzmsa(n) +// zzzmca(n) // n=0 MCA via duplicate TLB dropin -// n=0 MCA via read of garbage address +// n=1 MCA via read of garbage address +// n=2 MCA via lfetch read of garbage address // #define ITIR(key, ps) ((key<<8) | (ps<<2)) @@ -45,20 +73,30 @@ rsm 0x2000;; srlz.d; - mov r11 = 1 + mov r11 = 5 mov r3 = ITIR(0,TLB_PAGESIZE);; mov cr.itir = r3 mov r10 = 0;; itr.d dtr[r11] = r10;; - mov r11 = 2 + mov r11 = 6 itr.d dtr[r11] = r10;; br 9f -1: movl r8=0xfe00000048;; - ld8 r9=[r8];; +1: + cmp.eq p6,p7=1,r32 +#ifdef CONFIG_IA64_SGI_SN1 + movl r8=0xe00000fe00000048;; +#else + movl r8=0xe0007fb000000048;; +#endif + (p6) ld8 r9=[r8] + (p7) lfetch.fault.nt2 [r8] + ;; mf + ;; mf.a + ;; srlz.d 9: mov ar.pfs=loc4 @@ -66,83 +104,4 @@ .endp zzzmca - .global zzzspec - .proc zzzspec -zzzspec: - mov r8=r32 - movl r9=0xe000000000000000 - movl r10=0x4000;; - ld8.s r16=[r8];; - ld8.s r17=[r9];; - add r8=r8,r10;; - ld8.s r18=[r8];; - add r8=r8,r10;; - ld8.s r19=[r8];; - add r8=r8,r10;; - ld8.s r20=[r8];; - mov r8=r0 - tnat.nz p6,p0=r16 - tnat.nz p7,p0=r17 - tnat.nz p8,p0=r18 - tnat.nz p9,p0=r19 - tnat.nz p10,p0=r20;; - (p6) dep r8=-1,r8,0,1;; - (p7) dep r8=-1,r8,1,1;; - (p8) dep r8=-1,r8,2,1;; - (p9) dep r8=-1,r8,3,1;; - (p10) dep r8=-1,r8,4,1;; - br.ret.sptk rp - .endp zzzspec - - .global zzzspec2 - .proc zzzspec2 -zzzspec2: - cmp.eq p6,p7=r2,r2 - movl r16=0xc0000a0001000020 - ;; - mf - ;; - ld8 r9=[r16] - (p6) br.spnt 1f - ld8 r10=[r32] - ;; - 1: mf.a - mf - - ld8 r9=[r16];; - cmp.ne p6,p7=r9,r16 - (p6) br.spnt 1f - ld8 r10=[r32] - ;; - 1: mf.a - mf - - ld8 r9=[r33];; - cmp.ne p6,p7=r9,r33 - (p6) br.spnt 1f - ld8 r10=[r32] - ;; - 1: mf.a - mf - - tpa r23=r32 - add r20=512,r33 - add r21=1024,r33;; - ld8 r9=[r20] - ld8 r10=[r21];; - nop.i 0 - { .mib - nop.m 0 - cmp.ne p6,p7=r10,r33 - (p6) br.spnt 1f - } - ld8 r10=[r32] - ;; - 1: mf.a - mf - br.ret.sptk rp - - .endp zzzspec - #endif - diff -Nru a/arch/ia64/sn/kernel/sn_ksyms.c b/arch/ia64/sn/kernel/sn_ksyms.c --- a/arch/ia64/sn/kernel/sn_ksyms.c Mon Dec 23 21:21:58 2002 +++ b/arch/ia64/sn/kernel/sn_ksyms.c Mon Dec 23 21:21:58 2002 @@ -15,15 +15,8 @@ #include #include - -/* - * other stuff (more to be added later, cleanup then) - */ -EXPORT_SYMBOL(sn1_pci_map_sg); -EXPORT_SYMBOL(sn1_pci_unmap_sg); -EXPORT_SYMBOL(sn1_pci_alloc_consistent); -EXPORT_SYMBOL(sn1_pci_free_consistent); -EXPORT_SYMBOL(sn1_dma_address); +#include +#include #include #include @@ -52,13 +45,39 @@ EXPORT_SYMBOL(hwgraph_edge_add); EXPORT_SYMBOL(pciio_info_master_get); EXPORT_SYMBOL(pciio_info_get); + #ifdef CONFIG_IA64_SGI_SN_DEBUG EXPORT_SYMBOL(__pa_debug); EXPORT_SYMBOL(__va_debug); #endif +/* Support IPIs for loaded modules. */ +EXPORT_SYMBOL(sn_send_IPI_phys); + +/* symbols referenced by partitioning modules */ +#include +EXPORT_SYMBOL(bte_unaligned_copy); +#include +EXPORT_SYMBOL(ia64_sal); + +#ifdef CONFIG_IA64_SGI_SN2 +#include +EXPORT_SYMBOL(sal_lock); +EXPORT_SYMBOL(sn_partid); +EXPORT_SYMBOL(sn_local_partid); +EXPORT_SYMBOL(sn_system_serial_number_string); +EXPORT_SYMBOL(sn_partition_serial_number); +#endif + /* added by tduffy 04.08.01 to fix depmod issues */ #include -EXPORT_SYMBOL(sn1_pci_unmap_single); -EXPORT_SYMBOL(sn1_pci_map_single); -EXPORT_SYMBOL(sn1_pci_dma_sync_single); + +#ifdef BUS_INT_WAR +extern void sn_add_polled_interrupt(int, int); +extern void sn_delete_polled_interrupt(int); +EXPORT_SYMBOL(sn_add_polled_interrupt); +EXPORT_SYMBOL(sn_delete_polled_interrupt); +#endif + +extern nasid_t master_nasid; +EXPORT_SYMBOL(master_nasid); diff -Nru a/arch/ia64/sn/kernel/sv.c b/arch/ia64/sn/kernel/sv.c --- a/arch/ia64/sn/kernel/sv.c Mon Dec 23 21:21:51 2002 +++ b/arch/ia64/sn/kernel/sv.c Mon Dec 23 21:21:51 2002 @@ -3,7 +3,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 2000-2001 Silicon Graphics, Inc. All rights reserved + * Copyright (C) 2000-2002 Silicon Graphics, Inc. All rights reserved * * This implemenation of synchronization variables is heavily based on * one done by Steve Lord @@ -210,7 +210,7 @@ */ /* don't need the _irqsave part, but there is no wq_write_lock() */ - wq_write_lock_irqsave(&sv->sv_waiters.lock, flags); + write_lock_irqsave(&sv->sv_waiters.lock, flags); #ifdef EXCLUSIVE_IN_QUEUE wait.flags |= WQ_FLAG_EXCLUSIVE; @@ -228,7 +228,7 @@ (void *)sv, sv->sv_flags); BUG(); } - wq_write_unlock_irqrestore(&sv->sv_waiters.lock, flags); + write_unlock_irqrestore(&sv->sv_waiters.lock, flags); if(sv_wait_flags & SV_WAIT_SIG) set_current_state(TASK_EXCLUSIVE | TASK_INTERRUPTIBLE ); diff -Nru a/arch/ia64/sn/tools/make_textsym b/arch/ia64/sn/tools/make_textsym --- a/arch/ia64/sn/tools/make_textsym Mon Dec 23 21:21:50 2002 +++ b/arch/ia64/sn/tools/make_textsym Mon Dec 23 21:21:50 2002 @@ -44,7 +44,7 @@ [ -f $VMLINUX ] || help -$OBJDUMP -t $LINUX | sort > $TMPSYM +$OBJDUMP -t $LINUX | egrep -v '__ks' | sort > $TMPSYM SN1=`egrep "dig_setup|Synergy_da_indr" $TMPSYM|wc -l` # Dataprefix and textprefix correspond to the VGLOBAL_BASE and VPERNODE_BASE. @@ -58,74 +58,74 @@ # pipe everything thru sort echo "TEXTSYM V1.0" (cat <size.fbx)); - ret |= __get_user(f.size.fby, &(((struct fbcursor32 *)arg)->size.fby)); + ret |= __get_user(f.size.x, &(((struct fbcursor32 *)arg)->size.x)); + ret |= __get_user(f.size.y, &(((struct fbcursor32 *)arg)->size.y)); ret |= __get_user(f.cmap.index, &(((struct fbcursor32 *)arg)->cmap.index)); ret |= __get_user(f.cmap.count, &(((struct fbcursor32 *)arg)->cmap.count)); ret |= __get_user(r, &(((struct fbcursor32 *)arg)->cmap.red)); @@ -985,10 +985,10 @@ if (ret) return -EFAULT; if (f.set & FB_CUR_SETCMAP) { - if ((uint) f.size.fby > 32) + if ((uint) f.size.y > 32) return -EINVAL; - ret = copy_from_user (mask, (char *)A(m), f.size.fby * 4); - ret |= copy_from_user (image, (char *)A(i), f.size.fby * 4); + ret = copy_from_user (mask, (char *)A(m), f.size.y * 4); + ret |= copy_from_user (image, (char *)A(i), f.size.y * 4); if (ret) return -EFAULT; f.image = image; f.mask = mask; @@ -4346,11 +4346,6 @@ COMPATIBLE_IOCTL(FBIOGET_VSCREENINFO) COMPATIBLE_IOCTL(FBIOPUT_VSCREENINFO) COMPATIBLE_IOCTL(FBIOPAN_DISPLAY) -COMPATIBLE_IOCTL(FBIOGET_FCURSORINFO) -COMPATIBLE_IOCTL(FBIOGET_VCURSORINFO) -COMPATIBLE_IOCTL(FBIOPUT_VCURSORINFO) -COMPATIBLE_IOCTL(FBIOGET_CURSORSTATE) -COMPATIBLE_IOCTL(FBIOPUT_CURSORSTATE) COMPATIBLE_IOCTL(FBIOGET_CON2FBMAP) COMPATIBLE_IOCTL(FBIOPUT_CON2FBMAP) /* Little f */ diff -Nru a/arch/sparc64/kernel/signal.c b/arch/sparc64/kernel/signal.c --- a/arch/sparc64/kernel/signal.c Mon Dec 23 21:21:55 2002 +++ b/arch/sparc64/kernel/signal.c Mon Dec 23 21:21:55 2002 @@ -714,7 +714,7 @@ case SIGQUIT: case SIGILL: case SIGTRAP: case SIGABRT: case SIGFPE: case SIGSEGV: case SIGBUS: case SIGSYS: case SIGXCPU: case SIGXFSZ: - if (do_coredump(signr, regs)) + if (do_coredump(signr, exit_code, regs)) exit_code |= 0x80; /* FALLTHRU */ diff -Nru a/arch/sparc64/kernel/signal32.c b/arch/sparc64/kernel/signal32.c --- a/arch/sparc64/kernel/signal32.c Mon Dec 23 21:21:50 2002 +++ b/arch/sparc64/kernel/signal32.c Mon Dec 23 21:21:50 2002 @@ -1385,7 +1385,7 @@ case SIGQUIT: case SIGILL: case SIGTRAP: case SIGABRT: case SIGFPE: case SIGSEGV: case SIGBUS: case SIGSYS: case SIGXCPU: case SIGXFSZ: - if (do_coredump(signr, regs)) + if (do_coredump(signr, exit_code, regs)) exit_code |= 0x80; /* FALLTHRU */ diff -Nru a/arch/sparc64/kernel/sys_sparc32.c b/arch/sparc64/kernel/sys_sparc32.c --- a/arch/sparc64/kernel/sys_sparc32.c Mon Dec 23 21:21:57 2002 +++ b/arch/sparc64/kernel/sys_sparc32.c Mon Dec 23 21:21:57 2002 @@ -1397,7 +1397,7 @@ return ret; } -static int cp_new_stat32(struct kstat *stat, struct stat32 *statbuf) +int cp_compat_stat(struct kstat *stat, struct compat_stat *statbuf) { int err; @@ -1425,39 +1425,6 @@ return err; } -asmlinkage int sys32_newstat(char * filename, struct stat32 *statbuf) -{ - struct kstat stat; - int error = vfs_stat(filename, &stat); - - if (!error) - error = cp_new_stat32(&stat, statbuf); - - return error; -} - -asmlinkage int sys32_newlstat(char * filename, struct stat32 *statbuf) -{ - struct kstat stat; - int error = vfs_lstat(filename, &stat); - - if (!error) - error = cp_new_stat32(&stat, statbuf); - - return error; -} - -asmlinkage int sys32_newfstat(unsigned int fd, struct stat32 *statbuf) -{ - struct kstat stat; - int error = vfs_fstat(fd, &stat); - - if (!error) - error = cp_new_stat32(&stat, statbuf); - - return error; -} - extern asmlinkage int sys_sysfs(int option, unsigned long arg1, unsigned long arg2); asmlinkage int sys32_sysfs(int option, u32 arg1, u32 arg2) @@ -1986,36 +1953,6 @@ return ret; } -struct tms32 { - __kernel_clock_t32 tms_utime; - __kernel_clock_t32 tms_stime; - __kernel_clock_t32 tms_cutime; - __kernel_clock_t32 tms_cstime; -}; - -extern asmlinkage long sys_times(struct tms * tbuf); - -asmlinkage long sys32_times(struct tms32 *tbuf) -{ - struct tms t; - long ret; - mm_segment_t old_fs = get_fs (); - int err; - - set_fs (KERNEL_DS); - ret = sys_times(tbuf ? &t : NULL); - set_fs (old_fs); - if (tbuf) { - err = put_user (t.tms_utime, &tbuf->tms_utime); - err |= __put_user (t.tms_stime, &tbuf->tms_stime); - err |= __put_user (t.tms_cutime, &tbuf->tms_cutime); - err |= __put_user (t.tms_cstime, &tbuf->tms_cstime); - if (err) - ret = -EFAULT; - } - return ret; -} - #define RLIM_INFINITY32 0x7fffffff #define RESOURCE32(x) ((x > RLIM_INFINITY32) ? RLIM_INFINITY32 : x) @@ -3463,8 +3400,6 @@ return do_sys_settimeofday(tv ? &ktv : NULL, tz ? &ktz : NULL); } -asmlinkage int sys_utimes(char *, struct timeval *); - asmlinkage int sys32_utimes(char *filename, struct compat_timeval *tvs) { char *kfilename; @@ -3483,7 +3418,7 @@ old_fs = get_fs(); set_fs(KERNEL_DS); - ret = sys_utimes(kfilename, &ktvs[0]); + ret = do_utimes(kfilename, (tvs ? &ktvs[0] : NULL)); set_fs(old_fs); putname(kfilename); diff -Nru a/arch/sparc64/kernel/systbls.S b/arch/sparc64/kernel/systbls.S --- a/arch/sparc64/kernel/systbls.S Mon Dec 23 21:21:53 2002 +++ b/arch/sparc64/kernel/systbls.S Mon Dec 23 21:21:53 2002 @@ -26,12 +26,12 @@ /*20*/ .word sys_getpid, sys_capget, sys_capset, sys32_setuid16, sys32_getuid16 /*25*/ .word sys_time, sys_ptrace, sys_alarm, sys32_sigaltstack, sys32_pause /*30*/ .word compat_sys_utime, sys_lchown, sys_fchown, sys_access, sys_nice - .word sys_chown, sys_sync, sys_kill, sys32_newstat, sys32_sendfile -/*40*/ .word sys32_newlstat, sys_dup, sys_pipe, sys32_times, sys_getuid + .word sys_chown, sys_sync, sys_kill, compat_sys_newstat, sys32_sendfile +/*40*/ .word compat_sys_newlstat, sys_dup, sys_pipe, compat_sys_times, sys_getuid .word sys_umount, sys32_setgid16, sys32_getgid16, sys_signal, sys32_geteuid16 /*50*/ .word sys32_getegid16, sys_acct, sys_nis_syscall, sys_getgid, sys32_ioctl .word sys_reboot, sys32_mmap2, sys_symlink, sys_readlink, sys32_execve -/*60*/ .word sys_umask, sys_chroot, sys32_newfstat, sys_fstat64, sys_getpagesize +/*60*/ .word sys_umask, sys_chroot, compat_sys_newfstat, sys_fstat64, sys_getpagesize .word sys_msync, sys_vfork, sys32_pread64, sys32_pwrite64, sys_geteuid /*70*/ .word sys_getegid, sys32_mmap, sys_setreuid, sys_munmap, sys_mprotect .word sys_madvise, sys_vhangup, sys32_truncate64, sys_mincore, sys32_getgroups16 @@ -59,7 +59,7 @@ .word sys_setpgid, sys_fremovexattr, sys_tkill, sys_exit_group, sparc64_newuname /*190*/ .word sys32_init_module, sparc64_personality, sys_remap_file_pages, sys_epoll_create, sys_epoll_ctl .word sys_epoll_wait, sys_nis_syscall, sys_getppid, sys32_sigaction, sys_sgetmask -/*200*/ .word sys_ssetmask, sys_sigsuspend, sys32_newlstat, sys_uselib, old32_readdir +/*200*/ .word sys_ssetmask, sys_sigsuspend, compat_sys_newlstat, sys_uselib, old32_readdir .word sys32_readahead, sys32_socketcall, sys_syslog, sys32_lookup_dcookie, sys_nis_syscall /*210*/ .word sys_nis_syscall, sys_nis_syscall, sys_waitpid, sys_swapoff, sys32_sysinfo .word sys32_ipc, sys32_sigreturn, sys_clone, sys_nis_syscall, sys32_adjtimex @@ -150,8 +150,8 @@ .word sunos_nosys, sunos_nosys, sunos_nosys .word sunos_nosys, sunos_nosys, sunos_nosys .word sys_access, sunos_nosys, sunos_nosys - .word sys_sync, sys_kill, sys32_newstat - .word sunos_nosys, sys32_newlstat, sys_dup + .word sys_sync, sys_kill, compat_sys_newstat + .word sunos_nosys, compat_sys_newlstat, sys_dup .word sys_pipe, sunos_nosys, sunos_nosys .word sunos_nosys, sunos_nosys, sunos_getgid .word sunos_nosys, sunos_nosys @@ -159,7 +159,7 @@ .word sunos_mctl, sunos_ioctl, sys_reboot .word sunos_nosys, sys_symlink, sys_readlink .word sys32_execve, sys_umask, sys_chroot - .word sys32_newfstat, sunos_nosys, sys_getpagesize + .word compat_sys_newfstat, sunos_nosys, sys_getpagesize .word sys_msync, sys_vfork, sunos_nosys .word sunos_nosys, sunos_sbrk, sunos_sstk .word sunos_mmap, sunos_vadvise, sys_munmap diff -Nru a/arch/v850/anna-rom.ld b/arch/v850/anna-rom.ld --- a/arch/v850/anna-rom.ld Mon Dec 23 21:21:52 2002 +++ b/arch/v850/anna-rom.ld Mon Dec 23 21:21:52 2002 @@ -1,132 +1,16 @@ /* Linker script for the Midas labs Anna V850E2 evaluation board (CONFIG_V850E2_ANNA), with kernel in ROM (CONFIG_ROM_KERNEL). */ -/* Note, all symbols are prefixed with an extra `_' for compatibility with - the existing linux sources. */ - -_jiffies = _jiffies_64 ; - MEMORY { - /* 8MB of flash ROM. */ - ROM : ORIGIN = 0, LENGTH = 0x00800000 + /* 8MB of flash ROM. */ + ROM : ORIGIN = 0, LENGTH = 0x00800000 - /* 1MB of static RAM. This memory is mirrored 64 times. */ - SRAM : ORIGIN = 0x04000000, LENGTH = 0x00100000 - /* 64MB of DRAM. */ - SDRAM : ORIGIN = 0x08000000, LENGTH = 0x04000000 + /* 1MB of static RAM. This memory is mirrored 64 times. */ + SRAM : ORIGIN = 0x04000000, LENGTH = 0x00100000 + /* 64MB of DRAM. */ + SDRAM : ORIGIN = 0x08000000, LENGTH = 0x04000000 } SECTIONS { - .intv : { - __intv_start = . ; - *(.intv.reset) /* Reset vector */ - *(.intv.common) /* Vectors common to all v850e proc. */ - *(.intv.mach) /* Machine-specific int. vectors. */ - __intv_end = . ; - } > ROM - - .text ALIGN (0x10) : { - __stext = . ; - *(.text) - *(.exit.text) /* 2.5 convention */ - *(.text.exit) /* 2.4 convention */ - *(.text.lock) - *(.exitcall.exit) - __real_etext = . ; /* There may be data after here. */ - *(.rodata) - - . = ALIGN (0x4) ; - *(.kstrtab) - - . = ALIGN (4) ; - *(.call_table_data) - *(.call_table_text) - - . = ALIGN (16) ; /* Exception table. */ - ___start___ex_table = . ; - *(__ex_table) - ___stop___ex_table = . ; - - ___start___ksymtab = . ;/* Kernel symbol table. */ - *(__ksymtab) - ___stop___ksymtab = . ; - . = ALIGN (4) ; - __etext = . ; - } > ROM - - .init_text ALIGN (4096) : { - *(.init.text) /* 2.5 convention */ - *(.text.init) /* 2.4 convention */ - . = ALIGN (16) ; - ___setup_start = . ; - *(.init.setup) /* 2.5 convention */ - *(.setup.init) /* 2.4 convention */ - ___setup_end = . ; - ___initcall_start = . ; - *(.initcall.init) - *(.initcall1.init) - *(.initcall2.init) - *(.initcall3.init) - *(.initcall4.init) - *(.initcall5.init) - *(.initcall6.init) - *(.initcall7.init) - . = ALIGN (4) ; - ___initcall_end = . ; - } > ROM - - /* Device contents for the root filesystem. */ - .root ALIGN (4096) : { - __root_fs_image_start = . ; - *(.root) - __root_fs_image_end = . ; - - . = ALIGN (4) ; - ___initramfs_start = . ; - *(.init.ramfs) - ___initramfs_end = . ; - } > ROM - - __rom_copy_src_start = . ; - - .data : { - __kram_start = . ; - __rom_copy_dst_start = . ; - - __sdata = . ; - ___data_start = . ; - *(.data) - *(.exit.data) /* 2.5 convention */ - *(.data.exit) /* 2.4 convention */ - . = ALIGN (16) ; - *(.data.cacheline_aligned) - . = ALIGN (0x2000) ; - *(.data.init_task) - . = ALIGN (0x2000) ; - __edata = . ; - } > SRAM AT> ROM - - .init_data ALIGN (4096) : { - __init_start = . ; - *(.init.data) /* 2.5 convention */ - *(.data.init) /* 2.4 convention */ - __init_end = . ; - __rom_copy_dst_end = . ; - } > SRAM AT> ROM - - .bss ALIGN (4096) : { - __sbss = . ; - *(.bss) - *(COMMON) - . = ALIGN (4) ; - __init_stack_end = . ; - __ebss = . ; - - __kram_end = . ; - } > SRAM - - .bootmap ALIGN (4096) : { - __bootmap = . ; - . = . + 4096 ; /* enough for 128MB. */ - } > SRAM + ROMK_SECTIONS(ROM, SRAM) } diff -Nru a/arch/v850/anna.ld b/arch/v850/anna.ld --- a/arch/v850/anna.ld Mon Dec 23 21:21:53 2002 +++ b/arch/v850/anna.ld Mon Dec 23 21:21:53 2002 @@ -1,128 +1,20 @@ /* Linker script for the Midas labs Anna V850E2 evaluation board (CONFIG_V850E2_ANNA). */ -/* Note, all symbols are prefixed with an extra `_' for compatibility with - the existing linux sources. */ - -_jiffies = _jiffies_64 ; - MEMORY { - /* 256KB of internal memory (followed by one mirror). */ - iMEM0 : ORIGIN = 0, LENGTH = 0x00040000 - /* 256KB of internal memory (followed by one mirror). */ - iMEM1 : ORIGIN = 0x00040000, LENGTH = 0x00040000 - - /* 1MB of static RAM. This memory is mirrored 64 times. */ - SRAM : ORIGIN = 0x04000000, LENGTH = 0x00100000 - /* 64MB of DRAM. */ - SDRAM : ORIGIN = 0x08000000, LENGTH = 0x04000000 + /* 256KB of internal memory (followed by one mirror). */ + iMEM0 : ORIGIN = 0, LENGTH = 0x00040000 + /* 256KB of internal memory (followed by one mirror). */ + iMEM1 : ORIGIN = 0x00040000, LENGTH = 0x00040000 + + /* 1MB of static RAM. This memory is mirrored 64 times. */ + SRAM : ORIGIN = 0x04000000, LENGTH = 0x00100000 + /* 64MB of DRAM. */ + SDRAM : ORIGIN = 0x08000000, LENGTH = 0x04000000 } SECTIONS { - .intv : { - __intv_start = . ; - *(.intv.reset) /* Reset vector */ - *(.intv.common) /* Vectors common to all v850e proc. */ - *(.intv.mach) /* Machine-specific int. vectors. */ - __intv_end = . ; - } > iMEM0 - - .text : { - __kram_start = . ; - - __stext = . ; - *(.text) - *(.exit.text) /* 2.5 convention */ - *(.text.exit) /* 2.4 convention */ - *(.text.lock) - *(.exitcall.exit) - __real_etext = . ; /* There may be data after here. */ - *(.rodata) - - . = ALIGN (0x4) ; - *(.kstrtab) - - . = ALIGN (4) ; - *(.call_table_data) - *(.call_table_text) - - . = ALIGN (16) ; /* Exception table. */ - ___start___ex_table = . ; - *(__ex_table) - ___stop___ex_table = . ; - - ___start___ksymtab = . ;/* Kernel symbol table. */ - *(__ksymtab) - ___stop___ksymtab = . ; - . = ALIGN (4) ; - __etext = . ; - } > SRAM - - .data ALIGN (0x4) : { - __sdata = . ; - ___data_start = . ; - *(.data) - *(.exit.data) /* 2.5 convention */ - *(.data.exit) /* 2.4 convention */ - . = ALIGN (16) ; - *(.data.cacheline_aligned) - . = ALIGN (0x2000) ; - *(.data.init_task) - . = ALIGN (0x2000) ; - __edata = . ; - } > SRAM - - .bss ALIGN (0x4) : { - __sbss = . ; - *(.bss) - *(COMMON) - . = ALIGN (4) ; - __init_stack_end = . ; - __ebss = . ; - } > SRAM - - .init ALIGN (4096) : { - __init_start = . ; - *(.init.text) /* 2.5 convention */ - *(.init.data) - *(.text.init) /* 2.4 convention */ - *(.data.init) - . = ALIGN (16) ; - ___setup_start = . ; - *(.init.setup) /* 2.5 convention */ - *(.setup.init) /* 2.4 convention */ - ___setup_end = . ; - ___initcall_start = . ; - *(.initcall.init) - *(.initcall1.init) - *(.initcall2.init) - *(.initcall3.init) - *(.initcall4.init) - *(.initcall5.init) - *(.initcall6.init) - *(.initcall7.init) - . = ALIGN (4) ; - ___initcall_end = . ; - - . = ALIGN (4) ; - ___initramfs_start = . ; - *(.init.ramfs) - ___initramfs_end = . ; - - __init_end = . ; - - __kram_end = . ; - } > SRAM - - .bootmap ALIGN (4096) : { - __bootmap = . ; - . = . + 4096 ; /* enough for 128MB. */ - } > SRAM - - /* Device contents for the root filesystem. */ - .root : { - __root_fs_image_start = . ; - *(.root) - __root_fs_image_end = . ; - } > SDRAM + .intv : { INTV_CONTENTS } > iMEM0 + .sram : { RAMK_KRAM_CONTENTS } > SRAM + .root : { ROOT_FS_CONTENTS } > SDRAM } diff -Nru a/arch/v850/as85ep1-rom.ld b/arch/v850/as85ep1-rom.ld --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/arch/v850/as85ep1-rom.ld Mon Dec 23 21:22:04 2002 @@ -0,0 +1,24 @@ +/* Linker script for the NEC AS85EP1 V850E evaluation board + (CONFIG_V850E_AS85EP1), with kernel in ROM (CONFIG_ROM_KERNEL). */ + +/* Note, all symbols are prefixed with an extra `_' for compatibility with + the existing linux sources. */ + +MEMORY { + /* 4MB of flash ROM. */ + ROM : ORIGIN = 0, LENGTH = 0x00400000 + + /* 1MB of static RAM. */ + SRAM : ORIGIN = 0x00400000, LENGTH = 0x00100000 + + /* About 58MB of DRAM. This can actually be at one of two + positions, determined by jump JP3; we have to use the first + position because the second is partially out of processor + instruction addressing range (though in the second position + there's actually 64MB available). */ + SDRAM : ORIGIN = 0x00600000, LENGTH = 0x039F8000 +} + +SECTIONS { + ROMK_SECTIONS(ROM, SRAM) +} diff -Nru a/arch/v850/as85ep1.ld b/arch/v850/as85ep1.ld --- a/arch/v850/as85ep1.ld Mon Dec 23 21:21:58 2002 +++ b/arch/v850/as85ep1.ld Mon Dec 23 21:21:58 2002 @@ -1,23 +1,19 @@ /* Linker script for the NEC AS85EP1 V850E evaluation board (CONFIG_V850E_AS85EP1). */ -/* Note, all symbols are prefixed with an extra `_' for compatibility with - the existing linux sources. */ - -_jiffies = _jiffies_64 ; - MEMORY { - /* 1MB of internal memory ($BFbB"L?Na(BRAM). */ - iMEM0 : ORIGIN = 0, LENGTH = 0x00100000 + /* 1MB of internal memory ($BFbB"L?Na(BRAM). */ + iMEM0 : ORIGIN = 0, LENGTH = 0x00100000 - /* 1MB of static RAM. */ - SRAM : ORIGIN = 0x00400000, LENGTH = 0x00100000 + /* 1MB of static RAM. */ + SRAM : ORIGIN = 0x00400000, LENGTH = 0x00100000 - /* About 58MB of DRAM. This can actually be at one of two positions, - determined by jump JP3; we have to use the first position because the - second is partially out of processor instruction addressing range - (though in the second position there's actually 64MB available). */ - SDRAM : ORIGIN = 0x00600000, LENGTH = 0x039F8000 + /* About 58MB of DRAM. This can actually be at one of two + positions, determined by jump JP3; we have to use the first + position because the second is partially out of processor + instruction addressing range (though in the second position + there's actually 64MB available). */ + SDRAM : ORIGIN = 0x00600000, LENGTH = 0x039F8000 } SECTIONS { @@ -26,87 +22,8 @@ *(.intv.reset) /* Reset vector */ } > iMEM0 - .text : { - __kram_start = . ; - - __stext = . ; - *(.text) - *(.exit.text) /* 2.5 convention */ - *(.text.exit) /* 2.4 convention */ - *(.text.lock) - *(.exitcall.exit) - __real_etext = . ; /* There may be data after here. */ - *(.rodata) - - . = ALIGN (0x4) ; - *(.kstrtab) - - . = ALIGN (4) ; - *(.call_table_data) - *(.call_table_text) - - . = ALIGN (16) ; /* Exception table. */ - ___start___ex_table = . ; - *(__ex_table) - ___stop___ex_table = . ; - - ___start___ksymtab = . ;/* Kernel symbol table. */ - *(__ksymtab) - ___stop___ksymtab = . ; - . = ALIGN (4) ; - __etext = . ; - } > SRAM - - .data ALIGN (0x4) : { - __sdata = . ; - ___data_start = . ; - *(.data) - *(.exit.data) /* 2.5 convention */ - *(.data.exit) /* 2.4 convention */ - . = ALIGN (16) ; - *(.data.cacheline_aligned) - . = ALIGN (0x2000) ; - *(.data.init_task) - . = ALIGN (0x2000) ; - __edata = . ; - } > SRAM - - .bss ALIGN (0x4) : { - __sbss = . ; - *(.bss) - *(COMMON) - . = ALIGN (4) ; - __init_stack_end = . ; - __ebss = . ; - } > SRAM - - .init ALIGN (4096) : { - __init_start = . ; - *(.init.text) /* 2.5 convention */ - *(.init.data) - *(.text.init) /* 2.4 convention */ - *(.data.init) - . = ALIGN (16) ; - ___setup_start = . ; - *(.init.setup) /* 2.5 convention */ - *(.setup.init) /* 2.4 convention */ - ___setup_end = . ; - ___initcall_start = . ; - *(.initcall.init) - *(.initcall1.init) - *(.initcall2.init) - *(.initcall3.init) - *(.initcall4.init) - *(.initcall5.init) - *(.initcall6.init) - *(.initcall7.init) - . = ALIGN (4) ; - ___initcall_end = . ; - - . = ALIGN (4) ; - ___initramfs_start = . ; - *(.init.ramfs) - ___initramfs_end = . ; + .sram : { + RAMK_KRAM_CONTENTS /* We stick most of the interrupt vectors here; they'll be copied into the proper location by the early init code (we @@ -121,27 +38,12 @@ *(.intv.mach) /* Machine-specific int. vectors. */ . = ALIGN (0x10) ; __intv_copy_src_end = . ; - - /* This is here so that when we free init memory, the initial - load-area of the interrupt vectors is freed too. */ - __init_end = . ; - __kram_end = . ; - - __bootmap = . ; - . = . + 4096 ; /* enough for 128MB. */ } > SRAM /* Where we end up putting the vectors. */ __intv_copy_dst_start = 0x10 ; __intv_copy_dst_end = __intv_copy_dst_start + (__intv_copy_src_end - __intv_copy_src_start) ; - __intv_end = __intv_copy_dst_end ; - /* Device contents for the root filesystem. */ - .root : { - . = ALIGN (4096) ; - __root_fs_image_start = . ; - *(.root) - __root_fs_image_end = . ; - } > SDRAM + .root : { ROOT_FS_CONTENTS } > SDRAM } diff -Nru a/arch/v850/fpga85e2c.ld b/arch/v850/fpga85e2c.ld --- a/arch/v850/fpga85e2c.ld Mon Dec 23 21:21:51 2002 +++ b/arch/v850/fpga85e2c.ld Mon Dec 23 21:21:51 2002 @@ -1,108 +1,36 @@ /* Linker script for the FPGA implementation of the V850E2 NA85E2C cpu core (CONFIG_V850E2_FPGA85E2C). */ -/* Note, all symbols are prefixed with an extra `_' for compatibility with - the existing linux sources. */ - -_jiffies = _jiffies_64 ; - MEMORY { - /* Reset vector. */ - RESET : ORIGIN = 0, LENGTH = 0x10 - /* Interrupt vectors. */ - INTV : ORIGIN = 0x10, LENGTH = 0x470 - /* The `window' in RAM were we're allowed to load stuff. */ - RAM_LOW : ORIGIN = 0x480, LENGTH = 0x0005FB80 - /* Some more ram above the window were we can put bss &c. */ - RAM_HIGH : ORIGIN = 0x00060000, LENGTH = 0x000A0000 - /* This is the area visible from the outside world (we can use - this only for uninitialized data). */ - VISIBLE : ORIGIN = 0x00200000, LENGTH = 0x00060000 + /* Reset vector. */ + RESET : ORIGIN = 0, LENGTH = 0x10 + /* Interrupt vectors. */ + INTV : ORIGIN = 0x10, LENGTH = 0x470 + /* The `window' in RAM were we're allowed to load stuff. */ + RAM_LOW : ORIGIN = 0x480, LENGTH = 0x0005FB80 + /* Some more ram above the window were we can put bss &c. */ + RAM_HIGH : ORIGIN = 0x00060000, LENGTH = 0x000A0000 + /* This is the area visible from the outside world (we can use + this only for uninitialized data). */ + VISIBLE : ORIGIN = 0x00200000, LENGTH = 0x00060000 } SECTIONS { .reset : { - __kram_start = . ; + __kram_start = . ; __intv_start = . ; *(.intv.reset) /* Reset vector */ } > RESET - .r0_ram : { - __r0_ram = . ; + .ram_low : { + __r0_ram = . ; /* Must be near address 0. */ . = . + 32 ; - } > RAM_LOW - - .text : { - __stext = . ; - *(.text) - *(.exit.text) /* 2.5 convention */ - *(.text.exit) /* 2.4 convention */ - *(.text.lock) - *(.exitcall.exit) - __real_etext = . ; /* There may be data after here. */ - *(.rodata) - . = ALIGN (0x4) ; - *(.kstrtab) - - . = ALIGN (4) ; - *(.call_table_data) - *(.call_table_text) - - . = ALIGN (16) ; /* Exception table. */ - ___start___ex_table = . ; - *(__ex_table) - ___stop___ex_table = . ; - - ___start___ksymtab = . ;/* Kernel symbol table. */ - *(__ksymtab) - ___stop___ksymtab = . ; - . = ALIGN (4) ; - __etext = . ; - } > RAM_LOW - - .data : { - __sdata = . ; - *(.data) - *(.exit.data) /* 2.5 convention */ - *(.data.exit) /* 2.4 convention */ - . = ALIGN (16) ; - *(.data.cacheline_aligned) - . = ALIGN (0x2000) ; - *(.data.init_task) - . = ALIGN (0x2000) ; - __edata = . ; - } > RAM_LOW - - /* Device contents for the root filesystem. */ - .root : { - . = ALIGN (4096) ; - __root_fs_image_start = . ; - *(.root) - __root_fs_image_end = . ; - } > RAM_LOW - .init ALIGN (4096) : { - __init_start = . ; - *(.init.text) /* 2.5 convention */ - *(.init.data) - *(.text.init) /* 2.4 convention */ - *(.data.init) - . = ALIGN (16) ; - ___setup_start = . ; - *(.init.setup) /* 2.5 convention */ - *(.setup.init) /* 2.4 convention */ - ___setup_end = . ; - ___initcall_start = . ; - *(.initcall.init) - *(.initcall1.init) - *(.initcall2.init) - *(.initcall3.init) - *(.initcall4.init) - *(.initcall5.init) - *(.initcall6.init) - *(.initcall7.init) - . = ALIGN (4) ; - ___initcall_end = . ; + TEXT_CONTENTS + DATA_CONTENTS + ROOT_FS_CONTENTS + RAMK_INIT_CONTENTS_NO_END + INITRAMFS_CONTENTS } > RAM_LOW /* Where the interrupt vectors are initially loaded. */ @@ -114,26 +42,16 @@ __intv_end = . ; } > INTV AT> RAM_LOW - .bss : { + .ram_high : { /* This is here so that when we free init memory the load-time copy of the interrupt vectors and any empty space at the end of the `RAM_LOW' area is freed too. */ . = ALIGN (4096); __init_end = . ; - __sbss = . ; - *(.bss) - *(COMMON) - . = ALIGN (4) ; - __init_stack_end = . ; - __ebss = . ; - - __kram_end = . ; - } > RAM_HIGH - - .bootmap ALIGN (4096) : { - __bootmap = . ; - . = . + 4096 ; /* enough for 128MB. */ + BSS_CONTENTS + __kram_end = . ; + BOOTMAP_CONTENTS } > RAM_HIGH .visible : { diff -Nru a/arch/v850/kernel/entry.S b/arch/v850/kernel/entry.S --- a/arch/v850/kernel/entry.S Mon Dec 23 21:22:00 2002 +++ b/arch/v850/kernel/entry.S Mon Dec 23 21:22:00 2002 @@ -781,7 +781,7 @@ .align 4 C_DATA(sys_call_table): - .long CSYM(sys_ni_syscall) // 0 - old "setup()" system call + .long CSYM(sys_restart_syscall) // 0 .long CSYM(sys_exit) .long sys_fork_wrapper .long CSYM(sys_read) diff -Nru a/arch/v850/kernel/irq.c b/arch/v850/kernel/irq.c --- a/arch/v850/kernel/irq.c Mon Dec 23 21:21:59 2002 +++ b/arch/v850/kernel/irq.c Mon Dec 23 21:21:59 2002 @@ -21,7 +21,6 @@ #include #include #include -#include #include #include diff -Nru a/arch/v850/kernel/semaphore.c b/arch/v850/kernel/semaphore.c --- a/arch/v850/kernel/semaphore.c Mon Dec 23 21:21:59 2002 +++ b/arch/v850/kernel/semaphore.c Mon Dec 23 21:21:59 2002 @@ -13,6 +13,7 @@ * which was derived from the i386 version, linux/arch/i386/kernel/semaphore.c */ +#include #include #include diff -Nru a/arch/v850/kernel/setup.c b/arch/v850/kernel/setup.c --- a/arch/v850/kernel/setup.c Mon Dec 23 21:21:53 2002 +++ b/arch/v850/kernel/setup.c Mon Dec 23 21:21:53 2002 @@ -11,7 +11,6 @@ * Written by Miles Bader */ -#include #include #include #include diff -Nru a/arch/v850/kernel/signal.c b/arch/v850/kernel/signal.c --- a/arch/v850/kernel/signal.c Mon Dec 23 21:22:02 2002 +++ b/arch/v850/kernel/signal.c Mon Dec 23 21:22:02 2002 @@ -15,7 +15,6 @@ * This file was derived from the sh version, arch/sh/kernel/signal.c */ -#include #include #include #include @@ -147,8 +146,6 @@ struct rt_sigframe { - struct siginfo *pinfo; - void *puc; struct siginfo info; struct ucontext uc; unsigned long tramp[2]; /* signal trampoline */ @@ -330,10 +327,12 @@ if (err) goto give_sigsegv; - /* Set up registers for signal handler */ - regs->gpr[GPR_SP] = (unsigned long) frame; - regs->gpr[GPR_ARG0] = signal; /* Arg for signal handler */ - regs->pc = (unsigned long) ka->sa.sa_handler; + /* Set up registers for signal handler. */ + regs->pc = (v850_reg_t) ka->sa.sa_handler; + regs->gpr[GPR_SP] = (v850_reg_t)frame; + /* Signal handler args: */ + regs->gpr[GPR_ARG0] = signal; /* arg 0: signum */ + regs->gpr[GPR_ARG1] = (v850_reg_t)&frame->sc;/* arg 1: sigcontext */ set_fs(USER_DS); @@ -368,8 +367,6 @@ ? current_thread_info()->exec_domain->signal_invmap[sig] : sig; - err |= __put_user(&frame->info, &frame->pinfo); - err |= __put_user(&frame->uc, &frame->puc); err |= copy_siginfo_to_user(&frame->info, info); /* Create the ucontext. */ @@ -406,10 +403,13 @@ if (err) goto give_sigsegv; - /* Set up registers for signal handler */ - regs->gpr[GPR_SP] = (unsigned long) frame; - regs->gpr[GPR_ARG0] = signal; /* Arg for signal handler */ - regs->pc = (unsigned long) ka->sa.sa_handler; + /* Set up registers for signal handler. */ + regs->pc = (v850_reg_t) ka->sa.sa_handler; + regs->gpr[GPR_SP] = (v850_reg_t)frame; + /* Signal handler args: */ + regs->gpr[GPR_ARG0] = signal; /* arg 0: signum */ + regs->gpr[GPR_ARG1] = (v850_reg_t)&frame->info; /* arg 1: siginfo */ + regs->gpr[GPR_ARG2] = (v850_reg_t)&frame->uc; /* arg 2: ucontext */ set_fs(USER_DS); @@ -440,19 +440,23 @@ if (PT_REGS_SYSCALL (regs)) { /* If so, check system call restarting.. */ switch (regs->gpr[GPR_RVAL]) { - case -ERESTARTNOHAND: + case -ERESTART_RESTARTBLOCK: + current_thread_info()->restart_block.fn = + do_no_restart_syscall; + /* fall through */ + case -ERESTARTNOHAND: + regs->gpr[GPR_RVAL] = -EINTR; + break; + + case -ERESTARTSYS: + if (!(ka->sa.sa_flags & SA_RESTART)) { regs->gpr[GPR_RVAL] = -EINTR; break; - - case -ERESTARTSYS: - if (!(ka->sa.sa_flags & SA_RESTART)) { - regs->gpr[GPR_RVAL] = -EINTR; - break; - } + } /* fallthrough */ - case -ERESTARTNOINTR: - regs->gpr[12] = PT_REGS_SYSCALL (regs); - regs->pc -= 4; /* Size of `trap 0' insn. */ + case -ERESTARTNOINTR: + regs->gpr[12] = PT_REGS_SYSCALL (regs); + regs->pc -= 4; /* Size of `trap 0' insn. */ } PT_REGS_SET_SYSCALL (regs, 0); @@ -511,12 +515,17 @@ /* Did we come from a system call? */ if (PT_REGS_SYSCALL (regs)) { + int rval = (int)regs->gpr[GPR_RVAL]; /* Restart the system call - no handlers present */ - if (regs->gpr[GPR_RVAL] == (v850_reg_t)-ERESTARTNOHAND || - regs->gpr[GPR_RVAL] == (v850_reg_t)-ERESTARTSYS || - regs->gpr[GPR_RVAL] == (v850_reg_t)-ERESTARTNOINTR) + if (rval == -ERESTARTNOHAND + || rval == -ERESTARTSYS + || rval == -ERESTARTNOINTR) { regs->gpr[12] = PT_REGS_SYSCALL (regs); + regs->pc -= 4; /* Size of `trap 0' insn. */ + } + else if (rval == -ERESTART_RESTARTBLOCK) { + regs->gpr[12] = __NR_restart_syscall; regs->pc -= 4; /* Size of `trap 0' insn. */ } } diff -Nru a/arch/v850/kernel/syscalls.c b/arch/v850/kernel/syscalls.c --- a/arch/v850/kernel/syscalls.c Mon Dec 23 21:21:57 2002 +++ b/arch/v850/kernel/syscalls.c Mon Dec 23 21:21:57 2002 @@ -17,7 +17,6 @@ #include #include -#include #include #include #include diff -Nru a/arch/v850/kernel/time.c b/arch/v850/kernel/time.c --- a/arch/v850/kernel/time.c Mon Dec 23 21:21:57 2002 +++ b/arch/v850/kernel/time.c Mon Dec 23 21:21:57 2002 @@ -12,7 +12,6 @@ #include /* CONFIG_HEARTBEAT */ #include -#include #include #include #include diff -Nru a/arch/v850/rte_ma1_cb-ksram.ld b/arch/v850/rte_ma1_cb-ksram.ld --- a/arch/v850/rte_ma1_cb-ksram.ld Mon Dec 23 21:22:02 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,157 +0,0 @@ -/* Linker script for the Midas labs RTE-V850E/MA1-CB evaluation board - (CONFIG_RTE_CB_MA1), with kernel in SRAM, under Multi debugger. */ - -/* Note, all symbols are prefixed with an extra `_' for compatibility with - the existing linux sources. */ - -_jiffies = _jiffies_64 ; - -MEMORY { - /* 1MB of SRAM; we can't use the last 32KB, because it's used by - the monitor scratch-RAM. This memory is mirrored 4 times. */ - SRAM : ORIGIN = 0x00400000, LENGTH = 0x000F8000 - /* Monitor scratch RAM; only the interrupt vectors should go here. */ - MRAM : ORIGIN = 0x004F8000, LENGTH = 0x00008000 - /* 32MB of SDRAM. */ - SDRAM : ORIGIN = 0x00800000, LENGTH = 0x02000000 -} - -SECTIONS { - .text : { - __kram_start = . ; - - __stext = . ; - *(.text) - *(.exit.text) /* 2.5 convention */ - *(.text.exit) /* 2.4 convention */ - *(.text.lock) - *(.exitcall.exit) - __real_etext = . ; /* There may be data after here. */ - *(.rodata) - - . = ALIGN (0x4) ; - *(.kstrtab) - - . = ALIGN (4) ; - *(.call_table_data) - *(.call_table_text) - - . = ALIGN (16) ; /* Exception table. */ - ___start___ex_table = . ; - *(__ex_table) - ___stop___ex_table = . ; - - ___start___ksymtab = . ;/* Kernel symbol table. */ - *(__ksymtab) - ___stop___ksymtab = . ; - . = ALIGN (4) ; - __etext = . ; - } > SRAM - - .data ALIGN (0x4) : { - __sdata = . ; - ___data_start = . ; - *(.data) - *(.exit.data) /* 2.5 convention */ - *(.data.exit) /* 2.4 convention */ - . = ALIGN (16) ; - *(.data.cacheline_aligned) - . = ALIGN (0x2000) ; - *(.data.init_task) - . = ALIGN (0x2000) ; - __edata = . ; - } > SRAM - - .bss ALIGN (0x4) : { - __sbss = . ; - *(.bss) - *(COMMON) - . = ALIGN (4) ; - __init_stack_end = . ; - __ebss = . ; - } > SRAM - - .init ALIGN (4096) : { - __init_start = . ; - *(.init.text) /* 2.5 convention */ - *(.init.data) - *(.text.init) /* 2.4 convention */ - *(.data.init) - . = ALIGN (16) ; - ___setup_start = . ; - *(.init.setup) /* 2.5 convention */ - *(.setup.init) /* 2.4 convention */ - ___setup_end = . ; - ___initcall_start = . ; - *(.initcall.init) - *(.initcall1.init) - *(.initcall2.init) - *(.initcall3.init) - *(.initcall4.init) - *(.initcall5.init) - *(.initcall6.init) - *(.initcall7.init) - . = ALIGN (4) ; - ___initcall_end = . ; - - . = ALIGN (4) ; - ___initramfs_start = . ; - *(.init.ramfs) - ___initramfs_end = . ; - } > SRAM - - /* This provides address at which the interrupt vectors are - initially loaded by the loader. */ - __intv_load_start = ALIGN (0x10) ; - - /* Interrupt vector space. Because we're using the monitor - ROM, Instead of the native interrupt vector, we must use the - `alternate interrupt vector' area. Note that this is in - `SRAM' space, which is not currently used by the kernel (the - kernel uses `SDRAM' space). */ - - /* We can't load the interrupt vectors directly into their - target location, because the monitor ROM for the GHS Multi - debugger barfs if we try. Unfortunately, Multi also doesn't - deal correctly with ELF sections where the LMA and VMA differ - (it just ignores the LMA), so we can't use that feature to - work around the problem! What we do instead is just put the - interrupt vectors into a normal section, and have the - `mach_early_init' function for Midas boards do the necessary - copying and relocation at runtime (this section basically - only contains `jr' instructions, so it's not that hard). - - This the section structure I initially tried to use (which more - accurately expresses the intent): - - .intv 0x007F8000 : AT (ADDR (.init) + SIZEOF (.init)) { - ... - } > MRAM - */ - - .intv ALIGN (0x10) : { - __intv_start = . ; - *(.intv.reset) /* Reset vector */ - *(.intv.common) /* Vectors common to all v850e proc. */ - *(.intv.mach) /* Machine-specific int. vectors. */ - __intv_end = . ; - - /* This is here so that when we free init memory, the initial - load-area of the interrupt vectors is freed too. */ - __init_end = __intv_end; - - __kram_end = __init_end ; - } > SRAM - - .bootmap ALIGN (4096) : { - __bootmap = . ; - . = . + 4096 ; /* enough for 128MB. */ - } > SRAM - - /* Device contents for the root filesystem. */ - .root : { - __root_fs_image_start = . ; - *(.root) - __root_fs_image_end = . ; - } > SDRAM -} diff -Nru a/arch/v850/rte_ma1_cb-rom.ld b/arch/v850/rte_ma1_cb-rom.ld --- a/arch/v850/rte_ma1_cb-rom.ld Mon Dec 23 21:21:57 2002 +++ b/arch/v850/rte_ma1_cb-rom.ld Mon Dec 23 21:21:57 2002 @@ -1,120 +1,14 @@ /* Linker script for the Midas labs RTE-V850E/MA1-CB evaluation board (CONFIG_RTE_CB_MA1), with kernel in ROM. */ -/* Note, all symbols are prefixed with an extra `_' for compatibility with - the existing linux sources. */ - -_jiffies = _jiffies_64 ; - MEMORY { - ROM : ORIGIN = 0x00000000, LENGTH = 0x00100000 - /* 1MB of SRAM. This memory is mirrored 4 times. */ - SRAM : ORIGIN = 0x00400000, LENGTH = 0x00100000 - /* 32MB of SDRAM. */ - SDRAM : ORIGIN = 0x00800000, LENGTH = 0x02000000 + ROM : ORIGIN = 0x00000000, LENGTH = 0x00100000 + /* 1MB of SRAM. This memory is mirrored 4 times. */ + SRAM : ORIGIN = 0x00400000, LENGTH = 0x00100000 + /* 32MB of SDRAM. */ + SDRAM : ORIGIN = 0x00800000, LENGTH = 0x02000000 } SECTIONS { - /* Interrupt vector space. */ - .intv { - __intv_start = . ; - *(.intv.reset) /* Reset vector */ - *(.intv.common) /* Vectors common to all v850e proc. */ - *(.intv.mach) /* Machine-specific int. vectors. */ - __intv_end = . ; - } > ROM - - .text : { - __stext = . ; - *(.text) - *(.exit.text) /* 2.5 convention */ - *(.text.exit) /* 2.4 convention */ - *(.text.lock) - *(.exitcall.exit) - __real_etext = . ; /* There may be data after here. */ - *(.rodata) - . = ALIGN (0x4) ; - *(.kstrtab) - . = ALIGN (16) ; /* Exception table. */ - ___start___ex_table = . ; - *(__ex_table) - ___stop___ex_table = . ; - - ___start___ksymtab = . ;/* Kernel symbol table. */ - *(__ksymtab) - ___stop___ksymtab = . ; - . = ALIGN (4) ; - __etext = . ; - - . = ALIGN (4) ; - ___initramfs_start = . ; - *(.init.ramfs) - ___initramfs_end = . ; - } > ROM - - __rom_copy_src_start = . ; - - .data : { - __kram_start = . ; - - __sdata = . ; - ___data_start = . ; - *(.data) - *(.exit.data) /* 2.5 convention */ - *(.data.exit) /* 2.4 convention */ - . = ALIGN (16) ; - *(.data.cacheline_aligned) - . = ALIGN (0x2000) ; - *(.data.init_task) - . = ALIGN (0x2000) ; - __edata = . ; - } > SRAM AT> ROM - - .bss ALIGN (0x4) : { - __sbss = . ; - *(.bss) - *(COMMON) - . = ALIGN (4) ; - __init_stack_end = . ; - __ebss = . ; - } > SRAM - - .init ALIGN (4096) : { - __init_start = . ; - *(.init.text) /* 2.5 convention */ - *(.init.data) - *(.text.init) /* 2.4 convention */ - *(.data.init) - . = ALIGN (16) ; - ___setup_start = . ; - *(.init.setup) /* 2.5 convention */ - *(.setup.init) /* 2.4 convention */ - ___setup_end = . ; - ___initcall_start = . ; - *(.initcall.init) - *(.initcall1.init) - *(.initcall2.init) - *(.initcall3.init) - *(.initcall4.init) - *(.initcall5.init) - *(.initcall6.init) - *(.initcall7.init) - . = ALIGN (4) ; - ___initcall_end = . ; - __init_end = . ; - - __kram_end = . ; - } > SRAM - - .bootmap ALIGN (4096) : { - __bootmap = . ; - . = . + 4096 ; /* enough for 128MB. */ - } > SRAM - - /* device contents for the root filesystem. */ - .root ALIGN (4096) { - __root_fs_image_start = . ; - *(.root) - __root_fs_image_end = . ; - } > SDRAM + ROMK_SECTIONS(ROM, SRAM) } diff -Nru a/arch/v850/rte_ma1_cb.ld b/arch/v850/rte_ma1_cb.ld --- a/arch/v850/rte_ma1_cb.ld Mon Dec 23 21:21:50 2002 +++ b/arch/v850/rte_ma1_cb.ld Mon Dec 23 21:21:50 2002 @@ -1,157 +1,57 @@ /* Linker script for the Midas labs RTE-V850E/MA1-CB evaluation board (CONFIG_RTE_CB_MA1), with kernel in SDRAM, under Multi debugger. */ -/* Note, all symbols are prefixed with an extra `_' for compatibility with - the existing linux sources. */ - -_jiffies = _jiffies_64 ; - MEMORY { - /* 1MB of SRAM; we can't use the last 32KB, because it's used by - the monitor scratch-RAM. This memory is mirrored 4 times. */ - SRAM : ORIGIN = 0x00400000, LENGTH = 0x000F8000 - /* Monitor scratch RAM; only the interrupt vectors should go here. */ - MRAM : ORIGIN = 0x004F8000, LENGTH = 0x00008000 - /* 32MB of SDRAM. */ - SDRAM : ORIGIN = 0x00800000, LENGTH = 0x02000000 + /* 1MB of SRAM; we can't use the last 32KB, because it's used by + the monitor scratch-RAM. This memory is mirrored 4 times. */ + SRAM : ORIGIN = 0x00400000, LENGTH = 0x000F8000 + /* Monitor scratch RAM; only the interrupt vectors should go here. */ + MRAM : ORIGIN = 0x004F8000, LENGTH = 0x00008000 + /* 32MB of SDRAM. */ + SDRAM : ORIGIN = 0x00800000, LENGTH = 0x02000000 } +#ifdef CONFIG_RTE_CB_MA1_KSRAM +# define KRAM SRAM +#else +# define KRAM SDRAM +#endif + SECTIONS { - .bootmap : { - __bootmap = . ; - . = . + 4096 ; /* enough for 128MB. */ - } > SRAM + /* We can't use RAMK_KRAM_CONTENTS because that puts the whole + kernel in a single ELF segment, and the Multi debugger (which + we use to load the kernel) appears to have bizarre problems + dealing with it. */ .text : { - __kram_start = . ; - - __stext = . ; - *(.text) - *(.exit.text) /* 2.5 convention */ - *(.text.exit) /* 2.4 convention */ - *(.text.lock) - *(.exitcall.exit) - __real_etext = . ; /* There may be data after here. */ - *(.rodata) - - . = ALIGN (0x4) ; - *(.kstrtab) - - . = ALIGN (4) ; - *(.call_table_data) - *(.call_table_text) - - . = ALIGN (16) ; /* Exception table. */ - ___start___ex_table = . ; - *(__ex_table) - ___stop___ex_table = . ; - - ___start___ksymtab = . ;/* Kernel symbol table. */ - *(__ksymtab) - ___stop___ksymtab = . ; - . = ALIGN (4) ; - __etext = . ; - } > SDRAM - - .data ALIGN (0x4) : { - __sdata = . ; - ___data_start = . ; - *(.data) - *(.exit.data) /* 2.5 convention */ - *(.data.exit) /* 2.4 convention */ - . = ALIGN (16) ; - *(.data.cacheline_aligned) - . = ALIGN (0x2000) ; - *(.data.init_task) - . = ALIGN (0x2000) ; - __edata = . ; - } > SDRAM - - .bss ALIGN (0x4) : { - __sbss = . ; - *(.bss) - *(COMMON) - . = ALIGN (4) ; - __init_stack_end = . ; - __ebss = . ; - } > SDRAM - - .init ALIGN (4096) : { - __init_start = . ; - *(.init.text) /* 2.5 convention */ - *(.init.data) - *(.text.init) /* 2.4 convention */ - *(.data.init) - . = ALIGN (16) ; - ___setup_start = . ; - *(.init.setup) /* 2.5 convention */ - *(.setup.init) /* 2.4 convention */ - ___setup_end = . ; - ___initcall_start = . ; - *(.initcall.init) - *(.initcall1.init) - *(.initcall2.init) - *(.initcall3.init) - *(.initcall4.init) - *(.initcall5.init) - *(.initcall6.init) - *(.initcall7.init) - . = ALIGN (4) ; - ___initcall_end = . ; - - . = ALIGN (4) ; - ___initramfs_start = . ; - *(.init.ramfs) - ___initramfs_end = . ; - } > SDRAM - - /* The address at which the interrupt vectors are initially - loaded by the loader. */ - __intv_load_start = ALIGN (0x10) ; - - /* Interrupt vector space. Because we're using the monitor - ROM, Instead of the native interrupt vector, we must use the - `alternate interrupt vector' area. Note that this is in - `SRAM' space, which is not currently used by the kernel (the - kernel uses `SDRAM' space). */ - - /* We can't load the interrupt vectors directly into their - target location, because the monitor ROM for the GHS Multi - debugger barfs if we try. Unfortunately, Multi also doesn't - deal correctly with ELF sections where the LMA and VMA differ - (it just ignores the LMA), so we can't use that feature to - work around the problem! What we do instead is just put the - interrupt vectors into a normal section, and have the - `mach_early_init' function for Midas boards do the necessary - copying and relocation at runtime (this section basically - only contains `jr' instructions, so it's not that hard). - - This the section structure I initially tried to use (which more - accurately expresses the intent): - - .intv 0x007F8000 : AT (ADDR (.init) + SIZEOF (.init)) { - ... - } > MRAM - */ - - .intv ALIGN (0x10) : { - __intv_start = . ; - *(.intv.reset) /* Reset vector */ - *(.intv.common) /* Vectors common to all v850e proc. */ - *(.intv.mach) /* Machine-specific int. vectors. */ - __intv_end = . ; - - /* This is here so that when we free init memory, the initial - load-area of the interrupt vectors is freed too. */ - __init_end = __intv_end; - + __kram_start = . ; + TEXT_CONTENTS + } > KRAM + + .data : { + DATA_CONTENTS + BSS_CONTENTS + RAMK_INIT_CONTENTS __kram_end = . ; - } > SDRAM + BOOTMAP_CONTENTS + + /* The address at which the interrupt vectors are initially + loaded by the loader. We can't load the interrupt vectors + directly into their target location, because the monitor + ROM for the GHS Multi debugger barfs if we try. + Unfortunately, Multi also doesn't deal correctly with ELF + sections where the LMA and VMA differ (it just ignores the + LMA), so we can't use that feature to work around the + problem! What we do instead is just put the interrupt + vectors into a normal section, and have the + `mach_early_init' function for Midas boards do the + necessary copying and relocation at runtime (this section + basically only contains `jr' instructions, so it's not + that hard). */ + . = ALIGN (0x10) ; + __intv_load_start = . ; + INTV_CONTENTS + } > KRAM - /* Device contents for the root filesystem. */ - .root ALIGN (4096) : { - __root_fs_image_start = . ; - *(.root) - __root_fs_image_end = . ; - } > SDRAM + .root ALIGN (4096) : { ROOT_FS_CONTENTS } > SDRAM } diff -Nru a/arch/v850/sim.ld b/arch/v850/sim.ld --- a/arch/v850/sim.ld Mon Dec 23 21:21:50 2002 +++ b/arch/v850/sim.ld Mon Dec 23 21:21:50 2002 @@ -1,114 +1,14 @@ /* Linker script for the gdb v850e simulator (CONFIG_V850E_SIM). */ -/* Note, all symbols are prefixed with an extra `_' for compatibility with - the existing linux sources. */ - -_jiffies = _jiffies_64 ; - MEMORY { - /* Interrupt vectors. */ - INTV : ORIGIN = 0x0, LENGTH = 0xe0 - /* 16MB of RAM. - This must match RAM_ADDR and RAM_SIZE in include/asm-v580/sim.h */ - RAM : ORIGIN = 0x8F000000, LENGTH = 0x01000000 + /* Interrupt vectors. */ + INTV : ORIGIN = 0x0, LENGTH = 0xe0 + /* 16MB of RAM. + This must match RAM_ADDR and RAM_SIZE in include/asm-v850/sim.h */ + RAM : ORIGIN = 0x8F000000, LENGTH = 0x01000000 } SECTIONS { - .intv : { - __intv_start = . ; - *(.intv.reset) /* Reset vector */ - *(.intv.common) /* Vectors common to all v850e proc. */ - *(.intv.mach) /* Machine-specific int. vectors. */ - __intv_end = . ; - } > INTV - - .text : { - __kram_start = . ; - - __stext = . ; - *(.text) - *(.exit.text) /* 2.5 convention */ - *(.text.exit) /* 2.4 convention */ - *(.text.lock) - *(.exitcall.exit) - __real_etext = . ; /* There may be data after here. */ - *(.rodata) - . = ALIGN (0x4) ; - *(.kstrtab) - - . = ALIGN (4) ; - *(.call_table_data) - *(.call_table_text) - - . = ALIGN (16) ; /* Exception table. */ - ___start___ex_table = . ; - *(__ex_table) - ___stop___ex_table = . ; - - ___start___ksymtab = . ;/* Kernel symbol table. */ - *(__ksymtab) - ___stop___ksymtab = . ; - . = ALIGN (4) ; - __etext = . ; - } > RAM - - .data ALIGN (0x4) : { - __sdata = . ; - *(.data) - *(.exit.data) /* 2.5 convention */ - *(.data.exit) /* 2.4 convention */ - . = ALIGN (16) ; - *(.data.cacheline_aligned) - . = ALIGN (0x2000) ; - *(.data.init_task) - . = ALIGN (0x2000) ; - __edata = . ; - } > RAM - - .bss ALIGN (0x4) : { - __sbss = . ; - *(.bss) - *(COMMON) - . = ALIGN (4) ; - __init_stack_end = . ; - __ebss = . ; - } > RAM - - .init ALIGN (4096) : { - __init_start = . ; - *(.init.text) /* 2.5 convention */ - *(.init.data) - *(.text.init) /* 2.4 convention */ - *(.data.init) - . = ALIGN (16) ; - ___setup_start = . ; - *(.init.setup) /* 2.5 convention */ - *(.setup.init) /* 2.4 convention */ - ___setup_end = . ; - ___initcall_start = . ; - *(.initcall.init) - *(.initcall1.init) - *(.initcall2.init) - *(.initcall3.init) - *(.initcall4.init) - *(.initcall5.init) - *(.initcall6.init) - *(.initcall7.init) - . = ALIGN (4) ; - ___initcall_end = . ; - - . = ALIGN (4) ; - ___initramfs_start = . ; - *(.init.ramfs) - ___initramfs_end = . ; - - __init_end = . ; - - __kram_end = . ; - } > RAM - - .bootmap ALIGN (4096) : { - __bootmap = . ; - . = . + 4096 ; /* enough for 128MB. */ - } > RAM + .intv : { INTV_CONTENTS } > INTV + .ram : { RAMK_KRAM_CONTENTS } > RAM } diff -Nru a/arch/v850/sim85e2c.ld b/arch/v850/sim85e2c.ld --- a/arch/v850/sim85e2c.ld Mon Dec 23 21:22:00 2002 +++ b/arch/v850/sim85e2c.ld Mon Dec 23 21:22:00 2002 @@ -1,141 +1,44 @@ /* Linker script for the sim85e2c simulator, which is a verilog simulation of the V850E2 NA85E2C cpu core (CONFIG_V850E2_SIM85E2C). */ -/* Note, all symbols are prefixed with an extra `_' for compatibility with - the existing linux sources. */ - -_jiffies = _jiffies_64 ; - MEMORY { - /* 1MB of `instruction RAM', starting at 0. - Instruction fetches are much faster from IRAM than from DRAM. - This should match IRAM_ADDR in "include/asm-v580/sim85e2c.h". */ - IRAM : ORIGIN = 0x00000000, LENGTH = 0x00100000 - - /* 1MB of `data RAM', below and contiguous with the I/O space. - Data fetches are much faster from DRAM than from IRAM. - This should match DRAM_ADDR in "include/asm-v580/sim85e2c.h". */ - DRAM : ORIGIN = 0xfff00000, LENGTH = 0x000ff000 - /* We have to load DRAM at a mirror-address of 0x1ff00000, - because the simulator's preprocessing script isn't smart - enough to deal with the above LMA. */ - DRAM_LOAD : ORIGIN = 0x1ff00000, LENGTH = 0x000ff000 - - /* `external ram' (CS1 area), comes after IRAM. - This should match ERAM_ADDR in "include/asm-v580/sim85e2c.h". */ - ERAM : ORIGIN = 0x00100000, LENGTH = 0x07f00000 + /* 1MB of `instruction RAM', starting at 0. + Instruction fetches are much faster from IRAM than from DRAM. + This should match IRAM_ADDR in "include/asm-v580/sim85e2c.h". */ + IRAM : ORIGIN = 0x00000000, LENGTH = 0x00100000 + + /* 1MB of `data RAM', below and contiguous with the I/O space. + Data fetches are much faster from DRAM than from IRAM. + This should match DRAM_ADDR in "include/asm-v580/sim85e2c.h". */ + DRAM : ORIGIN = 0xfff00000, LENGTH = 0x000ff000 + /* We have to load DRAM at a mirror-address of 0x1ff00000, + because the simulator's preprocessing script isn't smart + enough to deal with the above LMA. */ + DRAM_LOAD : ORIGIN = 0x1ff00000, LENGTH = 0x000ff000 + + /* `external ram' (CS1 area), comes after IRAM. + This should match ERAM_ADDR in "include/asm-v580/sim85e2c.h". */ + ERAM : ORIGIN = 0x00100000, LENGTH = 0x07f00000 } SECTIONS { - .intv : { - __intv_start = . ; - *(.intv) /* Interrupt vectors. */ - *(.intv.reset) /* Reset vector */ - *(.intv.common) /* Vectors common to all v850e proc. */ - *(.intv.mach) /* Machine-specific int. vectors. */ - __intv_end = . ; - } > IRAM - - .text : { - __stext = . ; - *(.text) - *(.exit.text) /* 2.5 convention */ - *(.text.exit) /* 2.4 convention */ - *(.text.lock) - *(.exitcall.exit) - __real_etext = . ; /* There may be data after here. */ - *(.rodata) - . = ALIGN (0x4) ; - *(.kstrtab) - - . = ALIGN (4) ; - *(.call_table_data) - *(.call_table_text) - - . = ALIGN (16) ; /* Exception table. */ - ___start___ex_table = . ; - *(__ex_table) - ___stop___ex_table = . ; - - ___start___ksymtab = . ;/* Kernel symbol table. */ - *(__ksymtab) - ___stop___ksymtab = . ; - . = ALIGN (4) ; - __etext = . ; + .iram : { + INTV_CONTENTS + TEXT_CONTENTS + RAMK_INIT_CONTENTS } > IRAM - - .init ALIGN (4096) : { - __init_start = . ; - *(.init.text) /* 2.5 convention */ - *(.init.data) - *(.text.init) /* 2.4 convention */ - *(.data.init) - . = ALIGN (16) ; - ___setup_start = . ; - *(.init.setup) /* 2.5 convention */ - *(.setup.init) /* 2.4 convention */ - ___setup_end = . ; - ___initcall_start = . ; - *(.initcall.init) - *(.initcall1.init) - *(.initcall2.init) - *(.initcall3.init) - *(.initcall4.init) - *(.initcall5.init) - *(.initcall6.init) - *(.initcall7.init) - . = ALIGN (4) ; - ___initcall_end = . ; - - . = ALIGN (4) ; - ___initramfs_start = . ; - *(.init.ramfs) - ___initramfs_end = . ; - - __init_end = . ; - } > IRAM - .data : { - __kram_start = . ; + __kram_start = . ; + DATA_CONTENTS + BSS_CONTENTS + ROOT_FS_CONTENTS - __sdata = . ; - *(.data) - *(.exit.data) /* 2.5 convention */ - *(.data.exit) /* 2.4 convention */ - . = ALIGN (16) ; - *(.data.cacheline_aligned) - . = ALIGN (0x2000) ; - *(.data.init_task) - . = ALIGN (0x2000) ; - __edata = . ; - } > DRAM AT> DRAM_LOAD - - .bss ALIGN (0x4) : { - __sbss = . ; - *(.bss) - *(COMMON) - . = ALIGN (4) ; - __init_stack_end = . ; - __ebss = . ; - } > DRAM AT> DRAM_LOAD - - /* Device contents for the root filesystem. */ - .root ALIGN (4096) : { - __root_fs_image_start = . ; - *(.root) - __root_fs_image_end = . ; - } > DRAM AT> DRAM_LOAD - - .memcons : { + /* We stick console output into a buffer here. */ _memcons_output = . ; . = . + 0x8000 ; _memcons_output_end = . ; - __kram_end = . ; - } > DRAM AT> DRAM_LOAD - - .bootmap ALIGN (4096) : { - __bootmap = . ; - . = . + 4096 ; /* enough for 128MB. */ + __kram_end = . ; + BOOTMAP_CONTENTS } > DRAM AT> DRAM_LOAD } diff -Nru a/arch/v850/vmlinux.lds.S b/arch/v850/vmlinux.lds.S --- a/arch/v850/vmlinux.lds.S Mon Dec 23 21:21:57 2002 +++ b/arch/v850/vmlinux.lds.S Mon Dec 23 21:21:57 2002 @@ -1,5 +1,201 @@ +/* + * arch/v850/vmlinux.lds.S -- kernel linker script for v850 platforms + * + * Copyright (C) 2002 NEC Electronics Corporation + * Copyright (C) 2002 Miles Bader + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file COPYING in the main directory of this + * archive for more details. + * + * Written by Miles Bader + */ + #include + +/* The following macros contain the usual definitions for various data areas. + The prefix `RAMK_' is used to indicate macros suitable for kernels loaded + into RAM, and similarly `ROMK_' for ROM-resident kernels. Note that all + symbols are prefixed with an extra `_' for compatibility with the v850 + toolchain. */ + + +/* Interrupt vectors. */ +#define INTV_CONTENTS \ + __intv_start = . ; \ + *(.intv.reset) /* Reset vector */ \ + *(.intv.common) /* Vectors common to all v850e proc */\ + *(.intv.mach) /* Machine-specific int. vectors. */ \ + __intv_end = . ; + +/* Kernel text segment, and some constant data areas. */ +#define TEXT_CONTENTS \ + __stext = . ; \ + *(.text) \ + *(.exit.text) /* 2.5 convention */ \ + *(.text.exit) /* 2.4 convention */ \ + *(.text.lock) \ + *(.exitcall.exit) \ + __real_etext = . ; /* There may be data after here. */ \ + *(.rodata) \ + . = ALIGN (0x4) ; \ + *(.kstrtab) \ + . = ALIGN (4) ; \ + *(.call_table_data) \ + *(.call_table_text) \ + . = ALIGN (16) ; /* Exception table. */ \ + ___start___ex_table = . ; \ + *(__ex_table) \ + ___stop___ex_table = . ; \ + ___start___ksymtab = . ;/* Kernel symbol table. */ \ + *(__ksymtab) \ + ___stop___ksymtab = . ; \ + . = ALIGN (4) ; \ + __etext = . ; + +/* Kernel data segment. */ +#define DATA_CONTENTS \ + __sdata = . ; \ + *(.data) \ + *(.exit.data) /* 2.5 convention */ \ + *(.data.exit) /* 2.4 convention */ \ + . = ALIGN (16) ; \ + *(.data.cacheline_aligned) \ + . = ALIGN (0x2000) ; \ + *(.data.init_task) \ + . = ALIGN (0x2000) ; \ + __edata = . ; + +/* Kernel BSS segment. */ +#define BSS_CONTENTS \ + __sbss = . ; \ + *(.bss) \ + *(COMMON) \ + . = ALIGN (4) ; \ + __init_stack_end = . ; \ + __ebss = . ; + +/* `initcall' tables. */ +#define INITCALL_CONTENTS \ + . = ALIGN (16) ; \ + ___setup_start = . ; \ + *(.init.setup) /* 2.5 convention */ \ + *(.setup.init) /* 2.4 convention */ \ + ___setup_end = . ; \ + ___start___param = . ; \ + *(__param) \ + ___stop___param = . ; \ + ___initcall_start = . ; \ + *(.initcall.init) \ + *(.initcall1.init) \ + *(.initcall2.init) \ + *(.initcall3.init) \ + *(.initcall4.init) \ + *(.initcall5.init) \ + *(.initcall6.init) \ + *(.initcall7.init) \ + . = ALIGN (4) ; \ + ___initcall_end = . ; + +/* Contents of `init' section for a kernel that's loaded into RAM. */ +#define RAMK_INIT_CONTENTS \ + RAMK_INIT_CONTENTS_NO_END \ + __init_end = . ; +/* Same as RAMK_INIT_CONTENTS, but doesn't define the `__init_end' symbol. */ +#define RAMK_INIT_CONTENTS_NO_END \ + . = ALIGN (4096) ; \ + __init_start = . ; \ + *(.init.text) /* 2.5 convention */ \ + *(.init.data) \ + *(.text.init) /* 2.4 convention */ \ + *(.data.init) \ + INITCALL_CONTENTS \ + INITRAMFS_CONTENTS + +/* The contents of `init' section for a ROM-resident kernel which + should go into RAM. */ +#define ROMK_INIT_RAM_CONTENTS \ + . = ALIGN (4096) ; \ + __init_start = . ; \ + *(.init.data) /* 2.5 convention */ \ + *(.data.init) /* 2.4 convention */ \ + __init_end = . ; \ + . = ALIGN (4096) ; + +/* The contents of `init' section for a ROM-resident kernel which + should go into ROM. */ +#define ROMK_INIT_ROM_CONTENTS \ + *(.init.text) /* 2.5 convention */ \ + *(.text.init) /* 2.4 convention */ \ + INITCALL_CONTENTS \ + INITRAMFS_CONTENTS + +/* A root filesystem image, for kernels with an embedded root filesystem. */ +#define ROOT_FS_CONTENTS \ + __root_fs_image_start = . ; \ + *(.root) \ + __root_fs_image_end = . ; +/* The initramfs archive. */ +#define INITRAMFS_CONTENTS \ + . = ALIGN (4) ; \ + ___initramfs_start = . ; \ + *(.init.ramfs) \ + ___initramfs_end = . ; +/* Where the initial bootmap (bitmap for the boot-time memory allocator) + should be place. */ +#define BOOTMAP_CONTENTS \ + . = ALIGN (4096) ; \ + __bootmap = . ; \ + . = . + 4096 ; /* enough for 128MB. */ + +/* The contents of a `typical' kram area for a kernel in RAM. */ +#define RAMK_KRAM_CONTENTS \ + __kram_start = . ; \ + TEXT_CONTENTS \ + DATA_CONTENTS \ + BSS_CONTENTS \ + RAMK_INIT_CONTENTS \ + __kram_end = . ; \ + BOOTMAP_CONTENTS + + +/* Define output sections normally used for a ROM-resident kernel. + ROM and RAM should be appropriate memory areas to use for kernel + ROM and RAM data. This assumes that ROM starts at 0 (and thus can + hold the interrupt vectors). */ +#define ROMK_SECTIONS(ROM, RAM) \ + .rom : { \ + INTV_CONTENTS \ + TEXT_CONTENTS \ + ROMK_INIT_ROM_CONTENTS \ + ROOT_FS_CONTENTS \ + } > ROM \ + \ + __rom_copy_src_start = . ; \ + \ + .data : { \ + __kram_start = . ; \ + __rom_copy_dst_start = . ; \ + DATA_CONTENTS \ + ROMK_INIT_RAM_CONTENTS \ + __rom_copy_dst_end = . ; \ + } > RAM AT> ROM \ + \ + .bss ALIGN (4) : { \ + BSS_CONTENTS \ + __kram_end = . ; \ + BOOTMAP_CONTENTS \ + } > RAM + + +/* The 32-bit variable `jiffies' is just the lower 32-bits of `jiffies_64'. */ +_jiffies = _jiffies_64 ; + + +/* Include an appropriate platform-dependent linker-script (which + usually should use the above macros to do most of the work). */ + #ifdef CONFIG_V850E_SIM # include "sim.ld" #endif @@ -21,15 +217,17 @@ #endif #ifdef CONFIG_V850E_AS85EP1 -# include "as85ep1.ld" +# ifdef CONFIG_ROM_KERNEL +# include "as85ep1-rom.ld" +# else +# include "as85ep1.ld" +# endif #endif #ifdef CONFIG_RTE_CB_MA1 # ifdef CONFIG_ROM_KERNEL # include "rte_ma1_cb-rom.ld" -# elif CONFIG_RTE_CB_MA1_KSRAM -# include "rte_ma1_cb-ksram.ld" -# else /* !CONFIG_ROM_KERNEL && !CONFIG_RTE_CB_MA1_KSRAM */ +# else # include "rte_ma1_cb.ld" -# endif /* CONFIG_ROM_KERNEL */ -#endif /* CONFIG_RTE_CB_MA1 */ +# endif +#endif diff -Nru a/arch/x86_64/Kconfig b/arch/x86_64/Kconfig --- a/arch/x86_64/Kconfig Mon Dec 23 21:21:59 2002 +++ b/arch/x86_64/Kconfig Mon Dec 23 21:21:59 2002 @@ -175,6 +175,14 @@ See for more information. +config HUGETLB_PAGE + bool "Huge TLB Page Support" + help + This enables support for huge pages. User space applications + can make use of this support with the hugetlbfs file system + To actually use it you need to pass an hugepages= argument + to the kernel at boot time. + config SMP bool "Symmetric multi-processing support" ---help--- @@ -285,6 +293,35 @@ will issue the hlt instruction if nothing is to be done, thereby sending the processor to sleep and saving power. +config SOFTWARE_SUSPEND + bool "Software Suspend (EXPERIMENTAL)" + depends on EXPERIMENTAL && PM + ---help--- + Enable the possibilty of suspendig machine. It doesn't need APM. + You may suspend your machine by 'swsusp' or 'shutdown -z