diff -Nru a/CREDITS b/CREDITS --- a/CREDITS Fri Mar 21 22:39:54 2003 +++ b/CREDITS Tue Apr 8 02:31:12 2003 @@ -2750,6 +2750,10 @@ E: wsalamon@nai.com D: portions of the Linux Security Module (LSM) framework and security modules +N: Robert Sanders +E: gt8134b@prism.gatech.edu +D: Dosemu + N: Duncan Sands E: duncan.sands@wanadoo.fr W: http://topo.math.u-psud.fr/~sands @@ -2757,10 +2761,6 @@ S: 69 rue Dunois S: 75013 Paris S: France - -N: Robert Sanders -E: gt8134b@prism.gatech.edu -D: Dosemu N: Hannu Savolainen E: hannu@opensound.com diff -Nru a/Documentation/Changes b/Documentation/Changes --- a/Documentation/Changes Sun Feb 9 17:29:37 2003 +++ b/Documentation/Changes Fri Apr 4 09:04:01 2003 @@ -62,6 +62,7 @@ o isdn4k-utils 3.1pre1 # isdnctrl 2>&1|grep version o procps 2.0.9 # ps --version o oprofile 0.5 # oprofiled --version +o nfs-utils 1.0.3 # showmount --version Kernel compilation ================== diff -Nru a/Documentation/DocBook/usb.tmpl b/Documentation/DocBook/usb.tmpl --- a/Documentation/DocBook/usb.tmpl Fri Feb 28 03:44:59 2003 +++ b/Documentation/DocBook/usb.tmpl Wed Apr 2 07:27:30 2003 @@ -100,7 +100,8 @@ USB Host-Side API Model - Host-side drivers for USB devices talk to the "usbcore" APIs. + Within the kernel, + host-side drivers for USB devices talk to the "usbcore" APIs. There are two types of public "usbcore" APIs, targetted at two different layers of USB driver. Those are general purpose drivers, exposed through @@ -287,6 +288,684 @@ !Edrivers/usb/core/hcd.c !Edrivers/usb/core/hcd-pci.c !Edrivers/usb/core/buffer.c + + + + The USB Filesystem (usbfs) + + This chapter presents the Linux usbfs. + You may prefer to avoid avoid writing new kernel code for your + USB driver; that's the problem that usbfs set out to solve. + User mode device drivers are usually packaged as applications + or libraries, and may use usbfs through some programming library + that wraps it. Such libraries include + libusb + for C/C++, and + jUSB for Java. + + + Unfinished + This particular documentation is incomplete, + especially with respect to the asynchronous mode. + As of kernel 2.5.66 the code and this (new) documentation + need to be cross-reviewed. + + + + Configure usbfs into Linux kernels by enabling the + USB filesystem option (CONFIG_USB_DEVICEFS), + and you get basic support for user mode USB device drivers. + Until relatively recently it was often (confusingly) called + usbdevfs although it wasn't solving what + devfs was. + Every USB device will appear in usbfs, regardless of whether or + not it has a kernel driver; but only devices with kernel drivers + show up in devfs. + + + + What files are in "usbfs"? + + Conventionally mounted at + /proc/bus/usb, usbfs + features include: + + /proc/bus/usb/devices + ... a text file + showing each of the USB devices on known to the kernel, + and their configuration descriptors. + You can also poll() this to learn about new devices. + + /proc/bus/usb/BBB/DDD + ... magic files + exposing the each device's configuration descriptors, and + supporting a series of ioctls for making device requests, + including I/O to devices. (Purely for access by programs.) + + + + + Each bus is given a number (BBB) based on when it was + enumerated; within each bus, each device is given a similar + number (DDD). + Those BBB/DDD paths are not "stable" identifiers; + expect them to change even if you always leave the devices + plugged in to the same hub port. + Don't even think of saving these in application + configuration files. + Stable identifiers are available, for user mode applications + that want to use them. HID and networking devices expose + these IDs. + + + + + + Mounting and Access Control + + There are a number of mount options for usbfs, which will + be of most interest to you if you need to override the default + access control policy. + That policy is that only root may read or write device files + (/proc/bus/BBB/DDD) although anyone may read + the devices + or drivers files. + I/O requests to the device also need the CAP_SYS_RAWIO capability, + + + The significance of that is that by default, all user mode + device drivers need super-user privileges. + You can change modes or ownership in a driver setup + when the device hotplugs, or maye just start the + driver right then, as a privileged server (or some activity + within one). + That's the most secure approach for multi-user systems, + but for single user systems ("trusted" by that user) + it's more convenient just to grant everyone all access + (using the devmode=0666 option) + so the driver can start whenever it's needed. + + + The mount options for usbfs, usable in /etc/fstab or + in command line invocations of mount, are: + + + + busgid=NNNNN + Controls the GID used for the + /proc/bus/usb/BBB + directories. (Default: 0) + busmode=MMM + Controls the file mode used for the + /proc/bus/usb/BBB + directories. (Default: 0555) + + busuid=NNNNN + Controls the UID used for the + /proc/bus/usb/BBB + directories. (Default: 0) + + devgid=NNNNN + Controls the GID used for the + /proc/bus/usb/BBB/DDD + files. (Default: 0) + devmode=MMM + Controls the file mode used for the + /proc/bus/usb/BBB/DDD + files. (Default: 0644) + devuid=NNNNN + Controls the UID used for the + /proc/bus/usb/BBB/DDD + files. (Default: 0) + + listgid=NNNNN + Controls the GID used for the + /proc/bus/usb/devices and drivers files. + (Default: 0) + listmode=MMM + Controls the file mode used for the + /proc/bus/usb/devices and drivers files. + (Default: 0444) + listuid=NNNNN + Controls the UID used for the + /proc/bus/usb/devices and drivers files. + (Default: 0) + + + + + Note that many Linux distributions hard-wire the mount options + for usbfs in their init scripts, such as + /etc/rc.d/rc.sysinit, + rather than making it easy to set this per-system + policy in /etc/fstab. + + + + + + /proc/bus/usb/devices + + This file is handy for status viewing tools in user + mode, which can scan the text format and ignore most of it. + More detailed device status (including class and vendor + status) is available from device-specific files. + For information about the current format of this file, + see the + Documentation/usb/proc_usb_info.txt + file in your Linux kernel sources. + + + Otherwise the main use for this file from programs + is to poll() it to get notifications of usb devices + as they're plugged or unplugged. + To see what changed, you'd need to read the file and + compare "before" and "after" contents, scan the filesystem, + or see its hotplug event. + + + + + + /proc/bus/usb/BBB/DDD + + Use these files in one of these basic ways: + + + They can be read, + producing first the device descriptor + (18 bytes) and then the descriptors for the current configuration. + See the USB 2.0 spec for details about those binary data formats. + You'll need to convert most multibyte values from little endian + format to your native host byte order, although a few of the + fields in the device descriptor (both of the BCD-encoded fields, + and the vendor and product IDs) will be byteswapped for you. + Note that configuration descriptors include descriptors for + interfaces, altsettings, endpoints, and maybe additional + class descriptors. + + + Perform USB operations using + ioctl() requests to make endpoint I/O + requests (synchronously or asynchronously) or manage + the device. + These requests need the CAP_SYS_RAWIO capability, + as well as filesystem access permissions. + Only one ioctl request can be made on one of these + device files at a time. + This means that if you are synchronously reading an endpoint + from one thread, you won't be able to write to a different + endpoint from another thread until the read completes. + This works for half duplex protocols, + but otherwise you'd use asynchronous i/o requests. + + + + + + + Life Cycle of User Mode Drivers + + Such a driver first needs to find a device file + for a device it knows how to handle. + Maybe it was told about it because a + /sbin/hotplug event handling agent + chose that driver to handle the new device. + Or maybe it's an application that scans all the + /proc/bus/usb device files, and ignores most devices. + In either case, it should read() all + the descriptors from the device file, + and check them against what it knows how to handle. + It might just reject everything except a particular + vendor and product ID, or need a more complex policy. + + + Never assume there will only be one such device + on the system at a time! + If your code can't handle more than one device at + a time, at least detect when there's more than one, and + have your users choose which device to use. + + + Once your user mode driver knows what device to use, + it interacts with it in either of two styles. + The simple style is to make only control requests; some + devices don't need more complex interactions than those. + (An example might be software using vendor-specific control + requests for some initialization or configuration tasks, + with a kernel driver for the rest.) + + + More likely, you need a more complex style driver: + one using non-control endpoints, reading or writing data + and claiming exclusive use of an interface. + Bulk transfers are easiest to use, + but only their sibling interrupt transfers + work with low speed devices. + Both interrupt and isochronous transfers + offer service guarantees because their bandwidth is reserved. + Such "periodic" transfers are awkward to use through usbfs, + unless you're using the asynchronous calls. However, interrupt + transfers can also be used in a synchronous "one shot" style. + + + Your user-mode driver should never need to worry + about cleaning up request state when the device is + disconnected, although it should close its open file + descriptors as soon as it starts seeing the ENODEV + errors. + + + + + The ioctl() Requests + + To use these ioctls, you need to include the following + headers in your userspace program: +#include <linux/usb.h> +#include <linux/usbdevice_fs.h> +#include <asm/byteorder.h> + The standard USB device model requests, from "Chapter 9" of + the USB 2.0 specification, are automatically included from + the <linux/usb_ch9.h> header. + + + Unless noted otherwise, the ioctl requests + described here will + update the modification time on the usbfs file to which + they are applied (unless they fail). + A return of zero indicates success; otherwise, a + standard USB error code is returned. (These are + documented in + Documentation/usb/error-codes.txt + in your kernel sources.) + + + Each of these files multiplexes access to several + I/O streams, one per endpoint. + Each device has one control endpoint (endpoint zero) + which supports a limited RPC style RPC access. + Devices are configured + by khubd (in the kernel) setting a device-wide + configuration that affects things + like power consumption and basic functionality. + The endpoints are part of USB interfaces, + which may have altsettings + affecting things like which endpoints are available. + Many devices only have a single configuration and interface, + so drivers for them will ignore configurations and altsettings. + + + + + Management/Status Requests + + A number of usbfs requests don't deal very directly + with device I/O. + They mostly relate to device management and status. + These are all synchronous requests. + + + + + USBDEVFS_CLAIMINTERFACE + This is used to force usbfs to + claim a specific interface, + which has not previously been claimed by usbfs or any other + kernel driver. + The ioctl parameter is an integer holding the number of + the interface (bInterfaceNumber from descriptor). + + Note that if your driver doesn't claim an interface + before trying to use one of its endpoints, and no + other driver has bound to it, then the interface is + automatically claimed by usbfs. + + This claim will be released by a RELEASEINTERFACE ioctl, + or by closing the file descriptor. + File modification time is not updated by this request. + + + USBDEVFS_CONNECTINFO + Says whether the device is lowspeed. + The ioctl parameter points to a structure like this: +struct usbdevfs_connectinfo { + unsigned int devnum; + unsigned char slow; +}; + File modification time is not updated by this request. + + You can't tell whether a "not slow" + device is connected at high speed (480 MBit/sec) + or just full speed (12 MBit/sec). + You should know the devnum value already, + it's the DDD value of the device file name. + + + USBDEVFS_GETDRIVER + Returns the name of the kernel driver + bound to a given interface (a string). Parameter + is a pointer to this structure, which is modified: +struct usbdevfs_getdriver { + unsigned int interface; + char driver[USBDEVFS_MAXDRIVERNAME + 1]; +}; + File modification time is not updated by this request. + + + USBDEVFS_IOCTL + Passes a request from userspace through + to a kernel driver that has an ioctl entry in the + struct usb_driver it registered. +struct usbdevfs_ioctl { + int ifno; + int ioctl_code; + void *data; +}; + +/* user mode call looks like this. + * 'request' becomes the driver->ioctl() 'code' parameter. + * the size of 'param' is encoded in 'request', and that data + * is copied to or from the driver->ioctl() 'buf' parameter. + */ +static int +usbdev_ioctl (int fd, int ifno, unsigned request, void *param) +{ + struct usbdevfs_ioctl wrapper; + + wrapper.ifno = ifno; + wrapper.ioctl_code = request; + wrapper.data = param; + + return ioctl (fd, USBDEVFS_IOCTL, &wrapper); +} + File modification time is not updated by this request. + + This request lets kernel drivers talk to user mode code + through filesystem operations even when they don't create + a charactor or block special device. + It's also been used to do things like ask devices what + device special file should be used. + Two pre-defined ioctls are used + to disconnect and reconnect kernel drivers, so + that user mode code can completely manage binding + and configuration of devices. + + + USBDEVFS_RELEASEINTERFACE + This is used to release the claim usbfs + made on interface, either implicitly or because of a + USBDEVFS_CLAIMINTERFACE call, before the file + descriptor is closed. + The ioctl parameter is an integer holding the number of + the interface (bInterfaceNumber from descriptor); + File modification time is not updated by this request. + + No security check is made to ensure + that the task which made the claim is the one + which is releasing it. + This means that user mode driver may interfere + other ones. + + + USBDEVFS_RESETEP + Resets the data toggle value for an endpoint + (bulk or interrupt) to DATA0. + The ioctl parameter is an integer endpoint number + (1 to 15, as identified in the endpoint descriptor), + with USB_DIR_IN added if the device's endpoint sends + data to the host. + + Avoid using this request. + It should probably be removed. + Using it typically means the device and driver will lose + toggle synchronization. If you really lost synchronization, + you likely need to completely handshake with the device, + using a request like CLEAR_HALT + or SET_INTERFACE. + + + + + + + + Synchronous I/O Support + + Synchronous requests involve the kernel blocking + until until the user mode request completes, either by + finishing successfully or by reporting an error. + In most cases this is the simplest way to use usbfs, + although as noted above it does prevent performing I/O + to more than one endpoint at a time. + + + + + USBDEVFS_BULK + Issues a bulk read or write request to the + device. + The ioctl parameter is a pointer to this structure: +struct usbdevfs_bulktransfer { + unsigned int ep; + unsigned int len; + unsigned int timeout; /* in milliseconds */ + void *data; +}; + The "ep" value identifies a + bulk endpoint number (1 to 15, as identified in an endpoint + descriptor), + masked with USB_DIR_IN when referring to an endpoint which + sends data to the host from the device. + The length of the data buffer is identified by "len"; + Recent kernels support requests up to about 128KBytes. + FIXME say how read length is returned, + and how short reads are handled.. + + + USBDEVFS_CLEAR_HALT + Clears endpoint halt (stall) and + resets the endpoint toggle. This is only + meaningful for bulk or interrupt endpoints. + The ioctl parameter is an integer endpoint number + (1 to 15, as identified in an endpoint descriptor), + masked with USB_DIR_IN when referring to an endpoint which + sends data to the host from the device. + + Use this on bulk or interrupt endpoints which have + stalled, returning -EPIPE status + to a data transfer request. + Do not issue the control request directly, since + that could invalidate the host's record of the + data toggle. + + + USBDEVFS_CONTROL + Issues a control request to the device. + The ioctl parameter points to a structure like this: +struct usbdevfs_ctrltransfer { + __u8 bRequestType; + __u8 bRequest; + __u16 wValue; + __u16 wIndex; + __u16 wLength; + __u32 timeout; /* in milliseconds */ + void *data; +}; + + The first eight bytes of this structure are the contents + of the SETUP packet to be sent to the device; see the + USB 2.0 specification for details. + The bRequestType value is composed by combining a + USB_TYPE_* value, a USB_DIR_* value, and a + USB_RECIP_* value (from + <linux/usb.h>). + If wLength is nonzero, it describes the length of the data + buffer, which is either written to the device + (USB_DIR_OUT) or read from the device (USB_DIR_IN). + + At this writing, you can't transfer more than 4 KBytes + of data to or from a device; usbfs has a limit, and + some host controller drivers have a limit. + (That's not usually a problem.) + Also there's no way to say it's + not OK to get a short read back from the device. + + + USBDEVFS_RESET + Does a USB level device reset. + The ioctl parameter is ignored. + After the reset, this rebinds all device interfaces. + File modification time is not updated by this request. + + Avoid using this call + until some usbcore bugs get fixed, + since it does not fully synchronize device, interface, + and driver (not just usbfs) state. + + + USBDEVFS_SETINTERFACE + Sets the alternate setting for an + interface. The ioctl parameter is a pointer to a + structure like this: +struct usbdevfs_setinterface { + unsigned int interface; + unsigned int altsetting; +}; + File modification time is not updated by this request. + + Those struct members are from some interface descriptor + applying to the the current configuration. + The interface number is the bInterfaceNumber value, and + the altsetting number is the bAlternateSetting value. + (This resets each endpoint in the interface.) + + + USBDEVFS_SETCONFIGURATION + Issues the + usb_set_configuration call + for the device. + The parameter is an integer holding the number of + a configuration (bConfigurationValue from descriptor). + File modification time is not updated by this request. + + Avoid using this call + until some usbcore bugs get fixed, + since it does not fully synchronize device, interface, + and driver (not just usbfs) state. + + + + + + + Asynchronous I/O Support + + As mentioned above, there are situations where it may be + important to initiate concurrent operations from user mode code. + This is particularly important for periodic transfers + (interrupt and isochronous), but it can be used for other + kinds of USB requests too. + In such cases, the asynchronous requests described here + are essential. Rather than submitting one request and having + the kernel block until it completes, the blocking is separate. + + + These requests are packaged into a structure that + resembles the URB used by kernel device drivers. + (No POSIX Async I/O support here, sorry.) + It identifies the endpoint type (USBDEVFS_URB_TYPE_*), + endpoint (number, masked with USB_DIR_IN as appropriate), + buffer and length, and a user "context" value serving to + uniquely identify each request. + (It's usually a pointer to per-request data.) + Flags can modify requests (not as many as supported for + kernel drivers). + + + Each request can specify a realtime signal number + (between SIGRTMIN and SIGRTMAX, inclusive) to request a + signal be sent when the request completes. + + + When usbfs returns these urbs, the status value + is updated, and the buffer may have been modified. + Except for isochronous transfers, the actual_length is + updated to say how many bytes were transferred; if the + USBDEVFS_URB_DISABLE_SPD flag is set + ("short packets are not OK"), if fewer bytes were read + than were requested then you get an error report. + + +struct usbdevfs_iso_packet_desc { + unsigned int length; + unsigned int actual_length; + unsigned int status; +}; + +struct usbdevfs_urb { + unsigned char type; + unsigned char endpoint; + int status; + unsigned int flags; + void *buffer; + int buffer_length; + int actual_length; + int start_frame; + int number_of_packets; + int error_count; + unsigned int signr; + void *usercontext; + struct usbdevfs_iso_packet_desc iso_frame_desc[]; +}; + + For these asynchronous requests, the file modification + time reflects when the request was initiated. + This contrasts with their use with the synchronous requests, + where it reflects when requests complete. + + + + + USBDEVFS_DISCARDURB + + TBS + File modification time is not updated by this request. + + + + USBDEVFS_DISCSIGNAL + + TBS + File modification time is not updated by this request. + + + + USBDEVFS_REAPURB + + TBS + File modification time is not updated by this request. + + + + USBDEVFS_REAPURBNDELAY + + TBS + File modification time is not updated by this request. + + + + USBDEVFS_SUBMITURB + + TBS + + + + + + + + diff -Nru a/Documentation/arm/Porting b/Documentation/arm/Porting --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/Documentation/arm/Porting Tue Apr 1 03:48:00 2003 @@ -0,0 +1,135 @@ +Taken from list archive at http://lists.arm.linux.org.uk/pipermail/linux-arm-kernel/2001-July/004064.html + +Initial definitions +------------------- + +The following symbol definitions rely on you knowing the translation that +__virt_to_phys() does for your machine. This macro converts the passed +virtual address to a physical address. Normally, it is simply: + + phys = virt - PAGE_OFFSET + PHYS_OFFSET + + +Decompressor Symbols +-------------------- + +ZTEXTADDR + Start address of decompressor. There's no point in talking about + virtual or physical addresses here, since the MMU will be off at + the time when you call the decompressor code. You normally call + the kernel at this address to start it booting. This doesn't have + to be located in RAM, it can be in flash or other read-only or + read-write addressable medium. + +ZBSSADDR + Start address of zero-initialised work area for the decompressor. + This must be pointing at RAM. The decompressor will zero initialise + this for you. Again, the MMU will be off. + +ZRELADDR + This is the address where the decompressed kernel will be written, + and eventually executed. The following constraint must be valid: + + __virt_to_phys(TEXTADDR) == ZRELADDR + + The initial part of the kernel is carefully coded to be position + independent. + +INITRD_PHYS + Physical address to place the initial RAM disk. Only relevant if + you are using the bootpImage stuff (which only works on the old + struct param_struct). + +INITRD_VIRT + Virtual address of the initial RAM disk. The following constraint + must be valid: + + __virt_to_phys(INITRD_VIRT) == INITRD_PHYS + +PARAMS_PHYS + Physical address of the struct param_struct or tag list, giving the + kernel various parameters about its execution environment. + + +Kernel Symbols +-------------- + +PHYS_OFFSET + Physical start address of the first bank of RAM. + +PAGE_OFFSET + Virtual start address of the first bank of RAM. During the kernel + boot phase, virtual address PAGE_OFFSET will be mapped to physical + address PHYS_OFFSET, along with any other mappings you supply. + This should be the same value as TASK_SIZE. + +TASK_SIZE + The maximum size of a user process in bytes. Since user space + always starts at zero, this is the maximum address that a user + process can access+1. The user space stack grows down from this + address. + + Any virtual address below TASK_SIZE is deemed to be user process + area, and therefore managed dynamically on a process by process + basis by the kernel. I'll call this the user segment. + + Anything above TASK_SIZE is common to all processes. I'll call + this the kernel segment. + + (In other words, you can't put IO mappings below TASK_SIZE, and + hence PAGE_OFFSET). + +TEXTADDR + Virtual start address of kernel, normally PAGE_OFFSET + 0x8000. + This is where the kernel image ends up. With the latest kernels, + it must be located at 32768 bytes into a 128MB region. Previous + kernels placed a restriction of 256MB here. + +DATAADDR + Virtual address for the kernel data segment. Must not be defined + when using the decompressor. + +VMALLOC_START +VMALLOC_END + Virtual addresses bounding the vmalloc() area. There must not be + any static mappings in this area; vmalloc will overwrite them. + The addresses must also be in the kernel segment (see above). + Normally, the vmalloc() area starts VMALLOC_OFFSET bytes above the + last virtual RAM address (found using variable high_memory). + +VMALLOC_OFFSET + Offset normally incorporated into VMALLOC_START to provide a hole + between virtual RAM and the vmalloc area. We do this to allow + out of bounds memory accesses (eg, something writing off the end + of the mapped memory map) to be caught. Normally set to 8MB. + +Architecture Specific Macros +---------------------------- + +BOOT_MEM(pram,pio,vio) + `pram' specifies the physical start address of RAM. Must always + be present, and should be the same as PHYS_OFFSET. + + `pio' is the physical address of an 8MB region containing IO for + use with the debugging macros in arch/arm/kernel/debug-armv.S. + + `vio' is the virtual address of the 8MB debugging region. + + It is expected that the debugging region will be re-initialised + by the architecture specific code later in the code (via the + MAPIO function). + +BOOT_PARAMS + Same as, and see PARAMS_PHYS. + +FIXUP(func) + Machine specific fixups, run before memory subsystems have been + initialised. + +MAPIO(func) + Machine specific function to map IO areas (including the debug + region above). + +INITIRQ(func) + Machine specific function to initialise interrupts. + diff -Nru a/Documentation/cachetlb.txt b/Documentation/cachetlb.txt --- a/Documentation/cachetlb.txt Tue Apr 23 13:16:49 2002 +++ b/Documentation/cachetlb.txt Sat Apr 12 16:21:01 2003 @@ -75,7 +75,7 @@ Platform developers note that generic code will always invoke this interface with mm->page_table_lock held. -4) void flush_tlb_page(struct vm_area_struct *vma, unsigned long page) +4) void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr) This time we need to remove the PAGE_SIZE sized translation from the TLB. The 'vma' is the backing structure used by @@ -87,9 +87,9 @@ After running, this interface must make sure that any previous page table modification for address space 'vma->vm_mm' for - user virtual address 'page' will be visible to the cpu. That + user virtual address 'addr' will be visible to the cpu. That is, after running, there will be no entries in the TLB for - 'vma->vm_mm' for virtual address 'page'. + 'vma->vm_mm' for virtual address 'addr'. This is used primarily during fault processing. @@ -144,9 +144,9 @@ change_range_of_page_tables(mm, start, end); flush_tlb_range(vma, start, end); - 3) flush_cache_page(vma, page); + 3) flush_cache_page(vma, addr); set_pte(pte_pointer, new_pte_val); - flush_tlb_page(vma, page); + flush_tlb_page(vma, addr); The cache level flush will always be first, because this allows us to properly handle systems whose caches are strict and require @@ -200,7 +200,7 @@ call flush_cache_page (see below) for each entry which may be modified. -4) void flush_cache_page(struct vm_area_struct *vma, unsigned long page) +4) void flush_cache_page(struct vm_area_struct *vma, unsigned long addr) This time we need to remove a PAGE_SIZE sized range from the cache. The 'vma' is the backing structure used by @@ -211,7 +211,7 @@ "Harvard" type cache layouts). After running, there will be no entries in the cache for - 'vma->vm_mm' for virtual address 'page'. + 'vma->vm_mm' for virtual address 'addr'. This is used primarily during fault processing. @@ -235,7 +235,7 @@ NOTE: This does not fix shared mmaps, check out the sparc64 port for one way to solve this (in particular SPARC_FLAG_MMAPSHARED). -Next, you have two methods to solve the D-cache aliasing issue for all +Next, you have to solve the D-cache aliasing issue for all other cases. Please keep in mind that fact that, for a given page mapped into some user address space, there is always at least one more mapping, that of the kernel in it's linear mapping starting at @@ -244,35 +244,8 @@ aliasing problem has the potential to exist since the kernel already maps this page at its virtual address. -First, I describe the old method to deal with this problem. I am -describing it for documentation purposes, but it is deprecated and the -latter method I describe next should be used by all new ports and all -existing ports should move over to the new mechanism as well. - - flush_page_to_ram(struct page *page) - - The physical page 'page' is about to be place into the - user address space of a process. If it is possible for - stores done recently by the kernel into this physical - page, to not be visible to an arbitrary mapping in userspace, - you must flush this page from the D-cache. - - If the D-cache is writeback in nature, the dirty data (if - any) for this physical page must be written back to main - memory before the cache lines are invalidated. - -Admittedly, the author did not think very much when designing this -interface. It does not give the architecture enough information about -what exactly is going on, and there is no context to base a judgment -on about whether an alias is possible at all. The new interfaces to -deal with D-cache aliasing are meant to address this by telling the -architecture specific code exactly which is going on at the proper points -in time. - -Here is the new interface: - - void copy_user_page(void *to, void *from, unsigned long address) - void clear_user_page(void *to, unsigned long address) + void copy_user_page(void *to, void *from, unsigned long addr, struct page *page) + void clear_user_page(void *to, unsigned long addr, struct page *page) These two routines store data in user anonymous or COW pages. It allows a port to efficiently avoid D-cache alias @@ -285,8 +258,9 @@ of the same "color" as the user mapping of the page. Sparc64 for example, uses this technique. - The "address" parameter tells the virtual address where the - user will ultimately have this page mapped. + The 'addr' parameter tells the virtual address where the + user will ultimately have this page mapped, and the 'page' + parameter gives a pointer to the struct page of the target. If D-cache aliasing is not an issue, these two routines may simply call memcpy/memset directly and do nothing more. @@ -363,5 +337,5 @@ void flush_icache_page(struct vm_area_struct *vma, struct page *page) All the functionality of flush_icache_page can be implemented in - flush_dcache_page and update_mmu_cache. In 2.5 the hope is to + flush_dcache_page and update_mmu_cache. In 2.7 the hope is to remove this interface completely. diff -Nru a/Documentation/devices.txt b/Documentation/devices.txt --- a/Documentation/devices.txt Tue Mar 11 10:20:18 2003 +++ b/Documentation/devices.txt Wed Mar 26 16:34:38 2003 @@ -693,13 +693,6 @@ ... 31 = /dev/fb31 32nd frame buffer - For backwards compatibility {2.6} the following - progression is also handled by current kernels: - 0 = /dev/fb0 - 32 = /dev/fb1 - ... - 224 = /dev/fb7 - block Aztech/Orchid/Okano/Wearnes CD-ROM 0 = /dev/aztcd Aztech CD-ROM diff -Nru a/Documentation/filesystems/proc.txt b/Documentation/filesystems/proc.txt --- a/Documentation/filesystems/proc.txt Tue Mar 11 10:20:18 2003 +++ b/Documentation/filesystems/proc.txt Sat Apr 12 16:23:07 2003 @@ -362,6 +362,93 @@ ide-cdrom version 4.53 ide-disk version 1.08 +.............................................................................. + +meminfo: + +Provides information about distribution and utilization of memory. This +varies by architecture and compile options. The following is from a +16GB PIII, which has highmem enabled. You may not have all of these fields. + +> cat /proc/meminfo + + +MemTotal: 16344972 kB +MemFree: 13634064 kB +Buffers: 3656 kB +Cached: 1195708 kB +SwapCached: 0 kB +Active: 891636 kB +Inactive: 1077224 kB +HighTotal: 15597528 kB +HighFree: 13629632 kB +LowTotal: 747444 kB +LowFree: 4432 kB +SwapTotal: 0 kB +SwapFree: 0 kB +Dirty: 968 kB +Writeback: 0 kB +Mapped: 280372 kB +Slab: 684068 kB +Committed_AS: 1576424 kB +PageTables: 24448 kB +ReverseMaps: 1080904 +VmallocTotal: 112216 kB +VmallocUsed: 428 kB +VmallocChunk: 111088 kB + + MemTotal: Total usable ram (i.e. physical ram minus a few reserved + bits and the kernel binary code) + MemFree: The sum of LowFree+HighFree + Buffers: Relatively temporary storage for raw disk blocks + shouldn't get tremendously large (20MB or so) + Cached: in-memory cache for files read from the disk (the + pagecache). Doesn't include SwapCached + SwapCached: Memory that once was swapped out, is swapped back in but + still also is in the swapfile (if memory is needed it + doesn't need to be swapped out AGAIN because it is already + in the swapfile. This saves I/O) + Active: Memory that has been used more recently and usually not + reclaimed unless absolutely necessary. + Inactive: Memory which has been less recently used. It is more + eligible to be reclaimed for other purposes + HighTotal: + HighFree: Highmem is all memory above ~860MB of physical memory + Highmem areas are for use by userspace programs, or + for the pagecache. The kernel must use tricks to access + this memory, making it slower to access than lowmem. + LowTotal: + LowFree: Lowmem is memory which can be used for everything that + highmem can be used for, but it is also availble for the + kernel's use for its own data structures. Among many + other things, it is where everything from the Slab is + allocated. Bad things happen when you're out of lowmem. + SwapTotal: total amount of swap space available + SwapFree: Memory which has been evicted from RAM, and is temporarily + on the disk + Dirty: Memory which is waiting to get written back to the disk + Writeback: Memory which is actively being written back to the disk + Mapped: files which have been mmaped, such as libraries + Slab: in-kernel data structures cache +Committed_AS: An estimate of how much RAM you would need to make a + 99.99% guarantee that there never is OOM (out of memory) + for this workload. Normally the kernel will overcommit + memory. That means, say you do a 1GB malloc, nothing + happens, really. Only when you start USING that malloc + memory you will get real memory on demand, and just as + much as you use. So you sort of take a mortgage and hope + the bank doesn't go bust. Other cases might include when + you mmap a file that's shared only when you write to it + and you get a private copy of that data. While it normally + is shared between processes. The Committed_AS is a + guesstimate of how much RAM/swap you would need + worst-case. + PageTables: amount of memory dedicated to the lowest level of page + tables. + ReverseMaps: number of reverse mappings performed +VmallocTotal: total size of vmalloc memory area + VmallocUsed: amount of vmalloc area which is used +VmallocChunk: largest contigious block of vmalloc area which is free More detailed information can be found in the controller specific subdirectories. These are named ide0, ide1 and so on. Each of these diff -Nru a/Documentation/io_ordering.txt b/Documentation/io_ordering.txt --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/Documentation/io_ordering.txt Tue Mar 18 02:02:11 2003 @@ -0,0 +1,47 @@ +On some platforms, so-called memory-mapped I/O is weakly ordered. On such +platforms, driver writers are responsible for ensuring that I/O writes to +memory-mapped addresses on their device arrive in the order intended. This is +typically done by reading a 'safe' device or bridge register, causing the I/O +chipset to flush pending writes to the device before any reads are posted. A +driver would usually use this technique immediately prior to the exit of a +critical section of code protected by spinlocks. This would ensure that +subsequent writes to I/O space arrived only after all prior writes (much like a +memory barrier op, mb(), only with respect to I/O). + +A more concrete example from a hypothetical device driver: + + ... +CPU A: spin_lock_irqsave(&dev_lock, flags) +CPU A: val = readl(my_status); +CPU A: ... +CPU A: writel(newval, ring_ptr); +CPU A: spin_unlock_irqrestore(&dev_lock, flags) + ... +CPU B: spin_lock_irqsave(&dev_lock, flags) +CPU B: val = readl(my_status); +CPU B: ... +CPU B: writel(newval2, ring_ptr); +CPU B: spin_unlock_irqrestore(&dev_lock, flags) + ... + +In the case above, the device may receive newval2 before it receives newval, +which could cause problems. Fixing it is easy enough though: + + ... +CPU A: spin_lock_irqsave(&dev_lock, flags) +CPU A: val = readl(my_status); +CPU A: ... +CPU A: writel(newval, ring_ptr); +CPU A: (void)readl(safe_register); /* maybe a config register? */ +CPU A: spin_unlock_irqrestore(&dev_lock, flags) + ... +CPU B: spin_lock_irqsave(&dev_lock, flags) +CPU B: val = readl(my_status); +CPU B: ... +CPU B: writel(newval2, ring_ptr); +CPU B: (void)readl(safe_register); /* maybe a config register? */ +CPU B: spin_unlock_irqrestore(&dev_lock, flags) + +Here, the reads from safe_register will cause the I/O chipset to flush any +pending writes before actually posting the read to the chipset, preventing +possible data corruption. diff -Nru a/Documentation/scsi/st.txt b/Documentation/scsi/st.txt --- a/Documentation/scsi/st.txt Sat Dec 14 06:35:30 2002 +++ b/Documentation/scsi/st.txt Sat Apr 12 10:26:37 2003 @@ -1,8 +1,8 @@ This file contains brief information about the SCSI tape driver. The driver is currently maintained by Kai Mäkisara (email -Kai.Makisara@metla.fi) +Kai.Makisara@kolumbus.fi) -Last modified: Sat Dec 14 14:35:30 2002 by makisara +Last modified: Sat Apr 12 20:26:37 2003 by makisara BASICS @@ -132,7 +132,7 @@ Asynchronous writing. Writing the buffer contents to the tape is started and the write call returns immediately. The status is checked at the next tape operation. Asynchronous writes are not done with -direct i/o. +direct i/o and not in fixed block mode. Buffered writes and asynchronous writes may in some rare cases cause problems in multivolume operations if there is not enough space on the @@ -143,11 +143,6 @@ this read command. Should be disabled for those drives that don't like a filemark to truncate a read request or that don't like backspacing. -The threshold for triggering asynchronous write in fixed block mode -is defined by ST_WRITE_THRESHOLD. This may be optimized for each -use pattern. The default triggers asynchronous write after three -default sized writes (10 kB) from tar. - Scatter/gather buffers (buffers that consist of chunks non-contiguous in the physical memory) are used if contiguous buffers can't be allocated. To support all SCSI adapters (including those not @@ -206,11 +201,17 @@ If the driver is compiled into the kernel, the same parameters can be also set using, e.g., the LILO command line. The preferred syntax is -to use the same keywords as when loading the driver as module. If -several parameters are set, the keyword-value pairs are separated with -a comma (no spaces allowed). A colon can be used instead of the equal -mark. The definition is prepended by the string st=. Here is an -example: +is to use the same keyword used when loading as module but prepended +with 'st.'. For instance, to set the maximum number of scatter/gather +segments, the parameter 'st.max_sg_segs=xx' should be used (xx is the +number of scatter/gather segments). + +For compatibility, the old syntax from early 2.5 and 2.4 kernel +versions is supported. The same keywords can be used as when loading +the driver as module. If several parameters are set, the keyword-value +pairs are separated with a comma (no spaces allowed). A colon can be +used instead of the equal mark. The definition is prepended by the +string st=. Here is an example: st=buffer_kbs:64,write_threhold_kbs:60 diff -Nru a/Documentation/sound/alsa/DocBook/writing-an-alsa-driver.tmpl b/Documentation/sound/alsa/DocBook/writing-an-alsa-driver.tmpl --- a/Documentation/sound/alsa/DocBook/writing-an-alsa-driver.tmpl Thu Mar 20 08:41:10 2003 +++ b/Documentation/sound/alsa/DocBook/writing-an-alsa-driver.tmpl Thu Apr 10 03:28:09 2003 @@ -18,8 +18,8 @@ - Dec. 27, 2002 - 0.2 (reborn at Christmas) + Mar. 26, 2003 + 0.3 @@ -30,7 +30,7 @@ - Copyright (c) 2002 Takashi Iwai tiwai@suse.de + Copyright (c) 2002, 2003 Takashi Iwai tiwai@suse.de @@ -1425,11 +1425,11 @@
Resource Allocation - The allocation of ports and irqs are done via standard kernel + The allocation of I/O ports and irqs are done via standard kernel functions. Unlike ALSA ver.0.5.x., there are no helpers for that. And these resources must be released in the destructor - function (see below). Also, on ALSA 0.9.x, you don't need - allocate (pseudo-)DMA for PCI like 0.5.x. + function (see below). Also, on ALSA 0.9.x, you don't need to + allocate (pseudo-)DMA for PCI like ALSA 0.5.x. @@ -1461,7 +1461,7 @@ since irq 0 is valid. The port address and its resource pointer can be initialized as null by snd_magic_kcalloc() automatically, so you - don't have to take care of it. + don't have to take care of resetting them. @@ -2227,79 +2227,157 @@
-
- Operators - - OK, now let me explain the detail of each pcm callback - (ops). In general, every callback must - return 0 if successful, or a negative number with the error - number such as -EINVAL at any - error. - - - - The callback function takes at least the argument with - snd_pcm_substream_t pointer. For retrieving the - chip record from the given substream instance, you can use the - following macro. - - - - - - - - - - It's expanded with a magic-cast, so the cast-error is - automatically checked. You should define chip_t at - the beginning of the code, since this will be referred in many - places of pcm and control interfaces. - +
+ Runtime Pointer - The Chest of PCM Information + + When the PCM substream is opened, a PCM runtime instance is + allocated and assigned to the substream. This pointer is + accessible via substream->runtime. + This runtime pointer holds the various information; it holds + the copy of hw_params and sw_params configurations, the buffer + pointers, mmap records, spinlocks, etc. Almost everyhing you + need for controlling the PCM can be found there. + -
- open callback - + + The definition of runtime instance is found in + <sound/pcm.h>. Here is the + copy from the file. + - This is called when a pcm substream is opened. - + + For the operators (callbacks) of each sound driver, most of + these records are supposed to be read-only. Only the PCM + middle-layer changes / updates these info. The excpetions are + the hardware description (hw), interrupt callbacks + (transfer_ack_xxx), DMA buffer information, and the private + data. Besides, if you use the standard buffer allocation + method via snd_pcm_lib_malloc_pages(), + you don't need to set the DMA buffer information by yourself. + - - At least, here you have to initialize the runtime hardware - record. Typically, this is done by like this: + + In the sections below, important records are explained. + +
+ Hardware Description + + The hardware descriptor (snd_pcm_hardware_t) + contains the definitions of the fundamental hardware + configuration. Above all, you'll need to define this in + + the open callback. + Note that the runtime instance holds the copy of the + descriptor, not the pointer to the existing descriptor. That + is, in the open callback, you can modify the copied descriptor + (runtime->hw) as you need. For example, if the maximum + number of channels is 1 only on some chip models, you can + still use the same hardware descriptor and change the + channels_max later: runtime; - - runtime->hw = snd_mychip_playback_hw; - return 0; - } + ... + runtime->hw = snd_mychip_playback_hw; // common definition + if (chip->model == VERY_OLD_ONE) + runtime->hw.channels_max = 1; ]]> + - where snd_mychip_playback_hw is the - pre-defined hardware record. - + + Typically, you'll have a hardware descriptor like below: - The similar struct exists on ALSA 0.5.x driver, so you can - guess the values if you already wrote a driver. - - - + + The info field contains the type and capabilities of this pcm. The bit flags are defined in <sound/asound.h> as @@ -2366,6 +2441,17 @@ must handle the corresponding commands. + + When the PCM substreams can be synchronized (typically, + synchorinized start/stop of a playback and a capture streams), + you can give SNDRV_PCM_INFO_SYNC_START, + too. In this case, you'll need to check the linked-list of + PCM substreams in the trigger callback. This will be + described in the later section. + + + + formats field contains the bit-flags of supported formats (SNDRV_PCM_FMTBIT_XXX). @@ -2373,38 +2459,181 @@ bits. In the example above, the signed 16bit little-endian format is specified. + + rates field contains the bit-flags of supported rates (SNDRV_PCM_RATE_XXX). When the chip supports continuous rates, pass CONTINUOUS bit additionally. - The pre-defined rate bits are only for typical rates. If your - chip supports unconventional rates, you need to add - KNOT bit and set up the + The pre-defined rate bits are provided only for typical + rates. If your chip supports unconventional rates, you need to add + KNOT bit and set up the hardware constraint manually (explained later). + - - There have been many changes of terminology between - ALSA 0.5.x and 0.9.x. - On the ALSA 0.9.x world, period means what is - known as fragment in the OSS. It's the least - size of (a part of) the buffer to generate an interrupt. + + + rate_min and + rate_max define the minimal and + maximal sample rate. This should correspond somehow to + rates bits. + + + + + + channel_min and + channel_max + define, as you might already expected, the minimal and maximal + number of channels. + + + + + + buffer_bytes_max defines the + maximal buffer size in bytes. There is no + buffer_bytes_min field, since + it can be calculated from the minimal period size and the + minimal number of periods. + Meanwhile, period_bytes_min and + define the minimal and maximal size of the period in bytes. + periods_max and + periods_min define the maximal and + minimal number of periods in the buffer. - - Now, taking the new terminology into account, the other fields - are self-explanatory (I hope). Please note that here, both - min/max buffer and period sizes are specified in bytes. + + The period is a term, that corresponds to + fragment in the OSS world. The period defines the size at + which the PCM interrupt is generated. This size strongly + depends on the hardware. + Generally, the smaller period size will give you more + interrupts, that is, more controls. + In the case of capture, this size defines the input latency. + On the other hand, the whole buffer size defines the + output latency for the playback direction. + + + + + + There is also a field fifo_size. + This specifies the size of the hardware FIFO, but it's not + used currently in the driver nor in the alsa-lib. So, you + can ignore this field. + + + + +
+ +
+ PCM Configurations + + Ok, let's go back again to the PCM runtime records. + The most frequently referred records in the runtime instance are + the PCM configurations. + The PCM configurations are stored on runtime instance + after the application sends hw_params data via + alsa-lib. There are many fields copied from hw_params and + sw_params structs. For example, + format holds the format type + chosen by the application. This field contains the enum value + SNDRV_PCM_FORMAT_XXX. + + + + One thing to be noted is that the configured buffer and period + sizes are stored in frames in the runtime + In the ALSA world, 1 frame = channels * samples-size. + For conversion between frames and bytes, you can use the + helper functions, frames_to_bytes() and + bytes_to_frames(). + + +period_size); +]]> + + - - Some drivers allocate the private instance for each pcm - substream. It can be stored in - substream->runtime->private_data. - Since it's a void pointer, you - should use magic-kmalloc and magic-cast for such an object. + + Also, many software parameters (sw_params) are + stored in frames, too. Please check the type of the field. + snd_pcm_uframes_t is for the frames as unsigned + integer while snd_pcm_sframes_t is for the frames + as signed integer. + +
+ +
+ DMA Buffer Information + + The DMA buffer is defined by the following four fields, + dma_area, + dma_addr, + dma_bytes and + dma_private. + The dma_area holds the buffer + pointer (the logical address). You can call + memcpy from/to + this pointer. Meanwhile, dma_addr + holds the physical address of the buffer. This field is + specified only when the buffer is a linear buffer. + dma_bytes holds the size of buffer + in bytes. dma_private is used for + the ALSA DMA allocator. + + + + If you use a standard ALSA function, + snd_pcm_lib_malloc_pages(), for + allocating the buffer, these fields are set by the ALSA middle + layer, and you should not change them by + yourself. You can read them but not write them. + On the other hand, if you want to allocate the buffer by + yourself, you'll need to manage it in hw_params callback. + At least, dma_bytes is mandatory. + dma_area is necessary when the + buffer is mmapped. If your driver doesn't support mmap, this + field is not necessary. dma_addr + is also not mandatory. You can use + dma_private as you like, too. + +
+ +
+ Running Status + + The running status can be referred via runtime->status. + This is the pointer to snd_pcm_mmap_status_t + record. For example, you can get the current DMA hardware + pointer via runtime->status->hw_ptr. + + + + The DMA application pointer can be referred via + runtime->control, which points + snd_pcm_mmap_control_t record. + However, accessing directly to this value is not recommended. + +
+ +
+ Private Data + + You can allocate a record for the substream and store it in + runtime->private_data. Usually, this + done in + + the open callback. + Since it's a void pointer, you should use magic-kmalloc and + magic-cast for such an object. @@ -2423,8 +2652,110 @@ - The allocated object must be released in the close callback below. + The allocated object must be released in + + the close callback. +
+ +
+ Interrupt Callbacks + + The field transfer_ack_begin and + transfer_ack_end are called at + the beginning and the end of + snd_pcm_period_elapsed(), respectively. + +
+ +
+ +
+ Operators + + OK, now let me explain the detail of each pcm callback + (ops). In general, every callback must + return 0 if successful, or a negative number with the error + number such as -EINVAL at any + error. + + + + The callback function takes at least the argument with + snd_pcm_substream_t pointer. For retrieving the + chip record from the given substream instance, you can use the + following macro. + + + + + + + + + + It's expanded with a magic-cast, so the cast-error is + automatically checked. You should define chip_t at + the beginning of the code, since this will be referred in many + places of pcm and control interfaces. + + +
+ open callback + + + + + + + + This is called when a pcm substream is opened. + + + + At least, here you have to initialize the runtime->hw + record. Typically, this is done by like this: + + + +runtime; + + runtime->hw = snd_mychip_playback_hw; + return 0; + } +]]> + + + + where snd_mychip_playback_hw is the + pre-defined hardware description. + + + + You can allocate a private data in this callback, as described + in + Private Data section. + + + + If the hardware configuration needs more constraints, set the + hardware constraints here, too. + See + Constraints for more details. +
@@ -2622,23 +2953,6 @@ - Note that the period and the buffer sizes are stored in - frames. In the ALSA world, 1 frame = channels - * samples-size. For conversion between frames and bytes, you - can use the helper functions, - frames_to_bytes() and - bytes_to_frames(). - - - -period_size); -]]> - - - - - Be careful that this callback will be called many times at each set up, too. @@ -5115,6 +5429,217 @@ + + + + + + How To Put Your Driver Into ALSA Tree +
+ General + + So far, you've learned how to write the driver codes. + And you might have a question now: how to put my own + driver into the ALSA driver tree? + Here (finally :) the standard procedure is described briefly. + + + + Suppose that you'll create a new PCI driver for the card + xyz. The card module name would be + snd-xyz. The new driver is usually put into alsa-driver + tree. Then the driver is evaluated, audited and tested + by developers and users. After a certain time, the driver + will go to alsa-kernel tree and eventually integrated into + Linux 2.5 tree. + + + + In the following sections, the driver code is supposed + to be put into alsa-driver tree. The two cases are assumed: + a driver consisting of a single source file and one consisting + of several source files. + +
+ +
+ Driver with A Single Source File + + + + + Modify alsa-driver/pci/Makefile + + + + Suppose you have a file xyz.c. Add the following + two lines + + + + + + + + + + + Modify alsa-driver/acore/Makefile + + + + Here define the dependent modules. + + + + + + + If the driver supports PCM, snd-pcm.o, + snd-timer.o and snd-page-alloc.o + will be needed. + + + For rawmidi, snd-rawmidi.o is needed in addition. + The MIDI stuff is also related to the sequencer. + You'll need to modify alsa-driver/acore/seq/Makefile. + + + + For OPL3, snd-hwdep.o is needed, too. + It's involved with the sequencer, and as well as rawmidi, + you'll need to modify alsa-driver/acore/seq/Makefile + and acore/seq/instr/Makefile in addition. + Also, a new entry is necessary in + alsa-driver/drivers/opl3/Makefile. + + + + + + + Modify alsa-driver/utils/Modules.dep + + + + Add the module definition for configure, here. + The beginning of the line must be a vertical bar, following + the card module name (snd-xyz) and the list of its all + dependent modules. + + + + + + + + + + + + Run cvscompile script to re-generate the configure script and + build the whole stuff again. + + + + +
+ +
+ Drivers with Several Source Files + + Suppose that the driver snd-xyz have several source files. + They are located in the new subdirectory, + pci/xyz. + + + + + Add a new directory (xyz) to extra-subdir-y list in alsa-driver/pci/Makefile + + + + + + + + + + + + Under the directory xyz, create a Makefile + + + Sample Makefile for a driver xyz + + + + + + + + + + Modify alsa-driver/acore/Makefile + + + + This procedure is as same as in the last section. + + + + + + Modify alsa-driver/utils/Modules.dep + + + + + + + + + + + + + + Run cvscompile script to re-generate the configure script and + build the whole stuff again. + + + + +
+ +
diff -Nru a/Documentation/sysctl/kernel.txt b/Documentation/sysctl/kernel.txt --- a/Documentation/sysctl/kernel.txt Mon Feb 3 04:47:54 2003 +++ b/Documentation/sysctl/kernel.txt Wed Apr 9 01:01:38 2003 @@ -204,6 +204,18 @@ ============================================================== +panic_on_oops: + +Controls the kernel's behaviour when an oops or BUG is encountered. + +0: try to continue operation + +1: delay a few seconds (to give klogd time to record the oops output) and + then panic. If the `panic' sysctl is also non-zero then the machine will + be rebooted. + +============================================================== + pid_max: PID allocation wrap value. When the kenrel's next PID value diff -Nru a/Makefile b/Makefile --- a/Makefile Mon Apr 7 09:42:21 2003 +++ b/Makefile Tue Apr 15 04:32:01 2003 @@ -1,7 +1,7 @@ VERSION = 2 PATCHLEVEL = 5 SUBLEVEL = 67 -EXTRAVERSION = +EXTRAVERSION = -bk6 # *DOCUMENTATION* # To see a list of typical targets execute "make help" @@ -33,7 +33,9 @@ # then ARCH is assigned, getting whatever value it gets normally, and # SUBARCH is subsequently ignored. -SUBARCH := $(shell uname -m | sed -e s/i.86/i386/ -e s/sun4u/sparc64/ -e s/arm.*/arm/ -e s/sa110/arm/) +SUBARCH := $(shell uname -m | sed -e s/i.86/i386/ -e s/sun4u/sparc64/ \ + -e s/arm.*/arm/ -e s/sa110/arm/ \ + -e s/s390x/s390/ ) ARCH := $(SUBARCH) # Remove hyphens since they have special meaning in RPM filenames @@ -342,17 +344,9 @@ echo 'cmd_$@ := $(cmd_vmlinux__)' > $(@D)/.$(@F).cmd endef -ifdef CONFIG_SMP -# Final awk script makes sure per-cpu vars are in per-cpu section, as -# old gcc (eg egcs 2.92.11) ignores section attribute if uninitialized. - -check_per_cpu = $(AWK) -f $(srctree)/scripts/per-cpu-check.awk < System.map -endif - define rule_vmlinux $(rule_vmlinux__) $(NM) $@ | grep -v '\(compiled\)\|\(\.o$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' | sort > System.map - $(check_per_cpu) endef LDFLAGS_vmlinux += -T arch/$(ARCH)/vmlinux.lds.s diff -Nru a/arch/alpha/kernel/core_cia.c b/arch/alpha/kernel/core_cia.c --- a/arch/alpha/kernel/core_cia.c Sun Dec 8 03:50:30 2002 +++ b/arch/alpha/kernel/core_cia.c Thu Apr 3 14:49:57 2003 @@ -610,7 +610,7 @@ *(vip)CIA_IOC_CIA_CNFG = temp; } - /* Syncronize with all previous changes. */ + /* Synchronize with all previous changes. */ mb(); *(vip)CIA_IOC_CIA_REV; diff -Nru a/arch/alpha/kernel/pci.c b/arch/alpha/kernel/pci.c --- a/arch/alpha/kernel/pci.c Sun Mar 23 17:35:08 2003 +++ b/arch/alpha/kernel/pci.c Thu Apr 3 14:49:57 2003 @@ -230,7 +230,7 @@ void __init pcibios_fixup_bus(struct pci_bus *bus) { - /* Propogate hose info into the subordinate devices. */ + /* Propagate hose info into the subordinate devices. */ struct pci_controller *hose = bus->sysdata; struct list_head *ln; diff -Nru a/arch/alpha/kernel/pci_iommu.c b/arch/alpha/kernel/pci_iommu.c --- a/arch/alpha/kernel/pci_iommu.c Tue Feb 25 09:17:06 2003 +++ b/arch/alpha/kernel/pci_iommu.c Thu Apr 3 14:49:57 2003 @@ -431,7 +431,7 @@ /* Free and unmap a consistent DMA buffer. CPU_ADDR and DMA_ADDR must be values that were returned from pci_alloc_consistent. SIZE must be the same as what as passed into pci_alloc_consistent. - References to the memory and mappings assosciated with CPU_ADDR or + References to the memory and mappings associated with CPU_ADDR or DMA_ADDR past this call are illegal. */ void diff -Nru a/arch/alpha/kernel/semaphore.c b/arch/alpha/kernel/semaphore.c --- a/arch/alpha/kernel/semaphore.c Thu Apr 18 16:23:15 2002 +++ b/arch/alpha/kernel/semaphore.c Thu Apr 3 14:49:57 2003 @@ -122,7 +122,7 @@ long tmp, tmp2, tmp3; /* We must undo the sem->count down_interruptible decrement - simultaneously and atomicly with the sem->waking + simultaneously and atomically with the sem->waking adjustment, otherwise we can race with __up. This is accomplished by doing a 64-bit ll/sc on two 32-bit words. diff -Nru a/arch/alpha/kernel/setup.c b/arch/alpha/kernel/setup.c --- a/arch/alpha/kernel/setup.c Sun Jan 19 01:30:58 2003 +++ b/arch/alpha/kernel/setup.c Thu Apr 3 14:49:57 2003 @@ -486,7 +486,7 @@ notifier_chain_register(&panic_notifier_list, &alpha_panic_block); #ifdef CONFIG_ALPHA_GENERIC - /* Assume that we've booted from SRM if we havn't booted from MILO. + /* Assume that we've booted from SRM if we haven't booted from MILO. Detect the later by looking for "MILO" in the system serial nr. */ alpha_using_srm = strncmp((const char *)hwrpb->ssn, "MILO", 4) != 0; #endif @@ -569,7 +569,7 @@ #endif /* - * Indentify and reconfigure for the current system. + * Identify and reconfigure for the current system. */ cpu = (struct percpu_struct*)((char*)hwrpb + hwrpb->processor_offset); diff -Nru a/arch/alpha/kernel/time.c b/arch/alpha/kernel/time.c --- a/arch/alpha/kernel/time.c Mon Feb 24 23:13:09 2003 +++ b/arch/alpha/kernel/time.c Thu Apr 3 14:49:57 2003 @@ -331,7 +331,7 @@ /* From John Bowman : allow the values to settle, as the Update-In-Progress bit going low isn't good - enough on some hardware. 2ms is our guess; we havn't found + enough on some hardware. 2ms is our guess; we haven't found bogomips yet, but this is close on a 500Mhz box. */ __delay(1000000); diff -Nru a/arch/alpha/lib/strrchr.S b/arch/alpha/lib/strrchr.S --- a/arch/alpha/lib/strrchr.S Thu Aug 8 12:28:01 2002 +++ b/arch/alpha/lib/strrchr.S Thu Apr 3 14:49:57 2003 @@ -2,7 +2,7 @@ * arch/alpha/lib/strrchr.S * Contributed by Richard Henderson (rth@tamu.edu) * - * Return the address of the last occurrance of a given character + * Return the address of the last occurrence of a given character * within a null-terminated string, or null if it is not found. */ diff -Nru a/arch/alpha/math-emu/math.c b/arch/alpha/math-emu/math.c --- a/arch/alpha/math-emu/math.c Mon Nov 4 17:29:05 2002 +++ b/arch/alpha/math-emu/math.c Thu Apr 3 14:49:57 2003 @@ -294,7 +294,7 @@ * the appropriate signal to the translated program. * * In addition, properly track the exception state in software - * as described in the Alpha Architectre Handbook section 4.7.7.3. + * as described in the Alpha Architecture Handbook section 4.7.7.3. */ done: if (_fex) { diff -Nru a/arch/alpha/vmlinux.lds.S b/arch/alpha/vmlinux.lds.S --- a/arch/alpha/vmlinux.lds.S Fri Mar 7 00:58:06 2003 +++ b/arch/alpha/vmlinux.lds.S Wed Apr 2 00:42:56 2003 @@ -32,7 +32,11 @@ /* Will be freed after init */ . = ALIGN(8192); /* Init code and data */ __init_begin = .; - .init.text : { *(.init.text) } + .init.text : { + _sinittext = .; + *(.init.text) + _einittext = .; + } .init.data : { *(.init.data) } . = ALIGN(16); diff -Nru a/arch/arm/Kconfig b/arch/arm/Kconfig --- a/arch/arm/Kconfig Thu Mar 20 11:17:58 2003 +++ b/arch/arm/Kconfig Mon Mar 31 08:25:15 2003 @@ -175,7 +175,7 @@ source "arch/arm/mach-footbridge/Kconfig" -source "arch/arm/mach-iop310/Kconfig" +source "arch/arm/mach-iop3xx/Kconfig" source "arch/arm/mach-pxa/Kconfig" diff -Nru a/arch/arm/Makefile b/arch/arm/Makefile --- a/arch/arm/Makefile Fri Mar 7 13:28:49 2003 +++ b/arch/arm/Makefile Mon Mar 31 08:38:49 2003 @@ -105,7 +105,7 @@ machine-$(CONFIG_ARCH_CLPS711X) := clps711x textaddr-$(CONFIG_ARCH_FORTUNET) := 0xc0008000 machine-$(CONFIG_ARCH_ANAKIN) := anakin - machine-$(CONFIG_ARCH_IOP310) := iop310 + machine-$(CONFIG_ARCH_IOP310) := iop3xx machine-$(CONFIG_ARCH_ADIFCC) := adifcc MACHINE := $(machine-y) diff -Nru a/arch/arm/boot/Makefile b/arch/arm/boot/Makefile --- a/arch/arm/boot/Makefile Sun Mar 9 13:47:41 2003 +++ b/arch/arm/boot/Makefile Thu Mar 27 02:34:41 2003 @@ -13,9 +13,6 @@ # PARAMS_PHYS must be with 4MB of ZRELADDR # INITRD_PHYS must be in RAM - zreladdr-$(CONFIG_CPU_26) := 0x02080000 -params_phys-$(CONFIG_CPU_26) := 0x0207c000 -initrd_phys-$(CONFIG_CPU_26) := 0x02180000 zreladdr-$(CONFIG_ARCH_RPC) := 0x10008000 params_phys-$(CONFIG_ARCH_RPC) := 0x10000100 initrd_phys-$(CONFIG_ARCH_RPC) := 0x18000000 diff -Nru a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c --- a/arch/arm/common/sa1111.c Thu Mar 6 08:08:19 2003 +++ b/arch/arm/common/sa1111.c Fri Mar 21 15:39:32 2003 @@ -60,6 +60,7 @@ }, .skpcr_mask = SKPCR_UCLKEN, .devid = SA1111_DEVID_USB, + .dma_mask = 0xffffffffLL, .irq = { IRQ_USBPWR, IRQ_HCIM, @@ -494,6 +495,7 @@ sadev->dev.parent = sachip->dev; sadev->dev.bus = &sa1111_bus_type; + sadev->dev.dma_mask = &sadev->dma_mask; sadev->res.start = sachip->res.start + offset; sadev->res.end = sadev->res.start + 511; sadev->res.name = sadev->dev.name; diff -Nru a/arch/arm/def-configs/iq80310 b/arch/arm/def-configs/iq80310 --- a/arch/arm/def-configs/iq80310 Mon Oct 28 06:22:50 2002 +++ b/arch/arm/def-configs/iq80310 Tue Apr 1 04:27:18 2003 @@ -1,26 +1,31 @@ # -# Automatically generated by make menuconfig: don't edit +# Automatically generated make config: don't edit # CONFIG_ARM=y -# CONFIG_EISA is not set -# CONFIG_SBUS is not set -# CONFIG_MCA is not set +CONFIG_MMU=y CONFIG_UID16=y CONFIG_RWSEM_GENERIC_SPINLOCK=y -# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set -# CONFIG_GENERIC_BUST_SPINLOCK is not set -# CONFIG_GENERIC_ISA_DMA is not set # # Code maturity level options # CONFIG_EXPERIMENTAL=y -# CONFIG_OBSOLETE is not set + +# +# General setup +# +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +# CONFIG_BSD_PROCESS_ACCT is not set +CONFIG_SYSCTL=y +CONFIG_LOG_BUF_SHIFT=14 # # Loadable module support # CONFIG_MODULES=y +# CONFIG_MODULE_UNLOAD is not set +CONFIG_OBSOLETE_MODPARM=y # CONFIG_MODVERSIONS is not set CONFIG_KMOD=y @@ -33,6 +38,7 @@ # CONFIG_ARCH_CLPS7500 is not set # CONFIG_ARCH_CLPS711X is not set # CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_PXA is not set # CONFIG_ARCH_EBSA110 is not set # CONFIG_ARCH_CAMELOT is not set # CONFIG_ARCH_FOOTBRIDGE is not set @@ -46,112 +52,71 @@ # # Archimedes/A5000 Implementations # -# CONFIG_ARCH_ARC is not set -# CONFIG_ARCH_A5K is not set # -# Footbridge Implementations +# Archimedes/A5000 Implementations (select only ONE) # -# CONFIG_ARCH_CATS is not set -# CONFIG_ARCH_PERSONAL_SERVER is not set -# CONFIG_ARCH_EBSA285_ADDIN is not set -# CONFIG_ARCH_EBSA285_HOST is not set -# CONFIG_ARCH_NETWINDER is not set # -# SA11x0 Implementations +# CLPS711X/EP721X Implementations # -# CONFIG_SA1100_ASSABET is not set -# CONFIG_ASSABET_NEPONSET is not set -# CONFIG_SA1100_ADSBITSY is not set -# CONFIG_SA1100_BRUTUS is not set -# CONFIG_SA1100_CERF is not set -# CONFIG_SA1100_H3600 is not set -# CONFIG_SA1100_EXTENEX1 is not set -# CONFIG_SA1100_FLEXANET is not set -# CONFIG_SA1100_FREEBIRD is not set -# CONFIG_SA1100_GRAPHICSCLIENT is not set -# CONFIG_SA1100_GRAPHICSMASTER is not set -# CONFIG_SA1100_JORNADA720 is not set -# CONFIG_SA1100_HUW_WEBPANEL is not set -# CONFIG_SA1100_ITSY is not set -# CONFIG_SA1100_LART is not set -# CONFIG_SA1100_NANOENGINE is not set -# CONFIG_SA1100_OMNIMETER is not set -# CONFIG_SA1100_PANGOLIN is not set -# CONFIG_SA1100_PLEB is not set -# CONFIG_SA1100_SHANNON is not set -# CONFIG_SA1100_SHERMAN is not set -# CONFIG_SA1100_SIMPAD is not set -# CONFIG_SA1100_PFS168 is not set -# CONFIG_SA1100_VICTOR is not set -# CONFIG_SA1100_XP860 is not set -# CONFIG_SA1100_YOPY is not set -# CONFIG_SA1100_USB is not set -# CONFIG_SA1100_USB_NETLINK is not set -# CONFIG_SA1100_USB_CHAR is not set # -# CLPS711X/EP721X Implementations +# Epxa10db +# + +# +# Footbridge Implementations # -# CONFIG_ARCH_AUTCPU12 is not set -# CONFIG_ARCH_CDB89712 is not set -# CONFIG_ARCH_CLEP7312 is not set -# CONFIG_ARCH_EDB7211 is not set -# CONFIG_ARCH_P720T is not set -# CONFIG_ARCH_EP7211 is not set -# CONFIG_ARCH_EP7212 is not set # # IOP310 Implementation Options # CONFIG_ARCH_IQ80310=y + +# +# IOP310 Chipset Features +# # CONFIG_IOP310_AAU is not set # CONFIG_IOP310_DMA is not set # CONFIG_IOP310_MU is not set # CONFIG_IOP310_PMON is not set -# CONFIG_ARCH_ACORN is not set -# CONFIG_FOOTBRIDGE is not set -# CONFIG_FOOTBRIDGE_HOST is not set -# CONFIG_FOOTBRIDGE_ADDIN is not set + +# +# Intel PXA250/210 Implementations +# + +# +# SA11x0 Implementations +# + +# +# Processor Type +# CONFIG_CPU_32=y -# CONFIG_CPU_26 is not set -# CONFIG_CPU_32v3 is not set -# CONFIG_CPU_32v4 is not set -# CONFIG_CPU_ARM610 is not set -# CONFIG_CPU_ARM710 is not set -# CONFIG_CPU_ARM720T is not set -# CONFIG_CPU_ARM920T is not set -# CONFIG_CPU_ARM922T is not set -# CONFIG_CPU_ARM926T is not set -# CONFIG_CPU_ARM1020 is not set -# CONFIG_CPU_SA110 is not set -# CONFIG_CPU_SA1100 is not set -CONFIG_CPU_32v4=y CONFIG_CPU_XSCALE=y +CONFIG_CPU_32v5=y + +# +# Processor Features +# CONFIG_ARM_THUMB=y -# CONFIG_XSCALE_TOOLS is not set -# CONFIG_XSCALE_CACHE_WRITE_ALLOC is not set CONFIG_XSCALE_PMU=y -CONFIG_ARM_THUMB=y -# CONFIG_DISCONTIGMEM is not set # # General setup # -CONFIG_ZBOOT_ROM=y +CONFIG_PCI=y +# CONFIG_ZBOOT_ROM is not set CONFIG_ZBOOT_ROM_TEXT=0x00060000 CONFIG_ZBOOT_ROM_BSS=0xa1008000 -CONFIG_PCI=y -# CONFIG_ISA is not set -# CONFIG_ISA_DMA is not set +# CONFIG_PCI_LEGACY_PROC is not set CONFIG_PCI_NAMES=y # CONFIG_HOTPLUG is not set -# CONFIG_PCMCIA is not set -CONFIG_NET=y -CONFIG_SYSVIPC=y -# CONFIG_BSD_PROCESS_ACCT is not set -CONFIG_SYSCTL=y + +# +# At least one math emulation must be selected +# CONFIG_FPE_NWFPE=y # CONFIG_FPE_FASTFPE is not set CONFIG_KCORE_ELF=y @@ -160,6 +125,7 @@ CONFIG_BINFMT_ELF=y # CONFIG_BINFMT_MISC is not set # CONFIG_PM is not set +# CONFIG_PREEMPT is not set # CONFIG_ARTHUR is not set CONFIG_CMDLINE="console=ttyS0,115200 ip=bootp mem=32M root=/dev/nfs initrd=0xc0800000,4M" CONFIG_ALIGNMENT_TRAP=y @@ -175,9 +141,14 @@ CONFIG_MTD=y # CONFIG_MTD_DEBUG is not set CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_CONCAT is not set CONFIG_MTD_REDBOOT_PARTS=y -# CONFIG_MTD_BOOTLDR_PARTS is not set +# CONFIG_MTD_CMDLINE_PARTS is not set # CONFIG_MTD_AFS_PARTS is not set + +# +# User Modules And Translation Layers +# CONFIG_MTD_CHAR=y CONFIG_MTD_BLOCK=y # CONFIG_FTL is not set @@ -196,9 +167,6 @@ # CONFIG_MTD_ROM is not set # CONFIG_MTD_ABSENT is not set # CONFIG_MTD_OBSOLETE_CHIPS is not set -# CONFIG_MTD_AMDSTD is not set -# CONFIG_MTD_SHARP is not set -# CONFIG_MTD_JEDEC is not set # # Mapping drivers for chip access @@ -206,12 +174,10 @@ # CONFIG_MTD_PHYSMAP is not set # CONFIG_MTD_NORA is not set # CONFIG_MTD_ARM_INTEGRATOR is not set -# CONFIG_MTD_CDB89712 is not set -# CONFIG_MTD_SA1100 is not set -# CONFIG_MTD_DC21285 is not set CONFIG_MTD_IQ80310=y -# CONFIG_MTD_EPXA10DB is not set +# CONFIG_MTD_EDB7312 is not set # CONFIG_MTD_PCI is not set +# CONFIG_MTD_UCLINUX is not set # # Self-contained MTD device drivers @@ -220,10 +186,13 @@ # CONFIG_MTD_SLRAM is not set # CONFIG_MTD_MTDRAM is not set # CONFIG_MTD_BLKMTD is not set + +# +# Disk-On-Chip Device Drivers +# # CONFIG_MTD_DOC1000 is not set # CONFIG_MTD_DOC2000 is not set # CONFIG_MTD_DOC2001 is not set -# CONFIG_MTD_DOCPROBE is not set # # NAND Flash Device Drivers @@ -231,20 +200,18 @@ # CONFIG_MTD_NAND is not set # -# Plug and Play configuration +# Plug and Play support # # CONFIG_PNP is not set -# CONFIG_ISAPNP is not set # # Block devices # # CONFIG_BLK_DEV_FD is not set -# CONFIG_BLK_DEV_XD is not set -# CONFIG_PARIDE is not set # CONFIG_BLK_CPQ_DA is not set # CONFIG_BLK_CPQ_CISS_DA is not set # CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set # CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set CONFIG_BLK_DEV_RAM=y @@ -255,25 +222,22 @@ # Multi-device support (RAID and LVM) # # CONFIG_MD is not set -# CONFIG_BLK_DEV_MD is not set -# CONFIG_MD_LINEAR is not set -# CONFIG_MD_RAID0 is not set -# CONFIG_MD_RAID1 is not set -# CONFIG_MD_RAID5 is not set -# CONFIG_MD_MULTIPATH is not set -# CONFIG_BLK_DEV_LVM is not set + +# +# Networking support +# +CONFIG_NET=y # # Networking options # # CONFIG_PACKET is not set -CONFIG_NETLINK=y -CONFIG_RTNETLINK=y # CONFIG_NETLINK_DEV is not set CONFIG_NETFILTER=y # CONFIG_NETFILTER_DEBUG is not set # CONFIG_FILTER is not set CONFIG_UNIX=y +# CONFIG_NET_KEY is not set CONFIG_INET=y # CONFIG_IP_MULTICAST is not set # CONFIG_IP_ADVANCED_ROUTER is not set @@ -286,26 +250,33 @@ # CONFIG_ARPD is not set # CONFIG_INET_ECN is not set # CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_XFRM_USER is not set # -# IP: Netfilter Configuration +# IP: Netfilter Configuration # # CONFIG_IP_NF_CONNTRACK is not set # CONFIG_IP_NF_QUEUE is not set # CONFIG_IP_NF_IPTABLES is not set +# CONFIG_IP_NF_ARPTABLES is not set # CONFIG_IP_NF_COMPAT_IPCHAINS is not set # CONFIG_IP_NF_COMPAT_IPFWADM is not set # CONFIG_IPV6 is not set -# CONFIG_KHTTPD is not set + +# +# SCTP Configuration (EXPERIMENTAL) +# +CONFIG_IPV6_SCTP__=y +# CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set +# CONFIG_LLC is not set # CONFIG_DECNET is not set # CONFIG_BRIDGE is not set # CONFIG_X25 is not set # CONFIG_LAPB is not set -# CONFIG_LLC is not set # CONFIG_NET_DIVERT is not set # CONFIG_ECONET is not set # CONFIG_WAN_ROUTER is not set @@ -318,8 +289,9 @@ # CONFIG_NET_SCHED is not set # -# Network device support +# Network testing # +# CONFIG_NET_PKTGEN is not set CONFIG_NETDEVICES=y # @@ -336,62 +308,50 @@ # Ethernet (10 or 100Mbit) # CONFIG_NET_ETHERNET=y -# CONFIG_ARM_AM79C961A is not set -# CONFIG_SUNLANCE is not set +CONFIG_MII=y # CONFIG_HAPPYMEAL is not set -# CONFIG_SUNBMAC is not set -# CONFIG_SUNQE is not set -# CONFIG_SUNLANCE is not set # CONFIG_SUNGEM is not set # CONFIG_NET_VENDOR_3COM is not set -# CONFIG_LANCE is not set -# CONFIG_NET_VENDOR_SMC is not set -# CONFIG_NET_VENDOR_RACAL is not set + +# +# Tulip family network device support +# +# CONFIG_NET_TULIP is not set # CONFIG_HP100 is not set -# CONFIG_NET_ISA is not set CONFIG_NET_PCI=y # CONFIG_PCNET32 is not set +# CONFIG_AMD8111_ETH is not set # CONFIG_ADAPTEC_STARFIRE is not set -# CONFIG_APRICOT is not set -# CONFIG_CS89x0 is not set -# CONFIG_TULIP is not set -# CONFIG_DE4X5 is not set +# CONFIG_B44 is not set # CONFIG_DGRS is not set -# CONFIG_DM9102 is not set CONFIG_EEPRO100=y -# CONFIG_LNE390 is not set +# CONFIG_EEPRO100_PIO is not set +# CONFIG_E100 is not set # CONFIG_FEALNX is not set # CONFIG_NATSEMI is not set # CONFIG_NE2K_PCI is not set -# CONFIG_NE3210 is not set -# CONFIG_ES3210 is not set # CONFIG_8139CP is not set # CONFIG_8139TOO is not set -# CONFIG_8139TOO_PIO is not set -# CONFIG_8139TOO_TUNE_TWISTER is not set -# CONFIG_8139TOO_8129 is not set # CONFIG_SIS900 is not set # CONFIG_EPIC100 is not set # CONFIG_SUNDANCE is not set # CONFIG_TLAN is not set # CONFIG_VIA_RHINE is not set -# CONFIG_VIA_RHINE_MMIO is not set -# CONFIG_WINBOND_840 is not set -# CONFIG_NET_POCKET is not set # # Ethernet (1000 Mbit) # # CONFIG_ACENIC is not set # CONFIG_DL2K is not set -# CONFIG_MYRI_SBUS is not set +# CONFIG_E1000 is not set # CONFIG_NS83820 is not set # CONFIG_HAMACHI is not set # CONFIG_YELLOWFIN is not set +# CONFIG_R8169 is not set # CONFIG_SK98LIN is not set +# CONFIG_TIGON3 is not set # CONFIG_FDDI is not set # CONFIG_HIPPI is not set -# CONFIG_PLIP is not set # CONFIG_PPP is not set # CONFIG_SLIP is not set @@ -401,10 +361,8 @@ # CONFIG_NET_RADIO is not set # -# Token Ring devices +# Token Ring devices (depends on LLC=y) # -# CONFIG_TR is not set -# CONFIG_NET_FC is not set # CONFIG_RCPCI is not set # CONFIG_SHAPER is not set @@ -414,17 +372,17 @@ # CONFIG_WAN is not set # -# Amateur Radio support +# IrDA (infrared) support # -# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set # -# IrDA (infrared) support +# Amateur Radio support # -# CONFIG_IRDA is not set +# CONFIG_HAMRADIO is not set # -# ATA/IDE/MFM/RLL support +# ATA/ATAPI/MFM/RLL support # CONFIG_IDE=y @@ -432,54 +390,22 @@ # IDE, ATA and ATAPI Block devices # CONFIG_BLK_DEV_IDE=y -# CONFIG_BLK_DEV_HD_IDE is not set + +# +# Please see Documentation/ide.txt for help/info on IDE drives +# # CONFIG_BLK_DEV_HD is not set CONFIG_BLK_DEV_IDEDISK=y # CONFIG_IDEDISK_MULTI_MODE is not set -# CONFIG_BLK_DEV_IDECS is not set +# CONFIG_IDEDISK_STROKE is not set CONFIG_BLK_DEV_IDECD=y -# CONFIG_BLK_DEV_IDETAPE is not set # CONFIG_BLK_DEV_IDEFLOPPY is not set -# CONFIG_BLK_DEV_IDESCSI is not set -# CONFIG_BLK_DEV_CMD640 is not set -# CONFIG_BLK_DEV_CMD640_ENHANCED is not set -# CONFIG_BLK_DEV_ISAPNP is not set -# CONFIG_BLK_DEV_RZ1000 is not set -# CONFIG_IDEPCI_SHARE_IRQ is not set -CONFIG_BLK_DEV_IDEDMA_PCI=y -# CONFIG_BLK_DEV_OFFBOARD is not set -CONFIG_IDEDMA_PCI_AUTO=y -CONFIG_BLK_DEV_IDEDMA=y -# CONFIG_IDEDMA_NEW_DRIVE_LISTINGS is not set -# CONFIG_BLK_DEV_AEC62XX is not set -# CONFIG_AEC62XX_TUNING is not set -# CONFIG_BLK_DEV_ALI15X3 is not set -# CONFIG_WDC_ALI15X3 is not set -# CONFIG_BLK_DEV_AMD74XX is not set -# CONFIG_AMD74XX_OVERRIDE is not set -CONFIG_BLK_DEV_CMD64X=y -# CONFIG_BLK_DEV_CY82C693 is not set -# CONFIG_BLK_DEV_CS5530 is not set -# CONFIG_BLK_DEV_HPT34X is not set -# CONFIG_HPT34X_AUTODMA is not set -# CONFIG_BLK_DEV_HPT366 is not set -# CONFIG_BLK_DEV_NS87415 is not set -# CONFIG_BLK_DEV_OPTI621 is not set -# CONFIG_BLK_DEV_PDC202XX is not set -# CONFIG_PDC202XX_BURST is not set -# CONFIG_PDC202XX_FORCE is not set -# CONFIG_BLK_DEV_SVWKS is not set -# CONFIG_BLK_DEV_SIS5513 is not set -# CONFIG_BLK_DEV_TRM290 is not set -# CONFIG_BLK_DEV_VIA82CXXX is not set -# CONFIG_BLK_DEV_SL82C105 is not set -# CONFIG_IDE_CHIPSETS is not set -CONFIG_IDEDMA_AUTO=y -# CONFIG_IDEDMA_IVB is not set -CONFIG_BLK_DEV_IDE_MODES=y -# CONFIG_BLK_DEV_ATARAID is not set -# CONFIG_BLK_DEV_ATARAID_PDC is not set -# CONFIG_BLK_DEV_ATARAID_HPT is not set +# CONFIG_IDE_TASK_IOCTL is not set + +# +# IDE chipset support/bugfixes +# +# CONFIG_BLK_DEV_IDEPCI is not set # # SCSI support @@ -495,59 +421,50 @@ # I2O device support # # CONFIG_I2O is not set -# CONFIG_I2O_PCI is not set -# CONFIG_I2O_BLOCK is not set -# CONFIG_I2O_LAN is not set -# CONFIG_I2O_SCSI is not set -# CONFIG_I2O_PROC is not set # # ISDN subsystem # -# CONFIG_ISDN is not set +# CONFIG_ISDN_BOOL is not set # -# Input core support +# Input device support # # CONFIG_INPUT is not set -# CONFIG_INPUT_KEYBDEV is not set -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_EVDEV is not set + +# +# Userland interfaces +# + +# +# Input I/O drivers +# +# CONFIG_GAMEPORT is not set +CONFIG_SOUND_GAMEPORT=y +# CONFIG_SERIO is not set + +# +# Input Device Drivers +# # # Character devices # -# CONFIG_VT is not set -CONFIG_SERIAL=y -CONFIG_SERIAL_CONSOLE=y -# CONFIG_SERIAL_EXTENDED is not set # CONFIG_SERIAL_NONSTANDARD is not set # # Serial drivers # -# CONFIG_SERIAL_ANAKIN is not set -# CONFIG_SERIAL_ANAKIN_CONSOLE is not set -# CONFIG_SERIAL_AMBA is not set -# CONFIG_SERIAL_AMBA_CONSOLE is not set -# CONFIG_SERIAL_CLPS711X is not set -# CONFIG_SERIAL_CLPS711X_CONSOLE is not set -# CONFIG_SERIAL_21285 is not set -# CONFIG_SERIAL_21285_OLD is not set -# CONFIG_SERIAL_21285_CONSOLE is not set -# CONFIG_SERIAL_UART00 is not set -# CONFIG_SERIAL_UART00_CONSOLE is not set -# CONFIG_SERIAL_SA1100 is not set -# CONFIG_SERIAL_SA1100_CONSOLE is not set -# CONFIG_SERIAL_8250 is not set -# CONFIG_SERIAL_8250_CONSOLE is not set +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y # CONFIG_SERIAL_8250_EXTENDED is not set -# CONFIG_SERIAL_8250_MANY_PORTS is not set -# CONFIG_SERIAL_8250_SHARE_IRQ is not set -# CONFIG_SERIAL_8250_DETECT_IRQ is not set -# CONFIG_SERIAL_8250_MULTIPORT is not set -# CONFIG_SERIAL_8250_HUB6 is not set + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_DZ is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 @@ -557,36 +474,36 @@ # CONFIG_I2C is not set # +# I2C Hardware Sensors Mainboard support +# + +# +# I2C Hardware Sensors Chip support +# + +# # L3 serial bus support # # CONFIG_L3 is not set -# CONFIG_L3_ALGOBIT is not set -# CONFIG_L3_BIT_SA1100_GPIO is not set -# CONFIG_L3_SA1111 is not set -# CONFIG_BIT_SA1100_GPIO is not set # # Mice # # CONFIG_BUSMOUSE is not set -CONFIG_MOUSE=y -CONFIG_PSMOUSE=y -# CONFIG_82C710_MOUSE is not set -# CONFIG_PC110_PAD is not set +# CONFIG_QIC02_TAPE is not set # -# Joysticks +# IPMI # -# CONFIG_INPUT_GAMEPORT is not set -# CONFIG_QIC02_TAPE is not set +# CONFIG_IPMI_HANDLER is not set # # Watchdog Cards # # CONFIG_WATCHDOG is not set -# CONFIG_INTEL_RNG is not set # CONFIG_NVRAM is not set # CONFIG_RTC is not set +# CONFIG_GEN_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set @@ -597,88 +514,130 @@ # CONFIG_FTAPE is not set # CONFIG_AGP is not set # CONFIG_DRM is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_HANGCHECK_TIMER is not set # # Multimedia devices # -# CONFIG_VIDEO_DEV is not set +CONFIG_VIDEO_DEV=y + +# +# Video For Linux +# +# CONFIG_VIDEO_PROC_FS is not set + +# +# Video Adapters +# +# CONFIG_VIDEO_PMS is not set +# CONFIG_VIDEO_CPIA is not set +# CONFIG_VIDEO_STRADIS is not set + +# +# Radio Adapters +# +# CONFIG_RADIO_GEMTEK_PCI is not set +# CONFIG_RADIO_MAXIRADIO is not set +# CONFIG_RADIO_MAESTRO is not set + +# +# Digital Video Broadcasting Devices +# +CONFIG_DVB=y +CONFIG_DVB_CORE=y + +# +# Supported Frontend Modules +# +CONFIG_DVB_ALPS_BSRU6=y +# CONFIG_DVB_ALPS_BSRV2 is not set +# CONFIG_DVB_ALPS_TDLB7 is not set +# CONFIG_DVB_ALPS_TDMB7 is not set +# CONFIG_DVB_GRUNDIG_29504_491 is not set +# CONFIG_DVB_GRUNDIG_29504_401 is not set +# CONFIG_DVB_VES1820 is not set + +# +# Supported DVB Adapters +# +# CONFIG_DVB_AV7110 is not set # # File systems # +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT3_FS is not set +# CONFIG_JBD is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_XFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_ROMFS_FS is not set # CONFIG_QUOTA is not set # CONFIG_AUTOFS_FS is not set # CONFIG_AUTOFS4_FS is not set -# CONFIG_REISERFS_FS is not set -# CONFIG_REISERFS_CHECK is not set -# CONFIG_REISERFS_PROC_INFO is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +# CONFIG_FAT_FS is not set +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +# CONFIG_DEVFS_FS is not set +CONFIG_DEVPTS_FS=y +CONFIG_TMPFS=y +CONFIG_RAMFS=y + +# +# Miscellaneous filesystems +# # CONFIG_ADFS_FS is not set -# CONFIG_ADFS_FS_RW is not set # CONFIG_AFFS_FS is not set # CONFIG_HFS_FS is not set +# CONFIG_BEFS_FS is not set # CONFIG_BFS_FS is not set -# CONFIG_EXT3_FS is not set -# CONFIG_JBD is not set -# CONFIG_JBD_DEBUG is not set -# CONFIG_FAT_FS is not set -# CONFIG_MSDOS_FS is not set -# CONFIG_UMSDOS_FS is not set -# CONFIG_VFAT_FS is not set # CONFIG_EFS_FS is not set # CONFIG_JFFS_FS is not set CONFIG_JFFS2_FS=y CONFIG_JFFS2_FS_DEBUG=0 +# CONFIG_JFFS2_FS_NAND is not set # CONFIG_CRAMFS is not set -CONFIG_TMPFS=y -# CONFIG_RAMFS is not set -# CONFIG_ISO9660_FS is not set -# CONFIG_JOLIET is not set -# CONFIG_ZISOFS is not set -# CONFIG_MINIX_FS is not set # CONFIG_VXFS_FS is not set -# CONFIG_NTFS_FS is not set -# CONFIG_NTFS_DEBUG is not set -# CONFIG_NTFS_RW is not set # CONFIG_HPFS_FS is not set -CONFIG_PROC_FS=y -# CONFIG_DEVFS_FS is not set -# CONFIG_DEVFS_MOUNT is not set -# CONFIG_DEVFS_DEBUG is not set -CONFIG_DEVPTS_FS=y # CONFIG_QNX4FS_FS is not set -# CONFIG_QNX4FS_RW is not set -# CONFIG_ROMFS_FS is not set -CONFIG_EXT2_FS=y # CONFIG_SYSV_FS is not set -# CONFIG_UDF_FS is not set -# CONFIG_UDF_RW is not set # CONFIG_UFS_FS is not set -# CONFIG_UFS_FS_WRITE is not set # # Network File Systems # -# CONFIG_CODA_FS is not set -# CONFIG_INTERMEZZO_FS is not set CONFIG_NFS_FS=y # CONFIG_NFS_V3 is not set -CONFIG_ROOT_NFS=y +# CONFIG_NFS_V4 is not set # CONFIG_NFSD is not set -# CONFIG_NFSD_V3 is not set -CONFIG_SUNRPC=y +CONFIG_ROOT_NFS=y CONFIG_LOCKD=y +# CONFIG_EXPORTFS is not set # CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set # CONFIG_NCP_FS is not set -# CONFIG_NCPFS_PACKET_SIGNING is not set -# CONFIG_NCPFS_IOCTL_LOCKING is not set -# CONFIG_NCPFS_STRONG is not set -# CONFIG_NCPFS_NFS_NS is not set -# CONFIG_NCPFS_OS2_NS is not set -# CONFIG_NCPFS_SMALLDOS is not set -# CONFIG_NCPFS_NLS is not set -# CONFIG_NCPFS_EXTRAS is not set -# CONFIG_ZISOFS_FS is not set -# CONFIG_ZLIB_FS_INFLATE is not set +# CONFIG_CODA_FS is not set +# CONFIG_INTERMEZZO_FS is not set +CONFIG_SUNRPC=y +# CONFIG_SUNRPC_GSS is not set +# CONFIG_AFS_FS is not set # # Partition Types @@ -698,8 +657,19 @@ # CONFIG_SGI_PARTITION is not set # CONFIG_ULTRIX_PARTITION is not set # CONFIG_SUN_PARTITION is not set -# CONFIG_SMB_NLS is not set -# CONFIG_NLS is not set +# CONFIG_EFI_PARTITION is not set + +# +# Graphics support +# +# CONFIG_FB is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +# CONFIG_MDA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y # # Sound @@ -707,76 +677,23 @@ # CONFIG_SOUND is not set # +# Misc devices +# + +# # Multimedia Capabilities Port drivers # # CONFIG_MCP is not set -# CONFIG_MCP_SA1100 is not set -# CONFIG_MCP_UCB1200 is not set -# CONFIG_MCP_UCB1200_AUDIO is not set -# CONFIG_MCP_UCB1200_TS is not set + +# +# Console Switches +# +# CONFIG_SWITCHES is not set # # USB support # # CONFIG_USB is not set -# CONFIG_USB_UHCI is not set -# CONFIG_USB_UHCI_ALT is not set -# CONFIG_USB_OHCI is not set -# CONFIG_USB_OHCI_SA1111 is not set -# CONFIG_USB_AUDIO is not set -# CONFIG_USB_BLUETOOTH is not set -# CONFIG_USB_STORAGE is not set -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_DPCM is not set -# CONFIG_USB_STORAGE_HP8200e is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_ACM is not set -# CONFIG_USB_PRINTER is not set -# CONFIG_USB_DC2XX is not set -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_SCANNER is not set -# CONFIG_USB_MICROTEK is not set -# CONFIG_USB_HPUSBSCSI is not set -# CONFIG_USB_PEGASUS is not set -# CONFIG_USB_KAWETH is not set -# CONFIG_USB_CATC is not set -# CONFIG_USB_CDCETHER is not set -# CONFIG_USB_USBNET is not set -# CONFIG_USB_USS720 is not set - -# -# USB Serial Converter support -# -# CONFIG_USB_SERIAL is not set -# CONFIG_USB_SERIAL_GENERIC is not set -# CONFIG_USB_SERIAL_BELKIN is not set -# CONFIG_USB_SERIAL_WHITEHEAT is not set -# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set -# CONFIG_USB_SERIAL_EMPEG is not set -# CONFIG_USB_SERIAL_FTDI_SIO is not set -# CONFIG_USB_SERIAL_VISOR is not set -# CONFIG_USB_SERIAL_IR is not set -# CONFIG_USB_SERIAL_EDGEPORT is not set -# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set -# CONFIG_USB_SERIAL_KEYSPAN is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set -# CONFIG_USB_SERIAL_MCT_U232 is not set -# CONFIG_USB_SERIAL_PL2303 is not set -# CONFIG_USB_SERIAL_CYBERJACK is not set -# CONFIG_USB_SERIAL_XIRCOM is not set -# CONFIG_USB_SERIAL_OMNINET is not set -# CONFIG_USB_RIO500 is not set # # Bluetooth support @@ -789,7 +706,6 @@ CONFIG_FRAME_POINTER=y CONFIG_DEBUG_USER=y # CONFIG_DEBUG_INFO is not set -# CONFIG_NO_PGT_CACHE is not set CONFIG_DEBUG_KERNEL=y # CONFIG_DEBUG_SLAB is not set # CONFIG_MAGIC_SYSRQ is not set @@ -797,6 +713,22 @@ # CONFIG_DEBUG_WAITQ is not set CONFIG_DEBUG_BUGVERBOSE=y CONFIG_DEBUG_ERRORS=y +CONFIG_KALLSYMS=y CONFIG_DEBUG_LL=y -# CONFIG_DEBUG_DC21285_PORT is not set -# CONFIG_DEBUG_CLPS711X_UART2 is not set + +# +# Security options +# +# CONFIG_SECURITY is not set + +# +# Cryptographic options +# +# CONFIG_CRYPTO is not set + +# +# Library routines +# +# CONFIG_CRC32 is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y diff -Nru a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile --- a/arch/arm/kernel/Makefile Sun Mar 9 14:15:54 2003 +++ b/arch/arm/kernel/Makefile Tue Mar 4 16:49:31 2003 @@ -27,10 +27,8 @@ obj-y += io.o endif -ifeq ($(CONFIG_CPU_32),y) head-y := head.o obj-$(CONFIG_DEBUG_LL) += debug.o -endif extra-y := $(head-y) init_task.o diff -Nru a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c --- a/arch/arm/kernel/armksyms.c Tue Mar 25 17:10:26 2003 +++ b/arch/arm/kernel/armksyms.c Tue Mar 4 16:41:55 2003 @@ -95,11 +95,6 @@ EXPORT_SYMBOL_ALIAS(fp_printk,printk); EXPORT_SYMBOL_ALIAS(fp_send_sig,send_sig); -#ifdef CONFIG_CPU_26 -EXPORT_SYMBOL(fpundefinstr); -EXPORT_SYMBOL(ret_from_exception); -#endif - #ifdef CONFIG_VT EXPORT_SYMBOL(kd_mksound); #endif @@ -111,10 +106,8 @@ EXPORT_SYMBOL(dump_thread); EXPORT_SYMBOL(dump_fpu); EXPORT_SYMBOL(udelay); -#ifdef CONFIG_CPU_32 EXPORT_SYMBOL(__ioremap); EXPORT_SYMBOL(__iounmap); -#endif EXPORT_SYMBOL(kernel_thread); EXPORT_SYMBOL(system_rev); EXPORT_SYMBOL(system_serial_low); @@ -196,7 +189,6 @@ EXPORT_SYMBOL_NOVERS(__memzero); /* user mem (segment) */ -#if defined(CONFIG_CPU_32) EXPORT_SYMBOL(__arch_copy_from_user); EXPORT_SYMBOL(__arch_copy_to_user); EXPORT_SYMBOL(__arch_clear_user); @@ -206,11 +198,6 @@ EXPORT_SYMBOL(consistent_alloc); EXPORT_SYMBOL(consistent_free); EXPORT_SYMBOL(consistent_sync); - -#elif defined(CONFIG_CPU_26) -EXPORT_SYMBOL(uaccess_kernel); -EXPORT_SYMBOL(uaccess_user); -#endif EXPORT_SYMBOL_NOVERS(__get_user_1); EXPORT_SYMBOL_NOVERS(__get_user_2); diff -Nru a/arch/arm/kernel/asm-offsets.c b/arch/arm/kernel/asm-offsets.c --- a/arch/arm/kernel/asm-offsets.c Sat Jun 15 17:49:51 2002 +++ b/arch/arm/kernel/asm-offsets.c Tue Mar 4 17:00:35 2003 @@ -21,10 +21,7 @@ /* * Make sure that the compiler and target are compatible. */ -#if defined(__APCS_32__) && defined(CONFIG_CPU_26) -#error Sorry, your compiler targets APCS-32 but this kernel requires APCS-26 -#endif -#if defined(__APCS_26__) && defined(CONFIG_CPU_32) +#if defined(__APCS_26__) #error Sorry, your compiler targets APCS-26 but this kernel requires APCS-32 #endif #if __GNUC__ < 2 || (__GNUC__ == 2 && __GNUC_MINOR__ < 95) @@ -52,7 +49,6 @@ BLANK(); DEFINE(VM_EXEC, VM_EXEC); BLANK(); -#ifdef CONFIG_CPU_32 DEFINE(HPTE_TYPE_SMALL, PTE_TYPE_SMALL); DEFINE(HPTE_AP_READ, PTE_AP_READ); DEFINE(HPTE_AP_WRITE, PTE_AP_WRITE); @@ -65,15 +61,7 @@ DEFINE(LPTE_WRITE, L_PTE_WRITE); DEFINE(LPTE_EXEC, L_PTE_EXEC); DEFINE(LPTE_DIRTY, L_PTE_DIRTY); -#endif BLANK(); -#ifdef CONFIG_CPU_26 - DEFINE(PAGE_PRESENT, _PAGE_PRESENT); - DEFINE(PAGE_READONLY, _PAGE_READONLY); - DEFINE(PAGE_NOT_USER, _PAGE_NOT_USER); - DEFINE(PAGE_OLD, _PAGE_OLD); - DEFINE(PAGE_CLEAN, _PAGE_CLEAN); -#endif BLANK(); DEFINE(PAGE_SZ, PAGE_SIZE); BLANK(); diff -Nru a/arch/arm/kernel/ecard.c b/arch/arm/kernel/ecard.c --- a/arch/arm/kernel/ecard.c Tue Mar 18 13:52:45 2003 +++ b/arch/arm/kernel/ecard.c Tue Mar 4 16:51:21 2003 @@ -220,7 +220,6 @@ } } -#ifdef CONFIG_CPU_32 #include static pid_t ecard_pid; @@ -341,13 +340,6 @@ */ wait_for_completion(&ecard_completion); } -#else -/* - * On 26-bit processors, we don't need the kcardd thread to access the - * expansion card loaders. We do it directly. - */ -#define ecard_call(req) ecard_do_request(req) -#endif /* ======================= Mid-level card control ===================== */ @@ -1026,9 +1018,7 @@ { int slot, irqhw; -#ifdef CONFIG_CPU_32 init_waitqueue_head(&ecard_wait); -#endif printk("Probing expansion cards\n"); diff -Nru a/arch/arm/kernel/entry-header.S b/arch/arm/kernel/entry-header.S --- a/arch/arm/kernel/entry-header.S Mon Oct 28 06:22:52 2002 +++ b/arch/arm/kernel/entry-header.S Tue Mar 4 16:47:50 2003 @@ -41,14 +41,8 @@ @ Stack format (ensured by USER_* and SVC_*) @ #define S_FRAME_SIZE 72 -#ifdef CONFIG_CPU_32 #define S_OLD_R0 68 #define S_PSR 64 -#else -#define S_OLD_R0 64 -#define S_PSR 60 -#define S_PC 60 -#endif #define S_PC 60 #define S_LR 56 @@ -68,8 +62,6 @@ #define S_R0 0 #define S_OFF 8 -#ifdef CONFIG_CPU_32 - .macro set_cpsr_c, reg, mode #if 1 /* broken binutils */ @@ -159,58 +151,6 @@ mcr p15, 0, \rtemp, c1, c0 #endif .endm - -#else - .macro save_user_regs - str r0, [sp, #-4]! - str lr, [sp, #-4]! - sub sp, sp, #15*4 - stmia sp, {r0 - lr}^ - mov r0, r0 - .endm - - .macro restore_user_regs - ldmia sp, {r0 - lr}^ - mov r0, r0 - ldr lr, [sp, #15*4] - add sp, sp, #15*4+8 - movs pc, lr - .endm - - .macro fast_restore_user_regs - add sp, sp, #S_OFF - ldmib sp, {r1 - lr}^ - mov r0, r0 - ldr lr, [sp, #15*4] - add sp, sp, #15*4+8 - movs pc, lr - .endm - - .macro mask_pc, rd, rm - bic \rd, \rm, #PCMASK - .endm - - .macro enable_irqs, temp - teqp pc, #0x00000003 - .endm - - .macro initialise_traps_extra - .endm - - .macro get_thread_info, rd - mov \rd, sp, lsr #13 - mov \rd, \rd, lsl #13 - .endm - - /* - * Like adr, but force SVC mode (if required) - */ - .macro adrsvc, cond, reg, label - adr\cond \reg, \label - orr\cond \reg, \reg, #0x08000003 - .endm - -#endif /* diff -Nru a/arch/arm/kernel/fiq.c b/arch/arm/kernel/fiq.c --- a/arch/arm/kernel/fiq.c Wed Oct 30 04:29:18 2002 +++ b/arch/arm/kernel/fiq.c Tue Mar 4 16:45:37 2003 @@ -54,7 +54,6 @@ static unsigned long no_fiq_insn; -#ifdef CONFIG_CPU_32 static inline void unprotect_page_0(void) { modify_domain(DOMAIN_USER, DOMAIN_MANAGER); @@ -64,12 +63,6 @@ { modify_domain(DOMAIN_USER, DOMAIN_CLIENT); } -#else - -#define unprotect_page_0() -#define protect_page_0() - -#endif /* Default reacquire function * - we always relinquish FIQ control @@ -120,17 +113,6 @@ { register unsigned long tmp, tmp2; __asm__ volatile ( -#ifdef CONFIG_CPU_26 - "mov %0, pc - bic %1, %0, #0x3 - orr %1, %1, %3 - teqp %1, #0 @ select FIQ mode - mov r0, r0 - ldmia %2, {r8 - r14} - teqp %0, #0 @ return to SVC mode - mov r0, r0" -#endif -#ifdef CONFIG_CPU_32 "mrs %0, cpsr mov %1, %3 msr cpsr_c, %1 @ select FIQ mode @@ -138,7 +120,6 @@ ldmia %2, {r8 - r14} msr cpsr_c, %0 @ return to SVC mode mov r0, r0" -#endif : "=&r" (tmp), "=&r" (tmp2) : "r" (®s->ARM_r8), "I" (PSR_I_BIT | PSR_F_BIT | FIQ_MODE) /* These registers aren't modified by the above code in a way @@ -152,17 +133,6 @@ { register unsigned long tmp, tmp2; __asm__ volatile ( -#ifdef CONFIG_CPU_26 - "mov %0, pc - bic %1, %0, #0x3 - orr %1, %1, %3 - teqp %1, #0 @ select FIQ mode - mov r0, r0 - stmia %2, {r8 - r14} - teqp %0, #0 @ return to SVC mode - mov r0, r0" -#endif -#ifdef CONFIG_CPU_32 "mrs %0, cpsr mov %1, %3 msr cpsr_c, %1 @ select FIQ mode @@ -170,7 +140,6 @@ stmia %2, {r8 - r14} msr cpsr_c, %0 @ return to SVC mode mov r0, r0" -#endif : "=&r" (tmp), "=&r" (tmp2) : "r" (®s->ARM_r8), "I" (PSR_I_BIT | PSR_F_BIT | FIQ_MODE) /* These registers aren't modified by the above code in a way diff -Nru a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S --- a/arch/arm/kernel/head.S Wed Feb 26 01:50:39 2003 +++ b/arch/arm/kernel/head.S Tue Apr 8 01:29:38 2003 @@ -205,18 +205,6 @@ add r3, r3, #1 << 20 str r3, [r0], #4 @ KERNEL + 3MB - /* - * Ensure that the first section of RAM is present. - * we assume that: - * 1. the RAM is aligned to a 32MB boundary - * 2. the kernel is executing in the same 32MB chunk - * as the start of RAM. - */ - bic r0, r0, #0x01f00000 >> 18 @ round down - and r2, r5, #0xfe000000 @ round down - add r3, r8, r2 @ flags + rambase - str r3, [r0] - bic r8, r8, #0x0c @ turn off cacheable @ and bufferable bits #ifdef CONFIG_DEBUG_LL diff -Nru a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c --- a/arch/arm/kernel/process.c Thu Jan 16 06:49:18 2003 +++ b/arch/arm/kernel/process.c Tue Mar 4 16:50:09 2003 @@ -188,7 +188,6 @@ processor_modes[processor_mode(regs)], thumb_mode(regs) ? " (T)" : "", get_fs() == get_ds() ? "kernel" : "user"); -#if defined(CONFIG_CPU_32) { unsigned int ctrl, transbase, dac; __asm__ ( @@ -199,7 +198,6 @@ printk("Control: %04X Table: %08X DAC: %08X\n", ctrl, transbase, dac); } -#endif } void show_fpregs(struct user_fp *regs) @@ -237,18 +235,9 @@ static unsigned long *thread_info_head; static unsigned int nr_thread_info; -#ifdef CONFIG_CPU_32 #define EXTRA_TASK_STRUCT 4 #define ll_alloc_task_struct() ((struct thread_info *) __get_free_pages(GFP_KERNEL,1)) #define ll_free_task_struct(p) free_pages((unsigned long)(p),1) -#else -extern unsigned long get_page_8k(int priority); -extern void free_page_8k(unsigned long page); - -#define EXTRA_TASK_STRUCT 0 -#define ll_alloc_task_struct() ((struct task_struct *)get_page_8k(GFP_KERNEL)) -#define ll_free_task_struct(p) free_page_8k((unsigned long)(p)) -#endif struct thread_info *alloc_thread_info(void) { diff -Nru a/arch/arm/kernel/semaphore.c b/arch/arm/kernel/semaphore.c --- a/arch/arm/kernel/semaphore.c Wed May 22 16:30:03 2002 +++ b/arch/arm/kernel/semaphore.c Tue Mar 4 16:42:54 2003 @@ -177,44 +177,6 @@ * registers (r0 to r3 and lr), but not ip, as we use it as a return * value in some cases.. */ -#ifdef CONFIG_CPU_26 -asm(" .align 5 \n\ - .globl __down_failed \n\ -__down_failed: \n\ - stmfd sp!, {r0 - r3, lr} \n\ - mov r0, ip \n\ - bl __down \n\ - ldmfd sp!, {r0 - r3, pc}^ \n\ - \n\ - .align 5 \n\ - .globl __down_interruptible_failed \n\ -__down_interruptible_failed: \n\ - stmfd sp!, {r0 - r3, lr} \n\ - mov r0, ip \n\ - bl __down_interruptible \n\ - mov ip, r0 \n\ - ldmfd sp!, {r0 - r3, pc}^ \n\ - \n\ - .align 5 \n\ - .globl __down_trylock_failed \n\ -__down_trylock_failed: \n\ - stmfd sp!, {r0 - r3, lr} \n\ - mov r0, ip \n\ - bl __down_trylock \n\ - mov ip, r0 \n\ - ldmfd sp!, {r0 - r3, pc}^ \n\ - \n\ - .align 5 \n\ - .globl __up_wakeup \n\ -__up_wakeup: \n\ - stmfd sp!, {r0 - r3, lr} \n\ - mov r0, ip \n\ - bl __up \n\ - ldmfd sp!, {r0 - r3, pc}^ \n\ - "); - -#else -/* 32 bit version */ asm(" .align 5 \n\ .globl __down_failed \n\ __down_failed: \n\ @@ -250,4 +212,3 @@ ldmfd sp!, {r0 - r3, pc} \n\ "); -#endif diff -Nru a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c --- a/arch/arm/kernel/setup.c Sat Jan 25 09:11:04 2003 +++ b/arch/arm/kernel/setup.c Tue Mar 4 16:48:44 2003 @@ -113,7 +113,6 @@ #define lp1 io_res[1] #define lp2 io_res[2] -#ifdef CONFIG_CPU_32 static const char *cache_types[16] = { "write-through", "write-back", @@ -231,10 +230,6 @@ } } -#else -#define dump_cpu_info() do { } while (0) -#endif - int cpu_architecture(void) { int cpu_arch; @@ -768,7 +763,6 @@ } seq_printf(m, "CPU revision\t: %d\n", processor_id & 15); -#ifdef CONFIG_CPU_32 { unsigned int cache_info; @@ -791,7 +785,6 @@ } } } -#endif seq_puts(m, "\n"); diff -Nru a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c --- a/arch/arm/kernel/signal.c Mon Feb 17 13:23:03 2003 +++ b/arch/arm/kernel/signal.c Tue Mar 4 16:46:44 2003 @@ -174,9 +174,7 @@ __get_user_error(regs->ARM_sp, &sc->arm_sp, err); __get_user_error(regs->ARM_lr, &sc->arm_lr, err); __get_user_error(regs->ARM_pc, &sc->arm_pc, err); -#ifdef CONFIG_CPU_32 __get_user_error(regs->ARM_cpsr, &sc->arm_cpsr, err); -#endif err |= !valid_user_regs(regs); @@ -292,9 +290,7 @@ __put_user_error(regs->ARM_sp, &sc->arm_sp, err); __put_user_error(regs->ARM_lr, &sc->arm_lr, err); __put_user_error(regs->ARM_pc, &sc->arm_pc, err); -#ifdef CONFIG_CPU_32 __put_user_error(regs->ARM_cpsr, &sc->arm_cpsr, err); -#endif __put_user_error(current->thread.trap_no, &sc->trap_no, err); __put_user_error(current->thread.error_code, &sc->error_code, err); @@ -328,7 +324,6 @@ unsigned long handler = (unsigned long)ka->sa.sa_handler; unsigned long retcode; int thumb = 0; -#ifdef CONFIG_CPU_32 unsigned long cpsr = regs->ARM_cpsr & ~PSR_f; /* @@ -351,7 +346,6 @@ cpsr &= ~PSR_T_BIT; } #endif -#endif if (ka->sa.sa_flags & SA_RESTORER) { retcode = (unsigned long)ka->sa.sa_restorer; @@ -378,10 +372,7 @@ regs->ARM_sp = (unsigned long)frame; regs->ARM_lr = retcode; regs->ARM_pc = handler; - -#ifdef CONFIG_CPU_32 regs->ARM_cpsr = cpsr; -#endif return 0; } diff -Nru a/arch/arm/kernel/sys_arm.c b/arch/arm/kernel/sys_arm.c --- a/arch/arm/kernel/sys_arm.c Fri Nov 22 03:52:49 2002 +++ b/arch/arm/kernel/sys_arm.c Fri Apr 11 12:07:00 2003 @@ -229,7 +229,7 @@ return sys_shmctl (first, second, (struct shmid_ds *) ptr); default: - return -EINVAL; + return -ENOSYS; } } diff -Nru a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c --- a/arch/arm/kernel/traps.c Sat Mar 22 17:29:51 2003 +++ b/arch/arm/kernel/traps.c Tue Mar 4 16:44:21 2003 @@ -271,31 +271,6 @@ die_if_kernel("Oops - undefined instruction", regs, 0); } -#ifdef CONFIG_CPU_26 -asmlinkage void do_excpt(unsigned long address, struct pt_regs *regs, int mode) -{ - siginfo_t info; - -#ifdef CONFIG_DEBUG_USER - printk(KERN_INFO "%s (%d): address exception: pc=%08lx\n", - current->comm, current->pid, instruction_pointer(regs)); - dump_instr(regs); -#endif - - current->thread.error_code = 0; - current->thread.trap_no = 11; - - info.si_signo = SIGBUS; - info.si_errno = 0; - info.si_code = BUS_ADRERR; - info.si_addr = (void *)address; - - force_sig_info(SIGBUS, &info, current); - - die_if_kernel("Oops - address exception", regs, mode); -} -#endif - asmlinkage void do_unexp_fiq (struct pt_regs *regs) { #ifndef CONFIG_IGNORE_FIQ @@ -405,7 +380,6 @@ ptrace_break(current, regs); return regs->ARM_r0; -#ifdef CONFIG_CPU_32 /* * Flush a region from virtual address 'r0' to virtual address 'r1' * _inclusive_. There is no alignment requirement on either address; @@ -435,14 +409,6 @@ break; regs->ARM_cpsr |= MODE32_BIT; return regs->ARM_r0; -#else - case NR(cacheflush): - return 0; - - case NR(usr26): - case NR(usr32): - break; -#endif default: /* Calls 9f00xx..9f07ff are defined to return -ENOSYS @@ -563,7 +529,5 @@ if (base != 0) printk(KERN_DEBUG "Relocating machine vectors to 0x%08lx\n", base); -#ifdef CONFIG_CPU_32 modify_domain(DOMAIN_USER, DOMAIN_CLIENT); -#endif } diff -Nru a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile --- a/arch/arm/lib/Makefile Tue Mar 25 17:10:27 2003 +++ b/arch/arm/lib/Makefile Thu Mar 27 01:53:04 2003 @@ -39,8 +39,6 @@ obj-$(v4) += io-readsw-armv4.o io-writesw-armv4.o io-readsl-armv4.o obj-y += io-writesl.o -obj-$(CONFIG_CPU_26) += uaccess-armo.o - $(obj)/csumpartialcopy.o: $(obj)/csumpartialcopygeneric.S $(obj)/csumpartialcopyuser.o: $(obj)/csumpartialcopygeneric.S diff -Nru a/arch/arm/lib/backtrace.S b/arch/arm/lib/backtrace.S --- a/arch/arm/lib/backtrace.S Fri Feb 14 16:19:24 2003 +++ b/arch/arm/lib/backtrace.S Thu Mar 27 01:47:59 2003 @@ -6,6 +6,9 @@ * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. + * + * 27/03/03 Ian Molton Clean up CONFIG_CPU + * */ #include #include @@ -31,13 +34,9 @@ #else stmfd sp!, {r4 - r8, lr} @ Save an extra register so we have a location... -#ifdef CONFIG_CPU_32 tst r1, #0x10 @ 26 or 32-bit? moveq mask, #0xfc000003 movne mask, #0 -#else - mov mask, #0xfc000003 -#endif tst mask, r0 movne r0, #0 movs frame, r0 diff -Nru a/arch/arm/lib/copy_page.S b/arch/arm/lib/copy_page.S --- a/arch/arm/lib/copy_page.S Mon Feb 4 23:38:16 2002 +++ b/arch/arm/lib/copy_page.S Tue Mar 4 09:04:40 2003 @@ -13,6 +13,12 @@ #include #include +#ifndef PLD +#define COPY_COUNT PAGE_SZ/64 +#else +#define COPY_COUNT PAGE_SZ/64-1 +#endif + .text .align 5 /* @@ -23,9 +29,13 @@ */ ENTRY(copy_page) stmfd sp!, {r4, lr} @ 2 - mov r2, #PAGE_SZ/64 @ 1 + PLD( pld [r1, #0] ) + PLD( pld [r1, #32] ) + mov r2, #COPY_COUNT @ 1 ldmia r1!, {r3, r4, ip, lr} @ 4+1 -1: stmia r0!, {r3, r4, ip, lr} @ 4 +1: PLD( pld [r1, #64] ) + PLD( pld [r1, #96] ) +2: stmia r0!, {r3, r4, ip, lr} @ 4 ldmia r1!, {r3, r4, ip, lr} @ 4+1 stmia r0!, {r3, r4, ip, lr} @ 4 ldmia r1!, {r3, r4, ip, lr} @ 4+1 @@ -33,6 +43,8 @@ ldmia r1!, {r3, r4, ip, lr} @ 4 subs r2, r2, #1 @ 1 stmia r0!, {r3, r4, ip, lr} @ 4 - ldmneia r1!, {r3, r4, ip, lr} @ 4 - bne 1b @ 1 + ldmgtia r1!, {r3, r4, ip, lr} @ 4 + bgt 1b @ 1 + PLD( ldmeqia r1!, {r3, r4, ip, lr} ) + PLD( beq 2b ) LOADREGS(fd, sp!, {r4, pc}) @ 3 diff -Nru a/arch/arm/lib/csumpartialcopyuser.S b/arch/arm/lib/csumpartialcopyuser.S --- a/arch/arm/lib/csumpartialcopyuser.S Mon Feb 4 23:40:21 2002 +++ b/arch/arm/lib/csumpartialcopyuser.S Thu Mar 27 01:52:09 2003 @@ -6,8 +6,10 @@ * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. + * + * 27/03/03 Ian Molton Clean up CONFIG_CPU + * */ -#include #include #include #include @@ -15,8 +17,6 @@ .text -#if defined(CONFIG_CPU_32) - .macro save_regs stmfd sp!, {r1 - r2, r4 - r8, fp, ip, lr, pc} .endm @@ -72,82 +72,6 @@ .previous .endm -#elif defined(CONFIG_CPU_26) - - .macro save_regs - stmfd sp!, {r1 - r2, r4 - r9, fp, ip, lr, pc} - mov r9, sp, lsr #13 - mov r9, r9, lsl #13 - ldr r9, [r9, #TSK_ADDR_LIMIT] - mov r9, r9, lsr #24 - .endm - - .macro load_regs,flags - ldm\flags fp, {r1, r2, r4-r9, fp, sp, pc}^ - .endm - - .macro load1b, reg1 - tst r9, #0x01 -9999: ldreqbt \reg1, [r0], #1 - ldrneb \reg1, [r0], #1 - .section __ex_table, "a" - .align 3 - .long 9999b, 6001f - .previous - .endm - - .macro load2b, reg1, reg2 - tst r9, #0x01 -9999: ldreqbt \reg1, [r0], #1 - ldrneb \reg1, [r0], #1 -9998: ldreqbt \reg2, [r0], #1 - ldrneb \reg2, [r0], #1 - .section __ex_table, "a" - .long 9999b, 6001f - .long 9998b, 6001f - .previous - .endm - - .macro load1l, reg1 - tst r9, #0x01 -9999: ldreqt \reg1, [r0], #4 - ldrne \reg1, [r0], #4 - .section __ex_table, "a" - .align 3 - .long 9999b, 6001f - .previous - .endm - - .macro load2l, reg1, reg2 - tst r9, #0x01 - ldmneia r0!, {\reg1, \reg2} -9999: ldreqt \reg1, [r0], #4 -9998: ldreqt \reg2, [r0], #4 - .section __ex_table, "a" - .long 9999b, 6001f - .long 9998b, 6001f - .previous - .endm - - .macro load4l, reg1, reg2, reg3, reg4 - tst r9, #0x01 - ldmneia r0!, {\reg1, \reg2, \reg3, \reg4} -9999: ldreqt \reg1, [r0], #4 -9998: ldreqt \reg2, [r0], #4 -9997: ldreqt \reg3, [r0], #4 -9996: ldreqt \reg4, [r0], #4 - .section __ex_table, "a" - .long 9999b, 6001f - .long 9998b, 6001f - .long 9997b, 6001f - .long 9996b, 6001f - .previous - .endm - -#else -#error Unknown CPU architecture -#endif - /* * unsigned int * csum_partial_copy_from_user(const char *src, char *dst, int len, int sum, int *err_ptr) @@ -165,9 +89,7 @@ * so properly, we would have to add in whatever registers were loaded before * the fault, which, with the current asm above is not predictable. */ -#if defined(CONFIG_CPU_32) .section .fixup,"ax" -#endif .align 4 6001: mov r4, #-EFAULT ldr r5, [fp, #4] @ *err_ptr @@ -179,6 +101,4 @@ strneb r0, [r1], #1 bne 6002b load_regs ea -#if defined(CONFIG_CPU_32) .previous -#endif diff -Nru a/arch/arm/lib/ecard.S b/arch/arm/lib/ecard.S --- a/arch/arm/lib/ecard.S Mon Feb 25 09:22:34 2002 +++ b/arch/arm/lib/ecard.S Thu Mar 27 01:50:37 2003 @@ -6,19 +6,17 @@ * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. + * + * 27/03/03 Ian Molton Clean up CONFIG_CPU + * */ -#include /* for CONFIG_CPU_nn */ #include #include #include -#ifdef CONFIG_CPU_26 -#define CPSR2SPSR(rt) -#else #define CPSR2SPSR(rt) \ mrs rt, cpsr; \ msr spsr, rt -#endif @ Purpose: call an expansion card loader to read bytes. @ Proto : char read_loader(int offset, char *card_base, char *loader); diff -Nru a/arch/arm/lib/io-acorn.S b/arch/arm/lib/io-acorn.S --- a/arch/arm/lib/io-acorn.S Sat Apr 27 16:19:54 2002 +++ b/arch/arm/lib/io-acorn.S Thu Mar 27 01:48:20 2003 @@ -6,8 +6,10 @@ * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. + * + * 27/03/03 Ian Molton Clean up CONFIG_CPU + * */ -#include /* for CONFIG_CPU_nn */ #include #include #include @@ -53,21 +55,3 @@ adr r0, .iosl_warning mov r1, lr b printk - -@ Purpose: write a memc register -@ Proto : void memc_write(int register, int value); -@ Returns: nothing - -#ifdef CONFIG_CPU_26 -ENTRY(memc_write) - cmp r0, #7 - RETINSTR(movgt,pc,lr) - mov r0, r0, lsl #17 - mov r1, r1, lsl #15 - mov r1, r1, lsr #17 - orr r0, r0, r1, lsl #2 - add r0, r0, #0x03600000 - strb r0, [r0] - RETINSTR(mov,pc,lr) -#endif - diff -Nru a/arch/arm/lib/lib1funcs.S b/arch/arm/lib/lib1funcs.S --- a/arch/arm/lib/lib1funcs.S Tue Feb 5 12:23:51 2002 +++ b/arch/arm/lib/lib1funcs.S Thu Mar 27 01:49:39 2003 @@ -33,23 +33,19 @@ This exception does not however invalidate any other reasons why the executable file might be covered by the GNU General Public License. */ -/* This code is derived from gcc 2.95.3 */ -/* I Molton 29/07/01 */ +/* This code is derived from gcc 2.95.3 + * 29/07/01 Adapted for linux + * 27/03/03 Ian Molton Clean up CONFIG_CPU + */ #include #include #include #include -#ifdef CONFIG_CPU_26 -#define RET movs -#define RETc(x) mov##x##s -#define RETCOND ^ -#else #define RET mov #define RETc(x) mov##x #define RETCOND -#endif dividend .req r0 divisor .req r1 diff -Nru a/arch/arm/lib/memcpy.S b/arch/arm/lib/memcpy.S --- a/arch/arm/lib/memcpy.S Tue Feb 5 07:23:16 2002 +++ b/arch/arm/lib/memcpy.S Sat Jan 18 04:15:19 2003 @@ -27,15 +27,15 @@ /* * Prototype: void memcpy(void *to,const void *from,unsigned long n); - * ARM3: cant use memcopy here!!! */ ENTRY(memcpy) ENTRY(memmove) ENTER cmp r1, r0 - bcc 19f + bcc 23f subs r2, r2, #4 blt 6f + PLD( pld [r1, #0] ) ands ip, r0, #3 bne 7f ands ip, r1, #3 @@ -43,29 +43,42 @@ 1: subs r2, r2, #8 blt 5f - subs r2, r2, #0x14 - blt 3f -2: ldmia r1!,{r3 - r9, ip} - stmia r0!,{r3 - r9, ip} + subs r2, r2, #20 + blt 4f + PLD( pld [r1, #28] ) + PLD( subs r2, r2, #64 ) + PLD( blt 3f ) +2: PLD( pld [r1, #60] ) + PLD( pld [r1, #92] ) + ldmia r1!, {r3 - r9, ip} subs r2, r2, #32 + stmgeia r0!, {r3 - r9, ip} + ldmgeia r1!, {r3 - r9, ip} + subges r2, r2, #32 + stmia r0!, {r3 - r9, ip} bge 2b - cmn r2, #16 +3: PLD( ldmia r1!, {r3 - r9, ip} ) + PLD( adds r2, r2, #32 ) + PLD( stmgeia r0!, {r3 - r9, ip} ) + PLD( ldmgeia r1!, {r3 - r9, ip} ) + PLD( subges r2, r2, #32 ) + PLD( stmia r0!, {r3 - r9, ip} ) +4: cmn r2, #16 ldmgeia r1!, {r3 - r6} + subge r2, r2, #16 stmgeia r0!, {r3 - r6} - subge r2, r2, #0x10 -3: adds r2, r2, #0x14 -4: ldmgeia r1!, {r3 - r5} + adds r2, r2, #20 + ldmgeia r1!, {r3 - r5} + subge r2, r2, #12 stmgeia r0!, {r3 - r5} - subges r2, r2, #12 - bge 4b 5: adds r2, r2, #8 blt 6f subs r2, r2, #4 ldrlt r3, [r1], #4 ldmgeia r1!, {r4, r5} + subge r2, r2, #4 strlt r3, [r0], #4 stmgeia r0!, {r4, r5} - subge r2, r2, #4 6: adds r2, r2, #4 EXITEQ @@ -94,13 +107,19 @@ 8: bic r1, r1, #3 ldr r7, [r1], #4 cmp ip, #2 - bgt 15f - beq 11f + bgt 18f + beq 13f cmp r2, #12 - blt 10f + blt 11f + PLD( pld [r1, #12] ) sub r2, r2, #12 -9: mov r3, r7, pull #8 + PLD( subs r2, r2, #32 ) + PLD( blt 10f ) + PLD( pld [r1, #28] ) +9: PLD( pld [r1, #44] ) +10: mov r3, r7, pull #8 ldmia r1!, {r4 - r7} + subs r2, r2, #16 orr r3, r3, r4, push #24 mov r4, r4, pull #8 orr r4, r4, r5, push #24 @@ -109,24 +128,32 @@ mov r6, r6, pull #8 orr r6, r6, r7, push #24 stmia r0!, {r3 - r6} - subs r2, r2, #16 bge 9b + PLD( cmn r2, #32 ) + PLD( bge 10b ) + PLD( add r2, r2, #32 ) adds r2, r2, #12 - blt 100f -10: mov r3, r7, pull #8 + blt 12f +11: mov r3, r7, pull #8 ldr r7, [r1], #4 subs r2, r2, #4 orr r3, r3, r7, push #24 str r3, [r0], #4 - bge 10b -100: sub r1, r1, #3 + bge 11b +12: sub r1, r1, #3 b 6b -11: cmp r2, #12 - blt 13f /* */ +13: cmp r2, #12 + blt 16f + PLD( pld [r1, #12] ) sub r2, r2, #12 -12: mov r3, r7, pull #16 + PLD( subs r2, r2, #32 ) + PLD( blt 15f ) + PLD( pld [r1, #28] ) +14: PLD( pld [r1, #44] ) +15: mov r3, r7, pull #16 ldmia r1!, {r4 - r7} + subs r2, r2, #16 orr r3, r3, r4, push #16 mov r4, r4, pull #16 orr r4, r4, r5, push #16 @@ -135,24 +162,32 @@ mov r6, r6, pull #16 orr r6, r6, r7, push #16 stmia r0!, {r3 - r6} - subs r2, r2, #16 - bge 12b + bge 14b + PLD( cmn r2, #32 ) + PLD( bge 15b ) + PLD( add r2, r2, #32 ) adds r2, r2, #12 - blt 14f -13: mov r3, r7, pull #16 + blt 17f +16: mov r3, r7, pull #16 ldr r7, [r1], #4 subs r2, r2, #4 orr r3, r3, r7, push #16 str r3, [r0], #4 - bge 13b -14: sub r1, r1, #2 + bge 16b +17: sub r1, r1, #2 b 6b -15: cmp r2, #12 - blt 17f +18: cmp r2, #12 + blt 21f + PLD( pld [r1, #12] ) sub r2, r2, #12 -16: mov r3, r7, pull #24 + PLD( subs r2, r2, #32 ) + PLD( blt 20f ) + PLD( pld [r1, #28] ) +19: PLD( pld [r1, #44] ) +20: mov r3, r7, pull #24 ldmia r1!, {r4 - r7} + subs r2, r2, #16 orr r3, r3, r4, push #8 mov r4, r4, pull #24 orr r4, r4, r5, push #8 @@ -161,55 +196,72 @@ mov r6, r6, pull #24 orr r6, r6, r7, push #8 stmia r0!, {r3 - r6} - subs r2, r2, #16 - bge 16b + bge 19b + PLD( cmn r2, #32 ) + PLD( bge 20b ) + PLD( add r2, r2, #32 ) adds r2, r2, #12 - blt 18f -17: mov r3, r7, pull #24 + blt 22f +21: mov r3, r7, pull #24 ldr r7, [r1], #4 subs r2, r2, #4 orr r3, r3, r7, push #8 str r3, [r0], #4 - bge 17b -18: sub r1, r1, #1 + bge 21b +22: sub r1, r1, #1 b 6b -19: add r1, r1, r2 +23: add r1, r1, r2 add r0, r0, r2 subs r2, r2, #4 - blt 24f + blt 29f + PLD( pld [r1, #-4] ) ands ip, r0, #3 - bne 25f + bne 30f ands ip, r1, #3 - bne 26f + bne 31f -20: subs r2, r2, #8 - blt 23f - subs r2, r2, #0x14 - blt 22f -21: ldmdb r1!, {r3 - r9, ip} - stmdb r0!, {r3 - r9, ip} +24: subs r2, r2, #8 + blt 28f + subs r2, r2, #20 + blt 27f + PLD( pld [r1, #-32] ) + PLD( subs r2, r2, #64 ) + PLD( blt 26f ) +25: PLD( pld [r1, #-64] ) + PLD( pld [r1, #-96] ) + ldmdb r1!, {r3 - r9, ip} subs r2, r2, #32 - bge 21b -22: cmn r2, #16 + stmgedb r0!, {r3 - r9, ip} + ldmgedb r1!, {r3 - r9, ip} + subges r2, r2, #32 + stmdb r0!, {r3 - r9, ip} + bge 25b +26: PLD( ldmdb r1!, {r3 - r9, ip} ) + PLD( adds r2, r2, #32 ) + PLD( stmgedb r0!, {r3 - r9, ip} ) + PLD( ldmgedb r1!, {r3 - r9, ip} ) + PLD( subges r2, r2, #32 ) + PLD( stmdb r0!, {r3 - r9, ip} ) +27: cmn r2, #16 ldmgedb r1!, {r3 - r6} - stmgedb r0!, {r3 - r6} subge r2, r2, #16 + stmgedb r0!, {r3 - r6} adds r2, r2, #20 ldmgedb r1!, {r3 - r5} - stmgedb r0!, {r3 - r5} subge r2, r2, #12 -23: adds r2, r2, #8 - blt 24f + stmgedb r0!, {r3 - r5} +28: adds r2, r2, #8 + blt 29f subs r2, r2, #4 ldrlt r3, [r1, #-4]! ldmgedb r1!, {r4, r5} + subge r2, r2, #4 strlt r3, [r0, #-4]! stmgedb r0!, {r4, r5} - subge r2, r2, #4 -24: adds r2, r2, #4 +29: adds r2, r2, #4 EXITEQ cmp r2, #2 ldrb r3, [r1, #-1]! @@ -220,7 +272,7 @@ strgtb r5, [r0, #-1]! EXIT -25: cmp ip, #2 +30: cmp ip, #2 ldrb r3, [r1, #-1]! ldrgeb r4, [r1, #-1]! ldrgtb r5, [r1, #-1]! @@ -228,20 +280,26 @@ strgeb r4, [r0, #-1]! strgtb r5, [r0, #-1]! subs r2, r2, ip - blt 24b + blt 29b ands ip, r1, #3 - beq 20b + beq 24b -26: bic r1, r1, #3 +31: bic r1, r1, #3 ldr r3, [r1], #0 cmp ip, #2 - blt 34f - beq 30f + blt 41f + beq 36f cmp r2, #12 - blt 28f + blt 34f + PLD( pld [r1, #-16] ) sub r2, r2, #12 -27: mov r7, r3, push #8 + PLD( subs r2, r2, #32 ) + PLD( blt 33f ) + PLD( pld [r1, #-32] ) +32: PLD( pld [r1, #-48] ) +33: mov r7, r3, push #8 ldmdb r1!, {r3, r4, r5, r6} + subs r2, r2, #16 orr r7, r7, r6, pull #24 mov r6, r6, push #8 orr r6, r6, r5, pull #24 @@ -250,24 +308,32 @@ mov r4, r4, push #8 orr r4, r4, r3, pull #24 stmdb r0!, {r4, r5, r6, r7} - subs r2, r2, #16 - bge 27b + bge 32b + PLD( cmn r2, #32 ) + PLD( bge 33b ) + PLD( add r2, r2, #32 ) adds r2, r2, #12 - blt 29f -28: mov ip, r3, push #8 + blt 35f +34: mov ip, r3, push #8 ldr r3, [r1, #-4]! subs r2, r2, #4 orr ip, ip, r3, pull #24 str ip, [r0, #-4]! - bge 28b -29: add r1, r1, #3 - b 24b - -30: cmp r2, #12 - blt 32f + bge 34b +35: add r1, r1, #3 + b 29b + +36: cmp r2, #12 + blt 39f + PLD( pld [r1, #-16] ) sub r2, r2, #12 -31: mov r7, r3, push #16 + PLD( subs r2, r2, #32 ) + PLD( blt 38f ) + PLD( pld [r1, #-32] ) +37: PLD( pld [r1, #-48] ) +38: mov r7, r3, push #16 ldmdb r1!, {r3, r4, r5, r6} + subs r2, r2, #16 orr r7, r7, r6, pull #16 mov r6, r6, push #16 orr r6, r6, r5, pull #16 @@ -276,24 +342,32 @@ mov r4, r4, push #16 orr r4, r4, r3, pull #16 stmdb r0!, {r4, r5, r6, r7} - subs r2, r2, #16 - bge 31b + bge 37b + PLD( cmn r2, #32 ) + PLD( bge 38b ) + PLD( add r2, r2, #32 ) adds r2, r2, #12 - blt 33f -32: mov ip, r3, push #16 + blt 40f +39: mov ip, r3, push #16 ldr r3, [r1, #-4]! subs r2, r2, #4 orr ip, ip, r3, pull #16 str ip, [r0, #-4]! - bge 32b -33: add r1, r1, #2 - b 24b - -34: cmp r2, #12 - blt 36f + bge 39b +40: add r1, r1, #2 + b 29b + +41: cmp r2, #12 + blt 44f + PLD( pld [r1, #-16] ) sub r2, r2, #12 -35: mov r7, r3, push #24 + PLD( subs r2, r2, #32 ) + PLD( blt 43f ) + PLD( pld [r1, #-32] ) +42: PLD( pld [r1, #-48] ) +43: mov r7, r3, push #24 ldmdb r1!, {r3, r4, r5, r6} + subs r2, r2, #16 orr r7, r7, r6, pull #8 mov r6, r6, push #24 orr r6, r6, r5, pull #8 @@ -302,17 +376,18 @@ mov r4, r4, push #24 orr r4, r4, r3, pull #8 stmdb r0!, {r4, r5, r6, r7} - subs r2, r2, #16 - bge 35b + bge 42b + PLD( cmn r2, #32 ) + PLD( bge 43b ) + PLD( add r2, r2, #32 ) adds r2, r2, #12 - blt 37f -36: mov ip, r3, push #24 + blt 45f +44: mov ip, r3, push #24 ldr r3, [r1, #-4]! subs r2, r2, #4 orr ip, ip, r3, pull #8 str ip, [r0, #-4]! - bge 36b -37: add r1, r1, #1 - b 24b + bge 44b +45: add r1, r1, #1 + b 29b - .align diff -Nru a/arch/arm/lib/uaccess-armo.S b/arch/arm/lib/uaccess-armo.S --- a/arch/arm/lib/uaccess-armo.S Sat Apr 27 16:19:54 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,231 +0,0 @@ -/* - * linux/arch/arm/lib/uaccess-armo.S - * - * Copyright (C) 1998 Russell King - * - * Note! Some code fragments found in here have a special calling - * convention - they are not APCS compliant! - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#include -#include - - .text - - .globl uaccess_user -uaccess_user: - .word uaccess_user_put_byte - .word uaccess_user_get_byte - .word uaccess_user_put_half - .word uaccess_user_get_half - .word uaccess_user_put_word - .word uaccess_user_get_word - .word __arch_copy_from_user - .word __arch_copy_to_user - .word __arch_clear_user - .word __arch_strncpy_from_user - .word __arch_strnlen_user - - -@ In : r0 = x, r1 = addr, r2 = error -@ Out: r2 = error -uaccess_user_put_byte: - stmfd sp!, {lr} -USER( strbt r0, [r1]) - ldmfd sp!, {pc}^ - -@ In : r0 = x, r1 = addr, r2 = error -@ Out: r2 = error -uaccess_user_put_half: - stmfd sp!, {lr} -USER( strbt r0, [r1], #1) - mov r0, r0, lsr #8 -USER( strbt r0, [r1]) - ldmfd sp!, {pc}^ - -@ In : r0 = x, r1 = addr, r2 = error -@ Out: r2 = error -uaccess_user_put_word: - stmfd sp!, {lr} -USER( strt r0, [r1]) - ldmfd sp!, {pc}^ - -9001: mov r2, #-EFAULT - ldmfd sp!, {pc}^ - -@ In : r0 = addr, r1 = error -@ Out: r0 = x, r1 = error -uaccess_user_get_byte: - stmfd sp!, {lr} -USER( ldrbt r0, [r0]) - ldmfd sp!, {pc}^ - -@ In : r0 = addr, r1 = error -@ Out: r0 = x, r1 = error -uaccess_user_get_half: - stmfd sp!, {lr} -USER( ldrt r0, [r0]) - mov r0, r0, lsl #16 - mov r0, r0, lsr #16 - ldmfd sp!, {pc}^ - -@ In : r0 = addr, r1 = error -@ Out: r0 = x, r1 = error -uaccess_user_get_word: - stmfd sp!, {lr} -USER( ldrt r0, [r0]) - ldmfd sp!, {pc}^ - -9001: mov r1, #-EFAULT - ldmfd sp!, {pc}^ - - - - .globl uaccess_kernel -uaccess_kernel: - .word uaccess_kernel_put_byte - .word uaccess_kernel_get_byte - .word uaccess_kernel_put_half - .word uaccess_kernel_get_half - .word uaccess_kernel_put_word - .word uaccess_kernel_get_word - .word uaccess_kernel_copy - .word uaccess_kernel_copy - .word uaccess_kernel_clear - .word uaccess_kernel_strncpy_from - .word uaccess_kernel_strnlen - -@ In : r0 = x, r1 = addr, r2 = error -@ Out: r2 = error -uaccess_kernel_put_byte: - stmfd sp!, {lr} - strb r0, [r1] - ldmfd sp!, {pc}^ - -@ In : r0 = x, r1 = addr, r2 = error -@ Out: r2 = error -uaccess_kernel_put_half: - stmfd sp!, {lr} - strb r0, [r1] - mov r0, r0, lsr #8 - strb r0, [r1, #1] - ldmfd sp!, {pc}^ - -@ In : r0 = x, r1 = addr, r2 = error -@ Out: r2 = error -uaccess_kernel_put_word: - stmfd sp!, {lr} - str r0, [r1] - ldmfd sp!, {pc}^ - -@ In : r0 = addr, r1 = error -@ Out: r0 = x, r1 = error -uaccess_kernel_get_byte: - stmfd sp!, {lr} - ldrb r0, [r0] - ldmfd sp!, {pc}^ - -@ In : r0 = addr, r1 = error -@ Out: r0 = x, r1 = error -uaccess_kernel_get_half: - stmfd sp!, {lr} - ldr r0, [r0] - mov r0, r0, lsl #16 - mov r0, r0, lsr #16 - ldmfd sp!, {pc}^ - -@ In : r0 = addr, r1 = error -@ Out: r0 = x, r1 = error -uaccess_kernel_get_word: - stmfd sp!, {lr} - ldr r0, [r0] - ldmfd sp!, {pc}^ - - -/* Prototype: int uaccess_kernel_copy(void *to, const char *from, size_t n) - * Purpose : copy a block to kernel memory from kernel memory - * Params : to - kernel memory - * : from - kernel memory - * : n - number of bytes to copy - * Returns : Number of bytes NOT copied. - */ -uaccess_kernel_copy: - stmfd sp!, {lr} - bl memcpy - mov r0, #0 - ldmfd sp!, {pc}^ - -/* Prototype: int uaccess_kernel_clear(void *addr, size_t sz) - * Purpose : clear some kernel memory - * Params : addr - kernel memory address to clear - * : sz - number of bytes to clear - * Returns : number of bytes NOT cleared - */ -uaccess_kernel_clear: - stmfd sp!, {lr} - mov r2, #0 - cmp r1, #4 - blt 2f - ands ip, r0, #3 - beq 1f - cmp ip, #1 - strb r2, [r0], #1 - strleb r2, [r0], #1 - strltb r2, [r0], #1 - rsb ip, ip, #4 - sub r1, r1, ip @ 7 6 5 4 3 2 1 -1: subs r1, r1, #8 @ -1 -2 -3 -4 -5 -6 -7 - bmi 2f - str r2, [r0], #4 - str r2, [r0], #4 - b 1b -2: adds r1, r1, #4 @ 3 2 1 0 -1 -2 -3 - strpl r2, [r0], #4 - tst r1, #2 @ 1x 1x 0x 0x 1x 1x 0x - strneb r2, [r0], #1 - strneb r2, [r0], #1 - tst r1, #1 @ x1 x0 x1 x0 x1 x0 x1 - strneb r2, [r0], #1 - mov r0, #0 - ldmfd sp!, {pc}^ - -/* Prototype: size_t uaccess_kernel_strncpy_from(char *dst, char *src, size_t len) - * Purpose : copy a string from kernel memory to kernel memory - * Params : dst - kernel memory destination - * : src - kernel memory source - * : len - maximum length of string - * Returns : number of characters copied - */ -uaccess_kernel_strncpy_from: - stmfd sp!, {lr} - mov ip, r2 -1: subs r2, r2, #1 - bmi 2f - ldrb r3, [r1], #1 - strb r3, [r0], #1 - teq r3, #0 - bne 1b -2: subs r0, ip, r2 - ldmfd sp!, {pc}^ - -/* Prototype: int uaccess_kernel_strlen(char *str, long n) - * Purpose : get length of a string in kernel memory - * Params : str - address of string in kernel memory - * Returns : length of string *including terminator*, - * or zero on exception, or n + 1 if too long - */ -uaccess_kernel_strnlen: - stmfd sp!, {lr} - mov r2, r0 -1: ldrb r1, [r0], #1 - teq r1, #0 - beq 2f - subs r1, r1, #1 - bne 1b - add r0, r0, #1 -2: sub r0, r0, r2 - ldmfd sp!, {pc}^ - diff -Nru a/arch/arm/lib/uaccess.S b/arch/arm/lib/uaccess.S --- a/arch/arm/lib/uaccess.S Sat Apr 27 16:19:54 2002 +++ b/arch/arm/lib/uaccess.S Mon Mar 10 06:48:41 2003 @@ -43,6 +43,8 @@ stmfd sp!, {r2, r4 - r7, lr} cmp r2, #4 blt .c2u_not_enough + PLD( pld [r1, #0] ) + PLD( pld [r0, #0] ) ands ip, r0, #3 bne .c2u_dest_not_aligned .c2u_dest_aligned: @@ -71,13 +73,26 @@ sub r2, r2, ip subs ip, ip, #32 blt .c2u_0rem8lp - -.c2u_0cpy8lp: ldmia r1!, {r3 - r6} + PLD( pld [r1, #28] ) + PLD( pld [r0, #28] ) + PLD( subs ip, ip, #64 ) + PLD( blt .c2u_0cpynopld ) + PLD( pld [r1, #60] ) + PLD( pld [r0, #60] ) + +.c2u_0cpy8lp: + PLD( pld [r1, #92] ) + PLD( pld [r0, #92] ) +.c2u_0cpynopld: ldmia r1!, {r3 - r6} stmia r0!, {r3 - r6} @ Shouldnt fault ldmia r1!, {r3 - r6} - stmia r0!, {r3 - r6} @ Shouldnt fault subs ip, ip, #32 + stmia r0!, {r3 - r6} @ Shouldnt fault bpl .c2u_0cpy8lp + PLD( cmn ip, #64 ) + PLD( bge .c2u_0cpynopld ) + PLD( add ip, ip, #64 ) + .c2u_0rem8lp: cmn ip, #16 ldmgeia r1!, {r3 - r6} stmgeia r0!, {r3 - r6} @ Shouldnt fault @@ -128,9 +143,19 @@ sub r2, r2, ip subs ip, ip, #16 blt .c2u_1rem8lp - -.c2u_1cpy8lp: mov r3, r7, pull #8 + PLD( pld [r1, #12] ) + PLD( pld [r0, #12] ) + PLD( subs ip, ip, #32 ) + PLD( blt .c2u_1cpynopld ) + PLD( pld [r1, #28] ) + PLD( pld [r0, #28] ) + +.c2u_1cpy8lp: + PLD( pld [r1, #44] ) + PLD( pld [r0, #44] ) +.c2u_1cpynopld: mov r3, r7, pull #8 ldmia r1!, {r4 - r7} + subs ip, ip, #16 orr r3, r3, r4, push #24 mov r4, r4, pull #8 orr r4, r4, r5, push #24 @@ -139,8 +164,11 @@ mov r6, r6, pull #8 orr r6, r6, r7, push #24 stmia r0!, {r3 - r6} @ Shouldnt fault - subs ip, ip, #16 bpl .c2u_1cpy8lp + PLD( cmn ip, #32 ) + PLD( bge .c2u_1cpynopld ) + PLD( add ip, ip, #32 ) + .c2u_1rem8lp: tst ip, #8 movne r3, r7, pull #8 ldmneia r1!, {r4, r7} @@ -182,9 +210,19 @@ sub r2, r2, ip subs ip, ip, #16 blt .c2u_2rem8lp - -.c2u_2cpy8lp: mov r3, r7, pull #16 + PLD( pld [r1, #12] ) + PLD( pld [r0, #12] ) + PLD( subs ip, ip, #32 ) + PLD( blt .c2u_2cpynopld ) + PLD( pld [r1, #28] ) + PLD( pld [r0, #28] ) + +.c2u_2cpy8lp: + PLD( pld [r1, #44] ) + PLD( pld [r0, #44] ) +.c2u_2cpynopld: mov r3, r7, pull #16 ldmia r1!, {r4 - r7} + subs ip, ip, #16 orr r3, r3, r4, push #16 mov r4, r4, pull #16 orr r4, r4, r5, push #16 @@ -193,8 +231,11 @@ mov r6, r6, pull #16 orr r6, r6, r7, push #16 stmia r0!, {r3 - r6} @ Shouldnt fault - subs ip, ip, #16 bpl .c2u_2cpy8lp + PLD( cmn ip, #32 ) + PLD( bge .c2u_2cpynopld ) + PLD( add ip, ip, #32 ) + .c2u_2rem8lp: tst ip, #8 movne r3, r7, pull #16 ldmneia r1!, {r4, r7} @@ -236,9 +277,19 @@ sub r2, r2, ip subs ip, ip, #16 blt .c2u_3rem8lp - -.c2u_3cpy8lp: mov r3, r7, pull #24 + PLD( pld [r1, #12] ) + PLD( pld [r0, #12] ) + PLD( subs ip, ip, #32 ) + PLD( blt .c2u_3cpynopld ) + PLD( pld [r1, #28] ) + PLD( pld [r0, #28] ) + +.c2u_3cpy8lp: + PLD( pld [r1, #44] ) + PLD( pld [r0, #44] ) +.c2u_3cpynopld: mov r3, r7, pull #24 ldmia r1!, {r4 - r7} + subs ip, ip, #16 orr r3, r3, r4, push #8 mov r4, r4, pull #24 orr r4, r4, r5, push #8 @@ -247,8 +298,11 @@ mov r6, r6, pull #24 orr r6, r6, r7, push #8 stmia r0!, {r3 - r6} @ Shouldnt fault - subs ip, ip, #16 bpl .c2u_3cpy8lp + PLD( cmn ip, #32 ) + PLD( bge .c2u_3cpynopld ) + PLD( add ip, ip, #32 ) + .c2u_3rem8lp: tst ip, #8 movne r3, r7, pull #24 ldmneia r1!, {r4, r7} @@ -302,6 +356,8 @@ stmfd sp!, {r0, r2, r4 - r7, lr} cmp r2, #4 blt .cfu_not_enough + PLD( pld [r1, #0] ) + PLD( pld [r0, #0] ) ands ip, r0, #3 bne .cfu_dest_not_aligned .cfu_dest_aligned: @@ -329,13 +385,26 @@ sub r2, r2, ip subs ip, ip, #32 blt .cfu_0rem8lp - -.cfu_0cpy8lp: ldmia r1!, {r3 - r6} @ Shouldnt fault + PLD( pld [r1, #28] ) + PLD( pld [r0, #28] ) + PLD( subs ip, ip, #64 ) + PLD( blt .cfu_0cpynopld ) + PLD( pld [r1, #60] ) + PLD( pld [r0, #60] ) + +.cfu_0cpy8lp: + PLD( pld [r1, #92] ) + PLD( pld [r0, #92] ) +.cfu_0cpynopld: ldmia r1!, {r3 - r6} @ Shouldnt fault stmia r0!, {r3 - r6} ldmia r1!, {r3 - r6} @ Shouldnt fault - stmia r0!, {r3 - r6} subs ip, ip, #32 + stmia r0!, {r3 - r6} bpl .cfu_0cpy8lp + PLD( cmn ip, #64 ) + PLD( bge .cfu_0cpynopld ) + PLD( add ip, ip, #64 ) + .cfu_0rem8lp: cmn ip, #16 ldmgeia r1!, {r3 - r6} @ Shouldnt fault stmgeia r0!, {r3 - r6} @@ -387,9 +456,19 @@ sub r2, r2, ip subs ip, ip, #16 blt .cfu_1rem8lp - -.cfu_1cpy8lp: mov r3, r7, pull #8 + PLD( pld [r1, #12] ) + PLD( pld [r0, #12] ) + PLD( subs ip, ip, #32 ) + PLD( blt .cfu_1cpynopld ) + PLD( pld [r1, #28] ) + PLD( pld [r0, #28] ) + +.cfu_1cpy8lp: + PLD( pld [r1, #44] ) + PLD( pld [r0, #44] ) +.cfu_1cpynopld: mov r3, r7, pull #8 ldmia r1!, {r4 - r7} @ Shouldnt fault + subs ip, ip, #16 orr r3, r3, r4, push #24 mov r4, r4, pull #8 orr r4, r4, r5, push #24 @@ -398,8 +477,11 @@ mov r6, r6, pull #8 orr r6, r6, r7, push #24 stmia r0!, {r3 - r6} - subs ip, ip, #16 bpl .cfu_1cpy8lp + PLD( cmn ip, #32 ) + PLD( bge .cfu_1cpynopld ) + PLD( add ip, ip, #32 ) + .cfu_1rem8lp: tst ip, #8 movne r3, r7, pull #8 ldmneia r1!, {r4, r7} @ Shouldnt fault @@ -441,9 +523,19 @@ sub r2, r2, ip subs ip, ip, #16 blt .cfu_2rem8lp - -.cfu_2cpy8lp: mov r3, r7, pull #16 + PLD( pld [r1, #12] ) + PLD( pld [r0, #12] ) + PLD( subs ip, ip, #32 ) + PLD( blt .cfu_2cpynopld ) + PLD( pld [r1, #28] ) + PLD( pld [r0, #28] ) + +.cfu_2cpy8lp: + PLD( pld [r1, #44] ) + PLD( pld [r0, #44] ) +.cfu_2cpynopld: mov r3, r7, pull #16 ldmia r1!, {r4 - r7} @ Shouldnt fault + subs ip, ip, #16 orr r3, r3, r4, push #16 mov r4, r4, pull #16 orr r4, r4, r5, push #16 @@ -452,8 +544,11 @@ mov r6, r6, pull #16 orr r6, r6, r7, push #16 stmia r0!, {r3 - r6} - subs ip, ip, #16 bpl .cfu_2cpy8lp + PLD( cmn ip, #32 ) + PLD( bge .cfu_2cpynopld ) + PLD( add ip, ip, #32 ) + .cfu_2rem8lp: tst ip, #8 movne r3, r7, pull #16 ldmneia r1!, {r4, r7} @ Shouldnt fault @@ -495,8 +590,17 @@ sub r2, r2, ip subs ip, ip, #16 blt .cfu_3rem8lp - -.cfu_3cpy8lp: mov r3, r7, pull #24 + PLD( pld [r1, #12] ) + PLD( pld [r0, #12] ) + PLD( subs ip, ip, #32 ) + PLD( blt .cfu_3cpynopld ) + PLD( pld [r1, #28] ) + PLD( pld [r0, #28] ) + +.cfu_3cpy8lp: + PLD( pld [r1, #44] ) + PLD( pld [r0, #44] ) +.cfu_3cpynopld: mov r3, r7, pull #24 ldmia r1!, {r4 - r7} @ Shouldnt fault orr r3, r3, r4, push #8 mov r4, r4, pull #24 @@ -508,6 +612,10 @@ stmia r0!, {r3 - r6} subs ip, ip, #16 bpl .cfu_3cpy8lp + PLD( cmn ip, #32 ) + PLD( bge .cfu_3cpynopld ) + PLD( add ip, ip, #32 ) + .cfu_3rem8lp: tst ip, #8 movne r3, r7, pull #24 ldmneia r1!, {r4, r7} @ Shouldnt fault diff -Nru a/arch/arm/mach-iop310/Kconfig b/arch/arm/mach-iop310/Kconfig --- a/arch/arm/mach-iop310/Kconfig Tue Oct 29 17:16:52 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,30 +0,0 @@ - -menu "IOP310 Implementation Options" - -config ARCH_IQ80310 - bool "IQ80310" - depends on ARCH_IOP310 - help - Say Y here if you want to run your kernel on the Intel IQ80310 - evaluation kit for the IOP310 chipset. - -comment "IOP310 Chipset Features" - -config IOP310_AAU - bool "Support Intel 80312 Application Accelerator Unit (EXPERIMENTAL)" - depends on ARCH_IOP310 && EXPERIMENTAL - -config IOP310_DMA - bool "Support Intel 80312 DMA (EXPERIMENTAL)" - depends on ARCH_IOP310 && EXPERIMENTAL - -config IOP310_MU - bool "Support Intel 80312 Messaging Unit (EXPERIMENTAL)" - depends on ARCH_IOP310 && EXPERIMENTAL - -config IOP310_PMON - bool "Support Intel 80312 Performance Monitor (EXPERIMENTAL)" - depends on ARCH_IOP310 && EXPERIMENTAL - -endmenu - diff -Nru a/arch/arm/mach-iop310/Makefile b/arch/arm/mach-iop310/Makefile --- a/arch/arm/mach-iop310/Makefile Mon Feb 3 14:19:35 2003 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,22 +0,0 @@ -# -# Makefile for the linux kernel. -# - -# Object file lists. - -obj-y := arch.o mm.o xs80200-irq.o iop310-irq.o \ - iop310-pci.o -obj-m := -obj-n := -obj- := - -obj-$(CONFIG_ARCH_IQ80310) += iq80310-pci.o iq80310-irq.o - -ifneq ($(CONFIG_XSCALE_PMU_TIMER),y) -obj-y += iq80310-time.o -endif - -obj-$(CONFIG_IOP310_AAU) += aau.o -obj-$(CONFIG_IOP310_DMA) += dma.o -obj-$(CONFIG_IOP310_MU) += message.o -obj-$(CONFIG_IOP310_PMON) += pmon.o diff -Nru a/arch/arm/mach-iop310/arch.c b/arch/arm/mach-iop310/arch.c --- a/arch/arm/mach-iop310/arch.c Sun Nov 17 07:31:10 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,48 +0,0 @@ -/* - * linux/arch/arm/mach-iop310/arch.c - * - * Author: Nicolas Pitre - * Copyright (C) 2001 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#ifdef CONFIG_ARCH_IQ80310 -extern void iq80310_map_io(void); -extern void iq80310_init_irq(void); - -static void __init -fixup_iq80310(struct machine_desc *desc, struct tag *tags, - char **cmdline, struct meminfo *mi) -{ - system_rev = (*(volatile unsigned int*)0xfe830000) & 0x0f; - - if (system_rev) - system_rev = 0xF; -} - -MACHINE_START(IQ80310, "Cyclone IQ80310") - MAINTAINER("MontaVista Software Inc.") - BOOT_MEM(0xa0000000, 0xfe000000, 0xfe000000) - FIXUP(fixup_iq80310) - MAPIO(iq80310_map_io) - INITIRQ(iq80310_init_irq) -MACHINE_END - -#else -#error No machine descriptor defined for this IOP310 implementation -#endif diff -Nru a/arch/arm/mach-iop310/iop310-irq.c b/arch/arm/mach-iop310/iop310-irq.c --- a/arch/arm/mach-iop310/iop310-irq.c Tue Feb 11 15:05:29 2003 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,113 +0,0 @@ -/* - * linux/arch/arm/mach-iop310/iop310-irq.c - * - * Generic IOP310 IRQ handling functionality - * - * Author: Nicolas Pitre - * Copyright: (C) 2001 MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Added IOP310 chipset and IQ80310 board demuxing, masking code. - DS - * - */ -#include -#include -#include - -#include -#include -#include - -#include - -extern void xs80200_irq_mask(unsigned int); -extern void xs80200_irq_unmask(unsigned int); -extern void xs80200_init_irq(void); - -extern void do_IRQ(int, struct pt_regs *); - -static u32 iop310_mask /* = 0 */; - -static void iop310_irq_mask (unsigned int irq) -{ - iop310_mask ++; - - /* - * No mask bits on the 80312, so we have to - * mask everything from the outside! - */ - if (iop310_mask == 1) { - disable_irq(IRQ_XS80200_EXTIRQ); - irq_desc[IRQ_XS80200_EXTIRQ].chip->mask(IRQ_XS80200_EXTIRQ); - } -} - -static void iop310_irq_unmask (unsigned int irq) -{ - if (iop310_mask) - iop310_mask --; - - /* - * Check if all 80312 sources are unmasked now - */ - if (iop310_mask == 0) - enable_irq(IRQ_XS80200_EXTIRQ); -} - -struct irqchip ext_chip = { - .ack = iop310_irq_mask, - .mask = iop310_irq_mask, - .unmask = iop310_irq_unmask, -}; - -void -iop310_irq_demux(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs) -{ - u32 fiq1isr = *((volatile u32*)IOP310_FIQ1ISR); - u32 fiq2isr = *((volatile u32*)IOP310_FIQ2ISR); - struct irqdesc *d; - unsigned int irqno = 0; - - if(fiq1isr) - { - if(fiq1isr & 0x1) - irqno = IRQ_IOP310_DMA0; - if(fiq1isr & 0x2) - irqno = IRQ_IOP310_DMA1; - if(fiq1isr & 0x4) - irqno = IRQ_IOP310_DMA2; - if(fiq1isr & 0x10) - irqno = IRQ_IOP310_PMON; - if(fiq1isr & 0x20) - irqno = IRQ_IOP310_AAU; - } - else - { - if(fiq2isr & 0x2) - irqno = IRQ_IOP310_I2C; - if(fiq2isr & 0x4) - irqno = IRQ_IOP310_MU; - } - - if (irqno) { - d = irq_desc + irqno; - d->handle(irqno, d, regs); - } -} - -void __init iop310_init_irq(void) -{ - unsigned int i; - - for(i = IOP310_IRQ_OFS; i < NR_IOP310_IRQS; i++) - { - set_irq_chip(i, &ext_chip); - set_irq_handler(i, do_level_IRQ); - set_irq_flags(i, IRQF_VALID | IRQF_PROBE); - } - - xs80200_init_irq(); -} diff -Nru a/arch/arm/mach-iop310/iop310-pci.c b/arch/arm/mach-iop310/iop310-pci.c --- a/arch/arm/mach-iop310/iop310-pci.c Mon Feb 24 10:09:27 2003 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,434 +0,0 @@ -/* - * arch/arm/mach-iop310/iop310-pci.c - * - * PCI support for the Intel IOP310 chipset - * - * Matt Porter - * - * Copyright (C) 2001 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -#include - -/* - * *** Special note - why the IOP310 should NOT be used *** - * - * The PCI ATU is a brain dead implementation, only allowing 32-bit - * accesses to PCI configuration space. This is especially brain - * dead for writes to this space. A simple for-instance: - * - * You want to modify the command register *without* corrupting the - * status register. - * - * To perform this, you need to read *32* bits of data from offset 4, - * mask off the low 16, replace them with the new data, and write *32* - * bits back. - * - * Writing the status register at offset 6 with status bits set *clears* - * the status. - * - * Hello? Could we have a *SANE* implementation of a PCI ATU some day - * *PLEASE*? - */ -#undef DEBUG -#ifdef DEBUG -#define DBG(x...) printk(x) -#else -#define DBG(x...) do { } while (0) -#endif - -/* - * Calculate the address, etc from the bus, devfn and register - * offset. Note that we have two root buses, so we need some - * method to determine whether we need config type 0 or 1 cycles. - * We use a root bus number in our bus->sysdata structure for this. - */ -static u32 iop310_cfg_address(struct pci_bus *bus, int devfn, int where) -{ - struct pci_sys_data *sys = bus->sysdata; - u32 addr; - - if (sys->busnr == bus->number) - addr = 1 << (PCI_SLOT(devfn) + 16); - else - addr = bus->number << 16 | PCI_SLOT(devfn) << 11 | 1; - - addr |= PCI_FUNC(devfn) << 8 | (where & ~3); - - return addr; -} - -/* - * Primary PCI interface support. - */ -static int iop310_pri_pci_status(void) -{ - unsigned int status; - int ret = 0; - - status = *IOP310_PATUSR; - if (status & 0xf900) { - *IOP310_PATUSR = status & 0xf900; - ret = 1; - } - status = *IOP310_PATUISR; - if (status & 0x0000018f) { - *IOP310_PATUISR = status & 0x0000018f; - ret = 1; - } - status = *IOP310_PSR; - if (status & 0xf900) { - *IOP310_PSR = status & 0xf900; - ret = 1; - } - status = *IOP310_PBISR; - if (status & 0x003f) { - *IOP310_PBISR = status & 0x003f; - ret = 1; - } - return ret; -} - -/* - * Simply write the address register and read the configuration - * data. Note that the 4 nop's ensure that we are able to handle - * a delayed abort (in theory.) - */ -static inline u32 iop310_pri_read(unsigned long addr) -{ - u32 val; - - __asm__ __volatile__( - "str %1, [%2]\n\t" - "ldr %0, [%3]\n\t" - "nop\n\t" - "nop\n\t" - "nop\n\t" - "nop\n\t" - : "=r" (val) - : "r" (addr), "r" (IOP310_POCCAR), "r" (IOP310_POCCDR)); - - return val; -} - -static int -iop310_pri_read_config(struct pci_bus *bus, unsigned int devfn, int where, - int size, u32 *value) -{ - unsigned long addr = iop310_cfg_address(bus, devfn, where); - u32 val = iop310_pri_read(addr) >> ((where & 3) * 8); - - if (iop310_pri_pci_status()) - val = 0xffffffff; - - *value = val; - - return PCIBIOS_SUCCESSFUL; -} - -static int -iop310_pri_write_config(struct pci_bus *bus, unsigned int devfn, int where, - int size, u32 value) -{ - unsigned long addr = iop310_cfg_address(bus, devfn, where); - u32 val; - - if (size != 4) { - val = iop310_pri_read(addr); - if (!iop310_pri_pci_status() == 0) - return PCIBIOS_SUCCESSFUL; - - where = (where & 3) * 8; - - if (size == 1) - val &= ~(0xff << where); - else - val &= ~(0xffff << where); - - *IOP310_POCCDR = val | value << where; - } else { - asm volatile( - "str %1, [%2]\n\t" - "str %0, [%3]\n\t" - "nop\n\t" - "nop\n\t" - "nop\n\t" - "nop\n\t" - : - : "r" (value), "r" (addr), - "r" (IOP310_POCCAR), "r" (IOP310_POCCDR)); - } - - return PCIBIOS_SUCCESSFUL; -} - -static struct pci_ops iop310_primary_ops = { - .read = iop310_pri_read_config, - .write = iop310_pri_write_config, -}; - -/* - * Secondary PCI interface support. - */ -static int iop310_sec_pci_status(void) -{ - unsigned int usr, uisr; - int ret = 0; - - usr = *IOP310_SATUSR; - uisr = *IOP310_SATUISR; - if (usr & 0xf900) { - *IOP310_SATUSR = usr & 0xf900; - ret = 1; - } - if (uisr & 0x0000069f) { - *IOP310_SATUISR = uisr & 0x0000069f; - ret = 1; - } - if (ret) - DBG("ERROR (%08x %08x)", usr, uisr); - return ret; -} - -/* - * Simply write the address register and read the configuration - * data. Note that the 4 nop's ensure that we are able to handle - * a delayed abort (in theory.) - */ -static inline u32 iop310_sec_read(unsigned long addr) -{ - u32 val; - - __asm__ __volatile__( - "str %1, [%2]\n\t" - "ldr %0, [%3]\n\t" - "nop\n\t" - "nop\n\t" - "nop\n\t" - "nop\n\t" - : "=r" (val) - : "r" (addr), "r" (IOP310_SOCCAR), "r" (IOP310_SOCCDR)); - - return val; -} - -static int -iop310_sec_read_config(struct pci_bus *bus, unsigned int devfn, int where, - int size, u32 *value) -{ - unsigned long addr = iop310_cfg_address(bus, devfn, where); - u32 val = iop310_sec_read(addr) >> ((where & 3) * 8); - - if (iop310_sec_pci_status()) - val = 0xffffffff; - - *value = val; - - return PCIBIOS_SUCCESSFUL; -} - -static int -iop310_sec_write_config(struct pci_bus *bus, unsigned int devfn, int where, - int size, u32 value) -{ - unsigned long addr = iop310_cfg_address(bus, devfn, where); - u32 val; - - if (size != 4) { - val = iop310_sec_read(addr); - - if (!iop310_sec_pci_status() == 0) - return PCIBIOS_SUCCESSFUL; - - where = (where & 3) * 8; - - if (size == 1) - val &= ~(0xff << where); - else - val &= ~(0xffff << where); - - *IOP310_SOCCDR = val | value << where; - } else { - asm volatile( - "str %1, [%2]\n\t" - "str %0, [%3]\n\t" - "nop\n\t" - "nop\n\t" - "nop\n\t" - "nop\n\t" - : - : "r" (value), "r" (addr), - "r" (IOP310_SOCCAR), "r" (IOP310_SOCCDR)); - } - - return PCIBIOS_SUCCESSFUL; -} - -static struct pci_ops iop310_secondary_ops = { - .read = iop310_sec_read_config, - .write = iop310_sec_write_config, -}; - -/* - * When a PCI device does not exist during config cycles, the 80200 gets - * an external abort instead of returning 0xffffffff. If it was an - * imprecise abort, we need to correct the return address to point after - * the instruction. Also note that the Xscale manual says: - * - * "if a stall-until-complete LD or ST instruction triggers an - * imprecise fault, then that fault will be seen by the program - * within 3 instructions." - * - * This does not appear to be the case. With 8 NOPs after the load, we - * see the imprecise abort occurring on the STM of iop310_sec_pci_status() - * which is about 10 instructions away. - * - * Always trust reality! - */ -static int -iop310_pci_abort(unsigned long addr, unsigned int fsr, struct pt_regs *regs) -{ - DBG("PCI abort: address = 0x%08lx fsr = 0x%03x PC = 0x%08lx LR = 0x%08lx\n", - addr, fsr, regs->ARM_pc, regs->ARM_lr); - - /* - * If it was an imprecise abort, then we need to correct the - * return address to be _after_ the instruction. - */ - if (fsr & (1 << 10)) - regs->ARM_pc += 4; - - return 0; -} - -/* - * Scan an IOP310 PCI bus. sys->bus defines which bus we scan. - */ -struct pci_bus *iop310_scan_bus(int nr, struct pci_sys_data *sys) -{ - struct pci_ops *ops; - - if (nr) - ops = &iop310_secondary_ops; - else - ops = &iop310_primary_ops; - - return pci_scan_bus(sys->busnr, ops, sys); -} - -/* - * Setup the system data for controller 'nr'. Return 0 if none found, - * 1 if found, or negative error. - * - * We can alter: - * io_offset - offset between IO resources and PCI bus BARs - * mem_offset - offset between mem resources and PCI bus BARs - * resource[0] - parent IO resource - * resource[1] - parent non-prefetchable memory resource - * resource[2] - parent prefetchable memory resource - * swizzle - bridge swizzling function - * map_irq - irq mapping function - * - * Note that 'io_offset' and 'mem_offset' are left as zero since - * the IOP310 doesn't attempt to perform any address translation - * on accesses from the host to the bus. - */ -int iop310_setup(int nr, struct pci_sys_data *sys) -{ - struct resource *res; - - if (nr >= 2) - return 0; - - res = kmalloc(sizeof(struct resource) * 2, GFP_KERNEL); - if (!res) - panic("PCI: unable to alloc resources"); - - memset(res, 0, sizeof(struct resource) * 2); - - switch (nr) { - case 0: - res[0].start = IOP310_PCIPRI_LOWER_IO + 0x6e000000; - res[0].end = IOP310_PCIPRI_LOWER_IO + 0x6e00ffff; - res[0].name = "PCI IO Primary"; - res[0].flags = IORESOURCE_IO; - - res[1].start = IOP310_PCIPRI_LOWER_MEM; - res[1].end = IOP310_PCIPRI_LOWER_MEM + IOP310_PCI_WINDOW_SIZE; - res[1].name = "PCI Memory Primary"; - res[1].flags = IORESOURCE_MEM; - break; - - case 1: - res[0].start = IOP310_PCISEC_LOWER_IO + 0x6e000000; - res[0].end = IOP310_PCISEC_LOWER_IO + 0x6e00ffff; - res[0].name = "PCI IO Secondary"; - res[0].flags = IORESOURCE_IO; - - res[1].start = IOP310_PCISEC_LOWER_MEM; - res[1].end = IOP310_PCISEC_LOWER_MEM + IOP310_PCI_WINDOW_SIZE; - res[1].name = "PCI Memory Secondary"; - res[1].flags = IORESOURCE_MEM; - break; - } - - request_resource(&ioport_resource, &res[0]); - request_resource(&iomem_resource, &res[1]); - - sys->resource[0] = &res[0]; - sys->resource[1] = &res[1]; - sys->resource[2] = NULL; - sys->io_offset = 0x6e000000; - - return 1; -} - -void iop310_init(void) -{ - DBG("PCI: Intel 80312 PCI-to-PCI init code.\n"); - DBG(" ATU secondary: ATUCR =0x%08x\n", *IOP310_ATUCR); - DBG(" ATU secondary: SOMWVR=0x%08x SOIOWVR=0x%08x\n", - *IOP310_SOMWVR, *IOP310_SOIOWVR); - DBG(" ATU secondary: SIABAR=0x%08x SIALR =0x%08x SIATVR=%08x\n", - *IOP310_SIABAR, *IOP310_SIALR, *IOP310_SIATVR); - DBG(" ATU primary: POMWVR=0x%08x POIOWVR=0x%08x\n", - *IOP310_POMWVR, *IOP310_POIOWVR); - DBG(" ATU primary: PIABAR=0x%08x PIALR =0x%08x PIATVR=%08x\n", - *IOP310_PIABAR, *IOP310_PIALR, *IOP310_PIATVR); - DBG(" P2P: PCR=0x%04x BCR=0x%04x EBCR=0x%04x\n", - *IOP310_PCR, *IOP310_BCR, *IOP310_EBCR); - - /* - * Windows have to be carefully opened via a nice set of calls - * here or just some direct register fiddling in the board - * specific init when we want transactions to occur between the - * two PCI hoses. - * - * To do this, we will have manage RETRY assertion between the - * firmware and the kernel. This will ensure that the host - * system's enumeration code is held off until we have tweaked - * the interrupt routing and public/private IDSELs. - * - * For now we will simply default to disabling the integrated type - * 81 P2P bridge. - */ - *IOP310_PCR &= 0xfff8; - - hook_fault_code(16+6, iop310_pci_abort, SIGBUS, "imprecise external abort"); -} diff -Nru a/arch/arm/mach-iop310/iq80310-irq.c b/arch/arm/mach-iop310/iq80310-irq.c --- a/arch/arm/mach-iop310/iq80310-irq.c Tue Feb 11 15:05:30 2003 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,141 +0,0 @@ -/* - * linux/arch/arm/mach-iop310/iq80310-irq.c - * - * IRQ hadling/demuxing for IQ80310 board - * - * Author: Nicolas Pitre - * Copyright: (C) 2001 MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * 2.4.7-rmk1-iop310.1 - * Moved demux from asm to C - DS - * Fixes for various revision boards - DS - */ -#include -#include - -#include -#include -#include -#include - -#include - -extern void iop310_init_irq(void); -extern void iop310_irq_demux(unsigned int, struct irqdesc *, struct pt_regs *); - -static void iq80310_irq_mask(unsigned int irq) -{ - *(volatile char *)IQ80310_INT_MASK |= (1 << (irq - IQ80310_IRQ_OFS)); -} - -static void iq80310_irq_unmask(unsigned int irq) -{ - *(volatile char *)IQ80310_INT_MASK &= ~(1 << (irq - IQ80310_IRQ_OFS)); -} - -static struct irqchip iq80310_irq_chip = { - .ack = iq80310_irq_mask, - .mask = iq80310_irq_mask, - .unmask = iq80310_irq_unmask, -}; - -extern struct irqchip ext_chip; - -static void -iq80310_cpld_irq_handler(unsigned int irq, struct irqdesc *desc, - struct pt_regs *regs) -{ - unsigned int irq_stat = *(volatile u8*)IQ80310_INT_STAT; - unsigned int irq_mask = *(volatile u8*)IQ80310_INT_MASK; - unsigned int i, handled = 0; - struct irqdesc *d; - - desc->chip->ack(irq); - - /* - * Mask out the interrupts which aren't enabled. - */ - irq_stat &= 0x1f & ~irq_mask; - - /* - * Test each IQ80310 CPLD interrupt - */ - for (i = IRQ_IQ80310_TIMER, d = irq_desc + IRQ_IQ80310_TIMER; - irq_stat; i++, d++, irq_stat >>= 1) - if (irq_stat & 1) { - d->handle(i, d, regs); - handled++; - } - - /* - * If running on a board later than REV D.1, we can - * decode the PCI interrupt status. - */ - if (system_rev) { - irq_stat = *((volatile u8*)IQ80310_PCI_INT_STAT) & 7; - - for (i = IRQ_IQ80310_INTA, d = irq_desc + IRQ_IQ80310_INTA; - irq_stat; i++, d++, irq_stat >>= 1) - if (irq_stat & 0x1) { - d->handle(i, d, regs); - handled++; - } - } - - /* - * If on a REV D.1 or lower board, we just assumed INTA - * since PCI is not routed, and it may actually be an - * on-chip interrupt. - * - * Note that we're giving on-chip interrupts slightly - * higher priority than PCI by handling them first. - * - * On boards later than REV D.1, if we didn't read a - * CPLD interrupt, we assume it's from a device on the - * chipset itself. - */ - if (system_rev == 0 || handled == 0) - iop310_irq_demux(irq, desc, regs); - - desc->chip->unmask(irq); -} - -void __init iq80310_init_irq(void) -{ - volatile char *mask = (volatile char *)IQ80310_INT_MASK; - unsigned int i; - - iop310_init_irq(); - - /* - * Setup PIRSR to route PCI interrupts into xs80200 - */ - *IOP310_PIRSR = 0xff; - - /* - * Setup the IRQs in the FE820000/FE860000 registers - */ - for (i = IQ80310_IRQ_OFS; i <= IRQ_IQ80310_INTD; i++) { - set_irq_chip(i, &iq80310_irq_chip); - set_irq_handler(i, do_level_IRQ); - set_irq_flags(i, IRQF_VALID | IRQF_PROBE); - } - - /* - * Setup the PCI IRQs - */ - for (i = IRQ_IQ80310_INTA; i < IRQ_IQ80310_INTC; i++) { - set_irq_chip(i, &ext_chip); - set_irq_handler(i, do_level_IRQ); - set_irq_flags(i, IRQF_VALID); - } - - *mask = 0xff; /* mask all sources */ - - set_irq_chained_handler(IRQ_XS80200_EXTIRQ, - &iq80310_cpld_irq_handler); -} diff -Nru a/arch/arm/mach-iop310/iq80310-pci.c b/arch/arm/mach-iop310/iq80310-pci.c --- a/arch/arm/mach-iop310/iq80310-pci.c Sat Aug 3 06:39:49 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,164 +0,0 @@ -/* - * arch/arm/mach-iop310/iq80310-pci.c - * - * PCI support for the Intel IQ80310 reference board - * - * Matt Porter - * - * Copyright (C) 2001 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#include -#include -#include - -#include -#include -#include -#include - -/* - * The following macro is used to lookup irqs in a standard table - * format for those systems that do not already have PCI - * interrupts properly routed. We assume 1 <= pin <= 4 - */ -#define PCI_IRQ_TABLE_LOOKUP(minid,maxid) \ -({ int _ctl_ = -1; \ - unsigned int _idsel = idsel - minid; \ - if (_idsel <= maxid) \ - _ctl_ = pci_irq_table[_idsel][pin-1]; \ - _ctl_; }) - -#define INTA IRQ_IQ80310_INTA -#define INTB IRQ_IQ80310_INTB -#define INTC IRQ_IQ80310_INTC -#define INTD IRQ_IQ80310_INTD - -#define INTE IRQ_IQ80310_I82559 - -typedef u8 irq_table[4]; - -/* - * IRQ tables for primary bus. - * - * On a Rev D.1 and older board, INT A-C are not routed, so we - * just fake it as INTA and than we take care of handling it - * correctly in the IRQ demux routine. - */ -static irq_table pci_pri_d_irq_table[] = { -/* Pin: A B C D */ - { INTA, INTD, INTA, INTA }, /* PCI Slot J3 */ - { INTD, INTA, INTA, INTA }, /* PCI Slot J4 */ -}; - -static irq_table pci_pri_f_irq_table[] = { -/* Pin: A B C D */ - { INTC, INTD, INTA, INTB }, /* PCI Slot J3 */ - { INTD, INTA, INTB, INTC }, /* PCI Slot J4 */ -}; - -static int __init -iq80310_pri_map_irq(struct pci_dev *dev, u8 idsel, u8 pin) -{ - irq_table *pci_irq_table; - - BUG_ON(pin < 1 || pin > 4); - - if (!system_rev) { - pci_irq_table = pci_pri_d_irq_table; - } else { - pci_irq_table = pci_pri_f_irq_table; - } - - return PCI_IRQ_TABLE_LOOKUP(2, 3); -} - -/* - * IRQ tables for secondary bus. - * - * On a Rev D.1 and older board, INT A-C are not routed, so we - * just fake it as INTA and than we take care of handling it - * correctly in the IRQ demux routine. - */ -static irq_table pci_sec_d_irq_table[] = { -/* Pin: A B C D */ - { INTA, INTA, INTA, INTD }, /* PCI Slot J1 */ - { INTA, INTA, INTD, INTA }, /* PCI Slot J5 */ - { INTE, INTE, INTE, INTE }, /* P2P Bridge */ -}; - -static irq_table pci_sec_f_irq_table[] = { -/* Pin: A B C D */ - { INTA, INTB, INTC, INTD }, /* PCI Slot J1 */ - { INTB, INTC, INTD, INTA }, /* PCI Slot J5 */ - { INTE, INTE, INTE, INTE }, /* P2P Bridge */ -}; - -static int __init -iq80310_sec_map_irq(struct pci_dev *dev, u8 idsel, u8 pin) -{ - irq_table *pci_irq_table; - - BUG_ON(pin < 1 || pin > 4); - - if (!system_rev) { - pci_irq_table = pci_sec_d_irq_table; - } else { - pci_irq_table = pci_sec_f_irq_table; - } - - return PCI_IRQ_TABLE_LOOKUP(0, 2); -} - -static int iq80310_pri_host; - -static int iq80310_setup(int nr, struct pci_sys_data *sys) -{ - switch (nr) { - case 0: - if (!iq80310_pri_host) - return 0; - - sys->map_irq = iq80310_pri_map_irq; - break; - - case 1: - sys->map_irq = iq80310_sec_map_irq; - break; - - default: - return 0; - } - - return iop310_setup(nr, sys); -} - -static void iq80310_preinit(void) -{ - iq80310_pri_host = *(volatile u32 *)IQ80310_BACKPLANE & 1; - - printk(KERN_INFO "PCI: IQ80310 is a%s\n", - iq80310_pri_host ? " system controller" : "n agent"); - - iop310_init(); -} - -static struct hw_pci iq80310_pci __initdata = { - .swizzle = pci_std_swizzle, - .nr_controllers = 2, - .setup = iq80310_setup, - .scan = iop310_scan_bus, - .preinit = iq80310_preinit, -}; - -static int __init iq80310_pci_init(void) -{ - if (machine_is_iq80310()) - pci_common_init(&iq80310_pci); - return 0; -} - -subsys_initcall(iq80310_pci_init); diff -Nru a/arch/arm/mach-iop310/iq80310-time.c b/arch/arm/mach-iop310/iq80310-time.c --- a/arch/arm/mach-iop310/iq80310-time.c Sun Nov 17 07:31:11 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,134 +0,0 @@ -/* - * linux/arch/arm/mach-iop310/time-iq80310.c - * - * Timer functions for IQ80310 onboard timer - * - * Author: Nicolas Pitre - * Copyright: (C) 2001 MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -static void iq80310_write_timer (u_long val) -{ - volatile u_char *la0 = (volatile u_char *)IQ80310_TIMER_LA0; - volatile u_char *la1 = (volatile u_char *)IQ80310_TIMER_LA1; - volatile u_char *la2 = (volatile u_char *)IQ80310_TIMER_LA2; - - *la0 = val; - *la1 = val >> 8; - *la2 = (val >> 16) & 0x3f; -} - -static u_long iq80310_read_timer (void) -{ - volatile u_char *la0 = (volatile u_char *)IQ80310_TIMER_LA0; - volatile u_char *la1 = (volatile u_char *)IQ80310_TIMER_LA1; - volatile u_char *la2 = (volatile u_char *)IQ80310_TIMER_LA2; - volatile u_char *la3 = (volatile u_char *)IQ80310_TIMER_LA3; - u_long b0, b1, b2, b3, val; - - b0 = *la0; b1 = *la1; b2 = *la2; b3 = *la3; - b0 = (((b0 & 0x40) >> 1) | (b0 & 0x1f)); - b1 = (((b1 & 0x40) >> 1) | (b1 & 0x1f)); - b2 = (((b2 & 0x40) >> 1) | (b2 & 0x1f)); - b3 = (b3 & 0x0f); - val = ((b0 << 0) | (b1 << 6) | (b2 << 12) | (b3 << 18)); - return val; -} - -/* - * IRQs are disabled before entering here from do_gettimeofday(). - * Note that the counter may wrap. When it does, 'elapsed' will - * be small, but we will have a pending interrupt. - */ -static unsigned long iq80310_gettimeoffset (void) -{ - unsigned long elapsed, usec; - unsigned int stat1, stat2; - - stat1 = *(volatile u8 *)IQ80310_INT_STAT; - elapsed = iq80310_read_timer(); - stat2 = *(volatile u8 *)IQ80310_INT_STAT; - - /* - * If an interrupt was pending before we read the timer, - * we've already wrapped. Factor this into the time. - * If an interrupt was pending after we read the timer, - * it may have wrapped between checking the interrupt - * status and reading the timer. Re-read the timer to - * be sure its value is after the wrap. - */ - if (stat1 & 1) - elapsed += LATCH; - else if (stat2 & 1) - elapsed = LATCH + iq80310_read_timer(); - - /* - * Now convert them to usec. - */ - usec = (unsigned long)(elapsed * (tick_nsec / 1000))/LATCH; - - return usec; -} - - -static void iq80310_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) -{ - volatile u_char *timer_en = (volatile u_char *)IQ80310_TIMER_EN; - - /* clear timer interrupt */ - *timer_en &= ~2; - *timer_en |= 2; - - /* - * AHEM..HACK - * - * Since the timer interrupt is cascaded through the CPLD and - * the 80312 and the demux code calls do_IRQ, the irq count is - * going to be atleast 2 when we get here and this will cause the - * kernel to increment the system tick counter even if we're - * idle. This causes it to look like there's always 100% system - * time, which is not the case. To get around it, we just decrement - * the IRQ count before calling do_timer. We increment it again - * b/c otherwise it will go negative and than bad things happen. - * - * -DS - */ - do_timer(regs); -} - -extern unsigned long (*gettimeoffset)(void); - -static struct irqaction timer_irq = { - .name = "timer", - .handler = iq80310_timer_interrupt, -}; - - -void __init time_init(void) -{ - volatile u_char *timer_en = (volatile u_char *)IQ80310_TIMER_EN; - - gettimeoffset = iq80310_gettimeoffset; - setup_irq(IRQ_IQ80310_TIMER, &timer_irq); - *timer_en = 0; - iq80310_write_timer(LATCH); - *timer_en |= 2; - *timer_en |= 1; -} diff -Nru a/arch/arm/mach-iop310/mm.c b/arch/arm/mach-iop310/mm.c --- a/arch/arm/mach-iop310/mm.c Mon Feb 24 09:55:42 2003 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,70 +0,0 @@ -/* - * linux/arch/arm/mach-iop310/mm.c - * - * Low level memory initialization for IOP310 based systems - * - * Author: Nicolas Pitre - * - * Copyright 2000-2001 MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - */ -#include -#include -#include -#include - -#include -#include -#include - -#include -#include - -#ifdef CONFIG_IOP310_MU -#include "message.h" -#endif - -/* - * Standard IO mapping for all IOP310 based systems - */ -static struct map_desc iop80310_std_desc[] __initdata = { - /* virtual physical length type */ - // IOP310 Memory Mapped Registers - { 0xe8001000, 0x00001000, 0x00001000, MT_DEVICE }, - // PCI I/O Space - { 0xfe000000, 0x90000000, 0x00020000, MT_DEVICE } -}; - -void __init iop310_map_io(void) -{ - iotable_init(iop80310_std_desc, ARRAY_SIZE(iop80310_std_desc)); -} - -/* - * IQ80310 specific IO mappings - */ -#ifdef CONFIG_ARCH_IQ80310 -static struct map_desc iq80310_io_desc[] __initdata = { - /* virtual physical length type */ - // IQ80310 On-Board Devices - { 0xfe800000, 0xfe800000, 0x00100000, MT_DEVICE } -}; - -void __init iq80310_map_io(void) -{ -#ifdef CONFIG_IOP310_MU - /* acquiring 1MB of memory aligned on 1MB boundary for MU */ - mu_mem = __alloc_bootmem(0x100000, 0x100000, 0); -#endif - - iop310_map_io(); - - iotable_init(iq80310_io_desc, ARRAY_SIZE(iq80310_io_desc)); -} -#endif // CONFIG_ARCH_IQ80310 - diff -Nru a/arch/arm/mach-iop310/xs80200-irq.c b/arch/arm/mach-iop310/xs80200-irq.c --- a/arch/arm/mach-iop310/xs80200-irq.c Tue Feb 11 15:05:30 2003 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,65 +0,0 @@ -/* - * linux/arch/arm/mach-iop310/xs80200-irq.c - * - * Generic IRQ handling for the XS80200 XScale core. - * - * Author: Nicolas Pitre - * Copyright: (C) 2001 MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#include -#include - -#include -#include -#include - -#include - -static void xs80200_irq_mask (unsigned int irq) -{ - unsigned long intctl; - asm ("mrc p13, 0, %0, c0, c0, 0" : "=r" (intctl)); - switch (irq) { - case IRQ_XS80200_BCU: intctl &= ~(1<<3); break; - case IRQ_XS80200_PMU: intctl &= ~(1<<2); break; - case IRQ_XS80200_EXTIRQ: intctl &= ~(1<<1); break; - case IRQ_XS80200_EXTFIQ: intctl &= ~(1<<0); break; - } - asm ("mcr p13, 0, %0, c0, c0, 0" : : "r" (intctl)); -} - -static void xs80200_irq_unmask (unsigned int irq) -{ - unsigned long intctl; - asm ("mrc p13, 0, %0, c0, c0, 0" : "=r" (intctl)); - switch (irq) { - case IRQ_XS80200_BCU: intctl |= (1<<3); break; - case IRQ_XS80200_PMU: intctl |= (1<<2); break; - case IRQ_XS80200_EXTIRQ: intctl |= (1<<1); break; - case IRQ_XS80200_EXTFIQ: intctl |= (1<<0); break; - } - asm ("mcr p13, 0, %0, c0, c0, 0" : : "r" (intctl)); -} - -static struct irqchip xs80200_chip = { - .ack = xs80200_irq_mask, - .mask = xs80200_irq_mask, - .unmask = xs80200_irq_unmask, -}; - -void __init xs80200_init_irq(void) -{ - unsigned int i; - - asm("mcr p13, 0, %0, c0, c0, 0" : : "r" (0)); - - for (i = 0; i < NR_XS80200_IRQS; i++) { - set_irq_chip(i, &xs80200_chip); - set_irq_handler(i, do_level_IRQ); - set_irq_flags(i, IRQF_VALID); - } -} diff -Nru a/arch/arm/mach-iop3xx/Kconfig b/arch/arm/mach-iop3xx/Kconfig --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/arch/arm/mach-iop3xx/Kconfig Sun Apr 6 16:47:46 2003 @@ -0,0 +1,30 @@ + +menu "IOP310 Implementation Options" + +config ARCH_IQ80310 + bool "IQ80310" + depends on ARCH_IOP310 + help + Say Y here if you want to run your kernel on the Intel IQ80310 + evaluation kit for the IOP310 chipset. + +comment "IOP310 Chipset Features" + +config IOP310_AAU + bool "Support Intel 80312 Application Accelerator Unit (EXPERIMENTAL)" + depends on ARCH_IOP310 && EXPERIMENTAL + +config IOP310_DMA + bool "Support Intel 80312 DMA (EXPERIMENTAL)" + depends on ARCH_IOP310 && EXPERIMENTAL + +config IOP310_MU + bool "Support Intel 80312 Messaging Unit (EXPERIMENTAL)" + depends on ARCH_IOP310 && EXPERIMENTAL + +config IOP310_PMON + bool "Support Intel 80312 Performance Monitor (EXPERIMENTAL)" + depends on ARCH_IOP310 && EXPERIMENTAL + +endmenu + diff -Nru a/arch/arm/mach-iop3xx/Makefile b/arch/arm/mach-iop3xx/Makefile --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/arch/arm/mach-iop3xx/Makefile Sun Apr 6 16:47:46 2003 @@ -0,0 +1,22 @@ +# +# Makefile for the linux kernel. +# + +# Object file lists. + +obj-y := arch.o mm.o xs80200-irq.o iop310-irq.o \ + iop310-pci.o +obj-m := +obj-n := +obj- := + +obj-$(CONFIG_ARCH_IQ80310) += iq80310-pci.o iq80310-irq.o + +ifneq ($(CONFIG_XSCALE_PMU_TIMER),y) +obj-y += iq80310-time.o +endif + +obj-$(CONFIG_IOP310_AAU) += aau.o +obj-$(CONFIG_IOP310_DMA) += dma.o +obj-$(CONFIG_IOP310_MU) += message.o +obj-$(CONFIG_IOP310_PMON) += pmon.o diff -Nru a/arch/arm/mach-iop3xx/arch.c b/arch/arm/mach-iop3xx/arch.c --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/arch/arm/mach-iop3xx/arch.c Tue Apr 1 03:16:36 2003 @@ -0,0 +1,48 @@ +/* + * linux/arch/arm/mach-iop3xx/arch.c + * + * Author: Nicolas Pitre + * Copyright (C) 2001 MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#ifdef CONFIG_ARCH_IQ80310 +extern void iq80310_map_io(void); +extern void iq80310_init_irq(void); + +static void __init +fixup_iq80310(struct machine_desc *desc, struct tag *tags, + char **cmdline, struct meminfo *mi) +{ + system_rev = (*(volatile unsigned int*)0xfe830000) & 0x0f; + + if (system_rev) + system_rev = 0xF; +} + +MACHINE_START(IQ80310, "Cyclone IQ80310") + MAINTAINER("MontaVista Software Inc.") + BOOT_MEM(0xa0000000, 0xfe000000, 0xfe000000) + FIXUP(fixup_iq80310) + MAPIO(iq80310_map_io) + INITIRQ(iq80310_init_irq) +MACHINE_END + +#else +#error No machine descriptor defined for this IOP310 implementation +#endif diff -Nru a/arch/arm/mach-iop3xx/iop310-irq.c b/arch/arm/mach-iop3xx/iop310-irq.c --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/arch/arm/mach-iop3xx/iop310-irq.c Tue Apr 1 03:16:41 2003 @@ -0,0 +1,113 @@ +/* + * linux/arch/arm/mach-iop3xx/iop310-irq.c + * + * Generic IOP310 IRQ handling functionality + * + * Author: Nicolas Pitre + * Copyright: (C) 2001 MontaVista Software Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Added IOP310 chipset and IQ80310 board demuxing, masking code. - DS + * + */ +#include +#include +#include + +#include +#include +#include + +#include + +extern void xs80200_irq_mask(unsigned int); +extern void xs80200_irq_unmask(unsigned int); +extern void xs80200_init_irq(void); + +extern void do_IRQ(int, struct pt_regs *); + +static u32 iop310_mask /* = 0 */; + +static void iop310_irq_mask (unsigned int irq) +{ + iop310_mask ++; + + /* + * No mask bits on the 80312, so we have to + * mask everything from the outside! + */ + if (iop310_mask == 1) { + disable_irq(IRQ_XS80200_EXTIRQ); + irq_desc[IRQ_XS80200_EXTIRQ].chip->mask(IRQ_XS80200_EXTIRQ); + } +} + +static void iop310_irq_unmask (unsigned int irq) +{ + if (iop310_mask) + iop310_mask --; + + /* + * Check if all 80312 sources are unmasked now + */ + if (iop310_mask == 0) + enable_irq(IRQ_XS80200_EXTIRQ); +} + +struct irqchip ext_chip = { + .ack = iop310_irq_mask, + .mask = iop310_irq_mask, + .unmask = iop310_irq_unmask, +}; + +void +iop310_irq_demux(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs) +{ + u32 fiq1isr = *((volatile u32*)IOP310_FIQ1ISR); + u32 fiq2isr = *((volatile u32*)IOP310_FIQ2ISR); + struct irqdesc *d; + unsigned int irqno = 0; + + if(fiq1isr) + { + if(fiq1isr & 0x1) + irqno = IRQ_IOP310_DMA0; + if(fiq1isr & 0x2) + irqno = IRQ_IOP310_DMA1; + if(fiq1isr & 0x4) + irqno = IRQ_IOP310_DMA2; + if(fiq1isr & 0x10) + irqno = IRQ_IOP310_PMON; + if(fiq1isr & 0x20) + irqno = IRQ_IOP310_AAU; + } + else + { + if(fiq2isr & 0x2) + irqno = IRQ_IOP310_I2C; + if(fiq2isr & 0x4) + irqno = IRQ_IOP310_MU; + } + + if (irqno) { + d = irq_desc + irqno; + d->handle(irqno, d, regs); + } +} + +void __init iop310_init_irq(void) +{ + unsigned int i; + + for(i = IOP310_IRQ_OFS; i < NR_IOP310_IRQS; i++) + { + set_irq_chip(i, &ext_chip); + set_irq_handler(i, do_level_IRQ); + set_irq_flags(i, IRQF_VALID | IRQF_PROBE); + } + + xs80200_init_irq(); +} diff -Nru a/arch/arm/mach-iop3xx/iop310-pci.c b/arch/arm/mach-iop3xx/iop310-pci.c --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/arch/arm/mach-iop3xx/iop310-pci.c Tue Apr 1 03:16:43 2003 @@ -0,0 +1,434 @@ +/* + * arch/arm/mach-iop3xx/iop310-pci.c + * + * PCI support for the Intel IOP310 chipset + * + * Matt Porter + * + * Copyright (C) 2001 MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include + +/* + * *** Special note - why the IOP310 should NOT be used *** + * + * The PCI ATU is a brain dead implementation, only allowing 32-bit + * accesses to PCI configuration space. This is especially brain + * dead for writes to this space. A simple for-instance: + * + * You want to modify the command register *without* corrupting the + * status register. + * + * To perform this, you need to read *32* bits of data from offset 4, + * mask off the low 16, replace them with the new data, and write *32* + * bits back. + * + * Writing the status register at offset 6 with status bits set *clears* + * the status. + * + * Hello? Could we have a *SANE* implementation of a PCI ATU some day + * *PLEASE*? + */ +#undef DEBUG +#ifdef DEBUG +#define DBG(x...) printk(x) +#else +#define DBG(x...) do { } while (0) +#endif + +/* + * Calculate the address, etc from the bus, devfn and register + * offset. Note that we have two root buses, so we need some + * method to determine whether we need config type 0 or 1 cycles. + * We use a root bus number in our bus->sysdata structure for this. + */ +static u32 iop310_cfg_address(struct pci_bus *bus, int devfn, int where) +{ + struct pci_sys_data *sys = bus->sysdata; + u32 addr; + + if (sys->busnr == bus->number) + addr = 1 << (PCI_SLOT(devfn) + 16); + else + addr = bus->number << 16 | PCI_SLOT(devfn) << 11 | 1; + + addr |= PCI_FUNC(devfn) << 8 | (where & ~3); + + return addr; +} + +/* + * Primary PCI interface support. + */ +static int iop310_pri_pci_status(void) +{ + unsigned int status; + int ret = 0; + + status = *IOP310_PATUSR; + if (status & 0xf900) { + *IOP310_PATUSR = status & 0xf900; + ret = 1; + } + status = *IOP310_PATUISR; + if (status & 0x0000018f) { + *IOP310_PATUISR = status & 0x0000018f; + ret = 1; + } + status = *IOP310_PSR; + if (status & 0xf900) { + *IOP310_PSR = status & 0xf900; + ret = 1; + } + status = *IOP310_PBISR; + if (status & 0x003f) { + *IOP310_PBISR = status & 0x003f; + ret = 1; + } + return ret; +} + +/* + * Simply write the address register and read the configuration + * data. Note that the 4 nop's ensure that we are able to handle + * a delayed abort (in theory.) + */ +static inline u32 iop310_pri_read(unsigned long addr) +{ + u32 val; + + __asm__ __volatile__( + "str %1, [%2]\n\t" + "ldr %0, [%3]\n\t" + "nop\n\t" + "nop\n\t" + "nop\n\t" + "nop\n\t" + : "=r" (val) + : "r" (addr), "r" (IOP310_POCCAR), "r" (IOP310_POCCDR)); + + return val; +} + +static int +iop310_pri_read_config(struct pci_bus *bus, unsigned int devfn, int where, + int size, u32 *value) +{ + unsigned long addr = iop310_cfg_address(bus, devfn, where); + u32 val = iop310_pri_read(addr) >> ((where & 3) * 8); + + if (iop310_pri_pci_status()) + val = 0xffffffff; + + *value = val; + + return PCIBIOS_SUCCESSFUL; +} + +static int +iop310_pri_write_config(struct pci_bus *bus, unsigned int devfn, int where, + int size, u32 value) +{ + unsigned long addr = iop310_cfg_address(bus, devfn, where); + u32 val; + + if (size != 4) { + val = iop310_pri_read(addr); + if (!iop310_pri_pci_status() == 0) + return PCIBIOS_SUCCESSFUL; + + where = (where & 3) * 8; + + if (size == 1) + val &= ~(0xff << where); + else + val &= ~(0xffff << where); + + *IOP310_POCCDR = val | value << where; + } else { + asm volatile( + "str %1, [%2]\n\t" + "str %0, [%3]\n\t" + "nop\n\t" + "nop\n\t" + "nop\n\t" + "nop\n\t" + : + : "r" (value), "r" (addr), + "r" (IOP310_POCCAR), "r" (IOP310_POCCDR)); + } + + return PCIBIOS_SUCCESSFUL; +} + +static struct pci_ops iop310_primary_ops = { + .read = iop310_pri_read_config, + .write = iop310_pri_write_config, +}; + +/* + * Secondary PCI interface support. + */ +static int iop310_sec_pci_status(void) +{ + unsigned int usr, uisr; + int ret = 0; + + usr = *IOP310_SATUSR; + uisr = *IOP310_SATUISR; + if (usr & 0xf900) { + *IOP310_SATUSR = usr & 0xf900; + ret = 1; + } + if (uisr & 0x0000069f) { + *IOP310_SATUISR = uisr & 0x0000069f; + ret = 1; + } + if (ret) + DBG("ERROR (%08x %08x)", usr, uisr); + return ret; +} + +/* + * Simply write the address register and read the configuration + * data. Note that the 4 nop's ensure that we are able to handle + * a delayed abort (in theory.) + */ +static inline u32 iop310_sec_read(unsigned long addr) +{ + u32 val; + + __asm__ __volatile__( + "str %1, [%2]\n\t" + "ldr %0, [%3]\n\t" + "nop\n\t" + "nop\n\t" + "nop\n\t" + "nop\n\t" + : "=r" (val) + : "r" (addr), "r" (IOP310_SOCCAR), "r" (IOP310_SOCCDR)); + + return val; +} + +static int +iop310_sec_read_config(struct pci_bus *bus, unsigned int devfn, int where, + int size, u32 *value) +{ + unsigned long addr = iop310_cfg_address(bus, devfn, where); + u32 val = iop310_sec_read(addr) >> ((where & 3) * 8); + + if (iop310_sec_pci_status()) + val = 0xffffffff; + + *value = val; + + return PCIBIOS_SUCCESSFUL; +} + +static int +iop310_sec_write_config(struct pci_bus *bus, unsigned int devfn, int where, + int size, u32 value) +{ + unsigned long addr = iop310_cfg_address(bus, devfn, where); + u32 val; + + if (size != 4) { + val = iop310_sec_read(addr); + + if (!iop310_sec_pci_status() == 0) + return PCIBIOS_SUCCESSFUL; + + where = (where & 3) * 8; + + if (size == 1) + val &= ~(0xff << where); + else + val &= ~(0xffff << where); + + *IOP310_SOCCDR = val | value << where; + } else { + asm volatile( + "str %1, [%2]\n\t" + "str %0, [%3]\n\t" + "nop\n\t" + "nop\n\t" + "nop\n\t" + "nop\n\t" + : + : "r" (value), "r" (addr), + "r" (IOP310_SOCCAR), "r" (IOP310_SOCCDR)); + } + + return PCIBIOS_SUCCESSFUL; +} + +static struct pci_ops iop310_secondary_ops = { + .read = iop310_sec_read_config, + .write = iop310_sec_write_config, +}; + +/* + * When a PCI device does not exist during config cycles, the 80200 gets + * an external abort instead of returning 0xffffffff. If it was an + * imprecise abort, we need to correct the return address to point after + * the instruction. Also note that the Xscale manual says: + * + * "if a stall-until-complete LD or ST instruction triggers an + * imprecise fault, then that fault will be seen by the program + * within 3 instructions." + * + * This does not appear to be the case. With 8 NOPs after the load, we + * see the imprecise abort occurring on the STM of iop310_sec_pci_status() + * which is about 10 instructions away. + * + * Always trust reality! + */ +static int +iop310_pci_abort(unsigned long addr, unsigned int fsr, struct pt_regs *regs) +{ + DBG("PCI abort: address = 0x%08lx fsr = 0x%03x PC = 0x%08lx LR = 0x%08lx\n", + addr, fsr, regs->ARM_pc, regs->ARM_lr); + + /* + * If it was an imprecise abort, then we need to correct the + * return address to be _after_ the instruction. + */ + if (fsr & (1 << 10)) + regs->ARM_pc += 4; + + return 0; +} + +/* + * Scan an IOP310 PCI bus. sys->bus defines which bus we scan. + */ +struct pci_bus *iop310_scan_bus(int nr, struct pci_sys_data *sys) +{ + struct pci_ops *ops; + + if (nr) + ops = &iop310_secondary_ops; + else + ops = &iop310_primary_ops; + + return pci_scan_bus(sys->busnr, ops, sys); +} + +/* + * Setup the system data for controller 'nr'. Return 0 if none found, + * 1 if found, or negative error. + * + * We can alter: + * io_offset - offset between IO resources and PCI bus BARs + * mem_offset - offset between mem resources and PCI bus BARs + * resource[0] - parent IO resource + * resource[1] - parent non-prefetchable memory resource + * resource[2] - parent prefetchable memory resource + * swizzle - bridge swizzling function + * map_irq - irq mapping function + * + * Note that 'io_offset' and 'mem_offset' are left as zero since + * the IOP310 doesn't attempt to perform any address translation + * on accesses from the host to the bus. + */ +int iop310_setup(int nr, struct pci_sys_data *sys) +{ + struct resource *res; + + if (nr >= 2) + return 0; + + res = kmalloc(sizeof(struct resource) * 2, GFP_KERNEL); + if (!res) + panic("PCI: unable to alloc resources"); + + memset(res, 0, sizeof(struct resource) * 2); + + switch (nr) { + case 0: + res[0].start = IOP310_PCIPRI_LOWER_IO + 0x6e000000; + res[0].end = IOP310_PCIPRI_LOWER_IO + 0x6e00ffff; + res[0].name = "PCI IO Primary"; + res[0].flags = IORESOURCE_IO; + + res[1].start = IOP310_PCIPRI_LOWER_MEM; + res[1].end = IOP310_PCIPRI_LOWER_MEM + IOP310_PCI_WINDOW_SIZE; + res[1].name = "PCI Memory Primary"; + res[1].flags = IORESOURCE_MEM; + break; + + case 1: + res[0].start = IOP310_PCISEC_LOWER_IO + 0x6e000000; + res[0].end = IOP310_PCISEC_LOWER_IO + 0x6e00ffff; + res[0].name = "PCI IO Secondary"; + res[0].flags = IORESOURCE_IO; + + res[1].start = IOP310_PCISEC_LOWER_MEM; + res[1].end = IOP310_PCISEC_LOWER_MEM + IOP310_PCI_WINDOW_SIZE; + res[1].name = "PCI Memory Secondary"; + res[1].flags = IORESOURCE_MEM; + break; + } + + request_resource(&ioport_resource, &res[0]); + request_resource(&iomem_resource, &res[1]); + + sys->resource[0] = &res[0]; + sys->resource[1] = &res[1]; + sys->resource[2] = NULL; + sys->io_offset = 0x6e000000; + + return 1; +} + +void iop310_init(void) +{ + DBG("PCI: Intel 80312 PCI-to-PCI init code.\n"); + DBG(" ATU secondary: ATUCR =0x%08x\n", *IOP310_ATUCR); + DBG(" ATU secondary: SOMWVR=0x%08x SOIOWVR=0x%08x\n", + *IOP310_SOMWVR, *IOP310_SOIOWVR); + DBG(" ATU secondary: SIABAR=0x%08x SIALR =0x%08x SIATVR=%08x\n", + *IOP310_SIABAR, *IOP310_SIALR, *IOP310_SIATVR); + DBG(" ATU primary: POMWVR=0x%08x POIOWVR=0x%08x\n", + *IOP310_POMWVR, *IOP310_POIOWVR); + DBG(" ATU primary: PIABAR=0x%08x PIALR =0x%08x PIATVR=%08x\n", + *IOP310_PIABAR, *IOP310_PIALR, *IOP310_PIATVR); + DBG(" P2P: PCR=0x%04x BCR=0x%04x EBCR=0x%04x\n", + *IOP310_PCR, *IOP310_BCR, *IOP310_EBCR); + + /* + * Windows have to be carefully opened via a nice set of calls + * here or just some direct register fiddling in the board + * specific init when we want transactions to occur between the + * two PCI hoses. + * + * To do this, we will have manage RETRY assertion between the + * firmware and the kernel. This will ensure that the host + * system's enumeration code is held off until we have tweaked + * the interrupt routing and public/private IDSELs. + * + * For now we will simply default to disabling the integrated type + * 81 P2P bridge. + */ + *IOP310_PCR &= 0xfff8; + + hook_fault_code(16+6, iop310_pci_abort, SIGBUS, "imprecise external abort"); +} diff -Nru a/arch/arm/mach-iop3xx/iq80310-irq.c b/arch/arm/mach-iop3xx/iq80310-irq.c --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/arch/arm/mach-iop3xx/iq80310-irq.c Tue Apr 1 03:16:46 2003 @@ -0,0 +1,141 @@ +/* + * linux/arch/arm/mach-iop3xx/iq80310-irq.c + * + * IRQ hadling/demuxing for IQ80310 board + * + * Author: Nicolas Pitre + * Copyright: (C) 2001 MontaVista Software Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * 2.4.7-rmk1-iop310.1 + * Moved demux from asm to C - DS + * Fixes for various revision boards - DS + */ +#include +#include + +#include +#include +#include +#include + +#include + +extern void iop310_init_irq(void); +extern void iop310_irq_demux(unsigned int, struct irqdesc *, struct pt_regs *); + +static void iq80310_irq_mask(unsigned int irq) +{ + *(volatile char *)IQ80310_INT_MASK |= (1 << (irq - IQ80310_IRQ_OFS)); +} + +static void iq80310_irq_unmask(unsigned int irq) +{ + *(volatile char *)IQ80310_INT_MASK &= ~(1 << (irq - IQ80310_IRQ_OFS)); +} + +static struct irqchip iq80310_irq_chip = { + .ack = iq80310_irq_mask, + .mask = iq80310_irq_mask, + .unmask = iq80310_irq_unmask, +}; + +extern struct irqchip ext_chip; + +static void +iq80310_cpld_irq_handler(unsigned int irq, struct irqdesc *desc, + struct pt_regs *regs) +{ + unsigned int irq_stat = *(volatile u8*)IQ80310_INT_STAT; + unsigned int irq_mask = *(volatile u8*)IQ80310_INT_MASK; + unsigned int i, handled = 0; + struct irqdesc *d; + + desc->chip->ack(irq); + + /* + * Mask out the interrupts which aren't enabled. + */ + irq_stat &= 0x1f & ~irq_mask; + + /* + * Test each IQ80310 CPLD interrupt + */ + for (i = IRQ_IQ80310_TIMER, d = irq_desc + IRQ_IQ80310_TIMER; + irq_stat; i++, d++, irq_stat >>= 1) + if (irq_stat & 1) { + d->handle(i, d, regs); + handled++; + } + + /* + * If running on a board later than REV D.1, we can + * decode the PCI interrupt status. + */ + if (system_rev) { + irq_stat = *((volatile u8*)IQ80310_PCI_INT_STAT) & 7; + + for (i = IRQ_IQ80310_INTA, d = irq_desc + IRQ_IQ80310_INTA; + irq_stat; i++, d++, irq_stat >>= 1) + if (irq_stat & 0x1) { + d->handle(i, d, regs); + handled++; + } + } + + /* + * If on a REV D.1 or lower board, we just assumed INTA + * since PCI is not routed, and it may actually be an + * on-chip interrupt. + * + * Note that we're giving on-chip interrupts slightly + * higher priority than PCI by handling them first. + * + * On boards later than REV D.1, if we didn't read a + * CPLD interrupt, we assume it's from a device on the + * chipset itself. + */ + if (system_rev == 0 || handled == 0) + iop310_irq_demux(irq, desc, regs); + + desc->chip->unmask(irq); +} + +void __init iq80310_init_irq(void) +{ + volatile char *mask = (volatile char *)IQ80310_INT_MASK; + unsigned int i; + + iop310_init_irq(); + + /* + * Setup PIRSR to route PCI interrupts into xs80200 + */ + *IOP310_PIRSR = 0xff; + + /* + * Setup the IRQs in the FE820000/FE860000 registers + */ + for (i = IQ80310_IRQ_OFS; i <= IRQ_IQ80310_INTD; i++) { + set_irq_chip(i, &iq80310_irq_chip); + set_irq_handler(i, do_level_IRQ); + set_irq_flags(i, IRQF_VALID | IRQF_PROBE); + } + + /* + * Setup the PCI IRQs + */ + for (i = IRQ_IQ80310_INTA; i < IRQ_IQ80310_INTC; i++) { + set_irq_chip(i, &ext_chip); + set_irq_handler(i, do_level_IRQ); + set_irq_flags(i, IRQF_VALID); + } + + *mask = 0xff; /* mask all sources */ + + set_irq_chained_handler(IRQ_XS80200_EXTIRQ, + &iq80310_cpld_irq_handler); +} diff -Nru a/arch/arm/mach-iop3xx/iq80310-pci.c b/arch/arm/mach-iop3xx/iq80310-pci.c --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/arch/arm/mach-iop3xx/iq80310-pci.c Tue Apr 1 03:16:49 2003 @@ -0,0 +1,164 @@ +/* + * arch/arm/mach-iop3xx/iq80310-pci.c + * + * PCI support for the Intel IQ80310 reference board + * + * Matt Porter + * + * Copyright (C) 2001 MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include +#include +#include + +#include +#include +#include +#include + +/* + * The following macro is used to lookup irqs in a standard table + * format for those systems that do not already have PCI + * interrupts properly routed. We assume 1 <= pin <= 4 + */ +#define PCI_IRQ_TABLE_LOOKUP(minid,maxid) \ +({ int _ctl_ = -1; \ + unsigned int _idsel = idsel - minid; \ + if (_idsel <= maxid) \ + _ctl_ = pci_irq_table[_idsel][pin-1]; \ + _ctl_; }) + +#define INTA IRQ_IQ80310_INTA +#define INTB IRQ_IQ80310_INTB +#define INTC IRQ_IQ80310_INTC +#define INTD IRQ_IQ80310_INTD + +#define INTE IRQ_IQ80310_I82559 + +typedef u8 irq_table[4]; + +/* + * IRQ tables for primary bus. + * + * On a Rev D.1 and older board, INT A-C are not routed, so we + * just fake it as INTA and than we take care of handling it + * correctly in the IRQ demux routine. + */ +static irq_table pci_pri_d_irq_table[] = { +/* Pin: A B C D */ + { INTA, INTD, INTA, INTA }, /* PCI Slot J3 */ + { INTD, INTA, INTA, INTA }, /* PCI Slot J4 */ +}; + +static irq_table pci_pri_f_irq_table[] = { +/* Pin: A B C D */ + { INTC, INTD, INTA, INTB }, /* PCI Slot J3 */ + { INTD, INTA, INTB, INTC }, /* PCI Slot J4 */ +}; + +static int __init +iq80310_pri_map_irq(struct pci_dev *dev, u8 idsel, u8 pin) +{ + irq_table *pci_irq_table; + + BUG_ON(pin < 1 || pin > 4); + + if (!system_rev) { + pci_irq_table = pci_pri_d_irq_table; + } else { + pci_irq_table = pci_pri_f_irq_table; + } + + return PCI_IRQ_TABLE_LOOKUP(2, 3); +} + +/* + * IRQ tables for secondary bus. + * + * On a Rev D.1 and older board, INT A-C are not routed, so we + * just fake it as INTA and than we take care of handling it + * correctly in the IRQ demux routine. + */ +static irq_table pci_sec_d_irq_table[] = { +/* Pin: A B C D */ + { INTA, INTA, INTA, INTD }, /* PCI Slot J1 */ + { INTA, INTA, INTD, INTA }, /* PCI Slot J5 */ + { INTE, INTE, INTE, INTE }, /* P2P Bridge */ +}; + +static irq_table pci_sec_f_irq_table[] = { +/* Pin: A B C D */ + { INTA, INTB, INTC, INTD }, /* PCI Slot J1 */ + { INTB, INTC, INTD, INTA }, /* PCI Slot J5 */ + { INTE, INTE, INTE, INTE }, /* P2P Bridge */ +}; + +static int __init +iq80310_sec_map_irq(struct pci_dev *dev, u8 idsel, u8 pin) +{ + irq_table *pci_irq_table; + + BUG_ON(pin < 1 || pin > 4); + + if (!system_rev) { + pci_irq_table = pci_sec_d_irq_table; + } else { + pci_irq_table = pci_sec_f_irq_table; + } + + return PCI_IRQ_TABLE_LOOKUP(0, 2); +} + +static int iq80310_pri_host; + +static int iq80310_setup(int nr, struct pci_sys_data *sys) +{ + switch (nr) { + case 0: + if (!iq80310_pri_host) + return 0; + + sys->map_irq = iq80310_pri_map_irq; + break; + + case 1: + sys->map_irq = iq80310_sec_map_irq; + break; + + default: + return 0; + } + + return iop310_setup(nr, sys); +} + +static void iq80310_preinit(void) +{ + iq80310_pri_host = *(volatile u32 *)IQ80310_BACKPLANE & 1; + + printk(KERN_INFO "PCI: IQ80310 is a%s\n", + iq80310_pri_host ? " system controller" : "n agent"); + + iop310_init(); +} + +static struct hw_pci iq80310_pci __initdata = { + .swizzle = pci_std_swizzle, + .nr_controllers = 2, + .setup = iq80310_setup, + .scan = iop310_scan_bus, + .preinit = iq80310_preinit, +}; + +static int __init iq80310_pci_init(void) +{ + if (machine_is_iq80310()) + pci_common_init(&iq80310_pci); + return 0; +} + +subsys_initcall(iq80310_pci_init); diff -Nru a/arch/arm/mach-iop3xx/iq80310-time.c b/arch/arm/mach-iop3xx/iq80310-time.c --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/arch/arm/mach-iop3xx/iq80310-time.c Tue Apr 1 03:16:51 2003 @@ -0,0 +1,134 @@ +/* + * linux/arch/arm/mach-iop3xx/time-iq80310.c + * + * Timer functions for IQ80310 onboard timer + * + * Author: Nicolas Pitre + * Copyright: (C) 2001 MontaVista Software Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +static void iq80310_write_timer (u_long val) +{ + volatile u_char *la0 = (volatile u_char *)IQ80310_TIMER_LA0; + volatile u_char *la1 = (volatile u_char *)IQ80310_TIMER_LA1; + volatile u_char *la2 = (volatile u_char *)IQ80310_TIMER_LA2; + + *la0 = val; + *la1 = val >> 8; + *la2 = (val >> 16) & 0x3f; +} + +static u_long iq80310_read_timer (void) +{ + volatile u_char *la0 = (volatile u_char *)IQ80310_TIMER_LA0; + volatile u_char *la1 = (volatile u_char *)IQ80310_TIMER_LA1; + volatile u_char *la2 = (volatile u_char *)IQ80310_TIMER_LA2; + volatile u_char *la3 = (volatile u_char *)IQ80310_TIMER_LA3; + u_long b0, b1, b2, b3, val; + + b0 = *la0; b1 = *la1; b2 = *la2; b3 = *la3; + b0 = (((b0 & 0x40) >> 1) | (b0 & 0x1f)); + b1 = (((b1 & 0x40) >> 1) | (b1 & 0x1f)); + b2 = (((b2 & 0x40) >> 1) | (b2 & 0x1f)); + b3 = (b3 & 0x0f); + val = ((b0 << 0) | (b1 << 6) | (b2 << 12) | (b3 << 18)); + return val; +} + +/* + * IRQs are disabled before entering here from do_gettimeofday(). + * Note that the counter may wrap. When it does, 'elapsed' will + * be small, but we will have a pending interrupt. + */ +static unsigned long iq80310_gettimeoffset (void) +{ + unsigned long elapsed, usec; + unsigned int stat1, stat2; + + stat1 = *(volatile u8 *)IQ80310_INT_STAT; + elapsed = iq80310_read_timer(); + stat2 = *(volatile u8 *)IQ80310_INT_STAT; + + /* + * If an interrupt was pending before we read the timer, + * we've already wrapped. Factor this into the time. + * If an interrupt was pending after we read the timer, + * it may have wrapped between checking the interrupt + * status and reading the timer. Re-read the timer to + * be sure its value is after the wrap. + */ + if (stat1 & 1) + elapsed += LATCH; + else if (stat2 & 1) + elapsed = LATCH + iq80310_read_timer(); + + /* + * Now convert them to usec. + */ + usec = (unsigned long)(elapsed * (tick_nsec / 1000))/LATCH; + + return usec; +} + + +static void iq80310_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) +{ + volatile u_char *timer_en = (volatile u_char *)IQ80310_TIMER_EN; + + /* clear timer interrupt */ + *timer_en &= ~2; + *timer_en |= 2; + + /* + * AHEM..HACK + * + * Since the timer interrupt is cascaded through the CPLD and + * the 80312 and the demux code calls do_IRQ, the irq count is + * going to be atleast 2 when we get here and this will cause the + * kernel to increment the system tick counter even if we're + * idle. This causes it to look like there's always 100% system + * time, which is not the case. To get around it, we just decrement + * the IRQ count before calling do_timer. We increment it again + * b/c otherwise it will go negative and than bad things happen. + * + * -DS + */ + do_timer(regs); +} + +extern unsigned long (*gettimeoffset)(void); + +static struct irqaction timer_irq = { + .name = "timer", + .handler = iq80310_timer_interrupt, +}; + + +void __init time_init(void) +{ + volatile u_char *timer_en = (volatile u_char *)IQ80310_TIMER_EN; + + gettimeoffset = iq80310_gettimeoffset; + setup_irq(IRQ_IQ80310_TIMER, &timer_irq); + *timer_en = 0; + iq80310_write_timer(LATCH); + *timer_en |= 2; + *timer_en |= 1; +} diff -Nru a/arch/arm/mach-iop3xx/mm.c b/arch/arm/mach-iop3xx/mm.c --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/arch/arm/mach-iop3xx/mm.c Tue Apr 1 03:16:53 2003 @@ -0,0 +1,70 @@ +/* + * linux/arch/arm/mach-iop3xx/mm.c + * + * Low level memory initialization for IOP310 based systems + * + * Author: Nicolas Pitre + * + * Copyright 2000-2001 MontaVista Software Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + */ +#include +#include +#include +#include + +#include +#include +#include + +#include +#include + +#ifdef CONFIG_IOP310_MU +#include "message.h" +#endif + +/* + * Standard IO mapping for all IOP310 based systems + */ +static struct map_desc iop80310_std_desc[] __initdata = { + /* virtual physical length type */ + // IOP310 Memory Mapped Registers + { 0xe8001000, 0x00001000, 0x00001000, MT_DEVICE }, + // PCI I/O Space + { 0xfe000000, 0x90000000, 0x00020000, MT_DEVICE } +}; + +void __init iop310_map_io(void) +{ + iotable_init(iop80310_std_desc, ARRAY_SIZE(iop80310_std_desc)); +} + +/* + * IQ80310 specific IO mappings + */ +#ifdef CONFIG_ARCH_IQ80310 +static struct map_desc iq80310_io_desc[] __initdata = { + /* virtual physical length type */ + // IQ80310 On-Board Devices + { 0xfe800000, 0xfe800000, 0x00100000, MT_DEVICE } +}; + +void __init iq80310_map_io(void) +{ +#ifdef CONFIG_IOP310_MU + /* acquiring 1MB of memory aligned on 1MB boundary for MU */ + mu_mem = __alloc_bootmem(0x100000, 0x100000, 0); +#endif + + iop310_map_io(); + + iotable_init(iq80310_io_desc, ARRAY_SIZE(iq80310_io_desc)); +} +#endif // CONFIG_ARCH_IQ80310 + diff -Nru a/arch/arm/mach-iop3xx/xs80200-irq.c b/arch/arm/mach-iop3xx/xs80200-irq.c --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/arch/arm/mach-iop3xx/xs80200-irq.c Tue Apr 1 03:16:55 2003 @@ -0,0 +1,65 @@ +/* + * linux/arch/arm/mach-iop3xx/xs80200-irq.c + * + * Generic IRQ handling for the XS80200 XScale core. + * + * Author: Nicolas Pitre + * Copyright: (C) 2001 MontaVista Software Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include +#include + +#include +#include +#include + +#include + +static void xs80200_irq_mask (unsigned int irq) +{ + unsigned long intctl; + asm ("mrc p13, 0, %0, c0, c0, 0" : "=r" (intctl)); + switch (irq) { + case IRQ_XS80200_BCU: intctl &= ~(1<<3); break; + case IRQ_XS80200_PMU: intctl &= ~(1<<2); break; + case IRQ_XS80200_EXTIRQ: intctl &= ~(1<<1); break; + case IRQ_XS80200_EXTFIQ: intctl &= ~(1<<0); break; + } + asm ("mcr p13, 0, %0, c0, c0, 0" : : "r" (intctl)); +} + +static void xs80200_irq_unmask (unsigned int irq) +{ + unsigned long intctl; + asm ("mrc p13, 0, %0, c0, c0, 0" : "=r" (intctl)); + switch (irq) { + case IRQ_XS80200_BCU: intctl |= (1<<3); break; + case IRQ_XS80200_PMU: intctl |= (1<<2); break; + case IRQ_XS80200_EXTIRQ: intctl |= (1<<1); break; + case IRQ_XS80200_EXTFIQ: intctl |= (1<<0); break; + } + asm ("mcr p13, 0, %0, c0, c0, 0" : : "r" (intctl)); +} + +static struct irqchip xs80200_chip = { + .ack = xs80200_irq_mask, + .mask = xs80200_irq_mask, + .unmask = xs80200_irq_unmask, +}; + +void __init xs80200_init_irq(void) +{ + unsigned int i; + + asm("mcr p13, 0, %0, c0, c0, 0" : : "r" (0)); + + for (i = 0; i < NR_XS80200_IRQS; i++) { + set_irq_chip(i, &xs80200_chip); + set_irq_handler(i, do_level_IRQ); + set_irq_flags(i, IRQF_VALID); + } +} diff -Nru a/arch/arm/mach-sa1100/badge4.c b/arch/arm/mach-sa1100/badge4.c --- a/arch/arm/mach-sa1100/badge4.c Fri Oct 11 07:48:01 2002 +++ b/arch/arm/mach-sa1100/badge4.c Wed Nov 13 17:07:17 2002 @@ -186,11 +186,26 @@ {0xf4000000, 0x48000000, 0x00100000, MT_DEVICE } /* SA-1111 */ }; +static void +badge4_uart_pm(struct uart_port *port, u_int state, u_int oldstate) +{ + if (!state) { + Ser1SDCR0 |= SDCR0_UART; + } +} + +static struct sa1100_port_fns badge4_port_fns __initdata = { + //.get_mctrl = badge4_get_mctrl, + //.set_mctrl = badge4_set_mctrl, + .pm = badge4_uart_pm, +}; + static void __init badge4_map_io(void) { sa1100_map_io(); iotable_init(badge4_io_desc, ARRAY_SIZE(badge4_io_desc)); + sa1100_register_uart_fns(&badge4_port_fns); sa1100_register_uart(0, 3); sa1100_register_uart(1, 1); } diff -Nru a/arch/arm/mm/copypage-xscale.S b/arch/arm/mm/copypage-xscale.S --- a/arch/arm/mm/copypage-xscale.S Sat Oct 19 17:10:44 2002 +++ b/arch/arm/mm/copypage-xscale.S Fri Mar 7 07:40:48 2003 @@ -39,11 +39,25 @@ mov r0, r1 bl map_page_minicache mov r1, r5 - mov lr, #PAGE_SZ/32 + mov lr, #PAGE_SZ/64-1 -1: mov ip, r1 - ldrd r2, [r0], #8 + /* + * Strangely enough, best performance is achieved + * when prefetching destination as well. (NP) + */ + pld [r0, #0] + pld [r0, #32] + pld [r1, #0] + pld [r1, #32] + +1: pld [r0, #64] + pld [r0, #96] + pld [r1, #64] + pld [r1, #96] + +2: ldrd r2, [r0], #8 ldrd r4, [r0], #8 + mov ip, r1 strd r2, [r1], #8 ldrd r2, [r0], #8 strd r4, [r1], #8 @@ -51,9 +65,21 @@ strd r2, [r1], #8 strd r4, [r1], #8 mcr p15, 0, ip, c7, c10, 1 @ clean D line + ldrd r2, [r0], #8 mcr p15, 0, ip, c7, c6, 1 @ invalidate D line + ldrd r4, [r0], #8 + mov ip, r1 + strd r2, [r1], #8 + ldrd r2, [r0], #8 + strd r4, [r1], #8 + ldrd r4, [r0], #8 + strd r2, [r1], #8 + strd r4, [r1], #8 + mcr p15, 0, ip, c7, c10, 1 @ clean D line subs lr, lr, #1 - bne 1b + mcr p15, 0, ip, c7, c6, 1 @ invalidate D line + bgt 1b + beq 2b ldmfd sp!, {r4, r5, pc} @@ -64,7 +90,6 @@ * r1 = virtual user address of ultimate destination page */ ENTRY(xscale_mc_clear_user_page) - str lr, [sp, #-4]! mov r1, #PAGE_SZ/32 mov r2, #0 mov r3, #0 @@ -74,10 +99,10 @@ strd r2, [r0], #8 strd r2, [r0], #8 mcr p15, 0, ip, c7, c10, 1 @ clean D line - mcr p15, 0, ip, c7, c6, 1 @ invalidate D line subs r1, r1, #1 + mcr p15, 0, ip, c7, c6, 1 @ invalidate D line bne 1b - ldr pc, [sp], #4 + mov pc, lr __INIT diff -Nru a/arch/arm/mm/extable.c b/arch/arm/mm/extable.c --- a/arch/arm/mm/extable.c Sun Jan 12 08:31:30 2003 +++ b/arch/arm/mm/extable.c Sat Apr 12 16:00:02 2003 @@ -1,7 +1,7 @@ /* * linux/arch/arm/mm/extable.c */ -#include +#include #include const struct exception_table_entry * @@ -23,4 +23,15 @@ last = mid-1; } return NULL; +} + +int fixup_exception(struct pt_regs *regs) +{ + const struct exception_table_entry *fixup; + + fixup = search_exception_tables(instruction_pointer(regs)); + if (fixup) + regs->ARM_pc = fixup->fixup; + + return fixup != NULL; } diff -Nru a/arch/arm/mm/fault-common.c b/arch/arm/mm/fault-common.c --- a/arch/arm/mm/fault-common.c Thu Mar 6 08:19:03 2003 +++ b/arch/arm/mm/fault-common.c Sat Apr 12 16:00:02 2003 @@ -25,6 +25,7 @@ #include #include +#include #include "fault.h" @@ -103,20 +104,11 @@ __do_kernel_fault(struct mm_struct *mm, unsigned long addr, unsigned int fsr, struct pt_regs *regs) { - const struct exception_table_entry *fixup; - /* * Are we prepared to handle this kernel fault? */ - fixup = search_exception_tables(instruction_pointer(regs)); - if (fixup) { -#ifdef DEBUG - printk(KERN_DEBUG "%s: Exception at [<%lx>] addr=%lx (fixup: %lx)\n", - current->comm, regs->ARM_pc, addr, fixup->fixup); -#endif - regs->ARM_pc = fixup->fixup; + if (fixup_exception(regs)) return; - } /* * No handler, we'll have to terminate things with extreme prejudice. diff -Nru a/arch/arm/nwfpe/fpmodule.h b/arch/arm/nwfpe/fpmodule.h --- a/arch/arm/nwfpe/fpmodule.h Tue Feb 5 09:40:30 2002 +++ b/arch/arm/nwfpe/fpmodule.h Thu Mar 27 02:19:24 2003 @@ -17,21 +17,15 @@ You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + + 27/03/03 Ian Molton Clean up CONFIG_CPU */ #ifndef __FPMODULE_H__ #define __FPMODULE_H__ -#include - -#ifdef CONFIG_CPU_32 #define REG_ORIG_R0 17 #define REG_CPSR 16 -#else -#define REG_ORIG_R0 16 -#define REG_CPSR 15 -#endif - #define REG_PC 15 #define REG_LR 14 #define REG_SP 13 diff -Nru a/arch/arm/vmlinux-armo.lds.in b/arch/arm/vmlinux-armo.lds.in --- a/arch/arm/vmlinux-armo.lds.in Fri Feb 14 14:36:57 2003 +++ b/arch/arm/vmlinux-armo.lds.in Wed Apr 2 00:42:56 2003 @@ -14,7 +14,9 @@ .init : { /* Init code and data */ _stext = .; __init_begin = .; + _sinittext = .; *(.init.text) + _einittext = .; __proc_info_begin = .; *(.proc.info) __proc_info_end = .; diff -Nru a/arch/arm/vmlinux-armv.lds.in b/arch/arm/vmlinux-armv.lds.in --- a/arch/arm/vmlinux-armv.lds.in Wed Feb 19 07:21:37 2003 +++ b/arch/arm/vmlinux-armv.lds.in Wed Apr 2 00:42:56 2003 @@ -18,7 +18,9 @@ .init : { /* Init code and data */ _stext = .; __init_begin = .; + _sinittext = .; *(.init.text) + _einittext = .; __proc_info_begin = .; *(.proc.info) __proc_info_end = .; diff -Nru a/arch/i386/Kconfig b/arch/i386/Kconfig --- a/arch/i386/Kconfig Mon Mar 17 21:33:21 2003 +++ b/arch/i386/Kconfig Fri Apr 4 07:22:18 2003 @@ -142,7 +142,7 @@ config M486 bool "486" help - Select this for a x486 processor, ether Intel or one of the + Select this for a 486 series processor, either Intel or one of the compatible processors from AMD, Cyrix, IBM, or Intel. Includes DX, DX2, and DX4 variants; also SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or U5S. @@ -150,8 +150,8 @@ config M586 bool "586/K5/5x86/6x86/6x86MX" help - Select this for an x586 or x686 processor such as the AMD K5, the - Intel 5x86 or 6x86, or the Intel 6x86MX. This choice does not + Select this for an 586 or 686 series processor such as the AMD K5, + the Intel 5x86 or 6x86, or the Intel 6x86MX. This choice does not assume the RDTSC (Read Time Stamp Counter) instruction. config M586TSC @@ -226,28 +226,28 @@ config MCRUSOE bool "Crusoe" help - Select this for Transmeta Crusoe processor. Treats the processor + Select this for a Transmeta Crusoe processor. Treats the processor like a 586 with TSC, and sets some GCC optimization flags (like a Pentium Pro with no alignment requirements). config MWINCHIPC6 bool "Winchip-C6" help - Select this for a IDT Winchip C6 chip. Linux and GCC + Select this for an IDT Winchip C6 chip. Linux and GCC treat this chip as a 586TSC with some extended instructions and alignment requirements. config MWINCHIP2 bool "Winchip-2" help - Select this for a IDT Winchip-2. Linux and GCC + Select this for an IDT Winchip-2. Linux and GCC treat this chip as a 586TSC with some extended instructions and alignment requirements. config MWINCHIP3D bool "Winchip-2A/Winchip-3" help - Select this for a IDT Winchip-2A or 3. Linux and GCC + Select this for an IDT Winchip-2A or 3. Linux and GCC treat this chip as a 586TSC with some extended instructions and alignment reqirements. Development kernels also enable out of order memory stores for this CPU, which can increase @@ -260,15 +260,15 @@ treat this chip as a generic 586. Whilst the CPU is 686 class, it lacks the cmov extension which gcc assumes is present when generating 686 code. - Note, that Nehemiah (Model 9) and above will not boot with this - kernel due to them lacking the 3dnow instructions used in earlier + Note that Nehemiah (Model 9) and above will not boot with this + kernel due to them lacking the 3DNow! instructions used in earlier incarnations of the CPU. config MVIAC3_2 bool "VIA C3-2 (Nehemiah)" help - Select this for a VIA C3 "Nehemiah". Selecting this enables usage of SSE - and tells gcc to treat the CPU as a 686. + Select this for a VIA C3 "Nehemiah". Selecting this enables usage + of SSE and tells gcc to treat the CPU as a 686. Note, this kernel will not boot on older (pre model 9) C3s. endchoice @@ -435,7 +435,8 @@ enable and use it. If you say Y here even though your machine doesn't have a local APIC, then the kernel will still run with no slowdown at all. The local APIC supports CPU-generated self-interrupts (timer, - performance counters), and the NMI watchdog which detects hard lockups. + performance counters), and the NMI watchdog which detects hard + lockups. If you have a system with several CPUs, you do not need to say Y here: the local APIC will be used automatically. @@ -522,7 +523,7 @@ ---help--- This adds a driver to safely access the System Management Mode of the CPU on Toshiba portables with a genuine Toshiba BIOS. It does - not work on models with a Pheonix BIOS. The System Management Mode + not work on models with a Phoenix BIOS. The System Management Mode is used to set the BIOS and power saving options on Toshiba portables. For information on utilities to make use of this driver see the diff -Nru a/arch/i386/boot/compressed/misc.c b/arch/i386/boot/compressed/misc.c --- a/arch/i386/boot/compressed/misc.c Sat Dec 28 09:18:50 2002 +++ b/arch/i386/boot/compressed/misc.c Thu Apr 10 11:17:39 2003 @@ -12,6 +12,7 @@ #include #include #include +#include