## Automatically generated incremental diff ## From: linux-2.6.11-rc3 ## To: linux-2.6.11-rc4 ## Robot: $Id: make-incremental-diff,v 1.12 2004/01/06 07:19:36 hpa Exp $ diff -urN linux-2.6.11-rc3/CREDITS linux-2.6.11-rc4/CREDITS --- linux-2.6.11-rc3/CREDITS 2005-02-12 19:50:34.175687535 -0800 +++ linux-2.6.11-rc4/CREDITS 2005-02-12 19:50:51.889454401 -0800 @@ -1811,7 +1811,8 @@ N: Greg Kroah-Hartman E: greg@kroah.com -W: http://www.kroah.com/linux-usb/ +E: gregkh@suse.de +W: http://www.kroah.com/linux/ D: USB Serial Converter driver framework, USB Handspring Visor driver D: ConnectTech WHITEHeat USB driver, Generic USB Serial driver D: USB I/O Edgeport driver, USB Serial IrDA driver @@ -1819,6 +1820,7 @@ D: bits and pieces of USB core code. D: PCI Hotplug core, PCI Hotplug Compaq driver modifications D: portions of the Linux Security Module (LSM) framework +D: parts of the driver core, debugfs. N: Russell Kroll E: rkroll@exploits.org @@ -2023,12 +2025,14 @@ N: Michal Ludvig E: michal@logix.cz +E: michal.ludvig@asterisk.co.nz W: http://www.logix.cz/michal P: 1024D/C45B2218 1162 6471 D391 76E0 9F99 29DA 0C3A 2509 C45B 2218 D: VIA PadLock driver D: Netfilter pkttype module -S: Prague 4 -S: Czech Republic +S: Asterisk Ltd. +S: Auckland +S: New Zealand N: Tuomas J. Lukka E: Tuomas.Lukka@Helsinki.FI diff -urN linux-2.6.11-rc3/Documentation/atomic_ops.txt linux-2.6.11-rc4/Documentation/atomic_ops.txt --- linux-2.6.11-rc3/Documentation/atomic_ops.txt 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.6.11-rc4/Documentation/atomic_ops.txt 2005-02-12 19:50:51.973458038 -0800 @@ -0,0 +1,456 @@ + Semantics and Behavior of Atomic and + Bitmask Operations + + David S. Miller + + This document is intended to serve as a guide to Linux port +maintainers on how to implement atomic counter, bitops, and spinlock +interfaces properly. + + The atomic_t type should be defined as a signed integer. +Also, it should be made opaque such that any kind of cast to a normal +C integer type will fail. Something like the following should +suffice: + + typedef struct { volatile int counter; } atomic_t; + + The first operations to implement for atomic_t's are the +initializers and plain reads. + + #define ATOMIC_INIT(i) { (i) } + #define atomic_set(v, i) ((v)->counter = (i)) + +The first macro is used in definitions, such as: + +static atomic_t my_counter = ATOMIC_INIT(1); + +The second interface can be used at runtime, as in: + + struct foo { atomic_t counter; }; + ... + + struct foo *k; + + k = kmalloc(sizeof(*k), GFP_KERNEL); + if (!k) + return -ENOMEM; + atomic_set(&k->counter, 0); + +Next, we have: + + #define atomic_read(v) ((v)->counter) + +which simply reads the current value of the counter. + +Now, we move onto the actual atomic operation interfaces. + + void atomic_add(int i, atomic_t *v); + void atomic_sub(int i, atomic_t *v); + void atomic_inc(atomic_t *v); + void atomic_dec(atomic_t *v); + +These four routines add and subtract integral values to/from the given +atomic_t value. The first two routines pass explicit integers by +which to make the adjustment, whereas the latter two use an implicit +adjustment value of "1". + +One very important aspect of these two routines is that they DO NOT +require any explicit memory barriers. They need only perform the +atomic_t counter update in an SMP safe manner. + +Next, we have: + + int atomic_inc_return(atomic_t *v); + int atomic_dec_return(atomic_t *v); + +These routines add 1 and subtract 1, respectively, from the given +atomic_t and return the new counter value after the operation is +performed. + +Unlike the above routines, it is required that explicit memory +barriers are performed before and after the operation. It must be +done such that all memory operations before and after the atomic +operation calls are strongly ordered with respect to the atomic +operation itself. + +For example, it should behave as if a smp_mb() call existed both +before and after the atomic operation. + +If the atomic instructions used in an implementation provide explicit +memory barrier semantics which satisfy the above requirements, that is +fine as well. + +Let's move on: + + int atomic_add_return(int i, atomic_t *v); + int atomic_sub_return(int i, atomic_t *v); + +These behave just like atomic_{inc,dec}_return() except that an +explicit counter adjustment is given instead of the implicit "1". +This means that like atomic_{inc,dec}_return(), the memory barrier +semantics are required. + +Next: + + int atomic_inc_and_test(atomic_t *v); + int atomic_dec_and_test(atomic_t *v); + +These two routines increment and decrement by 1, respectively, the +given atomic counter. They return a boolean indicating whether the +resulting counter value was zero or not. + +It requires explicit memory barrier semantics around the operation as +above. + + int atomic_sub_and_test(int i, atomic_t *v); + +This is identical to atomic_dec_and_test() except that an explicit +decrement is given instead of the implicit "1". It requires explicit +memory barrier semantics around the operation. + + int atomic_add_negative(int i, atomic_t *v); + +The given increment is added to the given atomic counter value. A +boolean is return which indicates whether the resulting counter value +is negative. It requires explicit memory barrier semantics around the +operation. + +If a caller requires memory barrier semantics around an atomic_t +operation which does not return a value, a set of interfaces are +defined which accomplish this: + + void smp_mb__before_atomic_dec(void); + void smp_mb__after_atomic_dec(void); + void smp_mb__before_atomic_inc(void); + void smp_mb__after_atomic_dec(void); + +For example, smp_mb__before_atomic_dec() can be used like so: + + obj->dead = 1; + smp_mb__before_atomic_dec(); + atomic_dec(&obj->ref_count); + +It makes sure that all memory operations preceeding the atomic_dec() +call are strongly ordered with respect to the atomic counter +operation. In the above example, it guarentees that the assignment of +"1" to obj->dead will be globally visible to other cpus before the +atomic counter decrement. + +Without the explicitl smp_mb__before_atomic_dec() call, the +implementation could legally allow the atomic counter update visible +to other cpus before the "obj->dead = 1;" assignment. + +The other three interfaces listed are used to provide explicit +ordering with respect to memory operations after an atomic_dec() call +(smp_mb__after_atomic_dec()) and around atomic_inc() calls +(smp_mb__{before,after}_atomic_inc()). + +A missing memory barrier in the cases where they are required by the +atomic_t implementation above can have disasterous results. Here is +an example, which follows a pattern occuring frequently in the Linux +kernel. It is the use of atomic counters to implement reference +counting, and it works such that once the counter falls to zero it can +be guarenteed that no other entity can be accessing the object: + +static void obj_list_add(struct obj *obj) +{ + obj->active = 1; + list_add(&obj->list); +} + +static void obj_list_del(struct obj *obj) +{ + list_del(&obj->list); + obj->active = 0; +} + +static void obj_destroy(struct obj *obj) +{ + BUG_ON(obj->active); + kfree(obj); +} + +struct obj *obj_list_peek(struct list_head *head) +{ + if (!list_empty(head)) { + struct obj *obj; + + obj = list_entry(head->next, struct obj, list); + atomic_inc(&obj->refcnt); + return obj; + } + return NULL; +} + +void obj_poke(void) +{ + struct obj *obj; + + spin_lock(&global_list_lock); + obj = obj_list_peek(&global_list); + spin_unlock(&global_list_lock); + + if (obj) { + obj->ops->poke(obj); + if (atomic_dec_and_test(&obj->refcnt)) + obj_destroy(obj); + } +} + +void obj_timeout(struct obj *obj) +{ + spin_lock(&global_list_lock); + obj_list_del(obj); + spin_unlock(&global_list_lock); + + if (atomic_dec_and_test(&obj->refcnt)) + obj_destroy(obj); +} + +(This is a simplification of the ARP queue management in the + generic neighbour discover code of the networking. Olaf Kirch + found a bug wrt. memory barriers in kfree_skb() that exposed + the atomic_t memory barrier requirements quite clearly.) + +Given the above scheme, it must be the case that the obj->active +update done by the obj list deletion be visible to other processors +before the atomic counter decrement is performed. + +Otherwise, the counter could fall to zero, yet obj->active would still +be set, thus triggering the assertion in obj_destroy(). The error +sequence looks like this: + + cpu 0 cpu 1 + obj_poke() obj_timeout() + obj = obj_list_peek(); + ... gains ref to obj, refcnt=2 + obj_list_del(obj); + obj->active = 0 ... + ... visibility delayed ... + atomic_dec_and_test() + ... refcnt drops to 1 ... + atomic_dec_and_test() + ... refcount drops to 0 ... + obj_destroy() + BUG() triggers since obj->active + still seen as one + obj->active update visibility occurs + +With the memory barrier semantics required of the atomic_t operations +which return values, the above sequence of memory visibility can never +happen. Specifically, in the above case the atomic_dec_and_test() +counter decrement would not become globally visible until the +obj->active update does. + +As a historical note, 32-bit Sparc used to only allow usage of +24-bits of it's atomic_t type. This was because it used 8 bits +as a spinlock for SMP safety. Sparc32 lacked a "compare and swap" +type instruction. However, 32-bit Sparc has since been moved over +to a "hash table of spinlocks" scheme, that allows the full 32-bit +counter to be realized. Essentially, an array of spinlocks are +indexed into based upon the address of the atomic_t being operated +on, and that lock protects the atomic operation. Parisc uses the +same scheme. + +Another note is that the atomic_t operations returning values are +extremely slow on an old 386. + +We will now cover the atomic bitmask operations. You will find that +their SMP and memory barrier semantics are similar in shape and scope +to the atomic_t ops above. + +Native atomic bit operations are defined to operate on objects aligned +to the size of an "unsigned long" C data type, and are least of that +size. The endianness of the bits within each "unsigned long" are the +native endianness of the cpu. + + void set_bit(unsigned long nr, volatils unsigned long *addr); + void clear_bit(unsigned long nr, volatils unsigned long *addr); + void change_bit(unsigned long nr, volatils unsigned long *addr); + +These routines set, clear, and change, respectively, the bit number +indicated by "nr" on the bit mask pointed to by "ADDR". + +They must execute atomically, yet there are no implicit memory barrier +semantics required of these interfaces. + + int test_and_set_bit(unsigned long nr, volatils unsigned long *addr); + int test_and_clear_bit(unsigned long nr, volatils unsigned long *addr); + int test_and_change_bit(unsigned long nr, volatils unsigned long *addr); + +Like the above, except that these routines return a boolean which +indicates whether the changed bit was set _BEFORE_ the atomic bit +operation. + +WARNING! It is incredibly important that the value be a boolean, +ie. "0" or "1". Do not try to be fancy and save a few instructions by +declaring the above to return "long" and just returning something like +"old_val & mask" because that will not work. + +For one thing, this return value gets truncated to int in many code +paths using these interfaces, so on 64-bit if the bit is set in the +upper 32-bits then testers will never see that. + +One great example of where this problem crops up are the thread_info +flag operations. Routines such as test_and_set_ti_thread_flag() chop +the return value into an int. There are other places where things +like this occur as well. + +These routines, like the atomic_t counter operations returning values, +require explicit memory barrier semantics around their execution. All +memory operations before the atomic bit operation call must be made +visible globally before the atomic bit operation is made visible. +Likewise, the atomic bit operation must be visible globally before any +subsequent memory operation is made visible. For example: + + obj->dead = 1; + if (test_and_set_bit(0, &obj->flags)) + /* ... */; + obj->killed = 1; + +The implementation of test_and_set_bit() must guarentee that +"obj->dead = 1;" is visible to cpus before the atomic memory operation +done by test_and_set_bit() becomes visible. Likewise, the atomic +memory operation done by test_and_set_bit() must become visible before +"obj->killed = 1;" is visible. + +Finally there is the basic operation: + + int test_bit(unsigned long nr, __const__ volatile unsigned long *addr); + +Which returns a boolean indicating if bit "nr" is set in the bitmask +pointed to by "addr". + +If explicit memory barriers are required around clear_bit() (which +does not return a value, and thus does not need to provide memory +barrier semantics), two interfaces are provided: + + void smp_mb__before_clear_bit(void); + void smp_mb__after_clear_bit(void); + +They are used as follows, and are akin to their atomic_t operation +brothers: + + /* All memory operations before this call will + * be globally visible before the clear_bit(). + */ + smp_mb__before_clear_bit(); + clear_bit( ... ); + + /* The clear_bit() will be visible before all + * subsequent memory operations. + */ + smp_mb__after_clear_bit(); + +Finally, there are non-atomic versions of the bitmask operations +provided. They are used in contexts where some other higher-level SMP +locking scheme is being used to protect the bitmask, and thus less +expensive non-atomic operations may be used in the implementation. +They have names similar to the above bitmask operation interfaces, +except that two underscores are prefixed to the interface name. + + void __set_bit(unsigned long nr, volatile unsigned long *addr); + void __clear_bit(unsigned long nr, volatile unsigned long *addr); + void __change_bit(unsigned long nr, volatile unsigned long *addr); + int __test_and_set_bit(unsigned long nr, volatile unsigned long *addr); + int __test_and_clear_bit(unsigned long nr, volatile unsigned long *addr); + int __test_and_change_bit(unsigned long nr, volatile unsigned long *addr); + +These non-atomic variants also do not require any special memory +barrier semantics. + +The routines xchg() and cmpxchg() need the same exact memory barriers +as the atomic and bit operations returning values. + +Spinlocks and rwlocks have memory barrier expectations as well. +The rule to follow is simple: + +1) When acquiring a lock, the implementation must make it globally + visible before any subsequent memory operation. + +2) When releasing a lock, the implementation must make it such that + all previous memory operations are globally visible before the + lock release. + +Which finally brings us to _atomic_dec_and_lock(). There is an +architecture-neutral version implemented in lib/dec_and_lock.c, +but most platforms will wish to optimize this in assembler. + + int _atomic_dec_and_lock(atomic_t *atomic, spinlock_t *lock); + +Atomically decrement the given counter, and if will drop to zero +atomically acquire the given spinlock and perform the decrement +of the counter to zero. If it does not drop to zero, do nothing +with the spinlock. + +It is actually pretty simple to get the memory barrier correct. +Simply satisfy the spinlock grab requirements, which is make +sure the spinlock operation is globally visible before any +subsequent memory operation. + +We can demonstrate this operation more clearly if we define +an abstract atomic operation: + + long cas(long *mem, long old, long new); + +"cas" stands for "compare and swap". It atomically: + +1) Compares "old" with the value currently at "mem". +2) If they are equal, "new" is written to "mem". +3) Regardless, the current value at "mem" is returned. + +As an example usage, here is what an atomic counter update +might look like: + +void example_atomic_inc(long *counter) +{ + long old, new, ret; + + while (1) { + old = *counter; + new = old + 1; + + ret = cas(counter, old, new); + if (ret == old) + break; + } +} + +Let's use cas() in order to build a pseudo-C atomic_dec_and_lock(): + +int _atomic_dec_and_lock(atomic_t *atomic, spinlock_t *lock) +{ + long old, new, ret; + int went_to_zero; + + went_to_zero = 0; + while (1) { + old = atomic_read(atomic); + new = old - 1; + if (new == 0) { + went_to_zero = 1; + spin_lock(lock); + } + ret = cas(atomic, old, new); + if (ret == old) + break; + if (went_to_zero) { + spin_unlock(lock); + went_to_zero = 0; + } + } + + return went_to_zero; +} + +Now, as far as memory barriers go, as long as spin_lock() +strictly orders all subsequent memory operations (including +the cas()) with respect to itself, things will be fine. + +Said another way, _atomic_dec_and_lock() must guarentee that +a counter dropping to zero is never made visible before the +spinlock being acquired. + +Note that this also means that for the case where the counter +is not dropping to zero, there are no memory ordering +requirements. diff -urN linux-2.6.11-rc3/Documentation/filesystems/proc.txt linux-2.6.11-rc4/Documentation/filesystems/proc.txt --- linux-2.6.11-rc3/Documentation/filesystems/proc.txt 2004-12-24 13:34:29.000000000 -0800 +++ linux-2.6.11-rc4/Documentation/filesystems/proc.txt 2005-02-12 19:50:52.095463319 -0800 @@ -1709,12 +1709,13 @@ Writing to this file results in a flush of the routing cache. -gc_elasticity, gc_interval, gc_min_interval, gc_tresh, gc_timeout, -gc_thresh, gc_thresh1, gc_thresh2, gc_thresh3 --------------------------------------------------------------- +gc_elasticity, gc_interval, gc_min_interval_ms, gc_timeout, gc_thresh +--------------------------------------------------------------------- Values to control the frequency and behavior of the garbage collection -algorithm for the routing cache. +algorithm for the routing cache. gc_min_interval is deprecated and replaced +by gc_min_interval_ms. + max_size -------- diff -urN linux-2.6.11-rc3/Documentation/kernel-parameters.txt linux-2.6.11-rc4/Documentation/kernel-parameters.txt --- linux-2.6.11-rc3/Documentation/kernel-parameters.txt 2005-02-12 19:50:34.452699528 -0800 +++ linux-2.6.11-rc4/Documentation/kernel-parameters.txt 2005-02-12 19:50:52.175466783 -0800 @@ -1363,9 +1363,6 @@ tipar.delay= [HW,PPT] Set inter-bit delay in microseconds (default 10). - tiusb= [HW,USB] Texas Instruments' USB GraphLink (aka SilverLink) - Format: - tmc8xx= [HW,SCSI] See header of drivers/scsi/seagate.c. diff -urN linux-2.6.11-rc3/Documentation/nommu-mmap.txt linux-2.6.11-rc4/Documentation/nommu-mmap.txt --- linux-2.6.11-rc3/Documentation/nommu-mmap.txt 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.6.11-rc4/Documentation/nommu-mmap.txt 2005-02-12 19:50:52.207468168 -0800 @@ -0,0 +1,141 @@ + ============================= + NO-MMU MEMORY MAPPING SUPPORT + ============================= + +The kernel has limited support for memory mapping under no-MMU conditions, such +as are used in uClinux environments. From the userspace point of view, memory +mapping is made use of in conjunction with the mmap() system call, the shmat() +call and the execve() system call. From the kernel's point of view, execve() +mapping is actually performed by the binfmt drivers, which call back into the +mmap() routines to do the actual work. + +Memory mapping behaviour also involves the way fork(), vfork(), clone() and +ptrace() work. Under uClinux there is no fork(), and clone() must be supplied +the CLONE_VM flag. + +The behaviour is similar between the MMU and no-MMU cases, but not identical; +and it's also much more restricted in the latter case: + + (*) Anonymous mapping, MAP_PRIVATE + + In the MMU case: VM regions backed by arbitrary pages; copy-on-write + across fork. + + In the no-MMU case: VM regions backed by arbitrary contiguous runs of + pages. + + (*) Anonymous mapping, MAP_SHARED + + These behave very much like private mappings, except that they're + shared across fork() or clone() without CLONE_VM in the MMU case. Since + the no-MMU case doesn't support these, behaviour is identical to + MAP_PRIVATE there. + + (*) File, MAP_PRIVATE, PROT_READ / PROT_EXEC, !PROT_WRITE + + In the MMU case: VM regions backed by pages read from file; changes to + the underlying file are reflected in the mapping; copied across fork. + + In the no-MMU case: VM regions backed by arbitrary contiguous runs of + pages into which the appropriate bit of the file is read; any remaining + bit of the mapping is cleared; such mappings are shared if possible; + writes to the file do not affect the mapping; writes to the mapping are + visible in other processes (no MMU protection), but should not happen. + + (*) File, MAP_PRIVATE, PROT_READ / PROT_EXEC, PROT_WRITE + + In the MMU case: like the non-PROT_WRITE case, except that the pages in + question get copied before the write actually happens. From that point + on writes to that page in the file no longer get reflected into the + mapping's backing pages. + + In the no-MMU case: works exactly as for the non-PROT_WRITE case. + + (*) Regular file / blockdev, MAP_SHARED, PROT_READ / PROT_EXEC / PROT_WRITE + + In the MMU case: VM regions backed by pages read from file; changes to + pages written back to file; writes to file reflected into pages backing + mapping; shared across fork. + + In the no-MMU case: not supported. + + (*) Memory backed regular file, MAP_SHARED, PROT_READ / PROT_EXEC / PROT_WRITE + + In the MMU case: As for ordinary regular files. + + In the no-MMU case: The filesystem providing the memory-backed file + (such as ramfs or tmpfs) may choose to honour an open, truncate, mmap + sequence by providing a contiguous sequence of pages to map. In that + case, a shared-writable memory mapping will be possible. It will work + as for the MMU case. If the filesystem does not provide any such + support, then the mapping request will be denied. + + (*) Memory backed chardev, MAP_SHARED, PROT_READ / PROT_EXEC / PROT_WRITE + + In the MMU case: As for ordinary regular files. + + In the no-MMU case: The character device driver may choose to honour + the mmap() by providing direct access to the underlying device if it + provides memory or quasi-memory that can be accessed directly. Examples + of such are frame buffers and flash devices. If the driver does not + provide any such support, then the mapping request will be denied. + + +============================ +FURTHER NOTES ON NO-MMU MMAP +============================ + + (*) A request for a private mapping of less than a page in size may not return + a page-aligned buffer. This is because the kernel calls kmalloc() to + allocate the buffer, not get_free_page(). + + (*) A list of all the mappings on the system is visible through /proc/maps in + no-MMU mode. + + (*) Supplying MAP_FIXED or a requesting a particular mapping address will + result in an error. + + (*) Files mapped privately must have a read method provided by the driver or + filesystem so that the contents can be read into the memory allocated. An + error will result if they don't. This is most likely to be encountered + with character device files, pipes, fifos and sockets. + + +============================================ +PROVIDING SHAREABLE CHARACTER DEVICE SUPPORT +============================================ + +To provide shareable character device support, a driver must provide a +file->f_op->get_unmapped_area() operation. The mmap() routines will call this +to get a proposed address for the mapping. This may return an error if it +doesn't wish to honour the mapping because it's too long, at a weird offset, +under some unsupported combination of flags or whatever. + +The vm_ops->close() routine will be invoked when the last mapping on a chardev +is removed. An existing mapping will be shared, partially or not, if possible +without notifying the driver. + +It is permitted also for the file->f_op->get_unmapped_area() operation to +return -ENOSYS. This will be taken to mean that this operation just doesn't +want to handle it, despite the fact it's got an operation. For instance, it +might try directing the call to a secondary driver which turns out not to +implement it. Such is the case for the framebuffer driver which attempts to +direct the call to the device-specific driver. + + +============================================== +PROVIDING SHAREABLE MEMORY-BACKED FILE SUPPORT +============================================== + +Provision of shared mappings on memory backed files is similar to the provision +of support for shared mapped character devices. The main difference is that the +filesystem providing the service will probably allocate a contiguous collection +of pages and permit mappings to be made on that. + +It is recommended that a truncate operation applied to such a file that +increases the file size, if that file is empty, be taken as a request to gather +enough pages to honour a mapping. This is required to support POSIX shared +memory. + +Memory backed devices are indicated by the mapping's backing device info having +the memory_backed flag set. diff -urN linux-2.6.11-rc3/Documentation/scsi/ChangeLog.megaraid linux-2.6.11-rc4/Documentation/scsi/ChangeLog.megaraid --- linux-2.6.11-rc3/Documentation/scsi/ChangeLog.megaraid 2004-12-24 13:35:39.000000000 -0800 +++ linux-2.6.11-rc4/Documentation/scsi/ChangeLog.megaraid 2005-02-12 19:50:52.257470333 -0800 @@ -1,3 +1,105 @@ +Release Date : Thu Feb 03 12:27:22 EST 2005 - Seokmann Ju +Current Version : 2.20.4.5 (scsi module), 2.20.2.5 (cmm module) +Older Version : 2.20.4.4 (scsi module), 2.20.2.4 (cmm module) + +1. Modified name of two attributes in scsi_host_template. + On Wed, 2005-02-02 at 10:56 -0500, Ju, Seokmann wrote: + > + .sdev_attrs = megaraid_device_attrs, + > + .shost_attrs = megaraid_class_device_attrs, + + These are, perhaps, slightly confusing names. + The terms device and class_device have well defined meanings in the + generic device model, neither of which is what you mean here. + Why not simply megaraid_sdev_attrs and megaraid_shost_attrs? + + Other than this, it looks fine to me too. + +Release Date : Thu Jan 27 00:01:03 EST 2005 - Atul Mukker +Current Version : 2.20.4.4 (scsi module), 2.20.2.5 (cmm module) +Older Version : 2.20.4.3 (scsi module), 2.20.2.4 (cmm module) + +1. Bump up the version of scsi module due to its conflict. + +Release Date : Thu Jan 21 00:01:03 EST 2005 - Atul Mukker +Current Version : 2.20.4.3 (scsi module), 2.20.2.5 (cmm module) +Older Version : 2.20.4.2 (scsi module), 2.20.2.4 (cmm module) + +1. Remove driver ioctl for logical drive to scsi address translation and + replace with the sysfs attribute. To remove drives and change + capacity, application shall now use the device attribute to get the + logical drive number for a scsi device. For adding newly created + logical drives, class device attribute would be required to uniquely + identify each controller. + - Atul Mukker + + "James, I've been thinking about this a little more, and you may be on + to something here. Let each driver add files as such:" + + - Matt Domsch , 12.15.2004 + linux-scsi mailing list + + + "Then, if you simply publish your LD number as an extra parameter of + the device, you can look through /sys to find it." + + - James Bottomley , 01.03.2005 + linux-scsi mailing list + + + "I don't see why not ... it's your driver, you can publish whatever + extra information you need as scsi_device attributes; that was one of + the designs of the extensible attribute system." + + - James Bottomley , 01.06.2005 + linux-scsi mailing list + +2. Add AMI megaraid support - Brian King + PCI_VENDOR_ID_AMI, PCI_DEVICE_ID_AMI_MEGARAID3, + PCI_VENDOR_ID_AMI, PCI_SUBSYS_ID_PERC3_DC, + +3. Make some code static - Adrian Bunk + Date: Mon, 15 Nov 2004 03:14:57 +0100 + + The patch below makes some needlessly global code static. + -wait_queue_head_t wait_q; + +static wait_queue_head_t wait_q; + + Signed-off-by: Adrian Bunk + +4. Added NEC ROMB support - NEC MegaRAID PCI Express ROMB controller + PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_MEGARAID_NEC_ROMB_2E, + PCI_SUBSYS_ID_NEC, PCI_SUBSYS_ID_MEGARAID_NEC_ROMB_2E, + +5. Fixed Tape drive issue : For any Direct CDB command to physical device + including tape, timeout value set by driver was 10 minutes. With this + value, most of command will return within timeout. However, for those + command like ERASE or FORMAT, it takes more than an hour depends on + capacity of the device and the command could be terminated before it + completes. + To address this issue, the 'timeout' field in the DCDB command will + have NO TIMEOUT (i.e., 4) value as its timeout on DCDB command. + + + +Release Date : Thu Dec 9 19:10:23 EST 2004 + - Sreenivas Bagalkote + +Current Version : 2.20.4.2 (scsi module), 2.20.2.4 (cmm module) +Older Version : 2.20.4.1 (scsi module), 2.20.2.3 (cmm module) + +i. Introduced driver ioctl that returns scsi address for a given ld. + + "Why can't the existing sysfs interfaces be used to do this?" + - Brian King (brking@us.ibm.com) + + "I've looked into solving this another way, but I cannot see how + to get this driver-private mapping of logical drive number-> HCTL + without putting code something like this into the driver." + + "...and by providing a mapping a function to userspace, the driver + is free to change its mapping algorithm in the future if necessary .." + - Matt Domsch (Matt_Domsch@dell.com) + Release Date : Thu Dec 9 19:02:14 EST 2004 - Sreenivas Bagalkote Current Version : 2.20.4.1 (scsi module), 2.20.2.3 (cmm module) @@ -13,7 +115,7 @@ i. Handle IOCTL cmd timeouts more properly. ii. pci_dma_sync_{sg,single}_for_cpu was introduced into megaraid_mbox - incorrectly (instead of _for_device). Changed to appropriate + incorrectly (instead of _for_device). Changed to appropriate pci_dma_sync_{sg,single}_for_device. Release Date : Wed Oct 06 11:15:29 EDT 2004 - Sreenivas Bagalkote diff -urN linux-2.6.11-rc3/Documentation/usb/silverlink.txt linux-2.6.11-rc4/Documentation/usb/silverlink.txt --- linux-2.6.11-rc3/Documentation/usb/silverlink.txt 2004-12-24 13:34:31.000000000 -0800 +++ linux-2.6.11-rc4/Documentation/usb/silverlink.txt 1969-12-31 16:00:00.000000000 -0800 @@ -1,78 +0,0 @@ -------------------------------------------------------------------------- -Readme for Linux device driver for the Texas Instruments SilverLink cable -and direct USB cable provided by some TI's handhelds. -------------------------------------------------------------------------- - -Author: Romain Liévin & Julien Blache -Homepage: http://lpg.ticalc.org/prj_usb - -INTRODUCTION: - -This is a driver for the TI-GRAPH LINK USB (aka SilverLink) cable, a cable -designed by TI for connecting their TI8x/9x calculators to a computer -(PC or Mac usually). It has been extended to support the USB port offered by -some latest TI handhelds (TI84+ and TI89 Titanium). - -If you need more information, please visit the 'SilverLink drivers' homepage -at the above URL. - -WHAT YOU NEED: - -A TI calculator of course and a program capable to communicate with your -calculator. -TiLP will work for sure (since I am his developer !). yal92 may be able to use -it by changing tidev for tiglusb (may require some hacking...). - -HOW TO USE IT: - -You must have first compiled USB support, support for your specific USB host -controller (UHCI or OHCI). - -Next, (as root) from your appropriate modules directory (lib/modules/2.5.XX): - - insmod usb/usbcore.o - insmod usb/usb-uhci.o insmod usb/ohci-hcd.o - insmod tiglusb.o - -If it is not already there (it usually is), create the device: - - mknod /dev/tiglusb0 c 115 16 - -You will have to set permissions on this device to allow you to read/write -from it: - - chmod 666 /dev/tiglusb0 - -Now you are ready to run a linking program such as TiLP. Be sure to configure -it properly (RTFM). - -MODULE PARAMETERS: - - You can set these with: insmod tiglusb NAME=VALUE - There is currently no way to set these on a per-cable basis. - - NAME: timeout - TYPE: integer - DEFAULT: 15 - DESC: Timeout value in tenth of seconds. If no data is available once this - time has expired then the driver will return with a timeout error. - -QUIRKS: - -The following problem seems to be specific to the link cable since it appears -on all platforms (Linux, Windows, Mac OS-X). - -In some very particular cases, the driver returns with success but -without any data. The application should retry a read operation at least once. - -HOW TO CONTACT US: - -You can email me at roms@lpg.ticalc.org. Please prefix the subject line -with "TIGLUSB: " so that I am certain to notice your message. -You can also mail JB at jb@jblache.org: he has written the first release of -this driver but he better knows the Mac OS-X driver. - -CREDITS: - -The code is based on dabusb.c, printer.c and scanner.c ! -The driver has been developed independently of Texas Instruments Inc. diff -urN linux-2.6.11-rc3/MAINTAINERS linux-2.6.11-rc4/MAINTAINERS --- linux-2.6.11-rc3/MAINTAINERS 2005-02-12 19:50:34.817715330 -0800 +++ linux-2.6.11-rc4/MAINTAINERS 2005-02-12 19:50:52.377475528 -0800 @@ -749,7 +749,7 @@ DRIVER CORE, KOBJECTS, AND SYSFS P: Greg Kroah-Hartman -M: greg@kroah.com +M: gregkh@suse.de L: linux-kernel@vger.kernel.org S: Supported @@ -1744,13 +1744,14 @@ PCI SUBSYSTEM P: Greg Kroah-Hartman -M: greg@kroah.com +M: gregkh@suse.de L: linux-kernel@vger.kernel.org +L: linux-pci@atrey.karlin.mff.cuni.cz S: Supported PCI HOTPLUG CORE P: Greg Kroah-Hartman -M: greg@kroah.com +M: gregkh@suse.de S: Supported PCI HOTPLUG COMPAQ DRIVER @@ -2184,13 +2185,6 @@ M: hch@infradead.org S: Maintained -TI GRAPH LINK USB (SilverLink) CABLE DRIVER -P: Romain Lievin -M: roms@lpg.ticalc.org -P: Julien Blache -M: jb@technologeek.org -S: Maintained - TI PARALLEL LINK CABLE DRIVER P: Romain Lievin M: roms@lpg.ticalc.org @@ -2392,11 +2386,10 @@ USB SERIAL DRIVER P: Greg Kroah-Hartman -M: greg@kroah.com +M: gregkh@suse.de L: linux-usb-users@lists.sourceforge.net L: linux-usb-devel@lists.sourceforge.net -S: Maintained -W: http://www.kroah.com/linux-usb/ +S: Supported USB SERIAL BELKIN F5U103 DRIVER P: William Greathouse @@ -2458,7 +2451,7 @@ USB SUBSYSTEM P: Greg Kroah-Hartman -M: greg@kroah.com +M: gregkh@suse.de L: linux-usb-users@lists.sourceforge.net L: linux-usb-devel@lists.sourceforge.net W: http://www.linux-usb.org diff -urN linux-2.6.11-rc3/Makefile linux-2.6.11-rc4/Makefile --- linux-2.6.11-rc3/Makefile 2005-02-12 19:50:34.818715373 -0800 +++ linux-2.6.11-rc4/Makefile 2005-02-12 19:50:52.378475572 -0800 @@ -1,7 +1,7 @@ VERSION = 2 PATCHLEVEL = 6 SUBLEVEL = 11 -EXTRAVERSION =-rc3 +EXTRAVERSION =-rc4 NAME=Woozy Numbat # *DOCUMENTATION* diff -urN linux-2.6.11-rc3/arch/arm/boot/compressed/ofw-shark.c linux-2.6.11-rc4/arch/arm/boot/compressed/ofw-shark.c --- linux-2.6.11-rc3/arch/arm/boot/compressed/ofw-shark.c 2004-12-24 13:34:45.000000000 -0800 +++ linux-2.6.11-rc4/arch/arm/boot/compressed/ofw-shark.c 2005-02-12 19:50:52.416477217 -0800 @@ -24,6 +24,8 @@ int j,i,m,k,nr_banks,size; unsigned char *c; + k = 0; + /* Head of the taglist */ tag->hdr.tag = ATAG_CORE; tag->hdr.size = tag_size(tag_core); diff -urN linux-2.6.11-rc3/arch/arm/common/via82c505.c linux-2.6.11-rc4/arch/arm/common/via82c505.c --- linux-2.6.11-rc3/arch/arm/common/via82c505.c 2004-12-24 13:33:49.000000000 -0800 +++ linux-2.6.11-rc4/arch/arm/common/via82c505.c 2005-02-12 19:50:52.420477390 -0800 @@ -59,7 +59,7 @@ .write = via82c505_write_config, }; -void __init via82c505_preinit(void *sysdata) +void __init via82c505_preinit(void) { printk(KERN_DEBUG "PCI: VIA 82c505\n"); if (!request_region(0xA8,2,"via config")) { diff -urN linux-2.6.11-rc3/arch/arm/kernel/calls.S linux-2.6.11-rc4/arch/arm/kernel/calls.S --- linux-2.6.11-rc3/arch/arm/kernel/calls.S 2005-02-12 19:50:34.881718101 -0800 +++ linux-2.6.11-rc4/arch/arm/kernel/calls.S 2005-02-12 19:50:52.442478342 -0800 @@ -134,7 +134,7 @@ .long sys_ipc .long sys_fsync .long sys_sigreturn_wrapper -/* 120 */ .long sys_clone_wapper +/* 120 */ .long sys_clone_wrapper .long sys_setdomainname .long sys_newuname .long sys_ni_syscall @@ -254,7 +254,7 @@ .long sys_fremovexattr .long sys_tkill .long sys_sendfile64 -/* 240 */ .long sys_futex +/* 240 */ .long sys_futex_wrapper .long sys_sched_setaffinity .long sys_sched_getaffinity .long sys_io_setup diff -urN linux-2.6.11-rc3/arch/arm/kernel/entry-armv.S linux-2.6.11-rc4/arch/arm/kernel/entry-armv.S --- linux-2.6.11-rc3/arch/arm/kernel/entry-armv.S 2005-02-12 19:50:34.887718360 -0800 +++ linux-2.6.11-rc4/arch/arm/kernel/entry-armv.S 2005-02-12 19:50:52.447478559 -0800 @@ -379,8 +379,6 @@ .previous /* - * r0 = instruction. - * * Check whether the instruction is a co-processor instruction. * If yes, we need to call the relevant co-processor handler. * @@ -391,8 +389,9 @@ * for the ARM6/ARM7 SWI bug. * * Emulators may wish to make use of the following registers: - * r0 - instruction opcode. - * r10 - this threads thread_info structure. + * r0 = instruction opcode. + * r2 = PC+4 + * r10 = this threads thread_info structure. */ call_fpe: tst r0, #0x08000000 @ only CDP/CPRT/LDC/STC have bit 27 @@ -447,7 +446,7 @@ /* * The FP module is called with these registers set: * r0 = instruction - * r5 = PC + * r2 = PC+4 * r9 = normal "successful" return address * r10 = FP workspace * lr = unrecognised FP instruction return address diff -urN linux-2.6.11-rc3/arch/arm/kernel/entry-common.S linux-2.6.11-rc4/arch/arm/kernel/entry-common.S --- linux-2.6.11-rc3/arch/arm/kernel/entry-common.S 2005-02-12 19:50:34.887718360 -0800 +++ linux-2.6.11-rc4/arch/arm/kernel/entry-common.S 2005-02-12 19:50:52.448478602 -0800 @@ -11,6 +11,7 @@ #include #include +#include #include "entry-header.S" @@ -190,13 +191,14 @@ .type sys_syscall, #function sys_syscall: eor scno, r0, #OS_NUMBER << 20 - cmp scno, #NR_syscalls @ check range - stmleia sp, {r5, r6} @ shuffle args - movle r0, r1 - movle r1, r2 - movle r2, r3 - movle r3, r4 - ldrle pc, [tbl, scno, lsl #2] + cmp scno, #__NR_syscall - __NR_SYSCALL_BASE + cmpne scno, #NR_syscalls @ check range + stmloia sp, {r5, r6} @ shuffle args + movlo r0, r1 + movlo r1, r2 + movlo r2, r3 + movlo r3, r4 + ldrlo pc, [tbl, scno, lsl #2] b sys_ni_syscall sys_fork_wrapper: @@ -211,7 +213,7 @@ add r3, sp, #S_OFF b sys_execve -sys_clone_wapper: +sys_clone_wrapper: add ip, sp, #S_OFF str ip, [sp, #4] b sys_clone @@ -236,6 +238,10 @@ ldr r2, [sp, #S_OFF + S_SP] b do_sigaltstack +sys_futex_wrapper: + str r5, [sp, #4] @ push sixth arg + b sys_futex + /* * Note: off_4k (r5) is always units of 4K. If we can't do the requested * offset, we return EINVAL. diff -urN linux-2.6.11-rc3/arch/arm/mach-h720x/Kconfig linux-2.6.11-rc4/arch/arm/mach-h720x/Kconfig --- linux-2.6.11-rc3/arch/arm/mach-h720x/Kconfig 2004-12-24 13:33:47.000000000 -0800 +++ linux-2.6.11-rc4/arch/arm/mach-h720x/Kconfig 2005-02-12 19:50:52.481480031 -0800 @@ -27,5 +27,12 @@ bool help Select code specific to h7202 variants +config H7202_SERIAL23 + depends on CPU_H7202 + bool "Use serial ports 2+3" + help + Say Y here if you wish to use serial ports 2+3. They share their + pins with the keyboard matrix controller, so you have to decide. + endif diff -urN linux-2.6.11-rc3/arch/arm/mach-h720x/cpu-h7202.c linux-2.6.11-rc4/arch/arm/mach-h720x/cpu-h7202.c --- linux-2.6.11-rc3/arch/arm/mach-h720x/cpu-h7202.c 2004-12-24 13:34:58.000000000 -0800 +++ linux-2.6.11-rc4/arch/arm/mach-h720x/cpu-h7202.c 2005-02-12 19:50:52.482480074 -0800 @@ -5,7 +5,7 @@ * 2003 Robert Schwebel * 2004 Sascha Hauer * - * processor specific stuff for the Hynix h7201 + * processor specific stuff for the Hynix h7202 * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -48,7 +48,8 @@ static struct plat_serial8250_port serial_platform_data[] = { { - .membase = SERIAL0_BASE, + .membase = (void*)SERIAL0_VIRT, + .mapbase = SERIAL0_BASE, .irq = IRQ_UART0, .uartclk = 2*1843200, .regshift = 2, @@ -56,15 +57,18 @@ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, }, { - .membase = SERIAL1_BASE, + .membase = (void*)SERIAL1_VIRT, + .mapbase = SERIAL1_BASE, .irq = IRQ_UART1, .uartclk = 2*1843200, .regshift = 2, .iotype = UPIO_MEM, .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, }, +#ifdef CONFIG_H7202_SERIAL23 { - .membase = SERIAL2_BASE, + .membase = (void*)SERIAL2_VIRT, + .mapbase = SERIAL2_BASE, .irq = IRQ_UART2, .uartclk = 2*1843200, .regshift = 2, @@ -72,13 +76,15 @@ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, }, { - .membase = SERIAL3_BASE, + .membase = (void*)SERIAL3_VIRT, + .mapbase = SERIAL3_BASE, .irq = IRQ_UART3, .uartclk = 2*1843200, .regshift = 2, .iotype = UPIO_MEM, .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, }, +#endif { }, }; @@ -210,5 +216,13 @@ /* Enable clocks */ CPU_REG (PMU_BASE, PMU_PLL_CTRL) |= PLL_2_EN | PLL_1_EN | PLL_3_MUTE; + CPU_REG (SERIAL0_VIRT, SERIAL_ENABLE) = SERIAL_ENABLE_EN; + CPU_REG (SERIAL1_VIRT, SERIAL_ENABLE) = SERIAL_ENABLE_EN; +#ifdef CONFIG_H7202_SERIAL23 + CPU_REG (SERIAL2_VIRT, SERIAL_ENABLE) = SERIAL_ENABLE_EN; + CPU_REG (SERIAL3_VIRT, SERIAL_ENABLE) = SERIAL_ENABLE_EN; + CPU_IO (GPIO_AMULSEL) = AMULSEL_USIN2 | AMULSEL_USOUT2 | + AMULSEL_USIN3 | AMULSEL_USOUT3; +#endif (void) platform_add_devices(devices, ARRAY_SIZE(devices)); } diff -urN linux-2.6.11-rc3/arch/arm/mach-pxa/lubbock.c linux-2.6.11-rc4/arch/arm/mach-pxa/lubbock.c --- linux-2.6.11-rc3/arch/arm/mach-pxa/lubbock.c 2004-12-24 13:35:50.000000000 -0800 +++ linux-2.6.11-rc4/arch/arm/mach-pxa/lubbock.c 2005-02-12 19:50:52.524481892 -0800 @@ -29,12 +29,13 @@ #include #include +#include + #include #include #include #include #include -#include #include "generic.h" diff -urN linux-2.6.11-rc3/arch/arm/mach-shark/core.c linux-2.6.11-rc4/arch/arm/mach-shark/core.c --- linux-2.6.11-rc3/arch/arm/mach-shark/core.c 2004-12-24 13:35:15.000000000 -0800 +++ linux-2.6.11-rc4/arch/arm/mach-shark/core.c 2005-02-12 19:50:52.538482499 -0800 @@ -93,8 +93,6 @@ */ static void __init shark_timer_init(void) { - unsigned long flags; - outb(0x34, 0x43); /* binary, mode 0, LSB/MSB, Ch 0 */ outb(HZ_TIME & 0xff, 0x40); /* LSB of count */ outb(HZ_TIME >> 8, 0x40); diff -urN linux-2.6.11-rc3/arch/arm/mach-shark/irq.c linux-2.6.11-rc4/arch/arm/mach-shark/irq.c --- linux-2.6.11-rc3/arch/arm/mach-shark/irq.c 2004-12-24 13:35:23.000000000 -0800 +++ linux-2.6.11-rc4/arch/arm/mach-shark/irq.c 2005-02-12 19:50:52.539482542 -0800 @@ -61,9 +61,10 @@ static void shark_ack_8259A_irq(unsigned int irq){} -static void bogus_int(int irq, void *dev_id, struct pt_regs *regs) +static irqreturn_t bogus_int(int irq, void *dev_id, struct pt_regs *regs) { printk("Got interrupt %i!\n",irq); + return IRQ_NONE; } static struct irqaction cascade; @@ -103,7 +104,6 @@ cascade.handler = bogus_int; cascade.flags = 0; - cascade.mask = 0; cascade.name = "cascade"; cascade.next = NULL; cascade.dev_id = NULL; diff -urN linux-2.6.11-rc3/arch/arm/mach-shark/pci.c linux-2.6.11-rc4/arch/arm/mach-shark/pci.c --- linux-2.6.11-rc3/arch/arm/mach-shark/pci.c 2004-12-24 13:34:30.000000000 -0800 +++ linux-2.6.11-rc4/arch/arm/mach-shark/pci.c 2005-02-12 19:50:52.540482585 -0800 @@ -21,7 +21,7 @@ else return 255; } -extern void __init via82c505_preinit(void *sysdata); +extern void __init via82c505_preinit(void); static struct hw_pci shark_pci __initdata = { .setup = via82c505_setup, @@ -29,7 +29,7 @@ .map_irq = shark_map_irq, .nr_controllers = 1, .scan = via82c505_scan_bus, - .preinit = via82c505_preinit + .preinit = via82c505_preinit, }; static int __init shark_pci_init(void) diff -urN linux-2.6.11-rc3/arch/arm/mm/alignment.c linux-2.6.11-rc4/arch/arm/mm/alignment.c --- linux-2.6.11-rc3/arch/arm/mm/alignment.c 2005-02-12 19:50:34.947720958 -0800 +++ linux-2.6.11-rc4/arch/arm/mm/alignment.c 2005-02-12 19:50:52.543482715 -0800 @@ -133,6 +133,18 @@ #define TYPE_LDST 2 #define TYPE_DONE 3 +#ifdef __ARMEB__ +#define BE 1 +#define FIRST_BYTE_16 "mov %1, %1, ror #8\n" +#define FIRST_BYTE_32 "mov %1, %1, ror #24\n" +#define NEXT_BYTE "ror #24" +#else +#define BE 0 +#define FIRST_BYTE_16 +#define FIRST_BYTE_32 +#define NEXT_BYTE "lsr #8" +#endif + #define __get8_unaligned_check(ins,val,addr,err) \ __asm__( \ "1: "ins" %1, [%2], #1\n" \ @@ -152,9 +164,10 @@ #define __get16_unaligned_check(ins,val,addr) \ do { \ unsigned int err = 0, v, a = addr; \ - __get8_unaligned_check(ins,val,a,err); \ __get8_unaligned_check(ins,v,a,err); \ - val |= v << 8; \ + val = v << ((BE) ? 8 : 0); \ + __get8_unaligned_check(ins,v,a,err); \ + val |= v << ((BE) ? 0 : 8); \ if (err) \ goto fault; \ } while (0) @@ -168,13 +181,14 @@ #define __get32_unaligned_check(ins,val,addr) \ do { \ unsigned int err = 0, v, a = addr; \ - __get8_unaligned_check(ins,val,a,err); \ __get8_unaligned_check(ins,v,a,err); \ - val |= v << 8; \ + val = v << ((BE) ? 24 : 0); \ + __get8_unaligned_check(ins,v,a,err); \ + val |= v << ((BE) ? 16 : 8); \ __get8_unaligned_check(ins,v,a,err); \ - val |= v << 16; \ + val |= v << ((BE) ? 8 : 16); \ __get8_unaligned_check(ins,v,a,err); \ - val |= v << 24; \ + val |= v << ((BE) ? 0 : 24); \ if (err) \ goto fault; \ } while (0) @@ -188,9 +202,9 @@ #define __put16_unaligned_check(ins,val,addr) \ do { \ unsigned int err = 0, v = val, a = addr; \ - __asm__( \ + __asm__( FIRST_BYTE_16 \ "1: "ins" %1, [%2], #1\n" \ - " mov %1, %1, lsr #8\n" \ + " mov %1, %1, "NEXT_BYTE"\n" \ "2: "ins" %1, [%2]\n" \ "3:\n" \ " .section .fixup,\"ax\"\n" \ @@ -218,13 +232,13 @@ #define __put32_unaligned_check(ins,val,addr) \ do { \ unsigned int err = 0, v = val, a = addr; \ - __asm__( \ + __asm__( FIRST_BYTE_32 \ "1: "ins" %1, [%2], #1\n" \ - " mov %1, %1, lsr #8\n" \ + " mov %1, %1, "NEXT_BYTE"\n" \ "2: "ins" %1, [%2], #1\n" \ - " mov %1, %1, lsr #8\n" \ + " mov %1, %1, "NEXT_BYTE"\n" \ "3: "ins" %1, [%2], #1\n" \ - " mov %1, %1, lsr #8\n" \ + " mov %1, %1, "NEXT_BYTE"\n" \ "4: "ins" %1, [%2]\n" \ "5:\n" \ " .section .fixup,\"ax\"\n" \ diff -urN linux-2.6.11-rc3/arch/arm/mm/tlb-v4.S linux-2.6.11-rc4/arch/arm/mm/tlb-v4.S --- linux-2.6.11-rc3/arch/arm/mm/tlb-v4.S 2004-12-24 13:34:30.000000000 -0800 +++ linux-2.6.11-rc4/arch/arm/mm/tlb-v4.S 2005-02-12 19:50:52.558483364 -0800 @@ -44,7 +44,7 @@ mov pc, lr /* - * v4_flush_kerm_tlb_range(start, end) + * v4_flush_kern_tlb_range(start, end) * * Invalidate a range of TLB entries in the specified kernel * address range. diff -urN linux-2.6.11-rc3/arch/arm/mm/tlb-v4wb.S linux-2.6.11-rc4/arch/arm/mm/tlb-v4wb.S --- linux-2.6.11-rc3/arch/arm/mm/tlb-v4wb.S 2004-12-24 13:34:30.000000000 -0800 +++ linux-2.6.11-rc4/arch/arm/mm/tlb-v4wb.S 2005-02-12 19:50:52.559483408 -0800 @@ -47,7 +47,7 @@ mov pc, lr /* - * v4_flush_kerm_tlb_range(start, end) + * v4_flush_kern_tlb_range(start, end) * * Invalidate a range of TLB entries in the specified kernel * address range. diff -urN linux-2.6.11-rc3/arch/arm/oprofile/common.c linux-2.6.11-rc4/arch/arm/oprofile/common.c --- linux-2.6.11-rc3/arch/arm/oprofile/common.c 2005-02-12 19:50:34.960721521 -0800 +++ linux-2.6.11-rc4/arch/arm/oprofile/common.c 2005-02-12 19:50:52.559483408 -0800 @@ -11,6 +11,7 @@ #include #include #include +#include #include "op_counter.h" #include "op_arm_model.h" @@ -25,6 +26,26 @@ static int pmu_create_files(struct super_block *, struct dentry *); #ifdef CONFIG_PM +static int pmu_suspend(struct sys_device *dev, u32 state) +{ + if (pmu_enabled) + pmu_stop(); + return 0; +} + +static int pmu_resume(struct sys_device *dev) +{ + if (pmu_enabled) + pmu_start(); + return 0; +} + +static struct sysdev_class oprofile_sysclass = { + set_kset_name("oprofile"), + .resume = pmu_resume, + .suspend = pmu_suspend, +}; + static struct sys_device device_oprofile = { .id = 0, .cls = &oprofile_sysclass, @@ -35,14 +56,14 @@ int ret; if (!(ret = sysdev_class_register(&oprofile_sysclass))) - ret = sys_device_register(&device_oprofile); + ret = sysdev_register(&device_oprofile); return ret; } -static void __exit exit_driverfs(void) +static void exit_driverfs(void) { - sys_device_unregister(&device_oprofile); + sysdev_unregister(&device_oprofile); sysdev_class_unregister(&oprofile_sysclass); } #else @@ -105,8 +126,7 @@ up(&pmu_sem); } -int __init -pmu_init(struct oprofile_operations *ops, struct op_arm_model_spec *spec) +int __init pmu_init(struct oprofile_operations *ops, struct op_arm_model_spec *spec) { init_MUTEX(&pmu_sem); diff -urN linux-2.6.11-rc3/arch/arm/oprofile/op_arm_model.h linux-2.6.11-rc4/arch/arm/oprofile/op_arm_model.h --- linux-2.6.11-rc3/arch/arm/oprofile/op_arm_model.h 2004-12-24 13:35:00.000000000 -0800 +++ linux-2.6.11-rc4/arch/arm/oprofile/op_arm_model.h 2005-02-12 19:50:52.560483451 -0800 @@ -24,6 +24,6 @@ extern struct op_arm_model_spec op_xscale_spec; #endif -extern int pmu_init(struct oprofile_operations **ops, struct op_arm_model_spec *spec); +extern int __init pmu_init(struct oprofile_operations *ops, struct op_arm_model_spec *spec); extern void pmu_exit(void); #endif /* OP_ARM_MODEL_H */ diff -urN linux-2.6.11-rc3/arch/arm/oprofile/op_model_xscale.c linux-2.6.11-rc4/arch/arm/oprofile/op_model_xscale.c --- linux-2.6.11-rc3/arch/arm/oprofile/op_model_xscale.c 2005-02-12 19:50:34.961721564 -0800 +++ linux-2.6.11-rc4/arch/arm/oprofile/op_model_xscale.c 2005-02-12 19:50:52.561483494 -0800 @@ -42,6 +42,9 @@ #ifdef CONFIG_ARCH_IOP331 #define XSCALE_PMU_IRQ IRQ_IOP331_CORE_PMU #endif +#ifdef CONFIG_ARCH_PXA +#define XSCALE_PMU_IRQ IRQ_PMU +#endif /* * Different types of events that can be counted by the XScale PMU @@ -305,9 +308,9 @@ /* Overflow bit gets cleared. There's no workaround. */ /* Fixed in B stepping or later */ - pmnc &= ~(PMU_ENABLE | pmu->cnt_ovf[PMN0] | pmu->cnt_ovf[PMN1] | - pmu->cnt_ovf[CCNT]); - write_pmnc(pmnc); + /* Write the value back to clear the overflow flags. Overflow */ + /* flags remain in pmnc for use below */ + write_pmnc(pmnc & ~PMU_ENABLE); for (i = CCNT; i <= PMN1; i++) { if (!(pmu->int_mask[i] & pmu->int_enable)) diff -urN linux-2.6.11-rc3/arch/arm/vfp/vfphw.S linux-2.6.11-rc4/arch/arm/vfp/vfphw.S --- linux-2.6.11-rc3/arch/arm/vfp/vfphw.S 2004-12-24 13:34:26.000000000 -0800 +++ linux-2.6.11-rc4/arch/arm/vfp/vfphw.S 2005-02-12 19:50:52.563483581 -0800 @@ -62,14 +62,14 @@ @ VFP hardware support entry point. @ @ r0 = faulted instruction -@ r5 = faulted PC+4 +@ r2 = faulted PC+4 @ r9 = successful return @ r10 = vfp_state union @ lr = failure return .globl vfp_support_entry vfp_support_entry: - DBGSTR3 "instr %08x pc %08x state %p", r0, r5, r10 + DBGSTR3 "instr %08x pc %08x state %p", r0, r2, r10 VFPFMRX r1, FPEXC @ Is the VFP enabled? DBGSTR1 "fpexc %08x", r1 @@ -80,14 +80,14 @@ ldr r3, last_VFP_context_address orr r1, r1, #FPEXC_ENABLE @ user FPEXC has the enable bit set ldr r4, [r3] @ last_VFP_context pointer - bic r2, r1, #FPEXC_EXCEPTION @ make sure exceptions are disabled + bic r5, r1, #FPEXC_EXCEPTION @ make sure exceptions are disabled cmp r4, r10 beq check_for_exception @ we are returning to the same @ process, so the registers are @ still there. In this case, we do @ not want to drop a pending exception. - VFPFMXR FPEXC, r2 @ enable VFP, disable any pending + VFPFMXR FPEXC, r5 @ enable VFP, disable any pending @ exceptions, so we can get at the @ rest of it @@ -96,14 +96,14 @@ DBGSTR1 "save old state %p", r4 cmp r4, #0 beq no_old_VFP_process - VFPFMRX r2, FPSCR @ current status + VFPFMRX r5, FPSCR @ current status VFPFMRX r6, FPINST @ FPINST (always there, rev0 onwards) tst r1, #FPEXC_FPV2 @ is there an FPINST2 to read? VFPFMRX r8, FPINST2, NE @ FPINST2 if needed - avoids reading @ nonexistant reg on rev0 VFPFSTMIA r4 @ save the working registers add r4, r4, #8*16+4 - stmia r4, {r1, r2, r6, r8} @ save FPEXC, FPSCR, FPINST, FPINST2 + stmia r4, {r1, r5, r6, r8} @ save FPEXC, FPSCR, FPINST, FPINST2 @ and point r4 at the word at the @ start of the register dump @@ -112,14 +112,14 @@ str r10, [r3] @ update the last_VFP_context pointer @ Load the saved state back into the VFP add r4, r10, #8*16+4 - ldmia r4, {r1, r2, r6, r8} @ load FPEXC, FPSCR, FPINST, FPINST2 + ldmia r4, {r1, r5, r6, r8} @ load FPEXC, FPSCR, FPINST, FPINST2 VFPFLDMIA r10 @ reload the working registers while @ FPEXC is in a safe state tst r1, #FPEXC_FPV2 @ is there an FPINST2 to write? VFPFMXR FPINST2, r8, NE @ FPINST2 if needed - avoids writing @ nonexistant reg on rev0 VFPFMXR FPINST, r6 - VFPFMXR FPSCR, r2 @ restore status + VFPFMXR FPSCR, r5 @ restore status check_for_exception: tst r1, #FPEXC_EXCEPTION @@ -128,16 +128,16 @@ @ out before setting an FPEXC that @ stops us reading stuff VFPFMXR FPEXC, r1 @ restore FPEXC last - sub r5, r5, #4 - str r5, [sp, #S_PC] @ retry the instruction + sub r2, r2, #4 + str r2, [sp, #S_PC] @ retry the instruction mov pc, r9 @ we think we have handled things look_for_VFP_exceptions: tst r1, #FPEXC_EXCEPTION bne process_exception - VFPFMRX r2, FPSCR - tst r2, #FPSCR_IXE @ IXE doesn't set FPEXC_EXCEPTION ! + VFPFMRX r5, FPSCR + tst r5, #FPSCR_IXE @ IXE doesn't set FPEXC_EXCEPTION ! bne process_exception @ Fall into hand on to next handler - appropriate coproc instr @@ -148,8 +148,8 @@ process_exception: DBGSTR "bounce" - sub r5, r5, #4 - str r5, [sp, #S_PC] @ retry the instruction on exit from + sub r2, r2, #4 + str r2, [sp, #S_PC] @ retry the instruction on exit from @ the imprecise exception handling in @ the support code mov r2, sp @ nothing stacked - regdump is at TOS diff -urN linux-2.6.11-rc3/arch/frv/kernel/entry.S linux-2.6.11-rc4/arch/frv/kernel/entry.S --- linux-2.6.11-rc3/arch/frv/kernel/entry.S 2005-02-12 19:50:35.035724768 -0800 +++ linux-2.6.11-rc4/arch/frv/kernel/entry.S 2005-02-12 19:50:52.635486698 -0800 @@ -782,13 +782,12 @@ ############################################################################### # # the return path for a newly forked child process -# - __switch_to() saved the old current pointer in GR27 for us +# - __switch_to() saved the old current pointer in GR8 for us # ############################################################################### .globl ret_from_fork ret_from_fork: LEDS 0x6100 - ori.p gr27,0,gr8 call schedule_tail # fork & co. return 0 to child diff -urN linux-2.6.11-rc3/arch/frv/kernel/irq-routing.c linux-2.6.11-rc4/arch/frv/kernel/irq-routing.c --- linux-2.6.11-rc3/arch/frv/kernel/irq-routing.c 2005-02-12 19:50:35.050725417 -0800 +++ linux-2.6.11-rc4/arch/frv/kernel/irq-routing.c 2005-02-12 19:50:52.650487348 -0800 @@ -82,7 +82,7 @@ int status = 0; // if (!(action->flags & SA_INTERRUPT)) -// sti(); +// local_irq_enable(); do { status |= action->flags; @@ -92,7 +92,7 @@ if (status & SA_SAMPLE_RANDOM) add_interrupt_randomness(irq); - cli(); + local_irq_disable(); } } } diff -urN linux-2.6.11-rc3/arch/frv/kernel/irq.c linux-2.6.11-rc4/arch/frv/kernel/irq.c --- linux-2.6.11-rc3/arch/frv/kernel/irq.c 2005-02-12 19:50:35.052725504 -0800 +++ linux-2.6.11-rc4/arch/frv/kernel/irq.c 2005-02-12 19:50:52.652487434 -0800 @@ -316,16 +316,16 @@ do_softirq(); #ifdef CONFIG_PREEMPT - cli(); + local_irq_disable(); while (--current->preempt_count == 0) { - if (!(__frame->psr & PSR_S) - || (current->need_resched == 0) - || in_interrupt()) + if (!(__frame->psr & PSR_S) || + current->need_resched == 0 || + in_interrupt()) break; current->preempt_count++; - sti(); + local_irq_enable(); preempt_schedule(); - cli(); + local_irq_disable(); } #endif diff -urN linux-2.6.11-rc3/arch/frv/kernel/pm.c linux-2.6.11-rc4/arch/frv/kernel/pm.c --- linux-2.6.11-rc3/arch/frv/kernel/pm.c 2005-02-12 19:50:35.055725634 -0800 +++ linux-2.6.11-rc4/arch/frv/kernel/pm.c 2005-02-12 19:50:52.655487564 -0800 @@ -36,7 +36,7 @@ int pm_do_suspend(void) { - cli(); + local_irq_disable(); __set_LEDS(0xb1); @@ -45,7 +45,7 @@ __set_LEDS(0xb2); - sti(); + local_irq_enable(); return 0; } @@ -84,7 +84,7 @@ int pm_do_bus_sleep(void) { - cli(); + local_irq_disable(); /* * Here is where we need some platform-dependent setup @@ -113,7 +113,7 @@ */ __power_switch_wake_cleanup(); - sti(); + local_irq_enable(); return 0; } @@ -134,7 +134,7 @@ #define CTL_PM_P0 4 #define CTL_PM_CM 5 -static int user_atoi(char *ubuf, int len) +static int user_atoi(char *ubuf, size_t len) { char buf[16]; unsigned long ret; @@ -191,7 +191,7 @@ pm_send_all(PM_SUSPEND, (void *)3); /* now change cmode */ - cli(); + local_irq_disable(); frv_dma_pause_all(); frv_change_cmode(new_cmode); @@ -203,7 +203,7 @@ determine_clocks(1); #endif frv_dma_resume_all(); - sti(); + local_irq_enable(); /* tell all the drivers we're resuming */ pm_send_all(PM_RESUME, (void *)0); diff -urN linux-2.6.11-rc3/arch/frv/kernel/semaphore.c linux-2.6.11-rc4/arch/frv/kernel/semaphore.c --- linux-2.6.11-rc3/arch/frv/kernel/semaphore.c 2005-02-12 19:50:35.058725764 -0800 +++ linux-2.6.11-rc4/arch/frv/kernel/semaphore.c 2005-02-12 19:50:52.658487694 -0800 @@ -43,17 +43,18 @@ struct task_struct *tsk = current; struct sem_waiter waiter; - semtrace(sem,"Entering __down"); + semtrace(sem, "Entering __down"); /* set up my own style of waitqueue */ - waiter.task = tsk; + waiter.task = tsk; + get_task_struct(tsk); list_add_tail(&waiter.list, &sem->wait_list); /* we don't need to touch the semaphore struct anymore */ spin_unlock_irqrestore(&sem->wait_lock, flags); - /* wait to be given the lock */ + /* wait to be given the semaphore */ set_task_state(tsk, TASK_UNINTERRUPTIBLE); for (;;) { @@ -64,7 +65,7 @@ } tsk->state = TASK_RUNNING; - semtrace(sem,"Leaving __down"); + semtrace(sem, "Leaving __down"); } EXPORT_SYMBOL(__down); @@ -83,6 +84,7 @@ /* set up my own style of waitqueue */ waiter.task = tsk; + get_task_struct(tsk); list_add_tail(&waiter.list, &sem->wait_list); @@ -91,7 +93,7 @@ spin_unlock_irqrestore(&sem->wait_lock, flags); - /* wait to be given the lock */ + /* wait to be given the semaphore */ ret = 0; for (;;) { if (list_empty(&waiter.list)) @@ -116,6 +118,8 @@ } spin_unlock_irqrestore(&sem->wait_lock, flags); + if (ret == -EINTR) + put_task_struct(current); goto out; } @@ -127,14 +131,24 @@ */ void __up(struct semaphore *sem) { + struct task_struct *tsk; struct sem_waiter *waiter; semtrace(sem,"Entering __up"); /* grant the token to the process at the front of the queue */ waiter = list_entry(sem->wait_list.next, struct sem_waiter, list); + + /* We must be careful not to touch 'waiter' after we set ->task = NULL. + * It is an allocated on the waiter's stack and may become invalid at + * any time after that point (due to a wakeup from another source). + */ list_del_init(&waiter->list); - wake_up_process(waiter->task); + tsk = waiter->task; + mb(); + waiter->task = NULL; + wake_up_process(tsk); + put_task_struct(tsk); semtrace(sem,"Leaving __up"); } diff -urN linux-2.6.11-rc3/arch/frv/kernel/signal.c linux-2.6.11-rc4/arch/frv/kernel/signal.c --- linux-2.6.11-rc3/arch/frv/kernel/signal.c 2005-02-12 19:50:35.062725937 -0800 +++ linux-2.6.11-rc4/arch/frv/kernel/signal.c 2005-02-12 19:50:52.662487867 -0800 @@ -242,18 +242,9 @@ if (restore_sigcontext(&frame->uc.uc_mcontext, &gr8)) goto badframe; - if (__copy_from_user(&st, &frame->uc.uc_stack, sizeof(st))) + if (do_sigaltstack(&frame->uc.uc_stack, NULL, __frame->sp) == -EFAULT) goto badframe; - /* It is more difficult to avoid calling this function than to - * call it and ignore errors. */ - /* - * THIS CANNOT WORK! "&st" is a kernel address, and "do_sigaltstack()" - * takes a user address (and verifies that it is a user address). End - * result: it does exactly _nothing_. - */ - do_sigaltstack(&st, NULL, __frame->sp); - return gr8; badframe: diff -urN linux-2.6.11-rc3/arch/frv/kernel/switch_to.S linux-2.6.11-rc4/arch/frv/kernel/switch_to.S --- linux-2.6.11-rc3/arch/frv/kernel/switch_to.S 2005-02-12 19:50:35.064726023 -0800 +++ linux-2.6.11-rc4/arch/frv/kernel/switch_to.S 2005-02-12 19:50:52.664487954 -0800 @@ -43,20 +43,22 @@ ############################################################################### # -# struct task_struct *__switch_to(struct thread_struct *prev, struct thread_struct *next) +# struct task_struct *__switch_to(struct thread_struct *prev_thread, +# struct thread_struct *next_thread, +# struct task_struct *prev) # ############################################################################### .globl __switch_to __switch_to: # save outgoing process's context - sethi.p %hi(__switch_back),gr11 - setlo %lo(__switch_back),gr11 - movsg lr,gr10 + sethi.p %hi(__switch_back),gr13 + setlo %lo(__switch_back),gr13 + movsg lr,gr12 stdi gr28,@(gr8,#__THREAD_FRAME) sti sp ,@(gr8,#__THREAD_SP) sti fp ,@(gr8,#__THREAD_FP) - stdi gr10,@(gr8,#__THREAD_LR) + stdi gr12,@(gr8,#__THREAD_LR) stdi gr16,@(gr8,#__THREAD_GR(16)) stdi gr18,@(gr8,#__THREAD_GR(18)) stdi gr20,@(gr8,#__THREAD_GR(20)) @@ -68,14 +70,14 @@ ldi.p @(gr8,#__THREAD_USER),gr8 call save_user_regs or gr22,gr22,gr8 - + # retrieve the new context sethi.p %hi(__kernel_frame0_ptr),gr6 setlo %lo(__kernel_frame0_ptr),gr6 movsg psr,gr4 lddi.p @(gr9,#__THREAD_FRAME),gr10 - or gr29,gr29,gr27 ; ret_from_fork needs to know old current + or gr10,gr10,gr27 ; save prev for the return value ldi @(gr11,#4),gr19 ; get new_current->thread_info @@ -88,8 +90,8 @@ andi gr4,#~PSR_ET,gr5 movgs gr5,psr - or.p gr10,gr0,gr28 - or gr11,gr0,gr29 + or.p gr10,gr0,gr28 ; set __frame + or gr11,gr0,gr29 ; set __current or.p gr12,gr0,sp or gr13,gr0,fp or gr19,gr0,gr15 ; set __current_thread_info @@ -108,14 +110,17 @@ 111: # jump to __switch_back or ret_from_fork as appropriate + # - move prev to GR8 movgs gr4,psr - jmpl @(gr18,gr0) + jmpl.p @(gr18,gr0) + or gr27,gr27,gr8 ############################################################################### # # restore incoming process's context # - on entry: # - SP, FP, LR, GR15, GR28 and GR29 will have been set up appropriately +# - GR8 will point to the outgoing task_struct # - GR9 will point to the incoming thread_struct # ############################################################################### @@ -128,12 +133,16 @@ lddi @(gr9,#__THREAD_GR(26)),gr26 # fall through into restore_user_regs() - ldi @(gr9,#__THREAD_USER),gr8 + ldi.p @(gr9,#__THREAD_USER),gr8 + or gr8,gr8,gr9 ############################################################################### # # restore extra general regs and FP/Media regs -# - void restore_user_regs(const struct user_context *target) +# - void *restore_user_regs(const struct user_context *target, void *retval) +# - on entry: +# - GR8 will point to the user context to swap in +# - GR9 will contain the value to be returned in GR8 (prev task on context switch) # ############################################################################### .globl restore_user_regs @@ -245,6 +254,7 @@ lddi @(gr8,#__FPMEDIA_FNER(0)),gr4 movsg fner0,gr4 movsg fner1,gr5 + or.p gr9,gr9,gr8 bralr # the FR451 also has ACC8-11/ACCG8-11 regs (but not 4-7...) diff -urN linux-2.6.11-rc3/arch/frv/kernel/vmlinux.lds.S linux-2.6.11-rc4/arch/frv/kernel/vmlinux.lds.S --- linux-2.6.11-rc3/arch/frv/kernel/vmlinux.lds.S 2005-02-12 19:50:35.069726240 -0800 +++ linux-2.6.11-rc4/arch/frv/kernel/vmlinux.lds.S 2005-02-12 19:50:52.669488170 -0800 @@ -1,4 +1,4 @@ -/* ld script to make FRV Linux kernel -*- c -*- +/* ld script to make FRV Linux kernel * Written by Martin Mares ; */ OUTPUT_FORMAT("elf32-frv", "elf32-frv", "elf32-frv") diff -urN linux-2.6.11-rc3/arch/i386/crypto/aes.c linux-2.6.11-rc4/arch/i386/crypto/aes.c --- linux-2.6.11-rc3/arch/i386/crypto/aes.c 2004-12-24 13:34:58.000000000 -0800 +++ linux-2.6.11-rc4/arch/i386/crypto/aes.c 2005-02-12 19:50:52.737491114 -0800 @@ -93,12 +93,12 @@ u32 ft_tab[4][256]; u32 fl_tab[4][256]; -u32 ls_tab[4][256]; -u32 im_tab[4][256]; +static u32 ls_tab[4][256]; +static u32 im_tab[4][256]; u32 il_tab[4][256]; u32 it_tab[4][256]; -void gen_tabs(void) +static void gen_tabs(void) { u32 i, w; u8 pow[512], log[256]; diff -urN linux-2.6.11-rc3/arch/i386/kernel/cpu/cpufreq/speedstep-lib.c linux-2.6.11-rc4/arch/i386/kernel/cpu/cpufreq/speedstep-lib.c --- linux-2.6.11-rc3/arch/i386/kernel/cpu/cpufreq/speedstep-lib.c 2004-12-24 13:35:27.000000000 -0800 +++ linux-2.6.11-rc4/arch/i386/kernel/cpu/cpufreq/speedstep-lib.c 2005-02-12 19:50:52.771492586 -0800 @@ -160,7 +160,10 @@ printk(KERN_DEBUG "speedstep-lib: couldn't detect FSB speed. Please send an e-mail to \n"); /* Multiplier. */ - mult = msr_lo >> 24; + if (c->x86_model < 2) + mult = msr_lo >> 27; + else + mult = msr_lo >> 24; dprintk("P4 - FSB %u kHz; Multiplier %u; Speed %u kHz\n", fsb, mult, (fsb * mult)); diff -urN linux-2.6.11-rc3/arch/i386/kernel/pci-dma.c linux-2.6.11-rc4/arch/i386/kernel/pci-dma.c --- linux-2.6.11-rc3/arch/i386/kernel/pci-dma.c 2005-02-12 19:50:35.203732041 -0800 +++ linux-2.6.11-rc4/arch/i386/kernel/pci-dma.c 2005-02-12 19:50:52.785493192 -0800 @@ -89,11 +89,11 @@ if (!mem_base) goto out; - dev->dma_mem = kmalloc(GFP_KERNEL, sizeof(struct dma_coherent_mem)); + dev->dma_mem = kmalloc(sizeof(struct dma_coherent_mem), GFP_KERNEL); if (!dev->dma_mem) goto out; memset(dev->dma_mem, 0, sizeof(struct dma_coherent_mem)); - dev->dma_mem->bitmap = kmalloc(GFP_KERNEL, bitmap_size); + dev->dma_mem->bitmap = kmalloc(bitmap_size, GFP_KERNEL); if (!dev->dma_mem->bitmap) goto free1_out; memset(dev->dma_mem->bitmap, 0, bitmap_size); diff -urN linux-2.6.11-rc3/arch/i386/kernel/time_hpet.c linux-2.6.11-rc4/arch/i386/kernel/time_hpet.c --- linux-2.6.11-rc3/arch/i386/kernel/time_hpet.c 2004-12-24 13:34:26.000000000 -0800 +++ linux-2.6.11-rc4/arch/i386/kernel/time_hpet.c 2005-02-12 19:50:52.794493582 -0800 @@ -81,6 +81,11 @@ cfg |= HPET_TN_ENABLE | HPET_TN_PERIODIC | HPET_TN_SETVAL | HPET_TN_32BIT; hpet_writel(cfg, HPET_T0_CFG); + /* + * Some systems seems to need two writes to HPET_T0_CMP, + * to get interrupts working + */ + hpet_writel(tick, HPET_T0_CMP); hpet_writel(tick, HPET_T0_CMP); /* diff -urN linux-2.6.11-rc3/arch/i386/lib/usercopy.c linux-2.6.11-rc4/arch/i386/lib/usercopy.c --- linux-2.6.11-rc3/arch/i386/lib/usercopy.c 2004-12-24 13:33:48.000000000 -0800 +++ linux-2.6.11-rc4/arch/i386/lib/usercopy.c 2005-02-12 19:50:52.800493842 -0800 @@ -514,6 +514,7 @@ unsigned long __copy_to_user_ll(void __user *to, const void *from, unsigned long n) { + BUG_ON((long) n < 0); #ifndef CONFIG_X86_WP_WORKS_OK if (unlikely(boot_cpu_data.wp_works_ok == 0) && ((unsigned long )to) < TASK_SIZE) { @@ -573,6 +574,7 @@ unsigned long __copy_from_user_ll(void *to, const void __user *from, unsigned long n) { + BUG_ON((long)n < 0); if (movsl_is_ok(to, from, n)) __copy_user_zeroing(to, from, n); else @@ -597,6 +599,7 @@ copy_to_user(void __user *to, const void *from, unsigned long n) { might_sleep(); + BUG_ON((long) n < 0); if (access_ok(VERIFY_WRITE, to, n)) n = __copy_to_user(to, from, n); return n; @@ -623,6 +626,7 @@ copy_from_user(void *to, const void __user *from, unsigned long n) { might_sleep(); + BUG_ON((long) n < 0); if (access_ok(VERIFY_READ, from, n)) n = __copy_from_user(to, from, n); else diff -urN linux-2.6.11-rc3/arch/i386/oprofile/nmi_int.c linux-2.6.11-rc4/arch/i386/oprofile/nmi_int.c --- linux-2.6.11-rc3/arch/i386/oprofile/nmi_int.c 2005-02-12 19:50:35.226733037 -0800 +++ linux-2.6.11-rc4/arch/i386/oprofile/nmi_int.c 2005-02-12 19:50:52.813494404 -0800 @@ -70,7 +70,7 @@ } -static void __exit exit_driverfs(void) +static void exit_driverfs(void) { sysdev_unregister(&device_oprofile); sysdev_class_unregister(&oprofile_sysclass); @@ -420,7 +420,7 @@ } -void __exit nmi_exit(void) +void nmi_exit(void) { if (using_nmi) exit_driverfs(); diff -urN linux-2.6.11-rc3/arch/ia64/Kconfig linux-2.6.11-rc4/arch/ia64/Kconfig --- linux-2.6.11-rc3/arch/ia64/Kconfig 2005-02-12 19:50:35.233733340 -0800 +++ linux-2.6.11-rc4/arch/ia64/Kconfig 2005-02-12 19:50:52.820494707 -0800 @@ -158,14 +158,6 @@ depends on ITANIUM default y -config ITANIUM_BSTEP_SPECIFIC - bool "Itanium B-step specific code" - depends on ITANIUM - help - Select this option to build a kernel for an Itanium prototype system - with a B-step CPU. You have a B-step CPU if the "revision" field in - /proc/cpuinfo has a value in the range from 1 to 4. - # align cache-sensitive data to 128 bytes config IA64_L1_CACHE_SHIFT int diff -urN linux-2.6.11-rc3/arch/ia64/Makefile linux-2.6.11-rc4/arch/ia64/Makefile --- linux-2.6.11-rc3/arch/ia64/Makefile 2005-02-12 19:50:35.234733383 -0800 +++ linux-2.6.11-rc4/arch/ia64/Makefile 2005-02-12 19:50:52.821494751 -0800 @@ -46,8 +46,6 @@ cflags-$(CONFIG_MCKINLEY) += -mtune=mckinley endif -cflags-$(CONFIG_ITANIUM_BSTEP_SPECIFIC) += -mb-step - CFLAGS += $(cflags-y) head-y := arch/ia64/kernel/head.o arch/ia64/kernel/init_task.o diff -urN linux-2.6.11-rc3/arch/ia64/configs/bigsur_defconfig linux-2.6.11-rc4/arch/ia64/configs/bigsur_defconfig --- linux-2.6.11-rc3/arch/ia64/configs/bigsur_defconfig 2004-12-24 13:33:51.000000000 -0800 +++ linux-2.6.11-rc4/arch/ia64/configs/bigsur_defconfig 2005-02-12 19:50:52.871496915 -0800 @@ -73,7 +73,6 @@ CONFIG_IA64_PAGE_SIZE_16KB=y # CONFIG_IA64_PAGE_SIZE_64KB is not set CONFIG_IA64_BRL_EMU=y -# CONFIG_ITANIUM_BSTEP_SPECIFIC is not set CONFIG_IA64_L1_CACHE_SHIFT=6 # CONFIG_NUMA is not set # CONFIG_VIRTUAL_MEM_MAP is not set diff -urN linux-2.6.11-rc3/arch/ia64/ia32/ia32_signal.c linux-2.6.11-rc4/arch/ia64/ia32/ia32_signal.c --- linux-2.6.11-rc3/arch/ia64/ia32/ia32_signal.c 2005-02-12 19:50:35.303736371 -0800 +++ linux-2.6.11-rc4/arch/ia64/ia32/ia32_signal.c 2005-02-12 19:50:52.889497695 -0800 @@ -1,7 +1,7 @@ /* * IA32 Architecture-specific signal handling support. * - * Copyright (C) 1999, 2001-2002 Hewlett-Packard Co + * Copyright (C) 1999, 2001-2002, 2005 Hewlett-Packard Co * David Mosberger-Tang * Copyright (C) 1999 Arun Sharma * Copyright (C) 2000 VA Linux Co @@ -970,11 +970,10 @@ } asmlinkage long -sys32_sigreturn (int arg0, int arg1, int arg2, int arg3, int arg4, int arg5, int arg6, int arg7, - unsigned long stack) +sys32_sigreturn (int arg0, int arg1, int arg2, int arg3, int arg4, int arg5, + int arg6, int arg7, struct pt_regs regs) { - struct pt_regs *regs = (struct pt_regs *) &stack; - unsigned long esp = (unsigned int) regs->r12; + unsigned long esp = (unsigned int) regs.r12; struct sigframe_ia32 __user *frame = (struct sigframe_ia32 __user *)(esp - 8); sigset_t set; int eax; @@ -993,7 +992,7 @@ recalc_sigpending(); spin_unlock_irq(¤t->sighand->siglock); - if (restore_sigcontext_ia32(regs, &frame->sc, &eax)) + if (restore_sigcontext_ia32(®s, &frame->sc, &eax)) goto badframe; return eax; @@ -1003,11 +1002,10 @@ } asmlinkage long -sys32_rt_sigreturn (int arg0, int arg1, int arg2, int arg3, int arg4, int arg5, int arg6, int arg7, - unsigned long stack) +sys32_rt_sigreturn (int arg0, int arg1, int arg2, int arg3, int arg4, + int arg5, int arg6, int arg7, struct pt_regs regs) { - struct pt_regs *regs = (struct pt_regs *) &stack; - unsigned long esp = (unsigned int) regs->r12; + unsigned long esp = (unsigned int) regs.r12; struct rt_sigframe_ia32 __user *frame = (struct rt_sigframe_ia32 __user *)(esp - 4); sigset_t set; int eax; @@ -1023,7 +1021,7 @@ recalc_sigpending(); spin_unlock_irq(¤t->sighand->siglock); - if (restore_sigcontext_ia32(regs, &frame->uc.uc_mcontext, &eax)) + if (restore_sigcontext_ia32(®s, &frame->uc.uc_mcontext, &eax)) goto badframe; /* It is more difficult to avoid calling this function than to diff -urN linux-2.6.11-rc3/arch/ia64/ia32/sys_ia32.c linux-2.6.11-rc4/arch/ia64/ia32/sys_ia32.c --- linux-2.6.11-rc3/arch/ia64/ia32/sys_ia32.c 2005-02-12 19:50:35.305736457 -0800 +++ linux-2.6.11-rc4/arch/ia64/ia32/sys_ia32.c 2005-02-12 19:50:52.892497825 -0800 @@ -6,7 +6,7 @@ * Copyright (C) 1999 Arun Sharma * Copyright (C) 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz) * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu) - * Copyright (C) 2000-2003 Hewlett-Packard Co + * Copyright (C) 2000-2003, 2005 Hewlett-Packard Co * David Mosberger-Tang * Copyright (C) 2004 Gordon Jin * @@ -1415,7 +1415,7 @@ case SHMDT: return sys_shmdt(compat_ptr(ptr)); case SHMGET: - return sys_shmget(first, second, third); + return sys_shmget(first, (unsigned)second, third); case SHMCTL: return compat_sys_shmctl(first, second, compat_ptr(ptr)); @@ -1436,7 +1436,7 @@ } static unsigned int -ia32_peek (struct pt_regs *regs, struct task_struct *child, unsigned long addr, unsigned int *val) +ia32_peek (struct task_struct *child, unsigned long addr, unsigned int *val) { size_t copied; unsigned int ret; @@ -1446,7 +1446,7 @@ } static unsigned int -ia32_poke (struct pt_regs *regs, struct task_struct *child, unsigned long addr, unsigned int val) +ia32_poke (struct task_struct *child, unsigned long addr, unsigned int val) { if (access_process_vm(child, addr, &val, sizeof(val), 1) != sizeof(val)) @@ -1751,25 +1751,16 @@ return 0; } -/* - * Note that the IA32 version of `ptrace' calls the IA64 routine for - * many of the requests. This will only work for requests that do - * not need access to the calling processes `pt_regs' which is located - * at the address of `stack'. Once we call the IA64 `sys_ptrace' then - * the address of `stack' will not be the address of the `pt_regs'. - */ asmlinkage long -sys32_ptrace (int request, pid_t pid, unsigned int addr, unsigned int data, - long arg4, long arg5, long arg6, long arg7, long stack) +sys32_ptrace (int request, pid_t pid, unsigned int addr, unsigned int data) { - struct pt_regs *regs = (struct pt_regs *) &stack; struct task_struct *child; unsigned int value, tmp; long i, ret; lock_kernel(); if (request == PTRACE_TRACEME) { - ret = sys_ptrace(request, pid, addr, data, arg4, arg5, arg6, arg7, stack); + ret = sys_ptrace(request, pid, addr, data); goto out; } @@ -1786,7 +1777,7 @@ goto out_tsk; if (request == PTRACE_ATTACH) { - ret = sys_ptrace(request, pid, addr, data, arg4, arg5, arg6, arg7, stack); + ret = sys_ptrace(request, pid, addr, data); goto out_tsk; } @@ -1797,7 +1788,7 @@ switch (request) { case PTRACE_PEEKTEXT: case PTRACE_PEEKDATA: /* read word at location addr */ - ret = ia32_peek(regs, child, addr, &value); + ret = ia32_peek(child, addr, &value); if (ret == 0) ret = put_user(value, (unsigned int __user *) compat_ptr(data)); else @@ -1806,7 +1797,7 @@ case PTRACE_POKETEXT: case PTRACE_POKEDATA: /* write the word at location addr */ - ret = ia32_poke(regs, child, addr, data); + ret = ia32_poke(child, addr, data); goto out_tsk; case PTRACE_PEEKUSR: /* read word at addr in USER area */ @@ -1882,7 +1873,7 @@ case PTRACE_KILL: case PTRACE_SINGLESTEP: /* execute chile for one instruction */ case PTRACE_DETACH: /* detach a process */ - ret = sys_ptrace(request, pid, addr, data, arg4, arg5, arg6, arg7, stack); + ret = sys_ptrace(request, pid, addr, data); break; default: @@ -1905,9 +1896,9 @@ asmlinkage long sys32_sigaltstack (ia32_stack_t __user *uss32, ia32_stack_t __user *uoss32, - long arg2, long arg3, long arg4, long arg5, long arg6, long arg7, long stack) + long arg2, long arg3, long arg4, long arg5, long arg6, + long arg7, struct pt_regs pt) { - struct pt_regs *pt = (struct pt_regs *) &stack; stack_t uss, uoss; ia32_stack_t buf32; int ret; @@ -1928,7 +1919,7 @@ } set_fs(KERNEL_DS); ret = do_sigaltstack(uss32 ? (stack_t __user *) &uss : NULL, - (stack_t __user *) &uoss, pt->r12); + (stack_t __user *) &uoss, pt.r12); current->sas_ss_size = buf32.ss_size; set_fs(old_fs); out: diff -urN linux-2.6.11-rc3/arch/ia64/kernel/asm-offsets.c linux-2.6.11-rc4/arch/ia64/kernel/asm-offsets.c --- linux-2.6.11-rc3/arch/ia64/kernel/asm-offsets.c 2005-02-12 19:50:35.307736544 -0800 +++ linux-2.6.11-rc4/arch/ia64/kernel/asm-offsets.c 2005-02-12 19:50:52.898498084 -0800 @@ -193,9 +193,17 @@ DEFINE(IA64_CLONE_VM, CLONE_VM); BLANK(); - DEFINE(IA64_CPUINFO_NSEC_PER_CYC_OFFSET, offsetof (struct cpuinfo_ia64, nsec_per_cyc)); - DEFINE(IA64_TIMESPEC_TV_NSEC_OFFSET, offsetof (struct timespec, tv_nsec)); - + DEFINE(IA64_CPUINFO_NSEC_PER_CYC_OFFSET, + offsetof (struct cpuinfo_ia64, nsec_per_cyc)); + DEFINE(IA64_CPUINFO_PTCE_BASE_OFFSET, + offsetof (struct cpuinfo_ia64, ptce_base)); + DEFINE(IA64_CPUINFO_PTCE_COUNT_OFFSET, + offsetof (struct cpuinfo_ia64, ptce_count)); + DEFINE(IA64_CPUINFO_PTCE_STRIDE_OFFSET, + offsetof (struct cpuinfo_ia64, ptce_stride)); + BLANK(); + DEFINE(IA64_TIMESPEC_TV_NSEC_OFFSET, + offsetof (struct timespec, tv_nsec)); DEFINE(CLONE_SETTLS_BIT, 19); #if CLONE_SETTLS != (1<<19) @@ -203,19 +211,16 @@ #endif BLANK(); - /* used by arch/ia64/kernel/mca_asm.S */ - DEFINE(IA64_CPUINFO_PERCPU_PADDR, offsetof (struct cpuinfo_ia64, percpu_paddr)); - DEFINE(IA64_CPUINFO_PAL_PADDR, offsetof (struct cpuinfo_ia64, pal_paddr)); - DEFINE(IA64_CPUINFO_PA_MCA_INFO, offsetof (struct cpuinfo_ia64, ia64_pa_mca_data)); - DEFINE(IA64_MCA_PROC_STATE_DUMP, offsetof (struct ia64_mca_cpu_s, ia64_mca_proc_state_dump)); - DEFINE(IA64_MCA_STACK, offsetof (struct ia64_mca_cpu_s, ia64_mca_stack)); - DEFINE(IA64_MCA_STACKFRAME, offsetof (struct ia64_mca_cpu_s, ia64_mca_stackframe)); - DEFINE(IA64_MCA_BSPSTORE, offsetof (struct ia64_mca_cpu_s, ia64_mca_bspstore)); - DEFINE(IA64_INIT_STACK, offsetof (struct ia64_mca_cpu_s, ia64_init_stack)); - - /* used by head.S */ - DEFINE(IA64_CPUINFO_NSEC_PER_CYC_OFFSET, offsetof (struct cpuinfo_ia64, nsec_per_cyc)); - + DEFINE(IA64_MCA_CPU_PROC_STATE_DUMP_OFFSET, + offsetof (struct ia64_mca_cpu, proc_state_dump)); + DEFINE(IA64_MCA_CPU_STACK_OFFSET, + offsetof (struct ia64_mca_cpu, stack)); + DEFINE(IA64_MCA_CPU_STACKFRAME_OFFSET, + offsetof (struct ia64_mca_cpu, stackframe)); + DEFINE(IA64_MCA_CPU_RBSTORE_OFFSET, + offsetof (struct ia64_mca_cpu, rbstore)); + DEFINE(IA64_MCA_CPU_INIT_STACK_OFFSET, + offsetof (struct ia64_mca_cpu, init_stack)); BLANK(); /* used by fsys_gettimeofday in arch/ia64/kernel/fsys.S */ DEFINE(IA64_TIME_INTERPOLATOR_ADDRESS_OFFSET, offsetof (struct time_interpolator, addr)); diff -urN linux-2.6.11-rc3/arch/ia64/kernel/efi.c linux-2.6.11-rc4/arch/ia64/kernel/efi.c --- linux-2.6.11-rc3/arch/ia64/kernel/efi.c 2005-02-12 19:50:35.309736631 -0800 +++ linux-2.6.11-rc4/arch/ia64/kernel/efi.c 2005-02-12 19:50:52.900498171 -0800 @@ -415,8 +415,8 @@ * Abstraction Layer chapter 11 in ADAG */ -static efi_memory_desc_t * -pal_code_memdesc (void) +void * +efi_get_pal_addr (void) { void *efi_map_start, *efi_map_end, *p; efi_memory_desc_t *md; @@ -474,51 +474,31 @@ md->phys_addr + (md->num_pages << EFI_PAGE_SHIFT), vaddr & mask, (vaddr & mask) + IA64_GRANULE_SIZE); #endif - return md; + return __va(md->phys_addr); } - + printk(KERN_WARNING "%s: no PAL-code memory-descriptor found", + __FUNCTION__); return NULL; } void -efi_get_pal_addr (void) -{ - efi_memory_desc_t *md = pal_code_memdesc(); - u64 vaddr, mask; - struct cpuinfo_ia64 *cpuinfo; - - if (md != NULL) { - - vaddr = PAGE_OFFSET + md->phys_addr; - mask = ~((1 << IA64_GRANULE_SHIFT) - 1); - - cpuinfo = (struct cpuinfo_ia64 *)__va(ia64_get_kr(IA64_KR_PA_CPU_INFO)); - cpuinfo->pal_base = vaddr & mask; - cpuinfo->pal_paddr = pte_val(mk_pte_phys(md->phys_addr, PAGE_KERNEL)); - } -} - -void efi_map_pal_code (void) { - efi_memory_desc_t *md = pal_code_memdesc(); - u64 vaddr, mask, psr; - - if (md != NULL) { + void *pal_vaddr = efi_get_pal_addr (); + u64 psr; - vaddr = PAGE_OFFSET + md->phys_addr; - mask = ~((1 << IA64_GRANULE_SHIFT) - 1); + if (!pal_vaddr) + return; - /* - * Cannot write to CRx with PSR.ic=1 - */ - psr = ia64_clear_ic(); - ia64_itr(0x1, IA64_TR_PALCODE, vaddr & mask, - pte_val(pfn_pte(md->phys_addr >> PAGE_SHIFT, PAGE_KERNEL)), - IA64_GRANULE_SHIFT); - ia64_set_psr(psr); /* restore psr */ - ia64_srlz_i(); - } + /* + * Cannot write to CRx with PSR.ic=1 + */ + psr = ia64_clear_ic(); + ia64_itr(0x1, IA64_TR_PALCODE, GRANULEROUNDDOWN((unsigned long) pal_vaddr), + pte_val(pfn_pte(__pa(pal_vaddr) >> PAGE_SHIFT, PAGE_KERNEL)), + IA64_GRANULE_SHIFT); + ia64_set_psr(psr); /* restore psr */ + ia64_srlz_i(); } void __init diff -urN linux-2.6.11-rc3/arch/ia64/kernel/entry.S linux-2.6.11-rc4/arch/ia64/kernel/entry.S --- linux-2.6.11-rc3/arch/ia64/kernel/entry.S 2005-02-12 19:50:35.311736717 -0800 +++ linux-2.6.11-rc4/arch/ia64/kernel/entry.S 2005-02-12 19:50:52.902498258 -0800 @@ -558,7 +558,7 @@ .mem.offset 0,0; st8.spill [r2]=r8 // store return value in slot for r8 .mem.offset 8,0; st8.spill [r3]=r10 // clear error indication in slot for r10 br.call.sptk.many rp=syscall_trace_leave // give parent a chance to catch return value -.ret3: br.cond.sptk ia64_leave_syscall +.ret3: br.cond.sptk .work_pending_syscall_end strace_error: ld8 r3=[r2] // load pt_regs.r8 @@ -621,10 +621,7 @@ PT_REGS_UNWIND_INFO(0) cmp.ge p6,p7=r8,r0 // syscall executed successfully? adds r2=PT(R8)+16,sp // r2 = &pt_regs.r8 - adds r3=PT(R10)+16,sp // r3 = &pt_regs.r10 - ;; -.mem.offset 0,0; (p6) st8.spill [r2]=r8 // store return value in slot for r8 and set unat bit -.mem.offset 8,0; (p6) st8.spill [r3]=r0 // clear error indication in slot for r10 and set unat bit + mov r10=r0 // clear error indication in r10 (p7) br.cond.spnt handle_syscall_error // handle potential syscall failure END(ia64_ret_from_syscall) // fall through @@ -709,27 +706,23 @@ ld8 r19=[r2],PT(B6)-PT(LOADRS) // load ar.rsc value for "loadrs" mov b7=r0 // clear b7 ;; - ld8 r23=[r3],PT(R9)-PT(AR_BSPSTORE) // load ar.bspstore (may be garbage) - ld8 r18=[r2],PT(R8)-PT(B6) // load b6 + ld8 r23=[r3],PT(R11)-PT(AR_BSPSTORE) // load ar.bspstore (may be garbage) + ld8 r18=[r2],PT(R9)-PT(B6) // load b6 (p6) and r15=TIF_WORK_MASK,r31 // any work other than TIF_SYSCALL_TRACE? ;; mov r16=ar.bsp // M2 get existing backing store pointer (p6) cmp4.ne.unc p6,p0=r15, r0 // any special work pending? -(p6) br.cond.spnt .work_pending +(p6) br.cond.spnt .work_pending_syscall ;; // start restoring the state saved on the kernel stack (struct pt_regs): - ld8.fill r8=[r2],16 - ld8.fill r9=[r3],16 + ld8 r9=[r2],PT(CR_IPSR)-PT(R9) + ld8 r11=[r3],PT(CR_IIP)-PT(R11) mov f6=f0 // clear f6 ;; invala // M0|1 invalidate ALAT rsm psr.i | psr.ic // M2 initiate turning off of interrupt and interruption collection mov f9=f0 // clear f9 - ld8.fill r10=[r2],16 - ld8.fill r11=[r3],16 - mov f7=f0 // clear f7 - ;; ld8 r29=[r2],16 // load cr.ipsr ld8 r28=[r3],16 // load cr.iip mov f8=f0 // clear f8 @@ -760,7 +753,7 @@ ;; srlz.d // M0 ensure interruption collection is off ld8.fill r13=[r3],16 - nop.i 0 + mov f7=f0 // clear f7 ;; ld8.fill r12=[r2] // restore r12 (sp) ld8.fill r15=[r3] // restore r15 @@ -770,8 +763,8 @@ (pUStk) st1 [r14]=r17 mov b6=r18 // I0 restore b6 ;; - shr.u r18=r19,16 // I0|1 get byte size of existing "dirty" partition mov r14=r0 // clear r14 + shr.u r18=r19,16 // I0|1 get byte size of existing "dirty" partition (pKStk) br.cond.dpnt.many skip_rbs_switch mov.m ar.ccv=r0 // clear ar.ccv @@ -987,7 +980,7 @@ shladd in0=loc1,3,r17 mov in1=0 ;; - .align 32 + TEXT_ALIGN(32) rse_clear_invalid: #ifdef CONFIG_ITANIUM // cycle 0 @@ -1083,6 +1076,12 @@ * On exit: * p6 = TRUE if work-pending-check needs to be redone */ +.work_pending_syscall: + add r2=-8,r2 + add r3=-8,r3 + ;; + st8 [r2]=r8 + st8 [r3]=r10 .work_pending: tbit.nz p6,p0=r31,TIF_SIGDELAYED // signal delayed from MCA/INIT/NMI/PMI context? (p6) br.cond.sptk.few .sigdelayed @@ -1104,13 +1103,13 @@ ;; (pKStk) st4 [r20]=r0 // preempt_count() <- 0 #endif -(pLvSys)br.cond.sptk.many .work_processed_syscall // re-check +(pLvSys)br.cond.sptk.few .work_pending_syscall_end br.cond.sptk.many .work_processed_kernel // re-check .notify: (pUStk) br.call.spnt.many rp=notify_resume_user .ret10: cmp.ne p6,p0=r0,r0 // p6 <- 0 -(pLvSys)br.cond.sptk.many .work_processed_syscall // don't re-check +(pLvSys)br.cond.sptk.few .work_pending_syscall_end br.cond.sptk.many .work_processed_kernel // don't re-check // There is a delayed signal that was detected in MCA/INIT/NMI/PMI context where @@ -1121,9 +1120,17 @@ .sigdelayed: br.call.sptk.many rp=do_sigdelayed cmp.eq p6,p0=r0,r0 // p6 <- 1, always re-check -(pLvSys)br.cond.sptk.many .work_processed_syscall // re-check +(pLvSys)br.cond.sptk.few .work_pending_syscall_end br.cond.sptk.many .work_processed_kernel // re-check +.work_pending_syscall_end: + adds r2=PT(R8)+16,r12 + adds r3=PT(R10)+16,r12 + ;; + ld8 r8=[r2] + ld8 r10=[r3] + br.cond.sptk.many .work_processed_syscall // re-check + END(ia64_leave_kernel) ENTRY(handle_syscall_error) @@ -1135,17 +1142,11 @@ */ PT_REGS_UNWIND_INFO(0) ld8 r3=[r2] // load pt_regs.r8 - sub r9=0,r8 // negate return value to get errno ;; - mov r10=-1 // return -1 in pt_regs.r10 to indicate error cmp.eq p6,p7=r3,r0 // is pt_regs.r8==0? - adds r3=16,r2 // r3=&pt_regs.r10 - ;; -(p6) mov r9=r8 -(p6) mov r10=0 ;; -.mem.offset 0,0; st8.spill [r2]=r9 // store errno in pt_regs.r8 and set unat bit -.mem.offset 8,0; st8.spill [r3]=r10 // store error indication in pt_regs.r10 and set unat bit +(p7) mov r10=-1 +(p7) sub r8=0,r8 // negate return value to get errno br.cond.sptk ia64_leave_syscall END(handle_syscall_error) diff -urN linux-2.6.11-rc3/arch/ia64/kernel/head.S linux-2.6.11-rc4/arch/ia64/kernel/head.S --- linux-2.6.11-rc3/arch/ia64/kernel/head.S 2005-02-12 19:50:35.326737367 -0800 +++ linux-2.6.11-rc4/arch/ia64/kernel/head.S 2005-02-12 19:50:52.906498431 -0800 @@ -5,7 +5,7 @@ * to set up the kernel's global pointer and jump to the kernel * entry point. * - * Copyright (C) 1998-2001, 2003 Hewlett-Packard Co + * Copyright (C) 1998-2001, 2003, 2005 Hewlett-Packard Co * David Mosberger-Tang * Stephane Eranian * Copyright (C) 1999 VA Linux Systems @@ -232,21 +232,6 @@ ;; (isBP) st8 [r2]=r28 // save the address of the boot param area passed by the bootloader -#ifdef CONFIG_IA64_EARLY_PRINTK - .rodata -alive_msg: - stringz "I'm alive and well\n" -alive_msg_end: - .previous - - alloc r2=ar.pfs,0,0,2,0 - movl out0=alive_msg - movl out1=alive_msg_end-alive_msg-1 - ;; - br.call.sptk.many rp=early_printk -1: // force new bundle -#endif /* CONFIG_IA64_EARLY_PRINTK */ - #ifdef CONFIG_SMP (isAP) br.call.sptk.many rp=start_secondary .ret0: @@ -267,7 +252,9 @@ ;; ld8 out0=[r3] br.call.sptk.many b0=console_print -self: br.sptk.many self // endless loop + +self: hint @pause + br.sptk.many self // endless loop END(_start) GLOBAL_ENTRY(ia64_save_debug_regs) diff -urN linux-2.6.11-rc3/arch/ia64/kernel/ivt.S linux-2.6.11-rc4/arch/ia64/kernel/ivt.S --- linux-2.6.11-rc3/arch/ia64/kernel/ivt.S 2005-02-12 19:50:35.332737626 -0800 +++ linux-2.6.11-rc4/arch/ia64/kernel/ivt.S 2005-02-12 19:50:52.912498691 -0800 @@ -548,7 +548,7 @@ #endif mov pr=r31,-1 // restore pr rfi -END(idirty_bit) +END(dirty_bit) .org ia64_ivt+0x2400 ///////////////////////////////////////////////////////////////////////////////////////// diff -urN linux-2.6.11-rc3/arch/ia64/kernel/mca.c linux-2.6.11-rc4/arch/ia64/kernel/mca.c --- linux-2.6.11-rc3/arch/ia64/kernel/mca.c 2005-02-12 19:50:35.333737670 -0800 +++ linux-2.6.11-rc4/arch/ia64/kernel/mca.c 2005-02-12 19:50:52.913498734 -0800 @@ -67,6 +67,7 @@ #include #include +#include #include #include #include @@ -86,6 +87,12 @@ ia64_mca_sal_to_os_state_t ia64_sal_to_os_handoff_state; ia64_mca_os_to_sal_state_t ia64_os_to_sal_handoff_state; u64 ia64_mca_serialize; +DEFINE_PER_CPU(u64, ia64_mca_data); /* == __per_cpu_mca[smp_processor_id()] */ +DEFINE_PER_CPU(u64, ia64_mca_per_cpu_pte); /* PTE to map per-CPU area */ +DEFINE_PER_CPU(u64, ia64_mca_pal_pte); /* PTE to map PAL code */ +DEFINE_PER_CPU(u64, ia64_mca_pal_base); /* vaddr PAL code granule */ + +unsigned long __per_cpu_mca[NR_CPUS]; /* In mca_asm.S */ extern void ia64_monarch_init_handler (void); @@ -1195,6 +1202,53 @@ }; #endif /* CONFIG_ACPI */ +/* Do per-CPU MCA-related initialization. */ + +void __devinit +ia64_mca_cpu_init(void *cpu_data) +{ + void *pal_vaddr; + + if (smp_processor_id() == 0) { + void *mca_data; + int cpu; + + mca_data = alloc_bootmem(sizeof(struct ia64_mca_cpu) + * NR_CPUS); + for (cpu = 0; cpu < NR_CPUS; cpu++) { + __per_cpu_mca[cpu] = __pa(mca_data); + mca_data += sizeof(struct ia64_mca_cpu); + } + } + + /* + * The MCA info structure was allocated earlier and its + * physical address saved in __per_cpu_mca[cpu]. Copy that + * address * to ia64_mca_data so we can access it as a per-CPU + * variable. + */ + __get_cpu_var(ia64_mca_data) = __per_cpu_mca[smp_processor_id()]; + + /* + * Stash away a copy of the PTE needed to map the per-CPU page. + * We may need it during MCA recovery. + */ + __get_cpu_var(ia64_mca_per_cpu_pte) = + pte_val(mk_pte_phys(__pa(cpu_data), PAGE_KERNEL)); + + /* + * Also, stash away a copy of the PAL address and the PTE + * needed to map it. + */ + pal_vaddr = efi_get_pal_addr(); + if (!pal_vaddr) + return; + __get_cpu_var(ia64_mca_pal_base) = + GRANULEROUNDDOWN((unsigned long) pal_vaddr); + __get_cpu_var(ia64_mca_pal_pte) = pte_val(mk_pte_phys(__pa(pal_vaddr), + PAGE_KERNEL)); +} + /* * ia64_mca_init * diff -urN linux-2.6.11-rc3/arch/ia64/kernel/mca_asm.S linux-2.6.11-rc4/arch/ia64/kernel/mca_asm.S --- linux-2.6.11-rc3/arch/ia64/kernel/mca_asm.S 2005-02-12 19:50:35.334737713 -0800 +++ linux-2.6.11-rc4/arch/ia64/kernel/mca_asm.S 2005-02-12 19:50:52.914498777 -0800 @@ -101,6 +101,11 @@ ld8 tmp=[sal_to_os_handoff];; \ st8 [os_to_sal_handoff]=tmp;; +#define GET_IA64_MCA_DATA(reg) \ + GET_THIS_PADDR(reg, ia64_mca_data) \ + ;; \ + ld8 reg=[reg] + .global ia64_os_mca_dispatch .global ia64_os_mca_dispatch_end .global ia64_sal_to_os_handoff_state @@ -144,24 +149,26 @@ // The following code purges TC and TR entries. Then reload all TC entries. // Purge percpu data TC entries. begin_tlb_purge_and_reload: - GET_PERCPU_PADDR(r2) // paddr of percpu_paddr in cpuinfo struct - ;; - mov r17=r2 - ;; - adds r17=8,r17 + +#define O(member) IA64_CPUINFO_##member##_OFFSET + + GET_THIS_PADDR(r2, cpu_info) // load phys addr of cpu_info into r2 ;; - ld8 r18=[r17],8 // r18=ptce_base - ;; - ld4 r19=[r17],4 // r19=ptce_count[0] + addl r17=O(PTCE_STRIDE),r2 + addl r2=O(PTCE_BASE),r2 ;; - ld4 r20=[r17],4 // r20=ptce_count[1] + ld8 r18=[r2],(O(PTCE_COUNT)-O(PTCE_BASE));; // r18=ptce_base + ld4 r19=[r2],4 // r19=ptce_count[0] + ld4 r21=[r17],4 // r21=ptce_stride[0] ;; - ld4 r21=[r17],4 // r21=ptce_stride[0] + ld4 r20=[r2] // r20=ptce_count[1] + ld4 r22=[r17] // r22=ptce_stride[1] mov r24=0 ;; - ld4 r22=[r17],4 // r22=ptce_stride[1] adds r20=-1,r20 ;; +#undef O + 2: cmp.ltu p6,p7=r24,r19 (p7) br.cond.dpnt.few 4f @@ -201,9 +208,9 @@ srlz.d ;; // 3. Purge ITR for PAL code. - adds r17=40,r23 + GET_THIS_PADDR(r2, ia64_mca_pal_base) ;; - ld8 r16=[r17] + ld8 r16=[r2] mov r18=IA64_GRANULE_SHIFT<<2 ;; ptr.i r16,r18 @@ -246,16 +253,15 @@ srlz.d ;; // 2. Reload DTR register for PERCPU data. - GET_PERCPU_PADDR(r2) // paddr of percpu_paddr in cpuinfo struct + GET_THIS_PADDR(r2, ia64_mca_per_cpu_pte) ;; - mov r17=r2 movl r16=PERCPU_ADDR // vaddr movl r18=PERCPU_PAGE_SHIFT<<2 ;; mov cr.itir=r18 mov cr.ifa=r16 ;; - ld8 r18=[r17] // pte + ld8 r18=[r2] // load per-CPU PTE mov r16=IA64_TR_PERCPU_DATA; ;; itr.d dtr[r16]=r18 @@ -263,13 +269,13 @@ srlz.d ;; // 3. Reload ITR for PAL code. - GET_CPUINFO_PAL_PADDR(r2) // paddr of pal_paddr in cpuinfo struct + GET_THIS_PADDR(r2, ia64_mca_pal_pte) ;; - mov r17=r2 + ld8 r18=[r2] // load PAL PTE ;; - ld8 r18=[r17],8 // pte + GET_THIS_PADDR(r2, ia64_mca_pal_base) ;; - ld8 r16=[r17] // vaddr + ld8 r16=[r2] // load PAL vaddr mov r19=IA64_GRANULE_SHIFT<<2 ;; mov cr.itir=r19 @@ -308,14 +314,18 @@ done_tlb_purge_and_reload: // Setup new stack frame for OS_MCA handling - GET_MCA_BSPSTORE(r2) // paddr of bspstore save area - GET_MCA_STACKFRAME(r3);; // paddr of stack frame save area + GET_IA64_MCA_DATA(r2) + ;; + add r3 = IA64_MCA_CPU_STACKFRAME_OFFSET, r2 + add r2 = IA64_MCA_CPU_RBSTORE_OFFSET, r2 + ;; rse_switch_context(r6,r3,r2);; // RSC management in this new context - GET_MCA_STACK(r2);; // paddr of stack save area - // stack size must be same as C array - addl r2=8*1024-16,r2;; // stack base @ bottom of array - mov r12=r2 // allow 16 bytes of scratch - // (C calling convention) + + GET_IA64_MCA_DATA(r2) + ;; + add r2 = IA64_MCA_CPU_STACK_OFFSET+IA64_MCA_STACK_SIZE-16, r2 + ;; + mov r12=r2 // establish new stack-pointer // Enter virtual mode from physical mode VIRTUAL_MODE_ENTER(r2, r3, ia64_os_mca_virtual_begin, r4) @@ -331,7 +341,10 @@ ia64_os_mca_virtual_end: // restore the original stack frame here - GET_MCA_STACKFRAME(r2);; // phys addr of MCA save area + GET_IA64_MCA_DATA(r2) + ;; + add r2 = IA64_MCA_CPU_STACKFRAME_OFFSET, r2 + ;; movl r4=IA64_PSR_MC ;; rse_return_context(r4,r3,r2) // switch from interrupt context for RSE @@ -372,8 +385,10 @@ ia64_os_mca_proc_state_dump: // Save bank 1 GRs 16-31 which will be used by c-language code when we switch // to virtual addressing mode. - GET_MCA_DUMP_PADDR(r2);; // phys addr of MCA save area - + GET_IA64_MCA_DATA(r2) + ;; + add r2 = IA64_MCA_CPU_PROC_STATE_DUMP_OFFSET, r2 + ;; // save ar.NaT mov r5=ar.unat // ar.unat @@ -603,7 +618,9 @@ ia64_os_mca_proc_state_restore: // Restore bank1 GR16-31 - GET_MCA_DUMP_PADDR(r2);; // phys addr of proc state dump area + GET_IA64_MCA_DATA(r2) + ;; + add r2 = IA64_MCA_CPU_PROC_STATE_DUMP_OFFSET, r2 restore_GRs: // restore bank-1 GRs 16-31 bsw.1;; diff -urN linux-2.6.11-rc3/arch/ia64/kernel/minstate.h linux-2.6.11-rc4/arch/ia64/kernel/minstate.h --- linux-2.6.11-rc3/arch/ia64/kernel/minstate.h 2005-02-12 19:50:35.335737756 -0800 +++ linux-2.6.11-rc4/arch/ia64/kernel/minstate.h 2005-02-12 19:50:52.915498820 -0800 @@ -37,10 +37,10 @@ * go virtual and don't want to destroy the iip or ipsr. */ #define MINSTATE_START_SAVE_MIN_PHYS \ -(pKStk) mov r3=ar.k3;; \ -(pKStk) addl r3=IA64_CPUINFO_PA_MCA_INFO,r3;; \ +(pKStk) mov r3=IA64_KR(PER_CPU_DATA);; \ +(pKStk) addl r3=THIS_CPU(ia64_mca_data),r3;; \ (pKStk) ld8 r3 = [r3];; \ -(pKStk) addl r3=IA64_INIT_STACK,r3;; \ +(pKStk) addl r3=IA64_MCA_CPU_INIT_STACK_OFFSET,r3;; \ (pKStk) addl sp=IA64_STK_OFFSET-IA64_PT_REGS_SIZE,r3; \ (pUStk) mov ar.rsc=0; /* set enforced lazy mode, pl 0, little-endian, loadrs=0 */ \ (pUStk) addl r22=IA64_RBS_OFFSET,r1; /* compute base of register backing store */ \ diff -urN linux-2.6.11-rc3/arch/ia64/kernel/perfmon.c linux-2.6.11-rc4/arch/ia64/kernel/perfmon.c --- linux-2.6.11-rc3/arch/ia64/kernel/perfmon.c 2005-02-12 19:50:35.339737929 -0800 +++ linux-2.6.11-rc4/arch/ia64/kernel/perfmon.c 2005-02-12 19:50:52.920499037 -0800 @@ -5,13 +5,13 @@ * The initial version of perfmon.c was written by * Ganesh Venkitachalam, IBM Corp. * - * Then it was modified for perfmon-1.x by Stephane Eranian and + * Then it was modified for perfmon-1.x by Stephane Eranian and * David Mosberger, Hewlett Packard Co. - * + * * Version Perfmon-2.x is a rewrite of perfmon-1.x - * by Stephane Eranian, Hewlett Packard Co. + * by Stephane Eranian, Hewlett Packard Co. * - * Copyright (C) 1999-2003 Hewlett Packard Co + * Copyright (C) 1999-2003, 2005 Hewlett Packard Co * Stephane Eranian * David Mosberger-Tang * @@ -4778,10 +4778,8 @@ * system-call entry point (must return long) */ asmlinkage long -sys_perfmonctl (int fd, int cmd, void __user *arg, int count, long arg5, long arg6, long arg7, - long arg8, long stack) +sys_perfmonctl (int fd, int cmd, void __user *arg, int count) { - struct pt_regs *regs = (struct pt_regs *)&stack; struct file *file = NULL; pfm_context_t *ctx = NULL; unsigned long flags = 0UL; @@ -4905,7 +4903,7 @@ if (unlikely(ret)) goto abort_locked; skip_fd: - ret = (*func)(ctx, args_k, count, regs); + ret = (*func)(ctx, args_k, count, ia64_task_regs(current)); call_made = 1; @@ -6671,8 +6669,7 @@ } #else /* !CONFIG_PERFMON */ asmlinkage long -sys_perfmonctl (int fd, int cmd, void *arg, int count, long arg5, long arg6, long arg7, - long arg8, long stack) +sys_perfmonctl (int fd, int cmd, void *arg, int count) { return -ENOSYS; } diff -urN linux-2.6.11-rc3/arch/ia64/kernel/ptrace.c linux-2.6.11-rc4/arch/ia64/kernel/ptrace.c --- linux-2.6.11-rc3/arch/ia64/kernel/ptrace.c 2005-02-12 19:50:35.342738059 -0800 +++ linux-2.6.11-rc4/arch/ia64/kernel/ptrace.c 2005-02-12 19:50:52.925499253 -0800 @@ -1,11 +1,10 @@ /* * Kernel support for the ptrace() and syscall tracing interfaces. * - * Copyright (C) 1999-2004 Hewlett-Packard Co + * Copyright (C) 1999-2005 Hewlett-Packard Co * David Mosberger-Tang * - * Derived from the x86 and Alpha versions. Most of the code in here - * could actually be factored into a common set of routines. + * Derived from the x86 and Alpha versions. */ #include #include @@ -40,9 +39,11 @@ * ri (restart instruction; two bits) * is (instruction set; one bit) */ -#define IPSR_WRITE_MASK \ - (IA64_PSR_UM | IA64_PSR_DB | IA64_PSR_IS | IA64_PSR_ID | IA64_PSR_DD | IA64_PSR_RI) -#define IPSR_READ_MASK IPSR_WRITE_MASK +#define IPSR_MASK (IA64_PSR_UM | IA64_PSR_DB | IA64_PSR_IS \ + | IA64_PSR_ID | IA64_PSR_DD | IA64_PSR_RI) + +#define MASK(nbits) ((1UL << (nbits)) - 1) /* mask with NBITS bits set */ +#define PFM_MASK MASK(38) #define PTRACE_DEBUG 0 @@ -68,23 +69,24 @@ unsigned long ia64_get_scratch_nat_bits (struct pt_regs *pt, unsigned long scratch_unat) { -# define GET_BITS(first, last, unat) \ - ({ \ - unsigned long bit = ia64_unat_pos(&pt->r##first); \ - unsigned long mask = ((1UL << (last - first + 1)) - 1) << first; \ - unsigned long dist; \ - if (bit < first) \ - dist = 64 + bit - first; \ - else \ - dist = bit - first; \ - ia64_rotr(unat, dist) & mask; \ +# define GET_BITS(first, last, unat) \ + ({ \ + unsigned long bit = ia64_unat_pos(&pt->r##first); \ + unsigned long nbits = (last - first + 1); \ + unsigned long mask = MASK(nbits) << first; \ + unsigned long dist; \ + if (bit < first) \ + dist = 64 + bit - first; \ + else \ + dist = bit - first; \ + ia64_rotr(unat, dist) & mask; \ }) unsigned long val; /* - * Registers that are stored consecutively in struct pt_regs can be handled in - * parallel. If the register order in struct_pt_regs changes, this code MUST be - * updated. + * Registers that are stored consecutively in struct pt_regs + * can be handled in parallel. If the register order in + * struct_pt_regs changes, this code MUST be updated. */ val = GET_BITS( 1, 1, scratch_unat); val |= GET_BITS( 2, 3, scratch_unat); @@ -106,23 +108,24 @@ unsigned long ia64_put_scratch_nat_bits (struct pt_regs *pt, unsigned long nat) { -# define PUT_BITS(first, last, nat) \ - ({ \ - unsigned long bit = ia64_unat_pos(&pt->r##first); \ - unsigned long mask = ((1UL << (last - first + 1)) - 1) << first; \ - long dist; \ - if (bit < first) \ - dist = 64 + bit - first; \ - else \ - dist = bit - first; \ - ia64_rotl(nat & mask, dist); \ +# define PUT_BITS(first, last, nat) \ + ({ \ + unsigned long bit = ia64_unat_pos(&pt->r##first); \ + unsigned long nbits = (last - first + 1); \ + unsigned long mask = MASK(nbits) << first; \ + long dist; \ + if (bit < first) \ + dist = 64 + bit - first; \ + else \ + dist = bit - first; \ + ia64_rotl(nat & mask, dist); \ }) unsigned long scratch_unat; /* - * Registers that are stored consecutively in struct pt_regs can be handled in - * parallel. If the register order in struct_pt_regs changes, this code MUST be - * updated. + * Registers that are stored consecutively in struct pt_regs + * can be handled in parallel. If the register order in + * struct_pt_regs changes, this code MUST be updated. */ scratch_unat = PUT_BITS( 1, 1, nat); scratch_unat |= PUT_BITS( 2, 3, nat); @@ -185,10 +188,12 @@ } /* - * This routine is used to read an rnat bits that are stored on the kernel backing store. - * Since, in general, the alignment of the user and kernel are different, this is not - * completely trivial. In essence, we need to construct the user RNAT based on up to two - * kernel RNAT values and/or the RNAT value saved in the child's pt_regs. + * This routine is used to read an rnat bits that are stored on the + * kernel backing store. Since, in general, the alignment of the user + * and kernel are different, this is not completely trivial. In + * essence, we need to construct the user RNAT based on up to two + * kernel RNAT values and/or the RNAT value saved in the child's + * pt_regs. * * user rbs * @@ -221,24 +226,28 @@ * +--------+ * <--- child_stack->ar_bspstore * - * The way to think of this code is as follows: bit 0 in the user rnat corresponds to some - * bit N (0 <= N <= 62) in one of the kernel rnat value. The kernel rnat value holding - * this bit is stored in variable rnat0. rnat1 is loaded with the kernel rnat value that + * The way to think of this code is as follows: bit 0 in the user rnat + * corresponds to some bit N (0 <= N <= 62) in one of the kernel rnat + * value. The kernel rnat value holding this bit is stored in + * variable rnat0. rnat1 is loaded with the kernel rnat value that * form the upper bits of the user rnat value. * * Boundary cases: * - * o when reading the rnat "below" the first rnat slot on the kernel backing store, - * rnat0/rnat1 are set to 0 and the low order bits are merged in from pt->ar_rnat. + * o when reading the rnat "below" the first rnat slot on the kernel + * backing store, rnat0/rnat1 are set to 0 and the low order bits are + * merged in from pt->ar_rnat. * - * o when reading the rnat "above" the last rnat slot on the kernel backing store, - * rnat0/rnat1 gets its value from sw->ar_rnat. + * o when reading the rnat "above" the last rnat slot on the kernel + * backing store, rnat0/rnat1 gets its value from sw->ar_rnat. */ static unsigned long get_rnat (struct task_struct *task, struct switch_stack *sw, - unsigned long *krbs, unsigned long *urnat_addr, unsigned long *urbs_end) + unsigned long *krbs, unsigned long *urnat_addr, + unsigned long *urbs_end) { - unsigned long rnat0 = 0, rnat1 = 0, urnat = 0, *slot0_kaddr, umask = 0, mask, m; + unsigned long rnat0 = 0, rnat1 = 0, urnat = 0, *slot0_kaddr; + unsigned long umask = 0, mask, m; unsigned long *kbsp, *ubspstore, *rnat0_kaddr, *rnat1_kaddr, shift; long num_regs, nbits; struct pt_regs *pt; @@ -251,11 +260,12 @@ nbits = ia64_rse_num_regs(urnat_addr - 63, urbs_end); else nbits = 63; - mask = (1UL << nbits) - 1; + mask = MASK(nbits); /* - * First, figure out which bit number slot 0 in user-land maps to in the kernel - * rnat. Do this by figuring out how many register slots we're beyond the user's - * backingstore and then computing the equivalent address in kernel space. + * First, figure out which bit number slot 0 in user-land maps + * to in the kernel rnat. Do this by figuring out how many + * register slots we're beyond the user's backingstore and + * then computing the equivalent address in kernel space. */ num_regs = ia64_rse_num_regs(ubspstore, urnat_addr + 1); slot0_kaddr = ia64_rse_skip_regs(krbs, num_regs); @@ -265,7 +275,7 @@ if (ubspstore + 63 > urnat_addr) { /* some bits need to be merged in from pt->ar_rnat */ - umask = ((1UL << ia64_rse_slot_num(ubspstore)) - 1) & mask; + umask = MASK(ia64_rse_slot_num(ubspstore)) & mask; urnat = (pt->ar_rnat & umask); mask &= ~umask; if (!mask) @@ -323,12 +333,13 @@ return; nbits = ia64_rse_num_regs(urnat_addr - 63, urbs_kargs); } - mask = (1UL << nbits) - 1; + mask = MASK(nbits); /* - * First, figure out which bit number slot 0 in user-land maps to in the kernel - * rnat. Do this by figuring out how many register slots we're beyond the user's - * backingstore and then computing the equivalent address in kernel space. + * First, figure out which bit number slot 0 in user-land maps + * to in the kernel rnat. Do this by figuring out how many + * register slots we're beyond the user's backingstore and + * then computing the equivalent address in kernel space. */ num_regs = ia64_rse_num_regs(ubspstore, urnat_addr + 1); slot0_kaddr = ia64_rse_skip_regs(krbs, num_regs); @@ -338,7 +349,7 @@ if (ubspstore + 63 > urnat_addr) { /* some bits need to be place in pt->ar_rnat: */ - umask = ((1UL << ia64_rse_slot_num(ubspstore)) - 1) & mask; + umask = MASK(ia64_rse_slot_num(ubspstore)) & mask; pt->ar_rnat = (pt->ar_rnat & ~umask) | (urnat & umask); mask &= ~umask; if (!mask) @@ -364,25 +375,28 @@ } static inline int -on_kernel_rbs (unsigned long addr, unsigned long bspstore, unsigned long urbs_end) +on_kernel_rbs (unsigned long addr, unsigned long bspstore, + unsigned long urbs_end) { - return (addr >= bspstore - && addr <= (unsigned long) ia64_rse_rnat_addr((unsigned long *) urbs_end)); + unsigned long *rnat_addr = ia64_rse_rnat_addr((unsigned long *) + urbs_end); + return (addr >= bspstore && addr <= (unsigned long) rnat_addr); } /* - * Read a word from the user-level backing store of task CHILD. ADDR is the user-level - * address to read the word from, VAL a pointer to the return value, and USER_BSP gives - * the end of the user-level backing store (i.e., it's the address that would be in ar.bsp - * after the user executed a "cover" instruction). + * Read a word from the user-level backing store of task CHILD. ADDR + * is the user-level address to read the word from, VAL a pointer to + * the return value, and USER_BSP gives the end of the user-level + * backing store (i.e., it's the address that would be in ar.bsp after + * the user executed a "cover" instruction). * - * This routine takes care of accessing the kernel register backing store for those - * registers that got spilled there. It also takes care of calculating the appropriate - * RNaT collection words. + * This routine takes care of accessing the kernel register backing + * store for those registers that got spilled there. It also takes + * care of calculating the appropriate RNaT collection words. */ long -ia64_peek (struct task_struct *child, struct switch_stack *child_stack, unsigned long user_rbs_end, - unsigned long addr, long *val) +ia64_peek (struct task_struct *child, struct switch_stack *child_stack, + unsigned long user_rbs_end, unsigned long addr, long *val) { unsigned long *bspstore, *krbs, regnum, *laddr, *urbs_end, *rnat_addr; struct pt_regs *child_regs; @@ -394,10 +408,13 @@ child_regs = ia64_task_regs(child); bspstore = (unsigned long *) child_regs->ar_bspstore; krbs = (unsigned long *) child + IA64_RBS_OFFSET/8; - if (on_kernel_rbs(addr, (unsigned long) bspstore, (unsigned long) urbs_end)) { + if (on_kernel_rbs(addr, (unsigned long) bspstore, + (unsigned long) urbs_end)) + { /* - * Attempt to read the RBS in an area that's actually on the kernel RBS => - * read the corresponding bits in the kernel RBS. + * Attempt to read the RBS in an area that's actually + * on the kernel RBS => read the corresponding bits in + * the kernel RBS. */ rnat_addr = ia64_rse_rnat_addr(laddr); ret = get_rnat(child, child_stack, krbs, rnat_addr, urbs_end); @@ -410,18 +427,23 @@ if (((1UL << ia64_rse_slot_num(laddr)) & ret) != 0) { /* - * It is implementation dependent whether the data portion of a - * NaT value gets saved on a st8.spill or RSE spill (e.g., see - * EAS 2.6, 4.4.4.6 Register Spill and Fill). To get consistent - * behavior across all possible IA-64 implementations, we return - * zero in this case. + * It is implementation dependent whether the + * data portion of a NaT value gets saved on a + * st8.spill or RSE spill (e.g., see EAS 2.6, + * 4.4.4.6 Register Spill and Fill). To get + * consistent behavior across all possible + * IA-64 implementations, we return zero in + * this case. */ *val = 0; return 0; } if (laddr < urbs_end) { - /* the desired word is on the kernel RBS and is not a NaT */ + /* + * The desired word is on the kernel RBS and + * is not a NaT. + */ regnum = ia64_rse_num_regs(bspstore, laddr); *val = *ia64_rse_skip_regs(krbs, regnum); return 0; @@ -435,43 +457,51 @@ } long -ia64_poke (struct task_struct *child, struct switch_stack *child_stack, unsigned long user_rbs_end, - unsigned long addr, long val) +ia64_poke (struct task_struct *child, struct switch_stack *child_stack, + unsigned long user_rbs_end, unsigned long addr, long val) { - unsigned long *bspstore, *krbs, regnum, *laddr, *urbs_end = (long *) user_rbs_end; + unsigned long *bspstore, *krbs, regnum, *laddr; + unsigned long *urbs_end = (long *) user_rbs_end; struct pt_regs *child_regs; laddr = (unsigned long *) addr; child_regs = ia64_task_regs(child); bspstore = (unsigned long *) child_regs->ar_bspstore; krbs = (unsigned long *) child + IA64_RBS_OFFSET/8; - if (on_kernel_rbs(addr, (unsigned long) bspstore, (unsigned long) urbs_end)) { + if (on_kernel_rbs(addr, (unsigned long) bspstore, + (unsigned long) urbs_end)) + { /* - * Attempt to write the RBS in an area that's actually on the kernel RBS - * => write the corresponding bits in the kernel RBS. + * Attempt to write the RBS in an area that's actually + * on the kernel RBS => write the corresponding bits + * in the kernel RBS. */ if (ia64_rse_is_rnat_slot(laddr)) - put_rnat(child, child_stack, krbs, laddr, val, urbs_end); + put_rnat(child, child_stack, krbs, laddr, val, + urbs_end); else { if (laddr < urbs_end) { regnum = ia64_rse_num_regs(bspstore, laddr); *ia64_rse_skip_regs(krbs, regnum) = val; } } - } else if (access_process_vm(child, addr, &val, sizeof(val), 1) != sizeof(val)) { + } else if (access_process_vm(child, addr, &val, sizeof(val), 1) + != sizeof(val)) return -EIO; - } return 0; } /* - * Calculate the address of the end of the user-level register backing store. This is the - * address that would have been stored in ar.bsp if the user had executed a "cover" - * instruction right before entering the kernel. If CFMP is not NULL, it is used to - * return the "current frame mask" that was active at the time the kernel was entered. + * Calculate the address of the end of the user-level register backing + * store. This is the address that would have been stored in ar.bsp + * if the user had executed a "cover" instruction right before + * entering the kernel. If CFMP is not NULL, it is used to return the + * "current frame mask" that was active at the time the kernel was + * entered. */ unsigned long -ia64_get_user_rbs_end (struct task_struct *child, struct pt_regs *pt, unsigned long *cfmp) +ia64_get_user_rbs_end (struct task_struct *child, struct pt_regs *pt, + unsigned long *cfmp) { unsigned long *krbs, *bspstore, cfm = pt->cr_ifs; long ndirty; @@ -491,9 +521,11 @@ } /* - * Synchronize (i.e, write) the RSE backing store living in kernel space to the VM of the - * CHILD task. SW and PT are the pointers to the switch_stack and pt_regs structures, - * respectively. USER_RBS_END is the user-level address at which the backing store ends. + * Synchronize (i.e, write) the RSE backing store living in kernel + * space to the VM of the CHILD task. SW and PT are the pointers to + * the switch_stack and pt_regs structures, respectively. + * USER_RBS_END is the user-level address at which the backing store + * ends. */ long ia64_sync_user_rbs (struct task_struct *child, struct switch_stack *sw, @@ -507,7 +539,8 @@ ret = ia64_peek(child, sw, user_rbs_end, addr, &val); if (ret < 0) return ret; - if (access_process_vm(child, addr, &val, sizeof(val), 1) != sizeof(val)) + if (access_process_vm(child, addr, &val, sizeof(val), 1) + != sizeof(val)) return -EIO; } return 0; @@ -521,13 +554,14 @@ if (ptrace_check_attach(thread, 0) < 0) /* - * If the thread is not in an attachable state, we'll ignore it. - * The net effect is that if ADDR happens to overlap with the - * portion of the thread's register backing store that is - * currently residing on the thread's kernel stack, then ptrace() - * may end up accessing a stale value. But if the thread isn't - * stopped, that's a problem anyhow, so we're doing as well as we - * can... + * If the thread is not in an attachable state, we'll + * ignore it. The net effect is that if ADDR happens + * to overlap with the portion of the thread's + * register backing store that is currently residing + * on the thread's kernel stack, then ptrace() may end + * up accessing a stale value. But if the thread + * isn't stopped, that's a problem anyhow, so we're + * doing as well as we can... */ return 0; @@ -540,10 +574,11 @@ } /* - * GDB apparently wants to be able to read the register-backing store of any thread when - * attached to a given process. If we are peeking or poking an address that happens to - * reside in the kernel-backing store of another thread, we need to attach to that thread, - * because otherwise we end up accessing stale data. + * GDB apparently wants to be able to read the register-backing store + * of any thread when attached to a given process. If we are peeking + * or poking an address that happens to reside in the kernel-backing + * store of another thread, we need to attach to that thread, because + * otherwise we end up accessing stale data. * * task_list_lock must be read-locked before calling this routine! */ @@ -557,7 +592,8 @@ if (!(mm = get_task_mm(child))) return child; - mm_users = atomic_read(&mm->mm_users) - 1; /* -1 because of our get_task_mm()... */ + /* -1 because of our get_task_mm(): */ + mm_users = atomic_read(&mm->mm_users) - 1; if (mm_users <= 1) goto out; /* not multi-threaded */ @@ -627,7 +663,8 @@ } static int -access_fr (struct unw_frame_info *info, int regnum, int hi, unsigned long *data, int write_access) +access_fr (struct unw_frame_info *info, int regnum, int hi, + unsigned long *data, int write_access) { struct ia64_fpreg fpval; int ret; @@ -649,7 +686,8 @@ * kernel exit-path, rather than the syscall-exit path. */ static void -convert_to_non_syscall (struct task_struct *child, struct pt_regs *pt, unsigned long cfm) +convert_to_non_syscall (struct task_struct *child, struct pt_regs *pt, + unsigned long cfm) { struct unw_frame_info info, prev_info; unsigned long ip, pr; @@ -674,11 +712,51 @@ } static int -access_uarea (struct task_struct *child, unsigned long addr, unsigned long *data, int write_access) +access_nat_bits (struct task_struct *child, struct pt_regs *pt, + struct unw_frame_info *info, + unsigned long *data, int write_access) +{ + unsigned long regnum, nat_bits, scratch_unat, dummy = 0; + char nat = 0; + + if (write_access) { + nat_bits = *data; + scratch_unat = ia64_put_scratch_nat_bits(pt, nat_bits); + if (unw_set_ar(info, UNW_AR_UNAT, scratch_unat) < 0) { + dprintk("ptrace: failed to set ar.unat\n"); + return -1; + } + for (regnum = 4; regnum <= 7; ++regnum) { + unw_get_gr(info, regnum, &dummy, &nat); + unw_set_gr(info, regnum, dummy, + (nat_bits >> regnum) & 1); + } + } else { + if (unw_get_ar(info, UNW_AR_UNAT, &scratch_unat) < 0) { + dprintk("ptrace: failed to read ar.unat\n"); + return -1; + } + nat_bits = ia64_get_scratch_nat_bits(pt, scratch_unat); + for (regnum = 4; regnum <= 7; ++regnum) { + unw_get_gr(info, regnum, &dummy, &nat); + nat_bits |= (nat != 0) << regnum; + } + *data = nat_bits; + } + return 0; +} + +static int +access_uarea (struct task_struct *child, unsigned long addr, + unsigned long *data, int write_access) { unsigned long *ptr, regnum, urbs_end, rnat_addr, cfm; struct switch_stack *sw; struct pt_regs *pt; +# define pt_reg_addr(pt, reg) ((void *) \ + ((unsigned long) (pt) \ + + offsetof(struct pt_regs, reg))) + pt = ia64_task_regs(child); sw = (struct switch_stack *) (child->thread.ksp + 16); @@ -694,17 +772,20 @@ ia64_sync_fph(child); else ia64_flush_fph(child); - ptr = (unsigned long *) ((unsigned long) &child->thread.fph + addr); + ptr = (unsigned long *) + ((unsigned long) &child->thread.fph + addr); } else if ((addr >= PT_F10) && (addr < PT_F11 + 16)) { /* scratch registers untouched by kernel (saved in pt_regs) */ - ptr = (unsigned long *) - ((long) pt + offsetof(struct pt_regs, f10) + addr - PT_F10); + ptr = pt_reg_addr(pt, f10) + (addr - PT_F10); } else if (addr >= PT_F12 && addr < PT_F15 + 16) { - /* scratch registers untouched by kernel (saved in switch_stack) */ - ptr = (unsigned long *) ((long) sw + (addr - PT_NAT_BITS - 32)); + /* + * Scratch registers untouched by kernel (saved in + * switch_stack). + */ + ptr = (unsigned long *) ((long) sw + + (addr - PT_NAT_BITS - 32)); } else if (addr < PT_AR_LC + 8) { /* preserved state: */ - unsigned long nat_bits, scratch_unat, dummy = 0; struct unw_frame_info info; char nat = 0; int ret; @@ -715,62 +796,48 @@ switch (addr) { case PT_NAT_BITS: - if (write_access) { - nat_bits = *data; - scratch_unat = ia64_put_scratch_nat_bits(pt, nat_bits); - if (unw_set_ar(&info, UNW_AR_UNAT, scratch_unat) < 0) { - dprintk("ptrace: failed to set ar.unat\n"); - return -1; - } - for (regnum = 4; regnum <= 7; ++regnum) { - unw_get_gr(&info, regnum, &dummy, &nat); - unw_set_gr(&info, regnum, dummy, (nat_bits >> regnum) & 1); - } - } else { - if (unw_get_ar(&info, UNW_AR_UNAT, &scratch_unat) < 0) { - dprintk("ptrace: failed to read ar.unat\n"); - return -1; - } - nat_bits = ia64_get_scratch_nat_bits(pt, scratch_unat); - for (regnum = 4; regnum <= 7; ++regnum) { - unw_get_gr(&info, regnum, &dummy, &nat); - nat_bits |= (nat != 0) << regnum; - } - *data = nat_bits; - } - return 0; + return access_nat_bits(child, pt, &info, + data, write_access); case PT_R4: case PT_R5: case PT_R6: case PT_R7: if (write_access) { /* read NaT bit first: */ unsigned long dummy; - ret = unw_get_gr(&info, (addr - PT_R4)/8 + 4, &dummy, &nat); + ret = unw_get_gr(&info, (addr - PT_R4)/8 + 4, + &dummy, &nat); if (ret < 0) return ret; } - return unw_access_gr(&info, (addr - PT_R4)/8 + 4, data, &nat, - write_access); + return unw_access_gr(&info, (addr - PT_R4)/8 + 4, data, + &nat, write_access); - case PT_B1: case PT_B2: case PT_B3: case PT_B4: case PT_B5: - return unw_access_br(&info, (addr - PT_B1)/8 + 1, data, write_access); + case PT_B1: case PT_B2: case PT_B3: + case PT_B4: case PT_B5: + return unw_access_br(&info, (addr - PT_B1)/8 + 1, data, + write_access); case PT_AR_EC: - return unw_access_ar(&info, UNW_AR_EC, data, write_access); + return unw_access_ar(&info, UNW_AR_EC, data, + write_access); case PT_AR_LC: - return unw_access_ar(&info, UNW_AR_LC, data, write_access); + return unw_access_ar(&info, UNW_AR_LC, data, + write_access); default: if (addr >= PT_F2 && addr < PT_F5 + 16) - return access_fr(&info, (addr - PT_F2)/16 + 2, (addr & 8) != 0, - data, write_access); + return access_fr(&info, (addr - PT_F2)/16 + 2, + (addr & 8) != 0, data, + write_access); else if (addr >= PT_F16 && addr < PT_F31 + 16) - return access_fr(&info, (addr - PT_F16)/16 + 16, (addr & 8) != 0, + return access_fr(&info, + (addr - PT_F16)/16 + 16, + (addr & 8) != 0, data, write_access); else { - dprintk("ptrace: rejecting access to register address 0x%lx\n", - addr); + dprintk("ptrace: rejecting access to register " + "address 0x%lx\n", addr); return -1; } } @@ -779,34 +846,49 @@ switch (addr) { case PT_AR_BSP: /* - * By convention, we use PT_AR_BSP to refer to the end of the user-level - * backing store. Use ia64_rse_skip_regs(PT_AR_BSP, -CFM.sof) to get - * the real value of ar.bsp at the time the kernel was entered. + * By convention, we use PT_AR_BSP to refer to + * the end of the user-level backing store. + * Use ia64_rse_skip_regs(PT_AR_BSP, -CFM.sof) + * to get the real value of ar.bsp at the time + * the kernel was entered. * - * Furthermore, when changing the contents of PT_AR_BSP (or - * PT_CFM) we MUST copy any users-level stacked registers that are - * stored on the kernel stack back to user-space because - * otherwise, we might end up clobbering kernel stacked registers. - * Also, if this happens while the task is blocked in a system - * call, which convert the state such that the non-system-call - * exit path is used. This ensures that the proper state will be - * picked up when resuming execution. However, it *also* means - * that once we write PT_AR_BSP/PT_CFM, it won't be possible to - * modify the syscall arguments of the pending system call any - * longer. This shouldn't be an issue because modifying - * PT_AR_BSP/PT_CFM generally implies that we're either abandoning - * the pending system call or that we defer it's re-execution - * (e.g., due to GDB doing an inferior function call). + * Furthermore, when changing the contents of + * PT_AR_BSP (or PT_CFM) we MUST copy any + * users-level stacked registers that are + * stored on the kernel stack back to + * user-space because otherwise, we might end + * up clobbering kernel stacked registers. + * Also, if this happens while the task is + * blocked in a system call, which convert the + * state such that the non-system-call exit + * path is used. This ensures that the proper + * state will be picked up when resuming + * execution. However, it *also* means that + * once we write PT_AR_BSP/PT_CFM, it won't be + * possible to modify the syscall arguments of + * the pending system call any longer. This + * shouldn't be an issue because modifying + * PT_AR_BSP/PT_CFM generally implies that + * we're either abandoning the pending system + * call or that we defer it's re-execution + * (e.g., due to GDB doing an inferior + * function call). */ urbs_end = ia64_get_user_rbs_end(child, pt, &cfm); if (write_access) { if (*data != urbs_end) { if (ia64_sync_user_rbs(child, sw, - pt->ar_bspstore, urbs_end) < 0) + pt->ar_bspstore, + urbs_end) < 0) return -1; if (in_syscall(pt)) - convert_to_non_syscall(child, pt, cfm); - /* simulate user-level write of ar.bsp: */ + convert_to_non_syscall(child, + pt, + cfm); + /* + * Simulate user-level write + * of ar.bsp: + */ pt->loadrs = 0; pt->ar_bspstore = *data; } @@ -817,14 +899,17 @@ case PT_CFM: urbs_end = ia64_get_user_rbs_end(child, pt, &cfm); if (write_access) { - if (((cfm ^ *data) & 0x3fffffffffUL) != 0) { + if (((cfm ^ *data) & PFM_MASK) != 0) { if (ia64_sync_user_rbs(child, sw, - pt->ar_bspstore, urbs_end) < 0) + pt->ar_bspstore, + urbs_end) < 0) return -1; if (in_syscall(pt)) - convert_to_non_syscall(child, pt, cfm); - pt->cr_ifs = ((pt->cr_ifs & ~0x3fffffffffUL) - | (*data & 0x3fffffffffUL)); + convert_to_non_syscall(child, + pt, + cfm); + pt->cr_ifs = ((pt->cr_ifs & ~PFM_MASK) + | (*data & PFM_MASK)); } } else *data = cfm; @@ -832,99 +917,94 @@ case PT_CR_IPSR: if (write_access) - pt->cr_ipsr = ((*data & IPSR_WRITE_MASK) - | (pt->cr_ipsr & ~IPSR_WRITE_MASK)); + pt->cr_ipsr = ((*data & IPSR_MASK) + | (pt->cr_ipsr & ~IPSR_MASK)); else - *data = (pt->cr_ipsr & IPSR_READ_MASK); + *data = (pt->cr_ipsr & IPSR_MASK); return 0; case PT_AR_RNAT: urbs_end = ia64_get_user_rbs_end(child, pt, NULL); - rnat_addr = (long) ia64_rse_rnat_addr((long *) urbs_end); + rnat_addr = (long) ia64_rse_rnat_addr((long *) + urbs_end); if (write_access) - return ia64_poke(child, sw, urbs_end, rnat_addr, *data); + return ia64_poke(child, sw, urbs_end, + rnat_addr, *data); else - return ia64_peek(child, sw, urbs_end, rnat_addr, data); + return ia64_peek(child, sw, urbs_end, + rnat_addr, data); case PT_R1: - ptr = (unsigned long *) ((long) pt + offsetof(struct pt_regs, r1)); + ptr = pt_reg_addr(pt, r1); break; - case PT_R2: case PT_R3: - ptr = (unsigned long *) - ((long) pt + offsetof(struct pt_regs, r2) + addr - PT_R2); + ptr = pt_reg_addr(pt, r2) + (addr - PT_R2); break; case PT_R8: case PT_R9: case PT_R10: case PT_R11: - ptr = (unsigned long *) - ((long) pt + offsetof(struct pt_regs, r8)+ addr - PT_R8); + ptr = pt_reg_addr(pt, r8) + (addr - PT_R8); break; case PT_R12: case PT_R13: - ptr = (unsigned long *) - ((long) pt + offsetof(struct pt_regs, r12)+ addr - PT_R12); + ptr = pt_reg_addr(pt, r12) + (addr - PT_R12); break; case PT_R14: - ptr = (unsigned long *) ((long) pt + offsetof(struct pt_regs, r14)); + ptr = pt_reg_addr(pt, r14); break; case PT_R15: - ptr = (unsigned long *) ((long) pt + offsetof(struct pt_regs, r15)); + ptr = pt_reg_addr(pt, r15); break; case PT_R16: case PT_R17: case PT_R18: case PT_R19: case PT_R20: case PT_R21: case PT_R22: case PT_R23: case PT_R24: case PT_R25: case PT_R26: case PT_R27: case PT_R28: case PT_R29: case PT_R30: case PT_R31: - ptr = (unsigned long *) - ((long) pt + offsetof(struct pt_regs, r16) + addr - PT_R16); + ptr = pt_reg_addr(pt, r16) + (addr - PT_R16); break; case PT_B0: - ptr = (unsigned long *) ((long) pt + offsetof(struct pt_regs, b0)); + ptr = pt_reg_addr(pt, b0); break; case PT_B6: - ptr = (unsigned long *) ((long) pt + offsetof(struct pt_regs, b6)); + ptr = pt_reg_addr(pt, b6); break; case PT_B7: - ptr = (unsigned long *) ((long) pt + offsetof(struct pt_regs, b7)); + ptr = pt_reg_addr(pt, b7); break; case PT_F6: case PT_F6+8: case PT_F7: case PT_F7+8: case PT_F8: case PT_F8+8: case PT_F9: case PT_F9+8: - ptr = (unsigned long *) - ((long) pt + offsetof(struct pt_regs, f6) + addr - PT_F6); + ptr = pt_reg_addr(pt, f6) + (addr - PT_F6); break; case PT_AR_BSPSTORE: - ptr = (unsigned long *) - ((long) pt + offsetof(struct pt_regs, ar_bspstore)); + ptr = pt_reg_addr(pt, ar_bspstore); break; case PT_AR_RSC: - ptr = (unsigned long *) ((long) pt + offsetof(struct pt_regs, ar_rsc)); + ptr = pt_reg_addr(pt, ar_rsc); break; case PT_AR_UNAT: - ptr = (unsigned long *) ((long) pt + offsetof(struct pt_regs, ar_unat)); + ptr = pt_reg_addr(pt, ar_unat); break; case PT_AR_PFS: - ptr = (unsigned long *) ((long) pt + offsetof(struct pt_regs, ar_pfs)); + ptr = pt_reg_addr(pt, ar_pfs); break; case PT_AR_CCV: - ptr = (unsigned long *) ((long) pt + offsetof(struct pt_regs, ar_ccv)); + ptr = pt_reg_addr(pt, ar_ccv); break; case PT_AR_FPSR: - ptr = (unsigned long *) ((long) pt + offsetof(struct pt_regs, ar_fpsr)); + ptr = pt_reg_addr(pt, ar_fpsr); break; case PT_CR_IIP: - ptr = (unsigned long *) ((long) pt + offsetof(struct pt_regs, cr_iip)); + ptr = pt_reg_addr(pt, cr_iip); break; case PT_PR: - ptr = (unsigned long *) ((long) pt + offsetof(struct pt_regs, pr)); + ptr = pt_reg_addr(pt, pr); break; /* scratch register */ default: /* disallow accessing anything else... */ - dprintk("ptrace: rejecting access to register address 0x%lx\n", - addr); + dprintk("ptrace: rejecting access to register " + "address 0x%lx\n", addr); return -1; } } else if (addr <= PT_AR_SSD) { - ptr = (unsigned long *) - ((long) pt + offsetof(struct pt_regs, ar_csd) + addr - PT_AR_CSD); + ptr = pt_reg_addr(pt, ar_csd) + (addr - PT_AR_CSD); } else { /* access debug registers */ @@ -937,41 +1017,46 @@ } if (regnum >= 8) { - dprintk("ptrace: rejecting access to register address 0x%lx\n", addr); + dprintk("ptrace: rejecting access to register " + "address 0x%lx\n", addr); return -1; } #ifdef CONFIG_PERFMON /* - * Check if debug registers are used by perfmon. This test must be done - * once we know that we can do the operation, i.e. the arguments are all - * valid, but before we start modifying the state. + * Check if debug registers are used by perfmon. This + * test must be done once we know that we can do the + * operation, i.e. the arguments are all valid, but + * before we start modifying the state. * - * Perfmon needs to keep a count of how many processes are trying to - * modify the debug registers for system wide monitoring sessions. + * Perfmon needs to keep a count of how many processes + * are trying to modify the debug registers for system + * wide monitoring sessions. * - * We also include read access here, because they may cause the - * PMU-installed debug register state (dbr[], ibr[]) to be reset. The two - * arrays are also used by perfmon, but we do not use - * IA64_THREAD_DBG_VALID. The registers are restored by the PMU context - * switch code. + * We also include read access here, because they may + * cause the PMU-installed debug register state + * (dbr[], ibr[]) to be reset. The two arrays are also + * used by perfmon, but we do not use + * IA64_THREAD_DBG_VALID. The registers are restored + * by the PMU context switch code. */ if (pfm_use_debug_registers(child)) return -1; #endif if (!(child->thread.flags & IA64_THREAD_DBG_VALID)) { child->thread.flags |= IA64_THREAD_DBG_VALID; - memset(child->thread.dbr, 0, sizeof(child->thread.dbr)); - memset(child->thread.ibr, 0, sizeof(child->thread.ibr)); + memset(child->thread.dbr, 0, + sizeof(child->thread.dbr)); + memset(child->thread.ibr, 0, + sizeof(child->thread.ibr)); } ptr += regnum; - if (write_access) - /* don't let the user set kernel-level breakpoints... */ + if ((regnum & 1) && write_access) { + /* don't let the user set kernel-level breakpoints: */ *ptr = *data & ~(7UL << 56); - else - *data = *ptr; - return 0; + return 0; + } } if (write_access) *ptr = *data; @@ -992,7 +1077,8 @@ char nat = 0; int i; - retval = verify_area(VERIFY_WRITE, ppr, sizeof(struct pt_all_user_regs)); + retval = verify_area(VERIFY_WRITE, ppr, + sizeof(struct pt_all_user_regs)); if (retval != 0) { return -EIO; } @@ -1094,11 +1180,13 @@ /* fr6-fr11 */ - retval |= __copy_to_user(&ppr->fr[6], &pt->f6, sizeof(struct ia64_fpreg) * 6); + retval |= __copy_to_user(&ppr->fr[6], &pt->f6, + sizeof(struct ia64_fpreg) * 6); /* fp scratch regs(12-15) */ - retval |= __copy_to_user(&ppr->fr[12], &sw->f12, sizeof(struct ia64_fpreg) * 4); + retval |= __copy_to_user(&ppr->fr[12], &sw->f12, + sizeof(struct ia64_fpreg) * 4); /* fr16-fr31 */ @@ -1111,7 +1199,8 @@ /* fph */ ia64_flush_fph(child); - retval |= __copy_to_user(&ppr->fr[32], &child->thread.fph, sizeof(ppr->fr[32]) * 96); + retval |= __copy_to_user(&ppr->fr[32], &child->thread.fph, + sizeof(ppr->fr[32]) * 96); /* preds */ @@ -1138,7 +1227,8 @@ memset(&fpval, 0, sizeof(fpval)); - retval = verify_area(VERIFY_READ, ppr, sizeof(struct pt_all_user_regs)); + retval = verify_area(VERIFY_READ, ppr, + sizeof(struct pt_all_user_regs)); if (retval != 0) { return -EIO; } @@ -1186,7 +1276,8 @@ for (i = 4; i < 8; i++) { retval |= __get_user(val, &ppr->gr[i]); - if (unw_set_gr(&info, i, val, 0) < 0) /* NaT bit will be set via PT_NAT_BITS */ + /* NaT bit will be set via PT_NAT_BITS: */ + if (unw_set_gr(&info, i, val, 0) < 0) return -EIO; } @@ -1230,16 +1321,19 @@ /* fr6-fr11 */ - retval |= __copy_from_user(&pt->f6, &ppr->fr[6], sizeof(ppr->fr[6]) * 6); + retval |= __copy_from_user(&pt->f6, &ppr->fr[6], + sizeof(ppr->fr[6]) * 6); /* fp scratch regs(12-15) */ - retval |= __copy_from_user(&sw->f12, &ppr->fr[12], sizeof(ppr->fr[12]) * 4); + retval |= __copy_from_user(&sw->f12, &ppr->fr[12], + sizeof(ppr->fr[12]) * 4); /* fr16-fr31 */ for (i = 16; i < 32; i++) { - retval |= __copy_from_user(&fpval, &ppr->fr[i], sizeof(fpval)); + retval |= __copy_from_user(&fpval, &ppr->fr[i], + sizeof(fpval)); if (unw_set_fr(&info, i, fpval) < 0) return -EIO; } @@ -1247,7 +1341,8 @@ /* fph */ ia64_sync_fph(child); - retval |= __copy_from_user(&child->thread.fph, &ppr->fr[32], sizeof(ppr->fr[32]) * 96); + retval |= __copy_from_user(&child->thread.fph, &ppr->fr[32], + sizeof(ppr->fr[32]) * 96); /* preds */ @@ -1279,16 +1374,15 @@ { struct ia64_psr *child_psr = ia64_psr(ia64_task_regs(child)); - /* make sure the single step/take-branch tra bits are not set: */ + /* make sure the single step/taken-branch trap bits are not set: */ child_psr->ss = 0; child_psr->tb = 0; } asmlinkage long -sys_ptrace (long request, pid_t pid, unsigned long addr, unsigned long data, - long arg4, long arg5, long arg6, long arg7, long stack) +sys_ptrace (long request, pid_t pid, unsigned long addr, unsigned long data) { - struct pt_regs *pt, *regs = (struct pt_regs *) &stack; + struct pt_regs *pt; unsigned long urbs_end, peek_or_poke; struct task_struct *child; struct switch_stack *sw; @@ -1308,8 +1402,10 @@ goto out; } - peek_or_poke = (request == PTRACE_PEEKTEXT || request == PTRACE_PEEKDATA - || request == PTRACE_POKETEXT || request == PTRACE_POKEDATA); + peek_or_poke = (request == PTRACE_PEEKTEXT + || request == PTRACE_PEEKDATA + || request == PTRACE_POKETEXT + || request == PTRACE_POKEDATA); ret = -ESRCH; read_lock(&tasklist_lock); { @@ -1341,31 +1437,37 @@ switch (request) { case PTRACE_PEEKTEXT: - case PTRACE_PEEKDATA: /* read word at location addr */ + case PTRACE_PEEKDATA: + /* read word at location addr */ urbs_end = ia64_get_user_rbs_end(child, pt, NULL); ret = ia64_peek(child, sw, urbs_end, addr, &data); if (ret == 0) { ret = data; - regs->r8 = 0; /* ensure "ret" is not mistaken as an error code */ + /* ensure "ret" is not mistaken as an error code: */ + force_successful_syscall_return(); } goto out_tsk; case PTRACE_POKETEXT: - case PTRACE_POKEDATA: /* write the word at location addr */ + case PTRACE_POKEDATA: + /* write the word at location addr */ urbs_end = ia64_get_user_rbs_end(child, pt, NULL); ret = ia64_poke(child, sw, urbs_end, addr, data); goto out_tsk; - case PTRACE_PEEKUSR: /* read the word at addr in the USER area */ + case PTRACE_PEEKUSR: + /* read the word at addr in the USER area */ if (access_uarea(child, addr, &data, 0) < 0) { ret = -EIO; goto out_tsk; } ret = data; - regs->r8 = 0; /* ensure "ret" is not mistaken as an error code */ + /* ensure "ret" is not mistaken as an error code */ + force_successful_syscall_return(); goto out_tsk; - case PTRACE_POKEUSR: /* write the word at addr in the USER area */ + case PTRACE_POKEUSR: + /* write the word at addr in the USER area */ if (access_uarea(child, addr, &data, 1) < 0) { ret = -EIO; goto out_tsk; @@ -1373,16 +1475,20 @@ ret = 0; goto out_tsk; - case PTRACE_OLD_GETSIGINFO: /* for backwards-compatibility */ + case PTRACE_OLD_GETSIGINFO: + /* for backwards-compatibility */ ret = ptrace_request(child, PTRACE_GETSIGINFO, addr, data); goto out_tsk; - case PTRACE_OLD_SETSIGINFO: /* for backwards-compatibility */ + case PTRACE_OLD_SETSIGINFO: + /* for backwards-compatibility */ ret = ptrace_request(child, PTRACE_SETSIGINFO, addr, data); goto out_tsk; - case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */ - case PTRACE_CONT: /* restart after signal. */ + case PTRACE_SYSCALL: + /* continue and stop at next (return from) syscall */ + case PTRACE_CONT: + /* restart after signal. */ ret = -EIO; if (data > _NSIG) goto out_tsk; @@ -1392,7 +1498,10 @@ clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE); child->exit_code = data; - /* make sure the single step/taken-branch trap bits are not set: */ + /* + * Make sure the single step/taken-branch trap bits + * are not set: + */ ia64_psr(pt)->ss = 0; ia64_psr(pt)->tb = 0; @@ -1406,19 +1515,18 @@ * sigkill. Perhaps it should be put in the status * that it wants to exit. */ - if (child->exit_state == EXIT_ZOMBIE) /* already dead */ + if (child->exit_state == EXIT_ZOMBIE) + /* already dead */ goto out_tsk; child->exit_code = SIGKILL; - /* make sure the single step/take-branch tra bits are not set: */ - ia64_psr(pt)->ss = 0; - ia64_psr(pt)->tb = 0; - + ptrace_disable(child); wake_up_process(child); ret = 0; goto out_tsk; - case PTRACE_SINGLESTEP: /* let child execute for one instruction */ + case PTRACE_SINGLESTEP: + /* let child execute for one instruction */ case PTRACE_SINGLEBLOCK: ret = -EIO; if (data > _NSIG) @@ -1437,16 +1545,19 @@ ret = 0; goto out_tsk; - case PTRACE_DETACH: /* detach a process that was attached. */ + case PTRACE_DETACH: + /* detach a process that was attached. */ ret = ptrace_detach(child, data); goto out_tsk; case PTRACE_GETREGS: - ret = ptrace_getregs(child, (struct pt_all_user_regs __user *) data); + ret = ptrace_getregs(child, + (struct pt_all_user_regs __user *) data); goto out_tsk; case PTRACE_SETREGS: - ret = ptrace_setregs(child, (struct pt_all_user_regs __user *) data); + ret = ptrace_setregs(child, + (struct pt_all_user_regs __user *) data); goto out_tsk; default: @@ -1469,15 +1580,16 @@ if (!(current->ptrace & PT_PTRACED)) return; /* - * The 0x80 provides a way for the tracing parent to distinguish between a syscall - * stop and SIGTRAP delivery. + * The 0x80 provides a way for the tracing parent to + * distinguish between a syscall stop and SIGTRAP delivery. */ - ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) ? 0x80 : 0)); + ptrace_notify(SIGTRAP + | ((current->ptrace & PT_TRACESYSGOOD) ? 0x80 : 0)); /* - * This isn't the same as continuing with a signal, but it will do for normal use. - * strace only continues with a signal if the stopping signal is not SIGTRAP. - * -brl + * This isn't the same as continuing with a signal, but it + * will do for normal use. strace only continues with a + * signal if the stopping signal is not SIGTRAP. -brl */ if (current->exit_code) { send_sig(current->exit_code, current, 1); @@ -1489,21 +1601,22 @@ asmlinkage void syscall_trace_enter (long arg0, long arg1, long arg2, long arg3, - long arg4, long arg5, long arg6, long arg7, long stack) + long arg4, long arg5, long arg6, long arg7, + struct pt_regs regs) { - struct pt_regs *regs = (struct pt_regs *) &stack; long syscall; if (unlikely(current->audit_context)) { - if (IS_IA32_PROCESS(regs)) - syscall = regs->r1; + if (IS_IA32_PROCESS(®s)) + syscall = regs.r1; else - syscall = regs->r15; + syscall = regs.r15; audit_syscall_entry(current, syscall, arg0, arg1, arg2, arg3); } - if (test_thread_flag(TIF_SYSCALL_TRACE) && (current->ptrace & PT_PTRACED)) + if (test_thread_flag(TIF_SYSCALL_TRACE) + && (current->ptrace & PT_PTRACED)) syscall_trace(); } @@ -1511,11 +1624,13 @@ asmlinkage void syscall_trace_leave (long arg0, long arg1, long arg2, long arg3, - long arg4, long arg5, long arg6, long arg7, long stack) + long arg4, long arg5, long arg6, long arg7, + struct pt_regs regs) { if (unlikely(current->audit_context)) - audit_syscall_exit(current, ((struct pt_regs *) &stack)->r8); + audit_syscall_exit(current, regs.r8); - if (test_thread_flag(TIF_SYSCALL_TRACE) && (current->ptrace & PT_PTRACED)) + if (test_thread_flag(TIF_SYSCALL_TRACE) + && (current->ptrace & PT_PTRACED)) syscall_trace(); } diff -urN linux-2.6.11-rc3/arch/ia64/kernel/setup.c linux-2.6.11-rc4/arch/ia64/kernel/setup.c --- linux-2.6.11-rc3/arch/ia64/kernel/setup.c 2005-02-12 19:50:35.345738189 -0800 +++ linux-2.6.11-rc4/arch/ia64/kernel/setup.c 2005-02-12 19:50:52.927499340 -0800 @@ -60,7 +60,6 @@ unsigned long __per_cpu_offset[NR_CPUS]; EXPORT_SYMBOL(__per_cpu_offset); #endif -unsigned long __per_cpu_mca[NR_CPUS]; DEFINE_PER_CPU(struct cpuinfo_ia64, cpu_info); DEFINE_PER_CPU(unsigned long, local_per_cpu_offset); @@ -388,7 +387,7 @@ /* enable IA-64 Machine Check Abort Handling unless disabled */ if (!strstr(saved_command_line, "nomca")) ia64_mca_init(); - + platform_setup(cmdline_p); paging_init(); } @@ -602,7 +601,6 @@ cpu_init (void) { extern void __devinit ia64_mmu_init (void *); - extern void set_mca_pointer (struct cpuinfo_ia64 *, void *); unsigned long num_phys_stacked; pal_vm_info_2_u_t vmi; unsigned int max_ctx; @@ -611,6 +609,14 @@ cpu_data = per_cpu_init(); + /* + * We set ar.k3 so that assembly code in MCA handler can compute + * physical addresses of per cpu variables with a simple: + * phys = ar.k3 + &per_cpu_var + */ + ia64_set_kr(IA64_KR_PER_CPU_DATA, + ia64_tpa(cpu_data) - (long) __per_cpu_start); + get_max_cacheline_size(); /* @@ -657,7 +663,7 @@ BUG(); ia64_mmu_init(ia64_imva(cpu_data)); - set_mca_pointer(cpu_info, cpu_data); + ia64_mca_cpu_init(ia64_imva(cpu_data)); #ifdef CONFIG_IA32_SUPPORT ia32_cpu_init(); diff -urN linux-2.6.11-rc3/arch/ia64/kernel/signal.c linux-2.6.11-rc4/arch/ia64/kernel/signal.c --- linux-2.6.11-rc3/arch/ia64/kernel/signal.c 2005-02-12 19:50:35.346738232 -0800 +++ linux-2.6.11-rc4/arch/ia64/kernel/signal.c 2005-02-12 19:50:52.928499383 -0800 @@ -84,12 +84,11 @@ } asmlinkage long -sys_sigaltstack (const stack_t __user *uss, stack_t __user *uoss, long arg2, long arg3, long arg4, - long arg5, long arg6, long arg7, long stack) +sys_sigaltstack (const stack_t __user *uss, stack_t __user *uoss, long arg2, + long arg3, long arg4, long arg5, long arg6, long arg7, + struct pt_regs regs) { - struct pt_regs *pt = (struct pt_regs *) &stack; - - return do_sigaltstack(uss, uoss, pt->r12); + return do_sigaltstack(uss, uoss, regs.r12); } static long diff -urN linux-2.6.11-rc3/arch/ia64/kernel/sys_ia64.c linux-2.6.11-rc4/arch/ia64/kernel/sys_ia64.c --- linux-2.6.11-rc3/arch/ia64/kernel/sys_ia64.c 2004-12-24 13:34:58.000000000 -0800 +++ linux-2.6.11-rc4/arch/ia64/kernel/sys_ia64.c 2005-02-12 19:50:52.936499730 -0800 @@ -2,7 +2,7 @@ * This file contains various system calls that have different calling * conventions on different platforms. * - * Copyright (C) 1999-2000, 2002-2003 Hewlett-Packard Co + * Copyright (C) 1999-2000, 2002-2003, 2005 Hewlett-Packard Co * David Mosberger-Tang */ #include @@ -163,10 +163,9 @@ * and r9) as this is faster than doing a copy_to_user(). */ asmlinkage long -sys_pipe (long arg0, long arg1, long arg2, long arg3, - long arg4, long arg5, long arg6, long arg7, long stack) +sys_pipe (void) { - struct pt_regs *regs = (struct pt_regs *) &stack; + struct pt_regs *regs = ia64_task_regs(current); int fd[2]; int retval; diff -urN linux-2.6.11-rc3/arch/ia64/kernel/traps.c linux-2.6.11-rc4/arch/ia64/kernel/traps.c --- linux-2.6.11-rc3/arch/ia64/kernel/traps.c 2004-12-24 13:35:39.000000000 -0800 +++ linux-2.6.11-rc4/arch/ia64/kernel/traps.c 2005-02-12 19:50:52.938499816 -0800 @@ -358,11 +358,10 @@ }; struct illegal_op_return -ia64_illegal_op_fault (unsigned long ec, unsigned long arg1, unsigned long arg2, - unsigned long arg3, unsigned long arg4, unsigned long arg5, - unsigned long arg6, unsigned long arg7, unsigned long stack) +ia64_illegal_op_fault (unsigned long ec, long arg1, long arg2, long arg3, + long arg4, long arg5, long arg6, long arg7, + struct pt_regs regs) { - struct pt_regs *regs = (struct pt_regs *) &stack; struct illegal_op_return rv; struct siginfo si; char buf[128]; @@ -371,19 +370,19 @@ { extern struct illegal_op_return ia64_emulate_brl (struct pt_regs *, unsigned long); - rv = ia64_emulate_brl(regs, ec); + rv = ia64_emulate_brl(®s, ec); if (rv.fkt != (unsigned long) -1) return rv; } #endif sprintf(buf, "IA-64 Illegal operation fault"); - die_if_kernel(buf, regs, 0); + die_if_kernel(buf, ®s, 0); memset(&si, 0, sizeof(si)); si.si_signo = SIGILL; si.si_code = ILL_ILLOPC; - si.si_addr = (void __user *) (regs->cr_iip + ia64_psr(regs)->ri); + si.si_addr = (void __user *) (regs.cr_iip + ia64_psr(®s)->ri); force_sig_info(SIGILL, &si, current); rv.fkt = 0; return rv; @@ -391,11 +390,10 @@ void ia64_fault (unsigned long vector, unsigned long isr, unsigned long ifa, - unsigned long iim, unsigned long itir, unsigned long arg5, - unsigned long arg6, unsigned long arg7, unsigned long stack) + unsigned long iim, unsigned long itir, long arg5, long arg6, + long arg7, struct pt_regs regs) { - struct pt_regs *regs = (struct pt_regs *) &stack; - unsigned long code, error = isr; + unsigned long code, error = isr, iip; struct siginfo siginfo; char buf[128]; int result, sig; @@ -415,10 +413,12 @@ * This fault was due to lfetch.fault, set "ed" bit in the psr to cancel * the lfetch. */ - ia64_psr(regs)->ed = 1; + ia64_psr(®s)->ed = 1; return; } + iip = regs.cr_iip + ia64_psr(®s)->ri; + switch (vector) { case 24: /* General Exception */ code = (isr >> 4) & 0xf; @@ -428,8 +428,8 @@ if (code == 8) { # ifdef CONFIG_IA64_PRINT_HAZARDS printk("%s[%d]: possible hazard @ ip=%016lx (pr = %016lx)\n", - current->comm, current->pid, regs->cr_iip + ia64_psr(regs)->ri, - regs->pr); + current->comm, current->pid, + regs.cr_iip + ia64_psr(®s)->ri, regs.pr); # endif return; } @@ -437,14 +437,14 @@ case 25: /* Disabled FP-Register */ if (isr & 2) { - disabled_fph_fault(regs); + disabled_fph_fault(®s); return; } sprintf(buf, "Disabled FPL fault---not supposed to happen!"); break; case 26: /* NaT Consumption */ - if (user_mode(regs)) { + if (user_mode(®s)) { void __user *addr; if (((isr >> 4) & 0xf) == 2) { @@ -456,7 +456,8 @@ /* register NaT consumption */ sig = SIGILL; code = ILL_ILLOPN; - addr = (void __user *) (regs->cr_iip + ia64_psr(regs)->ri); + addr = (void __user *) (regs.cr_iip + + ia64_psr(®s)->ri); } siginfo.si_signo = sig; siginfo.si_code = code; @@ -467,17 +468,17 @@ siginfo.si_isr = isr; force_sig_info(sig, &siginfo, current); return; - } else if (ia64_done_with_exception(regs)) + } else if (ia64_done_with_exception(®s)) return; sprintf(buf, "NaT consumption"); break; case 31: /* Unsupported Data Reference */ - if (user_mode(regs)) { + if (user_mode(®s)) { siginfo.si_signo = SIGILL; siginfo.si_code = ILL_ILLOPN; siginfo.si_errno = 0; - siginfo.si_addr = (void __user *) (regs->cr_iip + ia64_psr(regs)->ri); + siginfo.si_addr = (void __user *) iip; siginfo.si_imm = vector; siginfo.si_flags = __ISR_VALID; siginfo.si_isr = isr; @@ -490,7 +491,7 @@ case 29: /* Debug */ case 35: /* Taken Branch Trap */ case 36: /* Single Step Trap */ - if (fsys_mode(current, regs)) { + if (fsys_mode(current, ®s)) { extern char __kernel_syscall_via_break[]; /* * Got a trap in fsys-mode: Taken Branch Trap and Single Step trap @@ -498,13 +499,13 @@ */ if (unlikely(vector == 29)) { die("Got debug trap in fsys-mode---not supposed to happen!", - regs, 0); + ®s, 0); return; } /* re-do the system call via break 0x100000: */ - regs->cr_iip = (unsigned long) __kernel_syscall_via_break; - ia64_psr(regs)->ri = 0; - ia64_psr(regs)->cpl = 3; + regs.cr_iip = (unsigned long) __kernel_syscall_via_break; + ia64_psr(®s)->ri = 0; + ia64_psr(®s)->cpl = 3; return; } switch (vector) { @@ -515,8 +516,8 @@ * Erratum 10 (IFA may contain incorrect address) now has * "NoFix" status. There are no plans for fixing this. */ - if (ia64_psr(regs)->is == 0) - ifa = regs->cr_iip; + if (ia64_psr(®s)->is == 0) + ifa = regs.cr_iip; #endif break; case 35: siginfo.si_code = TRAP_BRANCH; ifa = 0; break; @@ -533,12 +534,12 @@ case 32: /* fp fault */ case 33: /* fp trap */ - result = handle_fpu_swa((vector == 32) ? 1 : 0, regs, isr); + result = handle_fpu_swa((vector == 32) ? 1 : 0, ®s, isr); if ((result < 0) || (current->thread.flags & IA64_THREAD_FPEMU_SIGFPE)) { siginfo.si_signo = SIGFPE; siginfo.si_errno = 0; siginfo.si_code = FPE_FLTINV; - siginfo.si_addr = (void __user *) (regs->cr_iip + ia64_psr(regs)->ri); + siginfo.si_addr = (void __user *) iip; siginfo.si_flags = __ISR_VALID; siginfo.si_isr = isr; siginfo.si_imm = 0; @@ -554,19 +555,18 @@ * interesting work (e.g., signal delivery is done in the kernel * exit path). */ - ia64_psr(regs)->lp = 0; + ia64_psr(®s)->lp = 0; return; } else { /* Unimplemented Instr. Address Trap */ - if (user_mode(regs)) { + if (user_mode(®s)) { siginfo.si_signo = SIGILL; siginfo.si_code = ILL_BADIADDR; siginfo.si_errno = 0; siginfo.si_flags = 0; siginfo.si_isr = 0; siginfo.si_imm = 0; - siginfo.si_addr = (void __user *) - (regs->cr_iip + ia64_psr(regs)->ri); + siginfo.si_addr = (void __user *) iip; force_sig_info(SIGILL, &siginfo, current); return; } @@ -576,23 +576,23 @@ case 45: #ifdef CONFIG_IA32_SUPPORT - if (ia32_exception(regs, isr) == 0) + if (ia32_exception(®s, isr) == 0) return; #endif printk(KERN_ERR "Unexpected IA-32 exception (Trap 45)\n"); printk(KERN_ERR " iip - 0x%lx, ifa - 0x%lx, isr - 0x%lx\n", - regs->cr_iip, ifa, isr); + iip, ifa, isr); force_sig(SIGSEGV, current); break; case 46: #ifdef CONFIG_IA32_SUPPORT - if (ia32_intercept(regs, isr) == 0) + if (ia32_intercept(®s, isr) == 0) return; #endif printk(KERN_ERR "Unexpected IA-32 intercept trap (Trap 46)\n"); printk(KERN_ERR " iip - 0x%lx, ifa - 0x%lx, isr - 0x%lx, iim - 0x%lx\n", - regs->cr_iip, ifa, isr, iim); + iip, ifa, isr, iim); force_sig(SIGSEGV, current); return; @@ -604,6 +604,6 @@ sprintf(buf, "Fault %lu", vector); break; } - die_if_kernel(buf, regs, error); + die_if_kernel(buf, ®s, error); force_sig(SIGILL, current); } diff -urN linux-2.6.11-rc3/arch/ia64/mm/contig.c linux-2.6.11-rc4/arch/ia64/mm/contig.c --- linux-2.6.11-rc3/arch/ia64/mm/contig.c 2005-02-12 19:50:35.355738622 -0800 +++ linux-2.6.11-rc4/arch/ia64/mm/contig.c 2005-02-12 19:50:52.945500119 -0800 @@ -178,7 +178,7 @@ void * per_cpu_init (void) { - void *cpu_data, *mca_data; + void *cpu_data; int cpu; /* @@ -189,14 +189,11 @@ if (smp_processor_id() == 0) { cpu_data = __alloc_bootmem(PERCPU_PAGE_SIZE * NR_CPUS, PERCPU_PAGE_SIZE, __pa(MAX_DMA_ADDRESS)); - mca_data = alloc_bootmem(PERCPU_MCA_SIZE * NR_CPUS); for (cpu = 0; cpu < NR_CPUS; cpu++) { memcpy(cpu_data, __phys_per_cpu_start, __per_cpu_end - __per_cpu_start); __per_cpu_offset[cpu] = (char *) cpu_data - __per_cpu_start; cpu_data += PERCPU_PAGE_SIZE; per_cpu(local_per_cpu_offset, cpu) = __per_cpu_offset[cpu]; - __per_cpu_mca[cpu] = (unsigned long)__pa(mca_data); - mca_data += PERCPU_MCA_SIZE; } } return __per_cpu_start + __per_cpu_offset[smp_processor_id()]; diff -urN linux-2.6.11-rc3/arch/ia64/mm/discontig.c linux-2.6.11-rc4/arch/ia64/mm/discontig.c --- linux-2.6.11-rc3/arch/ia64/mm/discontig.c 2005-02-12 19:50:35.357738709 -0800 +++ linux-2.6.11-rc4/arch/ia64/mm/discontig.c 2005-02-12 19:50:52.960500769 -0800 @@ -26,7 +26,6 @@ #include #include #include -#include /* * Track per-node information needed to setup the boot memory allocator, the @@ -294,9 +293,6 @@ * |------------------------| * | local ia64_node_data | * |------------------------| - * | MCA/INIT data * | - * | cpus_on_this_node | - * |------------------------| * | ??? | * |________________________| * @@ -310,7 +306,7 @@ { unsigned long epfn, cpu, cpus, phys_cpus; unsigned long pernodesize = 0, pernode, pages, mapsize; - void *cpu_data, *mca_data_phys; + void *cpu_data; struct bootmem_data *bdp = &mem_data[node].bootmem_data; epfn = (start + len) >> PAGE_SHIFT; @@ -339,7 +335,6 @@ pernodesize += node * L1_CACHE_BYTES; pernodesize += L1_CACHE_ALIGN(sizeof(pg_data_t)); pernodesize += L1_CACHE_ALIGN(sizeof(struct ia64_node_data)); - pernodesize += L1_CACHE_ALIGN(sizeof(ia64_mca_cpu_t)) * phys_cpus; pernodesize = PAGE_ALIGN(pernodesize); pernode = NODEDATA_ALIGN(start, node); @@ -362,9 +357,6 @@ mem_data[node].pgdat->bdata = bdp; pernode += L1_CACHE_ALIGN(sizeof(pg_data_t)); - mca_data_phys = (void *)pernode; - pernode += L1_CACHE_ALIGN(sizeof(ia64_mca_cpu_t)) * phys_cpus; - /* * Copy the static per-cpu data into the region we * just set aside and then setup __per_cpu_offset @@ -374,18 +366,6 @@ if (node == node_cpuid[cpu].nid) { memcpy(__va(cpu_data), __phys_per_cpu_start, __per_cpu_end - __per_cpu_start); - if ((cpu == 0) || (node_cpuid[cpu].phys_id > 0)) { - /* - * The memory for the cpuinfo structure is allocated - * here, but the data in the structure is initialized - * later. Save the physical address of the MCA save - * area in __per_cpu_mca[cpu]. When the cpuinfo struct - * is initialized, the value in __per_cpu_mca[cpu] - * will be put in the cpuinfo structure. - */ - __per_cpu_mca[cpu] = __pa(mca_data_phys); - mca_data_phys += L1_CACHE_ALIGN(sizeof(ia64_mca_cpu_t)); - } __per_cpu_offset[cpu] = (char*)__va(cpu_data) - __per_cpu_start; cpu_data += PERCPU_PAGE_SIZE; diff -urN linux-2.6.11-rc3/arch/ia64/mm/init.c linux-2.6.11-rc4/arch/ia64/mm/init.c --- linux-2.6.11-rc3/arch/ia64/mm/init.c 2005-02-12 19:50:35.359738795 -0800 +++ linux-2.6.11-rc4/arch/ia64/mm/init.c 2005-02-12 19:50:52.968501115 -0800 @@ -40,7 +40,6 @@ DEFINE_PER_CPU(struct mmu_gather, mmu_gathers); extern void ia64_tlb_init (void); -extern void efi_get_pal_addr (void); unsigned long MAX_DMA_ADDRESS = PAGE_OFFSET + 0x100000000UL; @@ -292,27 +291,6 @@ ia64_patch_gate(); } -void -set_mca_pointer(struct cpuinfo_ia64 *cpuinfo, void *cpu_data) -{ - void *my_cpu_data = ia64_imva(cpu_data); - - /* - * The MCA info structure was allocated earlier and a physical address pointer - * saved in __per_cpu_mca[cpu]. Move that pointer into the cpuinfo structure. - */ - - cpuinfo->ia64_pa_mca_data = (__u64 *)__per_cpu_mca[smp_processor_id()]; - - cpuinfo->percpu_paddr = pte_val(mk_pte_phys(__pa(my_cpu_data), PAGE_KERNEL)); - ia64_set_kr(IA64_KR_PA_CPU_INFO, __pa(cpuinfo)); - - /* - * Set pal_base and pal_paddr in cpuinfo structure. - */ - efi_get_pal_addr(); -} - void __devinit ia64_mmu_init (void *my_cpu_data) { diff -urN linux-2.6.11-rc3/arch/ia64/pci/pci.c linux-2.6.11-rc4/arch/ia64/pci/pci.c --- linux-2.6.11-rc3/arch/ia64/pci/pci.c 2005-02-12 19:50:35.363738968 -0800 +++ linux-2.6.11-rc4/arch/ia64/pci/pci.c 2005-02-12 19:50:52.972501288 -0800 @@ -71,7 +71,7 @@ u64 addr, mode, data = 0; int result = 0; - if ((seg > 255) || (bus > 255) || (devfn > 255) || (reg > 4095)) + if ((seg > 65535) || (bus > 255) || (devfn > 255) || (reg > 4095)) return -EINVAL; if ((seg | reg) <= 255) { diff -urN linux-2.6.11-rc3/arch/ia64/sn/include/shubio.h linux-2.6.11-rc4/arch/ia64/sn/include/shubio.h --- linux-2.6.11-rc3/arch/ia64/sn/include/shubio.h 2004-12-24 13:34:01.000000000 -0800 +++ linux-2.6.11-rc4/arch/ia64/sn/include/shubio.h 1969-12-31 16:00:00.000000000 -0800 @@ -1,3476 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 1992 - 1997, 2000-2004 Silicon Graphics, Inc. All rights reserved. - */ - -#ifndef _ASM_IA64_SN_SHUBIO_H -#define _ASM_IA64_SN_SHUBIO_H - -#define HUB_WIDGET_ID_MAX 0xf -#define IIO_NUM_ITTES 7 -#define HUB_NUM_BIG_WINDOW (IIO_NUM_ITTES - 1) - -#define IIO_WID 0x00400000 /* Crosstalk Widget Identification */ - /* This register is also accessible from - * Crosstalk at address 0x0. */ -#define IIO_WSTAT 0x00400008 /* Crosstalk Widget Status */ -#define IIO_WCR 0x00400020 /* Crosstalk Widget Control Register */ -#define IIO_ILAPR 0x00400100 /* IO Local Access Protection Register */ -#define IIO_ILAPO 0x00400108 /* IO Local Access Protection Override */ -#define IIO_IOWA 0x00400110 /* IO Outbound Widget Access */ -#define IIO_IIWA 0x00400118 /* IO Inbound Widget Access */ -#define IIO_IIDEM 0x00400120 /* IO Inbound Device Error Mask */ -#define IIO_ILCSR 0x00400128 /* IO LLP Control and Status Register */ -#define IIO_ILLR 0x00400130 /* IO LLP Log Register */ -#define IIO_IIDSR 0x00400138 /* IO Interrupt Destination */ - -#define IIO_IGFX0 0x00400140 /* IO Graphics Node-Widget Map 0 */ -#define IIO_IGFX1 0x00400148 /* IO Graphics Node-Widget Map 1 */ - -#define IIO_ISCR0 0x00400150 /* IO Scratch Register 0 */ -#define IIO_ISCR1 0x00400158 /* IO Scratch Register 1 */ - -#define IIO_ITTE1 0x00400160 /* IO Translation Table Entry 1 */ -#define IIO_ITTE2 0x00400168 /* IO Translation Table Entry 2 */ -#define IIO_ITTE3 0x00400170 /* IO Translation Table Entry 3 */ -#define IIO_ITTE4 0x00400178 /* IO Translation Table Entry 4 */ -#define IIO_ITTE5 0x00400180 /* IO Translation Table Entry 5 */ -#define IIO_ITTE6 0x00400188 /* IO Translation Table Entry 6 */ -#define IIO_ITTE7 0x00400190 /* IO Translation Table Entry 7 */ - -#define IIO_IPRB0 0x00400198 /* IO PRB Entry 0 */ -#define IIO_IPRB8 0x004001A0 /* IO PRB Entry 8 */ -#define IIO_IPRB9 0x004001A8 /* IO PRB Entry 9 */ -#define IIO_IPRBA 0x004001B0 /* IO PRB Entry A */ -#define IIO_IPRBB 0x004001B8 /* IO PRB Entry B */ -#define IIO_IPRBC 0x004001C0 /* IO PRB Entry C */ -#define IIO_IPRBD 0x004001C8 /* IO PRB Entry D */ -#define IIO_IPRBE 0x004001D0 /* IO PRB Entry E */ -#define IIO_IPRBF 0x004001D8 /* IO PRB Entry F */ - -#define IIO_IXCC 0x004001E0 /* IO Crosstalk Credit Count Timeout */ -#define IIO_IMEM 0x004001E8 /* IO Miscellaneous Error Mask */ -#define IIO_IXTT 0x004001F0 /* IO Crosstalk Timeout Threshold */ -#define IIO_IECLR 0x004001F8 /* IO Error Clear Register */ -#define IIO_IBCR 0x00400200 /* IO BTE Control Register */ - -#define IIO_IXSM 0x00400208 /* IO Crosstalk Spurious Message */ -#define IIO_IXSS 0x00400210 /* IO Crosstalk Spurious Sideband */ - -#define IIO_ILCT 0x00400218 /* IO LLP Channel Test */ - -#define IIO_IIEPH1 0x00400220 /* IO Incoming Error Packet Header, Part 1 */ -#define IIO_IIEPH2 0x00400228 /* IO Incoming Error Packet Header, Part 2 */ - - -#define IIO_ISLAPR 0x00400230 /* IO SXB Local Access Protection Regster */ -#define IIO_ISLAPO 0x00400238 /* IO SXB Local Access Protection Override */ - -#define IIO_IWI 0x00400240 /* IO Wrapper Interrupt Register */ -#define IIO_IWEL 0x00400248 /* IO Wrapper Error Log Register */ -#define IIO_IWC 0x00400250 /* IO Wrapper Control Register */ -#define IIO_IWS 0x00400258 /* IO Wrapper Status Register */ -#define IIO_IWEIM 0x00400260 /* IO Wrapper Error Interrupt Masking Register */ - -#define IIO_IPCA 0x00400300 /* IO PRB Counter Adjust */ - -#define IIO_IPRTE0_A 0x00400308 /* IO PIO Read Address Table Entry 0, Part A */ -#define IIO_IPRTE1_A 0x00400310 /* IO PIO Read Address Table Entry 1, Part A */ -#define IIO_IPRTE2_A 0x00400318 /* IO PIO Read Address Table Entry 2, Part A */ -#define IIO_IPRTE3_A 0x00400320 /* IO PIO Read Address Table Entry 3, Part A */ -#define IIO_IPRTE4_A 0x00400328 /* IO PIO Read Address Table Entry 4, Part A */ -#define IIO_IPRTE5_A 0x00400330 /* IO PIO Read Address Table Entry 5, Part A */ -#define IIO_IPRTE6_A 0x00400338 /* IO PIO Read Address Table Entry 6, Part A */ -#define IIO_IPRTE7_A 0x00400340 /* IO PIO Read Address Table Entry 7, Part A */ - -#define IIO_IPRTE0_B 0x00400348 /* IO PIO Read Address Table Entry 0, Part B */ -#define IIO_IPRTE1_B 0x00400350 /* IO PIO Read Address Table Entry 1, Part B */ -#define IIO_IPRTE2_B 0x00400358 /* IO PIO Read Address Table Entry 2, Part B */ -#define IIO_IPRTE3_B 0x00400360 /* IO PIO Read Address Table Entry 3, Part B */ -#define IIO_IPRTE4_B 0x00400368 /* IO PIO Read Address Table Entry 4, Part B */ -#define IIO_IPRTE5_B 0x00400370 /* IO PIO Read Address Table Entry 5, Part B */ -#define IIO_IPRTE6_B 0x00400378 /* IO PIO Read Address Table Entry 6, Part B */ -#define IIO_IPRTE7_B 0x00400380 /* IO PIO Read Address Table Entry 7, Part B */ - -#define IIO_IPDR 0x00400388 /* IO PIO Deallocation Register */ -#define IIO_ICDR 0x00400390 /* IO CRB Entry Deallocation Register */ -#define IIO_IFDR 0x00400398 /* IO IOQ FIFO Depth Register */ -#define IIO_IIAP 0x004003A0 /* IO IIQ Arbitration Parameters */ -#define IIO_ICMR 0x004003A8 /* IO CRB Management Register */ -#define IIO_ICCR 0x004003B0 /* IO CRB Control Register */ -#define IIO_ICTO 0x004003B8 /* IO CRB Timeout */ -#define IIO_ICTP 0x004003C0 /* IO CRB Timeout Prescalar */ - -#define IIO_ICRB0_A 0x00400400 /* IO CRB Entry 0_A */ -#define IIO_ICRB0_B 0x00400408 /* IO CRB Entry 0_B */ -#define IIO_ICRB0_C 0x00400410 /* IO CRB Entry 0_C */ -#define IIO_ICRB0_D 0x00400418 /* IO CRB Entry 0_D */ -#define IIO_ICRB0_E 0x00400420 /* IO CRB Entry 0_E */ - -#define IIO_ICRB1_A 0x00400430 /* IO CRB Entry 1_A */ -#define IIO_ICRB1_B 0x00400438 /* IO CRB Entry 1_B */ -#define IIO_ICRB1_C 0x00400440 /* IO CRB Entry 1_C */ -#define IIO_ICRB1_D 0x00400448 /* IO CRB Entry 1_D */ -#define IIO_ICRB1_E 0x00400450 /* IO CRB Entry 1_E */ - -#define IIO_ICRB2_A 0x00400460 /* IO CRB Entry 2_A */ -#define IIO_ICRB2_B 0x00400468 /* IO CRB Entry 2_B */ -#define IIO_ICRB2_C 0x00400470 /* IO CRB Entry 2_C */ -#define IIO_ICRB2_D 0x00400478 /* IO CRB Entry 2_D */ -#define IIO_ICRB2_E 0x00400480 /* IO CRB Entry 2_E */ - -#define IIO_ICRB3_A 0x00400490 /* IO CRB Entry 3_A */ -#define IIO_ICRB3_B 0x00400498 /* IO CRB Entry 3_B */ -#define IIO_ICRB3_C 0x004004a0 /* IO CRB Entry 3_C */ -#define IIO_ICRB3_D 0x004004a8 /* IO CRB Entry 3_D */ -#define IIO_ICRB3_E 0x004004b0 /* IO CRB Entry 3_E */ - -#define IIO_ICRB4_A 0x004004c0 /* IO CRB Entry 4_A */ -#define IIO_ICRB4_B 0x004004c8 /* IO CRB Entry 4_B */ -#define IIO_ICRB4_C 0x004004d0 /* IO CRB Entry 4_C */ -#define IIO_ICRB4_D 0x004004d8 /* IO CRB Entry 4_D */ -#define IIO_ICRB4_E 0x004004e0 /* IO CRB Entry 4_E */ - -#define IIO_ICRB5_A 0x004004f0 /* IO CRB Entry 5_A */ -#define IIO_ICRB5_B 0x004004f8 /* IO CRB Entry 5_B */ -#define IIO_ICRB5_C 0x00400500 /* IO CRB Entry 5_C */ -#define IIO_ICRB5_D 0x00400508 /* IO CRB Entry 5_D */ -#define IIO_ICRB5_E 0x00400510 /* IO CRB Entry 5_E */ - -#define IIO_ICRB6_A 0x00400520 /* IO CRB Entry 6_A */ -#define IIO_ICRB6_B 0x00400528 /* IO CRB Entry 6_B */ -#define IIO_ICRB6_C 0x00400530 /* IO CRB Entry 6_C */ -#define IIO_ICRB6_D 0x00400538 /* IO CRB Entry 6_D */ -#define IIO_ICRB6_E 0x00400540 /* IO CRB Entry 6_E */ - -#define IIO_ICRB7_A 0x00400550 /* IO CRB Entry 7_A */ -#define IIO_ICRB7_B 0x00400558 /* IO CRB Entry 7_B */ -#define IIO_ICRB7_C 0x00400560 /* IO CRB Entry 7_C */ -#define IIO_ICRB7_D 0x00400568 /* IO CRB Entry 7_D */ -#define IIO_ICRB7_E 0x00400570 /* IO CRB Entry 7_E */ - -#define IIO_ICRB8_A 0x00400580 /* IO CRB Entry 8_A */ -#define IIO_ICRB8_B 0x00400588 /* IO CRB Entry 8_B */ -#define IIO_ICRB8_C 0x00400590 /* IO CRB Entry 8_C */ -#define IIO_ICRB8_D 0x00400598 /* IO CRB Entry 8_D */ -#define IIO_ICRB8_E 0x004005a0 /* IO CRB Entry 8_E */ - -#define IIO_ICRB9_A 0x004005b0 /* IO CRB Entry 9_A */ -#define IIO_ICRB9_B 0x004005b8 /* IO CRB Entry 9_B */ -#define IIO_ICRB9_C 0x004005c0 /* IO CRB Entry 9_C */ -#define IIO_ICRB9_D 0x004005c8 /* IO CRB Entry 9_D */ -#define IIO_ICRB9_E 0x004005d0 /* IO CRB Entry 9_E */ - -#define IIO_ICRBA_A 0x004005e0 /* IO CRB Entry A_A */ -#define IIO_ICRBA_B 0x004005e8 /* IO CRB Entry A_B */ -#define IIO_ICRBA_C 0x004005f0 /* IO CRB Entry A_C */ -#define IIO_ICRBA_D 0x004005f8 /* IO CRB Entry A_D */ -#define IIO_ICRBA_E 0x00400600 /* IO CRB Entry A_E */ - -#define IIO_ICRBB_A 0x00400610 /* IO CRB Entry B_A */ -#define IIO_ICRBB_B 0x00400618 /* IO CRB Entry B_B */ -#define IIO_ICRBB_C 0x00400620 /* IO CRB Entry B_C */ -#define IIO_ICRBB_D 0x00400628 /* IO CRB Entry B_D */ -#define IIO_ICRBB_E 0x00400630 /* IO CRB Entry B_E */ - -#define IIO_ICRBC_A 0x00400640 /* IO CRB Entry C_A */ -#define IIO_ICRBC_B 0x00400648 /* IO CRB Entry C_B */ -#define IIO_ICRBC_C 0x00400650 /* IO CRB Entry C_C */ -#define IIO_ICRBC_D 0x00400658 /* IO CRB Entry C_D */ -#define IIO_ICRBC_E 0x00400660 /* IO CRB Entry C_E */ - -#define IIO_ICRBD_A 0x00400670 /* IO CRB Entry D_A */ -#define IIO_ICRBD_B 0x00400678 /* IO CRB Entry D_B */ -#define IIO_ICRBD_C 0x00400680 /* IO CRB Entry D_C */ -#define IIO_ICRBD_D 0x00400688 /* IO CRB Entry D_D */ -#define IIO_ICRBD_E 0x00400690 /* IO CRB Entry D_E */ - -#define IIO_ICRBE_A 0x004006a0 /* IO CRB Entry E_A */ -#define IIO_ICRBE_B 0x004006a8 /* IO CRB Entry E_B */ -#define IIO_ICRBE_C 0x004006b0 /* IO CRB Entry E_C */ -#define IIO_ICRBE_D 0x004006b8 /* IO CRB Entry E_D */ -#define IIO_ICRBE_E 0x004006c0 /* IO CRB Entry E_E */ - -#define IIO_ICSML 0x00400700 /* IO CRB Spurious Message Low */ -#define IIO_ICSMM 0x00400708 /* IO CRB Spurious Message Middle */ -#define IIO_ICSMH 0x00400710 /* IO CRB Spurious Message High */ - -#define IIO_IDBSS 0x00400718 /* IO Debug Submenu Select */ - -#define IIO_IBLS0 0x00410000 /* IO BTE Length Status 0 */ -#define IIO_IBSA0 0x00410008 /* IO BTE Source Address 0 */ -#define IIO_IBDA0 0x00410010 /* IO BTE Destination Address 0 */ -#define IIO_IBCT0 0x00410018 /* IO BTE Control Terminate 0 */ -#define IIO_IBNA0 0x00410020 /* IO BTE Notification Address 0 */ -#define IIO_IBIA0 0x00410028 /* IO BTE Interrupt Address 0 */ -#define IIO_IBLS1 0x00420000 /* IO BTE Length Status 1 */ -#define IIO_IBSA1 0x00420008 /* IO BTE Source Address 1 */ -#define IIO_IBDA1 0x00420010 /* IO BTE Destination Address 1 */ -#define IIO_IBCT1 0x00420018 /* IO BTE Control Terminate 1 */ -#define IIO_IBNA1 0x00420020 /* IO BTE Notification Address 1 */ -#define IIO_IBIA1 0x00420028 /* IO BTE Interrupt Address 1 */ - -#define IIO_IPCR 0x00430000 /* IO Performance Control */ -#define IIO_IPPR 0x00430008 /* IO Performance Profiling */ - - -/************************************************************************ - * * - * Description: This register echoes some information from the * - * LB_REV_ID register. It is available through Crosstalk as described * - * above. The REV_NUM and MFG_NUM fields receive their values from * - * the REVISION and MANUFACTURER fields in the LB_REV_ID register. * - * The PART_NUM field's value is the Crosstalk device ID number that * - * Steve Miller assigned to the SHub chip. * - * * - ************************************************************************/ - -typedef union ii_wid_u { - uint64_t ii_wid_regval; - struct { - uint64_t w_rsvd_1 : 1; - uint64_t w_mfg_num : 11; - uint64_t w_part_num : 16; - uint64_t w_rev_num : 4; - uint64_t w_rsvd : 32; - } ii_wid_fld_s; -} ii_wid_u_t; - - -/************************************************************************ - * * - * The fields in this register are set upon detection of an error * - * and cleared by various mechanisms, as explained in the * - * description. * - * * - ************************************************************************/ - -typedef union ii_wstat_u { - uint64_t ii_wstat_regval; - struct { - uint64_t w_pending : 4; - uint64_t w_xt_crd_to : 1; - uint64_t w_xt_tail_to : 1; - uint64_t w_rsvd_3 : 3; - uint64_t w_tx_mx_rty : 1; - uint64_t w_rsvd_2 : 6; - uint64_t w_llp_tx_cnt : 8; - uint64_t w_rsvd_1 : 8; - uint64_t w_crazy : 1; - uint64_t w_rsvd : 31; - } ii_wstat_fld_s; -} ii_wstat_u_t; - - -/************************************************************************ - * * - * Description: This is a read-write enabled register. It controls * - * various aspects of the Crosstalk flow control. * - * * - ************************************************************************/ - -typedef union ii_wcr_u { - uint64_t ii_wcr_regval; - struct { - uint64_t w_wid : 4; - uint64_t w_tag : 1; - uint64_t w_rsvd_1 : 8; - uint64_t w_dst_crd : 3; - uint64_t w_f_bad_pkt : 1; - uint64_t w_dir_con : 1; - uint64_t w_e_thresh : 5; - uint64_t w_rsvd : 41; - } ii_wcr_fld_s; -} ii_wcr_u_t; - - -/************************************************************************ - * * - * Description: This register's value is a bit vector that guards * - * access to local registers within the II as well as to external * - * Crosstalk widgets. Each bit in the register corresponds to a * - * particular region in the system; a region consists of one, two or * - * four nodes (depending on the value of the REGION_SIZE field in the * - * LB_REV_ID register, which is documented in Section 8.3.1.1). The * - * protection provided by this register applies to PIO read * - * operations as well as PIO write operations. The II will perform a * - * PIO read or write request only if the bit for the requestor's * - * region is set; otherwise, the II will not perform the requested * - * operation and will return an error response. When a PIO read or * - * write request targets an external Crosstalk widget, then not only * - * must the bit for the requestor's region be set in the ILAPR, but * - * also the target widget's bit in the IOWA register must be set in * - * order for the II to perform the requested operation; otherwise, * - * the II will return an error response. Hence, the protection * - * provided by the IOWA register supplements the protection provided * - * by the ILAPR for requests that target external Crosstalk widgets. * - * This register itself can be accessed only by the nodes whose * - * region ID bits are enabled in this same register. It can also be * - * accessed through the IAlias space by the local processors. * - * The reset value of this register allows access by all nodes. * - * * - ************************************************************************/ - -typedef union ii_ilapr_u { - uint64_t ii_ilapr_regval; - struct { - uint64_t i_region : 64; - } ii_ilapr_fld_s; -} ii_ilapr_u_t; - - - - -/************************************************************************ - * * - * Description: A write to this register of the 64-bit value * - * "SGIrules" in ASCII, will cause the bit in the ILAPR register * - * corresponding to the region of the requestor to be set (allow * - * access). A write of any other value will be ignored. Access * - * protection for this register is "SGIrules". * - * This register can also be accessed through the IAlias space. * - * However, this access will not change the access permissions in the * - * ILAPR. * - * * - ************************************************************************/ - -typedef union ii_ilapo_u { - uint64_t ii_ilapo_regval; - struct { - uint64_t i_io_ovrride : 64; - } ii_ilapo_fld_s; -} ii_ilapo_u_t; - - - -/************************************************************************ - * * - * This register qualifies all the PIO and Graphics writes launched * - * from the SHUB towards a widget. * - * * - ************************************************************************/ - -typedef union ii_iowa_u { - uint64_t ii_iowa_regval; - struct { - uint64_t i_w0_oac : 1; - uint64_t i_rsvd_1 : 7; - uint64_t i_wx_oac : 8; - uint64_t i_rsvd : 48; - } ii_iowa_fld_s; -} ii_iowa_u_t; - - -/************************************************************************ - * * - * Description: This register qualifies all the requests launched * - * from a widget towards the Shub. This register is intended to be * - * used by software in case of misbehaving widgets. * - * * - * * - ************************************************************************/ - -typedef union ii_iiwa_u { - uint64_t ii_iiwa_regval; - struct { - uint64_t i_w0_iac : 1; - uint64_t i_rsvd_1 : 7; - uint64_t i_wx_iac : 8; - uint64_t i_rsvd : 48; - } ii_iiwa_fld_s; -} ii_iiwa_u_t; - - - -/************************************************************************ - * * - * Description: This register qualifies all the operations launched * - * from a widget towards the SHub. It allows individual access * - * control for up to 8 devices per widget. A device refers to * - * individual DMA master hosted by a widget. * - * The bits in each field of this register are cleared by the Shub * - * upon detection of an error which requires the device to be * - * disabled. These fields assume that 0=TNUM=7 (i.e., Bridge-centric * - * Crosstalk). Whether or not a device has access rights to this * - * Shub is determined by an AND of the device enable bit in the * - * appropriate field of this register and the corresponding bit in * - * the Wx_IAC field (for the widget which this device belongs to). * - * The bits in this field are set by writing a 1 to them. Incoming * - * replies from Crosstalk are not subject to this access control * - * mechanism. * - * * - ************************************************************************/ - -typedef union ii_iidem_u { - uint64_t ii_iidem_regval; - struct { - uint64_t i_w8_dxs : 8; - uint64_t i_w9_dxs : 8; - uint64_t i_wa_dxs : 8; - uint64_t i_wb_dxs : 8; - uint64_t i_wc_dxs : 8; - uint64_t i_wd_dxs : 8; - uint64_t i_we_dxs : 8; - uint64_t i_wf_dxs : 8; - } ii_iidem_fld_s; -} ii_iidem_u_t; - - -/************************************************************************ - * * - * This register contains the various programmable fields necessary * - * for controlling and observing the LLP signals. * - * * - ************************************************************************/ - -typedef union ii_ilcsr_u { - uint64_t ii_ilcsr_regval; - struct { - uint64_t i_nullto : 6; - uint64_t i_rsvd_4 : 2; - uint64_t i_wrmrst : 1; - uint64_t i_rsvd_3 : 1; - uint64_t i_llp_en : 1; - uint64_t i_bm8 : 1; - uint64_t i_llp_stat : 2; - uint64_t i_remote_power : 1; - uint64_t i_rsvd_2 : 1; - uint64_t i_maxrtry : 10; - uint64_t i_d_avail_sel : 2; - uint64_t i_rsvd_1 : 4; - uint64_t i_maxbrst : 10; - uint64_t i_rsvd : 22; - - } ii_ilcsr_fld_s; -} ii_ilcsr_u_t; - - -/************************************************************************ - * * - * This is simply a status registers that monitors the LLP error * - * rate. * - * * - ************************************************************************/ - -typedef union ii_illr_u { - uint64_t ii_illr_regval; - struct { - uint64_t i_sn_cnt : 16; - uint64_t i_cb_cnt : 16; - uint64_t i_rsvd : 32; - } ii_illr_fld_s; -} ii_illr_u_t; - - -/************************************************************************ - * * - * Description: All II-detected non-BTE error interrupts are * - * specified via this register. * - * NOTE: The PI interrupt register address is hardcoded in the II. If * - * PI_ID==0, then the II sends an interrupt request (Duplonet PWRI * - * packet) to address offset 0x0180_0090 within the local register * - * address space of PI0 on the node specified by the NODE field. If * - * PI_ID==1, then the II sends the interrupt request to address * - * offset 0x01A0_0090 within the local register address space of PI1 * - * on the node specified by the NODE field. * - * * - ************************************************************************/ - -typedef union ii_iidsr_u { - uint64_t ii_iidsr_regval; - struct { - uint64_t i_level : 8; - uint64_t i_pi_id : 1; - uint64_t i_node : 11; - uint64_t i_rsvd_3 : 4; - uint64_t i_enable : 1; - uint64_t i_rsvd_2 : 3; - uint64_t i_int_sent : 2; - uint64_t i_rsvd_1 : 2; - uint64_t i_pi0_forward_int : 1; - uint64_t i_pi1_forward_int : 1; - uint64_t i_rsvd : 30; - } ii_iidsr_fld_s; -} ii_iidsr_u_t; - - - -/************************************************************************ - * * - * There are two instances of this register. This register is used * - * for matching up the incoming responses from the graphics widget to * - * the processor that initiated the graphics operation. The * - * write-responses are converted to graphics credits and returned to * - * the processor so that the processor interface can manage the flow * - * control. * - * * - ************************************************************************/ - -typedef union ii_igfx0_u { - uint64_t ii_igfx0_regval; - struct { - uint64_t i_w_num : 4; - uint64_t i_pi_id : 1; - uint64_t i_n_num : 12; - uint64_t i_p_num : 1; - uint64_t i_rsvd : 46; - } ii_igfx0_fld_s; -} ii_igfx0_u_t; - - -/************************************************************************ - * * - * There are two instances of this register. This register is used * - * for matching up the incoming responses from the graphics widget to * - * the processor that initiated the graphics operation. The * - * write-responses are converted to graphics credits and returned to * - * the processor so that the processor interface can manage the flow * - * control. * - * * - ************************************************************************/ - -typedef union ii_igfx1_u { - uint64_t ii_igfx1_regval; - struct { - uint64_t i_w_num : 4; - uint64_t i_pi_id : 1; - uint64_t i_n_num : 12; - uint64_t i_p_num : 1; - uint64_t i_rsvd : 46; - } ii_igfx1_fld_s; -} ii_igfx1_u_t; - - -/************************************************************************ - * * - * There are two instances of this registers. These registers are * - * used as scratch registers for software use. * - * * - ************************************************************************/ - -typedef union ii_iscr0_u { - uint64_t ii_iscr0_regval; - struct { - uint64_t i_scratch : 64; - } ii_iscr0_fld_s; -} ii_iscr0_u_t; - - - -/************************************************************************ - * * - * There are two instances of this registers. These registers are * - * used as scratch registers for software use. * - * * - ************************************************************************/ - -typedef union ii_iscr1_u { - uint64_t ii_iscr1_regval; - struct { - uint64_t i_scratch : 64; - } ii_iscr1_fld_s; -} ii_iscr1_u_t; - - -/************************************************************************ - * * - * Description: There are seven instances of translation table entry * - * registers. Each register maps a Shub Big Window to a 48-bit * - * address on Crosstalk. * - * For M-mode (128 nodes, 8 GBytes/node), SysAD[31:29] (Big Window * - * number) are used to select one of these 7 registers. The Widget * - * number field is then derived from the W_NUM field for synthesizing * - * a Crosstalk packet. The 5 bits of OFFSET are concatenated with * - * SysAD[28:0] to form Crosstalk[33:0]. The upper Crosstalk[47:34] * - * are padded with zeros. Although the maximum Crosstalk space * - * addressable by the SHub is thus the lower 16 GBytes per widget * - * (M-mode), however only 7/32nds of this * - * space can be accessed. * - * For the N-mode (256 nodes, 4 GBytes/node), SysAD[30:28] (Big * - * Window number) are used to select one of these 7 registers. The * - * Widget number field is then derived from the W_NUM field for * - * synthesizing a Crosstalk packet. The 5 bits of OFFSET are * - * concatenated with SysAD[27:0] to form Crosstalk[33:0]. The IOSP * - * field is used as Crosstalk[47], and remainder of the Crosstalk * - * address bits (Crosstalk[46:34]) are always zero. While the maximum * - * Crosstalk space addressable by the Shub is thus the lower * - * 8-GBytes per widget (N-mode), only 7/32nds * - * of this space can be accessed. * - * * - ************************************************************************/ - -typedef union ii_itte1_u { - uint64_t ii_itte1_regval; - struct { - uint64_t i_offset : 5; - uint64_t i_rsvd_1 : 3; - uint64_t i_w_num : 4; - uint64_t i_iosp : 1; - uint64_t i_rsvd : 51; - } ii_itte1_fld_s; -} ii_itte1_u_t; - - -/************************************************************************ - * * - * Description: There are seven instances of translation table entry * - * registers. Each register maps a Shub Big Window to a 48-bit * - * address on Crosstalk. * - * For M-mode (128 nodes, 8 GBytes/node), SysAD[31:29] (Big Window * - * number) are used to select one of these 7 registers. The Widget * - * number field is then derived from the W_NUM field for synthesizing * - * a Crosstalk packet. The 5 bits of OFFSET are concatenated with * - * SysAD[28:0] to form Crosstalk[33:0]. The upper Crosstalk[47:34] * - * are padded with zeros. Although the maximum Crosstalk space * - * addressable by the Shub is thus the lower 16 GBytes per widget * - * (M-mode), however only 7/32nds of this * - * space can be accessed. * - * For the N-mode (256 nodes, 4 GBytes/node), SysAD[30:28] (Big * - * Window number) are used to select one of these 7 registers. The * - * Widget number field is then derived from the W_NUM field for * - * synthesizing a Crosstalk packet. The 5 bits of OFFSET are * - * concatenated with SysAD[27:0] to form Crosstalk[33:0]. The IOSP * - * field is used as Crosstalk[47], and remainder of the Crosstalk * - * address bits (Crosstalk[46:34]) are always zero. While the maximum * - * Crosstalk space addressable by the Shub is thus the lower * - * 8-GBytes per widget (N-mode), only 7/32nds * - * of this space can be accessed. * - * * - ************************************************************************/ - -typedef union ii_itte2_u { - uint64_t ii_itte2_regval; - struct { - uint64_t i_offset : 5; - uint64_t i_rsvd_1 : 3; - uint64_t i_w_num : 4; - uint64_t i_iosp : 1; - uint64_t i_rsvd : 51; - } ii_itte2_fld_s; -} ii_itte2_u_t; - - -/************************************************************************ - * * - * Description: There are seven instances of translation table entry * - * registers. Each register maps a Shub Big Window to a 48-bit * - * address on Crosstalk. * - * For M-mode (128 nodes, 8 GBytes/node), SysAD[31:29] (Big Window * - * number) are used to select one of these 7 registers. The Widget * - * number field is then derived from the W_NUM field for synthesizing * - * a Crosstalk packet. The 5 bits of OFFSET are concatenated with * - * SysAD[28:0] to form Crosstalk[33:0]. The upper Crosstalk[47:34] * - * are padded with zeros. Although the maximum Crosstalk space * - * addressable by the Shub is thus the lower 16 GBytes per widget * - * (M-mode), however only 7/32nds of this * - * space can be accessed. * - * For the N-mode (256 nodes, 4 GBytes/node), SysAD[30:28] (Big * - * Window number) are used to select one of these 7 registers. The * - * Widget number field is then derived from the W_NUM field for * - * synthesizing a Crosstalk packet. The 5 bits of OFFSET are * - * concatenated with SysAD[27:0] to form Crosstalk[33:0]. The IOSP * - * field is used as Crosstalk[47], and remainder of the Crosstalk * - * address bits (Crosstalk[46:34]) are always zero. While the maximum * - * Crosstalk space addressable by the SHub is thus the lower * - * 8-GBytes per widget (N-mode), only 7/32nds * - * of this space can be accessed. * - * * - ************************************************************************/ - -typedef union ii_itte3_u { - uint64_t ii_itte3_regval; - struct { - uint64_t i_offset : 5; - uint64_t i_rsvd_1 : 3; - uint64_t i_w_num : 4; - uint64_t i_iosp : 1; - uint64_t i_rsvd : 51; - } ii_itte3_fld_s; -} ii_itte3_u_t; - - -/************************************************************************ - * * - * Description: There are seven instances of translation table entry * - * registers. Each register maps a SHub Big Window to a 48-bit * - * address on Crosstalk. * - * For M-mode (128 nodes, 8 GBytes/node), SysAD[31:29] (Big Window * - * number) are used to select one of these 7 registers. The Widget * - * number field is then derived from the W_NUM field for synthesizing * - * a Crosstalk packet. The 5 bits of OFFSET are concatenated with * - * SysAD[28:0] to form Crosstalk[33:0]. The upper Crosstalk[47:34] * - * are padded with zeros. Although the maximum Crosstalk space * - * addressable by the SHub is thus the lower 16 GBytes per widget * - * (M-mode), however only 7/32nds of this * - * space can be accessed. * - * For the N-mode (256 nodes, 4 GBytes/node), SysAD[30:28] (Big * - * Window number) are used to select one of these 7 registers. The * - * Widget number field is then derived from the W_NUM field for * - * synthesizing a Crosstalk packet. The 5 bits of OFFSET are * - * concatenated with SysAD[27:0] to form Crosstalk[33:0]. The IOSP * - * field is used as Crosstalk[47], and remainder of the Crosstalk * - * address bits (Crosstalk[46:34]) are always zero. While the maximum * - * Crosstalk space addressable by the SHub is thus the lower * - * 8-GBytes per widget (N-mode), only 7/32nds * - * of this space can be accessed. * - * * - ************************************************************************/ - -typedef union ii_itte4_u { - uint64_t ii_itte4_regval; - struct { - uint64_t i_offset : 5; - uint64_t i_rsvd_1 : 3; - uint64_t i_w_num : 4; - uint64_t i_iosp : 1; - uint64_t i_rsvd : 51; - } ii_itte4_fld_s; -} ii_itte4_u_t; - - -/************************************************************************ - * * - * Description: There are seven instances of translation table entry * - * registers. Each register maps a SHub Big Window to a 48-bit * - * address on Crosstalk. * - * For M-mode (128 nodes, 8 GBytes/node), SysAD[31:29] (Big Window * - * number) are used to select one of these 7 registers. The Widget * - * number field is then derived from the W_NUM field for synthesizing * - * a Crosstalk packet. The 5 bits of OFFSET are concatenated with * - * SysAD[28:0] to form Crosstalk[33:0]. The upper Crosstalk[47:34] * - * are padded with zeros. Although the maximum Crosstalk space * - * addressable by the Shub is thus the lower 16 GBytes per widget * - * (M-mode), however only 7/32nds of this * - * space can be accessed. * - * For the N-mode (256 nodes, 4 GBytes/node), SysAD[30:28] (Big * - * Window number) are used to select one of these 7 registers. The * - * Widget number field is then derived from the W_NUM field for * - * synthesizing a Crosstalk packet. The 5 bits of OFFSET are * - * concatenated with SysAD[27:0] to form Crosstalk[33:0]. The IOSP * - * field is used as Crosstalk[47], and remainder of the Crosstalk * - * address bits (Crosstalk[46:34]) are always zero. While the maximum * - * Crosstalk space addressable by the Shub is thus the lower * - * 8-GBytes per widget (N-mode), only 7/32nds * - * of this space can be accessed. * - * * - ************************************************************************/ - -typedef union ii_itte5_u { - uint64_t ii_itte5_regval; - struct { - uint64_t i_offset : 5; - uint64_t i_rsvd_1 : 3; - uint64_t i_w_num : 4; - uint64_t i_iosp : 1; - uint64_t i_rsvd : 51; - } ii_itte5_fld_s; -} ii_itte5_u_t; - - -/************************************************************************ - * * - * Description: There are seven instances of translation table entry * - * registers. Each register maps a Shub Big Window to a 48-bit * - * address on Crosstalk. * - * For M-mode (128 nodes, 8 GBytes/node), SysAD[31:29] (Big Window * - * number) are used to select one of these 7 registers. The Widget * - * number field is then derived from the W_NUM field for synthesizing * - * a Crosstalk packet. The 5 bits of OFFSET are concatenated with * - * SysAD[28:0] to form Crosstalk[33:0]. The upper Crosstalk[47:34] * - * are padded with zeros. Although the maximum Crosstalk space * - * addressable by the Shub is thus the lower 16 GBytes per widget * - * (M-mode), however only 7/32nds of this * - * space can be accessed. * - * For the N-mode (256 nodes, 4 GBytes/node), SysAD[30:28] (Big * - * Window number) are used to select one of these 7 registers. The * - * Widget number field is then derived from the W_NUM field for * - * synthesizing a Crosstalk packet. The 5 bits of OFFSET are * - * concatenated with SysAD[27:0] to form Crosstalk[33:0]. The IOSP * - * field is used as Crosstalk[47], and remainder of the Crosstalk * - * address bits (Crosstalk[46:34]) are always zero. While the maximum * - * Crosstalk space addressable by the Shub is thus the lower * - * 8-GBytes per widget (N-mode), only 7/32nds * - * of this space can be accessed. * - * * - ************************************************************************/ - -typedef union ii_itte6_u { - uint64_t ii_itte6_regval; - struct { - uint64_t i_offset : 5; - uint64_t i_rsvd_1 : 3; - uint64_t i_w_num : 4; - uint64_t i_iosp : 1; - uint64_t i_rsvd : 51; - } ii_itte6_fld_s; -} ii_itte6_u_t; - - -/************************************************************************ - * * - * Description: There are seven instances of translation table entry * - * registers. Each register maps a Shub Big Window to a 48-bit * - * address on Crosstalk. * - * For M-mode (128 nodes, 8 GBytes/node), SysAD[31:29] (Big Window * - * number) are used to select one of these 7 registers. The Widget * - * number field is then derived from the W_NUM field for synthesizing * - * a Crosstalk packet. The 5 bits of OFFSET are concatenated with * - * SysAD[28:0] to form Crosstalk[33:0]. The upper Crosstalk[47:34] * - * are padded with zeros. Although the maximum Crosstalk space * - * addressable by the Shub is thus the lower 16 GBytes per widget * - * (M-mode), however only 7/32nds of this * - * space can be accessed. * - * For the N-mode (256 nodes, 4 GBytes/node), SysAD[30:28] (Big * - * Window number) are used to select one of these 7 registers. The * - * Widget number field is then derived from the W_NUM field for * - * synthesizing a Crosstalk packet. The 5 bits of OFFSET are * - * concatenated with SysAD[27:0] to form Crosstalk[33:0]. The IOSP * - * field is used as Crosstalk[47], and remainder of the Crosstalk * - * address bits (Crosstalk[46:34]) are always zero. While the maximum * - * Crosstalk space addressable by the SHub is thus the lower * - * 8-GBytes per widget (N-mode), only 7/32nds * - * of this space can be accessed. * - * * - ************************************************************************/ - -typedef union ii_itte7_u { - uint64_t ii_itte7_regval; - struct { - uint64_t i_offset : 5; - uint64_t i_rsvd_1 : 3; - uint64_t i_w_num : 4; - uint64_t i_iosp : 1; - uint64_t i_rsvd : 51; - } ii_itte7_fld_s; -} ii_itte7_u_t; - - -/************************************************************************ - * * - * Description: There are 9 instances of this register, one per * - * actual widget in this implementation of SHub and Crossbow. * - * Note: Crossbow only has ports for Widgets 8 through F, widget 0 * - * refers to Crossbow's internal space. * - * This register contains the state elements per widget that are * - * necessary to manage the PIO flow control on Crosstalk and on the * - * Router Network. See the PIO Flow Control chapter for a complete * - * description of this register * - * The SPUR_WR bit requires some explanation. When this register is * - * written, the new value of the C field is captured in an internal * - * register so the hardware can remember what the programmer wrote * - * into the credit counter. The SPUR_WR bit sets whenever the C field * - * increments above this stored value, which indicates that there * - * have been more responses received than requests sent. The SPUR_WR * - * bit cannot be cleared until a value is written to the IPRBx * - * register; the write will correct the C field and capture its new * - * value in the internal register. Even if IECLR[E_PRB_x] is set, the * - * SPUR_WR bit will persist if IPRBx hasn't yet been written. * - * . * - * * - ************************************************************************/ - -typedef union ii_iprb0_u { - uint64_t ii_iprb0_regval; - struct { - uint64_t i_c : 8; - uint64_t i_na : 14; - uint64_t i_rsvd_2 : 2; - uint64_t i_nb : 14; - uint64_t i_rsvd_1 : 2; - uint64_t i_m : 2; - uint64_t i_f : 1; - uint64_t i_of_cnt : 5; - uint64_t i_error : 1; - uint64_t i_rd_to : 1; - uint64_t i_spur_wr : 1; - uint64_t i_spur_rd : 1; - uint64_t i_rsvd : 11; - uint64_t i_mult_err : 1; - } ii_iprb0_fld_s; -} ii_iprb0_u_t; - - -/************************************************************************ - * * - * Description: There are 9 instances of this register, one per * - * actual widget in this implementation of SHub and Crossbow. * - * Note: Crossbow only has ports for Widgets 8 through F, widget 0 * - * refers to Crossbow's internal space. * - * This register contains the state elements per widget that are * - * necessary to manage the PIO flow control on Crosstalk and on the * - * Router Network. See the PIO Flow Control chapter for a complete * - * description of this register * - * The SPUR_WR bit requires some explanation. When this register is * - * written, the new value of the C field is captured in an internal * - * register so the hardware can remember what the programmer wrote * - * into the credit counter. The SPUR_WR bit sets whenever the C field * - * increments above this stored value, which indicates that there * - * have been more responses received than requests sent. The SPUR_WR * - * bit cannot be cleared until a value is written to the IPRBx * - * register; the write will correct the C field and capture its new * - * value in the internal register. Even if IECLR[E_PRB_x] is set, the * - * SPUR_WR bit will persist if IPRBx hasn't yet been written. * - * . * - * * - ************************************************************************/ - -typedef union ii_iprb8_u { - uint64_t ii_iprb8_regval; - struct { - uint64_t i_c : 8; - uint64_t i_na : 14; - uint64_t i_rsvd_2 : 2; - uint64_t i_nb : 14; - uint64_t i_rsvd_1 : 2; - uint64_t i_m : 2; - uint64_t i_f : 1; - uint64_t i_of_cnt : 5; - uint64_t i_error : 1; - uint64_t i_rd_to : 1; - uint64_t i_spur_wr : 1; - uint64_t i_spur_rd : 1; - uint64_t i_rsvd : 11; - uint64_t i_mult_err : 1; - } ii_iprb8_fld_s; -} ii_iprb8_u_t; - - -/************************************************************************ - * * - * Description: There are 9 instances of this register, one per * - * actual widget in this implementation of SHub and Crossbow. * - * Note: Crossbow only has ports for Widgets 8 through F, widget 0 * - * refers to Crossbow's internal space. * - * This register contains the state elements per widget that are * - * necessary to manage the PIO flow control on Crosstalk and on the * - * Router Network. See the PIO Flow Control chapter for a complete * - * description of this register * - * The SPUR_WR bit requires some explanation. When this register is * - * written, the new value of the C field is captured in an internal * - * register so the hardware can remember what the programmer wrote * - * into the credit counter. The SPUR_WR bit sets whenever the C field * - * increments above this stored value, which indicates that there * - * have been more responses received than requests sent. The SPUR_WR * - * bit cannot be cleared until a value is written to the IPRBx * - * register; the write will correct the C field and capture its new * - * value in the internal register. Even if IECLR[E_PRB_x] is set, the * - * SPUR_WR bit will persist if IPRBx hasn't yet been written. * - * . * - * * - ************************************************************************/ - -typedef union ii_iprb9_u { - uint64_t ii_iprb9_regval; - struct { - uint64_t i_c : 8; - uint64_t i_na : 14; - uint64_t i_rsvd_2 : 2; - uint64_t i_nb : 14; - uint64_t i_rsvd_1 : 2; - uint64_t i_m : 2; - uint64_t i_f : 1; - uint64_t i_of_cnt : 5; - uint64_t i_error : 1; - uint64_t i_rd_to : 1; - uint64_t i_spur_wr : 1; - uint64_t i_spur_rd : 1; - uint64_t i_rsvd : 11; - uint64_t i_mult_err : 1; - } ii_iprb9_fld_s; -} ii_iprb9_u_t; - - -/************************************************************************ - * * - * Description: There are 9 instances of this register, one per * - * actual widget in this implementation of SHub and Crossbow. * - * Note: Crossbow only has ports for Widgets 8 through F, widget 0 * - * refers to Crossbow's internal space. * - * This register contains the state elements per widget that are * - * necessary to manage the PIO flow control on Crosstalk and on the * - * Router Network. See the PIO Flow Control chapter for a complete * - * description of this register * - * The SPUR_WR bit requires some explanation. When this register is * - * written, the new value of the C field is captured in an internal * - * register so the hardware can remember what the programmer wrote * - * into the credit counter. The SPUR_WR bit sets whenever the C field * - * increments above this stored value, which indicates that there * - * have been more responses received than requests sent. The SPUR_WR * - * bit cannot be cleared until a value is written to the IPRBx * - * register; the write will correct the C field and capture its new * - * value in the internal register. Even if IECLR[E_PRB_x] is set, the * - * SPUR_WR bit will persist if IPRBx hasn't yet been written. * - * * - * * - ************************************************************************/ - -typedef union ii_iprba_u { - uint64_t ii_iprba_regval; - struct { - uint64_t i_c : 8; - uint64_t i_na : 14; - uint64_t i_rsvd_2 : 2; - uint64_t i_nb : 14; - uint64_t i_rsvd_1 : 2; - uint64_t i_m : 2; - uint64_t i_f : 1; - uint64_t i_of_cnt : 5; - uint64_t i_error : 1; - uint64_t i_rd_to : 1; - uint64_t i_spur_wr : 1; - uint64_t i_spur_rd : 1; - uint64_t i_rsvd : 11; - uint64_t i_mult_err : 1; - } ii_iprba_fld_s; -} ii_iprba_u_t; - - -/************************************************************************ - * * - * Description: There are 9 instances of this register, one per * - * actual widget in this implementation of SHub and Crossbow. * - * Note: Crossbow only has ports for Widgets 8 through F, widget 0 * - * refers to Crossbow's internal space. * - * This register contains the state elements per widget that are * - * necessary to manage the PIO flow control on Crosstalk and on the * - * Router Network. See the PIO Flow Control chapter for a complete * - * description of this register * - * The SPUR_WR bit requires some explanation. When this register is * - * written, the new value of the C field is captured in an internal * - * register so the hardware can remember what the programmer wrote * - * into the credit counter. The SPUR_WR bit sets whenever the C field * - * increments above this stored value, which indicates that there * - * have been more responses received than requests sent. The SPUR_WR * - * bit cannot be cleared until a value is written to the IPRBx * - * register; the write will correct the C field and capture its new * - * value in the internal register. Even if IECLR[E_PRB_x] is set, the * - * SPUR_WR bit will persist if IPRBx hasn't yet been written. * - * . * - * * - ************************************************************************/ - -typedef union ii_iprbb_u { - uint64_t ii_iprbb_regval; - struct { - uint64_t i_c : 8; - uint64_t i_na : 14; - uint64_t i_rsvd_2 : 2; - uint64_t i_nb : 14; - uint64_t i_rsvd_1 : 2; - uint64_t i_m : 2; - uint64_t i_f : 1; - uint64_t i_of_cnt : 5; - uint64_t i_error : 1; - uint64_t i_rd_to : 1; - uint64_t i_spur_wr : 1; - uint64_t i_spur_rd : 1; - uint64_t i_rsvd : 11; - uint64_t i_mult_err : 1; - } ii_iprbb_fld_s; -} ii_iprbb_u_t; - - -/************************************************************************ - * * - * Description: There are 9 instances of this register, one per * - * actual widget in this implementation of SHub and Crossbow. * - * Note: Crossbow only has ports for Widgets 8 through F, widget 0 * - * refers to Crossbow's internal space. * - * This register contains the state elements per widget that are * - * necessary to manage the PIO flow control on Crosstalk and on the * - * Router Network. See the PIO Flow Control chapter for a complete * - * description of this register * - * The SPUR_WR bit requires some explanation. When this register is * - * written, the new value of the C field is captured in an internal * - * register so the hardware can remember what the programmer wrote * - * into the credit counter. The SPUR_WR bit sets whenever the C field * - * increments above this stored value, which indicates that there * - * have been more responses received than requests sent. The SPUR_WR * - * bit cannot be cleared until a value is written to the IPRBx * - * register; the write will correct the C field and capture its new * - * value in the internal register. Even if IECLR[E_PRB_x] is set, the * - * SPUR_WR bit will persist if IPRBx hasn't yet been written. * - * . * - * * - ************************************************************************/ - -typedef union ii_iprbc_u { - uint64_t ii_iprbc_regval; - struct { - uint64_t i_c : 8; - uint64_t i_na : 14; - uint64_t i_rsvd_2 : 2; - uint64_t i_nb : 14; - uint64_t i_rsvd_1 : 2; - uint64_t i_m : 2; - uint64_t i_f : 1; - uint64_t i_of_cnt : 5; - uint64_t i_error : 1; - uint64_t i_rd_to : 1; - uint64_t i_spur_wr : 1; - uint64_t i_spur_rd : 1; - uint64_t i_rsvd : 11; - uint64_t i_mult_err : 1; - } ii_iprbc_fld_s; -} ii_iprbc_u_t; - - -/************************************************************************ - * * - * Description: There are 9 instances of this register, one per * - * actual widget in this implementation of SHub and Crossbow. * - * Note: Crossbow only has ports for Widgets 8 through F, widget 0 * - * refers to Crossbow's internal space. * - * This register contains the state elements per widget that are * - * necessary to manage the PIO flow control on Crosstalk and on the * - * Router Network. See the PIO Flow Control chapter for a complete * - * description of this register * - * The SPUR_WR bit requires some explanation. When this register is * - * written, the new value of the C field is captured in an internal * - * register so the hardware can remember what the programmer wrote * - * into the credit counter. The SPUR_WR bit sets whenever the C field * - * increments above this stored value, which indicates that there * - * have been more responses received than requests sent. The SPUR_WR * - * bit cannot be cleared until a value is written to the IPRBx * - * register; the write will correct the C field and capture its new * - * value in the internal register. Even if IECLR[E_PRB_x] is set, the * - * SPUR_WR bit will persist if IPRBx hasn't yet been written. * - * . * - * * - ************************************************************************/ - -typedef union ii_iprbd_u { - uint64_t ii_iprbd_regval; - struct { - uint64_t i_c : 8; - uint64_t i_na : 14; - uint64_t i_rsvd_2 : 2; - uint64_t i_nb : 14; - uint64_t i_rsvd_1 : 2; - uint64_t i_m : 2; - uint64_t i_f : 1; - uint64_t i_of_cnt : 5; - uint64_t i_error : 1; - uint64_t i_rd_to : 1; - uint64_t i_spur_wr : 1; - uint64_t i_spur_rd : 1; - uint64_t i_rsvd : 11; - uint64_t i_mult_err : 1; - } ii_iprbd_fld_s; -} ii_iprbd_u_t; - - -/************************************************************************ - * * - * Description: There are 9 instances of this register, one per * - * actual widget in this implementation of SHub and Crossbow. * - * Note: Crossbow only has ports for Widgets 8 through F, widget 0 * - * refers to Crossbow's internal space. * - * This register contains the state elements per widget that are * - * necessary to manage the PIO flow control on Crosstalk and on the * - * Router Network. See the PIO Flow Control chapter for a complete * - * description of this register * - * The SPUR_WR bit requires some explanation. When this register is * - * written, the new value of the C field is captured in an internal * - * register so the hardware can remember what the programmer wrote * - * into the credit counter. The SPUR_WR bit sets whenever the C field * - * increments above this stored value, which indicates that there * - * have been more responses received than requests sent. The SPUR_WR * - * bit cannot be cleared until a value is written to the IPRBx * - * register; the write will correct the C field and capture its new * - * value in the internal register. Even if IECLR[E_PRB_x] is set, the * - * SPUR_WR bit will persist if IPRBx hasn't yet been written. * - * . * - * * - ************************************************************************/ - -typedef union ii_iprbe_u { - uint64_t ii_iprbe_regval; - struct { - uint64_t i_c : 8; - uint64_t i_na : 14; - uint64_t i_rsvd_2 : 2; - uint64_t i_nb : 14; - uint64_t i_rsvd_1 : 2; - uint64_t i_m : 2; - uint64_t i_f : 1; - uint64_t i_of_cnt : 5; - uint64_t i_error : 1; - uint64_t i_rd_to : 1; - uint64_t i_spur_wr : 1; - uint64_t i_spur_rd : 1; - uint64_t i_rsvd : 11; - uint64_t i_mult_err : 1; - } ii_iprbe_fld_s; -} ii_iprbe_u_t; - - -/************************************************************************ - * * - * Description: There are 9 instances of this register, one per * - * actual widget in this implementation of Shub and Crossbow. * - * Note: Crossbow only has ports for Widgets 8 through F, widget 0 * - * refers to Crossbow's internal space. * - * This register contains the state elements per widget that are * - * necessary to manage the PIO flow control on Crosstalk and on the * - * Router Network. See the PIO Flow Control chapter for a complete * - * description of this register * - * The SPUR_WR bit requires some explanation. When this register is * - * written, the new value of the C field is captured in an internal * - * register so the hardware can remember what the programmer wrote * - * into the credit counter. The SPUR_WR bit sets whenever the C field * - * increments above this stored value, which indicates that there * - * have been more responses received than requests sent. The SPUR_WR * - * bit cannot be cleared until a value is written to the IPRBx * - * register; the write will correct the C field and capture its new * - * value in the internal register. Even if IECLR[E_PRB_x] is set, the * - * SPUR_WR bit will persist if IPRBx hasn't yet been written. * - * . * - * * - ************************************************************************/ - -typedef union ii_iprbf_u { - uint64_t ii_iprbf_regval; - struct { - uint64_t i_c : 8; - uint64_t i_na : 14; - uint64_t i_rsvd_2 : 2; - uint64_t i_nb : 14; - uint64_t i_rsvd_1 : 2; - uint64_t i_m : 2; - uint64_t i_f : 1; - uint64_t i_of_cnt : 5; - uint64_t i_error : 1; - uint64_t i_rd_to : 1; - uint64_t i_spur_wr : 1; - uint64_t i_spur_rd : 1; - uint64_t i_rsvd : 11; - uint64_t i_mult_err : 1; - } ii_iprbe_fld_s; -} ii_iprbf_u_t; - - -/************************************************************************ - * * - * This register specifies the timeout value to use for monitoring * - * Crosstalk credits which are used outbound to Crosstalk. An * - * internal counter called the Crosstalk Credit Timeout Counter * - * increments every 128 II clocks. The counter starts counting * - * anytime the credit count drops below a threshold, and resets to * - * zero (stops counting) anytime the credit count is at or above the * - * threshold. The threshold is 1 credit in direct connect mode and 2 * - * in Crossbow connect mode. When the internal Crosstalk Credit * - * Timeout Counter reaches the value programmed in this register, a * - * Crosstalk Credit Timeout has occurred. The internal counter is not * - * readable from software, and stops counting at its maximum value, * - * so it cannot cause more than one interrupt. * - * * - ************************************************************************/ - -typedef union ii_ixcc_u { - uint64_t ii_ixcc_regval; - struct { - uint64_t i_time_out : 26; - uint64_t i_rsvd : 38; - } ii_ixcc_fld_s; -} ii_ixcc_u_t; - - -/************************************************************************ - * * - * Description: This register qualifies all the PIO and DMA * - * operations launched from widget 0 towards the SHub. In * - * addition, it also qualifies accesses by the BTE streams. * - * The bits in each field of this register are cleared by the SHub * - * upon detection of an error which requires widget 0 or the BTE * - * streams to be terminated. Whether or not widget x has access * - * rights to this SHub is determined by an AND of the device * - * enable bit in the appropriate field of this register and bit 0 in * - * the Wx_IAC field. The bits in this field are set by writing a 1 to * - * them. Incoming replies from Crosstalk are not subject to this * - * access control mechanism. * - * * - ************************************************************************/ - -typedef union ii_imem_u { - uint64_t ii_imem_regval; - struct { - uint64_t i_w0_esd : 1; - uint64_t i_rsvd_3 : 3; - uint64_t i_b0_esd : 1; - uint64_t i_rsvd_2 : 3; - uint64_t i_b1_esd : 1; - uint64_t i_rsvd_1 : 3; - uint64_t i_clr_precise : 1; - uint64_t i_rsvd : 51; - } ii_imem_fld_s; -} ii_imem_u_t; - - - -/************************************************************************ - * * - * Description: This register specifies the timeout value to use for * - * monitoring Crosstalk tail flits coming into the Shub in the * - * TAIL_TO field. An internal counter associated with this register * - * is incremented every 128 II internal clocks (7 bits). The counter * - * starts counting anytime a header micropacket is received and stops * - * counting (and resets to zero) any time a micropacket with a Tail * - * bit is received. Once the counter reaches the threshold value * - * programmed in this register, it generates an interrupt to the * - * processor that is programmed into the IIDSR. The counter saturates * - * (does not roll over) at its maximum value, so it cannot cause * - * another interrupt until after it is cleared. * - * The register also contains the Read Response Timeout values. The * - * Prescalar is 23 bits, and counts II clocks. An internal counter * - * increments on every II clock and when it reaches the value in the * - * Prescalar field, all IPRTE registers with their valid bits set * - * have their Read Response timers bumped. Whenever any of them match * - * the value in the RRSP_TO field, a Read Response Timeout has * - * occurred, and error handling occurs as described in the Error * - * Handling section of this document. * - * * - ************************************************************************/ - -typedef union ii_ixtt_u { - uint64_t ii_ixtt_regval; - struct { - uint64_t i_tail_to : 26; - uint64_t i_rsvd_1 : 6; - uint64_t i_rrsp_ps : 23; - uint64_t i_rrsp_to : 5; - uint64_t i_rsvd : 4; - } ii_ixtt_fld_s; -} ii_ixtt_u_t; - - -/************************************************************************ - * * - * Writing a 1 to the fields of this register clears the appropriate * - * error bits in other areas of SHub. Note that when the * - * E_PRB_x bits are used to clear error bits in PRB registers, * - * SPUR_RD and SPUR_WR may persist, because they require additional * - * action to clear them. See the IPRBx and IXSS Register * - * specifications. * - * * - ************************************************************************/ - -typedef union ii_ieclr_u { - uint64_t ii_ieclr_regval; - struct { - uint64_t i_e_prb_0 : 1; - uint64_t i_rsvd : 7; - uint64_t i_e_prb_8 : 1; - uint64_t i_e_prb_9 : 1; - uint64_t i_e_prb_a : 1; - uint64_t i_e_prb_b : 1; - uint64_t i_e_prb_c : 1; - uint64_t i_e_prb_d : 1; - uint64_t i_e_prb_e : 1; - uint64_t i_e_prb_f : 1; - uint64_t i_e_crazy : 1; - uint64_t i_e_bte_0 : 1; - uint64_t i_e_bte_1 : 1; - uint64_t i_reserved_1 : 10; - uint64_t i_spur_rd_hdr : 1; - uint64_t i_cam_intr_to : 1; - uint64_t i_cam_overflow : 1; - uint64_t i_cam_read_miss : 1; - uint64_t i_ioq_rep_underflow : 1; - uint64_t i_ioq_req_underflow : 1; - uint64_t i_ioq_rep_overflow : 1; - uint64_t i_ioq_req_overflow : 1; - uint64_t i_iiq_rep_overflow : 1; - uint64_t i_iiq_req_overflow : 1; - uint64_t i_ii_xn_rep_cred_overflow : 1; - uint64_t i_ii_xn_req_cred_overflow : 1; - uint64_t i_ii_xn_invalid_cmd : 1; - uint64_t i_xn_ii_invalid_cmd : 1; - uint64_t i_reserved_2 : 21; - } ii_ieclr_fld_s; -} ii_ieclr_u_t; - - -/************************************************************************ - * * - * This register controls both BTEs. SOFT_RESET is intended for * - * recovery after an error. COUNT controls the total number of CRBs * - * that both BTEs (combined) can use, which affects total BTE * - * bandwidth. * - * * - ************************************************************************/ - -typedef union ii_ibcr_u { - uint64_t ii_ibcr_regval; - struct { - uint64_t i_count : 4; - uint64_t i_rsvd_1 : 4; - uint64_t i_soft_reset : 1; - uint64_t i_rsvd : 55; - } ii_ibcr_fld_s; -} ii_ibcr_u_t; - - -/************************************************************************ - * * - * This register contains the header of a spurious read response * - * received from Crosstalk. A spurious read response is defined as a * - * read response received by II from a widget for which (1) the SIDN * - * has a value between 1 and 7, inclusive (II never sends requests to * - * these widgets (2) there is no valid IPRTE register which * - * corresponds to the TNUM, or (3) the widget indicated in SIDN is * - * not the same as the widget recorded in the IPRTE register * - * referenced by the TNUM. If this condition is true, and if the * - * IXSS[VALID] bit is clear, then the header of the spurious read * - * response is capture in IXSM and IXSS, and IXSS[VALID] is set. The * - * errant header is thereby captured, and no further spurious read * - * respones are captured until IXSS[VALID] is cleared by setting the * - * appropriate bit in IECLR.Everytime a spurious read response is * - * detected, the SPUR_RD bit of the PRB corresponding to the incoming * - * message's SIDN field is set. This always happens, regarless of * - * whether a header is captured. The programmer should check * - * IXSM[SIDN] to determine which widget sent the spurious response, * - * because there may be more than one SPUR_RD bit set in the PRB * - * registers. The widget indicated by IXSM[SIDN] was the first * - * spurious read response to be received since the last time * - * IXSS[VALID] was clear. The SPUR_RD bit of the corresponding PRB * - * will be set. Any SPUR_RD bits in any other PRB registers indicate * - * spurious messages from other widets which were detected after the * - * header was captured.. * - * * - ************************************************************************/ - -typedef union ii_ixsm_u { - uint64_t ii_ixsm_regval; - struct { - uint64_t i_byte_en : 32; - uint64_t i_reserved : 1; - uint64_t i_tag : 3; - uint64_t i_alt_pactyp : 4; - uint64_t i_bo : 1; - uint64_t i_error : 1; - uint64_t i_vbpm : 1; - uint64_t i_gbr : 1; - uint64_t i_ds : 2; - uint64_t i_ct : 1; - uint64_t i_tnum : 5; - uint64_t i_pactyp : 4; - uint64_t i_sidn : 4; - uint64_t i_didn : 4; - } ii_ixsm_fld_s; -} ii_ixsm_u_t; - - -/************************************************************************ - * * - * This register contains the sideband bits of a spurious read * - * response received from Crosstalk. * - * * - ************************************************************************/ - -typedef union ii_ixss_u { - uint64_t ii_ixss_regval; - struct { - uint64_t i_sideband : 8; - uint64_t i_rsvd : 55; - uint64_t i_valid : 1; - } ii_ixss_fld_s; -} ii_ixss_u_t; - - -/************************************************************************ - * * - * This register enables software to access the II LLP's test port. * - * Refer to the LLP 2.5 documentation for an explanation of the test * - * port. Software can write to this register to program the values * - * for the control fields (TestErrCapture, TestClear, TestFlit, * - * TestMask and TestSeed). Similarly, software can read from this * - * register to obtain the values of the test port's status outputs * - * (TestCBerr, TestValid and TestData). * - * * - ************************************************************************/ - -typedef union ii_ilct_u { - uint64_t ii_ilct_regval; - struct { - uint64_t i_test_seed : 20; - uint64_t i_test_mask : 8; - uint64_t i_test_data : 20; - uint64_t i_test_valid : 1; - uint64_t i_test_cberr : 1; - uint64_t i_test_flit : 3; - uint64_t i_test_clear : 1; - uint64_t i_test_err_capture : 1; - uint64_t i_rsvd : 9; - } ii_ilct_fld_s; -} ii_ilct_u_t; - - -/************************************************************************ - * * - * If the II detects an illegal incoming Duplonet packet (request or * - * reply) when VALID==0 in the IIEPH1 register, then it saves the * - * contents of the packet's header flit in the IIEPH1 and IIEPH2 * - * registers, sets the VALID bit in IIEPH1, clears the OVERRUN bit, * - * and assigns a value to the ERR_TYPE field which indicates the * - * specific nature of the error. The II recognizes four different * - * types of errors: short request packets (ERR_TYPE==2), short reply * - * packets (ERR_TYPE==3), long request packets (ERR_TYPE==4) and long * - * reply packets (ERR_TYPE==5). The encodings for these types of * - * errors were chosen to be consistent with the same types of errors * - * indicated by the ERR_TYPE field in the LB_ERROR_HDR1 register (in * - * the LB unit). If the II detects an illegal incoming Duplonet * - * packet when VALID==1 in the IIEPH1 register, then it merely sets * - * the OVERRUN bit to indicate that a subsequent error has happened, * - * and does nothing further. * - * * - ************************************************************************/ - -typedef union ii_iieph1_u { - uint64_t ii_iieph1_regval; - struct { - uint64_t i_command : 7; - uint64_t i_rsvd_5 : 1; - uint64_t i_suppl : 14; - uint64_t i_rsvd_4 : 1; - uint64_t i_source : 14; - uint64_t i_rsvd_3 : 1; - uint64_t i_err_type : 4; - uint64_t i_rsvd_2 : 4; - uint64_t i_overrun : 1; - uint64_t i_rsvd_1 : 3; - uint64_t i_valid : 1; - uint64_t i_rsvd : 13; - } ii_iieph1_fld_s; -} ii_iieph1_u_t; - - -/************************************************************************ - * * - * This register holds the Address field from the header flit of an * - * incoming erroneous Duplonet packet, along with the tail bit which * - * accompanied this header flit. This register is essentially an * - * extension of IIEPH1. Two registers were necessary because the 64 * - * bits available in only a single register were insufficient to * - * capture the entire header flit of an erroneous packet. * - * * - ************************************************************************/ - -typedef union ii_iieph2_u { - uint64_t ii_iieph2_regval; - struct { - uint64_t i_rsvd_0 : 3; - uint64_t i_address : 47; - uint64_t i_rsvd_1 : 10; - uint64_t i_tail : 1; - uint64_t i_rsvd : 3; - } ii_iieph2_fld_s; -} ii_iieph2_u_t; - - -/******************************/ - - - -/************************************************************************ - * * - * This register's value is a bit vector that guards access from SXBs * - * to local registers within the II as well as to external Crosstalk * - * widgets * - * * - ************************************************************************/ - -typedef union ii_islapr_u { - uint64_t ii_islapr_regval; - struct { - uint64_t i_region : 64; - } ii_islapr_fld_s; -} ii_islapr_u_t; - - -/************************************************************************ - * * - * A write to this register of the 56-bit value "Pup+Bun" will cause * - * the bit in the ISLAPR register corresponding to the region of the * - * requestor to be set (access allowed). ( - * * - ************************************************************************/ - -typedef union ii_islapo_u { - uint64_t ii_islapo_regval; - struct { - uint64_t i_io_sbx_ovrride : 56; - uint64_t i_rsvd : 8; - } ii_islapo_fld_s; -} ii_islapo_u_t; - -/************************************************************************ - * * - * Determines how long the wrapper will wait aftr an interrupt is * - * initially issued from the II before it times out the outstanding * - * interrupt and drops it from the interrupt queue. * - * * - ************************************************************************/ - -typedef union ii_iwi_u { - uint64_t ii_iwi_regval; - struct { - uint64_t i_prescale : 24; - uint64_t i_rsvd : 8; - uint64_t i_timeout : 8; - uint64_t i_rsvd1 : 8; - uint64_t i_intrpt_retry_period : 8; - uint64_t i_rsvd2 : 8; - } ii_iwi_fld_s; -} ii_iwi_u_t; - -/************************************************************************ - * * - * Log errors which have occurred in the II wrapper. The errors are * - * cleared by writing to the IECLR register. * - * * - ************************************************************************/ - -typedef union ii_iwel_u { - uint64_t ii_iwel_regval; - struct { - uint64_t i_intr_timed_out : 1; - uint64_t i_rsvd : 7; - uint64_t i_cam_overflow : 1; - uint64_t i_cam_read_miss : 1; - uint64_t i_rsvd1 : 2; - uint64_t i_ioq_rep_underflow : 1; - uint64_t i_ioq_req_underflow : 1; - uint64_t i_ioq_rep_overflow : 1; - uint64_t i_ioq_req_overflow : 1; - uint64_t i_iiq_rep_overflow : 1; - uint64_t i_iiq_req_overflow : 1; - uint64_t i_rsvd2 : 6; - uint64_t i_ii_xn_rep_cred_over_under: 1; - uint64_t i_ii_xn_req_cred_over_under: 1; - uint64_t i_rsvd3 : 6; - uint64_t i_ii_xn_invalid_cmd : 1; - uint64_t i_xn_ii_invalid_cmd : 1; - uint64_t i_rsvd4 : 30; - } ii_iwel_fld_s; -} ii_iwel_u_t; - -/************************************************************************ - * * - * Controls the II wrapper. * - * * - ************************************************************************/ - -typedef union ii_iwc_u { - uint64_t ii_iwc_regval; - struct { - uint64_t i_dma_byte_swap : 1; - uint64_t i_rsvd : 3; - uint64_t i_cam_read_lines_reset : 1; - uint64_t i_rsvd1 : 3; - uint64_t i_ii_xn_cred_over_under_log: 1; - uint64_t i_rsvd2 : 19; - uint64_t i_xn_rep_iq_depth : 5; - uint64_t i_rsvd3 : 3; - uint64_t i_xn_req_iq_depth : 5; - uint64_t i_rsvd4 : 3; - uint64_t i_iiq_depth : 6; - uint64_t i_rsvd5 : 12; - uint64_t i_force_rep_cred : 1; - uint64_t i_force_req_cred : 1; - } ii_iwc_fld_s; -} ii_iwc_u_t; - -/************************************************************************ - * * - * Status in the II wrapper. * - * * - ************************************************************************/ - -typedef union ii_iws_u { - uint64_t ii_iws_regval; - struct { - uint64_t i_xn_rep_iq_credits : 5; - uint64_t i_rsvd : 3; - uint64_t i_xn_req_iq_credits : 5; - uint64_t i_rsvd1 : 51; - } ii_iws_fld_s; -} ii_iws_u_t; - -/************************************************************************ - * * - * Masks errors in the IWEL register. * - * * - ************************************************************************/ - -typedef union ii_iweim_u { - uint64_t ii_iweim_regval; - struct { - uint64_t i_intr_timed_out : 1; - uint64_t i_rsvd : 7; - uint64_t i_cam_overflow : 1; - uint64_t i_cam_read_miss : 1; - uint64_t i_rsvd1 : 2; - uint64_t i_ioq_rep_underflow : 1; - uint64_t i_ioq_req_underflow : 1; - uint64_t i_ioq_rep_overflow : 1; - uint64_t i_ioq_req_overflow : 1; - uint64_t i_iiq_rep_overflow : 1; - uint64_t i_iiq_req_overflow : 1; - uint64_t i_rsvd2 : 6; - uint64_t i_ii_xn_rep_cred_overflow : 1; - uint64_t i_ii_xn_req_cred_overflow : 1; - uint64_t i_rsvd3 : 6; - uint64_t i_ii_xn_invalid_cmd : 1; - uint64_t i_xn_ii_invalid_cmd : 1; - uint64_t i_rsvd4 : 30; - } ii_iweim_fld_s; -} ii_iweim_u_t; - - -/************************************************************************ - * * - * A write to this register causes a particular field in the * - * corresponding widget's PRB entry to be adjusted up or down by 1. * - * This counter should be used when recovering from error and reset * - * conditions. Note that software would be capable of causing * - * inadvertent overflow or underflow of these counters. * - * * - ************************************************************************/ - -typedef union ii_ipca_u { - uint64_t ii_ipca_regval; - struct { - uint64_t i_wid : 4; - uint64_t i_adjust : 1; - uint64_t i_rsvd_1 : 3; - uint64_t i_field : 2; - uint64_t i_rsvd : 54; - } ii_ipca_fld_s; -} ii_ipca_u_t; - - -/************************************************************************ - * * - * There are 8 instances of this register. This register contains * - * the information that the II has to remember once it has launched a * - * PIO Read operation. The contents are used to form the correct * - * Router Network packet and direct the Crosstalk reply to the * - * appropriate processor. * - * * - ************************************************************************/ - - -typedef union ii_iprte0a_u { - uint64_t ii_iprte0a_regval; - struct { - uint64_t i_rsvd_1 : 54; - uint64_t i_widget : 4; - uint64_t i_to_cnt : 5; - uint64_t i_vld : 1; - } ii_iprte0a_fld_s; -} ii_iprte0a_u_t; - - -/************************************************************************ - * * - * There are 8 instances of this register. This register contains * - * the information that the II has to remember once it has launched a * - * PIO Read operation. The contents are used to form the correct * - * Router Network packet and direct the Crosstalk reply to the * - * appropriate processor. * - * * - ************************************************************************/ - -typedef union ii_iprte1a_u { - uint64_t ii_iprte1a_regval; - struct { - uint64_t i_rsvd_1 : 54; - uint64_t i_widget : 4; - uint64_t i_to_cnt : 5; - uint64_t i_vld : 1; - } ii_iprte1a_fld_s; -} ii_iprte1a_u_t; - - -/************************************************************************ - * * - * There are 8 instances of this register. This register contains * - * the information that the II has to remember once it has launched a * - * PIO Read operation. The contents are used to form the correct * - * Router Network packet and direct the Crosstalk reply to the * - * appropriate processor. * - * * - ************************************************************************/ - -typedef union ii_iprte2a_u { - uint64_t ii_iprte2a_regval; - struct { - uint64_t i_rsvd_1 : 54; - uint64_t i_widget : 4; - uint64_t i_to_cnt : 5; - uint64_t i_vld : 1; - } ii_iprte2a_fld_s; -} ii_iprte2a_u_t; - - -/************************************************************************ - * * - * There are 8 instances of this register. This register contains * - * the information that the II has to remember once it has launched a * - * PIO Read operation. The contents are used to form the correct * - * Router Network packet and direct the Crosstalk reply to the * - * appropriate processor. * - * * - ************************************************************************/ - -typedef union ii_iprte3a_u { - uint64_t ii_iprte3a_regval; - struct { - uint64_t i_rsvd_1 : 54; - uint64_t i_widget : 4; - uint64_t i_to_cnt : 5; - uint64_t i_vld : 1; - } ii_iprte3a_fld_s; -} ii_iprte3a_u_t; - - -/************************************************************************ - * * - * There are 8 instances of this register. This register contains * - * the information that the II has to remember once it has launched a * - * PIO Read operation. The contents are used to form the correct * - * Router Network packet and direct the Crosstalk reply to the * - * appropriate processor. * - * * - ************************************************************************/ - -typedef union ii_iprte4a_u { - uint64_t ii_iprte4a_regval; - struct { - uint64_t i_rsvd_1 : 54; - uint64_t i_widget : 4; - uint64_t i_to_cnt : 5; - uint64_t i_vld : 1; - } ii_iprte4a_fld_s; -} ii_iprte4a_u_t; - - -/************************************************************************ - * * - * There are 8 instances of this register. This register contains * - * the information that the II has to remember once it has launched a * - * PIO Read operation. The contents are used to form the correct * - * Router Network packet and direct the Crosstalk reply to the * - * appropriate processor. * - * * - ************************************************************************/ - -typedef union ii_iprte5a_u { - uint64_t ii_iprte5a_regval; - struct { - uint64_t i_rsvd_1 : 54; - uint64_t i_widget : 4; - uint64_t i_to_cnt : 5; - uint64_t i_vld : 1; - } ii_iprte5a_fld_s; -} ii_iprte5a_u_t; - - -/************************************************************************ - * * - * There are 8 instances of this register. This register contains * - * the information that the II has to remember once it has launched a * - * PIO Read operation. The contents are used to form the correct * - * Router Network packet and direct the Crosstalk reply to the * - * appropriate processor. * - * * - ************************************************************************/ - -typedef union ii_iprte6a_u { - uint64_t ii_iprte6a_regval; - struct { - uint64_t i_rsvd_1 : 54; - uint64_t i_widget : 4; - uint64_t i_to_cnt : 5; - uint64_t i_vld : 1; - } ii_iprte6a_fld_s; -} ii_iprte6a_u_t; - - -/************************************************************************ - * * - * There are 8 instances of this register. This register contains * - * the information that the II has to remember once it has launched a * - * PIO Read operation. The contents are used to form the correct * - * Router Network packet and direct the Crosstalk reply to the * - * appropriate processor. * - * * - ************************************************************************/ - -typedef union ii_iprte7a_u { - uint64_t ii_iprte7a_regval; - struct { - uint64_t i_rsvd_1 : 54; - uint64_t i_widget : 4; - uint64_t i_to_cnt : 5; - uint64_t i_vld : 1; - } ii_iprtea7_fld_s; -} ii_iprte7a_u_t; - - - -/************************************************************************ - * * - * There are 8 instances of this register. This register contains * - * the information that the II has to remember once it has launched a * - * PIO Read operation. The contents are used to form the correct * - * Router Network packet and direct the Crosstalk reply to the * - * appropriate processor. * - * * - ************************************************************************/ - - -typedef union ii_iprte0b_u { - uint64_t ii_iprte0b_regval; - struct { - uint64_t i_rsvd_1 : 3; - uint64_t i_address : 47; - uint64_t i_init : 3; - uint64_t i_source : 11; - } ii_iprte0b_fld_s; -} ii_iprte0b_u_t; - - -/************************************************************************ - * * - * There are 8 instances of this register. This register contains * - * the information that the II has to remember once it has launched a * - * PIO Read operation. The contents are used to form the correct * - * Router Network packet and direct the Crosstalk reply to the * - * appropriate processor. * - * * - ************************************************************************/ - -typedef union ii_iprte1b_u { - uint64_t ii_iprte1b_regval; - struct { - uint64_t i_rsvd_1 : 3; - uint64_t i_address : 47; - uint64_t i_init : 3; - uint64_t i_source : 11; - } ii_iprte1b_fld_s; -} ii_iprte1b_u_t; - - -/************************************************************************ - * * - * There are 8 instances of this register. This register contains * - * the information that the II has to remember once it has launched a * - * PIO Read operation. The contents are used to form the correct * - * Router Network packet and direct the Crosstalk reply to the * - * appropriate processor. * - * * - ************************************************************************/ - -typedef union ii_iprte2b_u { - uint64_t ii_iprte2b_regval; - struct { - uint64_t i_rsvd_1 : 3; - uint64_t i_address : 47; - uint64_t i_init : 3; - uint64_t i_source : 11; - } ii_iprte2b_fld_s; -} ii_iprte2b_u_t; - - -/************************************************************************ - * * - * There are 8 instances of this register. This register contains * - * the information that the II has to remember once it has launched a * - * PIO Read operation. The contents are used to form the correct * - * Router Network packet and direct the Crosstalk reply to the * - * appropriate processor. * - * * - ************************************************************************/ - -typedef union ii_iprte3b_u { - uint64_t ii_iprte3b_regval; - struct { - uint64_t i_rsvd_1 : 3; - uint64_t i_address : 47; - uint64_t i_init : 3; - uint64_t i_source : 11; - } ii_iprte3b_fld_s; -} ii_iprte3b_u_t; - - -/************************************************************************ - * * - * There are 8 instances of this register. This register contains * - * the information that the II has to remember once it has launched a * - * PIO Read operation. The contents are used to form the correct * - * Router Network packet and direct the Crosstalk reply to the * - * appropriate processor. * - * * - ************************************************************************/ - -typedef union ii_iprte4b_u { - uint64_t ii_iprte4b_regval; - struct { - uint64_t i_rsvd_1 : 3; - uint64_t i_address : 47; - uint64_t i_init : 3; - uint64_t i_source : 11; - } ii_iprte4b_fld_s; -} ii_iprte4b_u_t; - - -/************************************************************************ - * * - * There are 8 instances of this register. This register contains * - * the information that the II has to remember once it has launched a * - * PIO Read operation. The contents are used to form the correct * - * Router Network packet and direct the Crosstalk reply to the * - * appropriate processor. * - * * - ************************************************************************/ - -typedef union ii_iprte5b_u { - uint64_t ii_iprte5b_regval; - struct { - uint64_t i_rsvd_1 : 3; - uint64_t i_address : 47; - uint64_t i_init : 3; - uint64_t i_source : 11; - } ii_iprte5b_fld_s; -} ii_iprte5b_u_t; - - -/************************************************************************ - * * - * There are 8 instances of this register. This register contains * - * the information that the II has to remember once it has launched a * - * PIO Read operation. The contents are used to form the correct * - * Router Network packet and direct the Crosstalk reply to the * - * appropriate processor. * - * * - ************************************************************************/ - -typedef union ii_iprte6b_u { - uint64_t ii_iprte6b_regval; - struct { - uint64_t i_rsvd_1 : 3; - uint64_t i_address : 47; - uint64_t i_init : 3; - uint64_t i_source : 11; - - } ii_iprte6b_fld_s; -} ii_iprte6b_u_t; - - -/************************************************************************ - * * - * There are 8 instances of this register. This register contains * - * the information that the II has to remember once it has launched a * - * PIO Read operation. The contents are used to form the correct * - * Router Network packet and direct the Crosstalk reply to the * - * appropriate processor. * - * * - ************************************************************************/ - -typedef union ii_iprte7b_u { - uint64_t ii_iprte7b_regval; - struct { - uint64_t i_rsvd_1 : 3; - uint64_t i_address : 47; - uint64_t i_init : 3; - uint64_t i_source : 11; - } ii_iprte7b_fld_s; -} ii_iprte7b_u_t; - - -/************************************************************************ - * * - * Description: SHub II contains a feature which did not exist in * - * the Hub which automatically cleans up after a Read Response * - * timeout, including deallocation of the IPRTE and recovery of IBuf * - * space. The inclusion of this register in SHub is for backward * - * compatibility * - * A write to this register causes an entry from the table of * - * outstanding PIO Read Requests to be freed and returned to the * - * stack of free entries. This register is used in handling the * - * timeout errors that result in a PIO Reply never returning from * - * Crosstalk. * - * Note that this register does not affect the contents of the IPRTE * - * registers. The Valid bits in those registers have to be * - * specifically turned off by software. * - * * - ************************************************************************/ - -typedef union ii_ipdr_u { - uint64_t ii_ipdr_regval; - struct { - uint64_t i_te : 3; - uint64_t i_rsvd_1 : 1; - uint64_t i_pnd : 1; - uint64_t i_init_rpcnt : 1; - uint64_t i_rsvd : 58; - } ii_ipdr_fld_s; -} ii_ipdr_u_t; - - -/************************************************************************ - * * - * A write to this register causes a CRB entry to be returned to the * - * queue of free CRBs. The entry should have previously been cleared * - * (mark bit) via backdoor access to the pertinent CRB entry. This * - * register is used in the last step of handling the errors that are * - * captured and marked in CRB entries. Briefly: 1) first error for * - * DMA write from a particular device, and first error for a * - * particular BTE stream, lead to a marked CRB entry, and processor * - * interrupt, 2) software reads the error information captured in the * - * CRB entry, and presumably takes some corrective action, 3) * - * software clears the mark bit, and finally 4) software writes to * - * the ICDR register to return the CRB entry to the list of free CRB * - * entries. * - * * - ************************************************************************/ - -typedef union ii_icdr_u { - uint64_t ii_icdr_regval; - struct { - uint64_t i_crb_num : 4; - uint64_t i_pnd : 1; - uint64_t i_rsvd : 59; - } ii_icdr_fld_s; -} ii_icdr_u_t; - - -/************************************************************************ - * * - * This register provides debug access to two FIFOs inside of II. * - * Both IOQ_MAX* fields of this register contain the instantaneous * - * depth (in units of the number of available entries) of the * - * associated IOQ FIFO. A read of this register will return the * - * number of free entries on each FIFO at the time of the read. So * - * when a FIFO is idle, the associated field contains the maximum * - * depth of the FIFO. This register is writable for debug reasons * - * and is intended to be written with the maximum desired FIFO depth * - * while the FIFO is idle. Software must assure that II is idle when * - * this register is written. If there are any active entries in any * - * of these FIFOs when this register is written, the results are * - * undefined. * - * * - ************************************************************************/ - -typedef union ii_ifdr_u { - uint64_t ii_ifdr_regval; - struct { - uint64_t i_ioq_max_rq : 7; - uint64_t i_set_ioq_rq : 1; - uint64_t i_ioq_max_rp : 7; - uint64_t i_set_ioq_rp : 1; - uint64_t i_rsvd : 48; - } ii_ifdr_fld_s; -} ii_ifdr_u_t; - - -/************************************************************************ - * * - * This register allows the II to become sluggish in removing * - * messages from its inbound queue (IIQ). This will cause messages to * - * back up in either virtual channel. Disabling the "molasses" mode * - * subsequently allows the II to be tested under stress. In the * - * sluggish ("Molasses") mode, the localized effects of congestion * - * can be observed. * - * * - ************************************************************************/ - -typedef union ii_iiap_u { - uint64_t ii_iiap_regval; - struct { - uint64_t i_rq_mls : 6; - uint64_t i_rsvd_1 : 2; - uint64_t i_rp_mls : 6; - uint64_t i_rsvd : 50; - } ii_iiap_fld_s; -} ii_iiap_u_t; - - -/************************************************************************ - * * - * This register allows several parameters of CRB operation to be * - * set. Note that writing to this register can have catastrophic side * - * effects, if the CRB is not quiescent, i.e. if the CRB is * - * processing protocol messages when the write occurs. * - * * - ************************************************************************/ - -typedef union ii_icmr_u { - uint64_t ii_icmr_regval; - struct { - uint64_t i_sp_msg : 1; - uint64_t i_rd_hdr : 1; - uint64_t i_rsvd_4 : 2; - uint64_t i_c_cnt : 4; - uint64_t i_rsvd_3 : 4; - uint64_t i_clr_rqpd : 1; - uint64_t i_clr_rppd : 1; - uint64_t i_rsvd_2 : 2; - uint64_t i_fc_cnt : 4; - uint64_t i_crb_vld : 15; - uint64_t i_crb_mark : 15; - uint64_t i_rsvd_1 : 2; - uint64_t i_precise : 1; - uint64_t i_rsvd : 11; - } ii_icmr_fld_s; -} ii_icmr_u_t; - - -/************************************************************************ - * * - * This register allows control of the table portion of the CRB * - * logic via software. Control operations from this register have * - * priority over all incoming Crosstalk or BTE requests. * - * * - ************************************************************************/ - -typedef union ii_iccr_u { - uint64_t ii_iccr_regval; - struct { - uint64_t i_crb_num : 4; - uint64_t i_rsvd_1 : 4; - uint64_t i_cmd : 8; - uint64_t i_pending : 1; - uint64_t i_rsvd : 47; - } ii_iccr_fld_s; -} ii_iccr_u_t; - - -/************************************************************************ - * * - * This register allows the maximum timeout value to be programmed. * - * * - ************************************************************************/ - -typedef union ii_icto_u { - uint64_t ii_icto_regval; - struct { - uint64_t i_timeout : 8; - uint64_t i_rsvd : 56; - } ii_icto_fld_s; -} ii_icto_u_t; - - -/************************************************************************ - * * - * This register allows the timeout prescalar to be programmed. An * - * internal counter is associated with this register. When the * - * internal counter reaches the value of the PRESCALE field, the * - * timer registers in all valid CRBs are incremented (CRBx_D[TIMEOUT] * - * field). The internal counter resets to zero, and then continues * - * counting. * - * * - ************************************************************************/ - -typedef union ii_ictp_u { - uint64_t ii_ictp_regval; - struct { - uint64_t i_prescale : 24; - uint64_t i_rsvd : 40; - } ii_ictp_fld_s; -} ii_ictp_u_t; - - -/************************************************************************ - * * - * Description: There are 15 CRB Entries (ICRB0 to ICRBE) that are * - * used for Crosstalk operations (both cacheline and partial * - * operations) or BTE/IO. Because the CRB entries are very wide, five * - * registers (_A to _E) are required to read and write each entry. * - * The CRB Entry registers can be conceptualized as rows and columns * - * (illustrated in the table above). Each row contains the 4 * - * registers required for a single CRB Entry. The first doubleword * - * (column) for each entry is labeled A, and the second doubleword * - * (higher address) is labeled B, the third doubleword is labeled C, * - * the fourth doubleword is labeled D and the fifth doubleword is * - * labeled E. All CRB entries have their addresses on a quarter * - * cacheline aligned boundary. * - * Upon reset, only the following fields are initialized: valid * - * (VLD), priority count, timeout, timeout valid, and context valid. * - * All other bits should be cleared by software before use (after * - * recovering any potential error state from before the reset). * - * The following four tables summarize the format for the four * - * registers that are used for each ICRB# Entry. * - * * - ************************************************************************/ - -typedef union ii_icrb0_a_u { - uint64_t ii_icrb0_a_regval; - struct { - uint64_t ia_iow : 1; - uint64_t ia_vld : 1; - uint64_t ia_addr : 47; - uint64_t ia_tnum : 5; - uint64_t ia_sidn : 4; - uint64_t ia_rsvd : 6; - } ii_icrb0_a_fld_s; -} ii_icrb0_a_u_t; - - -/************************************************************************ - * * - * Description: There are 15 CRB Entries (ICRB0 to ICRBE) that are * - * used for Crosstalk operations (both cacheline and partial * - * operations) or BTE/IO. Because the CRB entries are very wide, five * - * registers (_A to _E) are required to read and write each entry. * - * * - ************************************************************************/ - -typedef union ii_icrb0_b_u { - uint64_t ii_icrb0_b_regval; - struct { - uint64_t ib_xt_err : 1; - uint64_t ib_mark : 1; - uint64_t ib_ln_uce : 1; - uint64_t ib_errcode : 3; - uint64_t ib_error : 1; - uint64_t ib_stall__bte_1 : 1; - uint64_t ib_stall__bte_0 : 1; - uint64_t ib_stall__intr : 1; - uint64_t ib_stall_ib : 1; - uint64_t ib_intvn : 1; - uint64_t ib_wb : 1; - uint64_t ib_hold : 1; - uint64_t ib_ack : 1; - uint64_t ib_resp : 1; - uint64_t ib_ack_cnt : 11; - uint64_t ib_rsvd : 7; - uint64_t ib_exc : 5; - uint64_t ib_init : 3; - uint64_t ib_imsg : 8; - uint64_t ib_imsgtype : 2; - uint64_t ib_use_old : 1; - uint64_t ib_rsvd_1 : 11; - } ii_icrb0_b_fld_s; -} ii_icrb0_b_u_t; - - -/************************************************************************ - * * - * Description: There are 15 CRB Entries (ICRB0 to ICRBE) that are * - * used for Crosstalk operations (both cacheline and partial * - * operations) or BTE/IO. Because the CRB entries are very wide, five * - * registers (_A to _E) are required to read and write each entry. * - * * - ************************************************************************/ - -typedef union ii_icrb0_c_u { - uint64_t ii_icrb0_c_regval; - struct { - uint64_t ic_source : 15; - uint64_t ic_size : 2; - uint64_t ic_ct : 1; - uint64_t ic_bte_num : 1; - uint64_t ic_gbr : 1; - uint64_t ic_resprqd : 1; - uint64_t ic_bo : 1; - uint64_t ic_suppl : 15; - uint64_t ic_rsvd : 27; - } ii_icrb0_c_fld_s; -} ii_icrb0_c_u_t; - - -/************************************************************************ - * * - * Description: There are 15 CRB Entries (ICRB0 to ICRBE) that are * - * used for Crosstalk operations (both cacheline and partial * - * operations) or BTE/IO. Because the CRB entries are very wide, five * - * registers (_A to _E) are required to read and write each entry. * - * * - ************************************************************************/ - -typedef union ii_icrb0_d_u { - uint64_t ii_icrb0_d_regval; - struct { - uint64_t id_pa_be : 43; - uint64_t id_bte_op : 1; - uint64_t id_pr_psc : 4; - uint64_t id_pr_cnt : 4; - uint64_t id_sleep : 1; - uint64_t id_rsvd : 11; - } ii_icrb0_d_fld_s; -} ii_icrb0_d_u_t; - - -/************************************************************************ - * * - * Description: There are 15 CRB Entries (ICRB0 to ICRBE) that are * - * used for Crosstalk operations (both cacheline and partial * - * operations) or BTE/IO. Because the CRB entries are very wide, five * - * registers (_A to _E) are required to read and write each entry. * - * * - ************************************************************************/ - -typedef union ii_icrb0_e_u { - uint64_t ii_icrb0_e_regval; - struct { - uint64_t ie_timeout : 8; - uint64_t ie_context : 15; - uint64_t ie_rsvd : 1; - uint64_t ie_tvld : 1; - uint64_t ie_cvld : 1; - uint64_t ie_rsvd_0 : 38; - } ii_icrb0_e_fld_s; -} ii_icrb0_e_u_t; - - -/************************************************************************ - * * - * This register contains the lower 64 bits of the header of the * - * spurious message captured by II. Valid when the SP_MSG bit in ICMR * - * register is set. * - * * - ************************************************************************/ - -typedef union ii_icsml_u { - uint64_t ii_icsml_regval; - struct { - uint64_t i_tt_addr : 47; - uint64_t i_newsuppl_ex : 14; - uint64_t i_reserved : 2; - uint64_t i_overflow : 1; - } ii_icsml_fld_s; -} ii_icsml_u_t; - - -/************************************************************************ - * * - * This register contains the middle 64 bits of the header of the * - * spurious message captured by II. Valid when the SP_MSG bit in ICMR * - * register is set. * - * * - ************************************************************************/ - -typedef union ii_icsmm_u { - uint64_t ii_icsmm_regval; - struct { - uint64_t i_tt_ack_cnt : 11; - uint64_t i_reserved : 53; - } ii_icsmm_fld_s; -} ii_icsmm_u_t; - - -/************************************************************************ - * * - * This register contains the microscopic state, all the inputs to * - * the protocol table, captured with the spurious message. Valid when * - * the SP_MSG bit in the ICMR register is set. * - * * - ************************************************************************/ - -typedef union ii_icsmh_u { - uint64_t ii_icsmh_regval; - struct { - uint64_t i_tt_vld : 1; - uint64_t i_xerr : 1; - uint64_t i_ft_cwact_o : 1; - uint64_t i_ft_wact_o : 1; - uint64_t i_ft_active_o : 1; - uint64_t i_sync : 1; - uint64_t i_mnusg : 1; - uint64_t i_mnusz : 1; - uint64_t i_plusz : 1; - uint64_t i_plusg : 1; - uint64_t i_tt_exc : 5; - uint64_t i_tt_wb : 1; - uint64_t i_tt_hold : 1; - uint64_t i_tt_ack : 1; - uint64_t i_tt_resp : 1; - uint64_t i_tt_intvn : 1; - uint64_t i_g_stall_bte1 : 1; - uint64_t i_g_stall_bte0 : 1; - uint64_t i_g_stall_il : 1; - uint64_t i_g_stall_ib : 1; - uint64_t i_tt_imsg : 8; - uint64_t i_tt_imsgtype : 2; - uint64_t i_tt_use_old : 1; - uint64_t i_tt_respreqd : 1; - uint64_t i_tt_bte_num : 1; - uint64_t i_cbn : 1; - uint64_t i_match : 1; - uint64_t i_rpcnt_lt_34 : 1; - uint64_t i_rpcnt_ge_34 : 1; - uint64_t i_rpcnt_lt_18 : 1; - uint64_t i_rpcnt_ge_18 : 1; - uint64_t i_rpcnt_lt_2 : 1; - uint64_t i_rpcnt_ge_2 : 1; - uint64_t i_rqcnt_lt_18 : 1; - uint64_t i_rqcnt_ge_18 : 1; - uint64_t i_rqcnt_lt_2 : 1; - uint64_t i_rqcnt_ge_2 : 1; - uint64_t i_tt_device : 7; - uint64_t i_tt_init : 3; - uint64_t i_reserved : 5; - } ii_icsmh_fld_s; -} ii_icsmh_u_t; - - -/************************************************************************ - * * - * The Shub DEBUG unit provides a 3-bit selection signal to the * - * II core and a 3-bit selection signal to the fsbclk domain in the II * - * wrapper. * - * * - ************************************************************************/ - -typedef union ii_idbss_u { - uint64_t ii_idbss_regval; - struct { - uint64_t i_iioclk_core_submenu : 3; - uint64_t i_rsvd : 5; - uint64_t i_fsbclk_wrapper_submenu : 3; - uint64_t i_rsvd_1 : 5; - uint64_t i_iioclk_menu : 5; - uint64_t i_rsvd_2 : 43; - } ii_idbss_fld_s; -} ii_idbss_u_t; - - -/************************************************************************ - * * - * Description: This register is used to set up the length for a * - * transfer and then to monitor the progress of that transfer. This * - * register needs to be initialized before a transfer is started. A * - * legitimate write to this register will set the Busy bit, clear the * - * Error bit, and initialize the length to the value desired. * - * While the transfer is in progress, hardware will decrement the * - * length field with each successful block that is copied. Once the * - * transfer completes, hardware will clear the Busy bit. The length * - * field will also contain the number of cache lines left to be * - * transferred. * - * * - ************************************************************************/ - -typedef union ii_ibls0_u { - uint64_t ii_ibls0_regval; - struct { - uint64_t i_length : 16; - uint64_t i_error : 1; - uint64_t i_rsvd_1 : 3; - uint64_t i_busy : 1; - uint64_t i_rsvd : 43; - } ii_ibls0_fld_s; -} ii_ibls0_u_t; - - -/************************************************************************ - * * - * This register should be loaded before a transfer is started. The * - * address to be loaded in bits 39:0 is the 40-bit TRex+ physical * - * address as described in Section 1.3, Figure2 and Figure3. Since * - * the bottom 7 bits of the address are always taken to be zero, BTE * - * transfers are always cacheline-aligned. * - * * - ************************************************************************/ - -typedef union ii_ibsa0_u { - uint64_t ii_ibsa0_regval; - struct { - uint64_t i_rsvd_1 : 7; - uint64_t i_addr : 42; - uint64_t i_rsvd : 15; - } ii_ibsa0_fld_s; -} ii_ibsa0_u_t; - - -/************************************************************************ - * * - * This register should be loaded before a transfer is started. The * - * address to be loaded in bits 39:0 is the 40-bit TRex+ physical * - * address as described in Section 1.3, Figure2 and Figure3. Since * - * the bottom 7 bits of the address are always taken to be zero, BTE * - * transfers are always cacheline-aligned. * - * * - ************************************************************************/ - -typedef union ii_ibda0_u { - uint64_t ii_ibda0_regval; - struct { - uint64_t i_rsvd_1 : 7; - uint64_t i_addr : 42; - uint64_t i_rsvd : 15; - } ii_ibda0_fld_s; -} ii_ibda0_u_t; - - -/************************************************************************ - * * - * Writing to this register sets up the attributes of the transfer * - * and initiates the transfer operation. Reading this register has * - * the side effect of terminating any transfer in progress. Note: * - * stopping a transfer midstream could have an adverse impact on the * - * other BTE. If a BTE stream has to be stopped (due to error * - * handling for example), both BTE streams should be stopped and * - * their transfers discarded. * - * * - ************************************************************************/ - -typedef union ii_ibct0_u { - uint64_t ii_ibct0_regval; - struct { - uint64_t i_zerofill : 1; - uint64_t i_rsvd_2 : 3; - uint64_t i_notify : 1; - uint64_t i_rsvd_1 : 3; - uint64_t i_poison : 1; - uint64_t i_rsvd : 55; - } ii_ibct0_fld_s; -} ii_ibct0_u_t; - - -/************************************************************************ - * * - * This register contains the address to which the WINV is sent. * - * This address has to be cache line aligned. * - * * - ************************************************************************/ - -typedef union ii_ibna0_u { - uint64_t ii_ibna0_regval; - struct { - uint64_t i_rsvd_1 : 7; - uint64_t i_addr : 42; - uint64_t i_rsvd : 15; - } ii_ibna0_fld_s; -} ii_ibna0_u_t; - - -/************************************************************************ - * * - * This register contains the programmable level as well as the node * - * ID and PI unit of the processor to which the interrupt will be * - * sent. * - * * - ************************************************************************/ - -typedef union ii_ibia0_u { - uint64_t ii_ibia0_regval; - struct { - uint64_t i_rsvd_2 : 1; - uint64_t i_node_id : 11; - uint64_t i_rsvd_1 : 4; - uint64_t i_level : 7; - uint64_t i_rsvd : 41; - } ii_ibia0_fld_s; -} ii_ibia0_u_t; - - -/************************************************************************ - * * - * Description: This register is used to set up the length for a * - * transfer and then to monitor the progress of that transfer. This * - * register needs to be initialized before a transfer is started. A * - * legitimate write to this register will set the Busy bit, clear the * - * Error bit, and initialize the length to the value desired. * - * While the transfer is in progress, hardware will decrement the * - * length field with each successful block that is copied. Once the * - * transfer completes, hardware will clear the Busy bit. The length * - * field will also contain the number of cache lines left to be * - * transferred. * - * * - ************************************************************************/ - -typedef union ii_ibls1_u { - uint64_t ii_ibls1_regval; - struct { - uint64_t i_length : 16; - uint64_t i_error : 1; - uint64_t i_rsvd_1 : 3; - uint64_t i_busy : 1; - uint64_t i_rsvd : 43; - } ii_ibls1_fld_s; -} ii_ibls1_u_t; - - -/************************************************************************ - * * - * This register should be loaded before a transfer is started. The * - * address to be loaded in bits 39:0 is the 40-bit TRex+ physical * - * address as described in Section 1.3, Figure2 and Figure3. Since * - * the bottom 7 bits of the address are always taken to be zero, BTE * - * transfers are always cacheline-aligned. * - * * - ************************************************************************/ - -typedef union ii_ibsa1_u { - uint64_t ii_ibsa1_regval; - struct { - uint64_t i_rsvd_1 : 7; - uint64_t i_addr : 33; - uint64_t i_rsvd : 24; - } ii_ibsa1_fld_s; -} ii_ibsa1_u_t; - - -/************************************************************************ - * * - * This register should be loaded before a transfer is started. The * - * address to be loaded in bits 39:0 is the 40-bit TRex+ physical * - * address as described in Section 1.3, Figure2 and Figure3. Since * - * the bottom 7 bits of the address are always taken to be zero, BTE * - * transfers are always cacheline-aligned. * - * * - ************************************************************************/ - -typedef union ii_ibda1_u { - uint64_t ii_ibda1_regval; - struct { - uint64_t i_rsvd_1 : 7; - uint64_t i_addr : 33; - uint64_t i_rsvd : 24; - } ii_ibda1_fld_s; -} ii_ibda1_u_t; - - -/************************************************************************ - * * - * Writing to this register sets up the attributes of the transfer * - * and initiates the transfer operation. Reading this register has * - * the side effect of terminating any transfer in progress. Note: * - * stopping a transfer midstream could have an adverse impact on the * - * other BTE. If a BTE stream has to be stopped (due to error * - * handling for example), both BTE streams should be stopped and * - * their transfers discarded. * - * * - ************************************************************************/ - -typedef union ii_ibct1_u { - uint64_t ii_ibct1_regval; - struct { - uint64_t i_zerofill : 1; - uint64_t i_rsvd_2 : 3; - uint64_t i_notify : 1; - uint64_t i_rsvd_1 : 3; - uint64_t i_poison : 1; - uint64_t i_rsvd : 55; - } ii_ibct1_fld_s; -} ii_ibct1_u_t; - - -/************************************************************************ - * * - * This register contains the address to which the WINV is sent. * - * This address has to be cache line aligned. * - * * - ************************************************************************/ - -typedef union ii_ibna1_u { - uint64_t ii_ibna1_regval; - struct { - uint64_t i_rsvd_1 : 7; - uint64_t i_addr : 33; - uint64_t i_rsvd : 24; - } ii_ibna1_fld_s; -} ii_ibna1_u_t; - - -/************************************************************************ - * * - * This register contains the programmable level as well as the node * - * ID and PI unit of the processor to which the interrupt will be * - * sent. * - * * - ************************************************************************/ - -typedef union ii_ibia1_u { - uint64_t ii_ibia1_regval; - struct { - uint64_t i_pi_id : 1; - uint64_t i_node_id : 8; - uint64_t i_rsvd_1 : 7; - uint64_t i_level : 7; - uint64_t i_rsvd : 41; - } ii_ibia1_fld_s; -} ii_ibia1_u_t; - - -/************************************************************************ - * * - * This register defines the resources that feed information into * - * the two performance counters located in the IO Performance * - * Profiling Register. There are 17 different quantities that can be * - * measured. Given these 17 different options, the two performance * - * counters have 15 of them in common; menu selections 0 through 0xE * - * are identical for each performance counter. As for the other two * - * options, one is available from one performance counter and the * - * other is available from the other performance counter. Hence, the * - * II supports all 17*16=272 possible combinations of quantities to * - * measure. * - * * - ************************************************************************/ - -typedef union ii_ipcr_u { - uint64_t ii_ipcr_regval; - struct { - uint64_t i_ippr0_c : 4; - uint64_t i_ippr1_c : 4; - uint64_t i_icct : 8; - uint64_t i_rsvd : 48; - } ii_ipcr_fld_s; -} ii_ipcr_u_t; - - -/************************************************************************ - * * - * * - * * - ************************************************************************/ - -typedef union ii_ippr_u { - uint64_t ii_ippr_regval; - struct { - uint64_t i_ippr0 : 32; - uint64_t i_ippr1 : 32; - } ii_ippr_fld_s; -} ii_ippr_u_t; - - - -/************************************************************************** - * * - * The following defines which were not formed into structures are * - * probably indentical to another register, and the name of the * - * register is provided against each of these registers. This * - * information needs to be checked carefully * - * * - * IIO_ICRB1_A IIO_ICRB0_A * - * IIO_ICRB1_B IIO_ICRB0_B * - * IIO_ICRB1_C IIO_ICRB0_C * - * IIO_ICRB1_D IIO_ICRB0_D * - * IIO_ICRB1_E IIO_ICRB0_E * - * IIO_ICRB2_A IIO_ICRB0_A * - * IIO_ICRB2_B IIO_ICRB0_B * - * IIO_ICRB2_C IIO_ICRB0_C * - * IIO_ICRB2_D IIO_ICRB0_D * - * IIO_ICRB2_E IIO_ICRB0_E * - * IIO_ICRB3_A IIO_ICRB0_A * - * IIO_ICRB3_B IIO_ICRB0_B * - * IIO_ICRB3_C IIO_ICRB0_C * - * IIO_ICRB3_D IIO_ICRB0_D * - * IIO_ICRB3_E IIO_ICRB0_E * - * IIO_ICRB4_A IIO_ICRB0_A * - * IIO_ICRB4_B IIO_ICRB0_B * - * IIO_ICRB4_C IIO_ICRB0_C * - * IIO_ICRB4_D IIO_ICRB0_D * - * IIO_ICRB4_E IIO_ICRB0_E * - * IIO_ICRB5_A IIO_ICRB0_A * - * IIO_ICRB5_B IIO_ICRB0_B * - * IIO_ICRB5_C IIO_ICRB0_C * - * IIO_ICRB5_D IIO_ICRB0_D * - * IIO_ICRB5_E IIO_ICRB0_E * - * IIO_ICRB6_A IIO_ICRB0_A * - * IIO_ICRB6_B IIO_ICRB0_B * - * IIO_ICRB6_C IIO_ICRB0_C * - * IIO_ICRB6_D IIO_ICRB0_D * - * IIO_ICRB6_E IIO_ICRB0_E * - * IIO_ICRB7_A IIO_ICRB0_A * - * IIO_ICRB7_B IIO_ICRB0_B * - * IIO_ICRB7_C IIO_ICRB0_C * - * IIO_ICRB7_D IIO_ICRB0_D * - * IIO_ICRB7_E IIO_ICRB0_E * - * IIO_ICRB8_A IIO_ICRB0_A * - * IIO_ICRB8_B IIO_ICRB0_B * - * IIO_ICRB8_C IIO_ICRB0_C * - * IIO_ICRB8_D IIO_ICRB0_D * - * IIO_ICRB8_E IIO_ICRB0_E * - * IIO_ICRB9_A IIO_ICRB0_A * - * IIO_ICRB9_B IIO_ICRB0_B * - * IIO_ICRB9_C IIO_ICRB0_C * - * IIO_ICRB9_D IIO_ICRB0_D * - * IIO_ICRB9_E IIO_ICRB0_E * - * IIO_ICRBA_A IIO_ICRB0_A * - * IIO_ICRBA_B IIO_ICRB0_B * - * IIO_ICRBA_C IIO_ICRB0_C * - * IIO_ICRBA_D IIO_ICRB0_D * - * IIO_ICRBA_E IIO_ICRB0_E * - * IIO_ICRBB_A IIO_ICRB0_A * - * IIO_ICRBB_B IIO_ICRB0_B * - * IIO_ICRBB_C IIO_ICRB0_C * - * IIO_ICRBB_D IIO_ICRB0_D * - * IIO_ICRBB_E IIO_ICRB0_E * - * IIO_ICRBC_A IIO_ICRB0_A * - * IIO_ICRBC_B IIO_ICRB0_B * - * IIO_ICRBC_C IIO_ICRB0_C * - * IIO_ICRBC_D IIO_ICRB0_D * - * IIO_ICRBC_E IIO_ICRB0_E * - * IIO_ICRBD_A IIO_ICRB0_A * - * IIO_ICRBD_B IIO_ICRB0_B * - * IIO_ICRBD_C IIO_ICRB0_C * - * IIO_ICRBD_D IIO_ICRB0_D * - * IIO_ICRBD_E IIO_ICRB0_E * - * IIO_ICRBE_A IIO_ICRB0_A * - * IIO_ICRBE_B IIO_ICRB0_B * - * IIO_ICRBE_C IIO_ICRB0_C * - * IIO_ICRBE_D IIO_ICRB0_D * - * IIO_ICRBE_E IIO_ICRB0_E * - * * - **************************************************************************/ - - -/* - * Slightly friendlier names for some common registers. - */ -#define IIO_WIDGET IIO_WID /* Widget identification */ -#define IIO_WIDGET_STAT IIO_WSTAT /* Widget status register */ -#define IIO_WIDGET_CTRL IIO_WCR /* Widget control register */ -#define IIO_PROTECT IIO_ILAPR /* IO interface protection */ -#define IIO_PROTECT_OVRRD IIO_ILAPO /* IO protect override */ -#define IIO_OUTWIDGET_ACCESS IIO_IOWA /* Outbound widget access */ -#define IIO_INWIDGET_ACCESS IIO_IIWA /* Inbound widget access */ -#define IIO_INDEV_ERR_MASK IIO_IIDEM /* Inbound device error mask */ -#define IIO_LLP_CSR IIO_ILCSR /* LLP control and status */ -#define IIO_LLP_LOG IIO_ILLR /* LLP log */ -#define IIO_XTALKCC_TOUT IIO_IXCC /* Xtalk credit count timeout*/ -#define IIO_XTALKTT_TOUT IIO_IXTT /* Xtalk tail timeout */ -#define IIO_IO_ERR_CLR IIO_IECLR /* IO error clear */ -#define IIO_IGFX_0 IIO_IGFX0 -#define IIO_IGFX_1 IIO_IGFX1 -#define IIO_IBCT_0 IIO_IBCT0 -#define IIO_IBCT_1 IIO_IBCT1 -#define IIO_IBLS_0 IIO_IBLS0 -#define IIO_IBLS_1 IIO_IBLS1 -#define IIO_IBSA_0 IIO_IBSA0 -#define IIO_IBSA_1 IIO_IBSA1 -#define IIO_IBDA_0 IIO_IBDA0 -#define IIO_IBDA_1 IIO_IBDA1 -#define IIO_IBNA_0 IIO_IBNA0 -#define IIO_IBNA_1 IIO_IBNA1 -#define IIO_IBIA_0 IIO_IBIA0 -#define IIO_IBIA_1 IIO_IBIA1 -#define IIO_IOPRB_0 IIO_IPRB0 - -#define IIO_PRTE_A(_x) (IIO_IPRTE0_A + (8 * (_x))) -#define IIO_PRTE_B(_x) (IIO_IPRTE0_B + (8 * (_x))) -#define IIO_NUM_PRTES 8 /* Total number of PRB table entries */ -#define IIO_WIDPRTE_A(x) IIO_PRTE_A(((x) - 8)) /* widget ID to its PRTE num */ -#define IIO_WIDPRTE_B(x) IIO_PRTE_B(((x) - 8)) /* widget ID to its PRTE num */ - -#define IIO_NUM_IPRBS (9) - -#define IIO_LLP_CSR_IS_UP 0x00002000 -#define IIO_LLP_CSR_LLP_STAT_MASK 0x00003000 -#define IIO_LLP_CSR_LLP_STAT_SHFT 12 - -#define IIO_LLP_CB_MAX 0xffff /* in ILLR CB_CNT, Max Check Bit errors */ -#define IIO_LLP_SN_MAX 0xffff /* in ILLR SN_CNT, Max Sequence Number errors */ - -/* key to IIO_PROTECT_OVRRD */ -#define IIO_PROTECT_OVRRD_KEY 0x53474972756c6573ull /* "SGIrules" */ - -/* BTE register names */ -#define IIO_BTE_STAT_0 IIO_IBLS_0 /* Also BTE length/status 0 */ -#define IIO_BTE_SRC_0 IIO_IBSA_0 /* Also BTE source address 0 */ -#define IIO_BTE_DEST_0 IIO_IBDA_0 /* Also BTE dest. address 0 */ -#define IIO_BTE_CTRL_0 IIO_IBCT_0 /* Also BTE control/terminate 0 */ -#define IIO_BTE_NOTIFY_0 IIO_IBNA_0 /* Also BTE notification 0 */ -#define IIO_BTE_INT_0 IIO_IBIA_0 /* Also BTE interrupt 0 */ -#define IIO_BTE_OFF_0 0 /* Base offset from BTE 0 regs. */ -#define IIO_BTE_OFF_1 (IIO_IBLS_1 - IIO_IBLS_0) /* Offset from base to BTE 1 */ - -/* BTE register offsets from base */ -#define BTEOFF_STAT 0 -#define BTEOFF_SRC (IIO_BTE_SRC_0 - IIO_BTE_STAT_0) -#define BTEOFF_DEST (IIO_BTE_DEST_0 - IIO_BTE_STAT_0) -#define BTEOFF_CTRL (IIO_BTE_CTRL_0 - IIO_BTE_STAT_0) -#define BTEOFF_NOTIFY (IIO_BTE_NOTIFY_0 - IIO_BTE_STAT_0) -#define BTEOFF_INT (IIO_BTE_INT_0 - IIO_BTE_STAT_0) - - -/* names used in shub diags */ -#define IIO_BASE_BTE0 IIO_IBLS_0 -#define IIO_BASE_BTE1 IIO_IBLS_1 - -/* - * Macro which takes the widget number, and returns the - * IO PRB address of that widget. - * value _x is expected to be a widget number in the range - * 0, 8 - 0xF - */ -#define IIO_IOPRB(_x) (IIO_IOPRB_0 + ( ( (_x) < HUB_WIDGET_ID_MIN ? \ - (_x) : \ - (_x) - (HUB_WIDGET_ID_MIN-1)) << 3) ) - - -/* GFX Flow Control Node/Widget Register */ -#define IIO_IGFX_W_NUM_BITS 4 /* size of widget num field */ -#define IIO_IGFX_W_NUM_MASK ((1<> IIO_WSTAT_TXRETRY_SHFT) & \ - IIO_WSTAT_TXRETRY_MASK) - -/* Number of II perf. counters we can multiplex at once */ - -#define IO_PERF_SETS 32 - -/* Bit for the widget in inbound access register */ -#define IIO_IIWA_WIDGET(_w) ((uint64_t)(1ULL << _w)) -/* Bit for the widget in outbound access register */ -#define IIO_IOWA_WIDGET(_w) ((uint64_t)(1ULL << _w)) - -/* NOTE: The following define assumes that we are going to get - * widget numbers from 8 thru F and the device numbers within - * widget from 0 thru 7. - */ -#define IIO_IIDEM_WIDGETDEV_MASK(w, d) ((uint64_t)(1ULL << (8 * ((w) - 8) + (d)))) - -/* IO Interrupt Destination Register */ -#define IIO_IIDSR_SENT_SHIFT 28 -#define IIO_IIDSR_SENT_MASK 0x30000000 -#define IIO_IIDSR_ENB_SHIFT 24 -#define IIO_IIDSR_ENB_MASK 0x01000000 -#define IIO_IIDSR_NODE_SHIFT 9 -#define IIO_IIDSR_NODE_MASK 0x000ff700 -#define IIO_IIDSR_PI_ID_SHIFT 8 -#define IIO_IIDSR_PI_ID_MASK 0x00000100 -#define IIO_IIDSR_LVL_SHIFT 0 -#define IIO_IIDSR_LVL_MASK 0x000000ff - -/* Xtalk timeout threshhold register (IIO_IXTT) */ -#define IXTT_RRSP_TO_SHFT 55 /* read response timeout */ -#define IXTT_RRSP_TO_MASK (0x1FULL << IXTT_RRSP_TO_SHFT) -#define IXTT_RRSP_PS_SHFT 32 /* read responsed TO prescalar */ -#define IXTT_RRSP_PS_MASK (0x7FFFFFULL << IXTT_RRSP_PS_SHFT) -#define IXTT_TAIL_TO_SHFT 0 /* tail timeout counter threshold */ -#define IXTT_TAIL_TO_MASK (0x3FFFFFFULL << IXTT_TAIL_TO_SHFT) - -/* - * The IO LLP control status register and widget control register - */ - -typedef union hubii_wcr_u { - uint64_t wcr_reg_value; - struct { - uint64_t wcr_widget_id: 4, /* LLP crossbar credit */ - wcr_tag_mode: 1, /* Tag mode */ - wcr_rsvd1: 8, /* Reserved */ - wcr_xbar_crd: 3, /* LLP crossbar credit */ - wcr_f_bad_pkt: 1, /* Force bad llp pkt enable */ - wcr_dir_con: 1, /* widget direct connect */ - wcr_e_thresh: 5, /* elasticity threshold */ - wcr_rsvd: 41; /* unused */ - } wcr_fields_s; -} hubii_wcr_t; - -#define iwcr_dir_con wcr_fields_s.wcr_dir_con - -/* The structures below are defined to extract and modify the ii -performance registers */ - -/* io_perf_sel allows the caller to specify what tests will be - performed */ - -typedef union io_perf_sel { - uint64_t perf_sel_reg; - struct { - uint64_t perf_ippr0 : 4, - perf_ippr1 : 4, - perf_icct : 8, - perf_rsvd : 48; - } perf_sel_bits; -} io_perf_sel_t; - -/* io_perf_cnt is to extract the count from the shub registers. Due to - hardware problems there is only one counter, not two. */ - -typedef union io_perf_cnt { - uint64_t perf_cnt; - struct { - uint64_t perf_cnt : 20, - perf_rsvd2 : 12, - perf_rsvd1 : 32; - } perf_cnt_bits; - -} io_perf_cnt_t; - -typedef union iprte_a { - uint64_t entry; - struct { - uint64_t i_rsvd_1 : 3; - uint64_t i_addr : 38; - uint64_t i_init : 3; - uint64_t i_source : 8; - uint64_t i_rsvd : 2; - uint64_t i_widget : 4; - uint64_t i_to_cnt : 5; - uint64_t i_vld : 1; - } iprte_fields; -} iprte_a_t; - -#endif /* _ASM_IA64_SN_SHUBIO_H */ - diff -urN linux-2.6.11-rc3/arch/ia64/sn/kernel/bte.c linux-2.6.11-rc4/arch/ia64/sn/kernel/bte.c --- linux-2.6.11-rc3/arch/ia64/sn/kernel/bte.c 2004-12-24 13:34:58.000000000 -0800 +++ linux-2.6.11-rc4/arch/ia64/sn/kernel/bte.c 2005-02-12 19:50:52.986501894 -0800 @@ -13,7 +13,7 @@ #include #include #include -#include "shubio.h" +#include #include #include diff -urN linux-2.6.11-rc3/arch/ia64/sn/kernel/bte_error.c linux-2.6.11-rc4/arch/ia64/sn/kernel/bte_error.c --- linux-2.6.11-rc3/arch/ia64/sn/kernel/bte_error.c 2005-02-12 19:50:35.365739055 -0800 +++ linux-2.6.11-rc4/arch/ia64/sn/kernel/bte_error.c 2005-02-12 19:50:52.987501938 -0800 @@ -10,7 +10,7 @@ #include #include "ioerror.h" #include -#include "shubio.h" +#include #include #include "xtalk/xwidgetdev.h" #include "xtalk/hubdev.h" diff -urN linux-2.6.11-rc3/arch/ia64/sn/kernel/huberror.c linux-2.6.11-rc4/arch/ia64/sn/kernel/huberror.c --- linux-2.6.11-rc3/arch/ia64/sn/kernel/huberror.c 2004-12-24 13:35:23.000000000 -0800 +++ linux-2.6.11-rc4/arch/ia64/sn/kernel/huberror.c 2005-02-12 19:50:52.988501981 -0800 @@ -13,7 +13,7 @@ #include #include "ioerror.h" #include -#include "shubio.h" +#include #include #include "xtalk/xwidgetdev.h" #include "xtalk/hubdev.h" diff -urN linux-2.6.11-rc3/arch/mips/Kconfig linux-2.6.11-rc4/arch/mips/Kconfig --- linux-2.6.11-rc3/arch/mips/Kconfig 2005-02-12 19:50:35.449742692 -0800 +++ linux-2.6.11-rc4/arch/mips/Kconfig 2005-02-12 19:50:53.069505488 -0800 @@ -456,6 +456,9 @@ config SGI_IP22 bool "Support for SGI IP22 (Indy/Indigo2)" + select ARC + select ARC32 + select BOOT_ELF32 select DMA_NONCOHERENT select IP22_CPU_SCACHE select IRQ_CPU @@ -1171,10 +1174,6 @@ depends on TOSHIBA_JMR3927 || TOSHIBA_RBTX4927 default y -config TANBAC_TB0219 - bool "Added TANBAC TB0219 Base board support" - depends on TANBAC_TB0229 - endmenu menu "CPU selection" diff -urN linux-2.6.11-rc3/arch/mips/configs/ip22_defconfig linux-2.6.11-rc4/arch/mips/configs/ip22_defconfig --- linux-2.6.11-rc3/arch/mips/configs/ip22_defconfig 2005-02-12 19:50:35.516745592 -0800 +++ linux-2.6.11-rc4/arch/mips/configs/ip22_defconfig 2005-02-12 19:50:53.131508172 -0800 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.10-rc2 -# Sun Nov 21 14:11:59 2004 +# Linux kernel version: 2.6.11-rc2 +# Wed Jan 26 02:49:04 2005 # CONFIG_MIPS=y # CONFIG_MIPS64 is not set @@ -86,16 +86,16 @@ # CONFIG_SNI_RM200_PCI is not set # CONFIG_TOSHIBA_RBTX4927 is not set CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_HAVE_DEC_LOCK=y CONFIG_ARC=y CONFIG_DMA_NONCOHERENT=y # CONFIG_CPU_LITTLE_ENDIAN is not set CONFIG_IRQ_CPU=y CONFIG_SWAP_IO_SPACE=y +CONFIG_ARC32=y CONFIG_BOOT_ELF32=y CONFIG_MIPS_L1_CACHE_SHIFT=5 -CONFIG_ARC32=y -# CONFIG_FB is not set CONFIG_ARC_CONSOLE=y CONFIG_ARC_PROMLIB=y @@ -139,6 +139,19 @@ CONFIG_MMU=y # +# PCCARD (PCMCIA/CardBus) support +# +# CONFIG_PCCARD is not set + +# +# PC-card bridges +# + +# +# PCI Hotplug Support +# + +# # Executable file formats # CONFIG_BINFMT_ELF=y @@ -154,6 +167,7 @@ # CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y +# CONFIG_FW_LOADER is not set # # Memory Technology Devices (MTD) @@ -173,9 +187,11 @@ # Block devices # # CONFIG_BLK_DEV_FD is not set +# CONFIG_BLK_DEV_COW_COMMON is not set # CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set +CONFIG_BLK_DEV_RAM_COUNT=16 CONFIG_INITRAMFS_SOURCE="" # CONFIG_LBD is not set CONFIG_CDROM_PKTCDVD=m @@ -189,6 +205,7 @@ CONFIG_IOSCHED_AS=y CONFIG_IOSCHED_DEADLINE=y CONFIG_IOSCHED_CFQ=y +CONFIG_ATA_OVER_ETH=m # # ATA/ATAPI/MFM/RLL support @@ -223,13 +240,13 @@ # CONFIG_SCSI_SPI_ATTRS=m # CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set # # SCSI low-level drivers # CONFIG_SGIWD93_SCSI=y # CONFIG_SCSI_SATA is not set -# CONFIG_SCSI_QLOGIC_1280_1040 is not set # CONFIG_SCSI_DEBUG is not set # @@ -390,8 +407,6 @@ CONFIG_IP_NF_ARPTABLES=m CONFIG_IP_NF_ARPFILTER=m CONFIG_IP_NF_ARP_MANGLE=m -# CONFIG_IP_NF_COMPAT_IPCHAINS is not set -# CONFIG_IP_NF_COMPAT_IPFWADM is not set # # IPv6: Netfilter Configuration @@ -470,6 +485,7 @@ CONFIG_NET_CLS_U32=m # CONFIG_CLS_U32_PERF is not set # CONFIG_NET_CLS_IND is not set +# CONFIG_CLS_U32_MARK is not set CONFIG_NET_CLS_RSVP=m CONFIG_NET_CLS_RSVP6=m # CONFIG_NET_CLS_ACT is not set @@ -560,6 +576,7 @@ CONFIG_SERIO_I8042=y CONFIG_SERIO_SERPORT=y # CONFIG_SERIO_CT82C710 is not set +CONFIG_SERIO_LIBPS2=y CONFIG_SERIO_RAW=m # @@ -626,7 +643,6 @@ # # Ftape, the floppy tape device driver # -# CONFIG_AGP is not set # CONFIG_DRM is not set CONFIG_RAW_DRIVER=m CONFIG_MAX_RAW_DEVS=256 @@ -658,6 +674,7 @@ # # Graphics support # +# CONFIG_FB is not set # # Console display driver support @@ -675,6 +692,7 @@ # CONFIG_LOGO_LINUX_VGA16 is not set # CONFIG_LOGO_LINUX_CLUT224 is not set CONFIG_LOGO_SGI_CLUT224=y +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set # # Sound @@ -688,11 +706,25 @@ # CONFIG_USB_ARCH_HAS_OHCI is not set # +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information +# + +# # USB Gadget Support # # CONFIG_USB_GADGET is not set # +# MMC/SD Card support +# +# CONFIG_MMC is not set + +# +# InfiniBand support +# +# CONFIG_INFINIBAND is not set + +# # File systems # CONFIG_EXT2_FS=m @@ -797,7 +829,7 @@ CONFIG_CIFS=m # CONFIG_CIFS_STATS is not set # CONFIG_CIFS_XATTR is not set -# CONFIG_CIFS_POSIX is not set +# CONFIG_CIFS_EXPERIMENTAL is not set # CONFIG_NCP_FS is not set CONFIG_CODA_FS=m # CONFIG_CODA_FS_OLD_API is not set @@ -868,6 +900,11 @@ CONFIG_NLS_UTF8=m # +# Profiling support +# +# CONFIG_PROFILING is not set + +# # Kernel hacking # # CONFIG_DEBUG_KERNEL is not set @@ -910,10 +947,14 @@ CONFIG_CRYPTO_TEST=m # +# Hardware crypto devices +# + +# # Library routines # # CONFIG_CRC_CCITT is not set -# CONFIG_CRC32 is not set +CONFIG_CRC32=m CONFIG_LIBCRC32C=m CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_DEFLATE=y diff -urN linux-2.6.11-rc3/arch/mips/defconfig linux-2.6.11-rc4/arch/mips/defconfig --- linux-2.6.11-rc3/arch/mips/defconfig 2005-02-12 19:50:35.559747454 -0800 +++ linux-2.6.11-rc4/arch/mips/defconfig 2005-02-12 19:50:53.171509904 -0800 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.10-rc2 -# Sun Nov 21 14:11:54 2004 +# Linux kernel version: 2.6.11-rc2 +# Wed Jan 26 02:48:59 2005 # CONFIG_MIPS=y # CONFIG_MIPS64 is not set @@ -86,16 +86,16 @@ # CONFIG_SNI_RM200_PCI is not set # CONFIG_TOSHIBA_RBTX4927 is not set CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_HAVE_DEC_LOCK=y CONFIG_ARC=y CONFIG_DMA_NONCOHERENT=y # CONFIG_CPU_LITTLE_ENDIAN is not set CONFIG_IRQ_CPU=y CONFIG_SWAP_IO_SPACE=y +CONFIG_ARC32=y CONFIG_BOOT_ELF32=y CONFIG_MIPS_L1_CACHE_SHIFT=5 -CONFIG_ARC32=y -# CONFIG_FB is not set CONFIG_ARC_CONSOLE=y CONFIG_ARC_PROMLIB=y @@ -139,6 +139,19 @@ CONFIG_MMU=y # +# PCCARD (PCMCIA/CardBus) support +# +# CONFIG_PCCARD is not set + +# +# PC-card bridges +# + +# +# PCI Hotplug Support +# + +# # Executable file formats # CONFIG_BINFMT_ELF=y @@ -154,6 +167,7 @@ # CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y +# CONFIG_FW_LOADER is not set # # Memory Technology Devices (MTD) @@ -173,9 +187,11 @@ # Block devices # # CONFIG_BLK_DEV_FD is not set +# CONFIG_BLK_DEV_COW_COMMON is not set # CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set +CONFIG_BLK_DEV_RAM_COUNT=16 CONFIG_INITRAMFS_SOURCE="" # CONFIG_LBD is not set CONFIG_CDROM_PKTCDVD=m @@ -189,6 +205,7 @@ CONFIG_IOSCHED_AS=y CONFIG_IOSCHED_DEADLINE=y CONFIG_IOSCHED_CFQ=y +CONFIG_ATA_OVER_ETH=m # # ATA/ATAPI/MFM/RLL support @@ -223,13 +240,13 @@ # CONFIG_SCSI_SPI_ATTRS=m # CONFIG_SCSI_FC_ATTRS is not set +CONFIG_SCSI_ISCSI_ATTRS=m # # SCSI low-level drivers # CONFIG_SGIWD93_SCSI=y # CONFIG_SCSI_SATA is not set -# CONFIG_SCSI_QLOGIC_1280_1040 is not set # CONFIG_SCSI_DEBUG is not set # @@ -390,8 +407,6 @@ CONFIG_IP_NF_ARPTABLES=m CONFIG_IP_NF_ARPFILTER=m CONFIG_IP_NF_ARP_MANGLE=m -# CONFIG_IP_NF_COMPAT_IPCHAINS is not set -# CONFIG_IP_NF_COMPAT_IPFWADM is not set # # IPv6: Netfilter Configuration @@ -470,6 +485,7 @@ CONFIG_NET_CLS_U32=m # CONFIG_CLS_U32_PERF is not set # CONFIG_NET_CLS_IND is not set +# CONFIG_CLS_U32_MARK is not set CONFIG_NET_CLS_RSVP=m CONFIG_NET_CLS_RSVP6=m # CONFIG_NET_CLS_ACT is not set @@ -560,6 +576,7 @@ CONFIG_SERIO_I8042=y CONFIG_SERIO_SERPORT=y # CONFIG_SERIO_CT82C710 is not set +CONFIG_SERIO_LIBPS2=y CONFIG_SERIO_RAW=m # @@ -626,7 +643,6 @@ # # Ftape, the floppy tape device driver # -# CONFIG_AGP is not set # CONFIG_DRM is not set CONFIG_RAW_DRIVER=m CONFIG_MAX_RAW_DEVS=256 @@ -658,6 +674,7 @@ # # Graphics support # +# CONFIG_FB is not set # # Console display driver support @@ -675,6 +692,7 @@ # CONFIG_LOGO_LINUX_VGA16 is not set # CONFIG_LOGO_LINUX_CLUT224 is not set CONFIG_LOGO_SGI_CLUT224=y +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set # # Sound @@ -688,11 +706,25 @@ # CONFIG_USB_ARCH_HAS_OHCI is not set # +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information +# + +# # USB Gadget Support # # CONFIG_USB_GADGET is not set # +# MMC/SD Card support +# +# CONFIG_MMC is not set + +# +# InfiniBand support +# +# CONFIG_INFINIBAND is not set + +# # File systems # CONFIG_EXT2_FS=m @@ -797,7 +829,7 @@ CONFIG_CIFS=m # CONFIG_CIFS_STATS is not set # CONFIG_CIFS_XATTR is not set -# CONFIG_CIFS_POSIX is not set +# CONFIG_CIFS_EXPERIMENTAL is not set # CONFIG_NCP_FS is not set CONFIG_CODA_FS=m # CONFIG_CODA_FS_OLD_API is not set @@ -868,6 +900,11 @@ CONFIG_NLS_UTF8=m # +# Profiling support +# +# CONFIG_PROFILING is not set + +# # Kernel hacking # # CONFIG_DEBUG_KERNEL is not set @@ -910,10 +947,14 @@ CONFIG_CRYPTO_TEST=m # +# Hardware crypto devices +# + +# # Library routines # # CONFIG_CRC_CCITT is not set -# CONFIG_CRC32 is not set +CONFIG_CRC32=m CONFIG_LIBCRC32C=m CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_DEFLATE=y diff -urN linux-2.6.11-rc3/arch/mips/kernel/linux32.c linux-2.6.11-rc4/arch/mips/kernel/linux32.c --- linux-2.6.11-rc3/arch/mips/kernel/linux32.c 2005-02-12 19:50:35.579748320 -0800 +++ linux-2.6.11-rc4/arch/mips/kernel/linux32.c 2005-02-12 19:50:53.209511549 -0800 @@ -1115,7 +1115,7 @@ err = sys_shmdt ((char *)A(ptr)); break; case SHMGET: - err = sys_shmget (first, second, third); + err = sys_shmget (first, (unsigned)second, third); break; case SHMCTL: err = do_sys32_shmctl (first, second, (void *)AA(ptr)); diff -urN linux-2.6.11-rc3/arch/mips/lib-32/dump_tlb.c linux-2.6.11-rc4/arch/mips/lib-32/dump_tlb.c --- linux-2.6.11-rc3/arch/mips/lib-32/dump_tlb.c 2004-12-24 13:34:57.000000000 -0800 +++ linux-2.6.11-rc4/arch/mips/lib-32/dump_tlb.c 2005-02-12 19:50:53.235512674 -0800 @@ -32,6 +32,8 @@ case PM_256M: return "256Mb"; #endif } + + return "unknown"; } #define BARRIER() \ diff -urN linux-2.6.11-rc3/arch/mips/lib-64/dump_tlb.c linux-2.6.11-rc4/arch/mips/lib-64/dump_tlb.c --- linux-2.6.11-rc3/arch/mips/lib-64/dump_tlb.c 2005-02-12 19:50:35.647751264 -0800 +++ linux-2.6.11-rc4/arch/mips/lib-64/dump_tlb.c 2005-02-12 19:50:53.236512718 -0800 @@ -32,6 +32,8 @@ case PM_256M: return "256Mb"; #endif } + + return "unknown"; } #define BARRIER() \ diff -urN linux-2.6.11-rc3/arch/mips/sgi-ip22/ip22-nvram.c linux-2.6.11-rc4/arch/mips/sgi-ip22/ip22-nvram.c --- linux-2.6.11-rc3/arch/mips/sgi-ip22/ip22-nvram.c 2004-12-24 13:35:00.000000000 -0800 +++ linux-2.6.11-rc4/arch/mips/sgi-ip22/ip22-nvram.c 2005-02-12 19:50:53.324516528 -0800 @@ -26,7 +26,7 @@ #define EEPROM_DATO 0x08 /* Data out */ #define EEPROM_DATI 0x10 /* Data in */ -/* We need to use this functions early... */ +/* We need to use these functions early... */ #define delay() ({ \ int x; \ for (x=0; x<100000; x++) __asm__ __volatile__(""); }) diff -urN linux-2.6.11-rc3/arch/mips/sgi-ip22/ip22-setup.c linux-2.6.11-rc4/arch/mips/sgi-ip22/ip22-setup.c --- linux-2.6.11-rc3/arch/mips/sgi-ip22/ip22-setup.c 2004-12-24 13:33:50.000000000 -0800 +++ linux-2.6.11-rc4/arch/mips/sgi-ip22/ip22-setup.c 2005-02-12 19:50:53.325516571 -0800 @@ -120,9 +120,8 @@ } #endif -#ifdef CONFIG_VT -#ifdef CONFIG_SGI_NEWPORT_CONSOLE - if (ctype && *ctype == 'g'){ +#if defined(CONFIG_VT) && defined(CONFIG_SGI_NEWPORT_CONSOLE) + { ULONG *gfxinfo; ULONG * (*__vec)(void) = (void *) (long) *((_PULONG *)(long)((PROMBLOCK)->pvector + 0x20)); @@ -138,7 +137,6 @@ } } #endif -#endif return 0; } diff -urN linux-2.6.11-rc3/arch/ppc/boot/simple/Makefile linux-2.6.11-rc4/arch/ppc/boot/simple/Makefile --- linux-2.6.11-rc3/arch/ppc/boot/simple/Makefile 2005-02-12 19:50:35.913762780 -0800 +++ linux-2.6.11-rc4/arch/ppc/boot/simple/Makefile 2005-02-12 19:50:53.440521550 -0800 @@ -66,6 +66,12 @@ end-$(CONFIG_EBONY) := ebony entrypoint-$(CONFIG_EBONY) := 0x01000000 + zimage-$(CONFIG_LUAN) := zImage-TREE +zimageinitrd-$(CONFIG_LUAN) := zImage.initrd-TREE + end-$(CONFIG_LUAN) := luan + entrypoint-$(CONFIG_LUAN) := 0x01000000 + extra.o-$(CONFIG_LUAN) := pibs.o + zimage-$(CONFIG_OCOTEA) := zImage-TREE zimageinitrd-$(CONFIG_OCOTEA) := zImage.initrd-TREE end-$(CONFIG_OCOTEA) := ocotea diff -urN linux-2.6.11-rc3/arch/ppc/boot/simple/pibs.c linux-2.6.11-rc4/arch/ppc/boot/simple/pibs.c --- linux-2.6.11-rc3/arch/ppc/boot/simple/pibs.c 2004-12-24 13:34:32.000000000 -0800 +++ linux-2.6.11-rc4/arch/ppc/boot/simple/pibs.c 2005-02-12 19:50:53.451522026 -0800 @@ -1,5 +1,5 @@ /* - * 2004 (c) MontaVista, Software, Inc. This file is licensed under + * 2004-2005 (c) MontaVista, Software, Inc. This file is licensed under * the terms of the GNU General Public License version 2. This program * is licensed "as is" without any warranty of any kind, whether express * or implied. @@ -10,7 +10,7 @@ #include #include #include -#include +#include extern unsigned long decompress_kernel(unsigned long load_addr, int num_words, unsigned long cksum); @@ -89,13 +89,15 @@ decompress_kernel(load_addr, num_words, cksum); - mac64 = simple_strtoull((char *)OCOTEA_PIBS_MAC_BASE, 0, 16); + mac64 = simple_strtoull((char *)PIBS_MAC_BASE, 0, 16); memcpy(hold_residual->bi_enetaddr, (char *)&mac64+2, 6); - mac64 = simple_strtoull((char *)(OCOTEA_PIBS_MAC_BASE+OCOTEA_PIBS_MAC_OFFSET), 0, 16); +#ifdef CONFIG_440GX + mac64 = simple_strtoull((char *)(PIBS_MAC_BASE+PIBS_MAC_OFFSET), 0, 16); memcpy(hold_residual->bi_enet1addr, (char *)&mac64+2, 6); - mac64 = simple_strtoull((char *)(OCOTEA_PIBS_MAC_BASE+OCOTEA_PIBS_MAC_OFFSET*2), 0, 16); + mac64 = simple_strtoull((char *)(PIBS_MAC_BASE+PIBS_MAC_OFFSET*2), 0, 16); memcpy(hold_residual->bi_enet2addr, (char *)&mac64+2, 6); - mac64 = simple_strtoull((char *)(OCOTEA_PIBS_MAC_BASE+OCOTEA_PIBS_MAC_OFFSET*3), 0, 16); + mac64 = simple_strtoull((char *)(PIBS_MAC_BASE+PIBS_MAC_OFFSET*3), 0, 16); memcpy(hold_residual->bi_enet3addr, (char *)&mac64+2, 6); +#endif return (void *)hold_residual; } diff -urN linux-2.6.11-rc3/arch/ppc/configs/luan_defconfig linux-2.6.11-rc4/arch/ppc/configs/luan_defconfig --- linux-2.6.11-rc3/arch/ppc/configs/luan_defconfig 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.6.11-rc4/arch/ppc/configs/luan_defconfig 2005-02-12 19:50:53.464522589 -0800 @@ -0,0 +1,668 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.11-rc2 +# Mon Jan 31 16:26:31 2005 +# +CONFIG_MMU=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_RWSEM_XCHGADD_ALGORITHM=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_HAVE_DEC_LOCK=y +CONFIG_PPC=y +CONFIG_PPC32=y +CONFIG_GENERIC_NVRAM=y + +# +# Code maturity level options +# +CONFIG_EXPERIMENTAL=y +CONFIG_CLEAN_COMPILE=y +CONFIG_BROKEN_ON_SMP=y + +# +# General setup +# +CONFIG_LOCALVERSION="" +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +CONFIG_SYSCTL=y +# CONFIG_AUDIT is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_HOTPLUG is not set +CONFIG_KOBJECT_UEVENT=y +# CONFIG_IKCONFIG is not set +CONFIG_EMBEDDED=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_FUTEX=y +CONFIG_EPOLL=y +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_SHMEM=y +CONFIG_CC_ALIGN_FUNCTIONS=0 +CONFIG_CC_ALIGN_LABELS=0 +CONFIG_CC_ALIGN_LOOPS=0 +CONFIG_CC_ALIGN_JUMPS=0 +# CONFIG_TINY_SHMEM is not set + +# +# Loadable module support +# +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +CONFIG_OBSOLETE_MODPARM=y +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y + +# +# Processor +# +# CONFIG_6xx is not set +# CONFIG_40x is not set +CONFIG_44x=y +# CONFIG_POWER3 is not set +# CONFIG_POWER4 is not set +# CONFIG_8xx is not set +# CONFIG_E500 is not set +CONFIG_BOOKE=y +CONFIG_PTE_64BIT=y +CONFIG_PHYS_64BIT=y +# CONFIG_MATH_EMULATION is not set +# CONFIG_CPU_FREQ is not set +CONFIG_4xx=y + +# +# IBM 4xx options +# +# CONFIG_EBONY is not set +CONFIG_LUAN=y +# CONFIG_OCOTEA is not set +CONFIG_440SP=y +CONFIG_440=y +CONFIG_IBM_OCP=y +CONFIG_IBM_EMAC4=y +# CONFIG_PPC4xx_DMA is not set +CONFIG_PPC_GEN550=y +# CONFIG_PM is not set +CONFIG_NOT_COHERENT_CACHE=y + +# +# Platform options +# +# CONFIG_PC_KEYBOARD is not set +# CONFIG_SMP is not set +# CONFIG_PREEMPT is not set +# CONFIG_HIGHMEM is not set +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_MISC is not set +CONFIG_CMDLINE_BOOL=y +CONFIG_CMDLINE="ip=on console=ttyS0,115200" + +# +# Bus options +# +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +# CONFIG_PCI_LEGACY_PROC is not set +# CONFIG_PCI_NAMES is not set + +# +# PCCARD (PCMCIA/CardBus) support +# +# CONFIG_PCCARD is not set + +# +# PC-card bridges +# + +# +# Advanced setup +# +# CONFIG_ADVANCED_OPTIONS is not set + +# +# Default settings for advanced configuration options are used +# +CONFIG_HIGHMEM_START=0xfe000000 +CONFIG_LOWMEM_SIZE=0x30000000 +CONFIG_KERNEL_START=0xc0000000 +CONFIG_TASK_SIZE=0x80000000 +CONFIG_CONSISTENT_START=0xff100000 +CONFIG_CONSISTENT_SIZE=0x00200000 +CONFIG_BOOT_LOAD=0x01000000 + +# +# Device Drivers +# + +# +# Generic Driver Options +# +# CONFIG_STANDALONE is not set +CONFIG_PREVENT_FIRMWARE_BUILD=y +# CONFIG_FW_LOADER is not set +# CONFIG_DEBUG_DRIVER is not set + +# +# Memory Technology Devices (MTD) +# +# CONFIG_MTD is not set + +# +# Parallel port support +# +# CONFIG_PARPORT is not set + +# +# Plug and Play support +# + +# +# Block devices +# +# CONFIG_BLK_DEV_FD is not set +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +# CONFIG_BLK_DEV_LOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_SX8 is not set +# CONFIG_BLK_DEV_RAM is not set +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_INITRAMFS_SOURCE="" +# CONFIG_LBD is not set +# CONFIG_CDROM_PKTCDVD is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_ATA_OVER_ETH is not set + +# +# ATA/ATAPI/MFM/RLL support +# +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_SCSI is not set + +# +# Multi-device support (RAID and LVM) +# +# CONFIG_MD is not set + +# +# Fusion MPT device support +# + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_IEEE1394 is not set + +# +# I2O device support +# +# CONFIG_I2O is not set + +# +# Macintosh device drivers +# + +# +# Networking support +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +# CONFIG_NETLINK_DEV is not set +CONFIG_UNIX=y +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_PNP=y +# CONFIG_IP_PNP_DHCP is not set +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_IP_TCPDIAG=y +# CONFIG_IP_TCPDIAG_IPV6 is not set + +# +# IP: Virtual Server Configuration +# +# CONFIG_IP_VS is not set +# CONFIG_IPV6 is not set +CONFIG_NETFILTER=y +# CONFIG_NETFILTER_DEBUG is not set + +# +# IP: Netfilter Configuration +# +# CONFIG_IP_NF_CONNTRACK is not set +# CONFIG_IP_NF_CONNTRACK_MARK is not set +# CONFIG_IP_NF_QUEUE is not set +# CONFIG_IP_NF_IPTABLES is not set +# CONFIG_IP_NF_ARPTABLES is not set + +# +# SCTP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_SCTP is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_NET_DIVERT is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set + +# +# QoS and/or fair queueing +# +# CONFIG_NET_SCHED is not set +# CONFIG_NET_CLS_ROUTE is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set + +# +# ARCnet devices +# +# CONFIG_ARCNET is not set + +# +# Ethernet (10 or 100Mbit) +# +CONFIG_NET_ETHERNET=y +# CONFIG_MII is not set +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNGEM is not set +# CONFIG_NET_VENDOR_3COM is not set + +# +# Tulip family network device support +# +# CONFIG_NET_TULIP is not set +# CONFIG_HP100 is not set +CONFIG_IBM_EMAC=y +# CONFIG_IBM_EMAC_ERRMSG is not set +CONFIG_IBM_EMAC_RXB=128 +CONFIG_IBM_EMAC_TXB=128 +CONFIG_IBM_EMAC_FGAP=8 +CONFIG_IBM_EMAC_SKBRES=0 +# CONFIG_NET_PCI is not set + +# +# Ethernet (1000 Mbit) +# +# CONFIG_ACENIC is not set +# CONFIG_DL2K is not set +# CONFIG_E1000 is not set +# CONFIG_NS83820 is not set +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +# CONFIG_R8169 is not set +# CONFIG_SK98LIN is not set +# CONFIG_TIGON3 is not set + +# +# Ethernet (10000 Mbit) +# +# CONFIG_IXGB is not set +# CONFIG_S2IO is not set + +# +# Token Ring devices +# +# CONFIG_TR is not set + +# +# Wireless LAN (non-hamradio) +# +# CONFIG_NET_RADIO is not set + +# +# Wan interfaces +# +# CONFIG_WAN is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_SHAPER is not set +# CONFIG_NETCONSOLE is not set + +# +# ISDN subsystem +# +# CONFIG_ISDN is not set + +# +# Telephony Support +# +# CONFIG_PHONE is not set + +# +# Input device support +# +CONFIG_INPUT=y + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_TSDEV is not set +# CONFIG_INPUT_EVDEV is not set +# CONFIG_INPUT_EVBUG is not set + +# +# Input I/O drivers +# +# CONFIG_GAMEPORT is not set +CONFIG_SOUND_GAMEPORT=y +CONFIG_SERIO=y +# CONFIG_SERIO_I8042 is not set +# CONFIG_SERIO_SERPORT is not set +# CONFIG_SERIO_CT82C710 is not set +# CONFIG_SERIO_PCIPS2 is not set +# CONFIG_SERIO_LIBPS2 is not set +# CONFIG_SERIO_RAW is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Character devices +# +# CONFIG_VT is not set +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_NR_UARTS=4 +CONFIG_SERIAL_8250_EXTENDED=y +# CONFIG_SERIAL_8250_MANY_PORTS is not set +CONFIG_SERIAL_8250_SHARE_IRQ=y +# CONFIG_SERIAL_8250_DETECT_IRQ is not set +# CONFIG_SERIAL_8250_MULTIPORT is not set +# CONFIG_SERIAL_8250_RSA is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 + +# +# IPMI +# +# CONFIG_IPMI_HANDLER is not set + +# +# Watchdog Cards +# +# CONFIG_WATCHDOG is not set +# CONFIG_NVRAM is not set +# CONFIG_GEN_RTC is not set +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set + +# +# Ftape, the floppy tape device driver +# +# CONFIG_AGP is not set +# CONFIG_DRM is not set +# CONFIG_RAW_DRIVER is not set + +# +# I2C support +# +# CONFIG_I2C is not set + +# +# Dallas's 1-wire bus +# +# CONFIG_W1 is not set + +# +# Misc devices +# + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set + +# +# Digital Video Broadcasting Devices +# +# CONFIG_DVB is not set + +# +# Graphics support +# +# CONFIG_FB is not set + +# +# Sound +# +# CONFIG_SOUND is not set + +# +# USB support +# +# CONFIG_USB is not set +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information +# + +# +# USB Gadget Support +# +# CONFIG_USB_GADGET is not set + +# +# MMC/SD Card support +# +# CONFIG_MMC is not set + +# +# InfiniBand support +# +# CONFIG_INFINIBAND is not set + +# +# File systems +# +# CONFIG_EXT2_FS is not set +# CONFIG_EXT3_FS is not set +# CONFIG_JBD is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_XFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_QUOTA is not set +CONFIG_DNOTIFY=y +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +# CONFIG_MSDOS_FS is not set +# CONFIG_VFAT_FS is not set +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_KCORE=y +CONFIG_SYSFS=y +# CONFIG_DEVFS_FS is not set +# CONFIG_DEVPTS_FS_XATTR is not set +# CONFIG_TMPFS is not set +# CONFIG_HUGETLB_PAGE is not set +CONFIG_RAMFS=y + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Network File Systems +# +CONFIG_NFS_FS=y +# CONFIG_NFS_V3 is not set +# CONFIG_NFS_V4 is not set +# CONFIG_NFS_DIRECTIO is not set +# CONFIG_NFSD is not set +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +# CONFIG_EXPORTFS is not set +CONFIG_SUNRPC=y +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y + +# +# Native Language Support +# +# CONFIG_NLS is not set + +# +# Library routines +# +# CONFIG_CRC_CCITT is not set +CONFIG_CRC32=y +# CONFIG_LIBCRC32C is not set + +# +# Profiling support +# +# CONFIG_PROFILING is not set + +# +# Kernel hacking +# +CONFIG_DEBUG_KERNEL=y +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_SCHEDSTATS is not set +# CONFIG_DEBUG_SLAB is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_FS is not set +# CONFIG_KGDB is not set +# CONFIG_XMON is not set +CONFIG_BDI_SWITCH=y +# CONFIG_SERIAL_TEXT_DEBUG is not set +CONFIG_PPC_OCP=y + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set + +# +# Cryptographic options +# +# CONFIG_CRYPTO is not set + +# +# Hardware crypto devices +# diff -urN linux-2.6.11-rc3/arch/ppc/kernel/head_44x.S linux-2.6.11-rc4/arch/ppc/kernel/head_44x.S --- linux-2.6.11-rc3/arch/ppc/kernel/head_44x.S 2005-02-12 19:50:35.950764382 -0800 +++ linux-2.6.11-rc4/arch/ppc/kernel/head_44x.S 2005-02-12 19:50:53.492523801 -0800 @@ -21,7 +21,7 @@ * Author: MontaVista Software, Inc. * frank_rowand@mvista.com or source@mvista.com * debbie_chu@mvista.com - * Copyright 2002-2004 MontaVista Software, Inc. + * Copyright 2002-2005 MontaVista Software, Inc. * PowerPC 44x support, Matt Porter * * This program is free software; you can redistribute it and/or modify it @@ -185,11 +185,11 @@ * are used for polled operation. */ /* pageid fields */ - lis r3,0xe000 + lis r3,UART0_IO_BASE@h ori r3,r3,PPC44x_TLB_VALID | PPC44x_TLB_256M /* xlat fields */ - lis r4,0x4000 /* RPN is 0x40000000 */ + lis r4,UART0_PHYS_IO_BASE@h /* RPN depends on SoC */ ori r4,r4,0x0001 /* ERPN is 1 for second 4GB page */ /* attrib fields */ diff -urN linux-2.6.11-rc3/arch/ppc/lib/locks.c linux-2.6.11-rc4/arch/ppc/lib/locks.c --- linux-2.6.11-rc3/arch/ppc/lib/locks.c 2004-12-24 13:34:26.000000000 -0800 +++ linux-2.6.11-rc4/arch/ppc/lib/locks.c 2005-02-12 19:50:53.513524710 -0800 @@ -91,44 +91,57 @@ } EXPORT_SYMBOL(_raw_spin_unlock); - /* - * Just like x86, implement read-write locks as a 32-bit counter - * with the high bit (sign) being the "write" bit. - * -- Cort + * For rwlocks, zero is unlocked, -1 is write-locked, + * positive is read-locked. */ +static __inline__ int __read_trylock(rwlock_t *rw) +{ + signed int tmp; + + __asm__ __volatile__( +"2: lwarx %0,0,%1 # __read_trylock\n\ + addic. %0,%0,1\n\ + ble- 1f\n" + PPC405_ERR77(0,%1) +" stwcx. %0,0,%1\n\ + bne- 2b\n\ + isync\n\ +1:" + : "=&r"(tmp) + : "r"(&rw->lock) + : "cr0", "memory"); + + return tmp; +} + +int _raw_read_trylock(rwlock_t *rw) +{ + return __read_trylock(rw) > 0; +} +EXPORT_SYMBOL(_raw_read_trylock); + void _raw_read_lock(rwlock_t *rw) { - unsigned long stuck = INIT_STUCK; - int cpu = smp_processor_id(); + unsigned int stuck; -again: - /* get our read lock in there */ - atomic_inc((atomic_t *) &(rw)->lock); - if ( (signed long)((rw)->lock) < 0) /* someone has a write lock */ - { - /* turn off our read lock */ - atomic_dec((atomic_t *) &(rw)->lock); - /* wait for the write lock to go away */ - while ((signed long)((rw)->lock) < 0) - { - if(!--stuck) - { - printk("_read_lock(%p) CPU#%d\n", rw, cpu); + while (__read_trylock(rw) <= 0) { + stuck = INIT_STUCK; + while (!read_can_lock(rw)) { + if (--stuck == 0) { + printk("_read_lock(%p) CPU#%d lock %d\n", + rw, _smp_processor_id(), rw->lock); stuck = INIT_STUCK; } } - /* try to get the read lock again */ - goto again; } - wmb(); } EXPORT_SYMBOL(_raw_read_lock); void _raw_read_unlock(rwlock_t *rw) { if ( rw->lock == 0 ) - printk("_read_unlock(): %s/%d (nip %08lX) lock %lx\n", + printk("_read_unlock(): %s/%d (nip %08lX) lock %d\n", current->comm,current->pid,current->thread.regs->nip, rw->lock); wmb(); @@ -138,40 +151,17 @@ void _raw_write_lock(rwlock_t *rw) { - unsigned long stuck = INIT_STUCK; - int cpu = smp_processor_id(); + unsigned int stuck; -again: - if ( test_and_set_bit(31,&(rw)->lock) ) /* someone has a write lock */ - { - while ( (rw)->lock & (1<<31) ) /* wait for write lock */ - { - if(!--stuck) - { - printk("write_lock(%p) CPU#%d lock %lx)\n", - rw, cpu,rw->lock); + while (cmpxchg(&rw->lock, 0, -1) != 0) { + stuck = INIT_STUCK; + while (!write_can_lock(rw)) { + if (--stuck == 0) { + printk("write_lock(%p) CPU#%d lock %d)\n", + rw, _smp_processor_id(), rw->lock); stuck = INIT_STUCK; } - barrier(); } - goto again; - } - - if ( (rw)->lock & ~(1<<31)) /* someone has a read lock */ - { - /* clear our write lock and wait for reads to go away */ - clear_bit(31,&(rw)->lock); - while ( (rw)->lock & ~(1<<31) ) - { - if(!--stuck) - { - printk("write_lock(%p) 2 CPU#%d lock %lx)\n", - rw, cpu,rw->lock); - stuck = INIT_STUCK; - } - barrier(); - } - goto again; } wmb(); } @@ -179,14 +169,8 @@ int _raw_write_trylock(rwlock_t *rw) { - if (test_and_set_bit(31, &(rw)->lock)) /* someone has a write lock */ - return 0; - - if ((rw)->lock & ~(1<<31)) { /* someone has a read lock */ - /* clear our write lock and wait for reads to go away */ - clear_bit(31,&(rw)->lock); + if (cmpxchg(&rw->lock, 0, -1) != 0) return 0; - } wmb(); return 1; } @@ -194,12 +178,12 @@ void _raw_write_unlock(rwlock_t *rw) { - if ( !(rw->lock & (1<<31)) ) - printk("_write_lock(): %s/%d (nip %08lX) lock %lx\n", + if (rw->lock >= 0) + printk("_write_lock(): %s/%d (nip %08lX) lock %d\n", current->comm,current->pid,current->thread.regs->nip, rw->lock); wmb(); - clear_bit(31,&(rw)->lock); + rw->lock = 0; } EXPORT_SYMBOL(_raw_write_unlock); diff -urN linux-2.6.11-rc3/arch/ppc/platforms/4xx/Kconfig linux-2.6.11-rc4/arch/ppc/platforms/4xx/Kconfig --- linux-2.6.11-rc3/arch/ppc/platforms/4xx/Kconfig 2004-12-24 13:34:00.000000000 -0800 +++ linux-2.6.11-rc4/arch/ppc/platforms/4xx/Kconfig 2005-02-12 19:50:53.534525619 -0800 @@ -73,6 +73,11 @@ help This option enables support for the IBM PPC440GP evaluation board. +config LUAN + bool "Luan" + help + This option enables support for the IBM PPC440SP evaluation board. + config OCOTEA bool "Ocotea" help @@ -103,9 +108,14 @@ depends on OCOTEA default y +config 440SP + bool + depends on LUAN + default y + config 440 bool - depends on 440GP + depends on 440GP || 440SP default y config 440A @@ -132,7 +142,7 @@ config IBM_OCP bool - depends on ASH || BUBINGA || CPCI405 || EBONY || EP405 || OCOTEA || REDWOOD_5 || REDWOOD_6 || SYCAMORE || WALNUT + depends on ASH || BUBINGA || CPCI405 || EBONY || EP405 || LUAN || OCOTEA || REDWOOD_5 || REDWOOD_6 || SYCAMORE || WALNUT default y config XILINX_OCP @@ -142,7 +152,7 @@ config IBM_EMAC4 bool - depends on 440GX + depends on 440GX || 440SP default y config BIOS_FIXUP diff -urN linux-2.6.11-rc3/arch/ppc/platforms/4xx/Makefile linux-2.6.11-rc4/arch/ppc/platforms/4xx/Makefile --- linux-2.6.11-rc3/arch/ppc/platforms/4xx/Makefile 2004-12-24 13:35:27.000000000 -0800 +++ linux-2.6.11-rc4/arch/ppc/platforms/4xx/Makefile 2005-02-12 19:50:53.534525619 -0800 @@ -6,6 +6,7 @@ obj-$(CONFIG_EBONY) += ebony.o obj-$(CONFIG_EP405) += ep405.o obj-$(CONFIG_BUBINGA) += bubinga.o +obj-$(CONFIG_LUAN) += luan.o obj-$(CONFIG_OAK) += oak.o obj-$(CONFIG_OCOTEA) += ocotea.o obj-$(CONFIG_REDWOOD_5) += redwood5.o @@ -20,6 +21,7 @@ obj-$(CONFIG_REDWOOD_6) += ibmstbx25.o obj-$(CONFIG_440GP) += ibm440gp.o obj-$(CONFIG_440GX) += ibm440gx.o +obj-$(CONFIG_440SP) += ibm440sp.o obj-$(CONFIG_405EP) += ibm405ep.o obj-$(CONFIG_405GPR) += ibm405gpr.o obj-$(CONFIG_VIRTEX_II_PRO) += virtex-ii_pro.o diff -urN linux-2.6.11-rc3/arch/ppc/platforms/4xx/ebony.c linux-2.6.11-rc4/arch/ppc/platforms/4xx/ebony.c --- linux-2.6.11-rc3/arch/ppc/platforms/4xx/ebony.c 2005-02-12 19:50:35.984765854 -0800 +++ linux-2.6.11-rc4/arch/ppc/platforms/4xx/ebony.c 2005-02-12 19:50:53.542525966 -0800 @@ -4,7 +4,7 @@ * Ebony board specific routines * * Matt Porter - * Copyright 2002-2004 MontaVista Software Inc. + * Copyright 2002-2005 MontaVista Software Inc. * * Eugene Surovegin or * Copyright (c) 2003, 2004 Zultys Technologies @@ -140,7 +140,7 @@ { void *pcix_reg_base; - pcix_reg_base = ioremap64(PCIX0_REG_BASE, PCIX0_REG_SIZE); + pcix_reg_base = ioremap64(PCIX0_REG_BASE, PCIX_REG_SIZE); /* Disable all windows */ PCIX_WRITEL(0, PCIX0_POM0SA); diff -urN linux-2.6.11-rc3/arch/ppc/platforms/4xx/ibm440sp.c linux-2.6.11-rc4/arch/ppc/platforms/4xx/ibm440sp.c --- linux-2.6.11-rc3/arch/ppc/platforms/4xx/ibm440sp.c 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.6.11-rc4/arch/ppc/platforms/4xx/ibm440sp.c 2005-02-12 19:50:53.546526139 -0800 @@ -0,0 +1,131 @@ +/* + * arch/ppc/platforms/4xx/ibm440sp.c + * + * PPC440SP I/O descriptions + * + * Matt Porter + * Copyright 2002-2005 MontaVista Software Inc. + * + * Eugene Surovegin or + * Copyright (c) 2003, 2004 Zultys Technologies + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + */ +#include +#include +#include +#include + +static struct ocp_func_emac_data ibm440sp_emac0_def = { + .rgmii_idx = -1, /* No RGMII */ + .rgmii_mux = -1, /* No RGMII */ + .zmii_idx = -1, /* No ZMII */ + .zmii_mux = -1, /* No ZMII */ + .mal_idx = 0, /* MAL device index */ + .mal_rx_chan = 0, /* MAL rx channel number */ + .mal_tx_chan = 0, /* MAL tx channel number */ + .wol_irq = 61, /* WOL interrupt number */ + .mdio_idx = -1, /* No shared MDIO */ + .tah_idx = -1, /* No TAH */ + .jumbo = 1, /* Jumbo frames supported */ +}; +OCP_SYSFS_EMAC_DATA() + +static struct ocp_func_mal_data ibm440sp_mal0_def = { + .num_tx_chans = 4, /* Number of TX channels */ + .num_rx_chans = 4, /* Number of RX channels */ + .txeob_irq = 38, /* TX End Of Buffer IRQ */ + .rxeob_irq = 39, /* RX End Of Buffer IRQ */ + .txde_irq = 34, /* TX Descriptor Error IRQ */ + .rxde_irq = 35, /* RX Descriptor Error IRQ */ + .serr_irq = 33, /* MAL System Error IRQ */ +}; +OCP_SYSFS_MAL_DATA() + +static struct ocp_func_iic_data ibm440sp_iic0_def = { + .fast_mode = 0, /* Use standad mode (100Khz) */ +}; + +static struct ocp_func_iic_data ibm440sp_iic1_def = { + .fast_mode = 0, /* Use standad mode (100Khz) */ +}; +OCP_SYSFS_IIC_DATA() + +struct ocp_def core_ocp[] = { + { .vendor = OCP_VENDOR_IBM, + .function = OCP_FUNC_OPB, + .index = 0, + .paddr = 0x0000000140000000ULL, + .irq = OCP_IRQ_NA, + .pm = OCP_CPM_NA, + }, + { .vendor = OCP_VENDOR_IBM, + .function = OCP_FUNC_16550, + .index = 0, + .paddr = PPC440SP_UART0_ADDR, + .irq = UART0_INT, + .pm = IBM_CPM_UART0, + }, + { .vendor = OCP_VENDOR_IBM, + .function = OCP_FUNC_16550, + .index = 1, + .paddr = PPC440SP_UART1_ADDR, + .irq = UART1_INT, + .pm = IBM_CPM_UART1, + }, + { .vendor = OCP_VENDOR_IBM, + .function = OCP_FUNC_16550, + .index = 2, + .paddr = PPC440SP_UART2_ADDR, + .irq = UART2_INT, + .pm = IBM_CPM_UART2, + }, + { .vendor = OCP_VENDOR_IBM, + .function = OCP_FUNC_IIC, + .index = 0, + .paddr = 0x00000001f0000400ULL, + .irq = 2, + .pm = IBM_CPM_IIC0, + .additions = &ibm440sp_iic0_def, + .show = &ocp_show_iic_data + }, + { .vendor = OCP_VENDOR_IBM, + .function = OCP_FUNC_IIC, + .index = 1, + .paddr = 0x00000001f0000500ULL, + .irq = 3, + .pm = IBM_CPM_IIC1, + .additions = &ibm440sp_iic1_def, + .show = &ocp_show_iic_data + }, + { .vendor = OCP_VENDOR_IBM, + .function = OCP_FUNC_GPIO, + .index = 0, + .paddr = 0x00000001f0000700ULL, + .irq = OCP_IRQ_NA, + .pm = IBM_CPM_GPIO0, + }, + { .vendor = OCP_VENDOR_IBM, + .function = OCP_FUNC_MAL, + .paddr = OCP_PADDR_NA, + .irq = OCP_IRQ_NA, + .pm = OCP_CPM_NA, + .additions = &ibm440sp_mal0_def, + .show = &ocp_show_mal_data, + }, + { .vendor = OCP_VENDOR_IBM, + .function = OCP_FUNC_EMAC, + .index = 0, + .paddr = 0x00000001f0000800ULL, + .irq = 60, + .pm = OCP_CPM_NA, + .additions = &ibm440sp_emac0_def, + .show = &ocp_show_emac_data, + }, + { .vendor = OCP_VENDOR_INVALID + } +}; diff -urN linux-2.6.11-rc3/arch/ppc/platforms/4xx/ibm440sp.h linux-2.6.11-rc4/arch/ppc/platforms/4xx/ibm440sp.h --- linux-2.6.11-rc3/arch/ppc/platforms/4xx/ibm440sp.h 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.6.11-rc4/arch/ppc/platforms/4xx/ibm440sp.h 2005-02-12 19:50:53.546526139 -0800 @@ -0,0 +1,64 @@ +/* + * arch/ppc/platforms/4xx/ibm440sp.h + * + * PPC440SP definitions + * + * Matt Porter + * + * Copyright 2004-2005 MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#ifdef __KERNEL__ +#ifndef __PPC_PLATFORMS_IBM440SP_H +#define __PPC_PLATFORMS_IBM440SP_H + +#include + +#include + +/* UART */ +#define PPC440SP_UART0_ADDR 0x00000001f0000200ULL +#define PPC440SP_UART1_ADDR 0x00000001f0000300ULL +#define PPC440SP_UART2_ADDR 0x00000001f0000600ULL +#define UART0_INT 0 +#define UART1_INT 1 +#define UART2_INT 2 + +/* Clock and Power Management */ +#define IBM_CPM_IIC0 0x80000000 /* IIC interface */ +#define IBM_CPM_IIC1 0x40000000 /* IIC interface */ +#define IBM_CPM_PCI 0x20000000 /* PCI bridge */ +#define IBM_CPM_CPU 0x02000000 /* processor core */ +#define IBM_CPM_DMA 0x01000000 /* DMA controller */ +#define IBM_CPM_BGO 0x00800000 /* PLB to OPB bus arbiter */ +#define IBM_CPM_BGI 0x00400000 /* OPB to PLB bridge */ +#define IBM_CPM_EBC 0x00200000 /* External Bux Controller */ +#define IBM_CPM_EBM 0x00100000 /* Ext Bus Master Interface */ +#define IBM_CPM_DMC 0x00080000 /* SDRAM peripheral controller */ +#define IBM_CPM_PLB 0x00040000 /* PLB bus arbiter */ +#define IBM_CPM_SRAM 0x00020000 /* SRAM memory controller */ +#define IBM_CPM_PPM 0x00002000 /* PLB Performance Monitor */ +#define IBM_CPM_UIC1 0x00001000 /* Universal Interrupt Controller */ +#define IBM_CPM_GPIO0 0x00000800 /* General Purpose IO (??) */ +#define IBM_CPM_GPT 0x00000400 /* General Purpose Timers */ +#define IBM_CPM_UART0 0x00000200 /* serial port 0 */ +#define IBM_CPM_UART1 0x00000100 /* serial port 1 */ +#define IBM_CPM_UART2 0x00000100 /* serial port 1 */ +#define IBM_CPM_UIC0 0x00000080 /* Universal Interrupt Controller */ +#define IBM_CPM_TMRCLK 0x00000040 /* CPU timers */ +#define IBM_CPM_EMAC0 0x00000020 /* EMAC 0 */ + +#define DFLT_IBM4xx_PM ~(IBM_CPM_UIC | IBM_CPM_UIC1 | IBM_CPM_CPU \ + | IBM_CPM_EBC | IBM_CPM_SRAM | IBM_CPM_BGO \ + | IBM_CPM_EBM | IBM_CPM_PLB | IBM_CPM_OPB \ + | IBM_CPM_TMRCLK | IBM_CPM_DMA | IBM_CPM_PCI \ + | IBM_CPM_TAHOE0 | IBM_CPM_TAHOE1 \ + | IBM_CPM_EMAC0 | IBM_CPM_EMAC1 \ + | IBM_CPM_EMAC2 | IBM_CPM_EMAC3 ) +#endif /* __PPC_PLATFORMS_IBM440SP_H */ +#endif /* __KERNEL__ */ diff -urN linux-2.6.11-rc3/arch/ppc/platforms/4xx/luan.c linux-2.6.11-rc4/arch/ppc/platforms/4xx/luan.c --- linux-2.6.11-rc3/arch/ppc/platforms/4xx/luan.c 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.6.11-rc4/arch/ppc/platforms/4xx/luan.c 2005-02-12 19:50:53.549526269 -0800 @@ -0,0 +1,387 @@ +/* + * arch/ppc/platforms/4xx/luan.c + * + * Luan board specific routines + * + * Matt Porter + * + * Copyright 2004-2005 MontaVista Software Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +/* + * This is a horrible kludge, we eventually need to abstract this + * generic PHY stuff, so the standard phy mode defines can be + * easily used from arch code. + */ +#include "../../../../drivers/net/ibm_emac/ibm_emac_phy.h" + +bd_t __res; + +static struct ibm44x_clocks clocks __initdata; + +static void __init +luan_calibrate_decr(void) +{ + unsigned int freq; + + if (mfspr(SPRN_CCR1) & CCR1_TCS) + freq = LUAN_TMR_CLK; + else + freq = clocks.cpu; + + ibm44x_calibrate_decr(freq); +} + +static int +luan_show_cpuinfo(struct seq_file *m) +{ + seq_printf(m, "vendor\t\t: IBM\n"); + seq_printf(m, "machine\t\t: PPC440SP EVB (Luan)\n"); + + return 0; +} + +static inline int +luan_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) +{ + struct pci_controller *hose = pci_bus_to_hose(dev->bus->number); + + /* PCIX0 in adapter mode, no host interrupt routing */ + + /* PCIX1 */ + if (hose->index == 0) { + static char pci_irq_table[][4] = + /* + * PCI IDSEL/INTPIN->INTLINE + * A B C D + */ + { + { 49, 49, 49, 49 }, /* IDSEL 1 - PCIX1 Slot 0 */ + { 49, 49, 49, 49 }, /* IDSEL 2 - PCIX1 Slot 1 */ + { 49, 49, 49, 49 }, /* IDSEL 3 - PCIX1 Slot 2 */ + { 49, 49, 49, 49 }, /* IDSEL 4 - PCIX1 Slot 3 */ + }; + const long min_idsel = 1, max_idsel = 4, irqs_per_slot = 4; + return PCI_IRQ_TABLE_LOOKUP; + /* PCIX2 */ + } else if (hose->index == 1) { + static char pci_irq_table[][4] = + /* + * PCI IDSEL/INTPIN->INTLINE + * A B C D + */ + { + { 50, 50, 50, 50 }, /* IDSEL 1 - PCIX2 Slot 0 */ + { 50, 50, 50, 50 }, /* IDSEL 2 - PCIX2 Slot 1 */ + { 50, 50, 50, 50 }, /* IDSEL 3 - PCIX2 Slot 2 */ + { 50, 50, 50, 50 }, /* IDSEL 4 - PCIX2 Slot 3 */ + }; + const long min_idsel = 1, max_idsel = 4, irqs_per_slot = 4; + return PCI_IRQ_TABLE_LOOKUP; + } + return -1; +} + +static void __init luan_set_emacdata(void) +{ + struct ocp_def *def; + struct ocp_func_emac_data *emacdata; + + /* Set phy_map, phy_mode, and mac_addr for the EMAC */ + def = ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, 0); + emacdata = def->additions; + emacdata->phy_map = 0x00000001; /* Skip 0x00 */ + emacdata->phy_mode = PHY_MODE_GMII; + memcpy(emacdata->mac_addr, __res.bi_enetaddr, 6); +} + +#define PCIX_READW(offset) \ + (readw((void *)((u32)pcix_reg_base+offset))) + +#define PCIX_WRITEW(value, offset) \ + (writew(value, (void *)((u32)pcix_reg_base+offset))) + +#define PCIX_WRITEL(value, offset) \ + (writel(value, (void *)((u32)pcix_reg_base+offset))) + +static void __init +luan_setup_pcix(void) +{ + int i; + void *pcix_reg_base; + + for (i=0;i<3;i++) { + pcix_reg_base = ioremap64(PCIX0_REG_BASE + i*PCIX_REG_OFFSET, PCIX_REG_SIZE); + + /* Enable PCIX0 I/O, Mem, and Busmaster cycles */ + PCIX_WRITEW(PCIX_READW(PCIX0_COMMAND) | PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER, PCIX0_COMMAND); + + /* Disable all windows */ + PCIX_WRITEL(0, PCIX0_POM0SA); + PCIX_WRITEL(0, PCIX0_POM1SA); + PCIX_WRITEL(0, PCIX0_POM2SA); + PCIX_WRITEL(0, PCIX0_PIM0SA); + PCIX_WRITEL(0, PCIX0_PIM0SAH); + PCIX_WRITEL(0, PCIX0_PIM1SA); + PCIX_WRITEL(0, PCIX0_PIM2SA); + PCIX_WRITEL(0, PCIX0_PIM2SAH); + + /* + * Setup 512MB PLB->PCI outbound mem window + * (a_n000_0000->0_n000_0000) + * */ + PCIX_WRITEL(0x0000000a, PCIX0_POM0LAH); + PCIX_WRITEL(0x80000000 | i*LUAN_PCIX_MEM_SIZE, PCIX0_POM0LAL); + PCIX_WRITEL(0x00000000, PCIX0_POM0PCIAH); + PCIX_WRITEL(0x80000000 | i*LUAN_PCIX_MEM_SIZE, PCIX0_POM0PCIAL); + PCIX_WRITEL(0xe0000001, PCIX0_POM0SA); + + /* Setup 2GB PCI->PLB inbound memory window at 0, enable MSIs */ + PCIX_WRITEL(0x00000000, PCIX0_PIM0LAH); + PCIX_WRITEL(0x00000000, PCIX0_PIM0LAL); + PCIX_WRITEL(0xe0000007, PCIX0_PIM0SA); + PCIX_WRITEL(0xffffffff, PCIX0_PIM0SAH); + + iounmap(pcix_reg_base); + } + + eieio(); +} + +static void __init +luan_setup_hose(struct pci_controller *hose, + int lower_mem, + int upper_mem, + int cfga, + int cfgd, + u64 pcix_io_base) +{ + char name[20]; + + sprintf(name, "PCIX%d host bridge", hose->index); + + hose->pci_mem_offset = LUAN_PCIX_MEM_OFFSET; + + pci_init_resource(&hose->io_resource, + LUAN_PCIX_LOWER_IO, + LUAN_PCIX_UPPER_IO, + IORESOURCE_IO, + name); + + pci_init_resource(&hose->mem_resources[0], + lower_mem, + upper_mem, + IORESOURCE_MEM, + name); + + hose->io_space.start = LUAN_PCIX_LOWER_IO; + hose->io_space.end = LUAN_PCIX_UPPER_IO; + hose->mem_space.start = lower_mem; + hose->mem_space.end = upper_mem; + isa_io_base = + (unsigned long)ioremap64(pcix_io_base, PCIX_IO_SIZE); + hose->io_base_virt = (void *)isa_io_base; + + setup_indirect_pci(hose, cfga, cfgd); + hose->set_cfg_type = 1; +} + +static void __init +luan_setup_hoses(void) +{ + struct pci_controller *hose1, *hose2; + + /* Configure windows on the PCI-X host bridge */ + luan_setup_pcix(); + + /* Allocate hoses for PCIX1 and PCIX2 */ + hose1 = pcibios_alloc_controller(); + hose2 = pcibios_alloc_controller(); + if (!hose1 || !hose2) + return; + + /* Setup PCIX1 */ + hose1->first_busno = 0; + hose1->last_busno = 0xff; + + luan_setup_hose(hose1, + LUAN_PCIX1_LOWER_MEM, + LUAN_PCIX1_UPPER_MEM, + PCIX1_CFGA, + PCIX1_CFGD, + PCIX1_IO_BASE); + + hose1->last_busno = pciauto_bus_scan(hose1, hose1->first_busno); + + /* Setup PCIX2 */ + hose2->first_busno = hose1->last_busno + 1; + hose2->last_busno = 0xff; + + luan_setup_hose(hose2, + LUAN_PCIX2_LOWER_MEM, + LUAN_PCIX2_UPPER_MEM, + PCIX2_CFGA, + PCIX2_CFGD, + PCIX2_IO_BASE); + + hose2->last_busno = pciauto_bus_scan(hose2, hose2->first_busno); + + ppc_md.pci_swizzle = common_swizzle; + ppc_md.pci_map_irq = luan_map_irq; +} + +TODC_ALLOC(); + +static void __init +luan_early_serial_map(void) +{ + struct uart_port port; + + /* Setup ioremapped serial port access */ + memset(&port, 0, sizeof(port)); + port.membase = ioremap64(PPC440SP_UART0_ADDR, 8); + port.irq = UART0_INT; + port.uartclk = clocks.uart0; + port.regshift = 0; + port.iotype = SERIAL_IO_MEM; + port.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST; + port.line = 0; + + if (early_serial_setup(&port) != 0) { + printk("Early serial init of port 0 failed\n"); + } + + port.membase = ioremap64(PPC440SP_UART1_ADDR, 8); + port.irq = UART1_INT; + port.uartclk = clocks.uart1; + port.line = 1; + + if (early_serial_setup(&port) != 0) { + printk("Early serial init of port 1 failed\n"); + } + + port.membase = ioremap64(PPC440SP_UART2_ADDR, 8); + port.irq = UART2_INT; + port.uartclk = BASE_BAUD; + port.line = 2; + + if (early_serial_setup(&port) != 0) { + printk("Early serial init of port 2 failed\n"); + } +} + +static void __init +luan_setup_arch(void) +{ + luan_set_emacdata(); + +#if !defined(CONFIG_BDI_SWITCH) + /* + * The Abatron BDI JTAG debugger does not tolerate others + * mucking with the debug registers. + */ + mtspr(SPRN_DBCR0, (DBCR0_TDE | DBCR0_IDM)); +#endif + + /* + * Determine various clocks. + * To be completely correct we should get SysClk + * from FPGA, because it can be changed by on-board switches + * --ebs + */ + /* 440GX and 440SP clocking is the same -mdp */ + ibm440gx_get_clocks(&clocks, 33333333, 6 * 1843200); + ocp_sys_info.opb_bus_freq = clocks.opb; + + /* init to some ~sane value until calibrate_delay() runs */ + loops_per_jiffy = 50000000/HZ; + + /* Setup PCIXn host bridges */ + luan_setup_hoses(); + +#ifdef CONFIG_BLK_DEV_INITRD + if (initrd_start) + ROOT_DEV = Root_RAM0; + else +#endif +#ifdef CONFIG_ROOT_NFS + ROOT_DEV = Root_NFS; +#else + ROOT_DEV = Root_HDA1; +#endif + + luan_early_serial_map(); + + /* Identify the system */ + printk("Luan port (MontaVista Software, Inc. )\n"); +} + +void __init platform_init(unsigned long r3, unsigned long r4, + unsigned long r5, unsigned long r6, unsigned long r7) +{ + parse_bootinfo(find_bootinfo()); + + /* + * If we were passed in a board information, copy it into the + * residual data area. + */ + if (r3) + __res = *(bd_t *)(r3 + KERNELBASE); + + ibm44x_platform_init(); + + ppc_md.setup_arch = luan_setup_arch; + ppc_md.show_cpuinfo = luan_show_cpuinfo; + ppc_md.find_end_of_memory = ibm440sp_find_end_of_memory; + ppc_md.get_irq = NULL; /* Set in ppc4xx_pic_init() */ + + ppc_md.calibrate_decr = luan_calibrate_decr; +#ifdef CONFIG_KGDB + ppc_md.early_serial_map = luan_early_serial_map; +#endif +} diff -urN linux-2.6.11-rc3/arch/ppc/platforms/4xx/luan.h linux-2.6.11-rc4/arch/ppc/platforms/4xx/luan.h --- linux-2.6.11-rc3/arch/ppc/platforms/4xx/luan.h 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.6.11-rc4/arch/ppc/platforms/4xx/luan.h 2005-02-12 19:50:53.549526269 -0800 @@ -0,0 +1,80 @@ +/* + * arch/ppc/platforms/4xx/luan.h + * + * Luan board definitions + * + * Matt Porter + * + * Copyright 2004-2005 MontaVista Software Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + */ + +#ifdef __KERNEL__ +#ifndef __ASM_LUAN_H__ +#define __ASM_LUAN_H__ + +#include +#include + +/* F/W TLB mapping used in bootloader glue to reset EMAC */ +#define PPC44x_EMAC0_MR0 0xa0000800 + +/* Location of MAC addresses in PIBS image */ +#define PIBS_FLASH_BASE 0xffe00000 +#define PIBS_MAC_BASE (PIBS_FLASH_BASE+0x1b0400) + +/* External timer clock frequency */ +#define LUAN_TMR_CLK 25000000 + +/* Flash */ +#define LUAN_FPGA_REG_0 0x0000000148300000ULL +#define LUAN_BOOT_LARGE_FLASH(x) (x & 0x40) +#define LUAN_SMALL_FLASH_LOW 0x00000001ff900000ULL +#define LUAN_SMALL_FLASH_HIGH 0x00000001ffe00000ULL +#define LUAN_SMALL_FLASH_SIZE 0x100000 +#define LUAN_LARGE_FLASH_LOW 0x00000001ff800000ULL +#define LUAN_LARGE_FLASH_HIGH 0x00000001ffc00000ULL +#define LUAN_LARGE_FLASH_SIZE 0x400000 + +/* + * Serial port defines + */ +#define RS_TABLE_SIZE 3 + +/* PIBS defined UART mappings, used before early_serial_setup */ +#define UART0_IO_BASE (u8 *) 0xa0000200 +#define UART1_IO_BASE (u8 *) 0xa0000300 +#define UART2_IO_BASE (u8 *) 0xa0000600 + +#define BASE_BAUD 11059200 +#define STD_UART_OP(num) \ + { 0, BASE_BAUD, 0, UART##num##_INT, \ + (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \ + iomem_base: UART##num##_IO_BASE, \ + io_type: SERIAL_IO_MEM}, + +#define SERIAL_PORT_DFNS \ + STD_UART_OP(0) \ + STD_UART_OP(1) \ + STD_UART_OP(2) + +/* PCI support */ +#define LUAN_PCIX_LOWER_IO 0x00000000 +#define LUAN_PCIX_UPPER_IO 0x0000ffff +#define LUAN_PCIX0_LOWER_MEM 0x80000000 +#define LUAN_PCIX0_UPPER_MEM 0x9fffffff +#define LUAN_PCIX1_LOWER_MEM 0xa0000000 +#define LUAN_PCIX1_UPPER_MEM 0xbfffffff +#define LUAN_PCIX2_LOWER_MEM 0xc0000000 +#define LUAN_PCIX2_UPPER_MEM 0xdfffffff + +#define LUAN_PCIX_MEM_SIZE 0x20000000 +#define LUAN_PCIX_MEM_OFFSET 0x00000000 + +#endif /* __ASM_LUAN_H__ */ +#endif /* __KERNEL__ */ diff -urN linux-2.6.11-rc3/arch/ppc/platforms/4xx/ocotea.c linux-2.6.11-rc4/arch/ppc/platforms/4xx/ocotea.c --- linux-2.6.11-rc3/arch/ppc/platforms/4xx/ocotea.c 2005-02-12 19:50:35.988766027 -0800 +++ linux-2.6.11-rc4/arch/ppc/platforms/4xx/ocotea.c 2005-02-12 19:50:53.556526572 -0800 @@ -5,7 +5,7 @@ * * Matt Porter * - * Copyright 2003-2004 MontaVista Software Inc. + * Copyright 2003-2005 MontaVista Software Inc. * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -163,7 +163,7 @@ { void *pcix_reg_base; - pcix_reg_base = ioremap64(PCIX0_REG_BASE, PCIX0_REG_SIZE); + pcix_reg_base = ioremap64(PCIX0_REG_BASE, PCIX_REG_SIZE); /* Enable PCIX0 I/O, Mem, and Busmaster cycles */ PCIX_WRITEW(PCIX_READW(PCIX0_COMMAND) | PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER, PCIX0_COMMAND); diff -urN linux-2.6.11-rc3/arch/ppc/platforms/4xx/ocotea.h linux-2.6.11-rc4/arch/ppc/platforms/4xx/ocotea.h --- linux-2.6.11-rc3/arch/ppc/platforms/4xx/ocotea.h 2004-12-24 13:34:45.000000000 -0800 +++ linux-2.6.11-rc4/arch/ppc/platforms/4xx/ocotea.h 2005-02-12 19:50:53.556526572 -0800 @@ -3,9 +3,9 @@ * * Ocotea board definitions * - * Matt Porter + * Matt Porter * - * Copyright 2003 MontaVista Software Inc. + * Copyright 2003-2005 MontaVista Software Inc. * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -22,13 +22,13 @@ #include /* F/W TLB mapping used in bootloader glue to reset EMAC */ -#define PPC44x_EMAC0_MR0 0xE0000800 +#define PPC44x_EMAC0_MR0 0xe0000800 /* Location of MAC addresses in PIBS image */ -#define OCOTEA_PIBS_FLASH 0xfff00000 -#define OCOTEA_PIBS_MAC_BASE (OCOTEA_PIBS_FLASH+0xb0500) -#define OCOTEA_PIBS_MAC_SIZE 0x200 -#define OCOTEA_PIBS_MAC_OFFSET 0x100 +#define PIBS_FLASH_BASE 0xfff00000 +#define PIBS_MAC_BASE (PIBS_FLASH_BASE+0xb0500) +#define PIBS_MAC_SIZE 0x200 +#define PIBS_MAC_OFFSET 0x100 /* External timer clock frequency */ #define OCOTEA_TMR_CLK 25000000 diff -urN linux-2.6.11-rc3/arch/ppc/platforms/85xx/mpc85xx_cds_common.c linux-2.6.11-rc4/arch/ppc/platforms/85xx/mpc85xx_cds_common.c --- linux-2.6.11-rc3/arch/ppc/platforms/85xx/mpc85xx_cds_common.c 2005-02-12 19:50:36.019767369 -0800 +++ linux-2.6.11-rc4/arch/ppc/platforms/85xx/mpc85xx_cds_common.c 2005-02-12 19:50:53.572527265 -0800 @@ -281,16 +281,17 @@ #define ARCADIA_HOST_BRIDGE_IDSEL 17 #define ARCADIA_2ND_BRIDGE_IDSEL 3 +extern int mpc85xx_pci1_last_busno; + int mpc85xx_exclude_device(u_char bus, u_char devfn) { if (bus == 0 && PCI_SLOT(devfn) == 0) return PCIBIOS_DEVICE_NOT_FOUND; #ifdef CONFIG_85xx_PCI2 - /* With the current code we know PCI2 will be bus 2, however this may - * not be guarnteed */ - if (bus == 2 && PCI_SLOT(devfn) == 0) - return PCIBIOS_DEVICE_NOT_FOUND; + if (mpc85xx_pci1_last_busno) + if (bus == (mpc85xx_pci1_last_busno + 1) && PCI_SLOT(devfn) == 0) + return PCIBIOS_DEVICE_NOT_FOUND; #endif /* We explicitly do not go past the Tundra 320 Bridge */ if (bus == 1) diff -urN linux-2.6.11-rc3/arch/ppc/syslib/Makefile linux-2.6.11-rc4/arch/ppc/syslib/Makefile --- linux-2.6.11-rc3/arch/ppc/syslib/Makefile 2005-02-12 19:50:36.053768841 -0800 +++ linux-2.6.11-rc4/arch/ppc/syslib/Makefile 2005-02-12 19:50:53.612528996 -0800 @@ -13,6 +13,7 @@ obj-$(CONFIG_44x) += ibm44x_common.o obj-$(CONFIG_440GP) += ibm440gp_common.o obj-$(CONFIG_440GX) += ibm440gx_common.o +obj-$(CONFIG_440SP) += ibm440gx_common.o ibm440sp_common.o ifeq ($(CONFIG_4xx),y) ifeq ($(CONFIG_VIRTEX_II_PRO),y) obj-$(CONFIG_40x) += xilinx_pic.o @@ -52,6 +53,7 @@ obj-$(CONFIG_K2) += i8259.o indirect_pci.o todc_time.o \ pci_auto.o obj-$(CONFIG_LOPEC) += i8259.o pci_auto.o todc_time.o +obj-$(CONFIG_LUAN) += indirect_pci.o pci_auto.o todc_time.o obj-$(CONFIG_KATANA) += pci_auto.o obj-$(CONFIG_MCPN765) += todc_time.o indirect_pci.o pci_auto.o \ open_pic.o i8259.o hawk_common.o diff -urN linux-2.6.11-rc3/arch/ppc/syslib/ibm440sp_common.c linux-2.6.11-rc4/arch/ppc/syslib/ibm440sp_common.c --- linux-2.6.11-rc3/arch/ppc/syslib/ibm440sp_common.c 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.6.11-rc4/arch/ppc/syslib/ibm440sp_common.c 2005-02-12 19:50:53.621529386 -0800 @@ -0,0 +1,71 @@ +/* + * arch/ppc/syslib/ibm440sp_common.c + * + * PPC440SP system library + * + * Matt Porter + * Copyright 2002-2005 MontaVista Software Inc. + * + * Eugene Surovegin or + * Copyright (c) 2003, 2004 Zultys Technologies + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + */ +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +/* + * Read the 440SP memory controller to get size of system memory. + */ +unsigned long __init ibm440sp_find_end_of_memory(void) +{ + u32 i; + u32 mem_size = 0; + + /* Read two bank sizes and sum */ + for (i=0; i<2; i++) + switch (mfdcr(DCRN_MQ0_BS0BAS + i) & MQ0_CONFIG_SIZE_MASK) { + case MQ0_CONFIG_SIZE_8M: + mem_size += PPC44x_MEM_SIZE_8M; + break; + case MQ0_CONFIG_SIZE_16M: + mem_size += PPC44x_MEM_SIZE_16M; + break; + case MQ0_CONFIG_SIZE_32M: + mem_size += PPC44x_MEM_SIZE_32M; + break; + case MQ0_CONFIG_SIZE_64M: + mem_size += PPC44x_MEM_SIZE_64M; + break; + case MQ0_CONFIG_SIZE_128M: + mem_size += PPC44x_MEM_SIZE_128M; + break; + case MQ0_CONFIG_SIZE_256M: + mem_size += PPC44x_MEM_SIZE_256M; + break; + case MQ0_CONFIG_SIZE_512M: + mem_size += PPC44x_MEM_SIZE_512M; + break; + case MQ0_CONFIG_SIZE_1G: + mem_size += PPC44x_MEM_SIZE_1G; + break; + case MQ0_CONFIG_SIZE_2G: + mem_size += PPC44x_MEM_SIZE_2G; + break; + default: + break; + } + return mem_size; +} diff -urN linux-2.6.11-rc3/arch/ppc/syslib/ibm440sp_common.h linux-2.6.11-rc4/arch/ppc/syslib/ibm440sp_common.h --- linux-2.6.11-rc3/arch/ppc/syslib/ibm440sp_common.h 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.6.11-rc4/arch/ppc/syslib/ibm440sp_common.h 2005-02-12 19:50:53.622529429 -0800 @@ -0,0 +1,25 @@ +/* + * arch/ppc/syslib/ibm440sp_common.h + * + * PPC440SP system library + * + * Matt Porter + * Copyright 2004-2005 MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + */ +#ifdef __KERNEL__ +#ifndef __PPC_SYSLIB_IBM440SP_COMMON_H +#define __PPC_SYSLIB_IBM440SP_COMMON_H + +#ifndef __ASSEMBLY__ + +extern unsigned long __init ibm440sp_find_end_of_memory(void); + +#endif /* __ASSEMBLY__ */ +#endif /* __PPC_SYSLIB_IBM440SP_COMMON_H */ +#endif /* __KERNEL__ */ diff -urN linux-2.6.11-rc3/arch/ppc/syslib/ibm44x_common.c linux-2.6.11-rc4/arch/ppc/syslib/ibm44x_common.c --- linux-2.6.11-rc3/arch/ppc/syslib/ibm44x_common.c 2005-02-12 19:50:36.061769188 -0800 +++ linux-2.6.11-rc4/arch/ppc/syslib/ibm44x_common.c 2005-02-12 19:50:53.623529473 -0800 @@ -4,7 +4,7 @@ * PPC44x system library * * Matt Porter - * Copyright 2002-2004 MontaVista Software Inc. + * Copyright 2002-2005 MontaVista Software Inc. * * Eugene Surovegin or * Copyright (c) 2003, 2004 Zultys Technologies @@ -39,11 +39,17 @@ * address in the 440's 36-bit address space. Fix * them up with the appropriate ERPN */ - if ((addr >= PPC44x_IO_LO) && (addr < PPC44x_IO_HI)) + if ((addr >= PPC44x_IO_LO) && (addr <= PPC44x_IO_HI)) page_4gb = PPC44x_IO_PAGE; - else if ((addr >= PPC44x_PCICFG_LO) && (addr < PPC44x_PCICFG_HI)) + else if ((addr >= PPC44x_PCI0CFG_LO) && (addr <= PPC44x_PCI0CFG_HI)) page_4gb = PPC44x_PCICFG_PAGE; - else if ((addr >= PPC44x_PCIMEM_LO) && (addr < PPC44x_PCIMEM_HI)) +#ifdef CONFIG_440SP + else if ((addr >= PPC44x_PCI1CFG_LO) && (addr <= PPC44x_PCI1CFG_HI)) + page_4gb = PPC44x_PCICFG_PAGE; + else if ((addr >= PPC44x_PCI2CFG_LO) && (addr <= PPC44x_PCI2CFG_HI)) + page_4gb = PPC44x_PCICFG_PAGE; +#endif + else if ((addr >= PPC44x_PCIMEM_LO) && (addr <= PPC44x_PCIMEM_HI)) page_4gb = PPC44x_PCIMEM_PAGE; return (page_4gb | addr); diff -urN linux-2.6.11-rc3/arch/ppc/syslib/mv64x60.c linux-2.6.11-rc4/arch/ppc/syslib/mv64x60.c --- linux-2.6.11-rc3/arch/ppc/syslib/mv64x60.c 2005-02-12 19:50:36.068769491 -0800 +++ linux-2.6.11-rc4/arch/ppc/syslib/mv64x60.c 2005-02-12 19:50:53.631529819 -0800 @@ -32,7 +32,7 @@ u8 mv64x60_pci_exclude_bridge = 1; -spinlock_t mv64x60_lock; /* Only really used by PIC code once init done */ +spinlock_t mv64x60_lock = SPIN_LOCK_UNLOCKED; static phys_addr_t mv64x60_bridge_pbase = 0; static void *mv64x60_bridge_vbase = 0; diff -urN linux-2.6.11-rc3/arch/ppc/syslib/ppc4xx_dma.c linux-2.6.11-rc4/arch/ppc/syslib/ppc4xx_dma.c --- linux-2.6.11-rc3/arch/ppc/syslib/ppc4xx_dma.c 2005-02-12 19:50:36.076769837 -0800 +++ linux-2.6.11-rc4/arch/ppc/syslib/ppc4xx_dma.c 2005-02-12 19:50:53.641530252 -0800 @@ -512,6 +512,8 @@ return DMA_STATUS_BAD_CHANNEL; } + memcpy(p_dma_ch, &dma_channels[dmanr], sizeof (ppc_dma_ch_t)); + #if DCRN_POL > 0 polarity = mfdcr(DCRN_POL); #else @@ -604,6 +606,84 @@ return (GET_DMA_PW(control)); } +/* + * Clears the channel status bits + */ +int +ppc4xx_clr_dma_status(unsigned int dmanr) +{ + if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) { + printk(KERN_ERR "ppc4xx_clr_dma_status: bad channel: %d\n", dmanr); + return DMA_STATUS_BAD_CHANNEL; + } + mtdcr(DCRN_DMASR, ((u32)DMA_CH0_ERR | (u32)DMA_CS0 | (u32)DMA_TS0) >> dmanr); + return DMA_STATUS_GOOD; +} + +/* + * Enables the burst on the channel (BTEN bit in the control/count register) + * Note: + * For scatter/gather dma, this function MUST be called before the + * ppc4xx_alloc_dma_handle() func as the chan count register is copied into the + * sgl list and used as each sgl element is added. + */ +int +ppc4xx_enable_burst(unsigned int dmanr) +{ + unsigned int ctc; + if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) { + printk(KERN_ERR "ppc4xx_enable_burst: bad channel: %d\n", dmanr); + return DMA_STATUS_BAD_CHANNEL; + } + ctc = mfdcr(DCRN_DMACT0 + (dmanr * 0x8)) | DMA_CTC_BTEN; + mtdcr(DCRN_DMACT0 + (dmanr * 0x8), ctc); + return DMA_STATUS_GOOD; +} +/* + * Disables the burst on the channel (BTEN bit in the control/count register) + * Note: + * For scatter/gather dma, this function MUST be called before the + * ppc4xx_alloc_dma_handle() func as the chan count register is copied into the + * sgl list and used as each sgl element is added. + */ +int +ppc4xx_disable_burst(unsigned int dmanr) +{ + unsigned int ctc; + if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) { + printk(KERN_ERR "ppc4xx_disable_burst: bad channel: %d\n", dmanr); + return DMA_STATUS_BAD_CHANNEL; + } + ctc = mfdcr(DCRN_DMACT0 + (dmanr * 0x8)) &~ DMA_CTC_BTEN; + mtdcr(DCRN_DMACT0 + (dmanr * 0x8), ctc); + return DMA_STATUS_GOOD; +} +/* + * Sets the burst size (number of peripheral widths) for the channel + * (BSIZ bits in the control/count register)) + * must be one of: + * DMA_CTC_BSIZ_2 + * DMA_CTC_BSIZ_4 + * DMA_CTC_BSIZ_8 + * DMA_CTC_BSIZ_16 + * Note: + * For scatter/gather dma, this function MUST be called before the + * ppc4xx_alloc_dma_handle() func as the chan count register is copied into the + * sgl list and used as each sgl element is added. + */ +int +ppc4xx_set_burst_size(unsigned int dmanr, unsigned int bsize) +{ + unsigned int ctc; + if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) { + printk(KERN_ERR "ppc4xx_set_burst_size: bad channel: %d\n", dmanr); + return DMA_STATUS_BAD_CHANNEL; + } + ctc = mfdcr(DCRN_DMACT0 + (dmanr * 0x8)) &~ DMA_CTC_BSIZ_MSK; + ctc |= (bsize & DMA_CTC_BSIZ_MSK); + mtdcr(DCRN_DMACT0 + (dmanr * 0x8), ctc); + return DMA_STATUS_GOOD; +} EXPORT_SYMBOL(ppc4xx_init_dma_channel); EXPORT_SYMBOL(ppc4xx_get_channel_config); @@ -622,3 +702,7 @@ EXPORT_SYMBOL(ppc4xx_enable_dma_interrupt); EXPORT_SYMBOL(ppc4xx_disable_dma_interrupt); EXPORT_SYMBOL(ppc4xx_get_dma_status); +EXPORT_SYMBOL(ppc4xx_clr_dma_status); +EXPORT_SYMBOL(ppc4xx_enable_burst); +EXPORT_SYMBOL(ppc4xx_disable_burst); +EXPORT_SYMBOL(ppc4xx_set_burst_size); diff -urN linux-2.6.11-rc3/arch/ppc/syslib/ppc4xx_sgdma.c linux-2.6.11-rc4/arch/ppc/syslib/ppc4xx_sgdma.c --- linux-2.6.11-rc3/arch/ppc/syslib/ppc4xx_sgdma.c 2004-12-24 13:35:18.000000000 -0800 +++ linux-2.6.11-rc4/arch/ppc/syslib/ppc4xx_sgdma.c 2005-02-12 19:50:53.644530382 -0800 @@ -120,6 +120,12 @@ psgl->ptail = psgl->phead; psgl->ptail_dma = psgl->phead_dma; } else { + if(p_dma_ch->int_on_final_sg) { + /* mask out all dma interrupts, except error, on tail + before adding new tail. */ + psgl->ptail->control_count &= + ~(SG_TCI_ENABLE | SG_ETI_ENABLE); + } psgl->ptail->next = psgl->ptail_dma + sizeof(ppc_sgl_t); psgl->ptail++; psgl->ptail_dma += sizeof(ppc_sgl_t); @@ -217,7 +223,7 @@ } sgl_addr = (ppc_sgl_t *) __va(mfdcr(DCRN_ASG0 + (psgl->dmanr * 0x8))); - count_left = mfdcr(DCRN_DMACT0 + (psgl->dmanr * 0x8)); + count_left = mfdcr(DCRN_DMACT0 + (psgl->dmanr * 0x8)) & SG_COUNT_MASK; if (!sgl_addr) { printk("ppc4xx_get_dma_sgl_residue: sgl addr register is null\n"); @@ -351,10 +357,11 @@ int ppc4xx_alloc_dma_handle(sgl_handle_t * phandle, unsigned int mode, unsigned int dmanr) { - sgl_list_info_t *psgl; + sgl_list_info_t *psgl=NULL; dma_addr_t dma_addr; ppc_dma_ch_t *p_dma_ch = &dma_channels[dmanr]; uint32_t sg_command; + uint32_t ctc_settings; void *ret; if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) { @@ -412,6 +419,11 @@ mtdcr(DCRN_ASGC, sg_command); psgl->sgl_control = SG_ERI_ENABLE | SG_LINK; + /* keep control count register settings */ + ctc_settings = mfdcr(DCRN_DMACT0 + (dmanr * 0x8)) + & (DMA_CTC_BSIZ_MSK | DMA_CTC_BTEN); /*burst mode settings*/ + psgl->sgl_control |= ctc_settings; + if (p_dma_ch->int_enable) { if (p_dma_ch->tce_enable) psgl->sgl_control |= SG_TCI_ENABLE; diff -urN linux-2.6.11-rc3/arch/ppc/syslib/ppc85xx_setup.c linux-2.6.11-rc4/arch/ppc/syslib/ppc85xx_setup.c --- linux-2.6.11-rc3/arch/ppc/syslib/ppc85xx_setup.c 2005-02-12 19:50:36.079769967 -0800 +++ linux-2.6.11-rc4/arch/ppc/syslib/ppc85xx_setup.c 2005-02-12 19:50:53.646530468 -0800 @@ -243,6 +243,8 @@ } #endif /* CONFIG_85xx_PCI2 */ +int mpc85xx_pci1_last_busno = 0; + void __init mpc85xx_setup_hose(void) { @@ -341,6 +343,9 @@ IORESOURCE_IO, "PCI2 host bridge"); hose_b->last_busno = pciauto_bus_scan(hose_b, hose_b->first_busno); + + /* let board code know what the last bus number was on PCI1 */ + mpc85xx_pci1_last_busno = hose_a->last_busno; #endif return; } diff -urN linux-2.6.11-rc3/arch/ppc64/kernel/entry.S linux-2.6.11-rc4/arch/ppc64/kernel/entry.S --- linux-2.6.11-rc3/arch/ppc64/kernel/entry.S 2005-02-12 19:50:36.094770616 -0800 +++ linux-2.6.11-rc4/arch/ppc64/kernel/entry.S 2005-02-12 19:50:53.661531118 -0800 @@ -231,6 +231,7 @@ syscall_exit_trace: std r3,GPR3(r1) bl .save_nvgprs + addi r3,r1,STACK_FRAME_OVERHEAD bl .do_syscall_trace_leave REST_NVGPRS(r1) ld r3,GPR3(r1) @@ -324,6 +325,7 @@ ld r4,TI_FLAGS(r4) andi. r4,r4,(_TIF_SYSCALL_T_OR_A|_TIF_SINGLESTEP) beq+ 81f + addi r3,r1,STACK_FRAME_OVERHEAD bl .do_syscall_trace_leave 81: b .ret_from_except diff -urN linux-2.6.11-rc3/arch/ppc64/kernel/prom_init.c linux-2.6.11-rc4/arch/ppc64/kernel/prom_init.c --- linux-2.6.11-rc3/arch/ppc64/kernel/prom_init.c 2005-02-12 19:50:36.131772218 -0800 +++ linux-2.6.11-rc4/arch/ppc64/kernel/prom_init.c 2005-02-12 19:50:53.757535274 -0800 @@ -845,7 +845,7 @@ prom_debug("TCE table: %s\n", path); prom_debug("\tnode = 0x%x\n", node); - prom_debug("\tbase = 0x%x\n", vbase); + prom_debug("\tbase = 0x%x\n", base); prom_debug("\tsize = 0x%x\n", minsize); /* Initialize the table to have a one-to-one mapping diff -urN linux-2.6.11-rc3/arch/ppc64/kernel/ptrace.c linux-2.6.11-rc4/arch/ppc64/kernel/ptrace.c --- linux-2.6.11-rc3/arch/ppc64/kernel/ptrace.c 2004-12-24 13:35:24.000000000 -0800 +++ linux-2.6.11-rc4/arch/ppc64/kernel/ptrace.c 2005-02-12 19:50:53.757535274 -0800 @@ -313,10 +313,10 @@ do_syscall_trace(); } -void do_syscall_trace_leave(void) +void do_syscall_trace_leave(struct pt_regs *regs) { if (unlikely(current->audit_context)) - audit_syscall_exit(current, 0); /* FIXME: pass pt_regs */ + audit_syscall_exit(current, regs->result); if ((test_thread_flag(TIF_SYSCALL_TRACE) || test_thread_flag(TIF_SINGLESTEP)) diff -urN linux-2.6.11-rc3/arch/ppc64/kernel/syscalls.c linux-2.6.11-rc4/arch/ppc64/kernel/syscalls.c --- linux-2.6.11-rc3/arch/ppc64/kernel/syscalls.c 2004-12-24 13:35:23.000000000 -0800 +++ linux-2.6.11-rc4/arch/ppc64/kernel/syscalls.c 2005-02-12 19:50:53.767535707 -0800 @@ -57,7 +57,8 @@ * This is really horribly ugly. */ asmlinkage int -sys_ipc (uint call, int first, int second, long third, void __user *ptr, long fifth) +sys_ipc (uint call, int first, unsigned long second, long third, + void __user *ptr, long fifth) { int version, ret; @@ -67,15 +68,16 @@ ret = -ENOSYS; switch (call) { case SEMOP: - ret = sys_semtimedop (first, (struct sembuf __user *)ptr, second, - NULL); + ret = sys_semtimedop(first, (struct sembuf __user *)ptr, + (unsigned)second, NULL); break; case SEMTIMEDOP: - ret = sys_semtimedop (first, (struct sembuf __user *)ptr, second, + ret = sys_semtimedop(first, (struct sembuf __user *)ptr, + (unsigned)second, (const struct timespec __user *) fifth); break; case SEMGET: - ret = sys_semget (first, second, third); + ret = sys_semget (first, (int)second, third); break; case SEMCTL: { union semun fourth; @@ -85,11 +87,12 @@ break; if ((ret = get_user(fourth.__pad, (void __user * __user *)ptr))) break; - ret = sys_semctl (first, second, third, fourth); + ret = sys_semctl(first, (int)second, third, fourth); break; } case MSGSND: - ret = sys_msgsnd (first, (struct msgbuf __user *) ptr, second, third); + ret = sys_msgsnd(first, (struct msgbuf __user *)ptr, + (size_t)second, third); break; case MSGRCV: switch (version) { @@ -103,27 +106,29 @@ (struct ipc_kludge __user *) ptr, sizeof (tmp)) ? -EFAULT : 0)) break; - ret = sys_msgrcv (first, tmp.msgp, second, tmp.msgtyp, - third); + ret = sys_msgrcv(first, tmp.msgp, (size_t) second, + tmp.msgtyp, third); break; } default: ret = sys_msgrcv (first, (struct msgbuf __user *) ptr, - second, fifth, third); + (size_t)second, fifth, third); break; } break; case MSGGET: - ret = sys_msgget ((key_t) first, second); + ret = sys_msgget ((key_t)first, (int)second); break; case MSGCTL: - ret = sys_msgctl (first, second, (struct msqid_ds __user *) ptr); + ret = sys_msgctl(first, (int)second, + (struct msqid_ds __user *)ptr); break; case SHMAT: switch (version) { default: { ulong raddr; - ret = do_shmat (first, (char __user *) ptr, second, &raddr); + ret = do_shmat(first, (char __user *) ptr, + (int)second, &raddr); if (ret) break; ret = put_user (raddr, (ulong __user *) third); @@ -133,8 +138,8 @@ ret = -EINVAL; if (!segment_eq(get_fs(), get_ds())) break; - ret = do_shmat (first, (char __user *) ptr, second, - (ulong *) third); + ret = do_shmat(first, (char __user *)ptr, + (int)second, (ulong *)third); break; } break; @@ -142,10 +147,11 @@ ret = sys_shmdt ((char __user *)ptr); break; case SHMGET: - ret = sys_shmget (first, second, third); + ret = sys_shmget (first, (size_t)second, third); break; case SHMCTL: - ret = sys_shmctl (first, second, (struct shmid_ds __user *) ptr); + ret = sys_shmctl(first, (int)second, + (struct shmid_ds __user *)ptr); break; } diff -urN linux-2.6.11-rc3/arch/ppc64/kernel/sysfs.c linux-2.6.11-rc4/arch/ppc64/kernel/sysfs.c --- linux-2.6.11-rc3/arch/ppc64/kernel/sysfs.c 2005-02-12 19:50:36.141772651 -0800 +++ linux-2.6.11-rc4/arch/ppc64/kernel/sysfs.c 2005-02-12 19:50:53.768535750 -0800 @@ -387,7 +387,7 @@ { struct cpu *cpu = container_of(dev, struct cpu, sysdev); - return sprintf(buf, "%u\n", get_hard_smp_processor_id(cpu->sysdev.id)); + return sprintf(buf, "%d\n", get_hard_smp_processor_id(cpu->sysdev.id)); } static SYSDEV_ATTR(physical_id, 0444, show_physical_id, NULL); diff -urN linux-2.6.11-rc3/arch/s390/defconfig linux-2.6.11-rc4/arch/s390/defconfig --- linux-2.6.11-rc3/arch/s390/defconfig 2005-02-12 19:50:36.184774513 -0800 +++ linux-2.6.11-rc4/arch/s390/defconfig 2005-02-12 19:50:53.826538261 -0800 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.11-rc1 -# Fri Jan 14 14:56:51 2005 +# Linux kernel version: 2.6.11-rc2 +# Mon Jan 31 16:27:12 2005 # CONFIG_MMU=y CONFIG_RWSEM_XCHGADD_ALGORITHM=y @@ -156,6 +156,7 @@ # # Block devices # +# CONFIG_BLK_DEV_COW_COMMON is not set CONFIG_BLK_DEV_LOOP=m # CONFIG_BLK_DEV_CRYPTOLOOP is not set CONFIG_BLK_DEV_NBD=m @@ -579,5 +580,5 @@ # Library routines # # CONFIG_CRC_CCITT is not set -# CONFIG_CRC32 is not set +CONFIG_CRC32=m # CONFIG_LIBCRC32C is not set diff -urN linux-2.6.11-rc3/arch/s390/kernel/compat_linux.c linux-2.6.11-rc4/arch/s390/kernel/compat_linux.c --- linux-2.6.11-rc3/arch/s390/kernel/compat_linux.c 2005-02-12 19:50:36.203775335 -0800 +++ linux-2.6.11-rc4/arch/s390/kernel/compat_linux.c 2005-02-12 19:50:53.846539127 -0800 @@ -331,7 +331,7 @@ case SHMDT: return sys_shmdt(compat_ptr(ptr)); case SHMGET: - return sys_shmget(first, second, third); + return sys_shmget(first, (unsigned)second, third); case SHMCTL: return compat_sys_shmctl(first, second, compat_ptr(ptr)); } @@ -355,136 +355,6 @@ return sys_ftruncate(fd, (high << 32) | low); } -/* readdir & getdents */ - -#define NAME_OFFSET(de) ((int) ((de)->d_name - (char *) (de))) -#define ROUND_UP(x) (((x)+sizeof(u32)-1) & ~(sizeof(u32)-1)) - -struct old_linux_dirent32 { - u32 d_ino; - u32 d_offset; - unsigned short d_namlen; - char d_name[1]; -}; - -struct readdir_callback32 { - struct old_linux_dirent32 * dirent; - int count; -}; - -static int fillonedir(void * __buf, const char * name, int namlen, - loff_t offset, ino_t ino, unsigned int d_type) -{ - struct readdir_callback32 * buf = (struct readdir_callback32 *) __buf; - struct old_linux_dirent32 * dirent; - - if (buf->count) - return -EINVAL; - buf->count++; - dirent = buf->dirent; - put_user(ino, &dirent->d_ino); - put_user(offset, &dirent->d_offset); - put_user(namlen, &dirent->d_namlen); - copy_to_user(dirent->d_name, name, namlen); - put_user(0, dirent->d_name + namlen); - return 0; -} - -asmlinkage long old32_readdir(unsigned int fd, struct old_linux_dirent32 *dirent, unsigned int count) -{ - int error = -EBADF; - struct file * file; - struct readdir_callback32 buf; - - file = fget(fd); - if (!file) - goto out; - - buf.count = 0; - buf.dirent = dirent; - - error = vfs_readdir(file, fillonedir, &buf); - if (error < 0) - goto out_putf; - error = buf.count; - -out_putf: - fput(file); -out: - return error; -} - -struct linux_dirent32 { - u32 d_ino; - u32 d_off; - unsigned short d_reclen; - char d_name[1]; -}; - -struct getdents_callback32 { - struct linux_dirent32 * current_dir; - struct linux_dirent32 * previous; - int count; - int error; -}; - -static int filldir(void * __buf, const char * name, int namlen, loff_t offset, ino_t ino, - unsigned int d_type) -{ - struct linux_dirent32 * dirent; - struct getdents_callback32 * buf = (struct getdents_callback32 *) __buf; - int reclen = ROUND_UP(NAME_OFFSET(dirent) + namlen + 1); - - buf->error = -EINVAL; /* only used if we fail.. */ - if (reclen > buf->count) - return -EINVAL; - dirent = buf->previous; - if (dirent) - put_user(offset, &dirent->d_off); - dirent = buf->current_dir; - buf->previous = dirent; - put_user(ino, &dirent->d_ino); - put_user(reclen, &dirent->d_reclen); - copy_to_user(dirent->d_name, name, namlen); - put_user(0, dirent->d_name + namlen); - buf->current_dir = ((void *)dirent) + reclen; - buf->count -= reclen; - return 0; -} - -asmlinkage long sys32_getdents(unsigned int fd, struct linux_dirent32 *dirent, unsigned int count) -{ - struct file * file; - struct linux_dirent32 * lastdirent; - struct getdents_callback32 buf; - int error = -EBADF; - - file = fget(fd); - if (!file) - goto out; - - buf.current_dir = dirent; - buf.previous = NULL; - buf.count = count; - buf.error = 0; - - error = vfs_readdir(file, filldir, &buf); - if (error < 0) - goto out_putf; - lastdirent = buf.previous; - error = buf.error; - if(lastdirent) { - put_user(file->f_pos, &lastdirent->d_off); - error = count - buf.count; - } -out_putf: - fput(file); -out: - return error; -} - -/* end of readdir & getdents */ - int cp_compat_stat(struct kstat *stat, struct compat_stat *statbuf) { int err; diff -urN linux-2.6.11-rc3/arch/s390/kernel/compat_linux.h linux-2.6.11-rc4/arch/s390/kernel/compat_linux.h --- linux-2.6.11-rc3/arch/s390/kernel/compat_linux.h 2005-02-12 19:50:36.203775335 -0800 +++ linux-2.6.11-rc4/arch/s390/kernel/compat_linux.h 2005-02-12 19:50:53.847539170 -0800 @@ -50,9 +50,10 @@ /* POSIX.1b timers */ struct { - unsigned int _timer1; - unsigned int _timer2; - + timer_t _tid; /* timer id */ + int _overrun; /* overrun count */ + sigval_t _sigval; /* same as below */ + int _sys_private; /* not to be passed to user */ } _timer; /* POSIX.1b signals */ @@ -98,6 +99,8 @@ #define si_addr _sifields._sigfault._addr #define si_band _sifields._sigpoll._band #define si_fd _sifields._sigpoll._fd +#define si_tid _sifields._timer._tid +#define si_overrun _sifields._timer._overrun /* asm/sigcontext.h */ typedef union diff -urN linux-2.6.11-rc3/arch/s390/kernel/compat_signal.c linux-2.6.11-rc4/arch/s390/kernel/compat_signal.c --- linux-2.6.11-rc3/arch/s390/kernel/compat_signal.c 2005-02-12 19:50:36.205775422 -0800 +++ linux-2.6.11-rc4/arch/s390/kernel/compat_signal.c 2005-02-12 19:50:53.848539214 -0800 @@ -95,10 +95,14 @@ &to->si_addr); break; case __SI_POLL >> 16: - case __SI_TIMER >> 16: err |= __put_user(from->si_band, &to->si_band); err |= __put_user(from->si_fd, &to->si_fd); break; + case __SI_TIMER >> 16: + err |= __put_user(from->si_tid, &to->si_tid); + err |= __put_user(from->si_overrun, &to->si_overrun); + err |= __put_user(from->si_int, &to->si_int); + break; default: break; } @@ -142,10 +146,14 @@ to->si_addr = (void *)(u64) (tmp & PSW32_ADDR_INSN); break; case __SI_POLL >> 16: - case __SI_TIMER >> 16: err |= __get_user(to->si_band, &from->si_band); err |= __get_user(to->si_fd, &from->si_fd); break; + case __SI_TIMER >> 16: + err |= __get_user(to->si_tid, &from->si_tid); + err |= __get_user(to->si_overrun, &from->si_overrun); + err |= __get_user(to->si_int, &from->si_int); + break; default: break; } diff -urN linux-2.6.11-rc3/arch/s390/kernel/compat_wrapper.S linux-2.6.11-rc4/arch/s390/kernel/compat_wrapper.S --- linux-2.6.11-rc3/arch/s390/kernel/compat_wrapper.S 2005-02-12 19:50:36.206775465 -0800 +++ linux-2.6.11-rc4/arch/s390/kernel/compat_wrapper.S 2005-02-12 19:50:53.859539690 -0800 @@ -391,7 +391,7 @@ llgfr %r2,%r2 # unsigned int llgtr %r3,%r3 # void * llgfr %r4,%r4 # unsigned int - jg old32_readdir # branch to system call + jg compat_sys_old_readdir # branch to system call .globl old32_mmap_wrapper old32_mmap_wrapper: @@ -639,7 +639,7 @@ llgfr %r2,%r2 # unsigned int llgtr %r3,%r3 # void * llgfr %r4,%r4 # unsigned int - jg sys32_getdents # branch to system call + jg compat_sys_getdents # branch to system call .globl compat_sys_select_wrapper compat_sys_select_wrapper: diff -urN linux-2.6.11-rc3/arch/s390/kernel/cpcmd.c linux-2.6.11-rc4/arch/s390/kernel/cpcmd.c --- linux-2.6.11-rc3/arch/s390/kernel/cpcmd.c 2005-02-12 19:50:36.207775508 -0800 +++ linux-2.6.11-rc4/arch/s390/kernel/cpcmd.c 2005-02-12 19:50:53.859539690 -0800 @@ -4,34 +4,41 @@ * S390 version * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com), + * Christian Borntraeger (cborntra@de.ibm.com), */ -#include #include +#include +#include +#include +#include #include #include -#include #include #include static DEFINE_SPINLOCK(cpcmd_lock); static char cpcmd_buf[240]; -void cpcmd(char *cmd, char *response, int rlen) +/* + * the caller of __cpcmd has to ensure that the response buffer is below 2 GB + */ +void __cpcmd(char *cmd, char *response, int rlen) { - const int mask = 0x40000000L; + const int mask = 0x40000000L; unsigned long flags; - int cmdlen; + int cmdlen; spin_lock_irqsave(&cpcmd_lock, flags); cmdlen = strlen(cmd); - BUG_ON(cmdlen>240); + BUG_ON(cmdlen > 240); strcpy(cpcmd_buf, cmd); ASCEBC(cpcmd_buf, cmdlen); if (response != NULL && rlen > 0) { + memset(response, 0, rlen); #ifndef CONFIG_ARCH_S390X - asm volatile ("LRA 2,0(%0)\n\t" + asm volatile ("LRA 2,0(%0)\n\t" "LR 4,%1\n\t" "O 4,%4\n\t" "LRA 3,0(%2)\n\t" @@ -78,3 +85,27 @@ spin_unlock_irqrestore(&cpcmd_lock, flags); } +EXPORT_SYMBOL(__cpcmd); + +#ifdef CONFIG_ARCH_S390X +void cpcmd(char *cmd, char *response, int rlen) +{ + char *lowbuf; + if ((rlen == 0) || (response == NULL) + || !((unsigned long)response >> 31)) + __cpcmd(cmd, response, rlen); + else { + lowbuf = kmalloc(rlen, GFP_KERNEL | GFP_DMA); + if (!lowbuf) { + printk(KERN_WARNING + "cpcmd: could not allocate response buffer\n"); + return; + } + __cpcmd(cmd, lowbuf, rlen); + memcpy(response, lowbuf, rlen); + kfree(lowbuf); + } +} + +EXPORT_SYMBOL(cpcmd); +#endif /* CONFIG_ARCH_S390X */ diff -urN linux-2.6.11-rc3/arch/s390/kernel/debug.c linux-2.6.11-rc4/arch/s390/kernel/debug.c --- linux-2.6.11-rc3/arch/s390/kernel/debug.c 2004-12-24 13:34:00.000000000 -0800 +++ linux-2.6.11-rc4/arch/s390/kernel/debug.c 2005-02-12 19:50:53.860539733 -0800 @@ -931,7 +931,7 @@ int rc = 0; int i; unsigned long flags; - mode_t mode = S_IFREG; + mode_t mode = S_IFREG | S_IRUSR | S_IWUSR; struct proc_dir_entry *pde; if (!id) diff -urN linux-2.6.11-rc3/arch/s390/kernel/module.c linux-2.6.11-rc4/arch/s390/kernel/module.c --- linux-2.6.11-rc3/arch/s390/kernel/module.c 2004-12-24 13:35:27.000000000 -0800 +++ linux-2.6.11-rc4/arch/s390/kernel/module.c 2005-02-12 19:50:53.864539906 -0800 @@ -396,8 +396,7 @@ const Elf_Shdr *sechdrs, struct module *me) { - if (me->arch.syminfo) - vfree(me->arch.syminfo); + vfree(me->arch.syminfo); return 0; } diff -urN linux-2.6.11-rc3/arch/s390/kernel/s390_ksyms.c linux-2.6.11-rc4/arch/s390/kernel/s390_ksyms.c --- linux-2.6.11-rc3/arch/s390/kernel/s390_ksyms.c 2004-12-24 13:35:00.000000000 -0800 +++ linux-2.6.11-rc4/arch/s390/kernel/s390_ksyms.c 2005-02-12 19:50:53.866539993 -0800 @@ -63,4 +63,3 @@ EXPORT_SYMBOL(console_devno); EXPORT_SYMBOL(console_irq); EXPORT_SYMBOL(sys_wait4); -EXPORT_SYMBOL(cpcmd); diff -urN linux-2.6.11-rc3/arch/s390/kernel/setup.c linux-2.6.11-rc4/arch/s390/kernel/setup.c --- linux-2.6.11-rc3/arch/s390/kernel/setup.c 2005-02-12 19:50:36.215775855 -0800 +++ linux-2.6.11-rc4/arch/s390/kernel/setup.c 2005-02-12 19:50:53.867540036 -0800 @@ -76,8 +76,15 @@ static char command_line[COMMAND_LINE_SIZE] = { 0, }; -static struct resource code_resource = { "Kernel code", 0x100000, 0 }; -static struct resource data_resource = { "Kernel data", 0, 0 }; +static struct resource code_resource = { + .name = "Kernel code", + .flags = IORESOURCE_BUSY | IORESOURCE_MEM, +}; + +static struct resource data_resource = { + .name = "Kernel data", + .flags = IORESOURCE_BUSY | IORESOURCE_MEM, +}; /* * cpu_init() initializes state that is per-CPU. @@ -184,11 +191,11 @@ char *ptr; if (MACHINE_IS_VM) { - cpcmd("QUERY CONSOLE", query_buffer, 1024); + __cpcmd("QUERY CONSOLE", query_buffer, 1024); console_devno = simple_strtoul(query_buffer + 5, NULL, 16); ptr = strstr(query_buffer, "SUBCHANNEL ="); console_irq = simple_strtoul(ptr + 13, NULL, 16); - cpcmd("QUERY TERM", query_buffer, 1024); + __cpcmd("QUERY TERM", query_buffer, 1024); ptr = strstr(query_buffer, "CONMODE"); /* * Set the conmode to 3215 so that the device recognition @@ -197,7 +204,7 @@ * 3215 and the 3270 driver will try to access the console * device (3215 as console and 3270 as normal tty). */ - cpcmd("TERM CONMODE 3215", NULL, 0); + __cpcmd("TERM CONMODE 3215", NULL, 0); if (ptr == NULL) { #if defined(CONFIG_SCLP_CONSOLE) SET_CONSOLE_SCLP; @@ -314,7 +321,6 @@ unsigned long bootmap_size; unsigned long memory_start, memory_end; char c = ' ', cn, *to = command_line, *from = COMMAND_LINE; - struct resource *res; unsigned long start_pfn, end_pfn; static unsigned int smptrap=0; unsigned long delay = 0; @@ -472,6 +478,30 @@ } #endif + for (i = 0; i < 16 && memory_chunk[i].size > 0; i++) { + struct resource *res; + + res = alloc_bootmem_low(sizeof(struct resource)); + res->flags = IORESOURCE_BUSY | IORESOURCE_MEM; + + switch (memory_chunk[i].type) { + case CHUNK_READ_WRITE: + res->name = "System RAM"; + break; + case CHUNK_READ_ONLY: + res->name = "System ROM"; + res->flags |= IORESOURCE_READONLY; + break; + default: + res->name = "reserved"; + } + res->start = memory_chunk[i].addr; + res->end = memory_chunk[i].addr + memory_chunk[i].size - 1; + request_resource(&iomem_resource, res); + request_resource(res, &code_resource); + request_resource(res, &data_resource); + } + /* * Setup lowcore for boot cpu */ @@ -524,14 +554,6 @@ */ paging_init(); - res = alloc_bootmem_low(sizeof(struct resource)); - res->start = 0; - res->end = memory_end; - res->flags = IORESOURCE_MEM | IORESOURCE_BUSY; - request_resource(&iomem_resource, res); - request_resource(res, &code_resource); - request_resource(res, &data_resource); - /* Setup default console */ conmode_default(); } diff -urN linux-2.6.11-rc3/arch/s390/kernel/sys_s390.c linux-2.6.11-rc4/arch/s390/kernel/sys_s390.c --- linux-2.6.11-rc3/arch/s390/kernel/sys_s390.c 2004-12-24 13:34:31.000000000 -0800 +++ linux-2.6.11-rc4/arch/s390/kernel/sys_s390.c 2005-02-12 19:50:53.869540123 -0800 @@ -145,7 +145,7 @@ * * This is really horribly ugly. */ -asmlinkage long sys_ipc(uint call, int first, int second, +asmlinkage long sys_ipc(uint call, int first, unsigned long second, unsigned long third, void __user *ptr) { struct ipc_kludge tmp; @@ -153,24 +153,25 @@ switch (call) { case SEMOP: - return sys_semtimedop (first, (struct sembuf __user *) ptr, second, - NULL); + return sys_semtimedop(first, (struct sembuf __user *)ptr, + (unsigned)second, NULL); case SEMTIMEDOP: - return sys_semtimedop (first, (struct sembuf __user *) ptr, second, + return sys_semtimedop(first, (struct sembuf __user *)ptr, + (unsigned)second, (const struct timespec __user *) third); case SEMGET: - return sys_semget (first, second, third); + return sys_semget(first, (int)second, third); case SEMCTL: { union semun fourth; if (!ptr) return -EINVAL; if (get_user(fourth.__pad, (void __user * __user *) ptr)) return -EFAULT; - return sys_semctl (first, second, third, fourth); + return sys_semctl(first, (int)second, third, fourth); } case MSGSND: return sys_msgsnd (first, (struct msgbuf __user *) ptr, - second, third); + (size_t)second, third); break; case MSGRCV: if (!ptr) @@ -179,15 +180,17 @@ sizeof (struct ipc_kludge))) return -EFAULT; return sys_msgrcv (first, tmp.msgp, - second, tmp.msgtyp, third); + (size_t)second, tmp.msgtyp, third); case MSGGET: - return sys_msgget ((key_t) first, second); + return sys_msgget((key_t)first, (int)second); case MSGCTL: - return sys_msgctl (first, second, (struct msqid_ds __user *) ptr); + return sys_msgctl(first, (int)second, + (struct msqid_ds __user *)ptr); case SHMAT: { ulong raddr; - ret = do_shmat (first, (char __user *) ptr, second, &raddr); + ret = do_shmat(first, (char __user *)ptr, + (int)second, &raddr); if (ret) return ret; return put_user (raddr, (ulong __user *) third); @@ -196,9 +199,9 @@ case SHMDT: return sys_shmdt ((char __user *)ptr); case SHMGET: - return sys_shmget (first, second, third); + return sys_shmget(first, (size_t)second, third); case SHMCTL: - return sys_shmctl (first, second, + return sys_shmctl(first, (int)second, (struct shmid_ds __user *) ptr); default: return -ENOSYS; diff -urN linux-2.6.11-rc3/arch/s390/mm/cmm.c linux-2.6.11-rc4/arch/s390/mm/cmm.c --- linux-2.6.11-rc3/arch/s390/mm/cmm.c 2005-02-12 19:50:36.225776288 -0800 +++ linux-2.6.11-rc4/arch/s390/mm/cmm.c 2005-02-12 19:50:53.874540339 -0800 @@ -19,7 +19,6 @@ #include #include -#include #include "../../../drivers/s390/net/smsgiucv.h" diff -urN linux-2.6.11-rc3/arch/s390/mm/extmem.c linux-2.6.11-rc4/arch/s390/mm/extmem.c --- linux-2.6.11-rc3/arch/s390/mm/extmem.c 2005-02-12 19:50:36.226776331 -0800 +++ linux-2.6.11-rc4/arch/s390/mm/extmem.c 2005-02-12 19:50:53.875540383 -0800 @@ -576,8 +576,8 @@ segtype_string[seg->range[i].start & 0xff]); } sprintf(cmd2, "SAVESEG %s", name); - cpcmd(cmd1, NULL, 80); - cpcmd(cmd2, NULL, 80); + cpcmd(cmd1, NULL, 0); + cpcmd(cmd2, NULL, 0); spin_unlock(&dcss_lock); } diff -urN linux-2.6.11-rc3/arch/s390/mm/mmap.c linux-2.6.11-rc4/arch/s390/mm/mmap.c --- linux-2.6.11-rc3/arch/s390/mm/mmap.c 2004-12-24 13:33:48.000000000 -0800 +++ linux-2.6.11-rc4/arch/s390/mm/mmap.c 2005-02-12 19:50:53.876540426 -0800 @@ -26,6 +26,7 @@ #include #include +#include /* * Top of mmap area (just below the process stack). @@ -81,3 +82,5 @@ mm->unmap_area = arch_unmap_area_topdown; } } +EXPORT_SYMBOL_GPL(arch_pick_mmap_layout); + diff -urN linux-2.6.11-rc3/arch/sparc/kernel/pcic.c linux-2.6.11-rc4/arch/sparc/kernel/pcic.c --- linux-2.6.11-rc3/arch/sparc/kernel/pcic.c 2005-02-12 19:50:36.322780487 -0800 +++ linux-2.6.11-rc4/arch/sparc/kernel/pcic.c 2005-02-12 19:50:53.971544539 -0800 @@ -975,60 +975,66 @@ * We do not use horroble macroses here because we want to * advance pointer by sizeof(size). */ -void outsb(void * __iomem addr, const void *src, unsigned long count) { +void outsb(unsigned long addr, const void *src, unsigned long count) +{ while (count) { count -= 1; - writeb(*(const char *)src, addr); + outb(*(const char *)src, addr); src += 1; - addr += 1; + /* addr += 1; */ } } -void outsw(void * __iomem addr, const void *src, unsigned long count) { +void outsw(unsigned long addr, const void *src, unsigned long count) +{ while (count) { count -= 2; - writew(*(const short *)src, addr); + outw(*(const short *)src, addr); src += 2; - addr += 2; + /* addr += 2; */ } } -void outsl(void * __iomem addr, const void *src, unsigned long count) { +void outsl(unsigned long addr, const void *src, unsigned long count) +{ while (count) { count -= 4; - writel(*(const long *)src, addr); + outl(*(const long *)src, addr); src += 4; - addr += 4; + /* addr += 4; */ } } -void insb(void * __iomem addr, void *dst, unsigned long count) { +void insb(unsigned long addr, void *dst, unsigned long count) +{ while (count) { count -= 1; - *(unsigned char *)dst = readb(addr); + *(unsigned char *)dst = inb(addr); dst += 1; - addr += 1; + /* addr += 1; */ } } -void insw(void * __iomem addr, void *dst, unsigned long count) { +void insw(unsigned long addr, void *dst, unsigned long count) +{ while (count) { count -= 2; - *(unsigned short *)dst = readw(addr); + *(unsigned short *)dst = inw(addr); dst += 2; - addr += 2; + /* addr += 2; */ } } -void insl(void * __iomem addr, void *dst, unsigned long count) { +void insl(unsigned long addr, void *dst, unsigned long count) +{ while (count) { count -= 4; /* * XXX I am sure we are in for an unaligned trap here. */ - *(unsigned long *)dst = readl(addr); + *(unsigned long *)dst = inl(addr); dst += 4; - addr += 4; + /* addr += 4; */ } } diff -urN linux-2.6.11-rc3/arch/sparc/kernel/ptrace.c linux-2.6.11-rc4/arch/sparc/kernel/ptrace.c --- linux-2.6.11-rc3/arch/sparc/kernel/ptrace.c 2004-12-24 13:35:40.000000000 -0800 +++ linux-2.6.11-rc4/arch/sparc/kernel/ptrace.c 2005-02-12 19:50:53.973544625 -0800 @@ -48,9 +48,9 @@ } static void -pt_succ_return_linux(struct pt_regs *regs, unsigned long value, long *addr) +pt_succ_return_linux(struct pt_regs *regs, unsigned long value, long __user *addr) { - if (put_user(value, (long __user *) addr)) { + if (put_user(value, addr)) { pt_error_return(regs, EFAULT); return; } @@ -61,7 +61,7 @@ } static void -pt_os_succ_return (struct pt_regs *regs, unsigned long val, long *addr) +pt_os_succ_return (struct pt_regs *regs, unsigned long val, long __user *addr) { if (current->personality == PER_SUNOS) pt_succ_return (regs, val); @@ -71,7 +71,7 @@ /* Fuck me gently with a chainsaw... */ static inline void read_sunos_user(struct pt_regs *regs, unsigned long offset, - struct task_struct *tsk, long *addr) + struct task_struct *tsk, long __user *addr) { struct pt_regs *cregs = tsk->thread.kregs; struct thread_info *t = tsk->thread_info; @@ -345,14 +345,14 @@ if (access_process_vm(child, addr, &tmp, sizeof(tmp), 0) == sizeof(tmp)) - pt_os_succ_return(regs, tmp, (long *)data); + pt_os_succ_return(regs, tmp, (long __user *)data); else pt_error_return(regs, EIO); goto out_tsk; } case PTRACE_PEEKUSR: - read_sunos_user(regs, addr, child, (long *) data); + read_sunos_user(regs, addr, child, (long __user *) data); goto out_tsk; case PTRACE_POKEUSR: diff -urN linux-2.6.11-rc3/arch/sparc/kernel/signal.c linux-2.6.11-rc4/arch/sparc/kernel/signal.c --- linux-2.6.11-rc3/arch/sparc/kernel/signal.c 2005-02-12 19:50:36.325780617 -0800 +++ linux-2.6.11-rc4/arch/sparc/kernel/signal.c 2005-02-12 19:50:53.975544712 -0800 @@ -535,7 +535,7 @@ sig_address = NULL; } } - err |= __put_user((long)sig_address, &sframep->sig_address); + err |= __put_user((unsigned long)sig_address, &sframep->sig_address); err |= __put_user(sig_code, &sframep->sig_code); err |= __put_user(sc, &sframep->sig_scptr); if (err) @@ -832,7 +832,7 @@ * to flush the user windows. */ for (window = 0; window < tp->w_saved; window++) { - err |= __put_user((int *) &(gw->win[window]), &gw->winptr[window]); + err |= __put_user((int __user *) &(gw->win[window]), &gw->winptr[window]); err |= __copy_to_user(&gw->win[window], &tp->reg_window[window], sizeof(svr4_rwindow_t)); diff -urN linux-2.6.11-rc3/arch/sparc/kernel/sparc_ksyms.c linux-2.6.11-rc4/arch/sparc/kernel/sparc_ksyms.c --- linux-2.6.11-rc3/arch/sparc/kernel/sparc_ksyms.c 2005-02-12 19:50:36.326780660 -0800 +++ linux-2.6.11-rc4/arch/sparc/kernel/sparc_ksyms.c 2005-02-12 19:50:53.976544755 -0800 @@ -202,6 +202,10 @@ #endif #ifdef CONFIG_PCI EXPORT_SYMBOL(ebus_chain); +EXPORT_SYMBOL(insb); +EXPORT_SYMBOL(outsb); +EXPORT_SYMBOL(insw); +EXPORT_SYMBOL(outsw); EXPORT_SYMBOL(insl); EXPORT_SYMBOL(outsl); EXPORT_SYMBOL(pci_alloc_consistent); diff -urN linux-2.6.11-rc3/arch/sparc/kernel/sys_sparc.c linux-2.6.11-rc4/arch/sparc/kernel/sys_sparc.c --- linux-2.6.11-rc3/arch/sparc/kernel/sys_sparc.c 2004-12-24 13:34:31.000000000 -0800 +++ linux-2.6.11-rc4/arch/sparc/kernel/sys_sparc.c 2005-02-12 19:50:53.978544842 -0800 @@ -197,8 +197,7 @@ goto out; } case 1: /* iBCS2 emulator entry point */ - err = do_shmat (first, (char __user *) ptr, - second, (ulong *) third); + err = -EINVAL; goto out; } case SHMDT: diff -urN linux-2.6.11-rc3/arch/sparc/lib/atomic32.c linux-2.6.11-rc4/arch/sparc/lib/atomic32.c --- linux-2.6.11-rc3/arch/sparc/lib/atomic32.c 2004-12-24 13:34:44.000000000 -0800 +++ linux-2.6.11-rc4/arch/sparc/lib/atomic32.c 2005-02-12 19:50:53.980544928 -0800 @@ -20,8 +20,9 @@ #else /* SMP */ +static spinlock_t dummy = SPIN_LOCK_UNLOCKED; #define ATOMIC_HASH_SIZE 1 -#define ATOMIC_HASH(a) 0 +#define ATOMIC_HASH(a) (&dummy) #endif /* SMP */ diff -urN linux-2.6.11-rc3/arch/sparc/mm/srmmu.c linux-2.6.11-rc4/arch/sparc/mm/srmmu.c --- linux-2.6.11-rc3/arch/sparc/mm/srmmu.c 2005-02-12 19:50:36.335781050 -0800 +++ linux-2.6.11-rc4/arch/sparc/mm/srmmu.c 2005-02-12 19:50:53.986545188 -0800 @@ -133,11 +133,12 @@ static unsigned long srmmu_pte_pfn(pte_t pte) { if (srmmu_device_memory(pte_val(pte))) { - /* XXX Anton obviously had something in mind when he did this. - * But what? + /* Just return something that will cause + * pfn_valid() to return false. This makes + * copy_one_pte() to just directly copy to + * PTE over. */ - /* return (struct page *)~0; */ - BUG(); + return ~0UL; } return (pte_val(pte) & SRMMU_PTE_PMASK) >> (PAGE_SHIFT-4); } diff -urN linux-2.6.11-rc3/arch/sparc64/defconfig linux-2.6.11-rc4/arch/sparc64/defconfig --- linux-2.6.11-rc3/arch/sparc64/defconfig 2005-02-12 19:50:36.340781267 -0800 +++ linux-2.6.11-rc4/arch/sparc64/defconfig 2005-02-12 19:50:53.992545448 -0800 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.11-rc1 -# Fri Jan 21 20:03:21 2005 +# Linux kernel version: 2.6.11-rc3 +# Mon Feb 7 15:29:00 2005 # CONFIG_64BIT=y CONFIG_MMU=y @@ -845,6 +845,7 @@ CONFIG_BT_HCIUART_BCSP=y CONFIG_BT_HCIUART_BCSP_TXCRC=y CONFIG_BT_HCIBCM203X=m +CONFIG_BT_HCIBPA10X=m CONFIG_BT_HCIBFUSB=m CONFIG_BT_HCIVHCI=m CONFIG_NETDEVICES=y @@ -1245,7 +1246,12 @@ # CONFIG_JFS_DEBUG is not set # CONFIG_JFS_STATISTICS is not set CONFIG_FS_POSIX_ACL=y + +# +# XFS support +# CONFIG_XFS_FS=m +CONFIG_XFS_EXPORT=y # CONFIG_XFS_RT is not set CONFIG_XFS_QUOTA=y CONFIG_XFS_SECURITY=y @@ -1520,6 +1526,11 @@ CONFIG_DVB_VES1820=m CONFIG_DVB_TDA10021=m CONFIG_DVB_STV0297=m + +# +# ATSC (North American/Korean Terresterial DTV) frontends +# +CONFIG_DVB_NXT2002=m CONFIG_VIDEO_SAA7146=m CONFIG_VIDEO_SAA7146_VV=m CONFIG_VIDEO_VIDEOBUF=m @@ -1527,6 +1538,7 @@ CONFIG_VIDEO_BUF=m CONFIG_VIDEO_BTCX=m CONFIG_VIDEO_IR=m +CONFIG_VIDEO_TVEEPROM=m # # Sound diff -urN linux-2.6.11-rc3/arch/sparc64/kernel/binfmt_aout32.c linux-2.6.11-rc4/arch/sparc64/kernel/binfmt_aout32.c --- linux-2.6.11-rc3/arch/sparc64/kernel/binfmt_aout32.c 2005-02-12 19:50:36.342781353 -0800 +++ linux-2.6.11-rc4/arch/sparc64/kernel/binfmt_aout32.c 2005-02-12 19:50:53.993545491 -0800 @@ -333,9 +333,8 @@ current->mm->start_stack = (unsigned long) create_aout32_tables((char __user *)bprm->p, bprm); if (!(orig_thr_flags & _TIF_32BIT)) { - unsigned long pgd_cache; + unsigned long pgd_cache = get_pgd_cache(current->mm->pgd); - pgd_cache = ((unsigned long)current->mm->pgd[0])<<11UL; __asm__ __volatile__("stxa\t%0, [%1] %2\n\t" "membar #Sync" : /* no outputs */ diff -urN linux-2.6.11-rc3/arch/sparc64/kernel/process.c linux-2.6.11-rc4/arch/sparc64/kernel/process.c --- linux-2.6.11-rc3/arch/sparc64/kernel/process.c 2005-02-12 19:50:36.349781656 -0800 +++ linux-2.6.11-rc4/arch/sparc64/kernel/process.c 2005-02-12 19:50:54.000545794 -0800 @@ -440,7 +440,7 @@ pmd_t *page = pmd_alloc_one(mm, 0); pud_set(pud0, page); } - pgd_cache = ((unsigned long) pud_val(*pud0)) << 11UL; + pgd_cache = get_pgd_cache(pgd0); } __asm__ __volatile__("stxa %0, [%1] %2\n\t" "membar #Sync" diff -urN linux-2.6.11-rc3/arch/sparc64/kernel/ptrace.c linux-2.6.11-rc4/arch/sparc64/kernel/ptrace.c --- linux-2.6.11-rc3/arch/sparc64/kernel/ptrace.c 2004-12-24 13:35:39.000000000 -0800 +++ linux-2.6.11-rc4/arch/sparc64/kernel/ptrace.c 2005-02-12 19:50:54.001545838 -0800 @@ -50,7 +50,7 @@ } static inline void -pt_succ_return_linux(struct pt_regs *regs, unsigned long value, long *addr) +pt_succ_return_linux(struct pt_regs *regs, unsigned long value, void __user *addr) { if (test_thread_flag(TIF_32BIT)) { if (put_user(value, (unsigned int __user *) addr)) { @@ -70,7 +70,7 @@ } static void -pt_os_succ_return (struct pt_regs *regs, unsigned long val, long *addr) +pt_os_succ_return (struct pt_regs *regs, unsigned long val, void __user *addr) { if (current->personality == PER_SUNOS) pt_succ_return (regs, val); @@ -226,7 +226,7 @@ if (res < 0) pt_error_return(regs, -res); else - pt_os_succ_return(regs, tmp64, (long *) data); + pt_os_succ_return(regs, tmp64, (void __user *) data); goto flush_and_out; } diff -urN linux-2.6.11-rc3/arch/sparc64/kernel/smp.c linux-2.6.11-rc4/arch/sparc64/kernel/smp.c --- linux-2.6.11-rc3/arch/sparc64/kernel/smp.c 2005-02-12 19:50:36.352781786 -0800 +++ linux-2.6.11-rc4/arch/sparc64/kernel/smp.c 2005-02-12 19:50:54.004545968 -0800 @@ -894,9 +894,8 @@ void smp_capture(void) { - int result = __atomic_add(1, &smp_capture_depth); + int result = atomic_add_ret(1, &smp_capture_depth); - membar("#StoreStore | #LoadStore"); if (result == 1) { int ncpus = num_online_cpus(); diff -urN linux-2.6.11-rc3/arch/sparc64/kernel/sparc64_ksyms.c linux-2.6.11-rc4/arch/sparc64/kernel/sparc64_ksyms.c --- linux-2.6.11-rc3/arch/sparc64/kernel/sparc64_ksyms.c 2005-02-12 19:50:36.353781829 -0800 +++ linux-2.6.11-rc4/arch/sparc64/kernel/sparc64_ksyms.c 2005-02-12 19:50:54.005546011 -0800 @@ -172,18 +172,25 @@ EXPORT_SYMBOL(up); /* Atomic counter implementation. */ -EXPORT_SYMBOL(__atomic_add); -EXPORT_SYMBOL(__atomic_sub); -EXPORT_SYMBOL(__atomic64_add); -EXPORT_SYMBOL(__atomic64_sub); +EXPORT_SYMBOL(atomic_add); +EXPORT_SYMBOL(atomic_add_ret); +EXPORT_SYMBOL(atomic_sub); +EXPORT_SYMBOL(atomic_sub_ret); +EXPORT_SYMBOL(atomic64_add); +EXPORT_SYMBOL(atomic64_add_ret); +EXPORT_SYMBOL(atomic64_sub); +EXPORT_SYMBOL(atomic64_sub_ret); #ifdef CONFIG_SMP EXPORT_SYMBOL(_atomic_dec_and_lock); #endif /* Atomic bit operations. */ -EXPORT_SYMBOL(___test_and_set_bit); -EXPORT_SYMBOL(___test_and_clear_bit); -EXPORT_SYMBOL(___test_and_change_bit); +EXPORT_SYMBOL(test_and_set_bit); +EXPORT_SYMBOL(test_and_clear_bit); +EXPORT_SYMBOL(test_and_change_bit); +EXPORT_SYMBOL(set_bit); +EXPORT_SYMBOL(clear_bit); +EXPORT_SYMBOL(change_bit); /* Bit searching */ EXPORT_SYMBOL(find_next_bit); diff -urN linux-2.6.11-rc3/arch/sparc64/kernel/sys_sparc.c linux-2.6.11-rc4/arch/sparc64/kernel/sys_sparc.c --- linux-2.6.11-rc3/arch/sparc64/kernel/sys_sparc.c 2004-12-24 13:34:58.000000000 -0800 +++ linux-2.6.11-rc4/arch/sparc64/kernel/sys_sparc.c 2005-02-12 19:50:54.006546054 -0800 @@ -199,7 +199,8 @@ * This is really horribly ugly. */ -asmlinkage long sys_ipc(unsigned int call, int first, int second, unsigned long third, void __user *ptr, long fifth) +asmlinkage long sys_ipc(unsigned int call, int first, unsigned long second, + unsigned long third, void __user *ptr, long fifth) { int err; @@ -207,14 +208,15 @@ if (call <= SEMCTL) { switch (call) { case SEMOP: - err = sys_semtimedop(first, ptr, second, NULL); + err = sys_semtimedop(first, ptr, + (unsigned)second, NULL); goto out; case SEMTIMEDOP: - err = sys_semtimedop(first, ptr, second, + err = sys_semtimedop(first, ptr, (unsigned)second, (const struct timespec __user *) fifth); goto out; case SEMGET: - err = sys_semget(first, second, (int)third); + err = sys_semget(first, (int)second, (int)third); goto out; case SEMCTL: { union semun fourth; @@ -225,7 +227,7 @@ if (get_user(fourth.__pad, (void __user * __user *) ptr)) goto out; - err = sys_semctl(first, second | IPC_64, + err = sys_semctl(first, (int)second | IPC_64, (int)third, fourth); goto out; } @@ -237,17 +239,18 @@ if (call <= MSGCTL) { switch (call) { case MSGSND: - err = sys_msgsnd(first, ptr, second, (int)third); + err = sys_msgsnd(first, ptr, (size_t)second, + (int)third); goto out; case MSGRCV: - err = sys_msgrcv(first, ptr, second, fifth, + err = sys_msgrcv(first, ptr, (size_t)second, fifth, (int)third); goto out; case MSGGET: - err = sys_msgget((key_t) first, second); + err = sys_msgget((key_t)first, (int)second); goto out; case MSGCTL: - err = sys_msgctl(first, second | IPC_64, ptr); + err = sys_msgctl(first, (int)second | IPC_64, ptr); goto out; default: err = -ENOSYS; @@ -258,7 +261,7 @@ switch (call) { case SHMAT: { ulong raddr; - err = do_shmat(first, ptr, second, &raddr); + err = do_shmat(first, ptr, (int)second, &raddr); if (!err) { if (put_user(raddr, (ulong __user *) third)) @@ -270,10 +273,10 @@ err = sys_shmdt(ptr); goto out; case SHMGET: - err = sys_shmget(first, second, (int)third); + err = sys_shmget(first, (size_t)second, (int)third); goto out; case SHMCTL: - err = sys_shmctl(first, second | IPC_64, ptr); + err = sys_shmctl(first, (int)second | IPC_64, ptr); goto out; default: err = -ENOSYS; diff -urN linux-2.6.11-rc3/arch/sparc64/kernel/sys_sparc32.c linux-2.6.11-rc4/arch/sparc64/kernel/sys_sparc32.c --- linux-2.6.11-rc3/arch/sparc64/kernel/sys_sparc32.c 2005-02-12 19:50:36.354781873 -0800 +++ linux-2.6.11-rc4/arch/sparc64/kernel/sys_sparc32.c 2005-02-12 19:50:54.007546097 -0800 @@ -835,7 +835,7 @@ err = sys_shmdt(ptr); goto out; case SHMGET: - err = sys_shmget(first, second, third); + err = sys_shmget(first, (unsigned)second, third); goto out; case SHMCTL: err = do_sys32_shmctl(first, second, ptr); diff -urN linux-2.6.11-rc3/arch/sparc64/lib/atomic.S linux-2.6.11-rc4/arch/sparc64/lib/atomic.S --- linux-2.6.11-rc3/arch/sparc64/lib/atomic.S 2005-02-12 19:50:36.359782089 -0800 +++ linux-2.6.11-rc4/arch/sparc64/lib/atomic.S 2005-02-12 19:50:54.012546314 -0800 @@ -4,73 +4,136 @@ * Copyright (C) 1999 David S. Miller (davem@redhat.com) */ +#include #include + /* On SMP we need to use memory barriers to ensure + * correct memory operation ordering, nop these out + * for uniprocessor. + */ +#ifdef CONFIG_SMP +#define ATOMIC_PRE_BARRIER membar #StoreLoad | #LoadLoad +#define ATOMIC_POST_BARRIER membar #StoreLoad | #StoreStore +#else +#define ATOMIC_PRE_BARRIER nop +#define ATOMIC_POST_BARRIER nop +#endif + .text - /* We use these stubs for the uncommon case - * of contention on the atomic value. This is - * so that we can keep the main fast path 8 - * instructions long and thus fit into a single - * L2 cache line. + /* Two versions of the atomic routines, one that + * does not return a value and does not perform + * memory barriers, and a second which returns + * a value and does the barriers. */ -__atomic_add_membar: - ba,pt %xcc, __atomic_add - membar #StoreLoad | #StoreStore - -__atomic_sub_membar: - ba,pt %xcc, __atomic_sub - membar #StoreLoad | #StoreStore - - .align 64 - .globl __atomic_add - .type __atomic_add,#function -__atomic_add: /* %o0 = increment, %o1 = atomic_ptr */ - lduw [%o1], %g5 + .globl atomic_add + .type atomic_add,#function +atomic_add: /* %o0 = increment, %o1 = atomic_ptr */ +1: lduw [%o1], %g5 + add %g5, %o0, %g7 + cas [%o1], %g5, %g7 + cmp %g5, %g7 + bne,pn %icc, 1b + nop + retl + nop + .size atomic_add, .-atomic_add + + .globl atomic_sub + .type atomic_sub,#function +atomic_sub: /* %o0 = decrement, %o1 = atomic_ptr */ +1: lduw [%o1], %g5 + sub %g5, %o0, %g7 + cas [%o1], %g5, %g7 + cmp %g5, %g7 + bne,pn %icc, 1b + nop + retl + nop + .size atomic_sub, .-atomic_sub + + .globl atomic_add_ret + .type atomic_add_ret,#function +atomic_add_ret: /* %o0 = increment, %o1 = atomic_ptr */ + ATOMIC_PRE_BARRIER +1: lduw [%o1], %g5 add %g5, %o0, %g7 cas [%o1], %g5, %g7 cmp %g5, %g7 - bne,pn %icc, __atomic_add_membar + bne,pn %icc, 1b add %g7, %o0, %g7 + ATOMIC_POST_BARRIER retl sra %g7, 0, %o0 - .size __atomic_add, .-__atomic_add + .size atomic_add_ret, .-atomic_add_ret - .globl __atomic_sub - .type __atomic_sub,#function -__atomic_sub: /* %o0 = increment, %o1 = atomic_ptr */ - lduw [%o1], %g5 + .globl atomic_sub_ret + .type atomic_sub_ret,#function +atomic_sub_ret: /* %o0 = decrement, %o1 = atomic_ptr */ + ATOMIC_PRE_BARRIER +1: lduw [%o1], %g5 sub %g5, %o0, %g7 cas [%o1], %g5, %g7 cmp %g5, %g7 - bne,pn %icc, __atomic_sub_membar + bne,pn %icc, 1b sub %g7, %o0, %g7 + ATOMIC_POST_BARRIER retl sra %g7, 0, %o0 - .size __atomic_sub, .-__atomic_sub + .size atomic_sub_ret, .-atomic_sub_ret - .globl __atomic64_add - .type __atomic64_add,#function -__atomic64_add: /* %o0 = increment, %o1 = atomic_ptr */ - ldx [%o1], %g5 + .globl atomic64_add + .type atomic64_add,#function +atomic64_add: /* %o0 = increment, %o1 = atomic_ptr */ +1: ldx [%o1], %g5 add %g5, %o0, %g7 casx [%o1], %g5, %g7 cmp %g5, %g7 - bne,pn %xcc, __atomic64_add - membar #StoreLoad | #StoreStore + bne,pn %xcc, 1b + nop retl - add %g7, %o0, %o0 - .size __atomic64_add, .-__atomic64_add + nop + .size atomic64_add, .-atomic64_add - .globl __atomic64_sub - .type __atomic64_sub,#function -__atomic64_sub: /* %o0 = increment, %o1 = atomic_ptr */ - ldx [%o1], %g5 + .globl atomic64_sub + .type atomic64_sub,#function +atomic64_sub: /* %o0 = decrement, %o1 = atomic_ptr */ +1: ldx [%o1], %g5 sub %g5, %o0, %g7 casx [%o1], %g5, %g7 cmp %g5, %g7 - bne,pn %xcc, __atomic64_sub - membar #StoreLoad | #StoreStore + bne,pn %xcc, 1b + nop + retl + nop + .size atomic64_sub, .-atomic64_sub + + .globl atomic64_add_ret + .type atomic64_add_ret,#function +atomic64_add_ret: /* %o0 = increment, %o1 = atomic_ptr */ + ATOMIC_PRE_BARRIER +1: ldx [%o1], %g5 + add %g5, %o0, %g7 + casx [%o1], %g5, %g7 + cmp %g5, %g7 + bne,pn %xcc, 1b + add %g7, %o0, %g7 + ATOMIC_POST_BARRIER + retl + mov %g7, %o0 + .size atomic64_add_ret, .-atomic64_add_ret + + .globl atomic64_sub_ret + .type atomic64_sub_ret,#function +atomic64_sub_ret: /* %o0 = decrement, %o1 = atomic_ptr */ + ATOMIC_PRE_BARRIER +1: ldx [%o1], %g5 + sub %g5, %o0, %g7 + casx [%o1], %g5, %g7 + cmp %g5, %g7 + bne,pn %xcc, 1b + sub %g7, %o0, %g7 + ATOMIC_POST_BARRIER retl - sub %g7, %o0, %o0 - .size __atomic64_sub, .-__atomic64_sub + mov %g7, %o0 + .size atomic64_sub_ret, .-atomic64_sub_ret diff -urN linux-2.6.11-rc3/arch/sparc64/lib/bitops.S linux-2.6.11-rc4/arch/sparc64/lib/bitops.S --- linux-2.6.11-rc3/arch/sparc64/lib/bitops.S 2004-12-24 13:35:27.000000000 -0800 +++ linux-2.6.11-rc4/arch/sparc64/lib/bitops.S 2005-02-12 19:50:54.013546357 -0800 @@ -4,69 +4,142 @@ * Copyright (C) 2000 David S. Miller (davem@redhat.com) */ +#include #include + /* On SMP we need to use memory barriers to ensure + * correct memory operation ordering, nop these out + * for uniprocessor. + */ +#ifdef CONFIG_SMP +#define BITOP_PRE_BARRIER membar #StoreLoad | #LoadLoad +#define BITOP_POST_BARRIER membar #StoreLoad | #StoreStore +#else +#define BITOP_PRE_BARRIER nop +#define BITOP_POST_BARRIER nop +#endif + .text - .align 64 - .globl ___test_and_set_bit - .type ___test_and_set_bit,#function -___test_and_set_bit: /* %o0=nr, %o1=addr */ + + .globl test_and_set_bit + .type test_and_set_bit,#function +test_and_set_bit: /* %o0=nr, %o1=addr */ + BITOP_PRE_BARRIER + srlx %o0, 6, %g1 + mov 1, %g5 + sllx %g1, 3, %g3 + and %o0, 63, %g2 + sllx %g5, %g2, %g5 + add %o1, %g3, %o1 +1: ldx [%o1], %g7 + or %g7, %g5, %g1 + casx [%o1], %g7, %g1 + cmp %g7, %g1 + bne,pn %xcc, 1b + and %g7, %g5, %g2 + BITOP_POST_BARRIER + clr %o0 + retl + movrne %g2, 1, %o0 + .size test_and_set_bit, .-test_and_set_bit + + .globl test_and_clear_bit + .type test_and_clear_bit,#function +test_and_clear_bit: /* %o0=nr, %o1=addr */ + BITOP_PRE_BARRIER + srlx %o0, 6, %g1 + mov 1, %g5 + sllx %g1, 3, %g3 + and %o0, 63, %g2 + sllx %g5, %g2, %g5 + add %o1, %g3, %o1 +1: ldx [%o1], %g7 + andn %g7, %g5, %g1 + casx [%o1], %g7, %g1 + cmp %g7, %g1 + bne,pn %xcc, 1b + and %g7, %g5, %g2 + BITOP_POST_BARRIER + clr %o0 + retl + movrne %g2, 1, %o0 + .size test_and_clear_bit, .-test_and_clear_bit + + .globl test_and_change_bit + .type test_and_change_bit,#function +test_and_change_bit: /* %o0=nr, %o1=addr */ + BITOP_PRE_BARRIER + srlx %o0, 6, %g1 + mov 1, %g5 + sllx %g1, 3, %g3 + and %o0, 63, %g2 + sllx %g5, %g2, %g5 + add %o1, %g3, %o1 +1: ldx [%o1], %g7 + xor %g7, %g5, %g1 + casx [%o1], %g7, %g1 + cmp %g7, %g1 + bne,pn %xcc, 1b + and %g7, %g5, %g2 + BITOP_POST_BARRIER + clr %o0 + retl + movrne %g2, 1, %o0 + .size test_and_change_bit, .-test_and_change_bit + + .globl set_bit + .type set_bit,#function +set_bit: /* %o0=nr, %o1=addr */ srlx %o0, 6, %g1 mov 1, %g5 sllx %g1, 3, %g3 and %o0, 63, %g2 sllx %g5, %g2, %g5 add %o1, %g3, %o1 - ldx [%o1], %g7 -1: andcc %g7, %g5, %o0 - bne,pn %xcc, 2f - xor %g7, %g5, %g1 +1: ldx [%o1], %g7 + or %g7, %g5, %g1 casx [%o1], %g7, %g1 cmp %g7, %g1 - bne,a,pn %xcc, 1b - ldx [%o1], %g7 -2: retl - membar #StoreLoad | #StoreStore - .size ___test_and_set_bit, .-___test_and_set_bit + bne,pn %xcc, 1b + nop + retl + nop + .size set_bit, .-set_bit - .globl ___test_and_clear_bit - .type ___test_and_clear_bit,#function -___test_and_clear_bit: /* %o0=nr, %o1=addr */ + .globl clear_bit + .type clear_bit,#function +clear_bit: /* %o0=nr, %o1=addr */ srlx %o0, 6, %g1 mov 1, %g5 sllx %g1, 3, %g3 and %o0, 63, %g2 sllx %g5, %g2, %g5 add %o1, %g3, %o1 - ldx [%o1], %g7 -1: andcc %g7, %g5, %o0 - be,pn %xcc, 2f - xor %g7, %g5, %g1 +1: ldx [%o1], %g7 + andn %g7, %g5, %g1 casx [%o1], %g7, %g1 cmp %g7, %g1 - bne,a,pn %xcc, 1b - ldx [%o1], %g7 -2: retl - membar #StoreLoad | #StoreStore - .size ___test_and_clear_bit, .-___test_and_clear_bit + bne,pn %xcc, 1b + nop + retl + nop + .size clear_bit, .-clear_bit - .globl ___test_and_change_bit - .type ___test_and_change_bit,#function -___test_and_change_bit: /* %o0=nr, %o1=addr */ + .globl change_bit + .type change_bit,#function +change_bit: /* %o0=nr, %o1=addr */ srlx %o0, 6, %g1 mov 1, %g5 sllx %g1, 3, %g3 and %o0, 63, %g2 sllx %g5, %g2, %g5 add %o1, %g3, %o1 - ldx [%o1], %g7 -1: and %g7, %g5, %o0 +1: ldx [%o1], %g7 xor %g7, %g5, %g1 casx [%o1], %g7, %g1 cmp %g7, %g1 - bne,a,pn %xcc, 1b - ldx [%o1], %g7 -2: retl - membar #StoreLoad | #StoreStore - nop - .size ___test_and_change_bit, .-___test_and_change_bit + bne,pn %xcc, 1b + nop + retl + nop + .size change_bit, .-change_bit diff -urN linux-2.6.11-rc3/arch/sparc64/lib/debuglocks.c linux-2.6.11-rc4/arch/sparc64/lib/debuglocks.c --- linux-2.6.11-rc3/arch/sparc64/lib/debuglocks.c 2004-12-24 13:35:00.000000000 -0800 +++ linux-2.6.11-rc4/arch/sparc64/lib/debuglocks.c 2005-02-12 19:50:54.013546357 -0800 @@ -172,6 +172,7 @@ runlock_again: /* Spin trying to decrement the counter using casx. */ __asm__ __volatile__( +" membar #StoreLoad | #LoadLoad\n" " ldx [%0], %%g5\n" " sub %%g5, 1, %%g7\n" " casx [%0], %%g5, %%g7\n" @@ -290,6 +291,7 @@ current->thread.smp_lock_count--; wlock_again: __asm__ __volatile__( +" membar #StoreLoad | #LoadLoad\n" " mov 1, %%g3\n" " sllx %%g3, 63, %%g3\n" " ldx [%0], %%g5\n" diff -urN linux-2.6.11-rc3/arch/sparc64/lib/user_fixup.c linux-2.6.11-rc4/arch/sparc64/lib/user_fixup.c --- linux-2.6.11-rc3/arch/sparc64/lib/user_fixup.c 2004-12-24 13:35:15.000000000 -0800 +++ linux-2.6.11-rc4/arch/sparc64/lib/user_fixup.c 2005-02-12 19:50:54.015546444 -0800 @@ -20,11 +20,12 @@ char *dst = to; const char __user *src = from; - while (size--) { + while (size) { if (__get_user(*dst, src)) break; dst++; src++; + size--; } if (size) @@ -38,11 +39,12 @@ char __user *dst = to; const char *src = from; - while (size--) { + while (size) { if (__put_user(*src, dst)) break; dst++; src++; + size--; } return size; @@ -53,7 +55,7 @@ char __user *dst = to; char __user *src = from; - while (size--) { + while (size) { char tmp; if (__get_user(tmp, src)) @@ -62,6 +64,7 @@ break; dst++; src++; + size--; } return size; diff -urN linux-2.6.11-rc3/arch/sparc64/prom/memory.c linux-2.6.11-rc4/arch/sparc64/prom/memory.c --- linux-2.6.11-rc3/arch/sparc64/prom/memory.c 2004-12-24 13:35:24.000000000 -0800 +++ linux-2.6.11-rc4/arch/sparc64/prom/memory.c 2005-02-12 19:50:54.020546660 -0800 @@ -45,9 +45,9 @@ unsigned long tmpaddr, tmpsize; unsigned long lowest; - for(i=0; thislist[i].theres_more != 0; i++) { + for(i=0; thislist[i].theres_more; i++) { lowest = thislist[i].start_adr; - for(mitr = i+1; thislist[mitr-1].theres_more != 0; mitr++) + for(mitr = i+1; thislist[mitr-1].theres_more; mitr++) if(thislist[mitr].start_adr < lowest) { lowest = thislist[mitr].start_adr; swapi = mitr; @@ -83,7 +83,7 @@ prom_phys_avail[iter].theres_more = &prom_phys_avail[iter+1]; } - prom_phys_avail[iter-1].theres_more = 0x0; + prom_phys_avail[iter-1].theres_more = NULL; num_regs = prom_getproperty(node, "reg", (char *) prom_reg_memlist, @@ -97,7 +97,7 @@ prom_phys_total[iter].theres_more = &prom_phys_total[iter+1]; } - prom_phys_total[iter-1].theres_more = 0x0; + prom_phys_total[iter-1].theres_more = NULL; node = prom_finddevice("/virtual-memory"); num_regs = prom_getproperty(node, "available", @@ -116,7 +116,7 @@ prom_prom_taken[iter].theres_more = &prom_prom_taken[iter+1]; } - prom_prom_taken[iter-1].theres_more = 0x0; + prom_prom_taken[iter-1].theres_more = NULL; prom_sortmemlist(prom_prom_taken); diff -urN linux-2.6.11-rc3/arch/um/Kconfig linux-2.6.11-rc4/arch/um/Kconfig --- linux-2.6.11-rc3/arch/um/Kconfig 2005-02-12 19:50:36.368782479 -0800 +++ linux-2.6.11-rc4/arch/um/Kconfig 2005-02-12 19:50:54.037547396 -0800 @@ -313,11 +313,9 @@ source "drivers/mtd/Kconfig" endif +#This is just to shut up some Kconfig warnings, so no prompt. config INPUT - bool "Dummy option" - depends BROKEN + bool default n - help - This is a dummy option to get rid of warnings. source "arch/um/Kconfig.debug" diff -urN linux-2.6.11-rc3/arch/um/Kconfig_arch linux-2.6.11-rc4/arch/um/Kconfig_arch --- linux-2.6.11-rc3/arch/um/Kconfig_arch 2005-02-12 19:50:36.369782522 -0800 +++ linux-2.6.11-rc4/arch/um/Kconfig_arch 1969-12-31 16:00:00.000000000 -0800 @@ -1,16 +0,0 @@ -config 64_BIT - bool - default n - -config TOP_ADDR - hex - default 0xc0000000 if !HOST_2G_2G - default 0x80000000 if HOST_2G_2G - -config 3_LEVEL_PGTABLES - bool "Three-level pagetables" - default n - help - Three-level pagetables will let UML have more than 4G of physical - memory. All the memory that can't be mapped directly will be treated - as high memory. diff -urN linux-2.6.11-rc3/arch/um/Kconfig_i386 linux-2.6.11-rc4/arch/um/Kconfig_i386 --- linux-2.6.11-rc3/arch/um/Kconfig_i386 2005-02-12 19:50:36.373782695 -0800 +++ linux-2.6.11-rc4/arch/um/Kconfig_i386 2005-02-12 19:50:54.040547526 -0800 @@ -18,3 +18,7 @@ config ARCH_HAS_SC_SIGNALS bool default y + +config ARCH_REUSE_HOST_VSYSCALL_AREA + bool + default y diff -urN linux-2.6.11-rc3/arch/um/Kconfig_x86_64 linux-2.6.11-rc4/arch/um/Kconfig_x86_64 --- linux-2.6.11-rc3/arch/um/Kconfig_x86_64 2005-02-12 19:50:36.373782695 -0800 +++ linux-2.6.11-rc4/arch/um/Kconfig_x86_64 2005-02-12 19:50:54.040547526 -0800 @@ -9,3 +9,7 @@ config ARCH_HAS_SC_SIGNALS bool default n + +config ARCH_REUSE_HOST_VSYSCALL_AREA + bool + default n diff -urN linux-2.6.11-rc3/arch/um/Makefile linux-2.6.11-rc4/arch/um/Makefile --- linux-2.6.11-rc3/arch/um/Makefile 2005-02-12 19:50:36.374782739 -0800 +++ linux-2.6.11-rc4/arch/um/Makefile 2005-02-12 19:50:54.041547569 -0800 @@ -20,8 +20,11 @@ arch-signal.h module.h vm-flags.h SYMLINK_HEADERS := $(foreach header,$(SYMLINK_HEADERS),include/asm-um/$(header)) -# The "os" symlink is only used by arch/um/include/os.h, which includes +# XXX: The "os" symlink is only used by arch/um/include/os.h, which includes # ../os/include/file.h +# +# These are cleaned up during mrproper. Please DO NOT fix it again, this is +# the Correct Thing(tm) to do! ARCH_SYMLINKS = include/asm-um/arch $(ARCH_DIR)/include/sysdep $(ARCH_DIR)/os \ $(SYMLINK_HEADERS) $(ARCH_DIR)/include/uml-config.h @@ -36,8 +39,8 @@ MAKEFILES-INCL += $(foreach mode,$(um-modes-y),\ $(srctree)/$(ARCH_DIR)/Makefile-$(mode)) -ifneq ($(MAKEFILE-INCL),) - include $(MAKEFILE-INCL) +ifneq ($(MAKEFILES-INCL),) + include $(MAKEFILES-INCL) endif ARCH_INCLUDE := -I$(ARCH_DIR)/include @@ -58,7 +61,7 @@ USER_CFLAGS := $(patsubst -I%,,$(CFLAGS)) USER_CFLAGS := $(patsubst -D__KERNEL__,,$(USER_CFLAGS)) $(ARCH_INCLUDE) \ - $(MODE_INCLUDE) + $(MODE_INCLUDE) $(ARCH_USER_CFLAGS) CFLAGS += -Derrno=kernel_errno -Dsigprocmask=kernel_sigprocmask CFLAGS += $(call cc-option,-fno-unit-at-a-time,) @@ -134,7 +137,8 @@ $(GEN_HEADERS) $(ARCH_DIR)/include/skas_ptregs.h MRPROPER_FILES += $(SYMLINK_HEADERS) $(ARCH_SYMLINKS) \ - $(addprefix $(ARCH_DIR)/kernel/,$(KERN_SYMLINKS)) $(ARCH_DIR)/os + $(addprefix $(ARCH_DIR)/kernel/,$(KERN_SYMLINKS)) $(ARCH_DIR)/os \ + $(ARCH_DIR)/Kconfig_arch archclean: $(Q)$(MAKE) $(clean)=$(ARCH_DIR)/util diff -urN linux-2.6.11-rc3/arch/um/include/ptrace_user.h linux-2.6.11-rc4/arch/um/include/ptrace_user.h --- linux-2.6.11-rc3/arch/um/include/ptrace_user.h 2005-02-12 19:50:36.409784254 -0800 +++ linux-2.6.11-rc4/arch/um/include/ptrace_user.h 2005-02-12 19:50:54.066548652 -0800 @@ -26,6 +26,26 @@ #define PTRACE_SYSEMU_SINGLESTEP 32 #endif +/* On architectures, that started to support PTRACE_O_TRACESYSGOOD + * in linux 2.4, there are two different definitions of + * PTRACE_SETOPTIONS: linux 2.4 uses 21 while linux 2.6 uses 0x4200. + * For binary compatibility, 2.6 also supports the old "21", named + * PTRACE_OLDSETOPTION. On these architectures, UML always must use + * "21", to ensure the kernel runs on 2.4 and 2.6 host without + * recompilation. So, we use PTRACE_OLDSETOPTIONS in UML. + * We also want to be able to build the kernel on 2.4, which doesn't + * have PTRACE_OLDSETOPTIONS. So, if it is missing, we declare + * PTRACE_OLDSETOPTIONS to to be the same as PTRACE_SETOPTIONS. + * + * On architectures, that start to support PTRACE_O_TRACESYSGOOD on + * linux 2.6, PTRACE_OLDSETOPTIONS never is defined, and also isn't + * supported by the host kernel. In that case, our trick lets us use + * the new 0x4200 with the name PTRACE_OLDSETOPTIONS. + */ +#ifndef PTRACE_OLDSETOPTIONS +#define PTRACE_OLDSETOPTIONS PTRACE_SETOPTIONS +#endif + void set_using_sysemu(int value); int get_using_sysemu(void); extern int sysemu_supported; diff -urN linux-2.6.11-rc3/arch/um/include/sysdep-x86_64/ptrace_user.h linux-2.6.11-rc4/arch/um/include/sysdep-x86_64/ptrace_user.h --- linux-2.6.11-rc3/arch/um/include/sysdep-x86_64/ptrace_user.h 2005-02-12 19:50:36.421784773 -0800 +++ linux-2.6.11-rc4/arch/um/include/sysdep-x86_64/ptrace_user.h 2005-02-12 19:50:54.079549215 -0800 @@ -49,10 +49,11 @@ #define MAX_REG_NR ((MAX_REG_OFFSET) / sizeof(unsigned long)) /* x86_64 FC3 doesn't define this in /usr/include/linux/ptrace.h even though - * it's defined in the kernel's include/linux/ptrace.h + * it's defined in the kernel's include/linux/ptrace.h. Additionally, use the + * 2.4 name and value for 2.4 host compatibility. */ -#ifndef PTRACE_SETOPTIONS -#define PTRACE_SETOPTIONS 0x4200 +#ifndef PTRACE_OLDSETOPTIONS +#define PTRACE_OLDSETOPTIONS 21 #endif #endif diff -urN linux-2.6.11-rc3/arch/um/kernel/mem.c linux-2.6.11-rc4/arch/um/kernel/mem.c --- linux-2.6.11-rc3/arch/um/kernel/mem.c 2005-02-12 19:50:36.439785553 -0800 +++ linux-2.6.11-rc4/arch/um/kernel/mem.c 2005-02-12 19:50:54.114550730 -0800 @@ -79,7 +79,7 @@ uml_reserved = brk_end; /* Fill in any hole at the start of the binary */ - start = (unsigned long) &__binary_start; + start = (unsigned long) &__binary_start & PAGE_MASK; if(uml_physmem != start){ map_memory(uml_physmem, __pa(uml_physmem), start - uml_physmem, 1, 1, 0); @@ -152,6 +152,7 @@ static void init_highmem(void) { pgd_t *pgd; + pud_t *pud; pmd_t *pmd; pte_t *pte; unsigned long vaddr; @@ -163,7 +164,8 @@ fixrange_init(vaddr, vaddr + PAGE_SIZE*LAST_PKMAP, swapper_pg_dir); pgd = swapper_pg_dir + pgd_index(vaddr); - pmd = pmd_offset(pgd, vaddr); + pud = pud_offset(pgd, vaddr); + pmd = pmd_offset(pud, vaddr); pte = pte_offset_kernel(pmd, vaddr); pkmap_page_table = pte; @@ -173,9 +175,10 @@ static void __init fixaddr_user_init( void) { -#if FIXADDR_USER_START != 0 +#if CONFIG_ARCH_REUSE_HOST_VSYSCALL_AREA long size = FIXADDR_USER_END - FIXADDR_USER_START; pgd_t *pgd; + pud_t *pud; pmd_t *pmd; pte_t *pte; unsigned long paddr, vaddr = FIXADDR_USER_START; @@ -187,9 +190,10 @@ paddr = (unsigned long)alloc_bootmem_low_pages( size); memcpy( (void *)paddr, (void *)FIXADDR_USER_START, size); paddr = __pa(paddr); - for ( ; size > 0; size-=PAGE_SIZE, vaddr+=PAGE_SIZE, paddr+=PAGE_SIZE) { + for ( ; size > 0; size-=PAGE_SIZE, vaddr+=PAGE_SIZE, paddr+=PAGE_SIZE){ pgd = swapper_pg_dir + pgd_index(vaddr); - pmd = pmd_offset(pgd, vaddr); + pud = pud_offset(pgd, vaddr); + pmd = pmd_offset(pud, vaddr); pte = pte_offset_kernel(pmd, vaddr); pte_set_val( (*pte), paddr, PAGE_READONLY); } diff -urN linux-2.6.11-rc3/arch/um/kernel/process.c linux-2.6.11-rc4/arch/um/kernel/process.c --- linux-2.6.11-rc3/arch/um/kernel/process.c 2005-02-12 19:50:36.442785683 -0800 +++ linux-2.6.11-rc4/arch/um/kernel/process.c 2005-02-12 19:50:54.116550816 -0800 @@ -13,6 +13,10 @@ #include #include #include + +/*Userspace header, must be after sys/ptrace.h, and both must be included. */ +#include + #include #include #include @@ -318,7 +322,7 @@ printk("Checking that ptrace can change system call numbers..."); pid = start_ptraced_child(&stack); - if(ptrace(PTRACE_SETOPTIONS, pid, 0, (void *)PTRACE_O_TRACESYSGOOD) < 0) + if (ptrace(PTRACE_OLDSETOPTIONS, pid, 0, (void *)PTRACE_O_TRACESYSGOOD) < 0) panic("check_ptrace: PTRACE_SETOPTIONS failed, errno = %d", errno); while(1){ @@ -422,14 +426,3 @@ return(0); } #endif - -/* - * Overrides for Emacs so that we follow Linus's tabbing style. - * Emacs will notice this stuff at the end of the file and automatically - * adjust the settings for this buffer only. This must remain at the end - * of the file. - * --------------------------------------------------------------------------- - * Local variables: - * c-file-style: "linux" - * End: - */ diff -urN linux-2.6.11-rc3/arch/um/kernel/skas/Makefile linux-2.6.11-rc4/arch/um/kernel/skas/Makefile --- linux-2.6.11-rc3/arch/um/kernel/skas/Makefile 2005-02-12 19:50:36.445785812 -0800 +++ linux-2.6.11-rc4/arch/um/kernel/skas/Makefile 2005-02-12 19:50:54.120550990 -0800 @@ -11,3 +11,5 @@ $(USER_OBJS) : %.o: %.c $(CC) $(CFLAGS_$(notdir $@)) $(USER_CFLAGS) -c -o $@ $< + +subdir- := util diff -urN linux-2.6.11-rc3/arch/um/kernel/skas/process.c linux-2.6.11-rc4/arch/um/kernel/skas/process.c --- linux-2.6.11-rc3/arch/um/kernel/skas/process.c 2005-02-12 19:50:36.450786029 -0800 +++ linux-2.6.11-rc4/arch/um/kernel/skas/process.c 2005-02-12 19:50:54.124551163 -0800 @@ -124,7 +124,7 @@ panic("start_userspace : expected SIGSTOP, got status = %d", status); - if (ptrace(PTRACE_SETOPTIONS, pid, NULL, (void *)PTRACE_O_TRACESYSGOOD) < 0) + if (ptrace(PTRACE_OLDSETOPTIONS, pid, NULL, (void *)PTRACE_O_TRACESYSGOOD) < 0) panic("start_userspace : PTRACE_SETOPTIONS failed, errno=%d\n", errno); diff -urN linux-2.6.11-rc3/arch/um/kernel/skas/trap_user.c linux-2.6.11-rc4/arch/um/kernel/skas/trap_user.c --- linux-2.6.11-rc3/arch/um/kernel/skas/trap_user.c 2005-02-12 19:50:36.456786289 -0800 +++ linux-2.6.11-rc4/arch/um/kernel/skas/trap_user.c 2005-02-12 19:50:54.130551423 -0800 @@ -20,6 +20,14 @@ int save_errno = errno; int save_user; + /* This is done because to allow SIGSEGV to be delivered inside a SEGV + * handler. This can happen in copy_user, and if SEGV is disabled, + * the process will die. + * XXX Figure out why this is better than SA_NODEFER + */ + if(sig == SIGSEGV) + change_sig(SIGSEGV, 1); + r = &TASK_REGS(get_current())->skas; save_user = r->is_user; r->is_user = 0; diff -urN linux-2.6.11-rc3/arch/um/kernel/sys_call_table.c linux-2.6.11-rc4/arch/um/kernel/sys_call_table.c --- linux-2.6.11-rc3/arch/um/kernel/sys_call_table.c 2005-02-12 19:50:36.462786548 -0800 +++ linux-2.6.11-rc4/arch/um/kernel/sys_call_table.c 2005-02-12 19:50:54.137551726 -0800 @@ -20,7 +20,7 @@ #define NFSSERVCTL sys_ni_syscall #endif -#define LAST_GENERIC_SYSCALL __NR_vperfctr_read +#define LAST_GENERIC_SYSCALL __NR_keyctl #if LAST_GENERIC_SYSCALL > LAST_ARCH_SYSCALL #define LAST_SYSCALL LAST_GENERIC_SYSCALL @@ -52,13 +52,7 @@ extern syscall_handler_t sys_mbind; extern syscall_handler_t sys_get_mempolicy; extern syscall_handler_t sys_set_mempolicy; -extern syscall_handler_t sys_sys_kexec_load; extern syscall_handler_t sys_sys_setaltroot; -extern syscall_handler_t sys_vperfctr_open; -extern syscall_handler_t sys_vperfctr_control; -extern syscall_handler_t sys_vperfctr_unlink; -extern syscall_handler_t sys_vperfctr_iresume; -extern syscall_handler_t sys_vperfctr_read; syscall_handler_t *sys_call_table[] = { [ __NR_restart_syscall ] = (syscall_handler_t *) sys_restart_syscall, @@ -273,32 +267,14 @@ [ __NR_mq_timedreceive ] = (syscall_handler_t *) sys_mq_timedreceive, [ __NR_mq_notify ] = (syscall_handler_t *) sys_mq_notify, [ __NR_mq_getsetattr ] = (syscall_handler_t *) sys_mq_getsetattr, - [ __NR_sys_kexec_load ] = (syscall_handler_t *) sys_kexec_load, + [ __NR_sys_kexec_load ] = (syscall_handler_t *) sys_ni_syscall, [ __NR_waitid ] = (syscall_handler_t *) sys_waitid, -#if 0 - [ __NR_sys_setaltroot ] = (syscall_handler_t *) sys_sys_setaltroot, -#endif + [ 285 ] = (syscall_handler_t *) sys_ni_syscall, [ __NR_add_key ] = (syscall_handler_t *) sys_add_key, [ __NR_request_key ] = (syscall_handler_t *) sys_request_key, [ __NR_keyctl ] = (syscall_handler_t *) sys_keyctl, - [ __NR_vperfctr_open ] = (syscall_handler_t *) sys_vperfctr_open, - [ __NR_vperfctr_control ] = (syscall_handler_t *) sys_vperfctr_control, - [ __NR_vperfctr_unlink ] = (syscall_handler_t *) sys_vperfctr_unlink, - [ __NR_vperfctr_iresume ] = (syscall_handler_t *) sys_vperfctr_iresume, - [ __NR_vperfctr_read ] = (syscall_handler_t *) sys_vperfctr_read, ARCH_SYSCALLS [ LAST_SYSCALL + 1 ... NR_syscalls ] = (syscall_handler_t *) sys_ni_syscall }; - -/* - * Overrides for Emacs so that we follow Linus's tabbing style. - * Emacs will notice this stuff at the end of the file and automatically - * adjust the settings for this buffer only. This must remain at the end - * of the file. - * --------------------------------------------------------------------------- - * Local variables: - * c-file-style: "linux" - * End: - */ diff -urN linux-2.6.11-rc3/arch/um/kernel/time_kern.c linux-2.6.11-rc4/arch/um/kernel/time_kern.c --- linux-2.6.11-rc3/arch/um/kernel/time_kern.c 2005-02-12 19:50:36.465786678 -0800 +++ linux-2.6.11-rc4/arch/um/kernel/time_kern.c 2005-02-12 19:50:54.139551812 -0800 @@ -22,7 +22,7 @@ #include "mode.h" #include "os.h" -u64 jiffies_64; +u64 jiffies_64 = INITIAL_JIFFIES; EXPORT_SYMBOL(jiffies_64); diff -urN linux-2.6.11-rc3/arch/um/kernel/trap_kern.c linux-2.6.11-rc4/arch/um/kernel/trap_kern.c --- linux-2.6.11-rc3/arch/um/kernel/trap_kern.c 2005-02-12 19:50:36.466786722 -0800 +++ linux-2.6.11-rc4/arch/um/kernel/trap_kern.c 2005-02-12 19:50:54.140551856 -0800 @@ -48,6 +48,8 @@ goto good_area; else if(!(vma->vm_flags & VM_GROWSDOWN)) goto out; + else if(!ARCH_IS_STACKGROW(address)) + goto out; else if(expand_stack(vma, address)) goto out; diff -urN linux-2.6.11-rc3/arch/um/kernel/tt/exec_user.c linux-2.6.11-rc4/arch/um/kernel/tt/exec_user.c --- linux-2.6.11-rc3/arch/um/kernel/tt/exec_user.c 2005-02-12 19:50:36.467786765 -0800 +++ linux-2.6.11-rc4/arch/um/kernel/tt/exec_user.c 2005-02-12 19:50:54.142551942 -0800 @@ -39,7 +39,7 @@ os_kill_ptraced_process(old_pid, 0); - if (ptrace(PTRACE_SETOPTIONS, new_pid, 0, (void *)PTRACE_O_TRACESYSGOOD) < 0) + if (ptrace(PTRACE_OLDSETOPTIONS, new_pid, 0, (void *)PTRACE_O_TRACESYSGOOD) < 0) tracer_panic("do_exec: PTRACE_SETOPTIONS failed, errno = %d", errno); if(ptrace_setregs(new_pid, regs) < 0) diff -urN linux-2.6.11-rc3/arch/um/kernel/tt/tracer.c linux-2.6.11-rc4/arch/um/kernel/tt/tracer.c --- linux-2.6.11-rc3/arch/um/kernel/tt/tracer.c 2005-02-12 19:50:36.480787328 -0800 +++ linux-2.6.11-rc4/arch/um/kernel/tt/tracer.c 2005-02-12 19:50:54.154552462 -0800 @@ -72,7 +72,7 @@ (ptrace(PTRACE_CONT, pid, 0, 0) < 0)) tracer_panic("OP_FORK failed to attach pid"); wait_for_stop(pid, SIGSTOP, PTRACE_CONT, NULL); - if (ptrace(PTRACE_SETOPTIONS, pid, 0, (void *)PTRACE_O_TRACESYSGOOD) < 0) + if (ptrace(PTRACE_OLDSETOPTIONS, pid, 0, (void *)PTRACE_O_TRACESYSGOOD) < 0) tracer_panic("OP_FORK: PTRACE_SETOPTIONS failed, errno = %d", errno); if(ptrace(PTRACE_CONT, pid, 0, 0) < 0) tracer_panic("OP_FORK failed to continue process"); @@ -200,7 +200,7 @@ printf("waitpid on idle thread failed, errno = %d\n", errno); exit(1); } - if (ptrace(PTRACE_SETOPTIONS, pid, 0, (void *)PTRACE_O_TRACESYSGOOD) < 0) { + if (ptrace(PTRACE_OLDSETOPTIONS, pid, 0, (void *)PTRACE_O_TRACESYSGOOD) < 0) { printf("Failed to PTRACE_SETOPTIONS for idle thread, errno = %d\n", errno); exit(1); } diff -urN linux-2.6.11-rc3/arch/x86_64/ia32/ia32_binfmt.c linux-2.6.11-rc4/arch/x86_64/ia32/ia32_binfmt.c --- linux-2.6.11-rc3/arch/x86_64/ia32/ia32_binfmt.c 2005-02-12 19:50:36.519789016 -0800 +++ linux-2.6.11-rc4/arch/x86_64/ia32/ia32_binfmt.c 2005-02-12 19:50:54.206554713 -0800 @@ -249,6 +249,8 @@ #define elf_check_arch(x) \ ((x)->e_machine == EM_386) +extern int force_personality32; + #define ELF_EXEC_PAGESIZE PAGE_SIZE #define ELF_HWCAP (boot_cpu_data.x86_capability[0]) #define ELF_PLATFORM ("i686") @@ -262,6 +264,8 @@ set_thread_flag(TIF_ABI_PENDING); \ else \ clear_thread_flag(TIF_ABI_PENDING); \ + /* XXX This overwrites the user set personality */ \ + current->personality |= force_personality32; \ } while (0) /* Override some function names */ diff -urN linux-2.6.11-rc3/arch/x86_64/ia32/ipc32.c linux-2.6.11-rc4/arch/x86_64/ia32/ipc32.c --- linux-2.6.11-rc3/arch/x86_64/ia32/ipc32.c 2004-12-24 13:34:33.000000000 -0800 +++ linux-2.6.11-rc4/arch/x86_64/ia32/ipc32.c 2005-02-12 19:50:54.210554886 -0800 @@ -49,7 +49,7 @@ case SHMDT: return sys_shmdt(compat_ptr(ptr)); case SHMGET: - return sys_shmget(first, second, third); + return sys_shmget(first, (unsigned)second, third); case SHMCTL: return compat_sys_shmctl(first, second, compat_ptr(ptr)); } diff -urN linux-2.6.11-rc3/arch/x86_64/kernel/process.c linux-2.6.11-rc4/arch/x86_64/kernel/process.c --- linux-2.6.11-rc3/arch/x86_64/kernel/process.c 2005-02-12 19:50:36.557790661 -0800 +++ linux-2.6.11-rc4/arch/x86_64/kernel/process.c 2005-02-12 19:50:54.232555839 -0800 @@ -577,6 +577,12 @@ /* Make sure to be in 64bit mode */ clear_thread_flag(TIF_IA32); + + /* TBD: overwrites user setup. Should have two bits. + But 64bit processes have always behaved this way, + so it's not too bad. The main problem is just that + 32bit childs are affected again. */ + current->personality &= ~READ_IMPLIES_EXEC; } asmlinkage long sys_fork(struct pt_regs *regs) diff -urN linux-2.6.11-rc3/arch/x86_64/kernel/setup64.c linux-2.6.11-rc4/arch/x86_64/kernel/setup64.c --- linux-2.6.11-rc3/arch/x86_64/kernel/setup64.c 2005-02-12 19:50:36.560790791 -0800 +++ linux-2.6.11-rc4/arch/x86_64/kernel/setup64.c 2005-02-12 19:50:54.237556055 -0800 @@ -50,16 +50,37 @@ on Enable(default) off Disable */ -void __init nonx_setup(const char *str) +int __init nonx_setup(char *str) { - if (!strcmp(str, "on")) { + if (!strncmp(str, "on", 2)) { __supported_pte_mask |= _PAGE_NX; do_not_nx = 0; - } else if (!strcmp(str, "off")) { + } else if (!strncmp(str, "off", 3)) { do_not_nx = 1; __supported_pte_mask &= ~_PAGE_NX; - } + } + return 0; } +__setup("noexec=", nonx_setup); /* parsed early actually */ + +int force_personality32 = READ_IMPLIES_EXEC; + +/* noexec32=on|off +Control non executable heap for 32bit processes. +To control the stack too use noexec=off + +on PROT_READ does not imply PROT_EXEC for 32bit processes +off PROT_READ implies PROT_EXEC (default) +*/ +static int __init nonx32_setup(char *str) +{ + if (!strcmp(str, "on")) + force_personality32 &= ~READ_IMPLIES_EXEC; + else if (!strcmp(str, "off")) + force_personality32 |= READ_IMPLIES_EXEC; + return 0; +} +__setup("noexec32=", nonx32_setup); /* * Great future plan: diff -urN linux-2.6.11-rc3/drivers/atm/horizon.c linux-2.6.11-rc4/drivers/atm/horizon.c --- linux-2.6.11-rc3/drivers/atm/horizon.c 2005-02-12 19:50:36.842803000 -0800 +++ linux-2.6.11-rc4/drivers/atm/horizon.c 2005-02-12 19:50:54.531568783 -0800 @@ -39,6 +39,7 @@ #include #include #include +#include #include #include @@ -1089,13 +1090,11 @@ /********** (queue to) become the next TX thread **********/ static inline int tx_hold (hrz_dev * dev) { - while (test_and_set_bit (tx_busy, &dev->flags)) { - PRINTD (DBG_TX, "sleeping at tx lock %p %lu", dev, dev->flags); - interruptible_sleep_on (&dev->tx_queue); - PRINTD (DBG_TX, "woken at tx lock %p %lu", dev, dev->flags); - if (signal_pending (current)) - return -1; - } + PRINTD (DBG_TX, "sleeping at tx lock %p %lu", dev, dev->flags); + wait_event_interruptible(dev->tx_queue, (!test_and_set_bit(tx_busy, &dev->flags))); + PRINTD (DBG_TX, "woken at tx lock %p %lu", dev, dev->flags); + if (signal_pending (current)) + return -1; PRINTD (DBG_TX, "set tx_busy for dev %p", dev); return 0; } diff -urN linux-2.6.11-rc3/drivers/atm/iphase.c linux-2.6.11-rc4/drivers/atm/iphase.c --- linux-2.6.11-rc3/drivers/atm/iphase.c 2005-02-12 19:50:36.849803303 -0800 +++ linux-2.6.11-rc4/drivers/atm/iphase.c 2005-02-12 19:50:54.589571294 -0800 @@ -53,6 +53,7 @@ #include #include #include +#include #include #include #include @@ -2586,14 +2587,14 @@ } static void ia_close(struct atm_vcc *vcc) -{ +{ + DEFINE_WAIT(wait); u16 *vc_table; IADEV *iadev; struct ia_vcc *ia_vcc; struct sk_buff *skb = NULL; struct sk_buff_head tmp_tx_backlog, tmp_vcc_backlog; unsigned long closetime, flags; - int ctimeout; iadev = INPH_IA_DEV(vcc->dev); ia_vcc = INPH_IA_VCC(vcc); @@ -2606,7 +2607,9 @@ skb_queue_head_init (&tmp_vcc_backlog); if (vcc->qos.txtp.traffic_class != ATM_NONE) { iadev->close_pending++; - sleep_on_timeout(&iadev->timeout_wait, 50); + prepare_to_wait(&iadev->timeout_wait, &wait, TASK_UNINTERRUPTIBLE); + schedule_timeout(50); + finish_wait(&iadev->timeout_wait, &wait); spin_lock_irqsave(&iadev->tx_lock, flags); while((skb = skb_dequeue(&iadev->tx_backlog))) { if (ATM_SKB(skb)->vcc == vcc){ @@ -2619,17 +2622,12 @@ while((skb = skb_dequeue(&tmp_tx_backlog))) skb_queue_tail(&iadev->tx_backlog, skb); IF_EVENT(printk("IA TX Done decs_cnt = %d\n", ia_vcc->vc_desc_cnt);) - closetime = jiffies; - ctimeout = 300000 / ia_vcc->pcr; - if (ctimeout == 0) - ctimeout = 1; - while (ia_vcc->vc_desc_cnt > 0){ - if ((jiffies - closetime) >= ctimeout) - break; - spin_unlock_irqrestore(&iadev->tx_lock, flags); - sleep_on(&iadev->close_wait); - spin_lock_irqsave(&iadev->tx_lock, flags); - } + closetime = 300000 / ia_vcc->pcr; + if (closetime == 0) + closetime = 1; + spin_unlock_irqrestore(&iadev->tx_lock, flags); + wait_event_timeout(iadev->close_wait, (ia_vcc->vc_desc_cnt <= 0), closetime); + spin_lock_irqsave(&iadev->tx_lock, flags); iadev->close_pending--; iadev->testTable[vcc->vci]->lastTime = 0; iadev->testTable[vcc->vci]->fract = 0; diff -urN linux-2.6.11-rc3/drivers/atm/zatm.c linux-2.6.11-rc4/drivers/atm/zatm.c --- linux-2.6.11-rc3/drivers/atm/zatm.c 2005-02-12 19:50:36.859803736 -0800 +++ linux-2.6.11-rc4/drivers/atm/zatm.c 2005-02-12 19:50:54.666574628 -0800 @@ -22,6 +22,7 @@ #include #include #include +#include #include #include #include @@ -867,31 +868,21 @@ struct zatm_vcc *zatm_vcc; unsigned long flags; int chan; -struct sk_buff *skb; -int once = 1; zatm_vcc = ZATM_VCC(vcc); zatm_dev = ZATM_DEV(vcc->dev); chan = zatm_vcc->tx_chan; if (!chan) return; DPRINTK("close_tx\n"); - while (skb_peek(&zatm_vcc->backlog)) { -if (once) { -printk("waiting for backlog to drain ...\n"); -event_dump(); -once = 0; -} - sleep_on(&zatm_vcc->tx_wait); - } -once = 1; - while ((skb = skb_peek(&zatm_vcc->tx_queue))) { -if (once) { -printk("waiting for TX queue to drain ... %p\n",skb); -event_dump(); -once = 0; -} - DPRINTK("waiting for TX queue to drain ... %p\n",skb); - sleep_on(&zatm_vcc->tx_wait); + if (skb_peek(&zatm_vcc->backlog)) { + printk("waiting for backlog to drain ...\n"); + event_dump(); + wait_event(zatm_vcc->tx_wait, !skb_peek(&zatm_vcc->backlog)); + } + if (skb_peek(&zatm_vcc->tx_queue)) { + printk("waiting for TX queue to drain ...\n"); + event_dump(); + wait_event(zatm_vcc->tx_wait, !skb_peek(&zatm_vcc->tx_queue)); } spin_lock_irqsave(&zatm_dev->lock, flags); #if 0 diff -urN linux-2.6.11-rc3/drivers/block/cciss_scsi.c linux-2.6.11-rc4/drivers/block/cciss_scsi.c --- linux-2.6.11-rc3/drivers/block/cciss_scsi.c 2005-02-12 19:50:36.888804992 -0800 +++ linux-2.6.11-rc4/drivers/block/cciss_scsi.c 2005-02-12 19:50:54.812580949 -0800 @@ -691,14 +691,13 @@ cciss_scsi_detect(int ctlr) { struct Scsi_Host *sh; + int error; sh = scsi_host_alloc(&cciss_driver_template, sizeof(struct ctlr_info *)); if (sh == NULL) - return 0; - + goto fail; sh->io_port = 0; // good enough? FIXME, sh->n_io_port = 0; // I don't think we use these two... - sh->this_id = SELF_SCSI_ID; ((struct cciss_scsi_adapter_data_t *) @@ -706,10 +705,16 @@ sh->hostdata[0] = (unsigned long) hba[ctlr]; sh->irq = hba[ctlr]->intr; sh->unique_id = sh->irq; - scsi_add_host(sh, &hba[ctlr]->pdev->dev); /* XXX handle failure */ + error = scsi_add_host(sh, &hba[ctlr]->pdev->dev); + if (error) + goto fail_host_put; scsi_scan_host(sh); - return 1; + + fail_host_put: + scsi_host_put(sh); + fail: + return 0; } static void __exit cleanup_cciss_module(void); diff -urN linux-2.6.11-rc3/drivers/block/sx8.c linux-2.6.11-rc4/drivers/block/sx8.c --- linux-2.6.11-rc3/drivers/block/sx8.c 2005-02-12 19:50:36.939807200 -0800 +++ linux-2.6.11-rc4/drivers/block/sx8.c 2005-02-12 19:50:54.946586750 -0800 @@ -1503,7 +1503,8 @@ } port->disk = disk; - sprintf(disk->disk_name, DRV_NAME "/%u", (host->id * CARM_MAX_PORTS) + i); + sprintf(disk->disk_name, DRV_NAME "/%u", + (unsigned int) (host->id * CARM_MAX_PORTS) + i); sprintf(disk->devfs_name, DRV_NAME "/%u_%u", host->id, i); disk->major = host->major; disk->first_minor = i * CARM_MINORS_PER_MAJOR; diff -urN linux-2.6.11-rc3/drivers/bluetooth/Kconfig linux-2.6.11-rc4/drivers/bluetooth/Kconfig --- linux-2.6.11-rc3/drivers/bluetooth/Kconfig 2004-12-24 13:34:32.000000000 -0800 +++ linux-2.6.11-rc4/drivers/bluetooth/Kconfig 2005-02-12 19:50:54.973587919 -0800 @@ -75,6 +75,17 @@ Say Y here to compile support for HCI BCM203x devices into the kernel or say M to compile it as module (bcm203x). +config BT_HCIBPA10X + tristate "HCI BPA10x USB driver" + depends on USB + help + Bluetooth HCI BPA10x USB driver. + This driver provides support for the Digianswer BPA 100/105 Bluetooth + sniffer devices. + + Say Y here to compile support for HCI BPA10x devices into the + kernel or say M to compile it as module (bpa10x). + config BT_HCIBFUSB tristate "HCI BlueFRITZ! USB driver" depends on USB diff -urN linux-2.6.11-rc3/drivers/bluetooth/Makefile linux-2.6.11-rc4/drivers/bluetooth/Makefile --- linux-2.6.11-rc3/drivers/bluetooth/Makefile 2004-12-24 13:35:39.000000000 -0800 +++ linux-2.6.11-rc4/drivers/bluetooth/Makefile 2005-02-12 19:50:54.989588612 -0800 @@ -6,6 +6,7 @@ obj-$(CONFIG_BT_HCIVHCI) += hci_vhci.o obj-$(CONFIG_BT_HCIUART) += hci_uart.o obj-$(CONFIG_BT_HCIBCM203X) += bcm203x.o +obj-$(CONFIG_BT_HCIBPA10X) += bpa10x.o obj-$(CONFIG_BT_HCIBFUSB) += bfusb.o obj-$(CONFIG_BT_HCIDTL1) += dtl1_cs.o obj-$(CONFIG_BT_HCIBT3C) += bt3c_cs.o diff -urN linux-2.6.11-rc3/drivers/bluetooth/bpa10x.c linux-2.6.11-rc4/drivers/bluetooth/bpa10x.c --- linux-2.6.11-rc3/drivers/bluetooth/bpa10x.c 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.6.11-rc4/drivers/bluetooth/bpa10x.c 2005-02-12 19:50:55.013589651 -0800 @@ -0,0 +1,657 @@ +/* + * + * Digianswer Bluetooth USB driver + * + * Copyright (C) 2004-2005 Marcel Holtmann + * + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +#include +#include + +#include +#include +#include +#include +#include + +#include + +#include +#include + +#ifndef CONFIG_BT_HCIBPA10X_DEBUG +#undef BT_DBG +#define BT_DBG(D...) +#endif + +#define VERSION "0.8" + +static int ignore = 0; + +static struct usb_device_id bpa10x_table[] = { + /* Tektronix BPA 100/105 (Digianswer) */ + { USB_DEVICE(0x08fd, 0x0002) }, + + { } /* Terminating entry */ +}; + +MODULE_DEVICE_TABLE(usb, bpa10x_table); + +#define BPA10X_CMD_EP 0x00 +#define BPA10X_EVT_EP 0x81 +#define BPA10X_TX_EP 0x02 +#define BPA10X_RX_EP 0x82 + +#define BPA10X_CMD_BUF_SIZE 252 +#define BPA10X_EVT_BUF_SIZE 16 +#define BPA10X_TX_BUF_SIZE 384 +#define BPA10X_RX_BUF_SIZE 384 + +struct bpa10x_data { + struct hci_dev *hdev; + struct usb_device *udev; + + rwlock_t lock; + + struct sk_buff_head cmd_queue; + struct urb *cmd_urb; + struct urb *evt_urb; + struct sk_buff *evt_skb; + unsigned int evt_len; + + struct sk_buff_head tx_queue; + struct urb *tx_urb; + struct urb *rx_urb; +}; + +#define HCI_VENDOR_HDR_SIZE 5 + +struct hci_vendor_hdr { + __u8 type; + __u16 snum; + __u16 dlen; +} __attribute__ ((packed)); + +static void bpa10x_recv_bulk(struct bpa10x_data *data, unsigned char *buf, int count) +{ + struct hci_acl_hdr *ah; + struct hci_sco_hdr *sh; + struct hci_vendor_hdr *vh; + struct sk_buff *skb; + int len; + + while (count) { + switch (*buf++) { + case HCI_ACLDATA_PKT: + ah = (struct hci_acl_hdr *) buf; + len = HCI_ACL_HDR_SIZE + __le16_to_cpu(ah->dlen); + skb = bt_skb_alloc(len, GFP_ATOMIC); + if (skb) { + memcpy(skb_put(skb, len), buf, len); + skb->dev = (void *) data->hdev; + skb->pkt_type = HCI_ACLDATA_PKT; + hci_recv_frame(skb); + } + break; + + case HCI_SCODATA_PKT: + sh = (struct hci_sco_hdr *) buf; + len = HCI_SCO_HDR_SIZE + sh->dlen; + skb = bt_skb_alloc(len, GFP_ATOMIC); + if (skb) { + memcpy(skb_put(skb, len), buf, len); + skb->dev = (void *) data->hdev; + skb->pkt_type = HCI_SCODATA_PKT; + hci_recv_frame(skb); + } + break; + + case HCI_VENDOR_PKT: + vh = (struct hci_vendor_hdr *) buf; + len = HCI_VENDOR_HDR_SIZE + __le16_to_cpu(vh->dlen); + skb = bt_skb_alloc(len, GFP_ATOMIC); + if (skb) { + memcpy(skb_put(skb, len), buf, len); + skb->dev = (void *) data->hdev; + skb->pkt_type = HCI_VENDOR_PKT; + hci_recv_frame(skb); + } + break; + + default: + len = count - 1; + break; + } + + buf += len; + count -= (len + 1); + } +} + +static int bpa10x_recv_event(struct bpa10x_data *data, unsigned char *buf, int size) +{ + BT_DBG("data %p buf %p size %d", data, buf, size); + + if (data->evt_skb) { + struct sk_buff *skb = data->evt_skb; + + memcpy(skb_put(skb, size), buf, size); + + if (skb->len == data->evt_len) { + data->evt_skb = NULL; + data->evt_len = 0; + hci_recv_frame(skb); + } + } else { + struct sk_buff *skb; + struct hci_event_hdr *hdr; + unsigned char pkt_type; + int pkt_len = 0; + + if (size < HCI_EVENT_HDR_SIZE + 1) { + BT_ERR("%s event packet block with size %d is too short", + data->hdev->name, size); + return -EILSEQ; + } + + pkt_type = *buf++; + size--; + + if (pkt_type != HCI_EVENT_PKT) { + BT_ERR("%s unexpected event packet start byte 0x%02x", + data->hdev->name, pkt_type); + return -EPROTO; + } + + hdr = (struct hci_event_hdr *) buf; + pkt_len = HCI_EVENT_HDR_SIZE + hdr->plen; + + skb = bt_skb_alloc(pkt_len, GFP_ATOMIC); + if (!skb) { + BT_ERR("%s no memory for new event packet", + data->hdev->name); + return -ENOMEM; + } + + skb->dev = (void *) data->hdev; + skb->pkt_type = pkt_type; + + memcpy(skb_put(skb, size), buf, size); + + if (pkt_len == size) { + hci_recv_frame(skb); + } else { + data->evt_skb = skb; + data->evt_len = pkt_len; + } + } + + return 0; +} + +static void bpa10x_wakeup(struct bpa10x_data *data) +{ + struct urb *urb; + struct sk_buff *skb; + int err; + + BT_DBG("data %p", data); + + urb = data->cmd_urb; + if (urb->status == -EINPROGRESS) + skb = NULL; + else + skb = skb_dequeue(&data->cmd_queue); + + if (skb) { + struct usb_ctrlrequest *cr; + + if (skb->len > BPA10X_CMD_BUF_SIZE) { + BT_ERR("%s command packet with size %d is too big", + data->hdev->name, skb->len); + kfree_skb(skb); + return; + } + + cr = (struct usb_ctrlrequest *) urb->setup_packet; + cr->wLength = __cpu_to_le16(skb->len); + + memcpy(urb->transfer_buffer, skb->data, skb->len); + urb->transfer_buffer_length = skb->len; + + err = usb_submit_urb(urb, GFP_ATOMIC); + if (err < 0 && err != -ENODEV) { + BT_ERR("%s submit failed for command urb %p with error %d", + data->hdev->name, urb, err); + skb_queue_head(&data->cmd_queue, skb); + } else + kfree_skb(skb); + } + + urb = data->tx_urb; + if (urb->status == -EINPROGRESS) + skb = NULL; + else + skb = skb_dequeue(&data->tx_queue); + + if (skb) { + memcpy(urb->transfer_buffer, skb->data, skb->len); + urb->transfer_buffer_length = skb->len; + + err = usb_submit_urb(urb, GFP_ATOMIC); + if (err < 0 && err != -ENODEV) { + BT_ERR("%s submit failed for command urb %p with error %d", + data->hdev->name, urb, err); + skb_queue_head(&data->tx_queue, skb); + } else + kfree_skb(skb); + } +} + +static void bpa10x_complete(struct urb *urb, struct pt_regs *regs) +{ + struct bpa10x_data *data = urb->context; + unsigned char *buf = urb->transfer_buffer; + int err, count = urb->actual_length; + + BT_DBG("data %p urb %p buf %p count %d", data, urb, buf, count); + + read_lock(&data->lock); + + if (!test_bit(HCI_RUNNING, &data->hdev->flags)) + goto unlock; + + if (urb->status < 0 || !count) + goto resubmit; + + if (usb_pipein(urb->pipe)) { + data->hdev->stat.byte_rx += count; + + if (usb_pipetype(urb->pipe) == PIPE_INTERRUPT) + bpa10x_recv_event(data, buf, count); + + if (usb_pipetype(urb->pipe) == PIPE_BULK) + bpa10x_recv_bulk(data, buf, count); + } else { + data->hdev->stat.byte_tx += count; + + bpa10x_wakeup(data); + } + +resubmit: + if (usb_pipein(urb->pipe)) { + err = usb_submit_urb(urb, GFP_ATOMIC); + if (err < 0 && err != -ENODEV) { + BT_ERR("%s urb %p type %d resubmit status %d", + data->hdev->name, urb, usb_pipetype(urb->pipe), err); + } + } + +unlock: + read_unlock(&data->lock); +} + +static inline struct urb *bpa10x_alloc_urb(struct usb_device *udev, unsigned int pipe, size_t size, int flags, void *data) +{ + struct urb *urb; + struct usb_ctrlrequest *cr; + unsigned char *buf; + + BT_DBG("udev %p data %p", udev, data); + + urb = usb_alloc_urb(0, flags); + if (!urb) + return NULL; + + buf = kmalloc(size, flags); + if (!buf) { + usb_free_urb(urb); + return NULL; + } + + switch (usb_pipetype(pipe)) { + case PIPE_CONTROL: + cr = kmalloc(sizeof(*cr), flags); + if (!cr) { + kfree(buf); + usb_free_urb(urb); + return NULL; + } + + cr->bRequestType = USB_TYPE_VENDOR; + cr->bRequest = 0; + cr->wIndex = 0; + cr->wValue = 0; + cr->wLength = __cpu_to_le16(0); + + usb_fill_control_urb(urb, udev, pipe, (void *) cr, buf, 0, bpa10x_complete, data); + break; + + case PIPE_INTERRUPT: + usb_fill_int_urb(urb, udev, pipe, buf, size, bpa10x_complete, data, 1); + break; + + case PIPE_BULK: + usb_fill_bulk_urb(urb, udev, pipe, buf, size, bpa10x_complete, data); + break; + + default: + kfree(buf); + usb_free_urb(urb); + return NULL; + } + + return urb; +} + +static inline void bpa10x_free_urb(struct urb *urb) +{ + BT_DBG("urb %p", urb); + + if (!urb) + return; + + if (urb->setup_packet) + kfree(urb->setup_packet); + + if (urb->transfer_buffer) + kfree(urb->transfer_buffer); + + usb_free_urb(urb); +} + +static int bpa10x_open(struct hci_dev *hdev) +{ + struct bpa10x_data *data = hdev->driver_data; + struct usb_device *udev = data->udev; + unsigned long flags; + int err; + + BT_DBG("hdev %p data %p", hdev, data); + + if (test_and_set_bit(HCI_RUNNING, &hdev->flags)) + return 0; + + data->cmd_urb = bpa10x_alloc_urb(udev, usb_sndctrlpipe(udev, BPA10X_CMD_EP), + BPA10X_CMD_BUF_SIZE, GFP_KERNEL, data); + if (!data->cmd_urb) { + err = -ENOMEM; + goto done; + } + + data->evt_urb = bpa10x_alloc_urb(udev, usb_rcvintpipe(udev, BPA10X_EVT_EP), + BPA10X_EVT_BUF_SIZE, GFP_KERNEL, data); + if (!data->evt_urb) { + bpa10x_free_urb(data->cmd_urb); + err = -ENOMEM; + goto done; + } + + data->rx_urb = bpa10x_alloc_urb(udev, usb_rcvbulkpipe(udev, BPA10X_RX_EP), + BPA10X_RX_BUF_SIZE, GFP_KERNEL, data); + if (!data->rx_urb) { + bpa10x_free_urb(data->evt_urb); + bpa10x_free_urb(data->cmd_urb); + err = -ENOMEM; + goto done; + } + + data->tx_urb = bpa10x_alloc_urb(udev, usb_sndbulkpipe(udev, BPA10X_TX_EP), + BPA10X_TX_BUF_SIZE, GFP_KERNEL, data); + if (!data->rx_urb) { + bpa10x_free_urb(data->rx_urb); + bpa10x_free_urb(data->evt_urb); + bpa10x_free_urb(data->cmd_urb); + err = -ENOMEM; + goto done; + } + + write_lock_irqsave(&data->lock, flags); + + err = usb_submit_urb(data->evt_urb, GFP_ATOMIC); + if (err < 0) { + BT_ERR("%s submit failed for event urb %p with error %d", + data->hdev->name, data->evt_urb, err); + } else { + err = usb_submit_urb(data->rx_urb, GFP_ATOMIC); + if (err < 0) { + BT_ERR("%s submit failed for rx urb %p with error %d", + data->hdev->name, data->evt_urb, err); + usb_kill_urb(data->evt_urb); + } + } + + write_unlock_irqrestore(&data->lock, flags); + +done: + if (err < 0) + clear_bit(HCI_RUNNING, &hdev->flags); + + return err; +} + +static int bpa10x_close(struct hci_dev *hdev) +{ + struct bpa10x_data *data = hdev->driver_data; + unsigned long flags; + + BT_DBG("hdev %p data %p", hdev, data); + + if (!test_and_clear_bit(HCI_RUNNING, &hdev->flags)) + return 0; + + write_lock_irqsave(&data->lock, flags); + + skb_queue_purge(&data->cmd_queue); + usb_kill_urb(data->cmd_urb); + usb_kill_urb(data->evt_urb); + usb_kill_urb(data->rx_urb); + usb_kill_urb(data->tx_urb); + + write_unlock_irqrestore(&data->lock, flags); + + bpa10x_free_urb(data->cmd_urb); + bpa10x_free_urb(data->evt_urb); + bpa10x_free_urb(data->rx_urb); + bpa10x_free_urb(data->tx_urb); + + return 0; +} + +static int bpa10x_flush(struct hci_dev *hdev) +{ + struct bpa10x_data *data = hdev->driver_data; + + BT_DBG("hdev %p data %p", hdev, data); + + skb_queue_purge(&data->cmd_queue); + + return 0; +} + +static int bpa10x_send_frame(struct sk_buff *skb) +{ + struct hci_dev *hdev = (struct hci_dev *) skb->dev; + struct bpa10x_data *data; + + BT_DBG("hdev %p skb %p type %d len %d", hdev, skb, skb->pkt_type, skb->len); + + if (!hdev) { + BT_ERR("Frame for unknown HCI device"); + return -ENODEV; + } + + if (!test_bit(HCI_RUNNING, &hdev->flags)) + return -EBUSY; + + data = hdev->driver_data; + + /* Prepend skb with frame type */ + memcpy(skb_push(skb, 1), &(skb->pkt_type), 1); + + switch (skb->pkt_type) { + case HCI_COMMAND_PKT: + hdev->stat.cmd_tx++; + skb_queue_tail(&data->cmd_queue, skb); + break; + + case HCI_ACLDATA_PKT: + hdev->stat.acl_tx++; + skb_queue_tail(&data->tx_queue, skb); + break; + + case HCI_SCODATA_PKT: + hdev->stat.sco_tx++; + skb_queue_tail(&data->tx_queue, skb); + break; + }; + + read_lock(&data->lock); + + bpa10x_wakeup(data); + + read_unlock(&data->lock); + + return 0; +} + +static void bpa10x_destruct(struct hci_dev *hdev) +{ + struct bpa10x_data *data = hdev->driver_data; + + BT_DBG("hdev %p data %p", hdev, data); + + kfree(data); +} + +static int bpa10x_probe(struct usb_interface *intf, const struct usb_device_id *id) +{ + struct usb_device *udev = interface_to_usbdev(intf); + struct hci_dev *hdev; + struct bpa10x_data *data; + int err; + + BT_DBG("intf %p id %p", intf, id); + + if (ignore) + return -ENODEV; + + data = kmalloc(sizeof(*data), GFP_KERNEL); + if (!data) { + BT_ERR("Can't allocate data structure"); + return -ENOMEM; + } + + memset(data, 0, sizeof(*data)); + + data->udev = udev; + + rwlock_init(&data->lock); + + skb_queue_head_init(&data->cmd_queue); + skb_queue_head_init(&data->tx_queue); + + hdev = hci_alloc_dev(); + if (!hdev) { + BT_ERR("Can't allocate HCI device"); + kfree(data); + return -ENOMEM; + } + + data->hdev = hdev; + + hdev->type = HCI_USB; + hdev->driver_data = data; + SET_HCIDEV_DEV(hdev, &intf->dev); + + hdev->open = bpa10x_open; + hdev->close = bpa10x_close; + hdev->flush = bpa10x_flush; + hdev->send = bpa10x_send_frame; + hdev->destruct = bpa10x_destruct; + + hdev->owner = THIS_MODULE; + + err = hci_register_dev(hdev); + if (err < 0) { + BT_ERR("Can't register HCI device"); + kfree(data); + hci_free_dev(hdev); + return err; + } + + usb_set_intfdata(intf, data); + + return 0; +} + +static void bpa10x_disconnect(struct usb_interface *intf) +{ + struct bpa10x_data *data = usb_get_intfdata(intf); + struct hci_dev *hdev = data->hdev; + + BT_DBG("intf %p", intf); + + if (!hdev) + return; + + usb_set_intfdata(intf, NULL); + + if (hci_unregister_dev(hdev) < 0) + BT_ERR("Can't unregister HCI device %s", hdev->name); + + hci_free_dev(hdev); +} + +static struct usb_driver bpa10x_driver = { + .owner = THIS_MODULE, + .name = "bpa10x", + .probe = bpa10x_probe, + .disconnect = bpa10x_disconnect, + .id_table = bpa10x_table, +}; + +static int __init bpa10x_init(void) +{ + int err; + + BT_INFO("Digianswer Bluetooth USB driver ver %s", VERSION); + + err = usb_register(&bpa10x_driver); + if (err < 0) + BT_ERR("Failed to register USB driver"); + + return err; +} + +static void __exit bpa10x_exit(void) +{ + usb_deregister(&bpa10x_driver); +} + +module_init(bpa10x_init); +module_exit(bpa10x_exit); + +module_param(ignore, bool, 0644); +MODULE_PARM_DESC(ignore, "Ignore devices from the matching table"); + +MODULE_AUTHOR("Marcel Holtmann "); +MODULE_DESCRIPTION("Digianswer Bluetooth USB driver ver " VERSION); +MODULE_VERSION(VERSION); +MODULE_LICENSE("GPL"); diff -urN linux-2.6.11-rc3/drivers/bluetooth/hci_usb.c linux-2.6.11-rc4/drivers/bluetooth/hci_usb.c --- linux-2.6.11-rc3/drivers/bluetooth/hci_usb.c 2005-02-12 19:50:37.023810836 -0800 +++ linux-2.6.11-rc4/drivers/bluetooth/hci_usb.c 2005-02-12 19:50:55.064591859 -0800 @@ -73,7 +73,7 @@ static int isoc = 2; #endif -#define VERSION "2.7" +#define VERSION "2.8" static struct usb_driver hci_usb_driver; @@ -104,11 +104,11 @@ { USB_DEVICE(0x0a5c, 0x2033), .driver_info = HCI_IGNORE }, /* Broadcom BCM2035 */ - { USB_DEVICE(0x0a5c, 0x2009), .driver_info = HCI_RESET | HCI_BROKEN_ISOC }, { USB_DEVICE(0x0a5c, 0x200a), .driver_info = HCI_RESET | HCI_BROKEN_ISOC }, + { USB_DEVICE(0x0a5c, 0x2009), .driver_info = HCI_BCM92035 }, /* Microsoft Wireless Transceiver for Bluetooth 2.0 */ - { USB_DEVICE(0x045e, 0x009c), .driver_info = HCI_RESET | HCI_BROKEN_ISOC }, + { USB_DEVICE(0x045e, 0x009c), .driver_info = HCI_BCM92035 }, /* ISSC Bluetooth Adapter v3.1 */ { USB_DEVICE(0x1131, 0x1001), .driver_info = HCI_RESET }, @@ -977,6 +977,17 @@ set_bit(HCI_QUIRK_RAW_DEVICE, &hdev->quirks); } + if (id->driver_info & HCI_BCM92035) { + unsigned char cmd[] = { 0x3b, 0xfc, 0x01, 0x00 }; + struct sk_buff *skb; + + skb = bt_skb_alloc(sizeof(cmd), GFP_KERNEL); + if (skb) { + memcpy(skb_put(skb, sizeof(cmd)), cmd, sizeof(cmd)); + skb_queue_tail(&hdev->driver_init, skb); + } + } + if (hci_register_dev(hdev) < 0) { BT_ERR("Can't register HCI device"); hci_free_dev(hdev); diff -urN linux-2.6.11-rc3/drivers/bluetooth/hci_usb.h linux-2.6.11-rc4/drivers/bluetooth/hci_usb.h --- linux-2.6.11-rc3/drivers/bluetooth/hci_usb.h 2005-02-12 19:50:37.024810880 -0800 +++ linux-2.6.11-rc4/drivers/bluetooth/hci_usb.h 2005-02-12 19:50:55.065591902 -0800 @@ -33,6 +33,7 @@ #define HCI_DIGIANSWER 0x04 #define HCI_SNIFFER 0x08 #define HCI_BROKEN_ISOC 0x10 +#define HCI_BCM92035 0x20 #define HCI_MAX_IFACE_NUM 3 diff -urN linux-2.6.11-rc3/drivers/cdrom/Kconfig linux-2.6.11-rc4/drivers/cdrom/Kconfig --- linux-2.6.11-rc3/drivers/cdrom/Kconfig 2005-02-12 19:50:37.030811139 -0800 +++ linux-2.6.11-rc4/drivers/cdrom/Kconfig 2005-02-12 19:50:55.097593288 -0800 @@ -105,7 +105,7 @@ config MCD tristate "Mitsumi (standard) [no XA/Multisession] CDROM support" - depends on CD_NO_IDESCSI + depends on CD_NO_IDESCSI && BROKEN ---help--- This is the older of the two drivers for the older Mitsumi models LU-005, FX-001 and FX-001D. This is not the right driver for the diff -urN linux-2.6.11-rc3/drivers/char/agp/intel-agp.c linux-2.6.11-rc4/drivers/char/agp/intel-agp.c --- linux-2.6.11-rc3/drivers/char/agp/intel-agp.c 2005-02-12 19:50:37.109814560 -0800 +++ linux-2.6.11-rc4/drivers/char/agp/intel-agp.c 2005-02-12 19:50:55.247599782 -0800 @@ -1748,12 +1748,16 @@ if (bridge->driver == &intel_generic_driver) intel_configure(); + else if (bridge->driver == &intel_850_driver) + intel_850_configure(); else if (bridge->driver == &intel_845_driver) intel_845_configure(); else if (bridge->driver == &intel_830mp_driver) intel_830mp_configure(); else if (bridge->driver == &intel_915_driver) intel_i915_configure(); + else if (bridge->driver == &intel_830_driver) + intel_i830_configure(); return 0; } diff -urN linux-2.6.11-rc3/drivers/char/drm/drm_drv.c linux-2.6.11-rc4/drivers/char/drm/drm_drv.c --- linux-2.6.11-rc3/drivers/char/drm/drm_drv.c 2005-02-12 19:50:37.163816897 -0800 +++ linux-2.6.11-rc4/drivers/char/drm/drm_drv.c 2005-02-12 19:50:55.337603678 -0800 @@ -516,7 +516,7 @@ if (nr < DRIVER_IOCTL_COUNT) ioctl = &drm_ioctls[nr]; - else if ((nr >= DRM_COMMAND_BASE) || (nr < DRM_COMMAND_BASE + dev->driver->num_ioctls)) + else if ((nr >= DRM_COMMAND_BASE) && (nr < DRM_COMMAND_BASE + dev->driver->num_ioctls)) ioctl = &dev->driver->ioctls[nr - DRM_COMMAND_BASE]; else goto err_i1; diff -urN linux-2.6.11-rc3/drivers/char/drm/drm_os_linux.h linux-2.6.11-rc4/drivers/char/drm/drm_os_linux.h --- linux-2.6.11-rc3/drivers/char/drm/drm_os_linux.h 2005-02-12 19:50:37.186817893 -0800 +++ linux-2.6.11-rc4/drivers/char/drm/drm_os_linux.h 2005-02-12 19:50:55.359604631 -0800 @@ -96,9 +96,6 @@ __copy_to_user(arg1, arg2, arg3) #define DRM_GET_USER_UNCHECKED(val, uaddr) \ __get_user(val, uaddr) -#define DRM_PUT_USER_UNCHECKED(uaddr, val) \ - __put_user(val, uaddr) - #define DRM_GET_PRIV_WITH_RETURN(_priv, _filp) _priv = _filp->private_data diff -urN linux-2.6.11-rc3/drivers/char/drm/radeon_drv.h linux-2.6.11-rc4/drivers/char/drm/radeon_drv.h --- linux-2.6.11-rc3/drivers/char/drm/radeon_drv.h 2005-02-12 19:50:37.247820534 -0800 +++ linux-2.6.11-rc4/drivers/char/drm/radeon_drv.h 2005-02-12 19:50:55.420607272 -0800 @@ -1027,25 +1027,27 @@ } while (0) -#define OUT_RING_USER_TABLE( tab, sz ) do { \ +#define OUT_RING_TABLE( tab, sz ) do { \ int _size = (sz); \ - int __user *_tab = (tab); \ + int *_tab = (int *)(tab); \ \ if (write + _size > mask) { \ - int i = (mask+1) - write; \ - if (DRM_COPY_FROM_USER_UNCHECKED( (int *)(ring+write), \ - _tab, i*4 )) \ - return DRM_ERR(EFAULT); \ + int _i = (mask+1) - write; \ + _size -= _i; \ + while (_i > 0 ) { \ + *(int *)(ring + write) = *_tab++; \ + write++; \ + _i--; \ + } \ write = 0; \ - _size -= i; \ - _tab += i; \ + _tab += _i; \ } \ \ - if (_size && DRM_COPY_FROM_USER_UNCHECKED( (int *)(ring+write), \ - _tab, _size*4 )) \ - return DRM_ERR(EFAULT); \ - \ - write += _size; \ + while (_size > 0) { \ + *(ring + write) = *_tab++; \ + write++; \ + _size--; \ + } \ write &= mask; \ } while (0) diff -urN linux-2.6.11-rc3/drivers/char/drm/radeon_state.c linux-2.6.11-rc4/drivers/char/drm/radeon_state.c --- linux-2.6.11-rc3/drivers/char/drm/radeon_state.c 2005-02-12 19:50:37.252820751 -0800 +++ linux-2.6.11-rc4/drivers/char/drm/radeon_state.c 2005-02-12 19:50:55.425607488 -0800 @@ -93,21 +93,6 @@ return 0; } -static __inline__ int radeon_check_and_fixup_offset_user( drm_radeon_private_t *dev_priv, - drm_file_t *filp_priv, - u32 __user *offset ) { - u32 off; - - DRM_GET_USER_UNCHECKED( off, offset ); - - if ( radeon_check_and_fixup_offset( dev_priv, filp_priv, &off ) ) - return DRM_ERR( EINVAL ); - - DRM_PUT_USER_UNCHECKED( offset, off ); - - return 0; -} - static __inline__ int radeon_check_and_fixup_packets( drm_radeon_private_t *dev_priv, drm_file_t *filp_priv, int id, @@ -115,18 +100,18 @@ switch ( id ) { case RADEON_EMIT_PP_MISC: - if ( radeon_check_and_fixup_offset_user( dev_priv, filp_priv, - &data[( RADEON_RB3D_DEPTHOFFSET - - RADEON_PP_MISC ) / 4] ) ) { + if ( radeon_check_and_fixup_offset( dev_priv, filp_priv, + &data[( RADEON_RB3D_DEPTHOFFSET + - RADEON_PP_MISC ) / 4] ) ) { DRM_ERROR( "Invalid depth buffer offset\n" ); return DRM_ERR( EINVAL ); } break; case RADEON_EMIT_PP_CNTL: - if ( radeon_check_and_fixup_offset_user( dev_priv, filp_priv, - &data[( RADEON_RB3D_COLOROFFSET - - RADEON_PP_CNTL ) / 4] ) ) { + if ( radeon_check_and_fixup_offset( dev_priv, filp_priv, + &data[( RADEON_RB3D_COLOROFFSET + - RADEON_PP_CNTL ) / 4] ) ) { DRM_ERROR( "Invalid colour buffer offset\n" ); return DRM_ERR( EINVAL ); } @@ -138,8 +123,8 @@ case R200_EMIT_PP_TXOFFSET_3: case R200_EMIT_PP_TXOFFSET_4: case R200_EMIT_PP_TXOFFSET_5: - if ( radeon_check_and_fixup_offset_user( dev_priv, filp_priv, - &data[0] ) ) { + if ( radeon_check_and_fixup_offset( dev_priv, filp_priv, + &data[0] ) ) { DRM_ERROR( "Invalid R200 texture offset\n" ); return DRM_ERR( EINVAL ); } @@ -148,9 +133,9 @@ case RADEON_EMIT_PP_TXFILTER_0: case RADEON_EMIT_PP_TXFILTER_1: case RADEON_EMIT_PP_TXFILTER_2: - if ( radeon_check_and_fixup_offset_user( dev_priv, filp_priv, - &data[( RADEON_PP_TXOFFSET_0 - - RADEON_PP_TXFILTER_0 ) / 4] ) ) { + if ( radeon_check_and_fixup_offset( dev_priv, filp_priv, + &data[( RADEON_PP_TXOFFSET_0 + - RADEON_PP_TXFILTER_0 ) / 4] ) ) { DRM_ERROR( "Invalid R100 texture offset\n" ); return DRM_ERR( EINVAL ); } @@ -164,9 +149,8 @@ case R200_EMIT_PP_CUBIC_OFFSETS_5: { int i; for ( i = 0; i < 5; i++ ) { - if ( radeon_check_and_fixup_offset_user( dev_priv, - filp_priv, - &data[i] ) ) { + if ( radeon_check_and_fixup_offset( dev_priv, filp_priv, + &data[i] ) ) { DRM_ERROR( "Invalid R200 cubic texture offset\n" ); return DRM_ERR( EINVAL ); } @@ -250,17 +234,11 @@ drm_file_t *filp_priv, drm_radeon_cmd_buffer_t *cmdbuf, unsigned int *cmdsz ) { - u32 tmp[4]; - u32 __user *cmd = (u32 __user *)cmdbuf->buf; - - if ( DRM_COPY_FROM_USER_UNCHECKED( tmp, cmd, sizeof( tmp ) ) ) { - DRM_ERROR( "Failed to copy data from user space\n" ); - return DRM_ERR( EFAULT ); - } + u32 *cmd = (u32 *) cmdbuf->buf; - *cmdsz = 2 + ( ( tmp[0] & RADEON_CP_PACKET_COUNT_MASK ) >> 16 ); + *cmdsz = 2 + ( ( cmd[0] & RADEON_CP_PACKET_COUNT_MASK ) >> 16 ); - if ( ( tmp[0] & 0xc0000000 ) != RADEON_CP_PACKET3 ) { + if ( ( cmd[0] & 0xc0000000 ) != RADEON_CP_PACKET3 ) { DRM_ERROR( "Not a type 3 packet\n" ); return DRM_ERR( EINVAL ); } @@ -271,32 +249,27 @@ } /* Check client state and fix it up if necessary */ - if ( tmp[0] & 0x8000 ) { /* MSB of opcode: next DWORD GUI_CNTL */ + if ( cmd[0] & 0x8000 ) { /* MSB of opcode: next DWORD GUI_CNTL */ u32 offset; - if ( tmp[1] & ( RADEON_GMC_SRC_PITCH_OFFSET_CNTL + if ( cmd[1] & ( RADEON_GMC_SRC_PITCH_OFFSET_CNTL | RADEON_GMC_DST_PITCH_OFFSET_CNTL ) ) { - offset = tmp[2] << 10; + offset = cmd[2] << 10; if ( radeon_check_and_fixup_offset( dev_priv, filp_priv, &offset ) ) { DRM_ERROR( "Invalid first packet offset\n" ); return DRM_ERR( EINVAL ); } - tmp[2] = ( tmp[2] & 0xffc00000 ) | offset >> 10; + cmd[2] = ( cmd[2] & 0xffc00000 ) | offset >> 10; } - if ( ( tmp[1] & RADEON_GMC_SRC_PITCH_OFFSET_CNTL ) && - ( tmp[1] & RADEON_GMC_DST_PITCH_OFFSET_CNTL ) ) { - offset = tmp[3] << 10; + if ( ( cmd[1] & RADEON_GMC_SRC_PITCH_OFFSET_CNTL ) && + ( cmd[1] & RADEON_GMC_DST_PITCH_OFFSET_CNTL ) ) { + offset = cmd[3] << 10; if ( radeon_check_and_fixup_offset( dev_priv, filp_priv, &offset ) ) { DRM_ERROR( "Invalid second packet offset\n" ); return DRM_ERR( EINVAL ); } - tmp[3] = ( tmp[3] & 0xffc00000 ) | offset >> 10; - } - - if ( DRM_COPY_TO_USER_UNCHECKED( cmd, tmp, sizeof( tmp ) ) ) { - DRM_ERROR( "Failed to copy data to user space\n" ); - return DRM_ERR( EFAULT ); + cmd[3] = ( cmd[3] & 0xffc00000 ) | offset >> 10; } } @@ -2473,7 +2446,7 @@ { int id = (int)header.packet.packet_id; int sz, reg; - int __user *data = (int __user *)cmdbuf->buf; + int *data = (int *)cmdbuf->buf; RING_LOCALS; if (id >= RADEON_MAX_STATE_PACKETS) @@ -2494,7 +2467,7 @@ BEGIN_RING(sz+1); OUT_RING( CP_PACKET0( reg, (sz-1) ) ); - OUT_RING_USER_TABLE( data, sz ); + OUT_RING_TABLE( data, sz ); ADVANCE_RING(); cmdbuf->buf += sz * sizeof(int); @@ -2508,7 +2481,6 @@ drm_radeon_cmd_buffer_t *cmdbuf ) { int sz = header.scalars.count; - int __user *data = (int __user *)cmdbuf->buf; int start = header.scalars.offset; int stride = header.scalars.stride; RING_LOCALS; @@ -2517,7 +2489,7 @@ OUT_RING( CP_PACKET0( RADEON_SE_TCL_SCALAR_INDX_REG, 0 ) ); OUT_RING( start | (stride << RADEON_SCAL_INDX_DWORD_STRIDE_SHIFT)); OUT_RING( CP_PACKET0_TABLE( RADEON_SE_TCL_SCALAR_DATA_REG, sz-1 ) ); - OUT_RING_USER_TABLE( data, sz ); + OUT_RING_TABLE( cmdbuf->buf, sz ); ADVANCE_RING(); cmdbuf->buf += sz * sizeof(int); cmdbuf->bufsz -= sz * sizeof(int); @@ -2532,7 +2504,6 @@ drm_radeon_cmd_buffer_t *cmdbuf ) { int sz = header.scalars.count; - int __user *data = (int __user *)cmdbuf->buf; int start = ((unsigned int)header.scalars.offset) + 0x100; int stride = header.scalars.stride; RING_LOCALS; @@ -2541,7 +2512,7 @@ OUT_RING( CP_PACKET0( RADEON_SE_TCL_SCALAR_INDX_REG, 0 ) ); OUT_RING( start | (stride << RADEON_SCAL_INDX_DWORD_STRIDE_SHIFT)); OUT_RING( CP_PACKET0_TABLE( RADEON_SE_TCL_SCALAR_DATA_REG, sz-1 ) ); - OUT_RING_USER_TABLE( data, sz ); + OUT_RING_TABLE( cmdbuf->buf, sz ); ADVANCE_RING(); cmdbuf->buf += sz * sizeof(int); cmdbuf->bufsz -= sz * sizeof(int); @@ -2554,7 +2525,6 @@ drm_radeon_cmd_buffer_t *cmdbuf ) { int sz = header.vectors.count; - int __user *data = (int __user *)cmdbuf->buf; int start = header.vectors.offset; int stride = header.vectors.stride; RING_LOCALS; @@ -2563,7 +2533,7 @@ OUT_RING( CP_PACKET0( RADEON_SE_TCL_VECTOR_INDX_REG, 0 ) ); OUT_RING( start | (stride << RADEON_VEC_INDX_OCTWORD_STRIDE_SHIFT)); OUT_RING( CP_PACKET0_TABLE( RADEON_SE_TCL_VECTOR_DATA_REG, (sz-1) ) ); - OUT_RING_USER_TABLE( data, sz ); + OUT_RING_TABLE( cmdbuf->buf, sz ); ADVANCE_RING(); cmdbuf->buf += sz * sizeof(int); @@ -2578,7 +2548,6 @@ { drm_radeon_private_t *dev_priv = dev->dev_private; unsigned int cmdsz; - int __user *cmd = (int __user *)cmdbuf->buf; int ret; RING_LOCALS; @@ -2591,7 +2560,7 @@ } BEGIN_RING( cmdsz ); - OUT_RING_USER_TABLE( cmd, cmdsz ); + OUT_RING_TABLE( cmdbuf->buf, cmdsz ); ADVANCE_RING(); cmdbuf->buf += cmdsz * 4; @@ -2608,7 +2577,6 @@ drm_radeon_private_t *dev_priv = dev->dev_private; drm_clip_rect_t box; unsigned int cmdsz; - int __user *cmd = (int __user *)cmdbuf->buf; int ret; drm_clip_rect_t __user *boxes = cmdbuf->boxes; int i = 0; @@ -2627,7 +2595,7 @@ do { if ( i < cmdbuf->nbox ) { - if (DRM_COPY_FROM_USER_UNCHECKED( &box, &boxes[i], sizeof(box) )) + if (DRM_COPY_FROM_USER( &box, &boxes[i], sizeof(box) )) return DRM_ERR(EFAULT); /* FIXME The second and subsequent times round * this loop, send a WAIT_UNTIL_3D_IDLE before @@ -2650,7 +2618,7 @@ } BEGIN_RING( cmdsz ); - OUT_RING_USER_TABLE( cmd, cmdsz ); + OUT_RING_TABLE( cmdbuf->buf, cmdsz ); ADVANCE_RING(); } while ( ++i < cmdbuf->nbox ); @@ -2703,7 +2671,8 @@ int idx; drm_radeon_cmd_buffer_t cmdbuf; drm_radeon_cmd_header_t header; - int orig_nbox; + int orig_nbox, orig_bufsz; + char *kbuf=NULL; LOCK_TEST_WITH_RETURN( dev, filp ); @@ -2720,24 +2689,29 @@ RING_SPACE_TEST_WITH_RETURN( dev_priv ); VB_AGE_TEST_WITH_RETURN( dev_priv ); + if (cmdbuf.bufsz > 64*1024 || cmdbuf.bufsz<0) { + return DRM_ERR(EINVAL); + } - if (DRM_VERIFYAREA_READ( cmdbuf.buf, cmdbuf.bufsz )) - return DRM_ERR(EFAULT); - - if (cmdbuf.nbox && - DRM_VERIFYAREA_READ(cmdbuf.boxes, - cmdbuf.nbox * sizeof(drm_clip_rect_t))) - return DRM_ERR(EFAULT); + /* Allocate an in-kernel area and copy in the cmdbuf. Do this to avoid + * races between checking values and using those values in other code, + * and simply to avoid a lot of function calls to copy in data. + */ + orig_bufsz = cmdbuf.bufsz; + if (orig_bufsz != 0) { + kbuf = drm_alloc(cmdbuf.bufsz, DRM_MEM_DRIVER); + if (kbuf == NULL) + return DRM_ERR(ENOMEM); + if (DRM_COPY_FROM_USER(kbuf, cmdbuf.buf, cmdbuf.bufsz)) + return DRM_ERR(EFAULT); + cmdbuf.buf = kbuf; + } orig_nbox = cmdbuf.nbox; while ( cmdbuf.bufsz >= sizeof(header) ) { - - if (DRM_GET_USER_UNCHECKED( header.i, (int __user *)cmdbuf.buf )) { - DRM_ERROR("__get_user %p\n", cmdbuf.buf); - return DRM_ERR(EFAULT); - } + header.i = *(int *)cmdbuf.buf; cmdbuf.buf += sizeof(header); cmdbuf.bufsz -= sizeof(header); @@ -2746,7 +2720,7 @@ DRM_DEBUG("RADEON_CMD_PACKET\n"); if (radeon_emit_packets( dev_priv, filp_priv, header, &cmdbuf )) { DRM_ERROR("radeon_emit_packets failed\n"); - return DRM_ERR(EINVAL); + goto err; } break; @@ -2754,7 +2728,7 @@ DRM_DEBUG("RADEON_CMD_SCALARS\n"); if (radeon_emit_scalars( dev_priv, header, &cmdbuf )) { DRM_ERROR("radeon_emit_scalars failed\n"); - return DRM_ERR(EINVAL); + goto err; } break; @@ -2762,7 +2736,7 @@ DRM_DEBUG("RADEON_CMD_VECTORS\n"); if (radeon_emit_vectors( dev_priv, header, &cmdbuf )) { DRM_ERROR("radeon_emit_vectors failed\n"); - return DRM_ERR(EINVAL); + goto err; } break; @@ -2772,14 +2746,14 @@ if ( idx < 0 || idx >= dma->buf_count ) { DRM_ERROR( "buffer index %d (of %d max)\n", idx, dma->buf_count - 1 ); - return DRM_ERR(EINVAL); + goto err; } buf = dma->buflist[idx]; if ( buf->filp != filp || buf->pending ) { DRM_ERROR( "bad buffer %p %p %d\n", buf->filp, filp, buf->pending); - return DRM_ERR(EINVAL); + goto err; } radeon_cp_discard_buffer( dev, buf ); @@ -2789,7 +2763,7 @@ DRM_DEBUG("RADEON_CMD_PACKET3\n"); if (radeon_emit_packet3( dev, filp_priv, &cmdbuf )) { DRM_ERROR("radeon_emit_packet3 failed\n"); - return DRM_ERR(EINVAL); + goto err; } break; @@ -2797,7 +2771,7 @@ DRM_DEBUG("RADEON_CMD_PACKET3_CLIP\n"); if (radeon_emit_packet3_cliprect( dev, filp_priv, &cmdbuf, orig_nbox )) { DRM_ERROR("radeon_emit_packet3_clip failed\n"); - return DRM_ERR(EINVAL); + goto err; } break; @@ -2805,7 +2779,7 @@ DRM_DEBUG("RADEON_CMD_SCALARS2\n"); if (radeon_emit_scalars2( dev_priv, header, &cmdbuf )) { DRM_ERROR("radeon_emit_scalars2 failed\n"); - return DRM_ERR(EINVAL); + goto err; } break; @@ -2813,21 +2787,28 @@ DRM_DEBUG("RADEON_CMD_WAIT\n"); if (radeon_emit_wait( dev, header.wait.flags )) { DRM_ERROR("radeon_emit_wait failed\n"); - return DRM_ERR(EINVAL); + goto err; } break; default: DRM_ERROR("bad cmd_type %d at %p\n", header.header.cmd_type, cmdbuf.buf - sizeof(header)); - return DRM_ERR(EINVAL); + goto err; } } + if (orig_bufsz != 0) + drm_free(kbuf, orig_bufsz, DRM_MEM_DRIVER); DRM_DEBUG("DONE\n"); COMMIT_RING(); return 0; + +err: + if (orig_bufsz != 0) + drm_free(kbuf, orig_bufsz, DRM_MEM_DRIVER); + return DRM_ERR(EINVAL); } diff -urN linux-2.6.11-rc3/drivers/char/hvcs.c linux-2.6.11-rc4/drivers/char/hvcs.c --- linux-2.6.11-rc3/drivers/char/hvcs.c 2005-02-12 19:50:37.297822699 -0800 +++ linux-2.6.11-rc4/drivers/char/hvcs.c 2005-02-12 19:50:55.555613116 -0800 @@ -1363,6 +1363,7 @@ hvcs_tty_driver->driver_name = hvcs_driver_name; hvcs_tty_driver->name = hvcs_device_node; + hvcs_tty_driver->devfs_name = hvcs_device_node; /* * We'll let the system assign us a major number, indicated by leaving diff -urN linux-2.6.11-rc3/drivers/char/ipmi/ipmi_si_intf.c linux-2.6.11-rc4/drivers/char/ipmi/ipmi_si_intf.c --- linux-2.6.11-rc3/drivers/char/ipmi/ipmi_si_intf.c 2005-02-12 19:50:37.334824301 -0800 +++ linux-2.6.11-rc4/drivers/char/ipmi/ipmi_si_intf.c 2005-02-12 19:50:55.615615714 -0800 @@ -1564,48 +1564,54 @@ u8 *data = (u8 *)dm; unsigned long base_addr; u8 reg_spacing; + u8 len = dm->length; - ipmi_data->type = data[0x04]; + ipmi_data->type = data[4]; - memcpy(&base_addr,&data[0x08],sizeof(unsigned long)); - if (base_addr & 1) { - /* I/O */ - base_addr &= 0xFFFE; + memcpy(&base_addr, data+8, sizeof(unsigned long)); + if (len >= 0x11) { + if (base_addr & 1) { + /* I/O */ + base_addr &= 0xFFFE; + ipmi_data->addr_space = IPMI_IO_ADDR_SPACE; + } + else { + /* Memory */ + ipmi_data->addr_space = IPMI_MEM_ADDR_SPACE; + } + /* If bit 4 of byte 0x10 is set, then the lsb for the address + is odd. */ + ipmi_data->base_addr = base_addr | ((data[0x10] & 0x10) >> 4); + + ipmi_data->irq = data[0x11]; + + /* The top two bits of byte 0x10 hold the register spacing. */ + reg_spacing = (data[0x10] & 0xC0) >> 6; + switch(reg_spacing){ + case 0x00: /* Byte boundaries */ + ipmi_data->offset = 1; + break; + case 0x01: /* 32-bit boundaries */ + ipmi_data->offset = 4; + break; + case 0x02: /* 16-byte boundaries */ + ipmi_data->offset = 16; + break; + default: + /* Some other interface, just ignore it. */ + return -EIO; + } + } else { + /* Old DMI spec. */ + ipmi_data->base_addr = base_addr; ipmi_data->addr_space = IPMI_IO_ADDR_SPACE; - } - else { - /* Memory */ - ipmi_data->addr_space = IPMI_MEM_ADDR_SPACE; - } - - /* The top two bits of byte 0x10 hold the register spacing. */ - reg_spacing = (data[0x10] & 0xC0) >> 6; - switch(reg_spacing){ - case 0x00: /* Byte boundaries */ ipmi_data->offset = 1; - break; - case 0x01: /* 32-bit boundaries */ - ipmi_data->offset = 4; - break; - case 0x02: /* 16-byte boundaries */ - ipmi_data->offset = 16; - break; - default: - printk("ipmi_si: Unknown SMBIOS IPMI Base Addr" - " Modifier: 0x%x\n", reg_spacing); - return -EIO; } - /* If bit 4 of byte 0x10 is set, then the lsb for the address - is odd. */ - ipmi_data->base_addr = base_addr | ((data[0x10] & 0x10) >> 4); - - ipmi_data->irq = data[0x11]; - if (is_new_interface(-1, ipmi_data->addr_space,ipmi_data->base_addr)) - return 0; + return 0; - memset(ipmi_data,0,sizeof(dmi_ipmi_data_t)); + memset(ipmi_data, 0, sizeof(dmi_ipmi_data_t)); return -1; } diff -urN linux-2.6.11-rc3/drivers/char/mmtimer.c linux-2.6.11-rc4/drivers/char/mmtimer.c --- linux-2.6.11-rc3/drivers/char/mmtimer.c 2004-12-24 13:35:20.000000000 -0800 +++ linux-2.6.11-rc4/drivers/char/mmtimer.c 2005-02-12 19:50:55.638616710 -0800 @@ -36,9 +36,7 @@ #include #include #include - -/* This is ugly and jbarnes has promised me to fix this later */ -#include "../../arch/ia64/sn/include/shubio.h" +#include MODULE_AUTHOR("Jesse Barnes "); MODULE_DESCRIPTION("SGI Altix RTC Timer"); diff -urN linux-2.6.11-rc3/drivers/char/mxser.c linux-2.6.11-rc4/drivers/char/mxser.c --- linux-2.6.11-rc3/drivers/char/mxser.c 2005-02-12 19:50:37.350824993 -0800 +++ linux-2.6.11-rc4/drivers/char/mxser.c 2005-02-12 19:50:55.679618485 -0800 @@ -556,7 +556,7 @@ info = &mxvar_table[n]; /*if (verbose) */ { printk(KERN_DEBUG " ttyM%d - ttyM%d ", n, n + hwconf->ports - 1); - printk(KERN_DEBUG " max. baud rate = %d bps.\n", hwconf->MaxCanSetBaudRate[0]); + printk(" max. baud rate = %d bps.\n", hwconf->MaxCanSetBaudRate[0]); } for (i = 0; i < hwconf->ports; i++, n++, info++) { @@ -609,18 +609,12 @@ n = board * MXSER_PORTS_PER_BOARD; info = &mxvar_table[n]; - spin_lock_irqsave(&info->slock, flags); retval = request_irq(hwconf->irq, mxser_interrupt, IRQ_T(info), "mxser", info); if (retval) { - spin_unlock_irqrestore(&info->slock, flags); printk(KERN_ERR "Board %d: %s", board, mxser_brdname[hwconf->board_type - 1]); printk(" Request irq fail,IRQ (%d) may be conflit with another device.\n", info->irq); return retval; } - - spin_unlock_irqrestore(&info->slock, flags); - - return 0; } @@ -2144,10 +2138,9 @@ mxvar_log.rxcnt[info->port] += cnt; info->mon_data.rxcnt += cnt; info->mon_data.up_rxcnt += cnt; - - tty->ldisc.receive_buf(tty, tty->flip.char_buf, tty->flip.flag_buf, count); spin_unlock_irqrestore(&info->slock, flags); - + + tty_flip_buffer_push(tty); } static void mxser_transmit_chars(struct mxser_struct *info) diff -urN linux-2.6.11-rc3/drivers/char/sonypi.c linux-2.6.11-rc4/drivers/char/sonypi.c --- linux-2.6.11-rc3/drivers/char/sonypi.c 2005-02-12 19:50:37.406827418 -0800 +++ linux-2.6.11-rc4/drivers/char/sonypi.c 2005-02-12 19:50:55.805623940 -0800 @@ -1,7 +1,9 @@ /* * Sony Programmable I/O Control Device driver for VAIO * - * Copyright (C) 2001-2004 Stelian Pop + * Copyright (C) 2001-2005 Stelian Pop + * + * Copyright (C) 2005 Narayanan R S * * Copyright (C) 2001-2002 Alcôve * @@ -45,14 +47,16 @@ #include #include #include +#include #include #include #include -#include "sonypi.h" #include +#define SONYPI_DRIVER_VERSION "1.26" + MODULE_AUTHOR("Stelian Pop "); MODULE_DESCRIPTION("Sony Programmable I/O Control Device driver"); MODULE_LICENSE("GPL"); @@ -92,7 +96,390 @@ MODULE_PARM_DESC(useinput, "set this if you would like sonypi to feed events to the input subsystem"); -static struct sonypi_device sonypi_device; +#define SONYPI_DEVICE_MODEL_TYPE1 1 +#define SONYPI_DEVICE_MODEL_TYPE2 2 + +/* type1 models use those */ +#define SONYPI_IRQ_PORT 0x8034 +#define SONYPI_IRQ_SHIFT 22 +#define SONYPI_BASE 0x50 +#define SONYPI_G10A (SONYPI_BASE+0x14) +#define SONYPI_TYPE1_REGION_SIZE 0x08 +#define SONYPI_TYPE1_EVTYPE_OFFSET 0x04 + +/* type2 series specifics */ +#define SONYPI_SIRQ 0x9b +#define SONYPI_SLOB 0x9c +#define SONYPI_SHIB 0x9d +#define SONYPI_TYPE2_REGION_SIZE 0x20 +#define SONYPI_TYPE2_EVTYPE_OFFSET 0x12 + +/* battery / brightness addresses */ +#define SONYPI_BAT_FLAGS 0x81 +#define SONYPI_LCD_LIGHT 0x96 +#define SONYPI_BAT1_PCTRM 0xa0 +#define SONYPI_BAT1_LEFT 0xa2 +#define SONYPI_BAT1_MAXRT 0xa4 +#define SONYPI_BAT2_PCTRM 0xa8 +#define SONYPI_BAT2_LEFT 0xaa +#define SONYPI_BAT2_MAXRT 0xac +#define SONYPI_BAT1_MAXTK 0xb0 +#define SONYPI_BAT1_FULL 0xb2 +#define SONYPI_BAT2_MAXTK 0xb8 +#define SONYPI_BAT2_FULL 0xba + +/* FAN0 information (reverse engineered from ACPI tables) */ +#define SONYPI_FAN0_STATUS 0x93 +#define SONYPI_TEMP_STATUS 0xC1 + +/* ioports used for brightness and type2 events */ +#define SONYPI_DATA_IOPORT 0x62 +#define SONYPI_CST_IOPORT 0x66 + +/* The set of possible ioports */ +struct sonypi_ioport_list { + u16 port1; + u16 port2; +}; + +static struct sonypi_ioport_list sonypi_type1_ioport_list[] = { + { 0x10c0, 0x10c4 }, /* looks like the default on C1Vx */ + { 0x1080, 0x1084 }, + { 0x1090, 0x1094 }, + { 0x10a0, 0x10a4 }, + { 0x10b0, 0x10b4 }, + { 0x0, 0x0 } +}; + +static struct sonypi_ioport_list sonypi_type2_ioport_list[] = { + { 0x1080, 0x1084 }, + { 0x10a0, 0x10a4 }, + { 0x10c0, 0x10c4 }, + { 0x10e0, 0x10e4 }, + { 0x0, 0x0 } +}; + +/* The set of possible interrupts */ +struct sonypi_irq_list { + u16 irq; + u16 bits; +}; + +static struct sonypi_irq_list sonypi_type1_irq_list[] = { + { 11, 0x2 }, /* IRQ 11, GO22=0,GO23=1 in AML */ + { 10, 0x1 }, /* IRQ 10, GO22=1,GO23=0 in AML */ + { 5, 0x0 }, /* IRQ 5, GO22=0,GO23=0 in AML */ + { 0, 0x3 } /* no IRQ, GO22=1,GO23=1 in AML */ +}; + +static struct sonypi_irq_list sonypi_type2_irq_list[] = { + { 11, 0x80 }, /* IRQ 11, 0x80 in SIRQ in AML */ + { 10, 0x40 }, /* IRQ 10, 0x40 in SIRQ in AML */ + { 9, 0x20 }, /* IRQ 9, 0x20 in SIRQ in AML */ + { 6, 0x10 }, /* IRQ 6, 0x10 in SIRQ in AML */ + { 0, 0x00 } /* no IRQ, 0x00 in SIRQ in AML */ +}; + +#define SONYPI_CAMERA_BRIGHTNESS 0 +#define SONYPI_CAMERA_CONTRAST 1 +#define SONYPI_CAMERA_HUE 2 +#define SONYPI_CAMERA_COLOR 3 +#define SONYPI_CAMERA_SHARPNESS 4 + +#define SONYPI_CAMERA_PICTURE 5 +#define SONYPI_CAMERA_EXPOSURE_MASK 0xC +#define SONYPI_CAMERA_WHITE_BALANCE_MASK 0x3 +#define SONYPI_CAMERA_PICTURE_MODE_MASK 0x30 +#define SONYPI_CAMERA_MUTE_MASK 0x40 + +/* the rest don't need a loop until not 0xff */ +#define SONYPI_CAMERA_AGC 6 +#define SONYPI_CAMERA_AGC_MASK 0x30 +#define SONYPI_CAMERA_SHUTTER_MASK 0x7 + +#define SONYPI_CAMERA_SHUTDOWN_REQUEST 7 +#define SONYPI_CAMERA_CONTROL 0x10 + +#define SONYPI_CAMERA_STATUS 7 +#define SONYPI_CAMERA_STATUS_READY 0x2 +#define SONYPI_CAMERA_STATUS_POSITION 0x4 + +#define SONYPI_DIRECTION_BACKWARDS 0x4 + +#define SONYPI_CAMERA_REVISION 8 +#define SONYPI_CAMERA_ROMVERSION 9 + +/* Event masks */ +#define SONYPI_JOGGER_MASK 0x00000001 +#define SONYPI_CAPTURE_MASK 0x00000002 +#define SONYPI_FNKEY_MASK 0x00000004 +#define SONYPI_BLUETOOTH_MASK 0x00000008 +#define SONYPI_PKEY_MASK 0x00000010 +#define SONYPI_BACK_MASK 0x00000020 +#define SONYPI_HELP_MASK 0x00000040 +#define SONYPI_LID_MASK 0x00000080 +#define SONYPI_ZOOM_MASK 0x00000100 +#define SONYPI_THUMBPHRASE_MASK 0x00000200 +#define SONYPI_MEYE_MASK 0x00000400 +#define SONYPI_MEMORYSTICK_MASK 0x00000800 +#define SONYPI_BATTERY_MASK 0x00001000 + +struct sonypi_event { + u8 data; + u8 event; +}; + +/* The set of possible button release events */ +static struct sonypi_event sonypi_releaseev[] = { + { 0x00, SONYPI_EVENT_ANYBUTTON_RELEASED }, + { 0, 0 } +}; + +/* The set of possible jogger events */ +static struct sonypi_event sonypi_joggerev[] = { + { 0x1f, SONYPI_EVENT_JOGDIAL_UP }, + { 0x01, SONYPI_EVENT_JOGDIAL_DOWN }, + { 0x5f, SONYPI_EVENT_JOGDIAL_UP_PRESSED }, + { 0x41, SONYPI_EVENT_JOGDIAL_DOWN_PRESSED }, + { 0x1e, SONYPI_EVENT_JOGDIAL_FAST_UP }, + { 0x02, SONYPI_EVENT_JOGDIAL_FAST_DOWN }, + { 0x5e, SONYPI_EVENT_JOGDIAL_FAST_UP_PRESSED }, + { 0x42, SONYPI_EVENT_JOGDIAL_FAST_DOWN_PRESSED }, + { 0x1d, SONYPI_EVENT_JOGDIAL_VFAST_UP }, + { 0x03, SONYPI_EVENT_JOGDIAL_VFAST_DOWN }, + { 0x5d, SONYPI_EVENT_JOGDIAL_VFAST_UP_PRESSED }, + { 0x43, SONYPI_EVENT_JOGDIAL_VFAST_DOWN_PRESSED }, + { 0x40, SONYPI_EVENT_JOGDIAL_PRESSED }, + { 0, 0 } +}; + +/* The set of possible capture button events */ +static struct sonypi_event sonypi_captureev[] = { + { 0x05, SONYPI_EVENT_CAPTURE_PARTIALPRESSED }, + { 0x07, SONYPI_EVENT_CAPTURE_PRESSED }, + { 0x01, SONYPI_EVENT_CAPTURE_PARTIALRELEASED }, + { 0, 0 } +}; + +/* The set of possible fnkeys events */ +static struct sonypi_event sonypi_fnkeyev[] = { + { 0x10, SONYPI_EVENT_FNKEY_ESC }, + { 0x11, SONYPI_EVENT_FNKEY_F1 }, + { 0x12, SONYPI_EVENT_FNKEY_F2 }, + { 0x13, SONYPI_EVENT_FNKEY_F3 }, + { 0x14, SONYPI_EVENT_FNKEY_F4 }, + { 0x15, SONYPI_EVENT_FNKEY_F5 }, + { 0x16, SONYPI_EVENT_FNKEY_F6 }, + { 0x17, SONYPI_EVENT_FNKEY_F7 }, + { 0x18, SONYPI_EVENT_FNKEY_F8 }, + { 0x19, SONYPI_EVENT_FNKEY_F9 }, + { 0x1a, SONYPI_EVENT_FNKEY_F10 }, + { 0x1b, SONYPI_EVENT_FNKEY_F11 }, + { 0x1c, SONYPI_EVENT_FNKEY_F12 }, + { 0x1f, SONYPI_EVENT_FNKEY_RELEASED }, + { 0x21, SONYPI_EVENT_FNKEY_1 }, + { 0x22, SONYPI_EVENT_FNKEY_2 }, + { 0x31, SONYPI_EVENT_FNKEY_D }, + { 0x32, SONYPI_EVENT_FNKEY_E }, + { 0x33, SONYPI_EVENT_FNKEY_F }, + { 0x34, SONYPI_EVENT_FNKEY_S }, + { 0x35, SONYPI_EVENT_FNKEY_B }, + { 0x36, SONYPI_EVENT_FNKEY_ONLY }, + { 0, 0 } +}; + +/* The set of possible program key events */ +static struct sonypi_event sonypi_pkeyev[] = { + { 0x01, SONYPI_EVENT_PKEY_P1 }, + { 0x02, SONYPI_EVENT_PKEY_P2 }, + { 0x04, SONYPI_EVENT_PKEY_P3 }, + { 0x5c, SONYPI_EVENT_PKEY_P1 }, + { 0, 0 } +}; + +/* The set of possible bluetooth events */ +static struct sonypi_event sonypi_blueev[] = { + { 0x55, SONYPI_EVENT_BLUETOOTH_PRESSED }, + { 0x59, SONYPI_EVENT_BLUETOOTH_ON }, + { 0x5a, SONYPI_EVENT_BLUETOOTH_OFF }, + { 0, 0 } +}; + +/* The set of possible back button events */ +static struct sonypi_event sonypi_backev[] = { + { 0x20, SONYPI_EVENT_BACK_PRESSED }, + { 0, 0 } +}; + +/* The set of possible help button events */ +static struct sonypi_event sonypi_helpev[] = { + { 0x3b, SONYPI_EVENT_HELP_PRESSED }, + { 0, 0 } +}; + + +/* The set of possible lid events */ +static struct sonypi_event sonypi_lidev[] = { + { 0x51, SONYPI_EVENT_LID_CLOSED }, + { 0x50, SONYPI_EVENT_LID_OPENED }, + { 0, 0 } +}; + +/* The set of possible zoom events */ +static struct sonypi_event sonypi_zoomev[] = { + { 0x39, SONYPI_EVENT_ZOOM_PRESSED }, + { 0, 0 } +}; + +/* The set of possible thumbphrase events */ +static struct sonypi_event sonypi_thumbphraseev[] = { + { 0x3a, SONYPI_EVENT_THUMBPHRASE_PRESSED }, + { 0, 0 } +}; + +/* The set of possible motioneye camera events */ +static struct sonypi_event sonypi_meyeev[] = { + { 0x00, SONYPI_EVENT_MEYE_FACE }, + { 0x01, SONYPI_EVENT_MEYE_OPPOSITE }, + { 0, 0 } +}; + +/* The set of possible memorystick events */ +static struct sonypi_event sonypi_memorystickev[] = { + { 0x53, SONYPI_EVENT_MEMORYSTICK_INSERT }, + { 0x54, SONYPI_EVENT_MEMORYSTICK_EJECT }, + { 0, 0 } +}; + +/* The set of possible battery events */ +static struct sonypi_event sonypi_batteryev[] = { + { 0x20, SONYPI_EVENT_BATTERY_INSERT }, + { 0x30, SONYPI_EVENT_BATTERY_REMOVE }, + { 0, 0 } +}; + +static struct sonypi_eventtypes { + int model; + u8 data; + unsigned long mask; + struct sonypi_event * events; +} sonypi_eventtypes[] = { + { SONYPI_DEVICE_MODEL_TYPE1, 0, 0xffffffff, sonypi_releaseev }, + { SONYPI_DEVICE_MODEL_TYPE1, 0x70, SONYPI_MEYE_MASK, sonypi_meyeev }, + { SONYPI_DEVICE_MODEL_TYPE1, 0x30, SONYPI_LID_MASK, sonypi_lidev }, + { SONYPI_DEVICE_MODEL_TYPE1, 0x60, SONYPI_CAPTURE_MASK, sonypi_captureev }, + { SONYPI_DEVICE_MODEL_TYPE1, 0x10, SONYPI_JOGGER_MASK, sonypi_joggerev }, + { SONYPI_DEVICE_MODEL_TYPE1, 0x20, SONYPI_FNKEY_MASK, sonypi_fnkeyev }, + { SONYPI_DEVICE_MODEL_TYPE1, 0x30, SONYPI_BLUETOOTH_MASK, sonypi_blueev }, + { SONYPI_DEVICE_MODEL_TYPE1, 0x40, SONYPI_PKEY_MASK, sonypi_pkeyev }, + { SONYPI_DEVICE_MODEL_TYPE1, 0x30, SONYPI_MEMORYSTICK_MASK, sonypi_memorystickev }, + { SONYPI_DEVICE_MODEL_TYPE1, 0x40, SONYPI_BATTERY_MASK, sonypi_batteryev }, + + { SONYPI_DEVICE_MODEL_TYPE2, 0, 0xffffffff, sonypi_releaseev }, + { SONYPI_DEVICE_MODEL_TYPE2, 0x38, SONYPI_LID_MASK, sonypi_lidev }, + { SONYPI_DEVICE_MODEL_TYPE2, 0x11, SONYPI_JOGGER_MASK, sonypi_joggerev }, + { SONYPI_DEVICE_MODEL_TYPE2, 0x61, SONYPI_CAPTURE_MASK, sonypi_captureev }, + { SONYPI_DEVICE_MODEL_TYPE2, 0x21, SONYPI_FNKEY_MASK, sonypi_fnkeyev }, + { SONYPI_DEVICE_MODEL_TYPE2, 0x31, SONYPI_BLUETOOTH_MASK, sonypi_blueev }, + { SONYPI_DEVICE_MODEL_TYPE2, 0x08, SONYPI_PKEY_MASK, sonypi_pkeyev }, + { SONYPI_DEVICE_MODEL_TYPE2, 0x11, SONYPI_BACK_MASK, sonypi_backev }, + { SONYPI_DEVICE_MODEL_TYPE2, 0x08, SONYPI_HELP_MASK, sonypi_helpev }, + { SONYPI_DEVICE_MODEL_TYPE2, 0x21, SONYPI_HELP_MASK, sonypi_helpev }, + { SONYPI_DEVICE_MODEL_TYPE2, 0x21, SONYPI_ZOOM_MASK, sonypi_zoomev }, + { SONYPI_DEVICE_MODEL_TYPE2, 0x20, SONYPI_THUMBPHRASE_MASK, sonypi_thumbphraseev }, + { SONYPI_DEVICE_MODEL_TYPE2, 0x31, SONYPI_MEMORYSTICK_MASK, sonypi_memorystickev }, + { SONYPI_DEVICE_MODEL_TYPE2, 0x41, SONYPI_BATTERY_MASK, sonypi_batteryev }, + { SONYPI_DEVICE_MODEL_TYPE2, 0x31, SONYPI_PKEY_MASK, sonypi_pkeyev }, + + { 0 } +}; + +#define SONYPI_BUF_SIZE 128 + +/* The name of the devices for the input device drivers */ +#define SONYPI_JOG_INPUTNAME "Sony Vaio Jogdial" +#define SONYPI_KEY_INPUTNAME "Sony Vaio Keys" + +/* Correspondance table between sonypi events and input layer events */ +static struct { + int sonypiev; + int inputev; +} sonypi_inputkeys[] = { + { SONYPI_EVENT_CAPTURE_PRESSED, KEY_CAMERA }, + { SONYPI_EVENT_FNKEY_ONLY, KEY_FN }, + { SONYPI_EVENT_FNKEY_ESC, KEY_FN_ESC }, + { SONYPI_EVENT_FNKEY_F1, KEY_FN_F1 }, + { SONYPI_EVENT_FNKEY_F2, KEY_FN_F2 }, + { SONYPI_EVENT_FNKEY_F3, KEY_FN_F3 }, + { SONYPI_EVENT_FNKEY_F4, KEY_FN_F4 }, + { SONYPI_EVENT_FNKEY_F5, KEY_FN_F5 }, + { SONYPI_EVENT_FNKEY_F6, KEY_FN_F6 }, + { SONYPI_EVENT_FNKEY_F7, KEY_FN_F7 }, + { SONYPI_EVENT_FNKEY_F8, KEY_FN_F8 }, + { SONYPI_EVENT_FNKEY_F9, KEY_FN_F9 }, + { SONYPI_EVENT_FNKEY_F10, KEY_FN_F10 }, + { SONYPI_EVENT_FNKEY_F11, KEY_FN_F11 }, + { SONYPI_EVENT_FNKEY_F12, KEY_FN_F12 }, + { SONYPI_EVENT_FNKEY_1, KEY_FN_1 }, + { SONYPI_EVENT_FNKEY_2, KEY_FN_2 }, + { SONYPI_EVENT_FNKEY_D, KEY_FN_D }, + { SONYPI_EVENT_FNKEY_E, KEY_FN_E }, + { SONYPI_EVENT_FNKEY_F, KEY_FN_F }, + { SONYPI_EVENT_FNKEY_S, KEY_FN_S }, + { SONYPI_EVENT_FNKEY_B, KEY_FN_B }, + { SONYPI_EVENT_BLUETOOTH_PRESSED, KEY_BLUE }, + { SONYPI_EVENT_BLUETOOTH_ON, KEY_BLUE }, + { SONYPI_EVENT_PKEY_P1, KEY_PROG1 }, + { SONYPI_EVENT_PKEY_P2, KEY_PROG2 }, + { SONYPI_EVENT_PKEY_P3, KEY_PROG3 }, + { SONYPI_EVENT_BACK_PRESSED, KEY_BACK }, + { SONYPI_EVENT_HELP_PRESSED, KEY_HELP }, + { SONYPI_EVENT_ZOOM_PRESSED, KEY_ZOOM }, + { SONYPI_EVENT_THUMBPHRASE_PRESSED, BTN_THUMB }, + { 0, 0 }, +}; + +static struct sonypi_device { + struct pci_dev *dev; + struct platform_device *pdev; + u16 irq; + u16 bits; + u16 ioport1; + u16 ioport2; + u16 region_size; + u16 evtype_offset; + int camera_power; + int bluetooth_power; + struct semaphore lock; + struct kfifo *fifo; + spinlock_t fifo_lock; + wait_queue_head_t fifo_proc_list; + struct fasync_struct *fifo_async; + int open_count; + int model; + struct input_dev input_jog_dev; + struct input_dev input_key_dev; + struct work_struct input_work; + struct kfifo *input_fifo; + spinlock_t input_fifo_lock; +} sonypi_device; + +#define ITERATIONS_LONG 10000 +#define ITERATIONS_SHORT 10 + +#define wait_on_command(quiet, command, iterations) { \ + unsigned int n = iterations; \ + while (--n && (command)) \ + udelay(1); \ + if (!n && (verbose || !quiet)) \ + printk(KERN_WARNING "sonypi command failed at %s : %s (line %d)\n", __FILE__, __FUNCTION__, __LINE__); \ +} + +#ifdef CONFIG_ACPI +#define SONYPI_ACPI_ACTIVE (!acpi_disabled) +#else +#define SONYPI_ACPI_ACTIVE 0 +#endif /* CONFIG_ACPI */ static int sonypi_ec_write(u8 addr, u8 value) { @@ -286,17 +673,14 @@ for (j = 5; j > 0; j--) { - while (sonypi_call2(0x91, 0x1)) { - set_current_state(TASK_UNINTERRUPTIBLE); - schedule_timeout(1); - } + while (sonypi_call2(0x91, 0x1)) + msleep(10); sonypi_call1(0x93); for (i = 400; i > 0; i--) { if (sonypi_camera_ready()) break; - set_current_state(TASK_UNINTERRUPTIBLE); - schedule_timeout(1); + msleep(10); } if (i) break; @@ -631,6 +1015,32 @@ } sonypi_setbluetoothpower(val8); break; + /* FAN Controls */ + case SONYPI_IOCGFAN: + if (sonypi_ec_read(SONYPI_FAN0_STATUS, &val8)) { + ret = -EIO; + break; + } + if (copy_to_user((u8 *)arg, &val8, sizeof(val8))) + ret = -EFAULT; + break; + case SONYPI_IOCSFAN: + if (copy_from_user(&val8, (u8 *)arg, sizeof(val8))) { + ret = -EFAULT; + break; + } + if (sonypi_ec_write(SONYPI_FAN0_STATUS, val8)) + ret = -EIO; + break; + /* GET Temperature (useful under APM) */ + case SONYPI_IOCGTEMP: + if (sonypi_ec_read(SONYPI_TEMP_STATUS, &val8)) { + ret = -EIO; + break; + } + if (copy_to_user((u8 *)arg, &val8, sizeof(val8))) + ret = -EFAULT; + break; default: ret = -EINVAL; } @@ -648,8 +1058,8 @@ .ioctl = sonypi_misc_ioctl, }; -struct miscdevice sonypi_misc_device = { - .minor = -1, +static struct miscdevice sonypi_misc_device = { + .minor = MISC_DYNAMIC_MINOR, .name = "sonypi", .fops = &sonypi_misc_fops, }; @@ -758,7 +1168,8 @@ goto out_pcienable; } - sonypi_misc_device.minor = (minor == -1) ? MISC_DYNAMIC_MINOR : minor; + if (minor != -1) + sonypi_misc_device.minor = minor; if ((ret = misc_register(&sonypi_misc_device))) { printk(KERN_ERR "sonypi: misc_register failed\n"); goto out_miscreg; diff -urN linux-2.6.11-rc3/drivers/char/sonypi.h linux-2.6.11-rc4/drivers/char/sonypi.h --- linux-2.6.11-rc3/drivers/char/sonypi.h 2004-12-24 13:34:58.000000000 -0800 +++ linux-2.6.11-rc4/drivers/char/sonypi.h 1969-12-31 16:00:00.000000000 -0800 @@ -1,431 +0,0 @@ -/* - * Sony Programmable I/O Control Device driver for VAIO - * - * Copyright (C) 2001-2004 Stelian Pop - * - * Copyright (C) 2001-2002 Alcôve - * - * Copyright (C) 2001 Michael Ashley - * - * Copyright (C) 2001 Junichi Morita - * - * Copyright (C) 2000 Takaya Kinjo - * - * Copyright (C) 2000 Andrew Tridgell - * - * Earlier work by Werner Almesberger, Paul `Rusty' Russell and Paul Mackerras. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - * - */ - -#ifndef _SONYPI_PRIV_H_ -#define _SONYPI_PRIV_H_ - -#ifdef __KERNEL__ - -#define SONYPI_DRIVER_VERSION "1.25" - -#define SONYPI_DEVICE_MODEL_TYPE1 1 -#define SONYPI_DEVICE_MODEL_TYPE2 2 - -#include -#include -#include -#include -#include -#include -#include - -/* type1 models use those */ -#define SONYPI_IRQ_PORT 0x8034 -#define SONYPI_IRQ_SHIFT 22 -#define SONYPI_BASE 0x50 -#define SONYPI_G10A (SONYPI_BASE+0x14) -#define SONYPI_TYPE1_REGION_SIZE 0x08 -#define SONYPI_TYPE1_EVTYPE_OFFSET 0x04 - -/* type2 series specifics */ -#define SONYPI_SIRQ 0x9b -#define SONYPI_SLOB 0x9c -#define SONYPI_SHIB 0x9d -#define SONYPI_TYPE2_REGION_SIZE 0x20 -#define SONYPI_TYPE2_EVTYPE_OFFSET 0x12 - -/* battery / brightness addresses */ -#define SONYPI_BAT_FLAGS 0x81 -#define SONYPI_LCD_LIGHT 0x96 -#define SONYPI_BAT1_PCTRM 0xa0 -#define SONYPI_BAT1_LEFT 0xa2 -#define SONYPI_BAT1_MAXRT 0xa4 -#define SONYPI_BAT2_PCTRM 0xa8 -#define SONYPI_BAT2_LEFT 0xaa -#define SONYPI_BAT2_MAXRT 0xac -#define SONYPI_BAT1_MAXTK 0xb0 -#define SONYPI_BAT1_FULL 0xb2 -#define SONYPI_BAT2_MAXTK 0xb8 -#define SONYPI_BAT2_FULL 0xba - -/* ioports used for brightness and type2 events */ -#define SONYPI_DATA_IOPORT 0x62 -#define SONYPI_CST_IOPORT 0x66 - -/* The set of possible ioports */ -struct sonypi_ioport_list { - u16 port1; - u16 port2; -}; - -static struct sonypi_ioport_list sonypi_type1_ioport_list[] = { - { 0x10c0, 0x10c4 }, /* looks like the default on C1Vx */ - { 0x1080, 0x1084 }, - { 0x1090, 0x1094 }, - { 0x10a0, 0x10a4 }, - { 0x10b0, 0x10b4 }, - { 0x0, 0x0 } -}; - -static struct sonypi_ioport_list sonypi_type2_ioport_list[] = { - { 0x1080, 0x1084 }, - { 0x10a0, 0x10a4 }, - { 0x10c0, 0x10c4 }, - { 0x10e0, 0x10e4 }, - { 0x0, 0x0 } -}; - -/* The set of possible interrupts */ -struct sonypi_irq_list { - u16 irq; - u16 bits; -}; - -static struct sonypi_irq_list sonypi_type1_irq_list[] = { - { 11, 0x2 }, /* IRQ 11, GO22=0,GO23=1 in AML */ - { 10, 0x1 }, /* IRQ 10, GO22=1,GO23=0 in AML */ - { 5, 0x0 }, /* IRQ 5, GO22=0,GO23=0 in AML */ - { 0, 0x3 } /* no IRQ, GO22=1,GO23=1 in AML */ -}; - -static struct sonypi_irq_list sonypi_type2_irq_list[] = { - { 11, 0x80 }, /* IRQ 11, 0x80 in SIRQ in AML */ - { 10, 0x40 }, /* IRQ 10, 0x40 in SIRQ in AML */ - { 9, 0x20 }, /* IRQ 9, 0x20 in SIRQ in AML */ - { 6, 0x10 }, /* IRQ 6, 0x10 in SIRQ in AML */ - { 0, 0x00 } /* no IRQ, 0x00 in SIRQ in AML */ -}; - -#define SONYPI_CAMERA_BRIGHTNESS 0 -#define SONYPI_CAMERA_CONTRAST 1 -#define SONYPI_CAMERA_HUE 2 -#define SONYPI_CAMERA_COLOR 3 -#define SONYPI_CAMERA_SHARPNESS 4 - -#define SONYPI_CAMERA_PICTURE 5 -#define SONYPI_CAMERA_EXPOSURE_MASK 0xC -#define SONYPI_CAMERA_WHITE_BALANCE_MASK 0x3 -#define SONYPI_CAMERA_PICTURE_MODE_MASK 0x30 -#define SONYPI_CAMERA_MUTE_MASK 0x40 - -/* the rest don't need a loop until not 0xff */ -#define SONYPI_CAMERA_AGC 6 -#define SONYPI_CAMERA_AGC_MASK 0x30 -#define SONYPI_CAMERA_SHUTTER_MASK 0x7 - -#define SONYPI_CAMERA_SHUTDOWN_REQUEST 7 -#define SONYPI_CAMERA_CONTROL 0x10 - -#define SONYPI_CAMERA_STATUS 7 -#define SONYPI_CAMERA_STATUS_READY 0x2 -#define SONYPI_CAMERA_STATUS_POSITION 0x4 - -#define SONYPI_DIRECTION_BACKWARDS 0x4 - -#define SONYPI_CAMERA_REVISION 8 -#define SONYPI_CAMERA_ROMVERSION 9 - -/* Event masks */ -#define SONYPI_JOGGER_MASK 0x00000001 -#define SONYPI_CAPTURE_MASK 0x00000002 -#define SONYPI_FNKEY_MASK 0x00000004 -#define SONYPI_BLUETOOTH_MASK 0x00000008 -#define SONYPI_PKEY_MASK 0x00000010 -#define SONYPI_BACK_MASK 0x00000020 -#define SONYPI_HELP_MASK 0x00000040 -#define SONYPI_LID_MASK 0x00000080 -#define SONYPI_ZOOM_MASK 0x00000100 -#define SONYPI_THUMBPHRASE_MASK 0x00000200 -#define SONYPI_MEYE_MASK 0x00000400 -#define SONYPI_MEMORYSTICK_MASK 0x00000800 -#define SONYPI_BATTERY_MASK 0x00001000 - -struct sonypi_event { - u8 data; - u8 event; -}; - -/* The set of possible button release events */ -static struct sonypi_event sonypi_releaseev[] = { - { 0x00, SONYPI_EVENT_ANYBUTTON_RELEASED }, - { 0, 0 } -}; - -/* The set of possible jogger events */ -static struct sonypi_event sonypi_joggerev[] = { - { 0x1f, SONYPI_EVENT_JOGDIAL_UP }, - { 0x01, SONYPI_EVENT_JOGDIAL_DOWN }, - { 0x5f, SONYPI_EVENT_JOGDIAL_UP_PRESSED }, - { 0x41, SONYPI_EVENT_JOGDIAL_DOWN_PRESSED }, - { 0x1e, SONYPI_EVENT_JOGDIAL_FAST_UP }, - { 0x02, SONYPI_EVENT_JOGDIAL_FAST_DOWN }, - { 0x5e, SONYPI_EVENT_JOGDIAL_FAST_UP_PRESSED }, - { 0x42, SONYPI_EVENT_JOGDIAL_FAST_DOWN_PRESSED }, - { 0x1d, SONYPI_EVENT_JOGDIAL_VFAST_UP }, - { 0x03, SONYPI_EVENT_JOGDIAL_VFAST_DOWN }, - { 0x5d, SONYPI_EVENT_JOGDIAL_VFAST_UP_PRESSED }, - { 0x43, SONYPI_EVENT_JOGDIAL_VFAST_DOWN_PRESSED }, - { 0x40, SONYPI_EVENT_JOGDIAL_PRESSED }, - { 0, 0 } -}; - -/* The set of possible capture button events */ -static struct sonypi_event sonypi_captureev[] = { - { 0x05, SONYPI_EVENT_CAPTURE_PARTIALPRESSED }, - { 0x07, SONYPI_EVENT_CAPTURE_PRESSED }, - { 0x01, SONYPI_EVENT_CAPTURE_PARTIALRELEASED }, - { 0, 0 } -}; - -/* The set of possible fnkeys events */ -static struct sonypi_event sonypi_fnkeyev[] = { - { 0x10, SONYPI_EVENT_FNKEY_ESC }, - { 0x11, SONYPI_EVENT_FNKEY_F1 }, - { 0x12, SONYPI_EVENT_FNKEY_F2 }, - { 0x13, SONYPI_EVENT_FNKEY_F3 }, - { 0x14, SONYPI_EVENT_FNKEY_F4 }, - { 0x15, SONYPI_EVENT_FNKEY_F5 }, - { 0x16, SONYPI_EVENT_FNKEY_F6 }, - { 0x17, SONYPI_EVENT_FNKEY_F7 }, - { 0x18, SONYPI_EVENT_FNKEY_F8 }, - { 0x19, SONYPI_EVENT_FNKEY_F9 }, - { 0x1a, SONYPI_EVENT_FNKEY_F10 }, - { 0x1b, SONYPI_EVENT_FNKEY_F11 }, - { 0x1c, SONYPI_EVENT_FNKEY_F12 }, - { 0x1f, SONYPI_EVENT_FNKEY_RELEASED }, - { 0x21, SONYPI_EVENT_FNKEY_1 }, - { 0x22, SONYPI_EVENT_FNKEY_2 }, - { 0x31, SONYPI_EVENT_FNKEY_D }, - { 0x32, SONYPI_EVENT_FNKEY_E }, - { 0x33, SONYPI_EVENT_FNKEY_F }, - { 0x34, SONYPI_EVENT_FNKEY_S }, - { 0x35, SONYPI_EVENT_FNKEY_B }, - { 0x36, SONYPI_EVENT_FNKEY_ONLY }, - { 0, 0 } -}; - -/* The set of possible program key events */ -static struct sonypi_event sonypi_pkeyev[] = { - { 0x01, SONYPI_EVENT_PKEY_P1 }, - { 0x02, SONYPI_EVENT_PKEY_P2 }, - { 0x04, SONYPI_EVENT_PKEY_P3 }, - { 0x5c, SONYPI_EVENT_PKEY_P1 }, - { 0, 0 } -}; - -/* The set of possible bluetooth events */ -static struct sonypi_event sonypi_blueev[] = { - { 0x55, SONYPI_EVENT_BLUETOOTH_PRESSED }, - { 0x59, SONYPI_EVENT_BLUETOOTH_ON }, - { 0x5a, SONYPI_EVENT_BLUETOOTH_OFF }, - { 0, 0 } -}; - -/* The set of possible back button events */ -static struct sonypi_event sonypi_backev[] = { - { 0x20, SONYPI_EVENT_BACK_PRESSED }, - { 0, 0 } -}; - -/* The set of possible help button events */ -static struct sonypi_event sonypi_helpev[] = { - { 0x3b, SONYPI_EVENT_HELP_PRESSED }, - { 0, 0 } -}; - - -/* The set of possible lid events */ -static struct sonypi_event sonypi_lidev[] = { - { 0x51, SONYPI_EVENT_LID_CLOSED }, - { 0x50, SONYPI_EVENT_LID_OPENED }, - { 0, 0 } -}; - -/* The set of possible zoom events */ -static struct sonypi_event sonypi_zoomev[] = { - { 0x39, SONYPI_EVENT_ZOOM_PRESSED }, - { 0, 0 } -}; - -/* The set of possible thumbphrase events */ -static struct sonypi_event sonypi_thumbphraseev[] = { - { 0x3a, SONYPI_EVENT_THUMBPHRASE_PRESSED }, - { 0, 0 } -}; - -/* The set of possible motioneye camera events */ -static struct sonypi_event sonypi_meyeev[] = { - { 0x00, SONYPI_EVENT_MEYE_FACE }, - { 0x01, SONYPI_EVENT_MEYE_OPPOSITE }, - { 0, 0 } -}; - -/* The set of possible memorystick events */ -static struct sonypi_event sonypi_memorystickev[] = { - { 0x53, SONYPI_EVENT_MEMORYSTICK_INSERT }, - { 0x54, SONYPI_EVENT_MEMORYSTICK_EJECT }, - { 0, 0 } -}; - -/* The set of possible battery events */ -static struct sonypi_event sonypi_batteryev[] = { - { 0x20, SONYPI_EVENT_BATTERY_INSERT }, - { 0x30, SONYPI_EVENT_BATTERY_REMOVE }, - { 0, 0 } -}; - -struct sonypi_eventtypes { - int model; - u8 data; - unsigned long mask; - struct sonypi_event * events; -} sonypi_eventtypes[] = { - { SONYPI_DEVICE_MODEL_TYPE1, 0, 0xffffffff, sonypi_releaseev }, - { SONYPI_DEVICE_MODEL_TYPE1, 0x70, SONYPI_MEYE_MASK, sonypi_meyeev }, - { SONYPI_DEVICE_MODEL_TYPE1, 0x30, SONYPI_LID_MASK, sonypi_lidev }, - { SONYPI_DEVICE_MODEL_TYPE1, 0x60, SONYPI_CAPTURE_MASK, sonypi_captureev }, - { SONYPI_DEVICE_MODEL_TYPE1, 0x10, SONYPI_JOGGER_MASK, sonypi_joggerev }, - { SONYPI_DEVICE_MODEL_TYPE1, 0x20, SONYPI_FNKEY_MASK, sonypi_fnkeyev }, - { SONYPI_DEVICE_MODEL_TYPE1, 0x30, SONYPI_BLUETOOTH_MASK, sonypi_blueev }, - { SONYPI_DEVICE_MODEL_TYPE1, 0x40, SONYPI_PKEY_MASK, sonypi_pkeyev }, - { SONYPI_DEVICE_MODEL_TYPE1, 0x30, SONYPI_MEMORYSTICK_MASK, sonypi_memorystickev }, - { SONYPI_DEVICE_MODEL_TYPE1, 0x40, SONYPI_BATTERY_MASK, sonypi_batteryev }, - - { SONYPI_DEVICE_MODEL_TYPE2, 0, 0xffffffff, sonypi_releaseev }, - { SONYPI_DEVICE_MODEL_TYPE2, 0x38, SONYPI_LID_MASK, sonypi_lidev }, - { SONYPI_DEVICE_MODEL_TYPE2, 0x11, SONYPI_JOGGER_MASK, sonypi_joggerev }, - { SONYPI_DEVICE_MODEL_TYPE2, 0x61, SONYPI_CAPTURE_MASK, sonypi_captureev }, - { SONYPI_DEVICE_MODEL_TYPE2, 0x21, SONYPI_FNKEY_MASK, sonypi_fnkeyev }, - { SONYPI_DEVICE_MODEL_TYPE2, 0x31, SONYPI_BLUETOOTH_MASK, sonypi_blueev }, - { SONYPI_DEVICE_MODEL_TYPE2, 0x08, SONYPI_PKEY_MASK, sonypi_pkeyev }, - { SONYPI_DEVICE_MODEL_TYPE2, 0x11, SONYPI_BACK_MASK, sonypi_backev }, - { SONYPI_DEVICE_MODEL_TYPE2, 0x08, SONYPI_HELP_MASK, sonypi_helpev }, - { SONYPI_DEVICE_MODEL_TYPE2, 0x21, SONYPI_ZOOM_MASK, sonypi_zoomev }, - { SONYPI_DEVICE_MODEL_TYPE2, 0x20, SONYPI_THUMBPHRASE_MASK, sonypi_thumbphraseev }, - { SONYPI_DEVICE_MODEL_TYPE2, 0x31, SONYPI_MEMORYSTICK_MASK, sonypi_memorystickev }, - { SONYPI_DEVICE_MODEL_TYPE2, 0x41, SONYPI_BATTERY_MASK, sonypi_batteryev }, - { SONYPI_DEVICE_MODEL_TYPE2, 0x31, SONYPI_PKEY_MASK, sonypi_pkeyev }, - - { 0 } -}; - -#define SONYPI_BUF_SIZE 128 - -/* The name of the devices for the input device drivers */ -#define SONYPI_JOG_INPUTNAME "Sony Vaio Jogdial" -#define SONYPI_KEY_INPUTNAME "Sony Vaio Keys" - -/* Correspondance table between sonypi events and input layer events */ -struct { - int sonypiev; - int inputev; -} sonypi_inputkeys[] = { - { SONYPI_EVENT_CAPTURE_PRESSED, KEY_CAMERA }, - { SONYPI_EVENT_FNKEY_ONLY, KEY_FN }, - { SONYPI_EVENT_FNKEY_ESC, KEY_FN_ESC }, - { SONYPI_EVENT_FNKEY_F1, KEY_FN_F1 }, - { SONYPI_EVENT_FNKEY_F2, KEY_FN_F2 }, - { SONYPI_EVENT_FNKEY_F3, KEY_FN_F3 }, - { SONYPI_EVENT_FNKEY_F4, KEY_FN_F4 }, - { SONYPI_EVENT_FNKEY_F5, KEY_FN_F5 }, - { SONYPI_EVENT_FNKEY_F6, KEY_FN_F6 }, - { SONYPI_EVENT_FNKEY_F7, KEY_FN_F7 }, - { SONYPI_EVENT_FNKEY_F8, KEY_FN_F8 }, - { SONYPI_EVENT_FNKEY_F9, KEY_FN_F9 }, - { SONYPI_EVENT_FNKEY_F10, KEY_FN_F10 }, - { SONYPI_EVENT_FNKEY_F11, KEY_FN_F11 }, - { SONYPI_EVENT_FNKEY_F12, KEY_FN_F12 }, - { SONYPI_EVENT_FNKEY_1, KEY_FN_1 }, - { SONYPI_EVENT_FNKEY_2, KEY_FN_2 }, - { SONYPI_EVENT_FNKEY_D, KEY_FN_D }, - { SONYPI_EVENT_FNKEY_E, KEY_FN_E }, - { SONYPI_EVENT_FNKEY_F, KEY_FN_F }, - { SONYPI_EVENT_FNKEY_S, KEY_FN_S }, - { SONYPI_EVENT_FNKEY_B, KEY_FN_B }, - { SONYPI_EVENT_BLUETOOTH_PRESSED, KEY_BLUE }, - { SONYPI_EVENT_BLUETOOTH_ON, KEY_BLUE }, - { SONYPI_EVENT_PKEY_P1, KEY_PROG1 }, - { SONYPI_EVENT_PKEY_P2, KEY_PROG2 }, - { SONYPI_EVENT_PKEY_P3, KEY_PROG3 }, - { SONYPI_EVENT_BACK_PRESSED, KEY_BACK }, - { SONYPI_EVENT_HELP_PRESSED, KEY_HELP }, - { SONYPI_EVENT_ZOOM_PRESSED, KEY_ZOOM }, - { SONYPI_EVENT_THUMBPHRASE_PRESSED, BTN_THUMB }, - { 0, 0 }, -}; - -struct sonypi_device { - struct pci_dev *dev; - struct platform_device *pdev; - u16 irq; - u16 bits; - u16 ioport1; - u16 ioport2; - u16 region_size; - u16 evtype_offset; - int camera_power; - int bluetooth_power; - struct semaphore lock; - struct kfifo *fifo; - spinlock_t fifo_lock; - wait_queue_head_t fifo_proc_list; - struct fasync_struct *fifo_async; - int open_count; - int model; - struct input_dev input_jog_dev; - struct input_dev input_key_dev; - struct work_struct input_work; - struct kfifo *input_fifo; - spinlock_t input_fifo_lock; -}; - -#define ITERATIONS_LONG 10000 -#define ITERATIONS_SHORT 10 - -#define wait_on_command(quiet, command, iterations) { \ - unsigned int n = iterations; \ - while (--n && (command)) \ - udelay(1); \ - if (!n && (verbose || !quiet)) \ - printk(KERN_WARNING "sonypi command failed at %s : %s (line %d)\n", __FILE__, __FUNCTION__, __LINE__); \ -} - -#ifdef CONFIG_ACPI -#define SONYPI_ACPI_ACTIVE (!acpi_disabled) -#else -#define SONYPI_ACPI_ACTIVE 0 -#endif /* CONFIG_ACPI */ - -#endif /* __KERNEL__ */ - -#endif /* _SONYPI_PRIV_H_ */ diff -urN linux-2.6.11-rc3/drivers/char/tty_io.c linux-2.6.11-rc4/drivers/char/tty_io.c --- linux-2.6.11-rc3/drivers/char/tty_io.c 2005-02-12 19:50:37.428828370 -0800 +++ linux-2.6.11-rc4/drivers/char/tty_io.c 2005-02-12 19:50:55.836625282 -0800 @@ -1156,8 +1156,8 @@ int i = index + driver->name_base; /* ->name is initialized to "ttyp", but "tty" is expected */ sprintf(p, "%s%c%x", - driver->subtype == PTY_TYPE_SLAVE ? "pty" : driver->name, - ptychar[i >> 4 & 0xf], i & 0xf); + driver->subtype == PTY_TYPE_SLAVE ? "tty" : driver->name, + ptychar[i >> 4 & 0xf], i & 0xf); } static inline void tty_line_name(struct tty_driver *driver, int index, char *p) diff -urN linux-2.6.11-rc3/drivers/cpufreq/cpufreq.c linux-2.6.11-rc4/drivers/cpufreq/cpufreq.c --- linux-2.6.11-rc3/drivers/cpufreq/cpufreq.c 2005-02-12 19:50:37.443829020 -0800 +++ linux-2.6.11-rc4/drivers/cpufreq/cpufreq.c 2005-02-12 19:50:55.862626408 -0800 @@ -900,9 +900,12 @@ if (cpufreq_driver->resume) { ret = cpufreq_driver->resume(cpu_policy); - printk(KERN_ERR "cpufreq: resume failed in ->resume step on CPU %u\n", cpu_policy->cpu); - cpufreq_cpu_put(cpu_policy); - return (ret); + if (ret) { + printk(KERN_ERR "cpufreq: resume failed in ->resume " + "step on CPU %u\n", cpu_policy->cpu); + cpufreq_cpu_put(cpu_policy); + return ret; + } } if (!(cpufreq_driver->flags & CPUFREQ_CONST_LOOPS)) { diff -urN linux-2.6.11-rc3/drivers/i2c/busses/i2c-sis5595.c linux-2.6.11-rc4/drivers/i2c/busses/i2c-sis5595.c --- linux-2.6.11-rc3/drivers/i2c/busses/i2c-sis5595.c 2004-12-24 13:35:50.000000000 -0800 +++ linux-2.6.11-rc4/drivers/i2c/busses/i2c-sis5595.c 2005-02-12 19:50:55.894627793 -0800 @@ -181,9 +181,11 @@ if (force_addr) { dev_info(&SIS5595_dev->dev, "forcing ISA address 0x%04X\n", sis5595_base); - if (!pci_write_config_word(SIS5595_dev, ACPI_BASE, sis5595_base)) + if (pci_write_config_word(SIS5595_dev, ACPI_BASE, sis5595_base) + != PCIBIOS_SUCCESSFUL) goto error; - if (!pci_read_config_word(SIS5595_dev, ACPI_BASE, &a)) + if (pci_read_config_word(SIS5595_dev, ACPI_BASE, &a) + != PCIBIOS_SUCCESSFUL) goto error; if ((a & ~(SIS5595_EXTENT - 1)) != sis5595_base) { /* doesn't work for some chips! */ @@ -192,13 +194,16 @@ } } - if (!pci_read_config_byte(SIS5595_dev, SIS5595_ENABLE_REG, &val)) + if (pci_read_config_byte(SIS5595_dev, SIS5595_ENABLE_REG, &val) + != PCIBIOS_SUCCESSFUL) goto error; if ((val & 0x80) == 0) { dev_info(&SIS5595_dev->dev, "enabling ACPI\n"); - if (!pci_write_config_byte(SIS5595_dev, SIS5595_ENABLE_REG, val | 0x80)) + if (pci_write_config_byte(SIS5595_dev, SIS5595_ENABLE_REG, val | 0x80) + != PCIBIOS_SUCCESSFUL) goto error; - if (!pci_read_config_byte(SIS5595_dev, SIS5595_ENABLE_REG, &val)) + if (pci_read_config_byte(SIS5595_dev, SIS5595_ENABLE_REG, &val) + != PCIBIOS_SUCCESSFUL) goto error; if ((val & 0x80) == 0) { /* doesn't work for some chips? */ diff -urN linux-2.6.11-rc3/drivers/i2c/busses/i2c-viapro.c linux-2.6.11-rc4/drivers/i2c/busses/i2c-viapro.c --- linux-2.6.11-rc3/drivers/i2c/busses/i2c-viapro.c 2005-02-12 19:50:37.478830535 -0800 +++ linux-2.6.11-rc4/drivers/i2c/busses/i2c-viapro.c 2005-02-12 19:50:55.896627880 -0800 @@ -45,6 +45,8 @@ #include #include +static struct pci_dev *vt596_pdev; + #define SMBBA1 0x90 #define SMBBA2 0x80 #define SMBBA3 0xD0 @@ -231,8 +233,8 @@ len = data->block[0]; if (len < 0) len = 0; - if (len > 32) - len = 32; + if (len > I2C_SMBUS_BLOCK_MAX) + len = I2C_SMBUS_BLOCK_MAX; outb_p(len, SMBHSTDAT0); i = inb_p(SMBHSTCNT); /* Reset SMBBLKDAT */ for (i = 1; i <= len; i++) @@ -266,6 +268,8 @@ break; case VT596_BLOCK_DATA: data->block[0] = inb_p(SMBHSTDAT0); + if (data->block[0] > I2C_SMBUS_BLOCK_MAX) + data->block[0] = I2C_SMBUS_BLOCK_MAX; i = inb_p(SMBHSTCNT); /* Reset SMBBLKDAT */ for (i = 1; i <= data->block[0]; i++) data->block[i] = inb_p(SMBBLKDAT); @@ -381,19 +385,23 @@ snprintf(vt596_adapter.name, I2C_NAME_SIZE, "SMBus Via Pro adapter at %04x", vt596_smba); - return i2c_add_adapter(&vt596_adapter); + vt596_pdev = pci_dev_get(pdev); + if (i2c_add_adapter(&vt596_adapter)) { + pci_dev_put(vt596_pdev); + vt596_pdev = NULL; + } + + /* Always return failure here. This is to allow other drivers to bind + * to this pci device. We don't really want to have control over the + * pci device, we only wanted to read as few register values from it. + */ + return -ENODEV; release_region: release_region(vt596_smba, 8); return error; } -static void __devexit vt596_remove(struct pci_dev *pdev) -{ - i2c_del_adapter(&vt596_adapter); - release_region(vt596_smba, 8); -} - static struct pci_device_id vt596_ids[] = { { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C596_3), .driver_data = SMBBA1 }, @@ -420,7 +428,6 @@ .name = "vt596_smbus", .id_table = vt596_ids, .probe = vt596_probe, - .remove = __devexit_p(vt596_remove), }; static int __init i2c_vt596_init(void) @@ -432,6 +439,12 @@ static void __exit i2c_vt596_exit(void) { pci_unregister_driver(&vt596_driver); + if (vt596_pdev != NULL) { + i2c_del_adapter(&vt596_adapter); + release_region(vt596_smba, 8); + pci_dev_put(vt596_pdev); + vt596_pdev = NULL; + } } MODULE_AUTHOR( diff -urN linux-2.6.11-rc3/drivers/i2c/chips/ds1621.c linux-2.6.11-rc4/drivers/i2c/chips/ds1621.c --- linux-2.6.11-rc3/drivers/i2c/chips/ds1621.c 2004-12-24 13:35:40.000000000 -0800 +++ linux-2.6.11-rc4/drivers/i2c/chips/ds1621.c 2005-02-12 19:50:55.900628053 -0800 @@ -42,9 +42,8 @@ /* Many DS1621 constants specified below */ /* Config register used for detection */ /* 7 6 5 4 3 2 1 0 */ -/* |Done|THF |TLF |NVB | 1 | 0 |POL |1SHOT| */ -#define DS1621_REG_CONFIG_MASK 0x0C -#define DS1621_REG_CONFIG_VAL 0x08 +/* |Done|THF |TLF |NVB | X | X |POL |1SHOT| */ +#define DS1621_REG_CONFIG_NVB 0x10 #define DS1621_REG_CONFIG_POLARITY 0x02 #define DS1621_REG_CONFIG_1SHOT 0x01 #define DS1621_REG_CONFIG_DONE 0x80 @@ -55,6 +54,7 @@ #define DS1621_REG_TEMP_MAX 0xA2 /* word, RW */ #define DS1621_REG_CONF 0xAC /* byte, RW */ #define DS1621_COM_START 0xEE /* no data */ +#define DS1621_COM_STOP 0x22 /* no data */ /* The DS1621 configuration register */ #define DS1621_ALARM_TEMP_HIGH 0x40 @@ -212,9 +212,13 @@ /* Now, we do the remaining detection. It is lousy. */ if (kind < 0) { + /* The NVB bit should be low if no EEPROM write has been + requested during the latest 10ms, which is highly + improbable in our case. */ conf = ds1621_read_value(new_client, DS1621_REG_CONF); - if ((conf & DS1621_REG_CONFIG_MASK) != DS1621_REG_CONFIG_VAL) + if (conf & DS1621_REG_CONFIG_NVB) goto exit_free; + /* The 7 lowest bits of a temperature should always be 0. */ temp = ds1621_read_value(new_client, DS1621_REG_TEMP); if (temp & 0x007f) goto exit_free; diff -urN linux-2.6.11-rc3/drivers/i2c/chips/it87.c linux-2.6.11-rc4/drivers/i2c/chips/it87.c --- linux-2.6.11-rc3/drivers/i2c/chips/it87.c 2005-02-12 19:50:37.491831098 -0800 +++ linux-2.6.11-rc4/drivers/i2c/chips/it87.c 2005-02-12 19:50:55.912628572 -0800 @@ -2,8 +2,8 @@ it87.c - Part of lm_sensors, Linux kernel modules for hardware monitoring. - Supports: IT8705F Super I/O chip w/LPC interface - IT8712F Super I/O chip w/LPC interface & SMbus + Supports: IT8705F Super I/O chip w/LPC interface & SMBus + IT8712F Super I/O chip w/LPC interface & SMBus Sis950 A clone of the IT8705F Copyright (C) 2001 Chris Gauthron @@ -42,10 +42,8 @@ /* Addresses to scan */ -static unsigned short normal_i2c[] = { 0x20, 0x21, 0x22, 0x23, 0x24, - 0x25, 0x26, 0x27, 0x28, 0x29, - 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, - 0x2f, I2C_CLIENT_END }; +static unsigned short normal_i2c[] = { 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, + 0x2e, 0x2f, I2C_CLIENT_END }; static unsigned int normal_isa[] = { 0x0290, I2C_CLIENT_ISA_END }; /* Insmod parameters */ diff -urN linux-2.6.11-rc3/drivers/i2c/chips/pc87360.c linux-2.6.11-rc4/drivers/i2c/chips/pc87360.c --- linux-2.6.11-rc3/drivers/i2c/chips/pc87360.c 2005-02-12 19:50:37.496831314 -0800 +++ linux-2.6.11-rc4/drivers/i2c/chips/pc87360.c 2005-02-12 19:50:55.917628789 -0800 @@ -795,8 +795,10 @@ /* Fan clock dividers may be needed before any data is read */ for (i = 0; i < data->fannr; i++) { - data->fan_status[i] = pc87360_read_value(data, LD_FAN, - NO_BANK, PC87360_REG_FAN_STATUS(i)); + if (FAN_CONFIG_MONITOR(data->fan_conf, i)) + data->fan_status[i] = pc87360_read_value(data, + LD_FAN, NO_BANK, + PC87360_REG_FAN_STATUS(i)); } if (init > 0) { @@ -898,14 +900,27 @@ } if (data->fannr) { - device_create_file(&new_client->dev, &dev_attr_fan1_input); - device_create_file(&new_client->dev, &dev_attr_fan2_input); - device_create_file(&new_client->dev, &dev_attr_fan1_min); - device_create_file(&new_client->dev, &dev_attr_fan2_min); - device_create_file(&new_client->dev, &dev_attr_fan1_div); - device_create_file(&new_client->dev, &dev_attr_fan2_div); - device_create_file(&new_client->dev, &dev_attr_fan1_status); - device_create_file(&new_client->dev, &dev_attr_fan2_status); + if (FAN_CONFIG_MONITOR(data->fan_conf, 0)) { + device_create_file(&new_client->dev, + &dev_attr_fan1_input); + device_create_file(&new_client->dev, + &dev_attr_fan1_min); + device_create_file(&new_client->dev, + &dev_attr_fan1_div); + device_create_file(&new_client->dev, + &dev_attr_fan1_status); + } + + if (FAN_CONFIG_MONITOR(data->fan_conf, 1)) { + device_create_file(&new_client->dev, + &dev_attr_fan2_input); + device_create_file(&new_client->dev, + &dev_attr_fan2_min); + device_create_file(&new_client->dev, + &dev_attr_fan2_div); + device_create_file(&new_client->dev, + &dev_attr_fan2_status); + } if (FAN_CONFIG_CONTROL(data->fan_conf, 0)) device_create_file(&new_client->dev, &dev_attr_pwm1); @@ -913,10 +928,16 @@ device_create_file(&new_client->dev, &dev_attr_pwm2); } if (data->fannr == 3) { - device_create_file(&new_client->dev, &dev_attr_fan3_input); - device_create_file(&new_client->dev, &dev_attr_fan3_min); - device_create_file(&new_client->dev, &dev_attr_fan3_div); - device_create_file(&new_client->dev, &dev_attr_fan3_status); + if (FAN_CONFIG_MONITOR(data->fan_conf, 2)) { + device_create_file(&new_client->dev, + &dev_attr_fan3_input); + device_create_file(&new_client->dev, + &dev_attr_fan3_min); + device_create_file(&new_client->dev, + &dev_attr_fan3_div); + device_create_file(&new_client->dev, + &dev_attr_fan3_status); + } if (FAN_CONFIG_CONTROL(data->fan_conf, 2)) device_create_file(&new_client->dev, &dev_attr_pwm3); diff -urN linux-2.6.11-rc3/drivers/i2c/chips/via686a.c linux-2.6.11-rc4/drivers/i2c/chips/via686a.c --- linux-2.6.11-rc3/drivers/i2c/chips/via686a.c 2005-02-12 19:50:37.499831444 -0800 +++ linux-2.6.11-rc4/drivers/i2c/chips/via686a.c 2005-02-12 19:50:55.920628919 -0800 @@ -815,20 +815,24 @@ return -ENODEV; } normal_isa[0] = addr; - s_bridge = dev; - return i2c_add_driver(&via686a_driver); -} -static void __devexit via686a_pci_remove(struct pci_dev *dev) -{ - i2c_del_driver(&via686a_driver); + s_bridge = pci_dev_get(dev); + if (i2c_add_driver(&via686a_driver)) { + pci_dev_put(s_bridge); + s_bridge = NULL; + } + + /* Always return failure here. This is to allow other drivers to bind + * to this pci device. We don't really want to have control over the + * pci device, we only wanted to read as few register values from it. + */ + return -ENODEV; } static struct pci_driver via686a_pci_driver = { .name = "via686a", .id_table = via686a_pci_ids, .probe = via686a_pci_probe, - .remove = __devexit_p(via686a_pci_remove), }; static int __init sm_via686a_init(void) @@ -838,7 +842,12 @@ static void __exit sm_via686a_exit(void) { - pci_unregister_driver(&via686a_pci_driver); + pci_unregister_driver(&via686a_pci_driver); + if (s_bridge != NULL) { + i2c_del_driver(&via686a_driver); + pci_dev_put(s_bridge); + s_bridge = NULL; + } } MODULE_AUTHOR("Kyösti Mälkki , " diff -urN linux-2.6.11-rc3/drivers/i2c/chips/w83781d.c linux-2.6.11-rc4/drivers/i2c/chips/w83781d.c --- linux-2.6.11-rc3/drivers/i2c/chips/w83781d.c 2005-02-12 19:50:37.502831574 -0800 +++ linux-2.6.11-rc4/drivers/i2c/chips/w83781d.c 2005-02-12 19:50:55.922629005 -0800 @@ -175,11 +175,6 @@ : (val)) / 1000, 0, 0xff)) #define TEMP_FROM_REG(val) (((val) & 0x80 ? (val)-0x100 : (val)) * 1000) -#define AS99127_TEMP_ADD_TO_REG(val) (SENSORS_LIMIT((((val) < 0 ? (val)+0x10000*250 \ - : (val)) / 250) << 7, 0, 0xffff)) -#define AS99127_TEMP_ADD_FROM_REG(val) ((((val) & 0x8000 ? (val)-0x10000 : (val)) \ - >> 7) * 250) - #define ALARMS_FROM_REG(val) (val) #define PWM_FROM_REG(val) (val) #define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255)) @@ -417,13 +412,8 @@ { \ struct w83781d_data *data = w83781d_update_device(dev); \ if (nr >= 2) { /* TEMP2 and TEMP3 */ \ - if (data->type == as99127f) { \ - return sprintf(buf,"%ld\n", \ - (long)AS99127_TEMP_ADD_FROM_REG(data->reg##_add[nr-2])); \ - } else { \ - return sprintf(buf,"%d\n", \ - LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \ - } \ + return sprintf(buf,"%d\n", \ + LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \ } else { /* TEMP1 */ \ return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \ } \ @@ -442,11 +432,7 @@ val = simple_strtol(buf, NULL, 10); \ \ if (nr >= 2) { /* TEMP2 and TEMP3 */ \ - if (data->type == as99127f) \ - data->temp_##reg##_add[nr-2] = AS99127_TEMP_ADD_TO_REG(val); \ - else \ - data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \ - \ + data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \ w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \ data->temp_##reg##_add[nr-2]); \ } else { /* TEMP1 */ \ diff -urN linux-2.6.11-rc3/drivers/ide/ide-disk.c linux-2.6.11-rc4/drivers/ide/ide-disk.c --- linux-2.6.11-rc3/drivers/ide/ide-disk.c 2005-02-12 19:50:37.510831920 -0800 +++ linux-2.6.11-rc4/drivers/ide/ide-disk.c 2005-02-12 19:50:55.976631343 -0800 @@ -132,7 +132,7 @@ nsectors.all = (u16) rq->nr_sectors; if (hwif->no_lba48_dma && lba48 && dma) { - if (rq->sector + rq->nr_sectors > 1ULL << 28) + if (block + rq->nr_sectors > 1ULL << 28) dma = 0; } @@ -253,8 +253,7 @@ /* FIXME: ->OUTBSYNC ? */ hwif->OUTB(command, IDE_COMMAND_REG); - pre_task_out_intr(drive, rq); - return ide_started; + return pre_task_out_intr(drive, rq); } } EXPORT_SYMBOL_GPL(__ide_do_rw_disk); diff -urN linux-2.6.11-rc3/drivers/ide/ide-dma.c linux-2.6.11-rc4/drivers/ide/ide-dma.c --- linux-2.6.11-rc3/drivers/ide/ide-dma.c 2005-02-12 19:50:37.511831964 -0800 +++ linux-2.6.11-rc4/drivers/ide/ide-dma.c 2005-02-12 19:50:55.986631776 -0800 @@ -227,7 +227,9 @@ * the PRD table that the IDE layer wants to be fed. The code * knows about the 64K wrap bug in the CS5530. * - * Returns 0 if all went okay, returns 1 otherwise. + * Returns the number of built PRD entries if all went okay, + * returns 0 otherwise. + * * May also be invoked from trm290.c */ @@ -631,7 +633,7 @@ EXPORT_SYMBOL(__ide_dma_end); /* returns 1 if dma irq issued, 0 otherwise */ -int __ide_dma_test_irq (ide_drive_t *drive) +static int __ide_dma_test_irq(ide_drive_t *drive) { ide_hwif_t *hwif = HWIF(drive); u8 dma_stat = hwif->INB(hwif->dma_status); @@ -650,8 +652,6 @@ drive->name, __FUNCTION__); return 0; } - -EXPORT_SYMBOL(__ide_dma_test_irq); #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */ int __ide_dma_bad_drive (ide_drive_t *drive) @@ -784,7 +784,7 @@ /* * Needed for allowing full modular support of ide-driver */ -int ide_release_dma_engine (ide_hwif_t *hwif) +static int ide_release_dma_engine(ide_hwif_t *hwif) { if (hwif->dmatable_cpu) { pci_free_consistent(hwif->pci_dev, @@ -796,7 +796,7 @@ return 1; } -int ide_release_iomio_dma (ide_hwif_t *hwif) +static int ide_release_iomio_dma(ide_hwif_t *hwif) { if ((hwif->dma_extra) && (hwif->channel == 0)) release_region((hwif->dma_base + 16), hwif->dma_extra); @@ -820,7 +820,7 @@ return ide_release_iomio_dma(hwif); } -int ide_allocate_dma_engine (ide_hwif_t *hwif) +static int ide_allocate_dma_engine(ide_hwif_t *hwif) { hwif->dmatable_cpu = pci_alloc_consistent(hwif->pci_dev, PRD_ENTRIES * PRD_BYTES, @@ -830,14 +830,13 @@ return 0; printk(KERN_ERR "%s: -- Error, unable to allocate%s DMA table(s).\n", - (hwif->dmatable_cpu == NULL) ? " CPU" : "", - hwif->cds->name); + hwif->cds->name, !hwif->dmatable_cpu ? " CPU" : ""); ide_release_dma_engine(hwif); return 1; } -int ide_mapped_mmio_dma (ide_hwif_t *hwif, unsigned long base, unsigned int ports) +static int ide_mapped_mmio_dma(ide_hwif_t *hwif, unsigned long base, unsigned int ports) { printk(KERN_INFO " %s: MMIO-DMA ", hwif->name); @@ -852,7 +851,7 @@ return 0; } -int ide_iomio_dma (ide_hwif_t *hwif, unsigned long base, unsigned int ports) +static int ide_iomio_dma(ide_hwif_t *hwif, unsigned long base, unsigned int ports) { printk(KERN_INFO " %s: BM-DMA at 0x%04lx-0x%04lx", hwif->name, base, base + ports - 1); @@ -881,10 +880,7 @@ return 0; } -/* - * - */ -int ide_dma_iobase (ide_hwif_t *hwif, unsigned long base, unsigned int ports) +static int ide_dma_iobase(ide_hwif_t *hwif, unsigned long base, unsigned int ports) { if (hwif->mmio == 2) return ide_mapped_mmio_dma(hwif, base,ports); diff -urN linux-2.6.11-rc3/drivers/ide/ide-floppy.c linux-2.6.11-rc4/drivers/ide/ide-floppy.c --- linux-2.6.11-rc3/drivers/ide/ide-floppy.c 2005-02-12 19:50:37.512832007 -0800 +++ linux-2.6.11-rc4/drivers/ide/ide-floppy.c 2005-02-12 19:50:55.988631863 -0800 @@ -585,7 +585,7 @@ count = min(bvec->bv_len, bcount); data = bvec_kmap_irq(bvec, &flags); - atapi_input_bytes(drive, data, count); + drive->hwif->atapi_input_bytes(drive, data, count); bvec_kunmap_irq(data, &flags); bcount -= count; @@ -619,7 +619,7 @@ count = min(bvec->bv_len, bcount); data = bvec_kmap_irq(bvec, &flags); - atapi_output_bytes(drive, data, count); + drive->hwif->atapi_output_bytes(drive, data, count); bvec_kunmap_irq(data, &flags); bcount -= count; diff -urN linux-2.6.11-rc3/drivers/ide/ide-io.c linux-2.6.11-rc4/drivers/ide/ide-io.c --- linux-2.6.11-rc3/drivers/ide/ide-io.c 2005-02-12 19:50:37.514832094 -0800 +++ linux-2.6.11-rc4/drivers/ide/ide-io.c 2005-02-12 19:50:55.992632036 -0800 @@ -555,7 +555,7 @@ err = ide_dump_status(drive, msg, stat); - if (drive == NULL || (rq = HWGROUP(drive)->rq) == NULL) + if ((rq = HWGROUP(drive)->rq) == NULL) return ide_stopped; /* retry only "normal" I/O: */ @@ -933,6 +933,7 @@ if (timeout > WAIT_WORSTCASE) timeout = WAIT_WORSTCASE; drive->sleep = timeout + jiffies; + drive->sleeping = 1; } EXPORT_SYMBOL(ide_stall_queue); @@ -972,18 +973,18 @@ } do { - if ((!drive->sleep || time_after_eq(jiffies, drive->sleep)) + if ((!drive->sleeping || time_after_eq(jiffies, drive->sleep)) && !elv_queue_empty(drive->queue)) { if (!best - || (drive->sleep && (!best->sleep || 0 < (signed long)(best->sleep - drive->sleep))) - || (!best->sleep && 0 < (signed long)(WAKEUP(best) - WAKEUP(drive)))) + || (drive->sleeping && (!best->sleeping || time_before(drive->sleep, best->sleep))) + || (!best->sleeping && time_before(WAKEUP(drive), WAKEUP(best)))) { if (!blk_queue_plugged(drive->queue)) best = drive; } } } while ((drive = drive->next) != hwgroup->drive); - if (best && best->nice1 && !best->sleep && best != hwgroup->drive && best->service_time > WAIT_MIN_SLEEP) { + if (best && best->nice1 && !best->sleeping && best != hwgroup->drive && best->service_time > WAIT_MIN_SLEEP) { long t = (signed long)(WAKEUP(best) - jiffies); if (t >= WAIT_MIN_SLEEP) { /* @@ -992,10 +993,9 @@ */ drive = best->next; do { - if (!drive->sleep - /* FIXME: use time_before */ - && 0 < (signed long)(WAKEUP(drive) - (jiffies - best->service_time)) - && 0 < (signed long)((jiffies + t) - WAKEUP(drive))) + if (!drive->sleeping + && time_before(jiffies - best->service_time, WAKEUP(drive)) + && time_before(WAKEUP(drive), jiffies + t)) { ide_stall_queue(best, min_t(long, t, 10 * WAIT_MIN_SLEEP)); goto repeat; @@ -1058,14 +1058,17 @@ hwgroup->busy = 1; drive = choose_drive(hwgroup); if (drive == NULL) { - unsigned long sleep = 0; + int sleeping = 0; + unsigned long sleep = 0; /* shut up, gcc */ hwgroup->rq = NULL; drive = hwgroup->drive; do { - if (drive->sleep && (!sleep || 0 < (signed long)(sleep - drive->sleep))) + if (drive->sleeping && (!sleeping || time_before(drive->sleep, sleep))) { + sleeping = 1; sleep = drive->sleep; + } } while ((drive = drive->next) != hwgroup->drive); - if (sleep) { + if (sleeping) { /* * Take a short snooze, and then wake up this hwgroup again. * This gives other hwgroups on the same a chance to @@ -1105,7 +1108,7 @@ } hwgroup->hwif = hwif; hwgroup->drive = drive; - drive->sleep = 0; + drive->sleeping = 0; drive->service_start = jiffies; if (blk_queue_plugged(drive->queue)) { @@ -1311,7 +1314,7 @@ /* local CPU only, * as if we were handling an interrupt */ local_irq_disable(); - if (hwgroup->poll_timeout != 0) { + if (hwgroup->polling) { startstop = handler(drive); } else if (drive_is_ready(drive)) { if (drive->waiting_for_dma) @@ -1439,8 +1442,7 @@ return IRQ_NONE; } - if ((handler = hwgroup->handler) == NULL || - hwgroup->poll_timeout != 0) { + if ((handler = hwgroup->handler) == NULL || hwgroup->polling) { /* * Not expecting an interrupt from this drive. * That means this could be: diff -urN linux-2.6.11-rc3/drivers/ide/ide-iops.c linux-2.6.11-rc4/drivers/ide/ide-iops.c --- linux-2.6.11-rc3/drivers/ide/ide-iops.c 2005-02-12 19:50:37.515832137 -0800 +++ linux-2.6.11-rc4/drivers/ide/ide-iops.c 2005-02-12 19:50:56.003632512 -0800 @@ -184,16 +184,6 @@ EXPORT_SYMBOL(default_hwif_mmiops); -void default_hwif_transport (ide_hwif_t *hwif) -{ - hwif->ata_input_data = ata_input_data; - hwif->ata_output_data = ata_output_data; - hwif->atapi_input_bytes = atapi_input_bytes; - hwif->atapi_output_bytes = atapi_output_bytes; -} - -EXPORT_SYMBOL(default_hwif_transport); - u32 ide_read_24 (ide_drive_t *drive) { u8 hcyl = HWIF(drive)->INB(IDE_HCYL_REG); @@ -202,8 +192,6 @@ return (hcyl<<16)|(lcyl<<8)|sect; } -EXPORT_SYMBOL(ide_read_24); - void SELECT_DRIVE (ide_drive_t *drive) { if (HWIF(drive)->selectproc) @@ -240,7 +228,7 @@ * of the sector count register location, with interrupts disabled * to ensure that the reads all happen together. */ -void ata_vlb_sync (ide_drive_t *drive, unsigned long port) +static void ata_vlb_sync(ide_drive_t *drive, unsigned long port) { (void) HWIF(drive)->INB(port); (void) HWIF(drive)->INB(port); @@ -250,7 +238,7 @@ /* * This is used for most PIO data transfers *from* the IDE interface */ -void ata_input_data (ide_drive_t *drive, void *buffer, u32 wcount) +static void ata_input_data(ide_drive_t *drive, void *buffer, u32 wcount) { ide_hwif_t *hwif = HWIF(drive); u8 io_32bit = drive->io_32bit; @@ -272,7 +260,7 @@ /* * This is used for most PIO data transfers *to* the IDE interface */ -void ata_output_data (ide_drive_t *drive, void *buffer, u32 wcount) +static void ata_output_data(ide_drive_t *drive, void *buffer, u32 wcount) { ide_hwif_t *hwif = HWIF(drive); u8 io_32bit = drive->io_32bit; @@ -299,7 +287,7 @@ * extra byte allocated for the buffer. */ -void atapi_input_bytes (ide_drive_t *drive, void *buffer, u32 bytecount) +static void atapi_input_bytes(ide_drive_t *drive, void *buffer, u32 bytecount) { ide_hwif_t *hwif = HWIF(drive); @@ -316,9 +304,7 @@ hwif->INSW(IDE_DATA_REG, ((u8 *)buffer)+(bytecount & ~0x03), 1); } -EXPORT_SYMBOL(atapi_input_bytes); - -void atapi_output_bytes (ide_drive_t *drive, void *buffer, u32 bytecount) +static void atapi_output_bytes(ide_drive_t *drive, void *buffer, u32 bytecount) { ide_hwif_t *hwif = HWIF(drive); @@ -335,7 +321,15 @@ hwif->OUTSW(IDE_DATA_REG, ((u8*)buffer)+(bytecount & ~0x03), 1); } -EXPORT_SYMBOL(atapi_output_bytes); +void default_hwif_transport(ide_hwif_t *hwif) +{ + hwif->ata_input_data = ata_input_data; + hwif->ata_output_data = ata_output_data; + hwif->atapi_input_bytes = atapi_input_bytes; + hwif->atapi_output_bytes = atapi_output_bytes; +} + +EXPORT_SYMBOL(default_hwif_transport); /* * Beginning of Taskfile OPCODE Library and feature sets. @@ -437,6 +431,7 @@ #endif } +/* FIXME: exported for use by the USB storage (isd200.c) code only */ EXPORT_SYMBOL(ide_fix_driveid); void ide_fixstring (u8 *s, const int bytecount, const int byteswap) @@ -1028,14 +1023,14 @@ return ide_started; } /* end of polling */ - hwgroup->poll_timeout = 0; + hwgroup->polling = 0; printk("%s: ATAPI reset timed-out, status=0x%02x\n", drive->name, stat); /* do it the old fashioned way */ return do_reset1(drive, 1); } /* done polling */ - hwgroup->poll_timeout = 0; + hwgroup->polling = 0; return ide_stopped; } @@ -1095,7 +1090,7 @@ printk("\n"); } } - hwgroup->poll_timeout = 0; /* done polling */ + hwgroup->polling = 0; /* done polling */ return ide_stopped; } @@ -1112,7 +1107,7 @@ #endif } -void pre_reset (ide_drive_t *drive) +static void pre_reset(ide_drive_t *drive) { DRIVER(drive)->pre_reset(drive); @@ -1170,6 +1165,7 @@ udelay (20); hwif->OUTB(WIN_SRST, IDE_COMMAND_REG); hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE; + hwgroup->polling = 1; __ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL); spin_unlock_irqrestore(&ide_lock, flags); return ide_started; @@ -1210,6 +1206,7 @@ /* more than enough time */ udelay(10); hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE; + hwgroup->polling = 1; __ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL); /* diff -urN linux-2.6.11-rc3/drivers/ide/ide-lib.c linux-2.6.11-rc4/drivers/ide/ide-lib.c --- linux-2.6.11-rc3/drivers/ide/ide-lib.c 2005-02-12 19:50:37.516832180 -0800 +++ linux-2.6.11-rc4/drivers/ide/ide-lib.c 2005-02-12 19:50:56.004632555 -0800 @@ -570,6 +570,7 @@ atapi_error_t error; status.all = stat; + error.all = 0; local_irq_set(flags); printk("%s: %s: status=0x%02x { ", drive->name, msg, stat); if (status.b.bsy) @@ -584,7 +585,7 @@ if (status.b.check) printk("Error "); } printk("}\n"); - if ((status.all & (status.b.bsy|status.b.check)) == status.b.check) { + if (status.b.check && !status.b.bsy) { error.all = HWIF(drive)->INB(IDE_ERROR_REG); printk("%s: %s: error=0x%02x { ", drive->name, msg, error.all); if (error.b.ili) printk("IllegalLengthIndication "); diff -urN linux-2.6.11-rc3/drivers/ide/ide-pnp.c linux-2.6.11-rc4/drivers/ide/ide-pnp.c --- linux-2.6.11-rc3/drivers/ide/ide-pnp.c 2004-12-24 13:35:00.000000000 -0800 +++ linux-2.6.11-rc4/drivers/ide/ide-pnp.c 2005-02-12 19:50:56.005632599 -0800 @@ -21,7 +21,7 @@ #include /* Add your devices here :)) */ -struct pnp_device_id idepnp_devices[] = { +static struct pnp_device_id idepnp_devices[] = { /* Generic ESDI/IDE/ATA compatible hard disk controller */ {.id = "PNP0600", .driver_data = 0}, {.id = ""} diff -urN linux-2.6.11-rc3/drivers/ide/ide-probe.c linux-2.6.11-rc4/drivers/ide/ide-probe.c --- linux-2.6.11-rc3/drivers/ide/ide-probe.c 2005-02-12 19:50:37.517832224 -0800 +++ linux-2.6.11-rc4/drivers/ide/ide-probe.c 2005-02-12 19:50:56.006632642 -0800 @@ -841,7 +841,11 @@ if (fixup) fixup(hwif); - hwif_init(hwif); + if (!hwif_init(hwif)) { + printk(KERN_INFO "%s: failed to initialize IDE interface\n", + hwif->name); + return -1; + } if (hwif->present) { u16 unit = 0; @@ -1244,8 +1248,9 @@ { int old_irq, unit; + /* Return success if no device is connected */ if (!hwif->present) - return 0; + return 1; if (!hwif->irq) { if (!(hwif->irq = ide_default_irq(hwif->io_ports[IDE_DATA_OFFSET]))) diff -urN linux-2.6.11-rc3/drivers/ide/ide-tape.c linux-2.6.11-rc4/drivers/ide/ide-tape.c --- linux-2.6.11-rc3/drivers/ide/ide-tape.c 2004-12-24 13:34:30.000000000 -0800 +++ linux-2.6.11-rc4/drivers/ide/ide-tape.c 2005-02-12 19:50:56.043634244 -0800 @@ -2439,7 +2439,7 @@ tape->dsc_polling_start = jiffies; tape->dsc_polling_frequency = tape->best_dsc_rw_frequency; tape->dsc_timeout = jiffies + IDETAPE_DSC_RW_TIMEOUT; - } else if ((signed long) (jiffies - tape->dsc_timeout) > 0) { + } else if (time_after(jiffies, tape->dsc_timeout)) { printk(KERN_ERR "ide-tape: %s: DSC timeout\n", tape->name); if (rq->cmd[0] & REQ_IDETAPE_PC2) { diff -urN linux-2.6.11-rc3/drivers/ide/ide-taskfile.c linux-2.6.11-rc4/drivers/ide/ide-taskfile.c --- linux-2.6.11-rc3/drivers/ide/ide-taskfile.c 2005-02-12 19:50:37.519832310 -0800 +++ linux-2.6.11-rc4/drivers/ide/ide-taskfile.c 2005-02-12 19:50:56.045634330 -0800 @@ -851,8 +851,8 @@ hwif->OUTB(taskfile->high_cylinder, IDE_HCYL_REG); /* - * (ks) In the flagged taskfile approch, we will used all specified - * registers and the register value will not be changed. Except the + * (ks) In the flagged taskfile approch, we will use all specified + * registers and the register value will not be changed, except the * select bit (master/slave) in the drive_head register. We must make * sure that the desired drive is selected. */ diff -urN linux-2.6.11-rc3/drivers/ide/ide.c linux-2.6.11-rc4/drivers/ide/ide.c --- linux-2.6.11-rc3/drivers/ide/ide.c 2005-02-12 19:50:37.521832397 -0800 +++ linux-2.6.11-rc4/drivers/ide/ide.c 2005-02-12 19:50:56.091636322 -0800 @@ -333,7 +333,7 @@ * Returns a guessed speed in MHz. */ -int ide_system_bus_speed (void) +static int ide_system_bus_speed(void) { static struct pci_device_id pci_default[] = { { PCI_DEVICE(PCI_ANY_ID, PCI_ANY_ID) }, @@ -414,7 +414,7 @@ #ifdef CONFIG_PROC_FS struct proc_dir_entry *proc_ide_root; -ide_proc_entry_t generic_subdriver_entries[] = { +static ide_proc_entry_t generic_subdriver_entries[] = { { "capacity", S_IFREG|S_IRUGO, proc_ide_read_capacity, NULL }, { NULL, 0, NULL, NULL } }; @@ -1675,7 +1675,7 @@ * * Remember to update Documentation/ide.txt if you change something here. */ -int __init ide_setup (char *s) +static int __init ide_setup(char *s) { int i, vals[3]; ide_hwif_t *hwif; @@ -2261,7 +2261,7 @@ /* * This is gets invoked once during initialization, to set *everything* up */ -int __init ide_init (void) +static int __init ide_init(void) { printk(KERN_INFO "Uniform Multi-Platform E-IDE driver " REVISION "\n"); devfs_mk_dir("ide"); @@ -2308,7 +2308,7 @@ } #ifdef MODULE -char *options = NULL; +static char *options = NULL; module_param(options, charp, 0); MODULE_LICENSE("GPL"); diff -urN linux-2.6.11-rc3/drivers/ide/legacy/ide-cs.c linux-2.6.11-rc4/drivers/ide/legacy/ide-cs.c --- linux-2.6.11-rc3/drivers/ide/legacy/ide-cs.c 2005-02-12 19:50:37.523832483 -0800 +++ linux-2.6.11-rc4/drivers/ide/legacy/ide-cs.c 2005-02-12 19:50:56.120637578 -0800 @@ -209,7 +209,7 @@ #define CS_CHECK(fn, ret) \ do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0) -void ide_config(dev_link_t *link) +static void ide_config(dev_link_t *link) { client_handle_t handle = link->handle; ide_info_t *info = link->priv; diff -urN linux-2.6.11-rc3/drivers/ide/pci/Makefile linux-2.6.11-rc4/drivers/ide/pci/Makefile --- linux-2.6.11-rc3/drivers/ide/pci/Makefile 2004-12-24 13:34:26.000000000 -0800 +++ linux-2.6.11-rc4/drivers/ide/pci/Makefile 2005-02-12 19:50:56.121637621 -0800 @@ -1,5 +1,4 @@ -obj-$(CONFIG_BLK_DEV_ADMA100) += adma100.o obj-$(CONFIG_BLK_DEV_AEC62XX) += aec62xx.o obj-$(CONFIG_BLK_DEV_ALI15X3) += alim15x3.o obj-$(CONFIG_BLK_DEV_AMD74XX) += amd74xx.o diff -urN linux-2.6.11-rc3/drivers/ide/pci/adma100.c linux-2.6.11-rc4/drivers/ide/pci/adma100.c --- linux-2.6.11-rc3/drivers/ide/pci/adma100.c 2004-12-24 13:34:31.000000000 -0800 +++ linux-2.6.11-rc4/drivers/ide/pci/adma100.c 1969-12-31 16:00:00.000000000 -0800 @@ -1,30 +0,0 @@ -/* - * linux/drivers/ide/pci/adma100.c -- basic support for Pacific Digital ADMA-100 boards - * - * Created 09 Apr 2002 by Mark Lord - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file COPYING in the main directory of this archive for - * more details. - */ - -#include -#include -#include -#include -#include -#include -#include - -void __init ide_init_adma100 (ide_hwif_t *hwif) -{ - unsigned long phy_admctl = pci_resource_start(hwif->pci_dev, 4) + 0x80 + (hwif->channel * 0x20); - void *v_admctl; - - hwif->autodma = 0; // not compatible with normal IDE DMA transfers - hwif->dma_base = 0; // disable DMA completely - hwif->io_ports[IDE_CONTROL_OFFSET] += 4; // chip needs offset of 6 instead of 2 - v_admctl = ioremap_nocache(phy_admctl, 1024); // map config regs, so we can turn on drive IRQs - *((unsigned short *)v_admctl) &= 3; // enable aIEN; preserve PIO mode - iounmap(v_admctl); // all done; unmap config regs -} diff -urN linux-2.6.11-rc3/drivers/ide/pci/adma100.h linux-2.6.11-rc4/drivers/ide/pci/adma100.h --- linux-2.6.11-rc3/drivers/ide/pci/adma100.h 2004-12-24 13:35:25.000000000 -0800 +++ linux-2.6.11-rc4/drivers/ide/pci/adma100.h 1969-12-31 16:00:00.000000000 -0800 @@ -1,28 +0,0 @@ -#ifndef ADMA_100_H -#define ADMA_100_H - -#include -#include -#include - -extern void init_setup_pdcadma(struct pci_dev *, ide_pci_device_t *); -extern unsigned int init_chipset_pdcadma(struct pci_dev *, const char *); -extern void init_hwif_pdcadma(ide_hwif_t *); -extern void init_dma_pdcadma(ide_hwif_t *, unsigned long); - -static ide_pci_device_t pdcadma_chipsets[] __devinitdata = { - { - .vendor = PCI_VENDOR_ID_PDC, - .device = PCI_DEVICE_ID_PDC_1841, - .name = "ADMA100", - .init_setup = init_setup_pdcadma, - .init_chipset = init_chipset_pdcadma, - .init_hwif = init_hwif_pdcadma, - .init_dma = init_dma_pdcadma, - .channels = 2, - .autodma = NODMA, - .bootable = OFF_BOARD, - } -} - -#endif /* ADMA_100_H */ diff -urN linux-2.6.11-rc3/drivers/ide/pci/aec62xx.c linux-2.6.11-rc4/drivers/ide/pci/aec62xx.c --- linux-2.6.11-rc3/drivers/ide/pci/aec62xx.c 2005-02-12 19:50:37.523832483 -0800 +++ linux-2.6.11-rc4/drivers/ide/pci/aec62xx.c 2005-02-12 19:50:56.129637967 -0800 @@ -16,7 +16,54 @@ #include -#include "aec62xx.h" +struct chipset_bus_clock_list_entry { + u8 xfer_speed; + u8 chipset_settings; + u8 ultra_settings; +}; + +static struct chipset_bus_clock_list_entry aec6xxx_33_base [] = { + { XFER_UDMA_6, 0x31, 0x07 }, + { XFER_UDMA_5, 0x31, 0x06 }, + { XFER_UDMA_4, 0x31, 0x05 }, + { XFER_UDMA_3, 0x31, 0x04 }, + { XFER_UDMA_2, 0x31, 0x03 }, + { XFER_UDMA_1, 0x31, 0x02 }, + { XFER_UDMA_0, 0x31, 0x01 }, + + { XFER_MW_DMA_2, 0x31, 0x00 }, + { XFER_MW_DMA_1, 0x31, 0x00 }, + { XFER_MW_DMA_0, 0x0a, 0x00 }, + { XFER_PIO_4, 0x31, 0x00 }, + { XFER_PIO_3, 0x33, 0x00 }, + { XFER_PIO_2, 0x08, 0x00 }, + { XFER_PIO_1, 0x0a, 0x00 }, + { XFER_PIO_0, 0x00, 0x00 }, + { 0, 0x00, 0x00 } +}; + +static struct chipset_bus_clock_list_entry aec6xxx_34_base [] = { + { XFER_UDMA_6, 0x41, 0x06 }, + { XFER_UDMA_5, 0x41, 0x05 }, + { XFER_UDMA_4, 0x41, 0x04 }, + { XFER_UDMA_3, 0x41, 0x03 }, + { XFER_UDMA_2, 0x41, 0x02 }, + { XFER_UDMA_1, 0x41, 0x01 }, + { XFER_UDMA_0, 0x41, 0x01 }, + + { XFER_MW_DMA_2, 0x41, 0x00 }, + { XFER_MW_DMA_1, 0x42, 0x00 }, + { XFER_MW_DMA_0, 0x7a, 0x00 }, + { XFER_PIO_4, 0x41, 0x00 }, + { XFER_PIO_3, 0x43, 0x00 }, + { XFER_PIO_2, 0x78, 0x00 }, + { XFER_PIO_1, 0x7a, 0x00 }, + { XFER_PIO_0, 0x70, 0x00 }, + { 0, 0x00, 0x00 } +}; + +#define BUSCLOCK(D) \ + ((struct chipset_bus_clock_list_entry *) pci_get_drvdata((D))) #if 0 if (dev->device == PCI_DEVICE_ID_ARTOP_ATP850UF) { @@ -101,8 +148,7 @@ /* 0x40|(2*drive->dn): Active, 0x41|(2*drive->dn): Recovery */ pci_read_config_word(dev, 0x40|(2*drive->dn), &d_conf); tmp0 = pci_bus_clock_list(speed, BUSCLOCK(dev)); - SPLIT_BYTE(tmp0,tmp1,tmp2); - MAKE_WORD(d_conf,tmp1,tmp2); + d_conf = ((tmp0 & 0xf0) << 4) | (tmp0 & 0xf); pci_write_config_word(dev, 0x40|(2*drive->dn), d_conf); tmp1 = 0x00; @@ -343,6 +389,58 @@ return ide_setup_pci_device(dev, d); } +static ide_pci_device_t aec62xx_chipsets[] __devinitdata = { + { /* 0 */ + .name = "AEC6210", + .init_setup = init_setup_aec62xx, + .init_chipset = init_chipset_aec62xx, + .init_hwif = init_hwif_aec62xx, + .init_dma = init_dma_aec62xx, + .channels = 2, + .autodma = AUTODMA, + .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}}, + .bootable = OFF_BOARD, + },{ /* 1 */ + .name = "AEC6260", + .init_setup = init_setup_aec62xx, + .init_chipset = init_chipset_aec62xx, + .init_hwif = init_hwif_aec62xx, + .init_dma = init_dma_aec62xx, + .channels = 2, + .autodma = NOAUTODMA, + .bootable = OFF_BOARD, + },{ /* 2 */ + .name = "AEC6260R", + .init_setup = init_setup_aec62xx, + .init_chipset = init_chipset_aec62xx, + .init_hwif = init_hwif_aec62xx, + .init_dma = init_dma_aec62xx, + .channels = 2, + .autodma = AUTODMA, + .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}}, + .bootable = NEVER_BOARD, + },{ /* 3 */ + .name = "AEC6X80", + .init_setup = init_setup_aec6x80, + .init_chipset = init_chipset_aec62xx, + .init_hwif = init_hwif_aec62xx, + .init_dma = init_dma_aec62xx, + .channels = 2, + .autodma = AUTODMA, + .bootable = OFF_BOARD, + },{ /* 4 */ + .name = "AEC6X80R", + .init_setup = init_setup_aec6x80, + .init_chipset = init_chipset_aec62xx, + .init_hwif = init_hwif_aec62xx, + .init_dma = init_dma_aec62xx, + .channels = 2, + .autodma = AUTODMA, + .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}}, + .bootable = OFF_BOARD, + } +}; + /** * aec62xx_init_one - called when a AEC is found * @dev: the aec62xx device diff -urN linux-2.6.11-rc3/drivers/ide/pci/aec62xx.h linux-2.6.11-rc4/drivers/ide/pci/aec62xx.h --- linux-2.6.11-rc3/drivers/ide/pci/aec62xx.h 2005-02-12 19:50:37.524832527 -0800 +++ linux-2.6.11-rc4/drivers/ide/pci/aec62xx.h 1969-12-31 16:00:00.000000000 -0800 @@ -1,122 +0,0 @@ -#ifndef AEC62XX_H -#define AEC62XX_H - -#include -#include -#include - -struct chipset_bus_clock_list_entry { - byte xfer_speed; - byte chipset_settings; - byte ultra_settings; -}; - -static struct chipset_bus_clock_list_entry aec6xxx_33_base [] = { - { XFER_UDMA_6, 0x31, 0x07 }, - { XFER_UDMA_5, 0x31, 0x06 }, - { XFER_UDMA_4, 0x31, 0x05 }, - { XFER_UDMA_3, 0x31, 0x04 }, - { XFER_UDMA_2, 0x31, 0x03 }, - { XFER_UDMA_1, 0x31, 0x02 }, - { XFER_UDMA_0, 0x31, 0x01 }, - - { XFER_MW_DMA_2, 0x31, 0x00 }, - { XFER_MW_DMA_1, 0x31, 0x00 }, - { XFER_MW_DMA_0, 0x0a, 0x00 }, - { XFER_PIO_4, 0x31, 0x00 }, - { XFER_PIO_3, 0x33, 0x00 }, - { XFER_PIO_2, 0x08, 0x00 }, - { XFER_PIO_1, 0x0a, 0x00 }, - { XFER_PIO_0, 0x00, 0x00 }, - { 0, 0x00, 0x00 } -}; - -static struct chipset_bus_clock_list_entry aec6xxx_34_base [] = { - { XFER_UDMA_6, 0x41, 0x06 }, - { XFER_UDMA_5, 0x41, 0x05 }, - { XFER_UDMA_4, 0x41, 0x04 }, - { XFER_UDMA_3, 0x41, 0x03 }, - { XFER_UDMA_2, 0x41, 0x02 }, - { XFER_UDMA_1, 0x41, 0x01 }, - { XFER_UDMA_0, 0x41, 0x01 }, - - { XFER_MW_DMA_2, 0x41, 0x00 }, - { XFER_MW_DMA_1, 0x42, 0x00 }, - { XFER_MW_DMA_0, 0x7a, 0x00 }, - { XFER_PIO_4, 0x41, 0x00 }, - { XFER_PIO_3, 0x43, 0x00 }, - { XFER_PIO_2, 0x78, 0x00 }, - { XFER_PIO_1, 0x7a, 0x00 }, - { XFER_PIO_0, 0x70, 0x00 }, - { 0, 0x00, 0x00 } -}; - -#ifndef SPLIT_BYTE -#define SPLIT_BYTE(B,H,L) ((H)=(B>>4), (L)=(B-((B>>4)<<4))) -#endif -#ifndef MAKE_WORD -#define MAKE_WORD(W,HB,LB) ((W)=((HB<<8)+LB)) -#endif - -#define BUSCLOCK(D) \ - ((struct chipset_bus_clock_list_entry *) pci_get_drvdata((D))) - -static int init_setup_aec6x80(struct pci_dev *, ide_pci_device_t *); -static int init_setup_aec62xx(struct pci_dev *, ide_pci_device_t *); -static unsigned int init_chipset_aec62xx(struct pci_dev *, const char *); -static void init_hwif_aec62xx(ide_hwif_t *); -static void init_dma_aec62xx(ide_hwif_t *, unsigned long); - -static ide_pci_device_t aec62xx_chipsets[] __devinitdata = { - { /* 0 */ - .name = "AEC6210", - .init_setup = init_setup_aec62xx, - .init_chipset = init_chipset_aec62xx, - .init_hwif = init_hwif_aec62xx, - .init_dma = init_dma_aec62xx, - .channels = 2, - .autodma = AUTODMA, - .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}}, - .bootable = OFF_BOARD, - },{ /* 1 */ - .name = "AEC6260", - .init_setup = init_setup_aec62xx, - .init_chipset = init_chipset_aec62xx, - .init_hwif = init_hwif_aec62xx, - .init_dma = init_dma_aec62xx, - .channels = 2, - .autodma = NOAUTODMA, - .bootable = OFF_BOARD, - },{ /* 2 */ - .name = "AEC6260R", - .init_setup = init_setup_aec62xx, - .init_chipset = init_chipset_aec62xx, - .init_hwif = init_hwif_aec62xx, - .init_dma = init_dma_aec62xx, - .channels = 2, - .autodma = AUTODMA, - .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}}, - .bootable = NEVER_BOARD, - },{ /* 3 */ - .name = "AEC6X80", - .init_setup = init_setup_aec6x80, - .init_chipset = init_chipset_aec62xx, - .init_hwif = init_hwif_aec62xx, - .init_dma = init_dma_aec62xx, - .channels = 2, - .autodma = AUTODMA, - .bootable = OFF_BOARD, - },{ /* 4 */ - .name = "AEC6X80R", - .init_setup = init_setup_aec6x80, - .init_chipset = init_chipset_aec62xx, - .init_hwif = init_hwif_aec62xx, - .init_dma = init_dma_aec62xx, - .channels = 2, - .autodma = AUTODMA, - .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}}, - .bootable = OFF_BOARD, - } -}; - -#endif /* AEC62XX_H */ diff -urN linux-2.6.11-rc3/drivers/ide/pci/cmd64x.c linux-2.6.11-rc4/drivers/ide/pci/cmd64x.c --- linux-2.6.11-rc3/drivers/ide/pci/cmd64x.c 2005-02-12 19:50:37.527832656 -0800 +++ linux-2.6.11-rc4/drivers/ide/pci/cmd64x.c 2005-02-12 19:50:56.137638314 -0800 @@ -25,7 +25,56 @@ #include -#include "cmd64x.h" +#define DISPLAY_CMD64X_TIMINGS + +#define CMD_DEBUG 0 + +#if CMD_DEBUG +#define cmdprintk(x...) printk(x) +#else +#define cmdprintk(x...) +#endif + +/* + * CMD64x specific registers definition. + */ +#define CFR 0x50 +#define CFR_INTR_CH0 0x02 +#define CNTRL 0x51 +#define CNTRL_DIS_RA0 0x40 +#define CNTRL_DIS_RA1 0x80 +#define CNTRL_ENA_2ND 0x08 + +#define CMDTIM 0x52 +#define ARTTIM0 0x53 +#define DRWTIM0 0x54 +#define ARTTIM1 0x55 +#define DRWTIM1 0x56 +#define ARTTIM23 0x57 +#define ARTTIM23_DIS_RA2 0x04 +#define ARTTIM23_DIS_RA3 0x08 +#define ARTTIM23_INTR_CH1 0x10 +#define ARTTIM2 0x57 +#define ARTTIM3 0x57 +#define DRWTIM23 0x58 +#define DRWTIM2 0x58 +#define BRST 0x59 +#define DRWTIM3 0x5b + +#define BMIDECR0 0x70 +#define MRDMODE 0x71 +#define MRDMODE_INTR_CH0 0x04 +#define MRDMODE_INTR_CH1 0x08 +#define MRDMODE_BLK_CH0 0x10 +#define MRDMODE_BLK_CH1 0x20 +#define BMIDESR0 0x72 +#define UDIDETCR0 0x73 +#define DTPR0 0x74 +#define BMIDECR1 0x78 +#define BMIDECSR 0x79 +#define BMIDESR1 0x7A +#define UDIDETCR1 0x7B +#define DTPR1 0x7C #if defined(DISPLAY_CMD64X_TIMINGS) && defined(CONFIG_PROC_FS) #include @@ -707,6 +756,39 @@ hwif->drives[1].autodma = hwif->autodma; } +static ide_pci_device_t cmd64x_chipsets[] __devinitdata = { + { /* 0 */ + .name = "CMD643", + .init_chipset = init_chipset_cmd64x, + .init_hwif = init_hwif_cmd64x, + .channels = 2, + .autodma = AUTODMA, + .bootable = ON_BOARD, + },{ /* 1 */ + .name = "CMD646", + .init_chipset = init_chipset_cmd64x, + .init_hwif = init_hwif_cmd64x, + .channels = 2, + .autodma = AUTODMA, + .enablebits = {{0x00,0x00,0x00}, {0x51,0x80,0x80}}, + .bootable = ON_BOARD, + },{ /* 2 */ + .name = "CMD648", + .init_chipset = init_chipset_cmd64x, + .init_hwif = init_hwif_cmd64x, + .channels = 2, + .autodma = AUTODMA, + .bootable = ON_BOARD, + },{ /* 3 */ + .name = "CMD649", + .init_chipset = init_chipset_cmd64x, + .init_hwif = init_hwif_cmd64x, + .channels = 2, + .autodma = AUTODMA, + .bootable = ON_BOARD, + } +}; + static int __devinit cmd64x_init_one(struct pci_dev *dev, const struct pci_device_id *id) { return ide_setup_pci_device(dev, &cmd64x_chipsets[id->driver_data]); diff -urN linux-2.6.11-rc3/drivers/ide/pci/cmd64x.h linux-2.6.11-rc4/drivers/ide/pci/cmd64x.h --- linux-2.6.11-rc3/drivers/ide/pci/cmd64x.h 2004-12-24 13:34:32.000000000 -0800 +++ linux-2.6.11-rc4/drivers/ide/pci/cmd64x.h 1969-12-31 16:00:00.000000000 -0800 @@ -1,95 +0,0 @@ -#ifndef CMD64X_H -#define CMD64X_H - -#include -#include -#include - -#define DISPLAY_CMD64X_TIMINGS - -#define CMD_DEBUG 0 - -#if CMD_DEBUG -#define cmdprintk(x...) printk(x) -#else -#define cmdprintk(x...) -#endif - -/* - * CMD64x specific registers definition. - */ -#define CFR 0x50 -#define CFR_INTR_CH0 0x02 -#define CNTRL 0x51 -#define CNTRL_DIS_RA0 0x40 -#define CNTRL_DIS_RA1 0x80 -#define CNTRL_ENA_2ND 0x08 - -#define CMDTIM 0x52 -#define ARTTIM0 0x53 -#define DRWTIM0 0x54 -#define ARTTIM1 0x55 -#define DRWTIM1 0x56 -#define ARTTIM23 0x57 -#define ARTTIM23_DIS_RA2 0x04 -#define ARTTIM23_DIS_RA3 0x08 -#define ARTTIM23_INTR_CH1 0x10 -#define ARTTIM2 0x57 -#define ARTTIM3 0x57 -#define DRWTIM23 0x58 -#define DRWTIM2 0x58 -#define BRST 0x59 -#define DRWTIM3 0x5b - -#define BMIDECR0 0x70 -#define MRDMODE 0x71 -#define MRDMODE_INTR_CH0 0x04 -#define MRDMODE_INTR_CH1 0x08 -#define MRDMODE_BLK_CH0 0x10 -#define MRDMODE_BLK_CH1 0x20 -#define BMIDESR0 0x72 -#define UDIDETCR0 0x73 -#define DTPR0 0x74 -#define BMIDECR1 0x78 -#define BMIDECSR 0x79 -#define BMIDESR1 0x7A -#define UDIDETCR1 0x7B -#define DTPR1 0x7C - -static unsigned int init_chipset_cmd64x(struct pci_dev *, const char *); -static void init_hwif_cmd64x(ide_hwif_t *); - -static ide_pci_device_t cmd64x_chipsets[] __devinitdata = { - { /* 0 */ - .name = "CMD643", - .init_chipset = init_chipset_cmd64x, - .init_hwif = init_hwif_cmd64x, - .channels = 2, - .autodma = AUTODMA, - .bootable = ON_BOARD, - },{ /* 1 */ - .name = "CMD646", - .init_chipset = init_chipset_cmd64x, - .init_hwif = init_hwif_cmd64x, - .channels = 2, - .autodma = AUTODMA, - .enablebits = {{0x00,0x00,0x00}, {0x51,0x80,0x80}}, - .bootable = ON_BOARD, - },{ /* 2 */ - .name = "CMD648", - .init_chipset = init_chipset_cmd64x, - .init_hwif = init_hwif_cmd64x, - .channels = 2, - .autodma = AUTODMA, - .bootable = ON_BOARD, - },{ - .name = "CMD649", - .init_chipset = init_chipset_cmd64x, - .init_hwif = init_hwif_cmd64x, - .channels = 2, - .autodma = AUTODMA, - .bootable = ON_BOARD, - } -}; - -#endif /* CMD64X_H */ diff -urN linux-2.6.11-rc3/drivers/ide/pci/cy82c693.c linux-2.6.11-rc4/drivers/ide/pci/cy82c693.c --- linux-2.6.11-rc3/drivers/ide/pci/cy82c693.c 2005-02-12 19:50:37.528832700 -0800 +++ linux-2.6.11-rc4/drivers/ide/pci/cy82c693.c 2005-02-12 19:50:56.142638530 -0800 @@ -54,7 +54,64 @@ #include -#include "cy82c693.h" +/* the current version */ +#define CY82_VERSION "CY82C693U driver v0.34 99-13-12 Andreas S. Krebs (akrebs@altavista.net)" + +/* + * The following are used to debug the driver. + */ +#define CY82C693_DEBUG_LOGS 0 +#define CY82C693_DEBUG_INFO 0 + +/* define CY82C693_SETDMA_CLOCK to set DMA Controller Clock Speed to ATCLK */ +#undef CY82C693_SETDMA_CLOCK + +/* + * NOTE: the value for busmaster timeout is tricky and I got it by + * trial and error! By using a to low value will cause DMA timeouts + * and drop IDE performance, and by using a to high value will cause + * audio playback to scatter. + * If you know a better value or how to calc it, please let me know. + */ + +/* twice the value written in cy82c693ub datasheet */ +#define BUSMASTER_TIMEOUT 0x50 +/* + * the value above was tested on my machine and it seems to work okay + */ + +/* here are the offset definitions for the registers */ +#define CY82_IDE_CMDREG 0x04 +#define CY82_IDE_ADDRSETUP 0x48 +#define CY82_IDE_MASTER_IOR 0x4C +#define CY82_IDE_MASTER_IOW 0x4D +#define CY82_IDE_SLAVE_IOR 0x4E +#define CY82_IDE_SLAVE_IOW 0x4F +#define CY82_IDE_MASTER_8BIT 0x50 +#define CY82_IDE_SLAVE_8BIT 0x51 + +#define CY82_INDEX_PORT 0x22 +#define CY82_DATA_PORT 0x23 + +#define CY82_INDEX_CTRLREG1 0x01 +#define CY82_INDEX_CHANNEL0 0x30 +#define CY82_INDEX_CHANNEL1 0x31 +#define CY82_INDEX_TIMEOUT 0x32 + +/* the max PIO mode - from datasheet */ +#define CY82C693_MAX_PIO 4 + +/* the min and max PCI bus speed in MHz - from datasheet */ +#define CY82C963_MIN_BUS_SPEED 25 +#define CY82C963_MAX_BUS_SPEED 33 + +/* the struct for the PIO mode timings */ +typedef struct pio_clocks_s { + u8 address_time; /* Address setup (clocks) */ + u8 time_16r; /* clocks for 16bit IOR (0xF0=Active/data, 0x0F=Recovery) */ + u8 time_16w; /* clocks for 16bit IOW (0xF0=Active/data, 0x0F=Recovery) */ + u8 time_8; /* clocks for 8bit (0xF0=Active/data, 0x0F=Recovery) */ +} pio_clocks_t; /* * calc clocks using bus_speed @@ -422,6 +479,18 @@ } } +static ide_pci_device_t cy82c693_chipsets[] __devinitdata = { + { /* 0 */ + .name = "CY82C693", + .init_chipset = init_chipset_cy82c693, + .init_iops = init_iops_cy82c693, + .init_hwif = init_hwif_cy82c693, + .channels = 1, + .autodma = AUTODMA, + .bootable = ON_BOARD, + } +}; + static int __devinit cy82c693_init_one(struct pci_dev *dev, const struct pci_device_id *id) { ide_pci_device_t *d = &cy82c693_chipsets[id->driver_data]; diff -urN linux-2.6.11-rc3/drivers/ide/pci/cy82c693.h linux-2.6.11-rc4/drivers/ide/pci/cy82c693.h --- linux-2.6.11-rc3/drivers/ide/pci/cy82c693.h 2004-12-24 13:34:30.000000000 -0800 +++ linux-2.6.11-rc4/drivers/ide/pci/cy82c693.h 1969-12-31 16:00:00.000000000 -0800 @@ -1,83 +0,0 @@ -#ifndef CY82C693_H -#define CY82C693_H - -#include -#include -#include - -/* the current version */ -#define CY82_VERSION "CY82C693U driver v0.34 99-13-12 Andreas S. Krebs (akrebs@altavista.net)" - -/* - * The following are used to debug the driver. - */ -#define CY82C693_DEBUG_LOGS 0 -#define CY82C693_DEBUG_INFO 0 - -/* define CY82C693_SETDMA_CLOCK to set DMA Controller Clock Speed to ATCLK */ -#undef CY82C693_SETDMA_CLOCK - -/* - * NOTE: the value for busmaster timeout is tricky and I got it by - * trial and error! By using a to low value will cause DMA timeouts - * and drop IDE performance, and by using a to high value will cause - * audio playback to scatter. - * If you know a better value or how to calc it, please let me know. - */ - -/* twice the value written in cy82c693ub datasheet */ -#define BUSMASTER_TIMEOUT 0x50 -/* - * the value above was tested on my machine and it seems to work okay - */ - -/* here are the offset definitions for the registers */ -#define CY82_IDE_CMDREG 0x04 -#define CY82_IDE_ADDRSETUP 0x48 -#define CY82_IDE_MASTER_IOR 0x4C -#define CY82_IDE_MASTER_IOW 0x4D -#define CY82_IDE_SLAVE_IOR 0x4E -#define CY82_IDE_SLAVE_IOW 0x4F -#define CY82_IDE_MASTER_8BIT 0x50 -#define CY82_IDE_SLAVE_8BIT 0x51 - -#define CY82_INDEX_PORT 0x22 -#define CY82_DATA_PORT 0x23 - -#define CY82_INDEX_CTRLREG1 0x01 -#define CY82_INDEX_CHANNEL0 0x30 -#define CY82_INDEX_CHANNEL1 0x31 -#define CY82_INDEX_TIMEOUT 0x32 - -/* the max PIO mode - from datasheet */ -#define CY82C693_MAX_PIO 4 - -/* the min and max PCI bus speed in MHz - from datasheet */ -#define CY82C963_MIN_BUS_SPEED 25 -#define CY82C963_MAX_BUS_SPEED 33 - -/* the struct for the PIO mode timings */ -typedef struct pio_clocks_s { - u8 address_time; /* Address setup (clocks) */ - u8 time_16r; /* clocks for 16bit IOR (0xF0=Active/data, 0x0F=Recovery) */ - u8 time_16w; /* clocks for 16bit IOW (0xF0=Active/data, 0x0F=Recovery) */ - u8 time_8; /* clocks for 8bit (0xF0=Active/data, 0x0F=Recovery) */ -} pio_clocks_t; - -static unsigned int init_chipset_cy82c693(struct pci_dev *, const char *); -static void init_hwif_cy82c693(ide_hwif_t *); -static void init_iops_cy82c693(ide_hwif_t *); - -static ide_pci_device_t cy82c693_chipsets[] __devinitdata = { - { /* 0 */ - .name = "CY82C693", - .init_chipset = init_chipset_cy82c693, - .init_iops = init_iops_cy82c693, - .init_hwif = init_hwif_cy82c693, - .channels = 1, - .autodma = AUTODMA, - .bootable = ON_BOARD, - } -}; - -#endif /* CY82C693_H */ diff -urN linux-2.6.11-rc3/drivers/ide/pci/generic.c linux-2.6.11-rc4/drivers/ide/pci/generic.c --- linux-2.6.11-rc3/drivers/ide/pci/generic.c 2005-02-12 19:50:37.528832700 -0800 +++ linux-2.6.11-rc4/drivers/ide/pci/generic.c 2005-02-12 19:50:56.145638660 -0800 @@ -39,13 +39,6 @@ #include -#include "generic.h" - -static unsigned int __devinit init_chipset_generic (struct pci_dev *dev, const char *name) -{ - return 0; -} - static void __devinit init_hwif_generic (ide_hwif_t *hwif) { switch(hwif->pci_dev->device) { @@ -83,6 +76,89 @@ return 0; #endif +static ide_pci_device_t generic_chipsets[] __devinitdata = { + { /* 0 */ + .name = "NS87410", + .init_hwif = init_hwif_generic, + .channels = 2, + .autodma = AUTODMA, + .enablebits = {{0x43,0x08,0x08}, {0x47,0x08,0x08}}, + .bootable = ON_BOARD, + },{ /* 1 */ + .name = "SAMURAI", + .init_hwif = init_hwif_generic, + .channels = 2, + .autodma = AUTODMA, + .bootable = ON_BOARD, + },{ /* 2 */ + .name = "HT6565", + .init_hwif = init_hwif_generic, + .channels = 2, + .autodma = AUTODMA, + .bootable = ON_BOARD, + },{ /* 3 */ + .name = "UM8673F", + .init_hwif = init_hwif_generic, + .channels = 2, + .autodma = NODMA, + .bootable = ON_BOARD, + },{ /* 4 */ + .name = "UM8886A", + .init_hwif = init_hwif_generic, + .channels = 2, + .autodma = NODMA, + .bootable = ON_BOARD, + },{ /* 5 */ + .name = "UM8886BF", + .init_hwif = init_hwif_generic, + .channels = 2, + .autodma = NODMA, + .bootable = ON_BOARD, + },{ /* 6 */ + .name = "HINT_IDE", + .init_hwif = init_hwif_generic, + .channels = 2, + .autodma = AUTODMA, + .bootable = ON_BOARD, + },{ /* 7 */ + .name = "VIA_IDE", + .init_hwif = init_hwif_generic, + .channels = 2, + .autodma = NOAUTODMA, + .bootable = ON_BOARD, + },{ /* 8 */ + .name = "OPTI621V", + .init_hwif = init_hwif_generic, + .channels = 2, + .autodma = NOAUTODMA, + .bootable = ON_BOARD, + },{ /* 9 */ + .name = "VIA8237SATA", + .init_hwif = init_hwif_generic, + .channels = 2, + .autodma = AUTODMA, + .bootable = OFF_BOARD, + },{ /* 10 */ + .name = "Piccolo0102", + .init_hwif = init_hwif_generic, + .channels = 2, + .autodma = NOAUTODMA, + .bootable = ON_BOARD, + },{ /* 11 */ + .name = "Piccolo0103", + .init_hwif = init_hwif_generic, + .channels = 2, + .autodma = NOAUTODMA, + .bootable = ON_BOARD, + },{ /* 12 */ + .name = "Piccolo0105", + .init_hwif = init_hwif_generic, + .channels = 2, + .autodma = NOAUTODMA, + .bootable = ON_BOARD, + } +}; + /** * generic_init_one - called when a PIIX is found * @dev: the generic device diff -urN linux-2.6.11-rc3/drivers/ide/pci/generic.h linux-2.6.11-rc4/drivers/ide/pci/generic.h --- linux-2.6.11-rc3/drivers/ide/pci/generic.h 2004-12-24 13:34:01.000000000 -0800 +++ linux-2.6.11-rc4/drivers/ide/pci/generic.h 1969-12-31 16:00:00.000000000 -0800 @@ -1,120 +0,0 @@ -#ifndef IDE_GENERIC_H -#define IDE_GENERIC_H - -#include -#include -#include - -static unsigned int init_chipset_generic(struct pci_dev *, const char *); -static void init_hwif_generic(ide_hwif_t *); - -static ide_pci_device_t generic_chipsets[] __devinitdata = { - { /* 0 */ - .name = "NS87410", - .init_chipset = init_chipset_generic, - .init_hwif = init_hwif_generic, - .channels = 2, - .autodma = AUTODMA, - .enablebits = {{0x43,0x08,0x08}, {0x47,0x08,0x08}}, - .bootable = ON_BOARD, - },{ /* 1 */ - .name = "SAMURAI", - .init_chipset = init_chipset_generic, - .init_hwif = init_hwif_generic, - .channels = 2, - .autodma = AUTODMA, - .bootable = ON_BOARD, - },{ /* 2 */ - .name = "HT6565", - .init_chipset = init_chipset_generic, - .init_hwif = init_hwif_generic, - .channels = 2, - .autodma = AUTODMA, - .bootable = ON_BOARD, - },{ /* 3 */ - .name = "UM8673F", - .init_chipset = init_chipset_generic, - .init_hwif = init_hwif_generic, - .channels = 2, - .autodma = NODMA, - .bootable = ON_BOARD, - },{ /* 4 */ - .name = "UM8886A", - .init_chipset = init_chipset_generic, - .init_hwif = init_hwif_generic, - .channels = 2, - .autodma = NODMA, - .bootable = ON_BOARD, - },{ /* 5 */ - .name = "UM8886BF", - .init_chipset = init_chipset_generic, - .init_hwif = init_hwif_generic, - .channels = 2, - .autodma = NODMA, - .bootable = ON_BOARD, - },{ /* 6 */ - .name = "HINT_IDE", - .init_chipset = init_chipset_generic, - .init_hwif = init_hwif_generic, - .channels = 2, - .autodma = AUTODMA, - .bootable = ON_BOARD, - },{ /* 7 */ - .name = "VIA_IDE", - .init_chipset = init_chipset_generic, - .init_hwif = init_hwif_generic, - .channels = 2, - .autodma = NOAUTODMA, - .bootable = ON_BOARD, - },{ /* 8 */ - .name = "OPTI621V", - .init_chipset = init_chipset_generic, - .init_hwif = init_hwif_generic, - .channels = 2, - .autodma = NOAUTODMA, - .bootable = ON_BOARD, - },{ /* 9 */ - .name = "VIA8237SATA", - .init_chipset = init_chipset_generic, - .init_hwif = init_hwif_generic, - .channels = 2, - .autodma = AUTODMA, - .bootable = OFF_BOARD, - },{ /* 10 */ - .name = "Piccolo0102", - .init_chipset = init_chipset_generic, - .init_hwif = init_hwif_generic, - .channels = 2, - .autodma = NOAUTODMA, - .bootable = ON_BOARD, - },{ /* 11 */ - .name = "Piccolo0103", - .init_chipset = init_chipset_generic, - .init_hwif = init_hwif_generic, - .channels = 2, - .autodma = NOAUTODMA, - .bootable = ON_BOARD, - },{ /* 12 */ - .name = "Piccolo0105", - .init_chipset = init_chipset_generic, - .init_hwif = init_hwif_generic, - .channels = 2, - .autodma = NOAUTODMA, - .bootable = ON_BOARD, - } -}; - -#if 0 -static ide_pci_device_t unknown_chipset[] __devinitdata = { - { /* 0 */ - .name = "PCI_IDE", - .init_chipset = init_chipset_generic, - .init_hwif = init_hwif_generic, - .channels = 2, - .autodma = AUTODMA, - .bootable = ON_BOARD, - } -}; -#endif - -#endif /* IDE_GENERIC_H */ diff -urN linux-2.6.11-rc3/drivers/ide/pci/hpt366.c linux-2.6.11-rc4/drivers/ide/pci/hpt366.c --- linux-2.6.11-rc3/drivers/ide/pci/hpt366.c 2005-02-12 19:50:37.530832786 -0800 +++ linux-2.6.11-rc4/drivers/ide/pci/hpt366.c 2005-02-12 19:50:56.150638876 -0800 @@ -70,9 +70,384 @@ #include #include -#include "hpt366.h" +/* various tuning parameters */ +#define HPT_RESET_STATE_ENGINE +#undef HPT_DELAY_INTERRUPT +#undef HPT_SERIALIZE_IO + +static const char *quirk_drives[] = { + "QUANTUM FIREBALLlct08 08", + "QUANTUM FIREBALLP KA6.4", + "QUANTUM FIREBALLP LM20.4", + "QUANTUM FIREBALLP LM20.5", + NULL +}; + +static const char *bad_ata100_5[] = { + "IBM-DTLA-307075", + "IBM-DTLA-307060", + "IBM-DTLA-307045", + "IBM-DTLA-307030", + "IBM-DTLA-307020", + "IBM-DTLA-307015", + "IBM-DTLA-305040", + "IBM-DTLA-305030", + "IBM-DTLA-305020", + "IC35L010AVER07-0", + "IC35L020AVER07-0", + "IC35L030AVER07-0", + "IC35L040AVER07-0", + "IC35L060AVER07-0", + "WDC AC310200R", + NULL +}; + +static const char *bad_ata66_4[] = { + "IBM-DTLA-307075", + "IBM-DTLA-307060", + "IBM-DTLA-307045", + "IBM-DTLA-307030", + "IBM-DTLA-307020", + "IBM-DTLA-307015", + "IBM-DTLA-305040", + "IBM-DTLA-305030", + "IBM-DTLA-305020", + "IC35L010AVER07-0", + "IC35L020AVER07-0", + "IC35L030AVER07-0", + "IC35L040AVER07-0", + "IC35L060AVER07-0", + "WDC AC310200R", + NULL +}; + +static const char *bad_ata66_3[] = { + "WDC AC310200R", + NULL +}; + +static const char *bad_ata33[] = { + "Maxtor 92720U8", "Maxtor 92040U6", "Maxtor 91360U4", "Maxtor 91020U3", "Maxtor 90845U3", "Maxtor 90650U2", + "Maxtor 91360D8", "Maxtor 91190D7", "Maxtor 91020D6", "Maxtor 90845D5", "Maxtor 90680D4", "Maxtor 90510D3", "Maxtor 90340D2", + "Maxtor 91152D8", "Maxtor 91008D7", "Maxtor 90845D6", "Maxtor 90840D6", "Maxtor 90720D5", "Maxtor 90648D5", "Maxtor 90576D4", + "Maxtor 90510D4", + "Maxtor 90432D3", "Maxtor 90288D2", "Maxtor 90256D2", + "Maxtor 91000D8", "Maxtor 90910D8", "Maxtor 90875D7", "Maxtor 90840D7", "Maxtor 90750D6", "Maxtor 90625D5", "Maxtor 90500D4", + "Maxtor 91728D8", "Maxtor 91512D7", "Maxtor 91303D6", "Maxtor 91080D5", "Maxtor 90845D4", "Maxtor 90680D4", "Maxtor 90648D3", "Maxtor 90432D2", + NULL +}; + +struct chipset_bus_clock_list_entry { + u8 xfer_speed; + unsigned int chipset_settings; +}; + +/* key for bus clock timings + * bit + * 0:3 data_high_time. inactive time of DIOW_/DIOR_ for PIO and MW + * DMA. cycles = value + 1 + * 4:8 data_low_time. active time of DIOW_/DIOR_ for PIO and MW + * DMA. cycles = value + 1 + * 9:12 cmd_high_time. inactive time of DIOW_/DIOR_ during task file + * register access. + * 13:17 cmd_low_time. active time of DIOW_/DIOR_ during task file + * register access. + * 18:21 udma_cycle_time. clock freq and clock cycles for UDMA xfer. + * during task file register access. + * 22:24 pre_high_time. time to initialize 1st cycle for PIO and MW DMA + * xfer. + * 25:27 cmd_pre_high_time. time to initialize 1st PIO cycle for task + * register access. + * 28 UDMA enable + * 29 DMA enable + * 30 PIO_MST enable. if set, the chip is in bus master mode during + * PIO. + * 31 FIFO enable. + */ +static struct chipset_bus_clock_list_entry forty_base_hpt366[] = { + { XFER_UDMA_4, 0x900fd943 }, + { XFER_UDMA_3, 0x900ad943 }, + { XFER_UDMA_2, 0x900bd943 }, + { XFER_UDMA_1, 0x9008d943 }, + { XFER_UDMA_0, 0x9008d943 }, + + { XFER_MW_DMA_2, 0xa008d943 }, + { XFER_MW_DMA_1, 0xa010d955 }, + { XFER_MW_DMA_0, 0xa010d9fc }, + + { XFER_PIO_4, 0xc008d963 }, + { XFER_PIO_3, 0xc010d974 }, + { XFER_PIO_2, 0xc010d997 }, + { XFER_PIO_1, 0xc010d9c7 }, + { XFER_PIO_0, 0xc018d9d9 }, + { 0, 0x0120d9d9 } +}; + +static struct chipset_bus_clock_list_entry thirty_three_base_hpt366[] = { + { XFER_UDMA_4, 0x90c9a731 }, + { XFER_UDMA_3, 0x90cfa731 }, + { XFER_UDMA_2, 0x90caa731 }, + { XFER_UDMA_1, 0x90cba731 }, + { XFER_UDMA_0, 0x90c8a731 }, + + { XFER_MW_DMA_2, 0xa0c8a731 }, + { XFER_MW_DMA_1, 0xa0c8a732 }, /* 0xa0c8a733 */ + { XFER_MW_DMA_0, 0xa0c8a797 }, + + { XFER_PIO_4, 0xc0c8a731 }, + { XFER_PIO_3, 0xc0c8a742 }, + { XFER_PIO_2, 0xc0d0a753 }, + { XFER_PIO_1, 0xc0d0a7a3 }, /* 0xc0d0a793 */ + { XFER_PIO_0, 0xc0d0a7aa }, /* 0xc0d0a7a7 */ + { 0, 0x0120a7a7 } +}; + +static struct chipset_bus_clock_list_entry twenty_five_base_hpt366[] = { + { XFER_UDMA_4, 0x90c98521 }, + { XFER_UDMA_3, 0x90cf8521 }, + { XFER_UDMA_2, 0x90cf8521 }, + { XFER_UDMA_1, 0x90cb8521 }, + { XFER_UDMA_0, 0x90cb8521 }, + + { XFER_MW_DMA_2, 0xa0ca8521 }, + { XFER_MW_DMA_1, 0xa0ca8532 }, + { XFER_MW_DMA_0, 0xa0ca8575 }, + + { XFER_PIO_4, 0xc0ca8521 }, + { XFER_PIO_3, 0xc0ca8532 }, + { XFER_PIO_2, 0xc0ca8542 }, + { XFER_PIO_1, 0xc0d08572 }, + { XFER_PIO_0, 0xc0d08585 }, + { 0, 0x01208585 } +}; + +/* from highpoint documentation. these are old values */ +static struct chipset_bus_clock_list_entry thirty_three_base_hpt370[] = { +/* { XFER_UDMA_5, 0x1A85F442, 0x16454e31 }, */ + { XFER_UDMA_5, 0x16454e31 }, + { XFER_UDMA_4, 0x16454e31 }, + { XFER_UDMA_3, 0x166d4e31 }, + { XFER_UDMA_2, 0x16494e31 }, + { XFER_UDMA_1, 0x164d4e31 }, + { XFER_UDMA_0, 0x16514e31 }, + + { XFER_MW_DMA_2, 0x26514e21 }, + { XFER_MW_DMA_1, 0x26514e33 }, + { XFER_MW_DMA_0, 0x26514e97 }, + + { XFER_PIO_4, 0x06514e21 }, + { XFER_PIO_3, 0x06514e22 }, + { XFER_PIO_2, 0x06514e33 }, + { XFER_PIO_1, 0x06914e43 }, + { XFER_PIO_0, 0x06914e57 }, + { 0, 0x06514e57 } +}; + +static struct chipset_bus_clock_list_entry sixty_six_base_hpt370[] = { + { XFER_UDMA_5, 0x14846231 }, + { XFER_UDMA_4, 0x14886231 }, + { XFER_UDMA_3, 0x148c6231 }, + { XFER_UDMA_2, 0x148c6231 }, + { XFER_UDMA_1, 0x14906231 }, + { XFER_UDMA_0, 0x14986231 }, + + { XFER_MW_DMA_2, 0x26514e21 }, + { XFER_MW_DMA_1, 0x26514e33 }, + { XFER_MW_DMA_0, 0x26514e97 }, + + { XFER_PIO_4, 0x06514e21 }, + { XFER_PIO_3, 0x06514e22 }, + { XFER_PIO_2, 0x06514e33 }, + { XFER_PIO_1, 0x06914e43 }, + { XFER_PIO_0, 0x06914e57 }, + { 0, 0x06514e57 } +}; + +/* these are the current (4 sep 2001) timings from highpoint */ +static struct chipset_bus_clock_list_entry thirty_three_base_hpt370a[] = { + { XFER_UDMA_5, 0x12446231 }, + { XFER_UDMA_4, 0x12446231 }, + { XFER_UDMA_3, 0x126c6231 }, + { XFER_UDMA_2, 0x12486231 }, + { XFER_UDMA_1, 0x124c6233 }, + { XFER_UDMA_0, 0x12506297 }, + + { XFER_MW_DMA_2, 0x22406c31 }, + { XFER_MW_DMA_1, 0x22406c33 }, + { XFER_MW_DMA_0, 0x22406c97 }, + + { XFER_PIO_4, 0x06414e31 }, + { XFER_PIO_3, 0x06414e42 }, + { XFER_PIO_2, 0x06414e53 }, + { XFER_PIO_1, 0x06814e93 }, + { XFER_PIO_0, 0x06814ea7 }, + { 0, 0x06814ea7 } +}; + +/* 2x 33MHz timings */ +static struct chipset_bus_clock_list_entry sixty_six_base_hpt370a[] = { + { XFER_UDMA_5, 0x1488e673 }, + { XFER_UDMA_4, 0x1488e673 }, + { XFER_UDMA_3, 0x1498e673 }, + { XFER_UDMA_2, 0x1490e673 }, + { XFER_UDMA_1, 0x1498e677 }, + { XFER_UDMA_0, 0x14a0e73f }, + + { XFER_MW_DMA_2, 0x2480fa73 }, + { XFER_MW_DMA_1, 0x2480fa77 }, + { XFER_MW_DMA_0, 0x2480fb3f }, + + { XFER_PIO_4, 0x0c82be73 }, + { XFER_PIO_3, 0x0c82be95 }, + { XFER_PIO_2, 0x0c82beb7 }, + { XFER_PIO_1, 0x0d02bf37 }, + { XFER_PIO_0, 0x0d02bf5f }, + { 0, 0x0d02bf5f } +}; + +static struct chipset_bus_clock_list_entry fifty_base_hpt370a[] = { + { XFER_UDMA_5, 0x12848242 }, + { XFER_UDMA_4, 0x12ac8242 }, + { XFER_UDMA_3, 0x128c8242 }, + { XFER_UDMA_2, 0x120c8242 }, + { XFER_UDMA_1, 0x12148254 }, + { XFER_UDMA_0, 0x121882ea }, + + { XFER_MW_DMA_2, 0x22808242 }, + { XFER_MW_DMA_1, 0x22808254 }, + { XFER_MW_DMA_0, 0x228082ea }, + + { XFER_PIO_4, 0x0a81f442 }, + { XFER_PIO_3, 0x0a81f443 }, + { XFER_PIO_2, 0x0a81f454 }, + { XFER_PIO_1, 0x0ac1f465 }, + { XFER_PIO_0, 0x0ac1f48a }, + { 0, 0x0ac1f48a } +}; + +static struct chipset_bus_clock_list_entry thirty_three_base_hpt372[] = { + { XFER_UDMA_6, 0x1c81dc62 }, + { XFER_UDMA_5, 0x1c6ddc62 }, + { XFER_UDMA_4, 0x1c8ddc62 }, + { XFER_UDMA_3, 0x1c8edc62 }, /* checkme */ + { XFER_UDMA_2, 0x1c91dc62 }, + { XFER_UDMA_1, 0x1c9adc62 }, /* checkme */ + { XFER_UDMA_0, 0x1c82dc62 }, /* checkme */ + + { XFER_MW_DMA_2, 0x2c829262 }, + { XFER_MW_DMA_1, 0x2c829266 }, /* checkme */ + { XFER_MW_DMA_0, 0x2c82922e }, /* checkme */ + + { XFER_PIO_4, 0x0c829c62 }, + { XFER_PIO_3, 0x0c829c84 }, + { XFER_PIO_2, 0x0c829ca6 }, + { XFER_PIO_1, 0x0d029d26 }, + { XFER_PIO_0, 0x0d029d5e }, + { 0, 0x0d029d5e } +}; + +static struct chipset_bus_clock_list_entry fifty_base_hpt372[] = { + { XFER_UDMA_5, 0x12848242 }, + { XFER_UDMA_4, 0x12ac8242 }, + { XFER_UDMA_3, 0x128c8242 }, + { XFER_UDMA_2, 0x120c8242 }, + { XFER_UDMA_1, 0x12148254 }, + { XFER_UDMA_0, 0x121882ea }, + + { XFER_MW_DMA_2, 0x22808242 }, + { XFER_MW_DMA_1, 0x22808254 }, + { XFER_MW_DMA_0, 0x228082ea }, + + { XFER_PIO_4, 0x0a81f442 }, + { XFER_PIO_3, 0x0a81f443 }, + { XFER_PIO_2, 0x0a81f454 }, + { XFER_PIO_1, 0x0ac1f465 }, + { XFER_PIO_0, 0x0ac1f48a }, + { 0, 0x0a81f443 } +}; + +static struct chipset_bus_clock_list_entry sixty_six_base_hpt372[] = { + { XFER_UDMA_6, 0x1c869c62 }, + { XFER_UDMA_5, 0x1cae9c62 }, + { XFER_UDMA_4, 0x1c8a9c62 }, + { XFER_UDMA_3, 0x1c8e9c62 }, + { XFER_UDMA_2, 0x1c929c62 }, + { XFER_UDMA_1, 0x1c9a9c62 }, + { XFER_UDMA_0, 0x1c829c62 }, + + { XFER_MW_DMA_2, 0x2c829c62 }, + { XFER_MW_DMA_1, 0x2c829c66 }, + { XFER_MW_DMA_0, 0x2c829d2e }, + + { XFER_PIO_4, 0x0c829c62 }, + { XFER_PIO_3, 0x0c829c84 }, + { XFER_PIO_2, 0x0c829ca6 }, + { XFER_PIO_1, 0x0d029d26 }, + { XFER_PIO_0, 0x0d029d5e }, + { 0, 0x0d029d26 } +}; + +static struct chipset_bus_clock_list_entry thirty_three_base_hpt374[] = { + { XFER_UDMA_6, 0x12808242 }, + { XFER_UDMA_5, 0x12848242 }, + { XFER_UDMA_4, 0x12ac8242 }, + { XFER_UDMA_3, 0x128c8242 }, + { XFER_UDMA_2, 0x120c8242 }, + { XFER_UDMA_1, 0x12148254 }, + { XFER_UDMA_0, 0x121882ea }, + + { XFER_MW_DMA_2, 0x22808242 }, + { XFER_MW_DMA_1, 0x22808254 }, + { XFER_MW_DMA_0, 0x228082ea }, + + { XFER_PIO_4, 0x0a81f442 }, + { XFER_PIO_3, 0x0a81f443 }, + { XFER_PIO_2, 0x0a81f454 }, + { XFER_PIO_1, 0x0ac1f465 }, + { XFER_PIO_0, 0x0ac1f48a }, + { 0, 0x06814e93 } +}; + +/* FIXME: 50MHz timings for HPT374 */ #if 0 +static struct chipset_bus_clock_list_entry sixty_six_base_hpt374[] = { + { XFER_UDMA_6, 0x12406231 }, /* checkme */ + { XFER_UDMA_5, 0x12446231 }, /* 0x14846231 */ + { XFER_UDMA_4, 0x16814ea7 }, /* 0x14886231 */ + { XFER_UDMA_3, 0x16814ea7 }, /* 0x148c6231 */ + { XFER_UDMA_2, 0x16814ea7 }, /* 0x148c6231 */ + { XFER_UDMA_1, 0x16814ea7 }, /* 0x14906231 */ + { XFER_UDMA_0, 0x16814ea7 }, /* 0x14986231 */ + { XFER_MW_DMA_2, 0x16814ea7 }, /* 0x26514e21 */ + { XFER_MW_DMA_1, 0x16814ea7 }, /* 0x26514e97 */ + { XFER_MW_DMA_0, 0x16814ea7 }, /* 0x26514e97 */ + { XFER_PIO_4, 0x06814ea7 }, /* 0x06514e21 */ + { XFER_PIO_3, 0x06814ea7 }, /* 0x06514e22 */ + { XFER_PIO_2, 0x06814ea7 }, /* 0x06514e33 */ + { XFER_PIO_1, 0x06814ea7 }, /* 0x06914e43 */ + { XFER_PIO_0, 0x06814ea7 }, /* 0x06914e57 */ + { 0, 0x06814ea7 } +}; +#endif + +#define HPT366_DEBUG_DRIVE_INFO 0 +#define HPT374_ALLOW_ATA133_6 0 +#define HPT371_ALLOW_ATA133_6 0 +#define HPT302_ALLOW_ATA133_6 0 +#define HPT372_ALLOW_ATA133_6 1 +#define HPT370_ALLOW_ATA100_5 1 +#define HPT366_ALLOW_ATA66_4 1 +#define HPT366_ALLOW_ATA66_3 1 +#define HPT366_MAX_DEVS 8 + +#define F_LOW_PCI_33 0x23 +#define F_LOW_PCI_40 0x29 +#define F_LOW_PCI_50 0x2d +#define F_LOW_PCI_66 0x42 + +/* FIXME: compare with driver's code before removing */ +#if 0 if (hpt_minimum_revision(dev, 3)) { u8 cbl; cbl = inb(iobase + 0x7b); @@ -1273,6 +1648,64 @@ return ide_setup_pci_device(dev, d); } +static ide_pci_device_t hpt366_chipsets[] __devinitdata = { + { /* 0 */ + .name = "HPT366", + .init_setup = init_setup_hpt366, + .init_chipset = init_chipset_hpt366, + .init_hwif = init_hwif_hpt366, + .init_dma = init_dma_hpt366, + .channels = 2, + .autodma = AUTODMA, + .bootable = OFF_BOARD, + .extra = 240 + },{ /* 1 */ + .name = "HPT372A", + .init_setup = init_setup_hpt37x, + .init_chipset = init_chipset_hpt366, + .init_hwif = init_hwif_hpt366, + .init_dma = init_dma_hpt366, + .channels = 2, + .autodma = AUTODMA, + .bootable = OFF_BOARD, + },{ /* 2 */ + .name = "HPT302", + .init_setup = init_setup_hpt37x, + .init_chipset = init_chipset_hpt366, + .init_hwif = init_hwif_hpt366, + .init_dma = init_dma_hpt366, + .channels = 2, + .autodma = AUTODMA, + .bootable = OFF_BOARD, + },{ /* 3 */ + .name = "HPT371", + .init_setup = init_setup_hpt37x, + .init_chipset = init_chipset_hpt366, + .init_hwif = init_hwif_hpt366, + .init_dma = init_dma_hpt366, + .channels = 2, + .autodma = AUTODMA, + .bootable = OFF_BOARD, + },{ /* 4 */ + .name = "HPT374", + .init_setup = init_setup_hpt374, + .init_chipset = init_chipset_hpt366, + .init_hwif = init_hwif_hpt366, + .init_dma = init_dma_hpt366, + .channels = 2, /* 4 */ + .autodma = AUTODMA, + .bootable = OFF_BOARD, + },{ /* 5 */ + .name = "HPT372N", + .init_setup = init_setup_hpt37x, + .init_chipset = init_chipset_hpt366, + .init_hwif = init_hwif_hpt366, + .init_dma = init_dma_hpt366, + .channels = 2, /* 4 */ + .autodma = AUTODMA, + .bootable = OFF_BOARD, + } +}; /** * hpt366_init_one - called when an HPT366 is found diff -urN linux-2.6.11-rc3/drivers/ide/pci/hpt366.h linux-2.6.11-rc4/drivers/ide/pci/hpt366.h --- linux-2.6.11-rc3/drivers/ide/pci/hpt366.h 2005-02-12 19:50:37.531832830 -0800 +++ linux-2.6.11-rc4/drivers/ide/pci/hpt366.h 1969-12-31 16:00:00.000000000 -0800 @@ -1,483 +0,0 @@ -#ifndef HPT366_H -#define HPT366_H - -#include -#include -#include - -/* various tuning parameters */ -#define HPT_RESET_STATE_ENGINE -#undef HPT_DELAY_INTERRUPT -#undef HPT_SERIALIZE_IO - -static const char *quirk_drives[] = { - "QUANTUM FIREBALLlct08 08", - "QUANTUM FIREBALLP KA6.4", - "QUANTUM FIREBALLP LM20.4", - "QUANTUM FIREBALLP LM20.5", - NULL -}; - -static const char *bad_ata100_5[] = { - "IBM-DTLA-307075", - "IBM-DTLA-307060", - "IBM-DTLA-307045", - "IBM-DTLA-307030", - "IBM-DTLA-307020", - "IBM-DTLA-307015", - "IBM-DTLA-305040", - "IBM-DTLA-305030", - "IBM-DTLA-305020", - "IC35L010AVER07-0", - "IC35L020AVER07-0", - "IC35L030AVER07-0", - "IC35L040AVER07-0", - "IC35L060AVER07-0", - "WDC AC310200R", - NULL -}; - -static const char *bad_ata66_4[] = { - "IBM-DTLA-307075", - "IBM-DTLA-307060", - "IBM-DTLA-307045", - "IBM-DTLA-307030", - "IBM-DTLA-307020", - "IBM-DTLA-307015", - "IBM-DTLA-305040", - "IBM-DTLA-305030", - "IBM-DTLA-305020", - "IC35L010AVER07-0", - "IC35L020AVER07-0", - "IC35L030AVER07-0", - "IC35L040AVER07-0", - "IC35L060AVER07-0", - "WDC AC310200R", - NULL -}; - -static const char *bad_ata66_3[] = { - "WDC AC310200R", - NULL -}; - -static const char *bad_ata33[] = { - "Maxtor 92720U8", "Maxtor 92040U6", "Maxtor 91360U4", "Maxtor 91020U3", "Maxtor 90845U3", "Maxtor 90650U2", - "Maxtor 91360D8", "Maxtor 91190D7", "Maxtor 91020D6", "Maxtor 90845D5", "Maxtor 90680D4", "Maxtor 90510D3", "Maxtor 90340D2", - "Maxtor 91152D8", "Maxtor 91008D7", "Maxtor 90845D6", "Maxtor 90840D6", "Maxtor 90720D5", "Maxtor 90648D5", "Maxtor 90576D4", - "Maxtor 90510D4", - "Maxtor 90432D3", "Maxtor 90288D2", "Maxtor 90256D2", - "Maxtor 91000D8", "Maxtor 90910D8", "Maxtor 90875D7", "Maxtor 90840D7", "Maxtor 90750D6", "Maxtor 90625D5", "Maxtor 90500D4", - "Maxtor 91728D8", "Maxtor 91512D7", "Maxtor 91303D6", "Maxtor 91080D5", "Maxtor 90845D4", "Maxtor 90680D4", "Maxtor 90648D3", "Maxtor 90432D2", - NULL -}; - -struct chipset_bus_clock_list_entry { - byte xfer_speed; - unsigned int chipset_settings; -}; - -/* key for bus clock timings - * bit - * 0:3 data_high_time. inactive time of DIOW_/DIOR_ for PIO and MW - * DMA. cycles = value + 1 - * 4:8 data_low_time. active time of DIOW_/DIOR_ for PIO and MW - * DMA. cycles = value + 1 - * 9:12 cmd_high_time. inactive time of DIOW_/DIOR_ during task file - * register access. - * 13:17 cmd_low_time. active time of DIOW_/DIOR_ during task file - * register access. - * 18:21 udma_cycle_time. clock freq and clock cycles for UDMA xfer. - * during task file register access. - * 22:24 pre_high_time. time to initialize 1st cycle for PIO and MW DMA - * xfer. - * 25:27 cmd_pre_high_time. time to initialize 1st PIO cycle for task - * register access. - * 28 UDMA enable - * 29 DMA enable - * 30 PIO_MST enable. if set, the chip is in bus master mode during - * PIO. - * 31 FIFO enable. - */ -static struct chipset_bus_clock_list_entry forty_base_hpt366[] = { - { XFER_UDMA_4, 0x900fd943 }, - { XFER_UDMA_3, 0x900ad943 }, - { XFER_UDMA_2, 0x900bd943 }, - { XFER_UDMA_1, 0x9008d943 }, - { XFER_UDMA_0, 0x9008d943 }, - - { XFER_MW_DMA_2, 0xa008d943 }, - { XFER_MW_DMA_1, 0xa010d955 }, - { XFER_MW_DMA_0, 0xa010d9fc }, - - { XFER_PIO_4, 0xc008d963 }, - { XFER_PIO_3, 0xc010d974 }, - { XFER_PIO_2, 0xc010d997 }, - { XFER_PIO_1, 0xc010d9c7 }, - { XFER_PIO_0, 0xc018d9d9 }, - { 0, 0x0120d9d9 } -}; - -static struct chipset_bus_clock_list_entry thirty_three_base_hpt366[] = { - { XFER_UDMA_4, 0x90c9a731 }, - { XFER_UDMA_3, 0x90cfa731 }, - { XFER_UDMA_2, 0x90caa731 }, - { XFER_UDMA_1, 0x90cba731 }, - { XFER_UDMA_0, 0x90c8a731 }, - - { XFER_MW_DMA_2, 0xa0c8a731 }, - { XFER_MW_DMA_1, 0xa0c8a732 }, /* 0xa0c8a733 */ - { XFER_MW_DMA_0, 0xa0c8a797 }, - - { XFER_PIO_4, 0xc0c8a731 }, - { XFER_PIO_3, 0xc0c8a742 }, - { XFER_PIO_2, 0xc0d0a753 }, - { XFER_PIO_1, 0xc0d0a7a3 }, /* 0xc0d0a793 */ - { XFER_PIO_0, 0xc0d0a7aa }, /* 0xc0d0a7a7 */ - { 0, 0x0120a7a7 } -}; - -static struct chipset_bus_clock_list_entry twenty_five_base_hpt366[] = { - - { XFER_UDMA_4, 0x90c98521 }, - { XFER_UDMA_3, 0x90cf8521 }, - { XFER_UDMA_2, 0x90cf8521 }, - { XFER_UDMA_1, 0x90cb8521 }, - { XFER_UDMA_0, 0x90cb8521 }, - - { XFER_MW_DMA_2, 0xa0ca8521 }, - { XFER_MW_DMA_1, 0xa0ca8532 }, - { XFER_MW_DMA_0, 0xa0ca8575 }, - - { XFER_PIO_4, 0xc0ca8521 }, - { XFER_PIO_3, 0xc0ca8532 }, - { XFER_PIO_2, 0xc0ca8542 }, - { XFER_PIO_1, 0xc0d08572 }, - { XFER_PIO_0, 0xc0d08585 }, - { 0, 0x01208585 } -}; - -/* from highpoint documentation. these are old values */ -static struct chipset_bus_clock_list_entry thirty_three_base_hpt370[] = { -/* { XFER_UDMA_5, 0x1A85F442, 0x16454e31 }, */ - { XFER_UDMA_5, 0x16454e31 }, - { XFER_UDMA_4, 0x16454e31 }, - { XFER_UDMA_3, 0x166d4e31 }, - { XFER_UDMA_2, 0x16494e31 }, - { XFER_UDMA_1, 0x164d4e31 }, - { XFER_UDMA_0, 0x16514e31 }, - - { XFER_MW_DMA_2, 0x26514e21 }, - { XFER_MW_DMA_1, 0x26514e33 }, - { XFER_MW_DMA_0, 0x26514e97 }, - - { XFER_PIO_4, 0x06514e21 }, - { XFER_PIO_3, 0x06514e22 }, - { XFER_PIO_2, 0x06514e33 }, - { XFER_PIO_1, 0x06914e43 }, - { XFER_PIO_0, 0x06914e57 }, - { 0, 0x06514e57 } -}; - -static struct chipset_bus_clock_list_entry sixty_six_base_hpt370[] = { - { XFER_UDMA_5, 0x14846231 }, - { XFER_UDMA_4, 0x14886231 }, - { XFER_UDMA_3, 0x148c6231 }, - { XFER_UDMA_2, 0x148c6231 }, - { XFER_UDMA_1, 0x14906231 }, - { XFER_UDMA_0, 0x14986231 }, - - { XFER_MW_DMA_2, 0x26514e21 }, - { XFER_MW_DMA_1, 0x26514e33 }, - { XFER_MW_DMA_0, 0x26514e97 }, - - { XFER_PIO_4, 0x06514e21 }, - { XFER_PIO_3, 0x06514e22 }, - { XFER_PIO_2, 0x06514e33 }, - { XFER_PIO_1, 0x06914e43 }, - { XFER_PIO_0, 0x06914e57 }, - { 0, 0x06514e57 } -}; - -/* these are the current (4 sep 2001) timings from highpoint */ -static struct chipset_bus_clock_list_entry thirty_three_base_hpt370a[] = { - { XFER_UDMA_5, 0x12446231 }, - { XFER_UDMA_4, 0x12446231 }, - { XFER_UDMA_3, 0x126c6231 }, - { XFER_UDMA_2, 0x12486231 }, - { XFER_UDMA_1, 0x124c6233 }, - { XFER_UDMA_0, 0x12506297 }, - - { XFER_MW_DMA_2, 0x22406c31 }, - { XFER_MW_DMA_1, 0x22406c33 }, - { XFER_MW_DMA_0, 0x22406c97 }, - - { XFER_PIO_4, 0x06414e31 }, - { XFER_PIO_3, 0x06414e42 }, - { XFER_PIO_2, 0x06414e53 }, - { XFER_PIO_1, 0x06814e93 }, - { XFER_PIO_0, 0x06814ea7 }, - { 0, 0x06814ea7 } -}; - -/* 2x 33MHz timings */ -static struct chipset_bus_clock_list_entry sixty_six_base_hpt370a[] = { - { XFER_UDMA_5, 0x1488e673 }, - { XFER_UDMA_4, 0x1488e673 }, - { XFER_UDMA_3, 0x1498e673 }, - { XFER_UDMA_2, 0x1490e673 }, - { XFER_UDMA_1, 0x1498e677 }, - { XFER_UDMA_0, 0x14a0e73f }, - - { XFER_MW_DMA_2, 0x2480fa73 }, - { XFER_MW_DMA_1, 0x2480fa77 }, - { XFER_MW_DMA_0, 0x2480fb3f }, - - { XFER_PIO_4, 0x0c82be73 }, - { XFER_PIO_3, 0x0c82be95 }, - { XFER_PIO_2, 0x0c82beb7 }, - { XFER_PIO_1, 0x0d02bf37 }, - { XFER_PIO_0, 0x0d02bf5f }, - { 0, 0x0d02bf5f } -}; - -static struct chipset_bus_clock_list_entry fifty_base_hpt370a[] = { - { XFER_UDMA_5, 0x12848242 }, - { XFER_UDMA_4, 0x12ac8242 }, - { XFER_UDMA_3, 0x128c8242 }, - { XFER_UDMA_2, 0x120c8242 }, - { XFER_UDMA_1, 0x12148254 }, - { XFER_UDMA_0, 0x121882ea }, - - { XFER_MW_DMA_2, 0x22808242 }, - { XFER_MW_DMA_1, 0x22808254 }, - { XFER_MW_DMA_0, 0x228082ea }, - - { XFER_PIO_4, 0x0a81f442 }, - { XFER_PIO_3, 0x0a81f443 }, - { XFER_PIO_2, 0x0a81f454 }, - { XFER_PIO_1, 0x0ac1f465 }, - { XFER_PIO_0, 0x0ac1f48a }, - { 0, 0x0ac1f48a } -}; - -static struct chipset_bus_clock_list_entry thirty_three_base_hpt372[] = { - { XFER_UDMA_6, 0x1c81dc62 }, - { XFER_UDMA_5, 0x1c6ddc62 }, - { XFER_UDMA_4, 0x1c8ddc62 }, - { XFER_UDMA_3, 0x1c8edc62 }, /* checkme */ - { XFER_UDMA_2, 0x1c91dc62 }, - { XFER_UDMA_1, 0x1c9adc62 }, /* checkme */ - { XFER_UDMA_0, 0x1c82dc62 }, /* checkme */ - - { XFER_MW_DMA_2, 0x2c829262 }, - { XFER_MW_DMA_1, 0x2c829266 }, /* checkme */ - { XFER_MW_DMA_0, 0x2c82922e }, /* checkme */ - - { XFER_PIO_4, 0x0c829c62 }, - { XFER_PIO_3, 0x0c829c84 }, - { XFER_PIO_2, 0x0c829ca6 }, - { XFER_PIO_1, 0x0d029d26 }, - { XFER_PIO_0, 0x0d029d5e }, - { 0, 0x0d029d5e } -}; - -static struct chipset_bus_clock_list_entry fifty_base_hpt372[] = { - { XFER_UDMA_5, 0x12848242 }, - { XFER_UDMA_4, 0x12ac8242 }, - { XFER_UDMA_3, 0x128c8242 }, - { XFER_UDMA_2, 0x120c8242 }, - { XFER_UDMA_1, 0x12148254 }, - { XFER_UDMA_0, 0x121882ea }, - - { XFER_MW_DMA_2, 0x22808242 }, - { XFER_MW_DMA_1, 0x22808254 }, - { XFER_MW_DMA_0, 0x228082ea }, - - { XFER_PIO_4, 0x0a81f442 }, - { XFER_PIO_3, 0x0a81f443 }, - { XFER_PIO_2, 0x0a81f454 }, - { XFER_PIO_1, 0x0ac1f465 }, - { XFER_PIO_0, 0x0ac1f48a }, - { 0, 0x0a81f443 } -}; - -static struct chipset_bus_clock_list_entry sixty_six_base_hpt372[] = { - { XFER_UDMA_6, 0x1c869c62 }, - { XFER_UDMA_5, 0x1cae9c62 }, - { XFER_UDMA_4, 0x1c8a9c62 }, - { XFER_UDMA_3, 0x1c8e9c62 }, - { XFER_UDMA_2, 0x1c929c62 }, - { XFER_UDMA_1, 0x1c9a9c62 }, - { XFER_UDMA_0, 0x1c829c62 }, - - { XFER_MW_DMA_2, 0x2c829c62 }, - { XFER_MW_DMA_1, 0x2c829c66 }, - { XFER_MW_DMA_0, 0x2c829d2e }, - - { XFER_PIO_4, 0x0c829c62 }, - { XFER_PIO_3, 0x0c829c84 }, - { XFER_PIO_2, 0x0c829ca6 }, - { XFER_PIO_1, 0x0d029d26 }, - { XFER_PIO_0, 0x0d029d5e }, - { 0, 0x0d029d26 } -}; - -static struct chipset_bus_clock_list_entry thirty_three_base_hpt374[] = { - { XFER_UDMA_6, 0x12808242 }, - { XFER_UDMA_5, 0x12848242 }, - { XFER_UDMA_4, 0x12ac8242 }, - { XFER_UDMA_3, 0x128c8242 }, - { XFER_UDMA_2, 0x120c8242 }, - { XFER_UDMA_1, 0x12148254 }, - { XFER_UDMA_0, 0x121882ea }, - - { XFER_MW_DMA_2, 0x22808242 }, - { XFER_MW_DMA_1, 0x22808254 }, - { XFER_MW_DMA_0, 0x228082ea }, - - { XFER_PIO_4, 0x0a81f442 }, - { XFER_PIO_3, 0x0a81f443 }, - { XFER_PIO_2, 0x0a81f454 }, - { XFER_PIO_1, 0x0ac1f465 }, - { XFER_PIO_0, 0x0ac1f48a }, - { 0, 0x06814e93 } -}; - -#if 0 -static struct chipset_bus_clock_list_entry fifty_base_hpt374[] = { - { XFER_UDMA_6, }, - { XFER_UDMA_5, }, - { XFER_UDMA_4, }, - { XFER_UDMA_3, }, - { XFER_UDMA_2, }, - { XFER_UDMA_1, }, - { XFER_UDMA_0, }, - { XFER_MW_DMA_2, }, - { XFER_MW_DMA_1, }, - { XFER_MW_DMA_0, }, - { XFER_PIO_4, }, - { XFER_PIO_3, }, - { XFER_PIO_2, }, - { XFER_PIO_1, }, - { XFER_PIO_0, }, - { 0, } -}; -#endif -#if 0 -static struct chipset_bus_clock_list_entry sixty_six_base_hpt374[] = { - { XFER_UDMA_6, 0x12406231 }, /* checkme */ - { XFER_UDMA_5, 0x12446231 }, - 0x14846231 - { XFER_UDMA_4, 0x16814ea7 }, - 0x14886231 - { XFER_UDMA_3, 0x16814ea7 }, - 0x148c6231 - { XFER_UDMA_2, 0x16814ea7 }, - 0x148c6231 - { XFER_UDMA_1, 0x16814ea7 }, - 0x14906231 - { XFER_UDMA_0, 0x16814ea7 }, - 0x14986231 - { XFER_MW_DMA_2, 0x16814ea7 }, - 0x26514e21 - { XFER_MW_DMA_1, 0x16814ea7 }, - 0x26514e97 - { XFER_MW_DMA_0, 0x16814ea7 }, - 0x26514e97 - { XFER_PIO_4, 0x06814ea7 }, - 0x06514e21 - { XFER_PIO_3, 0x06814ea7 }, - 0x06514e22 - { XFER_PIO_2, 0x06814ea7 }, - 0x06514e33 - { XFER_PIO_1, 0x06814ea7 }, - 0x06914e43 - { XFER_PIO_0, 0x06814ea7 }, - 0x06914e57 - { 0, 0x06814ea7 } -}; -#endif - -#define HPT366_DEBUG_DRIVE_INFO 0 -#define HPT374_ALLOW_ATA133_6 0 -#define HPT371_ALLOW_ATA133_6 0 -#define HPT302_ALLOW_ATA133_6 0 -#define HPT372_ALLOW_ATA133_6 1 -#define HPT370_ALLOW_ATA100_5 1 -#define HPT366_ALLOW_ATA66_4 1 -#define HPT366_ALLOW_ATA66_3 1 -#define HPT366_MAX_DEVS 8 - -#define F_LOW_PCI_33 0x23 -#define F_LOW_PCI_40 0x29 -#define F_LOW_PCI_50 0x2d -#define F_LOW_PCI_66 0x42 - -static int init_setup_hpt366(struct pci_dev *, ide_pci_device_t *); -static int init_setup_hpt37x(struct pci_dev *, ide_pci_device_t *); -static int init_setup_hpt374(struct pci_dev *, ide_pci_device_t *); -static unsigned int init_chipset_hpt366(struct pci_dev *, const char *); -static void init_hwif_hpt366(ide_hwif_t *); -static void init_dma_hpt366(ide_hwif_t *, unsigned long); - -static ide_pci_device_t hpt366_chipsets[] __devinitdata = { - { /* 0 */ - .name = "HPT366", - .init_setup = init_setup_hpt366, - .init_chipset = init_chipset_hpt366, - .init_hwif = init_hwif_hpt366, - .init_dma = init_dma_hpt366, - .channels = 2, - .autodma = AUTODMA, - .bootable = OFF_BOARD, - .extra = 240 - },{ /* 1 */ - .name = "HPT372A", - .init_setup = init_setup_hpt37x, - .init_chipset = init_chipset_hpt366, - .init_hwif = init_hwif_hpt366, - .init_dma = init_dma_hpt366, - .channels = 2, - .autodma = AUTODMA, - .bootable = OFF_BOARD, - },{ /* 2 */ - .name = "HPT302", - .init_setup = init_setup_hpt37x, - .init_chipset = init_chipset_hpt366, - .init_hwif = init_hwif_hpt366, - .init_dma = init_dma_hpt366, - .channels = 2, - .autodma = AUTODMA, - .bootable = OFF_BOARD, - },{ /* 3 */ - .name = "HPT371", - .init_setup = init_setup_hpt37x, - .init_chipset = init_chipset_hpt366, - .init_hwif = init_hwif_hpt366, - .init_dma = init_dma_hpt366, - .channels = 2, - .autodma = AUTODMA, - .bootable = OFF_BOARD, - },{ /* 4 */ - .name = "HPT374", - .init_setup = init_setup_hpt374, - .init_chipset = init_chipset_hpt366, - .init_hwif = init_hwif_hpt366, - .init_dma = init_dma_hpt366, - .channels = 2, /* 4 */ - .autodma = AUTODMA, - .bootable = OFF_BOARD, - },{ /* 5 */ - .name = "HPT372N", - .init_setup = init_setup_hpt37x, - .init_chipset = init_chipset_hpt366, - .init_hwif = init_hwif_hpt366, - .init_dma = init_dma_hpt366, - .channels = 2, /* 4 */ - .autodma = AUTODMA, - .bootable = OFF_BOARD, - } -}; - -#endif /* HPT366_H */ diff -urN linux-2.6.11-rc3/drivers/ide/pci/it8172.c linux-2.6.11-rc4/drivers/ide/pci/it8172.c --- linux-2.6.11-rc3/drivers/ide/pci/it8172.c 2005-02-12 19:50:37.531832830 -0800 +++ linux-2.6.11-rc4/drivers/ide/pci/it8172.c 2005-02-12 19:50:56.155639093 -0800 @@ -42,8 +42,6 @@ #include #include -#include "it8172.h" - /* * Prototypes */ @@ -56,7 +54,7 @@ { ide_hwif_t *hwif = HWIF(drive); struct pci_dev *dev = hwif->pci_dev; - int is_slave = (hwif->drives[1] == drive); + int is_slave = (&hwif->drives[1] == drive); unsigned long flags; u16 drive_enables; u32 drive_timing; @@ -94,7 +92,7 @@ } pci_write_config_word(dev, 0x40, drive_enables); - spin_unlock_irqrestore(&ide_lock, flags) + spin_unlock_irqrestore(&ide_lock, flags); } static u8 it8172_dma_2_pio (u8 xfer_rate) @@ -266,6 +264,18 @@ hwif->drives[1].autodma = hwif->autodma; } +static ide_pci_device_t it8172_chipsets[] __devinitdata = { + { /* 0 */ + .name = "IT8172G", + .init_chipset = init_chipset_it8172, + .init_hwif = init_hwif_it8172, + .channels = 2, + .autodma = AUTODMA, + .enablebits = {{0x00,0x00,0x00}, {0x40,0x00,0x01}}, + .bootable = ON_BOARD, + } +}; + static int __devinit it8172_init_one(struct pci_dev *dev, const struct pci_device_id *id) { if ((!(PCI_FUNC(dev->devfn) & 1) || diff -urN linux-2.6.11-rc3/drivers/ide/pci/it8172.h linux-2.6.11-rc4/drivers/ide/pci/it8172.h --- linux-2.6.11-rc3/drivers/ide/pci/it8172.h 2004-12-24 13:34:32.000000000 -0800 +++ linux-2.6.11-rc4/drivers/ide/pci/it8172.h 1969-12-31 16:00:00.000000000 -0800 @@ -1,34 +0,0 @@ -#ifndef ITE8172G_H -#define ITE8172G_H - -#include -#include -#include - -static u8 it8172_ratemask(ide_drive_t *drive); -static u8 it8172_ratefilter(ide_drive_t *drive, u8 speed); -static void it8172_tune_drive(ide_drive_t *drive, u8 pio); -static u8 it8172_dma_2_pio(u8 xfer_rate); -static int it8172_tune_chipset(ide_drive_t *drive, u8 xferspeed); -#ifdef CONFIG_BLK_DEV_IDEDMA -static int it8172_config_chipset_for_dma(ide_drive_t *drive); -#endif - -static void init_setup_it8172(struct pci_dev *, ide_pci_device_t *); -static unsigned int init_chipset_it8172(struct pci_dev *, const char *); -static void init_hwif_it8172(ide_hwif_t *); - -static ide_pci_device_t it8172_chipsets[] __devinitdata = { - { /* 0 */ - .name = "IT8172G", - .init_setup = init_setup_it8172, - .init_chipset = init_chipset_it8172, - .init_hwif = init_hwif_it8172, - .channels = 2, - .autodma = AUTODMA, - .enablebits = {{0x00,0x00,0x00}, {0x40,0x00,0x01}}, - .bootable = ON_BOARD, - } -}; - -#endif /* ITE8172G_H */ diff -urN linux-2.6.11-rc3/drivers/ide/pci/opti621.c linux-2.6.11-rc4/drivers/ide/pci/opti621.c --- linux-2.6.11-rc3/drivers/ide/pci/opti621.c 2005-02-12 19:50:37.532832873 -0800 +++ linux-2.6.11-rc4/drivers/ide/pci/opti621.c 2005-02-12 19:50:56.158639223 -0800 @@ -104,8 +104,6 @@ #include -#include "opti621.h" - #define OPTI621_MAX_PIO 3 /* In fact, I do not have any PIO 4 drive * (address: 25 ns, data: 70 ns, recovery: 35 ns), @@ -348,10 +346,23 @@ hwif->drives[1].autodma = hwif->autodma; } -static int __init init_setup_opti621 (struct pci_dev *dev, ide_pci_device_t *d) -{ - return ide_setup_pci_device(dev, d); -} +static ide_pci_device_t opti621_chipsets[] __devinitdata = { + { /* 0 */ + .name = "OPTI621", + .init_hwif = init_hwif_opti621, + .channels = 2, + .autodma = AUTODMA, + .enablebits = {{0x45,0x80,0x00}, {0x40,0x08,0x00}}, + .bootable = ON_BOARD, + },{ /* 1 */ + .name = "OPTI621X", + .init_hwif = init_hwif_opti621, + .channels = 2, + .autodma = AUTODMA, + .enablebits = {{0x45,0x80,0x00}, {0x40,0x08,0x00}}, + .bootable = ON_BOARD, + } +}; static int __devinit opti621_init_one(struct pci_dev *dev, const struct pci_device_id *id) { diff -urN linux-2.6.11-rc3/drivers/ide/pci/opti621.h linux-2.6.11-rc4/drivers/ide/pci/opti621.h --- linux-2.6.11-rc3/drivers/ide/pci/opti621.h 2005-02-12 19:50:37.533832916 -0800 +++ linux-2.6.11-rc4/drivers/ide/pci/opti621.h 1969-12-31 16:00:00.000000000 -0800 @@ -1,31 +0,0 @@ -#ifndef OPTI621_H -#define OPTI621_H - -#include -#include -#include - -static int init_setup_opti621(struct pci_dev *, ide_pci_device_t *); -static void init_hwif_opti621(ide_hwif_t *); - -static ide_pci_device_t opti621_chipsets[] __devinitdata = { - { /* 0 */ - .name = "OPTI621", - .init_setup = init_setup_opti621, - .init_hwif = init_hwif_opti621, - .channels = 2, - .autodma = AUTODMA, - .enablebits = {{0x45,0x80,0x00}, {0x40,0x08,0x00}}, - .bootable = ON_BOARD, - },{ /* 1 */ - .name = "OPTI621X", - .init_setup = init_setup_opti621, - .init_hwif = init_hwif_opti621, - .channels = 2, - .autodma = AUTODMA, - .enablebits = {{0x45,0x80,0x00}, {0x40,0x08,0x00}}, - .bootable = ON_BOARD, - } -}; - -#endif /* OPTI621_H */ diff -urN linux-2.6.11-rc3/drivers/ide/pci/pdc202xx_new.c linux-2.6.11-rc4/drivers/ide/pci/pdc202xx_new.c --- linux-2.6.11-rc3/drivers/ide/pci/pdc202xx_new.c 2005-02-12 19:50:37.534832960 -0800 +++ linux-2.6.11-rc4/drivers/ide/pci/pdc202xx_new.c 2005-02-12 19:50:56.160639309 -0800 @@ -37,10 +37,46 @@ #include #endif -#include "pdc202xx_new.h" - #define PDC202_DEBUG_CABLE 0 +const static char *pdc_quirk_drives[] = { + "QUANTUM FIREBALLlct08 08", + "QUANTUM FIREBALLP KA6.4", + "QUANTUM FIREBALLP KA9.1", + "QUANTUM FIREBALLP LM20.4", + "QUANTUM FIREBALLP KX13.6", + "QUANTUM FIREBALLP KX20.5", + "QUANTUM FIREBALLP KX27.3", + "QUANTUM FIREBALLP LM20.5", + NULL +}; + +#define set_2regs(a, b) \ + do { \ + hwif->OUTB((a + adj), indexreg); \ + hwif->OUTB(b, datareg); \ + } while(0) + +#define set_ultra(a, b, c) \ + do { \ + set_2regs(0x10,(a)); \ + set_2regs(0x11,(b)); \ + set_2regs(0x12,(c)); \ + } while(0) + +#define set_ata2(a, b) \ + do { \ + set_2regs(0x0e,(a)); \ + set_2regs(0x0f,(b)); \ + } while(0) + +#define set_pio(a, b, c) \ + do { \ + set_2regs(0x0c,(a)); \ + set_2regs(0x0d,(b)); \ + set_2regs(0x13,(c)); \ + } while(0) + static u8 pdcnew_ratemask (ide_drive_t *drive) { u8 mode; @@ -360,6 +396,72 @@ return ide_setup_pci_device(dev, d); } +static ide_pci_device_t pdcnew_chipsets[] __devinitdata = { + { /* 0 */ + .name = "PDC20268", + .init_setup = init_setup_pdcnew, + .init_chipset = init_chipset_pdcnew, + .init_hwif = init_hwif_pdc202new, + .channels = 2, + .autodma = AUTODMA, + .bootable = OFF_BOARD, + },{ /* 1 */ + .name = "PDC20269", + .init_setup = init_setup_pdcnew, + .init_chipset = init_chipset_pdcnew, + .init_hwif = init_hwif_pdc202new, + .channels = 2, + .autodma = AUTODMA, + .bootable = OFF_BOARD, + },{ /* 2 */ + .name = "PDC20270", + .init_setup = init_setup_pdc20270, + .init_chipset = init_chipset_pdcnew, + .init_hwif = init_hwif_pdc202new, + .channels = 2, + .autodma = AUTODMA, +#ifndef CONFIG_PDC202XX_FORCE + .enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}}, +#endif + .bootable = OFF_BOARD, + },{ /* 3 */ + .name = "PDC20271", + .init_setup = init_setup_pdcnew, + .init_chipset = init_chipset_pdcnew, + .init_hwif = init_hwif_pdc202new, + .channels = 2, + .autodma = AUTODMA, + .bootable = OFF_BOARD, + },{ /* 4 */ + .name = "PDC20275", + .init_setup = init_setup_pdcnew, + .init_chipset = init_chipset_pdcnew, + .init_hwif = init_hwif_pdc202new, + .channels = 2, + .autodma = AUTODMA, + .bootable = OFF_BOARD, + },{ /* 5 */ + .name = "PDC20276", + .init_setup = init_setup_pdc20276, + .init_chipset = init_chipset_pdcnew, + .init_hwif = init_hwif_pdc202new, + .channels = 2, + .autodma = AUTODMA, +#ifndef CONFIG_PDC202XX_FORCE + .enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}}, +#endif + .bootable = OFF_BOARD, + },{ /* 6 */ + .name = "PDC20277", + .init_setup = init_setup_pdcnew, + .init_chipset = init_chipset_pdcnew, + .init_hwif = init_hwif_pdc202new, + .channels = 2, + .autodma = AUTODMA, + .bootable = OFF_BOARD, + } +}; + /** * pdc202new_init_one - called when a pdc202xx is found * @dev: the pdc202new device diff -urN linux-2.6.11-rc3/drivers/ide/pci/pdc202xx_new.h linux-2.6.11-rc4/drivers/ide/pci/pdc202xx_new.h --- linux-2.6.11-rc3/drivers/ide/pci/pdc202xx_new.h 2005-02-12 19:50:37.534832960 -0800 +++ linux-2.6.11-rc4/drivers/ide/pci/pdc202xx_new.h 1969-12-31 16:00:00.000000000 -0800 @@ -1,118 +0,0 @@ -#ifndef PDC202XX_H -#define PDC202XX_H - -#include -#include -#include - -const static char *pdc_quirk_drives[] = { - "QUANTUM FIREBALLlct08 08", - "QUANTUM FIREBALLP KA6.4", - "QUANTUM FIREBALLP KA9.1", - "QUANTUM FIREBALLP LM20.4", - "QUANTUM FIREBALLP KX13.6", - "QUANTUM FIREBALLP KX20.5", - "QUANTUM FIREBALLP KX27.3", - "QUANTUM FIREBALLP LM20.5", - NULL -}; - -#define set_2regs(a, b) \ - do { \ - hwif->OUTB((a + adj), indexreg); \ - hwif->OUTB(b, datareg); \ - } while(0) - -#define set_ultra(a, b, c) \ - do { \ - set_2regs(0x10,(a)); \ - set_2regs(0x11,(b)); \ - set_2regs(0x12,(c)); \ - } while(0) - -#define set_ata2(a, b) \ - do { \ - set_2regs(0x0e,(a)); \ - set_2regs(0x0f,(b)); \ - } while(0) - -#define set_pio(a, b, c) \ - do { \ - set_2regs(0x0c,(a)); \ - set_2regs(0x0d,(b)); \ - set_2regs(0x13,(c)); \ - } while(0) - -static int init_setup_pdcnew(struct pci_dev *, ide_pci_device_t *); -static int init_setup_pdc20270(struct pci_dev *, ide_pci_device_t *); -static int init_setup_pdc20276(struct pci_dev *dev, ide_pci_device_t *d); -static unsigned int init_chipset_pdcnew(struct pci_dev *, const char *); -static void init_hwif_pdc202new(ide_hwif_t *); - -static ide_pci_device_t pdcnew_chipsets[] __devinitdata = { - { /* 0 */ - .name = "PDC20268", - .init_setup = init_setup_pdcnew, - .init_chipset = init_chipset_pdcnew, - .init_hwif = init_hwif_pdc202new, - .channels = 2, - .autodma = AUTODMA, - .bootable = OFF_BOARD, - },{ /* 1 */ - .name = "PDC20269", - .init_setup = init_setup_pdcnew, - .init_chipset = init_chipset_pdcnew, - .init_hwif = init_hwif_pdc202new, - .channels = 2, - .autodma = AUTODMA, - .bootable = OFF_BOARD, - },{ /* 2 */ - .name = "PDC20270", - .init_setup = init_setup_pdc20270, - .init_chipset = init_chipset_pdcnew, - .init_hwif = init_hwif_pdc202new, - .channels = 2, - .autodma = AUTODMA, -#ifndef CONFIG_PDC202XX_FORCE - .enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}}, -#endif - .bootable = OFF_BOARD, - },{ /* 3 */ - .name = "PDC20271", - .init_setup = init_setup_pdcnew, - .init_chipset = init_chipset_pdcnew, - .init_hwif = init_hwif_pdc202new, - .channels = 2, - .autodma = AUTODMA, - .bootable = OFF_BOARD, - },{ /* 4 */ - .name = "PDC20275", - .init_setup = init_setup_pdcnew, - .init_chipset = init_chipset_pdcnew, - .init_hwif = init_hwif_pdc202new, - .channels = 2, - .autodma = AUTODMA, - .bootable = OFF_BOARD, - },{ /* 5 */ - .name = "PDC20276", - .init_setup = init_setup_pdc20276, - .init_chipset = init_chipset_pdcnew, - .init_hwif = init_hwif_pdc202new, - .channels = 2, - .autodma = AUTODMA, -#ifndef CONFIG_PDC202XX_FORCE - .enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}}, -#endif - .bootable = OFF_BOARD, - },{ /* 6 */ - .name = "PDC20277", - .init_setup = init_setup_pdcnew, - .init_chipset = init_chipset_pdcnew, - .init_hwif = init_hwif_pdc202new, - .channels = 2, - .autodma = AUTODMA, - .bootable = OFF_BOARD, - } -}; - -#endif /* PDC202XX_H */ diff -urN linux-2.6.11-rc3/drivers/ide/pci/pdc202xx_old.c linux-2.6.11-rc4/drivers/ide/pci/pdc202xx_old.c --- linux-2.6.11-rc3/drivers/ide/pci/pdc202xx_old.c 2005-02-12 19:50:37.535833003 -0800 +++ linux-2.6.11-rc4/drivers/ide/pci/pdc202xx_old.c 2005-02-12 19:50:56.164639482 -0800 @@ -46,9 +46,60 @@ #include #include -#include "pdc202xx_old.h" +#define PDC202_DEBUG_CABLE 0 +#define PDC202XX_DEBUG_DRIVE_INFO 0 -#define PDC202_DEBUG_CABLE 0 +static const char *pdc_quirk_drives[] = { + "QUANTUM FIREBALLlct08 08", + "QUANTUM FIREBALLP KA6.4", + "QUANTUM FIREBALLP KA9.1", + "QUANTUM FIREBALLP LM20.4", + "QUANTUM FIREBALLP KX13.6", + "QUANTUM FIREBALLP KX20.5", + "QUANTUM FIREBALLP KX27.3", + "QUANTUM FIREBALLP LM20.5", + NULL +}; + +/* A Register */ +#define SYNC_ERRDY_EN 0xC0 + +#define SYNC_IN 0x80 /* control bit, different for master vs. slave drives */ +#define ERRDY_EN 0x40 /* control bit, different for master vs. slave drives */ +#define IORDY_EN 0x20 /* PIO: IOREADY */ +#define PREFETCH_EN 0x10 /* PIO: PREFETCH */ + +#define PA3 0x08 /* PIO"A" timing */ +#define PA2 0x04 /* PIO"A" timing */ +#define PA1 0x02 /* PIO"A" timing */ +#define PA0 0x01 /* PIO"A" timing */ + +/* B Register */ + +#define MB2 0x80 /* DMA"B" timing */ +#define MB1 0x40 /* DMA"B" timing */ +#define MB0 0x20 /* DMA"B" timing */ + +#define PB4 0x10 /* PIO_FORCE 1:0 */ + +#define PB3 0x08 /* PIO"B" timing */ /* PIO flow Control mode */ +#define PB2 0x04 /* PIO"B" timing */ /* PIO 4 */ +#define PB1 0x02 /* PIO"B" timing */ /* PIO 3 half */ +#define PB0 0x01 /* PIO"B" timing */ /* PIO 3 other half */ + +/* C Register */ +#define IORDYp_NO_SPEED 0x4F +#define SPEED_DIS 0x0F + +#define DMARQp 0x80 +#define IORDYp 0x40 +#define DMAR_EN 0x20 +#define DMAW_EN 0x10 + +#define MC3 0x08 /* DMA"C" timing */ +#define MC2 0x04 /* DMA"C" timing */ +#define MC1 0x02 /* DMA"C" timing */ +#define MC0 0x01 /* DMA"C" timing */ #if 0 unsigned long bibma = pci_resource_start(dev, 4); @@ -69,7 +120,8 @@ ((sc1c & 0x02) == 0x02) ? "8" : ((sc1c & 0x01) == 0x01) ? "6" : ((sc1c & 0x00) == 0x00) ? "4" : "??"); - SPLIT_BYTE(sc1e, hi, lo); + hi = sc1e >> 4; + lo = sc1e & 0xf; p += sprintf(p, "Status Polling Period : %d\n", hi); p += sprintf(p, "Interrupt Check Status Polling Delay : %d\n", lo); #endif @@ -725,6 +777,77 @@ return ide_setup_pci_device(dev, d); } +static ide_pci_device_t pdc202xx_chipsets[] __devinitdata = { + { /* 0 */ + .name = "PDC20246", + .init_setup = init_setup_pdc202ata4, + .init_chipset = init_chipset_pdc202xx, + .init_hwif = init_hwif_pdc202xx, + .init_dma = init_dma_pdc202xx, + .channels = 2, + .autodma = AUTODMA, +#ifndef CONFIG_PDC202XX_FORCE + .enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}}, +#endif + .bootable = OFF_BOARD, + .extra = 16, + },{ /* 1 */ + .name = "PDC20262", + .init_setup = init_setup_pdc202ata4, + .init_chipset = init_chipset_pdc202xx, + .init_hwif = init_hwif_pdc202xx, + .init_dma = init_dma_pdc202xx, + .channels = 2, + .autodma = AUTODMA, +#ifndef CONFIG_PDC202XX_FORCE + .enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}}, +#endif + .bootable = OFF_BOARD, + .extra = 48, + .flags = IDEPCI_FLAG_FORCE_PDC, + },{ /* 2 */ + .name = "PDC20263", + .init_setup = init_setup_pdc202ata4, + .init_chipset = init_chipset_pdc202xx, + .init_hwif = init_hwif_pdc202xx, + .init_dma = init_dma_pdc202xx, + .channels = 2, + .autodma = AUTODMA, +#ifndef CONFIG_PDC202XX_FORCE + .enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}}, +#endif + .bootable = OFF_BOARD, + .extra = 48, + },{ /* 3 */ + .name = "PDC20265", + .init_setup = init_setup_pdc20265, + .init_chipset = init_chipset_pdc202xx, + .init_hwif = init_hwif_pdc202xx, + .init_dma = init_dma_pdc202xx, + .channels = 2, + .autodma = AUTODMA, +#ifndef CONFIG_PDC202XX_FORCE + .enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}}, +#endif + .bootable = OFF_BOARD, + .extra = 48, + .flags = IDEPCI_FLAG_FORCE_PDC, + },{ /* 4 */ + .name = "PDC20267", + .init_setup = init_setup_pdc202xx, + .init_chipset = init_chipset_pdc202xx, + .init_hwif = init_hwif_pdc202xx, + .init_dma = init_dma_pdc202xx, + .channels = 2, + .autodma = AUTODMA, +#ifndef CONFIG_PDC202XX_FORCE + .enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}}, +#endif + .bootable = OFF_BOARD, + .extra = 48, + } +}; + /** * pdc202xx_init_one - called when a PDC202xx is found * @dev: the pdc202xx device diff -urN linux-2.6.11-rc3/drivers/ide/pci/pdc202xx_old.h linux-2.6.11-rc4/drivers/ide/pci/pdc202xx_old.h --- linux-2.6.11-rc3/drivers/ide/pci/pdc202xx_old.h 2005-02-12 19:50:37.535833003 -0800 +++ linux-2.6.11-rc4/drivers/ide/pci/pdc202xx_old.h 1969-12-31 16:00:00.000000000 -0800 @@ -1,144 +0,0 @@ -#ifndef PDC202XX_H -#define PDC202XX_H - -#include -#include -#include - -#ifndef SPLIT_BYTE -#define SPLIT_BYTE(B,H,L) ((H)=(B>>4), (L)=(B-((B>>4)<<4))) -#endif - -#define PDC202XX_DEBUG_DRIVE_INFO 0 - -static const char *pdc_quirk_drives[] = { - "QUANTUM FIREBALLlct08 08", - "QUANTUM FIREBALLP KA6.4", - "QUANTUM FIREBALLP KA9.1", - "QUANTUM FIREBALLP LM20.4", - "QUANTUM FIREBALLP KX13.6", - "QUANTUM FIREBALLP KX20.5", - "QUANTUM FIREBALLP KX27.3", - "QUANTUM FIREBALLP LM20.5", - NULL -}; - -/* A Register */ -#define SYNC_ERRDY_EN 0xC0 - -#define SYNC_IN 0x80 /* control bit, different for master vs. slave drives */ -#define ERRDY_EN 0x40 /* control bit, different for master vs. slave drives */ -#define IORDY_EN 0x20 /* PIO: IOREADY */ -#define PREFETCH_EN 0x10 /* PIO: PREFETCH */ - -#define PA3 0x08 /* PIO"A" timing */ -#define PA2 0x04 /* PIO"A" timing */ -#define PA1 0x02 /* PIO"A" timing */ -#define PA0 0x01 /* PIO"A" timing */ - -/* B Register */ - -#define MB2 0x80 /* DMA"B" timing */ -#define MB1 0x40 /* DMA"B" timing */ -#define MB0 0x20 /* DMA"B" timing */ - -#define PB4 0x10 /* PIO_FORCE 1:0 */ - -#define PB3 0x08 /* PIO"B" timing */ /* PIO flow Control mode */ -#define PB2 0x04 /* PIO"B" timing */ /* PIO 4 */ -#define PB1 0x02 /* PIO"B" timing */ /* PIO 3 half */ -#define PB0 0x01 /* PIO"B" timing */ /* PIO 3 other half */ - -/* C Register */ -#define IORDYp_NO_SPEED 0x4F -#define SPEED_DIS 0x0F - -#define DMARQp 0x80 -#define IORDYp 0x40 -#define DMAR_EN 0x20 -#define DMAW_EN 0x10 - -#define MC3 0x08 /* DMA"C" timing */ -#define MC2 0x04 /* DMA"C" timing */ -#define MC1 0x02 /* DMA"C" timing */ -#define MC0 0x01 /* DMA"C" timing */ - -static int init_setup_pdc202ata4(struct pci_dev *dev, ide_pci_device_t *d); -static int init_setup_pdc20265(struct pci_dev *, ide_pci_device_t *); -static int init_setup_pdc202xx(struct pci_dev *, ide_pci_device_t *); -static unsigned int init_chipset_pdc202xx(struct pci_dev *, const char *); -static void init_hwif_pdc202xx(ide_hwif_t *); -static void init_dma_pdc202xx(ide_hwif_t *, unsigned long); - -static ide_pci_device_t pdc202xx_chipsets[] __devinitdata = { - { /* 0 */ - .name = "PDC20246", - .init_setup = init_setup_pdc202ata4, - .init_chipset = init_chipset_pdc202xx, - .init_hwif = init_hwif_pdc202xx, - .init_dma = init_dma_pdc202xx, - .channels = 2, - .autodma = AUTODMA, -#ifndef CONFIG_PDC202XX_FORCE - .enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}}, -#endif - .bootable = OFF_BOARD, - .extra = 16, - },{ /* 1 */ - .name = "PDC20262", - .init_setup = init_setup_pdc202ata4, - .init_chipset = init_chipset_pdc202xx, - .init_hwif = init_hwif_pdc202xx, - .init_dma = init_dma_pdc202xx, - .channels = 2, - .autodma = AUTODMA, -#ifndef CONFIG_PDC202XX_FORCE - .enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}}, -#endif - .bootable = OFF_BOARD, - .extra = 48, - .flags = IDEPCI_FLAG_FORCE_PDC, - },{ /* 2 */ - .name = "PDC20263", - .init_setup = init_setup_pdc202ata4, - .init_chipset = init_chipset_pdc202xx, - .init_hwif = init_hwif_pdc202xx, - .init_dma = init_dma_pdc202xx, - .channels = 2, - .autodma = AUTODMA, -#ifndef CONFIG_PDC202XX_FORCE - .enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}}, -#endif - .bootable = OFF_BOARD, - .extra = 48, - },{ /* 3 */ - .name = "PDC20265", - .init_setup = init_setup_pdc20265, - .init_chipset = init_chipset_pdc202xx, - .init_hwif = init_hwif_pdc202xx, - .init_dma = init_dma_pdc202xx, - .channels = 2, - .autodma = AUTODMA, -#ifndef CONFIG_PDC202XX_FORCE - .enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}}, -#endif - .bootable = OFF_BOARD, - .extra = 48, - .flags = IDEPCI_FLAG_FORCE_PDC, - },{ /* 4 */ - .name = "PDC20267", - .init_setup = init_setup_pdc202xx, - .init_chipset = init_chipset_pdc202xx, - .init_hwif = init_hwif_pdc202xx, - .init_dma = init_dma_pdc202xx, - .channels = 2, - .autodma = AUTODMA, -#ifndef CONFIG_PDC202XX_FORCE - .enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}}, -#endif - .bootable = OFF_BOARD, - .extra = 48, - } -}; - -#endif /* PDC202XX_H */ diff -urN linux-2.6.11-rc3/drivers/ide/pci/piix.c linux-2.6.11-rc4/drivers/ide/pci/piix.c --- linux-2.6.11-rc3/drivers/ide/pci/piix.c 2005-02-12 19:50:37.536833046 -0800 +++ linux-2.6.11-rc4/drivers/ide/pci/piix.c 2005-02-12 19:50:56.167639612 -0800 @@ -103,8 +103,6 @@ #include -#include "piix.h" - static int no_piix_dma; /** @@ -530,19 +528,51 @@ hwif->drives[0].autodma = hwif->autodma; } -/** - * init_setup_piix - callback for IDE initialize - * @dev: PIIX PCI device - * @d: IDE pci info - * - * Enable the xp fixup for the PIIX controller and then perform - * a standard ide PCI setup - */ - -static int __devinit init_setup_piix(struct pci_dev *dev, ide_pci_device_t *d) -{ - return ide_setup_pci_device(dev, d); -} +#define DECLARE_PIIX_DEV(name_str) \ + { \ + .name = name_str, \ + .init_chipset = init_chipset_piix, \ + .init_hwif = init_hwif_piix, \ + .channels = 2, \ + .autodma = AUTODMA, \ + .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, \ + .bootable = ON_BOARD, \ + } + +static ide_pci_device_t piix_pci_info[] __devinitdata = { + /* 0 */ DECLARE_PIIX_DEV("PIIXa"), + /* 1 */ DECLARE_PIIX_DEV("PIIXb"), + + { /* 2 */ + .name = "MPIIX", + .init_hwif = init_hwif_piix, + .channels = 2, + .autodma = NODMA, + .enablebits = {{0x6D,0x80,0x80}, {0x6F,0x80,0x80}}, + .bootable = ON_BOARD, + }, + + /* 3 */ DECLARE_PIIX_DEV("PIIX3"), + /* 4 */ DECLARE_PIIX_DEV("PIIX4"), + /* 5 */ DECLARE_PIIX_DEV("ICH0"), + /* 6 */ DECLARE_PIIX_DEV("PIIX4"), + /* 7 */ DECLARE_PIIX_DEV("ICH"), + /* 8 */ DECLARE_PIIX_DEV("PIIX4"), + /* 9 */ DECLARE_PIIX_DEV("PIIX4"), + /* 10 */ DECLARE_PIIX_DEV("ICH2"), + /* 11 */ DECLARE_PIIX_DEV("ICH2M"), + /* 12 */ DECLARE_PIIX_DEV("ICH3M"), + /* 13 */ DECLARE_PIIX_DEV("ICH3"), + /* 14 */ DECLARE_PIIX_DEV("ICH4"), + /* 15 */ DECLARE_PIIX_DEV("ICH5"), + /* 16 */ DECLARE_PIIX_DEV("C-ICH"), + /* 17 */ DECLARE_PIIX_DEV("ICH4"), + /* 18 */ DECLARE_PIIX_DEV("ICH5-SATA"), + /* 19 */ DECLARE_PIIX_DEV("ICH5"), + /* 20 */ DECLARE_PIIX_DEV("ICH6"), + /* 21 */ DECLARE_PIIX_DEV("ICH7"), + /* 22 */ DECLARE_PIIX_DEV("ICH4"), +}; /** * piix_init_one - called when a PIIX is found @@ -557,7 +587,7 @@ { ide_pci_device_t *d = &piix_pci_info[id->driver_data]; - return d->init_setup(dev, d); + return ide_setup_pci_device(dev, d); } /** diff -urN linux-2.6.11-rc3/drivers/ide/pci/piix.h linux-2.6.11-rc4/drivers/ide/pci/piix.h --- linux-2.6.11-rc3/drivers/ide/pci/piix.h 2005-02-12 19:50:37.537833089 -0800 +++ linux-2.6.11-rc4/drivers/ide/pci/piix.h 1969-12-31 16:00:00.000000000 -0800 @@ -1,65 +0,0 @@ -#ifndef PIIX_H -#define PIIX_H - -#include -#include -#include - -static int init_setup_piix(struct pci_dev *, ide_pci_device_t *); -static unsigned int __devinit init_chipset_piix(struct pci_dev *, const char *); -static void init_hwif_piix(ide_hwif_t *); - -#define DECLARE_PIIX_DEV(name_str) \ - { \ - .name = name_str, \ - .init_setup = init_setup_piix, \ - .init_chipset = init_chipset_piix, \ - .init_hwif = init_hwif_piix, \ - .channels = 2, \ - .autodma = AUTODMA, \ - .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, \ - .bootable = ON_BOARD, \ - } - -/* - * Table of the various PIIX capability blocks - * - */ - -static ide_pci_device_t piix_pci_info[] __devinitdata = { - /* 0 */ DECLARE_PIIX_DEV("PIIXa"), - /* 1 */ DECLARE_PIIX_DEV("PIIXb"), - - { /* 2 */ - .name = "MPIIX", - .init_setup = init_setup_piix, - .init_hwif = init_hwif_piix, - .channels = 2, - .autodma = NODMA, - .enablebits = {{0x6D,0x80,0x80}, {0x6F,0x80,0x80}}, - .bootable = ON_BOARD, - }, - - /* 3 */ DECLARE_PIIX_DEV("PIIX3"), - /* 4 */ DECLARE_PIIX_DEV("PIIX4"), - /* 5 */ DECLARE_PIIX_DEV("ICH0"), - /* 6 */ DECLARE_PIIX_DEV("PIIX4"), - /* 7 */ DECLARE_PIIX_DEV("ICH"), - /* 8 */ DECLARE_PIIX_DEV("PIIX4"), - /* 9 */ DECLARE_PIIX_DEV("PIIX4"), - /* 10 */ DECLARE_PIIX_DEV("ICH2"), - /* 11 */ DECLARE_PIIX_DEV("ICH2M"), - /* 12 */ DECLARE_PIIX_DEV("ICH3M"), - /* 13 */ DECLARE_PIIX_DEV("ICH3"), - /* 14 */ DECLARE_PIIX_DEV("ICH4"), - /* 15 */ DECLARE_PIIX_DEV("ICH5"), - /* 16 */ DECLARE_PIIX_DEV("C-ICH"), - /* 17 */ DECLARE_PIIX_DEV("ICH4"), - /* 18 */ DECLARE_PIIX_DEV("ICH5-SATA"), - /* 19 */ DECLARE_PIIX_DEV("ICH5"), - /* 20 */ DECLARE_PIIX_DEV("ICH6"), - /* 21 */ DECLARE_PIIX_DEV("ICH7"), - /* 22 */ DECLARE_PIIX_DEV("ICH4"), -}; - -#endif /* PIIX_H */ diff -urN linux-2.6.11-rc3/drivers/ide/pci/serverworks.c linux-2.6.11-rc4/drivers/ide/pci/serverworks.c --- linux-2.6.11-rc3/drivers/ide/pci/serverworks.c 2005-02-12 19:50:37.539833176 -0800 +++ linux-2.6.11-rc4/drivers/ide/pci/serverworks.c 2005-02-12 19:50:56.170639742 -0800 @@ -39,7 +39,18 @@ #include -#include "serverworks.h" +#define SVWKS_CSB5_REVISION_NEW 0x92 /* min PCI_REVISION_ID for UDMA5 (A2.0) */ +#define SVWKS_CSB6_REVISION 0xa0 /* min PCI_REVISION_ID for UDMA4 (A1.0) */ + +/* Seagate Barracuda ATA IV Family drives in UDMA mode 5 + * can overrun their FIFOs when used with the CSB5 */ +static const char *svwks_bad_ata100[] = { + "ST320011A", + "ST340016A", + "ST360021A", + "ST380021A", + NULL +}; static u8 svwks_revision = 0; static struct pci_dev *isa_dev; @@ -582,6 +593,44 @@ return ide_setup_pci_device(dev, d); } +static ide_pci_device_t serverworks_chipsets[] __devinitdata = { + { /* 0 */ + .name = "SvrWks OSB4", + .init_setup = init_setup_svwks, + .init_chipset = init_chipset_svwks, + .init_hwif = init_hwif_svwks, + .channels = 2, + .autodma = AUTODMA, + .bootable = ON_BOARD, + },{ /* 1 */ + .name = "SvrWks CSB5", + .init_setup = init_setup_svwks, + .init_chipset = init_chipset_svwks, + .init_hwif = init_hwif_svwks, + .init_dma = init_dma_svwks, + .channels = 2, + .autodma = AUTODMA, + .bootable = ON_BOARD, + },{ /* 2 */ + .name = "SvrWks CSB6", + .init_setup = init_setup_csb6, + .init_chipset = init_chipset_svwks, + .init_hwif = init_hwif_svwks, + .init_dma = init_dma_svwks, + .channels = 2, + .autodma = AUTODMA, + .bootable = ON_BOARD, + },{ /* 3 */ + .name = "SvrWks CSB6", + .init_setup = init_setup_csb6, + .init_chipset = init_chipset_svwks, + .init_hwif = init_hwif_svwks, + .init_dma = init_dma_svwks, + .channels = 1, /* 2 */ + .autodma = AUTODMA, + .bootable = ON_BOARD, + } +}; /** * svwks_init_one - called when a OSB/CSB is found diff -urN linux-2.6.11-rc3/drivers/ide/pci/serverworks.h linux-2.6.11-rc4/drivers/ide/pci/serverworks.h --- linux-2.6.11-rc3/drivers/ide/pci/serverworks.h 2005-02-12 19:50:37.539833176 -0800 +++ linux-2.6.11-rc4/drivers/ide/pci/serverworks.h 1969-12-31 16:00:00.000000000 -0800 @@ -1,69 +0,0 @@ - -#ifndef SERVERWORKS_H -#define SERVERWORKS_H - -#include -#include -#include - -#undef SVWKS_DEBUG_DRIVE_INFO - -#define SVWKS_CSB5_REVISION_NEW 0x92 /* min PCI_REVISION_ID for UDMA5 (A2.0) */ -#define SVWKS_CSB6_REVISION 0xa0 /* min PCI_REVISION_ID for UDMA4 (A1.0) */ - -/* Seagate Barracuda ATA IV Family drives in UDMA mode 5 - * can overrun their FIFOs when used with the CSB5 */ -static const char *svwks_bad_ata100[] = { - "ST320011A", - "ST340016A", - "ST360021A", - "ST380021A", - NULL -}; - -static int init_setup_svwks(struct pci_dev *, ide_pci_device_t *); -static int init_setup_csb6(struct pci_dev *, ide_pci_device_t *); -static unsigned int init_chipset_svwks(struct pci_dev *, const char *); -static void init_hwif_svwks(ide_hwif_t *); -static void init_dma_svwks(ide_hwif_t *, unsigned long); - -static ide_pci_device_t serverworks_chipsets[] __devinitdata = { - { /* 0 */ - .name = "SvrWks OSB4", - .init_setup = init_setup_svwks, - .init_chipset = init_chipset_svwks, - .init_hwif = init_hwif_svwks, - .channels = 2, - .autodma = AUTODMA, - .bootable = ON_BOARD, - },{ /* 1 */ - .name = "SvrWks CSB5", - .init_setup = init_setup_svwks, - .init_chipset = init_chipset_svwks, - .init_hwif = init_hwif_svwks, - .init_dma = init_dma_svwks, - .channels = 2, - .autodma = AUTODMA, - .bootable = ON_BOARD, - },{ /* 2 */ - .name = "SvrWks CSB6", - .init_setup = init_setup_csb6, - .init_chipset = init_chipset_svwks, - .init_hwif = init_hwif_svwks, - .init_dma = init_dma_svwks, - .channels = 2, - .autodma = AUTODMA, - .bootable = ON_BOARD, - },{ /* 3 */ - .name = "SvrWks CSB6", - .init_setup = init_setup_csb6, - .init_chipset = init_chipset_svwks, - .init_hwif = init_hwif_svwks, - .init_dma = init_dma_svwks, - .channels = 1, /* 2 */ - .autodma = AUTODMA, - .bootable = ON_BOARD, - } -}; - -#endif /* SERVERWORKS_H */ diff -urN linux-2.6.11-rc3/drivers/ide/pci/sgiioc4.c linux-2.6.11-rc4/drivers/ide/pci/sgiioc4.c --- linux-2.6.11-rc3/drivers/ide/pci/sgiioc4.c 2005-02-12 19:50:37.540833219 -0800 +++ linux-2.6.11-rc4/drivers/ide/pci/sgiioc4.c 2005-02-12 19:50:56.173639872 -0800 @@ -669,7 +669,8 @@ printk(KERN_INFO "%s: %s Bus-Master DMA disabled\n", hwif->name, d->name); - probe_hwif_init(hwif); + if (probe_hwif_init(hwif)) + return -EIO; /* Create /proc/ide entries */ create_proc_ide_interfaces(); diff -urN linux-2.6.11-rc3/drivers/ide/pci/siimage.c linux-2.6.11-rc4/drivers/ide/pci/siimage.c --- linux-2.6.11-rc3/drivers/ide/pci/siimage.c 2005-02-12 19:50:37.541833263 -0800 +++ linux-2.6.11-rc4/drivers/ide/pci/siimage.c 2005-02-12 19:50:56.174639915 -0800 @@ -590,7 +590,7 @@ if ((hwif->INL(SATA_STATUS_REG) & 0x03) != 0x03) { printk(KERN_WARNING "%s: reset phy dead, status=0x%08x\n", hwif->name, hwif->INL(SATA_STATUS_REG)); - HWGROUP(drive)->poll_timeout = 0; + HWGROUP(drive)->polling = 0; return ide_started; } return 0; diff -urN linux-2.6.11-rc3/drivers/ide/pci/via82cxxx.c linux-2.6.11-rc4/drivers/ide/pci/via82cxxx.c --- linux-2.6.11-rc3/drivers/ide/pci/via82cxxx.c 2005-02-12 19:50:37.545833436 -0800 +++ linux-2.6.11-rc4/drivers/ide/pci/via82cxxx.c 2005-02-12 19:50:56.178640089 -0800 @@ -589,7 +589,7 @@ hwif->speedproc = &via_set_drive; -#ifdef CONFIG_PPC_MULTIPLATFORM +#if defined(CONFIG_PPC_MULTIPLATFORM) && defined(CONFIG_PPC32) if(_machine == _MACH_chrp && _chrp_type == _CHRP_Pegasos) { hwif->irq = hwif->channel ? 15 : 14; } diff -urN linux-2.6.11-rc3/drivers/infiniband/hw/mthca/mthca_cq.c linux-2.6.11-rc4/drivers/infiniband/hw/mthca/mthca_cq.c --- linux-2.6.11-rc3/drivers/infiniband/hw/mthca/mthca_cq.c 2005-02-12 19:50:37.688839627 -0800 +++ linux-2.6.11-rc4/drivers/infiniband/hw/mthca/mthca_cq.c 2005-02-12 19:50:56.292645024 -0800 @@ -422,8 +422,6 @@ *freed = 0; } spin_unlock(&(*cur_qp)->lock); - if (atomic_dec_and_test(&(*cur_qp)->refcount)) - wake_up(&(*cur_qp)->wait); } spin_lock(&dev->qp_table.lock); diff -urN linux-2.6.11-rc3/drivers/infiniband/hw/mthca/mthca_qp.c linux-2.6.11-rc4/drivers/infiniband/hw/mthca/mthca_qp.c --- linux-2.6.11-rc3/drivers/infiniband/hw/mthca/mthca_qp.c 2005-02-12 19:50:37.720841012 -0800 +++ linux-2.6.11-rc4/drivers/infiniband/hw/mthca/mthca_qp.c 2005-02-12 19:50:56.311645847 -0800 @@ -1323,6 +1323,8 @@ break; } + break; + case UD: ((struct mthca_ud_seg *) wqe)->lkey = cpu_to_be32(to_mah(wr->wr.ud.ah)->key); diff -urN linux-2.6.11-rc3/drivers/input/mousedev.c linux-2.6.11-rc4/drivers/input/mousedev.c --- linux-2.6.11-rc3/drivers/input/mousedev.c 2005-02-12 19:50:37.805844692 -0800 +++ linux-2.6.11-rc4/drivers/input/mousedev.c 2005-02-12 19:50:56.556656454 -0800 @@ -467,10 +467,10 @@ } if (!p->dx && !p->dy && !p->dz) { - if (list->tail != list->head) - list->tail = (list->tail + 1) % PACKET_QUEUE_LEN; if (list->tail == list->head) list->ready = 0; + else + list->tail = (list->tail + 1) % PACKET_QUEUE_LEN; } spin_unlock_irqrestore(&list->packet_lock, flags); diff -urN linux-2.6.11-rc3/drivers/isdn/hardware/eicon/capifunc.c linux-2.6.11-rc4/drivers/isdn/hardware/eicon/capifunc.c --- linux-2.6.11-rc3/drivers/isdn/hardware/eicon/capifunc.c 2004-12-24 13:35:25.000000000 -0800 +++ linux-2.6.11-rc4/drivers/isdn/hardware/eicon/capifunc.c 2005-02-12 19:50:56.701662731 -0800 @@ -1,4 +1,4 @@ -/* $Id: capifunc.c,v 1.61.4.5 2004/08/27 20:10:12 armin Exp $ +/* $Id: capifunc.c,v 1.61.4.7 2005/02/11 19:40:25 armin Exp $ * * ISDN interface module for Eicon active cards DIVA. * CAPI Interface common functions @@ -64,7 +64,7 @@ */ static void no_printf(unsigned char *, ...); #include "debuglib.c" -void xlog(char *x, ...) +static void xlog(char *x, ...) { #ifndef DIVA_NO_DEBUGLIB va_list ap; @@ -157,7 +157,7 @@ while (num < MAX_DESCRIPTORS) { a = &adapter[num]; if (!a->Id) - break; + break; num++; } return(num + 1); @@ -353,7 +353,7 @@ if (k == 0) { if (li_config_table) { list_add((struct list_head *)li_config_table, free_mem_q); - li_config_table = NULL; + li_config_table = NULL; } } else { if (a->li_base < k) { @@ -1212,7 +1212,7 @@ void DIVA_EXIT_FUNCTION finit_capifunc(void) { do_api_remove_start(); - divacapi_disconnect_didd(); + divacapi_disconnect_didd(); divacapi_remove_cards(); remove_main_structs(); diva_os_destroy_spin_lock(&api_lock, "capifunc"); diff -urN linux-2.6.11-rc3/drivers/isdn/hardware/eicon/dadapter.c linux-2.6.11-rc4/drivers/isdn/hardware/eicon/dadapter.c --- linux-2.6.11-rc3/drivers/isdn/hardware/eicon/dadapter.c 2004-12-24 13:34:44.000000000 -0800 +++ linux-2.6.11-rc4/drivers/isdn/hardware/eicon/dadapter.c 2005-02-12 19:50:56.717663424 -0800 @@ -106,7 +106,7 @@ return adapter handle (> 0) on success return -1 adapter array overflow -------------------------------------------------------------------------- */ -int diva_didd_add_descriptor (DESCRIPTOR* d) { +static int diva_didd_add_descriptor (DESCRIPTOR* d) { diva_os_spin_lock_magic_t irql; int i; if (d->type == IDI_DIMAINT) { @@ -143,7 +143,7 @@ return adapter handle (> 0) on success return 0 on success -------------------------------------------------------------------------- */ -int diva_didd_remove_descriptor (IDI_CALL request) { +static int diva_didd_remove_descriptor (IDI_CALL request) { diva_os_spin_lock_magic_t irql; int i; if (request == MAdapter.request) { @@ -171,7 +171,7 @@ Read adapter array return 1 if not enough space to save all available adapters -------------------------------------------------------------------------- */ -int diva_didd_read_adapter_array (DESCRIPTOR* buffer, int length) { +static int diva_didd_read_adapter_array (DESCRIPTOR* buffer, int length) { diva_os_spin_lock_magic_t irql; int src, dst; memset (buffer, 0x00, length); diff -urN linux-2.6.11-rc3/drivers/isdn/hardware/eicon/dadapter.h linux-2.6.11-rc4/drivers/isdn/hardware/eicon/dadapter.h --- linux-2.6.11-rc3/drivers/isdn/hardware/eicon/dadapter.h 2004-12-24 13:35:28.000000000 -0800 +++ linux-2.6.11-rc4/drivers/isdn/hardware/eicon/dadapter.h 2005-02-12 19:50:56.718663467 -0800 @@ -25,11 +25,10 @@ */ #ifndef __DIVA_DIDD_DADAPTER_INC__ #define __DIVA_DIDD_DADAPTER_INC__ + void diva_didd_load_time_init (void); void diva_didd_load_time_finit (void); -int diva_didd_add_descriptor (DESCRIPTOR* d); -int diva_didd_remove_descriptor (IDI_CALL request); -int diva_didd_read_adapter_array (DESCRIPTOR* buffer, int length); -#define OLD_MAX_DESCRIPTORS 16 + #define NEW_MAX_DESCRIPTORS 64 + #endif diff -urN linux-2.6.11-rc3/drivers/isdn/hardware/eicon/di.c linux-2.6.11-rc4/drivers/isdn/hardware/eicon/di.c --- linux-2.6.11-rc3/drivers/isdn/hardware/eicon/di.c 2004-12-24 13:34:31.000000000 -0800 +++ linux-2.6.11-rc4/drivers/isdn/hardware/eicon/di.c 2005-02-12 19:50:56.732664073 -0800 @@ -42,10 +42,7 @@ /*------------------------------------------------------------------*/ void pr_out(ADAPTER * a); byte pr_dpc(ADAPTER * a); -void scom_out(ADAPTER * a); -byte scom_dpc(ADAPTER * a); static byte pr_ready(ADAPTER * a); -static byte scom_ready(ADAPTER * a); static byte isdn_rc(ADAPTER *, byte, byte, byte, word, dword, dword); static byte isdn_ind(ADAPTER *, byte, byte, byte, PBUFFER *, byte, word); /* ----------------------------------------------------------------- @@ -59,11 +56,11 @@ ----------------------------------------------------------------- */ #if defined(XDI_USE_XLOG) #define XDI_A_NR(_x_) ((byte)(((ISDN_ADAPTER *)(_x_->io))->ANum)) +static void xdi_xlog (byte *msg, word code, int length); +static byte xdi_xlog_sec = 0; #else #define XDI_A_NR(_x_) ((byte)0) #endif -byte xdi_xlog_sec = 0; -void xdi_xlog (byte *msg, word code, int length); static void xdi_xlog_rc_event (byte Adapter, byte Id, byte Ch, byte Rc, byte cb, byte type); static void xdi_xlog_request (byte Adapter, byte Id, @@ -345,192 +342,6 @@ } return FALSE; } -byte pr_test_int(ADAPTER * a) -{ - return a->ram_in(a,(void *)0x3ffc); -} -void pr_clear_int(ADAPTER * a) -{ - a->ram_out(a,(void *)0x3ffc,0); -} -/*------------------------------------------------------------------*/ -/* output function */ -/*------------------------------------------------------------------*/ -void scom_out(ADAPTER * a) -{ - byte e_no; - ENTITY * this; - BUFFERS * X; - word length; - word i; - word clength; - byte more; - byte Id; - dtrc(dprintf("scom_out")); - /* check if the adapter is ready to accept an request: */ - e_no = look_req(a); - if(!e_no) - { - dtrc(dprintf("no_req")); - return; - } - if(!scom_ready(a)) - { - dtrc(dprintf("not_ready")); - return; - } - this = entity_ptr(a,e_no); - dtrc(dprintf("out:Req=%x,Id=%x,Ch=%x",this->Req,this->Id,this->ReqCh)); - next_req(a); - /* now copy the data from the current data buffer into the */ - /* adapters request buffer */ - length = 0; - i = this->XCurrent; - X = PTR_X(a, this); - while(iXNum && length<270) { - clength = MIN((word)(270-length),X[i].PLength-this->XOffset); - a->ram_out_buffer(a, - &RAM->XBuffer.P[length], - PTR_P(a,this,&X[i].P[this->XOffset]), - clength); - length +=clength; - this->XOffset +=clength; - if(this->XOffset==X[i].PLength) { - this->XCurrent = (byte)++i; - this->XOffset = 0; - } - } - a->ram_outw(a, &RAM->XBuffer.length, length); - a->ram_out(a, &RAM->ReqId, this->Id); - a->ram_out(a, &RAM->ReqCh, this->ReqCh); - /* if it's a specific request (no ASSIGN) ... */ - if(this->Id &0x1f) { - /* if buffers are left in the list of data buffers do */ - /* chaining (LL_MDATA, N_MDATA) */ - this->More++; - if(iXNum && this->MInd) { - a->ram_out(a, &RAM->Req, this->MInd); - more = TRUE; - } - else { - this->More |=XMOREF; - a->ram_out(a, &RAM->Req, this->Req); - more = FALSE; - if (a->FlowControlIdTable[this->ReqCh] == this->Id) - a->FlowControlSkipTable[this->ReqCh] = TRUE; - /* - Note that remove request was sent to the card - */ - if (this->Req == REMOVE) { - a->misc_flags_table[e_no] |= DIVA_MISC_FLAGS_REMOVE_PENDING; - } - } - if(more) { - req_queue(a,this->No); - } - } - /* else it's a ASSIGN */ - else { - /* save the request code used for buffer chaining */ - this->MInd = 0; - if (this->Id==BLLC_ID) this->MInd = LL_MDATA; - if (this->Id==NL_ID || - this->Id==TASK_ID || - this->Id==MAN_ID - ) this->MInd = N_MDATA; - /* send the ASSIGN */ - this->More |=XMOREF; - a->ram_out(a, &RAM->Req, this->Req); - /* save the reference of the ASSIGN */ - assign_queue(a, this->No, 0); - } - /* if it is a 'unreturncoded' UREMOVE request, remove the */ - /* Id from our table after sending the request */ - if(this->Req==UREMOVE && this->Id) { - Id = this->Id; - e_no = a->IdTable[Id]; - free_entity(a, e_no); - for (i = 0; i < 256; i++) - { - if (a->FlowControlIdTable[i] == Id) - a->FlowControlIdTable[i] = 0; - } - a->IdTable[Id] = 0; - this->Id = 0; - } -} -static byte scom_ready(ADAPTER * a) -{ - if(a->ram_in(a, &RAM->Req)) { - if(!a->ReadyInt) { - a->ram_inc(a, &RAM->ReadyInt); - a->ReadyInt++; - } - return 0; - } - return 1; -} -/*------------------------------------------------------------------*/ -/* isdn interrupt handler */ -/*------------------------------------------------------------------*/ -byte scom_dpc(ADAPTER * a) -{ - byte c; - /* if a return code is available ... */ - if(a->ram_in(a, &RAM->Rc)) { - /* call return code handler, if it is not our return code */ - /* the handler returns 2, if it's the return code to an */ - /* ASSIGN the handler returns 1 */ - c = isdn_rc(a, - a->ram_in(a, &RAM->Rc), - a->ram_in(a, &RAM->RcId), - a->ram_in(a, &RAM->RcCh), - 0, - /* - Scom Card does not provide extended information - */ - 0, 0); - switch(c) { - case 0: - a->ram_out(a, &RAM->Rc, 0); - break; - case 1: - a->ram_out(a, &RAM->Req, 0); - a->ram_out(a, &RAM->Rc, 0); - break; - case 2: - return TRUE; - } - /* call output function */ - scom_out(a); - } - else { - /* if an indications is available ... */ - if(a->ram_in(a, &RAM->Ind)) { - /* call indication handler, a return value of 2 means chain */ - /* a return value of 1 means RNR */ - c = isdn_ind(a, - a->ram_in(a, &RAM->Ind), - a->ram_in(a, &RAM->IndId), - a->ram_in(a, &RAM->IndCh), - &RAM->RBuffer, - a->ram_in(a, &RAM->MInd), - a->ram_inw(a, &RAM->MLength)); - switch(c) { - case 0: - a->ram_out(a, &RAM->Ind, 0); - break; - case 1: - dtrc(dprintf("RNR")); - a->ram_out(a, &RAM->RNR, TRUE); - break; - case 2: - return TRUE; - } - } - } - return FALSE; -} byte scom_test_int(ADAPTER * a) { return a->ram_in(a,(void *)0x3fe); @@ -539,11 +350,6 @@ { a->ram_out(a,(void *)0x3fe,0); } -void quadro_clear_int(ADAPTER * a) -{ - a->ram_out(a,(void *)0x3fe,0); - a->ram_out(a,(void *)0x401,0); -} /*------------------------------------------------------------------*/ /* return code handler */ /*------------------------------------------------------------------*/ @@ -914,15 +720,15 @@ } return 2; } +#if defined(XDI_USE_XLOG) /* ----------------------------------------------------------- This function works in the same way as xlog on the active board ----------------------------------------------------------- */ -void xdi_xlog (byte *msg, word code, int length) { -#if defined(XDI_USE_XLOG) +static void xdi_xlog (byte *msg, word code, int length) { xdi_dbg_xlog ("\x00\x02", msg, code, length); -#endif } +#endif /* ----------------------------------------------------------- This function writes the information about the Return Code processing in the trace buffer. Trace ID is 221. diff -urN linux-2.6.11-rc3/drivers/isdn/hardware/eicon/di.h linux-2.6.11-rc4/drivers/isdn/hardware/eicon/di.h --- linux-2.6.11-rc3/drivers/isdn/hardware/eicon/di.h 2004-12-24 13:35:23.000000000 -0800 +++ linux-2.6.11-rc4/drivers/isdn/hardware/eicon/di.h 2005-02-12 19:50:56.733664117 -0800 @@ -81,13 +81,8 @@ /*------------------------------------------------------------------*/ void pr_out(ADAPTER * a); byte pr_dpc(ADAPTER * a); -byte pr_test_int(ADAPTER * a); -void pr_clear_int(ADAPTER * a); -void scom_out(ADAPTER * a); -byte scom_dpc(ADAPTER * a); byte scom_test_int(ADAPTER * a); void scom_clear_int(ADAPTER * a); -void quadro_clear_int(ADAPTER * a); /*------------------------------------------------------------------*/ /* OS specific functions used by IDI common code */ /*------------------------------------------------------------------*/ diff -urN linux-2.6.11-rc3/drivers/isdn/hardware/eicon/diva_didd.c linux-2.6.11-rc4/drivers/isdn/hardware/eicon/diva_didd.c --- linux-2.6.11-rc3/drivers/isdn/hardware/eicon/diva_didd.c 2004-12-24 13:35:00.000000000 -0800 +++ linux-2.6.11-rc4/drivers/isdn/hardware/eicon/diva_didd.c 2005-02-12 19:50:56.734664160 -0800 @@ -1,4 +1,4 @@ -/* $Id: diva_didd.c,v 1.13.6.1 2004/08/28 20:03:53 armin Exp $ +/* $Id: diva_didd.c,v 1.13.6.4 2005/02/11 19:40:25 armin Exp $ * * DIDD Interface module for Eicon active cards. * @@ -23,7 +23,7 @@ #include "divasync.h" #include "did_vers.h" -static char *main_revision = "$Revision: 1.13.6.1 $"; +static char *main_revision = "$Revision: 1.13.6.4 $"; static char *DRIVERNAME = "Eicon DIVA - DIDD table (http://www.melware.net)"; @@ -140,7 +140,7 @@ return (ret); } -void DIVA_EXIT_FUNCTION divadidd_exit(void) +static void DIVA_EXIT_FUNCTION divadidd_exit(void) { diddfunc_finit(); remove_proc(); diff -urN linux-2.6.11-rc3/drivers/isdn/hardware/eicon/divamnt.c linux-2.6.11-rc4/drivers/isdn/hardware/eicon/divamnt.c --- linux-2.6.11-rc3/drivers/isdn/hardware/eicon/divamnt.c 2005-02-12 19:50:37.824845515 -0800 +++ linux-2.6.11-rc4/drivers/isdn/hardware/eicon/divamnt.c 2005-02-12 19:50:56.735664203 -0800 @@ -1,4 +1,4 @@ -/* $Id: divamnt.c,v 1.32.6.9 2005/01/31 12:22:20 armin Exp $ +/* $Id: divamnt.c,v 1.32.6.10 2005/02/11 19:40:25 armin Exp $ * * Driver for Eicon DIVA Server ISDN cards. * Maint module @@ -25,7 +25,7 @@ #include "divasync.h" #include "debug_if.h" -static char *main_revision = "$Revision: 1.32.6.9 $"; +static char *main_revision = "$Revision: 1.32.6.10 $"; static int major; @@ -34,9 +34,9 @@ MODULE_SUPPORTED_DEVICE("DIVA card driver"); MODULE_LICENSE("GPL"); -int buffer_length = 128; +static int buffer_length = 128; module_param(buffer_length, int, 0); -unsigned long diva_dbg_mem = 0; +static unsigned long diva_dbg_mem = 0; module_param(diva_dbg_mem, ulong, 0); static char *DRIVERNAME = diff -urN linux-2.6.11-rc3/drivers/isdn/hardware/eicon/divasmain.c linux-2.6.11-rc4/drivers/isdn/hardware/eicon/divasmain.c --- linux-2.6.11-rc3/drivers/isdn/hardware/eicon/divasmain.c 2005-02-12 19:50:37.826845601 -0800 +++ linux-2.6.11-rc4/drivers/isdn/hardware/eicon/divasmain.c 2005-02-12 19:50:56.737664290 -0800 @@ -1,4 +1,4 @@ -/* $Id: divasmain.c,v 1.55.4.1 2004/05/21 12:15:00 armin Exp $ +/* $Id: divasmain.c,v 1.55.4.6 2005/02/09 19:28:20 armin Exp $ * * Low level driver for Eicon DIVA Server ISDN cards. * @@ -41,7 +41,7 @@ #include "diva_dma.h" #include "diva_pci.h" -static char *main_revision = "$Revision: 1.55.4.1 $"; +static char *main_revision = "$Revision: 1.55.4.6 $"; static int major; @@ -823,7 +823,7 @@ goto out; } - if ((ret = pci_module_init(&diva_pci_driver))) { + if ((ret = pci_register_driver(&diva_pci_driver))) { #ifdef MODULE remove_divas_proc(); divas_unregister_chrdev(); diff -urN linux-2.6.11-rc3/drivers/isdn/hardware/eicon/io.c linux-2.6.11-rc4/drivers/isdn/hardware/eicon/io.c --- linux-2.6.11-rc3/drivers/isdn/hardware/eicon/io.c 2005-02-12 19:50:37.827845645 -0800 +++ linux-2.6.11-rc4/drivers/isdn/hardware/eicon/io.c 2005-02-12 19:50:56.753664983 -0800 @@ -36,7 +36,7 @@ extern ADAPTER * adapter[MAX_ADAPTER]; extern PISDN_ADAPTER IoAdapters[MAX_ADAPTER]; void request (PISDN_ADAPTER, ENTITY *); -void pcm_req (PISDN_ADAPTER, ENTITY *); +static void pcm_req (PISDN_ADAPTER, ENTITY *); /* -------------------------------------------------------------------------- local functions -------------------------------------------------------------------------- */ @@ -118,7 +118,8 @@ &IoAdapter->Name[0])) } /*****************************************************************************/ -char *(ExceptionCauseTable[]) = +#if defined(XDI_USE_XLOG) +static char *(ExceptionCauseTable[]) = { "Interrupt", "TLB mod /IBOUND", @@ -153,6 +154,7 @@ "Reserved 30", "VCED" } ; +#endif void dump_trap_frame (PISDN_ADAPTER IoAdapter, byte __iomem *exceptionFrame) { @@ -496,7 +498,7 @@ /* -------------------------------------------------------------------------- XLOG interface -------------------------------------------------------------------------- */ -void +static void pcm_req (PISDN_ADAPTER IoAdapter, ENTITY *e) { diva_os_spin_lock_magic_t OldIrql ; @@ -848,26 +850,3 @@ if ( e && e->callback ) e->callback (e) ; } -/* -------------------------------------------------------------------------- - routines for aligned reading and writing on RISC - -------------------------------------------------------------------------- */ -void outp_words_from_buffer (word __iomem * adr, byte* P, dword len) -{ - dword i = 0; - word w; - while (i < (len & 0xfffffffe)) { - w = P[i++]; - w += (P[i++])<<8; - outppw (adr, w); - } -} -void inp_words_to_buffer (word __iomem * adr, byte* P, dword len) -{ - dword i = 0; - word w; - while (i < (len & 0xfffffffe)) { - w = inppw (adr); - P[i++] = (byte)(w); - P[i++] = (byte)(w>>8); - } -} diff -urN linux-2.6.11-rc3/drivers/isdn/hardware/eicon/io.h linux-2.6.11-rc4/drivers/isdn/hardware/eicon/io.h --- linux-2.6.11-rc3/drivers/isdn/hardware/eicon/io.h 2004-12-24 13:35:40.000000000 -0800 +++ linux-2.6.11-rc4/drivers/isdn/hardware/eicon/io.h 2005-02-12 19:50:56.763665416 -0800 @@ -252,11 +252,6 @@ #define PR_RAM ((struct pr_ram *)0) #define RAM ((struct dual *)0) /* --------------------------------------------------------------------- - Functions for port io - --------------------------------------------------------------------- */ -void outp_words_from_buffer (word __iomem * adr, byte* P, dword len); -void inp_words_to_buffer (word __iomem * adr, byte* P, dword len); -/* --------------------------------------------------------------------- platform specific conversions --------------------------------------------------------------------- */ extern void * PTR_P(ADAPTER * a, ENTITY * e, void * P); diff -urN linux-2.6.11-rc3/drivers/isdn/hardware/eicon/message.c linux-2.6.11-rc4/drivers/isdn/hardware/eicon/message.c --- linux-2.6.11-rc3/drivers/isdn/hardware/eicon/message.c 2004-12-24 13:35:00.000000000 -0800 +++ linux-2.6.11-rc4/drivers/isdn/hardware/eicon/message.c 2005-02-12 19:50:56.829668273 -0800 @@ -55,7 +55,7 @@ /* and it is not necessary to save it separate for every adapter */ /* Macrose defined here have only local meaning */ /*------------------------------------------------------------------*/ -dword diva_xdi_extended_features = 0; +static dword diva_xdi_extended_features = 0; #define DIVA_CAPI_USE_CMA 0x00000001 #define DIVA_CAPI_XDI_PROVIDES_SDRAM_BAR 0x00000002 @@ -72,11 +72,10 @@ /* local function prototypes */ /*------------------------------------------------------------------*/ -void group_optimization(DIVA_CAPI_ADAPTER * a, PLCI * plci); -void set_group_ind_mask (PLCI *plci); -void set_group_ind_mask_bit (PLCI *plci, word b); -void clear_group_ind_mask_bit (PLCI *plci, word b); -byte test_group_ind_mask_bit (PLCI *plci, word b); +static void group_optimization(DIVA_CAPI_ADAPTER * a, PLCI * plci); +static void set_group_ind_mask (PLCI *plci); +static void clear_group_ind_mask_bit (PLCI *plci, word b); +static byte test_group_ind_mask_bit (PLCI *plci, word b); void AutomaticLaw(DIVA_CAPI_ADAPTER *); word CapiRelease(word); word CapiRegister(word); @@ -88,7 +87,7 @@ word api_remove_start(void); void api_remove_complete(void); -void plci_remove(PLCI *); +static void plci_remove(PLCI *); static void diva_get_extended_adapter_features (DIVA_CAPI_ADAPTER * a); static void diva_ask_for_xdi_sdram_bar (DIVA_CAPI_ADAPTER *, IDI_SYNC_REQ *); @@ -100,9 +99,9 @@ static void sig_ind(PLCI *); static void SendInfo(PLCI *, dword, byte * *, byte); static void SendSetupInfo(APPL *, PLCI *, dword, byte * *, byte); -void SendSSExtInd(APPL *, PLCI * plci, dword Id, byte * * parms); +static void SendSSExtInd(APPL *, PLCI * plci, dword Id, byte * * parms); -void VSwitchReqInd(PLCI *plci, dword Id, byte **parms); +static void VSwitchReqInd(PLCI *plci, dword Id, byte **parms); static void nl_ind(PLCI *); @@ -254,11 +253,11 @@ -byte remove_started = FALSE; -PLCI dummy_plci; +static byte remove_started = FALSE; +static PLCI dummy_plci; -struct _ftable { +static struct _ftable { word command; byte * format; byte (* function)(dword, word, DIVA_CAPI_ADAPTER *, PLCI *, APPL *, API_PARSE *); @@ -291,7 +290,7 @@ {_MANUFACTURER_I|RESPONSE, "", manufacturer_res} }; -byte * cip_bc[29][2] = { +static byte * cip_bc[29][2] = { { "", "" }, /* 0 */ { "\x03\x80\x90\xa3", "\x03\x80\x90\xa2" }, /* 1 */ { "\x02\x88\x90", "\x02\x88\x90" }, /* 2 */ @@ -324,7 +323,7 @@ { "\x02\x88\x90", "\x02\x88\x90" } /* 28 */ }; -byte * cip_hlc[29] = { +static byte * cip_hlc[29] = { "", /* 0 */ "", /* 1 */ "", /* 2 */ @@ -716,7 +715,7 @@ /* internal command queue */ /*------------------------------------------------------------------*/ -void init_internal_command_queue (PLCI *plci) +static void init_internal_command_queue (PLCI *plci) { word i; @@ -729,7 +728,7 @@ } -void start_internal_command (dword Id, PLCI *plci, t_std_internal_command command_function) +static void start_internal_command (dword Id, PLCI *plci, t_std_internal_command command_function) { word i; @@ -751,7 +750,7 @@ } -void next_internal_command (dword Id, PLCI *plci) +static void next_internal_command (dword Id, PLCI *plci) { word i; @@ -1048,7 +1047,7 @@ } -void plci_remove(PLCI * plci) +static void plci_remove(PLCI * plci) { if(!plci) { @@ -1094,7 +1093,7 @@ /* Application Group function helpers */ /*------------------------------------------------------------------*/ -void set_group_ind_mask (PLCI *plci) +static void set_group_ind_mask (PLCI *plci) { word i; @@ -1102,17 +1101,12 @@ plci->group_optimization_mask_table[i] = 0xffffffffL; } -void set_group_ind_mask_bit (PLCI *plci, word b) -{ - plci->group_optimization_mask_table[b >> 5] |= (1L << (b & 0x1f)); -} - -void clear_group_ind_mask_bit (PLCI *plci, word b) +static void clear_group_ind_mask_bit (PLCI *plci, word b) { plci->group_optimization_mask_table[b >> 5] &= ~(1L << (b & 0x1f)); } -byte test_group_ind_mask_bit (PLCI *plci, word b) +static byte test_group_ind_mask_bit (PLCI *plci, word b) { return ((plci->group_optimization_mask_table[b >> 5] & (1L << (b & 0x1f))) != 0); } @@ -1121,7 +1115,7 @@ /* c_ind_mask operations for arbitrary MAX_APPL */ /*------------------------------------------------------------------*/ -void clear_c_ind_mask (PLCI *plci) +static void clear_c_ind_mask (PLCI *plci) { word i; @@ -1129,7 +1123,7 @@ plci->c_ind_mask_table[i] = 0; } -byte c_ind_mask_empty (PLCI *plci) +static byte c_ind_mask_empty (PLCI *plci) { word i; @@ -1139,22 +1133,22 @@ return (i == C_IND_MASK_DWORDS); } -void set_c_ind_mask_bit (PLCI *plci, word b) +static void set_c_ind_mask_bit (PLCI *plci, word b) { plci->c_ind_mask_table[b >> 5] |= (1L << (b & 0x1f)); } -void clear_c_ind_mask_bit (PLCI *plci, word b) +static void clear_c_ind_mask_bit (PLCI *plci, word b) { plci->c_ind_mask_table[b >> 5] &= ~(1L << (b & 0x1f)); } -byte test_c_ind_mask_bit (PLCI *plci, word b) +static byte test_c_ind_mask_bit (PLCI *plci, word b) { return ((plci->c_ind_mask_table[b >> 5] & (1L << (b & 0x1f))) != 0); } -void dump_c_ind_mask (PLCI *plci) +static void dump_c_ind_mask (PLCI *plci) { static char hex_digit_table[0x10] = {'0','1','2','3','4','5','6','7','8','9','a','b','c','d','e','f'}; @@ -6426,7 +6420,7 @@ return iesent; } -void SendSSExtInd(APPL * appl, PLCI * plci, dword Id, byte * * parms) +static void SendSSExtInd(APPL * appl, PLCI * plci, dword Id, byte * * parms) { word i; /* Format of multi_ssext_parms[i][]: @@ -14720,71 +14714,6 @@ /*------------------------------------------------------------------*/ -/* to be completed */ -void disable_adapter(byte adapter_number) -{ - word j, ncci; - DIVA_CAPI_ADAPTER *a; - PLCI *plci; - dword Id; - - if ((adapter_number == 0) || (adapter_number > max_adapter) || !adapter[adapter_number-1].request) - { - dbug(1,dprintf("disable adapter: number %d invalid",adapter_number)); - return; - } - dbug(1,dprintf("disable adapter number %d",adapter_number)); - /* Capi20 starts with Nr. 1, internal field starts with 0 */ - a = &adapter[adapter_number-1]; - a->adapter_disabled = TRUE; - for(j=0;jmax_plci;j++) - { - if(a->plci[j].Id) /* disconnect logical links */ - { - plci = &a->plci[j]; - if(plci->channels) - { - for(ncci=1;nccichannels;ncci++) - { - if(a->ncci_plci[ncci]==plci->Id) - { - Id = (((dword)ncci)<<16)|((word)plci->Id<<8)|a->Id; - sendf(plci->appl,_DISCONNECT_B3_I,Id,0,"ws",0,""); - plci->channels--; - } - } - } - - if(plci->State!=LISTENING) /* disconnect physical links */ - { - Id = ((word)plci->Id<<8)|a->Id; - sendf(plci->appl, _DISCONNECT_I, Id, 0, "w", _L1_ERROR); - plci_remove(plci); - plci->Sig.Id = 0; - plci->NL.Id = 0; - plci_remove(plci); - } - } - } -} - -void enable_adapter(byte adapter_number) -{ - DIVA_CAPI_ADAPTER *a; - - if ((adapter_number == 0) || (adapter_number > max_adapter) || !adapter[adapter_number-1].request) - { - dbug(1,dprintf("enable adapter: number %d invalid",adapter_number)); - return; - } - dbug(1,dprintf("enable adapter number %d",adapter_number)); - /* Capi20 starts with Nr. 1, internal field starts with 0 */ - a = &adapter[adapter_number-1]; - a->adapter_disabled = FALSE; - listen_check(a); -} - - static word CPN_filter_ok(byte *cpn,DIVA_CAPI_ADAPTER * a,word offset) { return 1; @@ -14800,7 +14729,7 @@ /* function must be enabled by setting "a->group_optimization_enabled" from the */ /* OS specific part (per adapter). */ /**********************************************************************************/ -void group_optimization(DIVA_CAPI_ADAPTER * a, PLCI * plci) +static void group_optimization(DIVA_CAPI_ADAPTER * a, PLCI * plci) { word i,j,k,busy,group_found; dword info_mask_group[MAX_CIP_TYPES]; @@ -14967,7 +14896,7 @@ /* Functions for virtual Switching e.g. Transfer by join, Conference */ -void VSwitchReqInd(PLCI *plci, dword Id, byte **parms) +static void VSwitchReqInd(PLCI *plci, dword Id, byte **parms) { word i; /* Format of vswitch_t: diff -urN linux-2.6.11-rc3/drivers/isdn/hardware/eicon/os_4bri.c linux-2.6.11-rc4/drivers/isdn/hardware/eicon/os_4bri.c --- linux-2.6.11-rc3/drivers/isdn/hardware/eicon/os_4bri.c 2004-12-24 13:34:32.000000000 -0800 +++ linux-2.6.11-rc4/drivers/isdn/hardware/eicon/os_4bri.c 2005-02-12 19:50:56.868669961 -0800 @@ -1,4 +1,4 @@ -/* $Id: os_4bri.c,v 1.28 2004/03/21 17:26:01 armin Exp $ */ +/* $Id: os_4bri.c,v 1.28.4.4 2005/02/11 19:40:25 armin Exp $ */ #include "platform.h" #include "debuglib.h" @@ -17,8 +17,8 @@ #include "mi_pc.h" #include "dsrv4bri.h" -void *diva_xdiLoadFileFile = NULL; -dword diva_xdiLoadFileLength = 0; +static void *diva_xdiLoadFileFile = NULL; +static dword diva_xdiLoadFileLength = 0; /* ** IMPORTS @@ -416,8 +416,8 @@ if (i) { Slave->serialNo = ((dword) (Slave->ControllerNumber << 24)) | a->xdi_adapter.serialNo; - Slave->cardType = a->xdi_adapter.cardType; - } + Slave->cardType = a->xdi_adapter.cardType; + } } /* diff -urN linux-2.6.11-rc3/drivers/isdn/hardware/eicon/xdi_vers.h linux-2.6.11-rc4/drivers/isdn/hardware/eicon/xdi_vers.h --- linux-2.6.11-rc3/drivers/isdn/hardware/eicon/xdi_vers.h 2004-12-24 13:35:23.000000000 -0800 +++ linux-2.6.11-rc4/drivers/isdn/hardware/eicon/xdi_vers.h 2005-02-12 19:50:56.875670264 -0800 @@ -1,4 +1,3 @@ - /* * Copyright (c) Eicon Networks, 2002. diff -urN linux-2.6.11-rc3/drivers/isdn/hisax/avm_a1p.c linux-2.6.11-rc4/drivers/isdn/hisax/avm_a1p.c --- linux-2.6.11-rc3/drivers/isdn/hisax/avm_a1p.c 2004-12-24 13:35:49.000000000 -0800 +++ linux-2.6.11-rc4/drivers/isdn/hisax/avm_a1p.c 2005-02-12 19:50:56.958673858 -0800 @@ -231,7 +231,7 @@ cs->irq = card->para[0]; - outb(cs->hw.avm.cfg_reg+ASL1_OFFSET, ASL1_W_ENABLE_S0); + byteout(cs->hw.avm.cfg_reg+ASL1_OFFSET, ASL1_W_ENABLE_S0); byteout(cs->hw.avm.cfg_reg+ASL0_OFFSET,0x00); HZDELAY(HZ / 5 + 1); byteout(cs->hw.avm.cfg_reg+ASL0_OFFSET,ASL0_W_RESET); diff -urN linux-2.6.11-rc3/drivers/isdn/hisax/isdnhdlc.c linux-2.6.11-rc4/drivers/isdn/hisax/isdnhdlc.c --- linux-2.6.11-rc3/drivers/isdn/hisax/isdnhdlc.c 2004-12-24 13:35:21.000000000 -0800 +++ linux-2.6.11-rc4/drivers/isdn/hisax/isdnhdlc.c 2005-02-12 19:50:57.066678534 -0800 @@ -308,7 +308,7 @@ hdlc->crc = crc_ccitt_byte(hdlc->crc, hdlc->shift_reg); // good byte received - if (dsize--) { + if (hdlc->dstpos < dsize) { dst[hdlc->dstpos++] = hdlc->shift_reg; } else { // frame too long diff -urN linux-2.6.11-rc3/drivers/md/dm-crypt.c linux-2.6.11-rc4/drivers/md/dm-crypt.c --- linux-2.6.11-rc3/drivers/md/dm-crypt.c 2004-12-24 13:33:49.000000000 -0800 +++ linux-2.6.11-rc4/drivers/md/dm-crypt.c 2005-02-12 19:50:57.176683296 -0800 @@ -329,7 +329,7 @@ struct bio *base_bio, unsigned int *bio_vec_idx) { struct bio *bio; - unsigned int nr_iovecs = dm_div_up(size, PAGE_SIZE); + unsigned int nr_iovecs = (size + PAGE_SIZE - 1) >> PAGE_SHIFT; int gfp_mask = GFP_NOIO | __GFP_HIGHMEM; unsigned long flags = current->flags; unsigned int i; diff -urN linux-2.6.11-rc3/drivers/md/dm-log.c linux-2.6.11-rc4/drivers/md/dm-log.c --- linux-2.6.11-rc3/drivers/md/dm-log.c 2005-02-12 19:50:38.003853264 -0800 +++ linux-2.6.11-rc4/drivers/md/dm-log.c 2005-02-12 19:50:57.207684638 -0800 @@ -129,7 +129,7 @@ struct log_c { struct dm_target *ti; int touched; - sector_t region_size; + uint32_t region_size; unsigned int region_count; region_t sync_count; @@ -292,7 +292,7 @@ enum sync sync = DEFAULTSYNC; struct log_c *lc; - sector_t region_size; + uint32_t region_size; unsigned int region_count; size_t bitset_size; @@ -313,12 +313,12 @@ } } - if (sscanf(argv[0], SECTOR_FORMAT, ®ion_size) != 1) { + if (sscanf(argv[0], "%u", ®ion_size) != 1) { DMWARN("invalid region size string"); return -EINVAL; } - region_count = dm_div_up(ti->len, region_size); + region_count = dm_sector_div_up(ti->len, region_size); lc = kmalloc(sizeof(*lc), GFP_KERNEL); if (!lc) { @@ -508,7 +508,7 @@ return write_header(lc); } -static sector_t core_get_region_size(struct dirty_log *log) +static uint32_t core_get_region_size(struct dirty_log *log) { struct log_c *lc = (struct log_c *) log->context; return lc->region_size; @@ -616,7 +616,7 @@ break; case STATUSTYPE_TABLE: - DMEMIT("%s %u " SECTOR_FORMAT " ", log->type->name, + DMEMIT("%s %u %u ", log->type->name, lc->sync == DEFAULTSYNC ? 1 : 2, lc->region_size); DMEMIT_SYNC; } @@ -637,7 +637,7 @@ case STATUSTYPE_TABLE: format_dev_t(buffer, lc->log_dev->bdev->bd_dev); - DMEMIT("%s %u %s " SECTOR_FORMAT " ", log->type->name, + DMEMIT("%s %u %s %u ", log->type->name, lc->sync == DEFAULTSYNC ? 2 : 3, buffer, lc->region_size); DMEMIT_SYNC; diff -urN linux-2.6.11-rc3/drivers/md/dm-log.h linux-2.6.11-rc4/drivers/md/dm-log.h --- linux-2.6.11-rc3/drivers/md/dm-log.h 2004-12-24 13:34:26.000000000 -0800 +++ linux-2.6.11-rc4/drivers/md/dm-log.h 2005-02-12 19:50:57.207684638 -0800 @@ -39,7 +39,7 @@ * Retrieves the smallest size of region that the log can * deal with. */ - sector_t (*get_region_size)(struct dirty_log *log); + uint32_t (*get_region_size)(struct dirty_log *log); /* * A predicate to say whether a region is clean or not. diff -urN linux-2.6.11-rc3/drivers/md/dm-raid1.c linux-2.6.11-rc4/drivers/md/dm-raid1.c --- linux-2.6.11-rc3/drivers/md/dm-raid1.c 2005-02-12 19:50:38.004853308 -0800 +++ linux-2.6.11-rc4/drivers/md/dm-raid1.c 2005-02-12 19:50:57.209684725 -0800 @@ -67,7 +67,7 @@ struct mirror_set; struct region_hash { struct mirror_set *ms; - sector_t region_size; + uint32_t region_size; unsigned region_shift; /* holds persistent region state */ @@ -135,7 +135,7 @@ #define MIN_REGIONS 64 #define MAX_RECOVERY 1 static int rh_init(struct region_hash *rh, struct mirror_set *ms, - struct dirty_log *log, sector_t region_size, + struct dirty_log *log, uint32_t region_size, region_t nr_regions) { unsigned int nr_buckets, max_buckets; @@ -871,7 +871,7 @@ * Target functions *---------------------------------------------------------------*/ static struct mirror_set *alloc_context(unsigned int nr_mirrors, - sector_t region_size, + uint32_t region_size, struct dm_target *ti, struct dirty_log *dl) { @@ -894,7 +894,7 @@ ms->ti = ti; ms->nr_mirrors = nr_mirrors; - ms->nr_regions = dm_div_up(ti->len, region_size); + ms->nr_regions = dm_sector_div_up(ti->len, region_size); ms->in_sync = 0; if (rh_init(&ms->rh, ms, dl, region_size, ms->nr_regions)) { @@ -916,7 +916,7 @@ kfree(ms); } -static inline int _check_region_size(struct dm_target *ti, sector_t size) +static inline int _check_region_size(struct dm_target *ti, uint32_t size) { return !(size % (PAGE_SIZE >> 9) || (size & (size - 1)) || size > ti->len); diff -urN linux-2.6.11-rc3/drivers/md/dm-stripe.c linux-2.6.11-rc4/drivers/md/dm-stripe.c --- linux-2.6.11-rc3/drivers/md/dm-stripe.c 2005-02-12 19:50:38.005853351 -0800 +++ linux-2.6.11-rc4/drivers/md/dm-stripe.c 2005-02-12 19:50:57.211684811 -0800 @@ -21,7 +21,7 @@ uint32_t stripes; /* The size of this target / num. stripes */ - uint32_t stripe_width; + sector_t stripe_width; /* stripe chunk size */ uint32_t chunk_shift; @@ -174,7 +174,7 @@ sector_t offset = bio->bi_sector - ti->begin; sector_t chunk = offset >> sc->chunk_shift; - uint32_t stripe = do_div(chunk, sc->stripes); + uint32_t stripe = sector_div(chunk, sc->stripes); bio->bi_bdev = sc->stripe[stripe].dev->bdev; bio->bi_sector = sc->stripe[stripe].physical_start + diff -urN linux-2.6.11-rc3/drivers/md/dm-table.c linux-2.6.11-rc4/drivers/md/dm-table.c --- linux-2.6.11-rc3/drivers/md/dm-table.c 2005-02-12 19:50:38.006853394 -0800 +++ linux-2.6.11-rc4/drivers/md/dm-table.c 2005-02-12 19:50:57.212684855 -0800 @@ -58,7 +58,7 @@ /* * Similar to ceiling(log_size(n)) */ -static unsigned int int_log(unsigned long n, unsigned long base) +static unsigned int int_log(unsigned int n, unsigned int base) { int result = 0; diff -urN linux-2.6.11-rc3/drivers/md/dm.c linux-2.6.11-rc4/drivers/md/dm.c --- linux-2.6.11-rc3/drivers/md/dm.c 2005-02-12 19:50:38.008853481 -0800 +++ linux-2.6.11-rc4/drivers/md/dm.c 2005-02-12 19:50:57.214684941 -0800 @@ -331,8 +331,8 @@ */ if (ti->split_io) { sector_t boundary; - boundary = dm_round_up(offset + 1, ti->split_io) - offset; - + boundary = ((offset + ti->split_io) & ~(ti->split_io - 1)) + - offset; if (len > boundary) len = boundary; } diff -urN linux-2.6.11-rc3/drivers/md/dm.h linux-2.6.11-rc4/drivers/md/dm.h --- linux-2.6.11-rc3/drivers/md/dm.h 2005-02-12 19:50:38.009853524 -0800 +++ linux-2.6.11-rc4/drivers/md/dm.h 2005-02-12 19:50:57.214684941 -0800 @@ -143,21 +143,22 @@ } /* - * ceiling(n / size) * size + * Ceiling(n / sz) */ -static inline unsigned long dm_round_up(unsigned long n, unsigned long size) -{ - unsigned long r = n % size; - return n + (r ? (size - r) : 0); -} +#define dm_div_up(n, sz) (((n) + (sz) - 1) / (sz)) + +#define dm_sector_div_up(n, sz) ( \ +{ \ + sector_t _r = ((n) + (sz) - 1); \ + sector_div(_r, (sz)); \ + _r; \ +} \ +) /* - * Ceiling(n / size) + * ceiling(n / size) * size */ -static inline unsigned long dm_div_up(unsigned long n, unsigned long size) -{ - return dm_round_up(n, size) / size; -} +#define dm_round_up(n, sz) (dm_div_up((n), (sz)) * (sz)) static inline sector_t to_sector(unsigned long n) { diff -urN linux-2.6.11-rc3/drivers/md/md.c linux-2.6.11-rc4/drivers/md/md.c --- linux-2.6.11-rc3/drivers/md/md.c 2005-02-12 19:50:38.014853741 -0800 +++ linux-2.6.11-rc4/drivers/md/md.c 2005-02-12 19:50:57.219685158 -0800 @@ -336,8 +336,6 @@ struct completion event; int ret; - bio_get(bio); - rw |= (1 << BIO_RW_SYNC); bio->bi_bdev = bdev; @@ -937,8 +935,8 @@ max_dev = 0; ITERATE_RDEV(mddev,rdev2,tmp) - if (rdev2->desc_nr > max_dev) - max_dev = rdev2->desc_nr; + if (rdev2->desc_nr+1 > max_dev) + max_dev = rdev2->desc_nr+1; sb->max_dev = cpu_to_le32(max_dev); for (i=0; irecovery_offset = cpu_to_le64(0); /* not supported yet */ + sb->sb_csum = calc_sb_1_csum(sb); } @@ -1474,10 +1473,13 @@ } disk->major = MAJOR(dev); disk->first_minor = unit << shift; - if (partitioned) + if (partitioned) { sprintf(disk->disk_name, "md_d%d", unit); - else + sprintf(disk->devfs_name, "md/d%d", unit); + } else { sprintf(disk->disk_name, "md%d", unit); + sprintf(disk->devfs_name, "md/%d", unit); + } disk->fops = &md_fops; disk->private_data = mddev; disk->queue = mddev->queue; @@ -2442,6 +2444,9 @@ { mdk_rdev_t *rdev; + if (mddev->pers == NULL) + return -ENODEV; + rdev = find_rdev(mddev, dev); if (!rdev) return -ENODEV; @@ -3364,10 +3369,12 @@ init_waitqueue_head(&mddev->recovery_wait); last_check = 0; - if (j) + if (j>2) { printk(KERN_INFO "md: resuming recovery of %s from checkpoint.\n", mdname(mddev)); + mddev->curr_resync = j; + } while (j < max_sectors) { int sectors; @@ -3449,7 +3456,7 @@ if (!test_bit(MD_RECOVERY_ERR, &mddev->recovery) && mddev->curr_resync > 2 && - mddev->curr_resync > mddev->recovery_cp) { + mddev->curr_resync >= mddev->recovery_cp) { if (test_bit(MD_RECOVERY_INTR, &mddev->recovery)) { printk(KERN_INFO "md: checkpointing recovery of %s.\n", @@ -3657,7 +3664,7 @@ for (minor=0; minor < MAX_MD_DEVS; ++minor) devfs_mk_bdev(MKDEV(mdp_major, minor<bi_sector + (bio->bi_size>>9) < sect + STRIPE_SECTORS) ? bio->bi_next : NULL) +#define r5_next_bio(bio, sect) ( ( (bio)->bi_sector + ((bio)->bi_size>>9) < sect + STRIPE_SECTORS) ? (bio)->bi_next : NULL) /* * The following can be used to debug the driver */ @@ -232,6 +232,7 @@ } static void unplug_slaves(mddev_t *mddev); +static void raid5_unplug_device(request_queue_t *q); static struct stripe_head *get_active_stripe(raid5_conf_t *conf, sector_t sector, int pd_idx, int noblock) @@ -457,6 +458,7 @@ bio_init(&dev->req); dev->req.bi_io_vec = &dev->vec; dev->req.bi_vcnt++; + dev->req.bi_max_vecs++; dev->vec.bv_page = dev->page; dev->vec.bv_len = STRIPE_SIZE; dev->vec.bv_offset = 0; @@ -612,11 +614,10 @@ /* - * Copy data between a page in the stripe cache, and one or more bion - * The page could align with the middle of the bio, or there could be - * several bion, each with several bio_vecs, which cover part of the page - * Multiple bion are linked together on bi_next. There may be extras - * at the end of this list. We ignore them. + * Copy data between a page in the stripe cache, and a bio. + * There are no alignment or size guarantees between the page or the + * bio except that there is some overlap. + * All iovecs in the bio must be considered. */ static void copy_data(int frombio, struct bio *bio, struct page *page, @@ -625,41 +626,38 @@ char *pa = page_address(page); struct bio_vec *bvl; int i; + int page_offset; - for (;bio && bio->bi_sector < sector+STRIPE_SECTORS; - bio = r5_next_bio(bio, sector) ) { - int page_offset; - if (bio->bi_sector >= sector) - page_offset = (signed)(bio->bi_sector - sector) * 512; - else - page_offset = (signed)(sector - bio->bi_sector) * -512; - bio_for_each_segment(bvl, bio, i) { - int len = bio_iovec_idx(bio,i)->bv_len; - int clen; - int b_offset = 0; - - if (page_offset < 0) { - b_offset = -page_offset; - page_offset += b_offset; - len -= b_offset; - } - - if (len > 0 && page_offset + len > STRIPE_SIZE) - clen = STRIPE_SIZE - page_offset; - else clen = len; + if (bio->bi_sector >= sector) + page_offset = (signed)(bio->bi_sector - sector) * 512; + else + page_offset = (signed)(sector - bio->bi_sector) * -512; + bio_for_each_segment(bvl, bio, i) { + int len = bio_iovec_idx(bio,i)->bv_len; + int clen; + int b_offset = 0; + + if (page_offset < 0) { + b_offset = -page_offset; + page_offset += b_offset; + len -= b_offset; + } + + if (len > 0 && page_offset + len > STRIPE_SIZE) + clen = STRIPE_SIZE - page_offset; + else clen = len; - if (clen > 0) { - char *ba = __bio_kmap_atomic(bio, i, KM_USER0); - if (frombio) - memcpy(pa+page_offset, ba+b_offset, clen); - else - memcpy(ba+b_offset, pa+page_offset, clen); - __bio_kunmap_atomic(ba, KM_USER0); - } - if (clen < len) /* hit end of page */ - break; - page_offset += len; + if (clen > 0) { + char *ba = __bio_kmap_atomic(bio, i, KM_USER0); + if (frombio) + memcpy(pa+page_offset, ba+b_offset, clen); + else + memcpy(ba+b_offset, pa+page_offset, clen); + __bio_kunmap_atomic(ba, KM_USER0); } + if (clen < len) /* hit end of page */ + break; + page_offset += len; } } @@ -725,6 +723,10 @@ ptr[count++] = page_address(sh->dev[i].page); chosen = sh->dev[i].towrite; sh->dev[i].towrite = NULL; + + if (test_and_clear_bit(R5_Overlap, &sh->dev[i].flags)) + wake_up(&conf->wait_for_overlap); + if (sh->dev[i].written) BUG(); sh->dev[i].written = chosen; check_xor(); @@ -737,6 +739,10 @@ if (i!=pd_idx && sh->dev[i].towrite) { chosen = sh->dev[i].towrite; sh->dev[i].towrite = NULL; + + if (test_and_clear_bit(R5_Overlap, &sh->dev[i].flags)) + wake_up(&conf->wait_for_overlap); + if (sh->dev[i].written) BUG(); sh->dev[i].written = chosen; } @@ -793,7 +799,7 @@ * toread/towrite point to the first in a chain. * The bi_next chain must be in order. */ -static void add_stripe_bio (struct stripe_head *sh, struct bio *bi, int dd_idx, int forwrite) +static int add_stripe_bio(struct stripe_head *sh, struct bio *bi, int dd_idx, int forwrite) { struct bio **bip; raid5_conf_t *conf = sh->raid_conf; @@ -810,10 +816,13 @@ else bip = &sh->dev[dd_idx].toread; while (*bip && (*bip)->bi_sector < bi->bi_sector) { - BUG_ON((*bip)->bi_sector + ((*bip)->bi_size >> 9) > bi->bi_sector); + if ((*bip)->bi_sector + ((*bip)->bi_size >> 9) > bi->bi_sector) + goto overlap; bip = & (*bip)->bi_next; } -/* FIXME do I need to worry about overlapping bion */ + if (*bip && (*bip)->bi_sector < bi->bi_sector + ((bi->bi_size)>>9)) + goto overlap; + if (*bip && bi->bi_next && (*bip) != bi->bi_next) BUG(); if (*bip) @@ -828,7 +837,7 @@ (unsigned long long)sh->sector, dd_idx); if (forwrite) { - /* check if page is coverred */ + /* check if page is covered */ sector_t sector = sh->dev[dd_idx].sector; for (bi=sh->dev[dd_idx].towrite; sector < sh->dev[dd_idx].sector + STRIPE_SECTORS && @@ -840,6 +849,13 @@ if (sector >= sh->dev[dd_idx].sector + STRIPE_SECTORS) set_bit(R5_OVERWRITE, &sh->dev[dd_idx].flags); } + return 1; + + overlap: + set_bit(R5_Overlap, &sh->dev[dd_idx].flags); + spin_unlock_irq(&conf->device_lock); + spin_unlock(&sh->lock); + return 0; } @@ -900,6 +916,8 @@ spin_lock_irq(&conf->device_lock); rbi = dev->toread; dev->toread = NULL; + if (test_and_clear_bit(R5_Overlap, &dev->flags)) + wake_up(&conf->wait_for_overlap); spin_unlock_irq(&conf->device_lock); while (rbi && rbi->bi_sector < dev->sector + STRIPE_SECTORS) { copy_data(0, rbi, dev->page, dev->sector); @@ -947,6 +965,9 @@ sh->dev[i].towrite = NULL; if (bi) to_write--; + if (test_and_clear_bit(R5_Overlap, &sh->dev[i].flags)) + wake_up(&conf->wait_for_overlap); + while (bi && bi->bi_sector < sh->dev[i].sector + STRIPE_SECTORS){ struct bio *nextbi = r5_next_bio(bi, sh->dev[i].sector); clear_bit(BIO_UPTODATE, &bi->bi_flags); @@ -975,6 +996,8 @@ if (!test_bit(R5_Insync, &sh->dev[i].flags)) { bi = sh->dev[i].toread; sh->dev[i].toread = NULL; + if (test_and_clear_bit(R5_Overlap, &sh->dev[i].flags)) + wake_up(&conf->wait_for_overlap); if (bi) to_read--; while (bi && bi->bi_sector < sh->dev[i].sector + STRIPE_SECTORS){ struct bio *nextbi = r5_next_bio(bi, sh->dev[i].sector); @@ -1266,6 +1289,7 @@ bi->bi_sector = sh->sector + rdev->data_offset; bi->bi_flags = 1 << BIO_UPTODATE; bi->bi_vcnt = 1; + bi->bi_max_vecs = 1; bi->bi_idx = 0; bi->bi_io_vec = &sh->dev[i].vec; bi->bi_io_vec[0].bv_len = STRIPE_SIZE; @@ -1402,6 +1426,7 @@ if ( bio_data_dir(bi) == WRITE ) md_write_start(mddev); for (;logical_sector < last_sector; logical_sector += STRIPE_SECTORS) { + DEFINE_WAIT(w); new_sector = raid5_compute_sector(logical_sector, raid_disks, data_disks, &dd_idx, &pd_idx, conf); @@ -1410,17 +1435,28 @@ (unsigned long long)new_sector, (unsigned long long)logical_sector); + retry: + prepare_to_wait(&conf->wait_for_overlap, &w, TASK_UNINTERRUPTIBLE); sh = get_active_stripe(conf, new_sector, pd_idx, (bi->bi_rw&RWA_MASK)); if (sh) { - - add_stripe_bio(sh, bi, dd_idx, (bi->bi_rw&RW_MASK)); - + if (!add_stripe_bio(sh, bi, dd_idx, (bi->bi_rw&RW_MASK))) { + /* Add failed due to overlap. Flush everything + * and wait a while + */ + raid5_unplug_device(mddev->queue); + release_stripe(sh); + schedule(); + goto retry; + } + finish_wait(&conf->wait_for_overlap, &w); raid5_plug_device(conf); handle_stripe(sh); release_stripe(sh); + } else { /* cannot get stripe for read-ahead, just give-up */ clear_bit(BIO_UPTODATE, &bi->bi_flags); + finish_wait(&conf->wait_for_overlap, &w); break; } @@ -1568,6 +1604,7 @@ spin_lock_init(&conf->device_lock); init_waitqueue_head(&conf->wait_for_stripe); + init_waitqueue_head(&conf->wait_for_overlap); INIT_LIST_HEAD(&conf->handle_list); INIT_LIST_HEAD(&conf->delayed_list); INIT_LIST_HEAD(&conf->inactive_list); diff -urN linux-2.6.11-rc3/drivers/md/raid6main.c linux-2.6.11-rc4/drivers/md/raid6main.c --- linux-2.6.11-rc3/drivers/md/raid6main.c 2005-02-12 19:50:38.023854130 -0800 +++ linux-2.6.11-rc4/drivers/md/raid6main.c 2005-02-12 19:50:57.230685634 -0800 @@ -54,7 +54,7 @@ * This macro is used to determine the 'next' bio in the list, given the sector * of the current stripe+device */ -#define r5_next_bio(bio, sect) ( ( bio->bi_sector + (bio->bi_size>>9) < sect + STRIPE_SECTORS) ? bio->bi_next : NULL) +#define r5_next_bio(bio, sect) ( ( (bio)->bi_sector + ((bio)->bi_size>>9) < sect + STRIPE_SECTORS) ? (bio)->bi_next : NULL) /* * The following can be used to debug the driver */ @@ -478,6 +478,7 @@ bio_init(&dev->req); dev->req.bi_io_vec = &dev->vec; dev->req.bi_vcnt++; + dev->req.bi_max_vecs++; dev->vec.bv_page = dev->page; dev->vec.bv_len = STRIPE_SIZE; dev->vec.bv_offset = 0; @@ -670,41 +671,38 @@ char *pa = page_address(page); struct bio_vec *bvl; int i; + int page_offset; - for (;bio && bio->bi_sector < sector+STRIPE_SECTORS; - bio = r5_next_bio(bio, sector) ) { - int page_offset; - if (bio->bi_sector >= sector) - page_offset = (signed)(bio->bi_sector - sector) * 512; - else - page_offset = (signed)(sector - bio->bi_sector) * -512; - bio_for_each_segment(bvl, bio, i) { - int len = bio_iovec_idx(bio,i)->bv_len; - int clen; - int b_offset = 0; - - if (page_offset < 0) { - b_offset = -page_offset; - page_offset += b_offset; - len -= b_offset; - } - - if (len > 0 && page_offset + len > STRIPE_SIZE) - clen = STRIPE_SIZE - page_offset; - else clen = len; - - if (clen > 0) { - char *ba = __bio_kmap_atomic(bio, i, KM_USER0); - if (frombio) - memcpy(pa+page_offset, ba+b_offset, clen); - else - memcpy(ba+b_offset, pa+page_offset, clen); - __bio_kunmap_atomic(ba, KM_USER0); - } - if (clen < len) /* hit end of page */ - break; - page_offset += len; + if (bio->bi_sector >= sector) + page_offset = (signed)(bio->bi_sector - sector) * 512; + else + page_offset = (signed)(sector - bio->bi_sector) * -512; + bio_for_each_segment(bvl, bio, i) { + int len = bio_iovec_idx(bio,i)->bv_len; + int clen; + int b_offset = 0; + + if (page_offset < 0) { + b_offset = -page_offset; + page_offset += b_offset; + len -= b_offset; + } + + if (len > 0 && page_offset + len > STRIPE_SIZE) + clen = STRIPE_SIZE - page_offset; + else clen = len; + + if (clen > 0) { + char *ba = __bio_kmap_atomic(bio, i, KM_USER0); + if (frombio) + memcpy(pa+page_offset, ba+b_offset, clen); + else + memcpy(ba+b_offset, pa+page_offset, clen); + __bio_kunmap_atomic(ba, KM_USER0); } + if (clen < len) /* hit end of page */ + break; + page_offset += len; } } @@ -738,6 +736,10 @@ if ( i != pd_idx && i != qd_idx && sh->dev[i].towrite ) { chosen = sh->dev[i].towrite; sh->dev[i].towrite = NULL; + + if (test_and_clear_bit(R5_Overlap, &sh->dev[i].flags)) + wake_up(&conf->wait_for_overlap); + if (sh->dev[i].written) BUG(); sh->dev[i].written = chosen; } @@ -900,7 +902,7 @@ * toread/towrite point to the first in a chain. * The bi_next chain must be in order. */ -static void add_stripe_bio (struct stripe_head *sh, struct bio *bi, int dd_idx, int forwrite) +static int add_stripe_bio(struct stripe_head *sh, struct bio *bi, int dd_idx, int forwrite) { struct bio **bip; raid6_conf_t *conf = sh->raid_conf; @@ -917,10 +919,13 @@ else bip = &sh->dev[dd_idx].toread; while (*bip && (*bip)->bi_sector < bi->bi_sector) { - BUG_ON((*bip)->bi_sector + ((*bip)->bi_size >> 9) > bi->bi_sector); - bip = & (*bip)->bi_next; + if ((*bip)->bi_sector + ((*bip)->bi_size >> 9) > bi->bi_sector) + goto overlap; + bip = &(*bip)->bi_next; } -/* FIXME do I need to worry about overlapping bion */ + if (*bip && (*bip)->bi_sector < bi->bi_sector + ((bi->bi_size)>>9)) + goto overlap; + if (*bip && bi->bi_next && (*bip) != bi->bi_next) BUG(); if (*bip) @@ -935,7 +940,7 @@ (unsigned long long)sh->sector, dd_idx); if (forwrite) { - /* check if page is coverred */ + /* check if page is covered */ sector_t sector = sh->dev[dd_idx].sector; for (bi=sh->dev[dd_idx].towrite; sector < sh->dev[dd_idx].sector + STRIPE_SECTORS && @@ -947,6 +952,13 @@ if (sector >= sh->dev[dd_idx].sector + STRIPE_SECTORS) set_bit(R5_OVERWRITE, &sh->dev[dd_idx].flags); } + return 1; + + overlap: + set_bit(R5_Overlap, &sh->dev[dd_idx].flags); + spin_unlock_irq(&conf->device_lock); + spin_unlock(&sh->lock); + return 0; } @@ -1010,6 +1022,8 @@ spin_lock_irq(&conf->device_lock); rbi = dev->toread; dev->toread = NULL; + if (test_and_clear_bit(R5_Overlap, &dev->flags)) + wake_up(&conf->wait_for_overlap); spin_unlock_irq(&conf->device_lock); while (rbi && rbi->bi_sector < dev->sector + STRIPE_SECTORS) { copy_data(0, rbi, dev->page, dev->sector); @@ -1059,6 +1073,9 @@ sh->dev[i].towrite = NULL; if (bi) to_write--; + if (test_and_clear_bit(R5_Overlap, &sh->dev[i].flags)) + wake_up(&conf->wait_for_overlap); + while (bi && bi->bi_sector < sh->dev[i].sector + STRIPE_SECTORS){ struct bio *nextbi = r5_next_bio(bi, sh->dev[i].sector); clear_bit(BIO_UPTODATE, &bi->bi_flags); @@ -1087,6 +1104,8 @@ if (!test_bit(R5_Insync, &sh->dev[i].flags)) { bi = sh->dev[i].toread; sh->dev[i].toread = NULL; + if (test_and_clear_bit(R5_Overlap, &sh->dev[i].flags)) + wake_up(&conf->wait_for_overlap); if (bi) to_read--; while (bi && bi->bi_sector < sh->dev[i].sector + STRIPE_SECTORS){ struct bio *nextbi = r5_next_bio(bi, sh->dev[i].sector); @@ -1429,6 +1448,7 @@ bi->bi_sector = sh->sector + rdev->data_offset; bi->bi_flags = 1 << BIO_UPTODATE; bi->bi_vcnt = 1; + bi->bi_max_vecs = 1; bi->bi_idx = 0; bi->bi_io_vec = &sh->dev[i].vec; bi->bi_io_vec[0].bv_len = STRIPE_SIZE; @@ -1566,6 +1586,7 @@ if ( bio_data_dir(bi) == WRITE ) md_write_start(mddev); for (;logical_sector < last_sector; logical_sector += STRIPE_SECTORS) { + DEFINE_WAIT(w); new_sector = raid6_compute_sector(logical_sector, raid_disks, data_disks, &dd_idx, &pd_idx, conf); @@ -1574,17 +1595,27 @@ (unsigned long long)new_sector, (unsigned long long)logical_sector); + retry: + prepare_to_wait(&conf->wait_for_overlap, &w, TASK_UNINTERRUPTIBLE); sh = get_active_stripe(conf, new_sector, pd_idx, (bi->bi_rw&RWA_MASK)); if (sh) { - - add_stripe_bio(sh, bi, dd_idx, (bi->bi_rw&RW_MASK)); - + if (!add_stripe_bio(sh, bi, dd_idx, (bi->bi_rw&RW_MASK))) { + /* Add failed due to overlap. Flush everything + * and wait a while + */ + raid6_unplug_device(mddev->queue); + release_stripe(sh); + schedule(); + goto retry; + } + finish_wait(&conf->wait_for_overlap, &w); raid6_plug_device(conf); handle_stripe(sh); release_stripe(sh); } else { /* cannot get stripe for read-ahead, just give-up */ clear_bit(BIO_UPTODATE, &bi->bi_flags); + finish_wait(&conf->wait_for_overlap, &w); break; } @@ -1732,6 +1763,7 @@ spin_lock_init(&conf->device_lock); init_waitqueue_head(&conf->wait_for_stripe); + init_waitqueue_head(&conf->wait_for_overlap); INIT_LIST_HEAD(&conf->handle_list); INIT_LIST_HEAD(&conf->delayed_list); INIT_LIST_HEAD(&conf->inactive_list); diff -urN linux-2.6.11-rc3/drivers/media/video/Kconfig linux-2.6.11-rc4/drivers/media/video/Kconfig --- linux-2.6.11-rc3/drivers/media/video/Kconfig 2005-02-12 19:50:38.093857161 -0800 +++ linux-2.6.11-rc4/drivers/media/video/Kconfig 2005-02-12 19:50:57.304688838 -0800 @@ -146,7 +146,8 @@ config VIDEO_VINO tristate "SGI Vino Video For Linux (EXPERIMENTAL)" - depends on EXPERIMENTAL && VIDEO_DEV && SGI + depends on VIDEO_DEV && I2C && SGI_IP22 && EXPERIMENTAL + select I2C_ALGO_SGI help Say Y here to build in support for the Vino video input system found on SGI Indy machines. diff -urN linux-2.6.11-rc3/drivers/media/video/tda9887.c linux-2.6.11-rc4/drivers/media/video/tda9887.c --- linux-2.6.11-rc3/drivers/media/video/tda9887.c 2005-02-12 19:50:38.154859802 -0800 +++ linux-2.6.11-rc4/drivers/media/video/tda9887.c 2005-02-12 19:50:57.347690699 -0800 @@ -305,9 +305,9 @@ printk(" B5 force mute audio: %s\n", (buf[1] & 0x20) ? "yes" : "no"); printk(" B6 output port 1 : %s\n", - (buf[1] & 0x40) ? "high" : "low"); + (buf[1] & 0x40) ? "high (inactive)" : "low (active)"); printk(" B7 output port 2 : %s\n", - (buf[1] & 0x80) ? "high" : "low"); + (buf[1] & 0x80) ? "high (inactive)" : "low (active)"); printk(PREFIX "write: byte C 0x%02x\n",buf[2]); printk(" C0-4 top adjustment : %s dB\n", adjust[buf[2] & 0x1f]); @@ -545,19 +545,24 @@ int rc; memset(buf,0,sizeof(buf)); + tda9887_set_tvnorm(t,buf); buf[1] |= cOutputPort1Inactive; buf[1] |= cOutputPort2Inactive; - tda9887_set_tvnorm(t,buf); if (UNSET != t->pinnacle_id) { tda9887_set_pinnacle(t,buf); } tda9887_set_config(t,buf); tda9887_set_insmod(t,buf); +#if 0 + /* This as-is breaks some cards, must be fixed in a + * card-specific way, probably using TDA9887_SET_CONFIG to + * turn on/off port2 */ if (t->std & V4L2_STD_SECAM_L) { /* secam fixup (FIXME: move this to tvnorms array?) */ buf[1] &= ~cOutputPort2Inactive; } +#endif dprintk(PREFIX "writing: b=0x%02x c=0x%02x e=0x%02x\n", buf[1],buf[2],buf[3]); diff -urN linux-2.6.11-rc3/drivers/media/video/vino.c linux-2.6.11-rc4/drivers/media/video/vino.c --- linux-2.6.11-rc3/drivers/media/video/vino.c 2004-12-24 13:34:30.000000000 -0800 +++ linux-2.6.11-rc4/drivers/media/video/vino.c 2005-02-12 19:50:57.357691132 -0800 @@ -1,267 +1,347 @@ -/* $Id: vino.c,v 1.5 1999/10/09 00:01:14 ralf Exp $ - * drivers/char/vino.c +/* + * (incomplete) Driver for the VINO (Video In No Out) system found in SGI Indys. * - * (incomplete) Driver for the Vino Video input system found in SGI Indys. + * This file is subject to the terms and conditions of the GNU General Public + * License version 2 as published by the Free Software Foundation. * - * Copyright (C) 1999 Ulf Carlsson (ulfc@bun.falkenberg.se) - * - * This isn't complete yet, please don't expect any video until I've written - * some more code. + * Copyright (C) 2003 Ladislav Michl */ #include #include #include #include +#include +#include #include +#include +#include #include +#include +#include #include #include +#include +#include +#include +#include +#include +#include +#include #include "vino.h" +/* debugging? */ +#if 1 +#define DEBUG(x...) printk(x); +#else +#define DEBUG(x...) +#endif + + +/* VINO ASIC registers */ +struct sgi_vino *vino; + +static const char *vinostr = "VINO IndyCam/TV"; +static int threshold_a = 512; +static int threshold_b = 512; + struct vino_device { struct video_device vdev; +#define VINO_CHAN_A 1 +#define VINO_CHAN_B 2 + int chan; +}; - unsigned long chan; -#define VINO_CHAN_A 0 -#define VINO_CHAN_B 1 - - unsigned long flags; -#define VINO_DMA_ACTIVE (1<<0) +struct vino_client { + struct i2c_client *driver; + int owner; }; -/* We can actually receive TV and IndyCam input at the same time. Believe it or - * not.. - */ -static struct vino_device vino[2]; +struct vino_video { + struct vino_device chA; + struct vino_device chB; + + struct vino_client decoder; + struct vino_client camera; + + struct semaphore input_lock; + + /* Loaded into VINO descriptors to clear End Of Descriptors table + * interupt condition */ + unsigned long dummy_page; + unsigned int dummy_buf[4] __attribute__((aligned(8))); +}; -/* Those registers have to be accessed by either *one* 64 bit write or *one* 64 - * bit read. We need some asm to fix this. We can't use mips3 as standard - * because we just save 32 bits at context switch. - */ +static struct vino_video *Vino; -static __inline__ unsigned long long vino_reg_read(unsigned long addr) +unsigned i2c_vino_getctrl(void *data) { - unsigned long long ret __attribute__ ((aligned (64))); - unsigned long virt_addr = KSEG1ADDR(addr + VINO_BASE); - unsigned long flags; - - save_and_cli(flags); - __asm__ __volatile__( - ".set\tmips3\n\t" - ".set\tnoat\n\t" - "ld\t$1,(%0)\n\t" - "sd\t$1,(%1)\n\t" - ".set\tat\n\t" - ".set\tmips0" - : - :"r" (virt_addr), - "r" (&ret) - :"$1"); - restore_flags(flags); - - return ret; + return vino->i2c_control; } -static __inline__ void vino_reg_write(unsigned long long value, - unsigned long addr) +void i2c_vino_setctrl(void *data, unsigned val) { - unsigned long virt_addr = KSEG1ADDR(addr + VINO_BASE); - unsigned long flags; + vino->i2c_control = val; +} - /* we might lose the upper parts of the registers which are not saved - * if there comes an interrupt in our way, play safe */ +unsigned i2c_vino_rdata(void *data) +{ + return vino->i2c_data; +} - save_and_cli(flags); - __asm__ __volatile__( - ".set\tmips3\n\t" - ".set\tnoat\n\t" - "ld\t$1,(%0)\n\t" - "sd\t$1,(%1)\n\t" - ".set\tat\n\t" - ".set\tmips0" - : - :"r" (&value), - "r" (virt_addr) - :"$1"); - restore_flags(flags); -} - -static __inline__ void vino_reg_and(unsigned long long value, - unsigned long addr) -{ - unsigned long virt_addr = KSEG1ADDR(addr + VINO_BASE); - unsigned long flags; - - save_and_cli(flags); - __asm__ __volatile__( - ".set\tmips3\n\t" - ".set\tnoat\n\t" - "ld\t$1,(%0)\n\t" - "ld\t$2,(%1)\n\t" - "and\t$1,$1,$2\n\t" - "sd\t$1,(%0)\n\t" - ".set\tat\n\t" - ".set\tmips0" - : - :"r" (virt_addr), - "r" (&value) - :"$1","$2"); - restore_flags(flags); -} - -static __inline__ void vino_reg_or(unsigned long long value, - unsigned long addr) -{ - unsigned long virt_addr = KSEG1ADDR(addr + VINO_BASE); - unsigned long flags; - - save_and_cli(flags); - __asm__ __volatile__( - ".set\tmips3\n\t" - ".set\tnoat\n\t" - "ld\t$1,(%0)\n\t" - "ld\t$2,(%1)\n\t" - "or\t$1,$1,$2\n\t" - "sd\t$1,(%0)\n\t" - ".set\tat\n\t" - ".set\tmips0" - : - :"r" (virt_addr), - "r" (&value) - :"$1","$2"); - restore_flags(flags); +void i2c_vino_wdata(void *data, unsigned val) +{ + vino->i2c_data = val; } -static int vino_dma_setup(void) +static struct i2c_algo_sgi_data i2c_sgi_vino_data = { - return 0; + .getctrl = &i2c_vino_getctrl, + .setctrl = &i2c_vino_setctrl, + .rdata = &i2c_vino_rdata, + .wdata = &i2c_vino_wdata, + .xfer_timeout = 200, + .ack_timeout = 1000, +}; + +/* + * There are two possible clients on VINO I2C bus, so we limit usage only + * to them. + */ +static int i2c_vino_client_reg(struct i2c_client *client) +{ + int res = 0; + + down(&Vino->input_lock); + switch (client->driver->id) { + case I2C_DRIVERID_SAA7191: + if (Vino->decoder.driver) + res = -EBUSY; + else + Vino->decoder.driver = client; + break; + case I2C_DRIVERID_INDYCAM: + if (Vino->camera.driver) + res = -EBUSY; + else + Vino->camera.driver = client; + break; + default: + res = -ENODEV; + } + up(&Vino->input_lock); + + return res; } -static void vino_dma_stop(void) +static int i2c_vino_client_unreg(struct i2c_client *client) { + int res = 0; + + down(&Vino->input_lock); + if (client == Vino->decoder.driver) { + if (Vino->decoder.owner) + res = -EBUSY; + else + Vino->decoder.driver = NULL; + } else if (client == Vino->camera.driver) { + if (Vino->camera.owner) + res = -EBUSY; + else + Vino->camera.driver = NULL; + } + up(&Vino->input_lock); + return res; } -static int vino_init(void) +static struct i2c_adapter vino_i2c_adapter = { - unsigned long ret; - unsigned short rev, id; - unsigned long long foo; - unsigned long *bar; - - bar = (unsigned long *) &foo; - - ret = vino_reg_read(VINO_REVID); - - rev = (ret & VINO_REVID_REV_MASK); - id = (ret & VINO_REVID_ID_MASK) >> 4; - - printk("Vino: ID:%02hx Rev:%02hx\n", id, rev); - - foo = vino_reg_read(VINO_A_DESC_DATA0); - printk("0x%lx", bar[0]); - printk("%lx ", bar[1]); - foo = vino_reg_read(VINO_A_DESC_DATA1); - printk("0x%lx", bar[0]); - printk("%lx ", bar[1]); - foo = vino_reg_read(VINO_A_DESC_DATA2); - printk("0x%lx", bar[0]); - printk("%lx ", bar[1]); - foo = vino_reg_read(VINO_A_DESC_DATA3); - printk("0x%lx", bar[0]); - printk("%lx\n", bar[1]); - foo = vino_reg_read(VINO_B_DESC_DATA0); - printk("0x%lx", bar[0]); - printk("%lx ", bar[1]); - foo = vino_reg_read(VINO_B_DESC_DATA1); - printk("0x%lx", bar[0]); - printk("%lx ", bar[1]); - foo = vino_reg_read(VINO_B_DESC_DATA2); - printk("0x%lx", bar[0]); - printk("%lx ", bar[1]); - foo = vino_reg_read(VINO_B_DESC_DATA3); - printk("0x%lx", bar[0]); - printk("%lx\n", bar[1]); + .name = "VINO I2C bus", + .id = I2C_HW_SGI_VINO, + .algo_data = &i2c_sgi_vino_data, + .client_register = &i2c_vino_client_reg, + .client_unregister = &i2c_vino_client_unreg, +}; - return 0; +static int vino_i2c_add_bus(void) +{ + return i2c_sgi_add_bus(&vino_i2c_adapter); } -static void vino_dma_go(struct vino_device *v) +static int vino_i2c_del_bus(void) { - + return i2c_sgi_del_bus(&vino_i2c_adapter); } -/* Reset the vino back to default state */ -static void vino_setup(struct vino_device *v) +static void vino_interrupt(int irq, void *dev_id, struct pt_regs *regs) { - } static int vino_open(struct video_device *dev, int flags) { + struct vino_device *videv = (struct vino_device *)dev; + return 0; } static void vino_close(struct video_device *dev) { + struct vino_device *videv = (struct vino_device *)dev; } -static int vino_ioctl(struct video_device *dev, unsigned int cmd, void *arg) +static int vino_mmap(struct video_device *dev, const char *adr, + unsigned long size) { - return 0; + struct vino_device *videv = (struct vino_device *)dev; + + return -EINVAL; } -static int vino_mmap(struct video_device *dev, const char *adr, - unsigned long size) +static int vino_ioctl(struct video_device *dev, unsigned int cmd, void *arg) { - return 0; + struct vino_device *videv = (struct vino_device *)dev; + + return -EINVAL; } -static struct video_device vino_dev = { +static const struct video_device vino_device = { .owner = THIS_MODULE, - .name = "Vino IndyCam/TV", - .type = VID_TYPE_CAPTURE, + .type = VID_TYPE_CAPTURE | VID_TYPE_SUBCAPTURE, .hardware = VID_HARDWARE_VINO, + .name = "VINO", .open = vino_open, .close = vino_close, .ioctl = vino_ioctl, .mmap = vino_mmap, }; -int __init init_vino(struct video_device *dev) +static int __init vino_init(void) { - int err; + unsigned long rev; + int i, ret = 0; - err = vino_init(); - if (err) - return err; + /* VINO is Indy specific beast */ + if (ip22_is_fullhouse()) + return -ENODEV; -#if 0 - if (video_register_device(&vinodev, VFL_TYPE_GRABBER) == -1) { + /* + * VINO is in the EISA address space, so the sysid register will tell + * us if the EISA_PRESENT pin on MC has been pulled low. + * + * If EISA_PRESENT is not set we definitely don't have a VINO equiped + * system. + */ + if (!(sgimc->systemid & SGIMC_SYSID_EPRESENT)) { + printk(KERN_ERR "VINO not found\n"); return -ENODEV; } -#endif - return 0; -} + vino = (struct sgi_vino *)ioremap(VINO_BASE, sizeof(struct sgi_vino)); + if (!vino) + return -EIO; + + /* Okay, once we know that VINO is present we'll read its revision + * safe way. One never knows... */ + if (get_dbe(rev, &(vino->rev_id))) { + printk(KERN_ERR "VINO: failed to read revision register\n"); + ret = -ENODEV; + goto out_unmap; + } + if (VINO_ID_VALUE(rev) != VINO_CHIP_ID) { + printk(KERN_ERR "VINO is not VINO (Rev/ID: 0x%04lx)\n", rev); + ret = -ENODEV; + goto out_unmap; + } + printk(KERN_INFO "VINO Rev: 0x%02lx\n", VINO_REV_NUM(rev)); -#ifdef MODULE -int init_module(void) -{ - int err; + Vino = (struct vino_video *) + kmalloc(sizeof(struct vino_video), GFP_KERNEL); + if (!Vino) { + ret = -ENOMEM; + goto out_unmap; + } + + Vino->dummy_page = get_zeroed_page(GFP_KERNEL | GFP_DMA); + if (!Vino->dummy_page) { + ret = -ENOMEM; + goto out_free_vino; + } + for (i = 0; i < 4; i++) + Vino->dummy_buf[i] = PHYSADDR(Vino->dummy_page); + + vino->control = 0; + /* prevent VINO from throwing spurious interrupts */ + vino->a.next_4_desc = PHYSADDR(Vino->dummy_buf); + vino->b.next_4_desc = PHYSADDR(Vino->dummy_buf); + udelay(5); + vino->intr_status = 0; + /* set threshold level */ + vino->a.fifo_thres = threshold_a; + vino->b.fifo_thres = threshold_b; + + init_MUTEX(&Vino->input_lock); + + if (request_irq(SGI_VINO_IRQ, vino_interrupt, 0, vinostr, NULL)) { + printk(KERN_ERR "VINO: irq%02d registration failed\n", + SGI_VINO_IRQ); + ret = -EAGAIN; + goto out_free_page; + } - err = vino_init(); - if (err) - return err; + ret = vino_i2c_add_bus(); + if (ret) { + printk(KERN_ERR "VINO: I2C bus registration failed\n"); + goto out_free_irq; + } + + if (video_register_device(&Vino->chA.vdev, VFL_TYPE_GRABBER, -1) < 0) { + printk("%s, chnl %d: device registration failed.\n", + Vino->chA.vdev.name, Vino->chA.chan); + ret = -EINVAL; + goto out_i2c_del_bus; + } + if (video_register_device(&Vino->chB.vdev, VFL_TYPE_GRABBER, -1) < 0) { + printk("%s, chnl %d: device registration failed.\n", + Vino->chB.vdev.name, Vino->chB.chan); + ret = -EINVAL; + goto out_unregister_vdev; + } return 0; + +out_unregister_vdev: + video_unregister_device(&Vino->chA.vdev); +out_i2c_del_bus: + vino_i2c_del_bus(); +out_free_irq: + free_irq(SGI_VINO_IRQ, NULL); +out_free_page: + free_page(Vino->dummy_page); +out_free_vino: + kfree(Vino); +out_unmap: + iounmap(vino); + + return ret; } -void cleanup_module(void) +static void __exit vino_exit(void) { + video_unregister_device(&Vino->chA.vdev); + video_unregister_device(&Vino->chB.vdev); + vino_i2c_del_bus(); + free_irq(SGI_VINO_IRQ, NULL); + free_page(Vino->dummy_page); + kfree(Vino); + iounmap(vino); } -#endif + +module_init(vino_init); +module_exit(vino_exit); + +MODULE_DESCRIPTION("Video4Linux driver for SGI Indy VINO (IndyCam)"); +MODULE_LICENSE("GPL"); diff -urN linux-2.6.11-rc3/drivers/media/video/vino.h linux-2.6.11-rc4/drivers/media/video/vino.h --- linux-2.6.11-rc3/drivers/media/video/vino.h 2004-12-24 13:33:50.000000000 -0800 +++ linux-2.6.11-rc4/drivers/media/video/vino.h 2005-02-12 19:50:57.358691175 -0800 @@ -1,64 +1,84 @@ /* - * Copyright (C) 1999 Ulf Carlsson (ulfc@bun.falkenberg.se) - * Copyright (C) 2001 Ralf Baechle (ralf@gnu.org) + * Copyright (C) 1999 Ulf Karlsson + * Copyright (C) 2003 Ladislav Michl */ -#define VINO_BASE 0x00080000 /* In EISA address space */ +#ifndef VINO_H +#define VINO_H -#define VINO_REVID 0x0000 -#define VINO_CTRL 0x0008 -#define VINO_INTSTAT 0x0010 /* Interrupt status */ -#define VINO_I2C_CTRL 0x0018 -#define VINO_I2C_DATA 0x0020 -#define VINO_A_ALPHA 0x0028 /* Channel A ... */ -#define VINO_A_CLIPS 0x0030 /* Clipping start */ -#define VINO_A_CLIPE 0x0038 /* Clipping end */ -#define VINO_A_FRAMERT 0x0040 /* Framerate */ -#define VINO_A_FLDCNT 0x0048 /* Field counter */ -#define VINO_A_LNSZ 0x0050 -#define VINO_A_LNCNT 0x0058 -#define VINO_A_PGIX 0x0060 /* Page index */ -#define VINO_A_DESC_PTR 0x0068 /* Ptr to next four descriptors */ -#define VINO_A_DESC_TLB_PTR 0x0070 /* Ptr to start of descriptor table */ -#define VINO_A_DESC_DATA0 0x0078 /* Descriptor data 0 */ -#define VINO_A_DESC_DATA1 0x0080 /* ... */ -#define VINO_A_DESC_DATA2 0x0088 -#define VINO_A_DESC_DATA3 0x0090 -#define VINO_A_FIFO_THRESHOLD 0x0098 /* FIFO threshold */ -#define VINO_A_FIFO_RP 0x00a0 -#define VINO_A_FIFO_WP 0x00a8 -#define VINO_B_ALPHA 0x00b0 /* Channel B ... */ -#define VINO_B_CLIPS 0x00b8 -#define VINO_B_CLIPE 0x00c0 -#define VINO_B_FRAMERT 0x00c8 -#define VINO_B_FLDCNT 0x00d0 -#define VINO_B_LNSZ 0x00d8 -#define VINO_B_LNCNT 0x00e0 -#define VINO_B_PGIX 0x00e8 -#define VINO_B_DESC_PTR 0x00f0 -#define VINO_B_DESC_TLB_PTR 0x00f8 -#define VINO_B_DESC_DATA0 0x0100 -#define VINO_B_DESC_DATA1 0x0108 -#define VINO_B_DESC_DATA2 0x0110 -#define VINO_B_DESC_DATA3 0x0118 -#define VINO_B_FIFO_THRESHOLD 0x0120 -#define VINO_B_FIFO_RP 0x0128 -#define VINO_B_FIFO_WP 0x0130 +#define VINO_BASE 0x00080000 /* Vino is in the EISA address space, + * but it is not an EISA bus card */ -/* Bits in the VINO_REVID register */ - -#define VINO_REVID_REV_MASK 0x000f /* bits 0:3 */ -#define VINO_REVID_ID_MASK 0x00f0 /* bits 4:7 */ - -/* Bits in the VINO_CTRL register */ +struct sgi_vino_channel { + u32 _pad_alpha; + volatile u32 alpha; + +#define VINO_CLIP_X(x) ((x) & 0x3ff) /* bits 0:9 */ +#define VINO_CLIP_ODD(x) (((x) & 0x1ff) << 10) /* bits 10:18 */ +#define VINO_CLIP_EVEN(x) (((x) & 0x1ff) << 19) /* bits 19:27 */ + u32 _pad_clip_start; + volatile u32 clip_start; + u32 _pad_clip_end; + volatile u32 clip_end; + +#define VINO_FRAMERT_PAL (1<<0) /* 0=NTSC 1=PAL */ +#define VINO_FRAMERT_RT(x) (((x) & 0x1fff) << 1) /* bits 1:12 */ + u32 _pad_frame_rate; + volatile u32 frame_rate; + + u32 _pad_field_counter; + volatile u32 field_counter; + u32 _pad_line_size; + volatile u32 line_size; + u32 _pad_line_count; + volatile u32 line_count; + u32 _pad_page_index; + volatile u32 page_index; + u32 _pad_next_4_desc; + volatile u32 next_4_desc; + u32 _pad_start_desc_tbl; + volatile u32 start_desc_tbl; + +#define VINO_DESC_JUMP (1<<30) +#define VINO_DESC_STOP (1<<31) +#define VINO_DESC_VALID (1<<32) + u32 _pad_desc_0; + volatile u32 desc_0; + u32 _pad_desc_1; + volatile u32 desc_1; + u32 _pad_desc_2; + volatile u32 desc_2; + u32 _pad_Bdesc_3; + volatile u32 desc_3; + + u32 _pad_fifo_thres; + volatile u32 fifo_thres; + u32 _pad_fifo_read; + volatile u32 fifo_read; + u32 _pad_fifo_write; + volatile u32 fifo_write; +}; + +struct sgi_vino { +#define VINO_CHIP_ID 0xb +#define VINO_REV_NUM(x) ((x) & 0x0f) +#define VINO_ID_VALUE(x) (((x) & 0xf0) >> 4) + u32 _pad_rev_id; + volatile u32 rev_id; #define VINO_CTRL_LITTLE_ENDIAN (1<<0) #define VINO_CTRL_A_FIELD_TRANS_INT (1<<1) /* Field transferred int */ #define VINO_CTRL_A_FIFO_OF_INT (1<<2) /* FIFO overflow int */ #define VINO_CTRL_A_END_DESC_TBL_INT (1<<3) /* End of desc table int */ +#define VINO_CTRL_A_INT (VINO_CTRL_A_FIELD_TRANS_INT | \ + VINO_CTRL_A_FIFO_OF_INT | \ + VINO_CTRL_A_END_DESC_TBL_INT) #define VINO_CTRL_B_FIELD_TRANS_INT (1<<4) /* Field transferred int */ #define VINO_CTRL_B_FIFO_OF_INT (1<<5) /* FIFO overflow int */ -#define VINO_CTRL_B_END_DESC_TLB_INT (1<<6) /* End of desc table int */ +#define VINO_CTRL_B_END_DESC_TBL_INT (1<<6) /* End of desc table int */ +#define VINO_CTRL_B_INT (VINO_CTRL_B_FIELD_TRANS_INT | \ + VINO_CTRL_B_FIFO_OF_INT | \ + VINO_CTRL_B_END_DESC_TBL_INT) #define VINO_CTRL_A_DMA_ENBL (1<<7) #define VINO_CTRL_A_INTERLEAVE_ENBL (1<<8) #define VINO_CTRL_A_SYNC_ENBL (1<<9) @@ -67,51 +87,45 @@ #define VINO_CTRL_A_LUMA_ONLY (1<<12) #define VINO_CTRL_A_DEC_ENBL (1<<13) /* Decimation */ #define VINO_CTRL_A_DEC_SCALE_MASK 0x1c000 /* bits 14:17 */ +#define VINO_CTRL_A_DEC_SCALE_SHIFT (14) #define VINO_CTRL_A_DEC_HOR_ONLY (1<<17) /* Horizontal only */ #define VINO_CTRL_A_DITHER (1<<18) /* 24 -> 8 bit dither */ #define VINO_CTRL_B_DMA_ENBL (1<<19) #define VINO_CTRL_B_INTERLEAVE_ENBL (1<<20) #define VINO_CTRL_B_SYNC_ENBL (1<<21) #define VINO_CTRL_B_SELECT (1<<22) /* 1=D1 0=Philips */ -#define VINO_CTRL_B_RGB (1<<22) /* 1=RGB 0=YUV */ -#define VINO_CTRL_B_LUMA_ONLY (1<<23) -#define VINO_CTRL_B_DEC_ENBL (1<<24) /* Decimation */ -#define VINO_CTRL_B_DEC_SCALE_MASK 0x1c000000 /* bits 25:28 */ +#define VINO_CTRL_B_RGB (1<<23) /* 1=RGB 0=YUV */ +#define VINO_CTRL_B_LUMA_ONLY (1<<24) +#define VINO_CTRL_B_DEC_ENBL (1<<25) /* Decimation */ +#define VINO_CTRL_B_DEC_SCALE_MASK 0x1c000000 /* bits 26:28 */ +#define VINO_CTRL_B_DEC_SCALE_SHIFT (26) #define VINO_CTRL_B_DEC_HOR_ONLY (1<<29) /* Decimation horizontal only */ #define VINO_CTRL_B_DITHER (1<<30) /* ChanB 24 -> 8 bit dither */ - -/* Bits in the Interrupt and Status register */ + u32 _pad_control; + volatile u32 control; #define VINO_INTSTAT_A_FIELD_TRANS (1<<0) /* Field transferred int */ #define VINO_INTSTAT_A_FIFO_OF (1<<1) /* FIFO overflow int */ #define VINO_INTSTAT_A_END_DESC_TBL (1<<2) /* End of desc table int */ +#define VINO_INTSTAT_A (VINO_INTSTAT_A_FIELD_TRANS | \ + VINO_INTSTAT_A_FIFO_OF | \ + VINO_INTSTAT_A_END_DESC_TBL) #define VINO_INTSTAT_B_FIELD_TRANS (1<<3) /* Field transferred int */ #define VINO_INTSTAT_B_FIFO_OF (1<<4) /* FIFO overflow int */ #define VINO_INTSTAT_B_END_DESC_TBL (1<<5) /* End of desc table int */ +#define VINO_INTSTAT_B (VINO_INTSTAT_B_FIELD_TRANS | \ + VINO_INTSTAT_B_FIFO_OF | \ + VINO_INTSTAT_B_END_DESC_TBL) + u32 _pad_intr_status; + volatile u32 intr_status; + + u32 _pad_i2c_control; + volatile u32 i2c_control; + u32 _pad_i2c_data; + volatile u32 i2c_data; + + struct sgi_vino_channel a; + struct sgi_vino_channel b; +}; -/* Bits in the Clipping Start register */ - -#define VINO_CLIPS_START 0x3ff /* bits 0:9 */ -#define VINO_CLIPS_ODD_MASK 0x7fc00 /* bits 10:18 */ -#define VINO_CLIPS_EVEN_MASK 0xff80000 /* bits 19:27 */ - -/* Bits in the Clipping End register */ - -#define VINO_CLIPE_END 0x3ff /* bits 0:9 */ -#define VINO_CLIPE_ODD_MASK 0x7fc00 /* bits 10:18 */ -#define VINO_CLIPE_EVEN_MASK 0xff80000 /* bits 19:27 */ - -/* Bits in the Frame Rate register */ - -#define VINO_FRAMERT_PAL (1<<0) /* 0=NTSC 1=PAL */ -#define VINO_FRAMERT_RT_MASK 0x1ffe /* bits 1:12 */ - -/* Bits in the VINO_I2C_CTRL */ - -#define VINO_CTRL_I2C_IDLE (1<<0) /* write: 0=force idle - * read: 0=idle 1=not idle */ -#define VINO_CTRL_I2C_DIR (1<<1) /* 0=read 1=write */ -#define VINO_CTRL_I2C_MORE_BYTES (1<<2) /* 0=last byte 1=more bytes */ -#define VINO_CTRL_I2C_TRANS_BUSY (1<<4) /* 0=trans done 1=trans busy */ -#define VINO_CTRL_I2C_ACK (1<<5) /* 0=ack received 1=ack not */ -#define VINO_CTRL_I2C_BUS_ERROR (1<<7) /* 0=no bus err 1=bus err */ +#endif diff -urN linux-2.6.11-rc3/drivers/mtd/chips/cfi_cmdset_0001.c linux-2.6.11-rc4/drivers/mtd/chips/cfi_cmdset_0001.c --- linux-2.6.11-rc3/drivers/mtd/chips/cfi_cmdset_0001.c 2005-02-12 19:50:38.356868547 -0800 +++ linux-2.6.11-rc4/drivers/mtd/chips/cfi_cmdset_0001.c 2005-02-12 19:50:57.505697540 -0800 @@ -36,10 +36,7 @@ #include /* #define CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE */ - -#ifdef CONFIG_MTD_XIP -#define CMDSET0001_DISABLE_WRITE_SUSPEND -#endif +/* #define CMDSET0001_DISABLE_WRITE_SUSPEND */ // debugging, turns off buffer write mode if set to 1 #define FORCE_WORD_WRITE 0 @@ -152,7 +149,6 @@ #endif #ifdef CMDSET0001_DISABLE_WRITE_SUSPEND -/* The XIP config appears to have problems using write suspend at the moment */ static void fixup_no_write_suspend(struct mtd_info *mtd, void* param) { struct map_info *map = mtd->priv; @@ -733,7 +729,7 @@ if (chip->priv) { struct flchip_shared *shared = chip->priv; spin_lock(&shared->lock); - if (shared->writing == chip) { + if (shared->writing == chip && chip->oldstate == FL_READY) { /* We own the ability to write, but we're done */ shared->writing = shared->erasing; if (shared->writing && shared->writing != chip) { @@ -745,17 +741,24 @@ put_chip(map, loaner, loaner->start); spin_lock(chip->mutex); spin_unlock(loaner->mutex); - } else { - if (chip->oldstate != FL_ERASING) { - shared->erasing = NULL; - if (chip->oldstate != FL_WRITING) - shared->writing = NULL; - } - spin_unlock(&shared->lock); + wake_up(&chip->wq); + return; } - } else { + shared->erasing = NULL; + shared->writing = NULL; + } else if (shared->erasing == chip && shared->writing != chip) { + /* + * We own the ability to erase without the ability + * to write, which means the erase was suspended + * and some other partition is currently writing. + * Don't let the switch below mess things up since + * we don't have ownership to resume anything. + */ spin_unlock(&shared->lock); + wake_up(&chip->wq); + return; } + spin_unlock(&shared->lock); } switch(chip->oldstate) { diff -urN linux-2.6.11-rc3/drivers/net/ibmveth.c linux-2.6.11-rc4/drivers/net/ibmveth.c --- linux-2.6.11-rc3/drivers/net/ibmveth.c 2004-12-24 13:33:47.000000000 -0800 +++ linux-2.6.11-rc4/drivers/net/ibmveth.c 2005-02-12 19:50:58.442738106 -0800 @@ -218,7 +218,8 @@ ibmveth_assert(index != IBM_VETH_INVALID_MAP); ibmveth_assert(pool->skbuff[index] == NULL); - dma_addr = vio_map_single(adapter->vdev, skb->data, pool->buff_size, DMA_FROM_DEVICE); + dma_addr = dma_map_single(&adapter->vdev->dev, skb->data, + pool->buff_size, DMA_FROM_DEVICE); pool->free_map[free_index] = IBM_VETH_INVALID_MAP; pool->dma_addr[index] = dma_addr; @@ -238,7 +239,9 @@ pool->free_map[free_index] = IBM_VETH_INVALID_MAP; pool->skbuff[index] = NULL; pool->consumer_index--; - vio_unmap_single(adapter->vdev, pool->dma_addr[index], pool->buff_size, DMA_FROM_DEVICE); + dma_unmap_single(&adapter->vdev->dev, + pool->dma_addr[index], pool->buff_size, + DMA_FROM_DEVICE); dev_kfree_skb_any(skb); adapter->replenish_add_buff_failure++; break; @@ -260,6 +263,15 @@ (atomic_read(&adapter->rx_buff_pool[2].available) < adapter->rx_buff_pool[2].threshold)); } +/* kick the replenish tasklet if we need replenishing and it isn't already running */ +static inline void ibmveth_schedule_replenishing(struct ibmveth_adapter *adapter) +{ + if(ibmveth_is_replenishing_needed(adapter) && + (atomic_dec_if_positive(&adapter->not_replenishing) == 0)) { + schedule_work(&adapter->replenish_task); + } +} + /* replenish tasklet routine */ static void ibmveth_replenish_task(struct ibmveth_adapter *adapter) { @@ -276,15 +288,6 @@ ibmveth_schedule_replenishing(adapter); } -/* kick the replenish tasklet if we need replenishing and it isn't already running */ -static inline void ibmveth_schedule_replenishing(struct ibmveth_adapter *adapter) -{ - if(ibmveth_is_replenishing_needed(adapter) && - (atomic_dec_if_positive(&adapter->not_replenishing) == 0)) { - schedule_work(&adapter->replenish_task); - } -} - /* empty and free ana buffer pool - also used to do cleanup in error paths */ static void ibmveth_free_buffer_pool(struct ibmveth_adapter *adapter, struct ibmveth_buff_pool *pool) { @@ -299,7 +302,7 @@ for(i = 0; i < pool->size; ++i) { struct sk_buff *skb = pool->skbuff[i]; if(skb) { - vio_unmap_single(adapter->vdev, + dma_unmap_single(&adapter->vdev->dev, pool->dma_addr[i], pool->buff_size, DMA_FROM_DEVICE); @@ -337,7 +340,7 @@ adapter->rx_buff_pool[pool].skbuff[index] = NULL; - vio_unmap_single(adapter->vdev, + dma_unmap_single(&adapter->vdev->dev, adapter->rx_buff_pool[pool].dma_addr[index], adapter->rx_buff_pool[pool].buff_size, DMA_FROM_DEVICE); @@ -408,7 +411,9 @@ { if(adapter->buffer_list_addr != NULL) { if(!dma_mapping_error(adapter->buffer_list_dma)) { - vio_unmap_single(adapter->vdev, adapter->buffer_list_dma, 4096, DMA_BIDIRECTIONAL); + dma_unmap_single(&adapter->vdev->dev, + adapter->buffer_list_dma, 4096, + DMA_BIDIRECTIONAL); adapter->buffer_list_dma = DMA_ERROR_CODE; } free_page((unsigned long)adapter->buffer_list_addr); @@ -417,7 +422,9 @@ if(adapter->filter_list_addr != NULL) { if(!dma_mapping_error(adapter->filter_list_dma)) { - vio_unmap_single(adapter->vdev, adapter->filter_list_dma, 4096, DMA_BIDIRECTIONAL); + dma_unmap_single(&adapter->vdev->dev, + adapter->filter_list_dma, 4096, + DMA_BIDIRECTIONAL); adapter->filter_list_dma = DMA_ERROR_CODE; } free_page((unsigned long)adapter->filter_list_addr); @@ -426,7 +433,10 @@ if(adapter->rx_queue.queue_addr != NULL) { if(!dma_mapping_error(adapter->rx_queue.queue_dma)) { - vio_unmap_single(adapter->vdev, adapter->rx_queue.queue_dma, adapter->rx_queue.queue_len, DMA_BIDIRECTIONAL); + dma_unmap_single(&adapter->vdev->dev, + adapter->rx_queue.queue_dma, + adapter->rx_queue.queue_len, + DMA_BIDIRECTIONAL); adapter->rx_queue.queue_dma = DMA_ERROR_CODE; } kfree(adapter->rx_queue.queue_addr); @@ -472,9 +482,13 @@ return -ENOMEM; } - adapter->buffer_list_dma = vio_map_single(adapter->vdev, adapter->buffer_list_addr, 4096, DMA_BIDIRECTIONAL); - adapter->filter_list_dma = vio_map_single(adapter->vdev, adapter->filter_list_addr, 4096, DMA_BIDIRECTIONAL); - adapter->rx_queue.queue_dma = vio_map_single(adapter->vdev, adapter->rx_queue.queue_addr, adapter->rx_queue.queue_len, DMA_BIDIRECTIONAL); + adapter->buffer_list_dma = dma_map_single(&adapter->vdev->dev, + adapter->buffer_list_addr, 4096, DMA_BIDIRECTIONAL); + adapter->filter_list_dma = dma_map_single(&adapter->vdev->dev, + adapter->filter_list_addr, 4096, DMA_BIDIRECTIONAL); + adapter->rx_queue.queue_dma = dma_map_single(&adapter->vdev->dev, + adapter->rx_queue.queue_addr, + adapter->rx_queue.queue_len, DMA_BIDIRECTIONAL); if((dma_mapping_error(adapter->buffer_list_dma) ) || (dma_mapping_error(adapter->filter_list_dma)) || @@ -644,7 +658,7 @@ /* map the initial fragment */ desc[0].fields.length = nfrags ? skb->len - skb->data_len : skb->len; - desc[0].fields.address = vio_map_single(adapter->vdev, skb->data, + desc[0].fields.address = dma_map_single(&adapter->vdev->dev, skb->data, desc[0].fields.length, DMA_TO_DEVICE); desc[0].fields.valid = 1; @@ -662,7 +676,7 @@ while(curfrag--) { skb_frag_t *frag = &skb_shinfo(skb)->frags[curfrag]; desc[curfrag+1].fields.address - = vio_map_single(adapter->vdev, + = dma_map_single(&adapter->vdev->dev, page_address(frag->page) + frag->page_offset, frag->size, DMA_TO_DEVICE); desc[curfrag+1].fields.length = frag->size; @@ -674,7 +688,7 @@ adapter->stats.tx_dropped++; /* Free all the mappings we just created */ while(curfrag < nfrags) { - vio_unmap_single(adapter->vdev, + dma_unmap_single(&adapter->vdev->dev, desc[curfrag+1].fields.address, desc[curfrag+1].fields.length, DMA_TO_DEVICE); @@ -714,7 +728,9 @@ } do { - vio_unmap_single(adapter->vdev, desc[nfrags].fields.address, desc[nfrags].fields.length, DMA_TO_DEVICE); + dma_unmap_single(&adapter->vdev->dev, + desc[nfrags].fields.address, + desc[nfrags].fields.length, DMA_TO_DEVICE); } while(--nfrags >= 0); dev_kfree_skb(skb); diff -urN linux-2.6.11-rc3/drivers/net/sunlance.c linux-2.6.11-rc4/drivers/net/sunlance.c --- linux-2.6.11-rc3/drivers/net/sunlance.c 2004-12-24 13:34:30.000000000 -0800 +++ linux-2.6.11-rc4/drivers/net/sunlance.c 2005-02-12 19:50:59.035763779 -0800 @@ -232,7 +232,8 @@ struct lance_private { void __iomem *lregs; /* Lance RAP/RDP regs. */ void __iomem *dregs; /* DMA controller regs. */ - struct lance_init_block *init_block; + struct lance_init_block __iomem *init_block_iomem; + struct lance_init_block *init_block_mem; spinlock_t lock; @@ -314,7 +315,7 @@ static void lance_init_ring_dvma(struct net_device *dev) { struct lance_private *lp = netdev_priv(dev); - struct lance_init_block *ib = lp->init_block; + struct lance_init_block *ib = lp->init_block_mem; dma_addr_t aib = lp->init_block_dvma; __u32 leptr; int i; @@ -371,7 +372,7 @@ static void lance_init_ring_pio(struct net_device *dev) { struct lance_private *lp = netdev_priv(dev); - struct lance_init_block *ib = lp->init_block; + struct lance_init_block __iomem *ib = lp->init_block_iomem; u32 leptr; int i; @@ -501,7 +502,7 @@ static void lance_rx_dvma(struct net_device *dev) { struct lance_private *lp = netdev_priv(dev); - struct lance_init_block *ib = lp->init_block; + struct lance_init_block *ib = lp->init_block_mem; struct lance_rx_desc *rd; u8 bits; int len, entry = lp->rx_new; @@ -564,7 +565,7 @@ static void lance_tx_dvma(struct net_device *dev) { struct lance_private *lp = netdev_priv(dev); - struct lance_init_block *ib = lp->init_block; + struct lance_init_block *ib = lp->init_block_mem; int i, j; spin_lock(&lp->lock); @@ -674,8 +675,8 @@ static void lance_rx_pio(struct net_device *dev) { struct lance_private *lp = netdev_priv(dev); - struct lance_init_block *ib = lp->init_block; - struct lance_rx_desc *rd; + struct lance_init_block __iomem *ib = lp->init_block_iomem; + struct lance_rx_desc __iomem *rd; unsigned char bits; int len, entry; struct sk_buff *skb; @@ -736,14 +737,14 @@ static void lance_tx_pio(struct net_device *dev) { struct lance_private *lp = netdev_priv(dev); - struct lance_init_block *ib = lp->init_block; + struct lance_init_block __iomem *ib = lp->init_block_iomem; int i, j; spin_lock(&lp->lock); j = lp->tx_old; for (i = j; i != lp->tx_new; i = j) { - struct lance_tx_desc *td = &ib->btx_ring [i]; + struct lance_tx_desc __iomem *td = &ib->btx_ring [i]; u8 bits = sbus_readb(&td->tmd1_bits); /* If we hit a packet not owned by us, stop */ @@ -880,15 +881,13 @@ static void build_fake_packet(struct lance_private *lp) { struct net_device *dev = lp->dev; - struct lance_init_block *ib = lp->init_block; - u16 *packet; - struct ethhdr *eth; int i, entry; entry = lp->tx_new & TX_RING_MOD_MASK; - packet = (u16 *) &(ib->tx_buf[entry][0]); - eth = (struct ethhdr *) packet; if (lp->pio_buffer) { + struct lance_init_block __iomem *ib = lp->init_block_iomem; + u16 __iomem *packet = (u16 __iomem *) &(ib->tx_buf[entry][0]); + struct ethhdr __iomem *eth = (struct ethhdr __iomem *) packet; for (i = 0; i < (ETH_ZLEN / sizeof(u16)); i++) sbus_writew(0, &packet[i]); for (i = 0; i < 6; i++) { @@ -899,6 +898,9 @@ sbus_writew(0, &ib->btx_ring[entry].misc); sbus_writeb(LE_T1_POK|LE_T1_OWN, &ib->btx_ring[entry].tmd1_bits); } else { + struct lance_init_block *ib = lp->init_block_mem; + u16 *packet = (u16 *) &(ib->tx_buf[entry][0]); + struct ethhdr *eth = (struct ethhdr *) packet; memset(packet, 0, ETH_ZLEN); for (i = 0; i < 6; i++) { eth->h_dest[i] = dev->dev_addr[i]; @@ -916,7 +918,6 @@ static int lance_open(struct net_device *dev) { struct lance_private *lp = netdev_priv(dev); - struct lance_init_block *ib = lp->init_block; int status = 0; last_dev = dev; @@ -943,10 +944,12 @@ * BTW it is common bug in all lance drivers! --ANK */ if (lp->pio_buffer) { + struct lance_init_block __iomem *ib = lp->init_block_iomem; sbus_writew(0, &ib->mode); sbus_writel(0, &ib->filter[0]); sbus_writel(0, &ib->filter[1]); } else { + struct lance_init_block *ib = lp->init_block_mem; ib->mode = 0; ib->filter [0] = 0; ib->filter [1] = 0; @@ -1113,7 +1116,6 @@ static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev) { struct lance_private *lp = netdev_priv(dev); - struct lance_init_block *ib = lp->init_block; int entry, skblen, len; skblen = skb->len; @@ -1126,6 +1128,7 @@ entry = lp->tx_new & TX_RING_MOD_MASK; if (lp->pio_buffer) { + struct lance_init_block __iomem *ib = lp->init_block_iomem; sbus_writew((-len) | 0xf000, &ib->btx_ring[entry].length); sbus_writew(0, &ib->btx_ring[entry].misc); lance_piocopy_from_skb(&ib->tx_buf[entry][0], skb->data, skblen); @@ -1133,6 +1136,7 @@ lance_piozero(&ib->tx_buf[entry][skblen], len - skblen); sbus_writeb(LE_T1_POK | LE_T1_OWN, &ib->btx_ring[entry].tmd1_bits); } else { + struct lance_init_block *ib = lp->init_block_mem; ib->btx_ring [entry].length = (-len) | 0xf000; ib->btx_ring [entry].misc = 0; memcpy((char *)&ib->tx_buf [entry][0], skb->data, skblen); @@ -1174,33 +1178,31 @@ static void lance_load_multicast(struct net_device *dev) { struct lance_private *lp = netdev_priv(dev); - struct lance_init_block *ib = lp->init_block; - u16 *mcast_table = (u16 *) &ib->filter; struct dev_mc_list *dmi = dev->mc_list; char *addrs; int i; u32 crc; + u32 val; /* set all multicast bits */ - if (dev->flags & IFF_ALLMULTI) { - if (lp->pio_buffer) { - sbus_writel(0xffffffff, &ib->filter[0]); - sbus_writel(0xffffffff, &ib->filter[1]); - } else { - ib->filter [0] = 0xffffffff; - ib->filter [1] = 0xffffffff; - } - return; - } - /* clear the multicast filter */ + if (dev->flags & IFF_ALLMULTI) + val = ~0; + else + val = 0; + if (lp->pio_buffer) { - sbus_writel(0, &ib->filter[0]); - sbus_writel(0, &ib->filter[1]); + struct lance_init_block __iomem *ib = lp->init_block_iomem; + sbus_writel(val, &ib->filter[0]); + sbus_writel(val, &ib->filter[1]); } else { - ib->filter [0] = 0; - ib->filter [1] = 0; + struct lance_init_block *ib = lp->init_block_mem; + ib->filter [0] = val; + ib->filter [1] = val; } + if (dev->flags & IFF_ALLMULTI) + return; + /* Add addresses */ for (i = 0; i < dev->mc_count; i++) { addrs = dmi->dmi_addr; @@ -1212,10 +1214,14 @@ crc = ether_crc_le(6, addrs); crc = crc >> 26; if (lp->pio_buffer) { + struct lance_init_block __iomem *ib = lp->init_block_iomem; + u16 __iomem *mcast_table = (u16 __iomem *) &ib->filter; u16 tmp = sbus_readw(&mcast_table[crc>>4]); tmp |= 1 << (crc & 0xf); sbus_writew(tmp, &mcast_table[crc>>4]); } else { + struct lance_init_block *ib = lp->init_block_mem; + u16 *mcast_table = (u16 *) &ib->filter; mcast_table [crc >> 4] |= 1 << (crc & 0xf); } } @@ -1224,7 +1230,8 @@ static void lance_set_multicast(struct net_device *dev) { struct lance_private *lp = netdev_priv(dev); - struct lance_init_block *ib = lp->init_block; + struct lance_init_block *ib_mem = lp->init_block_mem; + struct lance_init_block __iomem *ib_iomem = lp->init_block_iomem; u16 mode; if (!netif_running(dev)) @@ -1242,21 +1249,21 @@ lp->init_ring(dev); if (lp->pio_buffer) - mode = sbus_readw(&ib->mode); + mode = sbus_readw(&ib_iomem->mode); else - mode = ib->mode; + mode = ib_mem->mode; if (dev->flags & IFF_PROMISC) { mode |= LE_MO_PROM; if (lp->pio_buffer) - sbus_writew(mode, &ib->mode); + sbus_writew(mode, &ib_iomem->mode); else - ib->mode = mode; + ib_mem->mode = mode; } else { mode &= ~LE_MO_PROM; if (lp->pio_buffer) - sbus_writew(mode, &ib->mode); + sbus_writew(mode, &ib_iomem->mode); else - ib->mode = mode; + ib_mem->mode = mode; lance_load_multicast(dev); } load_csrs(lp); @@ -1275,16 +1282,14 @@ { if (lp->lregs) sbus_iounmap(lp->lregs, LANCE_REG_SIZE); - if (lp->init_block != NULL) { - if (lp->pio_buffer) { - sbus_iounmap(lp->init_block, - sizeof(struct lance_init_block)); - } else { - sbus_free_consistent(lp->sdev, - sizeof(struct lance_init_block), - lp->init_block, - lp->init_block_dvma); - } + if (lp->init_block_iomem) { + sbus_iounmap(lp->init_block_iomem, + sizeof(struct lance_init_block)); + } else if (lp->init_block_mem) { + sbus_free_consistent(lp->sdev, + sizeof(struct lance_init_block), + lp->init_block_mem, + lp->init_block_dvma); } } @@ -1326,6 +1331,7 @@ return -ENOMEM; lp = netdev_priv(dev); + memset(lp, 0, sizeof(*lp)); if (sparc_lance_debug && version_printed++ == 0) printk (KERN_INFO "%s", version); @@ -1342,17 +1348,22 @@ /* Get the IO region */ lp->lregs = sbus_ioremap(&sdev->resource[0], 0, LANCE_REG_SIZE, lancestr); - if (lp->lregs == 0UL) { + if (!lp->lregs) { printk(KERN_ERR "SunLance: Cannot map registers.\n"); goto fail; } lp->sdev = sdev; if (lebuffer) { - lp->init_block = + /* sanity check */ + if (lebuffer->resource[0].start & 7) { + printk(KERN_ERR "SunLance: ERROR: Rx and Tx rings not on even boundary.\n"); + goto fail; + } + lp->init_block_iomem = sbus_ioremap(&lebuffer->resource[0], 0, sizeof(struct lance_init_block), "lebuffer"); - if (lp->init_block == NULL) { + if (!lp->init_block_iomem) { printk(KERN_ERR "SunLance: Cannot map PIO buffer.\n"); goto fail; } @@ -1362,11 +1373,10 @@ lp->rx = lance_rx_pio; lp->tx = lance_tx_pio; } else { - lp->init_block = + lp->init_block_mem = sbus_alloc_consistent(sdev, sizeof(struct lance_init_block), &lp->init_block_dvma); - if (lp->init_block == NULL || - lp->init_block_dvma == 0) { + if (!lp->init_block_mem || lp->init_block_dvma == 0) { printk(KERN_ERR "SunLance: Cannot allocate consistent DMA memory.\n"); goto fail; } @@ -1449,13 +1459,7 @@ udelay(200); sbus_writel(csr & ~DMA_RST_ENET, lp->dregs + DMA_CSR); } else - lp->dregs = 0; - - /* This should never happen. */ - if ((unsigned long)(lp->init_block->brx_ring) & 0x07) { - printk(KERN_ERR "SunLance: ERROR: Rx and Tx rings not on even boundary.\n"); - goto fail; - } + lp->dregs = NULL; lp->dev = dev; SET_MODULE_OWNER(dev); @@ -1499,8 +1503,7 @@ return 0; fail: - if (lp != NULL) - lance_free_hwresources(lp); + lance_free_hwresources(lp); free_netdev(dev); return -ENODEV; } @@ -1539,7 +1542,7 @@ memset(&sdev, 0, sizeof(sdev)); sdev.reg_addrs[0].phys_addr = sun4_eth_physaddr; sdev.irqs[0] = 6; - return sparc_lance_init(&sdev, 0, 0); + return sparc_lance_init(&sdev, NULL, NULL); } return -ENODEV; } diff -urN linux-2.6.11-rc3/drivers/net/tg3.c linux-2.6.11-rc4/drivers/net/tg3.c --- linux-2.6.11-rc3/drivers/net/tg3.c 2005-02-12 19:50:38.952894350 -0800 +++ linux-2.6.11-rc4/drivers/net/tg3.c 2005-02-12 19:50:59.105766810 -0800 @@ -60,8 +60,8 @@ #define DRV_MODULE_NAME "tg3" #define PFX DRV_MODULE_NAME ": " -#define DRV_MODULE_VERSION "3.19" -#define DRV_MODULE_RELDATE "January 26, 2005" +#define DRV_MODULE_VERSION "3.22" +#define DRV_MODULE_RELDATE "February 11, 2005" #define TG3_DEF_MAC_MODE 0 #define TG3_DEF_RX_MODE 0 @@ -893,7 +893,7 @@ GRC_LCLCTRL_GPIO_OUTPUT1)); udelay(100); } else { - int no_gpio2; + u32 no_gpio2; u32 grc_local_ctrl; if (tp_peer != tp && @@ -901,8 +901,8 @@ return; /* On 5753 and variants, GPIO2 cannot be used. */ - no_gpio2 = (tp->nic_sram_data_cfg & - NIC_SRAM_DATA_CFG_NO_GPIO2) != 0; + no_gpio2 = tp->nic_sram_data_cfg & + NIC_SRAM_DATA_CFG_NO_GPIO2; grc_local_ctrl = GRC_LCLCTRL_GPIO_OE0 | GRC_LCLCTRL_GPIO_OE1 | @@ -914,29 +914,17 @@ GRC_LCLCTRL_GPIO_OUTPUT2); } tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl | - grc_local_ctrl); + grc_local_ctrl); udelay(100); - grc_local_ctrl = GRC_LCLCTRL_GPIO_OE0 | - GRC_LCLCTRL_GPIO_OE1 | - GRC_LCLCTRL_GPIO_OE2 | - GRC_LCLCTRL_GPIO_OUTPUT0 | - GRC_LCLCTRL_GPIO_OUTPUT1 | - GRC_LCLCTRL_GPIO_OUTPUT2; - if (no_gpio2) { - grc_local_ctrl &= ~(GRC_LCLCTRL_GPIO_OE2 | - GRC_LCLCTRL_GPIO_OUTPUT2); - } + grc_local_ctrl |= GRC_LCLCTRL_GPIO_OUTPUT0; + tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl | - grc_local_ctrl); + grc_local_ctrl); udelay(100); - grc_local_ctrl = GRC_LCLCTRL_GPIO_OE0 | - GRC_LCLCTRL_GPIO_OE1 | - GRC_LCLCTRL_GPIO_OE2 | - GRC_LCLCTRL_GPIO_OUTPUT0 | - GRC_LCLCTRL_GPIO_OUTPUT1; if (!no_gpio2) { + grc_local_ctrl &= ~GRC_LCLCTRL_GPIO_OUTPUT2; tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl | grc_local_ctrl); udelay(100); @@ -2146,8 +2134,9 @@ if (tr32(TG3PCI_DUAL_MAC_CTRL) & DUAL_MAC_CTRL_ID) port_a = 0; - serdes_cfg = tr32(MAC_SERDES_CFG) & - ((1 << 23) | (1 << 22) | (1 << 21) | (1 << 20)); + /* preserve bits 0-11,13,14 for signal pre-emphasis */ + /* preserve bits 20-23 for voltage regulator */ + serdes_cfg = tr32(MAC_SERDES_CFG) & 0x00f06fff; } sg_dig_ctrl = tr32(SG_DIG_CTRL); @@ -2158,9 +2147,9 @@ u32 val = serdes_cfg; if (port_a) - val |= 0xc010880; + val |= 0xc010000; else - val |= 0x4010880; + val |= 0x4010000; tw32_f(MAC_SERDES_CFG, val); } tw32_f(SG_DIG_CTRL, 0x01388400); @@ -2183,7 +2172,7 @@ if (sg_dig_ctrl != expected_sg_dig_ctrl) { if (workaround) - tw32_f(MAC_SERDES_CFG, serdes_cfg | 0xc011880); + tw32_f(MAC_SERDES_CFG, serdes_cfg | 0xc011000); tw32_f(SG_DIG_CTRL, expected_sg_dig_ctrl | (1 << 30)); udelay(5); tw32_f(SG_DIG_CTRL, expected_sg_dig_ctrl); @@ -2224,9 +2213,9 @@ u32 val = serdes_cfg; if (port_a) - val |= 0xc010880; + val |= 0xc010000; else - val |= 0x4010880; + val |= 0x4010000; tw32_f(MAC_SERDES_CFG, val); } @@ -2234,8 +2223,12 @@ tw32_f(SG_DIG_CTRL, 0x01388400); udelay(40); + /* Link parallel detection - link is up */ + /* only if we have PCS_SYNC and not */ + /* receiving config code words */ mac_status = tr32(MAC_STATUS); - if (mac_status & MAC_STATUS_PCS_SYNCED) { + if ((mac_status & MAC_STATUS_PCS_SYNCED) && + !(mac_status & MAC_STATUS_RCVD_CFG)) { tg3_setup_flow_control(tp, 0, 0); current_link_up = 1; } @@ -5416,8 +5409,10 @@ udelay(10); if (tp->tg3_flags2 & TG3_FLG2_PHY_SERDES) { - if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704) { + if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704) && + !(tp->tg3_flags2 & TG3_FLG2_SERDES_PREEMPHASIS)) { /* Set drive transmission level to 1.2V */ + /* only if the signal pre-emphasis bit is not set */ val = tr32(MAC_SERDES_CFG); val &= 0xfffff000; val |= 0x880; @@ -7508,11 +7503,19 @@ tg3_read_mem(tp, NIC_SRAM_DATA_SIG, &val); if (val == NIC_SRAM_DATA_SIG_MAGIC) { u32 nic_cfg, led_cfg; - u32 nic_phy_id, cfg2; + u32 nic_phy_id, ver, cfg2 = 0; tg3_read_mem(tp, NIC_SRAM_DATA_CFG, &nic_cfg); tp->nic_sram_data_cfg = nic_cfg; + tg3_read_mem(tp, NIC_SRAM_DATA_VER, &ver); + ver >>= NIC_SRAM_DATA_VER_SHIFT; + if ((GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5700) && + (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5701) && + (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5703) && + (ver > 0) && (ver < 0x100)) + tg3_read_mem(tp, NIC_SRAM_DATA_CFG_2, &cfg2); + eeprom_signature_found = 1; if ((nic_cfg & NIC_SRAM_DATA_CFG_PHY_TYPE_MASK) == @@ -7531,8 +7534,7 @@ eeprom_phy_id = 0; if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750) { - tg3_read_mem(tp, NIC_SRAM_DATA_CFG_2, &led_cfg); - led_cfg &= (NIC_SRAM_DATA_CFG_LED_MODE_MASK | + led_cfg = cfg2 & (NIC_SRAM_DATA_CFG_LED_MODE_MASK | SHASTA_EXT_LED_MODE_MASK); } else led_cfg = nic_cfg & NIC_SRAM_DATA_CFG_LED_MODE_MASK; @@ -7590,9 +7592,13 @@ if (nic_cfg & NIC_SRAM_DATA_CFG_FIBER_WOL) tp->tg3_flags |= TG3_FLAG_SERDES_WOL_CAP; - tg3_read_mem(tp, NIC_SRAM_DATA_PHY_ID, &cfg2); if (cfg2 & (1 << 17)) tp->tg3_flags2 |= TG3_FLG2_CAPACITIVE_COUPLING; + + /* serdes signal pre-emphasis in register 0x590 set by */ + /* bootcode if bit 18 is set */ + if (cfg2 & (1 << 18)) + tp->tg3_flags2 |= TG3_FLG2_SERDES_PREEMPHASIS; } /* Reading the PHY ID register can conflict with ASF diff -urN linux-2.6.11-rc3/drivers/net/tg3.h linux-2.6.11-rc4/drivers/net/tg3.h --- linux-2.6.11-rc3/drivers/net/tg3.h 2005-02-12 19:50:38.954894437 -0800 +++ linux-2.6.11-rc4/drivers/net/tg3.h 2005-02-12 19:50:59.141768369 -0800 @@ -1452,6 +1452,9 @@ #define NIC_SRAM_DATA_CFG_FIBER_WOL 0x00004000 #define NIC_SRAM_DATA_CFG_NO_GPIO2 0x00100000 +#define NIC_SRAM_DATA_VER 0x00000b5c +#define NIC_SRAM_DATA_VER_SHIFT 16 + #define NIC_SRAM_DATA_PHY_ID 0x00000b74 #define NIC_SRAM_DATA_PHY_ID1_MASK 0xffff0000 #define NIC_SRAM_DATA_PHY_ID2_MASK 0x0000ffff @@ -2106,6 +2109,7 @@ #define TG3_FLG2_CAPACITIVE_COUPLING 0x00004000 #define TG3_FLG2_FLASH 0x00008000 #define TG3_FLG2_HW_TSO 0x00010000 +#define TG3_FLG2_SERDES_PREEMPHASIS 0x00020000 u32 split_mode_max_reqs; #define SPLIT_MODE_5704_MAX_REQ 3 diff -urN linux-2.6.11-rc3/drivers/pci/hotplug/rpaphp.h linux-2.6.11-rc4/drivers/pci/hotplug/rpaphp.h --- linux-2.6.11-rc3/drivers/pci/hotplug/rpaphp.h 2004-12-24 13:34:31.000000000 -0800 +++ linux-2.6.11-rc4/drivers/pci/hotplug/rpaphp.h 2005-02-12 19:51:00.087809325 -0800 @@ -109,13 +109,6 @@ extern struct list_head rpaphp_slot_head; extern int num_slots; -static inline int is_hotplug_capable(struct device_node *dn) -{ - unsigned char *ptr = get_property(dn, "ibm,fw-pci-hot-plug-ctrl", NULL); - - return (int) (ptr != NULL); -} - /* function prototypes */ /* rpaphp_pci.c */ diff -urN linux-2.6.11-rc3/drivers/pci/hotplug/rpaphp_core.c linux-2.6.11-rc4/drivers/pci/hotplug/rpaphp_core.c --- linux-2.6.11-rc3/drivers/pci/hotplug/rpaphp_core.c 2004-12-24 13:35:39.000000000 -0800 +++ linux-2.6.11-rc4/drivers/pci/hotplug/rpaphp_core.c 2005-02-12 19:51:00.088809368 -0800 @@ -224,7 +224,7 @@ if (!indexes || !names || !types || !domains) { /* Slot does not have dynamically-removable children */ - return 1; + return -EINVAL; } if (drc_indexes) *drc_indexes = indexes; @@ -260,7 +260,7 @@ } rc = get_children_props(dn->parent, &indexes, &names, &types, &domains); - if (rc) { + if (rc < 0) { return 1; } @@ -287,26 +287,43 @@ return 1; } -static int is_php_dn(struct device_node *dn, int **indexes, int **names, int **types, - int **power_domains) +static int is_php_type(char *drc_type) +{ + unsigned long value; + char *endptr; + + /* PCI Hotplug nodes have an integer for drc_type */ + value = simple_strtoul(drc_type, &endptr, 10); + if (endptr == drc_type) + return 0; + + return 1; +} + +static int is_php_dn(struct device_node *dn, int **indexes, int **names, + int **types, int **power_domains) { + int *drc_types; int rc; - if (!is_hotplug_capable(dn)) - return (0); - rc = get_children_props(dn, indexes, names, types, power_domains); - if (rc) - return (0); - return (1); + rc = get_children_props(dn, indexes, names, &drc_types, power_domains); + if (rc >= 0) { + if (is_php_type((char *) &drc_types[1])) { + *types = drc_types; + return 1; + } + } + + return 0; } -static int is_dr_dn(struct device_node *dn, int **indexes, int **names, int **types, - int **power_domains, int **my_drc_index) +static int is_dr_dn(struct device_node *dn, int **indexes, int **names, + int **types, int **power_domains, int **my_drc_index) { int rc; *my_drc_index = (int *) get_property(dn, "ibm,my-drc-index", NULL); - if(!*my_drc_index) + if(!*my_drc_index) return (0); if (!dn->parent) @@ -314,7 +331,7 @@ rc = get_children_props(dn->parent, indexes, names, types, power_domains); - return (rc == 0); + return (rc >= 0); } static inline int is_vdevice_root(struct device_node *dn) diff -urN linux-2.6.11-rc3/drivers/pci/pci-sysfs.c linux-2.6.11-rc4/drivers/pci/pci-sysfs.c --- linux-2.6.11-rc3/drivers/pci/pci-sysfs.c 2005-02-12 19:50:39.201905131 -0800 +++ linux-2.6.11-rc4/drivers/pci/pci-sysfs.c 2005-02-12 19:51:00.140811619 -0800 @@ -436,6 +436,7 @@ rom_attr = kmalloc(sizeof(*rom_attr), GFP_ATOMIC); if (rom_attr) { + memset(rom_attr, 0x00, sizeof(*rom_attr)); pdev->rom_attr = rom_attr; rom_attr->size = pci_resource_len(pdev, PCI_ROM_RESOURCE); rom_attr->attr.name = "rom"; diff -urN linux-2.6.11-rc3/drivers/pci/pcie/portdrv.h linux-2.6.11-rc4/drivers/pci/pcie/portdrv.h --- linux-2.6.11-rc3/drivers/pci/pcie/portdrv.h 2005-02-12 19:50:39.213905650 -0800 +++ linux-2.6.11-rc4/drivers/pci/pcie/portdrv.h 2005-02-12 19:51:00.217814953 -0800 @@ -28,14 +28,13 @@ #define get_descriptor_id(type, service) (((type - 4) << 4) | service) extern struct bus_type pcie_port_bus_type; -extern struct device_driver pcieport_generic_driver; extern int pcie_port_device_probe(struct pci_dev *dev); extern int pcie_port_device_register(struct pci_dev *dev); #ifdef CONFIG_PM -extern int pcie_port_device_suspend(struct pcie_device *dev, u32 state); -extern int pcie_port_device_resume(struct pcie_device *dev); +extern int pcie_port_device_suspend(struct pci_dev *dev, u32 state); +extern int pcie_port_device_resume(struct pci_dev *dev); #endif -extern void pcie_port_device_remove(struct pcie_device *dev); +extern void pcie_port_device_remove(struct pci_dev *dev); extern void pcie_port_bus_register(void); extern void pcie_port_bus_unregister(void); diff -urN linux-2.6.11-rc3/drivers/pci/pcie/portdrv_bus.c linux-2.6.11-rc4/drivers/pci/pcie/portdrv_bus.c --- linux-2.6.11-rc3/drivers/pci/pcie/portdrv_bus.c 2005-02-12 19:50:39.213905650 -0800 +++ linux-2.6.11-rc4/drivers/pci/pcie/portdrv_bus.c 2005-02-12 19:51:00.217814953 -0800 @@ -14,8 +14,6 @@ #include -static int generic_probe (struct device *dev) { return 0;} -static int generic_remove (struct device *dev) { return 0;} static int pcie_port_bus_match(struct device *dev, struct device_driver *drv); static int pcie_port_bus_suspend(struct device *dev, u32 state); static int pcie_port_bus_resume(struct device *dev); @@ -27,23 +25,14 @@ .resume = pcie_port_bus_resume, }; -struct device_driver pcieport_generic_driver = { - .name = "pcieport", - .bus = &pcie_port_bus_type, - .probe = generic_probe, - .remove = generic_remove, -}; - static int pcie_port_bus_match(struct device *dev, struct device_driver *drv) { struct pcie_device *pciedev; struct pcie_port_service_driver *driver; - if ( drv->bus != &pcie_port_bus_type || - dev->bus != &pcie_port_bus_type || - drv == &pcieport_generic_driver) { + if (drv->bus != &pcie_port_bus_type || dev->bus != &pcie_port_bus_type) return 0; - } + pciedev = to_pcie_device(dev); driver = to_service_driver(drv); if ( (driver->id_table->vendor != PCI_ANY_ID && diff -urN linux-2.6.11-rc3/drivers/pci/pcie/portdrv_core.c linux-2.6.11-rc4/drivers/pci/pcie/portdrv_core.c --- linux-2.6.11-rc3/drivers/pci/pcie/portdrv_core.c 2005-02-12 19:50:39.215905737 -0800 +++ linux-2.6.11-rc4/drivers/pci/pcie/portdrv_core.c 2005-02-12 19:51:00.218814996 -0800 @@ -17,8 +17,6 @@ extern int pcie_mch_quirk; /* MSI-quirk Indicator */ -extern struct device_driver pcieport_generic_driver; - static int pcie_port_probe_service(struct device *dev) { struct pcie_device *pciedev; @@ -103,6 +101,7 @@ */ static void release_pcie_device(struct device *dev) { + printk(KERN_DEBUG "Free Port Service[%s]\n", dev->bus_id); kfree(to_pcie_device(dev)); } @@ -217,18 +216,18 @@ return services; } -static void pcie_device_init(struct pcie_device *parent, - struct pcie_device *dev, - int port_type, int service_type) +static void pcie_device_init(struct pci_dev *parent, struct pcie_device *dev, + int port_type, int service_type, int irq, int irq_mode) { struct device *device; - if (parent) { - dev->id.vendor = parent->port->vendor; - dev->id.device = parent->port->device; - dev->id.port_type = port_type; - dev->id.service_type = (1 << service_type); - } + dev->port = parent; + dev->interrupt_mode = irq_mode; + dev->irq = irq; + dev->id.vendor = parent->vendor; + dev->id.device = parent->device; + dev->id.port_type = port_type; + dev->id.service_type = (1 << service_type); /* Initialize generic device interface */ device = &dev->device; @@ -240,35 +239,23 @@ device->driver = NULL; device->driver_data = NULL; device->release = release_pcie_device; /* callback to free pcie dev */ - sprintf(&device->bus_id[0], "%s.%02x", parent->device.bus_id, - get_descriptor_id(port_type, service_type)); - device->parent = ((parent == NULL) ? NULL : &parent->device); + sprintf(&device->bus_id[0], "pcie%02x", + get_descriptor_id(port_type, service_type)); + device->parent = &parent->dev; } -static struct pcie_device* alloc_pcie_device( - struct pcie_device *parent, struct pci_dev *bridge, +static struct pcie_device* alloc_pcie_device(struct pci_dev *parent, int port_type, int service_type, int irq, int irq_mode) { struct pcie_device *device; - static int NR_PORTS = 0; device = kmalloc(sizeof(struct pcie_device), GFP_KERNEL); if (!device) return NULL; memset(device, 0, sizeof(struct pcie_device)); - device->port = bridge; - device->interrupt_mode = irq_mode; - device->irq = irq; - if (!parent) { - pcie_device_init(NULL, device, port_type, service_type); - NR_PORTS++; - device->device.driver = &pcieport_generic_driver; - sprintf(&device->device.bus_id[0], "port%d", NR_PORTS); - } else { - pcie_device_init(parent, device, port_type, service_type); - } - printk(KERN_DEBUG "Allocate Port Device[%s]\n", device->device.bus_id); + pcie_device_init(parent, device, port_type, service_type, irq,irq_mode); + printk(KERN_DEBUG "Allocate Port Service[%s]\n", device->device.bus_id); return device; } @@ -291,7 +278,6 @@ int pcie_port_device_register(struct pci_dev *dev) { - struct pcie_device *parent; int status, type, capabilities, irq_mode, i; int vectors[PCIE_PORT_DEVICE_MAXSERVICES]; u16 reg16; @@ -306,27 +292,13 @@ capabilities = get_port_device_capability(dev); irq_mode = assign_interrupt_mode(dev, vectors, capabilities); - /* Allocate parent */ - parent = alloc_pcie_device(NULL, dev, type, 0, dev->irq, irq_mode); - if (!parent) - return -ENOMEM; - - status = device_register(&parent->device); - if (status) { - kfree(parent); - return status; - } - get_device(&parent->device); - pci_set_drvdata(dev, parent); - /* Allocate child services if any */ for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++) { struct pcie_device *child; if (capabilities & (1 << i)) { child = alloc_pcie_device( - parent, /* parent */ - dev, /* Root/Upstream/Downstream */ + dev, /* parent */ type, /* port type */ i, /* service type */ vectors[i], /* irq */ @@ -345,17 +317,21 @@ } #ifdef CONFIG_PM -int pcie_port_device_suspend(struct pcie_device *dev, u32 state) +int pcie_port_device_suspend(struct pci_dev *dev, u32 state) { - struct list_head *head; + struct list_head *head, *tmp; struct device *parent, *child; struct device_driver *driver; struct pcie_port_service_driver *service_driver; - parent = &dev->device; + parent = &dev->dev; head = &parent->children; - while (!list_empty(head)) { - child = container_of(head->next, struct device, node); + tmp = head->next; + while (head != tmp) { + child = container_of(tmp, struct device, node); + tmp = tmp->next; + if (child->bus != &pcie_port_bus_type) + continue; driver = child->driver; if (!driver) continue; @@ -366,17 +342,21 @@ return 0; } -int pcie_port_device_resume(struct pcie_device *dev) +int pcie_port_device_resume(struct pci_dev *dev) { - struct list_head *head; + struct list_head *head, *tmp; struct device *parent, *child; struct device_driver *driver; struct pcie_port_service_driver *service_driver; - parent = &dev->device; + parent = &dev->dev; head = &parent->children; - while (!list_empty(head)) { - child = container_of(head->next, struct device, node); + tmp = head->next; + while (head != tmp) { + child = container_of(tmp, struct device, node); + tmp = tmp->next; + if (child->bus != &pcie_port_bus_type) + continue; driver = child->driver; if (!driver) continue; @@ -389,45 +369,46 @@ } #endif -void pcie_port_device_remove(struct pcie_device *dev) +void pcie_port_device_remove(struct pci_dev *dev) { - struct list_head *head; + struct list_head *head, *tmp; struct device *parent, *child; struct device_driver *driver; struct pcie_port_service_driver *service_driver; + int interrupt_mode = PCIE_PORT_INTx_MODE; - parent = &dev->device; + parent = &dev->dev; head = &parent->children; - while (!list_empty(head)) { - child = container_of(head->next, struct device, node); + tmp = head->next; + while (head != tmp) { + child = container_of(tmp, struct device, node); + tmp = tmp->next; + if (child->bus != &pcie_port_bus_type) + continue; driver = child->driver; if (driver) { service_driver = to_service_driver(driver); if (service_driver->remove) service_driver->remove(to_pcie_device(child)); } + interrupt_mode = (to_pcie_device(child))->interrupt_mode; put_device(child); device_unregister(child); } - /* Switch to INTx by default if MSI enabled */ - if (dev->interrupt_mode == PCIE_PORT_MSIX_MODE) - pci_disable_msix(dev->port); - else if (dev->interrupt_mode == PCIE_PORT_MSI_MODE) - pci_disable_msi(dev->port); - put_device(parent); - device_unregister(parent); + if (interrupt_mode == PCIE_PORT_MSIX_MODE) + pci_disable_msix(dev); + else if (interrupt_mode == PCIE_PORT_MSI_MODE) + pci_disable_msi(dev); } void pcie_port_bus_register(void) { bus_register(&pcie_port_bus_type); - driver_register(&pcieport_generic_driver); } void pcie_port_bus_unregister(void) { - driver_unregister(&pcieport_generic_driver); bus_unregister(&pcie_port_bus_type); } diff -urN linux-2.6.11-rc3/drivers/pci/pcie/portdrv_pci.c linux-2.6.11-rc4/drivers/pci/pcie/portdrv_pci.c --- linux-2.6.11-rc3/drivers/pci/pcie/portdrv_pci.c 2005-02-12 19:50:39.215905737 -0800 +++ linux-2.6.11-rc4/drivers/pci/pcie/portdrv_pci.c 2005-02-12 19:51:00.219815039 -0800 @@ -63,34 +63,18 @@ static void pcie_portdrv_remove (struct pci_dev *dev) { - struct pcie_device *pciedev; - - pciedev = (struct pcie_device *)pci_get_drvdata(dev); - if (pciedev) { - pcie_port_device_remove(pciedev); - pci_set_drvdata(dev, NULL); - } + pcie_port_device_remove(dev); } #ifdef CONFIG_PM static int pcie_portdrv_suspend (struct pci_dev *dev, u32 state) { - struct pcie_device *pciedev; - - pciedev = (struct pcie_device *)pci_get_drvdata(dev); - if (pciedev) - pcie_port_device_suspend(pciedev, state); - return 0; + return pcie_port_device_suspend(dev, state); } static int pcie_portdrv_resume (struct pci_dev *dev) { - struct pcie_device *pciedev; - - pciedev = (struct pcie_device *)pci_get_drvdata(dev); - if (pciedev) - pcie_port_device_resume(pciedev); - return 0; + return pcie_port_device_resume(dev); } #endif diff -urN linux-2.6.11-rc3/drivers/pci/probe.c linux-2.6.11-rc4/drivers/pci/probe.c --- linux-2.6.11-rc3/drivers/pci/probe.c 2005-02-12 19:50:39.216905780 -0800 +++ linux-2.6.11-rc4/drivers/pci/probe.c 2005-02-12 19:51:00.220815083 -0800 @@ -879,7 +879,7 @@ if (pci_find_bus(pci_domain_nr(b), bus)) { /* If we already got to this bus through a different bridge, ignore it */ - DBG("PCI: Bus %04:%02x already known\n", pci_domain_nr(b), bus); + DBG("PCI: Bus %04x:%02x already known\n", pci_domain_nr(b), bus); goto err_out; } list_add_tail(&b->node, &pci_root_buses); diff -urN linux-2.6.11-rc3/drivers/pci/quirks.c linux-2.6.11-rc4/drivers/pci/quirks.c --- linux-2.6.11-rc3/drivers/pci/quirks.c 2005-02-12 19:50:39.218905867 -0800 +++ linux-2.6.11-rc4/drivers/pci/quirks.c 2005-02-12 19:51:00.229815472 -0800 @@ -216,6 +216,16 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443BX_2, quirk_natoma ); /* + * This chip can cause PCI parity errors if config register 0xA0 is read + * while DMAs are occurring. + */ +static void __devinit quirk_citrine(struct pci_dev *dev) +{ + dev->cfg_size = 0xA0; +} +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CITRINE, quirk_citrine ); + +/* * S3 868 and 968 chips report region size equal to 32M, but they decode 64M. * If it's needed, re-allocate the region. */ diff -urN linux-2.6.11-rc3/drivers/pcmcia/ds.c linux-2.6.11-rc4/drivers/pcmcia/ds.c --- linux-2.6.11-rc3/drivers/pcmcia/ds.c 2005-02-12 19:50:39.284908724 -0800 +++ linux-2.6.11-rc4/drivers/pcmcia/ds.c 2005-02-12 19:51:00.319819369 -0800 @@ -660,7 +660,7 @@ p_dev = pcmcia_get_dev(p_dev); if (!p_dev) continue; - if ((!p_dev->client.state & CLIENT_UNBOUND) || + if (!(p_dev->client.state & CLIENT_UNBOUND) || (!p_dev->dev.driver)) { pcmcia_put_dev(p_dev); continue; diff -urN linux-2.6.11-rc3/drivers/pcmcia/i82365.c linux-2.6.11-rc4/drivers/pcmcia/i82365.c --- linux-2.6.11-rc3/drivers/pcmcia/i82365.c 2005-02-12 19:50:39.289908940 -0800 +++ linux-2.6.11-rc4/drivers/pcmcia/i82365.c 2005-02-12 19:51:00.323819542 -0800 @@ -208,6 +208,7 @@ #define IS_UNKNOWN 0x0400 #define IS_VG_PWR 0x0800 #define IS_DF_PWR 0x1000 +#define IS_REGISTERED 0x2000 #define IS_ALIVE 0x8000 typedef struct pcic_t { @@ -1403,12 +1404,10 @@ socket[i].socket.resource_ops = &pccard_nonstatic_ops; socket[i].socket.owner = THIS_MODULE; socket[i].number = i; - ret = pcmcia_register_socket(&socket[i].socket); - if (ret && i--) { - for (; i>= 0; i--) - pcmcia_unregister_socket(&socket[i].socket); - break; - } + ret = pcmcia_register_socket(&socket[i].socket); + if (!ret) + socket[i].flags |= IS_REGISTERED; + #if 0 /* driver model ordering issue */ class_device_create_file(&socket[i].socket.dev, &class_device_attr_info); @@ -1435,7 +1434,8 @@ int i; for (i = 0; i < sockets; i++) { - pcmcia_unregister_socket(&socket[i].socket); + if (socket[i].flags & IS_REGISTERED) + pcmcia_unregister_socket(&socket[i].socket); } platform_device_unregister(&i82365_device); if (poll_interval != 0) diff -urN linux-2.6.11-rc3/drivers/pcmcia/m32r_cfc.c linux-2.6.11-rc4/drivers/pcmcia/m32r_cfc.c --- linux-2.6.11-rc3/drivers/pcmcia/m32r_cfc.c 2005-02-12 19:50:39.291909027 -0800 +++ linux-2.6.11-rc4/drivers/pcmcia/m32r_cfc.c 2005-02-12 19:51:00.325819629 -0800 @@ -239,6 +239,7 @@ /*====================================================================*/ +#define IS_REGISTERED 0x2000 #define IS_ALIVE 0x8000 typedef struct pcc_t { @@ -835,11 +836,9 @@ socket[i].socket.owner = THIS_MODULE; socket[i].number = i; ret = pcmcia_register_socket(&socket[i].socket); - if (ret && i--) { - for (; i>= 0; i--) - pcmcia_unregister_socket(&socket[i].socket); - break; - } + if (!ret) + socket[i].flags |= IS_REGISTERED; + #if 0 /* driver model ordering issue */ class_device_create_file(&socket[i].socket.dev, &class_device_attr_info); @@ -865,7 +864,8 @@ int i; for (i = 0; i < pcc_sockets; i++) - pcmcia_unregister_socket(&socket[i].socket); + if (socket[i].flags & IS_REGISTERED) + pcmcia_unregister_socket(&socket[i].socket); platform_device_unregister(&pcc_device); if (poll_interval != 0) diff -urN linux-2.6.11-rc3/drivers/pcmcia/m32r_pcc.c linux-2.6.11-rc4/drivers/pcmcia/m32r_pcc.c --- linux-2.6.11-rc3/drivers/pcmcia/m32r_pcc.c 2005-02-12 19:50:39.293909114 -0800 +++ linux-2.6.11-rc4/drivers/pcmcia/m32r_pcc.c 2005-02-12 19:51:00.327819715 -0800 @@ -257,6 +257,7 @@ /*====================================================================*/ +#define IS_REGISTERED 0x2000 #define IS_ALIVE 0x8000 typedef struct pcc_t { @@ -772,11 +773,9 @@ socket[i].socket.owner = THIS_MODULE; socket[i].number = i; ret = pcmcia_register_socket(&socket[i].socket); - if (ret && i--) { - for (; i>= 0; i--) - pcmcia_unregister_socket(&socket[i].socket); - break; - } + if (!ret) + socket[i].flags |= IS_REGISTERED; + #if 0 /* driver model ordering issue */ class_device_create_file(&socket[i].socket.dev, &class_device_attr_info); @@ -802,7 +801,8 @@ int i; for (i = 0; i < pcc_sockets; i++) - pcmcia_unregister_socket(&socket[i].socket); + if (socket[i].flags & IS_REGISTERED) + pcmcia_unregister_socket(&socket[i].socket); platform_device_unregister(&pcc_device); if (poll_interval != 0) diff -urN linux-2.6.11-rc3/drivers/pnp/pnpbios/core.c linux-2.6.11-rc4/drivers/pnp/pnpbios/core.c --- linux-2.6.11-rc3/drivers/pnp/pnpbios/core.c 2005-02-12 19:50:39.432915131 -0800 +++ linux-2.6.11-rc4/drivers/pnp/pnpbios/core.c 2005-02-12 19:51:00.372821663 -0800 @@ -61,6 +61,7 @@ #include #include #include +#include #include #include @@ -539,7 +540,6 @@ } #ifdef CONFIG_PNPACPI - extern int pnpacpi_disabled; if (!acpi_disabled && !pnpacpi_disabled) { pnpbios_disabled = 1; printk(KERN_INFO "PnPBIOS: Disabled by ACPI PNP\n"); diff -urN linux-2.6.11-rc3/drivers/s390/block/dasd.c linux-2.6.11-rc4/drivers/s390/block/dasd.c --- linux-2.6.11-rc3/drivers/s390/block/dasd.c 2005-02-12 19:50:39.435915261 -0800 +++ linux-2.6.11-rc4/drivers/s390/block/dasd.c 2005-02-12 19:51:00.379821966 -0800 @@ -7,7 +7,7 @@ * Bugreports.to..: * (C) IBM Corporation, IBM Deutschland Entwicklung GmbH, 1999-2001 * - * $Revision: 1.154 $ + * $Revision: 1.156 $ */ #include @@ -179,7 +179,7 @@ device->debug_area = debug_register(device->cdev->dev.bus_id, 0, 2, 8 * sizeof (long)); debug_register_view(device->debug_area, &debug_sprintf_view); - debug_set_level(device->debug_area, DBF_DEBUG); + debug_set_level(device->debug_area, DBF_EMERG); DBF_DEV_EVENT(DBF_EMERG, device, "%s", "debug area created"); device->state = DASD_STATE_BASIC; @@ -745,8 +745,9 @@ switch (rc) { case 0: cqr->status = DASD_CQR_IN_IO; - DBF_DEV_EVENT(DBF_DEBUG, device, "%s", - "start_IO: request %p started successful"); + DBF_DEV_EVENT(DBF_DEBUG, device, + "start_IO: request %p started successful", + cqr); break; case -EBUSY: DBF_DEV_EVENT(DBF_ERR, device, "%s", @@ -1579,25 +1580,26 @@ } /* - * Allocate and initialize request queue. + * Allocate and initialize request queue and default I/O scheduler. */ static int dasd_alloc_queue(struct dasd_device * device) { + int rc; + device->request_queue = blk_init_queue(do_dasd_request, &device->request_queue_lock); if (device->request_queue == NULL) return -ENOMEM; device->request_queue->queuedata = device; -#if 0 + elevator_exit(device->request_queue->elevator); - rc = elevator_init(device->request_queue, "noop"); + rc = elevator_init(device->request_queue, "deadline"); if (rc) { blk_cleanup_queue(device->request_queue); return rc; } -#endif return 0; } @@ -1963,7 +1965,7 @@ goto failed; } debug_register_view(dasd_debug_area, &debug_sprintf_view); - debug_set_level(dasd_debug_area, DBF_DEBUG); + debug_set_level(dasd_debug_area, DBF_EMERG); DBF_EVENT(DBF_EMERG, "%s", "debug area created"); diff -urN linux-2.6.11-rc3/drivers/s390/cio/cio.c linux-2.6.11-rc4/drivers/s390/cio/cio.c --- linux-2.6.11-rc3/drivers/s390/cio/cio.c 2005-02-12 19:50:39.460916344 -0800 +++ linux-2.6.11-rc4/drivers/s390/cio/cio.c 2005-02-12 19:51:00.531828547 -0800 @@ -175,9 +175,10 @@ } int -cio_start (struct subchannel *sch, /* subchannel structure */ - struct ccw1 * cpa, /* logical channel prog addr */ - __u8 lpm) /* logical path mask */ +cio_start_key (struct subchannel *sch, /* subchannel structure */ + struct ccw1 * cpa, /* logical channel prog addr */ + __u8 lpm, /* logical path mask */ + __u8 key) /* storage key */ { char dbf_txt[15]; int ccode; @@ -200,12 +201,12 @@ sch->orb.c64 = 1; sch->orb.i2k = 0; #endif + sch->orb.key = key >> 4; + /* issue "Start Subchannel" */ sch->orb.cpa = (__u32) __pa (cpa); - - /* - * Issue "Start subchannel" and process condition code - */ ccode = ssch (sch->irq, &sch->orb); + + /* process condition code */ sprintf (dbf_txt, "ccode:%d", ccode); CIO_TRACE_EVENT (4, dbf_txt); @@ -224,6 +225,12 @@ } } +int +cio_start (struct subchannel *sch, struct ccw1 *cpa, __u8 lpm) +{ + return cio_start_key(sch, cpa, lpm, default_storage_key); +} + /* * resume suspended I/O operation */ diff -urN linux-2.6.11-rc3/drivers/s390/cio/cio.h linux-2.6.11-rc4/drivers/s390/cio/cio.h --- linux-2.6.11-rc3/drivers/s390/cio/cio.h 2004-12-24 13:33:49.000000000 -0800 +++ linux-2.6.11-rc4/drivers/s390/cio/cio.h 2005-02-12 19:51:00.531828547 -0800 @@ -122,6 +122,7 @@ extern int cio_resume (struct subchannel *); extern int cio_halt (struct subchannel *); extern int cio_start (struct subchannel *, struct ccw1 *, __u8); +extern int cio_start_key (struct subchannel *, struct ccw1 *, __u8, __u8); extern int cio_cancel (struct subchannel *); extern int cio_set_options (struct subchannel *, int); extern int cio_get_options (struct subchannel *); diff -urN linux-2.6.11-rc3/drivers/s390/cio/device_ops.c linux-2.6.11-rc4/drivers/s390/cio/device_ops.c --- linux-2.6.11-rc3/drivers/s390/cio/device_ops.c 2004-12-24 13:35:23.000000000 -0800 +++ linux-2.6.11-rc4/drivers/s390/cio/device_ops.c 2005-02-12 19:51:00.563829933 -0800 @@ -1,7 +1,7 @@ /* * drivers/s390/cio/device_ops.c * - * $Revision: 1.50 $ + * $Revision: 1.53 $ * * Copyright (C) 2002 IBM Deutschland Entwicklung GmbH, * IBM Corporation @@ -54,6 +54,7 @@ if (cdev->private->state == DEV_STATE_NOT_OPER) return -ENODEV; if (cdev->private->state != DEV_STATE_ONLINE && + cdev->private->state != DEV_STATE_WAIT4IO && cdev->private->state != DEV_STATE_W4SENSE) return -EINVAL; sch = to_subchannel(cdev->dev.parent); @@ -66,8 +67,9 @@ } int -ccw_device_start(struct ccw_device *cdev, struct ccw1 *cpa, - unsigned long intparm, __u8 lpm, unsigned long flags) +ccw_device_start_key(struct ccw_device *cdev, struct ccw1 *cpa, + unsigned long intparm, __u8 lpm, __u8 key, + unsigned long flags) { struct subchannel *sch; int ret; @@ -87,29 +89,49 @@ ret = cio_set_options (sch, flags); if (ret) return ret; - ret = cio_start (sch, cpa, lpm); + ret = cio_start_key (sch, cpa, lpm, key); if (ret == 0) cdev->private->intparm = intparm; return ret; } + int -ccw_device_start_timeout(struct ccw_device *cdev, struct ccw1 *cpa, - unsigned long intparm, __u8 lpm, unsigned long flags, - int expires) +ccw_device_start_timeout_key(struct ccw_device *cdev, struct ccw1 *cpa, + unsigned long intparm, __u8 lpm, __u8 key, + unsigned long flags, int expires) { int ret; if (!cdev) return -ENODEV; ccw_device_set_timeout(cdev, expires); - ret = ccw_device_start(cdev, cpa, intparm, lpm, flags); + ret = ccw_device_start_key(cdev, cpa, intparm, lpm, key, flags); if (ret != 0) ccw_device_set_timeout(cdev, 0); return ret; } int +ccw_device_start(struct ccw_device *cdev, struct ccw1 *cpa, + unsigned long intparm, __u8 lpm, unsigned long flags) +{ + return ccw_device_start_key(cdev, cpa, intparm, lpm, + default_storage_key, flags); +} + +int +ccw_device_start_timeout(struct ccw_device *cdev, struct ccw1 *cpa, + unsigned long intparm, __u8 lpm, unsigned long flags, + int expires) +{ + return ccw_device_start_timeout_key(cdev, cpa, intparm, lpm, + default_storage_key, flags, + expires); +} + + +int ccw_device_halt(struct ccw_device *cdev, unsigned long intparm) { struct subchannel *sch; @@ -120,6 +142,7 @@ if (cdev->private->state == DEV_STATE_NOT_OPER) return -ENODEV; if (cdev->private->state != DEV_STATE_ONLINE && + cdev->private->state != DEV_STATE_WAIT4IO && cdev->private->state != DEV_STATE_W4SENSE) return -EINVAL; sch = to_subchannel(cdev->dev.parent); @@ -539,6 +562,8 @@ EXPORT_SYMBOL(ccw_device_resume); EXPORT_SYMBOL(ccw_device_start_timeout); EXPORT_SYMBOL(ccw_device_start); +EXPORT_SYMBOL(ccw_device_start_timeout_key); +EXPORT_SYMBOL(ccw_device_start_key); EXPORT_SYMBOL(ccw_device_get_ciw); EXPORT_SYMBOL(ccw_device_get_path_mask); EXPORT_SYMBOL(read_conf_data); diff -urN linux-2.6.11-rc3/drivers/s390/net/qeth.h linux-2.6.11-rc4/drivers/s390/net/qeth.h --- linux-2.6.11-rc3/drivers/s390/net/qeth.h 2005-02-12 19:50:39.469916733 -0800 +++ linux-2.6.11-rc4/drivers/s390/net/qeth.h 2005-02-12 19:51:00.648833612 -0800 @@ -24,7 +24,7 @@ #include "qeth_mpc.h" -#define VERSION_QETH_H "$Revision: 1.129 $" +#define VERSION_QETH_H "$Revision: 1.132 $" #ifdef CONFIG_QETH_IPV6 #define QETH_VERSION_IPV6 ":IPv6" @@ -754,6 +754,8 @@ struct qeth_perf_stats perf_stats; #endif /* CONFIG_QETH_PERF_STATS */ int use_hard_stop; + int (*orig_hard_header)(struct sk_buff *,struct net_device *, + unsigned short,void *,void *,unsigned); }; struct qeth_card_list_struct { @@ -828,6 +830,17 @@ #endif } } +static inline struct sk_buff * +qeth_pskb_unshare(struct sk_buff *skb, int pri) +{ + struct sk_buff *nskb; + if (!skb_cloned(skb)) + return skb; + nskb = skb_copy(skb, pri); + kfree_skb(skb); /* free our shared copy */ + return nskb; +} + inline static int qeth_get_initial_mtu_for_card(struct qeth_card * card) @@ -1071,8 +1084,4 @@ extern int qeth_realloc_buffer_pool(struct qeth_card *, int); -extern int -qeth_fake_header(struct sk_buff *skb, struct net_device *dev, - unsigned short type, void *daddr, void *saddr, - unsigned len); #endif /* __QETH_H__ */ diff -urN linux-2.6.11-rc3/drivers/s390/net/qeth_main.c linux-2.6.11-rc4/drivers/s390/net/qeth_main.c --- linux-2.6.11-rc3/drivers/s390/net/qeth_main.c 2005-02-12 19:50:39.477917080 -0800 +++ linux-2.6.11-rc4/drivers/s390/net/qeth_main.c 2005-02-12 19:51:00.696835691 -0800 @@ -1,6 +1,6 @@ /* * - * linux/drivers/s390/net/qeth_main.c ($Revision: 1.181 $) + * linux/drivers/s390/net/qeth_main.c ($Revision: 1.191 $) * * Linux on zSeries OSA Express and HiperSockets support * @@ -12,7 +12,7 @@ * Frank Pavlic (pavlic@de.ibm.com) and * Thomas Spatzier * - * $Revision: 1.181 $ $Date: 2004/12/27 07:36:40 $ + * $Revision: 1.191 $ $Date: 2005/01/31 13:13:57 $ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -41,16 +41,9 @@ #include #include #include - #include #include #include - -#include -#include -#include -#include -#include #include #include #include @@ -62,23 +55,29 @@ #include #include #include -#include -#include #include #include -#include -#include #include #include -#include #include #include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + #include "qeth.h" #include "qeth_mpc.h" #include "qeth_fs.h" -#define VERSION_QETH_C "$Revision: 1.181 $" +#define VERSION_QETH_C "$Revision: 1.191 $" static const char *version = "qeth S/390 OSA-Express driver"; /** @@ -514,6 +513,7 @@ qeth_set_offline(struct ccwgroup_device *cgdev) { struct qeth_card *card = (struct qeth_card *) cgdev->dev.driver_data; + int rc = 0; enum qeth_card_states recover_flag; QETH_DBF_TEXT(setup, 3, "setoffl"); @@ -525,15 +525,21 @@ CARD_BUS_ID(card)); return -ERESTARTSYS; } - ccw_device_set_offline(CARD_DDEV(card)); - ccw_device_set_offline(CARD_WDEV(card)); - ccw_device_set_offline(CARD_RDEV(card)); + if ((rc = ccw_device_set_offline(CARD_DDEV(card))) || + (rc = ccw_device_set_offline(CARD_WDEV(card))) || + (rc = ccw_device_set_offline(CARD_RDEV(card)))) { + QETH_DBF_TEXT_(setup, 2, "1err%d", rc); + } if (recover_flag == CARD_STATE_UP) card->state = CARD_STATE_RECOVER; qeth_notify_processes(); return 0; } +static int +qeth_wait_for_threads(struct qeth_card *card, unsigned long threads); + + static void qeth_remove_device(struct ccwgroup_device *cgdev) { @@ -546,6 +552,9 @@ if (!card) return; + if (qeth_wait_for_threads(card, 0xffffffff)) + return; + if (cgdev->state == CCWGROUP_ONLINE){ card->use_hard_stop = 1; qeth_set_offline(cgdev); @@ -621,7 +630,7 @@ if (todo->users > 0){ /* for VIPA and RXIP limit refcount to 1 */ if (todo->type != QETH_IP_TYPE_NORMAL) - addr->users = 1; + todo->users = 1; return 1; } else return 0; @@ -2262,8 +2271,8 @@ skb->ip_summed = CHECKSUM_NONE; #ifdef CONFIG_QETH_VLAN if (hdr->hdr.l2.flags[2] & (QETH_LAYER2_FLAG_VLAN)) { - skb_pull(skb, VLAN_HLEN); vlan_id = hdr->hdr.l2.vlan_id; + skb_pull(skb, VLAN_HLEN); } #endif skb->protocol = qeth_type_trans(skb, skb->dev); @@ -3262,13 +3271,15 @@ QETH_DBF_TEXT(trace,3,"qdioclr"); if (card->qdio.state == QETH_QDIO_ESTABLISHED){ - qdio_cleanup(CARD_DDEV(card), + if ((rc = qdio_cleanup(CARD_DDEV(card), (card->info.type == QETH_CARD_TYPE_IQD) ? QDIO_FLAG_CLEANUP_USING_HALT : - QDIO_FLAG_CLEANUP_USING_CLEAR); + QDIO_FLAG_CLEANUP_USING_CLEAR))) + QETH_DBF_TEXT_(trace, 3, "1err%d", rc); card->qdio.state = QETH_QDIO_ALLOCATED; } - rc = qeth_clear_halt_card(card, use_halt); + if ((rc = qeth_clear_halt_card(card, use_halt))) + QETH_DBF_TEXT_(trace, 3, "2err%d", rc); card->state = CARD_STATE_DOWN; return rc; } @@ -3370,6 +3381,26 @@ return dev; } +/*hard_header fake function; used in case fake_ll is set */ +static int +qeth_fake_header(struct sk_buff *skb, struct net_device *dev, + unsigned short type, void *daddr, void *saddr, + unsigned len) +{ + struct ethhdr *hdr; + struct qeth_card *card; + + card = (struct qeth_card *)dev->priv; + hdr = (struct ethhdr *)skb_push(skb, QETH_FAKE_LL_LEN); + memcpy(hdr->h_source, card->dev->dev_addr, ETH_ALEN); + memcpy(hdr->h_dest, "FAKELL", ETH_ALEN); + if (type != ETH_P_802_3) + hdr->h_proto = htons(type); + else + hdr->h_proto = htons(len); + return QETH_FAKE_LL_LEN; +} + static inline int qeth_send_packet(struct qeth_card *, struct sk_buff *); @@ -3399,6 +3430,14 @@ card->perf_stats.outbound_cnt++; card->perf_stats.outbound_start_time = qeth_get_micros(); #endif + if (dev->hard_header == qeth_fake_header) { + if ((skb = qeth_pskb_unshare(skb, GFP_ATOMIC)) == NULL) { + card->stats.tx_dropped++; + dev_kfree_skb_irq(skb); + return 0; + } + skb_pull(skb, QETH_FAKE_LL_LEN); + } /* * We only call netif_stop_queue in case of errors. Since we've * got our own synchronization on queues we can keep the stack's @@ -5219,7 +5258,10 @@ static int qeth_layer2_send_setdelmac(struct qeth_card *card, __u8 *mac, - enum qeth_ipa_cmds ipacmd) + enum qeth_ipa_cmds ipacmd, + int (*reply_cb) (struct qeth_card *, + struct qeth_reply*, + unsigned long)) { struct qeth_ipa_cmd *cmd; struct qeth_cmd_buffer *iob; @@ -5229,9 +5271,139 @@ cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); cmd->data.setdelmac.mac_length = OSA_ADDR_LEN; memcpy(&cmd->data.setdelmac.mac, mac, OSA_ADDR_LEN); - return qeth_send_ipa_cmd(card, iob, NULL, NULL); + return qeth_send_ipa_cmd(card, iob, reply_cb, NULL); +} + +static int +qeth_layer2_send_setgroupmac_cb(struct qeth_card *card, + struct qeth_reply *reply, + unsigned long data) +{ + struct qeth_ipa_cmd *cmd; + __u8 *mac; + + QETH_DBF_TEXT(trace, 2, "L2Sgmacb"); + cmd = (struct qeth_ipa_cmd *) data; + mac = &cmd->data.setdelmac.mac[0]; + /* MAC already registered, needed in couple/uncouple case */ + if (cmd->hdr.return_code == 0x2005) { + PRINT_WARN("Group MAC %02x:%02x:%02x:%02x:%02x:%02x " \ + "already existing on %s \n", + mac[0], mac[1], mac[2], mac[3], mac[4], mac[5], + QETH_CARD_IFNAME(card)); + cmd->hdr.return_code = 0; + } + if (cmd->hdr.return_code) + PRINT_ERR("Could not set group MAC " \ + "%02x:%02x:%02x:%02x:%02x:%02x on %s: %x\n", + mac[0], mac[1], mac[2], mac[3], mac[4], mac[5], + QETH_CARD_IFNAME(card),cmd->hdr.return_code); + return 0; +} + +static int +qeth_layer2_send_setgroupmac(struct qeth_card *card, __u8 *mac) +{ + QETH_DBF_TEXT(trace, 2, "L2Sgmac"); + return qeth_layer2_send_setdelmac(card, mac, IPA_CMD_SETGMAC, + qeth_layer2_send_setgroupmac_cb); +} + +static int +qeth_layer2_send_delgroupmac_cb(struct qeth_card *card, + struct qeth_reply *reply, + unsigned long data) +{ + struct qeth_ipa_cmd *cmd; + __u8 *mac; + + QETH_DBF_TEXT(trace, 2, "L2Dgmacb"); + cmd = (struct qeth_ipa_cmd *) data; + mac = &cmd->data.setdelmac.mac[0]; + if (cmd->hdr.return_code) + PRINT_ERR("Could not delete group MAC " \ + "%02x:%02x:%02x:%02x:%02x:%02x on %s: %x\n", + mac[0], mac[1], mac[2], mac[3], mac[4], mac[5], + QETH_CARD_IFNAME(card), cmd->hdr.return_code); + return 0; +} + +static int +qeth_layer2_send_delgroupmac(struct qeth_card *card, __u8 *mac) +{ + QETH_DBF_TEXT(trace, 2, "L2Dgmac"); + return qeth_layer2_send_setdelmac(card, mac, IPA_CMD_DELGMAC, + qeth_layer2_send_delgroupmac_cb); +} + +static int +qeth_layer2_send_setmac_cb(struct qeth_card *card, + struct qeth_reply *reply, + unsigned long data) +{ + struct qeth_ipa_cmd *cmd; + + QETH_DBF_TEXT(trace, 2, "L2Smaccb"); + cmd = (struct qeth_ipa_cmd *) data; + if (cmd->hdr.return_code) { + QETH_DBF_TEXT_(trace, 2, "L2er%x", cmd->hdr.return_code); + PRINT_WARN("Error in registering MAC address on " \ + "device %s: x%x\n", CARD_BUS_ID(card), + cmd->hdr.return_code); + card->info.layer2_mac_registered = 0; + cmd->hdr.return_code = -EIO; + } else { + card->info.layer2_mac_registered = 1; + memcpy(card->dev->dev_addr,cmd->data.setdelmac.mac, + OSA_ADDR_LEN); + PRINT_INFO("MAC address %2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x " + "successfully registered on device %s\n", + card->dev->dev_addr[0], card->dev->dev_addr[1], + card->dev->dev_addr[2], card->dev->dev_addr[3], + card->dev->dev_addr[4], card->dev->dev_addr[5], + card->dev->name); + } + return 0; +} + +static int +qeth_layer2_send_setmac(struct qeth_card *card, __u8 *mac) +{ + QETH_DBF_TEXT(trace, 2, "L2Setmac"); + return qeth_layer2_send_setdelmac(card, mac, IPA_CMD_SETVMAC, + qeth_layer2_send_setmac_cb); } +static int +qeth_layer2_send_delmac_cb(struct qeth_card *card, + struct qeth_reply *reply, + unsigned long data) +{ + struct qeth_ipa_cmd *cmd; + + QETH_DBF_TEXT(trace, 2, "L2Dmaccb"); + cmd = (struct qeth_ipa_cmd *) data; + if (cmd->hdr.return_code) { + PRINT_WARN("Error in deregistering MAC address on " \ + "device %s: x%x\n", CARD_BUS_ID(card), + cmd->hdr.return_code); + QETH_DBF_TEXT_(trace, 2, "err%d", cmd->hdr.return_code); + cmd->hdr.return_code = -EIO; + return 0; + } + card->info.layer2_mac_registered = 0; + + return 0; +} +static int +qeth_layer2_send_delmac(struct qeth_card *card, __u8 *mac) +{ + QETH_DBF_TEXT(trace, 2, "L2Delmac"); + if (!card->info.layer2_mac_registered) + return 0; + return qeth_layer2_send_setdelmac(card, mac, IPA_CMD_DELVMAC, + qeth_layer2_send_delmac_cb); +} static int qeth_layer2_set_mac_address(struct net_device *dev, void *p) @@ -5256,32 +5428,9 @@ } QETH_DBF_TEXT_(trace, 3, "%s", CARD_BUS_ID(card)); QETH_DBF_HEX(trace, 3, addr->sa_data, OSA_ADDR_LEN); - if (card->info.layer2_mac_registered) - rc = qeth_layer2_send_setdelmac(card, &card->dev->dev_addr[0], - IPA_CMD_DELVMAC); - if (rc) { - PRINT_WARN("Error in deregistering MAC address on " \ - "device %s: x%x\n", CARD_BUS_ID(card), rc); - QETH_DBF_TEXT_(trace, 2, "err%d", rc); - return -EIO; - } - card->info.layer2_mac_registered = 0; - - rc = qeth_layer2_send_setdelmac(card, addr->sa_data, IPA_CMD_SETVMAC); - if (rc) { - PRINT_WARN("Error in registering MAC address on " \ - "device %s: x%x\n", CARD_BUS_ID(card), rc); - QETH_DBF_TEXT_(trace, 2, "2err%d", rc); - return -EIO; - } - card->info.layer2_mac_registered = 1; - memcpy(dev->dev_addr, addr->sa_data, OSA_ADDR_LEN); - PRINT_INFO("MAC address %2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x " - "successfully registered on device %s\n", - dev->dev_addr[0],dev->dev_addr[1],dev->dev_addr[2], - dev->dev_addr[3],dev->dev_addr[4],dev->dev_addr[5], - dev->name); - + rc = qeth_layer2_send_delmac(card, &card->dev->dev_addr[0]); + if (!rc) + rc = qeth_layer2_send_setmac(card, addr->sa_data); return rc; } @@ -5392,45 +5541,22 @@ qeth_layer2_register_addr_entry(struct qeth_card *card, struct qeth_ipaddr *addr) { - int rc = 0; - if (!addr->is_multicast) return 0; - QETH_DBF_TEXT(trace, 2, "setgmac"); QETH_DBF_HEX(trace,3,&addr->mac[0],OSA_ADDR_LEN); - rc = qeth_layer2_send_setdelmac(card, &addr->mac[0], - IPA_CMD_SETGMAC); - if (rc) - PRINT_ERR("Could not set group MAC " \ - "%02x:%02x:%02x:%02x:%02x:%02x on %s: %x\n", - addr->mac[0],addr->mac[1],addr->mac[2], - addr->mac[3],addr->mac[4],addr->mac[5], - QETH_CARD_IFNAME(card),rc); - return rc; + return qeth_layer2_send_setgroupmac(card, &addr->mac[0]); } static int qeth_layer2_deregister_addr_entry(struct qeth_card *card, struct qeth_ipaddr *addr) { - int rc = 0; - if (!addr->is_multicast) return 0; - QETH_DBF_TEXT(trace, 2, "delgmac"); QETH_DBF_HEX(trace,3,&addr->mac[0],OSA_ADDR_LEN); - rc = qeth_layer2_send_setdelmac(card, &addr->mac[0], - IPA_CMD_DELGMAC); - if (rc) - PRINT_ERR("Could not delete group MAC " \ - "%02x:%02x:%02x:%02x:%02x:%02x on %s: %x\n", - addr->mac[0],addr->mac[1],addr->mac[2], - addr->mac[3],addr->mac[4],addr->mac[5], - QETH_CARD_IFNAME(card),rc); - return rc; - + return qeth_layer2_send_delgroupmac(card, &addr->mac[0]); } static int @@ -5526,14 +5652,6 @@ return qeth_layer3_deregister_addr_entry(card, addr); } -int -qeth_fake_header(struct sk_buff *skb, struct net_device *dev, - unsigned short type, void *daddr, void *saddr, - unsigned len) -{ - return QETH_FAKE_LL_LEN; -} - static int qeth_netdev_init(struct net_device *dev) { @@ -5558,9 +5676,12 @@ dev->vlan_rx_kill_vid = qeth_vlan_rx_kill_vid; dev->vlan_rx_add_vid = qeth_vlan_rx_add_vid; #endif + dev->hard_header = card->orig_hard_header; if (qeth_get_netdev_flags(card) & IFF_NOARP) { dev->rebuild_header = NULL; dev->hard_header = NULL; + if (card->options.fake_ll) + dev->hard_header = qeth_fake_header; dev->header_cache_update = NULL; dev->hard_header_cache = NULL; } @@ -5572,10 +5693,6 @@ dev->hard_header_parse = NULL; dev->set_mac_address = qeth_layer2_set_mac_address; dev->flags |= qeth_get_netdev_flags(card); - if (card->options.fake_ll) - dev->hard_header = qeth_fake_header; - else - dev->hard_header = NULL; if ((card->options.fake_broadcast) || (card->info.broadcast_capable)) dev->flags |= IFF_BROADCAST; @@ -5672,22 +5789,26 @@ QETH_DBF_TEXT_(setup, 2, "5err%d", rc); goto out; } + /*network device will be recovered*/ + if (card->dev) { + card->dev->hard_header = card->orig_hard_header; + return 0; + } /* at first set_online allocate netdev */ + card->dev = qeth_get_netdevice(card->info.type, + card->info.link_type); if (!card->dev){ - card->dev = qeth_get_netdevice(card->info.type, - card->info.link_type); - if (!card->dev){ - qeth_qdio_clear_card(card, card->info.type == - QETH_CARD_TYPE_OSAE); - rc = -ENODEV; - QETH_DBF_TEXT_(setup, 2, "6err%d", rc); - goto out; - } - card->dev->priv = card; - card->dev->type = qeth_get_arphdr_type(card->info.type, - card->info.link_type); - card->dev->init = qeth_netdev_init; + qeth_qdio_clear_card(card, card->info.type == + QETH_CARD_TYPE_OSAE); + rc = -ENODEV; + QETH_DBF_TEXT_(setup, 2, "6err%d", rc); + goto out; } + card->dev->priv = card; + card->orig_hard_header = card->dev->hard_header; + card->dev->type = qeth_get_arphdr_type(card->info.type, + card->info.link_type); + card->dev->init = qeth_netdev_init; return 0; out: PRINT_ERR("Initialization in hardsetup failed! rc=%d\n", rc); @@ -5906,15 +6027,9 @@ } QETH_DBF_HEX(setup,2, card->dev->dev_addr, OSA_ADDR_LEN); - rc = qeth_layer2_send_setdelmac(card, &card->dev->dev_addr[0], - IPA_CMD_SETVMAC); - if (rc) { - card->info.layer2_mac_registered = 0; - PRINT_WARN("Error in processing MAC address on " \ - "device %s: x%x\n",CARD_BUS_ID(card),rc); + rc = qeth_layer2_send_setmac(card, &card->dev->dev_addr[0]); + if (rc) QETH_DBF_TEXT_(setup, 2,"2err%d",rc); - } else - card->info.layer2_mac_registered = 1; return 0; } @@ -6712,9 +6827,8 @@ rtnl_unlock(); if (!card->use_hard_stop) { __u8 *mac = &card->dev->dev_addr[0]; - if ((rc = qeth_layer2_send_setdelmac(card, mac, - IPA_CMD_DELVMAC))); - QETH_DBF_TEXT_(setup, 2, "Lerr%d", rc); + rc = qeth_layer2_send_delmac(card, mac); + QETH_DBF_TEXT_(setup, 2, "Lerr%d", rc); if ((rc = qeth_send_stoplan(card))) QETH_DBF_TEXT_(setup, 2, "1err%d", rc); } @@ -6872,8 +6986,10 @@ qeth_register_netdev(struct qeth_card *card) { QETH_DBF_TEXT(setup, 3, "regnetd"); - if (card->dev->reg_state != NETREG_UNINITIALIZED) + if (card->dev->reg_state != NETREG_UNINITIALIZED) { + qeth_netdev_init(card->dev); return 0; + } /* sysfs magic */ SET_NETDEV_DEV(card->dev, &card->gdev->dev); return register_netdev(card->dev); @@ -6961,9 +7077,9 @@ } recover_flag = card->state; - if (ccw_device_set_online(CARD_RDEV(card)) || - ccw_device_set_online(CARD_WDEV(card)) || - ccw_device_set_online(CARD_DDEV(card))){ + if ((rc = ccw_device_set_online(CARD_RDEV(card))) || + (rc = ccw_device_set_online(CARD_WDEV(card))) || + (rc = ccw_device_set_online(CARD_DDEV(card)))){ QETH_DBF_TEXT_(setup, 2, "1err%d", rc); return -EIO; } @@ -7157,7 +7273,8 @@ card = qeth_get_card_from_dev(dev); if (card == NULL) goto out; - if(card->options.layer2) + if((card->options.layer2) || + (card->dev->hard_header == qeth_fake_header)) goto out; rcu_read_lock(); diff -urN linux-2.6.11-rc3/drivers/s390/net/qeth_sys.c linux-2.6.11-rc4/drivers/s390/net/qeth_sys.c --- linux-2.6.11-rc3/drivers/s390/net/qeth_sys.c 2005-02-12 19:50:39.480917210 -0800 +++ linux-2.6.11-rc4/drivers/s390/net/qeth_sys.c 2005-02-12 19:51:00.710836297 -0800 @@ -1,6 +1,6 @@ /* * - * linux/drivers/s390/net/qeth_sys.c ($Revision: 1.48 $) + * linux/drivers/s390/net/qeth_sys.c ($Revision: 1.49 $) * * Linux on zSeries OSA Express and HiperSockets support * This file contains code related to sysfs. @@ -20,7 +20,7 @@ #include "qeth_mpc.h" #include "qeth_fs.h" -const char *VERSION_QETH_SYS_C = "$Revision: 1.48 $"; +const char *VERSION_QETH_SYS_C = "$Revision: 1.49 $"; /*****************************************************************************/ /* */ @@ -514,19 +514,11 @@ return -EPERM; i = simple_strtoul(buf, &tmp, 16); - if ((i == 0) || (i == 1)) { - card->options.fake_ll = i; - if (card->dev) { - if (i) - card->dev->hard_header = qeth_fake_header; - else - card->dev->hard_header = NULL; - } - } - else { + if ((i != 0) && (i != 1)) { PRINT_WARN("fake_ll: write 0 or 1 to this file!\n"); return -EINVAL; } + card->options.fake_ll = i; return count; } diff -urN linux-2.6.11-rc3/drivers/s390/scsi/zfcp_erp.c linux-2.6.11-rc4/drivers/s390/scsi/zfcp_erp.c --- linux-2.6.11-rc3/drivers/s390/scsi/zfcp_erp.c 2004-12-24 13:35:50.000000000 -0800 +++ linux-2.6.11-rc4/drivers/s390/scsi/zfcp_erp.c 2005-02-12 19:51:00.728837076 -0800 @@ -31,7 +31,7 @@ #define ZFCP_LOG_AREA ZFCP_LOG_AREA_ERP -#define ZFCP_ERP_REVISION "$Revision: 1.85 $" +#define ZFCP_ERP_REVISION "$Revision: 1.86 $" #include "zfcp_ext.h" @@ -369,7 +369,7 @@ ZFCP_LOG_NORMAL("error: initiation of Send ELS failed for port " "0x%08x on adapter %s\n", d_id, zfcp_get_busid_by_adapter(adapter)); - del_timer_sync(send_els->timer); + del_timer(send_els->timer); goto freemem; } @@ -969,7 +969,7 @@ debug_event(adapter->erp_dbf, 2, &erp_action->action, sizeof (int)); if (!(set_mask & ZFCP_STATUS_ERP_TIMEDOUT)) - del_timer_sync(&erp_action->timer); + del_timer(&erp_action->timer); erp_action->status |= set_mask; zfcp_erp_action_ready(erp_action); retval = 0; diff -urN linux-2.6.11-rc3/drivers/s390/scsi/zfcp_fsf.c linux-2.6.11-rc4/drivers/s390/scsi/zfcp_fsf.c --- linux-2.6.11-rc3/drivers/s390/scsi/zfcp_fsf.c 2004-12-24 13:35:23.000000000 -0800 +++ linux-2.6.11-rc4/drivers/s390/scsi/zfcp_fsf.c 2005-02-12 19:51:00.763838591 -0800 @@ -30,7 +30,7 @@ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ -#define ZFCP_FSF_C_REVISION "$Revision: 1.88 $" +#define ZFCP_FSF_C_REVISION "$Revision: 1.92 $" #include "zfcp_ext.h" @@ -3203,7 +3203,9 @@ sizeof (union fsf_status_qual)); debug_text_event(adapter->erp_dbf, 2, "fsf_s_l_sh_vio"); - zfcp_erp_unit_failed(unit); + zfcp_erp_unit_access_denied(unit); + atomic_clear_mask(ZFCP_STATUS_UNIT_SHARED, &unit->status); + atomic_clear_mask(ZFCP_STATUS_UNIT_READONLY, &unit->status); fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR; break; @@ -4320,22 +4322,19 @@ /* check for underrun */ if (unlikely(fcp_rsp_iu->validity.bits.fcp_resid_under)) { - ZFCP_LOG_DEBUG("A data underrun was detected for a command. " - "unit 0x%016Lx, port 0x%016Lx, adapter %s. " - "The response data length is " - "%d, the original length was %d.\n", - unit->fcp_lun, - unit->port->wwpn, - zfcp_get_busid_by_unit(unit), - fcp_rsp_iu->fcp_resid, - (int) zfcp_get_fcp_dl(fcp_cmnd_iu)); - /* - * It may not have been possible to send all data and the - * underrun on send may already be in scpnt->resid, so it's add - * not equals in the below statement. - */ - scpnt->resid += fcp_rsp_iu->fcp_resid; - ZFCP_LOG_TRACE("scpnt->resid=0x%x\n", scpnt->resid); + ZFCP_LOG_INFO("A data underrun was detected for a command. " + "unit 0x%016Lx, port 0x%016Lx, adapter %s. " + "The response data length is " + "%d, the original length was %d.\n", + unit->fcp_lun, + unit->port->wwpn, + zfcp_get_busid_by_unit(unit), + fcp_rsp_iu->fcp_resid, + (int) zfcp_get_fcp_dl(fcp_cmnd_iu)); + + scpnt->resid = fcp_rsp_iu->fcp_resid; + if (scpnt->request_bufflen - scpnt->resid < scpnt->underflow) + scpnt->result |= DID_ERROR << 16; } skip_fsfstatus: @@ -5023,7 +5022,7 @@ * timer might be expired (absolutely unlikely) */ if (timer) - del_timer_sync(timer); + del_timer(timer); write_lock_irqsave(&adapter->fsf_req_list_lock, flags); list_del(&fsf_req->list); write_unlock_irqrestore(&adapter->fsf_req_list_lock, flags); diff -urN linux-2.6.11-rc3/drivers/scsi/ahci.c linux-2.6.11-rc4/drivers/scsi/ahci.c --- linux-2.6.11-rc3/drivers/scsi/ahci.c 2005-02-12 19:50:39.590921972 -0800 +++ linux-2.6.11-rc4/drivers/scsi/ahci.c 2005-02-12 19:51:02.488913273 -0800 @@ -250,6 +250,8 @@ board_ahci }, /* ICH7R */ { PCI_VENDOR_ID_INTEL, 0x27c3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, board_ahci }, /* ICH7R */ + { PCI_VENDOR_ID_AL, 0x5288, PCI_ANY_ID, PCI_ANY_ID, 0, 0, + board_ahci }, /* ULi M5288 */ { } /* terminate list */ }; diff -urN linux-2.6.11-rc3/drivers/scsi/ide-scsi.c linux-2.6.11-rc4/drivers/scsi/ide-scsi.c --- linux-2.6.11-rc3/drivers/scsi/ide-scsi.c 2005-02-12 19:50:39.673925565 -0800 +++ linux-2.6.11-rc4/drivers/scsi/ide-scsi.c 2005-02-12 19:51:03.417953493 -0800 @@ -152,7 +152,7 @@ } count = min(pc->sg->length - pc->b_count, bcount); buf = page_address(pc->sg->page) + pc->sg->offset; - atapi_input_bytes (drive, buf + pc->b_count, count); + drive->hwif->atapi_input_bytes(drive, buf + pc->b_count, count); bcount -= count; pc->b_count += count; if (pc->b_count == pc->sg->length) { pc->sg++; @@ -174,7 +174,7 @@ } count = min(pc->sg->length - pc->b_count, bcount); buf = page_address(pc->sg->page) + pc->sg->offset; - atapi_output_bytes (drive, buf + pc->b_count, count); + drive->hwif->atapi_output_bytes(drive, buf + pc->b_count, count); bcount -= count; pc->b_count += count; if (pc->b_count == pc->sg->length) { pc->sg++; @@ -481,7 +481,7 @@ if (pc->sg) idescsi_input_buffers(drive, pc, temp); else - atapi_input_bytes(drive, pc->current_position, temp); + drive->hwif->atapi_input_bytes(drive, pc->current_position, temp); printk(KERN_ERR "ide-scsi: transferred %d of %d bytes\n", temp, bcount.all); } pc->actually_transferred += temp; @@ -541,7 +541,7 @@ /* Set the interrupt routine */ ide_set_handler(drive, &idescsi_pc_intr, get_timeout(pc), idescsi_expiry); /* Send the actual packet */ - atapi_output_bytes(drive, scsi->pc->c, 12); + drive->hwif->atapi_output_bytes(drive, scsi->pc->c, 12); if (test_bit (PC_DMA_OK, &pc->flags)) { set_bit (PC_DMA_IN_PROGRESS, &pc->flags); hwif->dma_start(drive); diff -urN linux-2.6.11-rc3/drivers/scsi/libata-core.c linux-2.6.11-rc4/drivers/scsi/libata-core.c --- linux-2.6.11-rc3/drivers/scsi/libata-core.c 2005-02-12 19:50:39.687926171 -0800 +++ linux-2.6.11-rc4/drivers/scsi/libata-core.c 2005-02-12 19:51:03.511957563 -0800 @@ -1700,6 +1700,69 @@ DPRINTK("EXIT\n"); } +static void ata_pr_blacklisted(struct ata_port *ap, struct ata_device *dev) +{ + printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, disabling DMA\n", + ap->id, dev->devno); +} + +static const char * ata_dma_blacklist [] = { + "WDC AC11000H", + "WDC AC22100H", + "WDC AC32500H", + "WDC AC33100H", + "WDC AC31600H", + "WDC AC32100H", + "WDC AC23200L", + "Compaq CRD-8241B", + "CRD-8400B", + "CRD-8480B", + "CRD-8482B", + "CRD-84", + "SanDisk SDP3B", + "SanDisk SDP3B-64", + "SANYO CD-ROM CRD", + "HITACHI CDR-8", + "HITACHI CDR-8335", + "HITACHI CDR-8435", + "Toshiba CD-ROM XM-6202B", + "CD-532E-A", + "E-IDE CD-ROM CR-840", + "CD-ROM Drive/F5A", + "WPI CDD-820", + "SAMSUNG CD-ROM SC-148C", + "SAMSUNG CD-ROM SC", + "SanDisk SDP3B-64", + "SAMSUNG CD-ROM SN-124", + "ATAPI CD-ROM DRIVE 40X MAXIMUM", + "_NEC DV5800A", +}; + +static int ata_dma_blacklisted(struct ata_port *ap, struct ata_device *dev) +{ + unsigned char model_num[40]; + char *s; + unsigned int len; + int i; + + ata_dev_id_string(dev->id, model_num, ATA_ID_PROD_OFS, + sizeof(model_num)); + s = &model_num[0]; + len = strnlen(s, sizeof(model_num)); + + /* ATAPI specifies that empty space is blank-filled; remove blanks */ + while ((len > 0) && (s[len - 1] == ' ')) { + len--; + s[len] = 0; + } + + for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i++) + if (!strncmp(ata_dma_blacklist[i], s, len)) + return 1; + + return 0; +} + static unsigned int ata_get_mode_mask(struct ata_port *ap, int shift) { struct ata_device *master, *slave; @@ -1712,17 +1775,37 @@ if (shift == ATA_SHIFT_UDMA) { mask = ap->udma_mask; - if (ata_dev_present(master)) + if (ata_dev_present(master)) { mask &= (master->id[ATA_ID_UDMA_MODES] & 0xff); - if (ata_dev_present(slave)) + if (ata_dma_blacklisted(ap, master)) { + mask = 0; + ata_pr_blacklisted(ap, master); + } + } + if (ata_dev_present(slave)) { mask &= (slave->id[ATA_ID_UDMA_MODES] & 0xff); + if (ata_dma_blacklisted(ap, slave)) { + mask = 0; + ata_pr_blacklisted(ap, slave); + } + } } else if (shift == ATA_SHIFT_MWDMA) { mask = ap->mwdma_mask; - if (ata_dev_present(master)) + if (ata_dev_present(master)) { mask &= (master->id[ATA_ID_MWDMA_MODES] & 0x07); - if (ata_dev_present(slave)) + if (ata_dma_blacklisted(ap, master)) { + mask = 0; + ata_pr_blacklisted(ap, master); + } + } + if (ata_dev_present(slave)) { mask &= (slave->id[ATA_ID_MWDMA_MODES] & 0x07); + if (ata_dma_blacklisted(ap, slave)) { + mask = 0; + ata_pr_blacklisted(ap, slave); + } + } } else if (shift == ATA_SHIFT_PIO) { mask = ap->pio_mask; @@ -3452,32 +3535,28 @@ } static struct ata_probe_ent * -ata_probe_ent_alloc(int n, struct device *dev, struct ata_port_info **port) +ata_probe_ent_alloc(struct device *dev, struct ata_port_info *port) { struct ata_probe_ent *probe_ent; - int i; - probe_ent = kmalloc(sizeof(*probe_ent) * n, GFP_KERNEL); + probe_ent = kmalloc(sizeof(*probe_ent), GFP_KERNEL); if (!probe_ent) { printk(KERN_ERR DRV_NAME "(%s): out of memory\n", kobject_name(&(dev->kobj))); return NULL; } - memset(probe_ent, 0, sizeof(*probe_ent) * n); + memset(probe_ent, 0, sizeof(*probe_ent)); - for (i = 0; i < n; i++) { - INIT_LIST_HEAD(&probe_ent[i].node); - probe_ent[i].dev = dev; - - probe_ent[i].sht = port[i]->sht; - probe_ent[i].host_flags = port[i]->host_flags; - probe_ent[i].pio_mask = port[i]->pio_mask; - probe_ent[i].mwdma_mask = port[i]->mwdma_mask; - probe_ent[i].udma_mask = port[i]->udma_mask; - probe_ent[i].port_ops = port[i]->port_ops; + INIT_LIST_HEAD(&probe_ent->node); + probe_ent->dev = dev; - } + probe_ent->sht = port->sht; + probe_ent->host_flags = port->host_flags; + probe_ent->pio_mask = port->pio_mask; + probe_ent->mwdma_mask = port->mwdma_mask; + probe_ent->udma_mask = port->udma_mask; + probe_ent->port_ops = port->port_ops; return probe_ent; } @@ -3487,7 +3566,7 @@ ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port) { struct ata_probe_ent *probe_ent = - ata_probe_ent_alloc(1, pci_dev_to_dev(pdev), port); + ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]); if (!probe_ent) return NULL; @@ -3513,39 +3592,47 @@ return probe_ent; } -struct ata_probe_ent * -ata_pci_init_legacy_mode(struct pci_dev *pdev, struct ata_port_info **port) +static struct ata_probe_ent * +ata_pci_init_legacy_mode(struct pci_dev *pdev, struct ata_port_info **port, + struct ata_probe_ent **ppe2) { - struct ata_probe_ent *probe_ent = - ata_probe_ent_alloc(2, pci_dev_to_dev(pdev), port); + struct ata_probe_ent *probe_ent, *probe_ent2; + + probe_ent = ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]); if (!probe_ent) return NULL; + probe_ent2 = ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[1]); + if (!probe_ent2) { + kfree(probe_ent); + return NULL; + } + + probe_ent->n_ports = 1; + probe_ent->irq = 14; - probe_ent[0].n_ports = 1; - probe_ent[0].irq = 14; + probe_ent->hard_port_no = 0; + probe_ent->legacy_mode = 1; - probe_ent[0].hard_port_no = 0; - probe_ent[0].legacy_mode = 1; + probe_ent2->n_ports = 1; + probe_ent2->irq = 15; - probe_ent[1].n_ports = 1; - probe_ent[1].irq = 15; + probe_ent2->hard_port_no = 1; + probe_ent2->legacy_mode = 1; - probe_ent[1].hard_port_no = 1; - probe_ent[1].legacy_mode = 1; - - probe_ent[0].port[0].cmd_addr = 0x1f0; - probe_ent[0].port[0].altstatus_addr = - probe_ent[0].port[0].ctl_addr = 0x3f6; - probe_ent[0].port[0].bmdma_addr = pci_resource_start(pdev, 4); - - probe_ent[1].port[0].cmd_addr = 0x170; - probe_ent[1].port[0].altstatus_addr = - probe_ent[1].port[0].ctl_addr = 0x376; - probe_ent[1].port[0].bmdma_addr = pci_resource_start(pdev, 4)+8; + probe_ent->port[0].cmd_addr = 0x1f0; + probe_ent->port[0].altstatus_addr = + probe_ent->port[0].ctl_addr = 0x3f6; + probe_ent->port[0].bmdma_addr = pci_resource_start(pdev, 4); - ata_std_ports(&probe_ent[0].port[0]); - ata_std_ports(&probe_ent[1].port[0]); + probe_ent2->port[0].cmd_addr = 0x170; + probe_ent2->port[0].altstatus_addr = + probe_ent2->port[0].ctl_addr = 0x376; + probe_ent2->port[0].bmdma_addr = pci_resource_start(pdev, 4)+8; + + ata_std_ports(&probe_ent->port[0]); + ata_std_ports(&probe_ent2->port[0]); + *ppe2 = probe_ent2; return probe_ent; } @@ -3579,7 +3666,8 @@ else port[1] = port[0]; - if ((port[0]->host_flags & ATA_FLAG_NO_LEGACY) == 0) { + if ((port[0]->host_flags & ATA_FLAG_NO_LEGACY) == 0 + && (pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) { /* TODO: support transitioning to native mode? */ pci_read_config_byte(pdev, PCI_CLASS_PROG, &tmp8); mask = (1 << 2) | (1 << 0); @@ -3641,9 +3729,7 @@ goto err_out_regions; if (legacy_mode) { - probe_ent = ata_pci_init_legacy_mode(pdev, port); - if (probe_ent) - probe_ent2 = &probe_ent[1]; + probe_ent = ata_pci_init_legacy_mode(pdev, port, &probe_ent2); } else probe_ent = ata_pci_init_native_mode(pdev, port); if (!probe_ent) { @@ -3657,8 +3743,12 @@ if (legacy_mode) { if (legacy_mode & (1 << 0)) ata_device_add(probe_ent); + else + kfree(probe_ent); if (legacy_mode & (1 << 1)) ata_device_add(probe_ent2); + else + kfree(probe_ent2); } else { ata_device_add(probe_ent); } @@ -3848,7 +3938,6 @@ #ifdef CONFIG_PCI EXPORT_SYMBOL_GPL(pci_test_config_bits); -EXPORT_SYMBOL_GPL(ata_pci_init_legacy_mode); EXPORT_SYMBOL_GPL(ata_pci_init_native_mode); EXPORT_SYMBOL_GPL(ata_pci_init_one); EXPORT_SYMBOL_GPL(ata_pci_remove_one); diff -urN linux-2.6.11-rc3/drivers/scsi/libata-scsi.c linux-2.6.11-rc4/drivers/scsi/libata-scsi.c --- linux-2.6.11-rc3/drivers/scsi/libata-scsi.c 2005-02-12 19:50:39.688926215 -0800 +++ linux-2.6.11-rc4/drivers/scsi/libata-scsi.c 2005-02-12 19:51:03.536958645 -0800 @@ -202,7 +202,7 @@ {0x40, MEDIUM_ERROR, 0x11, 0x04}, // Uncorrectable ECC error Unrecovered read error /* BBD - block marked bad */ {0x80, MEDIUM_ERROR, 0x11, 0x04}, // Block marked bad Medium error, unrecovered read error - {0xFF, 0xFF, 0xFF, 0xFF}, // END mark + {0xFF, 0xFF, 0xFF, 0xFF}, // END mark }; static unsigned char stat_table[][4] = { /* Must be first because BUSY means no other bits valid */ @@ -210,22 +210,22 @@ {0x20, HARDWARE_ERROR, 0x00, 0x00}, // Device fault {0x08, ABORTED_COMMAND, 0x47, 0x00}, // Timed out in xfer, fake parity for now {0x04, RECOVERED_ERROR, 0x11, 0x00}, // Recovered ECC error Medium error, recovered - {0xFF, 0xFF, 0xFF, 0xFF}, // END mark + {0xFF, 0xFF, 0xFF, 0xFF}, // END mark }; int i = 0; cmd->result = SAM_STAT_CHECK_CONDITION; - + /* * Is this an error we can process/parse */ - + if(drv_stat & ATA_ERR) /* Read the err bits */ err = ata_chk_err(qc->ap); /* Display the ATA level error info */ - + printk(KERN_WARNING "ata%u: status=0x%02x { ", qc->ap->id, drv_stat); if(drv_stat & 0x80) { @@ -242,7 +242,7 @@ if(drv_stat & 0x01) printk("Error "); } printk("}\n"); - + if(err) { printk(KERN_WARNING "ata%u: error=0x%02x { ", qc->ap->id, err); @@ -259,11 +259,11 @@ if(err & 0x02) printk("TrackZeroNotFound "); if(err & 0x01) printk("AddrMarkNotFound "); printk("}\n"); - + /* Should we dump sector info here too ?? */ } - - + + /* Look for err */ while(sense_table[i][0] != 0xFF) { @@ -301,7 +301,7 @@ /* No error ?? */ printk(KERN_ERR "ata%u: called with no error (%02X)!\n", qc->ap->id, drv_stat); /* additional-sense-code[-qualifier] */ - + sb[0] = 0x70; sb[2] = MEDIUM_ERROR; sb[7] = 0x0A; @@ -488,19 +488,24 @@ } if (lba48) { + tf->command = ATA_CMD_VERIFY_EXT; + tf->hob_nsect = (n_sect >> 8) & 0xff; tf->hob_lbah = (sect >> 40) & 0xff; tf->hob_lbam = (sect >> 32) & 0xff; tf->hob_lbal = (sect >> 24) & 0xff; - } else + } else { + tf->command = ATA_CMD_VERIFY; + tf->device |= (sect >> 24) & 0xf; + } tf->nsect = n_sect & 0xff; - tf->hob_lbah = (sect >> 16) & 0xff; - tf->hob_lbam = (sect >> 8) & 0xff; - tf->hob_lbal = sect & 0xff; + tf->lbah = (sect >> 16) & 0xff; + tf->lbam = (sect >> 8) & 0xff; + tf->lbal = sect & 0xff; return 0; } @@ -600,7 +605,7 @@ return 1; /* stores LBA27:24 in lower 4 bits of device reg */ - tf->device |= scsicmd[2]; + tf->device |= scsicmd[6]; qc->nsect = scsicmd[13]; } diff -urN linux-2.6.11-rc3/drivers/scsi/megaraid/Kconfig.megaraid linux-2.6.11-rc4/drivers/scsi/megaraid/Kconfig.megaraid --- linux-2.6.11-rc3/drivers/scsi/megaraid/Kconfig.megaraid 2004-12-24 13:34:01.000000000 -0800 +++ linux-2.6.11-rc4/drivers/scsi/megaraid/Kconfig.megaraid 2005-02-12 19:51:03.539958775 -0800 @@ -59,6 +59,7 @@ INTEL RAID Controller SRCU51L 1000:1960:8086:0520 FSC MegaRAID PCI Express ROMB 1000:0408:1734:1065 ACER MegaRAID ROMB-2E 1000:0408:1025:004D + NEC MegaRAID PCI Express ROMB 1000:0408:1033:8287 To compile this driver as a module, choose M here: the module will be called megaraid_mbox diff -urN linux-2.6.11-rc3/drivers/scsi/megaraid/mega_common.h linux-2.6.11-rc4/drivers/scsi/megaraid/mega_common.h --- linux-2.6.11-rc3/drivers/scsi/megaraid/mega_common.h 2004-12-24 13:34:58.000000000 -0800 +++ linux-2.6.11-rc4/drivers/scsi/megaraid/mega_common.h 2005-02-12 19:51:03.548959165 -0800 @@ -221,6 +221,9 @@ #define MRAID_IS_LOGICAL(adp, scp) \ (SCP2CHANNEL(scp) == (adp)->max_channel) ? 1 : 0 +#define MRAID_IS_LOGICAL_SDEV(adp, sdev) \ + (sdev->channel == (adp)->max_channel) ? 1 : 0 + #define MRAID_GET_DEVICE_MAP(adp, scp, p_chan, target, islogical) \ /* \ * Is the request coming for the virtual channel \ diff -urN linux-2.6.11-rc3/drivers/scsi/megaraid/megaraid_ioctl.h linux-2.6.11-rc4/drivers/scsi/megaraid/megaraid_ioctl.h --- linux-2.6.11-rc3/drivers/scsi/megaraid/megaraid_ioctl.h 2004-12-24 13:34:30.000000000 -0800 +++ linux-2.6.11-rc4/drivers/scsi/megaraid/megaraid_ioctl.h 2005-02-12 19:51:03.570960117 -0800 @@ -291,5 +291,6 @@ int mraid_mm_register_adp(mraid_mmadp_t *); int mraid_mm_unregister_adp(uint32_t); +uint32_t mraid_mm_adapter_app_handle(uint32_t); #endif /* _MEGARAID_IOCTL_H_ */ diff -urN linux-2.6.11-rc3/drivers/scsi/megaraid/megaraid_mbox.c linux-2.6.11-rc4/drivers/scsi/megaraid/megaraid_mbox.c --- linux-2.6.11-rc3/drivers/scsi/megaraid/megaraid_mbox.c 2005-02-12 19:50:39.694926474 -0800 +++ linux-2.6.11-rc4/drivers/scsi/megaraid/megaraid_mbox.c 2005-02-12 19:51:03.575960334 -0800 @@ -10,7 +10,7 @@ * 2 of the License, or (at your option) any later version. * * FILE : megaraid_mbox.c - * Version : v2.20.4.1 (Nov 04 2004) + * Version : v2.20.4.5 (Feb 03 2005) * * Authors: * Atul Mukker @@ -60,12 +60,11 @@ * INTEL RAID Controller SROMBU42E 1000 0408 8086 3499 * INTEL RAID Controller SRCU51L 1000 1960 8086 0520 * - * * FSC MegaRAID PCI Express ROMB 1000 0408 1734 1065 * - * * ACER MegaRAID ROMB-2E 1000 0408 1025 004D * + * NEC MegaRAID PCI Express ROMB 1000 0408 1033 8287 * * For history of changes, see Documentation/ChangeLog.megaraid */ @@ -91,6 +90,9 @@ static int megaraid_mbox_setup_dma_pools(adapter_t *); static void megaraid_mbox_teardown_dma_pools(adapter_t *); +static int megaraid_sysfs_alloc_resources(adapter_t *); +static void megaraid_sysfs_free_resources(adapter_t *); + static int megaraid_abort_handler(struct scsi_cmnd *); static int megaraid_reset_handler(struct scsi_cmnd *); @@ -121,6 +123,9 @@ static void megaraid_mbox_dpc(unsigned long); +static ssize_t megaraid_sysfs_show_app_hndl(struct class_device *, char *); +static ssize_t megaraid_sysfs_show_ldnum(struct device *, char *); + static int megaraid_cmm_register(adapter_t *); static int megaraid_cmm_unregister(adapter_t *); static int megaraid_mbox_mm_handler(unsigned long, uioc_t *, uint32_t); @@ -197,7 +202,7 @@ * ### global data ### */ static uint8_t megaraid_mbox_version[8] = - { 0x02, 0x20, 0x04, 0x00, 9, 27, 20, 4 }; + { 0x02, 0x20, 0x04, 0x05, 2, 3, 20, 5 }; /* @@ -301,6 +306,12 @@ PCI_SUBSYS_ID_PERC3_SC, }, { + PCI_VENDOR_ID_AMI, + PCI_DEVICE_ID_AMI_MEGARAID3, + PCI_VENDOR_ID_AMI, + PCI_SUBSYS_ID_PERC3_DC, + }, + { PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_MEGARAID_SCSI_320_0, PCI_VENDOR_ID_LSI_LOGIC, @@ -438,6 +449,12 @@ PCI_VENDOR_ID_AI, PCI_SUBSYS_ID_MEGARAID_ACER_ROMB_2E, }, + { + PCI_VENDOR_ID_LSI_LOGIC, + PCI_DEVICE_ID_MEGARAID_NEC_ROMB_2E, + PCI_VENDOR_ID_NEC, + PCI_SUBSYS_ID_MEGARAID_NEC_ROMB_2E, + }, {0} /* Terminating entry */ }; MODULE_DEVICE_TABLE(pci, pci_id_table_g); @@ -454,6 +471,29 @@ }; + +// definitions for the device attributes for exporting logical drive number +// for a scsi address (Host, Channel, Id, Lun) + +CLASS_DEVICE_ATTR(megaraid_mbox_app_hndl, S_IRUSR, megaraid_sysfs_show_app_hndl, + NULL); + +// Host template initializer for megaraid mbox sysfs device attributes +static struct class_device_attribute *megaraid_shost_attrs[] = { + &class_device_attr_megaraid_mbox_app_hndl, + NULL, +}; + + +DEVICE_ATTR(megaraid_mbox_ld, S_IRUSR, megaraid_sysfs_show_ldnum, NULL); + +// Host template initializer for megaraid mbox sysfs device attributes +static struct device_attribute *megaraid_sdev_attrs[] = { + &dev_attr_megaraid_mbox_ld, + NULL, +}; + + /* * Scsi host template for megaraid unified driver */ @@ -467,6 +507,8 @@ .eh_bus_reset_handler = megaraid_reset_handler, .eh_host_reset_handler = megaraid_reset_handler, .use_clustering = ENABLE_CLUSTERING, + .sdev_attrs = megaraid_sdev_attrs, + .shost_attrs = megaraid_shost_attrs, }; @@ -953,6 +995,8 @@ } adapter->device_ids[adapter->max_channel][adapter->init_id] = 0xFF; + + raid_dev->random_del_supported = 1; } /* @@ -977,6 +1021,14 @@ */ adapter->cmd_per_lun = megaraid_cmd_per_lun; + /* + * Allocate resources required to issue FW calls, when sysfs is + * accessed + */ + if (megaraid_sysfs_alloc_resources(adapter) != 0) { + goto out_alloc_cmds; + } + // Set the DMA mask to 64-bit. All supported controllers as capable of // DMA in this range if (pci_set_dma_mask(adapter->pdev, 0xFFFFFFFFFFFFFFFFULL) != 0) { @@ -984,7 +1036,7 @@ con_log(CL_ANN, (KERN_WARNING "megaraid: could not set DMA mask for 64-bit.\n")); - goto out_alloc_cmds; + goto out_free_sysfs_res; } // setup tasklet for DPC @@ -996,6 +1048,8 @@ return 0; +out_free_sysfs_res: + megaraid_sysfs_free_resources(adapter); out_alloc_cmds: megaraid_free_cmd_packets(adapter); out_free_irq: @@ -1025,6 +1079,8 @@ tasklet_kill(&adapter->dpc_h); + megaraid_sysfs_free_resources(adapter); + megaraid_free_cmd_packets(adapter); free_irq(adapter->irq, adapter); @@ -1559,12 +1615,14 @@ if (scb->dma_direction == PCI_DMA_TODEVICE) { if (!scb->scp->use_sg) { // sg list not used - pci_dma_sync_single_for_device(adapter->pdev, ccb->buf_dma_h, + pci_dma_sync_single_for_device(adapter->pdev, + ccb->buf_dma_h, scb->scp->request_bufflen, PCI_DMA_TODEVICE); } else { - pci_dma_sync_sg_for_device(adapter->pdev, scb->scp->request_buffer, + pci_dma_sync_sg_for_device(adapter->pdev, + scb->scp->request_buffer, scb->scp->use_sg, PCI_DMA_TODEVICE); } } @@ -2107,7 +2165,8 @@ channel = scb->dev_channel; target = scb->dev_target; - pthru->timeout = 1; // 0=6sec, 1=60sec, 2=10min, 3=3hrs + // 0=6sec, 1=60sec, 2=10min, 3=3hrs, 4=NO timeout + pthru->timeout = 4; pthru->ars = 1; pthru->islogical = 0; pthru->channel = 0; @@ -2155,7 +2214,8 @@ channel = scb->dev_channel; target = scb->dev_target; - epthru->timeout = 1; // 0=6sec, 1=60sec, 2=10min, 3=3hrs + // 0=6sec, 1=60sec, 2=10min, 3=3hrs, 4=NO timeout + epthru->timeout = 4; epthru->ars = 1; epthru->islogical = 0; epthru->channel = 0; @@ -3306,7 +3366,7 @@ memset((caddr_t)raw_mbox, 0, sizeof(mbox_t)); raw_mbox[0] = FC_DEL_LOGDRV; - raw_mbox[0] = OP_SUP_DEL_LOGDRV; + raw_mbox[2] = OP_SUP_DEL_LOGDRV; // Issue the command rval = 0; @@ -3719,8 +3779,9 @@ spin_unlock_irqrestore(USER_FREE_LIST_LOCK(adapter), flags); - scb->state = SCB_ACTIVE; - scb->dma_type = MRAID_DMA_NONE; + scb->state = SCB_ACTIVE; + scb->dma_type = MRAID_DMA_NONE; + scb->dma_direction = PCI_DMA_NONE; ccb = (mbox_ccb_t *)scb->ccb; mbox64 = (mbox64_t *)(unsigned long)kioc->cmdbuf; @@ -3888,6 +3949,324 @@ */ + +/** + * megaraid_sysfs_alloc_resources - allocate sysfs related resources + * + * Allocate packets required to issue FW calls whenever the sysfs attributes + * are read. These attributes would require up-to-date information from the + * FW. Also set up resources for mutual exclusion to share these resources and + * the wait queue. + * + * @param adapter : controller's soft state + * + * @return 0 on success + * @return -ERROR_CODE on failure + */ +static int +megaraid_sysfs_alloc_resources(adapter_t *adapter) +{ + mraid_device_t *raid_dev = ADAP2RAIDDEV(adapter); + int rval = 0; + + raid_dev->sysfs_uioc = kmalloc(sizeof(uioc_t), GFP_KERNEL); + + raid_dev->sysfs_mbox64 = kmalloc(sizeof(mbox64_t), GFP_KERNEL); + + raid_dev->sysfs_buffer = pci_alloc_consistent(adapter->pdev, + PAGE_SIZE, &raid_dev->sysfs_buffer_dma); + + if (!raid_dev->sysfs_uioc || !raid_dev->sysfs_mbox64 || + !raid_dev->sysfs_buffer) { + + con_log(CL_ANN, (KERN_WARNING + "megaraid: out of memory, %s %d\n", __FUNCTION__, + __LINE__)); + + rval = -ENOMEM; + + megaraid_sysfs_free_resources(adapter); + } + + sema_init(&raid_dev->sysfs_sem, 1); + + init_waitqueue_head(&raid_dev->sysfs_wait_q); + + return rval; +} + + +/** + * megaraid_sysfs_free_resources - free sysfs related resources + * + * Free packets allocated for sysfs FW commands + * + * @param adapter : controller's soft state + */ +static void +megaraid_sysfs_free_resources(adapter_t *adapter) +{ + mraid_device_t *raid_dev = ADAP2RAIDDEV(adapter); + + if (raid_dev->sysfs_uioc) kfree(raid_dev->sysfs_uioc); + + if (raid_dev->sysfs_mbox64) kfree(raid_dev->sysfs_mbox64); + + if (raid_dev->sysfs_buffer) { + pci_free_consistent(adapter->pdev, PAGE_SIZE, + raid_dev->sysfs_buffer, raid_dev->sysfs_buffer_dma); + } +} + + +/** + * megaraid_sysfs_get_ldmap_done - callback for get ldmap + * + * Callback routine called in the ISR/tasklet context for get ldmap call + * + * @param uioc : completed packet + */ +static void +megaraid_sysfs_get_ldmap_done(uioc_t *uioc) +{ + adapter_t *adapter = (adapter_t *)uioc->buf_vaddr; + mraid_device_t *raid_dev = ADAP2RAIDDEV(adapter); + + uioc->status = 0; + + wake_up(&raid_dev->sysfs_wait_q); +} + + +/** + * megaraid_sysfs_get_ldmap_timeout - timeout handling for get ldmap + * + * Timeout routine to recover and return to application, in case the adapter + * has stopped responding. A timeout of 60 seconds for this command seem like + * a good value + * + * @param uioc : timed out packet + */ +static void +megaraid_sysfs_get_ldmap_timeout(unsigned long data) +{ + uioc_t *uioc = (uioc_t *)data; + adapter_t *adapter = (adapter_t *)uioc->buf_vaddr; + mraid_device_t *raid_dev = ADAP2RAIDDEV(adapter); + + uioc->status = -ETIME; + + wake_up(&raid_dev->sysfs_wait_q); +} + + +/** + * megaraid_sysfs_get_ldmap - get update logical drive map + * + * This routine will be called whenever user reads the logical drive + * attributes, go get the current logical drive mapping table from the + * firmware. We use the managment API's to issue commands to the controller. + * + * NOTE: The commands issuance functionality is not generalized and + * implemented in context of "get ld map" command only. If required, the + * command issuance logical can be trivially pulled out and implemented as a + * standalone libary. For now, this should suffice since there is no other + * user of this interface. + * + * @param adapter : controller's soft state + * + * @return 0 on success + * @return -1 on failure + */ +static int +megaraid_sysfs_get_ldmap(adapter_t *adapter) +{ + mraid_device_t *raid_dev = ADAP2RAIDDEV(adapter); + uioc_t *uioc; + mbox64_t *mbox64; + mbox_t *mbox; + char *raw_mbox; + struct timer_list sysfs_timer; + struct timer_list *timerp; + caddr_t ldmap; + int rval = 0; + + /* + * Allow only one read at a time to go through the sysfs attributes + */ + down(&raid_dev->sysfs_sem); + + uioc = raid_dev->sysfs_uioc; + mbox64 = raid_dev->sysfs_mbox64; + ldmap = raid_dev->sysfs_buffer; + + memset(uioc, 0, sizeof(uioc_t)); + memset(mbox64, 0, sizeof(mbox64_t)); + memset(ldmap, 0, sizeof(raid_dev->curr_ldmap)); + + mbox = &mbox64->mbox32; + raw_mbox = (char *)mbox; + uioc->cmdbuf = (uint64_t)(unsigned long)mbox64; + uioc->buf_vaddr = (caddr_t)adapter; + uioc->status = -ENODATA; + uioc->done = megaraid_sysfs_get_ldmap_done; + + /* + * Prepare the mailbox packet to get the current logical drive mapping + * table + */ + mbox->xferaddr = (uint32_t)raid_dev->sysfs_buffer_dma; + + raw_mbox[0] = FC_DEL_LOGDRV; + raw_mbox[2] = OP_GET_LDID_MAP; + + /* + * Setup a timer to recover from a non-responding controller + */ + timerp = &sysfs_timer; + init_timer(timerp); + + timerp->function = megaraid_sysfs_get_ldmap_timeout; + timerp->data = (unsigned long)uioc; + timerp->expires = jiffies + 60 * HZ; + + add_timer(timerp); + + /* + * Send the command to the firmware + */ + rval = megaraid_mbox_mm_command(adapter, uioc); + + if (rval == 0) { // command successfully issued + wait_event(raid_dev->sysfs_wait_q, (uioc->status != -ENODATA)); + + /* + * Check if the command timed out + */ + if (uioc->status == -ETIME) { + con_log(CL_ANN, (KERN_NOTICE + "megaraid: sysfs get ld map timed out\n")); + + rval = -ETIME; + } + else { + rval = mbox->status; + } + + if (rval == 0) { + memcpy(raid_dev->curr_ldmap, ldmap, + sizeof(raid_dev->curr_ldmap)); + } + else { + con_log(CL_ANN, (KERN_NOTICE + "megaraid: get ld map failed with %x\n", rval)); + } + } + else { + con_log(CL_ANN, (KERN_NOTICE + "megaraid: could not issue ldmap command:%x\n", rval)); + } + + + del_timer_sync(timerp); + + up(&raid_dev->sysfs_sem); + + return rval; +} + + +/** + * megaraid_sysfs_show_app_hndl - display application handle for this adapter + * + * Display the handle used by the applications while executing management + * tasks on the adapter. We invoke a management module API to get the adapter + * handle, since we do not interface with applications directly. + * + * @param cdev : class device object representation for the host + * @param buf : buffer to send data to + */ +static ssize_t +megaraid_sysfs_show_app_hndl(struct class_device *cdev, char *buf) +{ + struct Scsi_Host *shost = class_to_shost(cdev); + adapter_t *adapter = (adapter_t *)SCSIHOST2ADAP(shost); + uint32_t app_hndl; + + app_hndl = mraid_mm_adapter_app_handle(adapter->unique_id); + + return snprintf(buf, 8, "%u\n", app_hndl); +} + + +/** + * megaraid_sysfs_show_ldnum - display the logical drive number for this device + * + * Display the logical drive number for the device in question, if it a valid + * logical drive. For physical devices, "-1" is returned + * The logical drive number is displayed in following format + * + * + * + * + * @param dev : device object representation for the scsi device + * @param buf : buffer to send data to + */ +static ssize_t +megaraid_sysfs_show_ldnum(struct device *dev, char *buf) +{ + struct scsi_device *sdev = to_scsi_device(dev); + adapter_t *adapter = (adapter_t *)SCSIHOST2ADAP(sdev->host); + mraid_device_t *raid_dev = ADAP2RAIDDEV(adapter); + int scsi_id = -1; + int logical_drv = -1; + int ldid_map = -1; + uint32_t app_hndl = 0; + int mapped_sdev_id; + int rval; + int i; + + if (raid_dev->random_del_supported && + MRAID_IS_LOGICAL_SDEV(adapter, sdev)) { + + rval = megaraid_sysfs_get_ldmap(adapter); + if (rval == 0) { + + for (i = 0; i < MAX_LOGICAL_DRIVES_40LD; i++) { + + mapped_sdev_id = sdev->id; + + if (sdev->id > adapter->init_id) { + mapped_sdev_id -= 1; + } + + if (raid_dev->curr_ldmap[i] == mapped_sdev_id) { + + scsi_id = sdev->id; + + logical_drv = i; + + ldid_map = raid_dev->curr_ldmap[i]; + + app_hndl = mraid_mm_adapter_app_handle( + adapter->unique_id); + + break; + } + } + } + else { + con_log(CL_ANN, (KERN_NOTICE + "megaraid: sysfs get ld map failed: %x\n", + rval)); + } + } + + return snprintf(buf, 36, "%d %d %d %d\n", scsi_id, logical_drv, + ldid_map, app_hndl); +} + + /* * END: Mailbox Low Level Driver */ diff -urN linux-2.6.11-rc3/drivers/scsi/megaraid/megaraid_mbox.h linux-2.6.11-rc4/drivers/scsi/megaraid/megaraid_mbox.h --- linux-2.6.11-rc3/drivers/scsi/megaraid/megaraid_mbox.h 2004-12-24 13:34:30.000000000 -0800 +++ linux-2.6.11-rc4/drivers/scsi/megaraid/megaraid_mbox.h 2005-02-12 19:51:03.576960377 -0800 @@ -21,8 +21,8 @@ #include "megaraid_ioctl.h" -#define MEGARAID_VERSION "2.20.4.1" -#define MEGARAID_EXT_VERSION "(Release Date: Thu Nov 4 17:44:59 EST 2004)" +#define MEGARAID_VERSION "2.20.4.5" +#define MEGARAID_EXT_VERSION "(Release Date: Thu Feb 03 12:27:22 EST 2005)" /* @@ -137,6 +137,9 @@ #define PCI_SUBSYS_ID_PERC3_DC 0x0493 #define PCI_SUBSYS_ID_PERC3_SC 0x0475 +#define PCI_DEVICE_ID_MEGARAID_NEC_ROMB_2E 0x0408 +#define PCI_SUBSYS_ID_MEGARAID_NEC_ROMB_2E 0x8287 + #ifndef PCI_SUBSYS_ID_FSC #define PCI_SUBSYS_ID_FSC 0x1734 #endif @@ -216,6 +219,14 @@ * @param hw_error : set if FW not responding * @param fast_load : If set, skip physical device scanning * @channel_class : channel class, RAID or SCSI + * @sysfs_sem : semaphore to serialize access to sysfs res. + * @sysfs_uioc : management packet to issue FW calls from sysfs + * @sysfs_mbox64 : mailbox packet to issue FW calls from sysfs + * @sysfs_buffer : data buffer for FW commands issued from sysfs + * @sysfs_buffer_dma : DMA buffer for FW commands issued from sysfs + * @sysfs_wait_q : wait queue for sysfs operations + * @random_del_supported : set if the random deletion is supported + * @curr_ldmap : current LDID map * * Initialization structure for mailbox controllers: memory based and IO based * All the fields in this structure are LLD specific and may be discovered at @@ -223,6 +234,7 @@ * * NOTE: The fields of this structures are placed to minimize cache misses */ +#define MAX_LD_EXTENDED64 64 typedef struct { mbox64_t *una_mbox64; dma_addr_t una_mbox64_dma; @@ -247,6 +259,14 @@ int hw_error; int fast_load; uint8_t channel_class; + struct semaphore sysfs_sem; + uioc_t *sysfs_uioc; + mbox64_t *sysfs_mbox64; + caddr_t sysfs_buffer; + dma_addr_t sysfs_buffer_dma; + wait_queue_head_t sysfs_wait_q; + int random_del_supported; + uint16_t curr_ldmap[MAX_LD_EXTENDED64]; } mraid_device_t; // route to raid device from adapter diff -urN linux-2.6.11-rc3/drivers/scsi/megaraid/megaraid_mm.c linux-2.6.11-rc4/drivers/scsi/megaraid/megaraid_mm.c --- linux-2.6.11-rc3/drivers/scsi/megaraid/megaraid_mm.c 2004-12-24 13:35:00.000000000 -0800 +++ linux-2.6.11-rc4/drivers/scsi/megaraid/megaraid_mm.c 2005-02-12 19:51:03.585960767 -0800 @@ -10,7 +10,7 @@ * 2 of the License, or (at your option) any later version. * * FILE : megaraid_mm.c - * Version : v2.20.2.3 (Dec 09 2004) + * Version : v2.20.2.5 (Jan 21 2005) * * Common management module */ @@ -58,6 +58,7 @@ EXPORT_SYMBOL(mraid_mm_register_adp); EXPORT_SYMBOL(mraid_mm_unregister_adp); +EXPORT_SYMBOL(mraid_mm_adapter_app_handle); static int majorno; static uint32_t drvr_ver = 0x02200201; @@ -65,7 +66,7 @@ static int adapters_count_g; static struct list_head adapters_list_g; -wait_queue_head_t wait_q; +static wait_queue_head_t wait_q; static struct file_operations lsi_fops = { .open = mraid_mm_open, @@ -1007,6 +1008,40 @@ return rval; } + +/** + * mraid_mm_adapter_app_handle - return the application handle for this adapter + * + * For the given driver data, locate the adadpter in our global list and + * return the corresponding handle, which is also used by applications to + * uniquely identify an adapter. + * + * @param unique_id : adapter unique identifier + * + * @return adapter handle if found in the list + * @return 0 if adapter could not be located, should never happen though + */ +uint32_t +mraid_mm_adapter_app_handle(uint32_t unique_id) +{ + mraid_mmadp_t *adapter; + mraid_mmadp_t *tmp; + int index = 0; + + list_for_each_entry_safe(adapter, tmp, &adapters_list_g, list) { + + if (adapter->unique_id == unique_id) { + + return MKADAP(index); + } + + index++; + } + + return 0; +} + + /** * mraid_mm_setup_dma_pools - Set up dma buffer pools per adapter * diff -urN linux-2.6.11-rc3/drivers/scsi/megaraid/megaraid_mm.h linux-2.6.11-rc4/drivers/scsi/megaraid/megaraid_mm.h --- linux-2.6.11-rc3/drivers/scsi/megaraid/megaraid_mm.h 2004-12-24 13:33:49.000000000 -0800 +++ linux-2.6.11-rc4/drivers/scsi/megaraid/megaraid_mm.h 2005-02-12 19:51:03.586960810 -0800 @@ -29,9 +29,10 @@ #include "megaraid_ioctl.h" -#define LSI_COMMON_MOD_VERSION "2.20.2.3" +#define LSI_COMMON_MOD_VERSION "2.20.2.5" #define LSI_COMMON_MOD_EXT_VERSION \ - "(Release Date: Thu Dec 9 19:02:14 EST 2004)" + "(Release Date: Fri Jan 21 00:01:03 EST 2005)" + #define LSI_DBGLVL dbglevel diff -urN linux-2.6.11-rc3/drivers/scsi/qla2xxx/qla_isr.c linux-2.6.11-rc4/drivers/scsi/qla2xxx/qla_isr.c --- linux-2.6.11-rc3/drivers/scsi/qla2xxx/qla_isr.c 2005-02-12 19:50:39.929936649 -0800 +++ linux-2.6.11-rc4/drivers/scsi/qla2xxx/qla_isr.c 2005-02-12 19:51:04.436997610 -0800 @@ -94,7 +94,7 @@ spin_unlock_irqrestore(&ha->hardware_lock, flags); qla2x00_next(ha); - ha->last_irq_cpu = smp_processor_id(); + ha->last_irq_cpu = _smp_processor_id(); ha->total_isr_cnt++; if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) && @@ -207,7 +207,7 @@ spin_unlock_irqrestore(&ha->hardware_lock, flags); qla2x00_next(ha); - ha->last_irq_cpu = smp_processor_id(); + ha->last_irq_cpu = _smp_processor_id(); ha->total_isr_cnt++; if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) && diff -urN linux-2.6.11-rc3/drivers/scsi/qla2xxx/qla_os.c linux-2.6.11-rc4/drivers/scsi/qla2xxx/qla_os.c --- linux-2.6.11-rc3/drivers/scsi/qla2xxx/qla_os.c 2005-02-12 19:50:39.934936865 -0800 +++ linux-2.6.11-rc4/drivers/scsi/qla2xxx/qla_os.c 2005-02-12 19:51:04.442997870 -0800 @@ -859,7 +859,7 @@ * In all other cases we'll let an irq pick up our IO and submit it * to the controller to improve affinity. */ - if (smp_processor_id() == ha->last_irq_cpu || was_empty) + if (_smp_processor_id() == ha->last_irq_cpu || was_empty) qla2x00_next(ha); spin_lock_irq(ha->host->host_lock); diff -urN linux-2.6.11-rc3/drivers/scsi/sata_nv.c linux-2.6.11-rc4/drivers/scsi/sata_nv.c --- linux-2.6.11-rc3/drivers/scsi/sata_nv.c 2004-12-24 13:34:26.000000000 -0800 +++ linux-2.6.11-rc4/drivers/scsi/sata_nv.c 2005-02-12 19:51:04.512000857 -0800 @@ -20,6 +20,10 @@ * If you do not delete the provisions above, a recipient may use your * version of this file under either the OSL or the GPL. * + * 0.06 + * - Added generic SATA support by using a pci_device_id that filters on + * the IDE storage class code. + * * 0.03 * - Fixed a bug where the hotplug handlers for non-CK804/MCP04 were using * mmio_base, which is only set for the CK804/MCP04 case. @@ -44,7 +48,7 @@ #include #define DRV_NAME "sata_nv" -#define DRV_VERSION "0.5" +#define DRV_VERSION "0.6" #define NV_PORTS 2 #define NV_PIO_MASK 0x1f @@ -108,6 +112,7 @@ enum nv_host_type { + GENERIC, NFORCE2, NFORCE3, CK804 @@ -128,6 +133,9 @@ PCI_ANY_ID, PCI_ANY_ID, 0, 0, CK804 }, { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SATA2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CK804 }, + { PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID, + PCI_ANY_ID, PCI_ANY_ID, + PCI_CLASS_STORAGE_IDE<<8, 0xffff00, GENERIC }, { 0, } /* terminate list */ }; @@ -136,7 +144,6 @@ struct nv_host_desc { enum nv_host_type host_type; - unsigned long host_flags; void (*enable_hotplug)(struct ata_probe_ent *probe_ent); void (*disable_hotplug)(struct ata_host_set *host_set); void (*check_hotplug)(struct ata_host_set *host_set); @@ -144,21 +151,24 @@ }; static struct nv_host_desc nv_device_tbl[] = { { + .host_type = GENERIC, + .enable_hotplug = NULL, + .disable_hotplug= NULL, + .check_hotplug = NULL, + }, + { .host_type = NFORCE2, - .host_flags = 0x00000000, .enable_hotplug = nv_enable_hotplug, .disable_hotplug= nv_disable_hotplug, .check_hotplug = nv_check_hotplug, }, { .host_type = NFORCE3, - .host_flags = 0x00000000, .enable_hotplug = nv_enable_hotplug, .disable_hotplug= nv_disable_hotplug, .check_hotplug = nv_check_hotplug, }, { .host_type = CK804, - .host_flags = NV_HOST_FLAGS_SCR_MMIO, .enable_hotplug = nv_enable_hotplug_ck804, .disable_hotplug= nv_disable_hotplug_ck804, .check_hotplug = nv_check_hotplug_ck804, @@ -168,6 +178,7 @@ struct nv_host { struct nv_host_desc *host_desc; + unsigned long host_flags; }; static struct pci_driver nv_pci_driver = { @@ -284,8 +295,8 @@ if (sc_reg > SCR_CONTROL) return 0xffffffffU; - if (host->host_desc->host_flags & NV_HOST_FLAGS_SCR_MMIO) - return readl(ap->ioaddr.scr_addr + (sc_reg * 4)); + if (host->host_flags & NV_HOST_FLAGS_SCR_MMIO) + return readl((void*)ap->ioaddr.scr_addr + (sc_reg * 4)); else return inl(ap->ioaddr.scr_addr + (sc_reg * 4)); } @@ -298,8 +309,8 @@ if (sc_reg > SCR_CONTROL) return; - if (host->host_desc->host_flags & NV_HOST_FLAGS_SCR_MMIO) - writel(val, ap->ioaddr.scr_addr + (sc_reg * 4)); + if (host->host_flags & NV_HOST_FLAGS_SCR_MMIO) + writel(val, (void*)ap->ioaddr.scr_addr + (sc_reg * 4)); else outl(val, ap->ioaddr.scr_addr + (sc_reg * 4)); } @@ -322,6 +333,14 @@ struct ata_port_info *ppi; struct ata_probe_ent *probe_ent; int rc; + u32 bar; + + // Make sure this is a SATA controller by counting the number of bars + // (NVIDIA SATA controllers will always have six bars). Otherwise, + // it's an IDE controller and we ignore it. + for (bar=0; bar<6; bar++) + if (pci_resource_start(pdev, bar) == 0) + return -ENODEV; if (!printed_version++) printk(KERN_DEBUG DRV_NAME " version " DRV_VERSION "\n"); @@ -352,11 +371,15 @@ if (!host) goto err_out_free_ent; + memset(host, 0, sizeof(struct nv_host)); host->host_desc = &nv_device_tbl[ent->driver_data]; probe_ent->private_data = host; - if (host->host_desc->host_flags & NV_HOST_FLAGS_SCR_MMIO) { + if (pci_resource_flags(pdev, 5) & IORESOURCE_MEM) + host->host_flags |= NV_HOST_FLAGS_SCR_MMIO; + + if (host->host_flags & NV_HOST_FLAGS_SCR_MMIO) { unsigned long base; probe_ent->mmio_base = ioremap(pci_resource_start(pdev, 5), @@ -395,7 +418,7 @@ return 0; err_out_iounmap: - if (host->host_desc->host_flags & NV_HOST_FLAGS_SCR_MMIO) + if (host->host_flags & NV_HOST_FLAGS_SCR_MMIO) iounmap(probe_ent->mmio_base); err_out_free_host: kfree(host); diff -urN linux-2.6.11-rc3/drivers/scsi/sata_promise.c linux-2.6.11-rc4/drivers/scsi/sata_promise.c --- linux-2.6.11-rc3/drivers/scsi/sata_promise.c 2004-12-24 13:35:23.000000000 -0800 +++ linux-2.6.11-rc4/drivers/scsi/sata_promise.c 2005-02-12 19:51:04.513000900 -0800 @@ -156,10 +156,18 @@ board_2037x }, { PCI_VENDOR_ID_PROMISE, 0x3376, PCI_ANY_ID, PCI_ANY_ID, 0, 0, board_2037x }, + { PCI_VENDOR_ID_PROMISE, 0x3574, PCI_ANY_ID, PCI_ANY_ID, 0, 0, + board_2037x }, + { PCI_VENDOR_ID_PROMISE, 0x3d75, PCI_ANY_ID, PCI_ANY_ID, 0, 0, + board_2037x }, + { PCI_VENDOR_ID_PROMISE, 0x3318, PCI_ANY_ID, PCI_ANY_ID, 0, 0, board_20319 }, { PCI_VENDOR_ID_PROMISE, 0x3319, PCI_ANY_ID, PCI_ANY_ID, 0, 0, board_20319 }, + { PCI_VENDOR_ID_PROMISE, 0x3d18, PCI_ANY_ID, PCI_ANY_ID, 0, 0, + board_20319 }, + { } /* terminate list */ }; @@ -406,9 +414,11 @@ return IRQ_NONE; } - spin_lock(&host_set->lock); + spin_lock(&host_set->lock); + + writel(mask, mmio_base + PDC_INT_SEQMASK); - for (i = 0; i < host_set->n_ports; i++) { + for (i = 0; i < host_set->n_ports; i++) { VPRINTK("port %u\n", i); ap = host_set->ports[i]; tmp = mask & (1 << (i + 1)); diff -urN linux-2.6.11-rc3/drivers/scsi/sata_sil.c linux-2.6.11-rc4/drivers/scsi/sata_sil.c --- linux-2.6.11-rc3/drivers/scsi/sata_sil.c 2005-02-12 19:50:39.939937081 -0800 +++ linux-2.6.11-rc4/drivers/scsi/sata_sil.c 2005-02-12 19:51:04.513000900 -0800 @@ -86,6 +86,7 @@ { "ST330013AS", SIL_QUIRK_MOD15WRITE }, { "ST340017AS", SIL_QUIRK_MOD15WRITE }, { "ST360015AS", SIL_QUIRK_MOD15WRITE }, + { "ST380013AS", SIL_QUIRK_MOD15WRITE }, { "ST380023AS", SIL_QUIRK_MOD15WRITE }, { "ST3120023AS", SIL_QUIRK_MOD15WRITE }, { "ST3160023AS", SIL_QUIRK_MOD15WRITE }, diff -urN linux-2.6.11-rc3/drivers/scsi/scsi_transport_fc.c linux-2.6.11-rc4/drivers/scsi/scsi_transport_fc.c --- linux-2.6.11-rc3/drivers/scsi/scsi_transport_fc.c 2005-02-12 19:50:39.958937904 -0800 +++ linux-2.6.11-rc4/drivers/scsi/scsi_transport_fc.c 2005-02-12 19:51:04.622005619 -0800 @@ -847,6 +847,9 @@ { struct fc_internal *i = to_fc_internal(t); + attribute_container_unregister(&i->t.target_attrs); + attribute_container_unregister(&i->t.host_attrs); + kfree(i); } EXPORT_SYMBOL(fc_release_transport); diff -urN linux-2.6.11-rc3/drivers/scsi/scsi_transport_iscsi.c linux-2.6.11-rc4/drivers/scsi/scsi_transport_iscsi.c --- linux-2.6.11-rc3/drivers/scsi/scsi_transport_iscsi.c 2005-02-12 19:50:39.959937947 -0800 +++ linux-2.6.11-rc4/drivers/scsi/scsi_transport_iscsi.c 2005-02-12 19:51:04.623005663 -0800 @@ -356,6 +356,10 @@ void iscsi_release_transport(struct scsi_transport_template *t) { struct iscsi_internal *i = to_iscsi_internal(t); + + attribute_container_unregister(&i->t.target_attrs); + attribute_container_unregister(&i->t.host_attrs); + kfree(i); } diff -urN linux-2.6.11-rc3/drivers/scsi/scsi_transport_spi.c linux-2.6.11-rc4/drivers/scsi/scsi_transport_spi.c --- linux-2.6.11-rc3/drivers/scsi/scsi_transport_spi.c 2005-02-12 19:50:39.961938034 -0800 +++ linux-2.6.11-rc4/drivers/scsi/scsi_transport_spi.c 2005-02-12 19:51:04.625005749 -0800 @@ -921,6 +921,9 @@ { struct spi_internal *i = to_spi_internal(t); + attribute_container_unregister(&i->t.target_attrs); + attribute_container_unregister(&i->t.host_attrs); + kfree(i); } EXPORT_SYMBOL(spi_release_transport); diff -urN linux-2.6.11-rc3/drivers/scsi/wd33c93.h linux-2.6.11-rc4/drivers/scsi/wd33c93.h --- linux-2.6.11-rc3/drivers/scsi/wd33c93.h 2004-12-24 13:35:50.000000000 -0800 +++ linux-2.6.11-rc4/drivers/scsi/wd33c93.h 2005-02-12 19:51:04.829014581 -0800 @@ -22,6 +22,8 @@ #ifndef WD33C93_H #define WD33C93_H +#include + #define PROC_INTERFACE /* add code for /proc/scsi/wd33c93/xxx interface */ #ifdef PROC_INTERFACE #define PROC_STATISTICS /* add code for keeping various real time stats */ diff -urN linux-2.6.11-rc3/drivers/serial/8250.c linux-2.6.11-rc4/drivers/serial/8250.c --- linux-2.6.11-rc3/drivers/serial/8250.c 2005-02-12 19:50:39.993939419 -0800 +++ linux-2.6.11-rc4/drivers/serial/8250.c 2005-02-12 19:51:04.909018045 -0800 @@ -987,8 +987,11 @@ /* The following is not allowed by the tty layer and unsafe. It should be fixed ASAP */ if (unlikely(tty->flip.count >= TTY_FLIPBUF_SIZE)) { - if(tty->low_latency) + if (tty->low_latency) { + spin_unlock(&up->port.lock); tty_flip_buffer_push(tty); + spin_lock(&up->port.lock); + } /* If this failed then we will throw away the bytes but must do so to clear interrupts */ } @@ -1059,7 +1062,9 @@ ignore_char: lsr = serial_inp(up, UART_LSR); } while ((lsr & UART_LSR_DR) && (max_count-- > 0)); + spin_unlock(&up->port.lock); tty_flip_buffer_push(tty); + spin_lock(&up->port.lock); *status = lsr; } diff -urN linux-2.6.11-rc3/drivers/serial/Makefile linux-2.6.11-rc4/drivers/serial/Makefile --- linux-2.6.11-rc3/drivers/serial/Makefile 2005-02-12 19:50:39.996939549 -0800 +++ linux-2.6.11-rc4/drivers/serial/Makefile 2005-02-12 19:51:04.919018478 -0800 @@ -48,3 +48,4 @@ obj-$(CONFIG_SERIAL_M32R_SIO) += m32r_sio.o obj-$(CONFIG_SERIAL_MPSC) += mpsc.o obj-$(CONFIG_ETRAX_SERIAL) += crisv10.o +obj-$(CONFIG_SERIAL_TXX9) += serial_txx9.o diff -urN linux-2.6.11-rc3/drivers/serial/cpm_uart/cpm_uart_cpm2.c linux-2.6.11-rc4/drivers/serial/cpm_uart/cpm_uart_cpm2.c --- linux-2.6.11-rc3/drivers/serial/cpm_uart/cpm_uart_cpm2.c 2004-12-24 13:35:27.000000000 -0800 +++ linux-2.6.11-rc4/drivers/serial/cpm_uart/cpm_uart_cpm2.c 2005-02-12 19:51:04.929018911 -0800 @@ -127,7 +127,7 @@ io->iop_pdird |= 0x00000002; /* Tx */ /* Wire BRG1 to SCC1 */ - cpm2_immr->im_cpmux.cmx_scr &= ~0x00ffffff; + cpm2_immr->im_cpmux.cmx_scr &= 0x00ffffff; cpm2_immr->im_cpmux.cmx_scr |= 0x00000000; pinfo->brg = 1; } @@ -140,7 +140,7 @@ io->iop_psorb |= 0x00880000; io->iop_pdirb &= ~0x00030000; io->iop_psorb &= ~0x00030000; - cpm2_immr->im_cpmux.cmx_scr &= ~0xff00ffff; + cpm2_immr->im_cpmux.cmx_scr &= 0xff00ffff; cpm2_immr->im_cpmux.cmx_scr |= 0x00090000; pinfo->brg = 2; } @@ -153,7 +153,7 @@ io->iop_psorb |= 0x00880000; io->iop_pdirb &= ~0x00030000; io->iop_psorb &= ~0x00030000; - cpm2_immr->im_cpmux.cmx_scr &= ~0xffff00ff; + cpm2_immr->im_cpmux.cmx_scr &= 0xffff00ff; cpm2_immr->im_cpmux.cmx_scr |= 0x00001200; pinfo->brg = 3; } @@ -167,7 +167,7 @@ io->iop_pdird &= ~0x00000200; /* Rx */ io->iop_pdird |= 0x00000400; /* Tx */ - cpm2_immr->im_cpmux.cmx_scr &= ~0xffffff00; + cpm2_immr->im_cpmux.cmx_scr &= 0xffffff00; cpm2_immr->im_cpmux.cmx_scr |= 0x0000001b; pinfo->brg = 4; } diff -urN linux-2.6.11-rc3/drivers/serial/ip22zilog.c linux-2.6.11-rc4/drivers/serial/ip22zilog.c --- linux-2.6.11-rc3/drivers/serial/ip22zilog.c 2004-12-24 13:35:00.000000000 -0800 +++ linux-2.6.11-rc4/drivers/serial/ip22zilog.c 2005-02-12 19:51:04.981021162 -0800 @@ -47,8 +47,6 @@ #include "ip22zilog.h" -int ip22serial_current_minor = 64; - void ip22_do_break(void); /* @@ -59,10 +57,10 @@ #define ZSDELAY_LONG() udelay(20) #define ZS_WSYNC(channel) do { } while (0) -#define NUM_IP22ZILOG 1 -#define NUM_CHANNELS (NUM_IP22ZILOG * 2) +#define NUM_IP22ZILOG 1 +#define NUM_CHANNELS (NUM_IP22ZILOG * 2) -#define ZS_CLOCK 4915200 /* Zilog input clock rate. */ +#define ZS_CLOCK 3672000 /* Zilog input clock rate. */ #define ZS_CLOCK_DIVISOR 16 /* Divisor this driver uses. */ /* @@ -86,7 +84,7 @@ #define IP22ZILOG_FLAG_TX_STOPPED 0x00000080 #define IP22ZILOG_FLAG_TX_ACTIVE 0x00000100 - unsigned int cflag; + unsigned int cflag; /* L1-A keyboard break state. */ int kbd_id; @@ -642,36 +640,28 @@ } } -/* The port lock is not held. */ +/* The port lock is held and interrupts are disabled. */ static void ip22zilog_stop_rx(struct uart_port *port) { struct uart_ip22zilog_port *up = UART_ZILOG(port); struct zilog_channel *channel; - unsigned long flags; if (ZS_IS_CONS(up)) return; - spin_lock_irqsave(&port->lock, flags); - channel = ZILOG_CHANNEL_FROM_PORT(port); /* Disable all RX interrupts. */ up->curregs[R1] &= ~RxINT_MASK; ip22zilog_maybe_update_regs(up, channel); - - spin_unlock_irqrestore(&port->lock, flags); } -/* The port lock is not held. */ +/* The port lock is held. */ static void ip22zilog_enable_ms(struct uart_port *port) { struct uart_ip22zilog_port *up = (struct uart_ip22zilog_port *) port; struct zilog_channel *channel = ZILOG_CHANNEL_FROM_PORT(port); unsigned char new_reg; - unsigned long flags; - - spin_lock_irqsave(&port->lock, flags); new_reg = up->curregs[R15] | (DCDIE | SYNCIE | CTSIE); if (new_reg != up->curregs[R15]) { @@ -680,8 +670,6 @@ /* NOTE: Not subject to 'transmitter active' rule. */ write_zsreg(channel, R15, up->curregs[R15]); } - - spin_unlock_irqrestore(&port->lock, flags); } /* The port lock is not held. */ @@ -807,7 +795,7 @@ up->curregs[R4] |= X16CLK; up->curregs[R12] = brg & 0xff; up->curregs[R13] = (brg >> 8) & 0xff; - up->curregs[R14] = BRSRC | BRENAB; + up->curregs[R14] = BRENAB; /* Character size, stop bits, and parity. */ up->curregs[3] &= ~RxN_MASK; @@ -950,13 +938,6 @@ static struct uart_ip22zilog_port *ip22zilog_irq_chain; static int zilog_irq = -1; -static struct uart_driver ip22zilog_reg = { - .owner = THIS_MODULE, - .driver_name = "ttyS", - .devfs_name = "tty/", - .major = TTY_MAJOR, -}; - static void * __init alloc_one_table(unsigned long size) { void *ret; @@ -990,7 +971,7 @@ } /* Not probe-able, hard code it. */ - base = (unsigned long) &sgioc->serport; + base = (unsigned long) &sgioc->uart; zilog_irq = SGI_SERIAL_IRQ; request_mem_region(base, 8, "IP22-Zilog"); @@ -1047,9 +1028,6 @@ int parity = 'n'; int flow = 'n'; - if (!serial_console) - return; - if (options) uart_parse_options(options, &baud, &parity, &bits, &flow); @@ -1077,8 +1055,7 @@ unsigned long flags; int baud, brg; - printk("Console: ttyS%d (IP22-Zilog)\n", - (ip22zilog_reg.minor - 64) + con->index); + printk("Console: ttyS%d (IP22-Zilog)\n", con->index); /* Get firmware console settings. */ ip22serial_console_termios(con, options); @@ -1112,6 +1089,8 @@ return 0; } +static struct uart_driver ip22zilog_reg; + static struct console ip22zilog_console = { .name = "ttyS", .write = ip22zilog_console_write, @@ -1121,32 +1100,20 @@ .index = -1, .data = &ip22zilog_reg, }; -#define IP22ZILOG_CONSOLE (&ip22zilog_console) - -static int __init ip22zilog_console_init(void) -{ - int i; - - if (con_is_present()) - return 0; - - for (i = 0; i < NUM_CHANNELS; i++) { - int this_minor = ip22zilog_reg.minor + i; +#endif /* CONFIG_SERIAL_IP22_ZILOG_CONSOLE */ - if ((this_minor - 64) == (serial_console - 1)) - break; - } - if (i == NUM_CHANNELS) - return 0; - - ip22zilog_console.index = i; - register_console(&ip22zilog_console); - return 0; -} -#else /* CONFIG_SERIAL_IP22_ZILOG_CONSOLE */ -#define IP22ZILOG_CONSOLE (NULL) -#define ip22zilog_console_init() do { } while (0) +static struct uart_driver ip22zilog_reg = { + .owner = THIS_MODULE, + .driver_name = "serial", + .devfs_name = "tts/", + .dev_name = "ttyS", + .major = TTY_MAJOR, + .minor = 64, + .nr = NUM_CHANNELS, +#ifdef CONFIG_SERIAL_IP22_ZILOG_CONSOLE + .cons = &ip22zilog_console, #endif +}; static void __init ip22zilog_prepare(void) { @@ -1160,17 +1127,24 @@ for (channel = 0; channel < NUM_CHANNELS; channel++) spin_lock_init(&ip22zilog_port_table[channel].port.lock); - ip22zilog_irq_chain = up = &ip22zilog_port_table[0]; - for (channel = 0; channel < NUM_CHANNELS - 1; channel++) - up[channel].next = &up[channel + 1]; + ip22zilog_irq_chain = &ip22zilog_port_table[NUM_CHANNELS - 1]; + up = &ip22zilog_port_table[0]; + for (channel = NUM_CHANNELS - 1 ; channel > 0; channel--) + up[channel].next = &up[channel - 1]; up[channel].next = NULL; for (chip = 0; chip < NUM_IP22ZILOG; chip++) { if (!ip22zilog_chip_regs[chip]) { ip22zilog_chip_regs[chip] = rp = get_zs(chip); - up[(chip * 2) + 0].port.membase = (char *) &rp->channelA; - up[(chip * 2) + 1].port.membase = (char *) &rp->channelB; + up[(chip * 2) + 0].port.membase = (char *) &rp->channelB; + up[(chip * 2) + 1].port.membase = (char *) &rp->channelA; + + /* In theory mapbase is the physical address ... */ + up[(chip * 2) + 0].port.mapbase = + (unsigned long) ioremap((unsigned long) &rp->channelB, 8); + up[(chip * 2) + 1].port.mapbase = + (unsigned long) ioremap((unsigned long) &rp->channelA, 8); } /* Channel A */ @@ -1182,7 +1156,7 @@ up[(chip * 2) + 0].port.type = PORT_IP22ZILOG; up[(chip * 2) + 0].port.flags = 0; up[(chip * 2) + 0].port.line = (chip * 2) + 0; - up[(chip * 2) + 0].flags |= IP22ZILOG_FLAG_IS_CHANNEL_A; + up[(chip * 2) + 0].flags = 0; /* Channel B */ up[(chip * 2) + 1].port.iotype = UPIO_MEM; @@ -1191,9 +1165,9 @@ up[(chip * 2) + 1].port.fifosize = 1; up[(chip * 2) + 1].port.ops = &ip22zilog_pops; up[(chip * 2) + 1].port.type = PORT_IP22ZILOG; - up[(chip * 2) + 1].port.flags = 0; + up[(chip * 2) + 1].port.flags |= IP22ZILOG_FLAG_IS_CHANNEL_A; up[(chip * 2) + 1].port.line = (chip * 2) + 1; - up[(chip * 2) + 1].flags |= 0; + up[(chip * 2) + 1].flags = 0; } } @@ -1228,8 +1202,10 @@ brg = BPS_TO_BRG(baud, ZS_CLOCK / ZS_CLOCK_DIVISOR); up->curregs[R12] = (brg & 0xff); up->curregs[R13] = (brg >> 8) & 0xff; - up->curregs[R14] = BRSRC | BRENAB; + up->curregs[R14] = BRENAB; __load_zsregs(channel, up->curregs); + /* set master interrupt enable */ + write_zsreg(channel, R9, up->curregs[R9]); spin_unlock_irqrestore(&up->port.lock, flags); } @@ -1250,15 +1226,6 @@ ip22zilog_init_hw(); - /* We can only init this once we have probed the Zilogs - * in the system. - */ - ip22zilog_reg.nr = NUM_CHANNELS; - ip22zilog_reg.cons = IP22ZILOG_CONSOLE; - - ip22zilog_reg.minor = ip22serial_current_minor; - ip22serial_current_minor += NUM_CHANNELS; - ret = uart_register_driver(&ip22zilog_reg); if (ret == 0) { int i; @@ -1276,11 +1243,8 @@ static int __init ip22zilog_init(void) { /* IP22 Zilog setup is hard coded, no probing to do. */ - ip22zilog_alloc_tables(); - ip22zilog_ports_init(); - ip22zilog_console_init(); return 0; } diff -urN linux-2.6.11-rc3/drivers/usb/class/cdc-acm.c linux-2.6.11-rc4/drivers/usb/class/cdc-acm.c --- linux-2.6.11-rc3/drivers/usb/class/cdc-acm.c 2005-02-12 19:50:40.096943879 -0800 +++ linux-2.6.11-rc4/drivers/usb/class/cdc-acm.c 2005-02-12 19:51:05.233032072 -0800 @@ -261,16 +261,22 @@ static int acm_tty_open(struct tty_struct *tty, struct file *filp) { - struct acm *acm = acm_table[tty->index]; + struct acm *acm; + int rv = -EINVAL; dbg("Entering acm_tty_open.\n"); + + down(&open_sem); + acm = acm_table[tty->index]; if (!acm || !acm->dev) - return -EINVAL; + goto err_out; + else + rv = 0; tty->driver_data = acm; acm->tty = tty; - down(&open_sem); + if (acm->used) { goto done; @@ -279,7 +285,8 @@ acm->ctrlurb->dev = acm->dev; if (usb_submit_urb(acm->ctrlurb, GFP_KERNEL)) { dbg("usb_submit_urb(ctrl irq) failed"); - goto bail_out; + rv = -EIO; + goto err_out; } acm->readurb->dev = acm->dev; @@ -297,14 +304,14 @@ done: acm->used++; +err_out: up(&open_sem); - return 0; + return rv; full_bailout: usb_kill_urb(acm->readurb); bail_out_and_unlink: usb_kill_urb(acm->ctrlurb); -bail_out: up(&open_sem); return -EIO; } diff -urN linux-2.6.11-rc3/drivers/usb/core/devio.c linux-2.6.11-rc4/drivers/usb/core/devio.c --- linux-2.6.11-rc3/drivers/usb/core/devio.c 2005-02-12 19:50:40.109944441 -0800 +++ linux-2.6.11-rc4/drivers/usb/core/devio.c 2005-02-12 19:51:05.354037311 -0800 @@ -123,13 +123,26 @@ } if (pos < sizeof(struct usb_device_descriptor)) { + struct usb_device_descriptor *desc = kmalloc(sizeof(*desc), GFP_KERNEL); + if (!desc) { + ret = -ENOMEM; + goto err; + } + memcpy(desc, &dev->descriptor, sizeof(dev->descriptor)); + le16_to_cpus(&desc->bcdUSB); + le16_to_cpus(&desc->idVendor); + le16_to_cpus(&desc->idProduct); + le16_to_cpus(&desc->bcdDevice); + len = sizeof(struct usb_device_descriptor) - pos; if (len > nbytes) len = nbytes; - if (copy_to_user(buf, ((char *)&dev->descriptor) + pos, len)) { + if (copy_to_user(buf, ((char *)desc) + pos, len)) { + kfree(desc); ret = -EFAULT; goto err; } + kfree(desc); *ppos += len; buf += len; diff -urN linux-2.6.11-rc3/drivers/usb/core/hcd.c linux-2.6.11-rc4/drivers/usb/core/hcd.c --- linux-2.6.11-rc3/drivers/usb/core/hcd.c 2005-02-12 19:50:40.113944615 -0800 +++ linux-2.6.11-rc4/drivers/usb/core/hcd.c 2005-02-12 19:51:05.360037570 -0800 @@ -676,6 +676,7 @@ INIT_LIST_HEAD (&bus->bus_list); class_device_initialize(&bus->class_dev); + bus->class_dev.class = &usb_host_class; } EXPORT_SYMBOL (usb_bus_init); @@ -732,7 +733,6 @@ } snprintf(bus->class_dev.class_id, BUS_ID_SIZE, "usb%d", busnum); - bus->class_dev.class = &usb_host_class; bus->class_dev.dev = bus->controller; retval = class_device_add(&bus->class_dev); if (retval) { diff -urN linux-2.6.11-rc3/drivers/usb/input/hid-core.c linux-2.6.11-rc4/drivers/usb/input/hid-core.c --- linux-2.6.11-rc3/drivers/usb/input/hid-core.c 2005-02-12 19:50:40.208948728 -0800 +++ linux-2.6.11-rc4/drivers/usb/input/hid-core.c 2005-02-12 19:51:06.004065452 -0800 @@ -1295,12 +1295,15 @@ unsigned char type, void *buf, int size) { int result, retries = 4; + + memset(buf,0,size); // Make sure we parse really received data + do { result = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0), USB_REQ_GET_DESCRIPTOR, USB_RECIP_INTERFACE | USB_DIR_IN, (type << 8), ifnum, buf, size, HZ * USB_CTRL_GET_TIMEOUT); retries--; - } while (result < 0 && retries); + } while (result < size && retries); return result; } @@ -1663,7 +1666,7 @@ printk("\n"); #endif - if (!(hid = hid_parse_report(rdesc, rsize))) { + if (!(hid = hid_parse_report(rdesc, n))) { dbg("parsing report descriptor failed"); kfree(rdesc); return NULL; @@ -1740,7 +1743,7 @@ strcat(hid->name, buf); if (usb_string(dev, dev->descriptor.iProduct, buf, 64) > 0) snprintf(hid->name, 64, "%s %s", hid->name, buf); - } else if (usb_string(dev, dev->descriptor.iProduct, buf, 128) > 0) { + } else if (usb_string(dev, dev->descriptor.iProduct, buf, 64) > 0) { snprintf(hid->name, 128, "%s", buf); } else snprintf(hid->name, 128, "%04x:%04x", diff -urN linux-2.6.11-rc3/drivers/usb/net/usbnet.c linux-2.6.11-rc4/drivers/usb/net/usbnet.c --- linux-2.6.11-rc3/drivers/usb/net/usbnet.c 2005-02-12 19:50:40.288952191 -0800 +++ linux-2.6.11-rc4/drivers/usb/net/usbnet.c 2005-02-12 19:51:06.636092813 -0800 @@ -3286,6 +3286,10 @@ // Surecom EP-1427X-2 USB_DEVICE (0x1189, 0x0893), .driver_info = (unsigned long) &ax8817x_info, +}, { + // goodway corp usb gwusb2e + USB_DEVICE (0x1631, 0x6200), + .driver_info = (unsigned long) &ax8817x_info, }, #endif diff -urN linux-2.6.11-rc3/drivers/usb/serial/Kconfig linux-2.6.11-rc4/drivers/usb/serial/Kconfig --- linux-2.6.11-rc3/drivers/usb/serial/Kconfig 2005-02-12 19:50:40.289952234 -0800 +++ linux-2.6.11-rc4/drivers/usb/serial/Kconfig 2005-02-12 19:51:06.653093549 -0800 @@ -203,7 +203,7 @@ module will be called io_ti. config USB_SERIAL_GARMIN - tristate "Garmin GPS driver" + tristate "USB Garmin GPS driver" depends on USB_SERIAL help Say Y here if you want to connect to your Garmin GPS. diff -urN linux-2.6.11-rc3/drivers/usb/serial/ftdi_sio.c linux-2.6.11-rc4/drivers/usb/serial/ftdi_sio.c --- linux-2.6.11-rc3/drivers/usb/serial/ftdi_sio.c 2005-02-12 19:50:40.295952494 -0800 +++ linux-2.6.11-rc4/drivers/usb/serial/ftdi_sio.c 2005-02-12 19:51:06.691095195 -0800 @@ -1140,7 +1140,7 @@ goto check_and_exit; } - if ((new_serial.baud_base != priv->baud_base) || + if ((new_serial.baud_base != priv->baud_base) && (new_serial.baud_base < 9600)) return -EINVAL; diff -urN linux-2.6.11-rc3/drivers/usb/serial/garmin_gps.c linux-2.6.11-rc4/drivers/usb/serial/garmin_gps.c --- linux-2.6.11-rc3/drivers/usb/serial/garmin_gps.c 2005-02-12 19:50:40.299952667 -0800 +++ linux-2.6.11-rc4/drivers/usb/serial/garmin_gps.c 2005-02-12 19:51:06.698095498 -0800 @@ -1,7 +1,7 @@ /* * Garmin GPS driver * - * Copyright (C) 2004 Hermann Kneissel hkneissel@t-online.de + * Copyright (C) 2004 Hermann Kneissel herkne@users.sourceforge.net * * The latest version of the driver can be found at * http://sourceforge.net/projects/garmin-gps/ diff -urN linux-2.6.11-rc3/drivers/usb/storage/unusual_devs.h linux-2.6.11-rc4/drivers/usb/storage/unusual_devs.h --- linux-2.6.11-rc3/drivers/usb/storage/unusual_devs.h 2005-02-12 19:50:40.347954745 -0800 +++ linux-2.6.11-rc4/drivers/usb/storage/unusual_devs.h 2005-02-12 19:51:06.835101429 -0800 @@ -210,7 +210,15 @@ 0), #endif -UNUSUAL_DEV( 0x04e6, 0x0006, 0x0100, 0x0205, +/* Reported by Markus Demleitner */ +UNUSUAL_DEV( 0x04e6, 0x0006, 0x0100, 0x0100, + "SCM Microsystems Inc.", + "eUSB MMC Adapter", + US_SC_SCSI, US_PR_CB, NULL, + US_FL_SINGLE_LUN), + +/* Reported by Daniel Nouri */ +UNUSUAL_DEV( 0x04e6, 0x0006, 0x0205, 0x0205, "Shuttle", "eUSB MMC Adapter", US_SC_SCSI, US_PR_DEVICE, NULL, diff -urN linux-2.6.11-rc3/drivers/video/aty/ati_ids.h linux-2.6.11-rc4/drivers/video/aty/ati_ids.h --- linux-2.6.11-rc3/drivers/video/aty/ati_ids.h 2004-12-24 13:34:31.000000000 -0800 +++ linux-2.6.11-rc4/drivers/video/aty/ati_ids.h 2005-02-12 19:51:06.946106234 -0800 @@ -4,6 +4,18 @@ * radeonfb */ +#define PCI_CHIP_RV380_3150 0x3150 +#define PCI_CHIP_RV380_3151 0x3151 +#define PCI_CHIP_RV380_3152 0x3152 +#define PCI_CHIP_RV380_3153 0x3153 +#define PCI_CHIP_RV380_3154 0x3154 +#define PCI_CHIP_RV380_3156 0x3156 +#define PCI_CHIP_RV380_3E50 0x3E50 +#define PCI_CHIP_RV380_3E51 0x3E51 +#define PCI_CHIP_RV380_3E52 0x3E52 +#define PCI_CHIP_RV380_3E53 0x3E53 +#define PCI_CHIP_RV380_3E54 0x3E54 +#define PCI_CHIP_RV380_3E56 0x3E56 #define PCI_CHIP_RS100_4136 0x4136 #define PCI_CHIP_RS200_4137 0x4137 #define PCI_CHIP_R300_AD 0x4144 @@ -52,6 +64,14 @@ #define PCI_CHIP_RV250_Ie 0x4965 #define PCI_CHIP_RV250_If 0x4966 #define PCI_CHIP_RV250_Ig 0x4967 +#define PCI_CHIP_R420_JH 0x4A48 +#define PCI_CHIP_R420_JI 0x4A49 +#define PCI_CHIP_R420_JJ 0x4A4A +#define PCI_CHIP_R420_JK 0x4A4B +#define PCI_CHIP_R420_JL 0x4A4C +#define PCI_CHIP_R420_JM 0x4A4D +#define PCI_CHIP_R420_JN 0x4A4E +#define PCI_CHIP_R420_JP 0x4A50 #define PCI_CHIP_MACH64LB 0x4C42 #define PCI_CHIP_MACH64LD 0x4C44 #define PCI_CHIP_RAGE128LE 0x4C45 @@ -73,6 +93,7 @@ #define PCI_CHIP_RV250_Le 0x4C65 #define PCI_CHIP_RV250_Lf 0x4C66 #define PCI_CHIP_RV250_Lg 0x4C67 +#define PCI_CHIP_RV250_Ln 0x4C6E #define PCI_CHIP_RAGE128MF 0x4D46 #define PCI_CHIP_RAGE128ML 0x4D4C #define PCI_CHIP_R300_ND 0x4E44 @@ -148,6 +169,21 @@ #define PCI_CHIP_RAGE128TS 0x5453 #define PCI_CHIP_RAGE128TT 0x5454 #define PCI_CHIP_RAGE128TU 0x5455 +#define PCI_CHIP_RV370_5460 0x5460 +#define PCI_CHIP_RV370_5461 0x5461 +#define PCI_CHIP_RV370_5462 0x5462 +#define PCI_CHIP_RV370_5463 0x5463 +#define PCI_CHIP_RV370_5464 0x5464 +#define PCI_CHIP_RV370_5465 0x5465 +#define PCI_CHIP_RV370_5466 0x5466 +#define PCI_CHIP_RV370_5467 0x5467 +#define PCI_CHIP_R423_UH 0x5548 +#define PCI_CHIP_R423_UI 0x5549 +#define PCI_CHIP_R423_UJ 0x554A +#define PCI_CHIP_R423_UK 0x554B +#define PCI_CHIP_R423_UQ 0x5551 +#define PCI_CHIP_R423_UR 0x5552 +#define PCI_CHIP_R423_UT 0x5554 #define PCI_CHIP_MACH64VT 0x5654 #define PCI_CHIP_MACH64VU 0x5655 #define PCI_CHIP_MACH64VV 0x5656 @@ -155,14 +191,21 @@ #define PCI_CHIP_RS300_5835 0x5835 #define PCI_CHIP_RS300_5836 0x5836 #define PCI_CHIP_RS300_5837 0x5837 +#define PCI_CHIP_RV370_5B60 0x5B60 +#define PCI_CHIP_RV370_5B61 0x5B61 +#define PCI_CHIP_RV370_5B62 0x5B62 +#define PCI_CHIP_RV370_5B63 0x5B63 +#define PCI_CHIP_RV370_5B64 0x5B64 +#define PCI_CHIP_RV370_5B65 0x5B65 +#define PCI_CHIP_RV370_5B66 0x5B66 +#define PCI_CHIP_RV370_5B67 0x5B67 #define PCI_CHIP_RV280_5960 0x5960 #define PCI_CHIP_RV280_5961 0x5961 #define PCI_CHIP_RV280_5962 0x5962 -#define PCI_CHIP_RV280_5963 0x5963 #define PCI_CHIP_RV280_5964 0x5964 -#define PCI_CHIP_RV280_5968 0x5968 -#define PCI_CHIP_RV280_5969 0x5969 -#define PCI_CHIP_RV280_596A 0x596A -#define PCI_CHIP_RV280_596B 0x596B #define PCI_CHIP_RV280_5C61 0x5C61 #define PCI_CHIP_RV280_5C63 0x5C63 +#define PCI_CHIP_R423_5D57 0x5D57 +#define PCI_CHIP_RS350_7834 0x7834 +#define PCI_CHIP_RS350_7835 0x7835 + diff -urN linux-2.6.11-rc3/drivers/video/aty/aty128fb.c linux-2.6.11-rc4/drivers/video/aty/aty128fb.c --- linux-2.6.11-rc3/drivers/video/aty/aty128fb.c 2005-02-12 19:50:40.355955092 -0800 +++ linux-2.6.11-rc4/drivers/video/aty/aty128fb.c 2005-02-12 19:51:06.961106884 -0800 @@ -67,6 +67,7 @@ #include #ifdef CONFIG_PPC_PMAC +#include #include #include #include "../macmodes.h" @@ -167,6 +168,7 @@ static void aty128_remove(struct pci_dev *pdev); static int aty128_pci_suspend(struct pci_dev *pdev, u32 state); static int aty128_pci_resume(struct pci_dev *pdev); +static int aty128_do_resume(struct pci_dev *pdev); /* supported Rage128 chipsets */ static struct pci_device_id aty128_pci_tbl[] = { @@ -1705,6 +1707,18 @@ * Initialisation */ +#ifdef CONFIG_PPC_PMAC +static void aty128_early_resume(void *data) +{ + struct aty128fb_par *par = data; + + if (try_acquire_console_sem()) + return; + aty128_do_resume(par->pdev); + release_console_sem(); +} +#endif /* CONFIG_PPC_PMAC */ + static int __init aty128_init(struct pci_dev *pdev, const struct pci_device_id *ent) { struct fb_info *info = pci_get_drvdata(pdev); @@ -1749,6 +1763,13 @@ var = default_var; #ifdef CONFIG_PPC_PMAC if (_machine == _MACH_Pmac) { + /* Indicate sleep capability */ + if (par->chip_gen == rage_M3) { + pmac_call_feature(PMAC_FTR_DEVICE_CAN_WAKE, NULL, 0, 1); + pmac_set_early_video_resume(aty128_early_resume, par); + } + + /* Find default mode */ if (mode_option) { if (!mac_find_mode(&var, info, mode_option, 8)) var = default_var; @@ -2365,7 +2386,7 @@ return 0; } -static int aty128_pci_resume(struct pci_dev *pdev) +static int aty128_do_resume(struct pci_dev *pdev) { struct fb_info *info = pci_get_drvdata(pdev); struct aty128fb_par *par = info->par; @@ -2373,8 +2394,6 @@ if (pdev->dev.power.power_state == 0) return 0; - acquire_console_sem(); - /* Wakeup chip */ if (pdev->dev.power.power_state == 2) aty128_set_suspend(par, 0); @@ -2394,8 +2413,6 @@ par->lock_blank = 0; aty128fb_blank(0, info); - release_console_sem(); - pdev->dev.power.power_state = 0; printk(KERN_DEBUG "aty128fb: resumed !\n"); @@ -2403,6 +2420,18 @@ return 0; } +static int aty128_pci_resume(struct pci_dev *pdev) +{ + int rc; + + acquire_console_sem(); + rc = aty128_do_resume(pdev); + release_console_sem(); + + return rc; +} + + int __init aty128fb_init(void) { #ifndef MODULE diff -urN linux-2.6.11-rc3/drivers/video/aty/radeon_base.c linux-2.6.11-rc4/drivers/video/aty/radeon_base.c --- linux-2.6.11-rc3/drivers/video/aty/radeon_base.c 2005-02-12 19:50:40.360955308 -0800 +++ linux-2.6.11-rc4/drivers/video/aty/radeon_base.c 2005-02-12 19:51:07.076111863 -0800 @@ -1,5 +1,7 @@ + /* - * drivers/video/radeonfb.c + * drivers/video/aty/radeon_base.c + * * framebuffer driver for ATI Radeon chipset video boards * * Copyright 2003 Ben. Herrenschmidt @@ -75,7 +77,6 @@ #ifdef CONFIG_PPC_OF -#include #include #include "../macmodes.h" @@ -150,8 +151,10 @@ CHIP_DEF(PCI_CHIP_RV250_Ig, RV250, CHIP_HAS_CRTC2), /* Mobility 9100 IGP (U3) */ CHIP_DEF(PCI_CHIP_RS300_5835, RS300, CHIP_HAS_CRTC2 | CHIP_IS_IGP | CHIP_IS_MOBILITY), + CHIP_DEF(PCI_CHIP_RS350_7835, RS300, CHIP_HAS_CRTC2 | CHIP_IS_IGP | CHIP_IS_MOBILITY), /* 9100 IGP (A5) */ CHIP_DEF(PCI_CHIP_RS300_5834, RS300, CHIP_HAS_CRTC2 | CHIP_IS_IGP), + CHIP_DEF(PCI_CHIP_RS350_7834, RS300, CHIP_HAS_CRTC2 | CHIP_IS_IGP), /* Mobility 9200 (M9+) */ CHIP_DEF(PCI_CHIP_RV280_5C61, RV280, CHIP_HAS_CRTC2 | CHIP_IS_MOBILITY), CHIP_DEF(PCI_CHIP_RV280_5C63, RV280, CHIP_HAS_CRTC2 | CHIP_IS_MOBILITY), @@ -194,6 +197,33 @@ CHIP_DEF(PCI_CHIP_R350_NI, R350, CHIP_HAS_CRTC2), CHIP_DEF(PCI_CHIP_R360_NJ, R350, CHIP_HAS_CRTC2), CHIP_DEF(PCI_CHIP_R350_NK, R350, CHIP_HAS_CRTC2), + /* Newer stuff */ + CHIP_DEF(PCI_CHIP_RV380_3E50, RV380, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_RV380_3E54, RV380, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_RV380_3150, RV380, CHIP_HAS_CRTC2 | CHIP_IS_MOBILITY), + CHIP_DEF(PCI_CHIP_RV380_3154, RV380, CHIP_HAS_CRTC2 | CHIP_IS_MOBILITY), + CHIP_DEF(PCI_CHIP_RV370_5B60, RV380, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_RV370_5B62, RV380, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_RV370_5B64, RV380, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_RV370_5B65, RV380, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_RV370_5460, RV380, CHIP_HAS_CRTC2 | CHIP_IS_MOBILITY), + CHIP_DEF(PCI_CHIP_RV370_5464, RV380, CHIP_HAS_CRTC2 | CHIP_IS_MOBILITY), + CHIP_DEF(PCI_CHIP_R420_JH, R420, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_R420_JI, R420, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_R420_JJ, R420, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_R420_JK, R420, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_R420_JL, R420, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_R420_JM, R420, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_R420_JN, R420, CHIP_HAS_CRTC2 | CHIP_IS_MOBILITY), + CHIP_DEF(PCI_CHIP_R420_JP, R420, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_R423_UH, R420, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_R423_UI, R420, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_R423_UJ, R420, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_R423_UK, R420, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_R423_UQ, R420, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_R423_UR, R420, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_R423_UT, R420, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_R423_5D57, R420, CHIP_HAS_CRTC2), /* Original Radeon/7200 */ CHIP_DEF(PCI_CHIP_RADEON_QD, RADEON, 0), CHIP_DEF(PCI_CHIP_RADEON_QE, RADEON, 0), @@ -233,6 +263,7 @@ static char *mode_option; static char *monitor_layout; static int noaccel = 0; +static int default_dynclk = -2; static int nomodeset = 0; static int ignore_edid = 0; static int mirror = 0; @@ -290,7 +321,8 @@ rom = pci_map_rom(dev, &rom_size); if (!rom) { - printk(KERN_ERR "radeonfb: ROM failed to map\n"); + printk(KERN_ERR "radeonfb (%s): ROM failed to map\n", + pci_name(rinfo->pdev)); return -ENOMEM; } @@ -298,8 +330,8 @@ /* Very simple test to make sure it appeared */ if (BIOS_IN16(0) != 0xaa55) { - printk(KERN_ERR "radeonfb: Invalid ROM signature %x should be 0xaa55\n", - BIOS_IN16(0)); + printk(KERN_ERR "radeonfb (%s): Invalid ROM signature %x should be" + "0xaa55\n", pci_name(rinfo->pdev), BIOS_IN16(0)); goto failed; } /* Look for the PCI data to check the ROM type */ @@ -330,8 +362,8 @@ * } pci_data_t; */ if (BIOS_IN32(dptr) != (('R' << 24) | ('I' << 16) | ('C' << 8) | 'P')) { - printk(KERN_WARNING "radeonfb: PCI DATA signature in ROM incorrect: %08x\n", - BIOS_IN32(dptr)); + printk(KERN_WARNING "radeonfb (%s): PCI DATA signature in ROM" + "incorrect: %08x\n", pci_name(rinfo->pdev), BIOS_IN32(dptr)); goto anyway; } rom_type = BIOS_IN8(dptr + 0x14); @@ -398,14 +430,11 @@ */ static int __devinit radeon_read_xtal_OF (struct radeonfb_info *rinfo) { - struct device_node *dp; + struct device_node *dp = rinfo->of_node; u32 *val; - dp = pci_device_to_OF_node(rinfo->pdev); - if (dp == NULL) { - printk(KERN_WARNING "radeonfb: Cannot match card to OF node !\n"); + if (dp == NULL) return -ENODEV; - } val = (u32 *) get_property(dp, "ATY,RefCLK", NULL); if (!val || !*val) { printk(KERN_WARNING "radeonfb: No ATY,RefCLK property !\n"); @@ -488,20 +517,20 @@ denom = 1; break; case 1: - n = ((INPLL(X_MPLL_REF_FB_DIV) >> 16) & 0xff); - m = (INPLL(X_MPLL_REF_FB_DIV) & 0xff); + n = ((INPLL(M_SPLL_REF_FB_DIV) >> 16) & 0xff); + m = (INPLL(M_SPLL_REF_FB_DIV) & 0xff); num = 2*n; denom = 2*m; break; case 2: - n = ((INPLL(X_MPLL_REF_FB_DIV) >> 8) & 0xff); - m = (INPLL(X_MPLL_REF_FB_DIV) & 0xff); + n = ((INPLL(M_SPLL_REF_FB_DIV) >> 8) & 0xff); + m = (INPLL(M_SPLL_REF_FB_DIV) & 0xff); num = 2*n; denom = 2*m; break; } - ppll_div_sel = INREG(CLOCK_CNTL_INDEX + 1) & 0x3; + ppll_div_sel = INREG8(CLOCK_CNTL_INDEX + 1) & 0x3; n = (INPLL(PPLL_DIV_0 + ppll_div_sel) & 0x7ff); m = (INPLL(PPLL_REF_DIV) & 0x3ff); @@ -545,7 +574,7 @@ return -1; } - tmp = INPLL(X_MPLL_REF_FB_DIV); + tmp = INPLL(M_SPLL_REF_FB_DIV); ref_div = INPLL(PPLL_REF_DIV) & 0x3ff; Ns = (tmp & 0xff0000) >> 16; @@ -625,7 +654,7 @@ rinfo->pll.ref_clk = 2700; break; } - rinfo->pll.ref_div = INPLL(PPLL_REF_DIV) & 0x3ff; + rinfo->pll.ref_div = INPLL(PPLL_REF_DIV) & PPLL_REF_DIV_MASK; #ifdef CONFIG_PPC_OF @@ -906,10 +935,11 @@ } -static int radeon_screen_blank (struct radeonfb_info *rinfo, int blank, int mode_switch) +int radeon_screen_blank(struct radeonfb_info *rinfo, int blank, int mode_switch) { u32 val; u32 tmp_pix_clks; + int unblank = 0; if (rinfo->lock_blank) return 0; @@ -920,9 +950,6 @@ val &= ~(CRTC_DISPLAY_DIS | CRTC_HSYNC_DIS | CRTC_VSYNC_DIS); switch (blank) { - case FB_BLANK_UNBLANK: - case FB_BLANK_NORMAL: - break; case FB_BLANK_VSYNC_SUSPEND: val |= (CRTC_DISPLAY_DIS | CRTC_VSYNC_DIS); break; @@ -933,42 +960,51 @@ val |= (CRTC_DISPLAY_DIS | CRTC_VSYNC_DIS | CRTC_HSYNC_DIS); break; + case FB_BLANK_NORMAL: + val |= CRTC_DISPLAY_DIS; + break; + case FB_BLANK_UNBLANK: + default: + unblank = 1; } OUTREG(CRTC_EXT_CNTL, val); switch (rinfo->mon1_type) { case MT_DFP: - if (mode_switch) - break; - if (blank == FB_BLANK_UNBLANK || - blank == FB_BLANK_NORMAL) + if (unblank) OUTREGP(FP_GEN_CNTL, (FP_FPON | FP_TMDS_EN), ~(FP_FPON | FP_TMDS_EN)); - else + else { + if (mode_switch || blank == FB_BLANK_NORMAL) + break; OUTREGP(FP_GEN_CNTL, 0, ~(FP_FPON | FP_TMDS_EN)); + } break; case MT_LCD: + del_timer_sync(&rinfo->lvds_timer); val = INREG(LVDS_GEN_CNTL); - if (blank == FB_BLANK_UNBLANK || - blank == FB_BLANK_NORMAL) { + if (unblank) { u32 target_val = (val & ~LVDS_DISPLAY_DIS) | LVDS_BLON | LVDS_ON - | LVDS_ON | (rinfo->init_state.lvds_gen_cntl & LVDS_DIGON); + | LVDS_EN | (rinfo->init_state.lvds_gen_cntl + & (LVDS_DIGON | LVDS_BL_MOD_EN)); if ((val ^ target_val) == LVDS_DISPLAY_DIS) OUTREG(LVDS_GEN_CNTL, target_val); else if ((val ^ target_val) != 0) { - del_timer_sync(&rinfo->lvds_timer); - OUTREG(LVDS_GEN_CNTL, target_val & ~LVDS_ON); + OUTREG(LVDS_GEN_CNTL, target_val + & ~(LVDS_ON | LVDS_BL_MOD_EN)); rinfo->init_state.lvds_gen_cntl &= ~LVDS_STATE_MASK; - rinfo->init_state.lvds_gen_cntl |= target_val & LVDS_STATE_MASK; + rinfo->init_state.lvds_gen_cntl |= + target_val & LVDS_STATE_MASK; if (mode_switch) { - msleep(rinfo->panel_info.pwr_delay); + radeon_msleep(rinfo->panel_info.pwr_delay); OUTREG(LVDS_GEN_CNTL, target_val); } else { rinfo->pending_lvds_gen_cntl = target_val; mod_timer(&rinfo->lvds_timer, - jiffies + msecs_to_jiffies(rinfo->panel_info.pwr_delay)); + jiffies + + msecs_to_jiffies(rinfo->panel_info.pwr_delay)); } } } else { @@ -976,7 +1012,7 @@ OUTREG(LVDS_GEN_CNTL, val); /* We don't do a full switch-off on a simple mode switch */ - if (mode_switch) + if (mode_switch || blank == FB_BLANK_NORMAL) break; /* Asic bug, when turning off LVDS_ON, we have to make sure @@ -985,8 +1021,16 @@ tmp_pix_clks = INPLL(PIXCLKS_CNTL); if (rinfo->is_mobility || rinfo->is_IGP) OUTPLLP(PIXCLKS_CNTL, 0, ~PIXCLK_LVDS_ALWAYS_ONb); - val &= ~(LVDS_BLON | LVDS_ON); + val &= ~(LVDS_BL_MOD_EN); OUTREG(LVDS_GEN_CNTL, val); + udelay(100); + val &= ~(LVDS_ON | LVDS_EN); + OUTREG(LVDS_GEN_CNTL, val); + val &= ~LVDS_DIGON; + rinfo->pending_lvds_gen_cntl = val; + mod_timer(&rinfo->lvds_timer, + jiffies + + msecs_to_jiffies(rinfo->panel_info.pwr_delay)); rinfo->init_state.lvds_gen_cntl &= ~LVDS_STATE_MASK; rinfo->init_state.lvds_gen_cntl |= val & LVDS_STATE_MASK; if (rinfo->is_mobility || rinfo->is_IGP) @@ -1003,16 +1047,14 @@ return (blank == FB_BLANK_NORMAL) ? -EINVAL : 0; } -int radeonfb_blank (int blank, struct fb_info *info) +static int radeonfb_blank (int blank, struct fb_info *info) { struct radeonfb_info *rinfo = info->par; if (rinfo->asleep) return 0; - radeon_screen_blank(rinfo, blank, 0); - - return 0; + return radeon_screen_blank(rinfo, blank, 0); } static int radeonfb_setcolreg (unsigned regno, unsigned red, unsigned green, @@ -1097,7 +1139,7 @@ } -static void radeon_save_state (struct radeonfb_info *rinfo, struct radeon_regs *save) +void radeon_save_state (struct radeonfb_info *rinfo, struct radeon_regs *save) { /* CRTC regs */ save->crtc_gen_cntl = INREG(CRTC_GEN_CNTL); @@ -1121,8 +1163,14 @@ save->fp_vert_stretch = INREG(FP_VERT_STRETCH); save->lvds_gen_cntl = INREG(LVDS_GEN_CNTL); save->lvds_pll_cntl = INREG(LVDS_PLL_CNTL); - save->tmds_crc = INREG(TMDS_CRC); save->tmds_transmitter_cntl = INREG(TMDS_TRANSMITTER_CNTL); + save->tmds_crc = INREG(TMDS_CRC); + save->tmds_transmitter_cntl = INREG(TMDS_TRANSMITTER_CNTL); save->vclk_ecp_cntl = INPLL(VCLK_ECP_CNTL); + + /* PLL regs */ + save->clk_cntl_index = INREG(CLOCK_CNTL_INDEX) & ~0x3f; + save->ppll_div_3 = INPLL(PPLL_DIV_3); + save->ppll_ref_div = INPLL(PPLL_REF_DIV); } @@ -1134,19 +1182,22 @@ /* Workaround from XFree */ if (rinfo->is_mobility) { - /* A temporal workaround for the occational blanking on certain laptop panels. - This appears to related to the PLL divider registers (fail to lock?). - It occurs even when all dividers are the same with their old settings. - In this case we really don't need to fiddle with PLL registers. - By doing this we can avoid the blanking problem with some panels. - */ + /* A temporal workaround for the occational blanking on certain laptop + * panels. This appears to related to the PLL divider registers + * (fail to lock?). It occurs even when all dividers are the same + * with their old settings. In this case we really don't need to + * fiddle with PLL registers. By doing this we can avoid the blanking + * problem with some panels. + */ if ((mode->ppll_ref_div == (INPLL(PPLL_REF_DIV) & PPLL_REF_DIV_MASK)) && (mode->ppll_div_3 == (INPLL(PPLL_DIV_3) & (PPLL_POST3_DIV_MASK | PPLL_FB3_DIV_MASK)))) { - /* We still have to force a switch to PPLL div 3 thanks to + /* We still have to force a switch to selected PPLL div thanks to * an XFree86 driver bug which will switch it away in some cases * even when using UseFDev */ - OUTREGP(CLOCK_CNTL_INDEX, PPLL_DIV_SEL_MASK, ~PPLL_DIV_SEL_MASK); + OUTREGP(CLOCK_CNTL_INDEX, + mode->clk_cntl_index & PPLL_DIV_SEL_MASK, + ~PPLL_DIV_SEL_MASK); return; } } @@ -1159,8 +1210,10 @@ PPLL_RESET | PPLL_ATOMIC_UPDATE_EN | PPLL_VGA_ATOMIC_UPDATE_EN, ~(PPLL_RESET | PPLL_ATOMIC_UPDATE_EN | PPLL_VGA_ATOMIC_UPDATE_EN)); - /* Switch to PPLL div 3 */ - OUTREGP(CLOCK_CNTL_INDEX, PPLL_DIV_SEL_MASK, ~PPLL_DIV_SEL_MASK); + /* Switch to selected PPLL divider */ + OUTREGP(CLOCK_CNTL_INDEX, + mode->clk_cntl_index & PPLL_DIV_SEL_MASK, + ~PPLL_DIV_SEL_MASK); /* Set PPLL ref. div */ if (rinfo->family == CHIP_FAMILY_R300 || @@ -1205,7 +1258,7 @@ ~(PPLL_RESET | PPLL_SLEEP | PPLL_ATOMIC_UPDATE_EN | PPLL_VGA_ATOMIC_UPDATE_EN)); /* We may want some locking ... oh well */ - msleep(5); + radeon_msleep(5); /* Switch back VCLK source to PPLL */ OUTPLLP(VCLK_ECP_CNTL, VCLK_SRC_SEL_PPLLCLK, ~VCLK_SRC_SEL_MASK); @@ -1218,21 +1271,17 @@ { struct radeonfb_info *rinfo = (struct radeonfb_info *)data; - radeon_fifo_wait(3); + radeon_engine_idle(); OUTREG(LVDS_GEN_CNTL, rinfo->pending_lvds_gen_cntl); - if (rinfo->pending_pixclks_cntl) { - OUTPLL(PIXCLKS_CNTL, rinfo->pending_pixclks_cntl); - rinfo->pending_pixclks_cntl = 0; - } } /* * Apply a video mode. This will apply the whole register set, including * the PLL registers, to the card */ -static void radeon_write_mode (struct radeonfb_info *rinfo, - struct radeon_regs *mode) +void radeon_write_mode (struct radeonfb_info *rinfo, struct radeon_regs *mode, + int regs_only) { int i; int primary_mon = PRIMARY_MONITOR(rinfo); @@ -1240,10 +1289,8 @@ if (nomodeset) return; - del_timer_sync(&rinfo->lvds_timer); - - radeon_screen_blank(rinfo, FB_BLANK_POWERDOWN, 1); - msleep(100); + if (!regs_only) + radeon_screen_blank(rinfo, FB_BLANK_NORMAL, 0); radeon_fifo_wait(31); for (i=0; i<10; i++) @@ -1285,7 +1332,8 @@ OUTREG(TMDS_TRANSMITTER_CNTL, mode->tmds_transmitter_cntl); } - radeon_screen_blank(rinfo, FB_BLANK_UNBLANK, 1); + if (!regs_only) + radeon_screen_blank(rinfo, FB_BLANK_UNBLANK, 0); radeon_fifo_wait(2); OUTPLL(VCLK_ECP_CNTL, mode->vclk_ecp_cntl); @@ -1396,6 +1444,16 @@ rinfo->pll.ref_div, rinfo->pll.ref_clk, pll_output_freq); + /* If we fall through the bottom, try the "default value" + given by the terminal post_div->bitvalue */ + if ( !post_div->divider ) { + post_div = &post_divs[post_div->bitvalue]; + pll_output_freq = post_div->divider * freq; + } + RTRACE("ref_div = %d, ref_clk = %d, output_freq = %d\n", + rinfo->pll.ref_div, rinfo->pll.ref_clk, + pll_output_freq); + fb_div = round_div(rinfo->pll.ref_div*pll_output_freq, rinfo->pll.ref_clk); regs->ppll_ref_div = rinfo->pll.ref_div; @@ -1406,22 +1464,27 @@ RTRACE("ppll_div_3 = 0x%x\n", regs->ppll_div_3); } -int radeonfb_set_par(struct fb_info *info) +static int radeonfb_set_par(struct fb_info *info) { struct radeonfb_info *rinfo = info->par; struct fb_var_screeninfo *mode = &info->var; - struct radeon_regs newmode; + struct radeon_regs *newmode; int hTotal, vTotal, hSyncStart, hSyncEnd, hSyncPol, vSyncStart, vSyncEnd, vSyncPol, cSync; u8 hsync_adj_tab[] = {0, 0x12, 9, 9, 6, 5}; u8 hsync_fudge_fp[] = {2, 2, 0, 0, 5, 5}; u32 sync, h_sync_pol, v_sync_pol, dotClock, pixClock; int i, freq; - int format = 0; + int format = 0; int nopllcalc = 0; int hsync_start, hsync_fudge, bytpp, hsync_wid, vsync_wid; int primary_mon = PRIMARY_MONITOR(rinfo); int depth = var_to_depth(mode); + int use_rmx = 0; + + newmode = kmalloc(sizeof(struct radeon_regs), GFP_KERNEL); + if (!newmode) + return -ENOMEM; /* We always want engine to be idle on a mode switch, even * if we won't actually change the mode @@ -1462,9 +1525,9 @@ if (rinfo->panel_info.use_bios_dividers) { nopllcalc = 1; - newmode.ppll_div_3 = rinfo->panel_info.fbk_divider | + newmode->ppll_div_3 = rinfo->panel_info.fbk_divider | (rinfo->panel_info.post_divider << 16); - newmode.ppll_ref_div = rinfo->panel_info.ref_divider; + newmode->ppll_ref_div = rinfo->panel_info.ref_divider; } } dotClock = 1000000000 / pixClock; @@ -1502,38 +1565,38 @@ hsync_start = hSyncStart - 8 + hsync_fudge; - newmode.crtc_gen_cntl = CRTC_EXT_DISP_EN | CRTC_EN | + newmode->crtc_gen_cntl = CRTC_EXT_DISP_EN | CRTC_EN | (format << 8); /* Clear auto-center etc... */ - newmode.crtc_more_cntl = rinfo->init_state.crtc_more_cntl; - newmode.crtc_more_cntl &= 0xfffffff0; + newmode->crtc_more_cntl = rinfo->init_state.crtc_more_cntl; + newmode->crtc_more_cntl &= 0xfffffff0; if ((primary_mon == MT_DFP) || (primary_mon == MT_LCD)) { - newmode.crtc_ext_cntl = VGA_ATI_LINEAR | XCRT_CNT_EN; + newmode->crtc_ext_cntl = VGA_ATI_LINEAR | XCRT_CNT_EN; if (mirror) - newmode.crtc_ext_cntl |= CRTC_CRT_ON; + newmode->crtc_ext_cntl |= CRTC_CRT_ON; - newmode.crtc_gen_cntl &= ~(CRTC_DBL_SCAN_EN | + newmode->crtc_gen_cntl &= ~(CRTC_DBL_SCAN_EN | CRTC_INTERLACE_EN); } else { - newmode.crtc_ext_cntl = VGA_ATI_LINEAR | XCRT_CNT_EN | + newmode->crtc_ext_cntl = VGA_ATI_LINEAR | XCRT_CNT_EN | CRTC_CRT_ON; } - newmode.dac_cntl = /* INREG(DAC_CNTL) | */ DAC_MASK_ALL | DAC_VGA_ADR_EN | + newmode->dac_cntl = /* INREG(DAC_CNTL) | */ DAC_MASK_ALL | DAC_VGA_ADR_EN | DAC_8BIT_EN; - newmode.crtc_h_total_disp = ((((hTotal / 8) - 1) & 0x3ff) | + newmode->crtc_h_total_disp = ((((hTotal / 8) - 1) & 0x3ff) | (((mode->xres / 8) - 1) << 16)); - newmode.crtc_h_sync_strt_wid = ((hsync_start & 0x1fff) | + newmode->crtc_h_sync_strt_wid = ((hsync_start & 0x1fff) | (hsync_wid << 16) | (h_sync_pol << 23)); - newmode.crtc_v_total_disp = ((vTotal - 1) & 0xffff) | + newmode->crtc_v_total_disp = ((vTotal - 1) & 0xffff) | ((mode->yres - 1) << 16); - newmode.crtc_v_sync_strt_wid = (((vSyncStart - 1) & 0xfff) | + newmode->crtc_v_sync_strt_wid = (((vSyncStart - 1) & 0xfff) | (vsync_wid << 16) | (v_sync_pol << 23)); if (!(info->flags & FBINFO_HWACCEL_DISABLED)) { @@ -1542,18 +1605,18 @@ & ~(0x3f)) >> 6; /* Then, re-multiply it to get the CRTC pitch */ - newmode.crtc_pitch = (rinfo->pitch << 3) / ((mode->bits_per_pixel + 1) / 8); + newmode->crtc_pitch = (rinfo->pitch << 3) / ((mode->bits_per_pixel + 1) / 8); } else - newmode.crtc_pitch = (mode->xres_virtual >> 3); + newmode->crtc_pitch = (mode->xres_virtual >> 3); - newmode.crtc_pitch |= (newmode.crtc_pitch << 16); + newmode->crtc_pitch |= (newmode->crtc_pitch << 16); /* * It looks like recent chips have a problem with SURFACE_CNTL, * setting SURF_TRANSLATION_DIS completely disables the * swapper as well, so we leave it unset now. */ - newmode.surface_cntl = 0; + newmode->surface_cntl = 0; #if defined(__BIG_ENDIAN) @@ -1563,28 +1626,28 @@ */ switch (mode->bits_per_pixel) { case 16: - newmode.surface_cntl |= NONSURF_AP0_SWP_16BPP; - newmode.surface_cntl |= NONSURF_AP1_SWP_16BPP; + newmode->surface_cntl |= NONSURF_AP0_SWP_16BPP; + newmode->surface_cntl |= NONSURF_AP1_SWP_16BPP; break; case 24: case 32: - newmode.surface_cntl |= NONSURF_AP0_SWP_32BPP; - newmode.surface_cntl |= NONSURF_AP1_SWP_32BPP; + newmode->surface_cntl |= NONSURF_AP0_SWP_32BPP; + newmode->surface_cntl |= NONSURF_AP1_SWP_32BPP; break; } #endif /* Clear surface registers */ for (i=0; i<8; i++) { - newmode.surf_lower_bound[i] = 0; - newmode.surf_upper_bound[i] = 0x1f; - newmode.surf_info[i] = 0; + newmode->surf_lower_bound[i] = 0; + newmode->surf_upper_bound[i] = 0x1f; + newmode->surf_info[i] = 0; } RTRACE("h_total_disp = 0x%x\t hsync_strt_wid = 0x%x\n", - newmode.crtc_h_total_disp, newmode.crtc_h_sync_strt_wid); + newmode->crtc_h_total_disp, newmode->crtc_h_sync_strt_wid); RTRACE("v_total_disp = 0x%x\t vsync_strt_wid = 0x%x\n", - newmode.crtc_v_total_disp, newmode.crtc_v_sync_strt_wid); + newmode->crtc_v_total_disp, newmode->crtc_v_sync_strt_wid); rinfo->bpp = mode->bits_per_pixel; rinfo->depth = depth; @@ -1592,10 +1655,14 @@ RTRACE("pixclock = %lu\n", (unsigned long)pixClock); RTRACE("freq = %lu\n", (unsigned long)freq); + /* We use PPLL_DIV_3 */ + newmode->clk_cntl_index = 0x300; + + /* Calculate PPLL value if necessary */ if (!nopllcalc) - radeon_calc_pll_regs(rinfo, &newmode, freq); + radeon_calc_pll_regs(rinfo, newmode, freq); - newmode.vclk_ecp_cntl = rinfo->init_state.vclk_ecp_cntl; + newmode->vclk_ecp_cntl = rinfo->init_state.vclk_ecp_cntl; if ((primary_mon == MT_DFP) || (primary_mon == MT_LCD)) { unsigned int hRatio, vRatio; @@ -1605,35 +1672,37 @@ if (mode->yres > rinfo->panel_info.yres) mode->yres = rinfo->panel_info.yres; - newmode.fp_horz_stretch = (((rinfo->panel_info.xres / 8) - 1) + newmode->fp_horz_stretch = (((rinfo->panel_info.xres / 8) - 1) << HORZ_PANEL_SHIFT); - newmode.fp_vert_stretch = ((rinfo->panel_info.yres - 1) + newmode->fp_vert_stretch = ((rinfo->panel_info.yres - 1) << VERT_PANEL_SHIFT); if (mode->xres != rinfo->panel_info.xres) { hRatio = round_div(mode->xres * HORZ_STRETCH_RATIO_MAX, rinfo->panel_info.xres); - newmode.fp_horz_stretch = (((((unsigned long)hRatio) & HORZ_STRETCH_RATIO_MASK)) | - (newmode.fp_horz_stretch & + newmode->fp_horz_stretch = (((((unsigned long)hRatio) & HORZ_STRETCH_RATIO_MASK)) | + (newmode->fp_horz_stretch & (HORZ_PANEL_SIZE | HORZ_FP_LOOP_STRETCH | HORZ_AUTO_RATIO_INC))); - newmode.fp_horz_stretch |= (HORZ_STRETCH_BLEND | + newmode->fp_horz_stretch |= (HORZ_STRETCH_BLEND | HORZ_STRETCH_ENABLE); + use_rmx = 1; } - newmode.fp_horz_stretch &= ~HORZ_AUTO_RATIO; + newmode->fp_horz_stretch &= ~HORZ_AUTO_RATIO; if (mode->yres != rinfo->panel_info.yres) { vRatio = round_div(mode->yres * VERT_STRETCH_RATIO_MAX, rinfo->panel_info.yres); - newmode.fp_vert_stretch = (((((unsigned long)vRatio) & VERT_STRETCH_RATIO_MASK)) | - (newmode.fp_vert_stretch & + newmode->fp_vert_stretch = (((((unsigned long)vRatio) & VERT_STRETCH_RATIO_MASK)) | + (newmode->fp_vert_stretch & (VERT_PANEL_SIZE | VERT_STRETCH_RESERVED))); - newmode.fp_vert_stretch |= (VERT_STRETCH_BLEND | + newmode->fp_vert_stretch |= (VERT_STRETCH_BLEND | VERT_STRETCH_ENABLE); + use_rmx = 1; } - newmode.fp_vert_stretch &= ~VERT_AUTO_RATIO_EN; + newmode->fp_vert_stretch &= ~VERT_AUTO_RATIO_EN; - newmode.fp_gen_cntl = (rinfo->init_state.fp_gen_cntl & (u32) + newmode->fp_gen_cntl = (rinfo->init_state.fp_gen_cntl & (u32) ~(FP_SEL_CRTC2 | FP_RMX_HVSYNC_CONTROL_EN | FP_DFP_SYNC_SEL | @@ -1643,46 +1712,56 @@ FP_CRTC_USE_SHADOW_VEND | FP_CRT_SYNC_ALT)); - newmode.fp_gen_cntl |= (FP_CRTC_DONT_SHADOW_VPAR | - FP_CRTC_DONT_SHADOW_HEND); + newmode->fp_gen_cntl |= (FP_CRTC_DONT_SHADOW_VPAR | + FP_CRTC_DONT_SHADOW_HEND | + FP_PANEL_FORMAT); + + if (IS_R300_VARIANT(rinfo) || + (rinfo->family == CHIP_FAMILY_R200)) { + newmode->fp_gen_cntl &= ~R200_FP_SOURCE_SEL_MASK; + if (use_rmx) + newmode->fp_gen_cntl |= R200_FP_SOURCE_SEL_RMX; + else + newmode->fp_gen_cntl |= R200_FP_SOURCE_SEL_CRTC1; + } else + newmode->fp_gen_cntl |= FP_SEL_CRTC1; - newmode.lvds_gen_cntl = rinfo->init_state.lvds_gen_cntl; - newmode.lvds_pll_cntl = rinfo->init_state.lvds_pll_cntl; - newmode.tmds_crc = rinfo->init_state.tmds_crc; - newmode.tmds_transmitter_cntl = rinfo->init_state.tmds_transmitter_cntl; + newmode->lvds_gen_cntl = rinfo->init_state.lvds_gen_cntl; + newmode->lvds_pll_cntl = rinfo->init_state.lvds_pll_cntl; + newmode->tmds_crc = rinfo->init_state.tmds_crc; + newmode->tmds_transmitter_cntl = rinfo->init_state.tmds_transmitter_cntl; if (primary_mon == MT_LCD) { - newmode.lvds_gen_cntl |= (LVDS_ON | LVDS_BLON); - newmode.fp_gen_cntl &= ~(FP_FPON | FP_TMDS_EN); + newmode->lvds_gen_cntl |= (LVDS_ON | LVDS_BLON); + newmode->fp_gen_cntl &= ~(FP_FPON | FP_TMDS_EN); } else { /* DFP */ - newmode.fp_gen_cntl |= (FP_FPON | FP_TMDS_EN); - newmode.tmds_transmitter_cntl = (TMDS_RAN_PAT_RST | TMDS_ICHCSEL) & + newmode->fp_gen_cntl |= (FP_FPON | FP_TMDS_EN); + newmode->tmds_transmitter_cntl = (TMDS_RAN_PAT_RST | TMDS_ICHCSEL) & ~(TMDS_PLLRST); /* TMDS_PLL_EN bit is reversed on RV (and mobility) chips */ - if ((rinfo->family == CHIP_FAMILY_R300) || - (rinfo->family == CHIP_FAMILY_R350) || - (rinfo->family == CHIP_FAMILY_RV350) || + if (IS_R300_VARIANT(rinfo) || (rinfo->family == CHIP_FAMILY_R200) || !rinfo->has_CRTC2) - newmode.tmds_transmitter_cntl &= ~TMDS_PLL_EN; + newmode->tmds_transmitter_cntl &= ~TMDS_PLL_EN; else - newmode.tmds_transmitter_cntl |= TMDS_PLL_EN; - newmode.crtc_ext_cntl &= ~CRTC_CRT_ON; + newmode->tmds_transmitter_cntl |= TMDS_PLL_EN; + newmode->crtc_ext_cntl &= ~CRTC_CRT_ON; } - newmode.fp_crtc_h_total_disp = (((rinfo->panel_info.hblank / 8) & 0x3ff) | + newmode->fp_crtc_h_total_disp = (((rinfo->panel_info.hblank / 8) & 0x3ff) | (((mode->xres / 8) - 1) << 16)); - newmode.fp_crtc_v_total_disp = (rinfo->panel_info.vblank & 0xffff) | + newmode->fp_crtc_v_total_disp = (rinfo->panel_info.vblank & 0xffff) | ((mode->yres - 1) << 16); - newmode.fp_h_sync_strt_wid = ((rinfo->panel_info.hOver_plus & 0x1fff) | + newmode->fp_h_sync_strt_wid = ((rinfo->panel_info.hOver_plus & 0x1fff) | (hsync_wid << 16) | (h_sync_pol << 23)); - newmode.fp_v_sync_strt_wid = ((rinfo->panel_info.vOver_plus & 0xfff) | + newmode->fp_v_sync_strt_wid = ((rinfo->panel_info.vOver_plus & 0xfff) | (vsync_wid << 16) | (v_sync_pol << 23)); } /* do it! */ if (!rinfo->asleep) { - radeon_write_mode (rinfo, &newmode); + memcpy(&rinfo->state, newmode, sizeof(*newmode)); + radeon_write_mode (rinfo, newmode, 0); /* (re)initialize the engine */ if (!(info->flags & FBINFO_HWACCEL_DISABLED)) radeonfb_engine_init (rinfo); @@ -1702,6 +1781,7 @@ rinfo->depth, info->fix.line_length); #endif + kfree(newmode); return 0; } @@ -1812,12 +1892,14 @@ if (on && (level > BACKLIGHT_OFF)) { lvds_gen_cntl &= ~LVDS_DISPLAY_DIS; if (!(lvds_gen_cntl & LVDS_BLON) || !(lvds_gen_cntl & LVDS_ON)) { - lvds_gen_cntl |= LVDS_BLON /* | LVDS_EN | LVDS_DIGON */; + lvds_gen_cntl |= (rinfo->init_state.lvds_gen_cntl & LVDS_DIGON); + lvds_gen_cntl |= LVDS_BLON | LVDS_EN; OUTREG(LVDS_GEN_CNTL, lvds_gen_cntl); lvds_gen_cntl &= ~LVDS_BL_MOD_LEVEL_MASK; lvds_gen_cntl |= (conv_table[level] << LVDS_BL_MOD_LEVEL_SHIFT); lvds_gen_cntl |= LVDS_ON; + lvds_gen_cntl |= (rinfo->init_state.lvds_gen_cntl & LVDS_BL_MOD_EN); rinfo->pending_lvds_gen_cntl = lvds_gen_cntl; mod_timer(&rinfo->lvds_timer, jiffies + msecs_to_jiffies(rinfo->panel_info.pwr_delay)); @@ -1837,13 +1919,18 @@ tmpPixclksCntl = INPLL(PIXCLKS_CNTL); if (rinfo->is_mobility || rinfo->is_IGP) OUTPLLP(PIXCLKS_CNTL, 0, ~PIXCLK_LVDS_ALWAYS_ONb); - lvds_gen_cntl &= ~LVDS_BL_MOD_LEVEL_MASK; + lvds_gen_cntl &= ~(LVDS_BL_MOD_LEVEL_MASK | LVDS_BL_MOD_EN); lvds_gen_cntl |= (conv_table[0] << LVDS_BL_MOD_LEVEL_SHIFT); lvds_gen_cntl |= LVDS_DISPLAY_DIS; OUTREG(LVDS_GEN_CNTL, lvds_gen_cntl); - lvds_gen_cntl &= ~(LVDS_ON | LVDS_BLON /* | LVDS_EN | LVDS_DIGON */); + udelay(100); + lvds_gen_cntl &= ~(LVDS_ON | LVDS_EN); OUTREG(LVDS_GEN_CNTL, lvds_gen_cntl); + lvds_gen_cntl &= ~(LVDS_DIGON); + rinfo->pending_lvds_gen_cntl = lvds_gen_cntl; + mod_timer(&rinfo->lvds_timer, + jiffies + msecs_to_jiffies(rinfo->panel_info.pwr_delay)); if (rinfo->is_mobility || rinfo->is_IGP) OUTPLL(PIXCLKS_CNTL, tmpPixclksCntl); } @@ -1926,10 +2013,12 @@ OUTREG(DISPLAY_BASE_ADDR, aper_base); if (rinfo->has_CRTC2) OUTREG(CRTC2_DISPLAY_BASE_ADDR, aper_base); + OUTREG(OV0_BASE_ADDR, aper_base); #else OUTREG(DISPLAY_BASE_ADDR, 0); if (rinfo->has_CRTC2) OUTREG(CRTC2_DISPLAY_BASE_ADDR, 0); + OUTREG(OV0_BASE_ADDR, 0); #endif mdelay(100); @@ -1947,6 +2036,100 @@ #endif /* CONFIG_PPC_OF */ +static void radeon_identify_vram(struct radeonfb_info *rinfo) +{ + u32 tmp; + + /* framebuffer size */ + if ((rinfo->family == CHIP_FAMILY_RS100) || + (rinfo->family == CHIP_FAMILY_RS200) || + (rinfo->family == CHIP_FAMILY_RS300)) { + u32 tom = INREG(NB_TOM); + tmp = ((((tom >> 16) - (tom & 0xffff) + 1) << 6) * 1024); + + radeon_fifo_wait(6); + OUTREG(MC_FB_LOCATION, tom); + OUTREG(DISPLAY_BASE_ADDR, (tom & 0xffff) << 16); + OUTREG(CRTC2_DISPLAY_BASE_ADDR, (tom & 0xffff) << 16); + OUTREG(OV0_BASE_ADDR, (tom & 0xffff) << 16); + + /* This is supposed to fix the crtc2 noise problem. */ + OUTREG(GRPH2_BUFFER_CNTL, INREG(GRPH2_BUFFER_CNTL) & ~0x7f0000); + + if ((rinfo->family == CHIP_FAMILY_RS100) || + (rinfo->family == CHIP_FAMILY_RS200)) { + /* This is to workaround the asic bug for RMX, some versions + of BIOS dosen't have this register initialized correctly. + */ + OUTREGP(CRTC_MORE_CNTL, CRTC_H_CUTOFF_ACTIVE_EN, + ~CRTC_H_CUTOFF_ACTIVE_EN); + } + } else { + tmp = INREG(CONFIG_MEMSIZE); + } + + /* mem size is bits [28:0], mask off the rest */ + rinfo->video_ram = tmp & CONFIG_MEMSIZE_MASK; + + /* + * Hack to get around some busted production M6's + * reporting no ram + */ + if (rinfo->video_ram == 0) { + switch (rinfo->pdev->device) { + case PCI_CHIP_RADEON_LY: + case PCI_CHIP_RADEON_LZ: + rinfo->video_ram = 8192 * 1024; + break; + default: + break; + } + } + + + /* + * Now try to identify VRAM type + */ + if (rinfo->is_IGP || (rinfo->family >= CHIP_FAMILY_R300) || + (INREG(MEM_SDRAM_MODE_REG) & (1<<30))) + rinfo->vram_ddr = 1; + else + rinfo->vram_ddr = 0; + + tmp = INREG(MEM_CNTL); + if (IS_R300_VARIANT(rinfo)) { + tmp &= R300_MEM_NUM_CHANNELS_MASK; + switch (tmp) { + case 0: rinfo->vram_width = 64; break; + case 1: rinfo->vram_width = 128; break; + case 2: rinfo->vram_width = 256; break; + default: rinfo->vram_width = 128; break; + } + } else if ((rinfo->family == CHIP_FAMILY_RV100) || + (rinfo->family == CHIP_FAMILY_RS100) || + (rinfo->family == CHIP_FAMILY_RS200)){ + if (tmp & RV100_MEM_HALF_MODE) + rinfo->vram_width = 32; + else + rinfo->vram_width = 64; + } else { + if (tmp & MEM_NUM_CHANNELS_MASK) + rinfo->vram_width = 128; + else + rinfo->vram_width = 64; + } + + /* This may not be correct, as some cards can have half of channel disabled + * ToDo: identify these cases + */ + + RTRACE("radeonfb (%s): Found %ldk of %s %d bits wide videoram\n", + pci_name(rinfo->pdev), + rinfo->video_ram / 1024, + rinfo->vram_ddr ? "DDR" : "SDRAM", + rinfo->vram_width); +} + /* * Sysfs */ @@ -2012,7 +2195,6 @@ { struct fb_info *info; struct radeonfb_info *rinfo; - u32 tmp; int ret; RTRACE("radeonfb_pci_register BEGIN\n"); @@ -2020,13 +2202,15 @@ /* Enable device in PCI config */ ret = pci_enable_device(pdev); if (ret < 0) { - printk(KERN_ERR "radeonfb: Cannot enable PCI device\n"); + printk(KERN_ERR "radeonfb (%s): Cannot enable PCI device\n", + pci_name(pdev)); goto err_out; } info = framebuffer_alloc(sizeof(struct radeonfb_info), &pdev->dev); if (!info) { - printk (KERN_ERR "radeonfb: could not allocate memory\n"); + printk (KERN_ERR "radeonfb (%s): could not allocate memory\n", + pci_name(pdev)); ret = -ENOMEM; goto err_disable; } @@ -2055,121 +2239,39 @@ /* request the mem regions */ ret = pci_request_regions(pdev, "radeonfb"); if (ret < 0) { - printk( KERN_ERR "radeonfb: cannot reserve PCI regions." - " Someone already got them?\n"); + printk( KERN_ERR "radeonfb (%s): cannot reserve PCI regions." + " Someone already got them?\n", pci_name(rinfo->pdev)); goto err_release_fb; } /* map the regions */ rinfo->mmio_base = ioremap(rinfo->mmio_base_phys, RADEON_REGSIZE); if (!rinfo->mmio_base) { - printk(KERN_ERR "radeonfb: cannot map MMIO\n"); + printk(KERN_ERR "radeonfb (%s): cannot map MMIO\n", pci_name(rinfo->pdev)); ret = -EIO; goto err_release_pci; } + rinfo->fb_local_base = INREG(MC_FB_LOCATION) << 16; + +#ifdef CONFIG_PPC_OF + /* On PPC, we obtain the OF device-node pointer to the firmware + * data for this chip + */ + rinfo->of_node = pci_device_to_OF_node(pdev); + if (rinfo->of_node == NULL) + printk(KERN_WARNING "radeonfb (%s): Cannot match card to OF node !\n", + pci_name(rinfo->pdev)); + /* On PPC, the firmware sets up a memory mapping that tends * to cause lockups when enabling the engine. We reconfigure * the card internal memory mappings properly */ -#ifdef CONFIG_PPC_OF fixup_memory_mappings(rinfo); -#else - rinfo->fb_local_base = INREG(MC_FB_LOCATION) << 16; #endif /* CONFIG_PPC_OF */ - /* framebuffer size */ - if ((rinfo->family == CHIP_FAMILY_RS100) || - (rinfo->family == CHIP_FAMILY_RS200) || - (rinfo->family == CHIP_FAMILY_RS300)) { - u32 tom = INREG(NB_TOM); - tmp = ((((tom >> 16) - (tom & 0xffff) + 1) << 6) * 1024); - - radeon_fifo_wait(6); - OUTREG(MC_FB_LOCATION, tom); - OUTREG(DISPLAY_BASE_ADDR, (tom & 0xffff) << 16); - OUTREG(CRTC2_DISPLAY_BASE_ADDR, (tom & 0xffff) << 16); - OUTREG(OV0_BASE_ADDR, (tom & 0xffff) << 16); - - /* This is supposed to fix the crtc2 noise problem. */ - OUTREG(GRPH2_BUFFER_CNTL, INREG(GRPH2_BUFFER_CNTL) & ~0x7f0000); - - if ((rinfo->family == CHIP_FAMILY_RS100) || - (rinfo->family == CHIP_FAMILY_RS200)) { - /* This is to workaround the asic bug for RMX, some versions - of BIOS dosen't have this register initialized correctly. - */ - OUTREGP(CRTC_MORE_CNTL, CRTC_H_CUTOFF_ACTIVE_EN, - ~CRTC_H_CUTOFF_ACTIVE_EN); - } - } else { - tmp = INREG(CONFIG_MEMSIZE); - } - - /* mem size is bits [28:0], mask off the rest */ - rinfo->video_ram = tmp & CONFIG_MEMSIZE_MASK; - - /* ram type */ - tmp = INREG(MEM_SDRAM_MODE_REG); - switch ((MEM_CFG_TYPE & tmp) >> 30) { - case 0: - /* SDR SGRAM (2:1) */ - strcpy(rinfo->ram_type, "SDR SGRAM"); - rinfo->ram.ml = 4; - rinfo->ram.mb = 4; - rinfo->ram.trcd = 1; - rinfo->ram.trp = 2; - rinfo->ram.twr = 1; - rinfo->ram.cl = 2; - rinfo->ram.loop_latency = 16; - rinfo->ram.rloop = 16; - break; - case 1: - /* DDR SGRAM */ - strcpy(rinfo->ram_type, "DDR SGRAM"); - rinfo->ram.ml = 4; - rinfo->ram.mb = 4; - rinfo->ram.trcd = 3; - rinfo->ram.trp = 3; - rinfo->ram.twr = 2; - rinfo->ram.cl = 3; - rinfo->ram.tr2w = 1; - rinfo->ram.loop_latency = 16; - rinfo->ram.rloop = 16; - break; - default: - /* 64-bit SDR SGRAM */ - strcpy(rinfo->ram_type, "SDR SGRAM 64"); - rinfo->ram.ml = 4; - rinfo->ram.mb = 8; - rinfo->ram.trcd = 3; - rinfo->ram.trp = 3; - rinfo->ram.twr = 1; - rinfo->ram.cl = 3; - rinfo->ram.tr2w = 1; - rinfo->ram.loop_latency = 17; - rinfo->ram.rloop = 17; - break; - } - - /* - * Hack to get around some busted production M6's - * reporting no ram - */ - if (rinfo->video_ram == 0) { - switch (pdev->device) { - case PCI_CHIP_RADEON_LY: - case PCI_CHIP_RADEON_LZ: - rinfo->video_ram = 8192 * 1024; - break; - default: - printk (KERN_ERR "radeonfb: no video RAM reported\n"); - ret = -ENXIO; - goto err_unmap_rom; - } - } - - RTRACE("radeonfb: probed %s %ldk videoram\n", (rinfo->ram_type), (rinfo->video_ram/1024)); + /* Get VRAM size and type */ + radeon_identify_vram(rinfo); rinfo->mapped_vram = min_t(unsigned long, MAX_MAPPED_VRAM, rinfo->video_ram); @@ -2182,12 +2284,13 @@ if (rinfo->fb_base) memset_io(rinfo->fb_base, 0, rinfo->mapped_vram); else { - printk (KERN_ERR "radeonfb: cannot map FB\n"); + printk (KERN_ERR "radeonfb (%s): cannot map FB\n", pci_name(rinfo->pdev)); ret = -EIO; goto err_unmap_rom; } - RTRACE("radeonfb: mapped %ldk videoram\n", rinfo->mapped_vram/1024); + RTRACE("radeonfb (%s): mapped %ldk videoram\n", pci_name(rinfo->pdev), + rinfo->mapped_vram/1024); /* * Check for required workaround for PLL accesses @@ -2254,21 +2357,22 @@ * so we can restore this upon __exit */ radeon_save_state (rinfo, &rinfo->init_state); + memcpy(&rinfo->state, &rinfo->init_state, sizeof(struct radeon_regs)); pci_set_drvdata(pdev, info); - /* Enable PM on mobility chips */ - if (rinfo->is_mobility) { - /* Find PM registers in config space */ - rinfo->pm_reg = pci_find_capability(pdev, PCI_CAP_ID_PM); - /* Enable dynamic PM of chip clocks */ - radeon_pm_enable_dynamic_mode(rinfo); - printk("radeonfb: Power Management enabled for Mobility chipsets\n"); - } + /* Setup Power Management capabilities */ + if (default_dynclk < -1) { + /* -2 is special: means ON on mobility chips and do not change on others */ + radeonfb_pm_init(rinfo, rinfo->is_mobility ? 1 : -1); + } else + radeonfb_pm_init(rinfo, default_dynclk); + /* Register with fbdev layer */ ret = register_framebuffer(info); if (ret < 0) { - printk (KERN_ERR "radeonfb: could not register framebuffer\n"); + printk (KERN_ERR "radeonfb (%s): could not register framebuffer\n", + pci_name(rinfo->pdev)); goto err_unmap_fb; } @@ -2287,8 +2391,7 @@ } #endif - printk ("radeonfb: %s %s %ld MB\n", rinfo->name, rinfo->ram_type, - (rinfo->video_ram/(1024*1024))); + printk ("radeonfb (%s): %s\n", pci_name(rinfo->pdev), rinfo->name); if (rinfo->bios_seg) radeon_unmap_ROM(rinfo, pdev); @@ -2331,13 +2434,18 @@ if (!rinfo) return; + radeonfb_pm_exit(rinfo); + +#if 0 /* restore original state * - * Doesn't quite work yet, possibly because of the PPC hacking - * I do on startup, disable for now. --BenH + * Doesn't quite work yet, I suspect if we come from a legacy + * VGA mode (or worse, text mode), we need to do some VGA black + * magic here that I know nothing about. --BenH */ - radeon_write_mode (rinfo, &rinfo->init_state); - + radeon_write_mode (rinfo, &rinfo->init_state, 1); + #endif + del_timer_sync(&rinfo->lvds_timer); #ifdef CONFIG_MTRR @@ -2443,6 +2551,8 @@ MODULE_DESCRIPTION("framebuffer driver for ATI Radeon chipset"); MODULE_LICENSE("GPL"); module_param(noaccel, bool, 0); +module_param(default_dynclk, int, -2); +MODULE_PARM_DESC(default_dynclk, "int: -2=enable on mobility only,-1=do not change,0=off,1=on"); MODULE_PARM_DESC(noaccel, "bool: disable acceleration"); module_param(nomodeset, bool, 0); MODULE_PARM_DESC(nomodeset, "bool: disable actual setting of video mode"); diff -urN linux-2.6.11-rc3/drivers/video/aty/radeon_monitor.c linux-2.6.11-rc4/drivers/video/aty/radeon_monitor.c --- linux-2.6.11-rc3/drivers/video/aty/radeon_monitor.c 2004-12-24 13:33:47.000000000 -0800 +++ linux-2.6.11-rc4/drivers/video/aty/radeon_monitor.c 2005-02-12 19:51:07.087112339 -0800 @@ -1,11 +1,6 @@ #include "radeonfb.h" #include "../edid.h" -#ifdef CONFIG_PPC_OF -#include -#include -#endif /* CONFIG_PPC_OF */ - static struct fb_var_screeninfo radeonfb_default_var = { .xres = 640, .yres = 480, @@ -64,9 +59,11 @@ * models with broken OF probing by hard-coding known EDIDs for some Mac * laptops internal LVDS panel. (XXX: not done yet) */ -static int __devinit radeon_parse_montype_prop(struct device_node *dp, u8 **out_EDID, int hdno) +static int __devinit radeon_parse_montype_prop(struct device_node *dp, u8 **out_EDID, + int hdno) { - static char *propnames[] = { "DFP,EDID", "LCD,EDID", "EDID", "EDID1", "EDID2", NULL }; + static char *propnames[] = { "DFP,EDID", "LCD,EDID", "EDID", + "EDID1", "EDID2", NULL }; u8 *pedid = NULL; u8 *pmt = NULL; u8 *tmp; @@ -122,7 +119,7 @@ RTRACE("radeon_probe_OF_head\n"); - dp = pci_device_to_OF_node(rinfo->pdev); + dp = rinfo->of_node; while (dp == NULL) return MT_NONE; @@ -502,8 +499,9 @@ #endif /* CONFIG_PPC_OF */ #ifdef CONFIG_FB_RADEON_I2C if (rinfo->mon1_type == MT_NONE) - rinfo->mon1_type = radeon_probe_i2c_connector(rinfo, ddc_dvi, - &rinfo->mon1_EDID); + rinfo->mon1_type = + radeon_probe_i2c_connector(rinfo, ddc_dvi, + &rinfo->mon1_EDID); if (rinfo->mon1_type == MT_NONE) rinfo->mon1_type = radeon_probe_i2c_connector(rinfo, ddc_vga, @@ -545,7 +543,8 @@ */ #ifdef CONFIG_PPC_OF if (rinfo->mon1_type == MT_NONE) - rinfo->mon1_type = radeon_probe_OF_head(rinfo, 0, &rinfo->mon1_EDID); + rinfo->mon1_type = radeon_probe_OF_head(rinfo, 0, + &rinfo->mon1_EDID); #endif /* CONFIG_PPC_OF */ #ifdef CONFIG_FB_RADEON_I2C if (rinfo->mon1_type == MT_NONE) @@ -572,7 +571,8 @@ */ #ifdef CONFIG_PPC_OF if (rinfo->mon2_type == MT_NONE) - rinfo->mon2_type = radeon_probe_OF_head(rinfo, 1, &rinfo->mon2_EDID); + rinfo->mon2_type = radeon_probe_OF_head(rinfo, 1, + &rinfo->mon2_EDID); #endif /* CONFIG_PPC_OF */ #ifdef CONFIG_FB_RADEON_I2C if (rinfo->mon2_type == MT_NONE) @@ -648,10 +648,10 @@ */ static void radeon_fixup_panel_info(struct radeonfb_info *rinfo) { - #ifdef CONFIG_PPC_OF +#ifdef CONFIG_PPC_OF /* * LCD Flat panels should use fixed dividers, we enfore that on - * PowerMac only for now... + * PPC only for now... */ if (!rinfo->panel_info.use_bios_dividers && rinfo->mon1_type == MT_LCD && rinfo->is_mobility) { @@ -702,40 +702,24 @@ rinfo->panel_info.pwr_delay = 200; } -static void radeon_var_to_videomode(struct fb_videomode *mode, - const struct fb_var_screeninfo *var) -{ - mode->xres = var->xres; - mode->yres = var->yres; - mode->pixclock = var->pixclock; - mode->left_margin = var->left_margin; - mode->right_margin = var->right_margin; - mode->upper_margin = var->upper_margin; - mode->lower_margin = var->lower_margin; - mode->hsync_len = var->hsync_len; - mode->vsync_len = var->vsync_len; - mode->sync = var->sync; - mode->vmode = var->vmode; -} - static void radeon_videomode_to_var(struct fb_var_screeninfo *var, const struct fb_videomode *mode) { - var->xres = mode->xres; - var->yres = mode->yres; - var->xres_virtual = mode->xres; - var->yres_virtual = mode->yres; - var->xoffset = 0; - var->yoffset = 0; - var->pixclock = mode->pixclock; - var->left_margin = mode->left_margin; - var->right_margin = mode->right_margin; - var->upper_margin = mode->upper_margin; - var->lower_margin = mode->lower_margin; - var->hsync_len = mode->hsync_len; - var->vsync_len = mode->vsync_len; - var->sync = mode->sync; - var->vmode = mode->vmode; + var->xres = mode->xres; + var->yres = mode->yres; + var->xres_virtual = mode->xres; + var->yres_virtual = mode->yres; + var->xoffset = 0; + var->yoffset = 0; + var->pixclock = mode->pixclock; + var->left_margin = mode->left_margin; + var->right_margin = mode->right_margin; + var->upper_margin = mode->upper_margin; + var->lower_margin = mode->lower_margin; + var->hsync_len = mode->hsync_len; + var->vsync_len = mode->vsync_len; + var->sync = mode->sync; + var->vmode = mode->vmode; } /* @@ -744,12 +728,14 @@ */ void __devinit radeon_check_modes(struct radeonfb_info *rinfo, const char *mode_option) { + struct fb_info * info = rinfo->info; int has_default_mode = 0; /* * Fill default var first */ - rinfo->info->var = radeonfb_default_var; + info->var = radeonfb_default_var; + INIT_LIST_HEAD(&info->modelist); /* * First check out what BIOS has to say @@ -783,7 +769,7 @@ * those */ if (rinfo->mon1_type != MT_CRT && rinfo->panel_info.valid) { - struct fb_var_screeninfo *var = &rinfo->info->var; + struct fb_var_screeninfo *var = &info->var; RTRACE("Setting up default mode based on panel info\n"); var->xres = rinfo->panel_info.xres; @@ -814,9 +800,12 @@ * Now build modedb from EDID */ if (rinfo->mon1_EDID) { - rinfo->mon1_modedb = fb_create_modedb(rinfo->mon1_EDID, - &rinfo->mon1_dbsize); - fb_get_monitor_limits(rinfo->mon1_EDID, &rinfo->info->monspecs); + fb_edid_to_monspecs(rinfo->mon1_EDID, &info->monspecs); + fb_videomode_to_modelist(info->monspecs.modedb, + info->monspecs.modedb_len, + &info->modelist); + rinfo->mon1_modedb = info->monspecs.modedb; + rinfo->mon1_dbsize = info->monspecs.modedb_len; } @@ -847,31 +836,62 @@ modedb = rinfo->mon1_modedb; dbsize = rinfo->mon1_dbsize; snprintf(modename, 31, "%dx%d", rinfo->panel_info.xres, rinfo->panel_info.yres); - if (fb_find_mode(&rinfo->info->var, rinfo->info, modename, + if (fb_find_mode(&info->var, info, modename, modedb, dbsize, NULL, 8) == 0) { printk(KERN_WARNING "radeonfb: Can't find mode for panel size, going back to CRT\n"); rinfo->mon1_type = MT_CRT; goto pickup_default; } has_default_mode = 1; - radeon_var_to_panel_info(rinfo, &rinfo->info->var); + radeon_var_to_panel_info(rinfo, &info->var); } pickup_default: /* - * Pick up a random default mode + * Apply passed-in mode option if any */ - if (!has_default_mode || mode_option) { - struct fb_videomode default_mode; - if (has_default_mode) - radeon_var_to_videomode(&default_mode, &rinfo->info->var); - else - radeon_var_to_videomode(&default_mode, &radeonfb_default_var); - if (fb_find_mode(&rinfo->info->var, rinfo->info, mode_option, - rinfo->mon1_modedb, rinfo->mon1_dbsize, &default_mode, 8) == 0) - rinfo->info->var = radeonfb_default_var; - } + if (mode_option) { + if (fb_find_mode(&info->var, info, mode_option, + info->monspecs.modedb, + info->monspecs.modedb_len, NULL, 8) != 0) + has_default_mode = 1; + } + /* + * Still no mode, let's pick up a default from the db + */ + if (!has_default_mode && info->monspecs.modedb != NULL) { + struct fb_monspecs *specs = &info->monspecs; + struct fb_videomode *modedb = NULL; + + /* get preferred timing */ + if (specs->misc & FB_MISC_1ST_DETAIL) { + int i; + + for (i = 0; i < specs->modedb_len; i++) { + if (specs->modedb[i].flag & FB_MODE_IS_FIRST) { + modedb = &specs->modedb[i]; + break; + } + } + } else { + /* otherwise, get first mode in database */ + modedb = &specs->modedb[0]; + } + if (modedb != NULL) { + info->var.bits_per_pixel = 8; + radeon_videomode_to_var(&info->var, modedb); + has_default_mode = 1; + } + } + if (1) { + struct fb_videomode mode; + /* Make sure that whatever mode got selected is actually in the + * modelist or the kernel may die + */ + fb_var_to_videomode(&mode, &info->var); + fb_add_videomode(&mode, &info->modelist); + } } /* diff -urN linux-2.6.11-rc3/drivers/video/aty/radeon_pm.c linux-2.6.11-rc4/drivers/video/aty/radeon_pm.c --- linux-2.6.11-rc3/drivers/video/aty/radeon_pm.c 2004-12-24 13:35:18.000000000 -0800 +++ linux-2.6.11-rc4/drivers/video/aty/radeon_pm.c 2005-02-12 19:51:07.093112599 -0800 @@ -1,207 +1,449 @@ +/* + * drivers/video/aty/radeon_pm.c + * + * Copyright 2003,2004 Ben. Herrenschmidt + * Copyright 2004 Paul Mackerras + * + * This is the power management code for ATI radeon chipsets. It contains + * some dynamic clock PM enable/disable code similar to what X.org does, + * some D2-state (APM-style) sleep/wakeup code for use on some PowerMacs, + * and the necessary bits to re-initialize from scratch a few chips found + * on PowerMacs as well. The later could be extended to more platforms + * provided the memory controller configuration code be made more generic, + * and you can get the proper mode register commands for your RAMs. + * Those things may be found in the BIOS image... + */ + #include "radeonfb.h" #include #include -/* - * Currently, only PowerMac do D2 state - */ -#define CONFIG_RADEON_HAS_D2 CONFIG_PPC_PMAC - -#ifdef CONFIG_RADEON_HAS_D2 -/* - * On PowerMac, we assume any mobility chip based machine does D2 - */ #ifdef CONFIG_PPC_PMAC -static inline int radeon_suspend_to_d2(struct radeonfb_info *rinfo, u32 state) -{ - return rinfo->is_mobility; -} -#else -static inline int radeon_suspend_to_d2(struct radeonfb_info *rinfo, u32 state) -{ - return 0; -} +#include +#include +#include #endif -#endif /* CONFIG_RADEON_HAS_D2 */ - -/* - * Radeon M6, M7 and M9 Power Management code. This code currently - * only supports the mobile chips in D2 mode, that is typically what - * is used on Apple laptops, it's based from some informations provided - * by ATI along with hours of tracing of MacOS drivers. - * - * New version of this code almost totally rewritten by ATI, many thanks - * for their support. - */ +#include "ati_ids.h" void radeon_pm_disable_dynamic_mode(struct radeonfb_info *rinfo) { + u32 tmp; - u32 sclk_cntl; - u32 mclk_cntl; - u32 sclk_more_cntl; - - u32 vclk_ecp_cntl; - u32 pixclks_cntl; - - /* Mobility chips only, untested on M9+/M10/11 */ - if (!rinfo->is_mobility) + /* RV100 */ + if ((rinfo->family == CHIP_FAMILY_RV100) && (!rinfo->is_mobility)) { + if (rinfo->has_CRTC2) { + tmp = INPLL(pllSCLK_CNTL); + tmp &= ~SCLK_CNTL__DYN_STOP_LAT_MASK; + tmp |= SCLK_CNTL__CP_MAX_DYN_STOP_LAT | SCLK_CNTL__FORCEON_MASK; + OUTPLL(pllSCLK_CNTL, tmp); + } + tmp = INPLL(pllMCLK_CNTL); + tmp |= (MCLK_CNTL__FORCE_MCLKA | + MCLK_CNTL__FORCE_MCLKB | + MCLK_CNTL__FORCE_YCLKA | + MCLK_CNTL__FORCE_YCLKB | + MCLK_CNTL__FORCE_AIC | + MCLK_CNTL__FORCE_MC); + OUTPLL(pllMCLK_CNTL, tmp); + return; + } + /* R100 */ + if (!rinfo->has_CRTC2) { + tmp = INPLL(pllSCLK_CNTL); + tmp |= (SCLK_CNTL__FORCE_CP | SCLK_CNTL__FORCE_HDP | + SCLK_CNTL__FORCE_DISP1 | SCLK_CNTL__FORCE_TOP | + SCLK_CNTL__FORCE_E2 | SCLK_CNTL__FORCE_SE | + SCLK_CNTL__FORCE_IDCT | SCLK_CNTL__FORCE_VIP | + SCLK_CNTL__FORCE_RE | SCLK_CNTL__FORCE_PB | + SCLK_CNTL__FORCE_TAM | SCLK_CNTL__FORCE_TDM | + SCLK_CNTL__FORCE_RB); + OUTPLL(pllSCLK_CNTL, tmp); return; - if (rinfo->family > CHIP_FAMILY_RV250) + } + /* RV350 (M10) */ + if (rinfo->family == CHIP_FAMILY_RV350) { + /* for RV350/M10, no delays are required. */ + tmp = INPLL(pllSCLK_CNTL2); + tmp |= (SCLK_CNTL2__R300_FORCE_TCL | + SCLK_CNTL2__R300_FORCE_GA | + SCLK_CNTL2__R300_FORCE_CBA); + OUTPLL(pllSCLK_CNTL2, tmp); + + tmp = INPLL(pllSCLK_CNTL); + tmp |= (SCLK_CNTL__FORCE_DISP2 | SCLK_CNTL__FORCE_CP | + SCLK_CNTL__FORCE_HDP | SCLK_CNTL__FORCE_DISP1 | + SCLK_CNTL__FORCE_TOP | SCLK_CNTL__FORCE_E2 | + SCLK_CNTL__R300_FORCE_VAP | SCLK_CNTL__FORCE_IDCT | + SCLK_CNTL__FORCE_VIP | SCLK_CNTL__R300_FORCE_SR | + SCLK_CNTL__R300_FORCE_PX | SCLK_CNTL__R300_FORCE_TX | + SCLK_CNTL__R300_FORCE_US | SCLK_CNTL__FORCE_TV_SCLK | + SCLK_CNTL__R300_FORCE_SU | SCLK_CNTL__FORCE_OV0); + OUTPLL(pllSCLK_CNTL, tmp); + + tmp = INPLL(pllSCLK_MORE_CNTL); + tmp |= (SCLK_MORE_CNTL__FORCE_DISPREGS | SCLK_MORE_CNTL__FORCE_MC_GUI | + SCLK_MORE_CNTL__FORCE_MC_HOST); + OUTPLL(pllSCLK_MORE_CNTL, tmp); + + tmp = INPLL(pllMCLK_CNTL); + tmp |= (MCLK_CNTL__FORCE_MCLKA | + MCLK_CNTL__FORCE_MCLKB | + MCLK_CNTL__FORCE_YCLKA | + MCLK_CNTL__FORCE_YCLKB | + MCLK_CNTL__FORCE_MC); + OUTPLL(pllMCLK_CNTL, tmp); + + tmp = INPLL(pllVCLK_ECP_CNTL); + tmp &= ~(VCLK_ECP_CNTL__PIXCLK_ALWAYS_ONb | + VCLK_ECP_CNTL__PIXCLK_DAC_ALWAYS_ONb | + VCLK_ECP_CNTL__R300_DISP_DAC_PIXCLK_DAC_BLANK_OFF); + OUTPLL(pllVCLK_ECP_CNTL, tmp); + + tmp = INPLL(pllPIXCLKS_CNTL); + tmp &= ~(PIXCLKS_CNTL__PIX2CLK_ALWAYS_ONb | + PIXCLKS_CNTL__PIX2CLK_DAC_ALWAYS_ONb | + PIXCLKS_CNTL__DISP_TVOUT_PIXCLK_TV_ALWAYS_ONb | + PIXCLKS_CNTL__R300_DVOCLK_ALWAYS_ONb | + PIXCLKS_CNTL__PIXCLK_BLEND_ALWAYS_ONb | + PIXCLKS_CNTL__PIXCLK_GV_ALWAYS_ONb | + PIXCLKS_CNTL__R300_PIXCLK_DVO_ALWAYS_ONb | + PIXCLKS_CNTL__PIXCLK_LVDS_ALWAYS_ONb | + PIXCLKS_CNTL__PIXCLK_TMDS_ALWAYS_ONb | + PIXCLKS_CNTL__R300_PIXCLK_TRANS_ALWAYS_ONb | + PIXCLKS_CNTL__R300_PIXCLK_TVO_ALWAYS_ONb | + PIXCLKS_CNTL__R300_P2G2CLK_ALWAYS_ONb | + PIXCLKS_CNTL__R300_P2G2CLK_ALWAYS_ONb | + PIXCLKS_CNTL__R300_DISP_DAC_PIXCLK_DAC2_BLANK_OFF); + OUTPLL(pllPIXCLKS_CNTL, tmp); + return; + } + /* Default */ + /* Force Core Clocks */ - sclk_cntl = INPLL( pllSCLK_CNTL_M6); - sclk_cntl |= SCLK_CNTL_M6__FORCE_CP| - SCLK_CNTL_M6__FORCE_HDP| - SCLK_CNTL_M6__FORCE_DISP1| - SCLK_CNTL_M6__FORCE_DISP2| - SCLK_CNTL_M6__FORCE_TOP| - SCLK_CNTL_M6__FORCE_E2| - SCLK_CNTL_M6__FORCE_SE| - SCLK_CNTL_M6__FORCE_IDCT| - SCLK_CNTL_M6__FORCE_VIP| - SCLK_CNTL_M6__FORCE_RE| - SCLK_CNTL_M6__FORCE_PB| - SCLK_CNTL_M6__FORCE_TAM| - SCLK_CNTL_M6__FORCE_TDM| - SCLK_CNTL_M6__FORCE_RB| - SCLK_CNTL_M6__FORCE_TV_SCLK| - SCLK_CNTL_M6__FORCE_SUBPIC| - SCLK_CNTL_M6__FORCE_OV0; - OUTPLL( pllSCLK_CNTL_M6, sclk_cntl); - - - - sclk_more_cntl = INPLL(pllSCLK_MORE_CNTL); - sclk_more_cntl |= SCLK_MORE_CNTL__FORCE_DISPREGS| - SCLK_MORE_CNTL__FORCE_MC_GUI| - SCLK_MORE_CNTL__FORCE_MC_HOST; - OUTPLL(pllSCLK_MORE_CNTL, sclk_more_cntl); - - /* Force Display clocks */ - vclk_ecp_cntl = INPLL( pllVCLK_ECP_CNTL); - vclk_ecp_cntl &= ~( VCLK_ECP_CNTL__PIXCLK_ALWAYS_ONb | - VCLK_ECP_CNTL__PIXCLK_DAC_ALWAYS_ONb); + tmp = INPLL(pllSCLK_CNTL); + tmp |= (SCLK_CNTL__FORCE_CP | SCLK_CNTL__FORCE_E2); - OUTPLL( pllVCLK_ECP_CNTL, vclk_ecp_cntl); - - pixclks_cntl = INPLL( pllPIXCLKS_CNTL); - pixclks_cntl &= ~( PIXCLKS_CNTL__PIXCLK_GV_ALWAYS_ONb | - PIXCLKS_CNTL__PIXCLK_BLEND_ALWAYS_ONb| - PIXCLKS_CNTL__PIXCLK_DIG_TMDS_ALWAYS_ONb | - PIXCLKS_CNTL__PIXCLK_LVDS_ALWAYS_ONb| - PIXCLKS_CNTL__PIXCLK_TMDS_ALWAYS_ONb| - PIXCLKS_CNTL__PIX2CLK_ALWAYS_ONb| - PIXCLKS_CNTL__PIX2CLK_DAC_ALWAYS_ONb); - - OUTPLL( pllPIXCLKS_CNTL, pixclks_cntl); + /* XFree doesn't do that case, but we had this code from Apple and it + * seem necessary for proper suspend/resume operations + */ + if (rinfo->is_mobility) { + tmp |= SCLK_CNTL__FORCE_HDP| + SCLK_CNTL__FORCE_DISP1| + SCLK_CNTL__FORCE_DISP2| + SCLK_CNTL__FORCE_TOP| + SCLK_CNTL__FORCE_SE| + SCLK_CNTL__FORCE_IDCT| + SCLK_CNTL__FORCE_VIP| + SCLK_CNTL__FORCE_PB| + SCLK_CNTL__FORCE_RE| + SCLK_CNTL__FORCE_TAM| + SCLK_CNTL__FORCE_TDM| + SCLK_CNTL__FORCE_RB| + SCLK_CNTL__FORCE_TV_SCLK| + SCLK_CNTL__FORCE_SUBPIC| + SCLK_CNTL__FORCE_OV0; + } + else if (rinfo->family == CHIP_FAMILY_R300 || + rinfo->family == CHIP_FAMILY_R350) { + tmp |= SCLK_CNTL__FORCE_HDP | + SCLK_CNTL__FORCE_DISP1 | + SCLK_CNTL__FORCE_DISP2 | + SCLK_CNTL__FORCE_TOP | + SCLK_CNTL__FORCE_IDCT | + SCLK_CNTL__FORCE_VIP; + } + OUTPLL(pllSCLK_CNTL, tmp); + radeon_msleep(16); + + if (rinfo->family == CHIP_FAMILY_R300 || rinfo->family == CHIP_FAMILY_R350) { + tmp = INPLL(pllSCLK_CNTL2); + tmp |= SCLK_CNTL2__R300_FORCE_TCL | + SCLK_CNTL2__R300_FORCE_GA | + SCLK_CNTL2__R300_FORCE_CBA; + OUTPLL(pllSCLK_CNTL2, tmp); + radeon_msleep(16); + } + + tmp = INPLL(pllCLK_PIN_CNTL); + tmp &= ~CLK_PIN_CNTL__SCLK_DYN_START_CNTL; + OUTPLL(pllCLK_PIN_CNTL, tmp); + radeon_msleep(15); + + if (rinfo->is_IGP) { + /* Weird ... X is _un_ forcing clocks here, I think it's + * doing backward. Imitate it for now... + */ + tmp = INPLL(pllMCLK_CNTL); + tmp &= ~(MCLK_CNTL__FORCE_MCLKA | + MCLK_CNTL__FORCE_YCLKA); + OUTREG(pllMCLK_CNTL, tmp); + radeon_msleep(16); + } + /* Hrm... same shit, X doesn't do that but I have to */ + else if (rinfo->is_mobility) { + tmp = INPLL(pllMCLK_CNTL); + tmp |= (MCLK_CNTL__FORCE_MCLKA | + MCLK_CNTL__FORCE_MCLKB | + MCLK_CNTL__FORCE_YCLKA | + MCLK_CNTL__FORCE_YCLKB); + OUTPLL(pllMCLK_CNTL, tmp); + radeon_msleep(16); + + tmp = INPLL(pllMCLK_MISC); + tmp &= ~(MCLK_MISC__MC_MCLK_MAX_DYN_STOP_LAT| + MCLK_MISC__IO_MCLK_MAX_DYN_STOP_LAT| + MCLK_MISC__MC_MCLK_DYN_ENABLE| + MCLK_MISC__IO_MCLK_DYN_ENABLE); + OUTPLL(pllMCLK_MISC, tmp); + radeon_msleep(15); + } + + if (rinfo->is_mobility) { + tmp = INPLL(pllSCLK_MORE_CNTL); + tmp |= SCLK_MORE_CNTL__FORCE_DISPREGS| + SCLK_MORE_CNTL__FORCE_MC_GUI| + SCLK_MORE_CNTL__FORCE_MC_HOST; + OUTPLL(pllSCLK_MORE_CNTL, tmp); + radeon_msleep(16); + } - /* Force Memory Clocks */ - mclk_cntl = INPLL( pllMCLK_CNTL_M6); - mclk_cntl &= ~( MCLK_CNTL_M6__FORCE_MCLKA | - MCLK_CNTL_M6__FORCE_MCLKB | - MCLK_CNTL_M6__FORCE_YCLKA | - MCLK_CNTL_M6__FORCE_YCLKB ); - OUTPLL( pllMCLK_CNTL_M6, mclk_cntl); + tmp = INPLL(pllPIXCLKS_CNTL); + tmp &= ~(PIXCLKS_CNTL__PIXCLK_GV_ALWAYS_ONb | + PIXCLKS_CNTL__PIXCLK_BLEND_ALWAYS_ONb| + PIXCLKS_CNTL__PIXCLK_DIG_TMDS_ALWAYS_ONb | + PIXCLKS_CNTL__PIXCLK_LVDS_ALWAYS_ONb| + PIXCLKS_CNTL__PIXCLK_TMDS_ALWAYS_ONb| + PIXCLKS_CNTL__PIX2CLK_ALWAYS_ONb| + PIXCLKS_CNTL__PIX2CLK_DAC_ALWAYS_ONb); + OUTPLL(pllPIXCLKS_CNTL, tmp); + radeon_msleep(16); + + tmp = INPLL( pllVCLK_ECP_CNTL); + tmp &= ~(VCLK_ECP_CNTL__PIXCLK_ALWAYS_ONb | + VCLK_ECP_CNTL__PIXCLK_DAC_ALWAYS_ONb); + OUTPLL( pllVCLK_ECP_CNTL, tmp); + radeon_msleep(16); } void radeon_pm_enable_dynamic_mode(struct radeonfb_info *rinfo) { - u32 clk_pwrmgt_cntl; - u32 sclk_cntl; - u32 sclk_more_cntl; - u32 clk_pin_cntl; - u32 pixclks_cntl; - u32 vclk_ecp_cntl; - u32 mclk_cntl; - u32 mclk_misc; + u32 tmp; - /* Mobility chips only, untested on M9+/M10/11 */ - if (!rinfo->is_mobility) - return; - if (rinfo->family > CHIP_FAMILY_RV250) + /* R100 */ + if (!rinfo->has_CRTC2) { + tmp = INPLL(pllSCLK_CNTL); + + if ((INREG(CONFIG_CNTL) & CFG_ATI_REV_ID_MASK) > CFG_ATI_REV_A13) + tmp &= ~(SCLK_CNTL__FORCE_CP | SCLK_CNTL__FORCE_RB); + tmp &= ~(SCLK_CNTL__FORCE_HDP | SCLK_CNTL__FORCE_DISP1 | + SCLK_CNTL__FORCE_TOP | SCLK_CNTL__FORCE_SE | + SCLK_CNTL__FORCE_IDCT | SCLK_CNTL__FORCE_RE | + SCLK_CNTL__FORCE_PB | SCLK_CNTL__FORCE_TAM | + SCLK_CNTL__FORCE_TDM); + OUTPLL(pllSCLK_CNTL, tmp); return; - - /* Set Latencies */ - clk_pwrmgt_cntl = INPLL( pllCLK_PWRMGT_CNTL_M6); - - clk_pwrmgt_cntl &= ~( CLK_PWRMGT_CNTL_M6__ENGINE_DYNCLK_MODE_MASK| - CLK_PWRMGT_CNTL_M6__ACTIVE_HILO_LAT_MASK| - CLK_PWRMGT_CNTL_M6__DISP_DYN_STOP_LAT_MASK| - CLK_PWRMGT_CNTL_M6__DYN_STOP_MODE_MASK); - /* Mode 1 */ - clk_pwrmgt_cntl = CLK_PWRMGT_CNTL_M6__MC_CH_MODE| - CLK_PWRMGT_CNTL_M6__ENGINE_DYNCLK_MODE | - (1<family == CHIP_FAMILY_RV350) { + tmp = INPLL(pllSCLK_CNTL2); + tmp &= ~(SCLK_CNTL2__R300_FORCE_TCL | + SCLK_CNTL2__R300_FORCE_GA | + SCLK_CNTL2__R300_FORCE_CBA); + tmp |= (SCLK_CNTL2__R300_TCL_MAX_DYN_STOP_LAT | + SCLK_CNTL2__R300_GA_MAX_DYN_STOP_LAT | + SCLK_CNTL2__R300_CBA_MAX_DYN_STOP_LAT); + OUTPLL(pllSCLK_CNTL2, tmp); + + tmp = INPLL(pllSCLK_CNTL); + tmp &= ~(SCLK_CNTL__FORCE_DISP2 | SCLK_CNTL__FORCE_CP | + SCLK_CNTL__FORCE_HDP | SCLK_CNTL__FORCE_DISP1 | + SCLK_CNTL__FORCE_TOP | SCLK_CNTL__FORCE_E2 | + SCLK_CNTL__R300_FORCE_VAP | SCLK_CNTL__FORCE_IDCT | + SCLK_CNTL__FORCE_VIP | SCLK_CNTL__R300_FORCE_SR | + SCLK_CNTL__R300_FORCE_PX | SCLK_CNTL__R300_FORCE_TX | + SCLK_CNTL__R300_FORCE_US | SCLK_CNTL__FORCE_TV_SCLK | + SCLK_CNTL__R300_FORCE_SU | SCLK_CNTL__FORCE_OV0); + tmp |= SCLK_CNTL__DYN_STOP_LAT_MASK; + OUTPLL(pllSCLK_CNTL, tmp); + + tmp = INPLL(pllSCLK_MORE_CNTL); + tmp &= ~SCLK_MORE_CNTL__FORCEON; + tmp |= SCLK_MORE_CNTL__DISPREGS_MAX_DYN_STOP_LAT | + SCLK_MORE_CNTL__MC_GUI_MAX_DYN_STOP_LAT | + SCLK_MORE_CNTL__MC_HOST_MAX_DYN_STOP_LAT; + OUTPLL(pllSCLK_MORE_CNTL, tmp); + + tmp = INPLL(pllVCLK_ECP_CNTL); + tmp |= (VCLK_ECP_CNTL__PIXCLK_ALWAYS_ONb | + VCLK_ECP_CNTL__PIXCLK_DAC_ALWAYS_ONb); + OUTPLL(pllVCLK_ECP_CNTL, tmp); + + tmp = INPLL(pllPIXCLKS_CNTL); + tmp |= (PIXCLKS_CNTL__PIX2CLK_ALWAYS_ONb | + PIXCLKS_CNTL__PIX2CLK_DAC_ALWAYS_ONb | + PIXCLKS_CNTL__DISP_TVOUT_PIXCLK_TV_ALWAYS_ONb | + PIXCLKS_CNTL__R300_DVOCLK_ALWAYS_ONb | + PIXCLKS_CNTL__PIXCLK_BLEND_ALWAYS_ONb | + PIXCLKS_CNTL__PIXCLK_GV_ALWAYS_ONb | + PIXCLKS_CNTL__R300_PIXCLK_DVO_ALWAYS_ONb | + PIXCLKS_CNTL__PIXCLK_LVDS_ALWAYS_ONb | + PIXCLKS_CNTL__PIXCLK_TMDS_ALWAYS_ONb | + PIXCLKS_CNTL__R300_PIXCLK_TRANS_ALWAYS_ONb | + PIXCLKS_CNTL__R300_PIXCLK_TVO_ALWAYS_ONb | + PIXCLKS_CNTL__R300_P2G2CLK_ALWAYS_ONb | + PIXCLKS_CNTL__R300_P2G2CLK_ALWAYS_ONb); + OUTPLL(pllPIXCLKS_CNTL, tmp); + + tmp = INPLL(pllMCLK_MISC); + tmp |= (MCLK_MISC__MC_MCLK_DYN_ENABLE | + MCLK_MISC__IO_MCLK_DYN_ENABLE); + OUTPLL(pllMCLK_MISC, tmp); + + tmp = INPLL(pllMCLK_CNTL); + tmp |= (MCLK_CNTL__FORCE_MCLKA | MCLK_CNTL__FORCE_MCLKB); + tmp &= ~(MCLK_CNTL__FORCE_YCLKA | + MCLK_CNTL__FORCE_YCLKB | + MCLK_CNTL__FORCE_MC); + + /* Some releases of vbios have set DISABLE_MC_MCLKA + * and DISABLE_MC_MCLKB bits in the vbios table. Setting these + * bits will cause H/W hang when reading video memory with dynamic + * clocking enabled. + */ + if ((tmp & MCLK_CNTL__R300_DISABLE_MC_MCLKA) && + (tmp & MCLK_CNTL__R300_DISABLE_MC_MCLKB)) { + /* If both bits are set, then check the active channels */ + tmp = INPLL(pllMCLK_CNTL); + if (rinfo->vram_width == 64) { + if (INREG(MEM_CNTL) & R300_MEM_USE_CD_CH_ONLY) + tmp &= ~MCLK_CNTL__R300_DISABLE_MC_MCLKB; + else + tmp &= ~MCLK_CNTL__R300_DISABLE_MC_MCLKA; + } else { + tmp &= ~(MCLK_CNTL__R300_DISABLE_MC_MCLKA | + MCLK_CNTL__R300_DISABLE_MC_MCLKB); + } + } + OUTPLL(pllMCLK_CNTL, tmp); + return; + } - clk_pin_cntl = INPLL( pllCLK_PIN_CNTL); - clk_pin_cntl |= CLK_PIN_CNTL__SCLK_DYN_START_CNTL; - - OUTPLL( pllCLK_PIN_CNTL, clk_pin_cntl); + /* R300 */ + if (rinfo->family == CHIP_FAMILY_R300 || rinfo->family == CHIP_FAMILY_R350) { + tmp = INPLL(pllSCLK_CNTL); + tmp &= ~(SCLK_CNTL__R300_FORCE_VAP); + tmp |= SCLK_CNTL__FORCE_CP; + OUTPLL(pllSCLK_CNTL, tmp); + radeon_msleep(15); + + tmp = INPLL(pllSCLK_CNTL2); + tmp &= ~(SCLK_CNTL2__R300_FORCE_TCL | + SCLK_CNTL2__R300_FORCE_GA | + SCLK_CNTL2__R300_FORCE_CBA); + OUTPLL(pllSCLK_CNTL2, tmp); + } - /* Enable Dyanmic mode for SCLK */ + /* Others */ - sclk_cntl = INPLL( pllSCLK_CNTL_M6); - sclk_cntl &= SCLK_CNTL_M6__SCLK_SRC_SEL_MASK; - sclk_cntl |= SCLK_CNTL_M6__FORCE_VIP; + tmp = INPLL( pllCLK_PWRMGT_CNTL); + tmp &= ~(CLK_PWRMGT_CNTL__ACTIVE_HILO_LAT_MASK| + CLK_PWRMGT_CNTL__DISP_DYN_STOP_LAT_MASK| + CLK_PWRMGT_CNTL__DYN_STOP_MODE_MASK); + tmp |= CLK_PWRMGT_CNTL__ENGINE_DYNCLK_MODE_MASK | + (0x01 << CLK_PWRMGT_CNTL__ACTIVE_HILO_LAT__SHIFT); + OUTPLL( pllCLK_PWRMGT_CNTL, tmp); + radeon_msleep(15); + + tmp = INPLL(pllCLK_PIN_CNTL); + tmp |= CLK_PIN_CNTL__SCLK_DYN_START_CNTL; + OUTPLL(pllCLK_PIN_CNTL, tmp); + radeon_msleep(15); - OUTPLL( pllSCLK_CNTL_M6, sclk_cntl); + /* When DRI is enabled, setting DYN_STOP_LAT to zero can cause some R200 + * to lockup randomly, leave them as set by BIOS. + */ + tmp = INPLL(pllSCLK_CNTL); + tmp &= ~SCLK_CNTL__FORCEON_MASK; + /*RAGE_6::A11 A12 A12N1 A13, RV250::A11 A12, R300*/ + if ((rinfo->family == CHIP_FAMILY_RV250 && + ((INREG(CONFIG_CNTL) & CFG_ATI_REV_ID_MASK) < CFG_ATI_REV_A13)) || + ((rinfo->family == CHIP_FAMILY_RV100) && + ((INREG(CONFIG_CNTL) & CFG_ATI_REV_ID_MASK) <= CFG_ATI_REV_A13))) { + tmp |= SCLK_CNTL__FORCE_CP; + tmp |= SCLK_CNTL__FORCE_VIP; + } + OUTPLL(pllSCLK_CNTL, tmp); + radeon_msleep(15); - sclk_more_cntl = INPLL(pllSCLK_MORE_CNTL); - sclk_more_cntl &= ~(SCLK_MORE_CNTL__FORCE_DISPREGS); - - OUTPLL(pllSCLK_MORE_CNTL, sclk_more_cntl); + if ((rinfo->family == CHIP_FAMILY_RV200) || + (rinfo->family == CHIP_FAMILY_RV250) || + (rinfo->family == CHIP_FAMILY_RV280)) { + tmp = INPLL(pllSCLK_MORE_CNTL); + tmp &= ~SCLK_MORE_CNTL__FORCEON; + + /* RV200::A11 A12 RV250::A11 A12 */ + if (((rinfo->family == CHIP_FAMILY_RV200) || + (rinfo->family == CHIP_FAMILY_RV250)) && + ((INREG(CONFIG_CNTL) & CFG_ATI_REV_ID_MASK) < CFG_ATI_REV_A13)) + tmp |= SCLK_MORE_CNTL__FORCEON; + OUTPLL(pllSCLK_MORE_CNTL, tmp); + radeon_msleep(15); + } - /* Enable Dynamic mode for PIXCLK & PIX2CLK */ - pixclks_cntl = INPLL( pllPIXCLKS_CNTL); - - pixclks_cntl|= PIXCLKS_CNTL__PIX2CLK_ALWAYS_ONb | - PIXCLKS_CNTL__PIX2CLK_DAC_ALWAYS_ONb| - PIXCLKS_CNTL__PIXCLK_BLEND_ALWAYS_ONb| - PIXCLKS_CNTL__PIXCLK_GV_ALWAYS_ONb| - PIXCLKS_CNTL__PIXCLK_DIG_TMDS_ALWAYS_ONb| - PIXCLKS_CNTL__PIXCLK_LVDS_ALWAYS_ONb| - PIXCLKS_CNTL__PIXCLK_TMDS_ALWAYS_ONb; + /* RV200::A11 A12, RV250::A11 A12 */ + if (((rinfo->family == CHIP_FAMILY_RV200) || + (rinfo->family == CHIP_FAMILY_RV250)) && + ((INREG(CONFIG_CNTL) & CFG_ATI_REV_ID_MASK) < CFG_ATI_REV_A13)) { + tmp = INPLL(pllPLL_PWRMGT_CNTL); + tmp |= PLL_PWRMGT_CNTL__TCL_BYPASS_DISABLE; + OUTREG(pllPLL_PWRMGT_CNTL, tmp); + radeon_msleep(15); + } - OUTPLL( pllPIXCLKS_CNTL, pixclks_cntl); + tmp = INPLL(pllPIXCLKS_CNTL); + tmp |= PIXCLKS_CNTL__PIX2CLK_ALWAYS_ONb | + PIXCLKS_CNTL__PIX2CLK_DAC_ALWAYS_ONb| + PIXCLKS_CNTL__PIXCLK_BLEND_ALWAYS_ONb| + PIXCLKS_CNTL__PIXCLK_GV_ALWAYS_ONb| + PIXCLKS_CNTL__PIXCLK_DIG_TMDS_ALWAYS_ONb| + PIXCLKS_CNTL__PIXCLK_LVDS_ALWAYS_ONb| + PIXCLKS_CNTL__PIXCLK_TMDS_ALWAYS_ONb; + OUTPLL(pllPIXCLKS_CNTL, tmp); + radeon_msleep(15); - - vclk_ecp_cntl = INPLL( pllVCLK_ECP_CNTL); - - vclk_ecp_cntl|= VCLK_ECP_CNTL__PIXCLK_ALWAYS_ONb | - VCLK_ECP_CNTL__PIXCLK_DAC_ALWAYS_ONb; - - OUTPLL( pllVCLK_ECP_CNTL, vclk_ecp_cntl); + tmp = INPLL(pllVCLK_ECP_CNTL); + tmp |= VCLK_ECP_CNTL__PIXCLK_ALWAYS_ONb | + VCLK_ECP_CNTL__PIXCLK_DAC_ALWAYS_ONb; + OUTPLL(pllVCLK_ECP_CNTL, tmp); + + /* X doesn't do that ... hrm, we do on mobility && Macs */ +#ifdef CONFIG_PPC_OF + if (rinfo->is_mobility) { + tmp = INPLL(pllMCLK_CNTL); + tmp &= ~(MCLK_CNTL__FORCE_MCLKA | + MCLK_CNTL__FORCE_MCLKB | + MCLK_CNTL__FORCE_YCLKA | + MCLK_CNTL__FORCE_YCLKB); + OUTPLL(pllMCLK_CNTL, tmp); + radeon_msleep(15); - - /* Enable Dynamic mode for MCLK */ - - mclk_cntl = INPLL( pllMCLK_CNTL_M6); - mclk_cntl |= MCLK_CNTL_M6__FORCE_MCLKA| - MCLK_CNTL_M6__FORCE_MCLKB| - MCLK_CNTL_M6__FORCE_YCLKA| - MCLK_CNTL_M6__FORCE_YCLKB; - - OUTPLL( pllMCLK_CNTL_M6, mclk_cntl); - - mclk_misc = INPLL(pllMCLK_MISC); - mclk_misc |= MCLK_MISC__MC_MCLK_MAX_DYN_STOP_LAT| + tmp = INPLL(pllMCLK_MISC); + tmp |= MCLK_MISC__MC_MCLK_MAX_DYN_STOP_LAT| MCLK_MISC__IO_MCLK_MAX_DYN_STOP_LAT| MCLK_MISC__MC_MCLK_DYN_ENABLE| - MCLK_MISC__IO_MCLK_DYN_ENABLE; - - OUTPLL(pllMCLK_MISC, mclk_misc); + MCLK_MISC__IO_MCLK_DYN_ENABLE; + OUTPLL(pllMCLK_MISC, tmp); + radeon_msleep(15); + } +#endif /* CONFIG_PPC_OF */ } #ifdef CONFIG_PM @@ -218,7 +460,7 @@ return INREG( MC_IND_DATA); } -static void radeon_pm_save_regs(struct radeonfb_info *rinfo) +static void radeon_pm_save_regs(struct radeonfb_info *rinfo, int saving_for_d3) { rinfo->save_regs[0] = INPLL(PLL_PWRMGT_CNTL); rinfo->save_regs[1] = INPLL(CLK_PWRMGT_CNTL); @@ -233,7 +475,6 @@ rinfo->save_regs[9] = INREG(DISP_MISC_CNTL); rinfo->save_regs[10] = INREG(DISP_PWR_MAN); rinfo->save_regs[11] = INREG(LVDS_GEN_CNTL); - rinfo->save_regs[12] = INREG(LVDS_PLL_CNTL); rinfo->save_regs[13] = INREG(TV_DAC_CNTL); rinfo->save_regs[14] = INREG(BUS_CNTL1); rinfo->save_regs[15] = INREG(CRTC_OFFSET_CNTL); @@ -256,6 +497,93 @@ rinfo->save_regs[31] = INREG(DISPLAY_BASE_ADDR); rinfo->save_regs[32] = INREG(MC_AGP_LOCATION); rinfo->save_regs[33] = INREG(CRTC2_DISPLAY_BASE_ADDR); + + rinfo->save_regs[34] = INPLL(SCLK_MORE_CNTL); + rinfo->save_regs[35] = INREG(MEM_SDRAM_MODE_REG); + rinfo->save_regs[36] = INREG(BUS_CNTL); + rinfo->save_regs[39] = INREG(RBBM_CNTL); + rinfo->save_regs[40] = INREG(DAC_CNTL); + rinfo->save_regs[41] = INREG(HOST_PATH_CNTL); + rinfo->save_regs[37] = INREG(MPP_TB_CONFIG); + rinfo->save_regs[38] = INREG(FCP_CNTL); + + if (rinfo->is_mobility) { + rinfo->save_regs[12] = INREG(LVDS_PLL_CNTL); + rinfo->save_regs[43] = INPLL(pllSSPLL_CNTL); + rinfo->save_regs[44] = INPLL(pllSSPLL_REF_DIV); + rinfo->save_regs[45] = INPLL(pllSSPLL_DIV_0); + rinfo->save_regs[90] = INPLL(pllSS_INT_CNTL); + rinfo->save_regs[91] = INPLL(pllSS_TST_CNTL); + rinfo->save_regs[81] = INREG(LVDS_GEN_CNTL); + } + + if (rinfo->family >= CHIP_FAMILY_RV200) { + rinfo->save_regs[42] = INREG(MEM_REFRESH_CNTL); + rinfo->save_regs[46] = INREG(MC_CNTL); + rinfo->save_regs[47] = INREG(MC_INIT_GFX_LAT_TIMER); + rinfo->save_regs[48] = INREG(MC_INIT_MISC_LAT_TIMER); + rinfo->save_regs[49] = INREG(MC_TIMING_CNTL); + rinfo->save_regs[50] = INREG(MC_READ_CNTL_AB); + rinfo->save_regs[51] = INREG(MC_IOPAD_CNTL); + rinfo->save_regs[52] = INREG(MC_CHIP_IO_OE_CNTL_AB); + rinfo->save_regs[53] = INREG(MC_DEBUG); + } + rinfo->save_regs[54] = INREG(PAMAC0_DLY_CNTL); + rinfo->save_regs[55] = INREG(PAMAC1_DLY_CNTL); + rinfo->save_regs[56] = INREG(PAD_CTLR_MISC); + rinfo->save_regs[57] = INREG(FW_CNTL); + + if (rinfo->family >= CHIP_FAMILY_R300) { + rinfo->save_regs[58] = INMC(rinfo, ixR300_MC_MC_INIT_WR_LAT_TIMER); + rinfo->save_regs[59] = INMC(rinfo, ixR300_MC_IMP_CNTL); + rinfo->save_regs[60] = INMC(rinfo, ixR300_MC_CHP_IO_CNTL_C0); + rinfo->save_regs[61] = INMC(rinfo, ixR300_MC_CHP_IO_CNTL_C1); + rinfo->save_regs[62] = INMC(rinfo, ixR300_MC_CHP_IO_CNTL_D0); + rinfo->save_regs[63] = INMC(rinfo, ixR300_MC_CHP_IO_CNTL_D1); + rinfo->save_regs[64] = INMC(rinfo, ixR300_MC_BIST_CNTL_3); + rinfo->save_regs[65] = INMC(rinfo, ixR300_MC_CHP_IO_CNTL_A0); + rinfo->save_regs[66] = INMC(rinfo, ixR300_MC_CHP_IO_CNTL_A1); + rinfo->save_regs[67] = INMC(rinfo, ixR300_MC_CHP_IO_CNTL_B0); + rinfo->save_regs[68] = INMC(rinfo, ixR300_MC_CHP_IO_CNTL_B1); + rinfo->save_regs[69] = INMC(rinfo, ixR300_MC_DEBUG_CNTL); + rinfo->save_regs[70] = INMC(rinfo, ixR300_MC_DLL_CNTL); + rinfo->save_regs[71] = INMC(rinfo, ixR300_MC_IMP_CNTL_0); + rinfo->save_regs[72] = INMC(rinfo, ixR300_MC_ELPIDA_CNTL); + rinfo->save_regs[96] = INMC(rinfo, ixR300_MC_READ_CNTL_CD); + } else { + rinfo->save_regs[59] = INMC(rinfo, ixMC_IMP_CNTL); + rinfo->save_regs[65] = INMC(rinfo, ixMC_CHP_IO_CNTL_A0); + rinfo->save_regs[66] = INMC(rinfo, ixMC_CHP_IO_CNTL_A1); + rinfo->save_regs[67] = INMC(rinfo, ixMC_CHP_IO_CNTL_B0); + rinfo->save_regs[68] = INMC(rinfo, ixMC_CHP_IO_CNTL_B1); + rinfo->save_regs[71] = INMC(rinfo, ixMC_IMP_CNTL_0); + } + + rinfo->save_regs[73] = INPLL(pllMPLL_CNTL); + rinfo->save_regs[74] = INPLL(pllSPLL_CNTL); + rinfo->save_regs[75] = INPLL(pllMPLL_AUX_CNTL); + rinfo->save_regs[76] = INPLL(pllSPLL_AUX_CNTL); + rinfo->save_regs[77] = INPLL(pllM_SPLL_REF_FB_DIV); + rinfo->save_regs[78] = INPLL(pllAGP_PLL_CNTL); + rinfo->save_regs[79] = INREG(PAMAC2_DLY_CNTL); + + rinfo->save_regs[80] = INREG(OV0_BASE_ADDR); + rinfo->save_regs[82] = INREG(FP_GEN_CNTL); + rinfo->save_regs[83] = INREG(FP2_GEN_CNTL); + rinfo->save_regs[84] = INREG(TMDS_CNTL); + rinfo->save_regs[85] = INREG(TMDS_TRANSMITTER_CNTL); + rinfo->save_regs[86] = INREG(DISP_OUTPUT_CNTL); + rinfo->save_regs[87] = INREG(DISP_HW_DEBUG); + rinfo->save_regs[88] = INREG(TV_MASTER_CNTL); + rinfo->save_regs[89] = INPLL(pllP2PLL_REF_DIV); + rinfo->save_regs[92] = INPLL(pllPPLL_DIV_0); + rinfo->save_regs[93] = INPLL(pllPPLL_CNTL); + rinfo->save_regs[94] = INREG(GRPH_BUFFER_CNTL); + rinfo->save_regs[95] = INREG(GRPH2_BUFFER_CNTL); + rinfo->save_regs[96] = INREG(HDP_DEBUG); + rinfo->save_regs[97] = INPLL(pllMDLL_CKO); + rinfo->save_regs[98] = INPLL(pllMDLL_RDCKA); + rinfo->save_regs[99] = INPLL(pllMDLL_RDCKB); } static void radeon_pm_restore_regs(struct radeonfb_info *rinfo) @@ -270,12 +598,15 @@ OUTPLL(VCLK_ECP_CNTL, rinfo->save_regs[5]); OUTPLL(PIXCLKS_CNTL, rinfo->save_regs[6]); OUTPLL(MCLK_MISC, rinfo->save_regs[7]); - + if (rinfo->family == CHIP_FAMILY_RV350) + OUTPLL(SCLK_MORE_CNTL, rinfo->save_regs[34]); + OUTREG(SURFACE_CNTL, rinfo->save_regs[29]); OUTREG(MC_FB_LOCATION, rinfo->save_regs[30]); OUTREG(DISPLAY_BASE_ADDR, rinfo->save_regs[31]); OUTREG(MC_AGP_LOCATION, rinfo->save_regs[32]); OUTREG(CRTC2_DISPLAY_BASE_ADDR, rinfo->save_regs[33]); + OUTREG(CONFIG_MEMSIZE, rinfo->video_ram); OUTREG(DISP_MISC_CNTL, rinfo->save_regs[9]); OUTREG(DISP_PWR_MAN, rinfo->save_regs[10]); @@ -287,10 +618,8 @@ OUTREG(AGP_CNTL, rinfo->save_regs[16]); OUTREG(CRTC_GEN_CNTL, rinfo->save_regs[17]); OUTREG(CRTC2_GEN_CNTL, rinfo->save_regs[18]); - - // wait VBL before that one ? OUTPLL(P2PLL_CNTL, rinfo->save_regs[8]); - + OUTREG(GPIOPAD_A, rinfo->save_regs[19]); OUTREG(GPIOPAD_EN, rinfo->save_regs[20]); OUTREG(GPIOPAD_MASK, rinfo->save_regs[21]); @@ -319,30 +648,32 @@ static void radeon_pm_program_v2clk(struct radeonfb_info *rinfo) { - /* we use __INPLL and _OUTPLL and do the locking ourselves... */ - unsigned long flags; - spin_lock_irqsave(&rinfo->reg_lock, flags); /* Set v2clk to 65MHz */ - __OUTPLL(pllPIXCLKS_CNTL, - __INPLL(rinfo, pllPIXCLKS_CNTL) & ~PIXCLKS_CNTL__PIX2CLK_SRC_SEL_MASK); + if (rinfo->family <= CHIP_FAMILY_RV280) { + OUTPLL(pllPIXCLKS_CNTL, + __INPLL(rinfo, pllPIXCLKS_CNTL) + & ~PIXCLKS_CNTL__PIX2CLK_SRC_SEL_MASK); - __OUTPLL(pllP2PLL_REF_DIV, 0x0000000c); - __OUTPLL(pllP2PLL_CNTL, 0x0000bf00); - __OUTPLL(pllP2PLL_DIV_0, 0x00020074 | P2PLL_DIV_0__P2PLL_ATOMIC_UPDATE_W); + OUTPLL(pllP2PLL_REF_DIV, 0x0000000c); + OUTPLL(pllP2PLL_CNTL, 0x0000bf00); + } else { + OUTPLL(pllP2PLL_REF_DIV, 0x0000000c); + INPLL(pllP2PLL_REF_DIV); + OUTPLL(pllP2PLL_CNTL, 0x0000a700); + } + + OUTPLL(pllP2PLL_DIV_0, 0x00020074 | P2PLL_DIV_0__P2PLL_ATOMIC_UPDATE_W); - __OUTPLL(pllP2PLL_CNTL, - __INPLL(rinfo, pllP2PLL_CNTL) & ~P2PLL_CNTL__P2PLL_SLEEP); + OUTPLL(pllP2PLL_CNTL, INPLL(pllP2PLL_CNTL) & ~P2PLL_CNTL__P2PLL_SLEEP); mdelay(1); - __OUTPLL(pllP2PLL_CNTL, - __INPLL(rinfo, pllP2PLL_CNTL) & ~P2PLL_CNTL__P2PLL_RESET); + OUTPLL(pllP2PLL_CNTL, INPLL(pllP2PLL_CNTL) & ~P2PLL_CNTL__P2PLL_RESET); mdelay( 1); - __OUTPLL(pllPIXCLKS_CNTL, - (__INPLL(rinfo, pllPIXCLKS_CNTL) & ~PIXCLKS_CNTL__PIX2CLK_SRC_SEL_MASK) + OUTPLL(pllPIXCLKS_CNTL, + (INPLL(pllPIXCLKS_CNTL) & ~PIXCLKS_CNTL__PIX2CLK_SRC_SEL_MASK) | (0x03 << PIXCLKS_CNTL__PIX2CLK_SRC_SEL__SHIFT)); mdelay( 1); - spin_unlock_irqrestore(&rinfo->reg_lock, flags); } static void radeon_pm_low_current(struct radeonfb_info *rinfo) @@ -350,8 +681,12 @@ u32 reg; reg = INREG(BUS_CNTL1); - reg &= ~BUS_CNTL1_MOBILE_PLATFORM_SEL_MASK; - reg |= BUS_CNTL1_AGPCLK_VALID | (1<family <= CHIP_FAMILY_RV280) { + reg &= ~BUS_CNTL1_MOBILE_PLATFORM_SEL_MASK; + reg |= BUS_CNTL1_AGPCLK_VALID | (1<family <= CHIP_FAMILY_RV280) + sclk_cntl |= SCLK_CNTL__FORCE_RE; + else + sclk_cntl |= SCLK_CNTL__SE_MAX_DYN_STOP_LAT | + SCLK_CNTL__E2_MAX_DYN_STOP_LAT | + SCLK_CNTL__TV_MAX_DYN_STOP_LAT | + SCLK_CNTL__HDP_MAX_DYN_STOP_LAT | + SCLK_CNTL__CP_MAX_DYN_STOP_LAT; - OUTPLL( pllSCLK_CNTL_M6, sclk_cntl); + OUTPLL( pllSCLK_CNTL, sclk_cntl); sclk_more_cntl = INPLL(pllSCLK_MORE_CNTL); sclk_more_cntl |= SCLK_MORE_CNTL__FORCE_DISPREGS | @@ -438,18 +780,19 @@ OUTPLL(pllSCLK_MORE_CNTL, sclk_more_cntl); - mclk_cntl = INPLL( pllMCLK_CNTL_M6); - mclk_cntl &= ~( MCLK_CNTL_M6__FORCE_MCLKA | - MCLK_CNTL_M6__FORCE_MCLKB | - MCLK_CNTL_M6__FORCE_YCLKA | - MCLK_CNTL_M6__FORCE_YCLKB | - MCLK_CNTL_M6__FORCE_MC + mclk_cntl = INPLL( pllMCLK_CNTL); + mclk_cntl &= ~( MCLK_CNTL__FORCE_MCLKA | + MCLK_CNTL__FORCE_MCLKB | + MCLK_CNTL__FORCE_YCLKA | + MCLK_CNTL__FORCE_YCLKB | + MCLK_CNTL__FORCE_MC ); - OUTPLL( pllMCLK_CNTL_M6, mclk_cntl); + OUTPLL( pllMCLK_CNTL, mclk_cntl); /* Force Display clocks */ vclk_ecp_cntl = INPLL( pllVCLK_ECP_CNTL); - vclk_ecp_cntl &= ~(VCLK_ECP_CNTL__PIXCLK_ALWAYS_ONb |VCLK_ECP_CNTL__PIXCLK_DAC_ALWAYS_ONb); + vclk_ecp_cntl &= ~(VCLK_ECP_CNTL__PIXCLK_ALWAYS_ONb + | VCLK_ECP_CNTL__PIXCLK_DAC_ALWAYS_ONb); vclk_ecp_cntl |= VCLK_ECP_CNTL__ECP_FORCE_ON; OUTPLL( pllVCLK_ECP_CNTL, vclk_ecp_cntl); @@ -480,26 +823,27 @@ OUTPLL( pllPLL_PWRMGT_CNTL, pll_pwrmgt_cntl); - clk_pwrmgt_cntl = INPLL( pllCLK_PWRMGT_CNTL_M6); + clk_pwrmgt_cntl = INPLL( pllCLK_PWRMGT_CNTL); - clk_pwrmgt_cntl &= ~( CLK_PWRMGT_CNTL_M6__MPLL_PWRMGT_OFF| - CLK_PWRMGT_CNTL_M6__SPLL_PWRMGT_OFF| - CLK_PWRMGT_CNTL_M6__PPLL_PWRMGT_OFF| - CLK_PWRMGT_CNTL_M6__P2PLL_PWRMGT_OFF| - CLK_PWRMGT_CNTL_M6__MCLK_TURNOFF| - CLK_PWRMGT_CNTL_M6__SCLK_TURNOFF| - CLK_PWRMGT_CNTL_M6__PCLK_TURNOFF| - CLK_PWRMGT_CNTL_M6__P2CLK_TURNOFF| - CLK_PWRMGT_CNTL_M6__TVPLL_PWRMGT_OFF| - CLK_PWRMGT_CNTL_M6__GLOBAL_PMAN_EN| - CLK_PWRMGT_CNTL_M6__ENGINE_DYNCLK_MODE| - CLK_PWRMGT_CNTL_M6__ACTIVE_HILO_LAT_MASK| - CLK_PWRMGT_CNTL_M6__CG_NO1_DEBUG_MASK + clk_pwrmgt_cntl &= ~( CLK_PWRMGT_CNTL__MPLL_PWRMGT_OFF| + CLK_PWRMGT_CNTL__SPLL_PWRMGT_OFF| + CLK_PWRMGT_CNTL__PPLL_PWRMGT_OFF| + CLK_PWRMGT_CNTL__P2PLL_PWRMGT_OFF| + CLK_PWRMGT_CNTL__MCLK_TURNOFF| + CLK_PWRMGT_CNTL__SCLK_TURNOFF| + CLK_PWRMGT_CNTL__PCLK_TURNOFF| + CLK_PWRMGT_CNTL__P2CLK_TURNOFF| + CLK_PWRMGT_CNTL__TVPLL_PWRMGT_OFF| + CLK_PWRMGT_CNTL__GLOBAL_PMAN_EN| + CLK_PWRMGT_CNTL__ENGINE_DYNCLK_MODE| + CLK_PWRMGT_CNTL__ACTIVE_HILO_LAT_MASK| + CLK_PWRMGT_CNTL__CG_NO1_DEBUG_MASK ); - clk_pwrmgt_cntl |= CLK_PWRMGT_CNTL_M6__GLOBAL_PMAN_EN | CLK_PWRMGT_CNTL_M6__DISP_PM; + clk_pwrmgt_cntl |= CLK_PWRMGT_CNTL__GLOBAL_PMAN_EN + | CLK_PWRMGT_CNTL__DISP_PM; - OUTPLL( pllCLK_PWRMGT_CNTL_M6, clk_pwrmgt_cntl); + OUTPLL( pllCLK_PWRMGT_CNTL, clk_pwrmgt_cntl); clk_pin_cntl = INPLL( pllCLK_PIN_CNTL); @@ -510,12 +854,19 @@ OUTPLL( pllMCLK_MISC, tmp); /* AGP PLL control */ - OUTREG(BUS_CNTL1, INREG(BUS_CNTL1) | BUS_CNTL1__AGPCLK_VALID); + if (rinfo->family <= CHIP_FAMILY_RV280) { + OUTREG(BUS_CNTL1, INREG(BUS_CNTL1) | BUS_CNTL1__AGPCLK_VALID); - OUTREG(BUS_CNTL1, - (INREG(BUS_CNTL1) & ~BUS_CNTL1__MOBILE_PLATFORM_SEL_MASK) - | (2<= 2) + mdelay(1); mem_sdram_mode |= MEM_SDRAM_MODE_REG__MEM_SDRAM_RESET; OUTREG( MEM_SDRAM_MODE_REG, mem_sdram_mode); + if (delay_required >= 2) + mdelay(1); mem_sdram_mode &= ~MEM_SDRAM_MODE_REG__MEM_SDRAM_RESET; OUTREG( MEM_SDRAM_MODE_REG, mem_sdram_mode); + if (delay_required >= 2) + mdelay(1); - if (delay_required == 1) - while( (INREG( MC_STATUS) & (MC_STATUS__MEM_PWRUP_COMPL_A | MC_STATUS__MEM_PWRUP_COMPL_B) ) == 0 ) - { }; + if (delay_required) { + do { + if (delay_required >= 2) + mdelay(1); + } while ((INREG(MC_STATUS) + & (MC_STATUS__MEM_PWRUP_COMPL_A | + MC_STATUS__MEM_PWRUP_COMPL_B)) == 0); + } +} + +static void radeon_pm_m10_program_mode_wait(struct radeonfb_info *rinfo) +{ + int cnt; + + for (cnt = 0; cnt < 100; ++cnt) { + mdelay(1); + if (INREG(MC_STATUS) & (MC_STATUS__MEM_PWRUP_COMPL_A + | MC_STATUS__MEM_PWRUP_COMPL_B)) + break; + } } @@ -646,126 +1042,274 @@ #define DLL_RESET_DELAY 5 #define DLL_SLEEP_DELAY 1 - u32 DLL_CKO_Value = INPLL(pllMDLL_CKO) | MDLL_CKO__MCKOA_SLEEP | MDLL_CKO__MCKOA_RESET; - u32 DLL_CKA_Value = INPLL(pllMDLL_RDCKA) | MDLL_RDCKA__MRDCKA0_SLEEP | MDLL_RDCKA__MRDCKA1_SLEEP | MDLL_RDCKA__MRDCKA0_RESET | MDLL_RDCKA__MRDCKA1_RESET; - u32 DLL_CKB_Value = INPLL(pllMDLL_RDCKB) | MDLL_RDCKB__MRDCKB0_SLEEP | MDLL_RDCKB__MRDCKB1_SLEEP | MDLL_RDCKB__MRDCKB0_RESET | MDLL_RDCKB__MRDCKB1_RESET; + u32 cko = INPLL(pllMDLL_CKO) | MDLL_CKO__MCKOA_SLEEP + | MDLL_CKO__MCKOA_RESET; + u32 cka = INPLL(pllMDLL_RDCKA) | MDLL_RDCKA__MRDCKA0_SLEEP + | MDLL_RDCKA__MRDCKA1_SLEEP | MDLL_RDCKA__MRDCKA0_RESET + | MDLL_RDCKA__MRDCKA1_RESET; + u32 ckb = INPLL(pllMDLL_RDCKB) | MDLL_RDCKB__MRDCKB0_SLEEP + | MDLL_RDCKB__MRDCKB1_SLEEP | MDLL_RDCKB__MRDCKB0_RESET + | MDLL_RDCKB__MRDCKB1_RESET; /* Setting up the DLL range for write */ - OUTPLL(pllMDLL_CKO, DLL_CKO_Value); - OUTPLL(pllMDLL_RDCKA, DLL_CKA_Value); - OUTPLL(pllMDLL_RDCKB, DLL_CKB_Value); + OUTPLL(pllMDLL_CKO, cko); + OUTPLL(pllMDLL_RDCKA, cka); + OUTPLL(pllMDLL_RDCKB, ckb); + + mdelay(DLL_RESET_DELAY*2); + + cko &= ~(MDLL_CKO__MCKOA_SLEEP | MDLL_CKO__MCKOB_SLEEP); + OUTPLL(pllMDLL_CKO, cko); + mdelay(DLL_SLEEP_DELAY); + cko &= ~(MDLL_CKO__MCKOA_RESET | MDLL_CKO__MCKOB_RESET); + OUTPLL(pllMDLL_CKO, cko); + mdelay(DLL_RESET_DELAY); + + cka &= ~(MDLL_RDCKA__MRDCKA0_SLEEP | MDLL_RDCKA__MRDCKA1_SLEEP); + OUTPLL(pllMDLL_RDCKA, cka); + mdelay(DLL_SLEEP_DELAY); + cka &= ~(MDLL_RDCKA__MRDCKA0_RESET | MDLL_RDCKA__MRDCKA1_RESET); + OUTPLL(pllMDLL_RDCKA, cka); + mdelay(DLL_RESET_DELAY); + + ckb &= ~(MDLL_RDCKB__MRDCKB0_SLEEP | MDLL_RDCKB__MRDCKB1_SLEEP); + OUTPLL(pllMDLL_RDCKB, ckb); + mdelay(DLL_SLEEP_DELAY); + ckb &= ~(MDLL_RDCKB__MRDCKB0_RESET | MDLL_RDCKB__MRDCKB1_RESET); + OUTPLL(pllMDLL_RDCKB, ckb); + mdelay(DLL_RESET_DELAY); - mdelay( DLL_RESET_DELAY); - - /* Channel A */ - - /* Power Up */ - DLL_CKO_Value &= ~(MDLL_CKO__MCKOA_SLEEP ); - OUTPLL(pllMDLL_CKO, DLL_CKO_Value); - mdelay( DLL_SLEEP_DELAY); - - DLL_CKO_Value &= ~(MDLL_CKO__MCKOA_RESET ); - OUTPLL(pllMDLL_CKO, DLL_CKO_Value); - mdelay( DLL_RESET_DELAY); - - /* Power Up */ - DLL_CKA_Value &= ~(MDLL_RDCKA__MRDCKA0_SLEEP ); - OUTPLL(pllMDLL_RDCKA, DLL_CKA_Value); - mdelay( DLL_SLEEP_DELAY); - - DLL_CKA_Value &= ~(MDLL_RDCKA__MRDCKA0_RESET ); - OUTPLL(pllMDLL_RDCKA, DLL_CKA_Value); - mdelay( DLL_RESET_DELAY); - - /* Power Up */ - DLL_CKA_Value &= ~(MDLL_RDCKA__MRDCKA1_SLEEP); - OUTPLL(pllMDLL_RDCKA, DLL_CKA_Value); - mdelay( DLL_SLEEP_DELAY); - - DLL_CKA_Value &= ~(MDLL_RDCKA__MRDCKA1_RESET); - OUTPLL(pllMDLL_RDCKA, DLL_CKA_Value); - mdelay( DLL_RESET_DELAY); +#undef DLL_RESET_DELAY +#undef DLL_SLEEP_DELAY +} - /* Channel B */ +static void radeon_pm_enable_dll_m10(struct radeonfb_info *rinfo) +{ + u32 dll_value; + u32 dll_sleep_mask = 0; + u32 dll_reset_mask = 0; + u32 mc; - /* Power Up */ - DLL_CKO_Value &= ~(MDLL_CKO__MCKOB_SLEEP ); - OUTPLL(pllMDLL_CKO, DLL_CKO_Value); - mdelay( DLL_SLEEP_DELAY); - - DLL_CKO_Value &= ~(MDLL_CKO__MCKOB_RESET ); - OUTPLL(pllMDLL_CKO, DLL_CKO_Value); - mdelay( DLL_RESET_DELAY); +#define DLL_RESET_DELAY 5 +#define DLL_SLEEP_DELAY 1 - /* Power Up */ - DLL_CKB_Value &= ~(MDLL_RDCKB__MRDCKB0_SLEEP); - OUTPLL(pllMDLL_RDCKB, DLL_CKB_Value); - mdelay( DLL_SLEEP_DELAY); + OUTMC(rinfo, ixR300_MC_DLL_CNTL, rinfo->save_regs[70]); + mc = INREG(MC_CNTL); + /* Check which channels are enabled */ + switch (mc & 0x3) { + case 1: + if (mc & 0x4) + break; + case 2: + dll_sleep_mask |= MDLL_R300_RDCK__MRDCKB_SLEEP; + dll_reset_mask |= MDLL_R300_RDCK__MRDCKB_RESET; + case 0: + dll_sleep_mask |= MDLL_R300_RDCK__MRDCKA_SLEEP; + dll_reset_mask |= MDLL_R300_RDCK__MRDCKA_RESET; + } + switch (mc & 0x3) { + case 1: + if (!(mc & 0x4)) + break; + case 2: + dll_sleep_mask |= MDLL_R300_RDCK__MRDCKD_SLEEP; + dll_reset_mask |= MDLL_R300_RDCK__MRDCKD_RESET; + dll_sleep_mask |= MDLL_R300_RDCK__MRDCKC_SLEEP; + dll_reset_mask |= MDLL_R300_RDCK__MRDCKC_RESET; + } - DLL_CKB_Value &= ~(MDLL_RDCKB__MRDCKB0_RESET); - OUTPLL(pllMDLL_RDCKB, DLL_CKB_Value); - mdelay( DLL_RESET_DELAY); + dll_value = INPLL(pllMDLL_RDCKA); /* Power Up */ - DLL_CKB_Value &= ~(MDLL_RDCKB__MRDCKB1_SLEEP); - OUTPLL(pllMDLL_RDCKB, DLL_CKB_Value); + dll_value &= ~(dll_sleep_mask); + OUTPLL(pllMDLL_RDCKA, dll_value); mdelay( DLL_SLEEP_DELAY); - DLL_CKB_Value &= ~(MDLL_RDCKB__MRDCKB1_RESET); - OUTPLL(pllMDLL_RDCKB, DLL_CKB_Value); + dll_value &= ~(dll_reset_mask); + OUTPLL(pllMDLL_RDCKA, dll_value); mdelay( DLL_RESET_DELAY); #undef DLL_RESET_DELAY #undef DLL_SLEEP_DELAY } + static void radeon_pm_full_reset_sdram(struct radeonfb_info *rinfo) { - u32 crtcGenCntl, crtcGenCntl2, memRefreshCntl, crtc_more_cntl, fp_gen_cntl, fp2_gen_cntl; + u32 crtcGenCntl, crtcGenCntl2, memRefreshCntl, crtc_more_cntl, + fp_gen_cntl, fp2_gen_cntl; crtcGenCntl = INREG( CRTC_GEN_CNTL); crtcGenCntl2 = INREG( CRTC2_GEN_CNTL); - memRefreshCntl = INREG( MEM_REFRESH_CNTL); crtc_more_cntl = INREG( CRTC_MORE_CNTL); fp_gen_cntl = INREG( FP_GEN_CNTL); fp2_gen_cntl = INREG( FP2_GEN_CNTL); - OUTREG( CRTC_MORE_CNTL, 0); - OUTREG( FP_GEN_CNTL, 0); - OUTREG( FP2_GEN_CNTL, 0); + OUTREG( CRTC_MORE_CNTL, 0); + OUTREG( FP_GEN_CNTL, 0); + OUTREG( FP2_GEN_CNTL,0); OUTREG( CRTC_GEN_CNTL, (crtcGenCntl | CRTC_GEN_CNTL__CRTC_DISP_REQ_EN_B) ); OUTREG( CRTC2_GEN_CNTL, (crtcGenCntl2 | CRTC2_GEN_CNTL__CRTC2_DISP_REQ_EN_B) ); - /* Disable refresh */ - OUTREG( MEM_REFRESH_CNTL, memRefreshCntl | MEM_REFRESH_CNTL__MEM_REFRESH_DIS); + /* This is the code for the Aluminium PowerBooks M10 */ + if (rinfo->family == CHIP_FAMILY_RV350) { + u32 sdram_mode_reg = rinfo->save_regs[35]; + static u32 default_mrtable[] = + { 0x21320032, + 0x21321000, 0xa1321000, 0x21321000, 0xffffffff, + 0x21320032, 0xa1320032, 0x21320032, 0xffffffff, + 0x21321002, 0xa1321002, 0x21321002, 0xffffffff, + 0x21320132, 0xa1320132, 0x21320132, 0xffffffff, + 0x21320032, 0xa1320032, 0x21320032, 0xffffffff, + 0x31320032 }; + + u32 *mrtable = default_mrtable; + int i, mrtable_size = ARRAY_SIZE(default_mrtable); + + mdelay(30); + + /* Disable refresh */ + memRefreshCntl = INREG( MEM_REFRESH_CNTL) + & ~MEM_REFRESH_CNTL__MEM_REFRESH_DIS; + OUTREG( MEM_REFRESH_CNTL, memRefreshCntl + | MEM_REFRESH_CNTL__MEM_REFRESH_DIS); + + /* Configure and enable M & SPLLs */ + radeon_pm_enable_dll_m10(rinfo); + radeon_pm_yclk_mclk_sync_m10(rinfo); + +#ifdef CONFIG_PPC_OF + if (rinfo->of_node != NULL) { + int size; + + mrtable = (u32 *)get_property(rinfo->of_node, "ATY,MRT", &size); + if (mrtable) + mrtable_size = size >> 2; + else + mrtable = default_mrtable; + } +#endif /* CONFIG_PPC_OF */ + + /* Program the SDRAM */ + sdram_mode_reg = mrtable[0]; + OUTREG(MEM_SDRAM_MODE_REG, sdram_mode_reg); + for (i = 0; i < mrtable_size; i++) { + if (mrtable[i] == 0xffffffffu) + radeon_pm_m10_program_mode_wait(rinfo); + else { + sdram_mode_reg &= ~(MEM_SDRAM_MODE_REG__MEM_MODE_REG_MASK + | MEM_SDRAM_MODE_REG__MC_INIT_COMPLETE + | MEM_SDRAM_MODE_REG__MEM_SDRAM_RESET); + sdram_mode_reg |= mrtable[i]; + + OUTREG(MEM_SDRAM_MODE_REG, sdram_mode_reg); + mdelay(1); + } + } + + /* Restore memory refresh */ + OUTREG(MEM_REFRESH_CNTL, memRefreshCntl); + mdelay(30); + + } + /* Here come the desktop RV200 "QW" card */ + else if (!rinfo->is_mobility && rinfo->family == CHIP_FAMILY_RV200) { + /* Disable refresh */ + memRefreshCntl = INREG( MEM_REFRESH_CNTL) + & ~MEM_REFRESH_CNTL__MEM_REFRESH_DIS; + OUTREG(MEM_REFRESH_CNTL, memRefreshCntl + | MEM_REFRESH_CNTL__MEM_REFRESH_DIS); + mdelay(30); + + /* Reset memory */ + OUTREG(MEM_SDRAM_MODE_REG, + INREG( MEM_SDRAM_MODE_REG) & ~MEM_SDRAM_MODE_REG__MC_INIT_COMPLETE); + + radeon_pm_program_mode_reg(rinfo, 0x2002, 2); + radeon_pm_program_mode_reg(rinfo, 0x0132, 2); + radeon_pm_program_mode_reg(rinfo, 0x0032, 2); + + OUTREG(MEM_SDRAM_MODE_REG, + INREG(MEM_SDRAM_MODE_REG) | MEM_SDRAM_MODE_REG__MC_INIT_COMPLETE); + + OUTREG( MEM_REFRESH_CNTL, memRefreshCntl); + + } + /* The M6 */ + else if (rinfo->is_mobility && rinfo->family == CHIP_FAMILY_RV100) { + /* Disable refresh */ + memRefreshCntl = INREG(EXT_MEM_CNTL) & ~(1 << 20); + OUTREG( EXT_MEM_CNTL, memRefreshCntl | (1 << 20)); - /* Reset memory */ - OUTREG( MEM_SDRAM_MODE_REG, - INREG( MEM_SDRAM_MODE_REG) & ~MEM_SDRAM_MODE_REG__MC_INIT_COMPLETE); // Init Not Complete + /* Reset memory */ + OUTREG( MEM_SDRAM_MODE_REG, + INREG( MEM_SDRAM_MODE_REG) + & ~MEM_SDRAM_MODE_REG__MC_INIT_COMPLETE); - /* DLL */ - radeon_pm_enable_dll(rinfo); + /* DLL */ + radeon_pm_enable_dll(rinfo); - // MLCK /YCLK sync - radeon_pm_yclk_mclk_sync(rinfo); + /* MLCK / YCLK sync */ + radeon_pm_yclk_mclk_sync(rinfo); - /* M6, M7 and M9 so far ... */ - if (rinfo->is_mobility && rinfo->family <= CHIP_FAMILY_RV250) { + /* Program Mode Register */ radeon_pm_program_mode_reg(rinfo, 0x2000, 1); radeon_pm_program_mode_reg(rinfo, 0x2001, 1); radeon_pm_program_mode_reg(rinfo, 0x2002, 1); radeon_pm_program_mode_reg(rinfo, 0x0132, 1); radeon_pm_program_mode_reg(rinfo, 0x0032, 1); - } - OUTREG( MEM_SDRAM_MODE_REG, - INREG( MEM_SDRAM_MODE_REG) | MEM_SDRAM_MODE_REG__MC_INIT_COMPLETE); // Init Complete + /* Complete & re-enable refresh */ + OUTREG( MEM_SDRAM_MODE_REG, + INREG( MEM_SDRAM_MODE_REG) | MEM_SDRAM_MODE_REG__MC_INIT_COMPLETE); - OUTREG( MEM_REFRESH_CNTL, memRefreshCntl); + OUTREG(EXT_MEM_CNTL, memRefreshCntl); + } + /* And finally, the M7..M9 models, including M9+ (RV280) */ + else if (rinfo->is_mobility) { + + /* Disable refresh */ + memRefreshCntl = INREG( MEM_REFRESH_CNTL) + & ~MEM_REFRESH_CNTL__MEM_REFRESH_DIS; + OUTREG( MEM_REFRESH_CNTL, memRefreshCntl + | MEM_REFRESH_CNTL__MEM_REFRESH_DIS); + + /* Reset memory */ + OUTREG( MEM_SDRAM_MODE_REG, + INREG( MEM_SDRAM_MODE_REG) + & ~MEM_SDRAM_MODE_REG__MC_INIT_COMPLETE); + + /* DLL */ + radeon_pm_enable_dll(rinfo); + + /* MLCK / YCLK sync */ + radeon_pm_yclk_mclk_sync(rinfo); + + /* M6, M7 and M9 so far ... */ + if (rinfo->family <= CHIP_FAMILY_RV250) { + radeon_pm_program_mode_reg(rinfo, 0x2000, 1); + radeon_pm_program_mode_reg(rinfo, 0x2001, 1); + radeon_pm_program_mode_reg(rinfo, 0x2002, 1); + radeon_pm_program_mode_reg(rinfo, 0x0132, 1); + radeon_pm_program_mode_reg(rinfo, 0x0032, 1); + } + /* M9+ (iBook G4) */ + else if (rinfo->family == CHIP_FAMILY_RV280) { + radeon_pm_program_mode_reg(rinfo, 0x2000, 1); + radeon_pm_program_mode_reg(rinfo, 0x0132, 1); + radeon_pm_program_mode_reg(rinfo, 0x0032, 1); + } + + /* Complete & re-enable refresh */ + OUTREG( MEM_SDRAM_MODE_REG, + INREG( MEM_SDRAM_MODE_REG) | MEM_SDRAM_MODE_REG__MC_INIT_COMPLETE); + + OUTREG( MEM_REFRESH_CNTL, memRefreshCntl); + } OUTREG( CRTC_GEN_CNTL, crtcGenCntl); OUTREG( CRTC2_GEN_CNTL, crtcGenCntl2); @@ -777,10 +1321,1076 @@ mdelay( 15); } +#ifdef CONFIG_PPC_OF + +static void radeon_pm_reset_pad_ctlr_strength(struct radeonfb_info *rinfo) +{ + u32 tmp, tmp2; + int i,j; + + /* Reset the PAD_CTLR_STRENGTH & wait for it to be stable */ + INREG(PAD_CTLR_STRENGTH); + OUTREG(PAD_CTLR_STRENGTH, INREG(PAD_CTLR_STRENGTH) & ~PAD_MANUAL_OVERRIDE); + tmp = INREG(PAD_CTLR_STRENGTH); + for (i = j = 0; i < 65; ++i) { + mdelay(1); + tmp2 = INREG(PAD_CTLR_STRENGTH); + if (tmp != tmp2) { + tmp = tmp2; + i = 0; + j++; + if (j > 10) { + printk(KERN_WARNING "radeon: PAD_CTLR_STRENGTH doesn't " + "stabilize !\n"); + break; + } + } + } +} + +static void radeon_pm_all_ppls_off(struct radeonfb_info *rinfo) +{ + u32 tmp; + + tmp = INPLL(pllPPLL_CNTL); + OUTPLL(pllPPLL_CNTL, tmp | 0x3); + tmp = INPLL(pllP2PLL_CNTL); + OUTPLL(pllP2PLL_CNTL, tmp | 0x3); + tmp = INPLL(pllSPLL_CNTL); + OUTPLL(pllSPLL_CNTL, tmp | 0x3); + tmp = INPLL(pllMPLL_CNTL); + OUTPLL(pllMPLL_CNTL, tmp | 0x3); +} + +static void radeon_pm_start_mclk_sclk(struct radeonfb_info *rinfo) +{ + u32 tmp; + + /* Switch SPLL to PCI source */ + tmp = INPLL(pllSCLK_CNTL); + OUTPLL(pllSCLK_CNTL, tmp & ~SCLK_CNTL__SCLK_SRC_SEL_MASK); + + /* Reconfigure SPLL charge pump, VCO gain, duty cycle */ + tmp = INPLL(pllSPLL_CNTL); + OUTREG8(CLOCK_CNTL_INDEX, pllSPLL_CNTL + PLL_WR_EN); + OUTREG8(CLOCK_CNTL_DATA + 1, (tmp >> 8) & 0xff); + + /* Set SPLL feedback divider */ + tmp = INPLL(pllM_SPLL_REF_FB_DIV); + tmp = (tmp & 0xff00fffful) | (rinfo->save_regs[77] & 0x00ff0000ul); + OUTPLL(pllM_SPLL_REF_FB_DIV, tmp); + + /* Power up SPLL */ + tmp = INPLL(pllSPLL_CNTL); + OUTPLL(pllSPLL_CNTL, tmp & ~1); + (void)INPLL(pllSPLL_CNTL); + + mdelay(10); + + /* Release SPLL reset */ + tmp = INPLL(pllSPLL_CNTL); + OUTPLL(pllSPLL_CNTL, tmp & ~0x2); + (void)INPLL(pllSPLL_CNTL); + + mdelay(10); + + /* Select SCLK source */ + tmp = INPLL(pllSCLK_CNTL); + tmp &= ~SCLK_CNTL__SCLK_SRC_SEL_MASK; + tmp |= rinfo->save_regs[3] & SCLK_CNTL__SCLK_SRC_SEL_MASK; + OUTPLL(pllSCLK_CNTL, tmp); + (void)INPLL(pllSCLK_CNTL); + + mdelay(10); + + /* Reconfigure MPLL charge pump, VCO gain, duty cycle */ + tmp = INPLL(pllMPLL_CNTL); + OUTREG8(CLOCK_CNTL_INDEX, pllMPLL_CNTL + PLL_WR_EN); + OUTREG8(CLOCK_CNTL_DATA + 1, (tmp >> 8) & 0xff); + + /* Set MPLL feedback divider */ + tmp = INPLL(pllM_SPLL_REF_FB_DIV); + tmp = (tmp & 0xffff00fful) | (rinfo->save_regs[77] & 0x0000ff00ul); + + OUTPLL(pllM_SPLL_REF_FB_DIV, tmp); + /* Power up MPLL */ + tmp = INPLL(pllMPLL_CNTL); + OUTPLL(pllMPLL_CNTL, tmp & ~0x2); + (void)INPLL(pllMPLL_CNTL); + + mdelay(10); + + /* Un-reset MPLL */ + tmp = INPLL(pllMPLL_CNTL); + OUTPLL(pllMPLL_CNTL, tmp & ~0x1); + (void)INPLL(pllMPLL_CNTL); + + mdelay(10); + + /* Select source for MCLK */ + tmp = INPLL(pllMCLK_CNTL); + tmp |= rinfo->save_regs[2] & 0xffff; + OUTPLL(pllMCLK_CNTL, tmp); + (void)INPLL(pllMCLK_CNTL); + + mdelay(10); +} + +static void radeon_pm_m10_disable_spread_spectrum(struct radeonfb_info *rinfo) +{ + u32 r2ec; + + /* GACK ! I though we didn't have a DDA on Radeon's anymore + * here we rewrite with the same value, ... I suppose we clear + * some bits that are already clear ? Or maybe this 0x2ec + * register is something new ? + */ + mdelay(20); + r2ec = INREG(VGA_DDA_ON_OFF); + OUTREG(VGA_DDA_ON_OFF, r2ec); + mdelay(1); + + /* Spread spectrum PLLL off */ + OUTPLL(pllSSPLL_CNTL, 0xbf03); + + /* Spread spectrum disabled */ + OUTPLL(pllSS_INT_CNTL, rinfo->save_regs[90] & ~3); + + /* The trace shows read & rewrite of LVDS_PLL_CNTL here with same + * value, not sure what for... + */ + + r2ec |= 0x3f0; + OUTREG(VGA_DDA_ON_OFF, r2ec); + mdelay(1); +} + +static void radeon_pm_m10_enable_lvds_spread_spectrum(struct radeonfb_info *rinfo) +{ + u32 r2ec, tmp; + + /* GACK (bis) ! I though we didn't have a DDA on Radeon's anymore + * here we rewrite with the same value, ... I suppose we clear/set + * some bits that are already clear/set ? + */ + r2ec = INREG(VGA_DDA_ON_OFF); + OUTREG(VGA_DDA_ON_OFF, r2ec); + mdelay(1); + + /* Enable spread spectrum */ + OUTPLL(pllSSPLL_CNTL, rinfo->save_regs[43] | 3); + mdelay(3); + + OUTPLL(pllSSPLL_REF_DIV, rinfo->save_regs[44]); + OUTPLL(pllSSPLL_DIV_0, rinfo->save_regs[45]); + tmp = INPLL(pllSSPLL_CNTL); + OUTPLL(pllSSPLL_CNTL, tmp & ~0x2); + mdelay(6); + tmp = INPLL(pllSSPLL_CNTL); + OUTPLL(pllSSPLL_CNTL, tmp & ~0x1); + mdelay(5); + + OUTPLL(pllSS_INT_CNTL, rinfo->save_regs[90]); + + r2ec |= 8; + OUTREG(VGA_DDA_ON_OFF, r2ec); + mdelay(20); + + /* Enable LVDS interface */ + tmp = INREG(LVDS_GEN_CNTL); + OUTREG(LVDS_GEN_CNTL, tmp | LVDS_EN); + + /* Enable LVDS_PLL */ + tmp = INREG(LVDS_PLL_CNTL); + tmp &= ~0x30000; + tmp |= 0x10000; + OUTREG(LVDS_PLL_CNTL, tmp); + + OUTPLL(pllSCLK_MORE_CNTL, rinfo->save_regs[34]); + OUTPLL(pllSS_TST_CNTL, rinfo->save_regs[91]); + + /* The trace reads that one here, waiting for something to settle down ? */ + INREG(RBBM_STATUS); + + /* Ugh ? SS_TST_DEC is supposed to be a read register in the + * R300 register spec at least... + */ + tmp = INPLL(pllSS_TST_CNTL); + tmp |= 0x00400000; + OUTPLL(pllSS_TST_CNTL, tmp); +} + +static void radeon_pm_restore_pixel_pll(struct radeonfb_info *rinfo) +{ + u32 tmp; + + OUTREG8(CLOCK_CNTL_INDEX, pllHTOTAL_CNTL + PLL_WR_EN); + OUTREG8(CLOCK_CNTL_DATA, 0); + + tmp = INPLL(pllVCLK_ECP_CNTL); + OUTPLL(pllVCLK_ECP_CNTL, tmp | 0x80); + mdelay(5); + + tmp = INPLL(pllPPLL_REF_DIV); + tmp = (tmp & ~PPLL_REF_DIV_MASK) | rinfo->pll.ref_div; + OUTPLL(pllPPLL_REF_DIV, tmp); + INPLL(pllPPLL_REF_DIV); + + /* Reconfigure SPLL charge pump, VCO gain, duty cycle, + * probably useless since we already did it ... + */ + tmp = INPLL(pllPPLL_CNTL); + OUTREG8(CLOCK_CNTL_INDEX, pllSPLL_CNTL + PLL_WR_EN); + OUTREG8(CLOCK_CNTL_DATA + 1, (tmp >> 8) & 0xff); + + /* Not sure what was intended here ... */ + tmp = INREG(CLOCK_CNTL_INDEX); + OUTREG(CLOCK_CNTL_INDEX, tmp); + + /* Restore our "reference" PPLL divider set by firmware + * according to proper spread spectrum calculations + */ + OUTPLL(pllPPLL_DIV_0, rinfo->save_regs[92]); + + tmp = INPLL(pllPPLL_CNTL); + OUTPLL(pllPPLL_CNTL, tmp & ~0x2); + mdelay(5); + + tmp = INPLL(pllPPLL_CNTL); + OUTPLL(pllPPLL_CNTL, tmp & ~0x1); + mdelay(5); + + tmp = INPLL(pllVCLK_ECP_CNTL); + OUTPLL(pllVCLK_ECP_CNTL, tmp | 3); + mdelay(5); + + tmp = INPLL(pllVCLK_ECP_CNTL); + OUTPLL(pllVCLK_ECP_CNTL, tmp | 3); + mdelay(5); + + /* Switch pixel clock to firmware default div 0 */ + OUTREG8(CLOCK_CNTL_INDEX+1, 0); +} + +static void radeon_pm_m10_reconfigure_mc(struct radeonfb_info *rinfo) +{ + OUTREG(MC_CNTL, rinfo->save_regs[46]); + OUTREG(MC_INIT_GFX_LAT_TIMER, rinfo->save_regs[47]); + OUTREG(MC_INIT_MISC_LAT_TIMER, rinfo->save_regs[48]); + OUTREG(MEM_SDRAM_MODE_REG, + rinfo->save_regs[35] & ~MEM_SDRAM_MODE_REG__MC_INIT_COMPLETE); + OUTREG(MC_TIMING_CNTL, rinfo->save_regs[49]); + OUTREG(MEM_REFRESH_CNTL, rinfo->save_regs[42]); + OUTREG(MC_READ_CNTL_AB, rinfo->save_regs[50]); + OUTREG(MC_CHIP_IO_OE_CNTL_AB, rinfo->save_regs[52]); + OUTREG(MC_IOPAD_CNTL, rinfo->save_regs[51]); + OUTREG(MC_DEBUG, rinfo->save_regs[53]); + + OUTMC(rinfo, ixR300_MC_MC_INIT_WR_LAT_TIMER, rinfo->save_regs[58]); + OUTMC(rinfo, ixR300_MC_IMP_CNTL, rinfo->save_regs[59]); + OUTMC(rinfo, ixR300_MC_CHP_IO_CNTL_C0, rinfo->save_regs[60]); + OUTMC(rinfo, ixR300_MC_CHP_IO_CNTL_C1, rinfo->save_regs[61]); + OUTMC(rinfo, ixR300_MC_CHP_IO_CNTL_D0, rinfo->save_regs[62]); + OUTMC(rinfo, ixR300_MC_CHP_IO_CNTL_D1, rinfo->save_regs[63]); + OUTMC(rinfo, ixR300_MC_BIST_CNTL_3, rinfo->save_regs[64]); + OUTMC(rinfo, ixR300_MC_CHP_IO_CNTL_A0, rinfo->save_regs[65]); + OUTMC(rinfo, ixR300_MC_CHP_IO_CNTL_A1, rinfo->save_regs[66]); + OUTMC(rinfo, ixR300_MC_CHP_IO_CNTL_B0, rinfo->save_regs[67]); + OUTMC(rinfo, ixR300_MC_CHP_IO_CNTL_B1, rinfo->save_regs[68]); + OUTMC(rinfo, ixR300_MC_DEBUG_CNTL, rinfo->save_regs[69]); + OUTMC(rinfo, ixR300_MC_DLL_CNTL, rinfo->save_regs[70]); + OUTMC(rinfo, ixR300_MC_IMP_CNTL_0, rinfo->save_regs[71]); + OUTMC(rinfo, ixR300_MC_ELPIDA_CNTL, rinfo->save_regs[72]); + OUTMC(rinfo, ixR300_MC_READ_CNTL_CD, rinfo->save_regs[96]); + OUTREG(MC_IND_INDEX, 0); +} + +static void radeon_reinitialize_M10(struct radeonfb_info *rinfo) +{ + u32 tmp, i; + + /* Restore a bunch of registers first */ + OUTREG(MC_AGP_LOCATION, rinfo->save_regs[32]); + OUTREG(DISPLAY_BASE_ADDR, rinfo->save_regs[31]); + OUTREG(CRTC2_DISPLAY_BASE_ADDR, rinfo->save_regs[33]); + OUTREG(MC_FB_LOCATION, rinfo->save_regs[30]); + OUTREG(OV0_BASE_ADDR, rinfo->save_regs[80]); + OUTREG(CONFIG_MEMSIZE, rinfo->video_ram); + OUTREG(BUS_CNTL, rinfo->save_regs[36]); + OUTREG(BUS_CNTL1, rinfo->save_regs[14]); + OUTREG(MPP_TB_CONFIG, rinfo->save_regs[37]); + OUTREG(FCP_CNTL, rinfo->save_regs[38]); + OUTREG(RBBM_CNTL, rinfo->save_regs[39]); + OUTREG(DAC_CNTL, rinfo->save_regs[40]); + OUTREG(DAC_MACRO_CNTL, (INREG(DAC_MACRO_CNTL) & ~0x6) | 8); + OUTREG(DAC_MACRO_CNTL, (INREG(DAC_MACRO_CNTL) & ~0x6) | 8); + + /* Hrm... */ + OUTREG(DAC_CNTL2, INREG(DAC_CNTL2) | DAC2_EXPAND_MODE); + + /* Reset the PAD CTLR */ + radeon_pm_reset_pad_ctlr_strength(rinfo); + + /* Some PLLs are Read & written identically in the trace here... + * I suppose it's actually to switch them all off & reset, + * let's assume off is what we want. I'm just doing that for all major PLLs now. + */ + radeon_pm_all_ppls_off(rinfo); + + /* Clear tiling, reset swappers */ + INREG(SURFACE_CNTL); + OUTREG(SURFACE_CNTL, 0); + + /* Some black magic with TV_DAC_CNTL, we should restore those from backups + * rather than hard coding... + */ + tmp = INREG(TV_DAC_CNTL) & ~TV_DAC_CNTL_BGADJ_MASK; + tmp |= 8 << TV_DAC_CNTL_BGADJ__SHIFT; + OUTREG(TV_DAC_CNTL, tmp); + + tmp = INREG(TV_DAC_CNTL) & ~TV_DAC_CNTL_DACADJ_MASK; + tmp |= 7 << TV_DAC_CNTL_DACADJ__SHIFT; + OUTREG(TV_DAC_CNTL, tmp); + + /* More registers restored */ + OUTREG(AGP_CNTL, rinfo->save_regs[16]); + OUTREG(HOST_PATH_CNTL, rinfo->save_regs[41]); + OUTREG(DISP_MISC_CNTL, rinfo->save_regs[9]); + + /* Hrmmm ... What is that ? */ + tmp = rinfo->save_regs[1] + & ~(CLK_PWRMGT_CNTL__ACTIVE_HILO_LAT_MASK | + CLK_PWRMGT_CNTL__MC_BUSY); + OUTPLL(pllCLK_PWRMGT_CNTL, tmp); + + OUTREG(PAD_CTLR_MISC, rinfo->save_regs[56]); + OUTREG(FW_CNTL, rinfo->save_regs[57]); + OUTREG(HDP_DEBUG, rinfo->save_regs[96]); + OUTREG(PAMAC0_DLY_CNTL, rinfo->save_regs[54]); + OUTREG(PAMAC1_DLY_CNTL, rinfo->save_regs[55]); + OUTREG(PAMAC2_DLY_CNTL, rinfo->save_regs[79]); + + /* Restore Memory Controller configuration */ + radeon_pm_m10_reconfigure_mc(rinfo); + + /* Make sure CRTC's dont touch memory */ + OUTREG(CRTC_GEN_CNTL, INREG(CRTC_GEN_CNTL) + | CRTC_GEN_CNTL__CRTC_DISP_REQ_EN_B); + OUTREG(CRTC2_GEN_CNTL, INREG(CRTC2_GEN_CNTL) + | CRTC2_GEN_CNTL__CRTC2_DISP_REQ_EN_B); + mdelay(30); + + /* Disable SDRAM refresh */ + OUTREG(MEM_REFRESH_CNTL, INREG(MEM_REFRESH_CNTL) + | MEM_REFRESH_CNTL__MEM_REFRESH_DIS); + + /* Restore XTALIN routing (CLK_PIN_CNTL) */ + OUTPLL(pllCLK_PIN_CNTL, rinfo->save_regs[4]); + + /* Switch MCLK, YCLK and SCLK PLLs to PCI source & force them ON */ + tmp = rinfo->save_regs[2] & 0xff000000; + tmp |= MCLK_CNTL__FORCE_MCLKA | + MCLK_CNTL__FORCE_MCLKB | + MCLK_CNTL__FORCE_YCLKA | + MCLK_CNTL__FORCE_YCLKB | + MCLK_CNTL__FORCE_MC; + OUTPLL(pllMCLK_CNTL, tmp); + + /* Force all clocks on in SCLK */ + tmp = INPLL(pllSCLK_CNTL); + tmp |= SCLK_CNTL__FORCE_DISP2| + SCLK_CNTL__FORCE_CP| + SCLK_CNTL__FORCE_HDP| + SCLK_CNTL__FORCE_DISP1| + SCLK_CNTL__FORCE_TOP| + SCLK_CNTL__FORCE_E2| + SCLK_CNTL__FORCE_SE| + SCLK_CNTL__FORCE_IDCT| + SCLK_CNTL__FORCE_VIP| + SCLK_CNTL__FORCE_PB| + SCLK_CNTL__FORCE_TAM| + SCLK_CNTL__FORCE_TDM| + SCLK_CNTL__FORCE_RB| + SCLK_CNTL__FORCE_TV_SCLK| + SCLK_CNTL__FORCE_SUBPIC| + SCLK_CNTL__FORCE_OV0; + tmp |= SCLK_CNTL__CP_MAX_DYN_STOP_LAT | + SCLK_CNTL__HDP_MAX_DYN_STOP_LAT | + SCLK_CNTL__TV_MAX_DYN_STOP_LAT | + SCLK_CNTL__E2_MAX_DYN_STOP_LAT | + SCLK_CNTL__SE_MAX_DYN_STOP_LAT | + SCLK_CNTL__IDCT_MAX_DYN_STOP_LAT| + SCLK_CNTL__VIP_MAX_DYN_STOP_LAT | + SCLK_CNTL__RE_MAX_DYN_STOP_LAT | + SCLK_CNTL__PB_MAX_DYN_STOP_LAT | + SCLK_CNTL__TAM_MAX_DYN_STOP_LAT | + SCLK_CNTL__TDM_MAX_DYN_STOP_LAT | + SCLK_CNTL__RB_MAX_DYN_STOP_LAT; + OUTPLL(pllSCLK_CNTL, tmp); + + OUTPLL(pllVCLK_ECP_CNTL, 0); + OUTPLL(pllPIXCLKS_CNTL, 0); + OUTPLL(pllMCLK_MISC, + MCLK_MISC__MC_MCLK_MAX_DYN_STOP_LAT | + MCLK_MISC__IO_MCLK_MAX_DYN_STOP_LAT); + + mdelay(5); + + /* Restore the M_SPLL_REF_FB_DIV, MPLL_AUX_CNTL and SPLL_AUX_CNTL values */ + OUTPLL(pllM_SPLL_REF_FB_DIV, rinfo->save_regs[77]); + OUTPLL(pllMPLL_AUX_CNTL, rinfo->save_regs[75]); + OUTPLL(pllSPLL_AUX_CNTL, rinfo->save_regs[76]); + + /* Now restore the major PLLs settings, keeping them off & reset though */ + OUTPLL(pllPPLL_CNTL, rinfo->save_regs[93] | 0x3); + OUTPLL(pllP2PLL_CNTL, rinfo->save_regs[8] | 0x3); + OUTPLL(pllMPLL_CNTL, rinfo->save_regs[73] | 0x03); + OUTPLL(pllSPLL_CNTL, rinfo->save_regs[74] | 0x03); + + /* Restore MC DLL state and switch it off/reset too */ + OUTMC(rinfo, ixR300_MC_DLL_CNTL, rinfo->save_regs[70]); + + /* Switch MDLL off & reset */ + OUTPLL(pllMDLL_RDCKA, rinfo->save_regs[98] | 0xff); + mdelay(5); + + /* Setup some black magic bits in PLL_PWRMGT_CNTL. Hrm... we saved + * 0xa1100007... and MacOS writes 0xa1000007 .. + */ + OUTPLL(pllPLL_PWRMGT_CNTL, rinfo->save_regs[0]); + + /* Restore more stuffs */ + OUTPLL(pllHTOTAL_CNTL, 0); + OUTPLL(pllHTOTAL2_CNTL, 0); + + /* More PLL initial configuration */ + tmp = INPLL(pllSCLK_CNTL2); /* What for ? */ + OUTPLL(pllSCLK_CNTL2, tmp); + + tmp = INPLL(pllSCLK_MORE_CNTL); + tmp |= SCLK_MORE_CNTL__FORCE_DISPREGS | /* a guess */ + SCLK_MORE_CNTL__FORCE_MC_GUI | + SCLK_MORE_CNTL__FORCE_MC_HOST; + OUTPLL(pllSCLK_MORE_CNTL, tmp); + + /* Now we actually start MCLK and SCLK */ + radeon_pm_start_mclk_sclk(rinfo); + + /* Full reset sdrams, this also re-inits the MDLL */ + radeon_pm_full_reset_sdram(rinfo); + + /* Fill palettes */ + OUTREG(DAC_CNTL2, INREG(DAC_CNTL2) | 0x20); + for (i=0; i<256; i++) + OUTREG(PALETTE_30_DATA, 0x15555555); + OUTREG(DAC_CNTL2, INREG(DAC_CNTL2) & ~20); + udelay(20); + for (i=0; i<256; i++) + OUTREG(PALETTE_30_DATA, 0x15555555); + + OUTREG(DAC_CNTL2, INREG(DAC_CNTL2) & ~0x20); + mdelay(3); + + /* Restore TMDS */ + OUTREG(FP_GEN_CNTL, rinfo->save_regs[82]); + OUTREG(FP2_GEN_CNTL, rinfo->save_regs[83]); + + /* Set LVDS registers but keep interface & pll down */ + OUTREG(LVDS_GEN_CNTL, rinfo->save_regs[11] & + ~(LVDS_EN | LVDS_ON | LVDS_DIGON | LVDS_BLON | LVDS_BL_MOD_EN)); + OUTREG(LVDS_PLL_CNTL, (rinfo->save_regs[12] & ~0xf0000) | 0x20000); + + OUTREG(DISP_OUTPUT_CNTL, rinfo->save_regs[86]); + + /* Restore GPIOPAD state */ + OUTREG(GPIOPAD_A, rinfo->save_regs[19]); + OUTREG(GPIOPAD_EN, rinfo->save_regs[20]); + OUTREG(GPIOPAD_MASK, rinfo->save_regs[21]); + + /* write some stuff to the framebuffer... */ + for (i = 0; i < 0x8000; ++i) + writeb(0, rinfo->fb_base + i); + + mdelay(40); + OUTREG(LVDS_GEN_CNTL, INREG(LVDS_GEN_CNTL) | LVDS_DIGON | LVDS_ON); + mdelay(40); + + /* Restore a few more things */ + OUTREG(GRPH_BUFFER_CNTL, rinfo->save_regs[94]); + OUTREG(GRPH2_BUFFER_CNTL, rinfo->save_regs[95]); + + /* Take care of spread spectrum & PPLLs now */ + radeon_pm_m10_disable_spread_spectrum(rinfo); + radeon_pm_restore_pixel_pll(rinfo); + + /* GRRRR... I can't figure out the proper LVDS power sequence, and the + * code I have for blank/unblank doesn't quite work on some laptop models + * it seems ... Hrm. What I have here works most of the time ... + */ + radeon_pm_m10_enable_lvds_spread_spectrum(rinfo); +} + +static void radeon_pm_m9p_reconfigure_mc(struct radeonfb_info *rinfo) +{ + OUTREG(MC_CNTL, rinfo->save_regs[46]); + OUTREG(MC_INIT_GFX_LAT_TIMER, rinfo->save_regs[47]); + OUTREG(MC_INIT_MISC_LAT_TIMER, rinfo->save_regs[48]); + OUTREG(MEM_SDRAM_MODE_REG, + rinfo->save_regs[35] & ~MEM_SDRAM_MODE_REG__MC_INIT_COMPLETE); + OUTREG(MC_TIMING_CNTL, rinfo->save_regs[49]); + OUTREG(MC_READ_CNTL_AB, rinfo->save_regs[50]); + OUTREG(MEM_REFRESH_CNTL, rinfo->save_regs[42]); + OUTREG(MC_IOPAD_CNTL, rinfo->save_regs[51]); + OUTREG(MC_DEBUG, rinfo->save_regs[53]); + OUTREG(MC_CHIP_IO_OE_CNTL_AB, rinfo->save_regs[52]); + + OUTMC(rinfo, ixMC_IMP_CNTL, rinfo->save_regs[59] /*0x00f460d6*/); + OUTMC(rinfo, ixMC_CHP_IO_CNTL_A0, rinfo->save_regs[65] /*0xfecfa666*/); + OUTMC(rinfo, ixMC_CHP_IO_CNTL_A1, rinfo->save_regs[66] /*0x141555ff*/); + OUTMC(rinfo, ixMC_CHP_IO_CNTL_B0, rinfo->save_regs[67] /*0xfecfa666*/); + OUTMC(rinfo, ixMC_CHP_IO_CNTL_B1, rinfo->save_regs[68] /*0x141555ff*/); + OUTMC(rinfo, ixMC_IMP_CNTL_0, rinfo->save_regs[71] /*0x00009249*/); + OUTREG(MC_IND_INDEX, 0); + OUTREG(CONFIG_MEMSIZE, rinfo->video_ram); + + mdelay(20); +} + +static void radeon_reinitialize_M9P(struct radeonfb_info *rinfo) +{ + u32 tmp, i; + + /* Restore a bunch of registers first */ + OUTREG(SURFACE_CNTL, rinfo->save_regs[29]); + OUTREG(MC_AGP_LOCATION, rinfo->save_regs[32]); + OUTREG(DISPLAY_BASE_ADDR, rinfo->save_regs[31]); + OUTREG(CRTC2_DISPLAY_BASE_ADDR, rinfo->save_regs[33]); + OUTREG(MC_FB_LOCATION, rinfo->save_regs[30]); + OUTREG(OV0_BASE_ADDR, rinfo->save_regs[80]); + OUTREG(BUS_CNTL, rinfo->save_regs[36]); + OUTREG(BUS_CNTL1, rinfo->save_regs[14]); + OUTREG(MPP_TB_CONFIG, rinfo->save_regs[37]); + OUTREG(FCP_CNTL, rinfo->save_regs[38]); + OUTREG(RBBM_CNTL, rinfo->save_regs[39]); + + OUTREG(DAC_CNTL, rinfo->save_regs[40]); + OUTREG(DAC_CNTL2, INREG(DAC_CNTL2) | DAC2_EXPAND_MODE); + + /* Reset the PAD CTLR */ + radeon_pm_reset_pad_ctlr_strength(rinfo); + + /* Some PLLs are Read & written identically in the trace here... + * I suppose it's actually to switch them all off & reset, + * let's assume off is what we want. I'm just doing that for all major PLLs now. + */ + radeon_pm_all_ppls_off(rinfo); + + /* Clear tiling, reset swappers */ + INREG(SURFACE_CNTL); + OUTREG(SURFACE_CNTL, 0); + + /* Some black magic with TV_DAC_CNTL, we should restore those from backups + * rather than hard coding... + */ + tmp = INREG(TV_DAC_CNTL) & ~TV_DAC_CNTL_BGADJ_MASK; + tmp |= 6 << TV_DAC_CNTL_BGADJ__SHIFT; + OUTREG(TV_DAC_CNTL, tmp); + + tmp = INREG(TV_DAC_CNTL) & ~TV_DAC_CNTL_DACADJ_MASK; + tmp |= 6 << TV_DAC_CNTL_DACADJ__SHIFT; + OUTREG(TV_DAC_CNTL, tmp); + + OUTPLL(pllAGP_PLL_CNTL, rinfo->save_regs[78]); + + OUTREG(PAMAC0_DLY_CNTL, rinfo->save_regs[54]); + OUTREG(PAMAC1_DLY_CNTL, rinfo->save_regs[55]); + OUTREG(PAMAC2_DLY_CNTL, rinfo->save_regs[79]); + + OUTREG(AGP_CNTL, rinfo->save_regs[16]); + OUTREG(HOST_PATH_CNTL, rinfo->save_regs[41]); /* MacOS sets that to 0 !!! */ + OUTREG(DISP_MISC_CNTL, rinfo->save_regs[9]); + + tmp = rinfo->save_regs[1] + & ~(CLK_PWRMGT_CNTL__ACTIVE_HILO_LAT_MASK | + CLK_PWRMGT_CNTL__MC_BUSY); + OUTPLL(pllCLK_PWRMGT_CNTL, tmp); + + OUTREG(FW_CNTL, rinfo->save_regs[57]); + + /* Disable SDRAM refresh */ + OUTREG(MEM_REFRESH_CNTL, INREG(MEM_REFRESH_CNTL) + | MEM_REFRESH_CNTL__MEM_REFRESH_DIS); + + /* Restore XTALIN routing (CLK_PIN_CNTL) */ + OUTPLL(pllCLK_PIN_CNTL, rinfo->save_regs[4]); + + /* Force MCLK to be PCI sourced and forced ON */ + tmp = rinfo->save_regs[2] & 0xff000000; + tmp |= MCLK_CNTL__FORCE_MCLKA | + MCLK_CNTL__FORCE_MCLKB | + MCLK_CNTL__FORCE_YCLKA | + MCLK_CNTL__FORCE_YCLKB | + MCLK_CNTL__FORCE_MC | + MCLK_CNTL__FORCE_AIC; + OUTPLL(pllMCLK_CNTL, tmp); + + /* Force SCLK to be PCI sourced with a bunch forced */ + tmp = 0 | + SCLK_CNTL__FORCE_DISP2| + SCLK_CNTL__FORCE_CP| + SCLK_CNTL__FORCE_HDP| + SCLK_CNTL__FORCE_DISP1| + SCLK_CNTL__FORCE_TOP| + SCLK_CNTL__FORCE_E2| + SCLK_CNTL__FORCE_SE| + SCLK_CNTL__FORCE_IDCT| + SCLK_CNTL__FORCE_VIP| + SCLK_CNTL__FORCE_RE| + SCLK_CNTL__FORCE_PB| + SCLK_CNTL__FORCE_TAM| + SCLK_CNTL__FORCE_TDM| + SCLK_CNTL__FORCE_RB; + OUTPLL(pllSCLK_CNTL, tmp); + + /* Clear VCLK_ECP_CNTL & PIXCLKS_CNTL */ + OUTPLL(pllVCLK_ECP_CNTL, 0); + OUTPLL(pllPIXCLKS_CNTL, 0); + + /* Setup MCLK_MISC, non dynamic mode */ + OUTPLL(pllMCLK_MISC, + MCLK_MISC__MC_MCLK_MAX_DYN_STOP_LAT | + MCLK_MISC__IO_MCLK_MAX_DYN_STOP_LAT); + + mdelay(5); + + /* Set back the default clock dividers */ + OUTPLL(pllM_SPLL_REF_FB_DIV, rinfo->save_regs[77]); + OUTPLL(pllMPLL_AUX_CNTL, rinfo->save_regs[75]); + OUTPLL(pllSPLL_AUX_CNTL, rinfo->save_regs[76]); + + /* PPLL and P2PLL default values & off */ + OUTPLL(pllPPLL_CNTL, rinfo->save_regs[93] | 0x3); + OUTPLL(pllP2PLL_CNTL, rinfo->save_regs[8] | 0x3); + + /* S and M PLLs are reset & off, configure them */ + OUTPLL(pllMPLL_CNTL, rinfo->save_regs[73] | 0x03); + OUTPLL(pllSPLL_CNTL, rinfo->save_regs[74] | 0x03); + + /* Default values for MDLL ... fixme */ + OUTPLL(pllMDLL_CKO, 0x9c009c); + OUTPLL(pllMDLL_RDCKA, 0x08830883); + OUTPLL(pllMDLL_RDCKB, 0x08830883); + mdelay(5); + + /* Restore PLL_PWRMGT_CNTL */ // XXXX + tmp = rinfo->save_regs[0]; + tmp &= ~PLL_PWRMGT_CNTL_SU_SCLK_USE_BCLK; + tmp |= PLL_PWRMGT_CNTL_SU_MCLK_USE_BCLK; + OUTPLL(PLL_PWRMGT_CNTL, tmp); + + /* Clear HTOTAL_CNTL & HTOTAL2_CNTL */ + OUTPLL(pllHTOTAL_CNTL, 0); + OUTPLL(pllHTOTAL2_CNTL, 0); + + /* All outputs off */ + OUTREG(CRTC_GEN_CNTL, 0x04000000); + OUTREG(CRTC2_GEN_CNTL, 0x04000000); + OUTREG(FP_GEN_CNTL, 0x00004008); + OUTREG(FP2_GEN_CNTL, 0x00000008); + OUTREG(LVDS_GEN_CNTL, 0x08000008); + + /* Restore Memory Controller configuration */ + radeon_pm_m9p_reconfigure_mc(rinfo); + + /* Now we actually start MCLK and SCLK */ + radeon_pm_start_mclk_sclk(rinfo); + + /* Full reset sdrams, this also re-inits the MDLL */ + radeon_pm_full_reset_sdram(rinfo); + + /* Fill palettes */ + OUTREG(DAC_CNTL2, INREG(DAC_CNTL2) | 0x20); + for (i=0; i<256; i++) + OUTREG(PALETTE_30_DATA, 0x15555555); + OUTREG(DAC_CNTL2, INREG(DAC_CNTL2) & ~20); + udelay(20); + for (i=0; i<256; i++) + OUTREG(PALETTE_30_DATA, 0x15555555); + + OUTREG(DAC_CNTL2, INREG(DAC_CNTL2) & ~0x20); + mdelay(3); + + /* Restore TV stuff, make sure TV DAC is down */ + OUTREG(TV_MASTER_CNTL, rinfo->save_regs[88]); + OUTREG(TV_DAC_CNTL, rinfo->save_regs[13] | 0x07000000); + + /* Restore GPIOS. MacOS does some magic here with one of the GPIO bits, + * possibly related to the weird PLL related workarounds and to the + * fact that CLK_PIN_CNTL is tweaked in ways I don't fully understand, + * but we keep things the simple way here + */ + OUTREG(GPIOPAD_A, rinfo->save_regs[19]); + OUTREG(GPIOPAD_EN, rinfo->save_regs[20]); + OUTREG(GPIOPAD_MASK, rinfo->save_regs[21]); + + /* Now do things with SCLK_MORE_CNTL. Force bits are already set, copy + * high bits from backup + */ + tmp = INPLL(pllSCLK_MORE_CNTL) & 0x0000ffff; + tmp |= rinfo->save_regs[34] & 0xffff0000; + tmp |= SCLK_MORE_CNTL__FORCE_DISPREGS; + OUTPLL(pllSCLK_MORE_CNTL, tmp); + + tmp = INPLL(pllSCLK_MORE_CNTL) & 0x0000ffff; + tmp |= rinfo->save_regs[34] & 0xffff0000; + tmp |= SCLK_MORE_CNTL__FORCE_DISPREGS; + OUTPLL(pllSCLK_MORE_CNTL, tmp); + + OUTREG(LVDS_GEN_CNTL, rinfo->save_regs[11] & + ~(LVDS_EN | LVDS_ON | LVDS_DIGON | LVDS_BLON | LVDS_BL_MOD_EN)); + OUTREG(LVDS_GEN_CNTL, INREG(LVDS_GEN_CNTL) | LVDS_BLON); + OUTREG(LVDS_PLL_CNTL, (rinfo->save_regs[12] & ~0xf0000) | 0x20000); + mdelay(20); + + /* write some stuff to the framebuffer... */ + for (i = 0; i < 0x8000; ++i) + writeb(0, rinfo->fb_base + i); + + OUTREG(0x2ec, 0x6332a020); + OUTPLL(pllSSPLL_REF_DIV, rinfo->save_regs[44] /*0x3f */); + OUTPLL(pllSSPLL_DIV_0, rinfo->save_regs[45] /*0x000081bb */); + tmp = INPLL(pllSSPLL_CNTL); + tmp &= ~2; + OUTPLL(pllSSPLL_CNTL, tmp); + mdelay(6); + tmp &= ~1; + OUTPLL(pllSSPLL_CNTL, tmp); + mdelay(5); + tmp |= 3; + OUTPLL(pllSSPLL_CNTL, tmp); + mdelay(5); + + OUTPLL(pllSS_INT_CNTL, rinfo->save_regs[90] & ~3);/*0x0020300c*/ + OUTREG(0x2ec, 0x6332a3f0); + mdelay(17); + + OUTPLL(pllPPLL_REF_DIV, rinfo->pll.ref_div);; + OUTPLL(pllPPLL_DIV_0, rinfo->save_regs[92]); + + mdelay(40); + OUTREG(LVDS_GEN_CNTL, INREG(LVDS_GEN_CNTL) | LVDS_DIGON | LVDS_ON); + mdelay(40); + + /* Restore a few more things */ + OUTREG(GRPH_BUFFER_CNTL, rinfo->save_regs[94]); + OUTREG(GRPH2_BUFFER_CNTL, rinfo->save_regs[95]); + + /* Restore PPLL, spread spectrum & LVDS */ + radeon_pm_m10_disable_spread_spectrum(rinfo); + radeon_pm_restore_pixel_pll(rinfo); + radeon_pm_m10_enable_lvds_spread_spectrum(rinfo); +} + +#if 0 /* Not ready yet */ +static void radeon_reinitialize_QW(struct radeonfb_info *rinfo) +{ + int i; + u32 tmp, tmp2; + u32 cko, cka, ckb; + u32 cgc, cec, c2gc; + + OUTREG(MC_AGP_LOCATION, rinfo->save_regs[32]); + OUTREG(DISPLAY_BASE_ADDR, rinfo->save_regs[31]); + OUTREG(CRTC2_DISPLAY_BASE_ADDR, rinfo->save_regs[33]); + OUTREG(MC_FB_LOCATION, rinfo->save_regs[30]); + OUTREG(BUS_CNTL, rinfo->save_regs[36]); + OUTREG(RBBM_CNTL, rinfo->save_regs[39]); + + INREG(PAD_CTLR_STRENGTH); + OUTREG(PAD_CTLR_STRENGTH, INREG(PAD_CTLR_STRENGTH) & ~0x10000); + for (i = 0; i < 65; ++i) { + mdelay(1); + INREG(PAD_CTLR_STRENGTH); + } + + OUTREG(DISP_TEST_DEBUG_CNTL, INREG(DISP_TEST_DEBUG_CNTL) | 0x10000000); + OUTREG(OV0_FLAG_CNTRL, INREG(OV0_FLAG_CNTRL) | 0x100); + OUTREG(CRTC_GEN_CNTL, INREG(CRTC_GEN_CNTL)); + OUTREG(DAC_CNTL, 0xff00410a); + OUTREG(CRTC2_GEN_CNTL, INREG(CRTC2_GEN_CNTL)); + OUTREG(DAC_CNTL2, INREG(DAC_CNTL2) | 0x4000); + + OUTREG(SURFACE_CNTL, rinfo->save_regs[29]); + OUTREG(AGP_CNTL, rinfo->save_regs[16]); + OUTREG(HOST_PATH_CNTL, rinfo->save_regs[41]); + OUTREG(DISP_MISC_CNTL, rinfo->save_regs[9]); + + OUTMC(rinfo, ixMC_CHP_IO_CNTL_A0, 0xf7bb4433); + OUTREG(MC_IND_INDEX, 0); + OUTMC(rinfo, ixMC_CHP_IO_CNTL_B0, 0xf7bb4433); + OUTREG(MC_IND_INDEX, 0); + + OUTREG(CRTC_MORE_CNTL, INREG(CRTC_MORE_CNTL)); + + tmp = INPLL(pllVCLK_ECP_CNTL); + OUTPLL(pllVCLK_ECP_CNTL, tmp); + tmp = INPLL(pllPIXCLKS_CNTL); + OUTPLL(pllPIXCLKS_CNTL, tmp); + + OUTPLL(MCLK_CNTL, 0xaa3f0000); + OUTPLL(SCLK_CNTL, 0xffff0000); + OUTPLL(pllMPLL_AUX_CNTL, 6); + OUTPLL(pllSPLL_AUX_CNTL, 1); + OUTPLL(MDLL_CKO, 0x9f009f); + OUTPLL(MDLL_RDCKA, 0x830083); + OUTPLL(pllMDLL_RDCKB, 0x830083); + OUTPLL(PPLL_CNTL, 0xa433); + OUTPLL(P2PLL_CNTL, 0xa433); + OUTPLL(MPLL_CNTL, 0x0400a403); + OUTPLL(SPLL_CNTL, 0x0400a433); + + tmp = INPLL(M_SPLL_REF_FB_DIV); + OUTPLL(M_SPLL_REF_FB_DIV, tmp); + tmp = INPLL(M_SPLL_REF_FB_DIV); + OUTPLL(M_SPLL_REF_FB_DIV, tmp | 0xc); + INPLL(M_SPLL_REF_FB_DIV); + + tmp = INPLL(MPLL_CNTL); + OUTREG8(CLOCK_CNTL_INDEX, MPLL_CNTL + PLL_WR_EN); + OUTREG8(CLOCK_CNTL_DATA + 1, (tmp >> 8) & 0xff); + + tmp = INPLL(M_SPLL_REF_FB_DIV); + OUTPLL(M_SPLL_REF_FB_DIV, tmp | 0x5900); + + tmp = INPLL(MPLL_CNTL); + OUTPLL(MPLL_CNTL, tmp & ~0x2); + mdelay(1); + tmp = INPLL(MPLL_CNTL); + OUTPLL(MPLL_CNTL, tmp & ~0x1); + mdelay(10); + + OUTPLL(MCLK_CNTL, 0xaa3f1212); + mdelay(1); + + INPLL(M_SPLL_REF_FB_DIV); + INPLL(MCLK_CNTL); + INPLL(M_SPLL_REF_FB_DIV); + + tmp = INPLL(SPLL_CNTL); + OUTREG8(CLOCK_CNTL_INDEX, SPLL_CNTL + PLL_WR_EN); + OUTREG8(CLOCK_CNTL_DATA + 1, (tmp >> 8) & 0xff); + + tmp = INPLL(M_SPLL_REF_FB_DIV); + OUTPLL(M_SPLL_REF_FB_DIV, tmp | 0x780000); + + tmp = INPLL(SPLL_CNTL); + OUTPLL(SPLL_CNTL, tmp & ~0x1); + mdelay(1); + tmp = INPLL(SPLL_CNTL); + OUTPLL(SPLL_CNTL, tmp & ~0x2); + mdelay(10); + + tmp = INPLL(SCLK_CNTL); + OUTPLL(SCLK_CNTL, tmp | 2); + mdelay(1); + + cko = INPLL(pllMDLL_CKO); + cka = INPLL(pllMDLL_RDCKA); + ckb = INPLL(pllMDLL_RDCKB); + + cko &= ~(MDLL_CKO__MCKOA_SLEEP | MDLL_CKO__MCKOB_SLEEP); + OUTPLL(pllMDLL_CKO, cko); + mdelay(1); + cko &= ~(MDLL_CKO__MCKOA_RESET | MDLL_CKO__MCKOB_RESET); + OUTPLL(pllMDLL_CKO, cko); + mdelay(5); + + cka &= ~(MDLL_RDCKA__MRDCKA0_SLEEP | MDLL_RDCKA__MRDCKA1_SLEEP); + OUTPLL(pllMDLL_RDCKA, cka); + mdelay(1); + cka &= ~(MDLL_RDCKA__MRDCKA0_RESET | MDLL_RDCKA__MRDCKA1_RESET); + OUTPLL(pllMDLL_RDCKA, cka); + mdelay(5); + + ckb &= ~(MDLL_RDCKB__MRDCKB0_SLEEP | MDLL_RDCKB__MRDCKB1_SLEEP); + OUTPLL(pllMDLL_RDCKB, ckb); + mdelay(1); + ckb &= ~(MDLL_RDCKB__MRDCKB0_RESET | MDLL_RDCKB__MRDCKB1_RESET); + OUTPLL(pllMDLL_RDCKB, ckb); + mdelay(5); + + OUTMC(rinfo, ixMC_CHP_IO_CNTL_A1, 0x151550ff); + OUTREG(MC_IND_INDEX, 0); + OUTMC(rinfo, ixMC_CHP_IO_CNTL_B1, 0x151550ff); + OUTREG(MC_IND_INDEX, 0); + mdelay(1); + OUTMC(rinfo, ixMC_CHP_IO_CNTL_A1, 0x141550ff); + OUTREG(MC_IND_INDEX, 0); + OUTMC(rinfo, ixMC_CHP_IO_CNTL_B1, 0x141550ff); + OUTREG(MC_IND_INDEX, 0); + mdelay(1); + + OUTPLL(pllHTOTAL_CNTL, 0); + OUTPLL(pllHTOTAL2_CNTL, 0); + + OUTREG(MEM_CNTL, 0x29002901); + OUTREG(MEM_SDRAM_MODE_REG, 0x45320032); /* XXX use save_regs[35]? */ + OUTREG(EXT_MEM_CNTL, 0x1a394333); + OUTREG(MEM_IO_CNTL_A1, 0x0aac0aac); + OUTREG(MEM_INIT_LATENCY_TIMER, 0x34444444); + OUTREG(MEM_REFRESH_CNTL, 0x1f1f7218); /* XXX or save_regs[42]? */ + OUTREG(MC_DEBUG, 0); + OUTREG(MEM_IO_OE_CNTL, 0x04300430); + + OUTMC(rinfo, ixMC_IMP_CNTL, 0x00f460d6); + OUTREG(MC_IND_INDEX, 0); + OUTMC(rinfo, ixMC_IMP_CNTL_0, 0x00009249); + OUTREG(MC_IND_INDEX, 0); + + OUTREG(CONFIG_MEMSIZE, rinfo->video_ram); + + radeon_pm_full_reset_sdram(rinfo); + + INREG(FP_GEN_CNTL); + OUTREG(TMDS_CNTL, 0x01000000); /* XXX ? */ + tmp = INREG(FP_GEN_CNTL); + tmp |= FP_CRTC_DONT_SHADOW_HEND | FP_CRTC_DONT_SHADOW_VPAR | 0x200; + OUTREG(FP_GEN_CNTL, tmp); + + tmp = INREG(DISP_OUTPUT_CNTL); + tmp &= ~0x400; + OUTREG(DISP_OUTPUT_CNTL, tmp); + + OUTPLL(CLK_PIN_CNTL, rinfo->save_regs[4]); + OUTPLL(CLK_PWRMGT_CNTL, rinfo->save_regs[1]); + OUTPLL(PLL_PWRMGT_CNTL, rinfo->save_regs[0]); + + tmp = INPLL(MCLK_MISC); + tmp |= MCLK_MISC__MC_MCLK_DYN_ENABLE | MCLK_MISC__IO_MCLK_DYN_ENABLE; + OUTPLL(MCLK_MISC, tmp); + + tmp = INPLL(SCLK_CNTL); + OUTPLL(SCLK_CNTL, tmp); + + OUTREG(CRTC_MORE_CNTL, 0); + OUTREG8(CRTC_GEN_CNTL+1, 6); + OUTREG8(CRTC_GEN_CNTL+3, 1); + OUTREG(CRTC_PITCH, 32); + + tmp = INPLL(VCLK_ECP_CNTL); + OUTPLL(VCLK_ECP_CNTL, tmp); + + tmp = INPLL(PPLL_CNTL); + OUTPLL(PPLL_CNTL, tmp); + + /* palette stuff and BIOS_1_SCRATCH... */ + + tmp = INREG(FP_GEN_CNTL); + tmp2 = INREG(TMDS_TRANSMITTER_CNTL); + tmp |= 2; + OUTREG(FP_GEN_CNTL, tmp); + mdelay(5); + OUTREG(FP_GEN_CNTL, tmp); + mdelay(5); + OUTREG(TMDS_TRANSMITTER_CNTL, tmp2); + OUTREG(CRTC_MORE_CNTL, 0); + mdelay(20); + + tmp = INREG(CRTC_MORE_CNTL); + OUTREG(CRTC_MORE_CNTL, tmp); + + cgc = INREG(CRTC_GEN_CNTL); + cec = INREG(CRTC_EXT_CNTL); + c2gc = INREG(CRTC2_GEN_CNTL); + + OUTREG(CRTC_H_SYNC_STRT_WID, 0x008e0580); + OUTREG(CRTC_H_TOTAL_DISP, 0x009f00d2); + OUTREG8(CLOCK_CNTL_INDEX, HTOTAL_CNTL + PLL_WR_EN); + OUTREG8(CLOCK_CNTL_DATA, 0); + OUTREG(CRTC_V_SYNC_STRT_WID, 0x00830403); + OUTREG(CRTC_V_TOTAL_DISP, 0x03ff0429); + OUTREG(FP_CRTC_H_TOTAL_DISP, 0x009f0033); + OUTREG(FP_H_SYNC_STRT_WID, 0x008e0080); + OUTREG(CRT_CRTC_H_SYNC_STRT_WID, 0x008e0080); + OUTREG(FP_CRTC_V_TOTAL_DISP, 0x03ff002a); + OUTREG(FP_V_SYNC_STRT_WID, 0x00830004); + OUTREG(CRT_CRTC_V_SYNC_STRT_WID, 0x00830004); + OUTREG(FP_HORZ_VERT_ACTIVE, 0x009f03ff); + OUTREG(FP_HORZ_STRETCH, 0); + OUTREG(FP_VERT_STRETCH, 0); + OUTREG(OVR_CLR, 0); + OUTREG(OVR_WID_LEFT_RIGHT, 0); + OUTREG(OVR_WID_TOP_BOTTOM, 0); + + tmp = INPLL(PPLL_REF_DIV); + tmp = (tmp & ~PPLL_REF_DIV_MASK) | rinfo->pll.ref_div; + OUTPLL(PPLL_REF_DIV, tmp); + INPLL(PPLL_REF_DIV); + + OUTREG8(CLOCK_CNTL_INDEX, PPLL_CNTL + PLL_WR_EN); + OUTREG8(CLOCK_CNTL_DATA + 1, 0xbc); + + tmp = INREG(CLOCK_CNTL_INDEX); + OUTREG(CLOCK_CNTL_INDEX, tmp & 0xff); + + OUTPLL(PPLL_DIV_0, 0x48090); + + tmp = INPLL(PPLL_CNTL); + OUTPLL(PPLL_CNTL, tmp & ~0x2); + mdelay(1); + tmp = INPLL(PPLL_CNTL); + OUTPLL(PPLL_CNTL, tmp & ~0x1); + mdelay(10); + + tmp = INPLL(VCLK_ECP_CNTL); + OUTPLL(VCLK_ECP_CNTL, tmp | 3); + mdelay(1); + + tmp = INPLL(VCLK_ECP_CNTL); + OUTPLL(VCLK_ECP_CNTL, tmp); + + c2gc |= CRTC2_DISP_REQ_EN_B; + OUTREG(CRTC2_GEN_CNTL, c2gc); + cgc |= CRTC_EN; + OUTREG(CRTC_GEN_CNTL, cgc); + OUTREG(CRTC_EXT_CNTL, cec); + OUTREG(CRTC_PITCH, 0xa0); + OUTREG(CRTC_OFFSET, 0); + OUTREG(CRTC_OFFSET_CNTL, 0); + + OUTREG(GRPH_BUFFER_CNTL, 0x20117c7c); + OUTREG(GRPH2_BUFFER_CNTL, 0x00205c5c); + + tmp2 = INREG(FP_GEN_CNTL); + tmp = INREG(TMDS_TRANSMITTER_CNTL); + OUTREG(0x2a8, 0x0000061b); + tmp |= TMDS_PLL_EN; + OUTREG(TMDS_TRANSMITTER_CNTL, tmp); + mdelay(1); + tmp &= ~TMDS_PLLRST; + OUTREG(TMDS_TRANSMITTER_CNTL, tmp); + tmp2 &= ~2; + tmp2 |= FP_TMDS_EN; + OUTREG(FP_GEN_CNTL, tmp2); + mdelay(5); + tmp2 |= FP_FPON; + OUTREG(FP_GEN_CNTL, tmp2); + + OUTREG(CUR_HORZ_VERT_OFF, CUR_LOCK | 1); + cgc = INREG(CRTC_GEN_CNTL); + OUTREG(CUR_HORZ_VERT_POSN, 0xbfff0fff); + cgc |= 0x10000; + OUTREG(CUR_OFFSET, 0); +} +#endif /* 0 */ + +#endif /* CONFIG_PPC_OF */ + static void radeon_set_suspend(struct radeonfb_info *rinfo, int suspend) { u16 pwr_cmd; u32 tmp; + int i; if (!rinfo->pm_reg) return; @@ -796,13 +2406,13 @@ * duration of the suspend/resume process */ radeon_pm_disable_dynamic_mode(rinfo); + /* Save some registers */ - radeon_pm_save_regs(rinfo); + radeon_pm_save_regs(rinfo, 0); - /* Prepare mobility chips for suspend. Only do that on <= RV250 chips that - * have been tested + /* Prepare mobility chips for suspend. */ - if (rinfo->is_mobility && rinfo->family <= CHIP_FAMILY_RV250) { + if (rinfo->is_mobility) { /* Program V2CLK */ radeon_pm_program_v2clk(rinfo); @@ -815,13 +2425,22 @@ /* Prepare chip for power management */ radeon_pm_setup_for_suspend(rinfo); - /* Reset the MDLL */ - /* because both INPLL and OUTPLL take the same lock, that's why. */ - tmp = INPLL( pllMDLL_CKO) | MDLL_CKO__MCKOA_RESET | MDLL_CKO__MCKOB_RESET; - OUTPLL( pllMDLL_CKO, tmp ); + if (rinfo->family <= CHIP_FAMILY_RV280) { + /* Reset the MDLL */ + /* because both INPLL and OUTPLL take the same + * lock, that's why. */ + tmp = INPLL( pllMDLL_CKO) | MDLL_CKO__MCKOA_RESET + | MDLL_CKO__MCKOB_RESET; + OUTPLL( pllMDLL_CKO, tmp ); + } } + for (i = 0; i < 64; ++i) + pci_read_config_dword(rinfo->pdev, i * 4, + &rinfo->cfg_save[i]); + /* Switch PCI power managment to D2. */ + pci_disable_device(rinfo->pdev); for (;;) { pci_read_config_word( rinfo->pdev, rinfo->pm_reg+PCI_PM_CTRL, @@ -841,37 +2460,74 @@ pci_write_config_word(rinfo->pdev, rinfo->pm_reg+PCI_PM_CTRL, 0); mdelay(500); - /* Reset the SDRAM controller */ - radeon_pm_full_reset_sdram(rinfo); - - /* Restore some registers */ - radeon_pm_restore_regs(rinfo); - radeon_pm_enable_dynamic_mode(rinfo); + if (rinfo->family <= CHIP_FAMILY_RV250) { + /* Reset the SDRAM controller */ + radeon_pm_full_reset_sdram(rinfo); + + /* Restore some registers */ + radeon_pm_restore_regs(rinfo); + } else { + /* Restore registers first */ + radeon_pm_restore_regs(rinfo); + /* init sdram controller */ + radeon_pm_full_reset_sdram(rinfo); + } } } +static int radeon_restore_pci_cfg(struct radeonfb_info *rinfo) +{ + int i; + static u32 radeon_cfg_after_resume[64]; + + for (i = 0; i < 64; ++i) + pci_read_config_dword(rinfo->pdev, i * 4, + &radeon_cfg_after_resume[i]); + + if (radeon_cfg_after_resume[PCI_BASE_ADDRESS_0/4] + == rinfo->cfg_save[PCI_BASE_ADDRESS_0/4]) + return 0; /* assume everything is ok */ + + for (i = PCI_BASE_ADDRESS_0/4; i < 64; ++i) { + if (radeon_cfg_after_resume[i] != rinfo->cfg_save[i]) + pci_write_config_dword(rinfo->pdev, i * 4, + rinfo->cfg_save[i]); + } + pci_write_config_word(rinfo->pdev, PCI_CACHE_LINE_SIZE, + rinfo->cfg_save[PCI_CACHE_LINE_SIZE/4]); + pci_write_config_word(rinfo->pdev, PCI_COMMAND, + rinfo->cfg_save[PCI_COMMAND/4]); + return 1; +} + + +static/*extern*/ int susdisking = 0; + int radeonfb_pci_suspend(struct pci_dev *pdev, u32 state) { struct fb_info *info = pci_get_drvdata(pdev); struct radeonfb_info *rinfo = info->par; + int i; - /* We don't do anything but D2, for now we return 0, but - * we may want to change that. How do we know if the BIOS - * can properly take care of D3 ? Also, with swsusp, we - * know we'll be rebooted, ... - */ + if (state == pdev->dev.power.power_state) + return 0; - printk(KERN_DEBUG "radeonfb: suspending to state: %d...\n", state); - - acquire_console_sem(); + printk(KERN_DEBUG "radeonfb (%s): suspending to state: %d...\n", + pci_name(pdev), state); - /* Userland should do this but doesn't... bridge gets suspended - * too late. Unfortunately, that works only when AGP is built-in, - * not for a module. + /* For suspend-to-disk, we cheat here. We don't suspend anything and + * let fbcon continue drawing until we are all set. That shouldn't + * really cause any problem at this point, provided that the wakeup + * code knows that any state in memory may not match the HW */ -#ifdef CONFIG_AGP - agp_enable(0); -#endif + if (state != PM_SUSPEND_MEM) + goto done; + if (susdisking) { + printk("suspending to disk but state = %d\n", state); + goto done; + } + + acquire_console_sem(); fb_set_suspend(info, 1); @@ -883,21 +2539,52 @@ } /* Blank display and LCD */ - radeonfb_blank(VESA_POWERDOWN, info); + radeon_screen_blank(rinfo, FB_BLANK_POWERDOWN, 1); /* Sleep */ rinfo->asleep = 1; rinfo->lock_blank = 1; + del_timer_sync(&rinfo->lvds_timer); - /* Suspend the chip to D2 state when supported + /* If we support wakeup from poweroff, we save all regs we can including cfg + * space + */ + if (rinfo->pm_mode & radeon_pm_off) { + /* Always disable dynamic clocks or weird things are happening when + * the chip goes off (basically the panel doesn't shut down properly + * and we crash on wakeup), + * also, we want the saved regs context to have no dynamic clocks in + * it, we'll restore the dynamic clocks state on wakeup + */ + radeon_pm_disable_dynamic_mode(rinfo); + mdelay(50); + radeon_pm_save_regs(rinfo, 1); + + if (rinfo->is_mobility && !(rinfo->pm_mode & radeon_pm_d2)) { + /* Switch off LVDS interface */ + mdelay(1); + OUTREG(LVDS_GEN_CNTL, INREG(LVDS_GEN_CNTL) & ~(LVDS_BL_MOD_EN)); + mdelay(1); + OUTREG(LVDS_GEN_CNTL, INREG(LVDS_GEN_CNTL) & ~(LVDS_EN | LVDS_ON)); + OUTREG(LVDS_PLL_CNTL, (INREG(LVDS_PLL_CNTL) & ~30000) | 0x20000); + mdelay(20); + OUTREG(LVDS_GEN_CNTL, INREG(LVDS_GEN_CNTL) & ~(LVDS_DIGON)); + + // FIXME: Use PCI layer + for (i = 0; i < 64; ++i) + pci_read_config_dword(rinfo->pdev, i * 4, + &rinfo->cfg_save[i]); + } + } + /* If we support D2, we go to it (should be fixed later with a flag forcing + * D3 only for some laptops) */ -#ifdef CONFIG_RADEON_HAS_D2 - if (radeon_suspend_to_d2(rinfo, state)) + if (rinfo->pm_mode & radeon_pm_d2) radeon_set_suspend(rinfo, 1); -#endif /* CONFIG_RADEON_HAS_D2 */ release_console_sem(); + done: pdev->dev.power.power_state = state; return 0; @@ -907,22 +2594,59 @@ { struct fb_info *info = pci_get_drvdata(pdev); struct radeonfb_info *rinfo = info->par; + int rc = 0; if (pdev->dev.power.power_state == 0) return 0; - acquire_console_sem(); + if (rinfo->no_schedule) { + if (try_acquire_console_sem()) + return 0; + } else + acquire_console_sem(); + + printk(KERN_DEBUG "radeonfb (%s): resuming from state: %d...\n", + pci_name(pdev), pdev->dev.power.power_state); + + + if (pci_enable_device(pdev)) { + rc = -ENODEV; + printk(KERN_ERR "radeonfb (%s): can't enable PCI device !\n", + pci_name(pdev)); + goto bail; + } + pci_set_master(pdev); - /* Wakeup chip */ -#ifdef CONFIG_RADEON_HAS_D2 - if (radeon_suspend_to_d2(rinfo, 0)) - radeon_set_suspend(rinfo, 0); -#endif /* CONFIG_RADEON_HAS_D2 */ + if (pdev->dev.power.power_state == PM_SUSPEND_MEM) { + /* Wakeup chip. Check from config space if we were powered off + * (todo: additionally, check CLK_PIN_CNTL too) + */ + if ((rinfo->pm_mode & radeon_pm_off) && radeon_restore_pci_cfg(rinfo)) { + if (rinfo->reinit_func != NULL) + rinfo->reinit_func(rinfo); + else { + printk(KERN_ERR "radeonfb (%s): can't resume radeon from" + " D3 cold, need softboot !", pci_name(pdev)); + rc = -EIO; + goto bail; + } + } + /* If we support D2, try to resume... we should check what was our + * state though... (were we really in D2 state ?). Right now, this code + * is only enable on Macs so it's fine. + */ + else if (rinfo->pm_mode & radeon_pm_d2) + radeon_set_suspend(rinfo, 0); - rinfo->asleep = 0; + rinfo->asleep = 0; + } else + radeon_engine_idle(); /* Restore display & engine */ - radeonfb_set_par(info); + radeon_write_mode (rinfo, &rinfo->state, 1); + if (!(info->flags & FBINFO_HWACCEL_DISABLED)) + radeonfb_engine_init (rinfo); + fb_pan_display(info, &info->var); fb_set_cmap(&info->cmap, info); @@ -931,15 +2655,107 @@ /* Unblank */ rinfo->lock_blank = 0; - radeonfb_blank(0, info); + radeon_screen_blank(rinfo, FB_BLANK_UNBLANK, 1); - release_console_sem(); + /* Check status of dynclk */ + if (rinfo->dynclk == 1) + radeon_pm_enable_dynamic_mode(rinfo); + else if (rinfo->dynclk == 0) + radeon_pm_disable_dynamic_mode(rinfo); pdev->dev.power.power_state = 0; - printk(KERN_DEBUG "radeonfb: resumed !\n"); + bail: + release_console_sem(); - return 0; + return rc; +} + +#ifdef CONFIG_PPC_OF +static void radeonfb_early_resume(void *data) +{ + struct radeonfb_info *rinfo = data; + + rinfo->no_schedule = 1; + radeonfb_pci_resume(rinfo->pdev); + rinfo->no_schedule = 0; } +#endif /* CONFIG_PPC_OF */ #endif /* CONFIG_PM */ + +void radeonfb_pm_init(struct radeonfb_info *rinfo, int dynclk) +{ + /* Find PM registers in config space if any*/ + rinfo->pm_reg = pci_find_capability(rinfo->pdev, PCI_CAP_ID_PM); + + /* Enable/Disable dynamic clocks: TODO add sysfs access */ + rinfo->dynclk = dynclk; + if (dynclk == 1) { + radeon_pm_enable_dynamic_mode(rinfo); + printk("radeonfb: Dynamic Clock Power Management enabled\n"); + } else if (dynclk == 0) { + radeon_pm_disable_dynamic_mode(rinfo); + printk("radeonfb: Dynamic Clock Power Management disabled\n"); + } + + /* Check if we can power manage on suspend/resume. We can do + * D2 on M6, M7 and M9, and we can resume from D3 cold a few other + * "Mac" cards, but that's all. We need more infos about what the + * BIOS does tho. Right now, all this PM stuff is pmac-only for that + * reason. --BenH + */ +#if defined(CONFIG_PM) && defined(CONFIG_PPC_OF) + if (_machine == _MACH_Pmac && rinfo->of_node) { + if (rinfo->is_mobility && rinfo->pm_reg && + rinfo->family <= CHIP_FAMILY_RV250) + rinfo->pm_mode |= radeon_pm_d2; + + /* We can restart Jasper (M10 chip in albooks), BlueStone (7500 chip + * in some desktop G4s), and Via (M9+ chip on iBook G4) + */ + if (!strcmp(rinfo->of_node->name, "ATY,JasperParent")) { + rinfo->reinit_func = radeon_reinitialize_M10; + rinfo->pm_mode |= radeon_pm_off; + } +#if 0 /* Not ready yet */ + if (!strcmp(rinfo->of_node->name, "ATY,BlueStoneParent")) { + rinfo->reinit_func = radeon_reinitialize_QW; + rinfo->pm_mode |= radeon_pm_off; + } +#endif + if (!strcmp(rinfo->of_node->name, "ATY,ViaParent")) { + rinfo->reinit_func = radeon_reinitialize_M9P; + rinfo->pm_mode |= radeon_pm_off; + /* Workaround not used for now */ + rinfo->m9p_workaround = 1; + } + + /* If any of the above is set, we assume the machine can sleep/resume. + * It's a bit of a "shortcut" but will work fine. Ideally, we need infos + * from the platform about what happens to the chip... + * Now we tell the platform about our capability + */ + if (rinfo->pm_mode != radeon_pm_none) { + pmac_call_feature(PMAC_FTR_DEVICE_CAN_WAKE, rinfo->of_node, 0, 1); + pmac_set_early_video_resume(radeonfb_early_resume, rinfo); + } + +#if 0 + /* Power down TV DAC, taht saves a significant amount of power, + * we'll have something better once we actually have some TVOut + * support + */ + OUTREG(TV_DAC_CNTL, INREG(TV_DAC_CNTL) | 0x07000000); +#endif + } +#endif /* defined(CONFIG_PM) && defined(CONFIG_PPC_OF) */ +} + +void radeonfb_pm_exit(struct radeonfb_info *rinfo) +{ +#if defined(CONFIG_PM) && defined(CONFIG_PPC_OF) + if (rinfo->pm_mode != radeon_pm_none) + pmac_set_early_video_resume(NULL, NULL); +#endif +} diff -urN linux-2.6.11-rc3/drivers/video/aty/radeonfb.h linux-2.6.11-rc4/drivers/video/aty/radeonfb.h --- linux-2.6.11-rc3/drivers/video/aty/radeonfb.h 2004-12-24 13:35:50.000000000 -0800 +++ linux-2.6.11-rc4/drivers/video/aty/radeonfb.h 2005-02-12 19:51:07.095112685 -0800 @@ -16,8 +16,17 @@ #include +#ifdef CONFIG_PPC_OF +#include +#endif + #include