diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/alpha/kernel/entry.S linux.21rc1-ac1/arch/alpha/kernel/entry.S --- linux.21rc1/arch/alpha/kernel/entry.S 2003-04-22 16:39:33.000000000 +0100 +++ linux.21rc1-ac1/arch/alpha/kernel/entry.S 2003-04-22 16:44:36.000000000 +0100 @@ -690,6 +690,7 @@ .end entSys .globl ret_from_fork +#if CONFIG_SMP .align 3 .ent ret_from_fork ret_from_fork: @@ -697,6 +698,9 @@ mov $17,$16 jsr $31,schedule_tail .end ret_from_fork +#else +ret_from_fork = ret_from_sys_call +#endif .align 3 .ent reschedule diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/alpha/kernel/process.c linux.21rc1-ac1/arch/alpha/kernel/process.c --- linux.21rc1/arch/alpha/kernel/process.c 2003-04-22 16:39:33.000000000 +0100 +++ linux.21rc1-ac1/arch/alpha/kernel/process.c 2003-04-22 16:44:36.000000000 +0100 @@ -30,6 +30,7 @@ #include #include #include +#include #include #include @@ -74,9 +75,6 @@ cpu_idle(void) { /* An endless idle loop with no priority at all. */ - current->nice = 20; - current->counter = -100; - while (1) { /* FIXME -- EV6 and LCA45 know how to power down the CPU. */ diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/alpha/kernel/smp.c linux.21rc1-ac1/arch/alpha/kernel/smp.c --- linux.21rc1/arch/alpha/kernel/smp.c 2003-04-22 16:39:33.000000000 +0100 +++ linux.21rc1-ac1/arch/alpha/kernel/smp.c 2003-04-22 16:44:36.000000000 +0100 @@ -81,6 +81,7 @@ int smp_num_probed; /* Internal processor count */ int smp_num_cpus = 1; /* Number that came online. */ int smp_threads_ready; /* True once the per process idle is forked. */ +unsigned long cache_decay_ticks; int __cpu_number_map[NR_CPUS]; int __cpu_logical_map[NR_CPUS]; @@ -155,11 +156,6 @@ { int cpuid = hard_smp_processor_id(); - if (current != init_tasks[cpu_number_map(cpuid)]) { - printk("BUG: smp_calling: cpu %d current %p init_tasks[cpu_number_map(cpuid)] %p\n", - cpuid, current, init_tasks[cpu_number_map(cpuid)]); - } - DBGS(("CALLIN %d state 0x%lx\n", cpuid, current->state)); /* Turn on machine checks. */ @@ -217,9 +213,6 @@ DBGS(("smp_callin: commencing CPU %d current %p\n", cpuid, current)); - /* Setup the scheduler for this processor. */ - init_idle(); - /* ??? This should be in init_idle. */ atomic_inc(&init_mm.mm_count); current->active_mm = &init_mm; @@ -449,14 +442,11 @@ if (idle == &init_task) panic("idle process is init_task for CPU %d", cpuid); - idle->processor = cpuid; - idle->cpus_runnable = 1 << cpuid; /* we schedule the first task manually */ + init_idle(idle, cpuid); + unhash_process(idle); + __cpu_logical_map[cpunum] = cpuid; __cpu_number_map[cpuid] = cpunum; - - del_from_runqueue(idle); - unhash_process(idle); - init_tasks[cpunum] = idle; DBGS(("smp_boot_one_cpu: CPU %d state 0x%lx flags 0x%lx\n", cpuid, idle->state, idle->flags)); @@ -563,13 +553,10 @@ __cpu_number_map[boot_cpuid] = 0; __cpu_logical_map[0] = boot_cpuid; - current->processor = boot_cpuid; smp_store_cpu_info(boot_cpuid); smp_setup_percpu_timer(boot_cpuid); - init_idle(); - /* ??? This should be in init_idle. */ atomic_inc(&init_mm.mm_count); current->active_mm = &init_mm; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/alpha/kernel/srmcons.c linux.21rc1-ac1/arch/alpha/kernel/srmcons.c --- linux.21rc1/arch/alpha/kernel/srmcons.c 2003-04-22 16:39:33.000000000 +0100 +++ linux.21rc1-ac1/arch/alpha/kernel/srmcons.c 2003-04-22 16:44:36.000000000 +0100 @@ -260,7 +260,7 @@ spin_lock_irqsave(&srmconsp->lock, flags); - if (tty->count == 1) { + if (atomic_read(&tty->count) == 1) { srmconsp->tty = NULL; del_timer(&srmconsp->timer); } diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/alpha/mm/fault.c linux.21rc1-ac1/arch/alpha/mm/fault.c --- linux.21rc1/arch/alpha/mm/fault.c 2003-04-22 16:38:54.000000000 +0100 +++ linux.21rc1-ac1/arch/alpha/mm/fault.c 2003-04-22 16:44:36.000000000 +0100 @@ -122,8 +122,6 @@ goto bad_area; if (vma->vm_start <= address) goto good_area; - if (!(vma->vm_flags & VM_GROWSDOWN)) - goto bad_area; if (expand_stack(vma, address)) goto bad_area; /* diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/arm/config.in linux.21rc1-ac1/arch/arm/config.in --- linux.21rc1/arch/arm/config.in 2003-04-22 16:39:33.000000000 +0100 +++ linux.21rc1-ac1/arch/arm/config.in 2003-04-22 16:44:36.000000000 +0100 @@ -646,6 +646,7 @@ bool 'Kernel debugging' CONFIG_DEBUG_KERNEL dep_bool ' Debug memory allocations' CONFIG_DEBUG_SLAB $CONFIG_DEBUG_KERNEL dep_bool ' Magic SysRq key' CONFIG_MAGIC_SYSRQ $CONFIG_DEBUG_KERNEL +dep_bool ' Morse code panics' CONFIG_PANIC_MORSE $CONFIG_DEBUG_KERNEL $CONFIG_PC_KEYB dep_bool ' Spinlock debugging' CONFIG_DEBUG_SPINLOCK $CONFIG_DEBUG_KERNEL dep_bool ' Wait queue debugging' CONFIG_DEBUG_WAITQ $CONFIG_DEBUG_KERNEL dep_bool ' Verbose BUG() reporting (adds 70K)' CONFIG_DEBUG_BUGVERBOSE $CONFIG_DEBUG_KERNEL diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/arm/mm/fault-common.c linux.21rc1-ac1/arch/arm/mm/fault-common.c --- linux.21rc1/arch/arm/mm/fault-common.c 2003-04-22 16:38:57.000000000 +0100 +++ linux.21rc1-ac1/arch/arm/mm/fault-common.c 2003-04-22 16:44:36.000000000 +0100 @@ -229,7 +229,7 @@ goto survive; check_stack: - if (vma->vm_flags & VM_GROWSDOWN && !expand_stack(vma, addr)) + if (!expand_stack(vma, addr)) goto good_area; out: return fault; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/cris/drivers/serial.c linux.21rc1-ac1/arch/cris/drivers/serial.c --- linux.21rc1/arch/cris/drivers/serial.c 2003-04-22 16:39:33.000000000 +0100 +++ linux.21rc1-ac1/arch/cris/drivers/serial.c 2003-04-22 16:44:36.000000000 +0100 @@ -3293,7 +3293,7 @@ printk("[%d] rs_close ttyS%d, count = %d\n", current->pid, info->line, info->count); #endif - if ((tty->count == 1) && (info->count != 1)) { + if ((atomic_read(&tty->count) == 1) && (info->count != 1)) { /* * Uh, oh. tty->count is 1, which means that the tty * structure will be freed. Info->count should always diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/i386/boot/setup.S linux.21rc1-ac1/arch/i386/boot/setup.S --- linux.21rc1/arch/i386/boot/setup.S 2003-04-22 16:38:54.000000000 +0100 +++ linux.21rc1-ac1/arch/i386/boot/setup.S 2003-04-22 16:44:36.000000000 +0100 @@ -45,6 +45,10 @@ * New A20 code ported from SYSLINUX by H. Peter Anvin. AMD Elan bugfixes * by Robert Schwebel, December 2001 * + * BIOS Enhanced Disk Drive support + * by Matt Domsch October 2002 + * conformant to T13 Committee www.t13.org + * projects 1572D, 1484D, 1386D, 1226DT */ #include @@ -53,6 +57,7 @@ #include #include #include +#include #include /* Signature words to ensure LILO loaded us right */ @@ -543,6 +548,70 @@ done_apm_bios: #endif +#if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE) +# Do the BIOS Enhanced Disk Drive calls +# This consists of two calls: +# int 13h ah=41h "Check Extensions Present" +# int 13h ah=48h "Get Device Parameters" +# +# A buffer of size EDDMAXNR*(EDDEXTSIZE+EDDPARMSIZE) is reserved for our use +# in the empty_zero_page at EDDBUF. The first four bytes of which are +# used to store the device number, interface support map and version +# results from fn41. The following 74 bytes are used to store +# the results from fn48. Starting from device 80h, fn41, then fn48 +# are called and their results stored in EDDBUF+n*(EDDEXTSIZE+EDDPARMIZE). +# Then the pointer is incremented to store the data for the next call. +# This repeats until either a device doesn't exist, or until EDDMAXNR +# devices have been stored. +# The one tricky part is that ds:si always points four bytes into +# the structure, and the fn41 results are stored at offsets +# from there. This removes the need to increment the pointer for +# every store, and leaves it ready for the fn48 call. +# A second one-byte buffer, EDDNR, in the empty_zero_page stores +# the number of BIOS devices which exist, up to EDDMAXNR. +# In setup.c, copy_edd() stores both empty_zero_page buffers away +# for later use, as they would get overwritten otherwise. +# This code is sensitive to the size of the structs in edd.h +edd_start: + # %ds points to the bootsector + # result buffer for fn48 + movw $EDDBUF+EDDEXTSIZE, %si # in ds:si, fn41 results + # kept just before that + movb $0, (EDDNR) # zero value at EDDNR + movb $0x80, %dl # BIOS device 0x80 + +edd_check_ext: + movb $CHECKEXTENSIONSPRESENT, %ah # Function 41 + movw $EDDMAGIC1, %bx # magic + int $0x13 # make the call + jc edd_done # no more BIOS devices + + cmpw $EDDMAGIC2, %bx # is magic right? + jne edd_next # nope, next... + + movb %dl, %ds:-4(%si) # store device number + movb %ah, %ds:-3(%si) # store version + movw %cx, %ds:-2(%si) # store extensions + incb (EDDNR) # note that we stored something + +edd_get_device_params: + movw $EDDPARMSIZE, %ds:(%si) # put size + movb $GETDEVICEPARAMETERS, %ah # Function 48 + int $0x13 # make the call + # Don't check for fail return + # it doesn't matter. + movw %si, %ax # increment si + addw $EDDPARMSIZE+EDDEXTSIZE, %ax + movw %ax, %si + +edd_next: + incb %dl # increment to next device + cmpb $EDDMAXNR, (EDDNR) # Out of space? + jb edd_check_ext # keep looping + +edd_done: +#endif + # Now we want to move to protected mode ... cmpw $0, %cs:realmode_swtch jz rmodeswtch_normal diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/i386/config.in linux.21rc1-ac1/arch/i386/config.in --- linux.21rc1/arch/i386/config.in 2003-04-22 16:39:33.000000000 +0100 +++ linux.21rc1-ac1/arch/i386/config.in 2003-04-22 16:44:36.000000000 +0100 @@ -194,6 +194,23 @@ bool 'Machine Check Exception' CONFIG_X86_MCE +mainmenu_option next_comment +comment 'CPU Frequency scaling' +dep_bool 'CPU Frequency scaling (EXPERIMENTAL)' CONFIG_CPU_FREQ $CONFIG_EXPERIMENTAL +if [ "$CONFIG_CPU_FREQ" = "y" ]; then + bool ' /proc/sys/cpu/ interface (2.4. / OLD)' CONFIG_CPU_FREQ_24_API + tristate ' AMD Mobile K6-2/K6-3 PowerNow!' CONFIG_X86_POWERNOW_K6 + if [ "$CONFIG_MELAN" = "y" ]; then + tristate ' AMD Elan' CONFIG_ELAN_CPUFREQ + fi + tristate ' VIA Cyrix III Longhaul' CONFIG_X86_LONGHAUL + tristate ' Intel Speedstep' CONFIG_X86_SPEEDSTEP + tristate ' Intel Pentium 4 clock modulation' CONFIG_X86_P4_CLOCKMOD + tristate ' Transmeta LongRun' CONFIG_X86_LONGRUN + tristate ' Cyrix MediaGX/NatSemi Geode Suspend Modulation' CONFIG_X86_GX_SUSPMOD +fi +endmenu + tristate 'Toshiba Laptop support' CONFIG_TOSHIBA tristate 'Dell laptop support' CONFIG_I8K @@ -201,6 +218,10 @@ tristate '/dev/cpu/*/msr - Model-specific register support' CONFIG_X86_MSR tristate '/dev/cpu/*/cpuid - CPU information support' CONFIG_X86_CPUID +if [ "$CONFIG_EXPERIMENTAL" = "y" ]; then + tristate 'BIOS Enhanced Disk Drive calls determine boot disk (EXPERIMENTAL)' CONFIG_EDD +fi + choice 'High Memory Support' \ "off CONFIG_NOHIGHMEM \ 4GB CONFIG_HIGHMEM4G \ @@ -292,6 +313,8 @@ bool 'ISA bus support' CONFIG_ISA fi +tristate 'NatSemi SCx200 support' CONFIG_SCx200 + source drivers/pci/Config.in bool 'EISA support' CONFIG_EISA @@ -324,6 +347,8 @@ tristate 'Kernel support for ELF binaries' CONFIG_BINFMT_ELF tristate 'Kernel support for MISC binaries' CONFIG_BINFMT_MISC +bool 'Kernel .config support' CONFIG_IKCONFIG + bool 'Power Management support' CONFIG_PM if [ "$CONFIG_EXPERIMENTAL" = "y" ]; then @@ -474,12 +499,13 @@ bool 'Kernel debugging' CONFIG_DEBUG_KERNEL if [ "$CONFIG_DEBUG_KERNEL" != "n" ]; then bool ' Check for stack overflows' CONFIG_DEBUG_STACKOVERFLOW + bool ' Compile the kernel with frame pointers' CONFIG_FRAME_POINTER bool ' Debug high memory support' CONFIG_DEBUG_HIGHMEM bool ' Debug memory allocations' CONFIG_DEBUG_SLAB bool ' Memory mapped I/O debugging' CONFIG_DEBUG_IOVIRT bool ' Magic SysRq key' CONFIG_MAGIC_SYSRQ + bool ' Morse code panics' CONFIG_PANIC_MORSE bool ' Spinlock debugging' CONFIG_DEBUG_SPINLOCK - bool ' Compile the kernel with frame pointers' CONFIG_FRAME_POINTER fi endmenu diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/i386/defconfig linux.21rc1-ac1/arch/i386/defconfig --- linux.21rc1/arch/i386/defconfig 2003-04-22 16:38:54.000000000 +0100 +++ linux.21rc1-ac1/arch/i386/defconfig 2003-04-22 16:44:36.000000000 +0100 @@ -56,6 +56,7 @@ # CONFIG_MICROCODE is not set # CONFIG_X86_MSR is not set # CONFIG_X86_CPUID is not set +# CONFIG_EDD is not set CONFIG_NOHIGHMEM=y # CONFIG_HIGHMEM4G is not set # CONFIG_HIGHMEM64G is not set diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/i386/kernel/dmi_scan.c linux.21rc1-ac1/arch/i386/kernel/dmi_scan.c --- linux.21rc1/arch/i386/kernel/dmi_scan.c 2003-04-22 16:39:33.000000000 +0100 +++ linux.21rc1-ac1/arch/i386/kernel/dmi_scan.c 2003-04-22 16:59:16.000000000 +0100 @@ -415,8 +415,10 @@ */ extern int skip_ioapic_setup; +#ifdef CONFIG_PCI extern int broken_440gx_bios; extern unsigned int pci_probe; +#endif static __init int broken_pirq(struct dmi_blacklist *d) { printk(KERN_INFO " *** Possibly defective BIOS detected (irqtable)\n"); diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/i386/kernel/edd.c linux.21rc1-ac1/arch/i386/kernel/edd.c --- linux.21rc1/arch/i386/kernel/edd.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.21rc1-ac1/arch/i386/kernel/edd.c 2003-04-22 16:44:36.000000000 +0100 @@ -0,0 +1,672 @@ +/* + * linux/arch/i386/kernel/edd.c + * Copyright (C) 2002 Dell Computer Corporation + * by Matt Domsch + * + * BIOS Enhanced Disk Drive Services (EDD) + * conformant to T13 Committee www.t13.org + * projects 1572D, 1484D, 1386D, 1226DT + * + * This code takes information provided by BIOS EDD calls + * fn41 - Check Extensions Present and + * fn48 - Get Device Parametes with EDD extensions + * made in setup.S, copied to safe structures in setup.c, + * and presents it in /proc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License v2.0 as published by + * the Free Software Foundation + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +/* + * TODO: + * - move edd.[ch] to better locations if/when one is decided + * - keep current with 2.5 EDD code changes + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +MODULE_AUTHOR("Matt Domsch "); +MODULE_DESCRIPTION("proc interface to BIOS EDD information"); +MODULE_LICENSE("GPL"); + +#define EDD_VERSION "0.09 2003-Jan-22" +#define EDD_DEVICE_NAME_SIZE 16 +#define REPORT_URL "http://domsch.com/linux/edd30/results.html" + +#define left (count - (p - page) - 1) + +static struct proc_dir_entry *bios_dir; + +struct attr_entry { + struct proc_dir_entry *entry; + struct list_head node; +}; + +struct edd_device { + char name[EDD_DEVICE_NAME_SIZE]; + struct edd_info *info; + struct proc_dir_entry *dir; + struct list_head attr_list; +}; + +static struct edd_device *edd_devices[EDDMAXNR]; + +struct edd_attribute { + char *name; + int (*show)(char *page, char **start, off_t off, + int count, int *eof, void *data); + int (*test) (struct edd_device * edev); +}; + +#define EDD_DEVICE_ATTR(_name,_show,_test) \ +struct edd_attribute edd_attr_##_name = { \ + .name = __stringify(_name), \ + .show = _show, \ + .test = _test, \ +}; + +static inline struct edd_info * +edd_dev_get_info(struct edd_device *edev) +{ + return edev->info; +} + +static inline void +edd_dev_set_info(struct edd_device *edev, struct edd_info *info) +{ + edev->info = info; +} + +static int +proc_calc_metrics(char *page, char **start, off_t off, + int count, int *eof, int len) +{ + if (len <= off+count) *eof = 1; + *start = page + off; + len -= off; + if (len>count) len = count; + if (len<0) len = 0; + return len; +} + +static int +edd_dump_raw_data(char *b, int count, void *data, int length) +{ + char *orig_b = b; + char hexbuf[80], ascbuf[20], *h, *a, c; + unsigned char *p = data; + unsigned long column = 0; + int length_printed = 0, d; + const char maxcolumn = 16; + while (length_printed < length && count > 0) { + h = hexbuf; + a = ascbuf; + for (column = 0; + column < maxcolumn && length_printed < length; column++) { + h += sprintf(h, "%02x ", (unsigned char) *p); + if (!isprint(*p)) + c = '.'; + else + c = *p; + a += sprintf(a, "%c", c); + p++; + length_printed++; + } + /* pad out the line */ + for (; column < maxcolumn; column++) { + h += sprintf(h, " "); + a += sprintf(a, " "); + } + d = snprintf(b, count, "%s\t%s\n", hexbuf, ascbuf); + b += d; + count -= d; + } + return (b - orig_b); +} + +static int +edd_show_host_bus(char *page, char **start, off_t off, int count, int *eof, void *data) +{ + struct edd_info *info = data; + char *p = page; + int i; + + if (!info || !page || off) { + return proc_calc_metrics(page, start, off, count, eof, 0); + } + + for (i = 0; i < 4; i++) { + if (isprint(info->params.host_bus_type[i])) { + p += snprintf(p, left, "%c", info->params.host_bus_type[i]); + } else { + p += snprintf(p, left, " "); + } + } + + if (!strncmp(info->params.host_bus_type, "ISA", 3)) { + p += snprintf(p, left, "\tbase_address: %x\n", + info->params.interface_path.isa.base_address); + } else if (!strncmp(info->params.host_bus_type, "PCIX", 4) || + !strncmp(info->params.host_bus_type, "PCI", 3)) { + p += snprintf(p, left, + "\t%02x:%02x.%d channel: %u\n", + info->params.interface_path.pci.bus, + info->params.interface_path.pci.slot, + info->params.interface_path.pci.function, + info->params.interface_path.pci.channel); + } else if (!strncmp(info->params.host_bus_type, "IBND", 4) || + !strncmp(info->params.host_bus_type, "XPRS", 4) || + !strncmp(info->params.host_bus_type, "HTPT", 4)) { + p += snprintf(p, left, + "\tTBD: %llx\n", + info->params.interface_path.ibnd.reserved); + + } else { + p += snprintf(p, left, "\tunknown: %llx\n", + info->params.interface_path.unknown.reserved); + } + return proc_calc_metrics(page, start, off, count, eof, (p - page)); +} + +static int +edd_show_interface(char *page, char **start, off_t off, int count, int *eof, void *data) +{ + struct edd_info *info = data; + char *p = page; + int i; + + if (!info || !page || off) { + return proc_calc_metrics(page, start, off, count, eof, 0); + } + + for (i = 0; i < 8; i++) { + if (isprint(info->params.interface_type[i])) { + p += snprintf(p, left, "%c", info->params.interface_type[i]); + } else { + p += snprintf(p, left, " "); + } + } + if (!strncmp(info->params.interface_type, "ATAPI", 5)) { + p += snprintf(p, left, "\tdevice: %u lun: %u\n", + info->params.device_path.atapi.device, + info->params.device_path.atapi.lun); + } else if (!strncmp(info->params.interface_type, "ATA", 3)) { + p += snprintf(p, left, "\tdevice: %u\n", + info->params.device_path.ata.device); + } else if (!strncmp(info->params.interface_type, "SCSI", 4)) { + p += snprintf(p, left, "\tid: %u lun: %llu\n", + info->params.device_path.scsi.id, + info->params.device_path.scsi.lun); + } else if (!strncmp(info->params.interface_type, "USB", 3)) { + p += snprintf(p, left, "\tserial_number: %llx\n", + info->params.device_path.usb.serial_number); + } else if (!strncmp(info->params.interface_type, "1394", 4)) { + p += snprintf(p, left, "\teui: %llx\n", + info->params.device_path.i1394.eui); + } else if (!strncmp(info->params.interface_type, "FIBRE", 5)) { + p += snprintf(p, left, "\twwid: %llx lun: %llx\n", + info->params.device_path.fibre.wwid, + info->params.device_path.fibre.lun); + } else if (!strncmp(info->params.interface_type, "I2O", 3)) { + p += snprintf(p, left, "\tidentity_tag: %llx\n", + info->params.device_path.i2o.identity_tag); + } else if (!strncmp(info->params.interface_type, "RAID", 4)) { + p += snprintf(p, left, "\tidentity_tag: %x\n", + info->params.device_path.raid.array_number); + } else if (!strncmp(info->params.interface_type, "SATA", 4)) { + p += snprintf(p, left, "\tdevice: %u\n", + info->params.device_path.sata.device); + } else { + p += snprintf(p, left, "\tunknown: %llx %llx\n", + info->params.device_path.unknown.reserved1, + info->params.device_path.unknown.reserved2); + } + + return proc_calc_metrics(page, start, off, count, eof, (p - page)); +} + +/** + * edd_show_raw_data() - unparses EDD information, returned to user-space + * + * Returns: number of bytes written, or 0 on failure + */ +static int +edd_show_raw_data(char *page, char **start, off_t off, int count, int *eof, void *data) +{ + struct edd_info *info = data; + char *p = page; + int i, warn_padding = 0, nonzero_path = 0, + len = sizeof (*info) - 4; + uint8_t checksum = 0, c = 0; + if (!info || !page || off) { + return proc_calc_metrics(page, start, off, count, eof, 0); + } + + if (!(info->params.key == 0xBEDD || info->params.key == 0xDDBE)) + len = info->params.length; + + p += snprintf(p, left, "int13 fn48 returned data:\n\n"); + p += edd_dump_raw_data(p, left, ((char *) info) + 4, len); + + /* Spec violation. Adaptec AIC7899 returns 0xDDBE + here, when it should be 0xBEDD. + */ + p += snprintf(p, left, "\n"); + if (info->params.key == 0xDDBE) { + p += snprintf(p, left, + "Warning: Spec violation. Key should be 0xBEDD, is 0xDDBE\n"); + } + + if (!(info->params.key == 0xBEDD || info->params.key == 0xDDBE)) { + goto out; + } + + for (i = 30; i <= 73; i++) { + c = *(((uint8_t *) info) + i + 4); + if (c) + nonzero_path++; + checksum += c; + } + + if (checksum) { + p += snprintf(p, left, + "Warning: Spec violation. Device Path checksum invalid.\n"); + } + + if (!nonzero_path) { + p += snprintf(p, left, "Error: Spec violation. Empty device path.\n"); + goto out; + } + + for (i = 0; i < 4; i++) { + if (!isprint(info->params.host_bus_type[i])) { + warn_padding++; + } + } + for (i = 0; i < 8; i++) { + if (!isprint(info->params.interface_type[i])) { + warn_padding++; + } + } + + if (warn_padding) { + p += snprintf(p, left, + "Warning: Spec violation. Padding should be 0x20.\n"); + } + +out: + p += snprintf(p, left, "\nPlease check %s\n", REPORT_URL); + p += snprintf(p, left, "to see if this device has been reported. If not,\n"); + p += snprintf(p, left, "please send the information requested there.\n"); + + return proc_calc_metrics(page, start, off, count, eof, (p - page)); +} + +static int +edd_show_version(char *page, char **start, off_t off, int count, int *eof, void *data) +{ + struct edd_info *info = data; + char *p = page; + if (!info || !page || off) { + return proc_calc_metrics(page, start, off, count, eof, 0); + } + + p += snprintf(p, left, "0x%02x\n", info->version); + return proc_calc_metrics(page, start, off, count, eof, (p - page)); +} + +static int +edd_show_extensions(char *page, char **start, off_t off, int count, int *eof, void *data) +{ + struct edd_info *info = data; + char *p = page; + if (!info || !page || off) { + return proc_calc_metrics(page, start, off, count, eof, 0); + } + + if (info->interface_support & EDD_EXT_FIXED_DISK_ACCESS) { + p += snprintf(p, left, "Fixed disk access\n"); + } + if (info->interface_support & EDD_EXT_DEVICE_LOCKING_AND_EJECTING) { + p += snprintf(p, left, "Device locking and ejecting\n"); + } + if (info->interface_support & EDD_EXT_ENHANCED_DISK_DRIVE_SUPPORT) { + p += snprintf(p, left, "Enhanced Disk Drive support\n"); + } + if (info->interface_support & EDD_EXT_64BIT_EXTENSIONS) { + p += snprintf(p, left, "64-bit extensions\n"); + } + return proc_calc_metrics(page, start, off, count, eof, (p - page)); +} + +static int +edd_show_info_flags(char *page, char **start, off_t off, int count, int *eof, void *data) +{ + struct edd_info *info = data; + char *p = page; + if (!info || !page || off) { + return proc_calc_metrics(page, start, off, count, eof, 0); + } + + if (info->params.info_flags & EDD_INFO_DMA_BOUNDRY_ERROR_TRANSPARENT) + p += snprintf(p, left, "DMA boundry error transparent\n"); + if (info->params.info_flags & EDD_INFO_GEOMETRY_VALID) + p += snprintf(p, left, "geometry valid\n"); + if (info->params.info_flags & EDD_INFO_REMOVABLE) + p += snprintf(p, left, "removable\n"); + if (info->params.info_flags & EDD_INFO_WRITE_VERIFY) + p += snprintf(p, left, "write verify\n"); + if (info->params.info_flags & EDD_INFO_MEDIA_CHANGE_NOTIFICATION) + p += snprintf(p, left, "media change notification\n"); + if (info->params.info_flags & EDD_INFO_LOCKABLE) + p += snprintf(p, left, "lockable\n"); + if (info->params.info_flags & EDD_INFO_NO_MEDIA_PRESENT) + p += snprintf(p, left, "no media present\n"); + if (info->params.info_flags & EDD_INFO_USE_INT13_FN50) + p += snprintf(p, left, "use int13 fn50\n"); + return proc_calc_metrics(page, start, off, count, eof, (p - page)); +} + +static int +edd_show_default_cylinders(char *page, char **start, off_t off, int count, int *eof, void *data) +{ + struct edd_info *info = data; + char *p = page; + if (!info || !page || off) { + return proc_calc_metrics(page, start, off, count, eof, 0); + } + + p += snprintf(p, left, "0x%x\n", info->params.num_default_cylinders); + return proc_calc_metrics(page, start, off, count, eof, (p - page)); +} + +static int +edd_show_default_heads(char *page, char **start, off_t off, int count, int *eof, void *data) +{ + struct edd_info *info = data; + char *p = page; + if (!info || !page || off) { + return proc_calc_metrics(page, start, off, count, eof, 0); + } + + p += snprintf(p, left, "0x%x\n", info->params.num_default_heads); + return proc_calc_metrics(page, start, off, count, eof, (p - page)); +} + +static int +edd_show_default_sectors_per_track(char *page, char **start, off_t off, int count, int *eof, void *data) +{ + struct edd_info *info = data; + char *p = page; + if (!info || !page || off) { + return proc_calc_metrics(page, start, off, count, eof, 0); + } + + p += snprintf(p, left, "0x%x\n", info->params.sectors_per_track); + return proc_calc_metrics(page, start, off, count, eof, (p - page)); +} + +static int +edd_show_sectors(char *page, char **start, off_t off, int count, int *eof, void *data) +{ + struct edd_info *info = data; + char *p = page; + if (!info || !page || off) { + return proc_calc_metrics(page, start, off, count, eof, 0); + } + + p += snprintf(p, left, "0x%llx\n", info->params.number_of_sectors); + return proc_calc_metrics(page, start, off, count, eof, (p - page)); +} + +static int +edd_has_default_cylinders(struct edd_device *edev) +{ + struct edd_info *info = edd_dev_get_info(edev); + if (!edev || !info) + return 0; + return info->params.num_default_cylinders > 0; +} + +static int +edd_has_default_heads(struct edd_device *edev) +{ + struct edd_info *info = edd_dev_get_info(edev); + if (!edev || !info) + return 0; + return info->params.num_default_heads > 0; +} + +static int +edd_has_default_sectors_per_track(struct edd_device *edev) +{ + struct edd_info *info = edd_dev_get_info(edev); + if (!edev || !info) + return 0; + return info->params.sectors_per_track > 0; +} + +static int +edd_has_edd30(struct edd_device *edev) +{ + struct edd_info *info = edd_dev_get_info(edev); + int i, nonzero_path = 0; + char c; + + if (!edev || !info) + return 0; + + if (!(info->params.key == 0xBEDD || info->params.key == 0xDDBE)) { + return 0; + } + + for (i = 30; i <= 73; i++) { + c = *(((uint8_t *) info) + i + 4); + if (c) { + nonzero_path++; + break; + } + } + if (!nonzero_path) { + return 0; + } + + return 1; +} + +static EDD_DEVICE_ATTR(raw_data, edd_show_raw_data, NULL); +static EDD_DEVICE_ATTR(version, edd_show_version, NULL); +static EDD_DEVICE_ATTR(extensions, edd_show_extensions, NULL); +static EDD_DEVICE_ATTR(info_flags, edd_show_info_flags, NULL); +static EDD_DEVICE_ATTR(sectors, edd_show_sectors, NULL); +static EDD_DEVICE_ATTR(default_cylinders, edd_show_default_cylinders, + edd_has_default_cylinders); +static EDD_DEVICE_ATTR(default_heads, edd_show_default_heads, + edd_has_default_heads); +static EDD_DEVICE_ATTR(default_sectors_per_track, + edd_show_default_sectors_per_track, + edd_has_default_sectors_per_track); +static EDD_DEVICE_ATTR(interface, edd_show_interface,edd_has_edd30); +static EDD_DEVICE_ATTR(host_bus, edd_show_host_bus, edd_has_edd30); + +static struct edd_attribute *def_attrs[] = { + &edd_attr_raw_data, + &edd_attr_version, + &edd_attr_extensions, + &edd_attr_info_flags, + &edd_attr_sectors, + &edd_attr_default_cylinders, + &edd_attr_default_heads, + &edd_attr_default_sectors_per_track, + &edd_attr_interface, + &edd_attr_host_bus, + NULL, +}; + +static inline void +edd_device_unregister(struct edd_device *edev) +{ + struct list_head *pos, *next; + struct attr_entry *ae; + + list_for_each_safe(pos, next, &edev->attr_list) { + ae = list_entry(pos, struct attr_entry, node); + remove_proc_entry(ae->entry->name, edev->dir); + list_del(&ae->node); + kfree(ae); + } + + remove_proc_entry(edev->dir->name, bios_dir); +} + +static int +edd_populate_dir(struct edd_device *edev) +{ + struct edd_attribute *attr; + struct attr_entry *ae; + int i; + int error = 0; + + for (i = 0; (attr=def_attrs[i]); i++) { + if (!attr->test || (attr->test && attr->test(edev))) { + ae = kmalloc(sizeof (*ae), GFP_KERNEL); + if (ae == NULL) { + error = 1; + break; + } + INIT_LIST_HEAD(&ae->node); + ae->entry = + create_proc_read_entry(attr->name, 0444, + edev->dir, attr->show, + edd_dev_get_info(edev)); + if (ae->entry == NULL) { + error = 1; + break; + } + list_add(&ae->node, &edev->attr_list); + } + } + + if (error) + return error; + + return 0; +} + +static int +edd_make_dir(struct edd_device *edev) +{ + int error=1; + + edev->dir = proc_mkdir(edev->name, bios_dir); + if (edev->dir != NULL) { + edev->dir->mode = (S_IFDIR | S_IRWXU | S_IRUGO | S_IXUGO); + error = edd_populate_dir(edev); + } + return error; +} + +static int +edd_device_register(struct edd_device *edev, int i) +{ + int error; + + if (!edev) + return 1; + memset(edev, 0, sizeof (*edev)); + INIT_LIST_HEAD(&edev->attr_list); + edd_dev_set_info(edev, &edd[i]); + snprintf(edev->name, EDD_DEVICE_NAME_SIZE, "int13_dev%02x", + edd[i].device); + error = edd_make_dir(edev); + return error; +} + +/** + * edd_init() - creates /proc tree of EDD data + * + * This assumes that eddnr and edd were + * assigned in setup.c already. + */ +static int __init +edd_init(void) +{ + unsigned int i; + int rc = 0; + struct edd_device *edev; + + printk(KERN_INFO "BIOS EDD facility v%s, %d devices found\n", + EDD_VERSION, eddnr); + + if (!eddnr) { + printk(KERN_INFO "EDD information not available.\n"); + return 1; + } + + bios_dir = proc_mkdir("bios", NULL); + if (bios_dir == NULL) + return 1; + + for (i = 0; i < eddnr && i < EDDMAXNR && !rc; i++) { + edev = kmalloc(sizeof (*edev), GFP_KERNEL); + if (!edev) { + rc = 1; + break; + } + + rc = edd_device_register(edev, i); + if (rc) { + break; + } + edd_devices[i] = edev; + } + + if (rc) { + for (i = 0; i < eddnr && i < EDDMAXNR; i++) { + if ((edev = edd_devices[i])) { + edd_device_unregister(edev); + kfree(edev); + } + } + + remove_proc_entry(bios_dir->name, NULL); + } + + return rc; +} + +static void __exit +edd_exit(void) +{ + int i; + struct edd_device *edev; + + for (i = 0; i < eddnr && i < EDDMAXNR; i++) { + if ((edev = edd_devices[i])) { + edd_device_unregister(edev); + kfree(edev); + } + } + + remove_proc_entry(bios_dir->name, NULL); +} + +module_init(edd_init); +module_exit(edd_exit); diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/i386/kernel/elanfreq.c linux.21rc1-ac1/arch/i386/kernel/elanfreq.c --- linux.21rc1/arch/i386/kernel/elanfreq.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.21rc1-ac1/arch/i386/kernel/elanfreq.c 2003-04-22 16:44:36.000000000 +0100 @@ -0,0 +1,297 @@ +/* + * elanfreq: cpufreq driver for the AMD ELAN family + * + * (c) Copyright 2002 Robert Schwebel + * + * Parts of this code are (c) Sven Geggus + * + * All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + * + * 2002-02-13: - initial revision for 2.4.18-pre9 by Robert Schwebel + * + */ + +#include +#include +#include + +#include +#include +#include + +#include +#include +#include + +#define REG_CSCIR 0x22 /* Chip Setup and Control Index Register */ +#define REG_CSCDR 0x23 /* Chip Setup and Control Data Register */ + +static struct cpufreq_driver *elanfreq_driver; + +/* Module parameter */ +static int max_freq; + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Robert Schwebel , Sven Geggus "); +MODULE_DESCRIPTION("cpufreq driver for AMD's Elan CPUs"); + +struct s_elan_multiplier { + int clock; /* frequency in kHz */ + int val40h; /* PMU Force Mode register */ + int val80h; /* CPU Clock Speed Register */ +}; + +/* + * It is important that the frequencies + * are listed in ascending order here! + */ +struct s_elan_multiplier elan_multiplier[] = { + {1000, 0x02, 0x18}, + {2000, 0x02, 0x10}, + {4000, 0x02, 0x08}, + {8000, 0x00, 0x00}, + {16000, 0x00, 0x02}, + {33000, 0x00, 0x04}, + {66000, 0x01, 0x04}, + {99000, 0x01, 0x05} +}; + +static struct cpufreq_frequency_table elanfreq_table[] = { + {0, 1000}, + {1, 2000}, + {2, 4000}, + {3, 8000}, + {4, 16000}, + {5, 33000}, + {6, 66000}, + {7, 99000}, + {0, CPUFREQ_TABLE_END}, +}; + + +/** + * elanfreq_get_cpu_frequency: determine current cpu speed + * + * Finds out at which frequency the CPU of the Elan SOC runs + * at the moment. Frequencies from 1 to 33 MHz are generated + * the normal way, 66 and 99 MHz are called "Hyperspeed Mode" + * and have the rest of the chip running with 33 MHz. + */ + +static unsigned int elanfreq_get_cpu_frequency(void) +{ + u8 clockspeed_reg; /* Clock Speed Register */ + + local_irq_disable(); + outb_p(0x80,REG_CSCIR); + clockspeed_reg = inb_p(REG_CSCDR); + local_irq_enable(); + + if ((clockspeed_reg & 0xE0) == 0xE0) { return 0; } + + /* Are we in CPU clock multiplied mode (66/99 MHz)? */ + if ((clockspeed_reg & 0xE0) == 0xC0) { + if ((clockspeed_reg & 0x01) == 0) { + return 66000; + } else { + return 99000; + } + } + + /* 33 MHz is not 32 MHz... */ + if ((clockspeed_reg & 0xE0)==0xA0) + return 33000; + + return ((1<<((clockspeed_reg & 0xE0) >> 5)) * 1000); +} + + +/** + * elanfreq_set_cpu_frequency: Change the CPU core frequency + * @cpu: cpu number + * @freq: frequency in kHz + * + * This function takes a frequency value and changes the CPU frequency + * according to this. Note that the frequency has to be checked by + * elanfreq_validatespeed() for correctness! + * + * There is no return value. + */ + +static void elanfreq_set_cpu_state (unsigned int state) { + + struct cpufreq_freqs freqs; + + if (!elanfreq_driver) { + printk(KERN_ERR "cpufreq: initialization problem or invalid target frequency\n"); + return; + } + + freqs.old = elanfreq_get_cpu_frequency(); + freqs.new = elan_multiplier[state].clock; + freqs.cpu = 0; /* elanfreq.c is UP only driver */ + + cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); + + printk(KERN_INFO "elanfreq: attempting to set frequency to %i kHz\n",elan_multiplier[state].clock); + + + /* + * Access to the Elan's internal registers is indexed via + * 0x22: Chip Setup & Control Register Index Register (CSCI) + * 0x23: Chip Setup & Control Register Data Register (CSCD) + * + */ + + /* + * 0x40 is the Power Management Unit's Force Mode Register. + * Bit 6 enables Hyperspeed Mode (66/100 MHz core frequency) + */ + + local_irq_disable(); + outb_p(0x40,REG_CSCIR); /* Disable hyperspeed mode */ + outb_p(0x00,REG_CSCDR); + local_irq_enable(); /* wait till internal pipelines and */ + udelay(1000); /* buffers have cleaned up */ + + local_irq_disable(); + + /* now, set the CPU clock speed register (0x80) */ + outb_p(0x80,REG_CSCIR); + outb_p(elan_multiplier[state].val80h,REG_CSCDR); + + /* now, the hyperspeed bit in PMU Force Mode Register (0x40) */ + outb_p(0x40,REG_CSCIR); + outb_p(elan_multiplier[state].val40h,REG_CSCDR); + udelay(10000); + local_irq_enable(); + + cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); +}; + + +/** + * elanfreq_validatespeed: test if frequency range is valid + * + * This function checks if a given frequency range in kHz is valid + * for the hardware supported by the driver. + */ + +static int elanfreq_verify (struct cpufreq_policy *policy) +{ + return cpufreq_frequency_table_verify(policy, &elanfreq_table[0]); +} + +static int elanfreq_setpolicy (struct cpufreq_policy *policy) +{ + unsigned int newstate = 0; + + if (cpufreq_frequency_table_setpolicy(policy, &elanfreq_table[0], &newstate)) + return -EINVAL; + + elanfreq_set_cpu_state(newstate); + + return 0; +} + + +/* + * Module init and exit code + */ + +#ifndef MODULE +/** + * elanfreq_setup - elanfreq command line parameter parsing + * + * elanfreq command line parameter. Use: + * elanfreq=66000 + * to set the maximum CPU frequency to 66 MHz. Note that in + * case you do not give this boot parameter, the maximum + * frequency will fall back to _current_ CPU frequency which + * might be lower. If you build this as a module, use the + * max_freq module parameter instead. + */ +static int __init elanfreq_setup(char *str) +{ + max_freq = simple_strtoul(str, &str, 0); + return 1; +} +__setup("elanfreq=", elanfreq_setup); +#endif + +static int __init elanfreq_init(void) +{ + struct cpuinfo_x86 *c = cpu_data; + struct cpufreq_driver *driver; + int ret, i; + + /* Test if we have the right hardware */ + if ((c->x86_vendor != X86_VENDOR_AMD) || + (c->x86 != 4) || (c->x86_model!=10)) + { + printk(KERN_INFO "elanfreq: error: no Elan processor found!\n"); + return -ENODEV; + } + + driver = kmalloc(sizeof(struct cpufreq_driver) + + NR_CPUS * sizeof(struct cpufreq_policy), GFP_KERNEL); + if (!driver) + return -ENOMEM; + + driver->policy = (struct cpufreq_policy *) (driver + 1); + + if (!max_freq) + max_freq = elanfreq_get_cpu_frequency(); + + /* table init */ + for (i=0; (elanfreq_table[i].frequency != CPUFREQ_TABLE_END); i++) { + if (elanfreq_table[i].frequency > max_freq) + elanfreq_table[i].frequency = CPUFREQ_ENTRY_INVALID; + } + +#ifdef CONFIG_CPU_FREQ_24_API + driver->cpu_cur_freq[0] = elanfreq_get_cpu_frequency(); +#endif + + driver->verify = &elanfreq_verify; + driver->setpolicy = &elanfreq_setpolicy; + + driver->policy[0].cpu = 0; + ret = cpufreq_frequency_table_cpuinfo(&driver->policy[0], &elanfreq_table[0]); + if (ret) { + kfree(driver); + return ret; + } + driver->policy[0].policy = CPUFREQ_POLICY_PERFORMANCE; + driver->policy[0].cpuinfo.transition_latency = CPUFREQ_ETERNAL; + + elanfreq_driver = driver; + + ret = cpufreq_register(driver); + if (ret) { + elanfreq_driver = NULL; + kfree(driver); + } + + return ret; +} + + +static void __exit elanfreq_exit(void) +{ + if (elanfreq_driver) { + cpufreq_unregister(); + kfree(elanfreq_driver); + } +} + +module_init(elanfreq_init); +module_exit(elanfreq_exit); + +MODULE_PARM (max_freq, "i"); + diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/i386/kernel/entry.S linux.21rc1-ac1/arch/i386/kernel/entry.S --- linux.21rc1/arch/i386/kernel/entry.S 2003-04-22 16:39:33.000000000 +0100 +++ linux.21rc1-ac1/arch/i386/kernel/entry.S 2003-04-22 16:44:36.000000000 +0100 @@ -79,7 +79,7 @@ exec_domain = 16 need_resched = 20 tsk_ptrace = 24 -processor = 52 +cpu = 32 ENOSYS = 38 @@ -184,9 +184,11 @@ ENTRY(ret_from_fork) +#if CONFIG_SMP pushl %ebx call SYMBOL_NAME(schedule_tail) addl $4, %esp +#endif GET_CURRENT(%ebx) testb $0x02,tsk_ptrace(%ebx) # PT_TRACESYS jne tracesys_exit @@ -645,8 +647,8 @@ .long SYMBOL_NAME(sys_tkill) .long SYMBOL_NAME(sys_sendfile64) .long SYMBOL_NAME(sys_ni_syscall) /* 240 reserved for futex */ - .long SYMBOL_NAME(sys_ni_syscall) /* reserved for sched_setaffinity */ - .long SYMBOL_NAME(sys_ni_syscall) /* reserved for sched_getaffinity */ + .long SYMBOL_NAME(sys_sched_setaffinity) + .long SYMBOL_NAME(sys_sched_getaffinity) .long SYMBOL_NAME(sys_ni_syscall) /* sys_set_thread_area */ .long SYMBOL_NAME(sys_ni_syscall) /* sys_get_thread_area */ .long SYMBOL_NAME(sys_ni_syscall) /* 245 sys_io_setup */ diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/i386/kernel/gx-suspmod.c linux.21rc1-ac1/arch/i386/kernel/gx-suspmod.c --- linux.21rc1/arch/i386/kernel/gx-suspmod.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.21rc1-ac1/arch/i386/kernel/gx-suspmod.c 2003-04-22 16:44:36.000000000 +0100 @@ -0,0 +1,514 @@ +/* + * Cyrix MediaGX and NatSemi Geode Suspend Modulation + * (C) 2002 Zwane Mwaikambo + * (C) 2002 Hiroshi Miura + * All Rights Reserved + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation + * + * The author(s) of this software shall not be held liable for damages + * of any nature resulting due to the use of this software. This + * software is provided AS-IS with no warranties. + * + * Theoritical note: + * + * (see Geode(tm) CS5530 manual (rev.4.1) page.56) + * + * CPU frequency control on NatSemi Geode GX1/GXLV processor and CS55x0 + * are based on Suspend Moduration. + * + * Suspend Modulation works by asserting and de-asserting the SUSP# pin + * to CPU(GX1/GXLV) for configurable durations. When asserting SUSP# + * the CPU enters an idle state. GX1 stops its core clock when SUSP# is + * asserted then power consumption is reduced. + * + * Suspend Modulation's OFF/ON duration are configurable + * with 'Suspend Modulation OFF Count Register' + * and 'Suspend Modulation ON Count Register'. + * These registers are 8bit counters that represent the number of + * 32us intervals which the SUSP# pin is asserted/de-asserted to the + * processor. + * + * These counters define a ratio which is the effective frequency + * of operation of the system. + * + * On Count + * F_eff = Fgx * ---------------------- + * On Count + Off Count + * + * 0 <= On Count, Off Count <= 255 + * + * From these limits, we can get register values + * + * on_duration + off_duration <= MAX_DURATION + * off_duration = on_duration * (stock_freq - freq) / freq + * + * on_duration = (freq * DURATION) / stock_freq + * off_duration = DURATION - on_duration + * + * + *--------------------------------------------------------------------------- + * + * ChangeLog: + * Dec. 11, 2002 Hiroshi Miura + * - rewrite for Cyrix MediaGX Cx5510/5520 and + * NatSemi Geode Cs5530(A). + * + * Jul. ??, 2002 Zwane Mwaikambo + * - cs5530_mod patch for 2.4.19-rc1. + * + *--------------------------------------------------------------------------- + * + * Todo + * Test on machines with 5510, 5530, 5530A + */ + +/************************************************************************ + * Suspend Modulation - Definitions * + ************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* PCI config registers, all at F0 */ +#define PCI_PMER1 0x80 /* power management enable register 1 */ +#define PCI_PMER2 0x81 /* power management enable register 2 */ +#define PCI_PMER3 0x82 /* power management enable register 3 */ +#define PCI_IRQTC 0x8c /* irq speedup timer counter register:typical 2 to 4ms */ +#define PCI_VIDTC 0x8d /* video speedup timer counter register: typical 50 to 100ms */ +#define PCI_MODOFF 0x94 /* suspend modulation OFF counter register, 1 = 32us */ +#define PCI_MODON 0x95 /* suspend modulation ON counter register */ +#define PCI_SUSCFG 0x96 /* suspend configuration register */ + +/* PMER1 bits */ +#define GPM (1<<0) /* global power management */ +#define GIT (1<<1) /* globally enable PM device idle timers */ +#define GTR (1<<2) /* globally enable IO traps */ +#define IRQ_SPDUP (1<<3) /* disable clock throttle during interrupt handling */ +#define VID_SPDUP (1<<4) /* disable clock throttle during vga video handling */ + +/* SUSCFG bits */ +#define SUSMOD (1<<0) /* enable/disable suspend modulation */ +/* the belows support only with cs5530 (after rev.1.2)/cs5530A */ +#define SMISPDUP (1<<1) /* select how SMI re-enable suspend modulation: */ + /* IRQTC timer or read SMI speedup disable reg.(F1BAR[08-09h]) */ +#define SUSCFG (1<<2) /* enable powering down a GXLV processor. "Special 3Volt Suspend" mode */ +/* the belows support only with cs5530A */ +#define PWRSVE_ISA (1<<3) /* stop ISA clock */ +#define PWRSVE (1<<4) /* active idle */ + +struct gxfreq_params { + u8 on_duration; + u8 off_duration; + u8 pci_suscfg; + u8 pci_pmer1; + u8 pci_pmer2; + u8 pci_rev; + struct pci_dev *cs55x0; +}; + +static struct cpufreq_driver *gx_driver; +static struct gxfreq_params *gx_params; +static int stock_freq; + +/* PCI bus clock - defaults to 30.000 if cpu_khz is not available */ +static int pci_busclk = 0; +MODULE_PARM(pci_busclk, "i"); + +/* maximum duration for which the cpu may be suspended + * (32us * MAX_DURATION). If no parameter is given, this defaults + * to 255. + * Note that this leads to a maximum of 8 ms(!) where the CPU clock + * is suspended -- processing power is just 0.39% of what it used to be, + * though. 781.25 kHz(!) for a 200 MHz processor -- wow. */ +static int max_duration = 255; +MODULE_PARM(max_duration, "i"); + +/* For the default policy, we want at least some processing power + * - let's say 5%. (min = maxfreq / POLICY_MIN_DIV) + */ +#define POLICY_MIN_DIV 20 + + +/* DEBUG + * Define it if you want verbose debug output + */ + +#define SUSPMOD_DEBUG 1 + +#ifdef SUSPMOD_DEBUG +#define dprintk(msg...) printk(KERN_DEBUG "cpufreq:" msg) +#else +#define dprintk(msg...) do { } while(0); +#endif + +/** + * we can detect a core multipiler from dir0_lsb + * from GX1 datasheet p.56, + * MULT[3:0]: + * 0000 = SYSCLK multiplied by 4 (test only) + * 0001 = SYSCLK multiplied by 10 + * 0010 = SYSCLK multiplied by 4 + * 0011 = SYSCLK multiplied by 6 + * 0100 = SYSCLK multiplied by 9 + * 0101 = SYSCLK multiplied by 5 + * 0110 = SYSCLK multiplied by 7 + * 0111 = SYSCLK multiplied by 8 + * of 33.3MHz + **/ +static int gx_freq_mult[16] = { + 4, 10, 4, 6, 9, 5, 7, 8, + 0, 0, 0, 0, 0, 0, 0, 0 +}; + + +/**************************************************************** + * Low Level chipset interface * + ****************************************************************/ +static struct pci_device_id gx_chipset_tbl[] __initdata = { + { PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5530_LEGACY, PCI_ANY_ID, PCI_ANY_ID }, + { PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5520, PCI_ANY_ID, PCI_ANY_ID }, + { PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5510, PCI_ANY_ID, PCI_ANY_ID }, + { 0, }, +}; + +/** + * gx_detect_chipset: + * + **/ +static __init struct pci_dev *gx_detect_chipset(void) +{ + struct pci_dev *gx_pci; + + /* check if CPU is a MediaGX or a Geode. */ + if ((current_cpu_data.x86_vendor != X86_VENDOR_NSC) && + (current_cpu_data.x86_vendor != X86_VENDOR_CYRIX)) { + printk(KERN_INFO "gx-suspmod: error: no MediaGX/Geode processor found!\n"); + return NULL; + } + + /* detect which companion chip is used */ + pci_for_each_dev(gx_pci) { + if ((pci_match_device (gx_chipset_tbl, gx_pci)) != NULL) { + return gx_pci; + } + } + + dprintk(KERN_INFO "gx-suspmod: error: no supported chipset found!\n"); + return NULL; +} + +/** + * gx_get_cpuspeed: + * + * Finds out at which efficient frequency the Cyrix MediaGX/NatSemi Geode CPU runs. + */ +static int gx_get_cpuspeed(void) +{ + if ((gx_params->pci_suscfg & SUSMOD) == 0) + return stock_freq; + + return (stock_freq * gx_params->on_duration) + / (gx_params->on_duration + gx_params->off_duration); +} + +/** + * gx_validate_speed: + * determine current cpu speed + * +**/ + +static unsigned int gx_validate_speed(unsigned int khz, u8 *on_duration, u8 *off_duration) +{ + unsigned int i; + u8 tmp_on, tmp_off; + int old_tmp_freq = stock_freq; + int tmp_freq; + + *on_duration=1; + *off_duration=0; + + for (i=max_duration; i>0; i--) { + tmp_on = ((khz * i) / stock_freq) & 0xff; + tmp_off = i - tmp_on; + tmp_freq = (stock_freq * tmp_on) / i; + /* if this relation is closer to khz, use this. If it's equal, + * prefer it, too - lower latency */ + if (abs(tmp_freq - khz) <= abs(old_tmp_freq - khz)) { + *on_duration = tmp_on; + *off_duration = tmp_off; + old_tmp_freq = tmp_freq; + } + } + + return old_tmp_freq; +} + + +/** + * gx_set_cpuspeed: + * set cpu speed in khz. + **/ + +static void gx_set_cpuspeed(unsigned int khz) +{ + u8 suscfg, pmer1; + unsigned int new_khz; + unsigned long flags; + struct cpufreq_freqs freqs; + + + freqs.cpu = 0; + freqs.old = gx_get_cpuspeed(); + + new_khz = gx_validate_speed(khz, &gx_params->on_duration, &gx_params->off_duration); + + freqs.new = new_khz; + + if (new_khz == stock_freq) { /* if new khz == 100% of CPU speed, it is special case */ + local_irq_save(flags); + cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); + pci_write_config_byte(gx_params->cs55x0, PCI_SUSCFG, (gx_params->pci_suscfg & ~(SUSMOD))); + pci_read_config_byte(gx_params->cs55x0, PCI_SUSCFG, &(gx_params->pci_suscfg)); + local_irq_restore(flags); + dprintk("suspend modulation disabled: cpu runs 100 percent speed.\n"); + cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); + return; + } + + cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); + + local_irq_save(flags); + switch (gx_params->cs55x0->device) { + case PCI_DEVICE_ID_CYRIX_5530_LEGACY: + pmer1 = gx_params->pci_pmer1 | IRQ_SPDUP | VID_SPDUP; + /* FIXME: need to test other values -- Zwane,Miura */ + pci_write_config_byte(gx_params->cs55x0, PCI_IRQTC, 4); /* typical 2 to 4ms */ + pci_write_config_byte(gx_params->cs55x0, PCI_VIDTC, 100);/* typical 50 to 100ms */ + pci_write_config_byte(gx_params->cs55x0, PCI_PMER1, pmer1); + + if (gx_params->pci_rev < 0x10) { /* CS5530(rev 1.2, 1.3) */ + suscfg = gx_params->pci_suscfg | SUSMOD; + } else { /* CS5530A,B.. */ + suscfg = gx_params->pci_suscfg | SUSMOD | PWRSVE; + } + break; + case PCI_DEVICE_ID_CYRIX_5520: + case PCI_DEVICE_ID_CYRIX_5510: + suscfg = gx_params->pci_suscfg | SUSMOD; + break; + default: + local_irq_restore(flags); + dprintk("fatal: try to set unknown chipset.\n"); + return; + } + + pci_write_config_byte(gx_params->cs55x0, PCI_MODOFF, gx_params->off_duration); + pci_write_config_byte(gx_params->cs55x0, PCI_MODON, gx_params->on_duration); + + pci_write_config_byte(gx_params->cs55x0, PCI_SUSCFG, suscfg); + pci_read_config_byte(gx_params->cs55x0, PCI_SUSCFG, &suscfg); + + local_irq_restore(flags); + + gx_params->pci_suscfg = suscfg; + + cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); + + dprintk("suspend modulation w/ duration of ON:%d us, OFF:%d us\n", + gx_params->on_duration * 32, gx_params->off_duration * 32); + dprintk("suspend modulation w/ clock speed: %d kHz.\n", freqs.new); +} + +/**************************************************************** + * High level functions * + ****************************************************************/ + +/* + * cpufreq_gx_verify: test if frequency range is valid + * + * This function checks if a given frequency range in kHz is valid + * for the hardware supported by the driver. + */ + +static int cpufreq_gx_verify(struct cpufreq_policy *policy) +{ + unsigned int tmp_freq = 0; + u8 tmp1, tmp2; + + if (!gx_driver || !stock_freq || !policy) + return -EINVAL; + + policy->cpu = 0; + cpufreq_verify_within_limits(policy, (stock_freq / max_duration), stock_freq); + + /* it needs to be assured that at least one supported frequency is + * within policy->min and policy->max. If it is not, policy->max + * needs to be increased until one freuqency is supported. + * policy->min may not be decreased, though. This way we guarantee a + * specific processing capacity. + */ + tmp_freq = gx_validate_speed(policy->min, &tmp1, &tmp2); + if (tmp_freq < policy->min) + tmp_freq += stock_freq / max_duration; + policy->min = tmp_freq; + if (policy->min > policy->max) + policy->max = tmp_freq; + tmp_freq = gx_validate_speed(policy->max, &tmp1, &tmp2); + if (tmp_freq > policy->max) + tmp_freq -= stock_freq / max_duration; + policy->max = tmp_freq; + if (policy->max < policy->min) + policy->max = policy->min; + cpufreq_verify_within_limits(policy, (stock_freq / max_duration), stock_freq); + + return 0; +} + +/* + * cpufreq_gx_setpolicy: + * + */ +static int cpufreq_gx_setpolicy(struct cpufreq_policy *policy) +{ + + if (!gx_driver || !stock_freq || !policy) + return -EINVAL; + + policy->cpu = 0; + + if (policy->policy == CPUFREQ_POLICY_POWERSAVE) { + /* here we need to make sure that we don't set the + * frequency below policy->min (see comment in + * cpufreq_gx_verify() - guarantee of processing + * capacity. + */ + u8 tmp1, tmp2; + unsigned int tmp_freq = gx_validate_speed(policy->min, &tmp1, &tmp2); + while (tmp_freq < policy->min) { + tmp_freq += stock_freq / max_duration; + tmp_freq = gx_validate_speed(tmp_freq, &tmp1, &tmp2); + } + gx_set_cpuspeed(tmp_freq); + } else { + gx_set_cpuspeed(policy->max); + } + return 0; +} + +/* + * cpufreq_gx_init: + * MediaGX/Geode GX initilize cpufreq driver + */ + +static int __init cpufreq_gx_init(void) +{ + int maxfreq,ret,curfreq; + struct cpufreq_driver *driver; + struct gxfreq_params *params; + struct pci_dev *gx_pci; + u32 class_rev; + + /* Test if we have the right hardware */ + if ((gx_pci = gx_detect_chipset()) == NULL) + return -ENODEV; + + /* check whether module parameters are sane */ + if (max_duration > 0xff) + max_duration = 0xff; + + dprintk("geode suspend modulation available.\n"); + + driver = kmalloc(sizeof(struct cpufreq_driver) + NR_CPUS * sizeof(struct cpufreq_policy), GFP_KERNEL); + if (driver == NULL) + return -ENOMEM; + params = kmalloc(sizeof(struct gxfreq_params), GFP_KERNEL); + if (params == NULL) { + kfree(driver); + return -ENOMEM; + } + + driver->policy = (struct cpufreq_policy *)(driver + 1); + params->cs55x0 = gx_pci; + + /* keep cs55x0 configurations */ + pci_read_config_byte(params->cs55x0, PCI_SUSCFG, &(params->pci_suscfg)); + pci_read_config_byte(params->cs55x0, PCI_PMER1, &(params->pci_pmer1)); + pci_read_config_byte(params->cs55x0, PCI_PMER2, &(params->pci_pmer2)); + pci_read_config_byte(params->cs55x0, PCI_MODON, &(params->on_duration)); + pci_read_config_byte(params->cs55x0, PCI_MODOFF, &(params->off_duration)); + pci_read_config_dword(params->cs55x0, PCI_CLASS_REVISION, &class_rev); + params->pci_rev = class_rev && 0xff; + + gx_params = params; + + /* determine maximum frequency */ + if (pci_busclk) { + maxfreq = pci_busclk * gx_freq_mult[getCx86(CX86_DIR1) & 0x0f]; + } else if (cpu_khz) { + maxfreq = cpu_khz; + } else { + maxfreq = 30000 * gx_freq_mult[getCx86(CX86_DIR1) & 0x0f]; + } + stock_freq = maxfreq; + curfreq = gx_get_cpuspeed(); + + dprintk("cpu max frequency is %d.\n", maxfreq); + dprintk("cpu current frequency is %dkHz.\n",curfreq); + + /* setup basic struct for cpufreq API */ +#ifdef CONFIG_CPU_FREQ_24_API + driver->cpu_cur_freq[0] = curfreq; +#endif + driver->policy[0].cpu = 0; + + if (max_duration < POLICY_MIN_DIV) + driver->policy[0].min = maxfreq / max_duration; + else + driver->policy[0].min = maxfreq / POLICY_MIN_DIV; + driver->policy[0].max = maxfreq; + driver->policy[0].policy = CPUFREQ_POLICY_PERFORMANCE; + driver->policy[0].cpuinfo.min_freq = maxfreq / max_duration; + driver->policy[0].cpuinfo.max_freq = maxfreq; + driver->policy[0].cpuinfo.transition_latency = CPUFREQ_ETERNAL; + driver->verify = &cpufreq_gx_verify; + driver->setpolicy = &cpufreq_gx_setpolicy; + + gx_driver = driver; + + if ((ret = cpufreq_register(driver))) { + kfree(driver); + kfree(params); + return ret; /* register error! */ + } + + return 0; +} + +static void __exit cpufreq_gx_exit(void) +{ + if (gx_driver) { + /* disable throttling */ + gx_set_cpuspeed(stock_freq); + cpufreq_unregister(); + kfree(gx_driver); + kfree(gx_params); + } +} + +MODULE_AUTHOR ("Hiroshi Miura "); +MODULE_DESCRIPTION ("Cpufreq driver for Cyrix MediaGX and NatSemi Geode"); +MODULE_LICENSE ("GPL"); + +module_init(cpufreq_gx_init); +module_exit(cpufreq_gx_exit); + diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/i386/kernel/head.S linux.21rc1-ac1/arch/i386/kernel/head.S --- linux.21rc1/arch/i386/kernel/head.S 2003-04-22 16:39:33.000000000 +0100 +++ linux.21rc1-ac1/arch/i386/kernel/head.S 2003-04-22 16:44:36.000000000 +0100 @@ -445,4 +445,15 @@ .quad 0x00409a0000000000 /* 0x48 APM CS code */ .quad 0x00009a0000000000 /* 0x50 APM CS 16 code (16 bit) */ .quad 0x0040920000000000 /* 0x58 APM DS data */ + /* Segments used for calling PnP BIOS */ + .quad 0x00c09a0000000000 /* 0x60 32-bit code */ + .quad 0x00809a0000000000 /* 0x68 16-bit code */ + .quad 0x0080920000000000 /* 0x70 16-bit data */ + .quad 0x0080920000000000 /* 0x78 16-bit data */ + .quad 0x0080920000000000 /* 0x80 16-bit data */ + .quad 0x0000000000000000 /* 0x88 not used */ + .quad 0x0000000000000000 /* 0x90 not used */ + .quad 0x0000000000000000 /* 0x98 not used */ + /* Per CPU segments */ .fill NR_CPUS*4,8,0 /* space for TSS's and LDT's */ + diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/i386/kernel/i386_ksyms.c linux.21rc1-ac1/arch/i386/kernel/i386_ksyms.c --- linux.21rc1/arch/i386/kernel/i386_ksyms.c 2003-04-22 16:39:33.000000000 +0100 +++ linux.21rc1-ac1/arch/i386/kernel/i386_ksyms.c 2003-04-22 16:44:36.000000000 +0100 @@ -28,6 +28,7 @@ #include #include #include +#include extern void dump_thread(struct pt_regs *, struct user *); extern spinlock_t rtc_lock; @@ -49,6 +50,7 @@ EXPORT_SYMBOL(drive_info); #endif +extern unsigned long cpu_khz; extern unsigned long get_cmos_time(void); /* platform dependent support */ @@ -71,6 +73,7 @@ EXPORT_SYMBOL(pm_idle); EXPORT_SYMBOL(pm_power_off); EXPORT_SYMBOL(get_cmos_time); +EXPORT_SYMBOL(cpu_khz); EXPORT_SYMBOL(apm_info); EXPORT_SYMBOL(gdt); EXPORT_SYMBOL(empty_zero_page); @@ -130,6 +133,7 @@ EXPORT_SYMBOL(cpu_data); EXPORT_SYMBOL(kernel_flag_cacheline); EXPORT_SYMBOL(smp_num_cpus); +EXPORT_SYMBOL(smp_num_siblings); EXPORT_SYMBOL(cpu_online_map); EXPORT_SYMBOL_NOVERS(__write_lock_failed); EXPORT_SYMBOL_NOVERS(__read_lock_failed); @@ -180,3 +184,8 @@ #ifdef CONFIG_MULTIQUAD EXPORT_SYMBOL(xquad_portio); #endif + +#ifdef CONFIG_EDD_MODULE +EXPORT_SYMBOL(edd); +EXPORT_SYMBOL(eddnr); +#endif diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/i386/kernel/i387.c linux.21rc1-ac1/arch/i386/kernel/i387.c --- linux.21rc1/arch/i386/kernel/i387.c 2003-04-22 16:38:54.000000000 +0100 +++ linux.21rc1-ac1/arch/i386/kernel/i387.c 2003-04-22 16:44:36.000000000 +0100 @@ -248,7 +248,7 @@ * FXSR floating point environment conversions. */ -static inline int convert_fxsr_to_user( struct _fpstate *buf, +static int convert_fxsr_to_user( struct _fpstate *buf, struct i387_fxsave_struct *fxsave ) { unsigned long env[7]; @@ -270,13 +270,18 @@ to = &buf->_st[0]; from = (struct _fpxreg *) &fxsave->st_space[0]; for ( i = 0 ; i < 8 ; i++, to++, from++ ) { - if ( __copy_to_user( to, from, sizeof(*to) ) ) + unsigned long *t = (unsigned long *)to; + unsigned long *f = (unsigned long *)from; + + if (__put_user(*f, t) || + __put_user(*(f + 1), t + 1) || + __put_user(from->exponent, &to->exponent)) return 1; } return 0; } -static inline int convert_fxsr_from_user( struct i387_fxsave_struct *fxsave, +static int convert_fxsr_from_user( struct i387_fxsave_struct *fxsave, struct _fpstate *buf ) { unsigned long env[7]; @@ -299,7 +304,12 @@ to = (struct _fpxreg *) &fxsave->st_space[0]; from = &buf->_st[0]; for ( i = 0 ; i < 8 ; i++, to++, from++ ) { - if ( __copy_from_user( to, from, sizeof(*from) ) ) + unsigned long *t = (unsigned long *)to; + unsigned long *f = (unsigned long *)from; + + if (__get_user(*t, f) || + __get_user(*(t + 1), f + 1) || + __get_user(to->exponent, &from->exponent)) return 1; } return 0; @@ -321,7 +331,7 @@ return 1; } -static inline int save_i387_fxsave( struct _fpstate *buf ) +static int save_i387_fxsave( struct _fpstate *buf ) { struct task_struct *tsk = current; int err = 0; @@ -371,7 +381,7 @@ sizeof(struct i387_fsave_struct) ); } -static inline int restore_i387_fxsave( struct _fpstate *buf ) +static int restore_i387_fxsave( struct _fpstate *buf ) { struct task_struct *tsk = current; clear_fpu( tsk ); @@ -389,7 +399,7 @@ if ( HAVE_HWFP ) { if ( cpu_has_fxsr ) { - err = restore_i387_fxsave( buf ); + err = restore_i387_fxsave( buf ); } else { err = restore_i387_fsave( buf ); } diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/i386/kernel/io_apic.c linux.21rc1-ac1/arch/i386/kernel/io_apic.c --- linux.21rc1/arch/i386/kernel/io_apic.c 2003-04-22 16:39:33.000000000 +0100 +++ linux.21rc1-ac1/arch/i386/kernel/io_apic.c 2003-04-22 16:59:15.000000000 +0100 @@ -188,6 +188,86 @@ clear_IO_APIC_pin(apic, pin); } +static void set_ioapic_affinity (unsigned int irq, unsigned long mask) +{ + unsigned long flags; + + /* + * Only the first 8 bits are valid. + */ + mask = mask << 24; + spin_lock_irqsave(&ioapic_lock, flags); + __DO_ACTION(1, = mask, ) + spin_unlock_irqrestore(&ioapic_lock, flags); +} + +#if CONFIG_SMP + +typedef struct { + unsigned int cpu; + unsigned long timestamp; +} ____cacheline_aligned irq_balance_t; + +static irq_balance_t irq_balance[NR_IRQS] __cacheline_aligned + = { [ 0 ... NR_IRQS-1 ] = { 0, 0 } }; + +extern unsigned long irq_affinity [NR_IRQS]; + +#endif + +#define IDLE_ENOUGH(cpu,now) \ + (idle_cpu(cpu) && ((now) - irq_stat[(cpu)].idle_timestamp > 1)) + +#define IRQ_ALLOWED(cpu,allowed_mask) \ + ((1 << cpu) & (allowed_mask)) + +static unsigned long move(int curr_cpu, unsigned long allowed_mask, unsigned long now, int direction) +{ + int search_idle = 1; + int cpu = curr_cpu; + + goto inside; + + do { + if (unlikely(cpu == curr_cpu)) + search_idle = 0; +inside: + if (direction == 1) { + cpu++; + if (cpu >= smp_num_cpus) + cpu = 0; + } else { + cpu--; + if (cpu == -1) + cpu = smp_num_cpus-1; + } + } while (!IRQ_ALLOWED(cpu,allowed_mask) || + (search_idle && !IDLE_ENOUGH(cpu,now))); + + return cpu; +} + +static inline void balance_irq(int irq) +{ +#if CONFIG_SMP + irq_balance_t *entry = irq_balance + irq; + unsigned long now = jiffies; + + if (unlikely(entry->timestamp != now)) { + unsigned long allowed_mask; + int random_number; + + rdtscl(random_number); + random_number &= 1; + + allowed_mask = cpu_online_map & irq_affinity[irq]; + entry->timestamp = now; + entry->cpu = move(entry->cpu, allowed_mask, now, random_number); + set_ioapic_affinity(irq, apicid_to_phys_cpu_present(entry->cpu)); + } +#endif +} + /* * support for broken MP BIOSs, enables hand-redirection of PIRQ0-7 to * specific CPU-side IRQs. @@ -1221,6 +1301,7 @@ */ static void ack_edge_ioapic_irq(unsigned int irq) { + balance_irq(irq); if ((irq_desc[irq].status & (IRQ_PENDING | IRQ_DISABLED)) == (IRQ_PENDING | IRQ_DISABLED)) mask_IO_APIC_irq(irq); @@ -1260,6 +1341,7 @@ unsigned long v; int i; + balance_irq(irq); /* * It appears there is an erratum which affects at least version 0x11 * of I/O APIC (that's the 82093AA and cores integrated into various @@ -1316,19 +1398,6 @@ static void mask_and_ack_level_ioapic_irq (unsigned int irq) { /* nothing */ } -static void set_ioapic_affinity (unsigned int irq, unsigned long mask) -{ - unsigned long flags; - /* - * Only the first 8 bits are valid. - */ - mask = mask << 24; - - spin_lock_irqsave(&ioapic_lock, flags); - __DO_ACTION(1, = mask, ) - spin_unlock_irqrestore(&ioapic_lock, flags); -} - /* * Level and edge triggered IO-APIC interrupts need different handling, * so we use two separate IRQ descriptors. Edge triggered IRQs can be diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/i386/kernel/irq.c linux.21rc1-ac1/arch/i386/kernel/irq.c --- linux.21rc1/arch/i386/kernel/irq.c 2003-04-22 16:38:54.000000000 +0100 +++ linux.21rc1-ac1/arch/i386/kernel/irq.c 2003-04-22 16:44:36.000000000 +0100 @@ -1090,7 +1090,7 @@ static struct proc_dir_entry * smp_affinity_entry [NR_IRQS]; -static unsigned long irq_affinity [NR_IRQS] = { [0 ... NR_IRQS-1] = ~0UL }; +unsigned long irq_affinity [NR_IRQS] = { [0 ... NR_IRQS-1] = ~0UL }; static int irq_affinity_read_proc (char *page, char **start, off_t off, int count, int *eof, void *data) { diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/i386/kernel/ldt.c linux.21rc1-ac1/arch/i386/kernel/ldt.c --- linux.21rc1/arch/i386/kernel/ldt.c 2003-04-22 16:38:54.000000000 +0100 +++ linux.21rc1-ac1/arch/i386/kernel/ldt.c 2003-04-22 16:44:36.000000000 +0100 @@ -12,37 +12,139 @@ #include #include #include +#include #include #include #include #include +#ifdef CONFIG_SMP /* avoids "defined but not used" warnig */ +static void flush_ldt(void *mm) +{ + if (current->active_mm) + load_LDT(¤t->active_mm->context); +} +#endif + +static int alloc_ldt(mm_context_t *pc, int mincount, int reload) +{ + void *oldldt; + void *newldt; + int oldsize; + + if (mincount <= pc->size) + return 0; + oldsize = pc->size; + mincount = (mincount+511)&(~511); + if (mincount*LDT_ENTRY_SIZE > PAGE_SIZE) + newldt = vmalloc(mincount*LDT_ENTRY_SIZE); + else + newldt = kmalloc(mincount*LDT_ENTRY_SIZE, GFP_KERNEL); + + if (!newldt) + return -ENOMEM; + + if (oldsize) + memcpy(newldt, pc->ldt, oldsize*LDT_ENTRY_SIZE); + + oldldt = pc->ldt; + memset(newldt+oldsize*LDT_ENTRY_SIZE, 0, (mincount-oldsize)*LDT_ENTRY_SIZE); + wmb(); + pc->ldt = newldt; + pc->size = mincount; + if (reload) { + load_LDT(pc); +#ifdef CONFIG_SMP + if (current->mm->cpu_vm_mask != (1< PAGE_SIZE) + vfree(oldldt); + else + kfree(oldldt); + } + return 0; +} + +static inline int copy_ldt(mm_context_t *new, mm_context_t *old) +{ + int err = alloc_ldt(new, old->size, 0); + if (err < 0) { + printk(KERN_WARNING "ldt allocation failed\n"); + new->size = 0; + return err; + } + memcpy(new->ldt, old->ldt, old->size*LDT_ENTRY_SIZE); + return 0; +} + +/* + * we do not have to muck with descriptors here, that is + * done in switch_mm() as needed. + */ +int init_new_context(struct task_struct *tsk, struct mm_struct *mm) +{ + struct mm_struct * old_mm; + int retval = 0; + + init_MUTEX(&mm->context.sem); + mm->context.size = 0; + old_mm = current->mm; + if (old_mm && old_mm->context.size > 0) { + down(&old_mm->context.sem); + retval = copy_ldt(&mm->context, &old_mm->context); + up(&old_mm->context.sem); + } + return retval; +} + /* - * read_ldt() is not really atomic - this is not a problem since - * synchronization of reads and writes done to the LDT has to be - * assured by user-space anyway. Writes are atomic, to protect - * the security checks done on new descriptors. + * No need to lock the MM as we are the last user + * Do not touch the ldt register, we are already + * in the next thread. */ +void destroy_context(struct mm_struct *mm) +{ + if (mm->context.size) { + if (mm->context.size*LDT_ENTRY_SIZE > PAGE_SIZE) + vfree(mm->context.ldt); + else + kfree(mm->context.ldt); + mm->context.size = 0; + } +} + static int read_ldt(void * ptr, unsigned long bytecount) { int err; unsigned long size; struct mm_struct * mm = current->mm; - err = 0; - if (!mm->context.segments) - goto out; + if (!mm->context.size) + return 0; + if (bytecount > LDT_ENTRY_SIZE*LDT_ENTRIES) + bytecount = LDT_ENTRY_SIZE*LDT_ENTRIES; - size = LDT_ENTRIES*LDT_ENTRY_SIZE; + down(&mm->context.sem); + size = mm->context.size*LDT_ENTRY_SIZE; if (size > bytecount) size = bytecount; - err = size; - if (copy_to_user(ptr, mm->context.segments, size)) + err = 0; + if (copy_to_user(ptr, mm->context.ldt, size)) err = -EFAULT; -out: - return err; + up(&mm->context.sem); + if (err < 0) + return err; + if (size != bytecount) { + /* zero-fill the rest */ + clear_user(ptr+size, bytecount-size); + } + return bytecount; } static int read_default_ldt(void * ptr, unsigned long bytecount) @@ -53,7 +155,7 @@ err = 0; address = &default_ldt[0]; - size = sizeof(struct desc_struct); + size = 5*sizeof(struct desc_struct); if (size > bytecount) size = bytecount; @@ -88,24 +190,14 @@ goto out; } - /* - * the GDT index of the LDT is allocated dynamically, and is - * limited by MAX_LDT_DESCRIPTORS. - */ - down_write(&mm->mmap_sem); - if (!mm->context.segments) { - void * segments = vmalloc(LDT_ENTRIES*LDT_ENTRY_SIZE); - error = -ENOMEM; - if (!segments) + down(&mm->context.sem); + if (ldt_info.entry_number >= mm->context.size) { + error = alloc_ldt(¤t->mm->context, ldt_info.entry_number+1, 1); + if (error < 0) goto out_unlock; - memset(segments, 0, LDT_ENTRIES*LDT_ENTRY_SIZE); - wmb(); - mm->context.segments = segments; - mm->context.cpuvalid = 1UL << smp_processor_id(); - load_LDT(mm); } - lp = (__u32 *) ((ldt_info.entry_number << 3) + (char *) mm->context.segments); + lp = (__u32 *) ((ldt_info.entry_number << 3) + (char *) mm->context.ldt); /* Allow LDTs to be cleared by the user. */ if (ldt_info.base_addr == 0 && ldt_info.limit == 0) { @@ -143,7 +235,7 @@ error = 0; out_unlock: - up_write(&mm->mmap_sem); + up(&mm->context.sem); out: return error; } diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/i386/kernel/longhaul.c linux.21rc1-ac1/arch/i386/kernel/longhaul.c --- linux.21rc1/arch/i386/kernel/longhaul.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.21rc1-ac1/arch/i386/kernel/longhaul.c 2003-04-22 16:44:36.000000000 +0100 @@ -0,0 +1,813 @@ +/* + * $Id: longhaul.c,v 1.83 2003/01/02 22:16:26 db Exp $ + * + * (C) 2001 Dave Jones. + * (C) 2002 Padraig Brady. + * + * Licensed under the terms of the GNU GPL License version 2. + * Based upon datasheets & sample CPUs kindly provided by VIA. + * + * VIA have currently 3 different versions of Longhaul. + * + * +---------------------+----------+---------------------------------+ + * | Marketing name | Codename | longhaul version / features. | + * +---------------------+----------+---------------------------------+ + * | Samuel/CyrixIII | C5A | v1 : multipliers only | + * | Samuel2/C3 | C3E/C5B | v1 : multiplier only | + * | Ezra | C5C | v2 : multipliers & voltage | + * | Ezra-T | C5M/C5N | v3 : multipliers, voltage & FSB | + * +---------------------+----------+---------------------------------+ + * + * BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous* + */ + +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#define DEBUG + +#ifdef DEBUG +#define dprintk(msg...) printk(msg) +#else +#define dprintk(msg...) do { } while(0); +#endif + +static int numscales=16, numvscales; +static int minvid, maxvid; +static int can_scale_voltage; +static int can_scale_fsb; +static int vrmrev; + + +/* Module parameters */ +static int dont_scale_voltage; +static int dont_scale_fsb; +static int current_fsb; + +#define __hlt() __asm__ __volatile__("hlt": : :"memory") + +/* + * Clock ratio tables. + * The eblcr ones specify the ratio read from the CPU. + * The clock_ratio ones specify what to write to the CPU. + */ + +/* VIA C3 Samuel 1 & Samuel 2 (stepping 0)*/ +static int __initdata longhaul1_clock_ratio[16] = { + -1, /* 0000 -> RESERVED */ + 30, /* 0001 -> 3.0x */ + 40, /* 0010 -> 4.0x */ + -1, /* 0011 -> RESERVED */ + -1, /* 0100 -> RESERVED */ + 35, /* 0101 -> 3.5x */ + 45, /* 0110 -> 4.5x */ + 55, /* 0111 -> 5.5x */ + 60, /* 1000 -> 6.0x */ + 70, /* 1001 -> 7.0x */ + 80, /* 1010 -> 8.0x */ + 50, /* 1011 -> 5.0x */ + 65, /* 1100 -> 6.5x */ + 75, /* 1101 -> 7.5x */ + -1, /* 1110 -> RESERVED */ + -1, /* 1111 -> RESERVED */ +}; + +static int __initdata samuel1_eblcr[16] = { + 50, /* 0000 -> RESERVED */ + 30, /* 0001 -> 3.0x */ + 40, /* 0010 -> 4.0x */ + -1, /* 0011 -> RESERVED */ + 55, /* 0100 -> 5.5x */ + 35, /* 0101 -> 3.5x */ + 45, /* 0110 -> 4.5x */ + -1, /* 0111 -> RESERVED */ + -1, /* 1000 -> RESERVED */ + 70, /* 1001 -> 7.0x */ + 80, /* 1010 -> 8.0x */ + 60, /* 1011 -> 6.0x */ + -1, /* 1100 -> RESERVED */ + 75, /* 1101 -> 7.5x */ + -1, /* 1110 -> RESERVED */ + 65, /* 1111 -> 6.5x */ +}; + +/* VIA C3 Samuel2 Stepping 1->15 & VIA C3 Ezra */ +static int __initdata longhaul2_clock_ratio[16] = { + 100, /* 0000 -> 10.0x */ + 30, /* 0001 -> 3.0x */ + 40, /* 0010 -> 4.0x */ + 90, /* 0011 -> 9.0x */ + 95, /* 0100 -> 9.5x */ + 35, /* 0101 -> 3.5x */ + 45, /* 0110 -> 4.5x */ + 55, /* 0111 -> 5.5x */ + 60, /* 1000 -> 6.0x */ + 70, /* 1001 -> 7.0x */ + 80, /* 1010 -> 8.0x */ + 50, /* 1011 -> 5.0x */ + 65, /* 1100 -> 6.5x */ + 75, /* 1101 -> 7.5x */ + 85, /* 1110 -> 8.5x */ + 120, /* 1111 -> 12.0x */ +}; + +static int __initdata samuel2_eblcr[16] = { + 50, /* 0000 -> 5.0x */ + 30, /* 0001 -> 3.0x */ + 40, /* 0010 -> 4.0x */ + 100, /* 0011 -> 10.0x */ + 55, /* 0100 -> 5.5x */ + 35, /* 0101 -> 3.5x */ + 45, /* 0110 -> 4.5x */ + 110, /* 0111 -> 11.0x */ + 90, /* 1000 -> 9.0x */ + 70, /* 1001 -> 7.0x */ + 80, /* 1010 -> 8.0x */ + 60, /* 1011 -> 6.0x */ + 120, /* 1100 -> 12.0x */ + 75, /* 1101 -> 7.5x */ + 130, /* 1110 -> 13.0x */ + 65, /* 1111 -> 6.5x */ +}; + +static int __initdata ezra_eblcr[16] = { + 50, /* 0000 -> 5.0x */ + 30, /* 0001 -> 3.0x */ + 40, /* 0010 -> 4.0x */ + 100, /* 0011 -> 10.0x */ + 55, /* 0100 -> 5.5x */ + 35, /* 0101 -> 3.5x */ + 45, /* 0110 -> 4.5x */ + 95, /* 0111 -> 9.5x */ + 90, /* 1000 -> 9.0x */ + 70, /* 1001 -> 7.0x */ + 80, /* 1010 -> 8.0x */ + 60, /* 1011 -> 6.0x */ + 120, /* 1100 -> 12.0x */ + 75, /* 1101 -> 7.5x */ + 85, /* 1110 -> 8.5x */ + 65, /* 1111 -> 6.5x */ +}; + +/* VIA C5M. */ +static int __initdata longhaul3_clock_ratio[32] = { + 100, /* 0000 -> 10.0x */ + 30, /* 0001 -> 3.0x */ + 40, /* 0010 -> 4.0x */ + 90, /* 0011 -> 9.0x */ + 95, /* 0100 -> 9.5x */ + 35, /* 0101 -> 3.5x */ + 45, /* 0110 -> 4.5x */ + 55, /* 0111 -> 5.5x */ + 60, /* 1000 -> 6.0x */ + 70, /* 1001 -> 7.0x */ + 80, /* 1010 -> 8.0x */ + 50, /* 1011 -> 5.0x */ + 65, /* 1100 -> 6.5x */ + 75, /* 1101 -> 7.5x */ + 85, /* 1110 -> 8.5x */ + 120, /* 1111 -> 12.0x */ + + -1, /* 0000 -> RESERVED (10.0x) */ + 110, /* 0001 -> 11.0x */ + 120, /* 0010 -> 12.0x */ + -1, /* 0011 -> RESERVED (9.0x)*/ + 105, /* 0100 -> 10.5x */ + 115, /* 0101 -> 11.5x */ + 125, /* 0110 -> 12.5x */ + 135, /* 0111 -> 13.5x */ + 140, /* 1000 -> 14.0x */ + 150, /* 1001 -> 15.0x */ + 160, /* 1010 -> 16.0x */ + 130, /* 1011 -> 13.0x */ + 145, /* 1100 -> 14.5x */ + 155, /* 1101 -> 15.5x */ + -1, /* 1110 -> RESERVED (13.0x) */ + -1, /* 1111 -> RESERVED (12.0x) */ +}; + +static int __initdata c5m_eblcr[32] = { + 50, /* 0000 -> 5.0x */ + 30, /* 0001 -> 3.0x */ + 40, /* 0010 -> 4.0x */ + 100, /* 0011 -> 10.0x */ + 55, /* 0100 -> 5.5x */ + 35, /* 0101 -> 3.5x */ + 45, /* 0110 -> 4.5x */ + 95, /* 0111 -> 9.5x */ + 90, /* 1000 -> 9.0x */ + 70, /* 1001 -> 7.0x */ + 80, /* 1010 -> 8.0x */ + 60, /* 1011 -> 6.0x */ + 120, /* 1100 -> 12.0x */ + 75, /* 1101 -> 7.5x */ + 85, /* 1110 -> 8.5x */ + 65, /* 1111 -> 6.5x */ + + -1, /* 0000 -> RESERVED (9.0x) */ + 110, /* 0001 -> 11.0x */ + 120, /* 0010 -> 12.0x */ + -1, /* 0011 -> RESERVED (10.0x)*/ + 135, /* 0100 -> 13.5x */ + 115, /* 0101 -> 11.5x */ + 125, /* 0110 -> 12.5x */ + 105, /* 0111 -> 10.5x */ + 130, /* 1000 -> 13.0x */ + 150, /* 1001 -> 15.0x */ + 160, /* 1010 -> 16.0x */ + 140, /* 1011 -> 14.0x */ + -1, /* 1100 -> RESERVED (12.0x) */ + 155, /* 1101 -> 15.5x */ + -1, /* 1110 -> RESERVED (13.0x) */ + 145, /* 1111 -> 14.5x */ +}; + +/* fsb values as defined in CPU */ +static unsigned int eblcr_fsb_table[] = { 66, 133, 100, -1 }; +/* fsb values to favour low fsb speed (lower power) */ +static unsigned int power_fsb_table[] = { 66, 100, 133, -1 }; +/* fsb values to favour high fsb speed (for e.g. if lowering CPU + freq because of heat, but want to maintain highest performance possible) */ +static unsigned int perf_fsb_table[] = { 133, 100, 66, -1 }; +static unsigned int *fsb_search_table; + +/* Voltage scales. Div by 1000 to get actual voltage. */ +static int __initdata vrm85scales[32] = { + 1250, 1200, 1150, 1100, 1050, 1800, 1750, 1700, + 1650, 1600, 1550, 1500, 1450, 1400, 1350, 1300, + 1275, 1225, 1175, 1125, 1075, 1825, 1775, 1725, + 1675, 1625, 1575, 1525, 1475, 1425, 1375, 1325, +}; + +static int __initdata mobilevrmscales[32] = { + 2000, 1950, 1900, 1850, 1800, 1750, 1700, 1650, + 1600, 1550, 1500, 1450, 1500, 1350, 1300, -1, + 1275, 1250, 1225, 1200, 1175, 1150, 1125, 1100, + 1075, 1050, 1025, 1000, 975, 950, 925, -1, +}; + +/* Clock ratios multiplied by 10 */ +static int clock_ratio[32]; +static int eblcr_table[32]; +static int voltage_table[32]; +static int highest_speed, lowest_speed; /* kHz */ +static int longhaul; /* version. */ +static struct cpufreq_driver *longhaul_driver; + + +static int longhaul_get_cpu_fsb (void) +{ + unsigned long invalue=0,lo, hi; + + if (current_fsb == 0) { + rdmsr (MSR_IA32_EBL_CR_POWERON, lo, hi); + invalue = (lo & (1<<18|1<<19)) >>18; + return eblcr_fsb_table[invalue]; + } else { + return current_fsb; + } +} + + +static int longhaul_get_cpu_mult (void) +{ + unsigned long invalue=0,lo, hi; + + rdmsr (MSR_IA32_EBL_CR_POWERON, lo, hi); + invalue = (lo & (1<<22|1<<23|1<<24|1<<25)) >>22; + if (longhaul==3) { + if (lo & (1<<27)) + invalue+=16; + } + return eblcr_table[invalue]; +} + + +/** + * longhaul_set_cpu_frequency() + * @clock_ratio_index : index of clock_ratio[] for new frequency + * @newfsb: the new FSB + * + * Sets a new clock ratio, and -if applicable- a new Front Side Bus + */ + +static void longhaul_setstate (unsigned int clock_ratio_index, unsigned int newfsb) +{ + unsigned long lo, hi; + unsigned int bits; + int revkey; + int vidindex, i; + struct cpufreq_freqs freqs; + + if (!newfsb || (clock_ratio[clock_ratio_index] == -1)) + return; + + if ((!can_scale_fsb) && (newfsb != current_fsb)) + return; + + if (((clock_ratio[clock_ratio_index] * newfsb * 100) > highest_speed) || + ((clock_ratio[clock_ratio_index] * newfsb * 100) < lowest_speed)) + return; + + freqs.old = longhaul_get_cpu_mult() * longhaul_get_cpu_fsb() * 100; + freqs.new = clock_ratio[clock_ratio_index] * newfsb * 100; + freqs.cpu = 0; /* longhaul.c is UP only driver */ + + cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); + + dprintk (KERN_INFO "longhaul: New FSB:%d Mult(x10):%d\n", + newfsb, clock_ratio[clock_ratio_index]); + + bits = clock_ratio_index; + /* "bits" contains the bitpattern of the new multiplier. + we now need to transform it to the desired format. */ + + switch (longhaul) { + case 1: + rdmsr (MSR_VIA_BCR2, lo, hi); + revkey = (lo & 0xf)<<4; /* Rev key. */ + lo &= ~(1<<23|1<<24|1<<25|1<<26); + lo |= (1<<19); /* Enable software clock multiplier */ + lo |= (bits<<23); /* desired multiplier */ + lo |= revkey; + wrmsr (MSR_VIA_BCR2, lo, hi); + + __hlt(); + + /* Disable software clock multiplier */ + rdmsr (MSR_VIA_BCR2, lo, hi); + lo &= ~(1<<19); + lo |= revkey; + wrmsr (MSR_VIA_BCR2, lo, hi); + break; + + case 2: + rdmsr (MSR_VIA_LONGHAUL, lo, hi); + revkey = (lo & 0xf)<<4; /* Rev key. */ + lo &= 0xfff0bf0f; /* reset [19:16,14](bus ratio) and [7:4](rev key) to 0 */ + lo |= (bits<<16); + lo |= (1<<8); /* EnableSoftBusRatio */ + lo |= revkey; + + if (can_scale_voltage) { + if (can_scale_fsb==1) { + dprintk (KERN_INFO "longhaul: Voltage scaling + FSB scaling not done yet.\n"); + goto bad_voltage; + } else { + /* PB: TODO fix this up */ + vidindex = (((highest_speed-lowest_speed) / (newfsb/2)) - + ((highest_speed-((clock_ratio[clock_ratio_index] * newfsb * 100)/1000)) / (newfsb/2))); + } + for (i=0;i<32;i++) { + dprintk (KERN_INFO "VID hunting. Looking for %d, found %d\n", + minvid+(vidindex*25), voltage_table[i]); + if (voltage_table[i]==(minvid + (vidindex * 25))) + break; + } + if (i==32) + goto bad_voltage; + + dprintk (KERN_INFO "longhaul: Desired vid index=%d\n", i); +#if 0 + lo &= 0xfe0fffff;/* reset [24:20](voltage) to 0 */ + lo |= (i<<20); /* set voltage */ + lo |= (1<<9); /* EnableSoftVID */ +#endif + } + +bad_voltage: + wrmsr (MSR_VIA_LONGHAUL, lo, hi); + __hlt(); + + rdmsr (MSR_VIA_LONGHAUL, lo, hi); + lo &= ~(1<<8); + if (can_scale_voltage) + lo &= ~(1<<9); + lo |= revkey; + wrmsr (MSR_VIA_LONGHAUL, lo, hi); + break; + + case 3: + rdmsr (MSR_VIA_LONGHAUL, lo, hi); + revkey = (lo & 0xf)<<4; /* Rev key. */ + lo &= 0xfff0bf0f; /* reset longhaul[19:16,14] to 0 */ + lo |= (bits<<16); + lo |= (1<<8); /* EnableSoftBusRatio */ + lo |= revkey; + + /* Set FSB */ + if (can_scale_fsb==1) { + lo &= ~(1<<28|1<<29); + switch (newfsb) { + case 66: lo |= (1<<28|1<<29); /* 11 */ + break; + case 100: lo |= 1<<28; /* 01 */ + break; + case 133: break; /* 00*/ + } + } + wrmsr (MSR_VIA_LONGHAUL, lo, hi); + __hlt(); + + rdmsr (MSR_VIA_LONGHAUL, lo, hi); + lo &= ~(1<<8); + lo |= revkey; + wrmsr (MSR_VIA_LONGHAUL, lo, hi); + break; + } + + cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); +} + + +static void __init longhaul_get_ranges (void) +{ + unsigned long lo, hi, invalue; + unsigned int minmult=0, maxmult=0, minfsb=0, maxfsb=0; + unsigned int multipliers[32]= { + 50,30,40,100,55,35,45,95,90,70,80,60,120,75,85,65, + -1,110,120,-1,135,115,125,105,130,150,160,140,-1,155,-1,145 }; + unsigned int fsb_table[4] = { 133, 100, -1, 66 }; + + switch (longhaul) { + case 1: + /* Ugh, Longhaul v1 didn't have the min/max MSRs. + Assume min=3.0x & max = whatever we booted at. */ + minmult = 30; + maxmult = longhaul_get_cpu_mult(); + minfsb = maxfsb = current_fsb; + break; + + case 2 ... 3: + rdmsr (MSR_VIA_LONGHAUL, lo, hi); + + invalue = (hi & (1<<0|1<<1|1<<2|1<<3)); + if (hi & (1<<11)) + invalue += 16; + maxmult=multipliers[invalue]; + +#if 0 /* This is MaxMhz @ Min Voltage. Ignore for now */ + invalue = (hi & (1<<16|1<<17|1<<18|1<<19)) >> 16; + if (hi & (1<<27)) + invalue += 16; + minmult = multipliers[invalue]; +#else + minmult = 30; /* as per spec */ +#endif + + if (can_scale_fsb==1) { + invalue = (hi & (1<<9|1<<10)) >> 9; + maxfsb = fsb_table[invalue]; + + invalue = (hi & (1<<25|1<<26)) >> 25; + minfsb = fsb_table[invalue]; + + dprintk (KERN_INFO "longhaul: Min FSB=%d Max FSB=%d\n", + minfsb, maxfsb); + } else { + minfsb = maxfsb = current_fsb; + } + break; + } + + highest_speed = maxmult * maxfsb * 100; + lowest_speed = minmult * minfsb * 100; + + dprintk (KERN_INFO "longhaul: MinMult(x10)=%d MaxMult(x10)=%d\n", + minmult, maxmult); + dprintk (KERN_INFO "longhaul: Lowestspeed=%d Highestspeed=%d\n", + lowest_speed, highest_speed); +} + + +static void __init longhaul_setup_voltagescaling (unsigned long lo, unsigned long hi) +{ + int revkey; + + can_scale_voltage = 1; + + minvid = (hi & (1<<20|1<<21|1<<22|1<<23|1<<24)) >> 20; /* 56:52 */ + maxvid = (hi & (1<<4|1<<5|1<<6|1<<7|1<<8)) >> 4; /* 40:36 */ + vrmrev = (lo & (1<<15))>>15; + + if (vrmrev==0) { + dprintk (KERN_INFO "longhaul: VRM 8.5 : "); + memcpy (voltage_table, vrm85scales, sizeof(voltage_table)); + numvscales = (voltage_table[maxvid]-voltage_table[minvid])/25; + } else { + dprintk (KERN_INFO "longhaul: Mobile VRM : "); + memcpy (voltage_table, mobilevrmscales, sizeof(voltage_table)); + numvscales = (voltage_table[maxvid]-voltage_table[minvid])/5; + } + + /* Current voltage isn't readable at first, so we need to + set it to a known value. The spec says to use maxvid */ + revkey = (lo & 0xf)<<4; /* Rev key. */ + lo &= 0xfe0fff0f; /* Mask unneeded bits */ + lo |= (1<<9); /* EnableSoftVID */ + lo |= revkey; /* Reinsert key */ + lo |= maxvid << 20; + wrmsr (MSR_VIA_LONGHAUL, lo, hi); + minvid = voltage_table[minvid]; + maxvid = voltage_table[maxvid]; + dprintk ("Min VID=%d.%03d Max VID=%d.%03d, %d possible voltage scales\n", + maxvid/1000, maxvid%1000, minvid/1000, minvid%1000, numvscales); +} + + +static inline unsigned int longhaul_statecount_fsb(struct cpufreq_policy *policy, unsigned int fsb) { + unsigned int i, count = 0; + + for(i=0; imax) && + ((clock_ratio[i] * fsb * 100) >= policy->min)) + count++; + } + + return count; +} + + +static int longhaul_verify(struct cpufreq_policy *policy) +{ + unsigned int number_states = 0; + unsigned int i; + unsigned int fsb_index = 0; + unsigned int tmpfreq = 0; + unsigned int newmax = -1; + + if (!policy || !longhaul_driver) + return -EINVAL; + + policy->cpu = 0; + cpufreq_verify_within_limits(policy, lowest_speed, highest_speed); + + if (can_scale_fsb==1) { + for (fsb_index=0; fsb_search_table[fsb_index]!=-1; fsb_index++) + number_states += longhaul_statecount_fsb(policy, fsb_search_table[fsb_index]); + } else + number_states = longhaul_statecount_fsb(policy, current_fsb); + + if (number_states) + return 0; + + /* get frequency closest above current policy->max */ + if (can_scale_fsb==1) { + for (fsb_index=0; fsb_search_table[fsb_index] != -1; fsb_index++) + for(i=0; i policy->max) && + (tmpfreq < newmax)) + newmax = tmpfreq; + } + } else { + for(i=0; i policy->max) && + (tmpfreq < newmax)) + newmax = tmpfreq; + } + } + + policy->max = newmax; + + cpufreq_verify_within_limits(policy, lowest_speed, highest_speed); + + return 0; +} + + +static int longhaul_get_best_freq_for_fsb(struct cpufreq_policy *policy, + unsigned int min_mult, + unsigned int max_mult, + unsigned int fsb, + unsigned int *new_mult) +{ + unsigned int optimal = 0; + unsigned int found_optimal = 0; + unsigned int i; + + switch(policy->policy) { + case CPUFREQ_POLICY_POWERSAVE: + optimal = max_mult; + break; + case CPUFREQ_POLICY_PERFORMANCE: + optimal = min_mult; + } + + for(i=0; i policy->max) || + (freq < policy->min)) + continue; + switch(policy->policy) { + case CPUFREQ_POLICY_POWERSAVE: + if (clock_ratio[i] < clock_ratio[optimal]) { + found_optimal = 1; + optimal = i; + } + break; + case CPUFREQ_POLICY_PERFORMANCE: + if (clock_ratio[i] > clock_ratio[optimal]) { + found_optimal = 1; + optimal = i; + } + break; + } + } + + if (found_optimal) { + *new_mult = optimal; + return 1; + } + return 0; +} + + +static int longhaul_setpolicy (struct cpufreq_policy *policy) +{ + unsigned int i; + unsigned int fsb_index = 0; + unsigned int new_fsb = 0; + unsigned int new_clock_ratio = 0; + unsigned int min_mult = 0; + unsigned int max_mult = 0; + + + if (!longhaul_driver) + return -EINVAL; + + if (policy->policy==CPUFREQ_POLICY_PERFORMANCE) + fsb_search_table = perf_fsb_table; + else + fsb_search_table = power_fsb_table; + + for(i=0;i clock_ratio[i]) + min_mult = i; + } + + if (can_scale_fsb==1) { + unsigned int found = 0; + for (fsb_index=0; fsb_search_table[fsb_index]!=-1; fsb_index++) + { + if (longhaul_get_best_freq_for_fsb(policy, + min_mult, max_mult, + fsb_search_table[fsb_index], + &new_clock_ratio)) { + new_fsb = fsb_search_table[fsb_index]; + break; + } + } + if (!found) + return -EINVAL; + } else { + new_fsb = current_fsb; + if (!longhaul_get_best_freq_for_fsb(policy, min_mult, + max_mult, new_fsb, &new_clock_ratio)) + return -EINVAL; + } + + longhaul_setstate(new_clock_ratio, new_fsb); + + return 0; +} + + +static int __init longhaul_init (void) +{ + struct cpuinfo_x86 *c = cpu_data; + unsigned int currentspeed; + static int currentmult; + unsigned long lo, hi; + int ret; + struct cpufreq_driver *driver; + + if ((c->x86_vendor != X86_VENDOR_CENTAUR) || (c->x86 !=6) ) + return -ENODEV; + + switch (c->x86_model) { + case 6: /* VIA C3 Samuel C5A */ + longhaul=1; + memcpy (clock_ratio, longhaul1_clock_ratio, sizeof(longhaul1_clock_ratio)); + memcpy (eblcr_table, samuel1_eblcr, sizeof(samuel1_eblcr)); + break; + + case 7: /* C5B / C5C */ + switch (c->x86_mask) { + case 0: + longhaul=1; + memcpy (clock_ratio, longhaul1_clock_ratio, sizeof(longhaul1_clock_ratio)); + memcpy (eblcr_table, samuel2_eblcr, sizeof(samuel2_eblcr)); + break; + case 1 ... 15: + longhaul=2; + memcpy (clock_ratio, longhaul2_clock_ratio, sizeof(longhaul2_clock_ratio)); + memcpy (eblcr_table, ezra_eblcr, sizeof(ezra_eblcr)); + break; + } + break; + + case 8: /* C5M/C5N */ + return -ENODEV; // Waiting on updated docs from VIA before this is usable + longhaul=3; + numscales=32; + memcpy (clock_ratio, longhaul3_clock_ratio, sizeof(longhaul3_clock_ratio)); + memcpy (eblcr_table, c5m_eblcr, sizeof(c5m_eblcr)); + break; + + default: + printk (KERN_INFO "longhaul: Unknown VIA CPU. Contact davej@suse.de\n"); + return -ENODEV; + } + + printk (KERN_INFO "longhaul: VIA CPU detected. Longhaul version %d supported\n", longhaul); + + current_fsb = longhaul_get_cpu_fsb(); + currentmult = longhaul_get_cpu_mult(); + currentspeed = currentmult * current_fsb * 100; + + dprintk (KERN_INFO "longhaul: CPU currently at %dMHz (%d x %d.%d)\n", + (currentspeed/1000), current_fsb, currentmult/10, currentmult%10); + + if (longhaul==2 || longhaul==3) { + rdmsr (MSR_VIA_LONGHAUL, lo, hi); + if ((lo & (1<<0)) && (dont_scale_voltage==0)) + longhaul_setup_voltagescaling (lo, hi); + + if ((lo & (1<<1)) && (dont_scale_fsb==0) && (current_fsb==0)) + can_scale_fsb = 1; + } + + longhaul_get_ranges(); + + driver = kmalloc(sizeof(struct cpufreq_driver) + + NR_CPUS * sizeof(struct cpufreq_policy), GFP_KERNEL); + if (!driver) + return -ENOMEM; + + driver->policy = (struct cpufreq_policy *) (driver + 1); + +#ifdef CONFIG_CPU_FREQ_24_API + driver->cpu_cur_freq[0] = currentspeed; +#endif + + driver->verify = &longhaul_verify; + driver->setpolicy = &longhaul_setpolicy; + + driver->policy[0].cpu = 0; + driver->policy[0].min = (unsigned int) lowest_speed; + driver->policy[0].max = (unsigned int) highest_speed; + driver->policy[0].policy = CPUFREQ_POLICY_PERFORMANCE; + driver->policy[0].cpuinfo.min_freq = (unsigned int) lowest_speed; + driver->policy[0].cpuinfo.max_freq = (unsigned int) highest_speed; + driver->policy[0].cpuinfo.transition_latency = CPUFREQ_ETERNAL; + + longhaul_driver = driver; + + ret = cpufreq_register(driver); + if (ret) { + longhaul_driver = NULL; + kfree(driver); + } + + return ret; +} + + +static void __exit longhaul_exit (void) +{ + if (longhaul_driver) { + cpufreq_unregister(); + kfree(longhaul_driver); + } +} + +MODULE_PARM (dont_scale_fsb, "i"); +MODULE_PARM (dont_scale_voltage, "i"); +MODULE_PARM (current_fsb, "i"); + +MODULE_AUTHOR ("Dave Jones "); +MODULE_DESCRIPTION ("Longhaul driver for VIA Cyrix processors."); +MODULE_LICENSE ("GPL"); + +module_init(longhaul_init); +module_exit(longhaul_exit); + diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/i386/kernel/longrun.c linux.21rc1-ac1/arch/i386/kernel/longrun.c --- linux.21rc1/arch/i386/kernel/longrun.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.21rc1-ac1/arch/i386/kernel/longrun.c 2003-04-22 16:44:36.000000000 +0100 @@ -0,0 +1,292 @@ +/* + * $Id: longrun.c,v 1.18 2003/01/02 22:16:26 db Exp $ + * + * (C) 2002 Dominik Brodowski + * + * Licensed under the terms of the GNU GPL License version 2. + * + * BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous* + */ + +#include +#include +#include +#include +#include + +#include +#include +#include + +static struct cpufreq_driver *longrun_driver; + +/** + * longrun_{low,high}_freq is needed for the conversion of cpufreq kHz + * values into per cent values. In TMTA microcode, the following is valid: + * performance_pctg = (current_freq - low_freq)/(high_freq - low_freq) + */ +static unsigned int longrun_low_freq, longrun_high_freq; + + +/** + * longrun_get_policy - get the current LongRun policy + * @policy: struct cpufreq_policy where current policy is written into + * + * Reads the current LongRun policy by access to MSR_TMTA_LONGRUN_FLAGS + * and MSR_TMTA_LONGRUN_CTRL + */ +static void longrun_get_policy(struct cpufreq_policy *policy) +{ + u32 msr_lo, msr_hi; + + if (!longrun_driver) + return; + + rdmsr(MSR_TMTA_LONGRUN_FLAGS, msr_lo, msr_hi); + if (msr_lo & 0x01) + policy->policy = CPUFREQ_POLICY_PERFORMANCE; + else + policy->policy = CPUFREQ_POLICY_POWERSAVE; + + rdmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi); + msr_lo &= 0x0000007F; + msr_hi &= 0x0000007F; + + policy->min = longrun_low_freq + msr_lo * + ((longrun_high_freq - longrun_low_freq) / 100); + policy->min = longrun_low_freq + msr_hi * + ((longrun_high_freq - longrun_low_freq) / 100); + policy->cpu = 0; +} + + +/** + * longrun_set_policy - sets a new CPUFreq policy + * @policy - new policy + * + * Sets a new CPUFreq policy on LongRun-capable processors. This function + * has to be called with cpufreq_driver locked. + */ +static int longrun_set_policy(struct cpufreq_policy *policy) +{ + u32 msr_lo, msr_hi; + u32 pctg_lo, pctg_hi; + + if (!longrun_driver || !policy) + return -EINVAL; + + pctg_lo = (policy->min - longrun_low_freq) / + ((longrun_high_freq - longrun_low_freq) / 100); + pctg_hi = (policy->max - longrun_low_freq) / + ((longrun_high_freq - longrun_low_freq) / 100); + + if (pctg_hi > 100) + pctg_hi = 100; + if (pctg_lo > pctg_hi) + pctg_lo = pctg_hi; + + /* performance or economy mode */ + rdmsr(MSR_TMTA_LONGRUN_FLAGS, msr_lo, msr_hi); + msr_lo &= 0xFFFFFFFE; + switch (policy->policy) { + case CPUFREQ_POLICY_PERFORMANCE: + msr_lo |= 0x00000001; + break; + case CPUFREQ_POLICY_POWERSAVE: + break; + } + wrmsr(MSR_TMTA_LONGRUN_FLAGS, msr_lo, msr_hi); + + /* lower and upper boundary */ + rdmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi); + msr_lo &= 0xFFFFFF80; + msr_hi &= 0xFFFFFF80; + msr_lo |= pctg_lo; + msr_hi |= pctg_hi; + wrmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi); + + return 0; +} + + +/** + * longrun_verify_poliy - verifies a new CPUFreq policy + * + * Validates a new CPUFreq policy. This function has to be called with + * cpufreq_driver locked. + */ +static int longrun_verify_policy(struct cpufreq_policy *policy) +{ + if (!policy || !longrun_driver) + return -EINVAL; + + policy->cpu = 0; + cpufreq_verify_within_limits(policy, + longrun_driver->policy[0].cpuinfo.min_freq, + longrun_driver->policy[0].cpuinfo.max_freq); + + return 0; +} + + +/** + * longrun_determine_freqs - determines the lowest and highest possible core frequency + * + * Determines the lowest and highest possible core frequencies on this CPU. + * This is neccessary to calculate the performance percentage according to + * TMTA rules: + * performance_pctg = (target_freq - low_freq)/(high_freq - low_freq) + */ +static unsigned int __init longrun_determine_freqs(unsigned int *low_freq, + unsigned int *high_freq) +{ + u32 msr_lo, msr_hi; + u32 save_lo, save_hi; + u32 eax, ebx, ecx, edx; + struct cpuinfo_x86 *c = cpu_data; + + if (!low_freq || !high_freq) + return -EINVAL; + + if (cpu_has(c, X86_FEATURE_LRTI)) { + /* if the LongRun Table Interface is present, the + * detection is a bit easier: + * For minimum frequency, read out the maximum + * level (msr_hi), write that into "currently + * selected level", and read out the frequency. + * For maximum frequency, read out level zero. + */ + /* minimum */ + rdmsr(MSR_TMTA_LRTI_READOUT, msr_lo, msr_hi); + wrmsr(MSR_TMTA_LRTI_READOUT, msr_hi, msr_hi); + rdmsr(MSR_TMTA_LRTI_VOLT_MHZ, msr_lo, msr_hi); + *low_freq = msr_lo * 1000; /* to kHz */ + + /* maximum */ + wrmsr(MSR_TMTA_LRTI_READOUT, 0, msr_hi); + rdmsr(MSR_TMTA_LRTI_VOLT_MHZ, msr_lo, msr_hi); + *high_freq = msr_lo * 1000; /* to kHz */ + + if (*low_freq > *high_freq) + *low_freq = *high_freq; + return 0; + } + + /* set the upper border to the value determined during TSC init */ + *high_freq = (cpu_khz / 1000); + *high_freq = *high_freq * 1000; + + /* get current borders */ + rdmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi); + save_lo = msr_lo & 0x0000007F; + save_hi = msr_hi & 0x0000007F; + + /* if current perf_pctg is larger than 90%, we need to decrease the + * upper limit to make the calculation more accurate. + */ + cpuid(0x80860007, &eax, &ebx, &ecx, &edx); + if (ecx > 90) { + /* set to 0 to 80 perf_pctg */ + msr_lo &= 0xFFFFFF80; + msr_hi &= 0xFFFFFF80; + msr_lo |= 0; + msr_hi |= 80; + wrmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi); + + /* read out current core MHz and current perf_pctg */ + cpuid(0x80860007, &eax, &ebx, &ecx, &edx); + + /* restore values */ + wrmsr(MSR_TMTA_LONGRUN_CTRL, save_lo, save_hi); + } + + /* performance_pctg = (current_freq - low_freq)/(high_freq - low_freq) + * eqals + * low_freq * ( 1 - perf_pctg) = (cur_freq - high_freq * perf_pctg) + * + * high_freq * perf_pctg is stored tempoarily into "ebx". + */ + ebx = (((cpu_khz / 1000) * ecx) / 100); /* to MHz */ + + if ((ecx > 95) || (ecx == 0) || (eax < ebx)) + return -EIO; + + edx = (eax - ebx) / (100 - ecx); + *low_freq = edx * 1000; /* back to kHz */ + + if (*low_freq > *high_freq) + *low_freq = *high_freq; + + return 0; +} + + +/** + * longrun_init - initializes the Transmeta Crusoe LongRun CPUFreq driver + * + * Initializes the LongRun support. + */ +static int __init longrun_init(void) +{ + int result; + struct cpufreq_driver *driver; + struct cpuinfo_x86 *c = cpu_data; + + if (c->x86_vendor != X86_VENDOR_TRANSMETA || + !cpu_has(c, X86_FEATURE_LONGRUN)) + return 0; + + /* initialization of main "cpufreq" code*/ + driver = kmalloc(sizeof(struct cpufreq_driver) + + NR_CPUS * sizeof(struct cpufreq_policy), GFP_KERNEL); + if (!driver) + return -ENOMEM; + + driver->policy = (struct cpufreq_policy *) (driver + 1); + + if (longrun_determine_freqs(&longrun_low_freq, &longrun_high_freq)) { + kfree(driver); + return -EIO; + } + driver->policy[0].cpuinfo.min_freq = longrun_low_freq; + driver->policy[0].cpuinfo.max_freq = longrun_high_freq; + driver->policy[0].cpuinfo.transition_latency = CPUFREQ_ETERNAL; + + longrun_get_policy(&driver->policy[0]); + +#ifdef CONFIG_CPU_FREQ_24_API + driver->cpu_cur_freq[0] = longrun_high_freq; /* dummy value */ +#endif + + driver->verify = &longrun_verify_policy; + driver->setpolicy = &longrun_set_policy; + + longrun_driver = driver; + + result = cpufreq_register(driver); + if (result) { + longrun_driver = NULL; + kfree(driver); + } + + return result; +} + + +/** + * longrun_exit - unregisters LongRun support + */ +static void __exit longrun_exit(void) +{ + if (longrun_driver) { + cpufreq_unregister(); + kfree(longrun_driver); + } +} + + +MODULE_AUTHOR ("Dominik Brodowski "); +MODULE_DESCRIPTION ("LongRun driver for Transmeta Crusoe processors."); +MODULE_LICENSE ("GPL"); +module_init(longrun_init); +module_exit(longrun_exit); diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/i386/kernel/Makefile linux.21rc1-ac1/arch/i386/kernel/Makefile --- linux.21rc1/arch/i386/kernel/Makefile 2003-04-22 16:38:54.000000000 +0100 +++ linux.21rc1-ac1/arch/i386/kernel/Makefile 2003-04-22 16:44:36.000000000 +0100 @@ -40,5 +40,14 @@ obj-$(CONFIG_X86_LOCAL_APIC) += mpparse.o apic.o nmi.o obj-$(CONFIG_X86_IO_APIC) += io_apic.o acpitable.o obj-$(CONFIG_X86_VISWS_APIC) += visws_apic.o +obj-$(CONFIG_EDD) += edd.o +obj-$(CONFIG_X86_POWERNOW_K6) += powernow-k6.o +obj-$(CONFIG_X86_LONGHAUL) += longhaul.o +obj-$(CONFIG_X86_SPEEDSTEP) += speedstep.o +obj-$(CONFIG_X86_P4_CLOCKMOD) += p4-clockmod.o +obj-$(CONFIG_X86_LONGRUN) += longrun.o +obj-$(CONFIG_ELAN_CPUFREQ) += elanfreq.o +obj-$(CONFIG_X86_GX_SUSPMOD) += gx-suspmod.o + include $(TOPDIR)/Rules.make diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/i386/kernel/p4-clockmod.c linux.21rc1-ac1/arch/i386/kernel/p4-clockmod.c --- linux.21rc1/arch/i386/kernel/p4-clockmod.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.21rc1-ac1/arch/i386/kernel/p4-clockmod.c 2003-04-22 16:44:36.000000000 +0100 @@ -0,0 +1,287 @@ +/* + * Pentium 4/Xeon CPU on demand clock modulation/speed scaling + * (C) 2002 Zwane Mwaikambo + * (C) 2002 Arjan van de Ven + * (C) 2002 Tora T. Engstad + * All Rights Reserved + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + * + * The author(s) of this software shall not be held liable for damages + * of any nature resulting due to the use of this software. This + * software is provided AS-IS with no warranties. + * + * Date Errata Description + * 20020525 N44, O17 12.5% or 25% DC causes lockup + * + */ + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#define PFX "cpufreq: " + +/* + * Duty Cycle (3bits), note DC_DISABLE is not specified in + * intel docs i just use it to mean disable + */ +enum { + DC_RESV, DC_DFLT, DC_25PT, DC_38PT, DC_50PT, + DC_64PT, DC_75PT, DC_88PT, DC_DISABLE +}; + +#define DC_ENTRIES 8 + + +static int has_N44_O17_errata; +static int stock_freq; +MODULE_PARM(stock_freq, "i"); + +static struct cpufreq_driver *cpufreq_p4_driver; + + +static int cpufreq_p4_setdc(unsigned int cpu, unsigned int newstate) +{ + u32 l, h; + unsigned long cpus_allowed; + struct cpufreq_freqs freqs; + int hyperthreading = 0; + int affected_cpu_map = 0; + int sibling = 0; + + if (!cpu_online(cpu) || (newstate > DC_DISABLE) || + (newstate == DC_RESV)) + return -EINVAL; + + /* switch to physical CPU where state is to be changed*/ + cpus_allowed = current->cpus_allowed; + + /* only run on CPU to be set, or on its sibling */ + affected_cpu_map = 1 << cpu; +#ifdef CONFIG_X86_HT + hyperthreading = ((cpu_has_ht) && (smp_num_siblings == 2)); + if (hyperthreading) { + sibling = cpu_sibling_map[cpu]; + affected_cpu_map |= (1 << sibling); + } +#endif + set_cpus_allowed(current, affected_cpu_map); + BUG_ON(!(affected_cpu_map & (1 << smp_processor_id()))); + + /* get current state */ + rdmsr(MSR_IA32_THERM_CONTROL, l, h); + if (l & 0x10) { + l = l >> 1; + l &= 0x7; + } else + l = DC_DISABLE; + + if (l == newstate) { + set_cpus_allowed(current, cpus_allowed); + return 0; + } else if (l == DC_RESV) { + printk(KERN_ERR PFX "BIG FAT WARNING: currently in invalid setting\n"); + } + + /* notifiers */ + freqs.old = stock_freq * l / 8; + freqs.new = stock_freq * newstate / 8; + freqs.cpu = cpu; + cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); + if (hyperthreading) { + freqs.cpu = sibling; + cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); + } + + rdmsr(MSR_IA32_THERM_STATUS, l, h); + if (l & 0x01) + printk(KERN_DEBUG PFX "CPU#%d currently thermal throttled\n", cpu); + + if (has_N44_O17_errata && (newstate == DC_25PT || newstate == DC_DFLT)) + newstate = DC_38PT; + + rdmsr(MSR_IA32_THERM_CONTROL, l, h); + if (newstate == DC_DISABLE) { + printk(KERN_INFO PFX "CPU#%d disabling modulation\n", cpu); + wrmsr(MSR_IA32_THERM_CONTROL, l & ~(1<<4), h); + } else { + printk(KERN_INFO PFX "CPU#%d setting duty cycle to %d%%\n", cpu, ((125 * newstate) / 10)); + /* bits 63 - 5 : reserved + * bit 4 : enable/disable + * bits 3-1 : duty cycle + * bit 0 : reserved + */ + l = (l & ~14); + l = l | (1<<4) | ((newstate & 0x7)<<1); + wrmsr(MSR_IA32_THERM_CONTROL, l, h); + } + + set_cpus_allowed(current, cpus_allowed); + + /* notifiers */ + cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); + if (hyperthreading) { + freqs.cpu = cpu; + cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); + } + + return 0; +} + + +static struct cpufreq_frequency_table p4clockmod_table[] = { + {DC_RESV, CPUFREQ_ENTRY_INVALID}, + {DC_DFLT, 0}, + {DC_25PT, 0}, + {DC_38PT, 0}, + {DC_50PT, 0}, + {DC_64PT, 0}, + {DC_75PT, 0}, + {DC_88PT, 0}, + {DC_DISABLE, 0}, + {DC_RESV, CPUFREQ_TABLE_END}, +}; + + +static int cpufreq_p4_setpolicy(struct cpufreq_policy *policy) +{ + unsigned int newstate = DC_RESV; + + if (cpufreq_frequency_table_setpolicy(policy, &p4clockmod_table[0], &newstate)) + return -EINVAL; + + cpufreq_p4_setdc(policy->cpu, newstate); + + return 0; +} + + +static int cpufreq_p4_verify(struct cpufreq_policy *policy) +{ + return cpufreq_frequency_table_verify(policy, &p4clockmod_table[0]); +} + + +static int __init cpufreq_p4_init(void) +{ + struct cpuinfo_x86 *c = cpu_data; + int cpuid; + int ret; + struct cpufreq_driver *driver; + unsigned int i; + + /* + * THERM_CONTROL is architectural for IA32 now, so + * we can rely on the capability checks + */ + if (c->x86_vendor != X86_VENDOR_INTEL) + return -ENODEV; + + if (!test_bit(X86_FEATURE_ACPI, c->x86_capability) || + !test_bit(X86_FEATURE_ACC, c->x86_capability)) + return -ENODEV; + + /* Errata workarounds */ + cpuid = (c->x86 << 8) | (c->x86_model << 4) | c->x86_mask; + switch (cpuid) { + case 0x0f07: + case 0x0f0a: + case 0x0f11: + case 0x0f12: + has_N44_O17_errata = 1; + default: + break; + } + + printk(KERN_INFO PFX "P4/Xeon(TM) CPU On-Demand Clock Modulation available\n"); + + if (!stock_freq) { + if (cpu_khz) + stock_freq = cpu_khz; + else { + printk(KERN_INFO PFX "unknown core frequency - please use module parameter 'stock_freq'\n"); + return -EINVAL; + } + } + + driver = kmalloc(sizeof(struct cpufreq_driver) + + NR_CPUS * sizeof(struct cpufreq_policy), GFP_KERNEL); + if (!driver) + return -ENOMEM; + + driver->policy = (struct cpufreq_policy *) (driver + 1); + + /* table init */ + for (i=1; (p4clockmod_table[i].frequency != CPUFREQ_TABLE_END); i++) { + if ((i<2) && (has_N44_O17_errata)) + p4clockmod_table[i].frequency = CPUFREQ_ENTRY_INVALID; + else + p4clockmod_table[i].frequency = (stock_freq * i)/8; + } + + +#ifdef CONFIG_CPU_FREQ_24_API + for (i=0;icpu_cur_freq[i] = stock_freq; + } +#endif + + driver->verify = &cpufreq_p4_verify; + driver->setpolicy = &cpufreq_p4_setpolicy; + + for (i=0;ipolicy[i].cpu = i; + ret = cpufreq_frequency_table_cpuinfo(&driver->policy[i], &p4clockmod_table[0]); + if (ret) { + kfree(driver); + return ret; + } + driver->policy[i].policy = CPUFREQ_POLICY_PERFORMANCE; + driver->policy[i].cpuinfo.transition_latency = CPUFREQ_ETERNAL; + } + + cpufreq_p4_driver = driver; + + ret = cpufreq_register(driver); + if (ret) { + cpufreq_p4_driver = NULL; + kfree(driver); + } + + return ret; +} + + +static void __exit cpufreq_p4_exit(void) +{ + unsigned int i; + + if (cpufreq_p4_driver) { + for (i=0; i"); +MODULE_DESCRIPTION ("cpufreq driver for Pentium(TM) 4/Xeon(TM)"); +MODULE_LICENSE ("GPL"); + +module_init(cpufreq_p4_init); +module_exit(cpufreq_p4_exit); + diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/i386/kernel/pci-dma.c linux.21rc1-ac1/arch/i386/kernel/pci-dma.c --- linux.21rc1/arch/i386/kernel/pci-dma.c 2003-04-22 16:38:54.000000000 +0100 +++ linux.21rc1-ac1/arch/i386/kernel/pci-dma.c 2003-04-22 16:44:36.000000000 +0100 @@ -19,7 +19,7 @@ void *ret; int gfp = GFP_ATOMIC; - if (hwdev == NULL || ((u32)hwdev->dma_mask < 0xffffffff)) + if (hwdev == NULL || hwdev->dma_mask < 0xffffffff) gfp |= GFP_DMA; ret = (void *)__get_free_pages(gfp, get_order(size)); diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/i386/kernel/powernow-k6.c linux.21rc1-ac1/arch/i386/kernel/powernow-k6.c --- linux.21rc1/arch/i386/kernel/powernow-k6.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.21rc1-ac1/arch/i386/kernel/powernow-k6.c 2003-04-22 16:44:36.000000000 +0100 @@ -0,0 +1,237 @@ +/* + * $Id: powernow-k6.c,v 1.42 2003/01/02 22:41:08 db Exp $ + * This file was part of Powertweak Linux (http://powertweak.sf.net) + * and is shared with the Linux Kernel module. + * + * (C) 2000-2002 Dave Jones, Arjan van de Ven, Janne Pänkälä, Dominik Brodowski. + * + * Licensed under the terms of the GNU GPL License version 2. + * + * BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous* + */ + +#include +#include +#include +#include +#include +#include + +#include +#include +#include + + +#define POWERNOW_IOPORT 0xfff0 /* it doesn't matter where, as long + as it is unused */ + +static struct cpufreq_driver *powernow_driver; +static unsigned int busfreq; /* FSB, in 10 kHz */ +static unsigned int max_multiplier; + + +/* Clock ratio multiplied by 10 - see table 27 in AMD#23446 */ +static struct cpufreq_frequency_table clock_ratio[] = { + {45, /* 000 -> 4.5x */ 0}, + {50, /* 001 -> 5.0x */ 0}, + {40, /* 010 -> 4.0x */ 0}, + {55, /* 011 -> 5.5x */ 0}, + {20, /* 100 -> 2.0x */ 0}, + {30, /* 101 -> 3.0x */ 0}, + {60, /* 110 -> 6.0x */ 0}, + {35, /* 111 -> 3.5x */ 0}, + {0, CPUFREQ_TABLE_END} +}; + + +/** + * powernow_k6_get_cpu_multiplier - returns the current FSB multiplier + * + * Returns the current setting of the frequency multiplier. Core clock + * speed is frequency of the Front-Side Bus multiplied with this value. + */ +static int powernow_k6_get_cpu_multiplier(void) +{ + u64 invalue = 0; + u32 msrval; + + msrval = POWERNOW_IOPORT + 0x1; + wrmsr(MSR_K6_EPMR, msrval, 0); /* enable the PowerNow port */ + invalue=inl(POWERNOW_IOPORT + 0x8); + msrval = POWERNOW_IOPORT + 0x0; + wrmsr(MSR_K6_EPMR, msrval, 0); /* disable it again */ + + return clock_ratio[(invalue >> 5)&7].index; +} + + +/** + * powernow_k6_set_state - set the PowerNow! multiplier + * @best_i: clock_ratio[best_i] is the target multiplier + * + * Tries to change the PowerNow! multiplier + */ +static void powernow_k6_set_state (unsigned int best_i) +{ + unsigned long outvalue=0, invalue=0; + unsigned long msrval; + struct cpufreq_freqs freqs; + + if (!powernow_driver) { + printk(KERN_ERR "cpufreq: initialization problem or invalid target frequency\n"); + return; + } + + freqs.old = busfreq * powernow_k6_get_cpu_multiplier(); + freqs.new = busfreq * clock_ratio[best_i].index; + freqs.cpu = 0; /* powernow-k6.c is UP only driver */ + + cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); + + /* we now need to transform best_i to the BVC format, see AMD#23446 */ + + outvalue = (1<<12) | (1<<10) | (1<<9) | (best_i<<5); + + msrval = POWERNOW_IOPORT + 0x1; + wrmsr(MSR_K6_EPMR, msrval, 0); /* enable the PowerNow port */ + invalue=inl(POWERNOW_IOPORT + 0x8); + invalue = invalue & 0xf; + outvalue = outvalue | invalue; + outl(outvalue ,(POWERNOW_IOPORT + 0x8)); + msrval = POWERNOW_IOPORT + 0x0; + wrmsr(MSR_K6_EPMR, msrval, 0); /* disable it again */ + + cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); + + return; +} + + +/** + * powernow_k6_verify - verifies a new CPUfreq policy + * @policy: new policy + * + * Policy must be within lowest and highest possible CPU Frequency, + * and at least one possible state must be within min and max. + */ +static int powernow_k6_verify(struct cpufreq_policy *policy) +{ + return cpufreq_frequency_table_verify(policy, &clock_ratio[0]); +} + + +/** + * powernow_k6_setpolicy - sets a new CPUFreq policy + * @policy - new policy + * + * sets a new CPUFreq policy + */ +static int powernow_k6_setpolicy (struct cpufreq_policy *policy) +{ + unsigned int newstate = 0; + + if (cpufreq_frequency_table_setpolicy(policy, &clock_ratio[0], &newstate)) + return -EINVAL; + + powernow_k6_set_state(newstate); + + return 0; +} + + +/** + * powernow_k6_init - initializes the k6 PowerNow! CPUFreq driver + * + * Initializes the K6 PowerNow! support. Returns -ENODEV on unsupported + * devices, -EINVAL or -ENOMEM on problems during initiatization, and zero + * on success. + */ +static int __init powernow_k6_init(void) +{ + struct cpuinfo_x86 *c = cpu_data; + struct cpufreq_driver *driver; + unsigned int result; + unsigned int i; + + if ((c->x86_vendor != X86_VENDOR_AMD) || (c->x86 != 5) || + ((c->x86_model != 12) && (c->x86_model != 13))) + return -ENODEV; + + max_multiplier = powernow_k6_get_cpu_multiplier(); + busfreq = cpu_khz / max_multiplier; + + if (!request_region(POWERNOW_IOPORT, 16, "PowerNow!")) { + printk("cpufreq: PowerNow IOPORT region already used.\n"); + return -EIO; + } + + /* initialization of main "cpufreq" code*/ + driver = kmalloc(sizeof(struct cpufreq_driver) + + NR_CPUS * sizeof(struct cpufreq_policy), GFP_KERNEL); + if (!driver) { + release_region (POWERNOW_IOPORT, 16); + return -ENOMEM; + } + driver->policy = (struct cpufreq_policy *) (driver + 1); + + /* table init */ + for (i=0; (clock_ratio[i].frequency != CPUFREQ_TABLE_END); i++) { + if (clock_ratio[i].index > max_multiplier) + clock_ratio[i].frequency = CPUFREQ_ENTRY_INVALID; + else + clock_ratio[i].frequency = busfreq * clock_ratio[i].index; + } + + driver->verify = &powernow_k6_verify; + driver->setpolicy = &powernow_k6_setpolicy; + + /* cpuinfo and default policy values */ + driver->policy[0].cpu = 0; + driver->policy[0].cpuinfo.transition_latency = CPUFREQ_ETERNAL; + driver->policy[0].policy = CPUFREQ_POLICY_PERFORMANCE; +#ifdef CONFIG_CPU_FREQ_24_API + driver->cpu_cur_freq[0] = busfreq * max_multiplier; +#endif + result = cpufreq_frequency_table_cpuinfo(&driver->policy[0], &clock_ratio[0]); + if (result) { + kfree(driver); + return result; + } + + powernow_driver = driver; + + result = cpufreq_register(driver); + if (result) { + release_region (POWERNOW_IOPORT, 16); + powernow_driver = NULL; + kfree(driver); + } + + return result; +} + + +/** + * powernow_k6_exit - unregisters AMD K6-2+/3+ PowerNow! support + * + * Unregisters AMD K6-2+ / K6-3+ PowerNow! support. + */ +static void __exit powernow_k6_exit(void) +{ + unsigned int i; + + if (powernow_driver) { + for (i=0;i<8;i++) + if (clock_ratio[i].index == max_multiplier) + powernow_k6_set_state(i); + cpufreq_unregister(); + kfree(powernow_driver); + } +} + + +MODULE_AUTHOR ("Arjan van de Ven , Dave Jones , Dominik Brodowski "); +MODULE_DESCRIPTION ("PowerNow! driver for AMD K6-2+ / K6-3+ processors."); +MODULE_LICENSE ("GPL"); +module_init(powernow_k6_init); +module_exit(powernow_k6_exit); diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/i386/kernel/process.c linux.21rc1-ac1/arch/i386/kernel/process.c --- linux.21rc1/arch/i386/kernel/process.c 2003-04-22 16:39:33.000000000 +0100 +++ linux.21rc1-ac1/arch/i386/kernel/process.c 2003-04-22 16:44:36.000000000 +0100 @@ -124,15 +124,12 @@ void cpu_idle (void) { /* endless idle loop with no priority at all */ - init_idle(); - current->nice = 20; - current->counter = -100; while (1) { void (*idle)(void) = pm_idle; if (!idle) idle = default_idle; - while (!current->need_resched) + if (!current->need_resched) idle(); schedule(); check_pgt_cache(); @@ -187,7 +184,7 @@ } /* we will leave sorting out the final value when we are ready to reboot, since we might not - have set up boot_cpu_id or smp_num_cpu */ + have set up boot_cpu_physical_apicid or smp_num_cpu */ break; #endif } @@ -253,7 +250,7 @@ 0x66, 0x0f, 0x20, 0xc3, /* movl %cr0,%ebx */ 0x66, 0x81, 0xe3, 0x00, 0x00, 0x00, 0x60, /* andl $0x60000000,%ebx */ 0x74, 0x02, /* jz f */ - 0x0f, 0x08, /* invd */ + 0x0f, 0x09, /* wbinvd */ 0x24, 0x10, /* f: andb $0x10,al */ 0x66, 0x0f, 0x22, 0xc0 /* movl %eax,%cr0 */ }; @@ -466,23 +463,6 @@ } /* - * No need to lock the MM as we are the last user - */ -void release_segments(struct mm_struct *mm) -{ - void * ldt = mm->context.segments; - - /* - * free the LDT - */ - if (ldt) { - mm->context.segments = NULL; - clear_LDT(); - vfree(ldt); - } -} - -/* * Create a kernel thread */ int arch_kernel_thread(int (*fn)(void *), void * arg, unsigned long flags) @@ -535,45 +515,19 @@ void release_thread(struct task_struct *dead_task) { if (dead_task->mm) { - void * ldt = dead_task->mm->context.segments; - // temporary debugging check - if (ldt) { - printk("WARNING: dead process %8s still has LDT? <%p>\n", - dead_task->comm, ldt); + if (dead_task->mm->context.size) { + printk("WARNING: dead process %8s still has LDT? <%p/%d>\n", + dead_task->comm, + dead_task->mm->context.ldt, + dead_task->mm->context.size); BUG(); } } - release_x86_irqs(dead_task); } /* - * we do not have to muck with descriptors here, that is - * done in switch_mm() as needed. - */ -void copy_segments(struct task_struct *p, struct mm_struct *new_mm) -{ - struct mm_struct * old_mm; - void *old_ldt, *ldt; - - ldt = NULL; - old_mm = current->mm; - if (old_mm && (old_ldt = old_mm->context.segments) != NULL) { - /* - * Completely new LDT, we initialize it from the parent: - */ - ldt = vmalloc(LDT_ENTRIES*LDT_ENTRY_SIZE); - if (!ldt) - printk(KERN_WARNING "ldt allocation failed\n"); - else - memcpy(ldt, old_ldt, LDT_ENTRIES*LDT_ENTRY_SIZE); - } - new_mm->context.segments = ldt; - new_mm->context.cpuvalid = ~0UL; /* valid on all CPU's - they can't have stale data */ -} - -/* * Save a segment. */ #define savesegment(seg,value) \ @@ -698,15 +652,17 @@ asm volatile("movl %%gs,%0":"=m" (*(int *)&prev->gs)); /* - * Restore %fs and %gs. + * Restore %fs and %gs if needed. */ - loadsegment(fs, next->fs); - loadsegment(gs, next->gs); + if (unlikely(prev->fs | prev->gs | next->fs | next->gs)) { + loadsegment(fs, next->fs); + loadsegment(gs, next->gs); + } /* * Now maybe reload the debug registers */ - if (next->debugreg[7]){ + if (unlikely(next->debugreg[7])) { loaddebug(next, 0); loaddebug(next, 1); loaddebug(next, 2); @@ -716,7 +672,7 @@ loaddebug(next, 7); } - if (prev->ioperm || next->ioperm) { + if (unlikely(prev->ioperm || next->ioperm)) { if (next->ioperm) { /* * 4 cachelines copy ... not good, but not that diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/i386/kernel/setup.c linux.21rc1-ac1/arch/i386/kernel/setup.c --- linux.21rc1/arch/i386/kernel/setup.c 2003-04-22 16:39:33.000000000 +0100 +++ linux.21rc1-ac1/arch/i386/kernel/setup.c 2003-04-22 16:44:36.000000000 +0100 @@ -118,6 +118,7 @@ #include #include #include +#include /* * Machine setup.. */ @@ -196,6 +197,8 @@ #define KERNEL_START (*(unsigned long *) (PARAM+0x214)) #define INITRD_START (*(unsigned long *) (PARAM+0x218)) #define INITRD_SIZE (*(unsigned long *) (PARAM+0x21c)) +#define EDD_NR (*(unsigned char *) (PARAM+EDDNR)) +#define EDD_BUF ((struct edd_info *) (PARAM+EDDBUF)) #define COMMAND_LINE ((char *) (PARAM+2048)) #define COMMAND_LINE_SIZE 256 @@ -203,6 +206,7 @@ #define RAMDISK_PROMPT_FLAG 0x8000 #define RAMDISK_LOAD_FLAG 0x4000 + #ifdef CONFIG_VISWS char visws_board_type = -1; char visws_board_rev = -1; @@ -700,6 +704,23 @@ return 0; } +#if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE) +unsigned char eddnr; +struct edd_info edd[EDDMAXNR]; +/** + * copy_edd() - Copy the BIOS EDD information + * from empty_zero_page into a safe place. + * + */ +static inline void copy_edd(void) +{ + eddnr = EDD_NR; + memcpy(edd, EDD_BUF, sizeof(edd)); +} +#else +#define copy_edd() do {} while (0) +#endif + /* * Do NOT EVER look at the BIOS memory size location. * It does not work on many machines. @@ -1112,6 +1133,7 @@ rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0); #endif setup_memory_region(); + copy_edd(); if (!MOUNT_ROOT_RDONLY) root_mountflags &= ~MS_RDONLY; @@ -2937,6 +2959,7 @@ * applications want to get the raw CPUID data, they should access * /dev/cpu//cpuid instead. */ + extern int phys_proc_id[NR_CPUS]; static char *x86_cap_flags[] = { /* Intel-defined */ "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce", @@ -2994,6 +3017,11 @@ /* Cache size */ if (c->x86_cache_size >= 0) seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size); + +#ifdef CONFIG_SMP + seq_printf(m, "physical id\t: %d\n",phys_proc_id[n]); + seq_printf(m, "siblings\t: %d\n",smp_num_siblings); +#endif /* We use exception 16 if we have hardware math and we've either seen it or the CPU claims it is internal */ fpu_exception = c->hard_math && (ignore_irq13 || cpu_has_fpu); @@ -3096,11 +3124,12 @@ set_tss_desc(nr,t); gdt_table[__TSS(nr)].b &= 0xfffffdff; load_TR(nr); - load_LDT(&init_mm); + load_LDT(&init_mm.context); - /* - * Clear all 6 debug registers: - */ + /* Clear %fs and %gs. */ + asm volatile ("xorl %eax, %eax; movl %eax, %fs; movl %eax, %gs"); + + /* Clear all 6 debug registers: */ #define CD(register) __asm__("movl %0,%%db" #register ::"r"(0) ); diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/i386/kernel/smpboot.c linux.21rc1-ac1/arch/i386/kernel/smpboot.c --- linux.21rc1/arch/i386/kernel/smpboot.c 2003-04-22 16:39:33.000000000 +0100 +++ linux.21rc1-ac1/arch/i386/kernel/smpboot.c 2003-04-22 16:44:36.000000000 +0100 @@ -58,7 +58,7 @@ /* Number of siblings per CPU package */ int smp_num_siblings = 1; -int __initdata phys_proc_id[NR_CPUS]; /* Package ID of each logical CPU */ +int phys_proc_id[NR_CPUS]; /* Package ID of each logical CPU */ /* Bitmask of currently online CPUs */ unsigned long cpu_online_map; @@ -365,7 +365,7 @@ * (This works even if the APIC is not enabled.) */ phys_id = GET_APIC_ID(apic_read(APIC_ID)); - cpuid = current->processor; + cpuid = cpu(); if (test_and_set_bit(cpuid, &cpu_online_map)) { printk("huh, phys CPU#%d, CPU#%d already present??\n", phys_id, cpuid); @@ -435,6 +435,7 @@ */ smp_store_cpu_info(cpuid); + disable_APIC_timer(); /* * Allow the master to continue. */ @@ -443,7 +444,7 @@ /* * Synchronize the TSC with the BP */ - if (cpu_has_tsc) + if (cpu_has_tsc > 1) synchronize_tsc_ap(); } @@ -465,6 +466,7 @@ smp_callin(); while (!atomic_read(&smp_commenced)) rep_nop(); + enable_APIC_timer(); /* * low-memory mappings have been cleared, flush them from * the local TLBs too. @@ -803,16 +805,13 @@ if (!idle) panic("No idle process for CPU %d", cpu); - idle->processor = cpu; - idle->cpus_runnable = 1 << cpu; /* we schedule the first task manually */ + init_idle(idle, cpu); map_cpu_to_boot_apicid(cpu, apicid); idle->thread.eip = (unsigned long) start_secondary; - del_from_runqueue(idle); unhash_process(idle); - init_tasks[cpu] = idle; /* start_eip had better be page-aligned! */ start_eip = setup_trampoline(); @@ -925,6 +924,7 @@ } cycles_t cacheflush_time; +unsigned long cache_decay_ticks; static void smp_tune_scheduling (void) { @@ -958,9 +958,13 @@ cacheflush_time = (cpu_khz>>10) * (cachesize<<10) / bandwidth; } + cache_decay_ticks = (long)cacheflush_time/cpu_khz * HZ / 1000; + printk("per-CPU timeslice cutoff: %ld.%02ld usecs.\n", (long)cacheflush_time/(cpu_khz/1000), ((long)cacheflush_time*100/(cpu_khz/1000)) % 100); + printk("task migration cache decay timeout: %ld msecs.\n", + (cache_decay_ticks + 1) * 1000 / HZ); } /* @@ -1026,8 +1030,7 @@ map_cpu_to_boot_apicid(0, boot_cpu_apicid); global_irq_holder = 0; - current->processor = 0; - init_idle(); + current->cpu = 0; smp_tune_scheduling(); /* @@ -1219,7 +1222,7 @@ /* * Synchronize the TSC with the AP */ - if (cpu_has_tsc && cpucount) + if (cpu_has_tsc > 1 && cpucount) synchronize_tsc_bp(); smp_done: diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/i386/kernel/smp.c linux.21rc1-ac1/arch/i386/kernel/smp.c --- linux.21rc1/arch/i386/kernel/smp.c 2003-04-22 16:39:33.000000000 +0100 +++ linux.21rc1-ac1/arch/i386/kernel/smp.c 2003-04-22 16:44:36.000000000 +0100 @@ -496,13 +496,23 @@ * it goes straight through and wastes no time serializing * anything. Worst case is that we lose a reschedule ... */ - void smp_send_reschedule(int cpu) { send_IPI_mask(1 << cpu, RESCHEDULE_VECTOR); } /* + * this function sends a reschedule IPI to all (other) CPUs. + * This should only be used if some 'global' task became runnable, + * such as a RT task, that must be handled now. The first CPU + * that manages to grab the task will run it. + */ +void smp_send_reschedule_all(void) +{ + send_IPI_allbutself(RESCHEDULE_VECTOR); +} + +/* * Structure and data for smp_call_function(). This is designed to minimise * static memory requirements. It also looks cleaner. */ @@ -553,7 +563,7 @@ spin_lock(&call_lock); call_data = &data; - wmb(); + mb(); /* Send a message to all other CPUs and wait for them to respond */ send_IPI_allbutself(CALL_FUNCTION_VECTOR); diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/i386/kernel/speedstep.c linux.21rc1-ac1/arch/i386/kernel/speedstep.c --- linux.21rc1/arch/i386/kernel/speedstep.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.21rc1-ac1/arch/i386/kernel/speedstep.c 2003-04-22 16:44:36.000000000 +0100 @@ -0,0 +1,731 @@ +/* + * $Id: speedstep.c,v 1.64 2003/01/02 22:16:26 db Exp $ + * + * (C) 2001 Dave Jones, Arjan van de ven. + * (C) 2002 Dominik Brodowski + * + * Licensed under the terms of the GNU GPL License version 2. + * Based upon reverse engineered information, and on Intel documentation + * for chipsets ICH2-M and ICH3-M. + * + * Many thanks to Ducrot Bruno for finding and fixing the last + * "missing link" for ICH2-M/ICH3-M support, and to Thomas Winkler + * for extensive testing. + * + * BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous* + */ + + +/********************************************************************* + * SPEEDSTEP - DEFINITIONS * + *********************************************************************/ + +#include +#include +#include +#include +#include +#include + +#include + + +static struct cpufreq_driver *speedstep_driver; + +/* speedstep_chipset: + * It is necessary to know which chipset is used. As accesses to + * this device occur at various places in this module, we need a + * static struct pci_dev * pointing to that device. + */ +static unsigned int speedstep_chipset; +static struct pci_dev *speedstep_chipset_dev; + +#define SPEEDSTEP_CHIPSET_ICH2M 0x00000002 +#define SPEEDSTEP_CHIPSET_ICH3M 0x00000003 + + +/* speedstep_processor + */ +static unsigned int speedstep_processor = 0; +static int speedstep_coppermine = 0; + +#define SPEEDSTEP_PROCESSOR_PIII_C 0x00000001 /* Coppermine core */ +#define SPEEDSTEP_PROCESSOR_PIII_T 0x00000002 /* Tualatin core */ +#define SPEEDSTEP_PROCESSOR_P4M 0x00000003 /* P4-M with 100 MHz FSB */ + + +/* speedstep_[low,high]_freq + * There are only two frequency states for each processor. Values + * are in kHz for the time being. + */ +#define SPEEDSTEP_HIGH 0x00000000 +#define SPEEDSTEP_LOW 0x00000001 + +static struct cpufreq_frequency_table speedstep_freqs[] = { + {SPEEDSTEP_HIGH, 0}, + {SPEEDSTEP_LOW, 0}, + {0, CPUFREQ_TABLE_END}, +}; + +#define speedstep_low_freq speedstep_freqs[SPEEDSTEP_LOW].frequency +#define speedstep_high_freq speedstep_freqs[SPEEDSTEP_HIGH].frequency + + +/* DEBUG + * Define it if you want verbose debug output, e.g. for bug reporting + */ +//#define SPEEDSTEP_DEBUG + +#ifdef SPEEDSTEP_DEBUG +#define dprintk(msg...) printk(msg) +#else +#define dprintk(msg...) do { } while(0) +#endif + + + +/********************************************************************* + * LOW LEVEL CHIPSET INTERFACE * + *********************************************************************/ + +/** + * speedstep_get_state - read the current SpeedStep state + * @state: Speedstep state (SPEEDSTEP_LOW or SPEEDSTEP_HIGH) + * + * Tries to read the SpeedStep state. Returns -EIO when there has been + * trouble to read the status or write to the control register, -EINVAL + * on an unsupported chipset, and zero on success. + */ +static int speedstep_get_state (unsigned int *state) +{ + unsigned long flags; + u32 pmbase; + u8 value; + + if (!speedstep_chipset_dev || !state) + return -EINVAL; + + switch (speedstep_chipset) { + case SPEEDSTEP_CHIPSET_ICH2M: + case SPEEDSTEP_CHIPSET_ICH3M: + /* get PMBASE */ + pci_read_config_dword(speedstep_chipset_dev, 0x40, &pmbase); + if (!(pmbase & 0x01)) + return -EIO; + + pmbase &= 0xFFFFFFFE; + if (!pmbase) + return -EIO; + + /* read state */ + local_irq_save(flags); + value = inb(pmbase + 0x50); + local_irq_restore(flags); + + dprintk(KERN_DEBUG "cpufreq: read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value); + + *state = value & 0x01; + return 0; + + } + + printk (KERN_ERR "cpufreq: setting CPU frequency on this chipset unsupported.\n"); + return -EINVAL; +} + + +/** + * speedstep_set_state - set the SpeedStep state + * @state: new processor frequency state (SPEEDSTEP_LOW or SPEEDSTEP_HIGH) + * + * Tries to change the SpeedStep state. + */ +static void speedstep_set_state (unsigned int state, int notify) +{ + u32 pmbase; + u8 pm2_blk; + u8 value; + unsigned long flags; + unsigned int oldstate; + struct cpufreq_freqs freqs; + + if (!speedstep_chipset_dev || (state > 0x1)) + return; + + if (speedstep_get_state(&oldstate)) + return; + + if (oldstate == state) + return; + + freqs.old = (oldstate == SPEEDSTEP_HIGH) ? speedstep_high_freq : speedstep_low_freq; + freqs.new = (state == SPEEDSTEP_HIGH) ? speedstep_high_freq : speedstep_low_freq; + freqs.cpu = 0; /* speedstep.c is UP only driver */ + + if (notify) + cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); + + switch (speedstep_chipset) { + case SPEEDSTEP_CHIPSET_ICH2M: + case SPEEDSTEP_CHIPSET_ICH3M: + /* get PMBASE */ + pci_read_config_dword(speedstep_chipset_dev, 0x40, &pmbase); + if (!(pmbase & 0x01)) + { + printk(KERN_ERR "cpufreq: could not find speedstep register\n"); + return; + } + + pmbase &= 0xFFFFFFFE; + if (!pmbase) { + printk(KERN_ERR "cpufreq: could not find speedstep register\n"); + return; + } + + /* Disable IRQs */ + local_irq_save(flags); + + /* read state */ + value = inb(pmbase + 0x50); + + dprintk(KERN_DEBUG "cpufreq: read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value); + + /* write new state */ + value &= 0xFE; + value |= state; + + dprintk(KERN_DEBUG "cpufreq: writing 0x%x to pmbase 0x%x + 0x50\n", value, pmbase); + + /* Disable bus master arbitration */ + pm2_blk = inb(pmbase + 0x20); + pm2_blk |= 0x01; + outb(pm2_blk, (pmbase + 0x20)); + + /* Actual transition */ + outb(value, (pmbase + 0x50)); + + /* Restore bus master arbitration */ + pm2_blk &= 0xfe; + outb(pm2_blk, (pmbase + 0x20)); + + /* check if transition was sucessful */ + value = inb(pmbase + 0x50); + + /* Enable IRQs */ + local_irq_restore(flags); + + dprintk(KERN_DEBUG "cpufreq: read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value); + + if (state == (value & 0x1)) { + dprintk (KERN_INFO "cpufreq: change to %u MHz succeded\n", (freqs.new / 1000)); + } else { + printk (KERN_ERR "cpufreq: change failed - I/O error\n"); + } + break; + default: + printk (KERN_ERR "cpufreq: setting CPU frequency on this chipset unsupported.\n"); + } + + if (notify) + cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); + + return; +} + + +/** + * speedstep_activate - activate SpeedStep control in the chipset + * + * Tries to activate the SpeedStep status and control registers. + * Returns -EINVAL on an unsupported chipset, and zero on success. + */ +static int speedstep_activate (void) +{ + if (!speedstep_chipset_dev) + return -EINVAL; + + switch (speedstep_chipset) { + case SPEEDSTEP_CHIPSET_ICH2M: + case SPEEDSTEP_CHIPSET_ICH3M: + { + u16 value = 0; + + pci_read_config_word(speedstep_chipset_dev, + 0x00A0, &value); + if (!(value & 0x08)) { + value |= 0x08; + dprintk(KERN_DEBUG "cpufreq: activating SpeedStep (TM) registers\n"); + pci_write_config_word(speedstep_chipset_dev, + 0x00A0, value); + } + + return 0; + } + } + + printk (KERN_ERR "cpufreq: SpeedStep (TM) on this chipset unsupported.\n"); + return -EINVAL; +} + + +/** + * speedstep_detect_chipset - detect the Southbridge which contains SpeedStep logic + * + * Detects PIIX4, ICH2-M and ICH3-M so far. The pci_dev points to + * the LPC bridge / PM module which contains all power-management + * functions. Returns the SPEEDSTEP_CHIPSET_-number for the detected + * chipset, or zero on failure. + */ +static unsigned int speedstep_detect_chipset (void) +{ + speedstep_chipset_dev = pci_find_subsys(PCI_VENDOR_ID_INTEL, + PCI_DEVICE_ID_INTEL_82801CA_12, + PCI_ANY_ID, + PCI_ANY_ID, + NULL); + if (speedstep_chipset_dev) + return SPEEDSTEP_CHIPSET_ICH3M; + + + speedstep_chipset_dev = pci_find_subsys(PCI_VENDOR_ID_INTEL, + PCI_DEVICE_ID_INTEL_82801BA_10, + PCI_ANY_ID, + PCI_ANY_ID, + NULL); + if (speedstep_chipset_dev) { + /* speedstep.c causes lockups on Dell Inspirons 8000 and + * 8100 which use a pretty old revision of the 82815 + * host brige. Abort on these systems. + */ + static struct pci_dev *hostbridge; + u8 rev = 0; + + hostbridge = pci_find_subsys(PCI_VENDOR_ID_INTEL, + PCI_DEVICE_ID_INTEL_82815_MC, + PCI_ANY_ID, + PCI_ANY_ID, + NULL); + + if (!hostbridge) + return SPEEDSTEP_CHIPSET_ICH2M; + + pci_read_config_byte(hostbridge, PCI_REVISION_ID, &rev); + if (rev < 5) { + dprintk(KERN_INFO "cpufreq: hostbrige does not support speedstep\n"); + speedstep_chipset_dev = NULL; + return 0; + } + + return SPEEDSTEP_CHIPSET_ICH2M; + } + + return 0; +} + + + +/********************************************************************* + * LOW LEVEL PROCESSOR INTERFACE * + *********************************************************************/ + + +/** + * pentium3_get_frequency - get the core frequencies for PIIIs + * + * Returns the core frequency of a Pentium III processor (in kHz) + */ +static unsigned int pentium3_get_frequency (void) +{ + /* See table 14 of p3_ds.pdf and table 22 of 29834003.pdf */ + struct { + unsigned int ratio; /* Frequency Multiplier (x10) */ + u8 bitmap; /* power on configuration bits + [27, 25:22] (in MSR 0x2a) */ + } msr_decode_mult [] = { + { 30, 0x01 }, + { 35, 0x05 }, + { 40, 0x02 }, + { 45, 0x06 }, + { 50, 0x00 }, + { 55, 0x04 }, + { 60, 0x0b }, + { 65, 0x0f }, + { 70, 0x09 }, + { 75, 0x0d }, + { 80, 0x0a }, + { 85, 0x26 }, + { 90, 0x20 }, + { 100, 0x2b }, + { 0, 0xff } /* error or unknown value */ + }; + /* PIII(-M) FSB settings: see table b1-b of 24547206.pdf */ + struct { + unsigned int value; /* Front Side Bus speed in MHz */ + u8 bitmap; /* power on configuration bits [18: 19] + (in MSR 0x2a) */ + } msr_decode_fsb [] = { + { 66, 0x0 }, + { 100, 0x2 }, + { 133, 0x1 }, + { 0, 0xff} + }; + u32 msr_lo, msr_tmp; + int i = 0, j = 0; + struct cpuinfo_x86 *c = cpu_data; + + /* read MSR 0x2a - we only need the low 32 bits */ + rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_tmp); + dprintk(KERN_DEBUG "cpufreq: P3 - MSR_IA32_EBL_CR_POWERON: 0x%x 0x%x\n", msr_lo, msr_tmp); + msr_tmp = msr_lo; + + /* decode the FSB */ + msr_tmp &= 0x00c0000; + msr_tmp >>= 18; + while (msr_tmp != msr_decode_fsb[i].bitmap) { + if (msr_decode_fsb[i].bitmap == 0xff) + return -EINVAL; + i++; + } + + /* decode the multiplier */ + if ((c->x86_model == 0x08) && (c->x86_mask == 0x01)) + /* different on early Coppermine PIII */ + msr_lo &= 0x03c00000; + else + msr_lo &= 0x0bc00000; + msr_lo >>= 22; + while (msr_lo != msr_decode_mult[j].bitmap) { + if (msr_decode_mult[j].bitmap == 0xff) + return -EINVAL; + j++; + } + + return (msr_decode_mult[j].ratio * msr_decode_fsb[i].value * 100); +} + + +/** + * pentium4_get_frequency - get the core frequency for P4-Ms + * + * Should return the core frequency (in kHz) for P4-Ms. + */ +static unsigned int pentium4_get_frequency(void) +{ + u32 msr_lo, msr_hi; + + rdmsr(0x2c, msr_lo, msr_hi); + + dprintk(KERN_DEBUG "cpufreq: P4 - MSR_EBC_FREQUENCY_ID: 0x%x 0x%x\n", msr_lo, msr_hi); + + /* First 12 bits seem to change a lot (0x511, 0x410 and 0x30f seen + * yet). Next 12 bits always seem to be 0x300. If this is not true + * on this CPU, complain. Last 8 bits are frequency (in 100MHz). + */ + if (msr_hi || ((msr_lo & 0x00FFF000) != 0x300000)) { + printk(KERN_DEBUG "cpufreq: P4 - MSR_EBC_FREQUENCY_ID: 0x%x 0x%x\n", msr_lo, msr_hi); + printk(KERN_INFO "cpufreq: problem in initialization. Please contact Dominik Brodowski\n"); + printk(KERN_INFO "cpufreq: and attach this dmesg. Thanks in advance\n"); + return 0; + } + + msr_lo >>= 24; + return (msr_lo * 100000); +} + + +/** + * speedstep_detect_processor - detect Intel SpeedStep-capable processors. + * + * Returns the SPEEDSTEP_PROCESSOR_-number for the detected processor, + * or zero on failure. + */ +static unsigned int speedstep_detect_processor (void) +{ + struct cpuinfo_x86 *c = cpu_data; + u32 ebx; + + if ((c->x86_vendor != X86_VENDOR_INTEL) || + ((c->x86 != 6) && (c->x86 != 0xF))) + return 0; + + if (c->x86 == 0xF) { + /* Intel Pentium 4 Mobile P4-M */ + if (c->x86_model != 2) + return 0; + + if ((c->x86_mask != 4) && (c->x86_mask != 7)) + return 0; + + ebx = cpuid_ebx(0x00000001); + ebx &= 0x000000FF; + if ((ebx != 0x0e) && (ebx != 0x0f)) + return 0; + + return SPEEDSTEP_PROCESSOR_P4M; + } + + switch (c->x86_model) { + case 0x0B: /* Intel PIII [Tualatin] */ + /* cpuid_ebx(1) is 0x04 for desktop PIII, + 0x06 for mobile PIII-M */ + ebx = cpuid_ebx(0x00000001); + + ebx &= 0x000000FF; + if (ebx != 0x06) + return 0; + + /* So far all PIII-M processors support SpeedStep. See + * Intel's 24540633.pdf of August 2002 + */ + + return SPEEDSTEP_PROCESSOR_PIII_T; + + case 0x08: /* Intel PIII [Coppermine] */ + { + u32 msr_lo, msr_hi; + + /* all mobile PIII Coppermines have FSB 100 MHz + * ==> sort out a few desktop PIIIs. */ + rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_hi); + dprintk(KERN_DEBUG "cpufreq: Coppermine: MSR_IA32_EBL_Cr_POWERON is 0x%x, 0x%x\n", msr_lo, msr_hi); + msr_lo &= 0x00c0000; + if (msr_lo != 0x0080000) + return 0; + + if (speedstep_coppermine) + return SPEEDSTEP_PROCESSOR_PIII_C; + + printk(KERN_INFO "cpufreq: in case this is a SpeedStep-capable Intel Pentium III Coppermine\n"); + printk(KERN_INFO "cpufreq: processor, please pass the boot option or module parameter\n"); + printk(KERN_INFO "cpufreq: `speedstep_coppermine=1` to the kernel. Thanks!\n"); + return 0; + } + + default: + return 0; + } +} + + + +/********************************************************************* + * HIGH LEVEL FUNCTIONS * + *********************************************************************/ + +/** + * speedstep_detect_speeds - detects low and high CPU frequencies. + * + * Detects the low and high CPU frequencies in kHz. Returns 0 on + * success or -EINVAL / -EIO on problems. + */ +static int speedstep_detect_speeds (void) +{ + unsigned long flags; + unsigned int state; + int i, result; + + /* Disable irqs for entire detection process */ + local_irq_save(flags); + + for (i=0; i<2; i++) { + /* read the current state */ + result = speedstep_get_state(&state); + if (result) + return result; + + /* save the correct value, and switch to other */ + if (state == SPEEDSTEP_LOW) { + switch (speedstep_processor) { + case SPEEDSTEP_PROCESSOR_PIII_C: + case SPEEDSTEP_PROCESSOR_PIII_T: + speedstep_low_freq = pentium3_get_frequency(); + break; + case SPEEDSTEP_PROCESSOR_P4M: + speedstep_low_freq = pentium4_get_frequency(); + } + speedstep_set_state(SPEEDSTEP_HIGH, 0); + } else { + switch (speedstep_processor) { + case SPEEDSTEP_PROCESSOR_PIII_C: + case SPEEDSTEP_PROCESSOR_PIII_T: + speedstep_high_freq = pentium3_get_frequency(); + break; + case SPEEDSTEP_PROCESSOR_P4M: + speedstep_high_freq = pentium4_get_frequency(); + } + speedstep_set_state(SPEEDSTEP_LOW, 0); + } + } + + local_irq_restore(flags); + + if (!speedstep_low_freq || !speedstep_high_freq || + (speedstep_low_freq == speedstep_high_freq)) + return -EIO; + + return 0; +} + + +/** + * speedstep_setpolicy - set a new CPUFreq policy + * @policy: new policy + * + * Sets a new CPUFreq policy. + */ +static int speedstep_setpolicy (struct cpufreq_policy *policy) +{ + unsigned int newstate = 0; + + if (cpufreq_frequency_table_setpolicy(policy, &speedstep_freqs[0], &newstate)) + return -EINVAL; + + speedstep_set_state(newstate, 1); + + return 0; +} + + +/** + * speedstep_verify - verifies a new CPUFreq policy + * @freq: new policy + * + * Limit must be within speedstep_low_freq and speedstep_high_freq, with + * at least one border included. + */ +static int speedstep_verify (struct cpufreq_policy *policy) +{ + return cpufreq_frequency_table_verify(policy, &speedstep_freqs[0]); +} + + +#ifndef MODULE +/** + * speedstep_setup speedstep command line parameter parsing + * + * speedstep command line parameter. Use: + * speedstep_coppermine=1 + * if the CPU in your notebook is a SpeedStep-capable Intel + * Pentium III Coppermine. These processors cannot be detected + * automatically, as Intel continues to consider the detection + * alogrithm as proprietary material. + */ +static int __init speedstep_setup(char *str) +{ + speedstep_coppermine = simple_strtoul(str, &str, 0); + return 1; +} +__setup("speedstep_coppermine=", speedstep_setup); +#endif + +/** + * speedstep_init - initializes the SpeedStep CPUFreq driver + * + * Initializes the SpeedStep support. Returns -ENODEV on unsupported + * devices, -EINVAL on problems during initiatization, and zero on + * success. + */ +static int __init speedstep_init(void) +{ + int result; + unsigned int speed; + struct cpufreq_driver *driver; + + + /* detect chipset */ + speedstep_chipset = speedstep_detect_chipset(); + + /* detect chipset */ + if (speedstep_chipset) + speedstep_processor = speedstep_detect_processor(); + + if ((!speedstep_chipset) || (!speedstep_processor)) { + printk(KERN_INFO "cpufreq: Intel(R) SpeedStep(TM) for this %s not (yet) available.\n", speedstep_chipset ? "processor" : "chipset"); + return -ENODEV; + } + + dprintk(KERN_INFO "cpufreq: Intel(R) SpeedStep(TM) support $Revision: 1.64 $\n"); + dprintk(KERN_DEBUG "cpufreq: chipset 0x%x - processor 0x%x\n", + speedstep_chipset, speedstep_processor); + + /* activate speedstep support */ + result = speedstep_activate(); + if (result) + return result; + + /* detect low and high frequency */ + result = speedstep_detect_speeds(); + if (result) + return result; + + /* get current speed setting */ + result = speedstep_get_state(&speed); + if (result) + return result; + + speed = (speed == SPEEDSTEP_LOW) ? speedstep_low_freq : speedstep_high_freq; + + dprintk(KERN_INFO "cpufreq: currently at %s speed setting - %i MHz\n", + (speed == speedstep_low_freq) ? "low" : "high", + (speed / 1000)); + + /* initialization of main "cpufreq" code*/ + driver = kmalloc(sizeof(struct cpufreq_driver) + + NR_CPUS * sizeof(struct cpufreq_policy), GFP_KERNEL); + if (!driver) + return -ENOMEM; + + driver->policy = (struct cpufreq_policy *) (driver + 1); + + driver->policy[0].cpu = 0; + result = cpufreq_frequency_table_cpuinfo(&driver->policy[0], &speedstep_freqs[0]); + if (result) { + kfree(driver); + return result; + } + +#ifdef CONFIG_CPU_FREQ_24_API + driver->cpu_cur_freq[0] = speed; +#endif + + driver->verify = &speedstep_verify; + driver->setpolicy = &speedstep_setpolicy; + + driver->policy[0].cpuinfo.transition_latency = CPUFREQ_ETERNAL; + + driver->policy[0].policy = (speed == speedstep_low_freq) ? + CPUFREQ_POLICY_POWERSAVE : CPUFREQ_POLICY_PERFORMANCE; + + speedstep_driver = driver; + + result = cpufreq_register(driver); + if (result) { + speedstep_driver = NULL; + kfree(driver); + } + + return result; +} + + +/** + * speedstep_exit - unregisters SpeedStep support + * + * Unregisters SpeedStep support. + */ +static void __exit speedstep_exit(void) +{ + if (speedstep_driver) { + cpufreq_unregister(); + kfree(speedstep_driver); + } +} + + +MODULE_AUTHOR ("Dave Jones , Dominik Brodowski "); +MODULE_DESCRIPTION ("Speedstep driver for Intel mobile processors."); +MODULE_LICENSE ("GPL"); +module_init(speedstep_init); +module_exit(speedstep_exit); + +MODULE_PARM (speedstep_coppermine, "i"); diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/i386/kernel/sys_i386.c linux.21rc1-ac1/arch/i386/kernel/sys_i386.c --- linux.21rc1/arch/i386/kernel/sys_i386.c 2003-04-22 16:38:54.000000000 +0100 +++ linux.21rc1-ac1/arch/i386/kernel/sys_i386.c 2003-04-22 16:44:36.000000000 +0100 @@ -139,7 +139,10 @@ switch (call) { case SEMOP: - return sys_semop (first, (struct sembuf *)ptr, second); + return sys_semtimedop (first, (struct sembuf *)ptr, second, NULL); + case SEMTIMEDOP: + return sys_semtimedop (first, (struct sembuf *)ptr, second, + (const struct timespec *)fifth); case SEMGET: return sys_semget (first, second, third); case SEMCTL: { @@ -200,7 +203,7 @@ return sys_shmctl (first, second, (struct shmid_ds *) ptr); default: - return -EINVAL; + return -ENOSYS; } } diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/i386/kernel/time.c linux.21rc1-ac1/arch/i386/kernel/time.c --- linux.21rc1/arch/i386/kernel/time.c 2003-04-22 16:39:33.000000000 +0100 +++ linux.21rc1-ac1/arch/i386/kernel/time.c 2003-04-22 16:44:36.000000000 +0100 @@ -42,6 +42,8 @@ #include #include #include +#include +#include #include #include @@ -833,6 +835,50 @@ return 0; } +#ifdef CONFIG_CPU_FREQ +static unsigned int ref_freq = 0; +static unsigned long loops_per_jiffy_ref = 0; + +#ifndef CONFIG_SMP +static unsigned long fast_gettimeoffset_ref = 0; +static unsigned long cpu_khz_ref = 0; +#endif + +static int +time_cpufreq_notifier(struct notifier_block *nb, unsigned long val, + void *data) +{ + struct cpufreq_freqs *freq = data; + + if (!ref_freq) { + ref_freq = freq->old; + loops_per_jiffy_ref = cpu_data[freq->cpu].loops_per_jiffy; +#ifndef CONFIG_SMP + fast_gettimeoffset_ref = fast_gettimeoffset_quotient; + cpu_khz_ref = cpu_khz; +#endif + } + + if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) || + (val == CPUFREQ_POSTCHANGE && freq->old > freq->new)) { + cpu_data[freq->cpu].loops_per_jiffy = cpufreq_scale(loops_per_jiffy_ref, ref_freq, freq->new); +#ifndef CONFIG_SMP + if (use_tsc) { + fast_gettimeoffset_quotient = cpufreq_scale(fast_gettimeoffset_ref, freq->new, ref_freq); + cpu_khz = cpufreq_scale(cpu_khz_ref, ref_freq, freq->new); + } +#endif + } + + return 0; +} + +static struct notifier_block time_cpufreq_notifier_block = { + .notifier_call = time_cpufreq_notifier +}; +#endif + + void __init time_init(void) { extern int x86_udelay_tsc; @@ -904,6 +950,9 @@ } } +#ifdef CONFIG_CPU_FREQ + cpufreq_register_notifier(&time_cpufreq_notifier_block, CPUFREQ_TRANSITION_NOTIFIER); +#endif #ifdef CONFIG_VISWS printk("Starting Cobalt Timer system clock\n"); diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/i386/kernel/traps.c linux.21rc1-ac1/arch/i386/kernel/traps.c --- linux.21rc1/arch/i386/kernel/traps.c 2003-04-22 16:38:54.000000000 +0100 +++ linux.21rc1-ac1/arch/i386/kernel/traps.c 2003-04-22 16:44:36.000000000 +0100 @@ -284,6 +284,20 @@ void die(const char * str, struct pt_regs * regs, long err) { +#ifdef CONFIG_PNPBIOS + if (regs->xcs == 0x60 || regs->xcs == 0x68) + { + extern u32 pnp_bios_fault_eip, pnp_bios_fault_esp; + extern u32 pnp_bios_is_utter_crap; + pnp_bios_is_utter_crap = 1; + printk(KERN_CRIT "PNPBIOS fault.. attempting recovery.\n"); + __asm__ volatile( + "movl %0, %%esp\n\t" + "jmp %1\n\t" + : "=a" (pnp_bios_fault_esp), "=b" (pnp_bios_fault_eip)); + panic("do_trap: can't hit this"); + } +#endif console_verbose(); spin_lock_irq(&die_lock); bust_spinlocks(1); diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/i386/math-emu/fpu_system.h linux.21rc1-ac1/arch/i386/math-emu/fpu_system.h --- linux.21rc1/arch/i386/math-emu/fpu_system.h 2003-04-22 16:38:54.000000000 +0100 +++ linux.21rc1-ac1/arch/i386/math-emu/fpu_system.h 2003-04-22 16:44:36.000000000 +0100 @@ -20,7 +20,7 @@ of the stack frame of math_emulate() */ #define SETUP_DATA_AREA(arg) FPU_info = (struct info *) &arg -#define LDT_DESCRIPTOR(s) (((struct desc_struct *)current->mm->context.segments)[(s) >> 3]) +#define LDT_DESCRIPTOR(s) (((struct desc_struct *)current->mm->context.ldt)[(s) >> 3]) #define SEG_D_SIZE(x) ((x).b & (3 << 21)) #define SEG_G_BIT(x) ((x).b & (1 << 23)) #define SEG_GRANULARITY(x) (((x).b & (1 << 23)) ? 4096 : 1) diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/i386/mm/fault.c linux.21rc1-ac1/arch/i386/mm/fault.c --- linux.21rc1/arch/i386/mm/fault.c 2003-04-22 16:38:54.000000000 +0100 +++ linux.21rc1-ac1/arch/i386/mm/fault.c 2003-04-22 18:25:56.000000000 +0100 @@ -76,9 +76,7 @@ return 1; check_stack: - if (!(vma->vm_flags & VM_GROWSDOWN)) - goto bad_area; - if (expand_stack(vma, start) == 0) + if (!expand_stack(vma, start)) goto good_area; bad_area: diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/i386/mm/init.c linux.21rc1-ac1/arch/i386/mm/init.c --- linux.21rc1/arch/i386/mm/init.c 2003-04-22 16:39:33.000000000 +0100 +++ linux.21rc1-ac1/arch/i386/mm/init.c 2003-04-22 16:44:36.000000000 +0100 @@ -510,7 +510,15 @@ if (!mem_map) BUG(); - +#ifdef CONFIG_HIGHMEM + /* check that fixmap and pkmap do not overlap */ + if (PKMAP_BASE+LAST_PKMAP*PAGE_SIZE >= FIXADDR_START) { + printk(KERN_ERR "fixmap and kmap areas overlap - this will crash\n"); + printk(KERN_ERR "pkstart: %lxh pkend: %lxh fixstart %lxh\n", + PKMAP_BASE, PKMAP_BASE+LAST_PKMAP*PAGE_SIZE, FIXADDR_START); + BUG(); + } +#endif set_max_mapnr_init(); high_memory = (void *) __va(max_low_pfn * PAGE_SIZE); diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/ia64/ia32/sys_ia32.c linux.21rc1-ac1/arch/ia64/ia32/sys_ia32.c --- linux.21rc1/arch/ia64/ia32/sys_ia32.c 2003-04-22 16:39:33.000000000 +0100 +++ linux.21rc1-ac1/arch/ia64/ia32/sys_ia32.c 2003-04-22 16:44:36.000000000 +0100 @@ -2126,6 +2126,7 @@ #define SEMOP 1 #define SEMGET 2 #define SEMCTL 3 +#define SEMTIMEDOP 4 #define MSGSND 11 #define MSGRCV 12 #define MSGGET 13 @@ -2553,6 +2554,17 @@ return err; } +static long +semtimedop32(int semid, struct sembuf *tsems, int nsems, + const struct timespec32 *timeout32) +{ + struct timespec t; + if (get_user (t.tv_sec, &timeout32->tv_sec) || + get_user (t.tv_nsec, &timeout32->tv_nsec)) + return -EFAULT; + return sys_semtimedop(semid, tsems, nsems, &t); +} + asmlinkage long sys32_ipc (u32 call, int first, int second, int third, u32 ptr, u32 fifth) { @@ -2564,7 +2576,11 @@ switch (call) { case SEMOP: /* struct sembuf is the same on 32 and 64bit :)) */ - return sys_semop(first, (struct sembuf *)AA(ptr), second); + return sys_semtimedop(first, (struct sembuf *)AA(ptr), second, + NULL); + case SEMTIMEDOP: + return semtimedop32(first, (struct sembuf *)AA(ptr), second, + (const struct timespec32 *)AA(fifth)); case SEMGET: return sys_semget(first, second, third); case SEMCTL: @@ -3783,7 +3799,11 @@ return result; } -struct dqblk32 { +extern asmlinkage long sys_quotactl(int cmd, const char *special, int id, caddr_t addr); + +#ifdef CONFIG_QIFACE_COMPAT +#ifdef CONFIG_QIFACE_V1 +struct user_dqblk32 { __u32 dqb_bhardlimit; __u32 dqb_bsoftlimit; __u32 dqb_curblocks; @@ -3793,49 +3813,82 @@ __kernel_time_t32 dqb_btime; __kernel_time_t32 dqb_itime; }; +typedef struct v1c_mem_dqblk comp_dqblk_t; -asmlinkage long -sys32_quotactl (int cmd, unsigned int special, int id, struct dqblk32 *addr) +#define Q_COMP_GETQUOTA Q_V1_GETQUOTA +#define Q_COMP_SETQUOTA Q_V1_SETQUOTA +#define Q_COMP_SETQLIM Q_V1_SETQLIM +#define Q_COMP_SETUSE Q_V1_SETUSE +#else +struct user_dqblk32 { + __u32 dqb_ihardlimit; + __u32 dqb_isoftlimit; + __u32 dqb_curinodes; + __u32 dqb_bhardlimit; + __u32 dqb_bsoftlimit; + __u64 dqb_curspace; + __kernel_time_t32 dqb_btime; + __kernel_time_t32 dqb_itime; +}; +typedef struct v2c_mem_dqblk comp_dqblk_t; + +#define Q_COMP_GETQUOTA Q_V2_GETQUOTA +#define Q_COMP_SETQUOTA Q_V2_SETQUOTA +#define Q_COMP_SETQLIM Q_V2_SETQLIM +#define Q_COMP_SETUSE Q_V2_SETUSE +#endif + +asmlinkage long sys32_quotactl(int cmd, const char *special, int id, caddr_t addr) { - extern asmlinkage long sys_quotactl (int, const char *, int, caddr_t); int cmds = cmd >> SUBCMDSHIFT; + long err; + comp_dqblk_t d; mm_segment_t old_fs; - struct dqblk d; char *spec; - long err; - + switch (cmds) { - case Q_GETQUOTA: - break; - case Q_SETQUOTA: - case Q_SETUSE: - case Q_SETQLIM: - if (copy_from_user (&d, addr, sizeof(struct dqblk32))) - return -EFAULT; - d.dqb_itime = ((struct dqblk32 *)&d)->dqb_itime; - d.dqb_btime = ((struct dqblk32 *)&d)->dqb_btime; - break; - default: - return sys_quotactl(cmd, (void *) A(special), id, (caddr_t) addr); + case Q_COMP_GETQUOTA: + break; + case Q_COMP_SETQUOTA: + case Q_COMP_SETUSE: + case Q_COMP_SETQLIM: + if (copy_from_user(&d, (struct user_dqblk32 *)addr, + sizeof (struct user_dqblk32))) + return -EFAULT; + d.dqb_itime = ((struct user_dqblk32 *)&d)->dqb_itime; + d.dqb_btime = ((struct user_dqblk32 *)&d)->dqb_btime; + break; + default: + return sys_quotactl(cmd, special, id, (__kernel_caddr_t)addr); } - spec = getname32((void *) A(special)); + spec = getname (special); err = PTR_ERR(spec); - if (IS_ERR(spec)) + if (IS_ERR(spec)) return err; + old_fs = get_fs(); + set_fs (KERNEL_DS); + err = sys_quotactl(cmd, (const char *)spec, id, (__kernel_caddr_t)&d); + set_fs (old_fs); + putname (spec); + if (err) return err; - old_fs = get_fs (); - set_fs(KERNEL_DS); - err = sys_quotactl(cmd, (const char *)spec, id, (caddr_t)&d); - set_fs(old_fs); - putname(spec); - if (cmds == Q_GETQUOTA) { + if (cmds == Q_COMP_GETQUOTA) { __kernel_time_t b = d.dqb_btime, i = d.dqb_itime; - ((struct dqblk32 *)&d)->dqb_itime = i; - ((struct dqblk32 *)&d)->dqb_btime = b; - if (copy_to_user(addr, &d, sizeof(struct dqblk32))) + ((struct user_dqblk32 *)&d)->dqb_itime = i; + ((struct user_dqblk32 *)&d)->dqb_btime = b; + if (copy_to_user ((struct user_dqblk32 *)addr, &d, + sizeof (struct user_dqblk32))) return -EFAULT; } - return err; + return 0; +} + +#else +/* No conversion needed for new interface */ +asmlinkage long sys32_quotactl(int cmd, const char *special, int id, caddr_t addr) +{ + return sys_quotactl(cmd, special, id, addr); } +#endif asmlinkage long sys32_sched_rr_get_interval (pid_t pid, struct timespec32 *interval) diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/ia64/kernel/entry.S linux.21rc1-ac1/arch/ia64/kernel/entry.S --- linux.21rc1/arch/ia64/kernel/entry.S 2003-04-22 16:39:33.000000000 +0100 +++ linux.21rc1-ac1/arch/ia64/kernel/entry.S 2003-04-22 16:44:36.000000000 +0100 @@ -1200,7 +1200,7 @@ data8 ia64_ni_syscall data8 ia64_ni_syscall // 1245 data8 ia64_ni_syscall - data8 ia64_ni_syscall + data8 sys_semtimedop data8 ia64_ni_syscall data8 ia64_ni_syscall data8 ia64_ni_syscall // 1250 diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/ia64/mm/fault.c linux.21rc1-ac1/arch/ia64/mm/fault.c --- linux.21rc1/arch/ia64/mm/fault.c 2003-04-22 16:39:33.000000000 +0100 +++ linux.21rc1-ac1/arch/ia64/mm/fault.c 2003-04-22 16:44:36.000000000 +0100 @@ -127,8 +127,6 @@ check_expansion: if (!(prev_vma && (prev_vma->vm_flags & VM_GROWSUP) && (address == prev_vma->vm_end))) { - if (!(vma->vm_flags & VM_GROWSDOWN)) - goto bad_area; if (rgn_index(address) != rgn_index(vma->vm_start) || rgn_offset(address) >= RGN_MAP_LIMIT) goto bad_area; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/mips/au1000/common/serial.c linux.21rc1-ac1/arch/mips/au1000/common/serial.c --- linux.21rc1/arch/mips/au1000/common/serial.c 2003-04-22 16:38:56.000000000 +0100 +++ linux.21rc1-ac1/arch/mips/au1000/common/serial.c 2003-04-22 16:44:36.000000000 +0100 @@ -195,7 +195,7 @@ #if defined(MODULE) && defined(SERIAL_DEBUG_MCOUNT) #define DBG_CNT(s) printk("(%s): [%x] refc=%d, serc=%d, ttyc=%d -> %s\n", \ - kdevname(tty->device), (info->flags), serial_refcount,info->count,tty->count,s) + kdevname(tty->device), (info->flags), serial_refcount,info->count,atomic_read(&tty->count),s) #else #define DBG_CNT(s) #endif @@ -1909,7 +1909,7 @@ #ifdef SERIAL_DEBUG_OPEN printk("rs_close ttys%d, count = %d\n", info->line, state->count); #endif - if ((tty->count == 1) && (state->count != 1)) { + if ((atomic_read(&tty->count) == 1) && (state->count != 1)) { /* * Uh, oh. tty->count is 1, which means that the tty * structure will be freed. state->count should always diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/mips/baget/vacserial.c linux.21rc1-ac1/arch/mips/baget/vacserial.c --- linux.21rc1/arch/mips/baget/vacserial.c 2003-04-22 16:38:54.000000000 +0100 +++ linux.21rc1-ac1/arch/mips/baget/vacserial.c 2003-04-22 16:44:36.000000000 +0100 @@ -29,7 +29,7 @@ #if defined(MODULE) && defined(SERIAL_DEBUG_MCOUNT) #define DBG_CNT(s) baget_printk("(%s):[%x] refc=%d, serc=%d, ttyc=%d-> %s\n", \ - kdevname(tty->device),(info->flags),serial_refcount,info->count,tty->count,s) + kdevname(tty->device),(info->flags),serial_refcount,info->count,atomic_read(&tty->count),s) #else #define DBG_CNT(s) #endif @@ -1658,7 +1658,7 @@ baget_printk("rs_close ttys%d, count = %d\n", info->line, state->count); #endif - if ((tty->count == 1) && (state->count != 1)) { + if ((atomic_read(&tty->count) == 1) && (state->count != 1)) { /* * Uh, oh. tty->count is 1, which means that the tty * structure will be freed. state->count should always diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/mips/mm/fault.c linux.21rc1-ac1/arch/mips/mm/fault.c --- linux.21rc1/arch/mips/mm/fault.c 2003-04-22 16:38:54.000000000 +0100 +++ linux.21rc1-ac1/arch/mips/mm/fault.c 2003-04-22 16:44:36.000000000 +0100 @@ -111,8 +111,6 @@ goto bad_area; if (vma->vm_start <= address) goto good_area; - if (!(vma->vm_flags & VM_GROWSDOWN)) - goto bad_area; if (expand_stack(vma, address)) goto bad_area; /* diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/mips64/mm/fault.c linux.21rc1-ac1/arch/mips64/mm/fault.c --- linux.21rc1/arch/mips64/mm/fault.c 2003-04-22 16:38:58.000000000 +0100 +++ linux.21rc1-ac1/arch/mips64/mm/fault.c 2003-04-22 16:44:36.000000000 +0100 @@ -135,8 +135,6 @@ goto bad_area; if (vma->vm_start <= address) goto good_area; - if (!(vma->vm_flags & VM_GROWSDOWN)) - goto bad_area; if (expand_stack(vma, address)) goto bad_area; /* diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/parisc/config.in linux.21rc1-ac1/arch/parisc/config.in --- linux.21rc1/arch/parisc/config.in 2003-04-22 16:38:58.000000000 +0100 +++ linux.21rc1-ac1/arch/parisc/config.in 2003-04-22 16:44:36.000000000 +0100 @@ -47,9 +47,6 @@ bool 'Symmetric multi-processing support' CONFIG_SMP bool 'Chassis LCD and LED support' CONFIG_CHASSIS_LCD_LED -bool 'Kernel Debugger support' CONFIG_KWDB -# define_bool CONFIG_KWDB n - bool 'U2/Uturn I/O MMU' CONFIG_IOMMU_CCIO bool 'VSC/GSC/HSC bus support' CONFIG_GSC dep_bool ' Lasi I/O support' CONFIG_GSC_LASI $CONFIG_GSC @@ -194,6 +191,7 @@ #bool 'Debug kmalloc/kfree' CONFIG_DEBUG_MALLOC bool 'Magic SysRq key' CONFIG_MAGIC_SYSRQ +bool 'Debug spinlocks' CONFIG_DEBUG_SPINLOCK endmenu source lib/Config.in diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/parisc/kernel/lasimap.map linux.21rc1-ac1/arch/parisc/kernel/lasimap.map --- linux.21rc1/arch/parisc/kernel/lasimap.map 2003-04-22 16:38:58.000000000 +0100 +++ linux.21rc1-ac1/arch/parisc/kernel/lasimap.map 1970-01-01 01:00:00.000000000 +0100 @@ -1,322 +0,0 @@ -# HP 712 kernel keymap. This uses 7 modifier combinations. - -keymaps 0-2,4-5,8,12 -# ie, plain, Shift, AltGr, Control, Control+Shift, Alt and Control+Alt - - -# Change the above line into -# keymaps 0-2,4-6,8,12 -# in case you want the entries -# altgr control keycode 83 = Boot -# altgr control keycode 111 = Boot -# below. -# -# In fact AltGr is used very little, and one more keymap can -# be saved by mapping AltGr to Alt (and adapting a few entries): -# keycode 100 = Alt -# -keycode 1 = F9 F19 Console_21 - control keycode 1 = F9 - alt keycode 1 = Console_9 - control alt keycode 1 = Console_9 -keycode 2 = -keycode 3 = F5 F15 Console_17 - control keycode 3 = F5 - alt keycode 3 = Console_5 - control alt keycode 3 = Console_5 -keycode 4 = F3 F13 Console_15 - control keycode 4 = F3 - alt keycode 4 = Console_3 - control alt keycode 4 = Console_3 -keycode 5 = F1 F11 Console_13 - control keycode 5 = F1 - alt keycode 5 = Console_1 - control alt keycode 5 = Console_1 -keycode 6 = F2 F12 Console_14 - control keycode 6 = F2 - alt keycode 6 = Console_2 - control alt keycode 6 = Console_2 -keycode 7 = F12 F12 Console_24 - control keycode 7 = F12 - alt keycode 7 = Console_12 - control alt keycode 7 = Console_12 -keycode 8 = -keycode 9 = F10 F20 Console_22 - control keycode 9 = F10 - alt keycode 9 = Console_10 - control alt keycode 9 = Console_10 -keycode 10 = F8 F18 Console_20 - control keycode 10 = F8 - alt keycode 10 = Console_8 - control alt keycode 10 = Console_8 -keycode 11 = F6 F16 Console_18 - control keycode 11 = F6 - alt keycode 11 = Console_6 - control alt keycode 11 = Console_6 -keycode 12 = F4 F14 Console_16 - control keycode 12 = F4 - alt keycode 12 = Console_4 - control alt keycode 12 = Console_4 -keycode 13 = Tab Tab - alt keycode 13 = Meta_Tab -keycode 14 = grave asciitilde - control keycode 14 = nul - alt keycode 14 = Meta_grave -keycode 15 = -keycode 16 = -keycode 17 = Alt -keycode 18 = Shift -keycode 19 = -keycode 20 = Control -keycode 21 = q -keycode 22 = one exclam exclam -keycode 23 = -keycode 24 = -keycode 25 = -keycode 26 = z -keycode 27 = s -keycode 28 = a - altgr keycode 28 = Hex_A -keycode 29 = w -keycode 30 = two at at -keycode 31 = -keycode 32 = -keycode 33 = c - altgr keycode 46 = Hex_C -keycode 34 = x -keycode 35 = d - altgr keycode 35 = Hex_D -keycode 36 = e - altgr keycode 36 = Hex_E -keycode 37 = four dollar -keycode 38 = three numbersign -keycode 39 = -keycode 40 = -keycode 41 = -keycode 42 = v -keycode 43 = f - altgr keycode 43 = Hex_F -keycode 44 = t -keycode 45 = r -keycode 46 = five percent -keycode 47 = -keycode 48 = -keycode 49 = n -keycode 50 = b - altgr keycode 50 = Hex_B -keycode 51 = h -keycode 52 = g -keycode 53 = y -keycode 54 = six asciicircum -keycode 55 = -keycode 56 = -keycode 57 = -keycode 58 = m -keycode 59 = j -keycode 60 = u -keycode 61 = seven ampersand -keycode 62 = eight asterisk asterisk -keycode 63 = -keycode 64 = -keycode 65 = comma less - alt keycode 65 = Meta_comma -keycode 66 = k -keycode 67 = i -keycode 68 = o -keycode 69 = zero parenright bracketright -keycode 70 = nine parenleft bracketleft -keycode 71 = -keycode 72 = -keycode 73 = period greater - control keycode 73 = Compose - alt keycode 73 = Meta_period -keycode 74 = slash question - control keycode 74 = Delete - alt keycode 53 = Meta_slash -keycode 75 = l -keycode 76 = semicolon colon - alt keycode 39 = Meta_semicolon -keycode 77 = p -keycode 78 = minus underscore -keycode 79 = -keycode 80 = -keycode 81 = -keycode 82 = apostrophe quotedbl - control keycode 82 = Control_g - alt keycode 40 = Meta_apostrophe -keycode 83 = -keycode 84 = bracketleft braceleft - control keycode 84 = Escape - alt keycode 26 = Meta_bracketleft -keycode 85 = equal plus -keycode 86 = -keycode 87 = -keycode 88 = Caps_Lock -keycode 88 = -keycode 89 = -keycode 89 = -keycode 89 = -keycode 90 = Return - alt keycode 90 = Meta_Control_m -keycode 91 = bracketright braceright asciitilde - control keycode 91 = Control_bracketright - alt keycode 91 = Meta_bracketright -keycode 92 = -keycode 93 = backslash bar - control keycode 43 = Control_backslash - alt keycode 43 = Meta_backslash -keycode 94 = -keycode 95 = -keycode 96 = -keycode 97 = -keycode 98 = -keycode 99 = -keycode 100 = -keycode 101 = -keycode 102 = BackSpace -keycode 103 = -keycode 104 = -keycode 105 = KP_1 - alt keycode 105 = Ascii_1 - altgr keycode 105 = Hex_1 -keycode 106 = -keycode 107 = KP_4 - alt keycode 107 = Ascii_4 - altgr keycode 107 = Hex_4 -keycode 108 = KP_7 - alt keycode 108 = Ascii_7 - altgr keycode 108 = Hex_7 -keycode 109 = -keycode 110 = -keycode 111 = -keycode 112 = KP_0 - alt keycode 82 = Ascii_0 - altgr keycode 82 = Hex_0 -keycode 113 = KP_Period -keycode 114 = KP_2 - alt keycode 114 = Ascii_2 - altgr keycode 114 = Hex_2 -keycode 115 = KP_5 - alt keycode 115 = Ascii_5 - altgr keycode 115 = Hex_5 -keycode 116 = KP_6 - alt keycode 116 = Ascii_6 - altgr keycode 116 = Hex_6 -keycode 117 = KP_8 - alt keycode 117 = Ascii_8 - altgr keycode 117 = Hex_8 -keycode 118 = Escape -keycode 119 = -keycode 120 = F11 -keycode 121 = KP_Add -keycode 122 = KP_3 - alt keycode 122 = Ascii_3 - altgr keycode 122 = Hex_3 -keycode 123 = KP_Subtract -keycode 124 = KP_Multiply -keycode 125 = KP_9 - alt keycode 125 = Ascii_9 - altgr keycode 125 = Hex_9 -keycode 126 = -# 131!! -keycode 127 = F7 F17 Console_19 - control keycode 127 = F7 - alt keycode 127 = Console_7 - control alt keycode 127 = Console_7 - -string F1 = "\033[[A" -string F2 = "\033[[B" -string F3 = "\033[[C" -string F4 = "\033[[D" -string F5 = "\033[[E" -string F6 = "\033[17~" -string F7 = "\033[18~" -string F8 = "\033[19~" -string F9 = "\033[20~" -string F10 = "\033[21~" -string F11 = "\033[23~" -string F12 = "\033[24~" -string F13 = "\033[25~" -string F14 = "\033[26~" -string F15 = "\033[28~" -string F16 = "\033[29~" -string F17 = "\033[31~" -string F18 = "\033[32~" -string F19 = "\033[33~" -string F20 = "\033[34~" -string Find = "\033[1~" -string Insert = "\033[2~" -string Remove = "\033[3~" -string Select = "\033[4~" -string Prior = "\033[5~" -string Next = "\033[6~" -string Macro = "\033[M" -string Pause = "\033[P" -compose '`' 'A' to 'À' -compose '`' 'a' to 'à' -compose '\'' 'A' to 'Á' -compose '\'' 'a' to 'á' -compose '^' 'A' to 'Â' -compose '^' 'a' to 'â' -compose '~' 'A' to 'Ã' -compose '~' 'a' to 'ã' -compose '"' 'A' to 'Ä' -compose '"' 'a' to 'ä' -compose 'O' 'A' to 'Å' -compose 'o' 'a' to 'å' -compose '0' 'A' to 'Å' -compose '0' 'a' to 'å' -compose 'A' 'A' to 'Å' -compose 'a' 'a' to 'å' -compose 'A' 'E' to 'Æ' -compose 'a' 'e' to 'æ' -compose ',' 'C' to 'Ç' -compose ',' 'c' to 'ç' -compose '`' 'E' to 'È' -compose '`' 'e' to 'è' -compose '\'' 'E' to 'É' -compose '\'' 'e' to 'é' -compose '^' 'E' to 'Ê' -compose '^' 'e' to 'ê' -compose '"' 'E' to 'Ë' -compose '"' 'e' to 'ë' -compose '`' 'I' to 'Ì' -compose '`' 'i' to 'ì' -compose '\'' 'I' to 'Í' -compose '\'' 'i' to 'í' -compose '^' 'I' to 'Î' -compose '^' 'i' to 'î' -compose '"' 'I' to 'Ï' -compose '"' 'i' to 'ï' -compose '-' 'D' to 'Ð' -compose '-' 'd' to 'ð' -compose '~' 'N' to 'Ñ' -compose '~' 'n' to 'ñ' -compose '`' 'O' to 'Ò' -compose '`' 'o' to 'ò' -compose '\'' 'O' to 'Ó' -compose '\'' 'o' to 'ó' -compose '^' 'O' to 'Ô' -compose '^' 'o' to 'ô' -compose '~' 'O' to 'Õ' -compose '~' 'o' to 'õ' -compose '"' 'O' to 'Ö' -compose '"' 'o' to 'ö' -compose '/' 'O' to 'Ø' -compose '/' 'o' to 'ø' -compose '`' 'U' to 'Ù' -compose '`' 'u' to 'ù' -compose '\'' 'U' to 'Ú' -compose '\'' 'u' to 'ú' -compose '^' 'U' to 'Û' -compose '^' 'u' to 'û' -compose '"' 'U' to 'Ü' -compose '"' 'u' to 'ü' -compose '\'' 'Y' to 'Ý' -compose '\'' 'y' to 'ý' -compose 'T' 'H' to 'Þ' -compose 't' 'h' to 'þ' -compose 's' 's' to 'ß' -compose '"' 'y' to 'ÿ' -compose 's' 'z' to 'ß' -compose 'i' 'j' to 'ÿ' diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/ppc/8xx_io/uart.c linux.21rc1-ac1/arch/ppc/8xx_io/uart.c --- linux.21rc1/arch/ppc/8xx_io/uart.c 2003-04-22 16:39:33.000000000 +0100 +++ linux.21rc1-ac1/arch/ppc/8xx_io/uart.c 2003-04-22 16:44:36.000000000 +0100 @@ -1679,7 +1679,7 @@ #ifdef SERIAL_DEBUG_OPEN printk("rs_close ttys%d, count = %d\n", info->line, state->count); #endif - if ((tty->count == 1) && (state->count != 1)) { + if ((atomic_read(&tty->count) == 1) && (state->count != 1)) { /* * Uh, oh. tty->count is 1, which means that the tty * structure will be freed. state->count should always diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/ppc/kernel/cputable.c linux.21rc1-ac1/arch/ppc/kernel/cputable.c --- linux.21rc1/arch/ppc/kernel/cputable.c 2003-04-22 16:39:33.000000000 +0100 +++ linux.21rc1-ac1/arch/ppc/kernel/cputable.c 2003-04-22 18:16:10.000000000 +0100 @@ -26,8 +26,7 @@ extern void __setup_cpu_750fx(unsigned long offset, int cpu_nr, struct cpu_spec* spec); extern void __setup_cpu_7400(unsigned long offset, int cpu_nr, struct cpu_spec* spec); extern void __setup_cpu_7410(unsigned long offset, int cpu_nr, struct cpu_spec* spec); -extern void __setup_cpu_7450(unsigned long offset, int cpu_nr, struct cpu_spec* spec); -extern void __setup_cpu_7455(unsigned long offset, int cpu_nr, struct cpu_spec* spec); +extern void __setup_cpu_745x(unsigned long offset, int cpu_nr, struct cpu_spec* spec); extern void __setup_cpu_power3(unsigned long offset, int cpu_nr, struct cpu_spec* spec); extern void __setup_cpu_power4(unsigned long offset, int cpu_nr, struct cpu_spec* spec); extern void __setup_cpu_8xx(unsigned long offset, int cpu_nr, struct cpu_spec* spec); @@ -154,7 +153,7 @@ 0xffff0000, 0x70000000, "750FX", CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_CAN_NAP | - CPU_FTR_DUAL_PLL_750FX, + CPU_FTR_DUAL_PLL_750FX | CPU_FTR_HAS_HIGH_BATS, COMMON_PPC, 32, 32, __setup_cpu_750fx @@ -201,7 +200,7 @@ CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450, COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC, 32, 32, - __setup_cpu_7450 + __setup_cpu_745x }, { /* 7450 2.1 */ 0xffffffff, 0x80000201, "7450", @@ -211,7 +210,7 @@ CPU_FTR_L3_DISABLE_NAP, COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC, 32, 32, - __setup_cpu_7450 + __setup_cpu_745x }, { /* 7450 2.3 and newer */ 0xffff0000, 0x80000000, "7450", @@ -220,35 +219,46 @@ CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR, COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC, 32, 32, - __setup_cpu_7450 + __setup_cpu_745x }, { /* 7455 rev 1.x */ 0xffffff00, 0x80010100, "7455", CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR | - CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450, + CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_HAS_HIGH_BATS, COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC, 32, 32, - __setup_cpu_7455 + __setup_cpu_745x }, { /* 7455 rev 2.0 */ 0xffffffff, 0x80010200, "7455", CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR | - CPU_FTR_L3_DISABLE_NAP, + CPU_FTR_L3_DISABLE_NAP | CPU_FTR_HAS_HIGH_BATS, COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC, 32, 32, - __setup_cpu_7455 + __setup_cpu_745x }, { /* 7455 others */ 0xffff0000, 0x80010000, "7455", CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR | - CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR, + CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR | + CPU_FTR_HAS_HIGH_BATS, + COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC, + 32, 32, + __setup_cpu_745x + }, + { /* 7457 */ + 0xffff0000, 0x80020000, "7457", + CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_CAN_NAP | + CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR | + CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR | + CPU_FTR_HAS_HIGH_BATS, COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC, 32, 32, - __setup_cpu_7455 + __setup_cpu_745x }, { /* 82xx (8240, 8245, 8260 are all 603e cores) */ 0x7fff0000, 0x00810000, "82xx", diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/ppc/kernel/entry.S linux.21rc1-ac1/arch/ppc/kernel/entry.S --- linux.21rc1/arch/ppc/kernel/entry.S 2003-04-22 16:39:33.000000000 +0100 +++ linux.21rc1-ac1/arch/ppc/kernel/entry.S 2003-04-22 16:44:36.000000000 +0100 @@ -260,7 +260,9 @@ .globl ret_from_fork ret_from_fork: +#ifdef CONFIG_SMP bl schedule_tail +#endif lwz r0,TASK_PTRACE(r2) andi. r0,r0,PT_TRACESYS bnel- syscall_trace diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/ppc/kernel/i8259.c linux.21rc1-ac1/arch/ppc/kernel/i8259.c --- linux.21rc1/arch/ppc/kernel/i8259.c 2003-04-22 16:39:33.000000000 +0100 +++ linux.21rc1-ac1/arch/ppc/kernel/i8259.c 2003-04-22 18:16:10.000000000 +0100 @@ -141,6 +141,7 @@ NULL }; +#if 0 /* Do not request these before the host bridge resource have been setup */ static struct resource pic1_iores = { "8259 (master)", 0x20, 0x21, IORESOURCE_BUSY }; @@ -152,6 +153,7 @@ static struct resource pic_edgectrl_iores = { "8259 edge control", 0x4d0, 0x4d1, IORESOURCE_BUSY }; +#endif void __init i8259_init(unsigned long intack_addr) { diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/ppc/kernel/idle.c linux.21rc1-ac1/arch/ppc/kernel/idle.c --- linux.21rc1/arch/ppc/kernel/idle.c 2003-04-22 16:39:33.000000000 +0100 +++ linux.21rc1-ac1/arch/ppc/kernel/idle.c 2003-04-22 16:44:36.000000000 +0100 @@ -48,9 +48,6 @@ do_power_save = 1; /* endless loop with no priority at all */ - current->nice = 20; - current->counter = -100; - init_idle(); for (;;) { #ifdef CONFIG_SMP if (!do_power_save) { @@ -70,11 +67,8 @@ if (do_power_save && !current->need_resched) power_save_6xx(); #endif /* CONFIG_6xx */ - - if (current->need_resched) { - schedule(); - check_pgt_cache(); - } + schedule(); + check_pgt_cache(); } return 0; } diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/ppc/kernel/mk_defs.c linux.21rc1-ac1/arch/ppc/kernel/mk_defs.c --- linux.21rc1/arch/ppc/kernel/mk_defs.c 2003-04-22 16:39:33.000000000 +0100 +++ linux.21rc1-ac1/arch/ppc/kernel/mk_defs.c 2003-04-22 16:44:36.000000000 +0100 @@ -34,8 +34,7 @@ /*DEFINE(KERNELBASE, KERNELBASE);*/ DEFINE(STATE, offsetof(struct task_struct, state)); DEFINE(NEXT_TASK, offsetof(struct task_struct, next_task)); - DEFINE(COUNTER, offsetof(struct task_struct, counter)); - DEFINE(PROCESSOR, offsetof(struct task_struct, processor)); + DEFINE(PROCESSOR, offsetof(struct task_struct, cpu)); DEFINE(SIGPENDING, offsetof(struct task_struct, sigpending)); DEFINE(THREAD, offsetof(struct task_struct, thread)); DEFINE(MM, offsetof(struct task_struct, mm)); diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/ppc/kernel/ppc_defs.h linux.21rc1-ac1/arch/ppc/kernel/ppc_defs.h --- linux.21rc1/arch/ppc/kernel/ppc_defs.h 1970-01-01 01:00:00.000000000 +0100 +++ linux.21rc1-ac1/arch/ppc/kernel/ppc_defs.h 2003-04-22 16:44:36.000000000 +0100 @@ -0,0 +1,81 @@ +/* + * WARNING! This file is automatically generated - DO NOT EDIT! + */ +#define STATE 0 +#define NEXT_TASK 76 +#define PROCESSOR 32 +#define SIGPENDING 8 +#define THREAD 608 +#define MM 84 +#define ACTIVE_MM 88 +#define TASK_STRUCT_SIZE 1520 +#define KSP 0 +#define PGDIR 16 +#define LAST_SYSCALL 20 +#define PT_REGS 8 +#define PT_TRACESYS 2 +#define TASK_FLAGS 4 +#define TASK_PTRACE 24 +#define NEED_RESCHED 20 +#define THREAD_FPR0 24 +#define THREAD_FPSCR 284 +#define THREAD_VR0 288 +#define THREAD_VRSAVE 816 +#define THREAD_VSCR 800 +#define TASK_UNION_SIZE 8192 +#define STACK_FRAME_OVERHEAD 16 +#define INT_FRAME_SIZE 192 +#define GPR0 16 +#define GPR1 20 +#define GPR2 24 +#define GPR3 28 +#define GPR4 32 +#define GPR5 36 +#define GPR6 40 +#define GPR7 44 +#define GPR8 48 +#define GPR9 52 +#define GPR10 56 +#define GPR11 60 +#define GPR12 64 +#define GPR13 68 +#define GPR14 72 +#define GPR15 76 +#define GPR16 80 +#define GPR17 84 +#define GPR18 88 +#define GPR19 92 +#define GPR20 96 +#define GPR21 100 +#define GPR22 104 +#define GPR23 108 +#define GPR24 112 +#define GPR25 116 +#define GPR26 120 +#define GPR27 124 +#define GPR28 128 +#define GPR29 132 +#define GPR30 136 +#define GPR31 140 +#define _NIP 144 +#define _MSR 148 +#define _CTR 156 +#define _LINK 160 +#define _CCR 168 +#define _MQ 172 +#define _XER 164 +#define _DAR 180 +#define _DSISR 184 +#define _DEAR 180 +#define _ESR 184 +#define ORIG_GPR3 152 +#define RESULT 188 +#define TRAP 176 +#define CLONE_VM 256 +#define MM_PGD 12 +#define CPU_SPEC_ENTRY_SIZE 32 +#define CPU_SPEC_PVR_MASK 0 +#define CPU_SPEC_PVR_VALUE 4 +#define CPU_SPEC_FEATURES 12 +#define CPU_SPEC_SETUP 28 +#define NUM_USER_SEGMENTS 8 diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/ppc/kernel/smp.c linux.21rc1-ac1/arch/ppc/kernel/smp.c --- linux.21rc1/arch/ppc/kernel/smp.c 2003-04-22 16:39:33.000000000 +0100 +++ linux.21rc1-ac1/arch/ppc/kernel/smp.c 2003-04-22 17:01:10.000000000 +0100 @@ -294,8 +294,6 @@ cpu_callin_map[0] = 1; current->processor = 0; - init_idle(); - for (i = 0; i < NR_CPUS; i++) { prof_counter[i] = 1; prof_multiplier[i] = 1; @@ -351,7 +349,8 @@ p = init_task.prev_task; if (!p) panic("No idle task for CPU %d", i); - del_from_runqueue(p); + init_idle(p, i); + unhash_process(p); init_tasks[i] = p; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/ppc/mm/fault.c linux.21rc1-ac1/arch/ppc/mm/fault.c --- linux.21rc1/arch/ppc/mm/fault.c 2003-04-22 16:39:34.000000000 +0100 +++ linux.21rc1-ac1/arch/ppc/mm/fault.c 2003-04-22 16:44:36.000000000 +0100 @@ -141,42 +141,40 @@ goto bad_area; if (vma->vm_start <= address) goto good_area; - if (!(vma->vm_flags & VM_GROWSDOWN)) - goto bad_area; - if (!is_write) - goto bad_area; - - /* - * N.B. The rs6000/xcoff ABI allows programs to access up to - * a few hundred bytes below the stack pointer. - * The kernel signal delivery code writes up to about 1.5kB - * below the stack pointer (r1) before decrementing it. - * The exec code can write slightly over 640kB to the stack - * before setting the user r1. Thus we allow the stack to - * expand to 1MB without further checks. - */ - if (address + 0x100000 < vma->vm_end) { - /* get user regs even if this fault is in kernel mode */ - struct pt_regs *uregs = current->thread.regs; - if (uregs == NULL) - goto bad_area; - - /* - * A user-mode access to an address a long way below - * the stack pointer is only valid if the instruction - * is one which would update the stack pointer to the - * address accessed if the instruction completed, - * i.e. either stwu rs,n(r1) or stwux rs,r1,rb - * (or the byte, halfword, float or double forms). - * - * If we don't check this then any write to the area - * between the last mapped region and the stack will - * expand the stack rather than segfaulting. - */ - if (address + 2048 < uregs->gpr[1] - && (!user_mode(regs) || !store_updates_sp(regs))) - goto bad_area; - } + if (!is_write) + goto bad_area; + + /* + * N.B. The rs6000/xcoff ABI allows programs to access up to + * a few hundred bytes below the stack pointer. + * The kernel signal delivery code writes up to about 1.5kB + * below the stack pointer (r1) before decrementing it. + * The exec code can write slightly over 640kB to the stack + * before setting the user r1. Thus we allow the stack to + * expand to 1MB without further checks. + */ + if (address + 0x100000 < vma->vm_end) { + /* get user regs even if this fault is in kernel mode */ + struct pt_regs *uregs = current->thread.regs; + if (uregs == NULL) + goto bad_area; + + /* + * A user-mode access to an address a long way below + * the stack pointer is only valid if the instruction + * is one which would update the stack pointer to the + * address accessed if the instruction completed, + * i.e. either stwu rs,n(r1) or stwux rs,r1,rb + * (or the byte, halfword, float or double forms). + * + * If we don't check this then any write to the area + * between the last mapped region and the stack will + * expand the stack rather than segfaulting. + */ + if (address + 2048 < uregs->gpr[1] + && (!user_mode(regs) || !store_updates_sp(regs))) + goto bad_area; + } if (expand_stack(vma, address)) goto bad_area; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/s390/defconfig linux.21rc1-ac1/arch/s390/defconfig --- linux.21rc1/arch/s390/defconfig 2003-04-22 16:38:58.000000000 +0100 +++ linux.21rc1-ac1/arch/s390/defconfig 2003-04-22 16:44:36.000000000 +0100 @@ -118,6 +118,7 @@ # CONFIG_TUN is not set CONFIG_NET_ETHERNET=y CONFIG_TR=y +CONFIG_C7000=m # CONFIG_FDDI is not set # diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/s390/kernel/entry.S linux.21rc1-ac1/arch/s390/kernel/entry.S --- linux.21rc1/arch/s390/kernel/entry.S 2003-04-22 16:39:34.000000000 +0100 +++ linux.21rc1-ac1/arch/s390/kernel/entry.S 2003-04-22 16:44:36.000000000 +0100 @@ -254,13 +254,14 @@ ret_from_fork: basr %r13,0 l %r13,.Lentry_base-.(%r13) # setup base pointer to &entry_base + # not saving R14 here because we go to sysc_return ultimately + l %r1,BASED(.Lschedtail) + basr %r14,%r1 # call schedule_tail (unlock stuff) GET_CURRENT # load pointer to task_struct to R9 stosm 24(%r15),0x03 # reenable interrupts sr %r0,%r0 # child returns 0 st %r0,SP_R2(%r15) # store return value (change R2 on stack) - l %r1,BASED(.Lschedtail) - la %r14,BASED(sysc_return) - br %r1 # call schedule_tail, return to sysc_return + b BASED(sysc_return) # # clone, fork, vfork, exec and sigreturn need glue, diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/s390x/kernel/entry.S linux.21rc1-ac1/arch/s390x/kernel/entry.S --- linux.21rc1/arch/s390x/kernel/entry.S 2003-04-22 16:39:34.000000000 +0100 +++ linux.21rc1-ac1/arch/s390x/kernel/entry.S 2003-04-22 16:44:36.000000000 +0100 @@ -240,11 +240,11 @@ # .globl ret_from_fork ret_from_fork: + brasl %r14,schedule_tail GET_CURRENT # load pointer to task_struct to R9 stosm 48(%r15),0x03 # reenable interrupts xc SP_R2(8,%r15),SP_R2(%r15) # child returns 0 - larl %r14,sysc_return - jg schedule_tail # return to sysc_return + j sysc_return # # clone, fork, vfork, exec and sigreturn need glue, diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/s390x/kernel/linux32.c linux.21rc1-ac1/arch/s390x/kernel/linux32.c --- linux.21rc1/arch/s390x/kernel/linux32.c 2003-04-22 16:38:58.000000000 +0100 +++ linux.21rc1-ac1/arch/s390x/kernel/linux32.c 2003-04-22 16:44:36.000000000 +0100 @@ -912,64 +912,97 @@ return sys32_fcntl(fd, cmd, arg); } -struct dqblk32 { - __u32 dqb_bhardlimit; - __u32 dqb_bsoftlimit; - __u32 dqb_curblocks; - __u32 dqb_ihardlimit; - __u32 dqb_isoftlimit; - __u32 dqb_curinodes; - __kernel_time_t32 dqb_btime; - __kernel_time_t32 dqb_itime; -}; - extern asmlinkage int sys_quotactl(int cmd, const char *special, int id, caddr_t addr); -asmlinkage int sys32_quotactl(int cmd, const char *special, int id, unsigned long addr) +#ifdef CONFIG_QIFACE_COMPAT +#ifdef CONFIG_QIFACE_V1 +struct user_dqblk32 { + __u32 dqb_bhardlimit; + __u32 dqb_bsoftlimit; + __u32 dqb_curblocks; + __u32 dqb_ihardlimit; + __u32 dqb_isoftlimit; + __u32 dqb_curinodes; + __kernel_time_t32 dqb_btime; + __kernel_time_t32 dqb_itime; +}; +typedef struct v1c_mem_dqblk comp_dqblk_t; + +#define Q_COMP_GETQUOTA Q_V1_GETQUOTA +#define Q_COMP_SETQUOTA Q_V1_SETQUOTA +#define Q_COMP_SETQLIM Q_V1_SETQLIM +#define Q_COMP_SETUSE Q_V1_SETUSE +#else +struct user_dqblk32 { + __u32 dqb_ihardlimit; + __u32 dqb_isoftlimit; + __u32 dqb_curinodes; + __u32 dqb_bhardlimit; + __u32 dqb_bsoftlimit; + __u64 dqb_curspace; + __kernel_time_t32 dqb_btime; + __kernel_time_t32 dqb_itime; +}; +typedef struct v2c_mem_dqblk comp_dqblk_t; + +#define Q_COMP_GETQUOTA Q_V2_GETQUOTA +#define Q_COMP_SETQUOTA Q_V2_SETQUOTA +#define Q_COMP_SETQLIM Q_V2_SETQLIM +#define Q_COMP_SETUSE Q_V2_SETUSE +#endif + +asmlinkage int sys32_quotactl(int cmd, const char *special, int id, caddr_t addr) { int cmds = cmd >> SUBCMDSHIFT; int err; - struct dqblk d; + comp_dqblk_t d; mm_segment_t old_fs; char *spec; switch (cmds) { - case Q_GETQUOTA: - break; - case Q_SETQUOTA: - case Q_SETUSE: - case Q_SETQLIM: - if (copy_from_user (&d, (struct dqblk32 *)addr, - sizeof (struct dqblk32))) - return -EFAULT; - d.dqb_itime = ((struct dqblk32 *)&d)->dqb_itime; - d.dqb_btime = ((struct dqblk32 *)&d)->dqb_btime; - break; + case Q_COMP_GETQUOTA: + break; + case Q_COMP_SETQUOTA: + case Q_COMP_SETUSE: + case Q_COMP_SETQLIM: + if (copy_from_user(&d, (struct user_dqblk32 *)addr, + sizeof (struct user_dqblk32))) + return -EFAULT; + d.dqb_itime = ((struct user_dqblk32 *)&d)->dqb_itime; + d.dqb_btime = ((struct user_dqblk32 *)&d)->dqb_btime; + break; default: - return sys_quotactl(cmd, special, - id, (caddr_t)addr); + return sys_quotactl(cmd, special, id, (__kernel_caddr_t)addr); } spec = getname (special); err = PTR_ERR(spec); if (IS_ERR(spec)) return err; - old_fs = get_fs (); + old_fs = get_fs(); set_fs (KERNEL_DS); - err = sys_quotactl(cmd, (const char *)spec, id, (caddr_t)&d); + err = sys_quotactl(cmd, (const char *)spec, id, (__kernel_caddr_t)&d); set_fs (old_fs); putname (spec); if (err) return err; - if (cmds == Q_GETQUOTA) { + if (cmds == Q_COMP_GETQUOTA) { __kernel_time_t b = d.dqb_btime, i = d.dqb_itime; - ((struct dqblk32 *)&d)->dqb_itime = i; - ((struct dqblk32 *)&d)->dqb_btime = b; - if (copy_to_user ((struct dqblk32 *)addr, &d, - sizeof (struct dqblk32))) + ((struct user_dqblk32 *)&d)->dqb_itime = i; + ((struct user_dqblk32 *)&d)->dqb_btime = b; + if (copy_to_user ((struct user_dqblk32 *)addr, &d, + sizeof (struct user_dqblk32))) return -EFAULT; } return 0; } +#else +/* No conversion needed for new interface */ +asmlinkage int sys32_quotactl(int cmd, const char *special, int id, caddr_t addr) +{ + return sys_quotactl(cmd, special, id, addr); +} +#endif + static inline int put_statfs (struct statfs32 *ubuf, struct statfs *kbuf) { int err; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/sh/mm/fault.c linux.21rc1-ac1/arch/sh/mm/fault.c --- linux.21rc1/arch/sh/mm/fault.c 2003-04-22 16:38:58.000000000 +0100 +++ linux.21rc1-ac1/arch/sh/mm/fault.c 2003-04-22 16:44:36.000000000 +0100 @@ -72,8 +72,6 @@ return 1; check_stack: - if (!(vma->vm_flags & VM_GROWSDOWN)) - goto bad_area; if (expand_stack(vma, start) == 0) goto good_area; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/sparc/kernel/signal.c linux.21rc1-ac1/arch/sparc/kernel/signal.c --- linux.21rc1/arch/sparc/kernel/signal.c 2003-04-22 16:39:34.000000000 +0100 +++ linux.21rc1-ac1/arch/sparc/kernel/signal.c 2003-04-22 18:21:00.000000000 +0100 @@ -1131,6 +1131,8 @@ line = d_path(map->vm_file->f_dentry, map->vm_file->f_vfsmnt, buffer, PAGE_SIZE); + if (IS_ERR(line)) + break; } printk(MAPS_LINE_FORMAT, map->vm_start, map->vm_end, str, map->vm_pgoff << PAGE_SHIFT, kdevname(dev), ino); diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/sparc/kernel/sunos_ioctl.c linux.21rc1-ac1/arch/sparc/kernel/sunos_ioctl.c --- linux.21rc1/arch/sparc/kernel/sunos_ioctl.c 2003-04-22 16:38:54.000000000 +0100 +++ linux.21rc1-ac1/arch/sparc/kernel/sunos_ioctl.c 2003-04-22 16:44:36.000000000 +0100 @@ -39,8 +39,12 @@ { int ret = -EBADF; - if (fd >= SUNOS_NR_OPEN || !fcheck(fd)) + read_lock(¤t->files->file_lock); + if (fd >= SUNOS_NR_OPEN || !fcheck(fd)) { + read_unlock(¤t->files->file_lock); goto out; + } + read_unlock(¤t->files->file_lock); /* First handle an easy compat. case for tty ldisc. */ if(cmd == TIOCSETD) { diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/sparc/mm/fault.c linux.21rc1-ac1/arch/sparc/mm/fault.c --- linux.21rc1/arch/sparc/mm/fault.c 2003-04-22 16:39:34.000000000 +0100 +++ linux.21rc1-ac1/arch/sparc/mm/fault.c 2003-04-22 16:44:36.000000000 +0100 @@ -249,8 +249,6 @@ goto bad_area; if(vma->vm_start <= address) goto good_area; - if(!(vma->vm_flags & VM_GROWSDOWN)) - goto bad_area; if(expand_stack(vma, address)) goto bad_area; /* @@ -496,8 +494,6 @@ goto bad_area; if(vma->vm_start <= address) goto good_area; - if(!(vma->vm_flags & VM_GROWSDOWN)) - goto bad_area; if(expand_stack(vma, address)) goto bad_area; good_area: diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/sparc64/kernel/signal32.c linux.21rc1-ac1/arch/sparc64/kernel/signal32.c --- linux.21rc1/arch/sparc64/kernel/signal32.c 2003-04-22 16:39:34.000000000 +0100 +++ linux.21rc1-ac1/arch/sparc64/kernel/signal32.c 2003-04-22 18:21:00.000000000 +0100 @@ -1348,6 +1348,8 @@ line = d_path(map->vm_file->f_dentry, map->vm_file->f_vfsmnt, buffer, PAGE_SIZE); + if (IS_ERR(line)) + break; } printk(MAPS_LINE_FORMAT, map->vm_start, map->vm_end, str, map->vm_pgoff << PAGE_SHIFT, kdevname(dev), ino); diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/sparc64/kernel/signal.c linux.21rc1-ac1/arch/sparc64/kernel/signal.c --- linux.21rc1/arch/sparc64/kernel/signal.c 2003-04-22 16:39:34.000000000 +0100 +++ linux.21rc1-ac1/arch/sparc64/kernel/signal.c 2003-04-22 18:21:00.000000000 +0100 @@ -679,6 +679,8 @@ line = d_path(map->vm_file->f_dentry, map->vm_file->f_vfsmnt, buffer, PAGE_SIZE); + if (IS_ERR(line)) + break; } printk(MAPS_LINE_FORMAT, map->vm_start, map->vm_end, str, map->vm_pgoff << PAGE_SHIFT, kdevname(dev), ino); diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/sparc64/kernel/sunos_ioctl32.c linux.21rc1-ac1/arch/sparc64/kernel/sunos_ioctl32.c --- linux.21rc1/arch/sparc64/kernel/sunos_ioctl32.c 2003-04-22 16:38:57.000000000 +0100 +++ linux.21rc1-ac1/arch/sparc64/kernel/sunos_ioctl32.c 2003-04-22 16:44:36.000000000 +0100 @@ -100,8 +100,12 @@ if(fd >= SUNOS_NR_OPEN) goto out; - if(!fcheck(fd)) + read_lock(¤t->files->file_lock); + if(!fcheck(fd)) { + read_unlock(¤t->files->file_lock); goto out; + } + read_unlock(¤t->files->file_lock); if(cmd == TIOCSETD) { mm_segment_t old_fs = get_fs(); diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/sparc64/kernel/sys_sparc32.c linux.21rc1-ac1/arch/sparc64/kernel/sys_sparc32.c --- linux.21rc1/arch/sparc64/kernel/sys_sparc32.c 2003-04-22 16:39:34.000000000 +0100 +++ linux.21rc1-ac1/arch/sparc64/kernel/sys_sparc32.c 2003-04-22 16:44:36.000000000 +0100 @@ -889,62 +889,97 @@ return sys32_fcntl(fd, cmd, arg); } -struct dqblk32 { - __u32 dqb_bhardlimit; - __u32 dqb_bsoftlimit; - __u32 dqb_curblocks; - __u32 dqb_ihardlimit; - __u32 dqb_isoftlimit; - __u32 dqb_curinodes; - __kernel_time_t32 dqb_btime; - __kernel_time_t32 dqb_itime; -}; - extern asmlinkage int sys_quotactl(int cmd, const char *special, int id, caddr_t addr); -asmlinkage int sys32_quotactl(int cmd, const char *special, int id, unsigned long addr) +#ifdef CONFIG_QIFACE_COMPAT +#ifdef CONFIG_QIFACE_V1 +struct user_dqblk32 { + __u32 dqb_bhardlimit; + __u32 dqb_bsoftlimit; + __u32 dqb_curblocks; + __u32 dqb_ihardlimit; + __u32 dqb_isoftlimit; + __u32 dqb_curinodes; + __kernel_time_t32 dqb_btime; + __kernel_time_t32 dqb_itime; +}; +typedef struct v1c_mem_dqblk comp_dqblk_t; + +#define Q_COMP_GETQUOTA Q_V1_GETQUOTA +#define Q_COMP_SETQUOTA Q_V1_SETQUOTA +#define Q_COMP_SETQLIM Q_V1_SETQLIM +#define Q_COMP_SETUSE Q_V1_SETUSE +#else +struct user_dqblk32 { + __u32 dqb_ihardlimit; + __u32 dqb_isoftlimit; + __u32 dqb_curinodes; + __u32 dqb_bhardlimit; + __u32 dqb_bsoftlimit; + __u64 dqb_curspace; + __kernel_time_t32 dqb_btime; + __kernel_time_t32 dqb_itime; +}; +typedef struct v2c_mem_dqblk comp_dqblk_t; + +#define Q_COMP_GETQUOTA Q_V2_GETQUOTA +#define Q_COMP_SETQUOTA Q_V2_SETQUOTA +#define Q_COMP_SETQLIM Q_V2_SETQLIM +#define Q_COMP_SETUSE Q_V2_SETUSE +#endif + +asmlinkage int sys32_quotactl(int cmd, const char *special, int id, caddr_t addr) { int cmds = cmd >> SUBCMDSHIFT; int err; - struct dqblk d; + comp_dqblk_t d; mm_segment_t old_fs; char *spec; switch (cmds) { - case Q_GETQUOTA: - break; - case Q_SETQUOTA: - case Q_SETUSE: - case Q_SETQLIM: - if (copy_from_user (&d, (struct dqblk32 *)addr, - sizeof (struct dqblk32))) - return -EFAULT; - d.dqb_itime = ((struct dqblk32 *)&d)->dqb_itime; - d.dqb_btime = ((struct dqblk32 *)&d)->dqb_btime; - break; + case Q_COMP_GETQUOTA: + break; + case Q_COMP_SETQUOTA: + case Q_COMP_SETUSE: + case Q_COMP_SETQLIM: + if (copy_from_user(&d, (struct user_dqblk32 *)addr, + sizeof (struct user_dqblk32))) + return -EFAULT; + d.dqb_itime = ((struct user_dqblk32 *)&d)->dqb_itime; + d.dqb_btime = ((struct user_dqblk32 *)&d)->dqb_btime; + break; default: - return sys_quotactl(cmd, special, - id, (caddr_t)addr); + return sys_quotactl(cmd, special, id, (__kernel_caddr_t)addr); } spec = getname (special); err = PTR_ERR(spec); if (IS_ERR(spec)) return err; - old_fs = get_fs (); + old_fs = get_fs(); set_fs (KERNEL_DS); - err = sys_quotactl(cmd, (const char *)spec, id, (caddr_t)&d); + err = sys_quotactl(cmd, (const char *)spec, id, (__kernel_caddr_t)&d); set_fs (old_fs); putname (spec); - if (cmds == Q_GETQUOTA) { + if (err) + return err; + if (cmds == Q_COMP_GETQUOTA) { __kernel_time_t b = d.dqb_btime, i = d.dqb_itime; - ((struct dqblk32 *)&d)->dqb_itime = i; - ((struct dqblk32 *)&d)->dqb_btime = b; - if (copy_to_user ((struct dqblk32 *)addr, &d, - sizeof (struct dqblk32))) + ((struct user_dqblk32 *)&d)->dqb_itime = i; + ((struct user_dqblk32 *)&d)->dqb_btime = b; + if (copy_to_user ((struct user_dqblk32 *)addr, &d, + sizeof (struct user_dqblk32))) return -EFAULT; } - return err; + return 0; } +#else +/* No conversion needed for new interface */ +asmlinkage int sys32_quotactl(int cmd, const char *special, int id, caddr_t addr) +{ + return sys_quotactl(cmd, special, id, addr); +} +#endif + static inline int put_statfs (struct statfs32 *ubuf, struct statfs *kbuf) { int err; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/sparc64/mm/fault.c linux.21rc1-ac1/arch/sparc64/mm/fault.c --- linux.21rc1/arch/sparc64/mm/fault.c 2003-04-22 16:38:57.000000000 +0100 +++ linux.21rc1-ac1/arch/sparc64/mm/fault.c 2003-04-22 16:44:36.000000000 +0100 @@ -373,8 +373,6 @@ if (vma->vm_start <= address) goto good_area; - if (!(vma->vm_flags & VM_GROWSDOWN)) - goto bad_area; if (!(fault_code & FAULT_CODE_WRITE)) { /* Non-faulting loads shouldn't expand stack. */ insn = get_fault_insn(regs, insn); diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/sparc64/solaris/timod.c linux.21rc1-ac1/arch/sparc64/solaris/timod.c --- linux.21rc1/arch/sparc64/solaris/timod.c 2003-04-22 16:38:57.000000000 +0100 +++ linux.21rc1-ac1/arch/sparc64/solaris/timod.c 2003-04-22 16:44:36.000000000 +0100 @@ -149,7 +149,9 @@ struct socket *sock; SOLD("wakeing socket"); + read_lock(¤t->files->file_lock); sock = ¤t->files->fd[fd]->f_dentry->d_inode->u.socket_i; + read_unlock(¤t->files->file_lock); wake_up_interruptible(&sock->wait); read_lock(&sock->sk->callback_lock); if (sock->fasync_list && !test_bit(SOCK_ASYNC_WAITDATA, &sock->flags)) @@ -163,7 +165,9 @@ struct sol_socket_struct *sock; SOLD("queuing primsg"); + read_lock(¤t->files->file_lock); sock = (struct sol_socket_struct *)current->files->fd[fd]->private_data; + read_unlock(¤t->files->file_lock); it->next = sock->pfirst; sock->pfirst = it; if (!sock->plast) @@ -177,7 +181,9 @@ struct sol_socket_struct *sock; SOLD("queuing primsg at end"); + read_lock(¤t->files->file_lock); sock = (struct sol_socket_struct *)current->files->fd[fd]->private_data; + read_unlock(¤t->files->file_lock); it->next = NULL; if (sock->plast) sock->plast->next = it; @@ -355,7 +361,11 @@ (int (*)(int, unsigned long *))SYS(socketcall); int (*sys_sendto)(int, void *, size_t, unsigned, struct sockaddr *, int) = (int (*)(int, void *, size_t, unsigned, struct sockaddr *, int))SYS(sendto); - filp = current->files->fd[fd]; + read_lock(¤t->files->file_lock); + filp = fcheck(fd); + read_unlock(¤t->files->file_lock); + if (!filp) + return -EBADF; ino = filp->f_dentry->d_inode; sock = (struct sol_socket_struct *)filp->private_data; SOLD("entry"); @@ -636,7 +646,11 @@ SOLD("entry"); SOLDD(("%u %p %d %p %p %d %p %d\n", fd, ctl_buf, ctl_maxlen, ctl_len, data_buf, data_maxlen, data_len, *flags_p)); - filp = current->files->fd[fd]; + read_lock(¤t->files->file_lock); + filp = fcheck(fd); + read_unlock(¤t->files->file_lock); + if (!filp) + return -EBADF; ino = filp->f_dentry->d_inode; sock = (struct sol_socket_struct *)filp->private_data; SOLDD(("%p %p\n", sock->pfirst, sock->pfirst ? sock->pfirst->next : NULL)); @@ -847,7 +861,9 @@ lock_kernel(); if(fd >= NR_OPEN) goto out; - filp = current->files->fd[fd]; + read_lock(¤t->files->file_lock); + filp = fcheck(fd); + read_unlock(¤t->files->file_lock); if(!filp) goto out; ino = filp->f_dentry->d_inode; @@ -914,7 +930,9 @@ lock_kernel(); if(fd >= NR_OPEN) goto out; - filp = current->files->fd[fd]; + read_lock(¤t->files->file_lock); + filp = fcheck(fd); + read_unlock(¤t->files->file_lock); if(!filp) goto out; ino = filp->f_dentry->d_inode; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/arch/x86_64/ia32/ia32_ioctl.c linux.21rc1-ac1/arch/x86_64/ia32/ia32_ioctl.c --- linux.21rc1/arch/x86_64/ia32/ia32_ioctl.c 2003-04-22 16:39:34.000000000 +0100 +++ linux.21rc1-ac1/arch/x86_64/ia32/ia32_ioctl.c 2003-04-22 18:21:00.000000000 +0100 @@ -4675,7 +4675,7 @@ "cmd(%08x){%s} arg(%08x) on %s\n", current->comm, current->pid, (int)fd, (unsigned int)cmd, buf, (unsigned int)arg, - fn); + IS_ERR(fn) ? "???" : fn); if (path) free_page((unsigned long)path); } diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/CREDITS linux.21rc1-ac1/CREDITS --- linux.21rc1/CREDITS 2003-04-22 16:39:32.000000000 +0100 +++ linux.21rc1-ac1/CREDITS 2003-04-22 16:44:36.000000000 +0100 @@ -2560,6 +2560,12 @@ S: 7000 Stuttgart 50 S: Germany +N: Andrew Rodland +E: arodland@linuxguru.net +D: That crazy morse code thing. +P: D2B1 5215 B1B9 18E0 B6AD 6ADD 4373 165F 1770 BD5C +S: Pennsylvania, USA + N: Christoph Rohland E: hans-christoph.rohland@sap.com E: ch.rohland@gmx.net diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/Documentation/00-INDEX linux.21rc1-ac1/Documentation/00-INDEX --- linux.21rc1/Documentation/00-INDEX 2003-04-22 16:38:59.000000000 +0100 +++ linux.21rc1-ac1/Documentation/00-INDEX 2003-04-22 16:44:36.000000000 +0100 @@ -52,6 +52,8 @@ - directory with information on the CD-ROM drivers that Linux has. computone.txt - info on Computone Intelliport II/Plus Multiport Serial Driver +cpufreq + - describes the CPU frequency and voltage scaling support cpqarray.txt - info on using Compaq's SMART2 Intelligent Disk Array Controllers. devices.txt diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/Documentation/Configure.help linux.21rc1-ac1/Documentation/Configure.help --- linux.21rc1/Documentation/Configure.help 2003-04-22 16:39:32.000000000 +0100 +++ linux.21rc1-ac1/Documentation/Configure.help 2003-04-22 17:01:40.000000000 +0100 @@ -464,8 +464,14 @@ The initial RAM disk is a RAM disk that is loaded by the boot loader (loadlin or lilo) and that is mounted as root before the normal boot procedure. It is typically used to load modules needed to mount the - "real" root file system, etc. See - for details. + "real" root file system, etc. + + Due to a problem elsewhere in the kernel, initial RAM disks _must_ + have the file system on them created with a 1024 byte block size. + If any other value is used, the kernel will be unable to mount the + RAM disk at boot time, causing a kernel panic. + + See for details. Loopback device support CONFIG_BLK_DEV_LOOP @@ -1837,6 +1843,20 @@ want), say M here and read . The module will be called lvm-mod.o. +Device-mapper support +CONFIG_BLK_DEV_DM + Device-mapper is a low level volume manager. It works by allowing + people to specify mappings for ranges of logical sectors. Various + mapping types are available, in addition people may write their own + modules containing custom mappings if they wish. + + Higher level volume managers such as LVM2 use this driver. + + If you want to compile this as a module, say M here and read + . The module will be called dm-mod.o. + + If unsure, say N. + Multiple devices driver support (RAID and LVM) CONFIG_MD Support multiple physical spindles through a single logical device. @@ -3590,11 +3610,10 @@ Generic SiS support CONFIG_AGP_SIS - This option gives you AGP support for the GLX component of the "soon - to be released" XFree86 4.x on Silicon Integrated Systems [SiS] - chipsets. + This option gives you AGP support for the GLX component of + XFree86 4.x on Silicon Integrated Systems [SiS] chipsets. - Note that 5591/5592 AGP chipsets are NOT supported. + The 5591/5592 AGP bridge is only generically supported. You should say Y here if you use XFree86 3.3.6 or 4.x and want to use GLX or DRI. If unsure, say N. @@ -4758,12 +4777,11 @@ messages. Most people will want to say N here. If unsure, you will also want to say N. -Matrox unified accelerated driver CONFIG_FB_MATROX - Say Y here if you have a Matrox Millennium, Millennium II, Mystique, - Mystique 220, Productiva G100, Mystique G200, Millennium G200, - Matrox G400, G450 or G550 card in your box. At this time, support for - the G-series digital output is almost non-existant. + Say Y here if you have a Matrox Millennium, Matrox Millennium II, + Matrox Mystique, Matrox Mystique 220, Matrox Productiva G100, Matrox + Mystique G200, Matrox Millennium G200, Matrox Marvel G200 video, + Matrox G400, G450 or G550 card in your box. This driver is also available as a module ( = code which can be inserted and removed from the running kernel whenever you want). @@ -4774,7 +4792,6 @@ module load time. The parameters look like "video=matrox:XXX", and are described in . -Matrox Millennium I/II support CONFIG_FB_MATROX_MILLENIUM Say Y here if you have a Matrox Millennium or Matrox Millennium II video card. If you select "Advanced lowlevel driver options" below, @@ -4782,7 +4799,6 @@ packed pixel, 24 bpp packed pixel and 32 bpp packed pixel. You can also use font widths different from 8. -Matrox Mystique support CONFIG_FB_MATROX_MYSTIQUE Say Y here if you have a Matrox Mystique or Matrox Mystique 220 video card. If you select "Advanced lowlevel driver options" below, @@ -4790,27 +4806,46 @@ packed pixel and 32 bpp packed pixel. You can also use font widths different from 8. -Matrox G100/G200/G400/G450/G550 support -CONFIG_FB_MATROX_G100 - Say Y here if you have a Matrox G100, G200, G400, G450, or G550 - based video card. If you select "Advanced lowlevel driver options", - you should check 8 bpp packed pixel, 16 bpp packed pixel, 24 bpp - packed pixel and 32 bpp packed pixel. You can also use font widths +CONFIG_FB_MATROX_G450 + Say Y here if you have a Matrox G100, G200, G400, G450 or G550 based + video card. If you select "Advanced lowlevel driver options", you + should check 8 bpp packed pixel, 16 bpp packed pixel, 24 bpp packed + pixel and 32 bpp packed pixel. You can also use font widths different from 8. If you need support for G400 secondary head, you must first say Y to "I2C support" and "I2C bit-banging support" in the character devices section, and then to "Matrox I2C support" and "G400 second head - support" here in the framebuffer section. + support" here in the framebuffer section. G450/G550 secondary head + and digital output are supported without additional modules. + + The driver starts in monitor mode. You must use the matroxset tool + (available at ) to + swap primary and secondary head outputs, or to change output mode. + Secondary head driver always start in 640x480 resolution and you + must use fbset to change it. + + Do not forget that second head supports only 16 and 32 bpp + packed pixels, so it is a good idea to compile them into the kernel + too. You can use only some font widths, as the driver uses generic + painting procedures (the secondary head does not use acceleration + engine). - If you have G550, you must also compile support for G450/G550 secondary - head into kernel, otherwise picture will be shown only on the output you - are probably not using... + G450/G550 hardware can display TV picture only from secondary CRTC, + and it performs no scaling, so picture must have 525 or 625 lines. - If you need support for G450 or G550 secondary head, say Y to - "Matrox G450/G550 second head support" below. +CONFIG_FB_MATROX_G100A + Say Y here if you have a Matrox G100, G200 or G400 based + video card. If you select "Advanced lowlevel driver options", you + should check 8 bpp packed pixel, 16 bpp packed pixel, 24 bpp packed + pixel and 32 bpp packed pixel. You can also use font widths + different from 8. + + If you need support for G400 secondary head, you must first say Y to + "I2C support" and "I2C bit-banging support" in the character devices + section, and then to "Matrox I2C support" and "G400 second head + support" here in the framebuffer section. -Matrox I2C support CONFIG_FB_MATROX_I2C This drivers creates I2C buses which are needed for accessing the DDC (I2C) bus present on all Matroxes, an I2C bus which @@ -4824,7 +4859,6 @@ If you compile it as module, it will create a module named i2c-matroxfb.o. -Matrox G400 second head support CONFIG_FB_MATROX_MAVEN WARNING !!! This support does not work with G450 !!! @@ -4853,32 +4887,14 @@ painting procedures (the secondary head does not use acceleration engine). -Matrox G450 second head support -CONFIG_FB_MATROX_G450 - Say Y or M here if you want to use a secondary head (meaning two - monitors in parallel) on G450, or if you are using analog output - of G550. - - If you compile it as module, two modules are created, - matroxfb_crtc2.o and matroxfb_g450.o. Both modules are needed if you - want two independent display devices. - - The driver starts in monitor mode and currently does not support - output in TV modes. You must use the matroxset tool (available - at ) to swap - primary and secondary head outputs. Secondary head driver always - start in 640x480 resolution and you must use fbset to change it. - - Note on most G550 cards the analog output is the secondary head, - so you will need to say Y here to use it. - - Also do not forget that second head supports only 16 and 32 bpp - packed pixels, so it is a good idea to compile them into the kernel - too. You can use only some font widths, as the driver uses generic - painting procedures (the secondary head does not use acceleration - engine). - -Matrox unified driver multihead support +CONFIG_FB_MATROX_PROC + Say Y or M here if you want to access some informations about driver + state through /proc interface. + + You should download matrox_pins tool (available at + ) to get human + readable output. + CONFIG_FB_MATROX_MULTIHEAD Say Y here if you have more than one (supported) Matrox device in your computer and you want to use all of them for different monitors @@ -4980,19 +4996,36 @@ SIS acceleration CONFIG_FB_SIS - This is the frame buffer device driver for the SiS 630 and 640 Super - Socket 7 UMA cards. Specs available at . + This is the frame buffer device driver for SiS VGA controllers. + + This driver is required for SiS DRM. + + See for detailed + documentation. + + Hardware specs available at . SIS 630/540/730 support CONFIG_FB_SIS_300 - This is the frame buffer device driver for the SiS 630 and related - Super Socket 7 UMA cards. Specs available at - . + This is the frame buffer device driver for SiS 300/305/630/730 VGA + controllers. + + This driver is required for SiS DRM. + + See for detailed + documentation. + + Hardware specs available at . SIS 315H/315 support CONFIG_FB_SIS_315 - This is the frame buffer device driver for the SiS 315 graphics - card. Specs available at . + This is the frame buffer device driver for SiS 315 (including 315H + and 315PRO), 650, M650, 651, 740 and Xabre VGA controllers. + + See for detailed + documentation. + + Hardware specs available at . IMS Twin Turbo display support CONFIG_FB_IMSTT @@ -5324,6 +5357,19 @@ replacement for kerneld.) Say Y here and read about configuring it in . +Kernel .config file saved in kernel image +CONFIG_IKCONFIG + This option enables the complete Linux kernel ".config" file contents + to be saved in the kernel (zipped) image file. It provides + documentation of which kernel options are used in a running kernel or + in an on-disk kernel. It can be extracted from the kernel image file + with a script and used as input to rebuild the current kernel or to + build another kernel. Since the kernel image is zipped, using this + option adds approximately 8 KB to a kernel image file. + This option is not available as a module. If you want a separate + file to save the kernel's .config contents, use 'installkernel' or 'cp' + or a similar tool, or just save it in '/lib/modules/'. + ARP daemon support CONFIG_ARPD Normally, the kernel maintains an internal cache which maps IP @@ -9147,7 +9193,7 @@ Aironet 4500/4800 I365 broken support CONFIG_AIRONET4500_I365 If you have a PCMCIA Aironet 4500/4800 card which you want to use - without the standard PCMCIA cardservices provided by the pcmcia-cs + without the standard PCMCIA card services provided by the pcmcia-cs package, say Y here. This is not recommended, so say N. Aironet 4500/4800 PCMCIA support @@ -10554,6 +10600,15 @@ If unsure, say N here. +Raw HDLC Ethernet device support +CONFIG_HDLC_RAW_ETH + Say Y to this option if you want generic HDLC driver to support + raw HDLC Ethernet device emulation over WAN (Wide Area Network) + connections. + You will need it for Ethernet over HDLC bridges. + + If unsure, say N here. + Cisco HDLC support CONFIG_HDLC_CISCO Say Y to this option if you want generic HDLC driver to support @@ -10568,13 +10623,6 @@ If unsure, say N here. -Frame-Relay bridging support -CONFIG_HDLC_FR_BRIDGE - Say Y to this option if you want generic HDLC driver to support - bridging LAN frames over Frame-Relay links. - - If unsure, say N here. - Synchronous Point-to-Point Protocol (PPP) support CONFIG_HDLC_PPP Say Y to this option if you want generic HDLC driver to support @@ -12765,12 +12813,44 @@ Quota support CONFIG_QUOTA If you say Y here, you will be able to set per user limits for disk - usage (also called disk quotas). Currently, it works only for the - ext2 file system. You need additional software in order to use quota - support; for details, read the Quota mini-HOWTO, available from + usage (also called disk quotas). Currently, it works for the + ext2, ext3, and reiserfs file system. You need additional software + in order to use quota support (you can download sources from + ). For further details, read + the Quota mini-HOWTO, available from . Probably the quota support is only useful for multi user systems. If unsure, say N. +Old quota format support +CONFIG_QFMT_V1 + This quota format was (is) used by kernels earlier than 2.4.??. If + you have quota working and you don't want to convert to new quota + format say Y here. + +VFS v0 quota format support +CONFIG_QFMT_V2 + This quota format allows using quotas with 32-bit UIDs/GIDs. If you + need this functionality say Y here. Note that you will need latest + quota utilities for new quota format with this kernel. + +Compatible quota interfaces +CONFIG_QIFACE_COMPAT + This option will enable old quota interface in kernel. + If you have old quota tools (version <= 3.04) and you don't want to + upgrade them say Y here. + +Original quota interface +CONFIG_QIFACE_V1 + This is the oldest quota interface. It was used for old quota format. + If you have old quota tools and you use old quota format choose this + interface (if unsure, this interface is the best one to choose). + +VFS v0 quota interface +CONFIG_QIFACE_V2 + This quota interface was used by VFS v0 quota format. If you need + support for VFS v0 quota format (eg. you're using quota on ReiserFS) + and you don't want to upgrade quota tools, choose this interface. + Memory Technology Device (MTD) support CONFIG_MTD Memory Technology Devices are flash, RAM and similar chips, often @@ -15378,7 +15458,7 @@ debugging output from the driver. This is unlike previous versions of the driver, where enabling this option would turn on debugging output automatically. - + Example: mount -t befs /dev/hda2 /mnt -o debug @@ -15781,6 +15861,30 @@ If unsure, say N. +Allow direct I/O on files in NFS +CONFIG_NFS_DIRECTIO + There are important applications whose performance or correctness + depends on uncached access to file data. Database clusters (multiple + copies of the same instance running on separate hosts) implement their + own cache coherency protocol that subsumes the NFS cache protocols. + Applications that process datasets considerably larger than the client's + memory do not always benefit from a local cache. A streaming video + server, for instance, has no need to cache the contents of a file. + + This option enables applications to perform direct I/O on files in NFS + file systems using the O_DIRECT open() flag. When O_DIRECT is set for + files, their data is not cached in the system's page cache. Direct + read and write operations are aligned to block boundaries. Data is + moved to and from user-level application buffers directly. + + Unless your program is designed to use O_DIRECT properly, you are much + better off allowing the NFS client to manage caching for you. Misusing + O_DIRECT can cause poor server performance or network storms. This + kernel build option defaults OFF to avoid exposing system administrators + unwittingly to a potentially hazardous feature. + + If unsure, say N. + Root file system on NFS CONFIG_ROOT_NFS If you want your Linux box to mount its whole root file system (the @@ -16177,7 +16281,7 @@ Say Y here if you would like to use hard disks under Linux which were partitioned on a Macintosh. -Windows Logical Disk Manager (Dynamic Disk) support (EXPERIMENTAL) +Windows Logical Disk Manager (Dynamic Disk) support CONFIG_LDM_PARTITION Say Y here if you would like to use hard disks under Linux which were partitioned using Windows 2000's or XP's Logical Disk Manager. @@ -16192,8 +16296,7 @@ Normal partitions are now called Basic Disks under Windows 2000 and XP. - Technical documentation to accompany this driver is available from: - . + For a fuller description read . If unsure, say N. @@ -16266,8 +16369,9 @@ Intel EFI GUID partition support CONFIG_EFI_PARTITION Say Y here if you would like to use hard disks under Linux which - were partitioned using EFI GPT. Presently only useful on the - IA-64 platform. + were partitioned using EFI GPT. This is the default partition + scheme on IA64, and can be used on other platforms when + large block device (64-bit block address) support is desired. Ultrix partition table support CONFIG_ULTRIX_PARTITION @@ -17109,17 +17213,36 @@ HIL keyboard support CONFIG_HIL The "Human Interface Loop" is a older, 8-channel USB-like controller - used in Hewlett Packard PA-RISC based machines. There are a few - cases where it is seen on PC/MAC architectures as well, usually also - manufactured by HP. This driver is based off MACH and BSD drivers, - and implements support for a keyboard attached to the HIL port. + used in several Hewlett Packard models. This driver is based off + MACH and BSD drivers, and implements support for a keyboard attached + to the HIL port, but not for any other types of HIL input devices + like mice or tablets. However, it has been thoroughly tested and is + stable. + Full support for the USB-like functions and non-keyboard channels of - the HIL is not provided for in this driver. There are vestiges of - mouse support in the driver, but it is probably not working. The - necessary hardware documentation to fully support the HIL controller - and interface it to the linux-input API is lacking. + the HIL is currently being added to the PA-RISC port and will + be backported to work on the m68k port as well. - Enable this option if you intend to use a HIL keyboard. + Enable this option if you intend to use a HIL keyboard as your + primary keyboard and/or do not wish to test the new HIL driver. + +HP System Device Controller support +CONFIG_HP_SDC + This option enables supports for the the "System Device Controller", + an i8042 carrying microcode to manage a few miscellanous devices + on some Hewlett Packard systems. The SDC itself contains a 10ms + resolution timer/clock capable of delivering interrupts on periodic + and one-shot basis. The SDC may also be connected to a battery-backed + real-time clock, a basic audio waveform generator, and an HP-HIL + Master Link Controller serving up to seven input devices. + + By itself this option is rather useless, but enabling it will + enable selection of drivers for the abovementioned devices. + It is, however, incompatible with the old, reliable HIL keyboard + driver, and the new HIL driver is experimental, so if you plan to + use a HIL keyboard as your primary keyboard, you may wish to + keep using that driver until the new HIL drivers have had more + testing. Include IOP (IIfx/Quadra 9x0) ADB driver CONFIG_ADB_IOP @@ -17310,6 +17433,27 @@ If you want to compile this driver as a module, say M here and read . The module will be called pcxx.o. +Cyclades-PC300 support +CONFIG_PC300 + This is a driver for the Cyclades-PC300 synchronous communication + boards. These boards provide synchronous serial interfaces to your + Linux box (interfaces currently available are RS-232/V.35, X.21 and + T1/E1). If you wish to support Multilink PPP, please select the + option below this one and read the file README.mlppp provided by PC300 + package. + + If you want to compile this as a module ( = code which can be + inserted in and removed from the running kernel whenever you want), + say M here and read Documentation/modules.txt. The module will be + called pc300.o. + + If you haven't heard about it, it's safe to say N. + +Cyclades-PC300 Sync TTY (to MLPPP) support +CONFIG_PC300_MLPPP + Say 'Y' to this option if you are planning to use Multilink PPP over the + PC300 synchronous communication boards. + SDL RISCom/8 card support CONFIG_RISCOM8 This is a driver for the SDL Communications RISCom/8 multiport card, @@ -17429,6 +17573,19 @@ read . The module will be called istallion.o. +PDC software console support +CONFIG_PDC_CONSOLE + Saying Y here will enable the software based PDC console to be + used as the system console. This is useful for machines in + which the hardware based console has not been written yet. The + following steps must be competed to use the PDC console: + + 1. create the device entry (mknod /dev/ttyB0 c 60 0) + 2. Edit the /etc/inittab to start a getty listening on /dev/ttyB0 + 3. Add device ttyB0 to /etc/securetty (if you want to log on as + root on this console.) + 4. Change the kernel command console parameter to: console=ttyB0 + Microgate SyncLink adapter support CONFIG_SYNCLINK Provides support for the SyncLink ISA and PCI multiprotocol serial @@ -17578,6 +17735,10 @@ doing that; to actually get it to happen you need to pass the option "console=lp0" to the kernel at boot time. + Note that kernel messages can get lost if the printer is out of + paper (or off, or unplugged, or too busy..), but this behaviour + can be changed. See drivers/char/lp.c (do this at your own risk). + If the printer is out of paper (or off, or unplugged, or too busy..) the kernel will stall until the printer is ready again. By defining CONSOLE_LP_STRICT to 0 (at your own risk) you @@ -19083,6 +19244,15 @@ . The module will be called cpuid.o +x86 BIOS Enhanced Disk Drive support +CONFIG_EDD + Say Y or M here if you want to enable BIOS Enhanced Disk Drive + Services real mode BIOS calls to determine which disk + BIOS tries boot from. This information is then exported via /proc. + + This option is experimental, but believed to be safe, + and most disk controller BIOS vendors do not yet implement this feature. + SBC-60XX Watchdog Timer CONFIG_60XX_WDT This driver can be used with the watchdog timer found on some @@ -19177,6 +19347,34 @@ Provides an emulation for RTC_UIE which is required by some programs and may improve precision of the generic RTC support in some cases. +Generic Real Time Clock Support +CONFIG_GEN_RTC + If you say Y here and create a character special file /dev/rtc with + major number 10 and minor number 135 using mknod ("man mknod"), you + will get access to the real time clock (or hardware clock) built + into your computer. + + In 2.4 and later kernels this is the only way to set and get rtc + time on m68k systems so it is highly recommended. + + It reports status information via the file /proc/driver/rtc and its + behaviour is set by various ioctls on /dev/rtc. If you enable the + "extended RTC operation" below it will also provide an emulation + for RTC_UIE which is required by some programs and may improve + precision in some cases. + + This driver is also available as a module ( = code which can be + inserted in and removed from the running kernel whenever you want). + The module is called genrtc.o. If you want to compile it as a module, + say M here and read . To load the + module automatically add 'alias char-major-10-135 genrtc' to your + /etc/modules.conf + +Extended RTC operation +CONFIG_GEN_RTC_X + Provides an emulation for RTC_UIE which is required by some programs + and may improve precision of the generic RTC support in some cases. + Tadpole ANA H8 Support CONFIG_H8 The Hitachi H8/337 is a microcontroller used to deal with the power @@ -23168,6 +23366,23 @@ say M here and read . The module will be called radio-sf16fmi.o. +SF16FMR2 Radio +CONFIG_RADIO_SF16FMR2 + Choose Y here if you have one of these FM radio cards. If you + compile the driver into the kernel and your card is not PnP one, you + have to add "sf16fmr2=" to the kernel command line (I/O address is + 0x284 or 0x384, default 0x384). + + In order to control your radio card, you will need to use programs + that are compatible with the Video For Linux API. Information on + this API and pointers to "v4l" programs may be found on the WWW at + . + + If you want to compile this driver as a module ( = code which can be + inserted in and removed from the running kernel whenever you want), + say M here and read . The module + will be called radio-sf16fmr2.o. + Typhoon Radio (a.k.a. EcoRadio) CONFIG_RADIO_TYPHOON Choose Y here if you have one of these FM radio cards, and then fill @@ -25920,6 +26135,14 @@ of the BUG call as well as the EIP and oops trace. This aids debugging but costs about 70-100K of memory. +Morse code panics +CONFIG_PANIC_MORSE + Say Y here to receive panic messages in morse code on your keyboard LEDs, and + optionally the PC speaker, if available. + The kernel param "panicblink" controls this feature, set it to 0 to disable, + 1 for LEDs only, 2 for pc speaker, or 3 for both. If you disable this option, + then you will receive a steady blink on the LEDs instead. + Include kgdb kernel debugger CONFIG_KGDB Include in-kernel hooks for kgdb, the Linux kernel source level @@ -25965,9 +26188,11 @@ U2/Uturn I/O MMU CONFIG_IOMMU_CCIO - Say Y here to enable DMA management routines for the first - generation of PA-RISC cache-coherent machines. Programs the - U2/Uturn chip in "Virtual Mode" and use the I/O MMU. + The U2/UTurn is a bus converter with io mmu present in the Cxxx, D, + J, K, and R class machines. Compiling this driver into the kernel will + not hurt anything, removing it will reduce your kernel by about 14k. + + If unsure, say Y. LBA/Elroy PCI support CONFIG_PCI_LBA @@ -26340,10 +26565,103 @@ written) to implement the policy. If you don't understand what this is all about, it's safe to say 'N'. + For more information, take a look at linux/Documentation/cpufreq or + at + + If in doubt, say N. + +CONFIG_CPU_FREQ_24_API + This enables the /proc/sys/cpu/ sysctl interface for controlling + CPUFreq, as known from the 2.4.-kernel patches for CPUFreq. 2.5 + uses /proc/cpufreq instead. Please note that some drivers do not + work with the 2.4. /proc/sys/cpu sysctl interface, so if in doubt, + say N here. + + For details, take a look at linux/Documentation/cpufreq. + + If in doubt, say N. + +CONFIG_X86_POWERNOW_K6 + This adds the CPUFreq driver for mobile AMD K6-2+ and mobile + AMD K6-3+ processors. + + For details, take a look at linux/Documentation/cpufreq. + + If in doubt, say N. + +CONFIG_X86_P4_CLOCKMOD + This adds the CPUFreq driver for Intel Pentium 4 / XEON + processors. + + For details, take a look at linux/Documentation/cpufreq. + + If in doubt, say N. + +CONFIG_ELAN_CPUFREQ + This adds the CPUFreq driver for AMD Elan SC400 and SC410 + processors. + + You need to specify the processor maximum speed as a boot + parameter (or as module parameter): + elanfreq=maxspeed + with the argument "maxspeed" given in kHz. + + For details, take a look at linux/Documentation/cpufreq. + + If in doubt, say N. + +CONFIG_X86_LONGHAUL + This adds the CPUFreq driver for VIA Samuel/CyrixIII, + VIA Cyrix Samuel/C3, VIA Cyrix Ezra and VIA Cyrix Ezra-T + processors. + + If you do not want to scale the Front Side Bus or voltage, + pass the module parameter "dont_scale_fsb=1" or + "dont_scale_voltage=1". Additionally, it is advised that + you pass the current Front Side Bus speed (in MHz) to + this module as module parameter "current_fsb", e.g. + "current_fsb=133" for a Front Side Bus speed of 133 MHz. + + For details, take a look at linux/Documentation/cpufreq. + + If in doubt, say N. + +CONFIG_X86_SPEEDSTEP + This adds the CPUFreq driver for certain mobile Intel Pentium III + (Coppermine), all mobile Intel Pentium III-M (Tulatin) and all + mobile Intel Pentium 4 P4-Ms. + + If you use a Coppermine Pentium III which is capable of + SpeedStep, you need to pass the boot or module parameter + "speedstep_coppermine=1" to the kernel. + + For details, take a look at linux/Documentation/cpufreq. + + If in doubt, say N. + +CONFIG_X86_LONGRUN + This adds the CPUFreq driver for Transmeta Crusoe processors which + support LongRun. + + For details, take a look at linux/Documentation/cpufreq. + + If in doubt, say N. + +CONFIG_X86_GX_SUSPMOD + This add the CPUFreq driver for NatSemi Geode processors which + support suspend modulation. + + For details, take a look at linux/Documentation/cpufreq. + + If in doubt, say N. + SiS CONFIG_DRM_SIS - Choose this option if you have a SIS graphics card. AGP support is - required for this driver to work. + Choose this option if you have a SIS 300 series graphics card or + VGA controller (300, 305, 540, 630, 730). + + AGP support as well as the SiS framebuffer driver are required + for this driver to work. Etrax Ethernet slave support (over lp0/1) CONFIG_ETRAX_ETHERNET_LPSLAVE @@ -26353,7 +26671,7 @@ Slave has its own LEDs CONFIG_ETRAX_ETHERNET_LPSLAVE_HAS_LEDS - Enable if the slave has it's own LEDs. + Enable if the slave has its own LEDs. ATA/IDE support CONFIG_ETRAX_IDE @@ -26523,6 +26841,90 @@ If unsure, say N. +NatSemi SCx200 support +CONFIG_SCx200 + This provides basic support for the National Semiconductor SCx200 + processor. Right now this is just a driver for the GPIO pins. + + If you don't know what to do here, say N. + + This support is also available as a module. If compiled as a + module, it will be called scx200.o. + +NatSemi SCx200 Watchdog +CONFIG_SCx200_WDT + Enable the built-in watchdog timer support on the National + Semiconductor SCx200 processors. + + If compiled as a module, it will be called scx200_watchdog.o. + +Flash device mapped with DOCCS on NatSemi SCx200 +CONFIG_MTD_SCx200_DOCFLASH + Enable support for a flash chip mapped using the DOCCS signal on a + National Semiconductor SCx200 processor. + + If you don't know what to do here, say N. + + If compiled as a module, it will be called scx200_docflash.o. + +NatSemi SCx200 I2C using GPIO pins +CONFIG_SCx200_I2C + Enable the use of two GPIO pins of a SCx200 processor as an I2C bus. + + If you don't know what to do here, say N. + + If compiled as a module, it will be called scx200_i2c.o. + +GPIO pin used for SCL +CONFIG_SCx200_I2C_SCL + Enter the GPIO pin number used for the SCL signal. This value can + also be specified with a module parameter. + +GPIO pin used for SDA +CONFIG_SCx200_I2C_SDA + Enter the GPIO pin number used for the SSA signal. This value can + also be specified with a module parameter. + +NatSemi SCx200 ACCESS.bus +CONFIG_SCx200_ACB + Enable the use of the ACCESS.bus controllers of a SCx200 processor. + + If you don't know what to do here, say N. + + If compiled as a module, it will be called scx200_acb.o. + +IPMI top-level message handler +CONFIG_IPMI_HANDLER + This enables the central IPMI message handler, required for IPMI + to work. Note that you must have this enabled to do any other IPMI + things. + + IPMI is a standard for managing sensors (temperature, + voltage, etc.) in a system. + + See Documentation/IPMI.txt for more details on the driver. + + If unsure, say N. + +Generate a panic event to all BMCs on a panic +CONFIG_IPMI_PANIC_EVENT + When a panic occurs, this will cause the IPMI message handler to + generate an IPMI event describing the panic to each interface + registered with the message handler. + +Device interface for IPMI +CONFIG_IPMI_DEVICE_INTERFACE + This provides an IOCTL interface to the IPMI message handler so + userland processes may use IPMI. It supports poll() and select(). + +IPMI KCS handler +CONFIG_IPMI_KCS + Provides a driver for a KCS-style interface to a BMC. + +IPMI Watchdog Timer +CONFIG_IPMI_WATCHDOG + This enables the IPMI watchdog timer. + # # A couple of things I keep forgetting: # capitalize: AppleTalk, Ethernet, DOS, DMA, FAT, FTP, Internet, diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/Documentation/cpufreq linux.21rc1-ac1/Documentation/cpufreq --- linux.21rc1/Documentation/cpufreq 1970-01-01 01:00:00.000000000 +0100 +++ linux.21rc1-ac1/Documentation/cpufreq 2003-04-22 16:44:36.000000000 +0100 @@ -0,0 +1,363 @@ + CPU frequency and voltage scaling code in the Linux(TM) kernel + + + L i n u x C P U F r e q + + + + + Dominik Brodowski + David Kimdon + + + + Clock scaling allows you to change the clock speed of the CPUs on the + fly. This is a nice method to save battery power, because the lower + the clock speed, the less power the CPU consumes. + + + +Contents: +--------- +1. Supported architectures +2. User interface +2.1 /proc/cpufreq interface [2.6] +2.2. /proc/sys/cpu/ interface [2.4] +3. CPUFreq core and interfaces +3.1 General information +3.2 CPUFreq notifiers +3.3 CPUFreq architecture drivers +4. Mailing list and Links + + + +1. Supported architectures +========================== + +ARM: + ARM Integrator, SA 1100, SA1110 +-------------------------------- + No known issues. + + +AMD Elan: + SC400, SC410 +-------------------------------- + You need to specify the highest allowed CPU frequency as + a module parameter ("max_freq") or as boot parameter + ("elanfreq="). Else the available speed range will be + limited to the speed at which the CPU runs while this + module is loaded. + + +VIA Cyrix Longhaul: + VIA Samuel/CyrixIII, VIA Cyrix Samuel/C3, + VIA Cyrix Ezra, VIA Cyrix Ezra-T +-------------------------------- + If you do not want to scale the Front Side Bus or voltage, + pass the module parameter "dont_scale_fsb=1" or + "dont_scale_voltage=1". Additionally, it is advised that + you pass the current Front Side Bus speed (in MHz) to + this module as module parameter "current_fsb", e.g. + "current_fsb=133" for a Front Side Bus speed of 133 MHz. + + +Intel SpeedStep: + certain mobile Intel Pentium III (Coppermine), and all mobile + Intel Pentium III-M (Tualatin) and mobile Intel Pentium 4 P4-Ms. +-------------------------------- + Unfortunately, only modern Intel ICH2-M and ICH3-M chipsets are + supported yet. + + +P4 CPU Clock Modulation: + Intel Pentium 4 Xeon processors +--------------------------------- + Note that you can only switch the speed of two logical CPUs at + once - but each phyiscal CPU may have different throttling levels. + + +PowerNow! K6: + mobile AMD K6-2+ / mobile K6-3+: +-------------------------------- + No known issues. + + +Transmeta Crusoe Longrun: + Transmeta Crusoe processors: +-------------------------------- + It is recommended to use the 2.6. /proc/cpufreq interface when + using this driver + + + +2. User Interface +================= + +2.1 /proc/cpufreq interface [2.6] +*********************************** + +Starting in the patches for kernel 2.5.33, CPUFreq uses a "policy" +interface /proc/cpufreq. + +When you "cat" this file, you'll find something like: + +-- + minimum CPU frequency - maximum CPU frequency - policy +CPU 0 1200000 ( 75%) - 1600000 (100%) - performance +-- + +This means the current policy allows this CPU to be run anywhere +between 1.2 GHz (the value is in kHz) and 1.6 GHz with an eye towards +performance. + +To change the policy, "echo" the desired new policy into +/proc/cpufreq. Use one of the following formats: + +cpu_nr:min_freq:max_freq:policy +cpu_nr%min_freq%max_freq%policy +min_freq:max_freq:policy +min_freq%max_freq%policy + +with cpu_nr being the CPU which shall be affected, min_freq and +max_freq the lower and upper limit of the CPU core frequency in kHz, +and policy either "performance" or "powersave". +A few examples: + +root@notebook:#echo -n "0:0:0:powersave" > /proc/cpufreq + sets the CPU #0 to the lowest supported frequency. + +root@notebook:#echo -n "1%100%100%performance" > /proc/cpufreq + sets the CPU #1 to the highest supported frequency. + +root@notebook:#echo -n "1000000:2000000:performance" > /proc/cpufreq + to set the frequency of all CPUs between 1 GHz and 2 GHz and to + the policy "performance". + +Please note that the values you "echo" into /proc/cpufreq are +validated first, and may be limited by hardware or thermal +considerations. Because of this, a read from /proc/cpufreq might +differ from what was written into it. + + +When you read /proc/cpufreq for the first time after a CPUFreq driver +has been initialized, you'll see the "default policy" for this +driver. If this does not suit your needs, you can pass a boot +parameter to the cpufreq core. Use the following syntax for this: + "cpufreq=min_freq:max_freq:policy", i.e. you may not chose a +specific CPU and you need to specify the limits in kHz and not in +per cent. + + +2.2 /proc/cpufreq interface [2.4] +*********************************** + +Previsiously (and still available as a config option), CPUFreq used +a "sysctl" interface which is located in + /proc/sys/cpu/0/ + /proc/sys/cpu/1/ ... (SMP only) + +In these directories, you will find three files of importance for +CPUFreq: speed-max, speed-min and speed: + +speed shows the current CPU frequency in kHz, +speed-min the minimum supported CPU frequency, and +speed-max the maximum supported CPU frequency. + + +To change the CPU frequency, "echo" the desired CPU frequency (in kHz) +to speed. For example, to set the CPU speed to the lowest/highest +allowed frequency do: + +root@notebook:# cat /proc/sys/cpu/0/speed-min > /proc/sys/cpu/0/speed +root@notebook:# cat /proc/sys/cpu/0/speed-max > /proc/sys/cpu/0/speed + + + +3. CPUFreq core and interfaces +=============================== + +3.1 General information +************************* + +The CPUFreq core code is located in linux/kernel/cpufreq.c. This +cpufreq code offers a standardized interface for the CPUFreq +architecture drivers (those pieces of code that do actual +frequency transitions), as well as to "notifiers". These are device +drivers or other part of the kernel that need to be informed of +policy changes (like thermal modules like ACPI) or of all +frequency changes (like timing code) or even need to force certain +speed limits (like LCD drivers on ARM architecture). Additionally, the +kernel "constant" loops_per_jiffy is updated on frequency changes +here. + + +3.2 CPUFreq notifiers +*********************** + +CPUFreq notifiers conform to the standard kernel notifier interface. +See linux/include/linux/notifier.h for details on notifiers. + +There are two different CPUFreq notifiers - policy notifiers and +transition notifiers. + + +3.2.1 CPUFreq policy notifiers +****************************** + +These are notified when a new policy is intended to be set. Each +CPUFreq policy notifier is called three times for a policy transition: + +1.) During CPUFREQ_ADJUST all CPUFreq notifiers may change the limit if + they see a need for this - may it be thermal considerations or + hardware limitations. + +2.) During CPUFREQ_INCOMPATIBLE only changes may be done in order to avoid + hardware failure. + +3.) And during CPUFREQ_NOTIFY all notifiers are informed of the new policy + - if two hardware drivers failed to agree on a new policy before this + stage, the incompatible hardware shall be shut down, and the user + informed of this. + +The phase is specified in the second argument to the notifier. + +The third argument, a void *pointer, points to a struct cpufreq_policy +consisting of five values: cpu, min, max, policy and max_cpu_freq. Min +and max are the lower and upper frequencies (in kHz) of the new +policy, policy the new policy, cpu the number of the affected CPU or +CPUFREQ_ALL_CPUS for all CPUs; and max_cpu_freq the maximum supported +CPU frequency. This value is given for informational purposes only. + + +3.2.2 CPUFreq transition notifiers +********************************** + +These are notified twice when the CPUfreq driver switches the CPU core +frequency and this change has any external implications. + +The second argument specifies the phase - CPUFREQ_PRECHANGE or +CPUFREQ_POSTCHANGE. + +The third argument is a struct cpufreq_freqs with the following +values: +cpu - number of the affected CPU or CPUFREQ_ALL_CPUS +old - old frequency +new - new frequency + + +3.3 CPUFreq architecture drivers +********************************** + +CPUFreq architecture drivers are the pieces of kernel code that +actually perform CPU frequency transitions. These need to be +initialized separately (separate initcalls), and may be +modularized. They interact with the CPUFreq core in the following way: + +cpufreq_register() +------------------ +cpufreq_register registers an arch driver to the CPUFreq core. Please +note that only one arch driver may be registered at any time. -EBUSY +is returned when an arch driver is already registered. The argument to +cpufreq_register, struct cpufreq_driver *driver, is described later. + +cpufreq_unregister() +-------------------- +cpufreq_unregister unregisters an arch driver, e.g. on module +unloading. Please note that there is no check done that this is called +from the driver which actually registered itself to the core, so +please only call this function when you are sure the arch driver got +registered correctly before. + +cpufreq_notify_transition() +--------------------------- +On "dumb" hardware where only fixed frequency can be set, the driver +must call cpufreq_notify_transition() once before, and once after the +actual transition. + +struct cpufreq_driver +--------------------- +On initialization, the arch driver is supposed to pass a pointer +to a struct cpufreq_driver *cpufreq_driver consisting of the following +entries: + +cpufreq_verify_t verify: This is a pointer to a function with the + following definition: + int verify_function (struct cpufreq_policy *policy). + This function must verify the new policy is within the limits + supported by the CPU, and at least one supported CPU is within + this range. It may be useful to use cpufreq.h / + cpufreq_verify_within_limits for this. If this is called with + CPUFREQ_ALL_CPUS, and there is no common subset of frequencies + for all CPUs, exit with an error. + +cpufreq_setpolicy_t setpolicy: This is a pointer to a function with + the following definition: + int setpolicy_function (struct cpufreq_policy *policy). + This function must set the CPU to the new policy. If it is a + "dumb" CPU which only allows fixed frequencies to be set, it + shall set it to the lowest within the limit for + CPUFREQ_POLICY_POWERSAVE, and to the highest for + CPUFREQ_POLICY_PERFORMANCE. Once CONFIG_CPU_FREQ_DYNAMIC is + implemented, it can use a dynamic method to adjust the speed + between the lower and upper limit. + +struct cpufreq_policy *policy: This is an array of NR_CPUS struct + cpufreq_policies, containing the current policies set for these + CPUs. Note that policy[cpu].max_cpu_freq must contain the + absolute maximum CPU frequency supported by the specified cpu. + +In case the driver is expected to run with the 2.4.-style API +(/proc/sys/cpu/.../), two more values must be passed +#ifdef CONFIG_CPU_FREQ_24_API + unsigned int cpu_min_freq[NR_CPUS]; + unsigned int cpu_cur_freq[NR_CPUS]; +#endif + with cpu_min_freq[cpu] being the minimum CPU frequency + supported by the CPU; and the entries in cpu_cur_freq + reflecting the current speed of the appropriate CPU. + +Some Requirements to CPUFreq architecture drivers +------------------------------------------------- +* Only call cpufreq_register() when the ability to switch CPU + frequencies is _verified_ or can't be missing. Also, all + other initialization must be done beofre this call, as + cpfureq_register calls the driver's verify and setpolicy code for + each CPU. +* cpufreq_unregister() may only be called if cpufreq_register() has + been successfully(!) called before. +* kfree() the struct cpufreq_driver only after the call to + cpufreq_unregister(), unless cpufreq_register() failed. + + + +4. Mailing list and Links +************************* + + +Mailing List +------------ +There is a CPU frequency changing CVS commit and general list where +you can report bugs, problems or submit patches. To post a message, +send an email to cpufreq@www.linux.org.uk, to subscribe go to +http://www.linux.org.uk/mailman/listinfo/cpufreq. Previous post to the +mailing list are available to subscribers at +http://www.linux.org.uk/mailman/private/cpufreq/. + + +Links +----- +the FTP archives: +* ftp://ftp.linux.org.uk/pub/linux/cpufreq/ + +how to access the CVS repository: +* http://cvs.arm.linux.org.uk/ + +the CPUFreq Mailing list: +* http://www.linux.org.uk/mailman/listinfo/cpufreq + +Clock and voltage scaling for the SA-1100: +* http://www.lart.tudelft.nl/projects/scaling + +CPUFreq project homepage +* http://www.brodo.de/cpufreq/ diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/Documentation/DriverFixers linux.21rc1-ac1/Documentation/DriverFixers --- linux.21rc1/Documentation/DriverFixers 1970-01-01 01:00:00.000000000 +0100 +++ linux.21rc1-ac1/Documentation/DriverFixers 2003-04-22 16:44:36.000000000 +0100 @@ -0,0 +1,75 @@ +People who fix drivers as a business - ie for money. (No recommendation, +business association or other relationship implied. This for the benefit of +American lawyers is just a list of people who have asked to be listed - nothing +more). + +Companies Who Will Do Small Contract Work +----------------------------------------- + +Company: BitWizard +Contact: Rogier Wolff +E-Mail: R.E.Wolff@BitWizard.nl + +Company: Caederus +Contact: Justin Mitchell +E-Mail: info@caederus.com +Location: Swansea, Wales, UK +URL: http://www.caederus.com/ + +Company: Calsoft Inc +Contact: Anupam Bhide +E-Mail: anupam@calsoftinc.com +URL: http://www.calsoftinc.com +Location: Pune, India + +Company: Hansen Partnership Inc +Contact: James Bottomley +E-Mail: James.Bottomley@HansenPartnership.com +Location: 1, Partridge Square, Oswego, Illinois 60543, USA + +Company: Linking +Contact: Elmer Joandi +E-Mail: elmer@linkingsoft.com + +Company: Penguru Consulting, LLC +Contact: Komron Takmil +E-Mail: komron@penguru.net +Location: Salt Lake City, UT USA + +Company: 7Chips +Contact: Vadim Lebedev +E-Mail: vadim@7chips.com +Location: Paris, France +Notes: Experienced in Linux and uClinux on x86/ARM/Motorola + +Company: Weinigel Ingenjörsbyrå AB +Contact: Christer Weinigel +E-Mail: christer@weinigel.se +Location: Stockholm, Sweden + +Company: WildOpenSource +Contact: Martin Hicks +E-Mail: info@wildopensource.com + + +Companies Only Interested In Larger ($10000+) Jobs +-------------------------------------------------- + + + +Companies Only Interested In Very Large ($100000+) Jobs +------------------------------------------------------- + + +To be added to the list: email giving the +following information + +Company: CompanyName [Required] +Contact: ContactName [Required] +E-Mail: An email address [Required] +URL: Web site [Optional] +Location: Area/Country [Optional] +Telephone: Contact phone number [Optional] +Speciality: Any specific speciality [Optional] +Notes: Any other notes (eg certifications, specialities) + diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/Documentation/i386/zero-page.txt linux.21rc1-ac1/Documentation/i386/zero-page.txt --- linux.21rc1/Documentation/i386/zero-page.txt 2003-04-22 16:38:59.000000000 +0100 +++ linux.21rc1-ac1/Documentation/i386/zero-page.txt 2003-04-22 16:44:36.000000000 +0100 @@ -31,6 +31,7 @@ 0x1e0 unsigned long ALT_MEM_K, alternative mem check, in Kb 0x1e8 char number of entries in E820MAP (below) +0x1e9 unsigned char number of entries in EDDBUF (below) 0x1f1 char size of setup.S, number of sectors 0x1f2 unsigned short MOUNT_ROOT_RDONLY (if !=0) 0x1f4 unsigned short size of compressed kernel-part in the @@ -66,6 +67,7 @@ 0x220 4 bytes (setup.S) 0x224 unsigned short setup.S heap end pointer 0x2d0 - 0x600 E820MAP +0x600 - 0x7D4 EDDBUF (setup.S) 0x800 string, 2K max COMMAND_LINE, the kernel commandline as copied using CL_OFFSET. diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/Documentation/networking/generic-hdlc.txt linux.21rc1-ac1/Documentation/networking/generic-hdlc.txt --- linux.21rc1/Documentation/networking/generic-hdlc.txt 2003-04-22 16:39:32.000000000 +0100 +++ linux.21rc1-ac1/Documentation/networking/generic-hdlc.txt 2003-04-22 16:44:36.000000000 +0100 @@ -1,11 +1,13 @@ -Generic HDLC layer for Linux kernel 2.4/2.5 +Generic HDLC layer Krzysztof Halasa -May, 2001 +January, 2003 Generic HDLC layer currently supports: -- Frame Relay (ANSI, CCITT and no LMI), with ARP support (no InARP), -- raw HDLC (IPv4 only), +- Frame Relay (ANSI, CCITT and no LMI), with ARP support (no InARP). + Normal (routed) and Ethernet-bridged (Ethernet device emulation) + interfaces can share a single PVC. +- raw HDLC - either IP (IPv4) interface or Ethernet device emulation. - Cisco HDLC, - PPP (uses syncppp.c), - X.25 (uses X.25 routines). @@ -15,6 +17,10 @@ - RISCom/N2 by SDL Communications Inc. - and others, some not in the official kernel. +Ethernet device emulation (using HDLC or Frame-Relay PVC) is compatible +with IEEE 802.1Q (VLANs) and 802.1D (Ethernet bridging). + + Make sure the hdlc.o and the hardware driver are loaded. It should create a number of "hdlc" (hdlc0 etc) network devices, one for each WAN port. You'll need the "sethdlc" utility, get it from: @@ -58,6 +64,9 @@ no-parity / crc16 / crc16-pr0 (CRC16 with preset zeros) / crc32-itu crc16-itu (CRC16 with ITU-T polynomial) / crc16-itu-pr0 - sets parity +* hdlc-eth - Ethernet device emulation using HDLC. Parity and encoding + as above. + * cisco - sets Cisco HDLC mode (IP, IPv6 and IPX supported) interval - time in seconds between keepalive packets timeout - time in seconds after last received keepalive packet before @@ -77,7 +86,12 @@ n392 - error threshold - both user and network n393 - monitored events count - both user and network -* create | delete n - FR only - adds / deletes PVC interface with DLCI #n. +Frame-Relay only: +* create n | delete n - adds / deletes PVC interface with DLCI #n. + Newly created interface will be named pvc0, pvc1 etc. + +* create ether n | delete ether n - adds a device for Ethernet-bridged + frames. The device will be named pvceth0, pvceth1 etc. @@ -104,11 +118,11 @@ If you have a problem with N2 or C101 card, you can issue the "private" -command to see port's packet descriptor rings: +command to see port's packet descriptor rings (in kernel logs): sethdlc hdlc0 private -The hardware driver have to be build with CONFIG_HDLC_DEBUG_RINGS. +The hardware driver has to be build with CONFIG_HDLC_DEBUG_RINGS. Attaching this info to bug reports would be helpful. Anyway, let me know if you have problems using this. diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/Documentation/s390/c7000.txt linux.21rc1-ac1/Documentation/s390/c7000.txt --- linux.21rc1/Documentation/s390/c7000.txt 1970-01-01 01:00:00.000000000 +0100 +++ linux.21rc1-ac1/Documentation/s390/c7000.txt 2003-04-22 16:44:36.000000000 +0100 @@ -0,0 +1,92 @@ +Cisco 7000 (CLAW) support + +The c7000 module provides support for a channel attached Cisco 7xxx +family router on Linux/390. The parameters for the module are as follows: + + base0=0xYYYY This parameter defines the base unit address of the + channel attached router. + + lhost0=s1 This parameter defines the local host name and + must match the claw directive "host-name" field + (first string). The default value is "UTS". + + uhost0=s2 This parameter defines the unit's name and must + match the claw directive "device-name" field + (second string). The default value is "C7011". + + lappl0=s3 This parameter defines the local application name + and must match the claw directive "host-app" field + (third string). The default value is "TCPIP". + + uappl0=s4 This parameter defines the unit application name and + must match the claw directive "device-app" field + (fourth string). The default value is "TCPIP". + + dbg=x This parameter defines the message level. Higher + numbers will result in additional diagnostic messages. + The default value is 0. + + noauto=z This parameter controls the automatic detection of + the unit base address (base0). When set to a non + zero value, automatic detection of unit base addresses + is not done. The default value is 0. + +Note that the values coded in strings s1 - s4 are case sensitive. + +For example, assume that the following claw directive has been coded in +the Cisco router: + +claw 0100 6C 129.212.61.101 UTS C7011 TCPIP TCPIP + +The module can be loaded using the following command: + +insmod c7000 base0=0x336c lhost0="UTS" uhost0="C7011" lappl0="TCPIP" \ +uappl0="TCPIP" dbg=0 noauto=1 + +Additional interfaces can be defined via parameters base1 - base3, +lhost1 - lhost3, lappl1 - lappl3, uhost1 - uhost3, uappl1 - uappl3. +The interfaces are named "ci0" - "ci3". After loading the module, the +ifconfig command is used to configure the interface. For example: + +ifconfig ci0 129.212.61.101 +ifconfig ci0 netmask 255.255.255.0 broadcast 129.212.61.0 +ifconfig ci0 + +The route command is used to specify the router as the default route: + +route add default gw 129.212.61.200 + +The interface can be automatically activated at boot time by following this +procedure: + +1) Add the following two lines to file "/etc/conf.modules": + +alias ci0 c7000 +options c7000 base0=0xYYYY lhost0=s1 uhost0=s2 lappl0=s3 uappl0=s4 + +2) Edit file "/etc/sysconfig/network" as follows: + +NETWORKING=yes +FORWARD_IPV4=no +HOSTNAME=your-hostname +GATEWAYDEV=ci0 +GATEWAY=your-gateway-ip-address + +Substitute your own host name and gateway IP address. + +3) Create a file in directory "/etc/sysconfig/network-scripts" called +"ifcfg-ci0". The contents are as follows: + +DEVICE=ci0 +USERCTL=no +ONBOOT=yes +BOOTPROTO=none +BROADCAST=your-broadcast-ip-address +NETWORK=your-network-address +NETMASK=your-netmask +IPADDR=your-ip-address + +Substitute your IP address, broadcast IP address, network address and +network mask. + +4) chmod +x ifcfg-ci0 diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/Documentation/sched-coding.txt linux.21rc1-ac1/Documentation/sched-coding.txt --- linux.21rc1/Documentation/sched-coding.txt 1970-01-01 01:00:00.000000000 +0100 +++ linux.21rc1-ac1/Documentation/sched-coding.txt 2003-04-22 16:44:36.000000000 +0100 @@ -0,0 +1,129 @@ + Reference for various scheduler-related methods in the O(1) scheduler + Robert Love , MontaVista Software + + +Note most of these methods are local to kernel/sched.c - this is by design. +The scheduler is meant to be self-contained and abstracted away. This document +is primarily for understanding the scheduler, not interfacing to it. Some of +the discussed interfaces, however, are general process/scheduling methods. +They are typically defined in include/linux/sched.h. + + +Main Scheduling Methods +----------------------- + +void load_balance(runqueue_t *this_rq, int idle) + Attempts to pull tasks from one cpu to another to balance cpu usage, + if needed. This method is called explicitly if the runqueues are + inbalanced or periodically by the timer tick. Prior to calling, + the current runqueue must be locked and interrupts disabled. + +void schedule() + The main scheduling function. Upon return, the highest priority + process will be active. + + +Locking +------- + +Each runqueue has its own lock, rq->lock. When multiple runqueues need +to be locked, lock acquires must be ordered by ascending &runqueue value. + +A specific runqueue is locked via + + task_rq_lock(task_t pid, unsigned long *flags) + +which disables preemption, disables interrupts, and locks the runqueue pid is +running on. Likewise, + + task_rq_unlock(task_t pid, unsigned long *flags) + +unlocks the runqueue pid is running on, restores interrupts to their previous +state, and reenables preemption. + +The routines + + double_rq_lock(runqueue_t *rq1, runqueue_t *rq2) + +and + + double_rq_unlock(runqueue_t *rq1, runqueue_t rq2) + +safely lock and unlock, respectively, the two specified runqueues. They do +not, however, disable and restore interrupts. Users are required to do so +manually before and after calls. + + +Values +------ + +MAX_PRIO + The maximum priority of the system, stored in the task as task->prio. + Lower priorities are higher. Normal (non-RT) priorities range from + MAX_RT_PRIO to (MAX_PRIO - 1). +MAX_RT_PRIO + The maximum real-time priority of the system. Valid RT priorities + range from 0 to (MAX_RT_PRIO - 1). +MAX_USER_RT_PRIO + The maximum real-time priority that is exported to user-space. Should + always be equal to or less than MAX_RT_PRIO. Setting it less allows + kernel threads to have higher priorities than any user-space task. +MIN_TIMESLICE +MAX_TIMESLICE + Respectively, the minimum and maximum timeslices (quanta) of a process. + +Data +---- + +struct runqueue + The main per-CPU runqueue data structure. +struct task_struct + The main per-process data structure. + + +General Methods +--------------- + +cpu_rq(cpu) + Returns the runqueue of the specified cpu. +this_rq() + Returns the runqueue of the current cpu. +task_rq(task) + Returns the runqueue which holds the specified task. +cpu_curr(cpu) + Returns the task currently running on the given cpu. +rt_task(task) + Returns true if task is real-time, false if not. +task_cpu(task) + + +Process Control Methods +----------------------- + +void set_user_nice(task_t *p, long nice) + Sets the "nice" value of task p to the given value. +int setscheduler(pid_t pid, int policy, struct sched_param *param) + Sets the scheduling policy and parameters for the given pid. +void set_cpus_allowed(task_t *p, unsigned long new_mask) + Sets a given task's CPU affinity and migrates it to a proper cpu. + Callers must have a valid reference to the task and assure the + task not exit prematurely. No locks can be held during the call. +set_task_state(tsk, state_value) + Sets the given task's state to the given value. +set_current_state(state_value) + Sets the current task's state to the given value. +void set_tsk_need_resched(struct task_struct *tsk) + Sets need_resched in the given task. +void clear_tsk_need_resched(struct task_struct *tsk) + Clears need_resched in the given task. +void set_need_resched() + Sets need_resched in the current task. +void set_task_cpu(task, cpu) + Sets task->cpu to cpu on SMP. Noop on UP. +void clear_need_resched() + Clears need_resched in the current task. +int need_resched() + Returns true if need_resched is set in the current task, false + otherwise. +yield() + Place the current process at the end of the runqueue and call schedule. diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/Documentation/sched-design.txt linux.21rc1-ac1/Documentation/sched-design.txt --- linux.21rc1/Documentation/sched-design.txt 1970-01-01 01:00:00.000000000 +0100 +++ linux.21rc1-ac1/Documentation/sched-design.txt 2003-04-22 16:44:36.000000000 +0100 @@ -0,0 +1,165 @@ + Goals, Design and Implementation of the + new ultra-scalable O(1) scheduler + + + This is an edited version of an email Ingo Molnar sent to + lkml on 4 Jan 2002. It describes the goals, design, and + implementation of Ingo's new ultra-scalable O(1) scheduler. + Last Updated: 18 April 2002. + + +Goal +==== + +The main goal of the new scheduler is to keep all the good things we know +and love about the current Linux scheduler: + + - good interactive performance even during high load: if the user + types or clicks then the system must react instantly and must execute + the user tasks smoothly, even during considerable background load. + + - good scheduling/wakeup performance with 1-2 runnable processes. + + - fairness: no process should stay without any timeslice for any + unreasonable amount of time. No process should get an unjustly high + amount of CPU time. + + - priorities: less important tasks can be started with lower priority, + more important tasks with higher priority. + + - SMP efficiency: no CPU should stay idle if there is work to do. + + - SMP affinity: processes which run on one CPU should stay affine to + that CPU. Processes should not bounce between CPUs too frequently. + + - plus additional scheduler features: RT scheduling, CPU binding. + +and the goal is also to add a few new things: + + - fully O(1) scheduling. Are you tired of the recalculation loop + blowing the L1 cache away every now and then? Do you think the goodness + loop is taking a bit too long to finish if there are lots of runnable + processes? This new scheduler takes no prisoners: wakeup(), schedule(), + the timer interrupt are all O(1) algorithms. There is no recalculation + loop. There is no goodness loop either. + + - 'perfect' SMP scalability. With the new scheduler there is no 'big' + runqueue_lock anymore - it's all per-CPU runqueues and locks - two + tasks on two separate CPUs can wake up, schedule and context-switch + completely in parallel, without any interlocking. All + scheduling-relevant data is structured for maximum scalability. + + - better SMP affinity. The old scheduler has a particular weakness that + causes the random bouncing of tasks between CPUs if/when higher + priority/interactive tasks, this was observed and reported by many + people. The reason is that the timeslice recalculation loop first needs + every currently running task to consume its timeslice. But when this + happens on eg. an 8-way system, then this property starves an + increasing number of CPUs from executing any process. Once the last + task that has a timeslice left has finished using up that timeslice, + the recalculation loop is triggered and other CPUs can start executing + tasks again - after having idled around for a number of timer ticks. + The more CPUs, the worse this effect. + + Furthermore, this same effect causes the bouncing effect as well: + whenever there is such a 'timeslice squeeze' of the global runqueue, + idle processors start executing tasks which are not affine to that CPU. + (because the affine tasks have finished off their timeslices already.) + + The new scheduler solves this problem by distributing timeslices on a + per-CPU basis, without having any global synchronization or + recalculation. + + - batch scheduling. A significant proportion of computing-intensive tasks + benefit from batch-scheduling, where timeslices are long and processes + are roundrobin scheduled. The new scheduler does such batch-scheduling + of the lowest priority tasks - so nice +19 jobs will get + 'batch-scheduled' automatically. With this scheduler, nice +19 jobs are + in essence SCHED_IDLE, from an interactiveness point of view. + + - handle extreme loads more smoothly, without breakdown and scheduling + storms. + + - O(1) RT scheduling. For those RT folks who are paranoid about the + O(nr_running) property of the goodness loop and the recalculation loop. + + - run fork()ed children before the parent. Andrea has pointed out the + advantages of this a few months ago, but patches for this feature + do not work with the old scheduler as well as they should, + because idle processes often steal the new child before the fork()ing + CPU gets to execute it. + + +Design +====== + +the core of the new scheduler are the following mechanizms: + + - *two*, priority-ordered 'priority arrays' per CPU. There is an 'active' + array and an 'expired' array. The active array contains all tasks that + are affine to this CPU and have timeslices left. The expired array + contains all tasks which have used up their timeslices - but this array + is kept sorted as well. The active and expired array is not accessed + directly, it's accessed through two pointers in the per-CPU runqueue + structure. If all active tasks are used up then we 'switch' the two + pointers and from now on the ready-to-go (former-) expired array is the + active array - and the empty active array serves as the new collector + for expired tasks. + + - there is a 64-bit bitmap cache for array indices. Finding the highest + priority task is thus a matter of two x86 BSFL bit-search instructions. + +the split-array solution enables us to have an arbitrary number of active +and expired tasks, and the recalculation of timeslices can be done +immediately when the timeslice expires. Because the arrays are always +access through the pointers in the runqueue, switching the two arrays can +be done very quickly. + +this is a hybride priority-list approach coupled with roundrobin +scheduling and the array-switch method of distributing timeslices. + + - there is a per-task 'load estimator'. + +one of the toughest things to get right is good interactive feel during +heavy system load. While playing with various scheduler variants i found +that the best interactive feel is achieved not by 'boosting' interactive +tasks, but by 'punishing' tasks that want to use more CPU time than there +is available. This method is also much easier to do in an O(1) fashion. + +to establish the actual 'load' the task contributes to the system, a +complex-looking but pretty accurate method is used: there is a 4-entry +'history' ringbuffer of the task's activities during the last 4 seconds. +This ringbuffer is operated without much overhead. The entries tell the +scheduler a pretty accurate load-history of the task: has it used up more +CPU time or less during the past N seconds. [the size '4' and the interval +of 4x 1 seconds was found by lots of experimentation - this part is +flexible and can be changed in both directions.] + +the penalty a task gets for generating more load than the CPU can handle +is a priority decrease - there is a maximum amount to this penalty +relative to their static priority, so even fully CPU-bound tasks will +observe each other's priorities, and will share the CPU accordingly. + +the SMP load-balancer can be extended/switched with additional parallel +computing and cache hierarchy concepts: NUMA scheduling, multi-core CPUs +can be supported easily by changing the load-balancer. Right now it's +tuned for my SMP systems. + +i skipped the prev->mm == next->mm advantage - no workload i know of shows +any sensitivity to this. It can be added back by sacrificing O(1) +schedule() [the current and one-lower priority list can be searched for a +that->mm == current->mm condition], but costs a fair number of cycles +during a number of important workloads, so i wanted to avoid this as much +as possible. + +- the SMP idle-task startup code was still racy and the new scheduler +triggered this. So i streamlined the idle-setup code a bit. We do not call +into schedule() before all processors have started up fully and all idle +threads are in place. + +- the patch also cleans up a number of aspects of sched.c - moves code +into other areas of the kernel where it's appropriate, and simplifies +certain code paths and data constructs. As a result, the new scheduler's +code is smaller than the old one. + + Ingo diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/Documentation/vm/overcommit-accounting linux.21rc1-ac1/Documentation/vm/overcommit-accounting --- linux.21rc1/Documentation/vm/overcommit-accounting 1970-01-01 01:00:00.000000000 +0100 +++ linux.21rc1-ac1/Documentation/vm/overcommit-accounting 2003-04-22 16:44:36.000000000 +0100 @@ -0,0 +1,70 @@ +* This describes the overcommit management facility in the latest kernel + tree (FIXME: actually it also describes the stuff that isnt yet done) + +The Linux kernel supports four overcommit handling modes + +0 - Heuristic overcommit handling. Obvious overcommits of + address space are refused. Used for a typical system. It + ensures a seriously wild allocation fails while allowing + overcommit to reduce swap usage + +1 - No overcommit handling. Appropriate for some scientific + applications + +2 - (NEW) strict overcommit. The total address space commit + for the system is not permitted to exceed swap + half ram. + In almost all situations this means a process will not be + killed while accessing pages but only by malloc failures + that are reported back by the kernel mmap/brk code. + +3 - (NEW) paranoid overcommit The total address space commit + for the system is not permitted to exceed swap. The machine + will never kill a process accessing pages it has mapped + except due to a bug (ie report it!) + +Gotchas +------- + +The C language stack growth does an implicit mremap. If you want absolute +guarantees and run close to the edge you MUST mmap your stack for the +largest size you think you will need. For typical stack usage is does +not matter much but its a corner case if you really really care + +In modes 2 and 3 the MAP_NORESERVE flag is ignored. + + +How It Works +------------ + +The overcommit is based on the following rules + +For a file backed map + SHARED or READ-only - 0 cost (the file is the map not swap) + PRIVATE WRITABLE - size of mapping per instance + +For an anonymous or /dev/zero map + SHARED - size of mapping + PRIVATE READ-only - 0 cost (but of little use) + PRIVATE WRITABLE - size of mapping per instance + +Additional accounting + Pages made writable copies by mmap + shmfs memory drawn from the same pool + +Status +------ + +o We account mmap memory mappings +o We account mprotect changes in commit +o We account mremap changes in size +o We account brk +o We account munmap +o We report the commit status in /proc +o Account and check on fork +o Review stack handling/building on exec +o SHMfs accounting +o Implement actual limit enforcement + +To Do +----- +o Account ptrace pages (this is hard) diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/block/cciss.c linux.21rc1-ac1/drivers/block/cciss.c --- linux.21rc1/drivers/block/cciss.c 2003-04-22 16:39:34.000000000 +0100 +++ linux.21rc1-ac1/drivers/block/cciss.c 2003-04-22 16:44:36.000000000 +0100 @@ -94,7 +94,8 @@ }; /* How long to wait (in millesconds) for board to go into simple mode */ -#define MAX_CONFIG_WAIT 1000 +#define MAX_CONFIG_WAIT 30000 +#define MAX_IOCTL_CONFIG_WAIT 1000 /*define how many times we will try a command because of bus resets */ #define MAX_CMD_RETRIES 3 @@ -578,7 +579,7 @@ &(c->cfgtable->HostWrite.CoalIntCount)); writel( CFGTBL_ChangeReq, c->vaddr + SA5_DOORBELL); - for(i=0;ivaddr + SA5_DOORBELL) & CFGTBL_ChangeReq)) break; @@ -586,8 +587,11 @@ udelay(1000); } spin_unlock_irqrestore(&io_request_lock, flags); - if (i >= MAX_CONFIG_WAIT) - return -EFAULT; + if (i >= MAX_IOCTL_CONFIG_WAIT) + /* there is an unlikely case where this can happen, + * involving hot replacing a failed 144 GB drive in a + * RAID 5 set just as we attempt this ioctl. */ + return -EAGAIN; return 0; } case CCISS_GETNODENAME: @@ -627,7 +631,7 @@ writel( CFGTBL_ChangeReq, c->vaddr + SA5_DOORBELL); - for(i=0;ivaddr + SA5_DOORBELL) & CFGTBL_ChangeReq)) break; @@ -635,8 +639,11 @@ udelay(1000); } spin_unlock_irqrestore(&io_request_lock, flags); - if (i >= MAX_CONFIG_WAIT) - return -EFAULT; + if (i >= MAX_IOCTL_CONFIG_WAIT) + /* there is an unlikely case where this can happen, + * involving hot replacing a failed 144 GB drive in a + * RAID 5 set just as we attempt this ioctl. */ + return -EAGAIN; return 0; } @@ -2583,11 +2590,17 @@ &(c->cfgtable->HostWrite.TransportRequest)); writel( CFGTBL_ChangeReq, c->vaddr + SA5_DOORBELL); + /* Here, we wait, possibly for a long time, (4 secs or more). + * In some unlikely cases, (e.g. A failed 144 GB drive in a + * RAID 5 set was hot replaced just as we're coming in here) it + * can take that long. Normally (almost always) we will wait + * less than 1 sec. */ for(i=0;ivaddr + SA5_DOORBELL) & CFGTBL_ChangeReq)) break; /* delay and try again */ - udelay(1000); + set_current_state(TASK_INTERRUPTIBLE); + schedule_timeout(1); } #ifdef CCISS_DEBUG @@ -3021,12 +3034,8 @@ printk(KERN_INFO DRIVER_NAME "\n"); /* Register for out PCI devices */ - if (pci_register_driver(&cciss_pci_driver) > 0 ) - return 0; - else - return -ENODEV; - - } + return pci_module_init(&cciss_pci_driver); +} EXPORT_NO_SYMBOLS; static int __init init_cciss_module(void) diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/block/DAC960.c linux.21rc1-ac1/drivers/block/DAC960.c --- linux.21rc1/drivers/block/DAC960.c 2003-04-22 16:38:38.000000000 +0100 +++ linux.21rc1-ac1/drivers/block/DAC960.c 2003-04-22 16:44:36.000000000 +0100 @@ -1133,6 +1133,26 @@ DAC960PU/PD/PL 3.51 and above DAC960PU/PD/PL/P 2.73 and above */ +#if defined(__alpha__) + /* + DEC Alpha machines were often equipped with DAC960 cards that were + OEMed from Mylex, and had their own custom firmware. Version 2.70, + the last custom FW revision to be released by DEC for these older + controllers, appears to work quite well with this driver. + + Cards tested successfully were several versions each of the PD and + PU, called by DEC the KZPSC and KZPAC, respectively, and having + the Manufacturer Numbers (from Mylex), usually on a sticker on the + back of the board, of: + + KZPSC D040347 (1ch) or D040348 (2ch) or D040349 (3ch) + KZPAC D040395 (1ch) or D040396 (2ch) or D040397 (3ch) + */ +# define FIRMWARE_27x "2.70" +#else +# define FIRMWARE_27x "2.73" +#endif + if (Enquiry2.FirmwareID.MajorVersion == 0) { Enquiry2.FirmwareID.MajorVersion = @@ -1152,7 +1172,7 @@ (Controller->FirmwareVersion[0] == '3' && strcmp(Controller->FirmwareVersion, "3.51") >= 0) || (Controller->FirmwareVersion[0] == '2' && - strcmp(Controller->FirmwareVersion, "2.73") >= 0))) + strcmp(Controller->FirmwareVersion, FIRMWARE_27x) >= 0))) { DAC960_Failure(Controller, "FIRMWARE VERSION VERIFICATION"); DAC960_Error("Firmware Version = '%s'\n", Controller, diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/block/elevator.c linux.21rc1-ac1/drivers/block/elevator.c --- linux.21rc1/drivers/block/elevator.c 2003-04-22 16:39:34.000000000 +0100 +++ linux.21rc1-ac1/drivers/block/elevator.c 2003-04-22 16:44:36.000000000 +0100 @@ -27,6 +27,25 @@ #include #include + +static int compatible(struct request *req, struct buffer_head *bh, + request_queue_t *q, int rw, + int count, int max_sectors) +{ + if (q->head_active) + return 0; + if (req->waiting) + return 0; + if (req->rq_dev != bh->b_rdev) + return 0; + if (req->cmd != rw) + return 0; + if (req->nr_sectors + count > max_sectors) + return 0; + return 1; +} + + /* * This is a bit tricky. It's given that bh and rq are for the same * device, but the next request might of course not be. Run through @@ -83,22 +102,38 @@ struct list_head *entry = &q->queue_head; unsigned int count = bh->b_size >> 9, ret = ELEVATOR_NO_MERGE; struct request *__rq; - int backmerge_only = 0; + + /* + * Quick one-entry cache of last merge + * nb. we do no latency accounting this way. + */ + + if (q->last_request) { + struct request *__rq = q->last_request; - while (!backmerge_only && (entry = entry->prev) != head) { + if (compatible(__rq, bh, q, rw, count, max_sectors)) { + if (__rq->sector + __rq->nr_sectors == bh->b_rsector) { + *req = __rq; + return ELEVATOR_BACK_MERGE; + } + } + } + + + while ((entry = entry->prev) != head) { __rq = blkdev_entry_to_request(entry); /* * we can't insert beyond a zero sequence point */ if (__rq->elevator_sequence <= 0) - backmerge_only = 1; + break; if (__rq->waiting) continue; if (__rq->rq_dev != bh->b_rdev) continue; - if (!*req && bh_rq_in_between(bh, __rq, &q->queue_head) && !backmerge_only) + if (!*req && bh_rq_in_between(bh, __rq, &q->queue_head)) *req = __rq; if (__rq->cmd != rw) continue; @@ -108,7 +143,7 @@ ret = ELEVATOR_BACK_MERGE; *req = __rq; break; - } else if (__rq->sector - count == bh->b_rsector && !backmerge_only) { + } else if (__rq->sector - count == bh->b_rsector) { ret = ELEVATOR_FRONT_MERGE; __rq->elevator_sequence--; *req = __rq; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/block/ll_rw_blk.c linux.21rc1-ac1/drivers/block/ll_rw_blk.c --- linux.21rc1/drivers/block/ll_rw_blk.c 2003-04-22 16:39:34.000000000 +0100 +++ linux.21rc1-ac1/drivers/block/ll_rw_blk.c 2003-04-22 17:01:40.000000000 +0100 @@ -360,8 +360,12 @@ { if (q->plugged) { q->plugged = 0; - if (!list_empty(&q->queue_head)) + if (!list_empty(&q->queue_head)) { + if (q->last_request == + blkdev_entry_next_request(&q->queue_head)) + q->last_request = NULL; q->request_fn(q); + } } } @@ -491,6 +495,7 @@ q->plug_tq.routine = &generic_unplug_device; q->plug_tq.data = q; q->plugged = 0; + q->last_request = NULL; /* * These booleans describe the queue properties. We set the * default (and most common) values here. Other drivers can @@ -810,6 +815,7 @@ * inserted at elevator_merge time */ list_add(&req->queue, insert_here); + q->last_request = req; } /* @@ -829,6 +835,9 @@ */ if (q) { list_add(&req->queue, &q->rq[rw].free); + if (q->last_request == req) + q->last_request = NULL; + if (++q->rq[rw].count >= q->batch_requests && waitqueue_active(&q->wait_for_requests[rw])) wake_up(&q->wait_for_requests[rw]); @@ -867,6 +876,7 @@ req->bhtail = next->bhtail; req->nr_sectors = req->hard_nr_sectors += next->hard_nr_sectors; list_del(&next->queue); + q->last_request = req; /* One last thing: we have removed a request, so we now have one less expected IO to complete for accounting purposes. */ diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/cdrom/cdu31a.c linux.21rc1-ac1/drivers/cdrom/cdu31a.c --- linux.21rc1/drivers/cdrom/cdu31a.c 2003-04-22 16:38:49.000000000 +0100 +++ linux.21rc1-ac1/drivers/cdrom/cdu31a.c 2003-04-22 16:44:36.000000000 +0100 @@ -1361,6 +1361,8 @@ res_reg[0] = 0; res_reg[1] = 0; *res_size = 0; + /* Make sure that bytesleft doesn't exceed the buffer size */ + if (nblocks > 4) nblocks = 4; bytesleft = nblocks * 512; offset = 0; @@ -1384,9 +1386,9 @@ readahead_buffer + (2048 - readahead_dataleft), readahead_dataleft); - readahead_dataleft = 0; bytesleft -= readahead_dataleft; offset += readahead_dataleft; + readahead_dataleft = 0; } else { /* The readahead will fill the whole buffer, get the data and return. */ diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/agp/agpgart_be.c linux.21rc1-ac1/drivers/char/agp/agpgart_be.c --- linux.21rc1/drivers/char/agp/agpgart_be.c 2003-04-22 16:39:34.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/agp/agpgart_be.c 2003-04-22 16:44:36.000000000 +0100 @@ -577,7 +577,7 @@ for (page = virt_to_page(table); page <= virt_to_page(table_end); page++) SetPageReserved(page); - agp_bridge.gatt_table_real = (unsigned long *) table; + agp_bridge.gatt_table_real = (u32 *) table; agp_gatt_table = (void *)table; #ifdef CONFIG_X86 err = change_page_attr(virt_to_page(table), 1<line, state->count); #endif - if ((tty->count == 1) && (state->count != 1)) { + if ((atomic_read(&tty->count) == 1) && (state->count != 1)) { /* * Uh, oh. tty->count is 1, which means that the tty * structure will be freed. state->count should always diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/cd1865/cd1865.c linux.21rc1-ac1/drivers/char/cd1865/cd1865.c --- linux.21rc1/drivers/char/cd1865/cd1865.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/cd1865/cd1865.c 2003-04-22 16:44:36.000000000 +0100 @@ -0,0 +1,2913 @@ +/* -*- linux-c -*- */ +/* + * This code was modified from + * specialix.c -- specialix IO8+ multiport serial driver. + * + * Copyright (C) 1997 Roger Wolff (R.E.Wolff@BitWizard.nl) + * Copyright (C) 1994-1996 Dmitry Gorodchanin (pgmdsg@ibi.com) + * Modifications (C) 2002 Telford Tools, Inc. (martillo@telfordtools.com) + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be + * useful, but WITHOUT ANY WARRANTY; without even the implied + * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR + * PURPOSE. See the GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this program; if not, write to the Free + * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, + * USA. + * + */ + +#define VERSION "2.11" + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "cdsiolx.h" +#include "../cd1865.h" /* will move all files up one level */ +#include "siolx.h" +#include "plx9060.h" + +#define SIOLX_NORMAL_MAJOR 254 /* One is needed */ +#define SIOLX_ID 0x10 +#define CD186x_MSMR 0x61 /* modem/timer iack */ +#define CD186x_TSMR 0x62 /* tx iack */ +#define CD186x_RSMR 0x63 /* rx iack */ + +/* Configurable options: */ + +/* Am I paranoid or not ? ;-) */ +#define SIOLX_PARANOIA_CHECK + +/* Do I trust the IRQ from the card? (enabeling it doesn't seem to help) + When the IRQ routine leaves the chip in a state that is keeps on + requiring attention, the timer doesn't help either. */ +#undef SIOLX_TIMER +/* + * The following defines are mostly for testing purposes. But if you need + * some nice reporting in your syslog, you can define them also. + */ +#undef SIOLX_REPORT_FIFO +#undef SIOLX_REPORT_OVERRUN + +#ifdef CONFIG_SIOLX_RTSCTS /* may need to set this */ +#define SIOLX_CRTSCTS(bla) 1 +#else +#define SIOLX_CRTSCTS(tty) C_CRTSCTS(tty) +#endif + +/* Used to be outb (0xff, 0x80); */ +#define short_pause() udelay (1) + +#define SIOLX_LEGAL_FLAGS \ + (ASYNC_HUP_NOTIFY | ASYNC_SAK | ASYNC_SPLIT_TERMIOS | \ + ASYNC_SPD_HI | ASYNC_SPEED_VHI | ASYNC_SESSION_LOCKOUT | \ + ASYNC_PGRP_LOCKOUT | ASYNC_CALLOUT_NOHUP) + +#ifndef MIN +#define MIN(a,b) ((a) < (b) ? (a) : (b)) +#endif + +DECLARE_TASK_QUEUE(tq_siolx); + +#undef RS_EVENT_WRITE_WAKEUP +#define RS_EVENT_WRITE_WAKEUP 0 + +#define SIOLX_TYPE_NORMAL 1 +#define SIOLX_TYPE_CALLOUT 2 + +#define BD_8000P 1 +#define BD_16000P 2 +#define BD_8000C 3 +#define BD_16000C 4 +#define BD_MAX BD_16000C + +static struct siolx_board *SiolxIrqRoot[SIOLX_NUMINTS]; + +static char *sio16_board_type[] = +{ + "unknown", + " 8000P ", + "16000P ", + " 8000C ", + "16000C " +}; +static struct tty_driver siolx_driver, siolx_callout_driver; +static int siolx_refcount; +static unsigned char * tmp_buf; +static DECLARE_MUTEX(tmp_buf_sem); +static unsigned long baud_table[] = +{ + 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800, + 9600, 19200, 38400, 57600, 115200, 0, +}; +static int siolx_debug = 0; /* turns on lots of */ + /* debugging messages*/ +static int siolx_major = SIOLX_NORMAL_MAJOR; +#ifdef MODULE +static int siolx_minorstart = 256; +#endif +static int siolx_vendor_id = PCI_VENDOR_ID_PLX; +static int siolx_device_id = PCI_DEVICE_ID_PLX_9060SD; +static int siolx_subsystem_vendor = AURASUBSYSTEM_VENDOR_ID; +static int siolx_subsystem_pci_device = AURASUBSYSTEM_MPASYNCPCI; +static int siolx_subsystem_cpci_device = AURASUBSYSTEM_MPASYNCcPCI; +static int siolx_bhindex = SIOLX_BH; /* if this softinterrupt slot is filled */ + +MODULE_PARM(siolx_vendor_id, "i"); +MODULE_PARM(siolx_device_id, "i"); +#ifdef MODULE +MODULE_PARM(siolx_minorstart, "i"); +#endif +MODULE_PARM(siolx_major, "i"); +MODULE_PARM(siolx_subsystem_vendor, "i"); +MODULE_PARM(siolx_subsystem_pci_device, "i"); +MODULE_PARM(siolx_subsystem_cpci_device, "i"); +MODULE_PARM(siolx_bhindex, "i"); + +static struct siolx_board *siolx_board_root; +static struct siolx_board *siolx_board_last; +static struct siolx_port *siolx_port_root; +static struct siolx_port *siolx_port_last; +static unsigned int NumSiolxPorts; +static struct tty_struct **siolx_table; /* make dynamic */ +static struct termios **siolx_termios; +static struct termios **siolx_termios_locked; +static int siolx_driver_registered; +static int siolx_callout_driver_registered; + +#ifdef SIOLX_TIMER +static struct timer_list missed_irq_timer; +static void siolx_interrupt(int irq, void * dev_id, struct pt_regs * regs); +#endif + +extern struct tty_driver *get_tty_driver(kdev_t device); + +static inline int port_No_by_chip (struct siolx_port const * port) +{ + return SIOLX_PORT(port->boardport); +} + +/* Describe the current board and port configuration */ + +static int siolx_read_proc(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + struct siolx_port *port = siolx_port_root; + off_t begin = 0; + int len = 0; + unsigned int typeno; + char *revision = "$Revision: 1.11 $"; + + len += sprintf(page, "SIOLX Version %s. %s\n", VERSION, revision); + len += sprintf(page+len, "TTY MAJOR = %d, CUA MAJOR = %d.\n", + siolx_driver.major, siolx_callout_driver.major); + + for (port = siolx_port_root; port != NULL; port = port->next_by_global_list) + { + typeno = port->board->boardtype; + if(typeno > BD_MAX) + { + typeno = 0; + } + len += sprintf(page+len, + "%3.3d: bd %2.2d: %s: ch %d: pt %2.2d/%d: tp %4.4d%c: bs %2.2d: sl %2.2d: ir %2.2d: fl %c%c%c%c%c\n", + siolx_driver.minor_start + port->driverport, + port->board->boardnumber, + sio16_board_type[typeno], + port->board->chipnumber, + port->boardport, + port_No_by_chip(port), /* port relative to chip */ + port->board->chiptype, + port->board->chiprev, + port->board->pdev.bus->number, + PCI_SLOT(port->board->pdev.devfn), + port->board->irq, + (port->flags & ASYNC_INITIALIZED) ? 'I' : ' ', + (port->flags & ASYNC_CALLOUT_ACTIVE) ? 'D' : ' ', + (port->flags & ASYNC_NORMAL_ACTIVE) ? 'T' : ' ', + (port->flags & ASYNC_CLOSING) ? 'C' : ' ', + port->board->reario ? 'R' : ' '); + if (len+begin > off+count) + { + goto done; + } + if (len+begin < off) + { + begin += len; + len = 0; + } + } + *eof = 1; + done: + if (off >= len+begin) + { + return 0; + } + *start = page + (off-begin); + return ((count < begin+len-off) ? count : begin+len-off); +} + +#ifndef MODULE +static int GetMinorStart(void) /* minor start can be determined on fly when driver linked to kernel */ +{ + struct tty_driver *ttydriver; + int minor_start = 0; + kdev_t device; + + device = MKDEV(siolx_major, minor_start); + while(ttydriver = get_tty_driver(device), ttydriver != NULL) + { + minor_start += ttydriver->num; + device = MKDEV(TTY_MAJOR, minor_start); + } + return minor_start; + +} +#endif + +/* only once per board chain */ +void SiolxResetBoard(struct siolx_board * bp, struct pci_dev *pdev) +{ + register unsigned int regvalue; + unsigned char savedvalue; + /* + * Yuch. Here's the deal with the reset bits in the + * ECNTL register of the 9060SD. + * + * It appears that LCLRST resets the PLX local configuration + * registers (not the PCI configuration registers) to their + * default values. We need to use LCLRST because it + * is the command (I think) that pulls the local reset + * line on the local bus side of the 9060SD. + * + * Unfortunately, by resetting the PLX local configuration + * registers, we can't use the damn board. So we must + * reinitialize them. The easiest way to do that is to run + * the LDREG command. Unfortunately, it has the side effect + * of reinitializing the PCI configuration registers. It seems, + * however that only the value stowed in ILINE gets choked; all + * of the others seem to be properly preserved. + * + * So, what the code does now is to get a copy of ILINE by + * hand, and then restore it after reloading the registers. + */ + + bp->pdev = *pdev; + bp->plx_vaddr = (unsigned long) ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0)); + if(bp->plx_vaddr) + { + regvalue = readl(bp->plx_vaddr + PLX_ECNTL); + regvalue &= ~PLX_ECNTLLDREG; + regvalue |= PLX_ECNTLLCLRST; + writel(regvalue, bp->plx_vaddr + PLX_ECNTL); + udelay(200); + regvalue &= ~PLX_ECNTLLCLRST; + writel(regvalue, bp->plx_vaddr + PLX_ECNTL); + pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &savedvalue); + regvalue |= PLX_ECNTLLDREG; + writel(regvalue, bp->plx_vaddr + PLX_ECNTL); + udelay(200); + regvalue &= ~PLX_ECNTLLDREG; + writel(regvalue, bp->plx_vaddr + PLX_ECNTL); + pci_write_config_byte(pdev, PCI_INTERRUPT_LINE, savedvalue); + regvalue |= PLX_ECNTLINITSTAT; + writel(regvalue, bp->plx_vaddr + PLX_ECNTL); + writel(0, bp->plx_vaddr + PLX_ICSR); + } +} + +void SiolxShutdownBoard(struct siolx_board * bp) +{ + register unsigned int regvalue; + unsigned char savedvalue; + struct pci_dev *pdev; + + if(bp->chipnumber == 0) /* only shutdown first in a chain */ + { + pdev = &bp->pdev; + + writel(0, bp->plx_vaddr + PLX_ICSR); + regvalue = readl(bp->plx_vaddr + PLX_ECNTL); + regvalue &= ~PLX_ECNTLLDREG; + regvalue |= PLX_ECNTLLCLRST; + writel(regvalue, bp->plx_vaddr + PLX_ECNTL); + udelay(200); + regvalue &= ~PLX_ECNTLLCLRST; + writel(regvalue, bp->plx_vaddr + PLX_ECNTL); + pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &savedvalue); + regvalue |= PLX_ECNTLLDREG; + writel(regvalue, bp->plx_vaddr + PLX_ECNTL); + udelay(200); + regvalue &= ~PLX_ECNTLLDREG; + writel(regvalue, bp->plx_vaddr + PLX_ECNTL); + pci_write_config_byte(pdev, PCI_INTERRUPT_LINE, savedvalue); + regvalue |= PLX_ECNTLINITSTAT; + writel(regvalue, bp->plx_vaddr + PLX_ECNTL); + writel(0, bp->plx_vaddr + PLX_ICSR); + iounmap((void*)bp->plx_vaddr); + bp->plx_vaddr = 0; + } +} + +static inline int siolx_paranoia_check(struct siolx_port const * port, + kdev_t device, const char *routine) +{ +#ifdef SIOLX_PARANOIA_CHECK + static const char *badmagic = + KERN_ERR "siolx: Warning: bad siolx port magic number for device %s in %s\n"; + static const char *badinfo = + KERN_ERR "siolx: Warning: null siolx port for device %s in %s\n"; + + if (!port) + { + printk(badinfo, kdevname(device), routine); + return 1; + } + if (port->magic != SIOLX_MAGIC) + { + printk(badmagic, kdevname(device), routine); + return 1; + } +#endif + return 0; +} + + +/* + * + * Service functions for siolx Aurora Asynchronous Adapter driver. + * + */ + +/* Get board number from pointer */ +static inline int board_No (struct siolx_board * bp) +{ + return bp->boardnumber; /* note same for all chips/boards in a chain */ +} + + +/* Get port number from pointer */ +static inline int port_No (struct siolx_port const * port) +{ + return port->driverport; /* offset from minor start */ +} + +/* Get pointer to board from pointer to port */ +static inline struct siolx_board * port_Board(struct siolx_port const * port) +{ + return port->board; /* same for ports on both chips on a board */ +} + + +/* Input Byte from CL CD186x register */ +static inline unsigned char siolx_in(struct siolx_board * bp, unsigned short reg) +{ + return readb (bp->base + reg); +} + + +/* Output Byte to CL CD186x register */ +static inline void siolx_out(struct siolx_board * bp, unsigned short reg, + unsigned char val) +{ + writeb(val, bp->base + reg); +} + + +/* Wait for Channel Command Register ready */ +static int siolx_wait_CCR(struct siolx_board * bp) +{ + unsigned long delay; + + for (delay = SIOLX_CCR_TIMEOUT; delay; delay--) + { + udelay(1); + if (!siolx_in(bp, CD186x_CCR)) + { + return 0; + } + } + printk(KERN_ERR "siolx:board %d: timeout waiting for CCR.\n", board_No(bp)); + return -1; +} + +/* Wait for ready */ +static int siolx_wait_GIVR(struct siolx_board * bp) +{ + unsigned long delay; + + for (delay = SIOLX_CCR_TIMEOUT; delay; delay--) + { + udelay(1); + if (siolx_in(bp, CD186x_GIVR) == (unsigned char) 0xff) + { + return 0; + } + } + printk(KERN_ERR "siolx: board %d: timeout waiting for GIVR.\n", board_No(bp)); + return -1; +} + +static inline void siolx_release_io_range(struct siolx_board * bp) +{ + if((bp->chipnumber == 0) && bp->vaddr) /* only release from first board in a chain */ + { + iounmap((void*)bp->vaddr); + bp->vaddr = 0; + } +} + +/* Must be called with enabled interrupts */ + +static inline void siolx_long_delay(unsigned long delay) +{ + set_current_state(TASK_UNINTERRUPTIBLE); + schedule_timeout(delay); +} + +/* Reset and setup CD186x chip */ +static int siolx_init_CD186x(struct siolx_board * bp) +{ + unsigned long flags; + int scaler; + int rv = 1; + int rev; + int chip; + + save_flags(flags); /* not sure of need to turn off ints */ + cli(); + if(siolx_wait_CCR(bp)) + { + restore_flags(flags); + return 0; /* Wait for CCR ready */ + } + siolx_out(bp, CD186x_CAR, 0); + siolx_out(bp, CD186x_GIVR, 0); + siolx_out(bp, CD186x_CCR, CCR_HARDRESET); /* Reset CD186x chip */ + if(siolx_wait_GIVR(bp)) + { + restore_flags(flags); + return 0; + } + sti(); + siolx_long_delay(HZ/20); /* Delay 0.05 sec */ + cli(); + siolx_out(bp, CD186x_GIVR, SIOLX_ID | (bp->chipnumber ? 0x80 : 0)); /* Set ID for this chip */ +#if 0 + siolx_out(bp, CD186x_GICR, 0); /* Clear all bits */ +#endif + scaler = SIOLX_OSCFREQ/1000; + siolx_out(bp, CD186x_PPRH, scaler >> 8); + siolx_out(bp, CD186x_PPRL, scaler & 0xff); + + /* Chip revcode pkgtype + GFRCR SRCR bit 7 + CD180 rev B 0x81 0 + CD180 rev C 0x82 0 + CD1864 rev A 0x82 1 + CD1865 rev A 0x83 1 -- Do not use!!! Does not work. + CD1865 rev B 0x84 1 + -- Thanks to Gwen Wang, Cirrus Logic. + */ + + switch (siolx_in(bp, CD186x_GFRCR)) + { + case 0x82: + chip = 1864; + rev='A'; + break; + case 0x83: + chip = 1865; + rev='A'; + break; + case 0x84: + chip = 1865; + rev='B'; + break; + case 0x85: + chip = 1865; + rev='C'; + break; /* Does not exist at this time */ + default: + chip=-1; + rev='x'; + break; + } + +#if SIOLX_DEBUG > 2 + printk (KERN_DEBUG " GFCR = 0x%02x\n", siolx_in(bp, CD186x_GFRCR) ); +#endif + + siolx_out(bp, CD186x_MSMR, CD186x_MRAR); /* load up match regs with address regs */ + siolx_out(bp, CD186x_TSMR, CD186x_TRAR); + siolx_out(bp, CD186x_RSMR, CD186x_RRAR); + +#if 0 + DEBUGPRINT((KERN_ALERT "match reg values are msmr %x, tsmr %x, rsmr %x.\n", + siolx_in(bp, CD186x_MSMR), + siolx_in(bp, CD186x_TSMR), + siolx_in(bp, CD186x_RSMR))); +#endif + + siolx_out(bp, CD186x_SRCR, SRCR_AUTOPRI | SRCR_GLOBPRI | SRCR_REGACKEN); + /* Setting up prescaler. We need 4 ticks per 1 ms */ + + printk(KERN_INFO"siolx: CD%4.4d%c detected at 0x%lx, IRQ %d, on Aurora asynchronous adapter board %d, chip number %d.\n", + chip, rev, bp->base, bp->irq, board_No(bp), bp->chipnumber); + + bp->chiptype = chip; + bp->chiprev = rev; + + restore_flags(flags); + return rv; +} + + +#ifdef SIOLX_TIMER +void missed_irq (unsigned long data) +{ + if (siolx_in ((struct siolx_board *)data, CD186x_SRSR) & + (SRSR_RREQint | + SRSR_TREQint | + SRSR_MREQint)) + { + printk (KERN_INFO "Missed interrupt... Calling int from timer. \n"); + siolx_interrupt (((struct siolx_board *)data)->irq, + NULL, NULL); + } + missed_irq_timer.expires = jiffies + HZ; + add_timer (&missed_irq_timer); +} +#endif + +/* Main probing routine, also sets irq. */ +static int siolx_probe(struct siolx_board *bp) +{ + unsigned char val1, val2; + + /* Are the I/O ports here ? */ + siolx_out(bp, CD186x_PPRL, 0x5a); + short_pause (); + val1 = siolx_in(bp, CD186x_PPRL); + + siolx_out(bp, CD186x_PPRL, 0xa5); + short_pause (); + val2 = siolx_in(bp, CD186x_PPRL); + + if ((val1 != 0x5a) || (val2 != 0xa5)) + { + printk(KERN_INFO + "siolx: cd serial chip not found at base %ld.\n", + bp->base); + return 1; + } + + /* Reset CD186x */ + if (!siolx_init_CD186x(bp)) + { + return -EIO; + } + +#ifdef SIOLX_TIMER + init_timer (&missed_irq_timer); + missed_irq_timer.function = missed_irq; + missed_irq_timer.data = (unsigned long) bp; + missed_irq_timer.expires = jiffies + HZ; + add_timer (&missed_irq_timer); +#endif + return 0; +} + +/* + * + * Interrupt processing routines. + * */ + +static inline void siolx_mark_event(struct siolx_port * port, int event) +{ + /* + * I'm not quite happy with current scheme all serial + * drivers use their own BH routine. + * It seems this easily can be done with one BH routine + * serving for all serial drivers. + * For now I must introduce another one - SIOLX_BH. + * Still hope this will be changed in near future. + * -- Dmitry. + */ + /* I use a module parameter that can be set at module + * load time so that this driver can be downloaded into + * a kernel where the value of SIOLX_BX has been allocated + * to something else. This kludge was not necessary + * in the ASLX driver because AURORA_BH had already + * been allocated for the sparc and there was no + * similar driver for x86 while the ASLX driver probably + * will not work for the SPARC and is not guaranteed to + * do so (at some point I should clean this situation up) -- Joachim*/ + set_bit(event, &port->event); + queue_task(&port->tqueue, &tq_siolx); + mark_bh(siolx_bhindex); +} + +static inline struct siolx_port * siolx_get_port(struct siolx_board * bp, + unsigned char const * what) +{ + unsigned char channel; + struct siolx_port * port; + + channel = siolx_in(bp, CD186x_GICR) >> GICR_CHAN_OFF; + if (channel < CD186x_NCH) + { + port = bp->portlist; + while(port) + { + if(channel == 0) + { + break; + } + port = port->next_by_board; + --channel; + } + + if(port && (port->flags & ASYNC_INITIALIZED)) /* port should be opened */ + { + return port; + } + } + printk(KERN_INFO "sx%d: %s interrupt from invalid port %d\n", + board_No(bp), what, channel); + return NULL; +} + + +static inline void siolx_receive_exc(struct siolx_board * bp) +{ + struct siolx_port *port; + struct tty_struct *tty; + unsigned char status; + unsigned char ch; + + if (!(port = siolx_get_port(bp, "Receive"))) + return; + + tty = port->tty; + if (tty->flip.count >= TTY_FLIPBUF_SIZE) + { + printk(KERN_INFO "sx%d: port %d: Working around flip buffer overflow.\n", + board_No(bp), port_No(port)); + return; + } + +#ifdef SIOLX_REPORT_OVERRUN + status = siolx_in(bp, CD186x_RCSR); + if (status & RCSR_OE) + { + port->overrun++; +#if SIOLX_DEBUG + printk(KERN_DEBUG "sx%d: port %d: Overrun. Total %ld overruns.\n", + board_No(bp), port_No(port), port->overrun); +#endif + } + status &= port->mark_mask; +#else + status = siolx_in(bp, CD186x_RCSR) & port->mark_mask; +#endif + ch = siolx_in(bp, CD186x_RDR); + if (!status) + { + return; + } + if (status & RCSR_TOUT) + { + printk(KERN_INFO "siolx: board %d: chip %d: port %d: Receiver timeout. Hardware problems ?\n", + board_No(bp), bp->chipnumber, port_No(port)); + return; + + } + else if (status & RCSR_BREAK) + { +#ifdef SIOLX_DEBUG + printk(KERN_DEBUG "siolx: board %d: chip %d: port %d: Handling break...\n", + board_No(bp), bp->chipnumber, port_No(port)); +#endif + *tty->flip.flag_buf_ptr++ = TTY_BREAK; + if (port->flags & ASYNC_SAK) + { + do_SAK(tty); + } + + } + else if (status & RCSR_PE) + { + *tty->flip.flag_buf_ptr++ = TTY_PARITY; + } + else if (status & RCSR_FE) + { + *tty->flip.flag_buf_ptr++ = TTY_FRAME; + } + + else if (status & RCSR_OE) + { + *tty->flip.flag_buf_ptr++ = TTY_OVERRUN; + } + + else + { + *tty->flip.flag_buf_ptr++ = 0; + } + + *tty->flip.char_buf_ptr++ = ch; + tty->flip.count++; + queue_task(&tty->flip.tqueue, &tq_timer); +} + + +static inline void siolx_receive(struct siolx_board * bp) +{ + struct siolx_port *port; + struct tty_struct *tty; + unsigned char count; + + if (!(port = siolx_get_port(bp, "Receive"))) + return; + + tty = port->tty; + + count = siolx_in(bp, CD186x_RDCR); + +#ifdef SIOLX_REPORT_FIFO + port->hits[count > 8 ? 9 : count]++; +#endif + + while (count--) + { + if (tty->flip.count >= TTY_FLIPBUF_SIZE) + { + printk(KERN_INFO "siolx: board %d: chip %d: port %d: Working around flip buffer overflow.\n", + board_No(bp), bp->chipnumber, port_No(port)); + break; + } + *tty->flip.char_buf_ptr++ = siolx_in(bp, CD186x_RDR); + *tty->flip.flag_buf_ptr++ = 0; + tty->flip.count++; + } + queue_task(&tty->flip.tqueue, &tq_timer); +} + +static inline void siolx_transmit(struct siolx_board * bp) +{ + struct siolx_port *port; + struct tty_struct *tty; + unsigned char count; + + if (!(port = siolx_get_port(bp, "Transmit"))) + return; + + tty = port->tty; + + if(port->IER & IER_TXEMPTY) + { + /* FIFO drained */ +#if 0 + siolx_out(bp, CD186x_CAR, port_No_by_chip(port)); +#endif + port->IER &= ~IER_TXEMPTY; + siolx_out(bp, CD186x_IER, port->IER); + return; + } + + if(((port->xmit_cnt <= 0) && !port->break_length) || + tty->stopped || tty->hw_stopped) + { +#if 0 + siolx_out(bp, CD186x_CAR, port_No_by_chip(port)); +#endif + port->IER &= ~IER_TXRDY; + siolx_out(bp, CD186x_IER, port->IER); + return; + } + + if (port->break_length) + { + if (port->break_length > 0) + { + if (port->COR2 & COR2_ETC) + { + siolx_out(bp, CD186x_TDR, CD186x_C_ESC); + siolx_out(bp, CD186x_TDR, CD186x_C_SBRK); + port->COR2 &= ~COR2_ETC; + } + count = MIN(port->break_length, 0xff); + siolx_out(bp, CD186x_TDR, CD186x_C_ESC); + siolx_out(bp, CD186x_TDR, CD186x_C_DELAY); + siolx_out(bp, CD186x_TDR, count); + if (!(port->break_length -= count)) + { + port->break_length--; + } + } + else + { + siolx_out(bp, CD186x_TDR, CD186x_C_ESC); + siolx_out(bp, CD186x_TDR, CD186x_C_EBRK); + siolx_out(bp, CD186x_COR2, port->COR2); + siolx_wait_CCR(bp); + siolx_out(bp, CD186x_CCR, CCR_CORCHG2); + port->break_length = 0; + } + return; + } + + count = CD186x_NFIFO; + do + { + siolx_out(bp, CD186x_TDR, port->xmit_buf[port->xmit_tail++]); + port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE-1); + if (--port->xmit_cnt <= 0) + { + break; + } + } while (--count > 0); + + if (port->xmit_cnt <= 0) + { +#if 0 + siolx_out(bp, CD186x_CAR, port_No_by_chip(port)); +#endif + port->IER &= ~IER_TXRDY; + siolx_out(bp, CD186x_IER, port->IER); + } + if (port->xmit_cnt <= port->wakeup_chars) + { + siolx_mark_event(port, RS_EVENT_WRITE_WAKEUP); + } +} + + +static inline void siolx_check_modem(struct siolx_board * bp) +{ + struct siolx_port *port; + struct tty_struct *tty; + unsigned char mcr; + +#ifdef SIOLX_DEBUG + printk (KERN_DEBUG "Modem intr. "); +#endif + if (!(port = siolx_get_port(bp, "Modem"))) + { + return; + } + + tty = port->tty; + + mcr = siolx_in(bp, CD186x_MCR); + DEBUGPRINT((KERN_ALERT "mcr = %02x.\n", mcr)); + + if ((mcr & MCR_CDCHG)) + { +#ifdef SIOLX_DEBUG + DEBUGPRINT((KERN_DEBUG "CD just changed... ")); +#endif + if (siolx_in(bp, CD186x_MSVR) & MSVR_CD) + { +#ifdef SIOLX_DEBUG + DEBUGPRINT(( "Waking up guys in open.\n")); +#endif + wake_up_interruptible(&port->open_wait); /* note no linefeed in previous print */ + } + else if (!((port->flags & ASYNC_CALLOUT_ACTIVE) && + (port->flags & ASYNC_CALLOUT_NOHUP))) + { +#ifdef SIOLX_DEBUG + DEBUGPRINT(( "Sending HUP.\n")); /* note no linefeed in previous print */ +#endif + MOD_INC_USE_COUNT; + if (schedule_task(&port->tqueue_hangup) == 0) + { + MOD_DEC_USE_COUNT; + } + } + else + { +#ifdef SIOLX_DEBUG + DEBUGPRINT(("Don't need to send HUP.\n")); /* note no linefeed in previous print */ +#endif + } + } + +#ifdef SIOLX_BRAIN_DAMAGED_CTS + if (mcr & MCR_CTSCHG) + { + if (siolx_in(bp, CD186x_MSVR) & MSVR_CTS) + { + tty->hw_stopped = 0; + port->IER |= IER_TXRDY; + if (port->xmit_cnt <= port->wakeup_chars) + siolx_mark_event(port, RS_EVENT_WRITE_WAKEUP); + } + else + { + tty->hw_stopped = 1; + port->IER &= ~IER_TXRDY; + } + siolx_out(bp, CD186x_IER, port->IER); + } + if (mcr & MCR_DSSXHG) + { + if (siolx_in(bp, CD186x_MSVR) & MSVR_DSR) + { + tty->hw_stopped = 0; + port->IER |= IER_TXRDY; + if (port->xmit_cnt <= port->wakeup_chars) + { + siolx_mark_event(port, RS_EVENT_WRITE_WAKEUP); + } + } + else + { + tty->hw_stopped = 1; + port->IER &= ~IER_TXRDY; + } + siolx_out(bp, CD186x_IER, port->IER); + } +#endif /* SIOLX_BRAIN_DAMAGED_CTS */ + + /* Clear change bits */ + siolx_out(bp, CD186x_MCR, 0); +} + +/* The main interrupt processing routine */ +static void siolx_interrupt(int irq, void * dev_id, struct pt_regs * regs) +{ + unsigned char status; + unsigned char rcsr; + struct siolx_board *bp; + + if((irq < 0) || (irq >= SIOLX_NUMINTS)) + { + printk(KERN_ALERT "siolx: bad interrupt value %i.\n", irq); + return; + } + /* walk through all the cards on the interrupt that occurred. */ + for(bp = SiolxIrqRoot[irq]; bp != NULL; bp = bp->next_by_interrupt) + + { + while((readl(bp->intstatus) & PLX_ICSRINTACTIVE) != 0) /* work on on board */ + { + status = siolx_in(bp, CD186x_SRSR); + + if(status & SRSR_RREQint) + { + siolx_in(bp, CD186x_RRAR); + rcsr = siolx_in(bp, CD186x_RCSR); + if(rcsr == 0) + { + siolx_receive(bp); + } + else + { + siolx_receive_exc(bp); + } + } + else if (status & SRSR_TREQint) + { + siolx_in(bp, CD186x_TRAR); + siolx_transmit(bp); + } + else if (status & SRSR_MREQint) + { + siolx_in(bp, CD186x_MRAR); + siolx_check_modem(bp); + } + siolx_out(bp, CD186x_EOIR, 1); /* acknowledge the interrupt */ + bp = bp->next_by_chain; /* go to next chip on card -- maybe this one */ + } /* it does not matter if bp changes all in a chain have same next by interrupt */ + } +} + + +/* + * Setting up port characteristics. + * Must be called with disabled interrupts + */ +static void siolx_change_speed(struct siolx_board *bp, struct siolx_port *port) +{ + struct tty_struct *tty; + unsigned long baud; + long tmp; + unsigned char cor1 = 0, cor3 = 0; + unsigned char mcor1 = 0, mcor2 = 0; + static int again; + + tty = port->tty; + + if(!tty || !tty->termios) + { + return; + } + + port->IER = 0; + port->COR2 = 0; + /* Select port on the board */ + siolx_out(bp, CD186x_CAR, port_No_by_chip(port)); + + /* The Siolx board doens't implement the RTS lines. + They are used to set the IRQ level. Don't touch them. */ + /* Must check how to apply these to sio16 boards */ + if (SIOLX_CRTSCTS(tty)) + { + port->MSVR = (MSVR_DTR | (siolx_in(bp, CD186x_MSVR) & MSVR_RTS)); + } + else + { + port->MSVR = (siolx_in(bp, CD186x_MSVR) & MSVR_RTS); + } +#ifdef DEBUG_SIOLX + DEBUGPRINT((KERN_DEBUG "siolx: got MSVR=%02x.\n", port->MSVR)); +#endif + baud = C_BAUD(tty); + + if (baud & CBAUDEX) + { + baud &= ~CBAUDEX; + if((baud < 1) || (baud > 2)) + { + port->tty->termios->c_cflag &= ~CBAUDEX; + } + else + { + baud += 15; + } + } + if (baud == 15) + { + if ((port->flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI) + { + baud ++; + } + if ((port->flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI) + { + baud += 2; + } + } + + + if (!baud_table[baud]) + { + /* Drop DTR & exit */ +#ifdef SIOLX_DEBUG + DEBUGPRINT((KERN_DEBUG "siolx: Dropping DTR... Hmm....\n")); +#endif + if (!SIOLX_CRTSCTS (tty)) + { + port->MSVR &= ~ MSVR_DTR; + siolx_out(bp, CD186x_MSVR, port->MSVR ); + } +#ifdef DEBUG_SIOLX + else + { + DEBUGPRINT((KERN_DEBUG "siolx: Can't drop DTR: no DTR.\n")); + } +#endif + return; + } + else + { + /* Set DTR on */ + if (!SIOLX_CRTSCTS (tty)) + { + port ->MSVR |= MSVR_DTR; + } + } + + /* + * Now we must calculate some speed depended things + */ + + /* Set baud rate for port */ + tmp = port->custom_divisor ; + if(tmp) + { + DEBUGPRINT((KERN_INFO "siolx: board %d: chip %d: port %d: Using custom baud rate divisor %ld. \n" + "This is an untested option, please be carefull.\n", + board_No(bp), + bp->chipnumber, + port_No(port), tmp)); + } + else + { + tmp = (((SIOLX_OSCFREQ + baud_table[baud]/2) / baud_table[baud] + + CD186x_TPC/2) / CD186x_TPC); + } + + if ((tmp < 0x10) && time_before(again, jiffies)) + { + again = jiffies + HZ * 60; + /* Page 48 of version 2.0 of the CL-CD1865 databook */ + if (tmp >= 12) + { + DEBUGPRINT((KERN_INFO "siolx: board %d: chip %d: port %d:Baud rate divisor is %ld. \n" + "Performance degradation is possible.\n" + "Read siolx.txt for more info.\n", + board_No(bp), bp->chipnumber, + port_No (port), tmp)); + } else + { + DEBUGPRINT((KERN_INFO "siolx: board %d: chip %d: port %d: Baud rate divisor is %ld. \n" + " Warning: overstressing Cirrus chip. " + " This might not work.\n" + " Read siolx.txt for more info.\n", + board_No(bp), bp->chipnumber, port_No (port), tmp)); + } + } + + siolx_out(bp, CD186x_RBPRH, (tmp >> 8) & 0xff); + siolx_out(bp, CD186x_TBPRH, (tmp >> 8) & 0xff); + siolx_out(bp, CD186x_RBPRL, tmp & 0xff); + siolx_out(bp, CD186x_TBPRL, tmp & 0xff); + + if (port->custom_divisor) + { + baud = (SIOLX_OSCFREQ + port->custom_divisor/2) / port->custom_divisor; + baud = ( baud + 5 ) / 10; + } else + { + baud = (baud_table[baud] + 5) / 10; /* Estimated CPS */ + } + + /* Two timer ticks seems enough to wakeup something like SLIP driver */ + tmp = ((baud + HZ/2) / HZ) * 2 - CD186x_NFIFO; + port->wakeup_chars = (tmp < 0) ? 0 : ((tmp >= SERIAL_XMIT_SIZE) ? + SERIAL_XMIT_SIZE - 1 : tmp); + + /* Receiver timeout will be transmission time for 1.5 chars */ + tmp = (SIOLX_TPS + SIOLX_TPS/2 + baud/2) / baud; + tmp = (tmp > 0xff) ? 0xff : tmp; + siolx_out(bp, CD186x_RTPR, tmp); + + switch (C_CSIZE(tty)) + { + case CS5: + cor1 |= COR1_5BITS; + break; + case CS6: + cor1 |= COR1_6BITS; + break; + case CS7: + cor1 |= COR1_7BITS; + break; + case CS8: + cor1 |= COR1_8BITS; + break; + } + + if (C_CSTOPB(tty)) + { + cor1 |= COR1_2SB; + } + + cor1 |= COR1_IGNORE; + if (C_PARENB(tty)) + { + cor1 |= COR1_NORMPAR; + if (C_PARODD(tty)) + { + cor1 |= COR1_ODDP; + } + if (I_INPCK(tty)) + { + cor1 &= ~COR1_IGNORE; + } + } + /* Set marking of some errors */ + port->mark_mask = RCSR_OE | RCSR_TOUT; + if (I_INPCK(tty)) + { + port->mark_mask |= RCSR_FE | RCSR_PE; + } + if (I_BRKINT(tty) || I_PARMRK(tty)) + { + port->mark_mask |= RCSR_BREAK; + } + if (I_IGNPAR(tty)) + { + port->mark_mask &= ~(RCSR_FE | RCSR_PE); + } + if (I_IGNBRK(tty)) + { + port->mark_mask &= ~RCSR_BREAK; + if (I_IGNPAR(tty)) + { + /* Real raw mode. Ignore all */ + port->mark_mask &= ~RCSR_OE; + } + } + /* Enable Hardware Flow Control */ + if (C_CRTSCTS(tty)) + { +#ifdef SIOLX_BRAIN_DAMAGED_CTS + port->IER |= IER_DSR | IER_CTS; + mcor1 |= MCOR1_DSRZD | MCOR1_CTSZD; + mcor2 |= MCOR2_DSROD | MCOR2_CTSOD; + tty->hw_stopped = !(siolx_in(bp, CD186x_MSVR) & (MSVR_CTS|MSVR_DSR)); +#else + port->COR2 |= COR2_CTSAE; +#endif + } + /* Enable Software Flow Control. FIXME: I'm not sure about this */ + /* Some people reported that it works, but I still doubt it */ + if (I_IXON(tty)) + { + port->COR2 |= COR2_TXIBE; + cor3 |= (COR3_FCT | COR3_SCDE); + if (I_IXANY(tty)) + { + port->COR2 |= COR2_IXM; + } + siolx_out(bp, CD186x_SCHR1, START_CHAR(tty)); + siolx_out(bp, CD186x_SCHR2, STOP_CHAR(tty)); + siolx_out(bp, CD186x_SCHR3, START_CHAR(tty)); + siolx_out(bp, CD186x_SCHR4, STOP_CHAR(tty)); + } + if (!C_CLOCAL(tty)) + { + /* Enable CD check */ + port->IER |= IER_CD; + mcor1 |= MCOR1_CDZD; + mcor2 |= MCOR2_CDOD; + } + + if (C_CREAD(tty)) + { + /* Enable receiver */ + port->IER |= IER_RXD; + } + + /* Set input FIFO size (1-8 bytes) */ + cor3 |= SIOLX_RXFIFO; + /* Setting up CD186x channel registers */ + siolx_out(bp, CD186x_COR1, cor1); + siolx_out(bp, CD186x_COR2, port->COR2); + siolx_out(bp, CD186x_COR3, cor3); + /* Make CD186x know about registers change */ + siolx_wait_CCR(bp); + siolx_out(bp, CD186x_CCR, CCR_CORCHG1 | CCR_CORCHG2 | CCR_CORCHG3); + /* Setting up modem option registers */ +#ifdef DEBUG_SIOLX + DEBUGPRINT((KERN_ALERT "siolx: Mcor1 = %02x, mcor2 = %02x.\n", mcor1, mcor2)); +#endif + siolx_out(bp, CD186x_MCOR1, mcor1); + siolx_out(bp, CD186x_MCOR2, mcor2); + /* Enable CD186x transmitter & receiver */ + siolx_wait_CCR(bp); + siolx_out(bp, CD186x_CCR, CCR_TXEN | CCR_RXEN); + /* Enable interrupts */ + siolx_out(bp, CD186x_IER, port->IER); + /* And finally set the modem lines... */ + siolx_out(bp, CD186x_MSVR, port->MSVR); +} + + +/* Must be called with interrupts enabled */ +static int siolx_setup_port(struct siolx_board *bp, struct siolx_port *port) +{ + unsigned long flags; + + if (port->flags & ASYNC_INITIALIZED) + { + return 0; + } + + if (!port->xmit_buf) + { + /* We may sleep in get_free_page() */ + unsigned long tmp; + + if (!(tmp = get_free_page(GFP_KERNEL))) + { + return -ENOMEM; + } + + if (port->xmit_buf) + { + free_page(tmp); + return -ERESTARTSYS; + } + port->xmit_buf = (unsigned char *) tmp; + } + + save_flags(flags); cli(); + + if (port->tty) + { + clear_bit(TTY_IO_ERROR, &port->tty->flags); + } + + port->xmit_cnt = port->xmit_head = port->xmit_tail = 0; + siolx_change_speed(bp, port); + port->flags |= ASYNC_INITIALIZED; + + restore_flags(flags); + return 0; +} + + +/* Must be called with interrupts disabled */ +static void siolx_shutdown_port(struct siolx_board *bp, struct siolx_port *port) +{ + struct tty_struct *tty; + + if (!(port->flags & ASYNC_INITIALIZED)) + { + return; + } + +#ifdef SIOLX_REPORT_OVERRUN + DEBUGPRINT((KERN_INFO "siolx: board %d: chip %d: port %d: Total %ld overruns were detected.\n", + board_No(bp), bp->chipnumber, port_No(port), port->overrun)); +#endif +#ifdef SIOLX_REPORT_FIFO + { + int i; + + DEBUGPRINT((KERN_INFO "siolx: board %d: chip %d: port %d: FIFO hits [ ", + board_No(bp), bp->chipnumber, port_No(port))); + for (i = 0; i < 10; i++) + { + DEBUGPRINT(("%ld ", port->hits[i])); + } + DEBUGPRINT(("].\n")); + } +#endif + if (port->xmit_buf) + { + free_page((unsigned long) port->xmit_buf); + port->xmit_buf = NULL; + } + + /* Select port */ + siolx_out(bp, CD186x_CAR, port_No_by_chip(port)); + + if (!(tty = port->tty) || C_HUPCL(tty)) + { + /* Drop DTR */ + siolx_out(bp, CD186x_MSVDTR, 0); + } + + /* Reset port */ + siolx_wait_CCR(bp); + siolx_out(bp, CD186x_CCR, CCR_SOFTRESET); + /* Disable all interrupts from this port */ + port->IER = 0; + siolx_out(bp, CD186x_IER, port->IER); + + if (tty) + { + set_bit(TTY_IO_ERROR, &tty->flags); + } + port->flags &= ~ASYNC_INITIALIZED; + + /* + * If this is the last opened port on the board + * shutdown whole board + */ + MOD_DEC_USE_COUNT; +} + + +static int block_til_ready(struct tty_struct *tty, struct file * filp, + struct siolx_port *port) +{ + DECLARE_WAITQUEUE(wait, current); + struct siolx_board *bp = port_Board(port); + int retval; + int do_clocal = 0; + int CD; + + /* + * If the device is in the middle of being closed, then block + * until it's done, and then try again. + */ + if (tty_hung_up_p(filp) || port->flags & ASYNC_CLOSING) + { + interruptible_sleep_on(&port->close_wait); + if (port->flags & ASYNC_HUP_NOTIFY) + { + return -EAGAIN; + } + else + { + return -ERESTARTSYS; + } + } + + /* + * If this is a callout device, then just make sure the normal + * device isn't being used. + */ + if (tty->driver.subtype == SIOLX_TYPE_CALLOUT) + { + if (port->flags & ASYNC_NORMAL_ACTIVE) + { + return -EBUSY; + } + if ((port->flags & ASYNC_CALLOUT_ACTIVE) && + (port->flags & ASYNC_SESSION_LOCKOUT) && + (port->session != current->session)) + { + return -EBUSY; + } + if ((port->flags & ASYNC_CALLOUT_ACTIVE) && + (port->flags & ASYNC_PGRP_LOCKOUT) && + (port->pgrp != current->pgrp)) + { + return -EBUSY; + } + port->flags |= ASYNC_CALLOUT_ACTIVE; + return 0; + } + + /* + * If non-blocking mode is set, or the port is not enabled, + * then make the check up front and then exit. + */ + if ((filp->f_flags & O_NONBLOCK) || + (tty->flags & (1 << TTY_IO_ERROR))) + { + if (port->flags & ASYNC_CALLOUT_ACTIVE) + { + return -EBUSY; + } + port->flags |= ASYNC_NORMAL_ACTIVE; + return 0; + } + + if (port->flags & ASYNC_CALLOUT_ACTIVE) + { + if (port->normal_termios.c_cflag & CLOCAL) + { + do_clocal = 1; + } + } + else + { + if (C_CLOCAL(tty)) + { + do_clocal = 1; + } + } + + /* + * Block waiting for the carrier detect and the line to become + * free (i.e., not in use by the callout). While we are in + * this loop, info->count is dropped by one, so that + * rs_close() knows when to free things. We restore it upon + * exit, either normal or abnormal. + */ + retval = 0; + add_wait_queue(&port->open_wait, &wait); + cli(); + if (!tty_hung_up_p(filp)) + { + port->count--; + } + sti(); + port->blocked_open++; + while (1) + { + cli(); + siolx_out(bp, CD186x_CAR, port_No_by_chip(port)); + CD = siolx_in(bp, CD186x_MSVR) & MSVR_CD; + if (!(port->flags & ASYNC_CALLOUT_ACTIVE)) + { + if (SIOLX_CRTSCTS (tty)) + { + /* Activate RTS */ + port->MSVR |= MSVR_DTR; + siolx_out (bp, CD186x_MSVR, port->MSVR); + } + else + { + /* Activate DTR */ + port->MSVR |= MSVR_DTR; + siolx_out (bp, CD186x_MSVR, port->MSVR); + } + } + sti(); + set_current_state(TASK_INTERRUPTIBLE); + if (tty_hung_up_p(filp) || !(port->flags & ASYNC_INITIALIZED)) + { + if (port->flags & ASYNC_HUP_NOTIFY) + { + retval = -EAGAIN; + } + else + { + retval = -ERESTARTSYS; + } + break; + } + if (!(port->flags & ASYNC_CALLOUT_ACTIVE) && + !(port->flags & ASYNC_CLOSING) && + (do_clocal || CD)) + { + break; + } + if (signal_pending(current)) + { + retval = -ERESTARTSYS; + break; + } + schedule(); + } + current->state = TASK_RUNNING; + remove_wait_queue(&port->open_wait, &wait); + if (!tty_hung_up_p(filp)) + { + port->count++; + } + port->blocked_open--; + if (retval) + { + return retval; + } + + port->flags |= ASYNC_NORMAL_ACTIVE; + return 0; +} + +static inline struct siolx_port *siolx_portstruc(register int line) +{ + register struct siolx_port *pp; + + line -= siolx_driver.minor_start; + for(pp = siolx_port_root; (pp != NULL) && (line >= 0); --line, pp = pp->next_by_global_list) + { + if(line == 0) + { + return pp; + } + } + return NULL; +} + + +static int siolx_open(struct tty_struct * tty, struct file * filp) +{ + int error; + struct siolx_port * port; + struct siolx_board * bp; + unsigned long flags; + + port = siolx_portstruc(MINOR(tty->device)); + + if(port == NULL) + { + return -ENODEV; + } + bp = port->board; + if(bp == NULL) + { + return -ENODEV; + } + +#ifdef DEBUG_SIOLX + printk (KERN_DEBUG "Board = %d, bp = %p, port = %p, portno = %d.\n", + bp->boardnumber, bp, port, siolx_portstruc(MINOR(tty->device))); +#endif + + if (siolx_paranoia_check(port, tty->device, "siolx_open")) + return -ENODEV; + + MOD_INC_USE_COUNT; + + port->count++; + tty->driver_data = port; + port->tty = tty; + + if ((error = siolx_setup_port(bp, port))) + return error; + + if ((error = block_til_ready(tty, filp, port))) + return error; + + if ((port->count == 1) && (port->flags & ASYNC_SPLIT_TERMIOS)) { + if (tty->driver.subtype == SIOLX_TYPE_NORMAL) + *tty->termios = port->normal_termios; + else + *tty->termios = port->callout_termios; + save_flags(flags); cli(); + siolx_change_speed(bp, port); + restore_flags(flags); + } + + port->session = current->session; + port->pgrp = current->pgrp; + return 0; +} + + +static void siolx_close(struct tty_struct * tty, struct file * filp) +{ + struct siolx_port *port = (struct siolx_port *) tty->driver_data; + struct siolx_board *bp; + unsigned long flags; + unsigned long timeout; + + if (!port || siolx_paranoia_check(port, tty->device, "close")) + return; + + save_flags(flags); cli(); + if (tty_hung_up_p(filp)) { + restore_flags(flags); + return; + } + + bp = port_Board(port); + if ((atomic_read(&tty->count) == 1) && (port->count != 1)) { + printk(KERN_ERR "sx%d: siolx_close: bad port count;" + " tty->count is 1, port count is %d\n", + board_No(bp), port->count); + port->count = 1; + } + if (--port->count < 0) { + printk(KERN_ERR "sx%d: siolx_close: bad port count for tty%d: %d\n", + board_No(bp), port_No(port), port->count); + port->count = 0; + } + if (port->count) { + restore_flags(flags); + return; + } + port->flags |= ASYNC_CLOSING; + /* + * Save the termios structure, since this port may have + * separate termios for callout and dialin. + */ + if (port->flags & ASYNC_NORMAL_ACTIVE) + port->normal_termios = *tty->termios; + if (port->flags & ASYNC_CALLOUT_ACTIVE) + port->callout_termios = *tty->termios; + /* + * Now we wait for the transmit buffer to clear; and we notify + * the line discipline to only process XON/XOFF characters. + */ + tty->closing = 1; + if (port->closing_wait != ASYNC_CLOSING_WAIT_NONE) + tty_wait_until_sent(tty, port->closing_wait); + /* + * At this point we stop accepting input. To do this, we + * disable the receive line status interrupts, and tell the + * interrupt driver to stop checking the data ready bit in the + * line status register. + */ + port->IER &= ~IER_RXD; + if (port->flags & ASYNC_INITIALIZED) { + port->IER &= ~IER_TXRDY; + port->IER |= IER_TXEMPTY; + siolx_out(bp, CD186x_CAR, port_No_by_chip(port)); + siolx_out(bp, CD186x_IER, port->IER); + /* + * Before we drop DTR, make sure the UART transmitter + * has completely drained; this is especially + * important if there is a transmit FIFO! + */ + timeout = jiffies+HZ; + while(port->IER & IER_TXEMPTY) { + current->state = TASK_INTERRUPTIBLE; + schedule_timeout(port->timeout); + if (time_after(jiffies, timeout)) { + printk (KERN_INFO "siolx: Timeout waiting for close\n"); + break; + } + } + + } + siolx_shutdown_port(bp, port); + if (tty->driver.flush_buffer) + tty->driver.flush_buffer(tty); + if (tty->ldisc.flush_buffer) + tty->ldisc.flush_buffer(tty); + tty->closing = 0; + port->event = 0; + port->tty = 0; + if (port->blocked_open) { + if (port->close_delay) { + current->state = TASK_INTERRUPTIBLE; + schedule_timeout(port->close_delay); + } + wake_up_interruptible(&port->open_wait); + } + port->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CALLOUT_ACTIVE| + ASYNC_CLOSING); + wake_up_interruptible(&port->close_wait); + restore_flags(flags); +} + + +static int siolx_write(struct tty_struct * tty, int from_user, + const unsigned char *buf, int count) +{ + struct siolx_port *port = (struct siolx_port *)tty->driver_data; + struct siolx_board *bp; + int c, total = 0; + unsigned long flags; + + if (siolx_paranoia_check(port, tty->device, "siolx_write")) + return 0; + + bp = port_Board(port); + + if (!tty || !port->xmit_buf || !tmp_buf) + return 0; + + save_flags(flags); + if (from_user) { + down(&tmp_buf_sem); + while (1) { + c = MIN(count, MIN(SERIAL_XMIT_SIZE - port->xmit_cnt - 1, + SERIAL_XMIT_SIZE - port->xmit_head)); + if (c <= 0) + break; + + c -= copy_from_user(tmp_buf, buf, c); + if (!c) { + if (!total) + total = -EFAULT; + break; + } + + cli(); + c = MIN(c, MIN(SERIAL_XMIT_SIZE - port->xmit_cnt - 1, + SERIAL_XMIT_SIZE - port->xmit_head)); + memcpy(port->xmit_buf + port->xmit_head, tmp_buf, c); + port->xmit_head = (port->xmit_head + c) & (SERIAL_XMIT_SIZE-1); + port->xmit_cnt += c; + restore_flags(flags); + + buf += c; + count -= c; + total += c; + } + up(&tmp_buf_sem); + } else { + while (1) { + cli(); + c = MIN(count, MIN(SERIAL_XMIT_SIZE - port->xmit_cnt - 1, + SERIAL_XMIT_SIZE - port->xmit_head)); + if (c <= 0) { + restore_flags(flags); + break; + } + memcpy(port->xmit_buf + port->xmit_head, buf, c); + port->xmit_head = (port->xmit_head + c) & (SERIAL_XMIT_SIZE-1); + port->xmit_cnt += c; + restore_flags(flags); + + buf += c; + count -= c; + total += c; + } + } + + cli(); + if (port->xmit_cnt && !tty->stopped && !tty->hw_stopped && + !(port->IER & IER_TXRDY)) { + port->IER |= IER_TXRDY; + siolx_out(bp, CD186x_CAR, port_No_by_chip(port)); + siolx_out(bp, CD186x_IER, port->IER); + } + restore_flags(flags); + return total; +} + + +static void siolx_put_char(struct tty_struct * tty, unsigned char ch) +{ + struct siolx_port *port = (struct siolx_port *)tty->driver_data; + unsigned long flags; + + if (siolx_paranoia_check(port, tty->device, "siolx_put_char")) + return; + + if (!tty || !port->xmit_buf) + return; + + save_flags(flags); cli(); + + if (port->xmit_cnt >= SERIAL_XMIT_SIZE - 1) { + restore_flags(flags); + return; + } + + port->xmit_buf[port->xmit_head++] = ch; + port->xmit_head &= SERIAL_XMIT_SIZE - 1; + port->xmit_cnt++; + restore_flags(flags); +} + + +static void siolx_flush_chars(struct tty_struct * tty) +{ + struct siolx_port *port = (struct siolx_port *)tty->driver_data; + unsigned long flags; + + if (siolx_paranoia_check(port, tty->device, "siolx_flush_chars")) + return; + + if (port->xmit_cnt <= 0 || tty->stopped || tty->hw_stopped || + !port->xmit_buf) + return; + + save_flags(flags); cli(); + port->IER |= IER_TXRDY; + siolx_out(port_Board(port), CD186x_CAR, port_No_by_chip(port)); + siolx_out(port_Board(port), CD186x_IER, port->IER); + restore_flags(flags); +} + + +static int siolx_write_room(struct tty_struct * tty) +{ + struct siolx_port *port = (struct siolx_port *)tty->driver_data; + int ret; + + if (siolx_paranoia_check(port, tty->device, "siolx_write_room")) + return 0; + + ret = SERIAL_XMIT_SIZE - port->xmit_cnt - 1; + if (ret < 0) + ret = 0; + return ret; +} + + +static int siolx_chars_in_buffer(struct tty_struct *tty) +{ + struct siolx_port *port = (struct siolx_port *)tty->driver_data; + + if (siolx_paranoia_check(port, tty->device, "siolx_chars_in_buffer")) + return 0; + + return port->xmit_cnt; +} + + +static void siolx_flush_buffer(struct tty_struct *tty) +{ + struct siolx_port *port = (struct siolx_port *)tty->driver_data; + unsigned long flags; + + if (siolx_paranoia_check(port, tty->device, "siolx_flush_buffer")) + return; + + save_flags(flags); cli(); + port->xmit_cnt = port->xmit_head = port->xmit_tail = 0; + restore_flags(flags); + + wake_up_interruptible(&tty->write_wait); + if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) && + tty->ldisc.write_wakeup) + (tty->ldisc.write_wakeup)(tty); +} + + +static int siolx_get_modem_info(struct siolx_port * port, unsigned int *value) +{ + struct siolx_board * bp; + unsigned char status; + unsigned int result; + unsigned long flags; + + bp = port_Board(port); + save_flags(flags); cli(); + siolx_out(bp, CD186x_CAR, port_No_by_chip(port)); + status = siolx_in(bp, CD186x_MSVR); + restore_flags(flags); +#ifdef DEBUG_SIOLX + printk (KERN_DEBUG "Got msvr[%d] = %02x, car = %d.\n", + port_No(port), status, siolx_in (bp, CD186x_CAR)); + printk (KERN_DEBUG "siolx_port = %p, port = %p\n", siolx_port, port); +#endif + if (SIOLX_CRTSCTS(port->tty)) { + result = /* (status & MSVR_RTS) ? */ TIOCM_DTR /* : 0) */ + | ((status & MSVR_DTR) ? TIOCM_RTS : 0) + | ((status & MSVR_CD) ? TIOCM_CAR : 0) + |/* ((status & MSVR_DSR) ? */ TIOCM_DSR /* : 0) */ + | ((status & MSVR_CTS) ? TIOCM_CTS : 0); + } else { + result = /* (status & MSVR_RTS) ? */ TIOCM_RTS /* : 0) */ + | ((status & MSVR_DTR) ? TIOCM_DTR : 0) + | ((status & MSVR_CD) ? TIOCM_CAR : 0) + |/* ((status & MSVR_DSR) ? */ TIOCM_DSR /* : 0) */ + | ((status & MSVR_CTS) ? TIOCM_CTS : 0); + } + put_user(result,(unsigned int *) value); + return 0; +} + + +static int siolx_set_modem_info(struct siolx_port * port, unsigned int cmd, + unsigned int *value) +{ + int error; + unsigned int arg; + unsigned long flags; + struct siolx_board *bp = port_Board(port); + + error = verify_area(VERIFY_READ, value, sizeof(int)); + if (error) + return error; + + get_user(arg, (unsigned long *) value); + switch (cmd) { + case TIOCMBIS: + /* if (arg & TIOCM_RTS) + port->MSVR |= MSVR_RTS; */ + /* if (arg & TIOCM_DTR) + port->MSVR |= MSVR_DTR; */ + + if (SIOLX_CRTSCTS(port->tty)) { + if (arg & TIOCM_RTS) + port->MSVR |= MSVR_DTR; + } else { + if (arg & TIOCM_DTR) + port->MSVR |= MSVR_DTR; + } + break; + case TIOCMBIC: + /* if (arg & TIOCM_RTS) + port->MSVR &= ~MSVR_RTS; */ + /* if (arg & TIOCM_DTR) + port->MSVR &= ~MSVR_DTR; */ + if (SIOLX_CRTSCTS(port->tty)) { + if (arg & TIOCM_RTS) + port->MSVR &= ~MSVR_DTR; + } else { + if (arg & TIOCM_DTR) + port->MSVR &= ~MSVR_DTR; + } + break; + case TIOCMSET: + /* port->MSVR = (arg & TIOCM_RTS) ? (port->MSVR | MSVR_RTS) : + (port->MSVR & ~MSVR_RTS); */ + /* port->MSVR = (arg & TIOCM_DTR) ? (port->MSVR | MSVR_DTR) : + (port->MSVR & ~MSVR_DTR); */ + if (SIOLX_CRTSCTS(port->tty)) { + port->MSVR = (arg & TIOCM_RTS) ? + (port->MSVR | MSVR_DTR) : + (port->MSVR & ~MSVR_DTR); + } else { + port->MSVR = (arg & TIOCM_DTR) ? + (port->MSVR | MSVR_DTR): + (port->MSVR & ~MSVR_DTR); + } + break; + default: + return -EINVAL; + } + save_flags(flags); cli(); + siolx_out(bp, CD186x_CAR, port_No_by_chip(port)); + siolx_out(bp, CD186x_MSVR, port->MSVR); + restore_flags(flags); + return 0; +} + + +static inline void siolx_send_break(struct siolx_port * port, unsigned long length) +{ + struct siolx_board *bp = port_Board(port); + unsigned long flags; + + save_flags(flags); cli(); + port->break_length = SIOLX_TPS / HZ * length; + port->COR2 |= COR2_ETC; + port->IER |= IER_TXRDY; + siolx_out(bp, CD186x_CAR, port_No_by_chip(port)); + siolx_out(bp, CD186x_COR2, port->COR2); + siolx_out(bp, CD186x_IER, port->IER); + siolx_wait_CCR(bp); + siolx_out(bp, CD186x_CCR, CCR_CORCHG2); + siolx_wait_CCR(bp); + restore_flags(flags); +} + + +static inline int siolx_set_serial_info(struct siolx_port * port, + struct serial_struct * newinfo) +{ + struct serial_struct tmp; + struct siolx_board *bp = port_Board(port); + int change_speed; + unsigned long flags; + int error; + + error = verify_area(VERIFY_READ, (void *) newinfo, sizeof(tmp)); + if (error) + return error; + + if (copy_from_user(&tmp, newinfo, sizeof(tmp))) + return -EFAULT; + +#if 0 + if ((tmp.irq != bp->irq) || + (tmp.port != bp->base) || + (tmp.type != PORT_CIRRUS) || + (tmp.baud_base != (SIOLX_OSCFREQ + CD186x_TPC/2) / CD186x_TPC) || + (tmp.custom_divisor != 0) || + (tmp.xmit_fifo_size != CD186x_NFIFO) || + (tmp.flags & ~SIOLX_LEGAL_FLAGS)) + return -EINVAL; +#endif + + change_speed = ((port->flags & ASYNC_SPD_MASK) != + (tmp.flags & ASYNC_SPD_MASK)); + change_speed |= (tmp.custom_divisor != port->custom_divisor); + + if (!capable(CAP_SYS_ADMIN)) { + if ((tmp.close_delay != port->close_delay) || + (tmp.closing_wait != port->closing_wait) || + ((tmp.flags & ~ASYNC_USR_MASK) != + (port->flags & ~ASYNC_USR_MASK))) + return -EPERM; + port->flags = ((port->flags & ~ASYNC_USR_MASK) | + (tmp.flags & ASYNC_USR_MASK)); + port->custom_divisor = tmp.custom_divisor; + } else { + port->flags = ((port->flags & ~ASYNC_FLAGS) | + (tmp.flags & ASYNC_FLAGS)); + port->close_delay = tmp.close_delay; + port->closing_wait = tmp.closing_wait; + port->custom_divisor = tmp.custom_divisor; + } + if (change_speed) { + save_flags(flags); cli(); + siolx_change_speed(bp, port); + restore_flags(flags); + } + return 0; +} + + +static inline int siolx_get_serial_info(struct siolx_port * port, + struct serial_struct * retinfo) +{ + struct serial_struct tmp; + struct siolx_board *bp = port_Board(port); + int error; + + error = verify_area(VERIFY_WRITE, (void *) retinfo, sizeof(tmp)); + if (error) + return error; + + memset(&tmp, 0, sizeof(tmp)); + tmp.type = PORT_CIRRUS; + tmp.line = port->driverport; + tmp.port = bp->base; + tmp.irq = bp->irq; + tmp.flags = port->flags; + tmp.baud_base = (SIOLX_OSCFREQ + CD186x_TPC/2) / CD186x_TPC; + tmp.close_delay = port->close_delay * HZ/100; + tmp.closing_wait = port->closing_wait * HZ/100; + tmp.custom_divisor = port->custom_divisor; + tmp.xmit_fifo_size = CD186x_NFIFO; + if (copy_to_user(retinfo, &tmp, sizeof(tmp))) + return -EFAULT; + return 0; +} + + +static int siolx_ioctl(struct tty_struct * tty, struct file * filp, + unsigned int cmd, unsigned long arg) +{ + struct siolx_port *port = (struct siolx_port *)tty->driver_data; + int error; + int retval; + + if (siolx_paranoia_check(port, tty->device, "siolx_ioctl")) + return -ENODEV; + + switch (cmd) { + case TCSBRK: /* SVID version: non-zero arg --> no break */ + retval = tty_check_change(tty); + if (retval) + return retval; + tty_wait_until_sent(tty, 0); + if (!arg) + siolx_send_break(port, HZ/4); /* 1/4 second */ + return 0; + case TCSBRKP: /* support for POSIX tcsendbreak() */ + retval = tty_check_change(tty); + if (retval) + return retval; + tty_wait_until_sent(tty, 0); + siolx_send_break(port, arg ? arg*(HZ/10) : HZ/4); + return 0; + case TIOCGSOFTCAR: + error = verify_area(VERIFY_WRITE, (void *) arg, sizeof(long)); + if (error) + return error; + put_user(C_CLOCAL(tty) ? 1 : 0, + (unsigned long *) arg); + return 0; + case TIOCSSOFTCAR: + get_user(arg, (unsigned long *) arg); + tty->termios->c_cflag = + ((tty->termios->c_cflag & ~CLOCAL) | + (arg ? CLOCAL : 0)); + return 0; + case TIOCMGET: + error = verify_area(VERIFY_WRITE, (void *) arg, + sizeof(unsigned int)); + if (error) + return error; + return siolx_get_modem_info(port, (unsigned int *) arg); + case TIOCMBIS: + case TIOCMBIC: + case TIOCMSET: + return siolx_set_modem_info(port, cmd, (unsigned int *) arg); + case TIOCGSERIAL: + return siolx_get_serial_info(port, (struct serial_struct *) arg); + case TIOCSSERIAL: + return siolx_set_serial_info(port, (struct serial_struct *) arg); + default: + return -ENOIOCTLCMD; + } + return 0; +} + + +static void siolx_throttle(struct tty_struct * tty) +{ + struct siolx_port *port = (struct siolx_port *)tty->driver_data; + struct siolx_board *bp; + unsigned long flags; + + if (siolx_paranoia_check(port, tty->device, "siolx_throttle")) + return; + + bp = port_Board(port); + + save_flags(flags); cli(); + + /* Use DTR instead of RTS ! */ + if (SIOLX_CRTSCTS (tty)) + { + port->MSVR &= ~MSVR_DTR; + } + else + { + /* Auch!!! I think the system shouldn't call this then. */ + /* Or maybe we're supposed (allowed?) to do our side of hw + handshake anyway, even when hardware handshake is off. + When you see this in your logs, please report.... */ + printk (KERN_ERR "sx%d: Need to throttle, but can't (hardware hs is off)\n", + port_No (port)); + } + siolx_out(bp, CD186x_CAR, port_No_by_chip(port)); + if (I_IXOFF(tty)) + { + siolx_wait_CCR(bp); + siolx_out(bp, CD186x_CCR, CCR_SSCH2); + siolx_wait_CCR(bp); + } + siolx_out(bp, CD186x_MSVR, port->MSVR); + restore_flags(flags); +} + + +static void siolx_unthrottle(struct tty_struct * tty) +{ + struct siolx_port *port = (struct siolx_port *)tty->driver_data; + struct siolx_board *bp; + unsigned long flags; + + if (siolx_paranoia_check(port, tty->device, "siolx_unthrottle")) + return; + + bp = port_Board(port); + + save_flags(flags); cli(); + /* XXXX Use DTR INSTEAD???? */ + if (SIOLX_CRTSCTS(tty)) { + port->MSVR |= MSVR_DTR; + } /* Else clause: see remark in "siolx_throttle"... */ + + siolx_out(bp, CD186x_CAR, port_No_by_chip(port)); + if (I_IXOFF(tty)) { + siolx_wait_CCR(bp); + siolx_out(bp, CD186x_CCR, CCR_SSCH1); + siolx_wait_CCR(bp); + } + siolx_out(bp, CD186x_MSVR, port->MSVR); + restore_flags(flags); +} + + +static void siolx_stop(struct tty_struct * tty) +{ + struct siolx_port *port = (struct siolx_port *)tty->driver_data; + struct siolx_board *bp; + unsigned long flags; + + if (siolx_paranoia_check(port, tty->device, "siolx_stop")) + return; + + bp = port_Board(port); + + save_flags(flags); cli(); + port->IER &= ~IER_TXRDY; + siolx_out(bp, CD186x_CAR, port_No_by_chip(port)); + siolx_out(bp, CD186x_IER, port->IER); + restore_flags(flags); +} + + +static void siolx_start(struct tty_struct * tty) +{ + struct siolx_port *port = (struct siolx_port *)tty->driver_data; + struct siolx_board *bp; + unsigned long flags; + + if (siolx_paranoia_check(port, tty->device, "siolx_start")) + return; + + bp = port_Board(port); + + save_flags(flags); cli(); + if (port->xmit_cnt && port->xmit_buf && !(port->IER & IER_TXRDY)) { + port->IER |= IER_TXRDY; + siolx_out(bp, CD186x_CAR, port_No_by_chip(port)); + siolx_out(bp, CD186x_IER, port->IER); + } + restore_flags(flags); +} + + +/* + * This routine is called from the scheduler tqueue when the interrupt + * routine has signalled that a hangup has occurred. The path of + * hangup processing is: + * + * serial interrupt routine -> (scheduler tqueue) -> + * do_siolx_hangup() -> tty->hangup() -> siolx_hangup() + * + */ +static void do_siolx_hangup(void *private_) +{ + struct siolx_port *port = (struct siolx_port *) private_; + struct tty_struct *tty; + + tty = port->tty; + if (tty) + { + tty_hangup(tty); /* FIXME: module removal race here */ + } + MOD_DEC_USE_COUNT; +} + + +static void siolx_hangup(struct tty_struct * tty) +{ + struct siolx_port *port = (struct siolx_port *)tty->driver_data; + struct siolx_board *bp; + + if (siolx_paranoia_check(port, tty->device, "siolx_hangup")) + return; + + bp = port_Board(port); + + siolx_shutdown_port(bp, port); + port->event = 0; + port->count = 0; + port->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CALLOUT_ACTIVE); + port->tty = 0; + wake_up_interruptible(&port->open_wait); +} + + +static void siolx_set_termios(struct tty_struct * tty, struct termios * old_termios) +{ + struct siolx_port *port = (struct siolx_port *)tty->driver_data; + unsigned long flags; + + if (siolx_paranoia_check(port, tty->device, "siolx_set_termios")) + return; + + if (tty->termios->c_cflag == old_termios->c_cflag && + tty->termios->c_iflag == old_termios->c_iflag) + return; + + save_flags(flags); cli(); + siolx_change_speed(port_Board(port), port); + restore_flags(flags); + + if ((old_termios->c_cflag & CRTSCTS) && + !(tty->termios->c_cflag & CRTSCTS)) { + tty->hw_stopped = 0; + siolx_start(tty); + } +} + + +static void do_siolx_bh(void) +{ + run_task_queue(&tq_siolx); +} + + +static void do_softint(void *private_) +{ + struct siolx_port *port = (struct siolx_port *) private_; + struct tty_struct *tty; + + if(!(tty = port->tty)) + return; + + if (test_and_clear_bit(RS_EVENT_WRITE_WAKEUP, &port->event)) { + if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) && + tty->ldisc.write_wakeup) + (tty->ldisc.write_wakeup)(tty); + wake_up_interruptible(&tty->write_wait); + } +} + +static int siolx_finish_init_drivers(void) +{ + register struct siolx_board *bp; + register unsigned int count; + unsigned int maxport; + struct siolx_port *port; + struct siolx_port *lastport; + int error; + + bp = siolx_board_root; + + while(bp) + { + if(bp->chipnumber == 0) + { + maxport = SIOLX_NPORT; + } + else if((bp->boardtype == BD_16000C) && bp->reario) /* must be second chip of 16000C */ + { + maxport = SIOLX_NPORT/2; + } + else + { + maxport = SIOLX_NPORT; /* must be second chip of 16000P */ + } + + port = NULL; /* probably unnecessary */ + lastport = NULL; + for(count = 0; count < maxport; ++count) + { + port = (struct siolx_port*)kmalloc(sizeof(struct siolx_port), GFP_KERNEL); + if(port == NULL) + { + printk(KERN_ALERT + "siolx: Failed to create port structure on board %p.\n", bp); + break; /* no memory available */ + } + memset(port, 0, sizeof(struct siolx_port)); + + port->callout_termios = siolx_callout_driver.init_termios; + port->normal_termios = siolx_driver.init_termios; + port->magic = SIOLX_MAGIC; + port->tqueue.routine = do_softint; + port->tqueue.data = port; + port->tqueue_hangup.routine = do_siolx_hangup; + port->tqueue_hangup.data = port; + port->close_delay = 50 * HZ/100; + port->closing_wait = 3000 * HZ/100; + init_waitqueue_head(&port->open_wait); + init_waitqueue_head(&port->close_wait); + + port->board = bp; + port->driverport = NumSiolxPorts; + port->boardport = (count + (port->board->chipnumber*SIOLX_NPORT)); /* 0-16 */ + + if(count == 0) + { + bp->portlist = port; + } + else if(lastport) /* if count != 0 lastport should be non-null */ + { + lastport->next_by_board = port; + } + if(siolx_port_root == NULL) + { + siolx_port_root = port; + siolx_port_last = port; + } + else + { + siolx_port_last->next_by_global_list = port; + siolx_port_last = port; + } + lastport = port; + ++NumSiolxPorts; + } + bp = bp->next_by_global_list; + } + + siolx_driver.num = NumSiolxPorts; + + siolx_table = (struct tty_struct **) kmalloc(NumSiolxPorts*sizeof(struct tty_struct *), GFP_KERNEL); + if(siolx_table == NULL) + { + printk(KERN_ALERT "siolx: Could not allocate memory for siolx_table.\n"); + return 1; + } + memset(siolx_table, 0, NumSiolxPorts*sizeof(struct tty_struct *)); + + siolx_termios = (struct termios **) kmalloc(NumSiolxPorts*sizeof(struct termios *), GFP_KERNEL); + if(siolx_termios == NULL) + { + printk(KERN_ALERT "siolx: Could not allocate memory for siolx_termios.\n"); + return 1; + } + memset(siolx_termios, 0, NumSiolxPorts*sizeof(struct termios *)); + + siolx_termios_locked = (struct termios **) kmalloc(NumSiolxPorts*sizeof(struct termios *), GFP_KERNEL); + if(siolx_termios_locked == NULL) + { + printk(KERN_ALERT "siolx: Could not allocate memory for siolx_termios_locked.\n"); + return 1; + } + memset(siolx_termios_locked, 0, NumSiolxPorts*sizeof(struct termios *)); + + siolx_driver.table = siolx_table; /* will be changed */ + siolx_driver.termios = siolx_termios; /* will be changed */ + siolx_driver.termios_locked = siolx_termios_locked; /* will be changed */ + + if ((error = tty_register_driver(&siolx_driver))) + { + if(tmp_buf) + { + free_page((unsigned long)tmp_buf); + tmp_buf = 0; + } + printk(KERN_ERR "siolx: Couldn't register Aurora Asynchronous Adapter driver, error = %d\n", + error); + return 1; + } + if ((error = tty_register_driver(&siolx_callout_driver))) + { + if(tmp_buf) + { + free_page((unsigned long)tmp_buf); + tmp_buf = NULL; + } + tty_unregister_driver(&siolx_driver); + printk(KERN_ERR "siolx: Couldn't register Aurora Asynchronous Adapter callout driver, error = %d\n", + error); + return 1; + } + siolx_driver_registered = 1; + siolx_callout_driver_registered = 1; + return 0; /* success */ +} + +static int siolx_init_drivers(void) +{ + if (!(tmp_buf = (unsigned char *) get_free_page(GFP_KERNEL))) + { + printk(KERN_ERR "siolx: Couldn't get free page.\n"); + return 1; + } + init_bh(siolx_bhindex, do_siolx_bh); + memset(&siolx_driver, 0, sizeof(siolx_driver)); + siolx_driver.magic = TTY_DRIVER_MAGIC; + + siolx_driver.driver_name = "aurasiolx"; + siolx_driver.name = "ttyS"; + siolx_driver.major = siolx_major; +#ifdef MODULE + siolx_driver.minor_start = siolx_minorstart; /* changed from command line */ +#else + siolx_driver.minor_start = GetMinorStart(); +#endif + siolx_driver.num = 0; /* will be changed */ + + siolx_driver.type = TTY_DRIVER_TYPE_SERIAL; + siolx_driver.subtype = SIOLX_TYPE_NORMAL; + siolx_driver.init_termios = tty_std_termios; + siolx_driver.init_termios.c_cflag = + B9600 | CS8 | CREAD | HUPCL | CLOCAL; + siolx_driver.flags = TTY_DRIVER_REAL_RAW; + siolx_driver.refcount = &siolx_refcount; + + siolx_driver.table = siolx_table; /* will be changed */ + siolx_driver.termios = siolx_termios; /* will be changed */ + siolx_driver.termios_locked = siolx_termios_locked; /* will be changed */ + + siolx_driver.open = siolx_open; + siolx_driver.close = siolx_close; + siolx_driver.write = siolx_write; + siolx_driver.put_char = siolx_put_char; + siolx_driver.flush_chars = siolx_flush_chars; + siolx_driver.write_room = siolx_write_room; + siolx_driver.chars_in_buffer = siolx_chars_in_buffer; + siolx_driver.flush_buffer = siolx_flush_buffer; + siolx_driver.ioctl = siolx_ioctl; + siolx_driver.throttle = siolx_throttle; + siolx_driver.unthrottle = siolx_unthrottle; + siolx_driver.set_termios = siolx_set_termios; + siolx_driver.stop = siolx_stop; + siolx_driver.start = siolx_start; + siolx_driver.hangup = siolx_hangup; + + siolx_callout_driver = siolx_driver; + siolx_callout_driver.name = "cuw"; + siolx_callout_driver.major = (siolx_major+1); + siolx_callout_driver.subtype = SIOLX_TYPE_CALLOUT; + + siolx_driver.read_proc = siolx_read_proc; + return 0; +} + + +static void siolx_release_drivers(void) +{ + unsigned int intr_val; + struct siolx_board *bp; + + if(tmp_buf) + { + free_page((unsigned long)tmp_buf); + tmp_buf = NULL; + } + if(siolx_driver_registered) + { + tty_unregister_driver(&siolx_driver); + siolx_driver_registered = 0; + } + if(siolx_callout_driver_registered) + { + tty_unregister_driver(&siolx_callout_driver); + siolx_callout_driver_registered = 0; + } + /* unallocate and turn off ints */ + for(intr_val = 0; intr_val < SIOLX_NUMINTS; ++intr_val) + { + if(SiolxIrqRoot[intr_val] != NULL) + { + for(bp = SiolxIrqRoot[intr_val]; bp != NULL; + bp = bp->next_by_interrupt) + { + SiolxShutdownBoard(bp); /* turn off int; release the plx vaddr space */ + } + free_irq(intr_val, &SiolxIrqRoot[intr_val]); + } + } + +} + +static void siolx_release_memory(void) +{ + register struct siolx_board *bp; + register struct siolx_port *port; + + while(siolx_board_root) + { + bp = siolx_board_root; + siolx_board_root = bp->next_by_global_list; + siolx_release_io_range(bp); /* releases the chip vaddr */ + kfree(bp); + } + while(siolx_port_root) + { + port = siolx_port_root; + if(port->xmit_buf) + { /* should have been done when port shutdown */ + free_page((unsigned long) port->xmit_buf); + port->xmit_buf = NULL; + } + siolx_port_root = port->next_by_global_list; + kfree(port); + } + if(siolx_table) + { + kfree(siolx_table); + siolx_table = NULL; + } + if(siolx_termios) + { + kfree(siolx_termios); + siolx_termios = NULL; + } + if(siolx_termios_locked) + { + kfree(siolx_termios_locked); + siolx_termios_locked = NULL; + } + +#ifdef SIOLX_TIMER + del_timer (&missed_irq_timer); +#endif +} + + +static void siolx_cleanup(void) +{ + siolx_release_drivers(); + siolx_release_memory(); +} + +/* + * This routine must be called by kernel at boot time + */ + +static int __init siolx_init(void) +{ + unsigned char bus; + unsigned char devfn; + struct siolx_board *bp; + struct siolx_board *bp2; + unsigned int boardcount; + struct pci_dev *pdev = NULL; + unsigned int ecntl; + unsigned int intr_val; + + printk(KERN_ALERT "aurora interea miseris mortalibus almam extulerat lucem\n"); + printk(KERN_ALERT " referens opera atque labores\n"); + printk(KERN_INFO "siolx: Siolx Aurora Asynchronous Adapter driver v" VERSION ", (c) Telford Tools, Inc.\n"); +#ifdef CONFIG_SIOLX_RTSCTS + printk (KERN_INFO "siolx: DTR/RTS pin is always RTS.\n"); +#else + printk (KERN_INFO "siolx: DTR/RTS pin is RTS when CRTSCTS is on.\n"); +#endif + memset(SiolxIrqRoot, 0, sizeof(SiolxIrqRoot)); + tmp_buf = NULL; + siolx_board_root = NULL; /* clear out the global pointers */ + siolx_board_last = NULL; + siolx_port_root = NULL; + siolx_port_last = NULL; + NumSiolxPorts = 0; + siolx_table = NULL; /* make dynamic */ + siolx_termios = NULL; + siolx_termios_locked = NULL; + siolx_driver_registered = 0; + siolx_callout_driver_registered = 0; + + boardcount = 0; + + if (siolx_init_drivers()) + { + printk(KERN_INFO "siolx: Could not initialize drivers.\n"); + return -EIO; + } + + if (!pci_present()) + { + printk(KERN_INFO "siolx: Could not find PCI bus.\n"); + return -EIO; /* no PCI bus no Aurora cards */ + } + + while(1) + { + pdev = pci_find_device (siolx_vendor_id, siolx_device_id, pdev); + if (!pdev) + { + break; /* found no devices */ + } + + DEBUGPRINT((KERN_ALERT "%s\n", pdev->name)); + DEBUGPRINT((KERN_ALERT "subsystem vendor is %x.\n", + pdev->subsystem_vendor)); + DEBUGPRINT((KERN_ALERT "subsystem device is %x.\n", + pdev->subsystem_device)); + DEBUGPRINT((KERN_ALERT + "BAR0 = %lx\nBAR1 = %lx\nBAR2 = %lx\nBAR3 = %lx\nBAR4 = %lx\nBAR5 = %lx\n", + pci_resource_start(pdev, 0), + pci_resource_start(pdev, 1), + pci_resource_start(pdev, 2), + pci_resource_start(pdev, 3), + pci_resource_start(pdev, 4), + pci_resource_start(pdev, 5))); + DEBUGPRINT((KERN_ALERT + "LAS0 = %lx\nLAS1 = %lx\nLAS2 = %lx\nLAS3 = %lx\nLAS4 = %lx\nLAS5 = %lx\n", + pci_resource_len(pdev, 0), + pci_resource_len(pdev, 1), + pci_resource_len(pdev, 2), + pci_resource_len(pdev, 3), + pci_resource_len(pdev, 4), + pci_resource_len(pdev, 5))); + + if(pdev->subsystem_vendor == siolx_subsystem_vendor) + { + if(pdev->subsystem_device == siolx_subsystem_pci_device) + { + bp = (struct siolx_board*)kmalloc(sizeof(struct siolx_board), GFP_KERNEL); + if(bp == NULL) + { + printk(KERN_ALERT "siolx: Failed to create board structure on board %d.\n", boardcount); + break; /* no memory available */ + } + memset(bp, 0, sizeof(struct siolx_board)); + bp->boardtype = BD_8000P; + } + else if(pdev->subsystem_device == siolx_subsystem_cpci_device) + { + bp = (struct siolx_board*)kmalloc(sizeof(struct siolx_board), GFP_KERNEL); + if(bp == NULL) + { + printk(KERN_ALERT + "siolx: Failed to create board structure on board%p.\n", bp); + break; /* no memory available */ + } + memset(bp, 0, sizeof(struct siolx_board)); + bp->boardtype = BD_8000C; + } + else + { + continue; + } + } + else + { + continue; + } + + DEBUGPRINT((KERN_ALERT "siolx: interrupt is %i.\n", pdev->irq)); + bus = pdev->bus->number; + devfn = pdev->devfn; + DEBUGPRINT((KERN_ALERT "siolx: bus is %x, slot is %x.\n", bus, PCI_SLOT(devfn))); + + if (pci_enable_device(pdev)) + { + kfree(bp); + continue; /* enable failed */ + } + pci_set_master(pdev); + + bp->irq = pdev->irq; + SiolxResetBoard(bp, pdev); /* make sure the board is in a known state */ + if(bp->plx_vaddr == 0) + { + printk(KERN_ALERT "siolx: failed to remap plx address space.\n"); + kfree(bp); + continue; + } + bp->vaddr = (unsigned long) ioremap_nocache(pci_resource_start(pdev, 2), + pci_resource_len(pdev, 2)); + if(bp->vaddr) + { + bp->base = (bp->vaddr + MPASYNC_CHIP1_OFFSET); + bp->boardnumber = boardcount; + if (siolx_probe(bp)) /* failure is nonzero */ + { + iounmap((void*)bp->plx_vaddr); + bp->plx_vaddr = 0; + iounmap((void*)bp->vaddr); + bp->vaddr = 0; + kfree(bp); /* something wrong with board */ + continue; + } + intr_val = bp->irq; + if((intr_val < 0) || (intr_val >= SIOLX_NUMINTS)) + { + printk(KERN_ALERT "siolx: bad interrupt %i board %p.\n", intr_val, bp); + iounmap((void*)bp->plx_vaddr); /* but plx space was remapped */ + bp->plx_vaddr = 0; + iounmap((void*)bp->vaddr); /* release chip space */ + bp->vaddr = 0; + kfree(bp); /* release the board structure */ + continue; + } + bp->next_by_interrupt = SiolxIrqRoot[intr_val]; + SiolxIrqRoot[intr_val] = bp; + if(siolx_board_last == NULL) + { + siolx_board_root = bp; + siolx_board_last = bp; + } + else + { + siolx_board_last->next_by_global_list = bp; + siolx_board_last = bp; + } + bp->chipnumber = 0; + bp->intstatus = bp->plx_vaddr + PLX_ICSR; + bp->next_by_chain = bp; /* one item chain */ + ecntl = readl(bp->plx_vaddr + PLX_ECNTL); + boardcount++; /* added a board */ + if(pci_resource_len(pdev, 2) > MPASYNC_CHIP2_OFFSET) + { + ++(bp->boardtype); /* works because how types are defined 8000X --> 16000X*/ + if(bp->boardtype == BD_16000C) + { + if((ecntl & PLX_ECNTLUSERI) == 0) + { + bp->reario = 1; + } + } + bp2 = (struct siolx_board*)kmalloc(sizeof(struct siolx_board), GFP_KERNEL); + if(bp2 == NULL) + { + printk(KERN_ALERT + "siolx: Failed to create second board structure on board %p.\n", bp); + /* fall through because must turn on ints for other chip */ + } + else + { + memset(bp2, 0, sizeof(struct siolx_board)); /* unnecessary */ + *bp2 = *bp; /* note that all guys in chain point to same next_by interrupt */ + bp->next_by_chain = bp2; /* circular list */ + bp2->next_by_chain = bp;/* now chain two elements*/ + ++(bp2->chipnumber); /* chipnumber 1 */ + bp2->base = (bp2->vaddr + MPASYNC_CHIP2_OFFSET); + if(siolx_probe(bp2)) + { + printk(KERN_ALERT "siolx: Failed to probe second board structure on board %p.\n", bp); + kfree(bp2); + /* fall through because must turn on ints for other chip */ + /* don't release pci memory remap -- still works for other chip */ + } + else if(siolx_board_last == NULL) + { + siolx_board_root = bp2; /* this case should not occur */ + siolx_board_last = bp2; + } + else + { + siolx_board_last->next_by_global_list = bp2; + siolx_board_last = bp2; + } + /* don't increment boardnumber */ + } + } + } + else /* could not remap the cd18xx space */ + { + iounmap((void*)bp->plx_vaddr); /* but plx space was remapped */ + bp->plx_vaddr = 0; + kfree(bp); + } + } + if (boardcount == 0) + { + printk(KERN_INFO "siolx: No Aurora Asynchronous Adapter boards detected.\n"); + siolx_cleanup(); /* don't need any allocated memory */ + return -EIO; + } + if (siolx_finish_init_drivers()) + { + printk(KERN_INFO "siolx: Could not finish driver initialization.\n"); + siolx_cleanup(); + return -EIO; + } + + for(intr_val = 0; intr_val < SIOLX_NUMINTS; ++intr_val) /* trying to install as few int handlers as possible */ + { /* one for each group of boards (actually chips) on a given irq */ + if(SiolxIrqRoot[intr_val] != NULL) + { + if (request_irq(intr_val, siolx_interrupt, SA_SHIRQ, "siolx Aurora Asynchronous Adapter", + &SiolxIrqRoot[intr_val]) == 0) + /* interrupts on perboard basis + * cycle through chips and then + * ports */ + /* NOTE PLX INTS ARE OFF -- so turn them on */ + { + for(bp = SiolxIrqRoot[intr_val]; bp != NULL; bp = bp->next_by_interrupt) + { + writel(PLX_ICSRLCLINTPCI | PLX_ICSRPCIINTS, bp->plx_vaddr + PLX_ICSR); /* enable interrupts */ + } + } + else + { + printk(KERN_ALERT "siolx: Unable to get interrupt, board set up not complete %i.\n", intr_val); + /* no interrupts but on all lists */ + } + } + } + return 0; +} + +module_init(siolx_init); +module_exit(siolx_cleanup); +MODULE_DESCRIPTION("multiport Aurora asynchronous driver"); +MODULE_AUTHOR("Joachim Martillo "); +MODULE_LICENSE("GPL"); diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/cd1865/cdsiolx.h linux.21rc1-ac1/drivers/char/cd1865/cdsiolx.h --- linux.21rc1/drivers/char/cd1865/cdsiolx.h 1970-01-01 01:00:00.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/cd1865/cdsiolx.h 2003-04-22 17:37:24.000000000 +0100 @@ -0,0 +1,136 @@ +/* -*- linux-c -*- */ +/* + * This file was modified from + * linux/drivers/char/siolx_io8.h -- + * Siolx IO8+ multiport serial driver. + * + * Copyright (C) 1997 Roger Wolff (R.E.Wolff@BitWizard.nl) + * Copyright (C) 1994-1996 Dmitry Gorodchanin (pgmdsg@ibi.com) + * Modifications (C) 2002 Telford Tools, Inc. (martillo@telfordtools.com) + * + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be + * useful, but WITHOUT ANY WARRANTY; without even the implied + * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR + * PURPOSE. See the GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this program; if not, write to the Free + * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, + * USA. + * */ + +#ifndef __LINUX_SIOLX_H +#define __LINUX_SIOLX_H + +#include + +#ifdef __KERNEL__ + +#define SIOLX_NBOARD 8 + +/* eight ports per chip. */ +#define SIOLX_NPORT 8 +#define SIOLX_PORT(line) ((line) & (SIOLX_NPORT - 1)) + +#define MHz *1000000 /* I'm ashamed of myself. */ + +/* On-board oscillator frequency */ +#define SIOLX_OSCFREQ (33 MHz) +/* oregano is in /1 which mace 66Mhz is in /2 mode */ + +/* Ticks per sec. Used for setting receiver timeout and break length */ +#define SIOLX_TPS 4000 + +/* Yeah, after heavy testing I decided it must be 6. + * Sure, You can change it if needed. + */ +#define SIOLX_RXFIFO 6 /* Max. receiver FIFO size (1-8) */ + +#define SIOLX_MAGIC 0x0907 + +#define SIOLX_CCR_TIMEOUT 10000 /* CCR timeout. You may need to wait upto + 10 milliseconds before the internal + processor is available again after + you give it a command */ +#define SIOLX_NUMINTS 32 + +struct siolx_board +{ + unsigned long flags; + unsigned long base; + unsigned char irq; + unsigned char DTR; + unsigned long vaddr; + unsigned long plx_vaddr; + unsigned long intstatus; + struct siolx_board *next_by_chain; /* chains are circular */ + struct siolx_board *next_by_interrupt; /* only chip 0 */ + struct siolx_board *next_by_global_list; /* all boards not circular */ + struct siolx_port *portlist; + struct pci_dev pdev; + unsigned int chipnumber; /* for 8000X this structure really defines the board + * for 16000X the chain corresponds to a board and each + * structure corresponds to a dhip on a single board */ + unsigned int boardnumber; /* same for all boards/chips in a board chain */ + unsigned int boardtype; + unsigned int chiptype; + unsigned int chiprev; + unsigned int reario; + unsigned int rj45; +}; + +#define DRIVER_DEBUG() (siolx_debug) +#define DEBUGPRINT(arg) if(DRIVER_DEBUG()) printk arg + +struct siolx_port +{ + int magic; + int baud_base; + int flags; + struct tty_struct * tty; + int count; + int blocked_open; + int event; + int timeout; + int close_delay; + long session; + long pgrp; + unsigned char * xmit_buf; + int custom_divisor; + int xmit_head; + int xmit_tail; + int xmit_cnt; + struct termios normal_termios; + struct termios callout_termios; + wait_queue_head_t open_wait; + wait_queue_head_t close_wait; + struct tq_struct tqueue; + struct tq_struct tqueue_hangup; + short wakeup_chars; + short break_length; + unsigned short closing_wait; + unsigned char mark_mask; + unsigned char IER; + unsigned char MSVR; + unsigned char COR2; +#ifdef SIOLX_REPORT_OVERRUN + unsigned long overrun; +#endif +#ifdef SIOLX_REPORT_FIFO + unsigned long hits[10]; +#endif + struct siolx_port *next_by_global_list; + struct siolx_port *next_by_board; + struct siolx_board *board; + unsigned int boardport; /* relative to chain 0-15 for 16000X */ + unsigned int driverport; /* maps to minor device number */ +}; + +#endif /* __KERNEL__ */ +#endif /* __LINUX_SIOLX_H */ diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/cd1865/Makefile linux.21rc1-ac1/drivers/char/cd1865/Makefile --- linux.21rc1/drivers/char/cd1865/Makefile 1970-01-01 01:00:00.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/cd1865/Makefile 2003-04-22 16:44:36.000000000 +0100 @@ -0,0 +1,27 @@ +# Copyright (C) 2001 By Joachim Martillo, Telford Tools, Inc. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License +# as published by the Free Software Foundation; either version +# 2 of the License, or (at your option) any later version. + +# File: drivers/net/WAN/atiXX50/Makefile +# +# Makefile for the Aurora ESSC based cards +# Specifically the 2520, 4020, 4520, 8520 +# + +all: SILX.o + +O_TARGET := SILX.o + +obj-y := cd1865.o +obj-m := $(O_TARGET) + +EXTRA_CFLAGS += -I. + +include $(TOPDIR)/Rules.make + +clean: + rm -f core *.o *.a *.s *~ + diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/cd1865/plx9060.h linux.21rc1-ac1/drivers/char/cd1865/plx9060.h --- linux.21rc1/drivers/char/cd1865/plx9060.h 1970-01-01 01:00:00.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/cd1865/plx9060.h 2003-04-22 16:44:36.000000000 +0100 @@ -0,0 +1,97 @@ +#ifndef _PLX9060_H_ +#define _PLX9060_H_ +/* + * Aurora Cirrus CL-CD180/1865 Async Driver (sio16) + * + * This module contains the definitions for the PLX + * 9060SD PCI controller chip. + * + * COPYRIGHT (c) 1996-1998 BY AURORA TECHNOLOGIES, INC., WALTHAM, MA. + * Modifications Copyright (C) 2002 By Telford Tools, Inc., Boston, MA. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be + * useful, but WITHOUT ANY WARRANTY; without even the implied + * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR + * PURPOSE. See the GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this program; if not, write to the Free + * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, + * USA. + * + * file: plx9060.h + * author: cmw + * created: 11/21/1996 + * info: $Id: plx9060.h,v 1.2 2002/06/11 02:50:02 martillo Exp $ + */ + +/* + * $Log: plx9060.h,v $ + * Revision 1.2 2002/06/11 02:50:02 martillo + * using silx_ and SILX_ instead of sx_ and SX_ + * + * Revision 1.1 2002/05/21 17:30:16 martillo + * first pass for the sio16 driver. + * + * Revision 1.4 1999/02/12 15:38:13 bkd + * Changed PLX_ECNTUSER0 to PLX_ECNTLUSERO and added PLX_ECNTLUSERI. + * + * Revision 1.3 1998/03/23 19:35:42 bkd + * Added definitions for all of the missing PLX9060SD registers. + * + * Revision 1.2 1998/03/13 21:02:16 bkd + * Updated copyright date to include 1998. + * + * Revision 1.1 1996/11/23 01:07:46 bkd + * cmw/bkd (PCI port): + * Initial check-in. + * + */ + +/* + * Register definitions + */ + +#define PLX_LAS0RR 0x00 +#define PLX_LAS0BAR 0x04 +#define PLX_LAR 0x08 +#define PLX_ENDR 0x0c +#define PLX_EROMRR 0x10 +#define PLX_EROMBAR 0x14 +#define PLX_LAS0BRD 0x18 +#define PLX_LAS1RR 0x30 +#define PLX_LAS1BAR 0x34 +#define PLX_LAS1BRD 0x38 + +#define PLX_MBR0 0x40 +#define PLX_MBR1 0x44 +#define PLX_MBR2 0x48 +#define PLX_MBR3 0x4c +#define PLX_PCI2LCLDBR 0x60 +#define PLX_LCL2PCIDBR 0x64 +#define PLX_ICSR 0x68 +#define PLX_ECNTL 0x6c + +/* + * Bit definitions + */ + +#define PLX_ECNTLUSERO 0x00010000 /* turn on user output */ +#define PLX_ECNTLUSERI 0x00020000 /* user input */ +#define PLX_ECNTLLDREG 0x20000000 /* reload configuration registers */ +#define PLX_ECNTLLCLRST 0x40000000 /* local bus reset */ +#define PLX_ECNTLINITSTAT 0x80000000 /* mark board init'ed */ + + +#define PLX_ICSRLSERR_ENA 0x00000001 /* enable local bus LSERR# */ +#define PLX_ICSRLSERRP_ENA 0x00000002 /* enable local bus LSERR# PCI */ +#define PLX_ICSRPCIINTS 0x00000100 /* enable PCI interrupts */ +#define PLX_ICSRLCLINTPCI 0x00000800 +#define PLX_ICSRINTACTIVE 0x00008000 /* RO: local interrupt active */ + +#endif diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/cd1865/siolx.h linux.21rc1-ac1/drivers/char/cd1865/siolx.h --- linux.21rc1/drivers/char/cd1865/siolx.h 1970-01-01 01:00:00.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/cd1865/siolx.h 2003-04-22 16:44:36.000000000 +0100 @@ -0,0 +1,94 @@ +/* -*- linux-c -*- */ +#ifndef _SIOLX_H_ +#define _SIOLX_H_ + +/* + * Modifications Copyright (C) 2002 By Telford Tools, Inc., Boston, MA. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be + * useful, but WITHOUT ANY WARRANTY; without even the implied + * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR + * PURPOSE. See the GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this program; if not, write to the Free + * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, + * USA. + */ + +#define AURASUBSYSTEM_VENDOR_ID 0x125c +#define AURASUBSYSTEM_MPASYNCPCI 0x0640 +#define AURASUBSYSTEM_MPASYNCcPCI 0x0641 + +/* + * Aurora Cirrus CL-CD180/1865 Async Driver (sio16) + * + */ + +/* + * Register sets. These must match the order of the registers specified + * in the prom on the board! + */ + +#define MPASYNC_REG_CSR 1 +#define MPASYNC_REG_CD 2 + +#define MPASYNC_CHIP1_OFFSET 0x080 +#define MPASYNC_CHIP2_OFFSET 0x100 + +#define MPASYNC_REG_NO_OBP_CSR 1 +#define MPASYNC_REG_NO_OBP_CD 3 + +#define TX_FIFO 0x8 /* how deep is the chip fifo */ + +/* + * state flags + */ + +/* + * the following defines the model types + */ + +#define OREGANO_MODEL(mod) ((mod) == BD_16000P || (mod) == BD_8000P) +#define MACE_MODEL(mod) ((mod) == BD_16000C || (mod) == BD_8000C) + +/* + * I/O options: + */ + +#define MACE8_STD 0x0 /* 8000CP -- standard I/O */ +#define MACE8_RJ45 0x1 /* 8000CP -- rear RJ45 I/O */ + +#define MACE16_STD 0x0 /* 16000CP -- standard I/O */ +#define MACE16_RJ45 0x1 /* 16000CP -- rear RJ45 I/O */ + +#define SE2_CLK ((unsigned int) 11059200) /* 11.0592 MHz */ +#define SE_CLK ((unsigned int) 14745600) /* 14.7456 MHz */ +#define SE3_CLK ((unsigned int) 33000000) /* 33.3333 MHz */ + +/* divide x by y, rounded */ +#define ROUND_DIV(x, y) (((x) + ((y) >> 1)) / (y)) + +/* Calculate a 16 bit baud rate divisor for the given "encoded" + * (multiplied by two) baud rate. + */ + +/* chip types: */ +#define CT_UNKNOWN 0x0 /* unknown */ +#define CT_CL_CD180 0x1 /* Cirrus Logic CD-180 */ +#define CT_CL_CD1864 0x2 /* Cirrus Logic CD-1864 */ +#define CT_CL_CD1865 0x3 /* Cirrus Logic CD-1864 */ + +/* chip revisions: */ +#define CR_UNKNOWN 0x0 /* unknown */ +#define CR_REVA 0x1 /* revision A */ +#define CR_REVB 0x2 /* revision B */ +#define CR_REVC 0x3 /* revision C */ +/* ...and so on ... */ + +#endif diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/Config.in linux.21rc1-ac1/drivers/char/Config.in --- linux.21rc1/drivers/char/Config.in 2003-04-22 16:39:34.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/Config.in 2003-04-22 16:44:36.000000000 +0100 @@ -35,6 +35,7 @@ fi bool 'Non-standard serial port support' CONFIG_SERIAL_NONSTANDARD if [ "$CONFIG_SERIAL_NONSTANDARD" = "y" ]; then + tristate ' Aurora Technology, Inc. asynchronous PCI cards V2' CONFIG_ATI_CD1865 tristate ' Computone IntelliPort Plus serial support' CONFIG_COMPUTONE tristate ' Comtrol Rocketport support' CONFIG_ROCKETPORT tristate ' Cyclades async mux support' CONFIG_CYCLADES diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/console.c linux.21rc1-ac1/drivers/char/console.c --- linux.21rc1/drivers/char/console.c 2003-04-22 16:38:39.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/console.c 2003-04-22 16:44:36.000000000 +0100 @@ -2393,7 +2393,7 @@ tty->winsize.ws_row = video_num_lines; tty->winsize.ws_col = video_num_columns; } - if (tty->count == 1) + if (atomic_read(&tty->count) == 1) vcs_make_devfs (currcons, 0); return 0; } @@ -2402,7 +2402,7 @@ { if (!tty) return; - if (tty->count != 1) return; + if (atomic_read(&tty->count) != 1) return; vcs_make_devfs (MINOR (tty->device) - tty->driver.minor_start, 1); tty->driver_data = 0; } diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/cyclades.c linux.21rc1-ac1/drivers/char/cyclades.c --- linux.21rc1/drivers/char/cyclades.c 2003-04-22 16:39:34.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/cyclades.c 2003-04-22 16:44:36.000000000 +0100 @@ -2822,7 +2822,7 @@ #ifdef CY_DEBUG_OPEN printk("cyc:cy_close ttyC%d, count = %d\n", info->line, info->count); #endif - if ((tty->count == 1) && (info->count != 1)) { + if ((atomic_read(&tty->count) == 1) && (info->count != 1)) { /* * Uh, oh. tty->count is 1, which means that the tty * structure will be freed. Info->count should always diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/Config.in linux.21rc1-ac1/drivers/char/drm/Config.in --- linux.21rc1/drivers/char/drm/Config.in 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/Config.in 2003-04-22 16:44:36.000000000 +0100 @@ -6,9 +6,9 @@ # tristate ' 3dfx Banshee/Voodoo3+' CONFIG_DRM_TDFX -#tristate ' 3dlabs GMX 2000' CONFIG_DRM_GAMMA +tristate ' 3dlabs GMX 2000' CONFIG_DRM_GAMMA tristate ' ATI Rage 128' CONFIG_DRM_R128 -dep_tristate ' ATI Radeon' CONFIG_DRM_RADEON $CONFIG_AGP +tristate ' ATI Radeon' CONFIG_DRM_RADEON dep_tristate ' Intel I810' CONFIG_DRM_I810 $CONFIG_AGP dep_mbool ' Enabled XFree 4.1 ioctl interface by default' CONFIG_DRM_I810_XFREE_41 $CONFIG_DRM_I810 dep_tristate ' Intel 830M' CONFIG_DRM_I830 $CONFIG_AGP diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/drm_agpsupport.h linux.21rc1-ac1/drivers/char/drm/drm_agpsupport.h --- linux.21rc1/drivers/char/drm/drm_agpsupport.h 2003-04-22 16:39:34.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/drm_agpsupport.h 2003-04-22 19:20:12.000000000 +0100 @@ -283,8 +283,6 @@ break; case VIA_APOLLO_PRO: head->chipset = "VIA Apollo Pro"; break; - case VIA_APOLLO_P4X400: head->chipset = "VIA Apollo P4X400"; - break; case SIS_GENERIC: head->chipset = "SiS"; break; case AMD_GENERIC: head->chipset = "AMD"; break; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/drm_bufs.h linux.21rc1-ac1/drivers/char/drm/drm_bufs.h --- linux.21rc1/drivers/char/drm/drm_bufs.h 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/drm_bufs.h 2003-04-22 19:20:12.000000000 +0100 @@ -136,6 +136,7 @@ } map->offset = (unsigned long)map->handle; if ( map->flags & _DRM_CONTAINS_LOCK ) { + dev->sigdata.lock = dev->lock.hw_lock = map->handle; /* Pointer to lock */ } break; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/drm_context.h linux.21rc1-ac1/drivers/char/drm/drm_context.h --- linux.21rc1/drivers/char/drm/drm_context.h 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/drm_context.h 2003-04-22 19:20:12.000000000 +0100 @@ -554,7 +554,7 @@ /* Allocate a new queue */ down(&dev->struct_sem); - queue = gamma_alloc(sizeof(*queue), DRM_MEM_QUEUES); + queue = DRM(alloc)(sizeof(*queue), DRM_MEM_QUEUES); memset(queue, 0, sizeof(*queue)); atomic_set(&queue->use_count, 1); diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/drm_dma.h linux.21rc1-ac1/drivers/char/drm/drm_dma.h --- linux.21rc1/drivers/char/drm/drm_dma.h 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/drm_dma.h 2003-04-22 19:20:12.000000000 +0100 @@ -30,7 +30,7 @@ */ #include "drmP.h" - +#include "drm_os_linux.h" #include /* For task queue support */ #ifndef __HAVE_DMA_WAITQUEUE @@ -537,8 +537,18 @@ dev->tq.data = dev; #endif +#if __HAVE_VBL_IRQ + init_waitqueue_head(&dev->vbl_queue); + + spin_lock_init( &dev->vbl_lock ); + + INIT_LIST_HEAD( &dev->vbl_sigs.head ); + + dev->vbl_pending = 0; +#endif + /* Before installing handler */ - DRIVER_PREINSTALL(); + DRM(driver_irq_preinstall)(dev); /* Install handler */ ret = request_irq( dev->irq, DRM(dma_service), @@ -551,7 +561,7 @@ } /* After installing handler */ - DRIVER_POSTINSTALL(); + DRM(driver_irq_postinstall)(dev); return 0; } @@ -570,7 +580,7 @@ DRM_DEBUG( "%s: irq=%d\n", __FUNCTION__, irq ); - DRIVER_UNINSTALL(); + DRM(driver_irq_uninstall)( dev ); free_irq( irq, dev ); @@ -597,6 +607,142 @@ } } +#if __HAVE_VBL_IRQ + +int DRM(wait_vblank)(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long data ) +{ + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + drm_wait_vblank_t vblwait; + struct timeval now; + int ret = 0; + unsigned int flags; + + if (!dev->irq) + return -EINVAL; + + DRM_COPY_FROM_USER_IOCTL( vblwait, (drm_wait_vblank_t *)data, + sizeof(vblwait) ); + + switch ( vblwait.request.type & ~_DRM_VBLANK_FLAGS_MASK ) { + case _DRM_VBLANK_RELATIVE: + vblwait.request.sequence += atomic_read( &dev->vbl_received ); + vblwait.request.type &= ~_DRM_VBLANK_RELATIVE; + case _DRM_VBLANK_ABSOLUTE: + break; + default: + return -EINVAL; + } + + flags = vblwait.request.type & _DRM_VBLANK_FLAGS_MASK; + + if ( flags & _DRM_VBLANK_SIGNAL ) { + unsigned long irqflags; + drm_vbl_sig_t *vbl_sig; + + vblwait.reply.sequence = atomic_read( &dev->vbl_received ); + + spin_lock_irqsave( &dev->vbl_lock, irqflags ); + + /* Check if this task has already scheduled the same signal + * for the same vblank sequence number; nothing to be done in + * that case + */ + list_for_each( ( (struct list_head *) vbl_sig ), &dev->vbl_sigs.head ) { + if (vbl_sig->sequence == vblwait.request.sequence + && vbl_sig->info.si_signo == vblwait.request.signal + && vbl_sig->task == current) + { + spin_unlock_irqrestore( &dev->vbl_lock, irqflags ); + goto done; + } + } + + if ( dev->vbl_pending >= 100 ) { + spin_unlock_irqrestore( &dev->vbl_lock, irqflags ); + return -EBUSY; + } + + dev->vbl_pending++; + + spin_unlock_irqrestore( &dev->vbl_lock, irqflags ); + + if ( !( vbl_sig = kmalloc(sizeof(drm_vbl_sig_t), GFP_KERNEL) ) ) + return -ENOMEM; + + + memset( (void *)vbl_sig, 0, sizeof(*vbl_sig) ); + + vbl_sig->sequence = vblwait.request.sequence; + vbl_sig->info.si_signo = vblwait.request.signal; + vbl_sig->task = current; + + spin_lock_irqsave( &dev->vbl_lock, irqflags ); + + list_add_tail( (struct list_head *) vbl_sig, &dev->vbl_sigs.head ); + + spin_unlock_irqrestore( &dev->vbl_lock, irqflags ); + } else { + ret = DRM(vblank_wait)( dev, &vblwait.request.sequence ); + + do_gettimeofday( &now ); + vblwait.reply.tval_sec = now.tv_sec; + vblwait.reply.tval_usec = now.tv_usec; + } + +done: + DRM_COPY_TO_USER_IOCTL( (drm_wait_vblank_t *)data, vblwait, + sizeof(vblwait) ); + + return ret; +} + +void DRM(vbl_send_signals)( drm_device_t *dev ) +{ + struct list_head *tmp; + drm_vbl_sig_t *vbl_sig; + unsigned int vbl_seq = atomic_read( &dev->vbl_received ); + unsigned long flags; + + spin_lock_irqsave( &dev->vbl_lock, flags ); + + list_for_each_safe( ( (struct list_head *) vbl_sig ), tmp, &dev->vbl_sigs.head ) { + if ( ( vbl_seq - vbl_sig->sequence ) <= (1<<23) ) { + vbl_sig->info.si_code = vbl_seq; + send_sig_info( vbl_sig->info.si_signo, &vbl_sig->info, vbl_sig->task ); + + list_del( (struct list_head *) vbl_sig ); + + + kfree( vbl_sig ); + dev->vbl_pending--; + } + } + + spin_unlock_irqrestore( &dev->vbl_lock, flags ); +} + +#endif /* __HAVE_VBL_IRQ */ + +#else + +int DRM(control)( struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg ) +{ + drm_control_t ctl; + + if ( copy_from_user( &ctl, (drm_control_t *)arg, sizeof(ctl) ) ) + return -EFAULT; + + switch ( ctl.func ) { + case DRM_INST_HANDLER: + case DRM_UNINST_HANDLER: + return 0; + default: + return -EINVAL; + } +} + #endif /* __HAVE_DMA_IRQ */ #endif /* __HAVE_DMA */ diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/drm_drv.h linux.21rc1-ac1/drivers/char/drm/drm_drv.h --- linux.21rc1/drivers/char/drm/drm_drv.h 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/drm_drv.h 2003-04-22 16:44:36.000000000 +0100 @@ -115,18 +115,34 @@ #ifndef DRIVER_FOPS #define DRIVER_FOPS \ static struct file_operations DRM(fops) = { \ - owner: THIS_MODULE, \ - open: DRM(open), \ - flush: DRM(flush), \ - release: DRM(release), \ - ioctl: DRM(ioctl), \ - mmap: DRM(mmap), \ - read: DRM(read), \ - fasync: DRM(fasync), \ - poll: DRM(poll), \ + .owner = THIS_MODULE, \ + .open = DRM(open), \ + .flush = DRM(flush), \ + .release = DRM(release), \ + .ioctl = DRM(ioctl), \ + .mmap = DRM(mmap), \ + .read = DRM(read), \ + .fasync = DRM(fasync), \ + .poll = DRM(poll), \ } #endif +#ifndef MODULE +/* DRM(options) is called by the kernel to parse command-line options + * passed via the boot-loader (e.g., LILO). It calls the insmod option + * routine, drm_parse_drm. + */ +/* Use an additional macro to avoid preprocessor troubles */ +#define DRM_OPTIONS_FUNC DRM(options) +static int __init DRM(options)( char *str ) +{ + DRM(parse_options)( str ); + return 1; +} + +__setup( DRIVER_NAME "=", DRM_OPTIONS_FUNC ); +#undef DRM_OPTIONS_FUNC +#endif /* * The default number of instances (minor numbers) to initialize. @@ -187,10 +203,8 @@ /* The DRM_IOCTL_DMA ioctl should be defined by the driver. */ -#if __HAVE_DMA_IRQ [DRM_IOCTL_NR(DRM_IOCTL_CONTROL)] = { DRM(control), 1, 1 }, #endif -#endif #if __REALLY_HAVE_AGP [DRM_IOCTL_NR(DRM_IOCTL_AGP_ACQUIRE)] = { DRM(agp_acquire), 1, 1 }, @@ -208,6 +222,10 @@ [DRM_IOCTL_NR(DRM_IOCTL_SG_FREE)] = { DRM(sg_free), 1, 1 }, #endif +#if __HAVE_VBL_IRQ + [DRM_IOCTL_NR(DRM_IOCTL_WAIT_VBLANK)] = { DRM(wait_vblank), 0, 0 }, +#endif + DRIVER_IOCTLS }; @@ -292,7 +310,7 @@ dev->map_count = 0; dev->vmalist = NULL; - dev->lock.hw_lock = NULL; + dev->sigdata.lock = dev->lock.hw_lock = NULL; init_waitqueue_head( &dev->lock.lock_queue ); dev->queue_count = 0; dev->queue_reserved = 0; @@ -477,7 +495,7 @@ DRM(dma_takedown)( dev ); #endif if ( dev->lock.hw_lock ) { - dev->lock.hw_lock = NULL; /* SHM removed */ + dev->sigdata.lock = dev->lock.hw_lock = NULL; /* SHM removed */ dev->lock.pid = 0; wake_up_interruptible( &dev->lock.lock_queue ); } @@ -705,7 +723,7 @@ int i; for (i = 0; i < DRM(numdevs); i++) { - if (MINOR(inode->i_rdev) == DRM(minor)[i]) { + if (minor(inode->i_rdev) == DRM(minor)[i]) { dev = &(DRM(device)[i]); break; } @@ -747,8 +765,8 @@ * Begin inline drm_release */ - DRM_DEBUG( "pid = %d, device = 0x%x, open_count = %d\n", - current->pid, dev->device, dev->open_count ); + DRM_DEBUG( "pid = %d, device = 0x%lx, open_count = %d\n", + current->pid, (long)dev->device, dev->open_count ); if ( dev->lock.hw_lock && _DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock) && @@ -873,8 +891,9 @@ atomic_inc( &dev->counts[_DRM_STAT_IOCTLS] ); ++priv->ioctl_count; - DRM_DEBUG( "pid=%d, cmd=0x%02x, nr=0x%02x, dev 0x%x, auth=%d\n", - current->pid, cmd, nr, dev->device, priv->authenticated ); + DRM_DEBUG( "pid=%d, cmd=0x%02x, nr=0x%02x, dev 0x%lx, auth=%d\n", + current->pid, cmd, nr, (long)dev->device, + priv->authenticated ); if ( nr >= DRIVER_IOCTL_COUNT ) { retcode = -EINVAL; @@ -1027,6 +1046,25 @@ atomic_inc( &dev->counts[_DRM_STAT_UNLOCKS] ); +#if __HAVE_KERNEL_CTX_SWITCH + /* We no longer really hold it, but if we are the next + * agent to request it then we should just be able to + * take it immediately and not eat the ioctl. + */ + dev->lock.pid = 0; + { + __volatile__ unsigned int *plock = &dev->lock.hw_lock->lock; + unsigned int old, new, prev, ctx; + + ctx = lock.context; + do { + old = *plock; + new = ctx; + prev = cmpxchg(plock, old, new); + } while (prev != old); + } + wake_up_interruptible(&dev->lock.lock_queue); +#else DRM(lock_transfer)( dev, &dev->lock.hw_lock->lock, DRM_KERNEL_CONTEXT ); #if __HAVE_DMA_SCHEDULE @@ -1041,6 +1079,7 @@ DRM_ERROR( "\n" ); } } +#endif /* !__HAVE_KERNEL_CTX_SWITCH */ unblock_all_signals(); return 0; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/drm_fops.h linux.21rc1-ac1/drivers/char/drm/drm_fops.h --- linux.21rc1/drivers/char/drm/drm_fops.h 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/drm_fops.h 2003-04-22 19:20:12.000000000 +0100 @@ -37,7 +37,7 @@ int DRM(open_helper)(struct inode *inode, struct file *filp, drm_device_t *dev) { - kdev_t minor = MINOR(inode->i_rdev); + int minor = minor(inode->i_rdev); drm_file_t *priv; if (filp->f_flags & O_EXCL) return -EBUSY; /* No exclusive opens */ @@ -94,25 +94,8 @@ drm_file_t *priv = filp->private_data; drm_device_t *dev = priv->dev; - DRM_DEBUG("pid = %d, device = 0x%x, open_count = %d\n", - current->pid, dev->device, dev->open_count); - if ( dev->lock.hw_lock && - _DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock) && - dev->lock.pid == current->pid ) { - DRM_DEBUG( "Process %d closed fd, freeing lock for context %d\n", - current->pid, - _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock) ); -#if __HAVE_RELEASE - DRIVER_RELEASE(); -#endif - DRM(lock_free)( dev, &dev->lock.hw_lock->lock, - _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock) ); - - /* FIXME: may require heavy-handed reset of - hardware at this point, possibly - processed via a callback to the X - server. */ - } + DRM_DEBUG("pid = %d, device = 0x%lx, open_count = %d\n", + current->pid, (long)dev->device, dev->open_count); return 0; } @@ -122,7 +105,7 @@ drm_device_t *dev = priv->dev; int retcode; - DRM_DEBUG("fd = %d, device = 0x%x\n", fd, dev->device); + DRM_DEBUG("fd = %d, device = 0x%lx\n", fd, (long)dev->device); retcode = fasync_helper(fd, filp, on, &dev->buf_async); if (retcode < 0) return retcode; return 0; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/drm.h linux.21rc1-ac1/drivers/char/drm/drm.h --- linux.21rc1/drivers/char/drm/drm.h 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/drm.h 2003-04-22 16:44:36.000000000 +0100 @@ -38,10 +38,27 @@ #if defined(__linux__) #include #include /* For _IO* macros */ -#define DRM_IOCTL_NR(n) _IOC_NR(n) -#elif defined(__FreeBSD__) +#define DRM_IOCTL_NR(n) _IOC_NR(n) +#define DRM_IOC_VOID _IOC_NONE +#define DRM_IOC_READ _IOC_READ +#define DRM_IOC_WRITE _IOC_WRITE +#define DRM_IOC_READWRITE _IOC_READ|_IOC_WRITE +#define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size) +#elif defined(__FreeBSD__) || defined(__NetBSD__) +#if defined(__FreeBSD__) && defined(XFree86Server) +/* Prevent name collision when including sys/ioccom.h */ +#undef ioctl #include -#define DRM_IOCTL_NR(n) ((n) & 0xff) +#define ioctl(a,b,c) xf86ioctl(a,b,c) +#else +#include +#endif /* __FreeBSD__ && xf86ioctl */ +#define DRM_IOCTL_NR(n) ((n) & 0xff) +#define DRM_IOC_VOID IOC_VOID +#define DRM_IOC_READ IOC_OUT +#define DRM_IOC_WRITE IOC_IN +#define DRM_IOC_READWRITE IOC_INOUT +#define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size) #endif #define XFREE86_VERSION(major,minor,patch,snap) \ @@ -84,6 +101,10 @@ /* Warning: If you change this structure, make sure you change * XF86DRIClipRectRec in the server as well */ +/* KW: Actually it's illegal to change either for + * backwards-compatibility reasons. + */ + typedef struct drm_clip_rect { unsigned short x1; unsigned short y1; @@ -332,6 +353,32 @@ int funcnum; } drm_irq_busid_t; +typedef enum { + _DRM_VBLANK_ABSOLUTE = 0x0, /* Wait for specific vblank sequence number */ + _DRM_VBLANK_RELATIVE = 0x1, /* Wait for given number of vblanks */ + _DRM_VBLANK_SIGNAL = 0x40000000 /* Send signal instead of blocking */ +} drm_vblank_seq_type_t; + +#define _DRM_VBLANK_FLAGS_MASK _DRM_VBLANK_SIGNAL + +struct drm_wait_vblank_request { + drm_vblank_seq_type_t type; + unsigned int sequence; + unsigned long signal; +}; + +struct drm_wait_vblank_reply { + drm_vblank_seq_type_t type; + unsigned int sequence; + long tval_sec; + long tval_usec; +}; + +typedef union drm_wait_vblank { + struct drm_wait_vblank_request request; + struct drm_wait_vblank_reply reply; +} drm_wait_vblank_t; + typedef struct drm_agp_mode { unsigned long mode; } drm_agp_mode_t; @@ -371,10 +418,9 @@ #define DRM_IOCTL_BASE 'd' #define DRM_IO(nr) _IO(DRM_IOCTL_BASE,nr) -#define DRM_IOR(nr,size) _IOR(DRM_IOCTL_BASE,nr,size) -#define DRM_IOW(nr,size) _IOW(DRM_IOCTL_BASE,nr,size) -#define DRM_IOWR(nr,size) _IOWR(DRM_IOCTL_BASE,nr,size) - +#define DRM_IOR(nr,type) _IOR(DRM_IOCTL_BASE,nr,type) +#define DRM_IOW(nr,type) _IOW(DRM_IOCTL_BASE,nr,type) +#define DRM_IOWR(nr,type) _IOWR(DRM_IOCTL_BASE,nr,type) #define DRM_IOCTL_VERSION DRM_IOWR(0x00, drm_version_t) #define DRM_IOCTL_GET_UNIQUE DRM_IOWR(0x01, drm_unique_t) @@ -427,86 +473,10 @@ #define DRM_IOCTL_SG_ALLOC DRM_IOW( 0x38, drm_scatter_gather_t) #define DRM_IOCTL_SG_FREE DRM_IOW( 0x39, drm_scatter_gather_t) -/* MGA specific ioctls */ -#define DRM_IOCTL_MGA_INIT DRM_IOW( 0x40, drm_mga_init_t) -#define DRM_IOCTL_MGA_FLUSH DRM_IOW( 0x41, drm_lock_t) -#define DRM_IOCTL_MGA_RESET DRM_IO( 0x42) -#define DRM_IOCTL_MGA_SWAP DRM_IO( 0x43) -#define DRM_IOCTL_MGA_CLEAR DRM_IOW( 0x44, drm_mga_clear_t) -#define DRM_IOCTL_MGA_VERTEX DRM_IOW( 0x45, drm_mga_vertex_t) -#define DRM_IOCTL_MGA_INDICES DRM_IOW( 0x46, drm_mga_indices_t) -#define DRM_IOCTL_MGA_ILOAD DRM_IOW( 0x47, drm_mga_iload_t) -#define DRM_IOCTL_MGA_BLIT DRM_IOW( 0x48, drm_mga_blit_t) - -/* i810 specific ioctls */ -#define DRM_IOCTL_I810_INIT DRM_IOW( 0x40, drm_i810_init_t) -#define DRM_IOCTL_I810_VERTEX DRM_IOW( 0x41, drm_i810_vertex_t) -#define DRM_IOCTL_I810_CLEAR DRM_IOW( 0x42, drm_i810_clear_t) -#define DRM_IOCTL_I810_FLUSH DRM_IO( 0x43) -#define DRM_IOCTL_I810_GETAGE DRM_IO( 0x44) -#define DRM_IOCTL_I810_GETBUF DRM_IOWR(0x45, drm_i810_dma_t) -#define DRM_IOCTL_I810_SWAP DRM_IO( 0x46) -#define DRM_IOCTL_I810_COPY DRM_IOW( 0x47, drm_i810_copy_t) -#define DRM_IOCTL_I810_DOCOPY DRM_IO( 0x48) -#define DRM_IOCTL_I810_OV0INFO DRM_IOR( 0x49, drm_i810_overlay_t) -#define DRM_IOCTL_I810_FSTATUS DRM_IO ( 0x4a) -#define DRM_IOCTL_I810_OV0FLIP DRM_IO ( 0x4b) -#define DRM_IOCTL_I810_MC DRM_IOW( 0x4c, drm_i810_mc_t) -#define DRM_IOCTL_I810_RSTATUS DRM_IO ( 0x4d ) - - -/* Rage 128 specific ioctls */ -#define DRM_IOCTL_R128_INIT DRM_IOW( 0x40, drm_r128_init_t) -#define DRM_IOCTL_R128_CCE_START DRM_IO( 0x41) -#define DRM_IOCTL_R128_CCE_STOP DRM_IOW( 0x42, drm_r128_cce_stop_t) -#define DRM_IOCTL_R128_CCE_RESET DRM_IO( 0x43) -#define DRM_IOCTL_R128_CCE_IDLE DRM_IO( 0x44) -#define DRM_IOCTL_R128_RESET DRM_IO( 0x46) -#define DRM_IOCTL_R128_SWAP DRM_IO( 0x47) -#define DRM_IOCTL_R128_CLEAR DRM_IOW( 0x48, drm_r128_clear_t) -#define DRM_IOCTL_R128_VERTEX DRM_IOW( 0x49, drm_r128_vertex_t) -#define DRM_IOCTL_R128_INDICES DRM_IOW( 0x4a, drm_r128_indices_t) -#define DRM_IOCTL_R128_BLIT DRM_IOW( 0x4b, drm_r128_blit_t) -#define DRM_IOCTL_R128_DEPTH DRM_IOW( 0x4c, drm_r128_depth_t) -#define DRM_IOCTL_R128_STIPPLE DRM_IOW( 0x4d, drm_r128_stipple_t) -#define DRM_IOCTL_R128_INDIRECT DRM_IOWR(0x4f, drm_r128_indirect_t) -#define DRM_IOCTL_R128_FULLSCREEN DRM_IOW( 0x50, drm_r128_fullscreen_t) - -/* Radeon specific ioctls */ -#define DRM_IOCTL_RADEON_CP_INIT DRM_IOW( 0x40, drm_radeon_init_t) -#define DRM_IOCTL_RADEON_CP_START DRM_IO( 0x41) -#define DRM_IOCTL_RADEON_CP_STOP DRM_IOW( 0x42, drm_radeon_cp_stop_t) -#define DRM_IOCTL_RADEON_CP_RESET DRM_IO( 0x43) -#define DRM_IOCTL_RADEON_CP_IDLE DRM_IO( 0x44) -#define DRM_IOCTL_RADEON_RESET DRM_IO( 0x45) -#define DRM_IOCTL_RADEON_FULLSCREEN DRM_IOW( 0x46, drm_radeon_fullscreen_t) -#define DRM_IOCTL_RADEON_SWAP DRM_IO( 0x47) -#define DRM_IOCTL_RADEON_CLEAR DRM_IOW( 0x48, drm_radeon_clear_t) -#define DRM_IOCTL_RADEON_VERTEX DRM_IOW( 0x49, drm_radeon_vertex_t) -#define DRM_IOCTL_RADEON_INDICES DRM_IOW( 0x4a, drm_radeon_indices_t) -#define DRM_IOCTL_RADEON_STIPPLE DRM_IOW( 0x4c, drm_radeon_stipple_t) -#define DRM_IOCTL_RADEON_INDIRECT DRM_IOWR(0x4d, drm_radeon_indirect_t) -#define DRM_IOCTL_RADEON_TEXTURE DRM_IOWR(0x4e, drm_radeon_texture_t) - -/* SiS specific ioctls */ -#define SIS_IOCTL_FB_ALLOC DRM_IOWR(0x44, drm_sis_mem_t) -#define SIS_IOCTL_FB_FREE DRM_IOW( 0x45, drm_sis_mem_t) -#define SIS_IOCTL_AGP_INIT DRM_IOWR(0x53, drm_sis_agp_t) -#define SIS_IOCTL_AGP_ALLOC DRM_IOWR(0x54, drm_sis_mem_t) -#define SIS_IOCTL_AGP_FREE DRM_IOW( 0x55, drm_sis_mem_t) -#define SIS_IOCTL_FLIP DRM_IOW( 0x48, drm_sis_flip_t) -#define SIS_IOCTL_FLIP_INIT DRM_IO( 0x49) -#define SIS_IOCTL_FLIP_FINAL DRM_IO( 0x50) - -/* I830 specific ioctls */ -#define DRM_IOCTL_I830_INIT DRM_IOW( 0x40, drm_i830_init_t) -#define DRM_IOCTL_I830_VERTEX DRM_IOW( 0x41, drm_i830_vertex_t) -#define DRM_IOCTL_I830_CLEAR DRM_IOW( 0x42, drm_i830_clear_t) -#define DRM_IOCTL_I830_FLUSH DRM_IO ( 0x43) -#define DRM_IOCTL_I830_GETAGE DRM_IO ( 0x44) -#define DRM_IOCTL_I830_GETBUF DRM_IOWR(0x45, drm_i830_dma_t) -#define DRM_IOCTL_I830_SWAP DRM_IO ( 0x46) -#define DRM_IOCTL_I830_COPY DRM_IOW( 0x47, drm_i830_copy_t) -#define DRM_IOCTL_I830_DOCOPY DRM_IO ( 0x48) +#define DRM_IOCTL_WAIT_VBLANK DRM_IOWR(0x3a, drm_wait_vblank_t) + +/* Device specfic ioctls should only be in their respective headers + * The device specific ioctl range is 0x40 to 0x79. */ +#define DRM_COMMAND_BASE 0x40 #endif diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/drm_ioctl.h linux.21rc1-ac1/drivers/char/drm/drm_ioctl.h --- linux.21rc1/drivers/char/drm/drm_ioctl.h 2003-04-22 16:39:34.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/drm_ioctl.h 2003-04-22 19:20:12.000000000 +0100 @@ -111,7 +111,7 @@ do { struct pci_dev *pci_dev; - int b, d, f; + int domain, b, d, f; char *p; for(p = dev->unique; p && *p && *p != ':'; p++); @@ -123,6 +123,27 @@ f = (int)simple_strtoul(p+1, &p, 10); if (*p) break; + domain = b >> 8; + b &= 0xff; + +#ifdef __alpha__ + /* + * Find the hose the device is on (the domain number is the + * hose index) and offset the bus by the root bus of that + * hose. + */ + for(pci_dev = pci_find_device(PCI_ANY_ID,PCI_ANY_ID,NULL); + pci_dev; + pci_dev = pci_find_device(PCI_ANY_ID,PCI_ANY_ID,pci_dev)) { + struct pci_controller *hose = pci_dev->sysdata; + + if (hose->index == domain) { + b += hose->bus->number; + break; + } + } +#endif + pci_dev = pci_find_slot(b, PCI_DEVFN(d,f)); if (pci_dev) { dev->pdev = pci_dev; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/drm_lock.h linux.21rc1-ac1/drivers/char/drm/drm_lock.h --- linux.21rc1/drivers/char/drm/drm_lock.h 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/drm_lock.h 2003-04-22 19:20:12.000000000 +0100 @@ -236,7 +236,7 @@ /* Allow signal delivery if lock isn't held */ - if (!_DRM_LOCK_IS_HELD(s->lock->lock) + if (!s->lock || !_DRM_LOCK_IS_HELD(s->lock->lock) || _DRM_LOCKING_CONTEXT(s->lock->lock) != s->context) return 1; /* Otherwise, set flag to force call to diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/drm_memory.h linux.21rc1-ac1/drivers/char/drm/drm_memory.h --- linux.21rc1/drivers/char/drm/drm_memory.h 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/drm_memory.h 2003-04-22 19:20:12.000000000 +0100 @@ -313,6 +313,29 @@ return pt; } +void *DRM(ioremap_nocache)(unsigned long offset, unsigned long size) +{ + void *pt; + + if (!size) { + DRM_MEM_ERROR(DRM_MEM_MAPPINGS, + "Mapping 0 bytes at 0x%08lx\n", offset); + return NULL; + } + + if (!(pt = ioremap_nocache(offset, size))) { + spin_lock(&DRM(mem_lock)); + ++DRM(mem_stats)[DRM_MEM_MAPPINGS].fail_count; + spin_unlock(&DRM(mem_lock)); + return NULL; + } + spin_lock(&DRM(mem_lock)); + ++DRM(mem_stats)[DRM_MEM_MAPPINGS].succeed_count; + DRM(mem_stats)[DRM_MEM_MAPPINGS].bytes_allocated += size; + spin_unlock(&DRM(mem_lock)); + return pt; +} + void DRM(ioremapfree)(void *pt, unsigned long size) { int alloc_count; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/drm_os_linux.h linux.21rc1-ac1/drivers/char/drm/drm_os_linux.h --- linux.21rc1/drivers/char/drm/drm_os_linux.h 1970-01-01 01:00:00.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/drm_os_linux.h 2003-04-22 19:20:12.000000000 +0100 @@ -0,0 +1,56 @@ +#define __NO_VERSION__ + +#include /* For task queue support */ +#include + + +/* For data going from/to the kernel through the ioctl argument */ +#define DRM_COPY_FROM_USER_IOCTL(arg1, arg2, arg3) \ + if ( copy_from_user(&arg1, arg2, arg3) ) \ + return -EFAULT +#define DRM_COPY_TO_USER_IOCTL(arg1, arg2, arg3) \ + if ( copy_to_user(arg1, &arg2, arg3) ) \ + return -EFAULT + + +#warning the author of this code needs to read up on list_entry +#define DRM_GETSAREA() \ +do { \ + struct list_head *list; \ + list_for_each( list, &dev->maplist->head ) { \ + drm_map_list_t *entry = (drm_map_list_t *)list; \ + if ( entry->map && \ + entry->map->type == _DRM_SHM && \ + (entry->map->flags & _DRM_CONTAINS_LOCK) ) { \ + dev_priv->sarea = entry->map; \ + break; \ + } \ + } \ +} while (0) + +#define DRM_WAIT_ON( ret, queue, timeout, condition ) \ +do { \ + DECLARE_WAITQUEUE(entry, current); \ + unsigned long end = jiffies + (timeout); \ + add_wait_queue(&(queue), &entry); \ + \ + for (;;) { \ + set_current_state(TASK_INTERRUPTIBLE); \ + if (condition) \ + break; \ + if((signed)(end - jiffies) <= 0) { \ + ret = -EBUSY; \ + break; \ + } \ + schedule_timeout((HZ/100 > 1) ? HZ/100 : 1); \ + if (signal_pending(current)) { \ + ret = -EINTR; \ + break; \ + } \ + } \ + set_current_state(TASK_RUNNING); \ + remove_wait_queue(&(queue), &entry); \ +} while (0) + + + diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/drmP.h linux.21rc1-ac1/drivers/char/drm/drmP.h --- linux.21rc1/drivers/char/drm/drmP.h 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/drmP.h 2003-04-22 19:20:12.000000000 +0100 @@ -53,6 +53,7 @@ #include #include /* For (un)lock_kernel */ #include +#include #if defined(__alpha__) || defined(__powerpc__) #include /* For pte_wrprotect */ #endif @@ -71,10 +72,7 @@ #include #include "drm.h" -/* page_to_bus for earlier kernels, not optimal in all cases */ -#ifndef page_to_bus -#define page_to_bus(page) ((unsigned int)(virt_to_bus(page_address(page)))) -#endif +#include "drm_os_linux.h" /* DRM template customization defaults */ @@ -209,6 +207,7 @@ (unsigned long)(n),sizeof(*(ptr)))) #endif /* i386 & alpha */ #endif +#define __REALLY_HAVE_SG (__HAVE_SG) /* Begin the DRM... */ @@ -251,41 +250,58 @@ #define DRM_MAX_CTXBITMAP (PAGE_SIZE * 8) -#define VM_OFFSET(vma) ((vma)->vm_pgoff << PAGE_SHIFT) + /* Backward compatibility section */ +#ifndef minor +#define minor(x) MINOR((x)) +#endif -/* Macros to make printk easier */ +#ifndef MODULE_LICENSE +#define MODULE_LICENSE(x) +#endif -#if ( __GNUC__ > 2 ) -#define DRM_ERROR(fmt, arg...) \ - printk(KERN_ERR "[" DRM_NAME ":%s] *ERROR* " fmt , __FUNCTION__, ##arg) -#define DRM_MEM_ERROR(area, fmt, arg...) \ - printk(KERN_ERR "[" DRM_NAME ":%s:%s] *ERROR* " fmt , __FUNCTION__, \ - DRM(mem_stats)[area].name , ##arg) -#define DRM_INFO(fmt, arg...) printk(KERN_INFO "[" DRM_NAME "] " fmt , ##arg) +#ifndef pte_offset_map +#define pte_offset_map pte_offset +#define pte_unmap(pte) +#endif -#if DRM_DEBUG_CODE -#define DRM_DEBUG(fmt, arg...) \ - do { \ - if ( DRM(flags) & DRM_FLAG_DEBUG ) \ - printk(KERN_DEBUG \ - "[" DRM_NAME ":%s] " fmt , \ - __FUNCTION__, \ - ##arg); \ - } while (0) +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,4,19) +static inline struct page * vmalloc_to_page(void * vmalloc_addr) +{ + unsigned long addr = (unsigned long) vmalloc_addr; + struct page *page = NULL; + pgd_t *pgd = pgd_offset_k(addr); + pmd_t *pmd; + pte_t *ptep, pte; + + if (!pgd_none(*pgd)) { + pmd = pmd_offset(pgd, addr); + if (!pmd_none(*pmd)) { + ptep = pte_offset_map(pmd, addr); + pte = *ptep; + if (pte_present(pte)) + page = pte_page(pte); + pte_unmap(ptep); + } + } + return page; +} +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) +#define DRM_RPR_ARG(vma) #else -#define DRM_DEBUG(fmt, arg...) do { } while (0) +#define DRM_RPR_ARG(vma) vma, #endif -#else /* Gcc 2.x */ -/* Work around a C preprocessor bug */ +#define VM_OFFSET(vma) ((vma)->vm_pgoff << PAGE_SHIFT) /* Macros to make printk easier */ #define DRM_ERROR(fmt, arg...) \ - printk(KERN_ERR "[" DRM_NAME ":" __FUNCTION__ "] *ERROR* " fmt , ##arg) + printk(KERN_ERR "[" DRM_NAME ":%s] *ERROR* " fmt , __FUNCTION__ , ##arg) #define DRM_MEM_ERROR(area, fmt, arg...) \ - printk(KERN_ERR "[" DRM_NAME ":" __FUNCTION__ ":%s] *ERROR* " fmt , \ + printk(KERN_ERR "[" DRM_NAME ":%s:%s] *ERROR* " fmt , __FUNCTION__, \ DRM(mem_stats)[area].name , ##arg) #define DRM_INFO(fmt, arg...) printk(KERN_INFO "[" DRM_NAME "] " fmt , ##arg) @@ -294,16 +310,13 @@ do { \ if ( DRM(flags) & DRM_FLAG_DEBUG ) \ printk(KERN_DEBUG \ - "[" DRM_NAME ":" __FUNCTION__ "] " fmt , \ - ##arg); \ + "[" DRM_NAME ":%s] " fmt , \ + __FUNCTION__ , ##arg); \ } while (0) #else #define DRM_DEBUG(fmt, arg...) do { } while (0) #endif -#endif /* Gcc 2.x */ - - #define DRM_PROC_LIMIT (PAGE_SIZE-80) #define DRM_PROC_PRINT(fmt, arg...) \ @@ -318,6 +331,9 @@ #define DRM_IOREMAP(map) \ (map)->handle = DRM(ioremap)( (map)->offset, (map)->size ) +#define DRM_IOREMAP_NOCACHE(map) \ + (map)->handle = DRM(ioremap_nocache)((map)->offset, (map)->size) + #define DRM_IOREMAPFREE(map) \ do { \ if ( (map)->handle && (map)->size ) \ @@ -599,6 +615,17 @@ drm_map_t *map; } drm_map_list_t; +#if __HAVE_VBL_IRQ + +typedef struct drm_vbl_sig { + struct list_head head; + unsigned int sequence; + struct siginfo info; + struct task_struct *task; +} drm_vbl_sig_t; + +#endif + typedef struct drm_device { const char *name; /* Simple driver name */ char *unique; /* Unique identifier: e.g., busid */ @@ -658,6 +685,13 @@ int last_context; /* Last current context */ unsigned long last_switch; /* jiffies at last context switch */ struct tq_struct tq; +#if __HAVE_VBL_IRQ + wait_queue_head_t vbl_queue; + atomic_t vbl_received; + spinlock_t vbl_lock; + drm_vbl_sig_t vbl_sigs; + unsigned int vbl_pending; +#endif cycles_t ctx_start; cycles_t lck_start; #if __HAVE_DMA_HISTOGRAM @@ -725,16 +759,16 @@ /* Mapping support (drm_vm.h) */ extern struct page *DRM(vm_nopage)(struct vm_area_struct *vma, unsigned long address, - int unused); + int write_access); extern struct page *DRM(vm_shm_nopage)(struct vm_area_struct *vma, unsigned long address, - int unused); + int write_access); extern struct page *DRM(vm_dma_nopage)(struct vm_area_struct *vma, unsigned long address, - int unused); + int write_access); extern struct page *DRM(vm_sg_nopage)(struct vm_area_struct *vma, unsigned long address, - int unused); + int write_access); extern void DRM(vm_open)(struct vm_area_struct *vma); extern void DRM(vm_close)(struct vm_area_struct *vma); extern void DRM(vm_shm_close)(struct vm_area_struct *vma); @@ -756,6 +790,7 @@ extern void DRM(free_pages)(unsigned long address, int order, int area); extern void *DRM(ioremap)(unsigned long offset, unsigned long size); +extern void *DRM(ioremap_nocache)(unsigned long offset, unsigned long size); extern void DRM(ioremapfree)(void *pt, unsigned long size); #if __REALLY_HAVE_AGP @@ -885,6 +920,15 @@ extern int DRM(irq_uninstall)( drm_device_t *dev ); extern void DRM(dma_service)( int irq, void *device, struct pt_regs *regs ); +extern void DRM(driver_irq_preinstall)( drm_device_t *dev ); +extern void DRM(driver_irq_postinstall)( drm_device_t *dev ); +extern void DRM(driver_irq_uninstall)( drm_device_t *dev ); +#if __HAVE_VBL_IRQ +extern int DRM(wait_vblank)(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg); +extern int DRM(vblank_wait)(drm_device_t *dev, unsigned int *vbl_seq); +extern void DRM(vbl_send_signals)( drm_device_t *dev ); +#endif #if __HAVE_DMA_IRQ_BH extern void DRM(dma_immediate_bh)( void *dev ); #endif diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/drm_proc.h linux.21rc1-ac1/drivers/char/drm/drm_proc.h --- linux.21rc1/drivers/char/drm/drm_proc.h 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/drm_proc.h 2003-04-22 19:20:12.000000000 +0100 @@ -147,10 +147,10 @@ *eof = 0; if (dev->unique) { - DRM_PROC_PRINT("%s 0x%x %s\n", - dev->name, dev->device, dev->unique); + DRM_PROC_PRINT("%s 0x%lx %s\n", + dev->name, (long)dev->device, dev->unique); } else { - DRM_PROC_PRINT("%s 0x%x\n", dev->name, dev->device); + DRM_PROC_PRINT("%s 0x%lx\n", dev->name, (long)dev->device); } if (len > request + offset) return request; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/drm_sarea.h linux.21rc1-ac1/drivers/char/drm/drm_sarea.h --- linux.21rc1/drivers/char/drm/drm_sarea.h 1970-01-01 01:00:00.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/drm_sarea.h 2003-04-22 16:44:36.000000000 +0100 @@ -0,0 +1,57 @@ +/* sarea.h -- SAREA definitions -*- linux-c -*- + * + * Copyright 2002 Tungsten Graphics, Inc., Cedar Park, Texas. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Michel Dänzer + */ + +#ifndef _DRM_SAREA_H_ +#define _DRM_SAREA_H_ + +#define SAREA_MAX_DRAWABLES 256 + +typedef struct _drm_sarea_drawable_t { + unsigned int stamp; + unsigned int flags; +} drm_sarea_drawable_t; + +typedef struct _dri_sarea_frame_t { + unsigned int x; + unsigned int y; + unsigned int width; + unsigned int height; + unsigned int fullscreen; +} drm_sarea_frame_t; + +typedef struct _drm_sarea_t { + /* first thing is always the drm locking structure */ + drm_hw_lock_t lock; + /* NOT_DONE: Use readers/writer lock for drawable_lock */ + drm_hw_lock_t drawable_lock; + drm_sarea_drawable_t drawableTable[SAREA_MAX_DRAWABLES]; + drm_sarea_frame_t frame; + drm_context_t dummy_context; +} drm_sarea_t; + +#endif /* _DRM_SAREA_H_ */ diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/drm_stub.h linux.21rc1-ac1/drivers/char/drm/drm_stub.h --- linux.21rc1/drivers/char/drm/drm_stub.h 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/drm_stub.h 2003-04-22 19:20:12.000000000 +0100 @@ -48,7 +48,7 @@ static int DRM(stub_open)(struct inode *inode, struct file *filp) { - int minor = MINOR(inode->i_rdev); + int minor = minor(inode->i_rdev); int err = -ENODEV; struct file_operations *old_fops; @@ -65,8 +65,8 @@ } static struct file_operations DRM(stub_fops) = { - owner: THIS_MODULE, - open: DRM(stub_open) + .owner = THIS_MODULE, + .open = DRM(stub_open) }; static int DRM(stub_getminor)(const char *name, struct file_operations *fops, diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/drm_vm.h linux.21rc1-ac1/drivers/char/drm/drm_vm.h --- linux.21rc1/drivers/char/drm/drm_vm.h 2003-04-22 16:39:34.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/drm_vm.h 2003-04-22 19:20:12.000000000 +0100 @@ -57,7 +57,7 @@ struct page *DRM(vm_nopage)(struct vm_area_struct *vma, unsigned long address, - int unused) + int write_access) { #if __REALLY_HAVE_AGP drm_file_t *priv = vma->vm_file->private_data; @@ -70,7 +70,7 @@ * Find the right map */ - if(!dev->agp->cant_use_aperture) goto vm_nopage_error; + if(!dev->agp || !dev->agp->cant_use_aperture) goto vm_nopage_error; list_for_each(list, &dev->maplist->head) { r_list = (drm_map_list_t *)list; @@ -141,9 +141,7 @@ return NOPAGE_OOM; get_page(page); -#if 0 /* XXX page_to_bus is not a portable interface available on all platforms. */ - DRM_DEBUG("0x%08lx => 0x%08llx\n", address, (u64)page_to_bus(page)); -#endif + DRM_DEBUG("shm_nopage 0x%lx\n", address); return page; } @@ -245,10 +243,7 @@ get_page(page); -#if 0 /* XXX page_to_bus is not a portable interface available on all platforms. */ - DRM_DEBUG("0x%08lx (page %lu) => 0x%08llx\n", address, page_nr, - (u64)page_to_bus(page)); -#endif + DRM_DEBUG("dma_nopage 0x%lx (page %lu)\n", address, page_nr); return page; } @@ -449,12 +444,12 @@ } offset = DRIVER_GET_REG_OFS(); #ifdef __sparc__ - if (io_remap_page_range(vma->vm_start, + if (io_remap_page_range(DRM_RPR_ARG(vma) vma->vm_start, VM_OFFSET(vma) + offset, vma->vm_end - vma->vm_start, vma->vm_page_prot, 0)) #else - if (remap_page_range(vma->vm_start, + if (remap_page_range(DRM_RPR_ARG(vma) vma->vm_start, VM_OFFSET(vma) + offset, vma->vm_end - vma->vm_start, vma->vm_page_prot)) diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/gamma_dma.c linux.21rc1-ac1/drivers/char/drm/gamma_dma.c --- linux.21rc1/drivers/char/drm/gamma_dma.c 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/gamma_dma.c 2003-04-22 16:44:36.000000000 +0100 @@ -31,33 +31,32 @@ #include "gamma.h" #include "drmP.h" +#include "drm.h" +#include "gamma_drm.h" #include "gamma_drv.h" #include /* For task queue support */ #include - static inline void gamma_dma_dispatch(drm_device_t *dev, unsigned long address, unsigned long length) { drm_gamma_private_t *dev_priv = - (drm_gamma_private_t *)dev->dev_private; - - GAMMA_WRITE(GAMMA_DMAADDRESS, virt_to_phys((void *)address)); - while (GAMMA_READ(GAMMA_GCOMMANDSTATUS) != 4) - ; + (drm_gamma_private_t *)dev->dev_private; + mb(); + while ( GAMMA_READ(GAMMA_INFIFOSPACE) < 2) cpu_relax(); + GAMMA_WRITE(GAMMA_DMAADDRESS, address); + while (GAMMA_READ(GAMMA_GCOMMANDSTATUS) != 4) cpu_relax(); GAMMA_WRITE(GAMMA_DMACOUNT, length / 4); } void gamma_dma_quiescent_single(drm_device_t *dev) { drm_gamma_private_t *dev_priv = - (drm_gamma_private_t *)dev->dev_private; + (drm_gamma_private_t *)dev->dev_private; + while (GAMMA_READ(GAMMA_DMACOUNT)) cpu_relax(); - while (GAMMA_READ(GAMMA_DMACOUNT)) - ; - while (GAMMA_READ(GAMMA_INFIFOSPACE) < 3) - ; + while (GAMMA_READ(GAMMA_INFIFOSPACE) < 2) cpu_relax(); GAMMA_WRITE(GAMMA_FILTERMODE, 1 << 10); GAMMA_WRITE(GAMMA_SYNC, 0); @@ -71,56 +70,50 @@ void gamma_dma_quiescent_dual(drm_device_t *dev) { drm_gamma_private_t *dev_priv = - (drm_gamma_private_t *)dev->dev_private; + (drm_gamma_private_t *)dev->dev_private; + while (GAMMA_READ(GAMMA_DMACOUNT)) cpu_relax(); - while (GAMMA_READ(GAMMA_DMACOUNT)) - ; - while (GAMMA_READ(GAMMA_INFIFOSPACE) < 3) - ; + while (GAMMA_READ(GAMMA_INFIFOSPACE) < 3) cpu_relax(); GAMMA_WRITE(GAMMA_BROADCASTMASK, 3); - GAMMA_WRITE(GAMMA_FILTERMODE, 1 << 10); GAMMA_WRITE(GAMMA_SYNC, 0); - /* Read from first MX */ + /* Read from first MX */ do { - while (!GAMMA_READ(GAMMA_OUTFIFOWORDS)) - ; + while (!GAMMA_READ(GAMMA_OUTFIFOWORDS)) cpu_relax(); } while (GAMMA_READ(GAMMA_OUTPUTFIFO) != GAMMA_SYNC_TAG); - /* Read from second MX */ + /* Read from second MX */ do { - while (!GAMMA_READ(GAMMA_OUTFIFOWORDS + 0x10000)) - ; + while (!GAMMA_READ(GAMMA_OUTFIFOWORDS + 0x10000)) cpu_relax(); } while (GAMMA_READ(GAMMA_OUTPUTFIFO + 0x10000) != GAMMA_SYNC_TAG); } void gamma_dma_ready(drm_device_t *dev) { drm_gamma_private_t *dev_priv = - (drm_gamma_private_t *)dev->dev_private; - - while (GAMMA_READ(GAMMA_DMACOUNT)) - ; + (drm_gamma_private_t *)dev->dev_private; + while (GAMMA_READ(GAMMA_DMACOUNT)) cpu_relax(); } static inline int gamma_dma_is_ready(drm_device_t *dev) { drm_gamma_private_t *dev_priv = - (drm_gamma_private_t *)dev->dev_private; - - return !GAMMA_READ(GAMMA_DMACOUNT); + (drm_gamma_private_t *)dev->dev_private; + return(!GAMMA_READ(GAMMA_DMACOUNT)); } void gamma_dma_service(int irq, void *device, struct pt_regs *regs) { - drm_device_t *dev = (drm_device_t *)device; - drm_device_dma_t *dma = dev->dma; + drm_device_t *dev = (drm_device_t *)device; + drm_device_dma_t *dma = dev->dma; drm_gamma_private_t *dev_priv = - (drm_gamma_private_t *)dev->dev_private; + (drm_gamma_private_t *)dev->dev_private; atomic_inc(&dev->counts[6]); /* _DRM_STAT_IRQ */ + + while (GAMMA_READ(GAMMA_INFIFOSPACE) < 3) cpu_relax(); GAMMA_WRITE(GAMMA_GDELAYTIMER, 0xc350/2); /* 0x05S */ GAMMA_WRITE(GAMMA_GCOMMANDINTFLAGS, 8); GAMMA_WRITE(GAMMA_GINTFLAGS, 0x2001); @@ -164,7 +157,9 @@ } buf = dma->next_buffer; - address = (unsigned long)buf->address; + /* WE NOW ARE ON LOGICAL PAGES!! - using page table setup in dma_init */ + /* So we pass the buffer index value into the physical page offset */ + address = buf->idx << 12; length = buf->used; DRM_DEBUG("context %d, buffer %d (%ld bytes)\n", @@ -231,6 +226,9 @@ buf->time_dispatched = get_cycles(); #endif + /* WE NOW ARE ON LOGICAL PAGES!!! - overriding address */ + address = buf->idx << 12; + gamma_dma_dispatch(dev, address, length); gamma_free_buffer(dev, dma->this_buffer); dma->this_buffer = buf; @@ -523,11 +521,11 @@ } } if (retcode) { - DRM_ERROR("ctx%d w%d p%d c%d i%d l%d %d/%d\n", + DRM_ERROR("ctx%d w%d p%d c%ld i%d l%d %d/%d\n", d->context, last_buf->waiting, last_buf->pending, - DRM_WAITCOUNT(dev, d->context), + (long)DRM_WAITCOUNT(dev, d->context), last_buf->idx, last_buf->list, last_buf->pid, @@ -581,3 +579,267 @@ return retcode; } + +/* ============================================================= + * DMA initialization, cleanup + */ + +static int gamma_do_init_dma( drm_device_t *dev, drm_gamma_init_t *init ) +{ + drm_gamma_private_t *dev_priv; + drm_device_dma_t *dma = dev->dma; + drm_buf_t *buf; + int i; + struct list_head *list; + unsigned long *pgt; + + DRM_DEBUG( "%s\n", __FUNCTION__ ); + + dev_priv = DRM(alloc)( sizeof(drm_gamma_private_t), + DRM_MEM_DRIVER ); + if ( !dev_priv ) + return -ENOMEM; + + dev->dev_private = (void *)dev_priv; + + memset( dev_priv, 0, sizeof(drm_gamma_private_t) ); + + list_for_each(list, &dev->maplist->head) { + #warning list_entry() is needed here + drm_map_list_t *r_list = (drm_map_list_t *)list; + if( r_list->map && + r_list->map->type == _DRM_SHM && + r_list->map->flags & _DRM_CONTAINS_LOCK ) { + dev_priv->sarea = r_list->map; + break; + } + } + + DRM_FIND_MAP( dev_priv->mmio0, init->mmio0 ); + DRM_FIND_MAP( dev_priv->mmio1, init->mmio1 ); + DRM_FIND_MAP( dev_priv->mmio2, init->mmio2 ); + DRM_FIND_MAP( dev_priv->mmio3, init->mmio3 ); + + dev_priv->sarea_priv = (drm_gamma_sarea_t *) + ((u8 *)dev_priv->sarea->handle + + init->sarea_priv_offset); + + if (init->pcimode) { + buf = dma->buflist[GLINT_DRI_BUF_COUNT]; + pgt = buf->address; + + for (i = 0; i < GLINT_DRI_BUF_COUNT; i++) { + buf = dma->buflist[i]; + *pgt = virt_to_phys((void*)buf->address) | 0x07; + pgt++; + } + + buf = dma->buflist[GLINT_DRI_BUF_COUNT]; + } else { + DRM_FIND_MAP( dev_priv->buffers, init->buffers_offset ); + + DRM_IOREMAP( dev_priv->buffers ); + + buf = dma->buflist[GLINT_DRI_BUF_COUNT]; + pgt = buf->address; + + for (i = 0; i < GLINT_DRI_BUF_COUNT; i++) { + buf = dma->buflist[i]; + *pgt = (unsigned long)buf->address + 0x07; + pgt++; + } + + buf = dma->buflist[GLINT_DRI_BUF_COUNT]; + + while (GAMMA_READ(GAMMA_INFIFOSPACE) < 1) cpu_relax(); + GAMMA_WRITE( GAMMA_GDMACONTROL, 0xe) ; + } + while (GAMMA_READ(GAMMA_INFIFOSPACE) < 2); cpu_relax(); + GAMMA_WRITE( GAMMA_PAGETABLEADDR, virt_to_phys((void*)buf->address) ); + GAMMA_WRITE( GAMMA_PAGETABLELENGTH, 2 ); + + return 0; +} + +int gamma_do_cleanup_dma( drm_device_t *dev ) +{ + DRM_DEBUG( "%s\n", __FUNCTION__ ); + + if ( dev->dev_private ) { + drm_gamma_private_t *dev_priv = dev->dev_private; + + DRM_IOREMAPFREE( dev_priv->buffers ); + + DRM(free)( dev->dev_private, sizeof(drm_gamma_private_t), + DRM_MEM_DRIVER ); + dev->dev_private = NULL; + } + + return 0; +} + +int gamma_dma_init( struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg ) +{ + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + drm_gamma_init_t init; + + if ( copy_from_user( &init, (drm_gamma_init_t *)arg, sizeof(init) ) ) + return -EFAULT; + + switch ( init.func ) { + case GAMMA_INIT_DMA: + return gamma_do_init_dma( dev, &init ); + case GAMMA_CLEANUP_DMA: + return gamma_do_cleanup_dma( dev ); + } + + return -EINVAL; +} + +static int gamma_do_copy_dma( drm_device_t *dev, drm_gamma_copy_t *copy ) +{ + drm_device_dma_t *dma = dev->dma; + unsigned int *screenbuf; + + DRM_DEBUG( "%s\n", __FUNCTION__ ); + + /* We've DRM_RESTRICTED this DMA buffer */ + + screenbuf = dma->buflist[ GLINT_DRI_BUF_COUNT + 1 ]->address; + +#if 0 + *buffer++ = 0x180; /* Tag (FilterMode) */ + *buffer++ = 0x200; /* Allow FBColor through */ + *buffer++ = 0x53B; /* Tag */ + *buffer++ = copy->Pitch; + *buffer++ = 0x53A; /* Tag */ + *buffer++ = copy->SrcAddress; + *buffer++ = 0x539; /* Tag */ + *buffer++ = copy->WidthHeight; /* Initiates transfer */ + *buffer++ = 0x53C; /* Tag - DMAOutputAddress */ + *buffer++ = virt_to_phys((void*)screenbuf); + *buffer++ = 0x53D; /* Tag - DMAOutputCount */ + *buffer++ = copy->Count; /* Reads HostOutFifo BLOCKS until ..*/ + + /* Data now sitting in dma->buflist[ GLINT_DRI_BUF_COUNT + 1 ] */ + /* Now put it back to the screen */ + + *buffer++ = 0x180; /* Tag (FilterMode) */ + *buffer++ = 0x400; /* Allow Sync through */ + *buffer++ = 0x538; /* Tag - DMARectangleReadTarget */ + *buffer++ = 0x155; /* FBSourceData | count */ + *buffer++ = 0x537; /* Tag */ + *buffer++ = copy->Pitch; + *buffer++ = 0x536; /* Tag */ + *buffer++ = copy->DstAddress; + *buffer++ = 0x535; /* Tag */ + *buffer++ = copy->WidthHeight; /* Initiates transfer */ + *buffer++ = 0x530; /* Tag - DMAAddr */ + *buffer++ = virt_to_phys((void*)screenbuf); + *buffer++ = 0x531; + *buffer++ = copy->Count; /* initiates DMA transfer of color data */ +#endif + + /* need to dispatch it now */ + + return 0; +} + +int gamma_dma_copy( struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg ) +{ + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + drm_gamma_copy_t copy; + + if ( copy_from_user( ©, (drm_gamma_copy_t *)arg, sizeof(copy) ) ) + return -EFAULT; + + return gamma_do_copy_dma( dev, © ); +} + +/* ============================================================= + * Per Context SAREA Support + */ + +int gamma_getsareactx(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg) +{ + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + drm_ctx_priv_map_t request; + drm_map_t *map; + + if (copy_from_user(&request, + (drm_ctx_priv_map_t *)arg, + sizeof(request))) + return -EFAULT; + + down(&dev->struct_sem); + if ((int)request.ctx_id >= dev->max_context) { + up(&dev->struct_sem); + return -EINVAL; + } + + map = dev->context_sareas[request.ctx_id]; + up(&dev->struct_sem); + + request.handle = map->handle; + if (copy_to_user((drm_ctx_priv_map_t *)arg, &request, sizeof(request))) + return -EFAULT; + return 0; +} + +int gamma_setsareactx(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg) +{ + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + drm_ctx_priv_map_t request; + drm_map_t *map = NULL; + drm_map_list_t *r_list; + struct list_head *list; + + if (copy_from_user(&request, + (drm_ctx_priv_map_t *)arg, + sizeof(request))) + return -EFAULT; + + down(&dev->struct_sem); + r_list = NULL; + list_for_each(list, &dev->maplist->head) { + r_list = (drm_map_list_t *)list; + if(r_list->map && + r_list->map->handle == request.handle) break; + } + if (list == &(dev->maplist->head)) { + up(&dev->struct_sem); + return -EINVAL; + } + map = r_list->map; + up(&dev->struct_sem); + + if (!map) return -EINVAL; + + down(&dev->struct_sem); + if ((int)request.ctx_id >= dev->max_context) { + up(&dev->struct_sem); + return -EINVAL; + } + dev->context_sareas[request.ctx_id] = map; + up(&dev->struct_sem); + return 0; +} + +/* drm_dma.h hooks +*/ +void DRM(driver_irq_preinstall)( drm_device_t *dev ) { +} + +void DRM(driver_irq_postinstall)( drm_device_t *dev ) { +} + +void DRM(driver_irq_uninstall)( drm_device_t *dev ) { +} diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/gamma_drm.h linux.21rc1-ac1/drivers/char/drm/gamma_drm.h --- linux.21rc1/drivers/char/drm/gamma_drm.h 1970-01-01 01:00:00.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/gamma_drm.h 2003-04-22 16:44:36.000000000 +0100 @@ -0,0 +1,89 @@ +#ifndef _GAMMA_DRM_H_ +#define _GAMMA_DRM_H_ + +typedef struct _drm_gamma_tex_region { + unsigned char next, prev; /* indices to form a circular LRU */ + unsigned char in_use; /* owned by a client, or free? */ + int age; /* tracked by clients to update local LRU's */ +} drm_gamma_tex_region_t; + +typedef struct { + unsigned int GDeltaMode; + unsigned int GDepthMode; + unsigned int GGeometryMode; + unsigned int GTransformMode; +} drm_gamma_context_regs_t; + +typedef struct _drm_gamma_sarea { + drm_gamma_context_regs_t context_state; + + unsigned int dirty; + + + /* Maintain an LRU of contiguous regions of texture space. If + * you think you own a region of texture memory, and it has an + * age different to the one you set, then you are mistaken and + * it has been stolen by another client. If global texAge + * hasn't changed, there is no need to walk the list. + * + * These regions can be used as a proxy for the fine-grained + * texture information of other clients - by maintaining them + * in the same lru which is used to age their own textures, + * clients have an approximate lru for the whole of global + * texture space, and can make informed decisions as to which + * areas to kick out. There is no need to choose whether to + * kick out your own texture or someone else's - simply eject + * them all in LRU order. + */ + +#define GAMMA_NR_TEX_REGIONS 64 + drm_gamma_tex_region_t texList[GAMMA_NR_TEX_REGIONS+1]; + /* Last elt is sentinal */ + int texAge; /* last time texture was uploaded */ + int last_enqueue; /* last time a buffer was enqueued */ + int last_dispatch; /* age of the most recently dispatched buffer */ + int last_quiescent; /* */ + int ctxOwner; /* last context to upload state */ + + int vertex_prim; +} drm_gamma_sarea_t; + +/* WARNING: If you change any of these defines, make sure to wear a bullet + * proof vest because these are part of the stable kernel<->userspace ABI + */ + +/* Gamma specific ioctls + * The device specific ioctl range is 0x40 to 0x79. + */ +#define DRM_IOCTL_GAMMA_INIT DRM_IOW( 0x40, drm_gamma_init_t) +#define DRM_IOCTL_GAMMA_COPY DRM_IOW( 0x41, drm_gamma_copy_t) + +typedef struct drm_gamma_copy { + unsigned int DMAOutputAddress; + unsigned int DMAOutputCount; + unsigned int DMAReadGLINTSource; + unsigned int DMARectangleWriteAddress; + unsigned int DMARectangleWriteLinePitch; + unsigned int DMARectangleWrite; + unsigned int DMARectangleReadAddress; + unsigned int DMARectangleReadLinePitch; + unsigned int DMARectangleRead; + unsigned int DMARectangleReadTarget; +} drm_gamma_copy_t; + +typedef struct drm_gamma_init { + enum { + GAMMA_INIT_DMA = 0x01, + GAMMA_CLEANUP_DMA = 0x02 + } func; + + int sarea_priv_offset; + int pcimode; + unsigned int mmio0; + unsigned int mmio1; + unsigned int mmio2; + unsigned int mmio3; + unsigned int buffers_offset; +} drm_gamma_init_t; + +#endif /* _GAMMA_DRM_H_ */ diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/gamma_drv.c linux.21rc1-ac1/drivers/char/drm/gamma_drv.c --- linux.21rc1/drivers/char/drm/gamma_drv.c 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/gamma_drv.c 2003-04-22 16:44:36.000000000 +0100 @@ -32,57 +32,18 @@ #include #include "gamma.h" #include "drmP.h" +#include "drm.h" +#include "gamma_drm.h" #include "gamma_drv.h" -#define DRIVER_AUTHOR "VA Linux Systems Inc." - -#define DRIVER_NAME "gamma" -#define DRIVER_DESC "3DLabs gamma" -#define DRIVER_DATE "20010216" - -#define DRIVER_MAJOR 1 -#define DRIVER_MINOR 0 -#define DRIVER_PATCHLEVEL 0 - -#define DRIVER_IOCTLS \ - [DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { gamma_dma, 1, 0 } - - -#define __HAVE_COUNTERS 5 -#define __HAVE_COUNTER6 _DRM_STAT_IRQ -#define __HAVE_COUNTER7 _DRM_STAT_DMA -#define __HAVE_COUNTER8 _DRM_STAT_PRIMARY -#define __HAVE_COUNTER9 _DRM_STAT_SPECIAL -#define __HAVE_COUNTER10 _DRM_STAT_MISSED - - #include "drm_auth.h" +#include "drm_agpsupport.h" #include "drm_bufs.h" #include "drm_context.h" #include "drm_dma.h" #include "drm_drawable.h" #include "drm_drv.h" -#ifndef MODULE -/* DRM(options) is called by the kernel to parse command-line options - * passed via the boot-loader (e.g., LILO). It calls the insmod option - * routine, drm_parse_drm. - */ - -/* JH- We have to hand expand the string ourselves because of the cpp. If - * anyone can think of a way that we can fit into the __setup macro without - * changing it, then please send the solution my way. - */ -static int __init gamma_options( char *str ) -{ - DRM(parse_options)( str ); - return 1; -} - -__setup( DRIVER_NAME "=", gamma_options ); -#endif - - #include "drm_fops.h" #include "drm_init.h" #include "drm_ioctl.h" diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/gamma_drv.h linux.21rc1-ac1/drivers/char/drm/gamma_drv.h --- linux.21rc1/drivers/char/drm/gamma_drv.h 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/gamma_drv.h 2003-04-22 16:44:36.000000000 +0100 @@ -32,8 +32,9 @@ #ifndef _GAMMA_DRV_H_ #define _GAMMA_DRV_H_ - typedef struct drm_gamma_private { + drm_gamma_sarea_t *sarea_priv; + drm_map_t *sarea; drm_map_t *buffers; drm_map_t *mmio0; drm_map_t *mmio1; @@ -51,6 +52,11 @@ } \ } while (0) + /* gamma_dma.c */ +extern int gamma_dma_init( struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg ); +extern int gamma_dma_copy( struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg ); extern void gamma_dma_ready(drm_device_t *dev); extern void gamma_dma_quiescent_single(drm_device_t *dev); @@ -63,6 +69,7 @@ extern int gamma_find_devices(void); extern int gamma_found(void); +#define GLINT_DRI_BUF_COUNT 256 #define GAMMA_OFF(reg) \ ((reg < 0x1000) \ @@ -78,7 +85,6 @@ ((reg < 0x10000) ? dev_priv->mmio1->handle : \ ((reg < 0x11000) ? dev_priv->mmio2->handle : \ dev_priv->mmio3->handle)))) - #define GAMMA_ADDR(reg) (GAMMA_BASE(reg) + GAMMA_OFF(reg)) #define GAMMA_DEREF(reg) *(__volatile__ int *)GAMMA_ADDR(reg) #define GAMMA_READ(reg) GAMMA_DEREF(reg) @@ -91,9 +97,11 @@ #define GAMMA_FILTERMODE 0x8c00 #define GAMMA_GCOMMANDINTFLAGS 0x0c50 #define GAMMA_GCOMMANDMODE 0x0c40 +#define GAMMA_QUEUED_DMA_MODE 1<<1 #define GAMMA_GCOMMANDSTATUS 0x0c60 #define GAMMA_GDELAYTIMER 0x0c38 #define GAMMA_GDMACONTROL 0x0060 +#define GAMMA_USE_AGP 1<<1 #define GAMMA_GINTENABLE 0x0808 #define GAMMA_GINTFLAGS 0x0810 #define GAMMA_INFIFOSPACE 0x0018 @@ -101,5 +109,12 @@ #define GAMMA_OUTPUTFIFO 0x2000 #define GAMMA_SYNC 0x8c40 #define GAMMA_SYNC_TAG 0x0188 +#define GAMMA_PAGETABLEADDR 0x0C00 +#define GAMMA_PAGETABLELENGTH 0x0C08 + +#define GAMMA_PASSTHROUGH 0x1FE +#define GAMMA_DMAADDRTAG 0x530 +#define GAMMA_DMACOUNTTAG 0x531 +#define GAMMA_COMMANDINTTAG 0x532 #endif diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/gamma.h linux.21rc1-ac1/drivers/char/drm/gamma.h --- linux.21rc1/drivers/char/drm/gamma.h 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/gamma.h 2003-04-22 16:44:36.000000000 +0100 @@ -38,9 +38,36 @@ */ #define __HAVE_MTRR 1 +#define DRIVER_AUTHOR "VA Linux Systems Inc." + +#define DRIVER_NAME "gamma" +#define DRIVER_DESC "3DLabs gamma" +#define DRIVER_DATE "20010624" + +#define DRIVER_MAJOR 2 +#define DRIVER_MINOR 0 +#define DRIVER_PATCHLEVEL 0 + +#define DRIVER_IOCTLS \ + [DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { gamma_dma, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_GAMMA_INIT)] = { gamma_dma_init, 1, 1 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_GAMMA_COPY)] = { gamma_dma_copy, 1, 1 } + +#define IOCTL_TABLE_NAME DRM(ioctls) +#define IOCTL_FUNC_NAME DRM(ioctl) + +#define __HAVE_COUNTERS 5 +#define __HAVE_COUNTER6 _DRM_STAT_IRQ +#define __HAVE_COUNTER7 _DRM_STAT_DMA +#define __HAVE_COUNTER8 _DRM_STAT_PRIMARY +#define __HAVE_COUNTER9 _DRM_STAT_SPECIAL +#define __HAVE_COUNTER10 _DRM_STAT_MISSED + /* DMA customization: */ #define __HAVE_DMA 1 +#define __HAVE_AGP 1 +#define __MUST_HAVE_AGP 0 #define __HAVE_OLD_DMA 1 #define __HAVE_PCI_DMA 1 @@ -61,33 +88,61 @@ #define __HAVE_DMA_QUIESCENT 1 #define DRIVER_DMA_QUIESCENT() do { \ /* FIXME ! */ \ - gamma_dma_quiescent_dual(dev); \ + gamma_dma_quiescent_single(dev); \ return 0; \ } while (0) #define __HAVE_DMA_IRQ 1 #define __HAVE_DMA_IRQ_BH 1 + +#if 1 #define DRIVER_PREINSTALL() do { \ drm_gamma_private_t *dev_priv = \ (drm_gamma_private_t *)dev->dev_private;\ - GAMMA_WRITE( GAMMA_GCOMMANDMODE, 0x00000000 ); \ + while(GAMMA_READ(GAMMA_INFIFOSPACE) < 2) cpu_relax(); \ + GAMMA_WRITE( GAMMA_GCOMMANDMODE, 0x00000004 ); \ GAMMA_WRITE( GAMMA_GDMACONTROL, 0x00000000 ); \ } while (0) - #define DRIVER_POSTINSTALL() do { \ drm_gamma_private_t *dev_priv = \ (drm_gamma_private_t *)dev->dev_private;\ + while(GAMMA_READ(GAMMA_INFIFOSPACE) < 2) cpu_relax(); \ + while(GAMMA_READ(GAMMA_INFIFOSPACE) < 3) cpu_relax(); \ GAMMA_WRITE( GAMMA_GINTENABLE, 0x00002001 ); \ GAMMA_WRITE( GAMMA_COMMANDINTENABLE, 0x00000008 ); \ GAMMA_WRITE( GAMMA_GDELAYTIMER, 0x00039090 ); \ } while (0) +#else +#define DRIVER_POSTINSTALL() do { \ + drm_gamma_private_t *dev_priv = \ + (drm_gamma_private_t *)dev->dev_private;\ + while(GAMMA_READ(GAMMA_INFIFOSPACE) < 2) cpu_relax(); \ + while(GAMMA_READ(GAMMA_INFIFOSPACE) < 2) cpu_relax(); \ + GAMMA_WRITE( GAMMA_GINTENABLE, 0x00002000 ); \ + GAMMA_WRITE( GAMMA_COMMANDINTENABLE, 0x00000004 ); \ +} while (0) + +#define DRIVER_PREINSTALL() do { \ + drm_gamma_private_t *dev_priv = \ + (drm_gamma_private_t *)dev->dev_private;\ + while(GAMMA_READ(GAMMA_INFIFOSPACE) < 2) cpu_relax(); \ + while(GAMMA_READ(GAMMA_INFIFOSPACE) < 2) cpu_relax(); \ + GAMMA_WRITE( GAMMA_GCOMMANDMODE, GAMMA_QUEUED_DMA_MODE );\ + GAMMA_WRITE( GAMMA_GDMACONTROL, 0x00000000 );\ +} while (0) +#endif #define DRIVER_UNINSTALL() do { \ drm_gamma_private_t *dev_priv = \ (drm_gamma_private_t *)dev->dev_private;\ + while(GAMMA_READ(GAMMA_INFIFOSPACE) < 2) cpu_relax(); \ + while(GAMMA_READ(GAMMA_INFIFOSPACE) < 3) cpu_relax(); \ GAMMA_WRITE( GAMMA_GDELAYTIMER, 0x00000000 ); \ GAMMA_WRITE( GAMMA_COMMANDINTENABLE, 0x00000000 ); \ GAMMA_WRITE( GAMMA_GINTENABLE, 0x00000000 ); \ } while (0) +#define DRIVER_AGP_BUFFERS_MAP( dev ) \ + ((drm_gamma_private_t *)((dev)->dev_private))->buffers + #endif /* __GAMMA_H__ */ diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/i810_dma.c linux.21rc1-ac1/drivers/char/drm/i810_dma.c --- linux.21rc1/drivers/char/drm/i810_dma.c 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/i810_dma.c 2003-04-22 16:44:36.000000000 +0100 @@ -26,21 +26,20 @@ * * Authors: Rickard E. (Rik) Faith * Jeff Hartmann - * Keith Whitwell + * Keith Whitwell * */ #include #include "i810.h" #include "drmP.h" +#include "drm.h" +#include "i810_drm.h" #include "i810_drv.h" #include /* For task queue support */ -#include +#include -/* in case we don't have a 2.3.99-pre6 kernel or later: */ -#ifndef VM_DONTCOPY -#define VM_DONTCOPY 0 -#endif +#define DO_MUNMAP(m, a, l) do_munmap(m, a, l, 1) #define I810_BUF_FREE 2 #define I810_BUF_CLIENT 1 @@ -51,29 +50,27 @@ #define RING_LOCALS unsigned int outring, ringmask; volatile char *virt; -#define BEGIN_LP_RING(n) do { \ - if (I810_VERBOSE) \ - DRM_DEBUG("BEGIN_LP_RING(%d) in %s\n", \ - n, __FUNCTION__); \ - if (dev_priv->ring.space < n*4) \ - i810_wait_ring(dev, n*4); \ - dev_priv->ring.space -= n*4; \ - outring = dev_priv->ring.tail; \ - ringmask = dev_priv->ring.tail_mask; \ - virt = dev_priv->ring.virtual_start; \ +#define BEGIN_LP_RING(n) do { \ + if (0) DRM_DEBUG("BEGIN_LP_RING(%d) in %s\n", n, __FUNCTION__); \ + if (dev_priv->ring.space < n*4) \ + i810_wait_ring(dev, n*4); \ + dev_priv->ring.space -= n*4; \ + outring = dev_priv->ring.tail; \ + ringmask = dev_priv->ring.tail_mask; \ + virt = dev_priv->ring.virtual_start; \ } while (0) -#define ADVANCE_LP_RING() do { \ - if (I810_VERBOSE) DRM_DEBUG("ADVANCE_LP_RING\n"); \ - dev_priv->ring.tail = outring; \ - I810_WRITE(LP_RING + RING_TAIL, outring); \ +#define ADVANCE_LP_RING() do { \ + if (0) DRM_DEBUG("ADVANCE_LP_RING\n"); \ + dev_priv->ring.tail = outring; \ + I810_WRITE(LP_RING + RING_TAIL, outring); \ } while(0) -#define OUT_RING(n) do { \ - if (I810_VERBOSE) DRM_DEBUG(" OUT_RING %x\n", (int)(n)); \ - *(volatile unsigned int *)(virt + outring) = n; \ - outring += 4; \ - outring &= ringmask; \ +#define OUT_RING(n) do { \ + if (0) DRM_DEBUG(" OUT_RING %x\n", (int)(n)); \ + *(volatile unsigned int *)(virt + outring) = n; \ + outring += 4; \ + outring &= ringmask; \ } while (0) static inline void i810_print_status_page(drm_device_t *dev) @@ -135,14 +132,14 @@ } static struct file_operations i810_buffer_fops = { - open: DRM(open), - flush: DRM(flush), - release: DRM(release), - ioctl: DRM(ioctl), - mmap: i810_mmap_buffers, - read: DRM(read), - fasync: DRM(fasync), - poll: DRM(poll), + .open = DRM(open), + .flush = DRM(flush), + .release = DRM(release), + .ioctl = DRM(ioctl), + .mmap = i810_mmap_buffers, + .read = DRM(read), + .fasync = DRM(fasync), + .poll = DRM(poll), }; int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma) @@ -165,7 +162,7 @@ buf_priv->currently_mapped = I810_BUF_MAPPED; unlock_kernel(); - if (remap_page_range(vma->vm_start, + if (remap_page_range(DRM_RPR_ARG(vma) vma->vm_start, VM_OFFSET(vma), vma->vm_end - vma->vm_start, vma->vm_page_prot)) return -EAGAIN; @@ -183,28 +180,31 @@ if(buf_priv->currently_mapped == I810_BUF_MAPPED) return -EINVAL; - if(VM_DONTCOPY != 0) { - down_write( ¤t->mm->mmap_sem ); - old_fops = filp->f_op; - filp->f_op = &i810_buffer_fops; - dev_priv->mmap_buffer = buf; - buf_priv->virtual = (void *)do_mmap(filp, 0, buf->total, - PROT_READ|PROT_WRITE, - MAP_SHARED, - buf->bus_address); - dev_priv->mmap_buffer = NULL; - filp->f_op = old_fops; - if ((unsigned long)buf_priv->virtual > -1024UL) { - /* Real error */ - DRM_DEBUG("mmap error\n"); - retcode = (signed int)buf_priv->virtual; - buf_priv->virtual = 0; - } - up_write( ¤t->mm->mmap_sem ); - } else { - buf_priv->virtual = buf_priv->kernel_virtual; - buf_priv->currently_mapped = I810_BUF_MAPPED; + + + + down_write( ¤t->mm->mmap_sem ); + + old_fops = filp->f_op; + filp->f_op = &i810_buffer_fops; + dev_priv->mmap_buffer = buf; + buf_priv->virtual = (void *)do_mmap(filp, 0, buf->total, + PROT_READ|PROT_WRITE, + MAP_SHARED, + buf->bus_address); + dev_priv->mmap_buffer = NULL; + filp->f_op = old_fops; + if ((unsigned long)buf_priv->virtual > -1024UL) { + /* Real error */ + DRM_DEBUG("mmap error\n"); + retcode = (signed int)buf_priv->virtual; + buf_priv->virtual = 0; } + + + + up_write( ¤t->mm->mmap_sem ); + return retcode; } @@ -213,15 +213,21 @@ drm_i810_buf_priv_t *buf_priv = buf->dev_private; int retcode = 0; - if(VM_DONTCOPY != 0) { - if(buf_priv->currently_mapped != I810_BUF_MAPPED) - return -EINVAL; - down_write( ¤t->mm->mmap_sem ); - retcode = do_munmap(current->mm, - (unsigned long)buf_priv->virtual, - (size_t) buf->total); - up_write( ¤t->mm->mmap_sem ); - } + if(buf_priv->currently_mapped != I810_BUF_MAPPED) + return -EINVAL; + + + + down_write( ¤t->mm->mmap_sem ); + + retcode = DO_MUNMAP(current->mm, + (unsigned long)buf_priv->virtual, + (size_t) buf->total); + + + + up_write( ¤t->mm->mmap_sem ); + buf_priv->currently_mapped = I810_BUF_UNMAPPED; buf_priv->virtual = 0; @@ -273,8 +279,9 @@ dev_priv->ring.Size); } if(dev_priv->hw_status_page != 0UL) { - pci_free_consistent(dev->pdev, PAGE_SIZE, (void *)dev_priv->hw_status_page, - dev_priv->dma_status_page); + pci_free_consistent(dev->pdev, PAGE_SIZE, + (void *)dev_priv->hw_status_page, + dev_priv->dma_status_page); /* Need to rewrite hardware status page */ I810_WRITE(0x02080, 0x1ffff000); } @@ -301,8 +308,6 @@ end = jiffies + (HZ*3); while (ring->space < n) { - int i; - ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR; ring->space = ring->head - (ring->tail+8); if (ring->space < 0) ring->space += ring->Size; @@ -311,13 +316,12 @@ end = jiffies + (HZ*3); iters++; - if((signed)(end - jiffies) <= 0) { + if(time_before(end, jiffies)) { DRM_ERROR("space: %d wanted %d\n", ring->space, n); DRM_ERROR("lockup\n"); goto out_wait_ring; } - - for (i = 0 ; i < 2000 ; i++) ; + udelay(1); } out_wait_ring: @@ -405,9 +409,6 @@ ((u8 *)dev_priv->sarea_map->handle + init->sarea_priv_offset); - atomic_set(&dev_priv->flush_done, 0); - init_waitqueue_head(&dev_priv->flush_queue); - dev_priv->ring.Start = init->ring_start; dev_priv->ring.End = init->ring_end; dev_priv->ring.Size = init->ring_size; @@ -440,8 +441,9 @@ dev_priv->zi1 = init->depth_offset | init->pitch_bits; /* Program Hardware Status Page */ - dev_priv->hw_status_page = (unsigned long)pci_alloc_consistent(dev->pdev, PAGE_SIZE, - &dev_priv->dma_status_page); + dev_priv->hw_status_page = + (unsigned long) pci_alloc_consistent(dev->pdev, PAGE_SIZE, + &dev_priv->dma_status_page); if(dev_priv->hw_status_page == 0UL) { dev->dev_private = (void *)dev_priv; i810_dma_cleanup(dev); @@ -451,7 +453,7 @@ memset((void *) dev_priv->hw_status_page, 0, PAGE_SIZE); DRM_DEBUG("hw status page @ %lx\n", dev_priv->hw_status_page); - I810_WRITE(0x02080, dev_priv->dma_status_page); + I810_WRITE(0x02080, dev_priv->dma_status_page); DRM_DEBUG("Enabled hardware status page\n"); /* Now we need to init our freelist */ @@ -532,16 +534,12 @@ /* Most efficient way to verify state for the i810 is as it is * emitted. Non-conformant state is silently dropped. - * - * Use 'volatile' & local var tmp to force the emitted values to be - * identical to the verified ones. */ static void i810EmitContextVerified( drm_device_t *dev, - volatile unsigned int *code ) + unsigned int *code ) { drm_i810_private_t *dev_priv = dev->dev_private; int i, j = 0; - unsigned int tmp; RING_LOCALS; BEGIN_LP_RING( I810_CTX_SETUP_SIZE ); @@ -553,14 +551,13 @@ OUT_RING( code[I810_CTXREG_ST1] ); for ( i = 4 ; i < I810_CTX_SETUP_SIZE ; i++ ) { - tmp = code[i]; - - if ((tmp & (7<<29)) == (3<<29) && - (tmp & (0x1f<<24)) < (0x1d<<24)) + if ((code[i] & (7<<29)) == (3<<29) && + (code[i] & (0x1f<<24)) < (0x1d<<24)) { - OUT_RING( tmp ); + OUT_RING( code[i] ); j++; } + else printk("constext state dropped!!!\n"); } if (j & 1) @@ -574,7 +571,6 @@ { drm_i810_private_t *dev_priv = dev->dev_private; int i, j = 0; - unsigned int tmp; RING_LOCALS; BEGIN_LP_RING( I810_TEX_SETUP_SIZE ); @@ -585,14 +581,14 @@ OUT_RING( code[I810_TEXREG_MI3] ); for ( i = 4 ; i < I810_TEX_SETUP_SIZE ; i++ ) { - tmp = code[i]; - if ((tmp & (7<<29)) == (3<<29) && - (tmp & (0x1f<<24)) < (0x1d<<24)) + if ((code[i] & (7<<29)) == (3<<29) && + (code[i] & (0x1f<<24)) < (0x1d<<24)) { - OUT_RING( tmp ); + OUT_RING( code[i] ); j++; } + else printk("texture state dropped!!!\n"); } if (j & 1) @@ -617,9 +613,9 @@ if (tmp == dev_priv->front_di1 || tmp == dev_priv->back_di1) { OUT_RING( CMD_OP_DESTBUFFER_INFO ); OUT_RING( tmp ); - } else - DRM_DEBUG("bad di1 %x (allow %x or %x)\n", - tmp, dev_priv->front_di1, dev_priv->back_di1); + } + else + printk("buffer state dropped\n"); /* invarient: */ @@ -704,7 +700,6 @@ continue; if ( flags & I810_FRONT ) { - DRM_DEBUG("clear front\n"); BEGIN_LP_RING( 6 ); OUT_RING( BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3 ); @@ -717,7 +712,6 @@ } if ( flags & I810_BACK ) { - DRM_DEBUG("clear back\n"); BEGIN_LP_RING( 6 ); OUT_RING( BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3 ); @@ -730,7 +724,6 @@ } if ( flags & I810_DEPTH ) { - DRM_DEBUG("clear depth\n"); BEGIN_LP_RING( 6 ); OUT_RING( BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3 ); @@ -756,8 +749,6 @@ int i; RING_LOCALS; - DRM_DEBUG("swapbuffers\n"); - i810_kernel_lost_context(dev); if (nbox > I810_NR_SAREA_CLIPRECTS) @@ -776,10 +767,6 @@ pbox->y2 > dev_priv->h) continue; - DRM_DEBUG("dispatch swap %d,%d-%d,%d!\n", - pbox[i].x1, pbox[i].y1, - pbox[i].x2, pbox[i].y2); - BEGIN_LP_RING( 6 ); OUT_RING( BR00_BITBLT_CLIENT | BR00_OP_SRC_COPY_BLT | 0x4 ); OUT_RING( pitch | (0xCC << 16)); @@ -804,7 +791,7 @@ int nbox = sarea_priv->nbox; unsigned long address = (unsigned long)buf->bus_address; unsigned long start = address - dev->agp->base; - int i = 0, u; + int i = 0; RING_LOCALS; i810_kernel_lost_context(dev); @@ -812,33 +799,16 @@ if (nbox > I810_NR_SAREA_CLIPRECTS) nbox = I810_NR_SAREA_CLIPRECTS; - if (discard) { - u = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, - I810_BUF_HARDWARE); - if(u != I810_BUF_CLIENT) { - DRM_DEBUG("xxxx 2\n"); - } - } - if (used > 4*1024) used = 0; if (sarea_priv->dirty) i810EmitState( dev ); - DRM_DEBUG("dispatch vertex addr 0x%lx, used 0x%x nbox %d\n", - address, used, nbox); - - dev_priv->counter++; - DRM_DEBUG( "dispatch counter : %ld\n", dev_priv->counter); - DRM_DEBUG( "i810_dma_dispatch\n"); - DRM_DEBUG( "start : %lx\n", start); - DRM_DEBUG( "used : %d\n", used); - DRM_DEBUG( "start + used - 4 : %ld\n", start + used - 4); - if (buf_priv->currently_mapped == I810_BUF_MAPPED) { - *(u32 *)buf_priv->virtual = (GFX_OP_PRIMITIVE | - sarea_priv->vertex_prim | + unsigned int prim = (sarea_priv->vertex_prim & PR_MASK); + + *(u32 *)buf_priv->virtual = (GFX_OP_PRIMITIVE | prim | ((used/4)-2)); if (used & 4) { @@ -871,154 +841,62 @@ } while (++i < nbox); } - BEGIN_LP_RING(10); - OUT_RING( CMD_STORE_DWORD_IDX ); - OUT_RING( 20 ); - OUT_RING( dev_priv->counter ); - OUT_RING( 0 ); - if (discard) { + dev_priv->counter++; + + (void) cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, + I810_BUF_HARDWARE); + + BEGIN_LP_RING(8); + OUT_RING( CMD_STORE_DWORD_IDX ); + OUT_RING( 20 ); + OUT_RING( dev_priv->counter ); OUT_RING( CMD_STORE_DWORD_IDX ); OUT_RING( buf_priv->my_use_idx ); OUT_RING( I810_BUF_FREE ); + OUT_RING( CMD_REPORT_HEAD ); OUT_RING( 0 ); + ADVANCE_LP_RING(); } - - OUT_RING( CMD_REPORT_HEAD ); - OUT_RING( 0 ); - ADVANCE_LP_RING(); -} - - -/* Interrupts are only for flushing */ -void i810_dma_service(int irq, void *device, struct pt_regs *regs) -{ - drm_device_t *dev = (drm_device_t *)device; - drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private; - u16 temp; - - atomic_inc(&dev->counts[_DRM_STAT_IRQ]); - temp = I810_READ16(I810REG_INT_IDENTITY_R); - temp = temp & ~(0x6000); - if(temp != 0) I810_WRITE16(I810REG_INT_IDENTITY_R, - temp); /* Clear all interrupts */ - else - return; - - queue_task(&dev->tq, &tq_immediate); - mark_bh(IMMEDIATE_BH); } -void i810_dma_immediate_bh(void *device) -{ - drm_device_t *dev = (drm_device_t *) device; - drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private; - - atomic_set(&dev_priv->flush_done, 1); - wake_up_interruptible(&dev_priv->flush_queue); -} - -static inline void i810_dma_emit_flush(drm_device_t *dev) -{ - drm_i810_private_t *dev_priv = dev->dev_private; - RING_LOCALS; - i810_kernel_lost_context(dev); - - BEGIN_LP_RING(2); - OUT_RING( CMD_REPORT_HEAD ); - OUT_RING( GFX_OP_USER_INTERRUPT ); - ADVANCE_LP_RING(); - -/* i810_wait_ring( dev, dev_priv->ring.Size - 8 ); */ -/* atomic_set(&dev_priv->flush_done, 1); */ -/* wake_up_interruptible(&dev_priv->flush_queue); */ -} - -static inline void i810_dma_quiescent_emit(drm_device_t *dev) +void i810_dma_quiescent(drm_device_t *dev) { drm_i810_private_t *dev_priv = dev->dev_private; RING_LOCALS; +/* printk("%s\n", __FUNCTION__); */ + i810_kernel_lost_context(dev); BEGIN_LP_RING(4); OUT_RING( INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE ); OUT_RING( CMD_REPORT_HEAD ); OUT_RING( 0 ); - OUT_RING( GFX_OP_USER_INTERRUPT ); + OUT_RING( 0 ); ADVANCE_LP_RING(); -/* i810_wait_ring( dev, dev_priv->ring.Size - 8 ); */ -/* atomic_set(&dev_priv->flush_done, 1); */ -/* wake_up_interruptible(&dev_priv->flush_queue); */ -} - -void i810_dma_quiescent(drm_device_t *dev) -{ - DECLARE_WAITQUEUE(entry, current); - drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private; - unsigned long end; - - if(dev_priv == NULL) { - return; - } - atomic_set(&dev_priv->flush_done, 0); - add_wait_queue(&dev_priv->flush_queue, &entry); - end = jiffies + (HZ*3); - - for (;;) { - current->state = TASK_INTERRUPTIBLE; - i810_dma_quiescent_emit(dev); - if (atomic_read(&dev_priv->flush_done) == 1) break; - if((signed)(end - jiffies) <= 0) { - DRM_ERROR("lockup\n"); - break; - } - schedule_timeout(HZ*3); - if (signal_pending(current)) { - break; - } - } - - current->state = TASK_RUNNING; - remove_wait_queue(&dev_priv->flush_queue, &entry); - - return; + i810_wait_ring( dev, dev_priv->ring.Size - 8 ); } static int i810_flush_queue(drm_device_t *dev) { - DECLARE_WAITQUEUE(entry, current); - drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private; + drm_i810_private_t *dev_priv = dev->dev_private; drm_device_dma_t *dma = dev->dma; - unsigned long end; int i, ret = 0; + RING_LOCALS; + +/* printk("%s\n", __FUNCTION__); */ - if(dev_priv == NULL) { - return 0; - } - atomic_set(&dev_priv->flush_done, 0); - add_wait_queue(&dev_priv->flush_queue, &entry); - end = jiffies + (HZ*3); - for (;;) { - current->state = TASK_INTERRUPTIBLE; - i810_dma_emit_flush(dev); - if (atomic_read(&dev_priv->flush_done) == 1) break; - if((signed)(end - jiffies) <= 0) { - DRM_ERROR("lockup\n"); - break; - } - schedule_timeout(HZ*3); - if (signal_pending(current)) { - ret = -EINTR; /* Can't restart */ - break; - } - } + i810_kernel_lost_context(dev); - current->state = TASK_RUNNING; - remove_wait_queue(&dev_priv->flush_queue, &entry); + BEGIN_LP_RING(2); + OUT_RING( CMD_REPORT_HEAD ); + OUT_RING( 0 ); + ADVANCE_LP_RING(); + i810_wait_ring( dev, dev_priv->ring.Size - 8 ); for (i = 0; i < dma->buf_count; i++) { drm_buf_t *buf = dma->buflist[ i ]; @@ -1030,7 +908,7 @@ if (used == I810_BUF_HARDWARE) DRM_DEBUG("reclaimed from HARDWARE\n"); if (used == I810_BUF_CLIENT) - DRM_DEBUG("still on client HARDWARE\n"); + DRM_DEBUG("still on client\n"); } return ret; @@ -1070,7 +948,6 @@ drm_file_t *priv = filp->private_data; drm_device_t *dev = priv->dev; - DRM_DEBUG("i810_flush_ioctl\n"); if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { DRM_ERROR("i810_flush_ioctl called without lock held\n"); return -EINVAL; @@ -1101,9 +978,6 @@ return -EINVAL; } - DRM_DEBUG("i810 dma vertex, idx %d used %d discard %d\n", - vertex.idx, vertex.used, vertex.discard); - if(vertex.idx < 0 || vertex.idx > dma->buf_count) return -EINVAL; i810_dma_dispatch_vertex( dev, @@ -1152,8 +1026,6 @@ drm_file_t *priv = filp->private_data; drm_device_t *dev = priv->dev; - DRM_DEBUG("i810_swap_bufs\n"); - if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { DRM_ERROR("i810_swap_buf called without lock held\n"); return -EINVAL; @@ -1189,7 +1061,6 @@ drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *) dev_priv->sarea_priv; - DRM_DEBUG("getbuf\n"); if (copy_from_user(&d, (drm_i810_dma_t *)arg, sizeof(d))) return -EFAULT; @@ -1202,9 +1073,6 @@ retcode = i810_dma_get_buffer(dev, &d, filp); - DRM_DEBUG("i810_dma: %d returning %d, granted = %d\n", - current->pid, retcode, d.granted); - if (copy_to_user((drm_dma_t *)arg, &d, sizeof(d))) return -EFAULT; sarea_priv->last_dispatch = (int) hw_status[5]; @@ -1212,47 +1080,19 @@ return retcode; } -int i810_copybuf(struct inode *inode, struct file *filp, unsigned int cmd, - unsigned long arg) +int i810_copybuf(struct inode *inode, + struct file *filp, + unsigned int cmd, + unsigned long arg) { - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_i810_copy_t d; - drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private; - u32 *hw_status = (u32 *)dev_priv->hw_status_page; - drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *) - dev_priv->sarea_priv; - drm_buf_t *buf; - drm_i810_buf_priv_t *buf_priv; - drm_device_dma_t *dma = dev->dma; - - if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { - DRM_ERROR("i810_dma called without lock held\n"); - return -EINVAL; - } - - if (copy_from_user(&d, (drm_i810_copy_t *)arg, sizeof(d))) - return -EFAULT; - - if(d.idx < 0 || d.idx > dma->buf_count) return -EINVAL; - buf = dma->buflist[ d.idx ]; - buf_priv = buf->dev_private; - if (buf_priv->currently_mapped != I810_BUF_MAPPED) return -EPERM; - - if(d.used < 0 || d.used > buf->total) return -EINVAL; - - if (copy_from_user(buf_priv->virtual, d.address, d.used)) - return -EFAULT; - - sarea_priv->last_dispatch = (int) hw_status[5]; - + /* Never copy - 2.4.x doesn't need it */ return 0; } int i810_docopy(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg) { - if(VM_DONTCOPY == 0) return 1; + /* Never copy - 2.4.x doesn't need it */ return 0; } @@ -1371,7 +1211,8 @@ data.offset = dev_priv->overlay_offset; data.physical = dev_priv->overlay_physical; - copy_to_user((drm_i810_overlay_t *)arg,&data,sizeof(data)); + if (copy_to_user((drm_i810_overlay_t *)arg,&data,sizeof(data))) + return -EFAULT; return 0; } diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/i810_drm.h linux.21rc1-ac1/drivers/char/drm/i810_drm.h --- linux.21rc1/drivers/char/drm/i810_drm.h 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/i810_drm.h 2003-04-22 16:44:36.000000000 +0100 @@ -88,6 +88,8 @@ #define I810_TEXREG_MCS 7 /* GFX_OP_MAP_COORD_SETS ??? */ #define I810_TEX_SETUP_SIZE 8 +/* Flags for clear ioctl + */ #define I810_FRONT 0x1 #define I810_BACK 0x2 #define I810_DEPTH 0x4 @@ -166,14 +168,34 @@ } drm_i810_sarea_t; +/* WARNING: If you change any of these defines, make sure to wear a bullet + * proof vest since these are part of the stable kernel<->userspace ABI + */ + +/* i810 specific ioctls + * The device specific ioctl range is 0x40 to 0x79. + */ +#define DRM_IOCTL_I810_INIT DRM_IOW( 0x40, drm_i810_init_t) +#define DRM_IOCTL_I810_VERTEX DRM_IOW( 0x41, drm_i810_vertex_t) +#define DRM_IOCTL_I810_CLEAR DRM_IOW( 0x42, drm_i810_clear_t) +#define DRM_IOCTL_I810_FLUSH DRM_IO( 0x43) +#define DRM_IOCTL_I810_GETAGE DRM_IO( 0x44) +#define DRM_IOCTL_I810_GETBUF DRM_IOWR(0x45, drm_i810_dma_t) +#define DRM_IOCTL_I810_SWAP DRM_IO( 0x46) +#define DRM_IOCTL_I810_COPY DRM_IOW( 0x47, drm_i810_copy_t) +#define DRM_IOCTL_I810_DOCOPY DRM_IO( 0x48) +#define DRM_IOCTL_I810_OV0INFO DRM_IOR( 0x49, drm_i810_overlay_t) +#define DRM_IOCTL_I810_FSTATUS DRM_IO ( 0x4a) +#define DRM_IOCTL_I810_OV0FLIP DRM_IO ( 0x4b) +#define DRM_IOCTL_I810_MC DRM_IOW( 0x4c, drm_i810_mc_t) +#define DRM_IOCTL_I810_RSTATUS DRM_IO ( 0x4d ) + typedef struct _drm_i810_clear { int clear_color; int clear_depth; int flags; } drm_i810_clear_t; - - /* These may be placeholders if we have more cliprects than * I810_NR_SAREA_CLIPRECTS. In that case, the client sets discard to * false, indicating that the buffer will be dispatched again with a @@ -191,6 +213,17 @@ void *address; /* Address to copy from */ } drm_i810_copy_t; +#define PR_TRIANGLES (0x0<<18) +#define PR_TRISTRIP_0 (0x1<<18) +#define PR_TRISTRIP_1 (0x2<<18) +#define PR_TRIFAN (0x3<<18) +#define PR_POLYGON (0x4<<18) +#define PR_LINES (0x5<<18) +#define PR_LINESTRIP (0x6<<18) +#define PR_RECTS (0x7<<18) +#define PR_MASK (0x7<<18) + + typedef struct drm_i810_dma { void *virtual; int request_idx; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/i810_drv.c linux.21rc1-ac1/drivers/char/drm/i810_drv.c --- linux.21rc1/drivers/char/drm/i810_drv.c 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/i810_drv.c 2003-04-22 16:44:36.000000000 +0100 @@ -33,42 +33,10 @@ #include #include "i810.h" #include "drmP.h" +#include "drm.h" +#include "i810_drm.h" #include "i810_drv.h" -#define DRIVER_AUTHOR "VA Linux Systems Inc." - -#define DRIVER_NAME "i810" -#define DRIVER_DESC "Intel i810" -#define DRIVER_DATE "20010920" - -#define DRIVER_MAJOR 1 -#define DRIVER_MINOR 2 -#define DRIVER_PATCHLEVEL 0 - -#define DRIVER_IOCTLS \ - [DRM_IOCTL_NR(DRM_IOCTL_I810_INIT)] = { i810_dma_init, 1, 1 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I810_VERTEX)] = { i810_dma_vertex, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I810_CLEAR)] = { i810_clear_bufs, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I810_FLUSH)] = { i810_flush_ioctl, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I810_GETAGE)] = { i810_getage, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I810_GETBUF)] = { i810_getbuf, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I810_SWAP)] = { i810_swap_bufs, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I810_COPY)] = { i810_copybuf, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I810_DOCOPY)] = { i810_docopy, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I810_OV0INFO)] = { i810_ov0_info, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I810_FSTATUS)] = { i810_fstatus, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I810_OV0FLIP)] = { i810_ov0_flip, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I810_MC)] = { i810_dma_mc, 1, 1 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I810_RSTATUS)] = { i810_rstatus, 1, 0 } - - -#define __HAVE_COUNTERS 4 -#define __HAVE_COUNTER6 _DRM_STAT_IRQ -#define __HAVE_COUNTER7 _DRM_STAT_PRIMARY -#define __HAVE_COUNTER8 _DRM_STAT_SECONDARY -#define __HAVE_COUNTER9 _DRM_STAT_DMA - - #include "drm_agpsupport.h" #include "drm_auth.h" #include "drm_bufs.h" @@ -77,25 +45,6 @@ #include "drm_drawable.h" #include "drm_drv.h" -#ifndef MODULE -/* DRM(options) is called by the kernel to parse command-line options - * passed via the boot-loader (e.g., LILO). It calls the insmod option - * routine, drm_parse_drm. - */ - -/* JH- We have to hand expand the string ourselves because of the cpp. If - * anyone can think of a way that we can fit into the __setup macro without - * changing it, then please send the solution my way. - */ -static int __init i810_options( char *str ) -{ - DRM(parse_options)( str ); - return 1; -} - -__setup( DRIVER_NAME "=", i810_options ); -#endif - #include "drm_fops.h" #include "drm_init.h" #include "drm_ioctl.h" diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/i810_drv.h linux.21rc1-ac1/drivers/char/drm/i810_drv.h --- linux.21rc1/drivers/char/drm/i810_drv.h 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/i810_drv.h 2003-04-22 16:44:36.000000000 +0100 @@ -63,10 +63,9 @@ unsigned long hw_status_page; unsigned long counter; - dma_addr_t dma_status_page; - atomic_t flush_done; - wait_queue_head_t flush_queue; /* Processes waiting until flush */ + dma_addr_t dma_status_page; + drm_buf_t *mmap_buffer; @@ -78,6 +77,7 @@ int overlay_physical; int w, h; int pitch; + } drm_i810_private_t; /* i810_dma.c */ @@ -92,8 +92,13 @@ extern int i810_getage(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg); extern int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma); + +/* Obsolete: + */ extern int i810_copybuf(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg); +/* Obsolete: + */ extern int i810_docopy(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg); @@ -111,9 +116,6 @@ extern void i810_dma_quiescent(drm_device_t *dev); -#define I810_VERBOSE 0 - - int i810_dma_vertex(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg); @@ -196,6 +198,7 @@ #define CMD_OP_Z_BUFFER_INFO ((0x0<<29)|(0x16<<23)) #define CMD_OP_DESTBUFFER_INFO ((0x0<<29)|(0x15<<23)) +#define CMD_OP_FRONTBUFFER_INFO ((0x0<<29)|(0x14<<23)) #define BR00_BITBLT_CLIENT 0x40000000 #define BR00_OP_COLOR_BLT 0x10000000 diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/i810.h linux.21rc1-ac1/drivers/char/drm/i810.h --- linux.21rc1/drivers/char/drm/i810.h 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/i810.h 2003-04-22 16:44:36.000000000 +0100 @@ -41,6 +41,47 @@ #define __HAVE_MTRR 1 #define __HAVE_CTX_BITMAP 1 +#define DRIVER_AUTHOR "VA Linux Systems Inc." + +#define DRIVER_NAME "i810" +#define DRIVER_DESC "Intel i810" +#define DRIVER_DATE "20020211" + +/* Interface history + * + * 1.1 - XFree86 4.1 + * 1.2 - XvMC interfaces + * - XFree86 4.2 + * 1.2.1 - Disable copying code (leave stub ioctls for backwards compatibility) + * - Remove requirement for interrupt (leave stubs again) + */ +#define DRIVER_MAJOR 1 +#define DRIVER_MINOR 2 +#define DRIVER_PATCHLEVEL 1 + +#define DRIVER_IOCTLS \ + [DRM_IOCTL_NR(DRM_IOCTL_I810_INIT)] = { i810_dma_init, 1, 1 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_I810_VERTEX)] = { i810_dma_vertex, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_I810_CLEAR)] = { i810_clear_bufs, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_I810_FLUSH)] = { i810_flush_ioctl, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_I810_GETAGE)] = { i810_getage, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_I810_GETBUF)] = { i810_getbuf, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_I810_SWAP)] = { i810_swap_bufs, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_I810_COPY)] = { i810_copybuf, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_I810_DOCOPY)] = { i810_docopy, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_I810_OV0INFO)] = { i810_ov0_info, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_I810_FSTATUS)] = { i810_fstatus, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_I810_OV0FLIP)] = { i810_ov0_flip, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_I810_MC)] = { i810_dma_mc, 1, 1 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_I810_RSTATUS)] = { i810_rstatus, 1, 0 } + + +#define __HAVE_COUNTERS 4 +#define __HAVE_COUNTER6 _DRM_STAT_IRQ +#define __HAVE_COUNTER7 _DRM_STAT_PRIMARY +#define __HAVE_COUNTER8 _DRM_STAT_SECONDARY +#define __HAVE_COUNTER9 _DRM_STAT_DMA + /* Driver customization: */ #define __HAVE_RELEASE 1 @@ -60,50 +101,10 @@ i810_dma_quiescent( dev ); \ } while (0) -#define __HAVE_DMA_IRQ 1 -#define __HAVE_DMA_IRQ_BH 1 -#define __HAVE_SHARED_IRQ 1 -#define DRIVER_PREINSTALL() do { \ - drm_i810_private_t *dev_priv = \ - (drm_i810_private_t *)dev->dev_private; \ - u16 tmp; \ - tmp = I810_READ16( I810REG_HWSTAM ); \ - tmp = tmp & 0x6000; \ - I810_WRITE16( I810REG_HWSTAM, tmp ); \ - \ - tmp = I810_READ16( I810REG_INT_MASK_R ); \ - tmp = tmp & 0x6000; /* Unmask interrupts */ \ - I810_WRITE16( I810REG_INT_MASK_R, tmp ); \ - tmp = I810_READ16( I810REG_INT_ENABLE_R ); \ - tmp = tmp & 0x6000; /* Disable all interrupts */ \ - I810_WRITE16( I810REG_INT_ENABLE_R, tmp ); \ -} while (0) - -#define DRIVER_POSTINSTALL() do { \ - drm_i810_private_t *dev_priv = \ - (drm_i810_private_t *)dev->dev_private; \ - u16 tmp; \ - tmp = I810_READ16( I810REG_INT_ENABLE_R ); \ - tmp = tmp & 0x6000; \ - tmp = tmp | 0x0003; /* Enable bp & user interrupts */ \ - I810_WRITE16( I810REG_INT_ENABLE_R, tmp ); \ -} while (0) - -#define DRIVER_UNINSTALL() do { \ - drm_i810_private_t *dev_priv = \ - (drm_i810_private_t *)dev->dev_private; \ - u16 tmp; \ - if ( dev_priv ) { \ - tmp = I810_READ16( I810REG_INT_IDENTITY_R ); \ - tmp = tmp & ~(0x6000); /* Clear all interrupts */ \ - if ( tmp != 0 ) \ - I810_WRITE16( I810REG_INT_IDENTITY_R, tmp ); \ - \ - tmp = I810_READ16( I810REG_INT_ENABLE_R ); \ - tmp = tmp & 0x6000; /* Disable all interrupts */ \ - I810_WRITE16( I810REG_INT_ENABLE_R, tmp ); \ - } \ -} while (0) +/* Don't need an irq any more. The template code will make sure that + * a noop stub is generated for compatibility. + */ +#define __HAVE_DMA_IRQ 0 /* Buffer customization: */ diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/i830_dma.c linux.21rc1-ac1/drivers/char/drm/i830_dma.c --- linux.21rc1/drivers/char/drm/i830_dma.c 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/i830_dma.c 2003-04-22 16:44:36.000000000 +0100 @@ -26,20 +26,22 @@ * * Authors: Rickard E. (Rik) Faith * Jeff Hartmann - * Keith Whitwell - * Abraham vd Merwe + * Keith Whitwell + * Abraham vd Merwe * */ + #include "i830.h" #include "drmP.h" +#include "drm.h" +#include "i830_drm.h" #include "i830_drv.h" #include /* For task queue support */ +#include /* For FASTCALL on unlock_page() */ #include -/* in case we don't have a 2.3.99-pre6 kernel or later: */ -#ifndef VM_DONTCOPY -#define VM_DONTCOPY 0 -#endif + +#define DO_MUNMAP(m, a, l) do_munmap(m, a, l, 1) #define I830_BUF_FREE 2 #define I830_BUF_CLIENT 1 @@ -48,54 +50,24 @@ #define I830_BUF_UNMAPPED 0 #define I830_BUF_MAPPED 1 -#define RING_LOCALS unsigned int outring, ringmask; volatile char *virt; -#define DO_IDLE_WORKAROUND() \ -do { \ - int _head; \ - int _tail; \ - do { \ - _head = I830_READ(LP_RING + RING_HEAD) & HEAD_ADDR; \ - _tail = I830_READ(LP_RING + RING_TAIL) & TAIL_ADDR; \ - udelay(1); \ - } while(_head != _tail); \ -} while(0) - -#define I830_SYNC_WORKAROUND 0 - -#define BEGIN_LP_RING(n) do { \ - if (I830_VERBOSE) \ - DRM_DEBUG("BEGIN_LP_RING(%d) in %s\n", \ - n, __FUNCTION__); \ - if (I830_SYNC_WORKAROUND) \ - DO_IDLE_WORKAROUND(); \ - if (dev_priv->ring.space < n*4) \ - i830_wait_ring(dev, n*4); \ - dev_priv->ring.space -= n*4; \ - outring = dev_priv->ring.tail; \ - ringmask = dev_priv->ring.tail_mask; \ - virt = dev_priv->ring.virtual_start; \ -} while (0) - -#define ADVANCE_LP_RING() do { \ - if (I830_VERBOSE) DRM_DEBUG("ADVANCE_LP_RING\n"); \ - dev_priv->ring.tail = outring; \ - I830_WRITE(LP_RING + RING_TAIL, outring); \ -} while(0) - -#define OUT_RING(n) do { \ - if (I830_VERBOSE) DRM_DEBUG(" OUT_RING %x\n", (int)(n)); \ - *(volatile unsigned int *)(virt + outring) = n; \ - outring += 4; \ - outring &= ringmask; \ -} while (0); + + + + + + + + + + static inline void i830_print_status_page(drm_device_t *dev) { drm_device_dma_t *dma = dev->dma; drm_i830_private_t *dev_priv = dev->dev_private; - u8 *temp = dev_priv->hw_status_page; + u32 *temp = (u32 *)dev_priv->hw_status_page; int i; DRM_DEBUG( "hw_status: Interrupt Status : %x\n", temp[0]); @@ -149,14 +121,14 @@ } static struct file_operations i830_buffer_fops = { - open: DRM(open), - flush: DRM(flush), - release: DRM(release), - ioctl: DRM(ioctl), - mmap: i830_mmap_buffers, - read: DRM(read), - fasync: DRM(fasync), - poll: DRM(poll), + .open = DRM(open), + .flush = DRM(flush), + .release = DRM(release), + .ioctl = DRM(ioctl), + .mmap = i830_mmap_buffers, + .read = DRM(read), + .fasync = DRM(fasync), + .poll = DRM(poll), }; int i830_mmap_buffers(struct file *filp, struct vm_area_struct *vma) @@ -179,7 +151,7 @@ buf_priv->currently_mapped = I830_BUF_MAPPED; unlock_kernel(); - if (remap_page_range(vma->vm_start, + if (remap_page_range(DRM_RPR_ARG(vma) vma->vm_start, VM_OFFSET(vma), vma->vm_end - vma->vm_start, vma->vm_page_prot)) return -EAGAIN; @@ -197,28 +169,24 @@ if(buf_priv->currently_mapped == I830_BUF_MAPPED) return -EINVAL; - if(VM_DONTCOPY != 0) { - down_write( ¤t->mm->mmap_sem ); - old_fops = filp->f_op; - filp->f_op = &i830_buffer_fops; - dev_priv->mmap_buffer = buf; - buf_priv->virtual = (void *)do_mmap(filp, 0, buf->total, - PROT_READ|PROT_WRITE, - MAP_SHARED, - buf->bus_address); - dev_priv->mmap_buffer = NULL; - filp->f_op = old_fops; - if ((unsigned long)buf_priv->virtual > -1024UL) { - /* Real error */ - DRM_DEBUG("mmap error\n"); - retcode = (signed int)buf_priv->virtual; - buf_priv->virtual = 0; - } - up_write( ¤t->mm->mmap_sem ); - } else { - buf_priv->virtual = buf_priv->kernel_virtual; - buf_priv->currently_mapped = I830_BUF_MAPPED; + down_write( ¤t->mm->mmap_sem ); + old_fops = filp->f_op; + filp->f_op = &i830_buffer_fops; + dev_priv->mmap_buffer = buf; + buf_priv->virtual = (void *)do_mmap(filp, 0, buf->total, + PROT_READ|PROT_WRITE, + MAP_SHARED, + buf->bus_address); + dev_priv->mmap_buffer = NULL; + filp->f_op = old_fops; + if ((unsigned long)buf_priv->virtual > -1024UL) { + /* Real error */ + DRM_ERROR("mmap error\n"); + retcode = (signed int)buf_priv->virtual; + buf_priv->virtual = 0; } + up_write( ¤t->mm->mmap_sem ); + return retcode; } @@ -227,15 +195,15 @@ drm_i830_buf_priv_t *buf_priv = buf->dev_private; int retcode = 0; - if(VM_DONTCOPY != 0) { - if(buf_priv->currently_mapped != I830_BUF_MAPPED) - return -EINVAL; - down_write( ¤t->mm->mmap_sem ); - retcode = do_munmap(current->mm, - (unsigned long)buf_priv->virtual, - (size_t) buf->total); - up_write( ¤t->mm->mmap_sem ); - } + if(buf_priv->currently_mapped != I830_BUF_MAPPED) + return -EINVAL; + + down_write(¤t->mm->mmap_sem); + retcode = DO_MUNMAP(current->mm, + (unsigned long)buf_priv->virtual, + (size_t) buf->total); + up_write(¤t->mm->mmap_sem); + buf_priv->currently_mapped = I830_BUF_UNMAPPED; buf_priv->virtual = 0; @@ -260,7 +228,7 @@ retcode = i830_map_buffer(buf, filp); if(retcode) { i830_freelist_put(dev, buf); - DRM_DEBUG("mapbuf failed, retcode %d\n", retcode); + DRM_ERROR("mapbuf failed, retcode %d\n", retcode); return retcode; } buf->pid = priv->pid; @@ -286,12 +254,22 @@ DRM(ioremapfree)((void *) dev_priv->ring.virtual_start, dev_priv->ring.Size); } - if(dev_priv->hw_status_page != NULL) { - pci_free_consistent(dev->pdev, PAGE_SIZE, - dev_priv->hw_status_page, dev_priv->dma_status_page); + if(dev_priv->hw_status_page != 0UL) { + pci_free_consistent(dev->pdev, PAGE_SIZE, + (void *)dev_priv->hw_status_page, + dev_priv->dma_status_page); /* Need to rewrite hardware status page */ I830_WRITE(0x02080, 0x1ffff000); } + + /* Disable interrupts here because after dev_private + * is freed, it's too late. + */ + if (dev->irq) { + I830_WRITE16( I830REG_INT_MASK_R, 0xffff ); + I830_WRITE16( I830REG_INT_ENABLE_R, 0x0 ); + } + DRM(free)(dev->dev_private, sizeof(drm_i830_private_t), DRM_MEM_DRIVER); dev->dev_private = NULL; @@ -305,7 +283,7 @@ return 0; } -static int i830_wait_ring(drm_device_t *dev, int n) +int i830_wait_ring(drm_device_t *dev, int n, const char *caller) { drm_i830_private_t *dev_priv = dev->dev_private; drm_i830_ring_buffer_t *ring = &(dev_priv->ring); @@ -314,7 +292,7 @@ unsigned int last_head = I830_READ(LP_RING + RING_HEAD) & HEAD_ADDR; end = jiffies + (HZ*3); - while (ring->space < n) { + while (ring->space < n) { ring->head = I830_READ(LP_RING + RING_HEAD) & HEAD_ADDR; ring->space = ring->head - (ring->tail+8); if (ring->space < 0) ring->space += ring->Size; @@ -325,13 +303,13 @@ } iters++; - if(time_before(end,jiffies)) { + if(time_before(end, jiffies)) { DRM_ERROR("space: %d wanted %d\n", ring->space, n); DRM_ERROR("lockup\n"); goto out_wait_ring; } - - udelay(1); + udelay(1); + dev_priv->sarea_priv->perf_boxes |= I830_BOX_WAIT; } out_wait_ring: @@ -344,9 +322,12 @@ drm_i830_ring_buffer_t *ring = &(dev_priv->ring); ring->head = I830_READ(LP_RING + RING_HEAD) & HEAD_ADDR; - ring->tail = I830_READ(LP_RING + RING_TAIL); + ring->tail = I830_READ(LP_RING + RING_TAIL) & TAIL_ADDR; ring->space = ring->head - (ring->tail+8); if (ring->space < 0) ring->space += ring->Size; + + if (ring->head == ring->tail) + dev_priv->sarea_priv->perf_boxes |= I830_BOX_RING_EMPTY; } static int i830_freelist_init(drm_device_t *dev, drm_i830_private_t *dev_priv) @@ -420,9 +401,6 @@ ((u8 *)dev_priv->sarea_map->handle + init->sarea_priv_offset); - atomic_set(&dev_priv->flush_done, 0); - init_waitqueue_head(&dev_priv->flush_queue); - dev_priv->ring.Start = init->ring_start; dev_priv->ring.End = init->ring_end; dev_priv->ring.Size = init->ring_size; @@ -446,11 +424,17 @@ dev_priv->pitch = init->pitch; dev_priv->back_offset = init->back_offset; dev_priv->depth_offset = init->depth_offset; + dev_priv->front_offset = init->front_offset; dev_priv->front_di1 = init->front_offset | init->pitch_bits; dev_priv->back_di1 = init->back_offset | init->pitch_bits; dev_priv->zi1 = init->depth_offset | init->pitch_bits; + DRM_DEBUG("front_di1 %x\n", dev_priv->front_di1); + DRM_DEBUG("back_offset %x\n", dev_priv->back_offset); + DRM_DEBUG("back_di1 %x\n", dev_priv->back_di1); + DRM_DEBUG("pitch_bits %x\n", init->pitch_bits); + dev_priv->cpp = init->cpp; /* We are using seperate values as placeholders for mechanisms for * private backbuffer/depthbuffer usage. @@ -458,20 +442,23 @@ dev_priv->back_pitch = init->back_pitch; dev_priv->depth_pitch = init->depth_pitch; + dev_priv->do_boxes = 0; + dev_priv->use_mi_batchbuffer_start = 0; /* Program Hardware Status Page */ - dev_priv->hw_status_page = pci_alloc_consistent(dev->pdev, PAGE_SIZE, + dev_priv->hw_status_page = + (unsigned long) pci_alloc_consistent(dev->pdev, PAGE_SIZE, &dev_priv->dma_status_page); - if(dev_priv->hw_status_page == NULL) { + if(dev_priv->hw_status_page == 0UL) { dev->dev_private = (void *)dev_priv; i830_dma_cleanup(dev); DRM_ERROR("Can not allocate hardware status page\n"); return -ENOMEM; } - memset(dev_priv->hw_status_page, 0, PAGE_SIZE); - DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page); + memset((void *) dev_priv->hw_status_page, 0, PAGE_SIZE); + DRM_DEBUG("hw status page @ %lx\n", dev_priv->hw_status_page); - I830_WRITE(0x02080, dev_priv->dma_status_page); + I830_WRITE(0x02080, dev_priv->dma_status_page); DRM_DEBUG("Enabled hardware status page\n"); /* Now we need to init our freelist */ @@ -517,83 +504,107 @@ return retcode; } +#define GFX_OP_STIPPLE ((0x3<<29)|(0x1d<<24)|(0x83<<16)) +#define ST1_ENABLE (1<<16) +#define ST1_MASK (0xffff) + /* Most efficient way to verify state for the i830 is as it is * emitted. Non-conformant state is silently dropped. - * - * Use 'volatile' & local var tmp to force the emitted values to be - * identical to the verified ones. */ -static void i830EmitContextVerified( drm_device_t *dev, - volatile unsigned int *code ) +static void i830EmitContextVerified( drm_device_t *dev, + unsigned int *code ) { drm_i830_private_t *dev_priv = dev->dev_private; int i, j = 0; unsigned int tmp; RING_LOCALS; - BEGIN_LP_RING( I830_CTX_SETUP_SIZE ); - for ( i = 0 ; i < I830_CTX_SETUP_SIZE ; i++ ) { + BEGIN_LP_RING( I830_CTX_SETUP_SIZE + 4 ); + + for ( i = 0 ; i < I830_CTXREG_BLENDCOLR0 ; i++ ) { tmp = code[i]; + if ((tmp & (7<<29)) == CMD_3D && + (tmp & (0x1f<<24)) < (0x1d<<24)) { + OUT_RING( tmp ); + j++; + } else { + DRM_ERROR("Skipping %d\n", i); + } + } -#if 0 - if ((tmp & (7<<29)) == (3<<29) && + OUT_RING( STATE3D_CONST_BLEND_COLOR_CMD ); + OUT_RING( code[I830_CTXREG_BLENDCOLR] ); + j += 2; + + for ( i = I830_CTXREG_VF ; i < I830_CTXREG_MCSB0 ; i++ ) { + tmp = code[i]; + if ((tmp & (7<<29)) == CMD_3D && (tmp & (0x1f<<24)) < (0x1d<<24)) { OUT_RING( tmp ); j++; } else { - printk("Skipping %d\n", i); + DRM_ERROR("Skipping %d\n", i); } -#else - OUT_RING( tmp ); - j++; -#endif } + OUT_RING( STATE3D_MAP_COORD_SETBIND_CMD ); + OUT_RING( code[I830_CTXREG_MCSB1] ); + j += 2; + if (j & 1) OUT_RING( 0 ); ADVANCE_LP_RING(); } -static void i830EmitTexVerified( drm_device_t *dev, - volatile unsigned int *code ) +static void i830EmitTexVerified( drm_device_t *dev, unsigned int *code ) { drm_i830_private_t *dev_priv = dev->dev_private; int i, j = 0; unsigned int tmp; RING_LOCALS; - BEGIN_LP_RING( I830_TEX_SETUP_SIZE ); - - OUT_RING( GFX_OP_MAP_INFO ); - OUT_RING( code[I830_TEXREG_MI1] ); - OUT_RING( code[I830_TEXREG_MI2] ); - OUT_RING( code[I830_TEXREG_MI3] ); - OUT_RING( code[I830_TEXREG_MI4] ); - OUT_RING( code[I830_TEXREG_MI5] ); - - for ( i = 6 ; i < I830_TEX_SETUP_SIZE ; i++ ) { - tmp = code[i]; - OUT_RING( tmp ); - j++; - } + if (code[I830_TEXREG_MI0] == GFX_OP_MAP_INFO || + (code[I830_TEXREG_MI0] & ~(0xf*LOAD_TEXTURE_MAP0)) == + (STATE3D_LOAD_STATE_IMMEDIATE_2|4)) { + + BEGIN_LP_RING( I830_TEX_SETUP_SIZE ); + + OUT_RING( code[I830_TEXREG_MI0] ); /* TM0LI */ + OUT_RING( code[I830_TEXREG_MI1] ); /* TM0S0 */ + OUT_RING( code[I830_TEXREG_MI2] ); /* TM0S1 */ + OUT_RING( code[I830_TEXREG_MI3] ); /* TM0S2 */ + OUT_RING( code[I830_TEXREG_MI4] ); /* TM0S3 */ + OUT_RING( code[I830_TEXREG_MI5] ); /* TM0S4 */ + + for ( i = 6 ; i < I830_TEX_SETUP_SIZE ; i++ ) { + tmp = code[i]; + OUT_RING( tmp ); + j++; + } - if (j & 1) - OUT_RING( 0 ); + if (j & 1) + OUT_RING( 0 ); - ADVANCE_LP_RING(); + ADVANCE_LP_RING(); + } + else + printk("rejected packet %x\n", code[0]); } static void i830EmitTexBlendVerified( drm_device_t *dev, - volatile unsigned int *code, - volatile unsigned int num) + unsigned int *code, + unsigned int num) { drm_i830_private_t *dev_priv = dev->dev_private; int i, j = 0; unsigned int tmp; RING_LOCALS; - BEGIN_LP_RING( num ); + if (!num) + return; + + BEGIN_LP_RING( num + 1 ); for ( i = 0 ; i < num ; i++ ) { tmp = code[i]; @@ -616,6 +627,8 @@ int i; RING_LOCALS; + return; /* Is this right ? -- Arjan */ + BEGIN_LP_RING( 258 ); if(is_shared == 1) { @@ -629,44 +642,43 @@ OUT_RING(palette[i]); } OUT_RING(0); + /* KW: WHERE IS THE ADVANCE_LP_RING? This is effectively a noop! + */ } /* Need to do some additional checking when setting the dest buffer. */ static void i830EmitDestVerified( drm_device_t *dev, - volatile unsigned int *code ) + unsigned int *code ) { drm_i830_private_t *dev_priv = dev->dev_private; unsigned int tmp; RING_LOCALS; - BEGIN_LP_RING( I830_DEST_SETUP_SIZE + 6 ); + BEGIN_LP_RING( I830_DEST_SETUP_SIZE + 10 ); + tmp = code[I830_DESTREG_CBUFADDR]; - if (tmp == dev_priv->front_di1) { - /* Don't use fence when front buffer rendering */ - OUT_RING( CMD_OP_DESTBUFFER_INFO ); - OUT_RING( BUF_3D_ID_COLOR_BACK | - BUF_3D_PITCH(dev_priv->back_pitch * dev_priv->cpp) ); - OUT_RING( tmp ); + if (tmp == dev_priv->front_di1 || tmp == dev_priv->back_di1) { + if (((int)outring) & 8) { + OUT_RING(0); + OUT_RING(0); + } OUT_RING( CMD_OP_DESTBUFFER_INFO ); - OUT_RING( BUF_3D_ID_DEPTH | - BUF_3D_PITCH(dev_priv->depth_pitch * dev_priv->cpp)); - OUT_RING( dev_priv->zi1 ); - } else if(tmp == dev_priv->back_di1) { - OUT_RING( CMD_OP_DESTBUFFER_INFO ); OUT_RING( BUF_3D_ID_COLOR_BACK | BUF_3D_PITCH(dev_priv->back_pitch * dev_priv->cpp) | BUF_3D_USE_FENCE); OUT_RING( tmp ); + OUT_RING( 0 ); OUT_RING( CMD_OP_DESTBUFFER_INFO ); OUT_RING( BUF_3D_ID_DEPTH | BUF_3D_USE_FENCE | BUF_3D_PITCH(dev_priv->depth_pitch * dev_priv->cpp)); OUT_RING( dev_priv->zi1 ); + OUT_RING( 0 ); } else { - DRM_DEBUG("bad di1 %x (allow %x or %x)\n", + DRM_ERROR("bad di1 %x (allow %x or %x)\n", tmp, dev_priv->front_di1, dev_priv->back_di1); } @@ -688,25 +700,39 @@ if((tmp & ~0x3) == GFX_OP_SCISSOR_ENABLE) { OUT_RING( tmp ); } else { - DRM_DEBUG("bad scissor enable\n"); + DRM_ERROR("bad scissor enable\n"); OUT_RING( 0 ); } - OUT_RING( code[I830_DESTREG_SENABLE] ); - OUT_RING( GFX_OP_SCISSOR_RECT ); OUT_RING( code[I830_DESTREG_SR1] ); OUT_RING( code[I830_DESTREG_SR2] ); + OUT_RING( 0 ); ADVANCE_LP_RING(); } +static void i830EmitStippleVerified( drm_device_t *dev, + unsigned int *code ) +{ + drm_i830_private_t *dev_priv = dev->dev_private; + RING_LOCALS; + + BEGIN_LP_RING( 2 ); + OUT_RING( GFX_OP_STIPPLE ); + OUT_RING( code[1] ); + ADVANCE_LP_RING(); +} + + static void i830EmitState( drm_device_t *dev ) { drm_i830_private_t *dev_priv = dev->dev_private; drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv; unsigned int dirty = sarea_priv->dirty; + DRM_DEBUG("%s %x\n", __FUNCTION__, dirty); + if (dirty & I830_UPLOAD_BUFFERS) { i830EmitDestVerified( dev, sarea_priv->BufferState ); sarea_priv->dirty &= ~I830_UPLOAD_BUFFERS; @@ -740,17 +766,154 @@ } if (dirty & I830_UPLOAD_TEX_PALETTE_SHARED) { - i830EmitTexPalette(dev, sarea_priv->Palette[0], 0, 1); + i830EmitTexPalette(dev, sarea_priv->Palette[0], 0, 1); + } else { + if (dirty & I830_UPLOAD_TEX_PALETTE_N(0)) { + i830EmitTexPalette(dev, sarea_priv->Palette[0], 0, 0); + sarea_priv->dirty &= ~I830_UPLOAD_TEX_PALETTE_N(0); + } + if (dirty & I830_UPLOAD_TEX_PALETTE_N(1)) { + i830EmitTexPalette(dev, sarea_priv->Palette[1], 1, 0); + sarea_priv->dirty &= ~I830_UPLOAD_TEX_PALETTE_N(1); + } + + /* 1.3: + */ +#if 0 + if (dirty & I830_UPLOAD_TEX_PALETTE_N(2)) { + i830EmitTexPalette(dev, sarea_priv->Palette2[0], 0, 0); + sarea_priv->dirty &= ~I830_UPLOAD_TEX_PALETTE_N(2); + } + if (dirty & I830_UPLOAD_TEX_PALETTE_N(3)) { + i830EmitTexPalette(dev, sarea_priv->Palette2[1], 1, 0); + sarea_priv->dirty &= ~I830_UPLOAD_TEX_PALETTE_N(2); + } +#endif + } + + /* 1.3: + */ + if (dirty & I830_UPLOAD_STIPPLE) { + i830EmitStippleVerified( dev, + sarea_priv->StippleState); + sarea_priv->dirty &= ~I830_UPLOAD_STIPPLE; + } + + if (dirty & I830_UPLOAD_TEX2) { + i830EmitTexVerified( dev, sarea_priv->TexState2 ); + sarea_priv->dirty &= ~I830_UPLOAD_TEX2; + } + + if (dirty & I830_UPLOAD_TEX3) { + i830EmitTexVerified( dev, sarea_priv->TexState3 ); + sarea_priv->dirty &= ~I830_UPLOAD_TEX3; + } + + + if (dirty & I830_UPLOAD_TEXBLEND2) { + i830EmitTexBlendVerified( + dev, + sarea_priv->TexBlendState2, + sarea_priv->TexBlendStateWordsUsed2); + + sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND2; + } + + if (dirty & I830_UPLOAD_TEXBLEND3) { + i830EmitTexBlendVerified( + dev, + sarea_priv->TexBlendState3, + sarea_priv->TexBlendStateWordsUsed3); + sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND3; + } +} + +/* ================================================================ + * Performance monitoring functions + */ + +static void i830_fill_box( drm_device_t *dev, + int x, int y, int w, int h, + int r, int g, int b ) +{ + drm_i830_private_t *dev_priv = dev->dev_private; + u32 color; + unsigned int BR13, CMD; + RING_LOCALS; + + BR13 = (0xF0 << 16) | (dev_priv->pitch * dev_priv->cpp) | (1<<24); + CMD = XY_COLOR_BLT_CMD; + x += dev_priv->sarea_priv->boxes[0].x1; + y += dev_priv->sarea_priv->boxes[0].y1; + + if (dev_priv->cpp == 4) { + BR13 |= (1<<25); + CMD |= (XY_COLOR_BLT_WRITE_ALPHA | XY_COLOR_BLT_WRITE_RGB); + color = (((0xff) << 24) | (r << 16) | (g << 8) | b); } else { - if (dirty & I830_UPLOAD_TEX_PALETTE_N(0)) { - i830EmitTexPalette(dev, sarea_priv->Palette[0], 0, 0); - sarea_priv->dirty &= ~I830_UPLOAD_TEX_PALETTE_N(0); - } - if (dirty & I830_UPLOAD_TEX_PALETTE_N(1)) { - i830EmitTexPalette(dev, sarea_priv->Palette[1], 1, 0); - sarea_priv->dirty &= ~I830_UPLOAD_TEX_PALETTE_N(1); - } + color = (((r & 0xf8) << 8) | + ((g & 0xfc) << 3) | + ((b & 0xf8) >> 3)); + } + + BEGIN_LP_RING( 6 ); + OUT_RING( CMD ); + OUT_RING( BR13 ); + OUT_RING( (y << 16) | x ); + OUT_RING( ((y+h) << 16) | (x+w) ); + + if ( dev_priv->current_page == 1 ) { + OUT_RING( dev_priv->front_offset ); + } else { + OUT_RING( dev_priv->back_offset ); + } + + OUT_RING( color ); + ADVANCE_LP_RING(); +} + +static void i830_cp_performance_boxes( drm_device_t *dev ) +{ + drm_i830_private_t *dev_priv = dev->dev_private; + + /* Purple box for page flipping + */ + if ( dev_priv->sarea_priv->perf_boxes & I830_BOX_FLIP ) + i830_fill_box( dev, 4, 4, 8, 8, 255, 0, 255 ); + + /* Red box if we have to wait for idle at any point + */ + if ( dev_priv->sarea_priv->perf_boxes & I830_BOX_WAIT ) + i830_fill_box( dev, 16, 4, 8, 8, 255, 0, 0 ); + + /* Blue box: lost context? + */ + if ( dev_priv->sarea_priv->perf_boxes & I830_BOX_LOST_CONTEXT ) + i830_fill_box( dev, 28, 4, 8, 8, 0, 0, 255 ); + + /* Yellow box for texture swaps + */ + if ( dev_priv->sarea_priv->perf_boxes & I830_BOX_TEXTURE_LOAD ) + i830_fill_box( dev, 40, 4, 8, 8, 255, 255, 0 ); + + /* Green box if hardware never idles (as far as we can tell) + */ + if ( !(dev_priv->sarea_priv->perf_boxes & I830_BOX_RING_EMPTY) ) + i830_fill_box( dev, 64, 4, 8, 8, 0, 255, 0 ); + + + /* Draw bars indicating number of buffers allocated + * (not a great measure, easily confused) + */ + if (dev_priv->dma_used) { + int bar = dev_priv->dma_used / 10240; + if (bar > 100) bar = 100; + if (bar < 1) bar = 1; + i830_fill_box( dev, 4, 16, bar, 4, 196, 128, 128 ); + dev_priv->dma_used = 0; } + + dev_priv->sarea_priv->perf_boxes = 0; } static void i830_dma_dispatch_clear( drm_device_t *dev, int flags, @@ -768,6 +931,15 @@ unsigned int BR13, CMD, D_CMD; RING_LOCALS; + + if ( dev_priv->current_page == 1 ) { + unsigned int tmp = flags; + + flags &= ~(I830_FRONT | I830_BACK); + if ( tmp & I830_FRONT ) flags |= I830_BACK; + if ( tmp & I830_BACK ) flags |= I830_FRONT; + } + i830_kernel_lost_context(dev); switch(cpp) { @@ -808,7 +980,7 @@ OUT_RING( BR13 ); OUT_RING( (pbox->y1 << 16) | pbox->x1 ); OUT_RING( (pbox->y2 << 16) | pbox->x2 ); - OUT_RING( 0 ); + OUT_RING( dev_priv->front_offset ); OUT_RING( clear_color ); ADVANCE_LP_RING(); } @@ -847,13 +1019,17 @@ drm_clip_rect_t *pbox = sarea_priv->boxes; int pitch = dev_priv->pitch; int cpp = dev_priv->cpp; - int ofs = dev_priv->back_offset; int i; unsigned int CMD, BR13; RING_LOCALS; DRM_DEBUG("swapbuffers\n"); + i830_kernel_lost_context(dev); + + if (dev_priv->do_boxes) + i830_cp_performance_boxes( dev ); + switch(cpp) { case 2: BR13 = (pitch * cpp) | (0xCC << 16) | (1<<24); @@ -870,7 +1046,6 @@ break; } - i830_kernel_lost_context(dev); if (nbox > I830_NR_SAREA_CLIPRECTS) nbox = I830_NR_SAREA_CLIPRECTS; @@ -890,23 +1065,72 @@ BEGIN_LP_RING( 8 ); OUT_RING( CMD ); OUT_RING( BR13 ); + OUT_RING( (pbox->y1 << 16) | pbox->x1 ); + OUT_RING( (pbox->y2 << 16) | pbox->x2 ); - OUT_RING( (pbox->y1 << 16) | - pbox->x1 ); - OUT_RING( (pbox->y2 << 16) | - pbox->x2 ); - - OUT_RING( 0 /* front ofs always zero */ ); - OUT_RING( (pbox->y1 << 16) | - pbox->x1 ); + if (dev_priv->current_page == 0) + OUT_RING( dev_priv->front_offset ); + else + OUT_RING( dev_priv->back_offset ); + OUT_RING( (pbox->y1 << 16) | pbox->x1 ); OUT_RING( BR13 & 0xffff ); - OUT_RING( ofs ); + + if (dev_priv->current_page == 0) + OUT_RING( dev_priv->back_offset ); + else + OUT_RING( dev_priv->front_offset ); ADVANCE_LP_RING(); } } +static void i830_dma_dispatch_flip( drm_device_t *dev ) +{ + drm_i830_private_t *dev_priv = dev->dev_private; + RING_LOCALS; + + DRM_DEBUG( "%s: page=%d pfCurrentPage=%d\n", + __FUNCTION__, + dev_priv->current_page, + dev_priv->sarea_priv->pf_current_page); + + i830_kernel_lost_context(dev); + + if (dev_priv->do_boxes) { + dev_priv->sarea_priv->perf_boxes |= I830_BOX_FLIP; + i830_cp_performance_boxes( dev ); + } + + + BEGIN_LP_RING( 2 ); + OUT_RING( INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE ); + OUT_RING( 0 ); + ADVANCE_LP_RING(); + + BEGIN_LP_RING( 6 ); + OUT_RING( CMD_OP_DISPLAYBUFFER_INFO | ASYNC_FLIP ); + OUT_RING( 0 ); + if ( dev_priv->current_page == 0 ) { + OUT_RING( dev_priv->back_offset ); + dev_priv->current_page = 1; + } else { + OUT_RING( dev_priv->front_offset ); + dev_priv->current_page = 0; + } + OUT_RING(0); + ADVANCE_LP_RING(); + + + BEGIN_LP_RING( 2 ); + OUT_RING( MI_WAIT_FOR_EVENT | + MI_WAIT_FOR_PLANE_A_FLIP ); + OUT_RING( 0 ); + ADVANCE_LP_RING(); + + + dev_priv->sarea_priv->pf_current_page = dev_priv->current_page; +} static void i830_dma_dispatch_vertex(drm_device_t *dev, drm_buf_t *buf, @@ -936,7 +1160,7 @@ } } - if (used > 4*1024) + if (used > 4*1023) used = 0; if (sarea_priv->dirty) @@ -953,12 +1177,19 @@ DRM_DEBUG( "start + used - 4 : %ld\n", start + used - 4); if (buf_priv->currently_mapped == I830_BUF_MAPPED) { - *(u32 *)buf_priv->virtual = (GFX_OP_PRIMITIVE | - sarea_priv->vertex_prim | - ((used/4)-2)); + u32 *vp = buf_priv->virtual; + + vp[0] = (GFX_OP_PRIMITIVE | + sarea_priv->vertex_prim | + ((used/4)-2)); + + if (dev_priv->use_mi_batchbuffer_start) { + vp[used/4] = MI_BATCH_BUFFER_END; + used += 4; + } if (used & 4) { - *(u32 *)((u32)buf_priv->virtual + used) = 0; + vp[used/4] = 0; used += 4; } @@ -978,80 +1209,45 @@ ADVANCE_LP_RING(); } - BEGIN_LP_RING(4); + if (dev_priv->use_mi_batchbuffer_start) { + BEGIN_LP_RING(2); + OUT_RING( MI_BATCH_BUFFER_START | (2<<6) ); + OUT_RING( start | MI_BATCH_NON_SECURE ); + ADVANCE_LP_RING(); + } + else { + BEGIN_LP_RING(4); + OUT_RING( MI_BATCH_BUFFER ); + OUT_RING( start | MI_BATCH_NON_SECURE ); + OUT_RING( start + used - 4 ); + OUT_RING( 0 ); + ADVANCE_LP_RING(); + } - OUT_RING( MI_BATCH_BUFFER ); - OUT_RING( start | MI_BATCH_NON_SECURE ); - OUT_RING( start + used - 4 ); - OUT_RING( 0 ); - ADVANCE_LP_RING(); - } while (++i < nbox); } - BEGIN_LP_RING(10); - OUT_RING( CMD_STORE_DWORD_IDX ); - OUT_RING( 20 ); - OUT_RING( dev_priv->counter ); - OUT_RING( 0 ); - if (discard) { + dev_priv->counter++; + + (void) cmpxchg(buf_priv->in_use, I830_BUF_CLIENT, + I830_BUF_HARDWARE); + + BEGIN_LP_RING(8); + OUT_RING( CMD_STORE_DWORD_IDX ); + OUT_RING( 20 ); + OUT_RING( dev_priv->counter ); OUT_RING( CMD_STORE_DWORD_IDX ); OUT_RING( buf_priv->my_use_idx ); OUT_RING( I830_BUF_FREE ); + OUT_RING( CMD_REPORT_HEAD ); OUT_RING( 0 ); + ADVANCE_LP_RING(); } - - OUT_RING( CMD_REPORT_HEAD ); - OUT_RING( 0 ); - ADVANCE_LP_RING(); -} - -/* Interrupts are only for flushing */ -void i830_dma_service(int irq, void *device, struct pt_regs *regs) -{ - drm_device_t *dev = (drm_device_t *)device; - drm_i830_private_t *dev_priv = (drm_i830_private_t *)dev->dev_private; - u16 temp; - - temp = I830_READ16(I830REG_INT_IDENTITY_R); - temp = temp & ~(0x6000); - if(temp != 0) I830_WRITE16(I830REG_INT_IDENTITY_R, - temp); /* Clear all interrupts */ - else - return; - - queue_task(&dev->tq, &tq_immediate); - mark_bh(IMMEDIATE_BH); -} - -void DRM(dma_immediate_bh)(void *device) -{ - drm_device_t *dev = (drm_device_t *) device; - drm_i830_private_t *dev_priv = (drm_i830_private_t *)dev->dev_private; - - atomic_set(&dev_priv->flush_done, 1); - wake_up_interruptible(&dev_priv->flush_queue); } -static inline void i830_dma_emit_flush(drm_device_t *dev) -{ - drm_i830_private_t *dev_priv = dev->dev_private; - RING_LOCALS; - - i830_kernel_lost_context(dev); - BEGIN_LP_RING(2); - OUT_RING( CMD_REPORT_HEAD ); - OUT_RING( GFX_OP_USER_INTERRUPT ); - ADVANCE_LP_RING(); - - i830_wait_ring( dev, dev_priv->ring.Size - 8 ); - atomic_set(&dev_priv->flush_done, 1); - wake_up_interruptible(&dev_priv->flush_queue); -} - -static inline void i830_dma_quiescent_emit(drm_device_t *dev) +void i830_dma_quiescent(drm_device_t *dev) { drm_i830_private_t *dev_priv = dev->dev_private; RING_LOCALS; @@ -1062,79 +1258,27 @@ OUT_RING( INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE ); OUT_RING( CMD_REPORT_HEAD ); OUT_RING( 0 ); - OUT_RING( GFX_OP_USER_INTERRUPT ); + OUT_RING( 0 ); ADVANCE_LP_RING(); - i830_wait_ring( dev, dev_priv->ring.Size - 8 ); - atomic_set(&dev_priv->flush_done, 1); - wake_up_interruptible(&dev_priv->flush_queue); -} - -void i830_dma_quiescent(drm_device_t *dev) -{ - DECLARE_WAITQUEUE(entry, current); - drm_i830_private_t *dev_priv = (drm_i830_private_t *)dev->dev_private; - unsigned long end; - - if(dev_priv == NULL) { - return; - } - atomic_set(&dev_priv->flush_done, 0); - add_wait_queue(&dev_priv->flush_queue, &entry); - end = jiffies + (HZ*3); - - for (;;) { - current->state = TASK_INTERRUPTIBLE; - i830_dma_quiescent_emit(dev); - if (atomic_read(&dev_priv->flush_done) == 1) break; - if(time_before(end, jiffies)) { - DRM_ERROR("lockup\n"); - break; - } - schedule_timeout(HZ*3); - if (signal_pending(current)) { - break; - } - } - - current->state = TASK_RUNNING; - remove_wait_queue(&dev_priv->flush_queue, &entry); - - return; + i830_wait_ring( dev, dev_priv->ring.Size - 8, __FUNCTION__ ); } static int i830_flush_queue(drm_device_t *dev) { - DECLARE_WAITQUEUE(entry, current); - drm_i830_private_t *dev_priv = (drm_i830_private_t *)dev->dev_private; + drm_i830_private_t *dev_priv = dev->dev_private; drm_device_dma_t *dma = dev->dma; - unsigned long end; - int i, ret = 0; + int i, ret = 0; + RING_LOCALS; + + i830_kernel_lost_context(dev); - if(dev_priv == NULL) { - return 0; - } - atomic_set(&dev_priv->flush_done, 0); - add_wait_queue(&dev_priv->flush_queue, &entry); - end = jiffies + (HZ*3); - for (;;) { - current->state = TASK_INTERRUPTIBLE; - i830_dma_emit_flush(dev); - if (atomic_read(&dev_priv->flush_done) == 1) break; - if(time_before(end, jiffies)) { - DRM_ERROR("lockup\n"); - break; - } - schedule_timeout(HZ*3); - if (signal_pending(current)) { - ret = -EINTR; /* Can't restart */ - break; - } - } - - current->state = TASK_RUNNING; - remove_wait_queue(&dev_priv->flush_queue, &entry); + BEGIN_LP_RING(2); + OUT_RING( CMD_REPORT_HEAD ); + OUT_RING( 0 ); + ADVANCE_LP_RING(); + i830_wait_ring( dev, dev_priv->ring.Size - 8, __FUNCTION__ ); for (i = 0; i < dma->buf_count; i++) { drm_buf_t *buf = dma->buflist[ i ]; @@ -1146,7 +1290,7 @@ if (used == I830_BUF_HARDWARE) DRM_DEBUG("reclaimed from HARDWARE\n"); if (used == I830_BUF_CLIENT) - DRM_DEBUG("still on client HARDWARE\n"); + DRM_DEBUG("still on client\n"); } return ret; @@ -1185,8 +1329,7 @@ { drm_file_t *priv = filp->private_data; drm_device_t *dev = priv->dev; - - DRM_DEBUG("i830_flush_ioctl\n"); + if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { DRM_ERROR("i830_flush_ioctl called without lock held\n"); return -EINVAL; @@ -1275,6 +1418,53 @@ return 0; } + + +/* Not sure why this isn't set all the time: + */ +static void i830_do_init_pageflip( drm_device_t *dev ) +{ + drm_i830_private_t *dev_priv = dev->dev_private; + + DRM_DEBUG("%s\n", __FUNCTION__); + dev_priv->page_flipping = 1; + dev_priv->current_page = 0; + dev_priv->sarea_priv->pf_current_page = dev_priv->current_page; +} + +int i830_do_cleanup_pageflip( drm_device_t *dev ) +{ + drm_i830_private_t *dev_priv = dev->dev_private; + + DRM_DEBUG("%s\n", __FUNCTION__); + if (dev_priv->current_page != 0) + i830_dma_dispatch_flip( dev ); + + dev_priv->page_flipping = 0; + return 0; +} + +int i830_flip_bufs(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg) +{ + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + drm_i830_private_t *dev_priv = dev->dev_private; + + DRM_DEBUG("%s\n", __FUNCTION__); + + if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { + DRM_ERROR("i830_flip_buf called without lock held\n"); + return -EINVAL; + } + + if (!dev_priv->page_flipping) + i830_do_init_pageflip( dev ); + + i830_dma_dispatch_flip( dev ); + return 0; +} + int i830_getage(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg) { @@ -1324,46 +1514,80 @@ return retcode; } -int i830_copybuf(struct inode *inode, struct file *filp, unsigned int cmd, +int i830_copybuf(struct inode *inode, + struct file *filp, + unsigned int cmd, + unsigned long arg) +{ + /* Never copy - 2.4.x doesn't need it */ + return 0; +} + +int i830_docopy(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg) { + return 0; +} + + + +int i830_getparam( struct inode *inode, struct file *filp, unsigned int cmd, + unsigned long arg ) +{ drm_file_t *priv = filp->private_data; drm_device_t *dev = priv->dev; - drm_i830_copy_t d; - drm_i830_private_t *dev_priv = (drm_i830_private_t *)dev->dev_private; - u32 *hw_status = (u32 *)dev_priv->hw_status_page; - drm_i830_sarea_t *sarea_priv = (drm_i830_sarea_t *) - dev_priv->sarea_priv; - drm_buf_t *buf; - drm_i830_buf_priv_t *buf_priv; - drm_device_dma_t *dma = dev->dma; + drm_i830_private_t *dev_priv = dev->dev_private; + drm_i830_getparam_t param; + int value; - if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { - DRM_ERROR("i830_dma called without lock held\n"); + if ( !dev_priv ) { + DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ ); return -EINVAL; } - - if (copy_from_user(&d, (drm_i830_copy_t *)arg, sizeof(d))) - return -EFAULT; - - if(d.idx < 0 || d.idx > dma->buf_count) return -EINVAL; - buf = dma->buflist[ d.idx ]; - buf_priv = buf->dev_private; - if (buf_priv->currently_mapped != I830_BUF_MAPPED) return -EPERM; - - if(d.used < 0 || d.used > buf->total) return -EINVAL; - if (copy_from_user(buf_priv->virtual, d.address, d.used)) + if (copy_from_user(¶m, (drm_i830_getparam_t *)arg, sizeof(param) )) return -EFAULT; - sarea_priv->last_dispatch = (int) hw_status[5]; + switch( param.param ) { + case I830_PARAM_IRQ_ACTIVE: + value = dev->irq ? 1 : 0; + break; + default: + return -EINVAL; + } + if ( copy_to_user( param.value, &value, sizeof(int) ) ) { + DRM_ERROR( "copy_to_user\n" ); + return -EFAULT; + } + return 0; } -int i830_docopy(struct inode *inode, struct file *filp, unsigned int cmd, - unsigned long arg) + +int i830_setparam( struct inode *inode, struct file *filp, unsigned int cmd, + unsigned long arg ) { - if(VM_DONTCOPY == 0) return 1; + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + drm_i830_private_t *dev_priv = dev->dev_private; + drm_i830_setparam_t param; + + if ( !dev_priv ) { + DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ ); + return -EINVAL; + } + + if (copy_from_user(¶m, (drm_i830_setparam_t *)arg, sizeof(param) )) + return -EFAULT; + + switch( param.param ) { + case I830_SETPARAM_USE_MI_BATCHBUFFER_START: + dev_priv->use_mi_batchbuffer_start = param.value; + break; + default: + return -EINVAL; + } + return 0; } diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/i830_drm.h linux.21rc1-ac1/drivers/char/drm/i830_drm.h --- linux.21rc1/drivers/char/drm/i830_drm.h 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/i830_drm.h 2003-04-22 16:44:36.000000000 +0100 @@ -3,6 +3,9 @@ /* WARNING: These defines must be the same as what the Xserver uses. * if you change them, you must change the defines in the Xserver. + * + * KW: Actually, you can't ever change them because doing so would + * break backwards compatibility. */ #ifndef _I830_DEFINES_ @@ -18,14 +21,12 @@ #define I830_NR_TEX_REGIONS 64 #define I830_LOG_MIN_TEX_REGION_SIZE 16 -/* if defining I830_ENABLE_4_TEXTURES, do it in i830_3d_reg.h, too */ -#if !defined(I830_ENABLE_4_TEXTURES) +/* KW: These aren't correct but someone set them to two and then + * released the module. Now we can't change them as doing so would + * break backwards compatibility. + */ #define I830_TEXTURE_COUNT 2 -#define I830_TEXBLEND_COUNT 2 /* always same as TEXTURE_COUNT? */ -#else /* defined(I830_ENABLE_4_TEXTURES) */ -#define I830_TEXTURE_COUNT 4 -#define I830_TEXBLEND_COUNT 4 /* always same as TEXTURE_COUNT? */ -#endif /* I830_ENABLE_4_TEXTURES */ +#define I830_TEXBLEND_COUNT I830_TEXTURE_COUNT #define I830_TEXBLEND_SIZE 12 /* (4 args + op) * 2 + COLOR_FACTOR */ @@ -57,6 +58,7 @@ #define I830_UPLOAD_TEXBLEND_MASK 0xf00000 #define I830_UPLOAD_TEX_PALETTE_N(n) (0x1000000 << (n)) #define I830_UPLOAD_TEX_PALETTE_SHARED 0x4000000 +#define I830_UPLOAD_STIPPLE 0x8000000 /* Indices into buf.Setup where various bits of state are mirrored per * context and per buffer. These can be fired at the card as a unit, @@ -73,7 +75,6 @@ */ #define I830_DESTREG_CBUFADDR 0 -/* Invarient */ #define I830_DESTREG_DBUFADDR 1 #define I830_DESTREG_DV0 2 #define I830_DESTREG_DV1 3 @@ -109,6 +110,13 @@ #define I830_CTXREG_MCSB1 16 #define I830_CTX_SETUP_SIZE 17 +/* 1.3: Stipple state + */ +#define I830_STPREG_ST0 0 +#define I830_STPREG_ST1 1 +#define I830_STP_SETUP_SIZE 2 + + /* Texture state (per tex unit) */ @@ -124,6 +132,18 @@ #define I830_TEXREG_MCS 9 /* GFX_OP_MAP_COORD_SETS */ #define I830_TEX_SETUP_SIZE 10 +#define I830_TEXREG_TM0LI 0 /* load immediate 2 texture map n */ +#define I830_TEXREG_TM0S0 1 +#define I830_TEXREG_TM0S1 2 +#define I830_TEXREG_TM0S2 3 +#define I830_TEXREG_TM0S3 4 +#define I830_TEXREG_TM0S4 5 +#define I830_TEXREG_NOP0 6 /* noop */ +#define I830_TEXREG_NOP1 7 /* noop */ +#define I830_TEXREG_NOP2 8 /* noop */ +#define __I830_TEXREG_MCS 9 /* GFX_OP_MAP_COORD_SETS -- shared */ +#define __I830_TEX_SETUP_SIZE 10 + #define I830_FRONT 0x1 #define I830_BACK 0x2 #define I830_DEPTH 0x4 @@ -199,8 +219,53 @@ int ctxOwner; /* last context to upload state */ int vertex_prim; + + int pf_enabled; /* is pageflipping allowed? */ + int pf_active; + int pf_current_page; /* which buffer is being displayed? */ + + int perf_boxes; /* performance boxes to be displayed */ + + /* Here's the state for texunits 2,3: + */ + unsigned int TexState2[I830_TEX_SETUP_SIZE]; + unsigned int TexBlendState2[I830_TEXBLEND_SIZE]; + unsigned int TexBlendStateWordsUsed2; + + unsigned int TexState3[I830_TEX_SETUP_SIZE]; + unsigned int TexBlendState3[I830_TEXBLEND_SIZE]; + unsigned int TexBlendStateWordsUsed3; + + unsigned int StippleState[I830_STP_SETUP_SIZE]; } drm_i830_sarea_t; +/* Flags for perf_boxes + */ +#define I830_BOX_RING_EMPTY 0x1 /* populated by kernel */ +#define I830_BOX_FLIP 0x2 /* populated by kernel */ +#define I830_BOX_WAIT 0x4 /* populated by kernel & client */ +#define I830_BOX_TEXTURE_LOAD 0x8 /* populated by kernel */ +#define I830_BOX_LOST_CONTEXT 0x10 /* populated by client */ + + +/* I830 specific ioctls + * The device specific ioctl range is 0x40 to 0x79. + */ +#define DRM_IOCTL_I830_INIT DRM_IOW( 0x40, drm_i830_init_t) +#define DRM_IOCTL_I830_VERTEX DRM_IOW( 0x41, drm_i830_vertex_t) +#define DRM_IOCTL_I830_CLEAR DRM_IOW( 0x42, drm_i830_clear_t) +#define DRM_IOCTL_I830_FLUSH DRM_IO ( 0x43) +#define DRM_IOCTL_I830_GETAGE DRM_IO ( 0x44) +#define DRM_IOCTL_I830_GETBUF DRM_IOWR(0x45, drm_i830_dma_t) +#define DRM_IOCTL_I830_SWAP DRM_IO ( 0x46) +#define DRM_IOCTL_I830_COPY DRM_IOW( 0x47, drm_i830_copy_t) +#define DRM_IOCTL_I830_DOCOPY DRM_IO ( 0x48) +#define DRM_IOCTL_I830_FLIP DRM_IO ( 0x49) +#define DRM_IOCTL_I830_IRQ_EMIT DRM_IOWR(0x4a, drm_i830_irq_emit_t) +#define DRM_IOCTL_I830_IRQ_WAIT DRM_IOW( 0x4b, drm_i830_irq_wait_t) +#define DRM_IOCTL_I830_GETPARAM DRM_IOWR(0x4c, drm_i830_getparam_t) +#define DRM_IOCTL_I830_SETPARAM DRM_IOWR(0x4d, drm_i830_setparam_t) + typedef struct _drm_i830_clear { int clear_color; int clear_depth; @@ -235,4 +300,36 @@ int granted; } drm_i830_dma_t; + +/* 1.3: Userspace can request & wait on irq's: + */ +typedef struct drm_i830_irq_emit { + int *irq_seq; +} drm_i830_irq_emit_t; + +typedef struct drm_i830_irq_wait { + int irq_seq; +} drm_i830_irq_wait_t; + + +/* 1.3: New ioctl to query kernel params: + */ +#define I830_PARAM_IRQ_ACTIVE 1 + +typedef struct drm_i830_getparam { + int param; + int *value; +} drm_i830_getparam_t; + + +/* 1.3: New ioctl to set kernel params: + */ +#define I830_SETPARAM_USE_MI_BATCHBUFFER_START 1 + +typedef struct drm_i830_setparam { + int param; + int value; +} drm_i830_setparam_t; + + #endif /* _I830_DRM_H_ */ diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/i830_drv.c linux.21rc1-ac1/drivers/char/drm/i830_drv.c --- linux.21rc1/drivers/char/drm/i830_drv.c 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/i830_drv.c 2003-04-22 16:44:36.000000000 +0100 @@ -29,41 +29,16 @@ * Jeff Hartmann * Gareth Hughes * Abraham vd Merwe + * Keith Whitwell */ #include #include "i830.h" #include "drmP.h" +#include "drm.h" +#include "i830_drm.h" #include "i830_drv.h" -#define DRIVER_AUTHOR "VA Linux Systems Inc." - -#define DRIVER_NAME "i830" -#define DRIVER_DESC "Intel 830M" -#define DRIVER_DATE "20011004" - -#define DRIVER_MAJOR 1 -#define DRIVER_MINOR 2 -#define DRIVER_PATCHLEVEL 0 - -#define DRIVER_IOCTLS \ - [DRM_IOCTL_NR(DRM_IOCTL_I830_INIT)] = { i830_dma_init, 1, 1 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I830_VERTEX)] = { i830_dma_vertex, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I830_CLEAR)] = { i830_clear_bufs, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I830_FLUSH)] = { i830_flush_ioctl, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I830_GETAGE)] = { i830_getage, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I830_GETBUF)] = { i830_getbuf, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I830_SWAP)] = { i830_swap_bufs, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I830_COPY)] = { i830_copybuf, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I830_DOCOPY)] = { i830_docopy, 1, 0 }, - -#define __HAVE_COUNTERS 4 -#define __HAVE_COUNTER6 _DRM_STAT_IRQ -#define __HAVE_COUNTER7 _DRM_STAT_PRIMARY -#define __HAVE_COUNTER8 _DRM_STAT_SECONDARY -#define __HAVE_COUNTER9 _DRM_STAT_DMA - - #include "drm_agpsupport.h" #include "drm_auth.h" #include "drm_bufs.h" @@ -72,25 +47,6 @@ #include "drm_drawable.h" #include "drm_drv.h" -#ifndef MODULE -/* DRM(options) is called by the kernel to parse command-line options - * passed via the boot-loader (e.g., LILO). It calls the insmod option - * routine, drm_parse_drm. - */ - -/* JH- We have to hand expand the string ourselves because of the cpp. If - * anyone can think of a way that we can fit into the __setup macro without - * changing it, then please send the solution my way. - */ -static int __init i830_options( char *str ) -{ - DRM(parse_options)( str ); - return 1; -} - -__setup( DRIVER_NAME "=", i830_options ); -#endif - #include "drm_fops.h" #include "drm_init.h" #include "drm_ioctl.h" diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/i830_drv.h linux.21rc1-ac1/drivers/char/drm/i830_drv.h --- linux.21rc1/drivers/char/drm/i830_drv.h 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/i830_drv.h 2003-04-22 16:44:36.000000000 +0100 @@ -61,24 +61,36 @@ drm_i830_sarea_t *sarea_priv; drm_i830_ring_buffer_t ring; - u8 *hw_status_page; + unsigned long hw_status_page; unsigned long counter; - - dma_addr_t dma_status_page; - atomic_t flush_done; - wait_queue_head_t flush_queue; /* Processes waiting until flush */ + dma_addr_t dma_status_page; + drm_buf_t *mmap_buffer; u32 front_di1, back_di1, zi1; int back_offset; int depth_offset; + int front_offset; int w, h; int pitch; int back_pitch; int depth_pitch; unsigned int cpp; + + int do_boxes; + int dma_used; + + int current_page; + int page_flipping; + + wait_queue_head_t irq_queue; + atomic_t irq_received; + atomic_t irq_emitted; + + int use_mi_batchbuffer_start; + } drm_i830_private_t; /* i830_dma.c */ @@ -109,24 +121,81 @@ extern int i830_clear_bufs(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg); -#define I830_VERBOSE 0 +extern int i830_flip_bufs(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg); + +extern int i830_getparam( struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg ); + +extern int i830_setparam( struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg ); + +/* i830_irq.c */ +extern int i830_irq_emit( struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg ); +extern int i830_irq_wait( struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg ); +extern int i830_wait_irq(drm_device_t *dev, int irq_nr); +extern int i830_emit_irq(drm_device_t *dev); + #define I830_BASE(reg) ((unsigned long) \ dev_priv->mmio_map->handle) #define I830_ADDR(reg) (I830_BASE(reg) + reg) -#define I830_DEREF(reg) *(__volatile__ int *)I830_ADDR(reg) -#define I830_READ(reg) I830_DEREF(reg) -#define I830_WRITE(reg,val) do { I830_DEREF(reg) = val; } while (0) +#define I830_DEREF(reg) *(__volatile__ unsigned int *)I830_ADDR(reg) +#define I830_READ(reg) readl((volatile u32 *)I830_ADDR(reg)) +#define I830_WRITE(reg,val) writel(val, (volatile u32 *)I830_ADDR(reg)) #define I830_DEREF16(reg) *(__volatile__ u16 *)I830_ADDR(reg) #define I830_READ16(reg) I830_DEREF16(reg) #define I830_WRITE16(reg,val) do { I830_DEREF16(reg) = val; } while (0) + + +#define I830_VERBOSE 0 + +#define RING_LOCALS unsigned int outring, ringmask, outcount; \ + volatile char *virt; + +#define BEGIN_LP_RING(n) do { \ + if (I830_VERBOSE) \ + printk("BEGIN_LP_RING(%d) in %s\n", \ + n, __FUNCTION__); \ + if (dev_priv->ring.space < n*4) \ + i830_wait_ring(dev, n*4, __FUNCTION__); \ + outcount = 0; \ + outring = dev_priv->ring.tail; \ + ringmask = dev_priv->ring.tail_mask; \ + virt = dev_priv->ring.virtual_start; \ +} while (0) + + +#define OUT_RING(n) do { \ + if (I830_VERBOSE) printk(" OUT_RING %x\n", (int)(n)); \ + *(volatile unsigned int *)(virt + outring) = n; \ + outcount++; \ + outring += 4; \ + outring &= ringmask; \ +} while (0) + +#define ADVANCE_LP_RING() do { \ + if (I830_VERBOSE) printk("ADVANCE_LP_RING %x\n", outring); \ + dev_priv->ring.tail = outring; \ + dev_priv->ring.space -= outcount * 4; \ + I830_WRITE(LP_RING + RING_TAIL, outring); \ +} while(0) + +extern int i830_wait_ring(drm_device_t *dev, int n, const char *caller); + + #define GFX_OP_USER_INTERRUPT ((0<<29)|(2<<23)) #define GFX_OP_BREAKPOINT_INTERRUPT ((0<<29)|(1<<23)) #define CMD_REPORT_HEAD (7<<23) #define CMD_STORE_DWORD_IDX ((0x21<<23) | 0x1) #define CMD_OP_BATCH_BUFFER ((0x0<<29)|(0x30<<23)|0x1) +#define STATE3D_LOAD_STATE_IMMEDIATE_2 ((0x3<<29)|(0x1d<<24)|(0x03<<16)) +#define LOAD_TEXTURE_MAP0 (1<<11) + #define INST_PARSER_CLIENT 0x00000000 #define INST_OP_FLUSH 0x02000000 #define INST_FLUSH_MAP_CACHE 0x00000001 @@ -142,18 +211,21 @@ #define I830REG_INT_MASK_R 0x020a8 #define I830REG_INT_ENABLE_R 0x020a0 +#define I830_IRQ_RESERVED ((1<<13)|(3<<2)) + + #define LP_RING 0x2030 #define HP_RING 0x2040 #define RING_TAIL 0x00 -#define TAIL_ADDR 0x000FFFF8 +#define TAIL_ADDR 0x001FFFF8 #define RING_HEAD 0x04 #define HEAD_WRAP_COUNT 0xFFE00000 #define HEAD_WRAP_ONE 0x00200000 #define HEAD_ADDR 0x001FFFFC #define RING_START 0x08 -#define START_ADDR 0x00FFFFF8 +#define START_ADDR 0x0xFFFFF000 #define RING_LEN 0x0C -#define RING_NR_PAGES 0x000FF000 +#define RING_NR_PAGES 0x001FF000 #define RING_REPORT_MASK 0x00000006 #define RING_REPORT_64K 0x00000002 #define RING_REPORT_128K 0x00000004 @@ -184,6 +256,12 @@ #define CMD_OP_DESTBUFFER_INFO ((0x3<<29)|(0x1d<<24)|(0x8e<<16)|1) +#define CMD_OP_DISPLAYBUFFER_INFO ((0x0<<29)|(0x14<<23)|2) +#define ASYNC_FLIP (1<<22) + +#define CMD_3D (0x3<<29) +#define STATE3D_CONST_BLEND_COLOR_CMD (CMD_3D|(0x1d<<24)|(0x88<<16)) +#define STATE3D_MAP_COORD_SETBIND_CMD (CMD_3D|(0x1d<<24)|(0x02<<16)) #define BR00_BITBLT_CLIENT 0x40000000 #define BR00_OP_COLOR_BLT 0x10000000 @@ -208,8 +286,15 @@ #define XY_SRC_COPY_BLT_WRITE_RGB (1<<20) #define MI_BATCH_BUFFER ((0x30<<23)|1) +#define MI_BATCH_BUFFER_START (0x31<<23) +#define MI_BATCH_BUFFER_END (0xA<<23) #define MI_BATCH_NON_SECURE (1) +#define MI_WAIT_FOR_EVENT ((0x3<<23)) +#define MI_WAIT_FOR_PLANE_A_FLIP (1<<2) +#define MI_WAIT_FOR_PLANE_A_SCANLINES (1<<1) + +#define MI_LOAD_SCAN_LINES_INCL ((0x12<<23)) #endif diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/i830.h linux.21rc1-ac1/drivers/char/drm/i830.h --- linux.21rc1/drivers/char/drm/i830.h 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/i830.h 2003-04-22 16:44:36.000000000 +0100 @@ -41,6 +41,48 @@ #define __HAVE_MTRR 1 #define __HAVE_CTX_BITMAP 1 +#define DRIVER_AUTHOR "VA Linux Systems Inc." + +#define DRIVER_NAME "i830" +#define DRIVER_DESC "Intel 830M" +#define DRIVER_DATE "20021108" + +/* Interface history: + * + * 1.1: Original. + * 1.2: ? + * 1.3: New irq emit/wait ioctls. + * New pageflip ioctl. + * New getparam ioctl. + * State for texunits 3&4 in sarea. + * New (alternative) layout for texture state. + */ +#define DRIVER_MAJOR 1 +#define DRIVER_MINOR 3 +#define DRIVER_PATCHLEVEL 2 + +#define DRIVER_IOCTLS \ + [DRM_IOCTL_NR(DRM_IOCTL_I830_INIT)] = { i830_dma_init, 1, 1 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_I830_VERTEX)] = { i830_dma_vertex, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_I830_CLEAR)] = { i830_clear_bufs, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_I830_FLUSH)] = { i830_flush_ioctl, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_I830_GETAGE)] = { i830_getage, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_I830_GETBUF)] = { i830_getbuf, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_I830_SWAP)] = { i830_swap_bufs, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_I830_COPY)] = { i830_copybuf, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_I830_DOCOPY)] = { i830_docopy, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_I830_FLIP)] = { i830_flip_bufs, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_I830_IRQ_EMIT)] = { i830_irq_emit, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_I830_IRQ_WAIT)] = { i830_irq_wait, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_I830_GETPARAM)] = { i830_getparam, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_I830_SETPARAM)] = { i830_setparam, 1, 0 } + +#define __HAVE_COUNTERS 4 +#define __HAVE_COUNTER6 _DRM_STAT_IRQ +#define __HAVE_COUNTER7 _DRM_STAT_PRIMARY +#define __HAVE_COUNTER8 _DRM_STAT_SECONDARY +#define __HAVE_COUNTER9 _DRM_STAT_DMA + /* Driver customization: */ #define __HAVE_RELEASE 1 @@ -60,51 +102,50 @@ i830_dma_quiescent( dev ); \ } while (0) + +/* Driver will work either way: IRQ's save cpu time when waiting for + * the card, but are subject to subtle interactions between bios, + * hardware and the driver. + */ +#define USE_IRQS 0 + + +#if USE_IRQS #define __HAVE_DMA_IRQ 1 -#define __HAVE_DMA_IRQ_BH 1 -#define __HAVE_SHARED_IRQ 1 -#define DRIVER_PREINSTALL() do { \ - drm_i830_private_t *dev_priv = \ - (drm_i830_private_t *)dev->dev_private; \ - u16 tmp; \ - tmp = I830_READ16( I830REG_HWSTAM ); \ - tmp = tmp & 0x6000; \ - I830_WRITE16( I830REG_HWSTAM, tmp ); \ - \ - tmp = I830_READ16( I830REG_INT_MASK_R ); \ - tmp = tmp & 0x6000; /* Unmask interrupts */ \ - I830_WRITE16( I830REG_INT_MASK_R, tmp ); \ - tmp = I830_READ16( I830REG_INT_ENABLE_R ); \ - tmp = tmp & 0x6000; /* Disable all interrupts */ \ - I830_WRITE16( I830REG_INT_ENABLE_R, tmp ); \ -} while (0) +#define __HAVE_SHARED_IRQ 1 -#define DRIVER_POSTINSTALL() do { \ - drm_i830_private_t *dev_priv = \ +#define DRIVER_PREINSTALL() do { \ + drm_i830_private_t *dev_priv = \ (drm_i830_private_t *)dev->dev_private; \ - u16 tmp; \ - tmp = I830_READ16( I830REG_INT_ENABLE_R ); \ - tmp = tmp & 0x6000; \ - tmp = tmp | 0x0003; /* Enable bp & user interrupts */ \ - I830_WRITE16( I830REG_INT_ENABLE_R, tmp ); \ + \ + I830_WRITE16( I830REG_HWSTAM, 0xffff ); \ + I830_WRITE16( I830REG_INT_MASK_R, 0x0 ); \ + I830_WRITE16( I830REG_INT_ENABLE_R, 0x0 ); \ } while (0) -#define DRIVER_UNINSTALL() do { \ - drm_i830_private_t *dev_priv = \ - (drm_i830_private_t *)dev->dev_private; \ - u16 tmp; \ - if ( dev_priv ) { \ - tmp = I830_READ16( I830REG_INT_IDENTITY_R ); \ - tmp = tmp & ~(0x6000); /* Clear all interrupts */ \ - if ( tmp != 0 ) \ - I830_WRITE16( I830REG_INT_IDENTITY_R, tmp ); \ - \ - tmp = I830_READ16( I830REG_INT_ENABLE_R ); \ - tmp = tmp & 0x6000; /* Disable all interrupts */ \ - I830_WRITE16( I830REG_INT_ENABLE_R, tmp ); \ - } \ + +#define DRIVER_POSTINSTALL() do { \ + drm_i830_private_t *dev_priv = \ + (drm_i830_private_t *)dev->dev_private; \ + I830_WRITE16( I830REG_INT_ENABLE_R, 0x2 ); \ + atomic_set(&dev_priv->irq_received, 0); \ + atomic_set(&dev_priv->irq_emitted, 0); \ + init_waitqueue_head(&dev_priv->irq_queue); \ } while (0) + +/* This gets called too late to be useful: dev_priv has already been + * freed. + */ +#define DRIVER_UNINSTALL() do { \ +} while (0) + +#else +#define __HAVE_DMA_IRQ 0 +#endif + + + /* Buffer customization: */ diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/i830_irq.c linux.21rc1-ac1/drivers/char/drm/i830_irq.c --- linux.21rc1/drivers/char/drm/i830_irq.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/i830_irq.c 2003-04-22 16:44:36.000000000 +0100 @@ -0,0 +1,178 @@ +/* i830_dma.c -- DMA support for the I830 -*- linux-c -*- + * + * Copyright 2002 Tungsten Graphics, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: Keith Whitwell + * + */ + + +#include "i830.h" +#include "drmP.h" +#include "drm.h" +#include "i830_drm.h" +#include "i830_drv.h" +#include /* For task queue support */ +#include + + +void DRM(dma_service)(int irq, void *device, struct pt_regs *regs) +{ + drm_device_t *dev = (drm_device_t *)device; + drm_i830_private_t *dev_priv = (drm_i830_private_t *)dev->dev_private; + u16 temp; + + temp = I830_READ16(I830REG_INT_IDENTITY_R); + printk("%s: %x\n", __FUNCTION__, temp); + + if(temp == 0) + return; + + I830_WRITE16(I830REG_INT_IDENTITY_R, temp); + + if (temp & 2) { + atomic_inc(&dev_priv->irq_received); + wake_up_interruptible(&dev_priv->irq_queue); + } +} + + +int i830_emit_irq(drm_device_t *dev) +{ + drm_i830_private_t *dev_priv = dev->dev_private; + RING_LOCALS; + + DRM_DEBUG("%s\n", __FUNCTION__); + + atomic_inc(&dev_priv->irq_emitted); + + BEGIN_LP_RING(2); + OUT_RING( 0 ); + OUT_RING( GFX_OP_USER_INTERRUPT ); + ADVANCE_LP_RING(); + + return atomic_read(&dev_priv->irq_emitted); +} + + +int i830_wait_irq(drm_device_t *dev, int irq_nr) +{ + drm_i830_private_t *dev_priv = + (drm_i830_private_t *)dev->dev_private; + DECLARE_WAITQUEUE(entry, current); + unsigned long end = jiffies + HZ*3; + int ret = 0; + + DRM_DEBUG("%s\n", __FUNCTION__); + + if (atomic_read(&dev_priv->irq_received) >= irq_nr) + return 0; + + dev_priv->sarea_priv->perf_boxes |= I830_BOX_WAIT; + + add_wait_queue(&dev_priv->irq_queue, &entry); + + for (;;) { + current->state = TASK_INTERRUPTIBLE; + if (atomic_read(&dev_priv->irq_received) >= irq_nr) + break; + if (time_after(jiffies, end)) { + DRM_ERROR("timeout iir %x imr %x ier %x hwstam %x\n", + I830_READ16( I830REG_INT_IDENTITY_R ), + I830_READ16( I830REG_INT_MASK_R ), + I830_READ16( I830REG_INT_ENABLE_R ), + I830_READ16( I830REG_HWSTAM )); + + ret = -EBUSY; /* Lockup? Missed irq? */ + break; + } + schedule_timeout(HZ*3); + if (signal_pending(current)) { + ret = -EINTR; + break; + } + } + + current->state = TASK_RUNNING; + remove_wait_queue(&dev_priv->irq_queue, &entry); + return ret; +} + + +/* Needs the lock as it touches the ring. + */ +int i830_irq_emit( struct inode *inode, struct file *filp, unsigned int cmd, + unsigned long arg ) +{ + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + drm_i830_private_t *dev_priv = dev->dev_private; + drm_i830_irq_emit_t emit; + int result; + + if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { + DRM_ERROR("i830_irq_emit called without lock held\n"); + return -EINVAL; + } + + if ( !dev_priv ) { + DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ ); + return -EINVAL; + } + + if (copy_from_user( &emit, (drm_i830_irq_emit_t *)arg, sizeof(emit) )) + return -EFAULT; + + result = i830_emit_irq( dev ); + + if ( copy_to_user( emit.irq_seq, &result, sizeof(int) ) ) { + DRM_ERROR( "copy_to_user\n" ); + return -EFAULT; + } + + return 0; +} + + +/* Doesn't need the hardware lock. + */ +int i830_irq_wait( struct inode *inode, struct file *filp, unsigned int cmd, + unsigned long arg ) +{ + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + drm_i830_private_t *dev_priv = dev->dev_private; + drm_i830_irq_wait_t irqwait; + + if ( !dev_priv ) { + DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ ); + return -EINVAL; + } + + if (copy_from_user( &irqwait, (drm_i830_irq_wait_t *)arg, + sizeof(irqwait) )) + return -EFAULT; + + return i830_wait_irq( dev, irqwait.irq_seq ); +} + diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/Makefile linux.21rc1-ac1/drivers/char/drm/Makefile --- linux.21rc1/drivers/char/drm/Makefile 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/Makefile 2003-04-22 16:44:36.000000000 +0100 @@ -10,9 +10,9 @@ r128-objs := r128_drv.o r128_cce.o r128_state.o mga-objs := mga_drv.o mga_dma.o mga_state.o mga_warp.o i810-objs := i810_drv.o i810_dma.o -i830-objs := i830_drv.o i830_dma.o +i830-objs := i830_drv.o i830_dma.o i830_irq.o -radeon-objs := radeon_drv.o radeon_cp.o radeon_state.o +radeon-objs := radeon_drv.o radeon_cp.o radeon_state.o radeon_mem.o radeon_irq.o ffb-objs := ffb_drv.o ffb_context.o sis-objs := sis_drv.o sis_ds.o sis_mm.o diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/mga_dma.c linux.21rc1-ac1/drivers/char/drm/mga_dma.c --- linux.21rc1/drivers/char/drm/mga_dma.c 2003-04-22 16:39:34.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/mga_dma.c 2003-04-22 16:44:36.000000000 +0100 @@ -35,10 +35,11 @@ #include "mga.h" #include "drmP.h" +#include "drm.h" +#include "mga_drm.h" #include "mga_drv.h" - -#include /* For task queue support */ -#include +#include +#include "drm_os_linux.h" #define MGA_DEFAULT_USEC_TIMEOUT 10000 #define MGA_FREELIST_DEBUG 0 @@ -52,7 +53,7 @@ { u32 status = 0; int i; - DRM_DEBUG( "%s\n", __FUNCTION__ ); + DRM_DEBUG( "\n" ); for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { status = MGA_READ( MGA_STATUS ) & MGA_ENGINE_IDLE_MASK; @@ -74,7 +75,7 @@ { u32 status = 0; int i; - DRM_DEBUG( "%s\n", __FUNCTION__ ); + DRM_DEBUG( "\n" ); for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { status = MGA_READ( MGA_STATUS ) & MGA_DMA_IDLE_MASK; @@ -93,7 +94,7 @@ drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; drm_mga_primary_buffer_t *primary = &dev_priv->prim; - DRM_DEBUG( "%s\n", __FUNCTION__ ); + DRM_DEBUG( "\n" ); /* The primary DMA stream should look like new right about now. */ @@ -114,7 +115,7 @@ int mga_do_engine_reset( drm_mga_private_t *dev_priv ) { - DRM_DEBUG( "%s\n", __FUNCTION__ ); + DRM_DEBUG( "\n" ); /* Okay, so we've completely screwed up and locked the engine. * How about we clean up after ourselves? @@ -160,8 +161,8 @@ u32 head, tail; u32 status = 0; int i; - DMA_LOCALS; - DRM_DEBUG( "%s:\n", __FUNCTION__ ); + DMA_LOCALS; + DRM_DEBUG( "\n" ); /* We need to wait so that we can do an safe flush */ for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { @@ -207,7 +208,7 @@ mga_flush_write_combine(); MGA_WRITE( MGA_PRIMEND, tail | MGA_PAGPXFER ); - DRM_DEBUG( "%s: done.\n", __FUNCTION__ ); + DRM_DEBUG( "done.\n" ); } void mga_do_dma_wrap_start( drm_mga_private_t *dev_priv ) @@ -215,7 +216,7 @@ drm_mga_primary_buffer_t *primary = &dev_priv->prim; u32 head, tail; DMA_LOCALS; - DRM_DEBUG( "%s:\n", __FUNCTION__ ); + DRM_DEBUG( "\n" ); BEGIN_DMA_WRAP(); @@ -250,7 +251,7 @@ MGA_WRITE( MGA_PRIMEND, tail | MGA_PAGPXFER ); set_bit( 0, &primary->wrapped ); - DRM_DEBUG( "%s: done.\n", __FUNCTION__ ); + DRM_DEBUG( "done.\n" ); } void mga_do_dma_wrap_end( drm_mga_private_t *dev_priv ) @@ -258,7 +259,7 @@ drm_mga_primary_buffer_t *primary = &dev_priv->prim; drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; u32 head = dev_priv->primary->offset; - DRM_DEBUG( "%s:\n", __FUNCTION__ ); + DRM_DEBUG( "\n" ); sarea_priv->last_wrap++; DRM_DEBUG( " wrap = %d\n", sarea_priv->last_wrap ); @@ -267,7 +268,7 @@ MGA_WRITE( MGA_PRIMADDRESS, head | MGA_DMA_GENERAL ); clear_bit( 0, &primary->wrapped ); - DRM_DEBUG( "%s: done.\n", __FUNCTION__ ); + DRM_DEBUG( "done.\n" ); } @@ -307,8 +308,7 @@ drm_mga_buf_priv_t *buf_priv; drm_mga_freelist_t *entry; int i; - DRM_DEBUG( "%s: count=%d\n", - __FUNCTION__, dma->buf_count ); + DRM_DEBUG( "count=%d\n", dma->buf_count ); dev_priv->head = DRM(alloc)( sizeof(drm_mga_freelist_t), DRM_MEM_DRIVER ); @@ -354,7 +354,7 @@ drm_mga_private_t *dev_priv = dev->dev_private; drm_mga_freelist_t *entry; drm_mga_freelist_t *next; - DRM_DEBUG( "%s\n", __FUNCTION__ ); + DRM_DEBUG( "\n" ); entry = dev_priv->head; while ( entry ) { @@ -392,7 +392,7 @@ drm_mga_freelist_t *prev; drm_mga_freelist_t *tail = dev_priv->tail; u32 head, wrap; - DRM_DEBUG( "%s:\n", __FUNCTION__ ); + DRM_DEBUG( "\n" ); head = MGA_READ( MGA_PRIMADDRESS ); wrap = dev_priv->sarea_priv->last_wrap; @@ -424,8 +424,7 @@ drm_mga_buf_priv_t *buf_priv = buf->dev_private; drm_mga_freelist_t *head, *entry, *prev; - DRM_DEBUG( "%s: age=0x%06lx wrap=%d\n", - __FUNCTION__, + DRM_DEBUG( "age=0x%06lx wrap=%d\n", buf_priv->list_entry->age.head - dev_priv->primary->offset, buf_priv->list_entry->age.wrap ); @@ -458,9 +457,8 @@ static int mga_do_init_dma( drm_device_t *dev, drm_mga_init_t *init ) { drm_mga_private_t *dev_priv; - struct list_head *list; int ret; - DRM_DEBUG( "%s\n", __FUNCTION__ ); + DRM_DEBUG( "\n" ); dev_priv = DRM(alloc)( sizeof(drm_mga_private_t), DRM_MEM_DRIVER ); if ( !dev_priv ) @@ -494,15 +492,8 @@ dev_priv->texture_offset = init->texture_offset[0]; dev_priv->texture_size = init->texture_size[0]; - list_for_each( list, &dev->maplist->head ) { - drm_map_list_t *entry = (drm_map_list_t *)list; - if ( entry->map && - entry->map->type == _DRM_SHM && - (entry->map->flags & _DRM_CONTAINS_LOCK) ) { - dev_priv->sarea = entry->map; - break; - } - } + DRM_GETSAREA(); + if(!dev_priv->sarea) { DRM_ERROR( "failed to find sarea!\n" ); /* Assign dev_private so we can do cleanup. */ @@ -626,8 +617,6 @@ dev_priv->prim.high_mark = 256 * DMA_BLOCK_SIZE; - spin_lock_init( &dev_priv->prim.list_lock ); - dev_priv->prim.status[0] = dev_priv->primary->offset; dev_priv->prim.status[1] = 0; @@ -650,7 +639,7 @@ int mga_do_cleanup_dma( drm_device_t *dev ) { - DRM_DEBUG( "%s\n", __FUNCTION__ ); + DRM_DEBUG( "\n" ); if ( dev->dev_private ) { drm_mga_private_t *dev_priv = dev->dev_private; @@ -725,7 +714,7 @@ #if MGA_DMA_DEBUG int ret = mga_do_wait_for_idle( dev_priv ); if ( ret < 0 ) - DRM_INFO( __FUNCTION__": -EBUSY\n" ); + DRM_INFO( "%s: -EBUSY\n", __FUNCTION__ ); return ret; #else return mga_do_wait_for_idle( dev_priv ); diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/mga_drm.h linux.21rc1-ac1/drivers/char/drm/mga_drm.h --- linux.21rc1/drivers/char/drm/mga_drm.h 2003-04-22 16:39:34.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/mga_drm.h 2003-04-22 16:44:36.000000000 +0100 @@ -225,6 +225,20 @@ /* WARNING: If you change any of these defines, make sure to change the * defines in the Xserver file (xf86drmMga.h) */ + +/* MGA specific ioctls + * The device specific ioctl range is 0x40 to 0x79. + */ +#define DRM_IOCTL_MGA_INIT DRM_IOW( 0x40, drm_mga_init_t) +#define DRM_IOCTL_MGA_FLUSH DRM_IOW( 0x41, drm_lock_t) +#define DRM_IOCTL_MGA_RESET DRM_IO( 0x42) +#define DRM_IOCTL_MGA_SWAP DRM_IO( 0x43) +#define DRM_IOCTL_MGA_CLEAR DRM_IOW( 0x44, drm_mga_clear_t) +#define DRM_IOCTL_MGA_VERTEX DRM_IOW( 0x45, drm_mga_vertex_t) +#define DRM_IOCTL_MGA_INDICES DRM_IOW( 0x46, drm_mga_indices_t) +#define DRM_IOCTL_MGA_ILOAD DRM_IOW( 0x47, drm_mga_iload_t) +#define DRM_IOCTL_MGA_BLIT DRM_IOW( 0x48, drm_mga_blit_t) + typedef struct _drm_mga_warp_index { int installed; unsigned long phys_addr; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/mga_drv.c linux.21rc1-ac1/drivers/char/drm/mga_drv.c --- linux.21rc1/drivers/char/drm/mga_drv.c 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/mga_drv.c 2003-04-22 16:44:36.000000000 +0100 @@ -32,37 +32,9 @@ #include #include "mga.h" #include "drmP.h" +#include "drm.h" +#include "mga_drm.h" #include "mga_drv.h" - -#define DRIVER_AUTHOR "Gareth Hughes, VA Linux Systems Inc." - -#define DRIVER_NAME "mga" -#define DRIVER_DESC "Matrox G200/G400" -#define DRIVER_DATE "20010321" - -#define DRIVER_MAJOR 3 -#define DRIVER_MINOR 0 -#define DRIVER_PATCHLEVEL 2 - -#define DRIVER_IOCTLS \ - [DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { mga_dma_buffers, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_MGA_INIT)] = { mga_dma_init, 1, 1 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_MGA_FLUSH)] = { mga_dma_flush, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_MGA_RESET)] = { mga_dma_reset, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_MGA_SWAP)] = { mga_dma_swap, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_MGA_CLEAR)] = { mga_dma_clear, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_MGA_VERTEX)] = { mga_dma_vertex, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_MGA_INDICES)] = { mga_dma_indices, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_MGA_ILOAD)] = { mga_dma_iload, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_MGA_BLIT)] = { mga_dma_blit, 1, 0 }, - - -#define __HAVE_COUNTERS 3 -#define __HAVE_COUNTER6 _DRM_STAT_IRQ -#define __HAVE_COUNTER7 _DRM_STAT_PRIMARY -#define __HAVE_COUNTER8 _DRM_STAT_SECONDARY - - #include "drm_agpsupport.h" #include "drm_auth.h" #include "drm_bufs.h" @@ -70,27 +42,6 @@ #include "drm_dma.h" #include "drm_drawable.h" #include "drm_drv.h" - -#ifndef MODULE -/* DRM(options) is called by the kernel to parse command-line options - * passed via the boot-loader (e.g., LILO). It calls the insmod option - * routine, drm_parse_drm. - */ - -/* JH- We have to hand expand the string ourselves because of the cpp. If - * anyone can think of a way that we can fit into the __setup macro without - * changing it, then please send the solution my way. - */ -static int __init mga_options( char *str ) -{ - DRM(parse_options)( str ); - return 1; -} - -__setup( DRIVER_NAME "=", mga_options ); -#endif - - #include "drm_fops.h" #include "drm_init.h" #include "drm_ioctl.h" diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/mga_drv.h linux.21rc1-ac1/drivers/char/drm/mga_drv.h --- linux.21rc1/drivers/char/drm/mga_drv.h 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/mga_drv.h 2003-04-22 16:44:36.000000000 +0100 @@ -46,8 +46,6 @@ u32 last_wrap; u32 high_mark; - - spinlock_t list_lock; } drm_mga_primary_buffer_t; typedef struct drm_mga_freelist { @@ -257,7 +255,7 @@ #define BEGIN_DMA_WRAP() \ do { \ if ( MGA_VERBOSE ) { \ - DRM_INFO( "BEGIN_DMA() in %s\n", __FUNCTION__ ); \ + DRM_INFO( "BEGIN_DMA() in %s\n", __FUNCTION__ ); \ DRM_INFO( " space=0x%x\n", dev_priv->prim.space ); \ } \ prim = dev_priv->prim.start; \ @@ -276,7 +274,7 @@ #define FLUSH_DMA() \ do { \ if ( 0 ) { \ - DRM_INFO( "%s:\n" , __FUNCTION__); \ + DRM_INFO( "%s:\n", __FUNCTION__ ); \ DRM_INFO( " tail=0x%06x head=0x%06lx\n", \ dev_priv->prim.tail, \ MGA_READ( MGA_PRIMADDRESS ) - \ diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/mga.h linux.21rc1-ac1/drivers/char/drm/mga.h --- linux.21rc1/drivers/char/drm/mga.h 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/mga.h 2003-04-22 16:44:36.000000000 +0100 @@ -41,6 +41,33 @@ #define __HAVE_MTRR 1 #define __HAVE_CTX_BITMAP 1 +#define DRIVER_AUTHOR "Gareth Hughes, VA Linux Systems Inc." + +#define DRIVER_NAME "mga" +#define DRIVER_DESC "Matrox G200/G400" +#define DRIVER_DATE "20010321" + +#define DRIVER_MAJOR 3 +#define DRIVER_MINOR 0 +#define DRIVER_PATCHLEVEL 2 + +#define DRIVER_IOCTLS \ + [DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { mga_dma_buffers, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_MGA_INIT)] = { mga_dma_init, 1, 1 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_MGA_FLUSH)] = { mga_dma_flush, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_MGA_RESET)] = { mga_dma_reset, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_MGA_SWAP)] = { mga_dma_swap, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_MGA_CLEAR)] = { mga_dma_clear, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_MGA_VERTEX)] = { mga_dma_vertex, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_MGA_INDICES)] = { mga_dma_indices, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_MGA_ILOAD)] = { mga_dma_iload, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_MGA_BLIT)] = { mga_dma_blit, 1, 0 }, + +#define __HAVE_COUNTERS 3 +#define __HAVE_COUNTER6 _DRM_STAT_IRQ +#define __HAVE_COUNTER7 _DRM_STAT_PRIMARY +#define __HAVE_COUNTER8 _DRM_STAT_SECONDARY + /* Driver customization: */ #define DRIVER_PRETAKEDOWN() do { \ diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/mga_state.c linux.21rc1-ac1/drivers/char/drm/mga_state.c --- linux.21rc1/drivers/char/drm/mga_state.c 2003-04-22 16:39:34.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/mga_state.c 2003-04-22 16:44:36.000000000 +0100 @@ -34,8 +34,9 @@ #include "mga.h" #include "drmP.h" -#include "mga_drv.h" #include "drm.h" +#include "mga_drm.h" +#include "mga_drv.h" /* ================================================================ @@ -512,7 +513,7 @@ int nbox = sarea_priv->nbox; int i; DMA_LOCALS; - DRM_DEBUG("%s:\n" , __FUNCTION__); + DRM_DEBUG( "\n" ); BEGIN_DMA( 1 ); @@ -606,7 +607,7 @@ int nbox = sarea_priv->nbox; int i; DMA_LOCALS; - DRM_DEBUG( "%s:\n", __FUNCTION__ ); + DRM_DEBUG( "\n" ); sarea_priv->last_frame.head = dev_priv->prim.tail; sarea_priv->last_frame.wrap = dev_priv->prim.last_wrap; @@ -760,8 +761,7 @@ u32 srcorg = buf->bus_address | MGA_SRCACC_AGP | MGA_SRCMAP_SYSMEM; u32 y2; DMA_LOCALS; - DRM_DEBUG( "%s: buf=%d used=%d\n", - __FUNCTION__, buf->idx, buf->used ); + DRM_DEBUG( "buf=%d used=%d\n", buf->idx, buf->used ); y2 = length / 64; @@ -815,7 +815,7 @@ int nbox = sarea_priv->nbox; u32 scandir = 0, i; DMA_LOCALS; - DRM_DEBUG( "%s:\n", __FUNCTION__ ); + DRM_DEBUG( "\n" ); BEGIN_DMA( 4 + nbox ); diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/mga_warp.c linux.21rc1-ac1/drivers/char/drm/mga_warp.c --- linux.21rc1/drivers/char/drm/mga_warp.c 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/mga_warp.c 2003-04-22 16:44:36.000000000 +0100 @@ -27,8 +27,11 @@ * Gareth Hughes */ + #include "mga.h" #include "drmP.h" +#include "drm.h" +#include "mga_drm.h" #include "mga_drv.h" #include "mga_ucode.h" diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/r128_cce.c linux.21rc1-ac1/drivers/char/drm/r128_cce.c --- linux.21rc1/drivers/char/drm/r128_cce.c 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/r128_cce.c 2003-04-22 16:44:36.000000000 +0100 @@ -30,14 +30,14 @@ #include "r128.h" #include "drmP.h" +#include "drm.h" +#include "r128_drm.h" #include "r128_drv.h" - -#include /* For task queue support */ -#include +#include "drm_os_linux.h" +#include #define R128_FIFO_DEBUG 0 - /* CCE microcode (from ATI) */ static u32 r128_cce_microcode[] = { 0, 276838400, 0, 268449792, 2, 142, 2, 145, 0, 1076765731, 0, @@ -83,6 +83,7 @@ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }; +int r128_do_wait_for_idle( drm_r128_private_t *dev_priv ); int R128_READ_PLL(drm_device_t *dev, int addr) { @@ -131,7 +132,7 @@ } #if R128_FIFO_DEBUG - DRM_ERROR( "%s failed!\n", __FUNCTION__ ); + DRM_ERROR( "failed!\n" ); #endif return -EBUSY; } @@ -147,7 +148,7 @@ } #if R128_FIFO_DEBUG - DRM_ERROR( "%s failed!\n", __FUNCTION__ ); + DRM_ERROR( "failed!\n" ); #endif return -EBUSY; } @@ -157,7 +158,7 @@ int i, ret; ret = r128_do_wait_for_fifo( dev_priv, 64 ); - if ( ret < 0 ) return ret; + if ( ret ) return ret; for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { if ( !(R128_READ( R128_GUI_STAT ) & R128_GUI_ACTIVE) ) { @@ -168,7 +169,7 @@ } #if R128_FIFO_DEBUG - DRM_ERROR( "%s failed!\n", __FUNCTION__ ); + DRM_ERROR( "failed!\n" ); #endif return -EBUSY; } @@ -183,7 +184,7 @@ { int i; - DRM_DEBUG( "%s\n", __FUNCTION__ ); + DRM_DEBUG( "\n" ); r128_do_wait_for_idle( dev_priv ); @@ -319,7 +320,7 @@ u32 ring_start; u32 tmp; - DRM_DEBUG( "%s\n", __FUNCTION__ ); + DRM_DEBUG( "\n" ); /* The manual (p. 2) says this address is in "VM space". This * means it's an offset from the start of AGP space. @@ -351,8 +352,8 @@ R128_WRITE( R128_PM4_BUFFER_DL_RPTR_ADDR, entry->busaddr[page_ofs]); - DRM_DEBUG( "ring rptr: offset=0x%08llx handle=0x%08lx\n", - (u64)entry->busaddr[page_ofs], + DRM_DEBUG( "ring rptr: offset=0x%08x handle=0x%08lx\n", + entry->busaddr[page_ofs], entry->handle + tmp_ofs ); } @@ -374,9 +375,8 @@ static int r128_do_init_cce( drm_device_t *dev, drm_r128_init_t *init ) { drm_r128_private_t *dev_priv; - struct list_head *list; - DRM_DEBUG( "%s\n", __FUNCTION__ ); + DRM_DEBUG( "\n" ); dev_priv = DRM(alloc)( sizeof(drm_r128_private_t), DRM_MEM_DRIVER ); if ( dev_priv == NULL ) @@ -481,15 +481,8 @@ dev_priv->span_pitch_offset_c = (((dev_priv->depth_pitch/8) << 21) | (dev_priv->span_offset >> 5)); - list_for_each(list, &dev->maplist->head) { - drm_map_list_t *r_list = (drm_map_list_t *)list; - if( r_list->map && - r_list->map->type == _DRM_SHM && - r_list->map->flags & _DRM_CONTAINS_LOCK ) { - dev_priv->sarea = r_list->map; - break; - } - } + DRM_GETSAREA(); + if(!dev_priv->sarea) { DRM_ERROR("could not find sarea!\n"); dev->dev_private = (void *)dev_priv; @@ -622,16 +615,20 @@ if ( dev->dev_private ) { drm_r128_private_t *dev_priv = dev->dev_private; +#if __REALLY_HAVE_SG if ( !dev_priv->is_pci ) { +#endif DRM_IOREMAPFREE( dev_priv->cce_ring ); DRM_IOREMAPFREE( dev_priv->ring_rptr ); DRM_IOREMAPFREE( dev_priv->buffers ); +#if __REALLY_HAVE_SG } else { if (!DRM(ati_pcigart_cleanup)( dev, dev_priv->phys_pci_gart, dev_priv->bus_pci_gart )) DRM_ERROR( "failed to cleanup PCI GART!\n" ); } +#endif DRM(free)( dev->dev_private, sizeof(drm_r128_private_t), DRM_MEM_DRIVER ); @@ -713,7 +710,7 @@ */ if ( stop.idle ) { ret = r128_do_cce_idle( dev_priv ); - if ( ret < 0 ) return ret; + if ( ret ) return ret; } /* Finally, we can turn off the CCE. If the engine isn't idle, @@ -790,7 +787,7 @@ static int r128_do_init_pageflip( drm_device_t *dev ) { drm_r128_private_t *dev_priv = dev->dev_private; - DRM_DEBUG( "%s\n", __FUNCTION__ ); + DRM_DEBUG( "\n" ); dev_priv->crtc_offset = R128_READ( R128_CRTC_OFFSET ); dev_priv->crtc_offset_cntl = R128_READ( R128_CRTC_OFFSET_CNTL ); @@ -808,7 +805,7 @@ int r128_do_cleanup_pageflip( drm_device_t *dev ) { drm_r128_private_t *dev_priv = dev->dev_private; - DRM_DEBUG( "%s\n", __FUNCTION__ ); + DRM_DEBUG( "\n" ); R128_WRITE( R128_CRTC_OFFSET, dev_priv->crtc_offset ); R128_WRITE( R128_CRTC_OFFSET_CNTL, dev_priv->crtc_offset_cntl ); diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/r128_drm.h linux.21rc1-ac1/drivers/char/drm/r128_drm.h --- linux.21rc1/drivers/char/drm/r128_drm.h 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/r128_drm.h 2003-04-22 16:44:36.000000000 +0100 @@ -170,6 +170,27 @@ /* WARNING: If you change any of these defines, make sure to change the * defines in the Xserver file (xf86drmR128.h) */ + +/* Rage 128 specific ioctls + * The device specific ioctl range is 0x40 to 0x79. + */ +#define DRM_IOCTL_R128_INIT DRM_IOW( 0x40, drm_r128_init_t) +#define DRM_IOCTL_R128_CCE_START DRM_IO( 0x41) +#define DRM_IOCTL_R128_CCE_STOP DRM_IOW( 0x42, drm_r128_cce_stop_t) +#define DRM_IOCTL_R128_CCE_RESET DRM_IO( 0x43) +#define DRM_IOCTL_R128_CCE_IDLE DRM_IO( 0x44) +#define DRM_IOCTL_R128_RESET DRM_IO( 0x46) +#define DRM_IOCTL_R128_SWAP DRM_IO( 0x47) +#define DRM_IOCTL_R128_CLEAR DRM_IOW( 0x48, drm_r128_clear_t) +#define DRM_IOCTL_R128_VERTEX DRM_IOW( 0x49, drm_r128_vertex_t) +#define DRM_IOCTL_R128_INDICES DRM_IOW( 0x4a, drm_r128_indices_t) +#define DRM_IOCTL_R128_BLIT DRM_IOW( 0x4b, drm_r128_blit_t) +#define DRM_IOCTL_R128_DEPTH DRM_IOW( 0x4c, drm_r128_depth_t) +#define DRM_IOCTL_R128_STIPPLE DRM_IOW( 0x4d, drm_r128_stipple_t) +#define DRM_IOCTL_R128_INDIRECT DRM_IOWR(0x4f, drm_r128_indirect_t) +#define DRM_IOCTL_R128_FULLSCREEN DRM_IOW( 0x50, drm_r128_fullscreen_t) +#define DRM_IOCTL_R128_CLEAR2 DRM_IOW( 0x51, drm_r128_clear2_t) + typedef struct drm_r128_init { enum { R128_INIT_CCE = 0x01, diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/r128_drv.c linux.21rc1-ac1/drivers/char/drm/r128_drv.c --- linux.21rc1/drivers/char/drm/r128_drv.c 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/r128_drv.c 2003-04-22 16:44:36.000000000 +0100 @@ -32,48 +32,11 @@ #include #include "r128.h" #include "drmP.h" +#include "drm.h" +#include "r128_drm.h" #include "r128_drv.h" #include "ati_pcigart.h" -#define DRIVER_AUTHOR "Gareth Hughes, VA Linux Systems Inc." - -#define DRIVER_NAME "r128" -#define DRIVER_DESC "ATI Rage 128" -#define DRIVER_DATE "20010917" - -#define DRIVER_MAJOR 2 -#define DRIVER_MINOR 2 -#define DRIVER_PATCHLEVEL 0 - -#define DRIVER_IOCTLS \ - [DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { r128_cce_buffers, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_R128_INIT)] = { r128_cce_init, 1, 1 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_R128_CCE_START)] = { r128_cce_start, 1, 1 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_R128_CCE_STOP)] = { r128_cce_stop, 1, 1 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_R128_CCE_RESET)] = { r128_cce_reset, 1, 1 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_R128_CCE_IDLE)] = { r128_cce_idle, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_R128_RESET)] = { r128_engine_reset, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_R128_FULLSCREEN)] = { r128_fullscreen, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_R128_SWAP)] = { r128_cce_swap, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_R128_CLEAR)] = { r128_cce_clear, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_R128_VERTEX)] = { r128_cce_vertex, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_R128_INDICES)] = { r128_cce_indices, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_R128_BLIT)] = { r128_cce_blit, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_R128_DEPTH)] = { r128_cce_depth, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_R128_STIPPLE)] = { r128_cce_stipple, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_R128_INDIRECT)] = { r128_cce_indirect, 1, 1 }, - - -#if 0 -/* GH: Count data sent to card via ring or vertex/indirect buffers. - */ -#define __HAVE_COUNTERS 3 -#define __HAVE_COUNTER6 _DRM_STAT_IRQ -#define __HAVE_COUNTER7 _DRM_STAT_PRIMARY -#define __HAVE_COUNTER8 _DRM_STAT_SECONDARY -#endif - - #include "drm_agpsupport.h" #include "drm_auth.h" #include "drm_bufs.h" @@ -81,26 +44,6 @@ #include "drm_dma.h" #include "drm_drawable.h" #include "drm_drv.h" - -#ifndef MODULE -/* DRM(options) is called by the kernel to parse command-line options - * passed via the boot-loader (e.g., LILO). It calls the insmod option - * routine, drm_parse_drm. - */ - -/* JH- We have to hand expand the string ourselves because of the cpp. If - * anyone can think of a way that we can fit into the __setup macro without - * changing it, then please send the solution my way. - */ -static int __init r128_options( char *str ) -{ - DRM(parse_options)( str ); - return 1; -} - -__setup( DRIVER_NAME "=", r128_options ); -#endif - #include "drm_fops.h" #include "drm_init.h" #include "drm_ioctl.h" diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/r128_drv.h linux.21rc1-ac1/drivers/char/drm/r128_drv.h --- linux.21rc1/drivers/char/drm/r128_drv.h 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/r128_drv.h 2003-04-22 16:44:36.000000000 +0100 @@ -33,9 +33,10 @@ #ifndef __R128_DRV_H__ #define __R128_DRV_H__ +#include -#define GET_RING_HEAD( ring ) le32_to_cpu( *(ring)->head ) -#define SET_RING_HEAD( ring, val ) *(ring)->head = cpu_to_le32( val ) +#define GET_RING_HEAD(ring) readl( (volatile u32 *) (ring)->head ) +#define SET_RING_HEAD(ring,val) writel( (val), (volatile u32 *) (ring)->head ) typedef struct drm_r128_freelist { unsigned int age; @@ -384,44 +385,11 @@ #define R128_BASE(reg) ((unsigned long)(dev_priv->mmio->handle)) #define R128_ADDR(reg) (R128_BASE( reg ) + reg) -#define R128_DEREF(reg) *(volatile u32 *)R128_ADDR( reg ) -#ifdef __alpha__ -#define R128_READ(reg) (_R128_READ((u32 *)R128_ADDR(reg))) -static inline u32 _R128_READ(u32 *addr) -{ - mb(); - return *(volatile u32 *)addr; -} -#define R128_WRITE(reg,val) \ -do { \ - wmb(); \ - R128_DEREF(reg) = val; \ -} while (0) -#else -#define R128_READ(reg) le32_to_cpu( R128_DEREF( reg ) ) -#define R128_WRITE(reg,val) \ -do { \ - R128_DEREF( reg ) = cpu_to_le32( val ); \ -} while (0) -#endif +#define R128_READ(reg) readl( (volatile u32 *) R128_ADDR(reg) ) +#define R128_WRITE(reg,val) writel( (val) , (volatile u32 *) R128_ADDR(reg)) -#define R128_DEREF8(reg) *(volatile u8 *)R128_ADDR( reg ) -#ifdef __alpha__ -#define R128_READ8(reg) _R128_READ8((u8 *)R128_ADDR(reg)) -static inline u8 _R128_READ8(u8 *addr) -{ - mb(); - return *(volatile u8 *)addr; -} -#define R128_WRITE8(reg,val) \ -do { \ - wmb(); \ - R128_DEREF8(reg) = val; \ -} while (0) -#else -#define R128_READ8(reg) R128_DEREF8( reg ) -#define R128_WRITE8(reg,val) do { R128_DEREF8( reg ) = val; } while (0) -#endif +#define R128_READ8(reg) readb( (volatile u8 *) R128_ADDR(reg) ) +#define R128_WRITE8(reg,val) writeb( (val), (volatile u8 *) R128_ADDR(reg) ) #define R128_WRITE_PLL(addr,val) \ do { \ @@ -470,6 +438,7 @@ return -EBUSY; \ } \ __ring_space_done: ; \ + break; \ } while (0) #define VB_AGE_TEST_WITH_RETURN( dev_priv ) \ @@ -493,7 +462,11 @@ * Ring control */ +#if defined(__powerpc__) +#define r128_flush_write_combine() (void) GET_RING_HEAD( &dev_priv->ring ) +#else #define r128_flush_write_combine() mb() +#endif #define R128_VERBOSE 0 diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/r128.h linux.21rc1-ac1/drivers/char/drm/r128.h --- linux.21rc1/drivers/char/drm/r128.h 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/r128.h 2003-04-22 16:44:36.000000000 +0100 @@ -43,6 +43,35 @@ #define __HAVE_SG 1 #define __HAVE_PCI_DMA 1 +#define DRIVER_AUTHOR "Gareth Hughes, VA Linux Systems Inc." + +#define DRIVER_NAME "r128" +#define DRIVER_DESC "ATI Rage 128" +#define DRIVER_DATE "20010917" + +#define DRIVER_MAJOR 2 +#define DRIVER_MINOR 2 +#define DRIVER_PATCHLEVEL 0 + + +#define DRIVER_IOCTLS \ + [DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { r128_cce_buffers, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_R128_INIT)] = { r128_cce_init, 1, 1 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_R128_CCE_START)] = { r128_cce_start, 1, 1 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_R128_CCE_STOP)] = { r128_cce_stop, 1, 1 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_R128_CCE_RESET)] = { r128_cce_reset, 1, 1 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_R128_CCE_IDLE)] = { r128_cce_idle, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_R128_RESET)] = { r128_engine_reset, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_R128_FULLSCREEN)] = { r128_fullscreen, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_R128_SWAP)] = { r128_cce_swap, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_R128_CLEAR)] = { r128_cce_clear, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_R128_VERTEX)] = { r128_cce_vertex, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_R128_INDICES)] = { r128_cce_indices, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_R128_BLIT)] = { r128_cce_blit, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_R128_DEPTH)] = { r128_cce_depth, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_R128_STIPPLE)] = { r128_cce_stipple, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_R128_INDIRECT)] = { r128_cce_indirect, 1, 1 }, + /* Driver customization: */ #define DRIVER_PRERELEASE() do { \ diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/r128_state.c linux.21rc1-ac1/drivers/char/drm/r128_state.c --- linux.21rc1/drivers/char/drm/r128_state.c 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/r128_state.c 2003-04-22 16:44:36.000000000 +0100 @@ -29,9 +29,9 @@ #include "r128.h" #include "drmP.h" -#include "r128_drv.h" #include "drm.h" -#include +#include "r128_drm.h" +#include "r128_drv.h" /* ================================================================ @@ -528,7 +528,7 @@ { drm_r128_private_t *dev_priv = dev->dev_private; RING_LOCALS; - DRM_DEBUG( "%s: page=%d\n", __FUNCTION__, dev_priv->current_page ); + DRM_DEBUG( "page=%d\n", dev_priv->current_page ); #if R128_PERFORMANCE_BOXES /* Do some trivial performance monitoring... @@ -577,8 +577,7 @@ int prim = buf_priv->prim; int i = 0; RING_LOCALS; - DRM_DEBUG( "%s: buf=%d nbox=%d\n", - __FUNCTION__, buf->idx, sarea_priv->nbox ); + DRM_DEBUG( "buf=%d nbox=%d\n", buf->idx, sarea_priv->nbox ); if ( 0 ) r128_print_dirty( "dispatch_vertex", sarea_priv->dirty ); @@ -789,7 +788,7 @@ u32 *data; int dword_shift, dwords; RING_LOCALS; - DRM_DEBUG( "%s\n", __FUNCTION__ ); + DRM_DEBUG( "\n" ); /* The compiler won't optimize away a division by a variable, * even if the only legal values are powers of two. Thus, we'll diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/radeon_cp.c linux.21rc1-ac1/drivers/char/drm/radeon_cp.c --- linux.21rc1/drivers/char/drm/radeon_cp.c 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/radeon_cp.c 2003-04-22 16:44:36.000000000 +0100 @@ -30,21 +30,278 @@ #include "radeon.h" #include "drmP.h" +#include "drm.h" +#include "radeon_drm.h" #include "radeon_drv.h" +#include "drm_os_linux.h" #include /* For task queue support */ #include - #define RADEON_FIFO_DEBUG 0 -#if defined(__alpha__) -# define PCIGART_ENABLED -#else -# undef PCIGART_ENABLED -#endif /* CP microcode (from ATI) */ +static u32 R200_cp_microcode[][2] = { + { 0x21007000, 0000000000 }, + { 0x20007000, 0000000000 }, + { 0x000000ab, 0x00000004 }, + { 0x000000af, 0x00000004 }, + { 0x66544a49, 0000000000 }, + { 0x49494174, 0000000000 }, + { 0x54517d83, 0000000000 }, + { 0x498d8b64, 0000000000 }, + { 0x49494949, 0000000000 }, + { 0x49da493c, 0000000000 }, + { 0x49989898, 0000000000 }, + { 0xd34949d5, 0000000000 }, + { 0x9dc90e11, 0000000000 }, + { 0xce9b9b9b, 0000000000 }, + { 0x000f0000, 0x00000016 }, + { 0x352e232c, 0000000000 }, + { 0x00000013, 0x00000004 }, + { 0x000f0000, 0x00000016 }, + { 0x352e272c, 0000000000 }, + { 0x000f0001, 0x00000016 }, + { 0x3239362f, 0000000000 }, + { 0x000077ef, 0x00000002 }, + { 0x00061000, 0x00000002 }, + { 0x00000020, 0x0000001a }, + { 0x00004000, 0x0000001e }, + { 0x00061000, 0x00000002 }, + { 0x00000020, 0x0000001a }, + { 0x00004000, 0x0000001e }, + { 0x00061000, 0x00000002 }, + { 0x00000020, 0x0000001a }, + { 0x00004000, 0x0000001e }, + { 0x00000016, 0x00000004 }, + { 0x0003802a, 0x00000002 }, + { 0x040067e0, 0x00000002 }, + { 0x00000016, 0x00000004 }, + { 0x000077e0, 0x00000002 }, + { 0x00065000, 0x00000002 }, + { 0x000037e1, 0x00000002 }, + { 0x040067e1, 0x00000006 }, + { 0x000077e0, 0x00000002 }, + { 0x000077e1, 0x00000002 }, + { 0x000077e1, 0x00000006 }, + { 0xffffffff, 0000000000 }, + { 0x10000000, 0000000000 }, + { 0x0003802a, 0x00000002 }, + { 0x040067e0, 0x00000006 }, + { 0x00007675, 0x00000002 }, + { 0x00007676, 0x00000002 }, + { 0x00007677, 0x00000002 }, + { 0x00007678, 0x00000006 }, + { 0x0003802b, 0x00000002 }, + { 0x04002676, 0x00000002 }, + { 0x00007677, 0x00000002 }, + { 0x00007678, 0x00000006 }, + { 0x0000002e, 0x00000018 }, + { 0x0000002e, 0x00000018 }, + { 0000000000, 0x00000006 }, + { 0x0000002f, 0x00000018 }, + { 0x0000002f, 0x00000018 }, + { 0000000000, 0x00000006 }, + { 0x01605000, 0x00000002 }, + { 0x00065000, 0x00000002 }, + { 0x00098000, 0x00000002 }, + { 0x00061000, 0x00000002 }, + { 0x64c0603d, 0x00000004 }, + { 0x00080000, 0x00000016 }, + { 0000000000, 0000000000 }, + { 0x0400251d, 0x00000002 }, + { 0x00007580, 0x00000002 }, + { 0x00067581, 0x00000002 }, + { 0x04002580, 0x00000002 }, + { 0x00067581, 0x00000002 }, + { 0x00000046, 0x00000004 }, + { 0x00005000, 0000000000 }, + { 0x00061000, 0x00000002 }, + { 0x0000750e, 0x00000002 }, + { 0x00019000, 0x00000002 }, + { 0x00011055, 0x00000014 }, + { 0x00000055, 0x00000012 }, + { 0x0400250f, 0x00000002 }, + { 0x0000504a, 0x00000004 }, + { 0x00007565, 0x00000002 }, + { 0x00007566, 0x00000002 }, + { 0x00000051, 0x00000004 }, + { 0x01e655b4, 0x00000002 }, + { 0x4401b0dc, 0x00000002 }, + { 0x01c110dc, 0x00000002 }, + { 0x2666705d, 0x00000018 }, + { 0x040c2565, 0x00000002 }, + { 0x0000005d, 0x00000018 }, + { 0x04002564, 0x00000002 }, + { 0x00007566, 0x00000002 }, + { 0x00000054, 0x00000004 }, + { 0x00401060, 0x00000008 }, + { 0x00101000, 0x00000002 }, + { 0x000d80ff, 0x00000002 }, + { 0x00800063, 0x00000008 }, + { 0x000f9000, 0x00000002 }, + { 0x000e00ff, 0x00000002 }, + { 0000000000, 0x00000006 }, + { 0x00000080, 0x00000018 }, + { 0x00000054, 0x00000004 }, + { 0x00007576, 0x00000002 }, + { 0x00065000, 0x00000002 }, + { 0x00009000, 0x00000002 }, + { 0x00041000, 0x00000002 }, + { 0x0c00350e, 0x00000002 }, + { 0x00049000, 0x00000002 }, + { 0x00051000, 0x00000002 }, + { 0x01e785f8, 0x00000002 }, + { 0x00200000, 0x00000002 }, + { 0x00600073, 0x0000000c }, + { 0x00007563, 0x00000002 }, + { 0x006075f0, 0x00000021 }, + { 0x20007068, 0x00000004 }, + { 0x00005068, 0x00000004 }, + { 0x00007576, 0x00000002 }, + { 0x00007577, 0x00000002 }, + { 0x0000750e, 0x00000002 }, + { 0x0000750f, 0x00000002 }, + { 0x00a05000, 0x00000002 }, + { 0x00600076, 0x0000000c }, + { 0x006075f0, 0x00000021 }, + { 0x000075f8, 0x00000002 }, + { 0x00000076, 0x00000004 }, + { 0x000a750e, 0x00000002 }, + { 0x0020750f, 0x00000002 }, + { 0x00600079, 0x00000004 }, + { 0x00007570, 0x00000002 }, + { 0x00007571, 0x00000002 }, + { 0x00007572, 0x00000006 }, + { 0x00005000, 0x00000002 }, + { 0x00a05000, 0x00000002 }, + { 0x00007568, 0x00000002 }, + { 0x00061000, 0x00000002 }, + { 0x00000084, 0x0000000c }, + { 0x00058000, 0x00000002 }, + { 0x0c607562, 0x00000002 }, + { 0x00000086, 0x00000004 }, + { 0x00600085, 0x00000004 }, + { 0x400070dd, 0000000000 }, + { 0x000380dd, 0x00000002 }, + { 0x00000093, 0x0000001c }, + { 0x00065095, 0x00000018 }, + { 0x040025bb, 0x00000002 }, + { 0x00061096, 0x00000018 }, + { 0x040075bc, 0000000000 }, + { 0x000075bb, 0x00000002 }, + { 0x000075bc, 0000000000 }, + { 0x00090000, 0x00000006 }, + { 0x00090000, 0x00000002 }, + { 0x000d8002, 0x00000006 }, + { 0x00005000, 0x00000002 }, + { 0x00007821, 0x00000002 }, + { 0x00007800, 0000000000 }, + { 0x00007821, 0x00000002 }, + { 0x00007800, 0000000000 }, + { 0x01665000, 0x00000002 }, + { 0x000a0000, 0x00000002 }, + { 0x000671cc, 0x00000002 }, + { 0x0286f1cd, 0x00000002 }, + { 0x000000a3, 0x00000010 }, + { 0x21007000, 0000000000 }, + { 0x000000aa, 0x0000001c }, + { 0x00065000, 0x00000002 }, + { 0x000a0000, 0x00000002 }, + { 0x00061000, 0x00000002 }, + { 0x000b0000, 0x00000002 }, + { 0x38067000, 0x00000002 }, + { 0x000a00a6, 0x00000004 }, + { 0x20007000, 0000000000 }, + { 0x01200000, 0x00000002 }, + { 0x20077000, 0x00000002 }, + { 0x01200000, 0x00000002 }, + { 0x20007000, 0000000000 }, + { 0x00061000, 0x00000002 }, + { 0x0120751b, 0x00000002 }, + { 0x8040750a, 0x00000002 }, + { 0x8040750b, 0x00000002 }, + { 0x00110000, 0x00000002 }, + { 0x000380dd, 0x00000002 }, + { 0x000000bd, 0x0000001c }, + { 0x00061096, 0x00000018 }, + { 0x844075bd, 0x00000002 }, + { 0x00061095, 0x00000018 }, + { 0x840075bb, 0x00000002 }, + { 0x00061096, 0x00000018 }, + { 0x844075bc, 0x00000002 }, + { 0x000000c0, 0x00000004 }, + { 0x804075bd, 0x00000002 }, + { 0x800075bb, 0x00000002 }, + { 0x804075bc, 0x00000002 }, + { 0x00108000, 0x00000002 }, + { 0x01400000, 0x00000002 }, + { 0x006000c4, 0x0000000c }, + { 0x20c07000, 0x00000020 }, + { 0x000000c6, 0x00000012 }, + { 0x00800000, 0x00000006 }, + { 0x0080751d, 0x00000006 }, + { 0x000025bb, 0x00000002 }, + { 0x000040c0, 0x00000004 }, + { 0x0000775c, 0x00000002 }, + { 0x00a05000, 0x00000002 }, + { 0x00661000, 0x00000002 }, + { 0x0460275d, 0x00000020 }, + { 0x00004000, 0000000000 }, + { 0x00007999, 0x00000002 }, + { 0x00a05000, 0x00000002 }, + { 0x00661000, 0x00000002 }, + { 0x0460299b, 0x00000020 }, + { 0x00004000, 0000000000 }, + { 0x01e00830, 0x00000002 }, + { 0x21007000, 0000000000 }, + { 0x00005000, 0x00000002 }, + { 0x00038042, 0x00000002 }, + { 0x040025e0, 0x00000002 }, + { 0x000075e1, 0000000000 }, + { 0x00000001, 0000000000 }, + { 0x000380d9, 0x00000002 }, + { 0x04007394, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, +}; + + static u32 radeon_cp_microcode[][2] = { { 0x21007000, 0000000000 }, { 0x20007000, 0000000000 }, @@ -346,6 +603,8 @@ u32 tmp; int i; + dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE; + tmp = RADEON_READ( RADEON_RB2D_DSTCACHE_CTLSTAT ); tmp |= RADEON_RB2D_DC_FLUSH_ALL; RADEON_WRITE( RADEON_RB2D_DSTCACHE_CTLSTAT, tmp ); @@ -370,6 +629,8 @@ { int i; + dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE; + for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { int slots = ( RADEON_READ( RADEON_RBBM_STATUS ) & RADEON_RBBM_FIFOCNT_MASK ); @@ -388,8 +649,10 @@ { int i, ret; + dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE; + ret = radeon_do_wait_for_fifo( dev_priv, 64 ); - if ( ret < 0 ) return ret; + if ( ret ) return ret; for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { if ( !(RADEON_READ( RADEON_RBBM_STATUS ) @@ -416,16 +679,31 @@ static void radeon_cp_load_microcode( drm_radeon_private_t *dev_priv ) { int i; - DRM_DEBUG( "%s\n", __FUNCTION__ ); + DRM_DEBUG( "\n" ); radeon_do_wait_for_idle( dev_priv ); RADEON_WRITE( RADEON_CP_ME_RAM_ADDR, 0 ); - for ( i = 0 ; i < 256 ; i++ ) { - RADEON_WRITE( RADEON_CP_ME_RAM_DATAH, - radeon_cp_microcode[i][1] ); - RADEON_WRITE( RADEON_CP_ME_RAM_DATAL, - radeon_cp_microcode[i][0] ); + + if (dev_priv->is_r200) + { + DRM_INFO("Loading R200 Microcode\n"); + for ( i = 0 ; i < 256 ; i++ ) + { + RADEON_WRITE( RADEON_CP_ME_RAM_DATAH, + R200_cp_microcode[i][1] ); + RADEON_WRITE( RADEON_CP_ME_RAM_DATAL, + R200_cp_microcode[i][0] ); + } + } + else + { + for ( i = 0 ; i < 256 ; i++ ) { + RADEON_WRITE( RADEON_CP_ME_RAM_DATAH, + radeon_cp_microcode[i][1] ); + RADEON_WRITE( RADEON_CP_ME_RAM_DATAL, + radeon_cp_microcode[i][0] ); + } } } @@ -435,7 +713,7 @@ */ static void radeon_do_cp_flush( drm_radeon_private_t *dev_priv ) { - DRM_DEBUG( "%s\n", __FUNCTION__ ); + DRM_DEBUG( "\n" ); #if 0 u32 tmp; @@ -449,7 +727,7 @@ int radeon_do_cp_idle( drm_radeon_private_t *dev_priv ) { RING_LOCALS; - DRM_DEBUG( "%s\n", __FUNCTION__ ); + DRM_DEBUG( "\n" ); BEGIN_RING( 6 ); @@ -458,6 +736,7 @@ RADEON_WAIT_UNTIL_IDLE(); ADVANCE_RING(); + COMMIT_RING(); return radeon_do_wait_for_idle( dev_priv ); } @@ -467,7 +746,7 @@ static void radeon_do_cp_start( drm_radeon_private_t *dev_priv ) { RING_LOCALS; - DRM_DEBUG( "%s\n", __FUNCTION__ ); + DRM_DEBUG( "\n" ); radeon_do_wait_for_idle( dev_priv ); @@ -482,6 +761,7 @@ RADEON_WAIT_UNTIL_IDLE(); ADVANCE_RING(); + COMMIT_RING(); } /* Reset the Command Processor. This will not flush any pending @@ -491,7 +771,7 @@ static void radeon_do_cp_reset( drm_radeon_private_t *dev_priv ) { u32 cur_read_ptr; - DRM_DEBUG( "%s\n", __FUNCTION__ ); + DRM_DEBUG( "\n" ); cur_read_ptr = RADEON_READ( RADEON_CP_RB_RPTR ); RADEON_WRITE( RADEON_CP_RB_WPTR, cur_read_ptr ); @@ -505,7 +785,7 @@ */ static void radeon_do_cp_stop( drm_radeon_private_t *dev_priv ) { - DRM_DEBUG( "%s\n", __FUNCTION__ ); + DRM_DEBUG( "\n" ); RADEON_WRITE( RADEON_CP_CSQ_CNTL, RADEON_CSQ_PRIDIS_INDDIS ); @@ -518,7 +798,7 @@ { drm_radeon_private_t *dev_priv = dev->dev_private; u32 clock_cntl_index, mclk_cntl, rbbm_soft_reset; - DRM_DEBUG( "%s\n", __FUNCTION__ ); + DRM_DEBUG( "\n" ); radeon_do_pixcache_flush( dev_priv ); @@ -603,6 +883,7 @@ /* Set the write pointer delay */ RADEON_WRITE( RADEON_CP_RB_WPTR_DELAY, 0 ); + RADEON_READ( RADEON_CP_RB_WPTR_DELAY ); /* read back to propagate */ /* Initialize the ring buffer's read and write pointers */ cur_read_ptr = RADEON_READ( RADEON_CP_RB_RPTR ); @@ -622,13 +903,63 @@ RADEON_WRITE( RADEON_CP_RB_RPTR_ADDR, entry->busaddr[page_ofs]); - DRM_DEBUG( "ring rptr: offset=0x%08llx handle=0x%08lx\n", - (u64)entry->busaddr[page_ofs], + DRM_DEBUG( "ring rptr: offset=0x%08x handle=0x%08lx\n", + entry->busaddr[page_ofs], entry->handle + tmp_ofs ); } + /* Initialize the scratch register pointer. This will cause + * the scratch register values to be written out to memory + * whenever they are updated. + * + * We simply put this behind the ring read pointer, this works + * with PCI GART as well as (whatever kind of) AGP GART + */ + RADEON_WRITE( RADEON_SCRATCH_ADDR, RADEON_READ( RADEON_CP_RB_RPTR_ADDR ) + + RADEON_SCRATCH_REG_OFFSET ); + + dev_priv->scratch = ((__volatile__ u32 *) + dev_priv->ring.head + + (RADEON_SCRATCH_REG_OFFSET / sizeof(u32))); + + RADEON_WRITE( RADEON_SCRATCH_UMSK, 0x7 ); + + /* Writeback doesn't seem to work everywhere, test it first */ + writel(0, &dev_priv->scratch[1]); + RADEON_WRITE( RADEON_SCRATCH_REG1, 0xdeadbeef ); + + for ( tmp = 0 ; tmp < dev_priv->usec_timeout ; tmp++ ) { + if ( readl( &dev_priv->scratch[1] ) == 0xdeadbeef ) + break; + udelay(1); + } + + if ( tmp < dev_priv->usec_timeout ) { + dev_priv->writeback_works = 1; + DRM_DEBUG( "writeback test succeeded, tmp=%d\n", tmp ); + } else { + dev_priv->writeback_works = 0; + DRM_DEBUG( "writeback test failed\n" ); + } + + dev_priv->sarea_priv->last_frame = dev_priv->scratch[0] = 0; + RADEON_WRITE( RADEON_LAST_FRAME_REG, + dev_priv->sarea_priv->last_frame ); + + dev_priv->sarea_priv->last_dispatch = dev_priv->scratch[1] = 0; + RADEON_WRITE( RADEON_LAST_DISPATCH_REG, + dev_priv->sarea_priv->last_dispatch ); + + dev_priv->sarea_priv->last_clear = dev_priv->scratch[2] = 0; + RADEON_WRITE( RADEON_LAST_CLEAR_REG, + dev_priv->sarea_priv->last_clear ); + /* Set ring buffer size */ +#ifdef __BIG_ENDIAN + RADEON_WRITE( RADEON_CP_RB_CNTL, dev_priv->ring.size_l2qw | RADEON_BUF_SWAP_32BIT ); +#else RADEON_WRITE( RADEON_CP_RB_CNTL, dev_priv->ring.size_l2qw ); +#endif radeon_do_wait_for_idle( dev_priv ); @@ -647,9 +978,8 @@ static int radeon_do_init_cp( drm_device_t *dev, drm_radeon_init_t *init ) { drm_radeon_private_t *dev_priv; - struct list_head *list; u32 tmp; - DRM_DEBUG( "%s\n", __FUNCTION__ ); + DRM_DEBUG( "\n" ); dev_priv = DRM(alloc)( sizeof(drm_radeon_private_t), DRM_MEM_DRIVER ); if ( dev_priv == NULL ) @@ -659,17 +989,6 @@ dev_priv->is_pci = init->is_pci; -#if !defined(PCIGART_ENABLED) - /* PCI support is not 100% working, so we disable it here. - */ - if ( dev_priv->is_pci ) { - DRM_ERROR( "PCI GART not yet supported for Radeon!\n" ); - dev->dev_private = (void *)dev_priv; - radeon_do_cleanup_cp(dev); - return -EINVAL; - } -#endif - if ( dev_priv->is_pci && !dev->sg ) { DRM_ERROR( "PCI GART memory not allocated!\n" ); dev->dev_private = (void *)dev_priv; @@ -686,12 +1005,10 @@ return -EINVAL; } + dev_priv->is_r200 = (init->func == RADEON_INIT_R200_CP); + dev_priv->do_boxes = 0; dev_priv->cp_mode = init->cp_mode; - /* Simple idle check. - */ - atomic_set( &dev_priv->idle_count, 0 ); - /* We don't support anything other than bus-mastering ring mode, * but the ring can be in either AGP or PCI space for the ring * read pointer. @@ -743,17 +1060,17 @@ * and screwing with the clear operation. */ dev_priv->depth_clear.rb3d_cntl = (RADEON_PLANE_MASK_ENABLE | - RADEON_Z_ENABLE | (dev_priv->color_fmt << 10) | - RADEON_ZBLOCK16); + (1<<15)); - dev_priv->depth_clear.rb3d_zstencilcntl = (dev_priv->depth_fmt | - RADEON_Z_TEST_ALWAYS | - RADEON_STENCIL_TEST_ALWAYS | - RADEON_STENCIL_S_FAIL_KEEP | - RADEON_STENCIL_ZPASS_KEEP | - RADEON_STENCIL_ZFAIL_KEEP | - RADEON_Z_WRITE_ENABLE); + dev_priv->depth_clear.rb3d_zstencilcntl = + (dev_priv->depth_fmt | + RADEON_Z_TEST_ALWAYS | + RADEON_STENCIL_TEST_ALWAYS | + RADEON_STENCIL_S_FAIL_REPLACE | + RADEON_STENCIL_ZPASS_REPLACE | + RADEON_STENCIL_ZFAIL_REPLACE | + RADEON_Z_WRITE_ENABLE); dev_priv->depth_clear.se_cntl = (RADEON_FFACE_CULL_CW | RADEON_BFACE_SOLID | @@ -767,15 +1084,8 @@ RADEON_ROUND_MODE_TRUNC | RADEON_ROUND_PREC_8TH_PIX); - list_for_each(list, &dev->maplist->head) { - drm_map_list_t *r_list = (drm_map_list_t *)list; - if( r_list->map && - r_list->map->type == _DRM_SHM && - r_list->map->flags & _DRM_CONTAINS_LOCK ) { - dev_priv->sarea = r_list->map; - break; - } - } + DRM_GETSAREA(); + if(!dev_priv->sarea) { DRM_ERROR("could not find sarea!\n"); dev->dev_private = (void *)dev_priv; @@ -896,34 +1206,7 @@ dev_priv->ring.high_mark = RADEON_RING_HIGH_MARK; -#if 0 - /* Initialize the scratch register pointer. This will cause - * the scratch register values to be written out to memory - * whenever they are updated. - * FIXME: This doesn't quite work yet, so we're disabling it - * for the release. - */ - RADEON_WRITE( RADEON_SCRATCH_ADDR, (dev_priv->ring_rptr->offset + - RADEON_SCRATCH_REG_OFFSET) ); - RADEON_WRITE( RADEON_SCRATCH_UMSK, 0x7 ); -#endif - - dev_priv->scratch = ((__volatile__ u32 *) - dev_priv->ring_rptr->handle + - (RADEON_SCRATCH_REG_OFFSET / sizeof(u32))); - - dev_priv->sarea_priv->last_frame = 0; - RADEON_WRITE( RADEON_LAST_FRAME_REG, - dev_priv->sarea_priv->last_frame ); - - dev_priv->sarea_priv->last_dispatch = 0; - RADEON_WRITE( RADEON_LAST_DISPATCH_REG, - dev_priv->sarea_priv->last_dispatch ); - - dev_priv->sarea_priv->last_clear = 0; - RADEON_WRITE( RADEON_LAST_CLEAR_REG, - dev_priv->sarea_priv->last_clear ); - +#if __REALLY_HAVE_SG if ( dev_priv->is_pci ) { if (!DRM(ati_pcigart_init)( dev, &dev_priv->phys_pci_gart, &dev_priv->bus_pci_gart)) { @@ -953,19 +1236,20 @@ RADEON_WRITE( RADEON_MC_AGP_LOCATION, 0xffffffc0 ); /* ?? */ RADEON_WRITE( RADEON_AGP_COMMAND, 0 ); /* clear AGP_COMMAND */ } else { +#endif /* __REALLY_HAVE_SG */ /* Turn off PCI GART */ tmp = RADEON_READ( RADEON_AIC_CNTL ) & ~RADEON_PCIGART_TRANSLATE_EN; RADEON_WRITE( RADEON_AIC_CNTL, tmp ); +#if __REALLY_HAVE_SG } +#endif /* __REALLY_HAVE_SG */ radeon_cp_load_microcode( dev_priv ); radeon_cp_init_ring_buffer( dev, dev_priv ); -#if ROTATE_BUFS dev_priv->last_buf = 0; -#endif dev->dev_private = (void *)dev_priv; @@ -976,7 +1260,7 @@ int radeon_do_cleanup_cp( drm_device_t *dev ) { - DRM_DEBUG( "%s\n", __FUNCTION__ ); + DRM_DEBUG( "\n" ); if ( dev->dev_private ) { drm_radeon_private_t *dev_priv = dev->dev_private; @@ -986,10 +1270,12 @@ DRM_IOREMAPFREE( dev_priv->ring_rptr ); DRM_IOREMAPFREE( dev_priv->buffers ); } else { +#if __REALLY_HAVE_SG if (!DRM(ati_pcigart_cleanup)( dev, dev_priv->phys_pci_gart, dev_priv->bus_pci_gart )) DRM_ERROR( "failed to cleanup PCI GART!\n" ); +#endif /* __REALLY_HAVE_SG */ } DRM(free)( dev->dev_private, sizeof(drm_radeon_private_t), @@ -1012,6 +1298,7 @@ switch ( init.func ) { case RADEON_INIT_CP: + case RADEON_INIT_R200_CP: return radeon_do_init_cp( dev, &init ); case RADEON_CLEANUP_CP: return radeon_do_cleanup_cp( dev ); @@ -1075,7 +1362,7 @@ */ if ( stop.idle ) { ret = radeon_do_cp_idle( dev_priv ); - if ( ret < 0 ) return ret; + if ( ret ) return ret; } /* Finally, we can turn off the CP. If the engine isn't idle, @@ -1145,117 +1432,74 @@ * Fullscreen mode */ -static int radeon_do_init_pageflip( drm_device_t *dev ) -{ - drm_radeon_private_t *dev_priv = dev->dev_private; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - dev_priv->crtc_offset = RADEON_READ( RADEON_CRTC_OFFSET ); - dev_priv->crtc_offset_cntl = RADEON_READ( RADEON_CRTC_OFFSET_CNTL ); - - RADEON_WRITE( RADEON_CRTC_OFFSET, dev_priv->front_offset ); - RADEON_WRITE( RADEON_CRTC_OFFSET_CNTL, - dev_priv->crtc_offset_cntl | - RADEON_CRTC_OFFSET_FLIP_CNTL ); - - dev_priv->page_flipping = 1; - dev_priv->current_page = 0; - - return 0; -} - -int radeon_do_cleanup_pageflip( drm_device_t *dev ) +/* KW: Deprecated to say the least: + */ +int radeon_fullscreen(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long data) { - drm_radeon_private_t *dev_priv = dev->dev_private; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - RADEON_WRITE( RADEON_CRTC_OFFSET, dev_priv->crtc_offset ); - RADEON_WRITE( RADEON_CRTC_OFFSET_CNTL, dev_priv->crtc_offset_cntl ); - - dev_priv->page_flipping = 0; - dev_priv->current_page = 0; - return 0; } -int radeon_fullscreen( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_radeon_fullscreen_t fs; - - LOCK_TEST_WITH_RETURN( dev ); - - if ( copy_from_user( &fs, (drm_radeon_fullscreen_t *)arg, - sizeof(fs) ) ) - return -EFAULT; - - switch ( fs.func ) { - case RADEON_INIT_FULLSCREEN: - return radeon_do_init_pageflip( dev ); - case RADEON_CLEANUP_FULLSCREEN: - return radeon_do_cleanup_pageflip( dev ); - } - - return -EINVAL; -} - /* ================================================================ * Freelist management */ -#define RADEON_BUFFER_USED 0xffffffff -#define RADEON_BUFFER_FREE 0 -#if 0 -static int radeon_freelist_init( drm_device_t *dev ) +/* Original comment: FIXME: ROTATE_BUFS is a hack to cycle through + * bufs until freelist code is used. Note this hides a problem with + * the scratch register * (used to keep track of last buffer + * completed) being written to before * the last buffer has actually + * completed rendering. + * + * KW: It's also a good way to find free buffers quickly. + * + * KW: Ideally this loop wouldn't exist, and freelist_get wouldn't + * sleep. However, bugs in older versions of radeon_accel.c mean that + * we essentially have to do this, else old clients will break. + * + * However, it does leave open a potential deadlock where all the + * buffers are held by other clients, which can't release them because + * they can't get the lock. + */ + +drm_buf_t *radeon_freelist_get( drm_device_t *dev ) { drm_device_dma_t *dma = dev->dma; drm_radeon_private_t *dev_priv = dev->dev_private; - drm_buf_t *buf; drm_radeon_buf_priv_t *buf_priv; - drm_radeon_freelist_t *entry; - int i; - - dev_priv->head = DRM(alloc)( sizeof(drm_radeon_freelist_t), - DRM_MEM_DRIVER ); - if ( dev_priv->head == NULL ) - return -ENOMEM; - - memset( dev_priv->head, 0, sizeof(drm_radeon_freelist_t) ); - dev_priv->head->age = RADEON_BUFFER_USED; + drm_buf_t *buf; + int i, t; + int start; - for ( i = 0 ; i < dma->buf_count ; i++ ) { - buf = dma->buflist[i]; - buf_priv = buf->dev_private; + if ( ++dev_priv->last_buf >= dma->buf_count ) + dev_priv->last_buf = 0; - entry = DRM(alloc)( sizeof(drm_radeon_freelist_t), - DRM_MEM_DRIVER ); - if ( !entry ) return -ENOMEM; - - entry->age = RADEON_BUFFER_FREE; - entry->buf = buf; - entry->prev = dev_priv->head; - entry->next = dev_priv->head->next; - if ( !entry->next ) - dev_priv->tail = entry; - - buf_priv->discard = 0; - buf_priv->dispatched = 0; - buf_priv->list_entry = entry; + start = dev_priv->last_buf; - dev_priv->head->next = entry; + for ( t = 0 ; t < dev_priv->usec_timeout ; t++ ) { + u32 done_age = GET_SCRATCH( 1 ); + DRM_DEBUG("done_age = %d\n",done_age); + for ( i = start ; i < dma->buf_count ; i++ ) { + buf = dma->buflist[i]; + buf_priv = buf->dev_private; + if ( buf->pid == 0 || (buf->pending && + buf_priv->age <= done_age) ) { + dev_priv->stats.requested_bufs++; + buf->pending = 0; + return buf; + } + start = 0; + } - if ( dev_priv->head->next ) - dev_priv->head->next->prev = entry; + if (t) { + udelay(1); + dev_priv->stats.freelist_loops++; + } } - return 0; - + DRM_DEBUG( "returning NULL!\n" ); + return NULL; } -#endif - +#if 0 drm_buf_t *radeon_freelist_get( drm_device_t *dev ) { drm_device_dma_t *dma = dev->dma; @@ -1263,76 +1507,40 @@ drm_radeon_buf_priv_t *buf_priv; drm_buf_t *buf; int i, t; -#if ROTATE_BUFS int start; -#endif - - /* FIXME: Optimize -- use freelist code */ + u32 done_age = readl(&dev_priv->scratch[1]); - for ( i = 0 ; i < dma->buf_count ; i++ ) { - buf = dma->buflist[i]; - buf_priv = buf->dev_private; - if ( buf->pid == 0 ) { - DRM_DEBUG( " ret buf=%d last=%d pid=0\n", - buf->idx, dev_priv->last_buf ); - return buf; - } - DRM_DEBUG( " skipping buf=%d pid=%d\n", - buf->idx, buf->pid ); - } - -#if ROTATE_BUFS if ( ++dev_priv->last_buf >= dma->buf_count ) dev_priv->last_buf = 0; + start = dev_priv->last_buf; -#endif - for ( t = 0 ; t < dev_priv->usec_timeout ; t++ ) { -#if 0 - /* FIXME: Disable this for now */ - u32 done_age = dev_priv->scratch[RADEON_LAST_DISPATCH]; -#else - u32 done_age = RADEON_READ( RADEON_LAST_DISPATCH_REG ); -#endif -#if ROTATE_BUFS + dev_priv->stats.freelist_loops++; + + for ( t = 0 ; t < 2 ; t++ ) { for ( i = start ; i < dma->buf_count ; i++ ) { -#else - for ( i = 0 ; i < dma->buf_count ; i++ ) { -#endif buf = dma->buflist[i]; buf_priv = buf->dev_private; - if ( buf->pending && buf_priv->age <= done_age ) { - /* The buffer has been processed, so it - * can now be used. - */ + if ( buf->pid == 0 || (buf->pending && + buf_priv->age <= done_age) ) { + dev_priv->stats.requested_bufs++; buf->pending = 0; - DRM_DEBUG( " ret buf=%d last=%d age=%d done=%d\n", buf->idx, dev_priv->last_buf, buf_priv->age, done_age ); return buf; } - DRM_DEBUG( " skipping buf=%d age=%d done=%d\n", - buf->idx, buf_priv->age, - done_age ); -#if ROTATE_BUFS - start = 0; -#endif } - udelay( 1 ); + start = 0; } - DRM_ERROR( "returning NULL!\n" ); return NULL; } +#endif void radeon_freelist_reset( drm_device_t *dev ) { drm_device_dma_t *dma = dev->dma; -#if ROTATE_BUFS drm_radeon_private_t *dev_priv = dev->dev_private; -#endif int i; -#if ROTATE_BUFS dev_priv->last_buf = 0; -#endif for ( i = 0 ; i < dma->buf_count ; i++ ) { drm_buf_t *buf = dma->buflist[i]; drm_radeon_buf_priv_t *buf_priv = buf->dev_private; @@ -1349,11 +1557,23 @@ { drm_radeon_ring_buffer_t *ring = &dev_priv->ring; int i; + u32 last_head = GET_RING_HEAD(ring); for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { - radeon_update_ring_snapshot( ring ); + u32 head = GET_RING_HEAD(ring); + + ring->space = (head - ring->tail) * sizeof(u32); + if ( ring->space <= 0 ) + ring->space += ring->size; if ( ring->space > n ) return 0; + + dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE; + + if (head != last_head) + i = 0; + last_head = head; + udelay( 1 ); } diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/radeon_drm.h linux.21rc1-ac1/drivers/char/drm/radeon_drm.h --- linux.21rc1/drivers/char/drm/radeon_drm.h 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/radeon_drm.h 2003-04-22 16:44:36.000000000 +0100 @@ -2,6 +2,7 @@ * * Copyright 2000 Precision Insight, Inc., Cedar Park, Texas. * Copyright 2000 VA Linux Systems, Inc., Fremont, California. + * Copyright 2002 Tungsten Graphics, Inc., Cedar Park, Texas. * All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a @@ -26,6 +27,7 @@ * Authors: * Kevin E. Martin * Gareth Hughes + * Keith Whitwell */ #ifndef __RADEON_DRM_H__ @@ -37,7 +39,8 @@ #ifndef __RADEON_SAREA_DEFINES__ #define __RADEON_SAREA_DEFINES__ -/* What needs to be changed for the current vertex buffer? +/* Old style state flags, required for sarea interface (1.1 and 1.2 + * clears) and 1.2 drm_vertex2 ioctl. */ #define RADEON_UPLOAD_CONTEXT 0x00000001 #define RADEON_UPLOAD_VERTFMT 0x00000002 @@ -56,11 +59,136 @@ #define RADEON_UPLOAD_TEX2IMAGES 0x00004000 #define RADEON_UPLOAD_CLIPRECTS 0x00008000 /* handled client-side */ #define RADEON_REQUIRE_QUIESCENCE 0x00010000 -#define RADEON_UPLOAD_ALL 0x0001ffff +#define RADEON_UPLOAD_ZBIAS 0x00020000 /* version 1.2 and newer */ +#define RADEON_UPLOAD_ALL 0x003effff +#define RADEON_UPLOAD_CONTEXT_ALL 0x003e01ff + + +/* New style per-packet identifiers for use in cmd_buffer ioctl with + * the RADEON_EMIT_PACKET command. Comments relate new packets to old + * state bits and the packet size: + */ +#define RADEON_EMIT_PP_MISC 0 /* context/7 */ +#define RADEON_EMIT_PP_CNTL 1 /* context/3 */ +#define RADEON_EMIT_RB3D_COLORPITCH 2 /* context/1 */ +#define RADEON_EMIT_RE_LINE_PATTERN 3 /* line/2 */ +#define RADEON_EMIT_SE_LINE_WIDTH 4 /* line/1 */ +#define RADEON_EMIT_PP_LUM_MATRIX 5 /* bumpmap/1 */ +#define RADEON_EMIT_PP_ROT_MATRIX_0 6 /* bumpmap/2 */ +#define RADEON_EMIT_RB3D_STENCILREFMASK 7 /* masks/3 */ +#define RADEON_EMIT_SE_VPORT_XSCALE 8 /* viewport/6 */ +#define RADEON_EMIT_SE_CNTL 9 /* setup/2 */ +#define RADEON_EMIT_SE_CNTL_STATUS 10 /* setup/1 */ +#define RADEON_EMIT_RE_MISC 11 /* misc/1 */ +#define RADEON_EMIT_PP_TXFILTER_0 12 /* tex0/6 */ +#define RADEON_EMIT_PP_BORDER_COLOR_0 13 /* tex0/1 */ +#define RADEON_EMIT_PP_TXFILTER_1 14 /* tex1/6 */ +#define RADEON_EMIT_PP_BORDER_COLOR_1 15 /* tex1/1 */ +#define RADEON_EMIT_PP_TXFILTER_2 16 /* tex2/6 */ +#define RADEON_EMIT_PP_BORDER_COLOR_2 17 /* tex2/1 */ +#define RADEON_EMIT_SE_ZBIAS_FACTOR 18 /* zbias/2 */ +#define RADEON_EMIT_SE_TCL_OUTPUT_VTX_FMT 19 /* tcl/11 */ +#define RADEON_EMIT_SE_TCL_MATERIAL_EMMISSIVE_RED 20 /* material/17 */ +#define R200_EMIT_PP_TXCBLEND_0 21 /* tex0/4 */ +#define R200_EMIT_PP_TXCBLEND_1 22 /* tex1/4 */ +#define R200_EMIT_PP_TXCBLEND_2 23 /* tex2/4 */ +#define R200_EMIT_PP_TXCBLEND_3 24 /* tex3/4 */ +#define R200_EMIT_PP_TXCBLEND_4 25 /* tex4/4 */ +#define R200_EMIT_PP_TXCBLEND_5 26 /* tex5/4 */ +#define R200_EMIT_PP_TXCBLEND_6 27 /* /4 */ +#define R200_EMIT_PP_TXCBLEND_7 28 /* /4 */ +#define R200_EMIT_TCL_LIGHT_MODEL_CTL_0 29 /* tcl/7 */ +#define R200_EMIT_TFACTOR_0 30 /* tf/7 */ +#define R200_EMIT_VTX_FMT_0 31 /* vtx/5 */ +#define R200_EMIT_VAP_CTL 32 /* vap/1 */ +#define R200_EMIT_MATRIX_SELECT_0 33 /* msl/5 */ +#define R200_EMIT_TEX_PROC_CTL_2 34 /* tcg/5 */ +#define R200_EMIT_TCL_UCP_VERT_BLEND_CTL 35 /* tcl/1 */ +#define R200_EMIT_PP_TXFILTER_0 36 /* tex0/6 */ +#define R200_EMIT_PP_TXFILTER_1 37 /* tex1/6 */ +#define R200_EMIT_PP_TXFILTER_2 38 /* tex2/6 */ +#define R200_EMIT_PP_TXFILTER_3 39 /* tex3/6 */ +#define R200_EMIT_PP_TXFILTER_4 40 /* tex4/6 */ +#define R200_EMIT_PP_TXFILTER_5 41 /* tex5/6 */ +#define R200_EMIT_PP_TXOFFSET_0 42 /* tex0/1 */ +#define R200_EMIT_PP_TXOFFSET_1 43 /* tex1/1 */ +#define R200_EMIT_PP_TXOFFSET_2 44 /* tex2/1 */ +#define R200_EMIT_PP_TXOFFSET_3 45 /* tex3/1 */ +#define R200_EMIT_PP_TXOFFSET_4 46 /* tex4/1 */ +#define R200_EMIT_PP_TXOFFSET_5 47 /* tex5/1 */ +#define R200_EMIT_VTE_CNTL 48 /* vte/1 */ +#define R200_EMIT_OUTPUT_VTX_COMP_SEL 49 /* vtx/1 */ +#define R200_EMIT_PP_TAM_DEBUG3 50 /* tam/1 */ +#define R200_EMIT_PP_CNTL_X 51 /* cst/1 */ +#define R200_EMIT_RB3D_DEPTHXY_OFFSET 52 /* cst/1 */ +#define R200_EMIT_RE_AUX_SCISSOR_CNTL 53 /* cst/1 */ +#define R200_EMIT_RE_SCISSOR_TL_0 54 /* cst/2 */ +#define R200_EMIT_RE_SCISSOR_TL_1 55 /* cst/2 */ +#define R200_EMIT_RE_SCISSOR_TL_2 56 /* cst/2 */ +#define R200_EMIT_SE_VAP_CNTL_STATUS 57 /* cst/1 */ +#define R200_EMIT_SE_VTX_STATE_CNTL 58 /* cst/1 */ +#define R200_EMIT_RE_POINTSIZE 59 /* cst/1 */ +#define R200_EMIT_TCL_INPUT_VTX_VECTOR_ADDR_0 60 /* cst/4 */ +#define R200_EMIT_PP_CUBIC_FACES_0 61 +#define R200_EMIT_PP_CUBIC_OFFSETS_0 62 +#define R200_EMIT_PP_CUBIC_FACES_1 63 +#define R200_EMIT_PP_CUBIC_OFFSETS_1 64 +#define R200_EMIT_PP_CUBIC_FACES_2 65 +#define R200_EMIT_PP_CUBIC_OFFSETS_2 66 +#define R200_EMIT_PP_CUBIC_FACES_3 67 +#define R200_EMIT_PP_CUBIC_OFFSETS_3 68 +#define R200_EMIT_PP_CUBIC_FACES_4 69 +#define R200_EMIT_PP_CUBIC_OFFSETS_4 70 +#define R200_EMIT_PP_CUBIC_FACES_5 71 +#define R200_EMIT_PP_CUBIC_OFFSETS_5 72 +#define RADEON_MAX_STATE_PACKETS 73 + + +/* Commands understood by cmd_buffer ioctl. More can be added but + * obviously these can't be removed or changed: + */ +#define RADEON_CMD_PACKET 1 /* emit one of the register packets above */ +#define RADEON_CMD_SCALARS 2 /* emit scalar data */ +#define RADEON_CMD_VECTORS 3 /* emit vector data */ +#define RADEON_CMD_DMA_DISCARD 4 /* discard current dma buf */ +#define RADEON_CMD_PACKET3 5 /* emit hw packet */ +#define RADEON_CMD_PACKET3_CLIP 6 /* emit hw packet wrapped in cliprects */ +#define RADEON_CMD_SCALARS2 7 /* r200 stopgap */ +#define RADEON_CMD_WAIT 8 /* emit hw wait commands -- note: + * doesn't make the cpu wait, just + * the graphics hardware */ + + +typedef union { + int i; + struct { + unsigned char cmd_type, pad0, pad1, pad2; + } header; + struct { + unsigned char cmd_type, packet_id, pad0, pad1; + } packet; + struct { + unsigned char cmd_type, offset, stride, count; + } scalars; + struct { + unsigned char cmd_type, offset, stride, count; + } vectors; + struct { + unsigned char cmd_type, buf_idx, pad0, pad1; + } dma; + struct { + unsigned char cmd_type, flags, pad0, pad1; + } wait; +} drm_radeon_cmd_header_t; + +#define RADEON_WAIT_2D 0x1 +#define RADEON_WAIT_3D 0x2 + #define RADEON_FRONT 0x1 #define RADEON_BACK 0x2 #define RADEON_DEPTH 0x4 +#define RADEON_STENCIL 0x8 /* Primitive types */ @@ -78,12 +206,9 @@ /* Byte offsets for indirect buffer data */ #define RADEON_INDEX_PRIM_OFFSET 20 -#define RADEON_HOSTDATA_BLIT_OFFSET 32 #define RADEON_SCRATCH_REG_OFFSET 32 -/* Keep these small for testing - */ #define RADEON_NR_SAREA_CLIPRECTS 12 /* There are 2 heaps (local/AGP). Each region within a heap is a @@ -95,7 +220,7 @@ #define RADEON_NR_TEX_REGIONS 64 #define RADEON_LOG_TEX_GRANULARITY 16 -#define RADEON_MAX_TEXTURE_LEVELS 11 +#define RADEON_MAX_TEXTURE_LEVELS 12 #define RADEON_MAX_TEXTURE_UNITS 3 #endif /* __RADEON_SAREA_DEFINES__ */ @@ -155,28 +280,18 @@ /* Setup state */ unsigned int se_cntl_status; /* 0x2140 */ -#ifdef TCL_ENABLE - /* TCL state */ - radeon_color_regs_t se_tcl_material_emmissive; /* 0x2210 */ - radeon_color_regs_t se_tcl_material_ambient; - radeon_color_regs_t se_tcl_material_diffuse; - radeon_color_regs_t se_tcl_material_specular; - unsigned int se_tcl_shininess; - unsigned int se_tcl_output_vtx_fmt; - unsigned int se_tcl_output_vtx_sel; - unsigned int se_tcl_matrix_select_0; - unsigned int se_tcl_matrix_select_1; - unsigned int se_tcl_ucp_vert_blend_ctl; - unsigned int se_tcl_texture_proc_ctl; - unsigned int se_tcl_light_model_ctl; - unsigned int se_tcl_per_light_ctl[4]; -#endif - /* Misc state */ unsigned int re_top_left; /* 0x26c0 */ unsigned int re_misc; } drm_radeon_context_regs_t; +typedef struct { + /* Zbias state */ + unsigned int se_zbias_factor; /* 0x1dac */ + unsigned int se_zbias_constant; +} drm_radeon_context2_regs_t; + + /* Setup registers for each texture unit */ typedef struct { @@ -186,24 +301,37 @@ unsigned int pp_txcblend; unsigned int pp_txablend; unsigned int pp_tfactor; - unsigned int pp_border_color; - -#ifdef CUBIC_ENABLE - unsigned int pp_cubic_faces; - unsigned int pp_cubic_offset[5]; -#endif } drm_radeon_texture_regs_t; typedef struct { + unsigned int start; + unsigned int finish; + unsigned int prim:8; + unsigned int stateidx:8; + unsigned int numverts:16; /* overloaded as offset/64 for elt prims */ + unsigned int vc_format; /* vertex format */ +} drm_radeon_prim_t; + + +typedef struct { + drm_radeon_context_regs_t context; + drm_radeon_texture_regs_t tex[RADEON_MAX_TEXTURE_UNITS]; + drm_radeon_context2_regs_t context2; + unsigned int dirty; +} drm_radeon_state_t; + + +typedef struct { unsigned char next, prev; unsigned char in_use; int age; } drm_radeon_tex_region_t; typedef struct { - /* The channel for communication of state information to the kernel - * on firing a vertex buffer. + /* The channel for communication of state information to the + * kernel on firing a vertex buffer with either of the + * obsoleted vertex/index ioctls. */ drm_radeon_context_regs_t context_state; drm_radeon_texture_regs_t tex_state[RADEON_MAX_TEXTURE_UNITS]; @@ -225,16 +353,50 @@ drm_radeon_tex_region_t tex_list[RADEON_NR_TEX_HEAPS][RADEON_NR_TEX_REGIONS+1]; int tex_age[RADEON_NR_TEX_HEAPS]; int ctx_owner; + int pfState; /* number of 3d windows (0,1,2ormore) */ + int pfCurrentPage; /* which buffer is being displayed? */ + int crtc2_base; /* CRTC2 frame offset */ } drm_radeon_sarea_t; /* WARNING: If you change any of these defines, make sure to change the * defines in the Xserver file (xf86drmRadeon.h) + * + * KW: actually it's illegal to change any of this (backwards compatibility). */ + +/* Radeon specific ioctls + * The device specific ioctl range is 0x40 to 0x79. + */ +#define DRM_IOCTL_RADEON_CP_INIT DRM_IOW( 0x40, drm_radeon_init_t) +#define DRM_IOCTL_RADEON_CP_START DRM_IO( 0x41) +#define DRM_IOCTL_RADEON_CP_STOP DRM_IOW( 0x42, drm_radeon_cp_stop_t) +#define DRM_IOCTL_RADEON_CP_RESET DRM_IO( 0x43) +#define DRM_IOCTL_RADEON_CP_IDLE DRM_IO( 0x44) +#define DRM_IOCTL_RADEON_RESET DRM_IO( 0x45) +#define DRM_IOCTL_RADEON_FULLSCREEN DRM_IOW( 0x46, drm_radeon_fullscreen_t) +#define DRM_IOCTL_RADEON_SWAP DRM_IO( 0x47) +#define DRM_IOCTL_RADEON_CLEAR DRM_IOW( 0x48, drm_radeon_clear_t) +#define DRM_IOCTL_RADEON_VERTEX DRM_IOW( 0x49, drm_radeon_vertex_t) +#define DRM_IOCTL_RADEON_INDICES DRM_IOW( 0x4a, drm_radeon_indices_t) +#define DRM_IOCTL_RADEON_STIPPLE DRM_IOW( 0x4c, drm_radeon_stipple_t) +#define DRM_IOCTL_RADEON_INDIRECT DRM_IOWR(0x4d, drm_radeon_indirect_t) +#define DRM_IOCTL_RADEON_TEXTURE DRM_IOWR(0x4e, drm_radeon_texture_t) +#define DRM_IOCTL_RADEON_VERTEX2 DRM_IOW( 0x4f, drm_radeon_vertex2_t) +#define DRM_IOCTL_RADEON_CMDBUF DRM_IOW( 0x50, drm_radeon_cmd_buffer_t) +#define DRM_IOCTL_RADEON_GETPARAM DRM_IOWR(0x51, drm_radeon_getparam_t) +#define DRM_IOCTL_RADEON_FLIP DRM_IO( 0x52) +#define DRM_IOCTL_RADEON_ALLOC DRM_IOWR( 0x53, drm_radeon_mem_alloc_t) +#define DRM_IOCTL_RADEON_FREE DRM_IOW( 0x54, drm_radeon_mem_free_t) +#define DRM_IOCTL_RADEON_INIT_HEAP DRM_IOW( 0x55, drm_radeon_mem_init_heap_t) +#define DRM_IOCTL_RADEON_IRQ_EMIT DRM_IOWR( 0x56, drm_radeon_irq_emit_t) +#define DRM_IOCTL_RADEON_IRQ_WAIT DRM_IOW( 0x57, drm_radeon_irq_wait_t) + typedef struct drm_radeon_init { enum { RADEON_INIT_CP = 0x01, - RADEON_CLEANUP_CP = 0x02 + RADEON_CLEANUP_CP = 0x02, + RADEON_INIT_R200_CP = 0x03, } func; unsigned long sarea_priv_offset; int is_pci; @@ -285,7 +447,7 @@ unsigned int clear_color; unsigned int clear_depth; unsigned int color_mask; - unsigned int depth_mask; + unsigned int depth_mask; /* misnamed field: should be stencil */ drm_radeon_clear_rect_t *depth_boxes; } drm_radeon_clear_t; @@ -304,6 +466,36 @@ int discard; /* Client finished with buffer? */ } drm_radeon_indices_t; +/* v1.2 - obsoletes drm_radeon_vertex and drm_radeon_indices + * - allows multiple primitives and state changes in a single ioctl + * - supports driver change to emit native primitives + */ +typedef struct drm_radeon_vertex2 { + int idx; /* Index of vertex buffer */ + int discard; /* Client finished with buffer? */ + int nr_states; + drm_radeon_state_t *state; + int nr_prims; + drm_radeon_prim_t *prim; +} drm_radeon_vertex2_t; + +/* v1.3 - obsoletes drm_radeon_vertex2 + * - allows arbitarily large cliprect list + * - allows updating of tcl packet, vector and scalar state + * - allows memory-efficient description of state updates + * - allows state to be emitted without a primitive + * (for clears, ctx switches) + * - allows more than one dma buffer to be referenced per ioctl + * - supports tcl driver + * - may be extended in future versions with new cmd types, packets + */ +typedef struct drm_radeon_cmd_buffer { + int bufsz; + char *buf; + int nbox; + drm_clip_rect_t *boxes; +} drm_radeon_cmd_buffer_t; + typedef struct drm_radeon_tex_image { unsigned int x, y; /* Blit coordinates */ unsigned int width, height; @@ -330,4 +522,55 @@ int discard; } drm_radeon_indirect_t; + +/* 1.3: An ioctl to get parameters that aren't available to the 3d + * client any other way. + */ +#define RADEON_PARAM_AGP_BUFFER_OFFSET 1 /* card offset of 1st agp buffer */ +#define RADEON_PARAM_LAST_FRAME 2 +#define RADEON_PARAM_LAST_DISPATCH 3 +#define RADEON_PARAM_LAST_CLEAR 4 +#define RADEON_PARAM_IRQ_NR 5 +#define RADEON_PARAM_AGP_BASE 6 /* card offset of agp base */ + +typedef struct drm_radeon_getparam { + int param; + int *value; +} drm_radeon_getparam_t; + +/* 1.6: Set up a memory manager for regions of shared memory: + */ +#define RADEON_MEM_REGION_AGP 1 +#define RADEON_MEM_REGION_FB 2 + +typedef struct drm_radeon_mem_alloc { + int region; + int alignment; + int size; + int *region_offset; /* offset from start of fb or agp */ +} drm_radeon_mem_alloc_t; + +typedef struct drm_radeon_mem_free { + int region; + int region_offset; +} drm_radeon_mem_free_t; + +typedef struct drm_radeon_mem_init_heap { + int region; + int size; + int start; +} drm_radeon_mem_init_heap_t; + + +/* 1.6: Userspace can request & wait on irq's: + */ +typedef struct drm_radeon_irq_emit { + int *irq_seq; +} drm_radeon_irq_emit_t; + +typedef struct drm_radeon_irq_wait { + int irq_seq; +} drm_radeon_irq_wait_t; + + #endif diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/radeon_drv.c linux.21rc1-ac1/drivers/char/drm/radeon_drv.c --- linux.21rc1/drivers/char/drm/radeon_drv.c 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/radeon_drv.c 2003-04-22 16:44:36.000000000 +0100 @@ -30,47 +30,11 @@ #include #include "radeon.h" #include "drmP.h" +#include "drm.h" +#include "radeon_drm.h" #include "radeon_drv.h" #include "ati_pcigart.h" -#define DRIVER_AUTHOR "Gareth Hughes, VA Linux Systems Inc." - -#define DRIVER_NAME "radeon" -#define DRIVER_DESC "ATI Radeon" -#define DRIVER_DATE "20010405" - -#define DRIVER_MAJOR 1 -#define DRIVER_MINOR 1 -#define DRIVER_PATCHLEVEL 1 - -#define DRIVER_IOCTLS \ - [DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { radeon_cp_buffers, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_INIT)] = { radeon_cp_init, 1, 1 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_START)] = { radeon_cp_start, 1, 1 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_STOP)] = { radeon_cp_stop, 1, 1 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_RESET)] = { radeon_cp_reset, 1, 1 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_IDLE)] = { radeon_cp_idle, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_RESET)] = { radeon_engine_reset, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_FULLSCREEN)] = { radeon_fullscreen, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_SWAP)] = { radeon_cp_swap, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CLEAR)] = { radeon_cp_clear, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_VERTEX)] = { radeon_cp_vertex, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_INDICES)] = { radeon_cp_indices, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_TEXTURE)] = { radeon_cp_texture, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_STIPPLE)] = { radeon_cp_stipple, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_INDIRECT)] = { radeon_cp_indirect, 1, 1 }, - - -#if 0 -/* GH: Count data sent to card via ring or vertex/indirect buffers. - */ -#define __HAVE_COUNTERS 3 -#define __HAVE_COUNTER6 _DRM_STAT_IRQ -#define __HAVE_COUNTER7 _DRM_STAT_PRIMARY -#define __HAVE_COUNTER8 _DRM_STAT_SECONDARY -#endif - - #include "drm_agpsupport.h" #include "drm_auth.h" #include "drm_bufs.h" @@ -78,26 +42,6 @@ #include "drm_dma.h" #include "drm_drawable.h" #include "drm_drv.h" - -#ifndef MODULE -/* DRM(options) is called by the kernel to parse command-line options - * passed via the boot-loader (e.g., LILO). It calls the insmod option - * routine, drm_parse_drm. - */ - -/* JH- We have to hand expand the string ourselves because of the cpp. If - * anyone can think of a way that we can fit into the __setup macro without - * changing it, then please send the solution my way. - */ -static int __init radeon_options( char *str ) -{ - DRM(parse_options)( str ); - return 1; -} - -__setup( DRIVER_NAME "=", radeon_options ); -#endif - #include "drm_fops.h" #include "drm_init.h" #include "drm_ioctl.h" diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/radeon_drv.h linux.21rc1-ac1/drivers/char/drm/radeon_drv.h --- linux.21rc1/drivers/char/drm/radeon_drv.h 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/radeon_drv.h 2003-04-22 16:44:36.000000000 +0100 @@ -31,6 +31,9 @@ #ifndef __RADEON_DRV_H__ #define __RADEON_DRV_H__ +#define GET_RING_HEAD(ring) readl( (volatile u32 *) (ring)->head ) +#define SET_RING_HEAD(ring,val) writel( (val), (volatile u32 *) (ring)->head ) + typedef struct drm_radeon_freelist { unsigned int age; drm_buf_t *buf; @@ -58,6 +61,15 @@ u32 se_cntl; } drm_radeon_depth_clear_t; + +struct mem_block { + struct mem_block *next; + struct mem_block *prev; + int start; + int size; + int pid; /* 0: free, -1: heap, other: real pids */ +}; + typedef struct drm_radeon_private { drm_radeon_ring_buffer_t ring; drm_radeon_sarea_t *sarea_priv; @@ -71,27 +83,32 @@ drm_radeon_freelist_t *head; drm_radeon_freelist_t *tail; -/* FIXME: ROTATE_BUFS is a hask to cycle through bufs until freelist - code is used. Note this hides a problem with the scratch register - (used to keep track of last buffer completed) being written to before - the last buffer has actually completed rendering. */ -#define ROTATE_BUFS 1 -#if ROTATE_BUFS int last_buf; -#endif volatile u32 *scratch; + int writeback_works; int usec_timeout; + + int is_r200; + int is_pci; unsigned long phys_pci_gart; dma_addr_t bus_pci_gart; - atomic_t idle_count; + struct { + u32 boxes; + int freelist_timeouts; + int freelist_loops; + int requested_bufs; + int last_frame_reads; + int last_clear_reads; + int clears; + int texture_uploads; + } stats; + int do_boxes; int page_flipping; int current_page; - u32 crtc_offset; - u32 crtc_offset_cntl; u32 color_fmt; unsigned int front_offset; @@ -116,14 +133,18 @@ drm_map_t *ring_rptr; drm_map_t *buffers; drm_map_t *agp_textures; + + struct mem_block *agp_heap; + struct mem_block *fb_heap; + + /* SW interrupt */ + wait_queue_head_t swi_queue; + atomic_t swi_emitted; + } drm_radeon_private_t; typedef struct drm_radeon_buf_priv { u32 age; - int prim; - int discard; - int dispatched; - drm_radeon_freelist_t *list_entry; } drm_radeon_buf_priv_t; /* radeon_cp.c */ @@ -149,14 +170,6 @@ extern int radeon_wait_ring( drm_radeon_private_t *dev_priv, int n ); -static inline void -radeon_update_ring_snapshot( drm_radeon_ring_buffer_t *ring ) -{ - ring->space = (*(volatile int *)ring->head - ring->tail) * sizeof(u32); - if ( ring->space <= 0 ) - ring->space += ring->size; -} - extern int radeon_do_cp_idle( drm_radeon_private_t *dev_priv ); extern int radeon_do_cleanup_cp( drm_device_t *dev ); extern int radeon_do_cleanup_pageflip( drm_device_t *dev ); @@ -176,6 +189,34 @@ unsigned int cmd, unsigned long arg ); extern int radeon_cp_indirect( struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg ); +extern int radeon_cp_vertex2(struct inode *inode, struct file *filp,unsigned int cmd, unsigned long arg ); +extern int radeon_cp_cmdbuf(struct inode *inode, struct file *filp,unsigned int cmd, unsigned long arg ); +extern int radeon_cp_getparam(struct inode *inode, struct file *filp,unsigned int cmd, unsigned long arg ); +extern int radeon_cp_flip(struct inode *inode, struct file *filp,unsigned int cmd, unsigned long arg ); + +extern int radeon_mem_alloc(struct inode *inode, struct file *filp,unsigned int cmd, unsigned long arg ); +extern int radeon_mem_free(struct inode *inode, struct file *filp,unsigned int cmd, unsigned long arg ); +extern int radeon_mem_init_heap(struct inode *inode, struct file *filp,unsigned int cmd, unsigned long arg ); +extern void radeon_mem_takedown( struct mem_block **heap ); +extern void radeon_mem_release( struct mem_block *heap ); + + /* radeon_irq.c */ +extern int radeon_irq_emit(struct inode *inode, struct file *filp,unsigned int cmd, unsigned long arg ); +extern int radeon_irq_wait(struct inode *inode, struct file *filp,unsigned int cmd, unsigned long arg ); + +extern int radeon_emit_and_wait_irq(drm_device_t *dev); +extern int radeon_wait_irq(drm_device_t *dev, int swi_nr); +extern int radeon_emit_irq(drm_device_t *dev); + + +/* Flags for stats.boxes + */ +#define RADEON_BOX_DMA_IDLE 0x1 +#define RADEON_BOX_RING_FULL 0x2 +#define RADEON_BOX_FLIP 0x4 +#define RADEON_BOX_WAIT_IDLE 0x8 +#define RADEON_BOX_TEXTURE_LOAD 0x10 + /* Register definitions, register access macros and drmAddMap constants @@ -202,10 +243,10 @@ #define RADEON_CRTC_OFFSET_CNTL 0x0228 # define RADEON_CRTC_TILE_EN (1 << 15) # define RADEON_CRTC_OFFSET_FLIP_CNTL (1 << 16) +#define RADEON_CRTC2_OFFSET 0x0324 +#define RADEON_CRTC2_OFFSET_CNTL 0x0328 #define RADEON_RB3D_COLORPITCH 0x1c48 -#define RADEON_RB3D_DEPTHCLEARVALUE 0x1c30 -#define RADEON_RB3D_DEPTHXY_OFFSET 0x1c60 #define RADEON_DP_GUI_MASTER_CNTL 0x146c # define RADEON_GMC_SRC_PITCH_OFFSET_CNTL (1 << 0) @@ -240,6 +281,24 @@ #define RADEON_SCRATCH_UMSK 0x0770 #define RADEON_SCRATCH_ADDR 0x0774 +#define GET_SCRATCH( x ) (dev_priv->writeback_works \ + ? readl( &dev_priv->scratch[(x)] ) \ + : RADEON_READ( RADEON_SCRATCH_REG0 + 4*(x) ) ) + + +#define RADEON_GEN_INT_CNTL 0x0040 +# define RADEON_CRTC_VBLANK_MASK (1 << 0) +# define RADEON_GUI_IDLE_INT_ENABLE (1 << 19) +# define RADEON_SW_INT_ENABLE (1 << 25) + +#define RADEON_GEN_INT_STATUS 0x0044 +# define RADEON_CRTC_VBLANK_STAT (1 << 0) +# define RADEON_CRTC_VBLANK_STAT_ACK (1 << 0) +# define RADEON_GUI_IDLE_INT_TEST_ACK (1 << 19) +# define RADEON_SW_INT_TEST (1 << 25) +# define RADEON_SW_INT_TEST_ACK (1 << 25) +# define RADEON_SW_INT_FIRE (1 << 26) + #define RADEON_HOST_PATH_CNTL 0x0130 # define RADEON_HDP_SOFT_RESET (1 << 26) # define RADEON_HDP_WC_TIMEOUT_MASK (7 << 28) @@ -253,6 +312,12 @@ # define RADEON_ISYNC_WAIT_IDLEGUI (1 << 4) # define RADEON_ISYNC_CPSCRATCH_IDLEGUI (1 << 5) +#define RADEON_RBBM_GUICNTL 0x172c +# define RADEON_HOST_DATA_SWAP_NONE (0 << 0) +# define RADEON_HOST_DATA_SWAP_16BIT (1 << 0) +# define RADEON_HOST_DATA_SWAP_32BIT (2 << 0) +# define RADEON_HOST_DATA_SWAP_HDW (3 << 0) + #define RADEON_MC_AGP_LOCATION 0x014c #define RADEON_MC_FB_LOCATION 0x0148 #define RADEON_MCLK_CNTL 0x0012 @@ -290,10 +355,8 @@ # define RADEON_ROP_ENABLE (1 << 6) # define RADEON_STENCIL_ENABLE (1 << 7) # define RADEON_Z_ENABLE (1 << 8) -# define RADEON_DEPTH_XZ_OFFEST_ENABLE (1 << 9) -# define RADEON_ZBLOCK8 (0 << 15) -# define RADEON_ZBLOCK16 (1 << 15) #define RADEON_RB3D_DEPTHOFFSET 0x1c24 +#define RADEON_RB3D_DEPTHPITCH 0x1c28 #define RADEON_RB3D_PLANEMASK 0x1d84 #define RADEON_RB3D_STENCILREFMASK 0x1d7c #define RADEON_RB3D_ZCACHE_MODE 0x3250 @@ -306,9 +369,9 @@ # define RADEON_Z_TEST_MASK (7 << 4) # define RADEON_Z_TEST_ALWAYS (7 << 4) # define RADEON_STENCIL_TEST_ALWAYS (7 << 12) -# define RADEON_STENCIL_S_FAIL_KEEP (0 << 16) -# define RADEON_STENCIL_ZPASS_KEEP (0 << 20) -# define RADEON_STENCIL_ZFAIL_KEEP (0 << 20) +# define RADEON_STENCIL_S_FAIL_REPLACE (2 << 16) +# define RADEON_STENCIL_ZPASS_REPLACE (2 << 20) +# define RADEON_STENCIL_ZFAIL_REPLACE (2 << 24) # define RADEON_Z_WRITE_ENABLE (1 << 30) #define RADEON_RBBM_SOFT_RESET 0x00f0 # define RADEON_SOFT_RESET_CP (1 << 0) @@ -357,6 +420,16 @@ #define RADEON_SE_CNTL_STATUS 0x2140 #define RADEON_SE_LINE_WIDTH 0x1db8 #define RADEON_SE_VPORT_XSCALE 0x1d98 +#define RADEON_SE_ZBIAS_FACTOR 0x1db0 +#define RADEON_SE_TCL_MATERIAL_EMMISSIVE_RED 0x2210 +#define RADEON_SE_TCL_OUTPUT_VTX_FMT 0x2254 +#define RADEON_SE_TCL_VECTOR_INDX_REG 0x2200 +# define RADEON_VEC_INDX_OCTWORD_STRIDE_SHIFT 16 +# define RADEON_VEC_INDX_DWORD_COUNT_SHIFT 28 +#define RADEON_SE_TCL_VECTOR_DATA_REG 0x2204 +#define RADEON_SE_TCL_SCALAR_INDX_REG 0x2208 +# define RADEON_SCAL_INDX_DWORD_STRIDE_SHIFT 16 +#define RADEON_SE_TCL_SCALAR_DATA_REG 0x220C #define RADEON_SURFACE_ACCESS_FLAGS 0x0bf8 #define RADEON_SURFACE_ACCESS_CLR 0x0bfc #define RADEON_SURFACE_CNTL 0x0b00 @@ -421,6 +494,7 @@ #define RADEON_CP_RB_BASE 0x0700 #define RADEON_CP_RB_CNTL 0x0704 +# define RADEON_BUF_SWAP_32BIT (2 << 16) #define RADEON_CP_RB_RPTR_ADDR 0x070c #define RADEON_CP_RB_RPTR 0x0710 #define RADEON_CP_RB_WPTR 0x0714 @@ -457,11 +531,14 @@ #define RADEON_CP_PACKET3 0xC0000000 # define RADEON_3D_RNDR_GEN_INDX_PRIM 0x00002300 # define RADEON_WAIT_FOR_IDLE 0x00002600 +# define RADEON_3D_DRAW_VBUF 0x00002800 # define RADEON_3D_DRAW_IMMD 0x00002900 -# define RADEON_3D_CLEAR_ZMASK 0x00003200 +# define RADEON_3D_DRAW_INDX 0x00002A00 +# define RADEON_3D_LOAD_VBPNTR 0x00002F00 # define RADEON_CNTL_HOSTDATA_BLT 0x00009400 # define RADEON_CNTL_PAINT_MULTI 0x00009A00 # define RADEON_CNTL_BITBLT_MULTI 0x00009B00 +# define RADEON_CNTL_SET_SCISSORS 0xC0001E00 #define RADEON_CP_PACKET_MASK 0xC0000000 #define RADEON_CP_PACKET_COUNT_MASK 0x3fff0000 @@ -470,6 +547,7 @@ #define RADEON_CP_PACKET1_REG1_MASK 0x003ff800 #define RADEON_VTX_Z_PRESENT (1 << 31) +#define RADEON_VTX_PKCOLOR_PRESENT (1 << 3) #define RADEON_PRIM_TYPE_NONE (0 << 0) #define RADEON_PRIM_TYPE_POINT (1 << 0) @@ -482,6 +560,7 @@ #define RADEON_PRIM_TYPE_RECT_LIST (8 << 0) #define RADEON_PRIM_TYPE_3VRT_POINT_LIST (9 << 0) #define RADEON_PRIM_TYPE_3VRT_LINE_LIST (10 << 0) +#define RADEON_PRIM_TYPE_MASK 0xf #define RADEON_PRIM_WALK_IND (1 << 4) #define RADEON_PRIM_WALK_LIST (2 << 4) #define RADEON_PRIM_WALK_RING (3 << 4) @@ -508,6 +587,105 @@ #define RADEON_TXFORMAT_ARGB4444 5 #define RADEON_TXFORMAT_ARGB8888 6 #define RADEON_TXFORMAT_RGBA8888 7 +#define RADEON_TXFORMAT_VYUY422 10 +#define RADEON_TXFORMAT_YVYU422 11 +#define RADEON_TXFORMAT_DXT1 12 +#define RADEON_TXFORMAT_DXT23 14 +#define RADEON_TXFORMAT_DXT45 15 + +#define R200_PP_TXCBLEND_0 0x2f00 +#define R200_PP_TXCBLEND_1 0x2f10 +#define R200_PP_TXCBLEND_2 0x2f20 +#define R200_PP_TXCBLEND_3 0x2f30 +#define R200_PP_TXCBLEND_4 0x2f40 +#define R200_PP_TXCBLEND_5 0x2f50 +#define R200_PP_TXCBLEND_6 0x2f60 +#define R200_PP_TXCBLEND_7 0x2f70 +#define R200_SE_TCL_LIGHT_MODEL_CTL_0 0x2268 +#define R200_PP_TFACTOR_0 0x2ee0 +#define R200_SE_VTX_FMT_0 0x2088 +#define R200_SE_VAP_CNTL 0x2080 +#define R200_SE_TCL_MATRIX_SEL_0 0x2230 +#define R200_SE_TCL_TEX_PROC_CTL_2 0x22a8 +#define R200_SE_TCL_UCP_VERT_BLEND_CTL 0x22c0 +#define R200_PP_TXFILTER_5 0x2ca0 +#define R200_PP_TXFILTER_4 0x2c80 +#define R200_PP_TXFILTER_3 0x2c60 +#define R200_PP_TXFILTER_2 0x2c40 +#define R200_PP_TXFILTER_1 0x2c20 +#define R200_PP_TXFILTER_0 0x2c00 +#define R200_PP_TXOFFSET_5 0x2d78 +#define R200_PP_TXOFFSET_4 0x2d60 +#define R200_PP_TXOFFSET_3 0x2d48 +#define R200_PP_TXOFFSET_2 0x2d30 +#define R200_PP_TXOFFSET_1 0x2d18 +#define R200_PP_TXOFFSET_0 0x2d00 + +#define R200_PP_CUBIC_FACES_0 0x2c18 +#define R200_PP_CUBIC_FACES_1 0x2c38 +#define R200_PP_CUBIC_FACES_2 0x2c58 +#define R200_PP_CUBIC_FACES_3 0x2c78 +#define R200_PP_CUBIC_FACES_4 0x2c98 +#define R200_PP_CUBIC_FACES_5 0x2cb8 +#define R200_PP_CUBIC_OFFSET_F1_0 0x2d04 +#define R200_PP_CUBIC_OFFSET_F2_0 0x2d08 +#define R200_PP_CUBIC_OFFSET_F3_0 0x2d0c +#define R200_PP_CUBIC_OFFSET_F4_0 0x2d10 +#define R200_PP_CUBIC_OFFSET_F5_0 0x2d14 +#define R200_PP_CUBIC_OFFSET_F1_1 0x2d1c +#define R200_PP_CUBIC_OFFSET_F2_1 0x2d20 +#define R200_PP_CUBIC_OFFSET_F3_1 0x2d24 +#define R200_PP_CUBIC_OFFSET_F4_1 0x2d28 +#define R200_PP_CUBIC_OFFSET_F5_1 0x2d2c +#define R200_PP_CUBIC_OFFSET_F1_2 0x2d34 +#define R200_PP_CUBIC_OFFSET_F2_2 0x2d38 +#define R200_PP_CUBIC_OFFSET_F3_2 0x2d3c +#define R200_PP_CUBIC_OFFSET_F4_2 0x2d40 +#define R200_PP_CUBIC_OFFSET_F5_2 0x2d44 +#define R200_PP_CUBIC_OFFSET_F1_3 0x2d4c +#define R200_PP_CUBIC_OFFSET_F2_3 0x2d50 +#define R200_PP_CUBIC_OFFSET_F3_3 0x2d54 +#define R200_PP_CUBIC_OFFSET_F4_3 0x2d58 +#define R200_PP_CUBIC_OFFSET_F5_3 0x2d5c +#define R200_PP_CUBIC_OFFSET_F1_4 0x2d64 +#define R200_PP_CUBIC_OFFSET_F2_4 0x2d68 +#define R200_PP_CUBIC_OFFSET_F3_4 0x2d6c +#define R200_PP_CUBIC_OFFSET_F4_4 0x2d70 +#define R200_PP_CUBIC_OFFSET_F5_4 0x2d74 +#define R200_PP_CUBIC_OFFSET_F1_5 0x2d7c +#define R200_PP_CUBIC_OFFSET_F2_5 0x2d80 +#define R200_PP_CUBIC_OFFSET_F3_5 0x2d84 +#define R200_PP_CUBIC_OFFSET_F4_5 0x2d88 +#define R200_PP_CUBIC_OFFSET_F5_5 0x2d8c + +#define R200_RE_AUX_SCISSOR_CNTL 0x26f0 +#define R200_SE_VTE_CNTL 0x20b0 +#define R200_SE_TCL_OUTPUT_VTX_COMP_SEL 0x2250 +#define R200_PP_TAM_DEBUG3 0x2d9c +#define R200_PP_CNTL_X 0x2cc4 +#define R200_SE_VAP_CNTL_STATUS 0x2140 +#define R200_RE_SCISSOR_TL_0 0x1cd8 +#define R200_RE_SCISSOR_TL_1 0x1ce0 +#define R200_RE_SCISSOR_TL_2 0x1ce8 +#define R200_RB3D_DEPTHXY_OFFSET 0x1d60 +#define R200_RE_AUX_SCISSOR_CNTL 0x26f0 +#define R200_SE_VTX_STATE_CNTL 0x2180 +#define R200_RE_POINTSIZE 0x2648 +#define R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_0 0x2254 + + +#define SE_VAP_CNTL__TCL_ENA_MASK 0x00000001 +#define SE_VAP_CNTL__FORCE_W_TO_ONE_MASK 0x00010000 +#define SE_VAP_CNTL__VF_MAX_VTX_NUM__SHIFT 0x00000012 +#define SE_VTE_CNTL__VTX_XY_FMT_MASK 0x00000100 +#define SE_VTE_CNTL__VTX_Z_FMT_MASK 0x00000200 +#define SE_VTX_FMT_0__VTX_Z0_PRESENT_MASK 0x00000001 +#define SE_VTX_FMT_0__VTX_W0_PRESENT_MASK 0x00000002 +#define SE_VTX_FMT_0__VTX_COLOR_0_FMT__SHIFT 0x0000000b +#define R200_3D_DRAW_IMMD_2 0xC0003500 +#define R200_SE_VTX_FMT_1 0x208c +#define R200_RE_CNTL 0x1c50 + /* Constants */ #define RADEON_MAX_USEC_TIMEOUT 100000 /* 100 ms */ @@ -515,6 +693,7 @@ #define RADEON_LAST_FRAME_REG RADEON_SCRATCH_REG0 #define RADEON_LAST_DISPATCH_REG RADEON_SCRATCH_REG1 #define RADEON_LAST_CLEAR_REG RADEON_SCRATCH_REG2 +#define RADEON_LAST_SWI_REG RADEON_SCRATCH_REG3 #define RADEON_LAST_DISPATCH 1 #define RADEON_MAX_VB_AGE 0x7fffffff @@ -526,41 +705,11 @@ #define RADEON_BASE(reg) ((unsigned long)(dev_priv->mmio->handle)) #define RADEON_ADDR(reg) (RADEON_BASE( reg ) + reg) -#define RADEON_DEREF(reg) *(volatile u32 *)RADEON_ADDR( reg ) -#ifdef __alpha__ -#define RADEON_READ(reg) (_RADEON_READ((u32 *)RADEON_ADDR( reg ))) -static inline u32 _RADEON_READ(u32 *addr) -{ - mb(); - return *(volatile u32 *)addr; -} -#define RADEON_WRITE(reg,val) \ -do { \ - wmb(); \ - RADEON_DEREF(reg) = val; \ -} while (0) -#else -#define RADEON_READ(reg) RADEON_DEREF( reg ) -#define RADEON_WRITE(reg, val) do { RADEON_DEREF( reg ) = val; } while (0) -#endif +#define RADEON_READ(reg) readl( (volatile u32 *) RADEON_ADDR(reg) ) +#define RADEON_WRITE(reg,val) writel( (val), (volatile u32 *) RADEON_ADDR(reg)) -#define RADEON_DEREF8(reg) *(volatile u8 *)RADEON_ADDR( reg ) -#ifdef __alpha__ -#define RADEON_READ8(reg) _RADEON_READ8((u8 *)RADEON_ADDR( reg )) -static inline u8 _RADEON_READ8(u8 *addr) -{ - mb(); - return *(volatile u8 *)addr; -} -#define RADEON_WRITE8(reg,val) \ -do { \ - wmb(); \ - RADEON_DEREF8( reg ) = val; \ -} while (0) -#else -#define RADEON_READ8(reg) RADEON_DEREF8( reg ) -#define RADEON_WRITE8(reg, val) do { RADEON_DEREF8( reg ) = val; } while (0) -#endif +#define RADEON_READ8(reg) readb( (volatile u8 *) RADEON_ADDR(reg) ) +#define RADEON_WRITE8(reg,val) writeb( (val), (volatile u8 *) RADEON_ADDR(reg)) #define RADEON_WRITE_PLL( addr, val ) \ do { \ @@ -647,20 +796,16 @@ } \ } while (0) + +/* Perfbox functionality only. + */ #define RING_SPACE_TEST_WITH_RETURN( dev_priv ) \ do { \ - drm_radeon_ring_buffer_t *ring = &dev_priv->ring; int i; \ - if ( ring->space < ring->high_mark ) { \ - for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { \ - radeon_update_ring_snapshot( ring ); \ - if ( ring->space >= ring->high_mark ) \ - goto __ring_space_done; \ - udelay( 1 ); \ - } \ - DRM_ERROR( "ring space check failed!\n" ); \ - return -EBUSY; \ + if (!(dev_priv->stats.boxes & RADEON_BOX_DMA_IDLE)) { \ + u32 head = GET_RING_HEAD(&dev_priv->ring); \ + if (head == dev_priv->ring.tail) \ + dev_priv->stats.boxes |= RADEON_BOX_DMA_IDLE; \ } \ - __ring_space_done: ; \ } while (0) #define VB_AGE_TEST_WITH_RETURN( dev_priv ) \ @@ -668,7 +813,7 @@ drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; \ if ( sarea_priv->last_dispatch >= RADEON_MAX_VB_AGE ) { \ int __ret = radeon_do_cp_idle( dev_priv ); \ - if ( __ret < 0 ) return __ret; \ + if ( __ret ) return __ret; \ sarea_priv->last_dispatch = 0; \ radeon_freelist_reset( dev ); \ } \ @@ -694,12 +839,17 @@ * Ring control */ -#define radeon_flush_write_combine() mb() +#if defined(__powerpc__) +#define radeon_flush_write_combine() (void) GET_RING_HEAD( &dev_priv->ring ) +#else +#define radeon_flush_write_combine() wmb() +#warning PCI posting bug +#endif #define RADEON_VERBOSE 0 -#define RING_LOCALS int write; unsigned int mask; volatile u32 *ring; +#define RING_LOCALS int write, _nr; unsigned int mask; u32 *ring; #define BEGIN_RING( n ) do { \ if ( RADEON_VERBOSE ) { \ @@ -707,9 +857,10 @@ n, __FUNCTION__ ); \ } \ if ( dev_priv->ring.space <= (n) * sizeof(u32) ) { \ + COMMIT_RING(); \ radeon_wait_ring( dev_priv, (n) * sizeof(u32) ); \ } \ - dev_priv->ring.space -= (n) * sizeof(u32); \ + _nr = n; dev_priv->ring.space -= (n) * sizeof(u32); \ ring = dev_priv->ring.start; \ write = dev_priv->ring.tail; \ mask = dev_priv->ring.tail_mask; \ @@ -720,9 +871,22 @@ DRM_INFO( "ADVANCE_RING() wr=0x%06x tail=0x%06x\n", \ write, dev_priv->ring.tail ); \ } \ - radeon_flush_write_combine(); \ - dev_priv->ring.tail = write; \ - RADEON_WRITE( RADEON_CP_RB_WPTR, write ); \ + if (((dev_priv->ring.tail + _nr) & mask) != write) { \ + DRM_ERROR( \ + "ADVANCE_RING(): mismatch: nr: %x write: %x line: %d\n", \ + ((dev_priv->ring.tail + _nr) & mask), \ + write, __LINE__); \ + } else \ + dev_priv->ring.tail = write; \ +} while (0) + +#define COMMIT_RING() do { \ + /* Flush writes to ring */ \ + rmb(); \ + GET_RING_HEAD( &dev_priv->ring ); \ + RADEON_WRITE( RADEON_CP_RB_WPTR, dev_priv->ring.tail ); \ + /* read from PCI bus to ensure correct posting */ \ + RADEON_READ( RADEON_CP_RB_RPTR ); \ } while (0) #define OUT_RING( x ) do { \ @@ -734,6 +898,33 @@ write &= mask; \ } while (0) -#define RADEON_PERFORMANCE_BOXES 0 +#define OUT_RING_REG( reg, val ) do { \ + OUT_RING( CP_PACKET0( reg, 0 ) ); \ + OUT_RING( val ); \ +} while (0) + + +#define OUT_RING_USER_TABLE( tab, sz ) do { \ + int _size = (sz); \ + int *_tab = (tab); \ + \ + if (write + _size > mask) { \ + int i = (mask+1) - write; \ + if (__copy_from_user( (int *)(ring+write), \ + _tab, i*4 )) \ + return -EFAULT; \ + write = 0; \ + _size -= i; \ + _tab += i; \ + } \ + \ + if (_size && __copy_from_user( (int *)(ring+write), \ + _tab, _size*4 )) \ + return -EFAULT; \ + \ + write += _size; \ + write &= mask; \ +} while (0) + #endif /* __RADEON_DRV_H__ */ diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/radeon.h linux.21rc1-ac1/drivers/char/drm/radeon.h --- linux.21rc1/drivers/char/drm/radeon.h 2003-04-22 16:39:34.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/radeon.h 2003-04-22 16:44:36.000000000 +0100 @@ -44,7 +44,78 @@ #define __HAVE_SG 1 #define __HAVE_PCI_DMA 1 -/* Driver customization: +#define DRIVER_AUTHOR "Gareth Hughes, Keith Whitwell, others." + +#define DRIVER_NAME "radeon" +#define DRIVER_DESC "ATI Radeon" +#define DRIVER_DATE "20020828" + +#define DRIVER_MAJOR 1 +#define DRIVER_MINOR 7 +#define DRIVER_PATCHLEVEL 0 + +/* Interface history: + * + * 1.1 - ?? + * 1.2 - Add vertex2 ioctl (keith) + * - Add stencil capability to clear ioctl (gareth, keith) + * - Increase MAX_TEXTURE_LEVELS (brian) + * 1.3 - Add cmdbuf ioctl (keith) + * - Add support for new radeon packets (keith) + * - Add getparam ioctl (keith) + * - Add flip-buffers ioctl, deprecate fullscreen foo (keith). + * 1.4 - Add scratch registers to get_param ioctl. + * 1.5 - Add r200 packets to cmdbuf ioctl + * - Add r200 function to init ioctl + * - Add 'scalar2' instruction to cmdbuf + * 1.6 - Add static agp memory manager + * Add irq handler (won't be turned on unless X server knows to) + * Add irq ioctls and irq_active getparam. + * Add wait command for cmdbuf ioctl + * Add agp offset query for getparam + * 1.7 - Add support for cube map registers: R200_PP_CUBIC_FACES_[0..5] + * and R200_PP_CUBIC_OFFSET_F1_[0..5]. + * Added packets R200_EMIT_PP_CUBIC_FACES_[0..5] and + * R200_EMIT_PP_CUBIC_OFFSETS_[0..5]. (brian) + */ +#define DRIVER_IOCTLS \ + [DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { radeon_cp_buffers, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_INIT)] = { radeon_cp_init, 1, 1 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_START)] = { radeon_cp_start, 1, 1 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_STOP)] = { radeon_cp_stop, 1, 1 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_RESET)] = { radeon_cp_reset, 1, 1 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_IDLE)] = { radeon_cp_idle, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_RADEON_RESET)] = { radeon_engine_reset, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_RADEON_FULLSCREEN)] = { radeon_fullscreen, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_RADEON_SWAP)] = { radeon_cp_swap, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CLEAR)] = { radeon_cp_clear, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_RADEON_VERTEX)] = { radeon_cp_vertex, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_RADEON_INDICES)] = { radeon_cp_indices, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_RADEON_TEXTURE)] = { radeon_cp_texture, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_RADEON_STIPPLE)] = { radeon_cp_stipple, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_RADEON_INDIRECT)] = { radeon_cp_indirect, 1, 1 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_RADEON_VERTEX2)] = { radeon_cp_vertex2, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CMDBUF)] = { radeon_cp_cmdbuf, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_RADEON_GETPARAM)] = { radeon_cp_getparam, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_RADEON_FLIP)] = { radeon_cp_flip, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_RADEON_ALLOC)] = { radeon_mem_alloc, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_RADEON_FREE)] = { radeon_mem_free, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_RADEON_INIT_HEAP)] = { radeon_mem_init_heap, 1, 1 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_RADEON_IRQ_EMIT)] = { radeon_irq_emit, 1, 0 }, \ + [DRM_IOCTL_NR(DRM_IOCTL_RADEON_IRQ_WAIT)] = { radeon_irq_wait, 1, 0 }, + + +#define USE_IRQS 1 +#if USE_IRQS +#define __HAVE_DMA_IRQ 1 +#define __HAVE_VBL_IRQ 1 +#define __HAVE_SHARED_IRQ 1 + +/* When a client dies: + * - Check for and clean up flipped page state + * - Free any alloced agp memory. + * + * DRM infrastructure takes care of reclaiming dma buffers. */ #define DRIVER_PRERELEASE() do { \ if ( dev->dev_private ) { \ @@ -52,31 +123,36 @@ if ( dev_priv->page_flipping ) { \ radeon_do_cleanup_pageflip( dev ); \ } \ + radeon_mem_release( dev_priv->agp_heap ); \ } \ } while (0) +/* On unloading the module: + * - Free memory heap structure + * - Remove mappings made at startup and free dev_private. + */ #define DRIVER_PRETAKEDOWN() do { \ - if ( dev->dev_private ) radeon_do_cleanup_cp( dev ); \ + if ( dev->dev_private ) { \ + drm_radeon_private_t *dev_priv = dev->dev_private; \ + radeon_mem_takedown( &(dev_priv->agp_heap) ); \ + radeon_do_cleanup_cp( dev ); \ + } \ } while (0) +#else +#define __HAVE_DMA_IRQ 0 +#endif + /* DMA customization: */ #define __HAVE_DMA 1 -#if 0 -/* GH: Remove this for now... */ -#define __HAVE_DMA_QUIESCENT 1 -#define DRIVER_DMA_QUIESCENT() do { \ - drm_radeon_private_t *dev_priv = dev->dev_private; \ - return radeon_do_cp_idle( dev_priv ); \ -} while (0) -#endif /* Buffer customization: */ #define DRIVER_BUF_PRIV_T drm_radeon_buf_priv_t -#define DRIVER_AGP_BUFFERS_MAP( dev ) \ +#define DRIVER_AGP_BUFFERS_MAP( dev ) \ ((drm_radeon_private_t *)((dev)->dev_private))->buffers #endif diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/radeon_irq.c linux.21rc1-ac1/drivers/char/drm/radeon_irq.c --- linux.21rc1/drivers/char/drm/radeon_irq.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/radeon_irq.c 2003-04-22 16:44:36.000000000 +0100 @@ -0,0 +1,258 @@ +/* radeon_irq.c -- IRQ handling for radeon -*- linux-c -*- + * + * Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. + * + * The Weather Channel (TM) funded Tungsten Graphics to develop the + * initial release of the Radeon 8500 driver under the XFree86 license. + * This notice must be preserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Keith Whitwell + * Michel Dänzer + */ + +#include "radeon.h" +#include "drmP.h" +#include "drm.h" +#include "radeon_drm.h" +#include "radeon_drv.h" +#include "drm_os_linux.h" + +/* Interrupts - Used for device synchronization and flushing in the + * following circumstances: + * + * - Exclusive FB access with hw idle: + * - Wait for GUI Idle (?) interrupt, then do normal flush. + * + * - Frame throttling, NV_fence: + * - Drop marker irq's into command stream ahead of time. + * - Wait on irq's with lock *not held* + * - Check each for termination condition + * + * - Internally in cp_getbuffer, etc: + * - as above, but wait with lock held??? + * + * NOTE: These functions are misleadingly named -- the irq's aren't + * tied to dma at all, this is just a hangover from dri prehistory. + */ + +void DRM(dma_service)(int irq, void *arg, struct pt_regs *reg) +{ + drm_device_t *dev = (drm_device_t *) arg; + drm_radeon_private_t *dev_priv = + (drm_radeon_private_t *)dev->dev_private; + u32 stat; + + stat = RADEON_READ(RADEON_GEN_INT_STATUS) + & (RADEON_SW_INT_TEST | RADEON_CRTC_VBLANK_STAT); + if (!stat) + return; + + /* SW interrupt */ + if (stat & RADEON_SW_INT_TEST) { + wake_up_interruptible( &dev_priv->swi_queue ); + } + + /* VBLANK interrupt */ + if (stat & RADEON_CRTC_VBLANK_STAT) { + atomic_inc(&dev->vbl_received); + wake_up_interruptible(&dev->vbl_queue); + DRM(vbl_send_signals)(dev); + } + + /* Acknowledge all the bits in GEN_INT_STATUS -- seem to get + * more than we asked for... + */ + RADEON_WRITE(RADEON_GEN_INT_STATUS, stat); +} + +static __inline__ void radeon_acknowledge_irqs(drm_radeon_private_t *dev_priv) +{ + u32 tmp = RADEON_READ( RADEON_GEN_INT_STATUS ) + & (RADEON_SW_INT_TEST_ACK | RADEON_CRTC_VBLANK_STAT); + if (tmp) + RADEON_WRITE( RADEON_GEN_INT_STATUS, tmp ); +} + +int radeon_emit_irq(drm_device_t *dev) +{ + drm_radeon_private_t *dev_priv = dev->dev_private; + unsigned int ret; + RING_LOCALS; + + atomic_inc(&dev_priv->swi_emitted); + ret = atomic_read(&dev_priv->swi_emitted); + + BEGIN_RING( 4 ); + OUT_RING_REG( RADEON_LAST_SWI_REG, ret ); + OUT_RING_REG( RADEON_GEN_INT_STATUS, RADEON_SW_INT_FIRE ); + ADVANCE_RING(); + COMMIT_RING(); + + return ret; +} + + +int radeon_wait_irq(drm_device_t *dev, int swi_nr) +{ + drm_radeon_private_t *dev_priv = + (drm_radeon_private_t *)dev->dev_private; + int ret = 0; + + if (RADEON_READ( RADEON_LAST_SWI_REG ) >= swi_nr) + return 0; + + dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE; + + /* This is a hack to work around mysterious freezes on certain + * systems: + */ + radeon_acknowledge_irqs( dev_priv ); + + DRM_WAIT_ON( ret, dev_priv->swi_queue, 3 * HZ, + RADEON_READ( RADEON_LAST_SWI_REG ) >= swi_nr ); + + return ret; +} + +int radeon_emit_and_wait_irq(drm_device_t *dev) +{ + return radeon_wait_irq( dev, radeon_emit_irq(dev) ); +} + + +int DRM(vblank_wait)(drm_device_t *dev, unsigned int *sequence) +{ + drm_radeon_private_t *dev_priv = + (drm_radeon_private_t *)dev->dev_private; + unsigned int cur_vblank; + int ret = 0; + + if ( !dev_priv ) { + DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ ); + return -EINVAL; + } + + radeon_acknowledge_irqs( dev_priv ); + + dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE; + + /* Assume that the user has missed the current sequence number + * by about a day rather than she wants to wait for years + * using vertical blanks... + */ + DRM_WAIT_ON( ret, dev->vbl_queue, 3*HZ, + ( ( ( cur_vblank = atomic_read(&dev->vbl_received ) ) + - *sequence ) <= (1<<23) ) ); + + *sequence = cur_vblank; + + return ret; +} + + +/* Needs the lock as it touches the ring. + */ +int radeon_irq_emit(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long data) +{ + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + drm_radeon_private_t *dev_priv = dev->dev_private; + drm_radeon_irq_emit_t emit; + int result; + + LOCK_TEST_WITH_RETURN( dev ); + + if ( !dev_priv ) { + DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ ); + return -EINVAL; + } + + DRM_COPY_FROM_USER_IOCTL( emit, (drm_radeon_irq_emit_t *)data, + sizeof(emit) ); + + result = radeon_emit_irq( dev ); + + if ( copy_to_user( emit.irq_seq, &result, sizeof(int) ) ) { + DRM_ERROR( "copy_to_user\n" ); + return -EFAULT; + } + + return 0; +} + + +/* Doesn't need the hardware lock. + */ +int radeon_irq_wait(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long data) +{ + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + drm_radeon_private_t *dev_priv = dev->dev_private; + drm_radeon_irq_wait_t irqwait; + + if ( !dev_priv ) { + DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ ); + return -EINVAL; + } + + DRM_COPY_FROM_USER_IOCTL( irqwait, (drm_radeon_irq_wait_t *)data, + sizeof(irqwait) ); + + return radeon_wait_irq( dev, irqwait.irq_seq ); +} + + +/* drm_dma.h hooks +*/ +void DRM(driver_irq_preinstall)( drm_device_t *dev ) { + drm_radeon_private_t *dev_priv = + (drm_radeon_private_t *)dev->dev_private; + + /* Disable *all* interrupts */ + RADEON_WRITE( RADEON_GEN_INT_CNTL, 0 ); + + /* Clear bits if they're already high */ + radeon_acknowledge_irqs( dev_priv ); +} + +void DRM(driver_irq_postinstall)( drm_device_t *dev ) { + drm_radeon_private_t *dev_priv = + (drm_radeon_private_t *)dev->dev_private; + + atomic_set(&dev_priv->swi_emitted, 0); + init_waitqueue_head( &dev_priv->swi_queue ); + + /* Turn on SW and VBL ints */ + RADEON_WRITE( RADEON_GEN_INT_CNTL, + RADEON_CRTC_VBLANK_MASK | + RADEON_SW_INT_ENABLE ); +} + +void DRM(driver_irq_uninstall)( drm_device_t *dev ) { + drm_radeon_private_t *dev_priv = + (drm_radeon_private_t *)dev->dev_private; + if ( dev_priv ) { + /* Disable *all* interrupts */ + RADEON_WRITE( RADEON_GEN_INT_CNTL, 0 ); + } +} diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/radeon_mem.c linux.21rc1-ac1/drivers/char/drm/radeon_mem.c --- linux.21rc1/drivers/char/drm/radeon_mem.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/radeon_mem.c 2003-04-22 16:44:36.000000000 +0100 @@ -0,0 +1,338 @@ +/* radeon_mem.c -- Simple agp/fb memory manager for radeon -*- linux-c -*- + * + * Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. + * + * The Weather Channel (TM) funded Tungsten Graphics to develop the + * initial release of the Radeon 8500 driver under the XFree86 license. + * This notice must be preserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Keith Whitwell + */ + +#include "radeon.h" +#include "drmP.h" +#include "drm.h" +#include "radeon_drm.h" +#include "radeon_drv.h" +#include "drm_os_linux.h" + +/* Very simple allocator for agp memory, working on a static range + * already mapped into each client's address space. + */ + +static struct mem_block *split_block(struct mem_block *p, int start, int size, + int pid ) +{ + /* Maybe cut off the start of an existing block */ + if (start > p->start) { + struct mem_block *newblock = kmalloc(sizeof(*newblock), GFP_KERNEL); + if (!newblock) + goto out; + newblock->start = start; + newblock->size = p->size - (start - p->start); + newblock->pid = 0; + newblock->next = p->next; + newblock->prev = p; + p->next->prev = newblock; + p->next = newblock; + p->size -= newblock->size; + p = newblock; + } + + /* Maybe cut off the end of an existing block */ + if (size < p->size) { + struct mem_block *newblock = kmalloc(sizeof(*newblock), GFP_KERNEL); + if (!newblock) + goto out; + newblock->start = start + size; + newblock->size = p->size - size; + newblock->pid = 0; + newblock->next = p->next; + newblock->prev = p; + p->next->prev = newblock; + p->next = newblock; + p->size = size; + } + + out: + /* Our block is in the middle */ + p->pid = pid; + return p; +} + +static struct mem_block *alloc_block( struct mem_block *heap, int size, + int align2, int pid ) +{ + struct mem_block *p; + int mask = (1 << align2)-1; + + for (p = heap->next ; p != heap ; p = p->next) { + int start = (p->start + mask) & ~mask; + if (p->pid == 0 && start + size <= p->start + p->size) + return split_block( p, start, size, pid ); + } + + return NULL; +} + +static struct mem_block *find_block( struct mem_block *heap, int start ) +{ + struct mem_block *p; + + for (p = heap->next ; p != heap ; p = p->next) + if (p->start == start) + return p; + + return NULL; +} + + +static void free_block( struct mem_block *p ) +{ + p->pid = 0; + + /* Assumes a single contiguous range. Needs a special pid in + * 'heap' to stop it being subsumed. + */ + if (p->next->pid == 0) { + struct mem_block *q = p->next; + p->size += q->size; + p->next = q->next; + p->next->prev = p; + kfree(q); + } + + if (p->prev->pid == 0) { + struct mem_block *q = p->prev; + q->size += p->size; + q->next = p->next; + q->next->prev = q; + kfree(p); + } +} + +static void print_heap( struct mem_block *heap ) +{ + struct mem_block *p; + + for (p = heap->next ; p != heap ; p = p->next) + DRM_DEBUG("0x%x..0x%x (0x%x) -- owner %d\n", + p->start, p->start + p->size, + p->size, p->pid); +} + +/* Initialize. How to check for an uninitialized heap? + */ +static int init_heap(struct mem_block **heap, int start, int size) +{ + struct mem_block *blocks = kmalloc(sizeof(*blocks), GFP_KERNEL); + + if (!blocks) + return -ENOMEM; + + *heap = kmalloc(sizeof(**heap), GFP_KERNEL); + if (!*heap) { + kfree( blocks ); + return -ENOMEM; + } + + blocks->start = start; + blocks->size = size; + blocks->pid = 0; + blocks->next = blocks->prev = *heap; + + memset( *heap, 0, sizeof(**heap) ); + (*heap)->pid = -1; + (*heap)->next = (*heap)->prev = blocks; + return 0; +} + + +/* Free all blocks associated with the releasing pid. + */ +void radeon_mem_release( struct mem_block *heap ) +{ + int pid = current->pid; + struct mem_block *p; + + if (!heap || !heap->next) + return; + + for (p = heap->next ; p != heap ; p = p->next) { + if (p->pid == pid) + p->pid = 0; + } + + /* Assumes a single contiguous range. Needs a special pid in + * 'heap' to stop it being subsumed. + */ + for (p = heap->next ; p != heap ; p = p->next) { + while (p->pid == 0 && p->next->pid == 0) { + struct mem_block *q = p->next; + p->size += q->size; + p->next = q->next; + p->next->prev = p; + kfree(q); + } + } +} + +/* Shutdown. + */ +void radeon_mem_takedown( struct mem_block **heap ) +{ + struct mem_block *p; + + if (!*heap) + return; + + for (p = (*heap)->next ; p != *heap ; ) { + struct mem_block *q = p; + p = p->next; + kfree(q); + } + + kfree( *heap ); + *heap = 0; +} + + + +/* IOCTL HANDLERS */ + +static struct mem_block **get_heap( drm_radeon_private_t *dev_priv, + int region ) +{ + switch( region ) { + case RADEON_MEM_REGION_AGP: + return &dev_priv->agp_heap; + case RADEON_MEM_REGION_FB: + return &dev_priv->fb_heap; + default: + return 0; + } +} + +int radeon_mem_alloc(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long data ) +{ + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + drm_radeon_private_t *dev_priv = dev->dev_private; + drm_radeon_mem_alloc_t alloc; + struct mem_block *block, **heap; + + if ( !dev_priv ) { + DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ ); + return -EINVAL; + } + + DRM_COPY_FROM_USER_IOCTL( alloc, (drm_radeon_mem_alloc_t *)data, + sizeof(alloc) ); + + heap = get_heap( dev_priv, alloc.region ); + if (!heap || !*heap) + return -EFAULT; + + /* Make things easier on ourselves: all allocations at least + * 4k aligned. + */ + if (alloc.alignment < 12) + alloc.alignment = 12; + + block = alloc_block( *heap, alloc.size, alloc.alignment, + current->pid ); + + if (!block) + return -ENOMEM; + + if ( copy_to_user( alloc.region_offset, &block->start, + sizeof(int) ) ) { + DRM_ERROR( "copy_to_user\n" ); + return -EFAULT; + } + + return 0; +} + + + +int radeon_mem_free(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long data) +{ + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + drm_radeon_private_t *dev_priv = dev->dev_private; + drm_radeon_mem_free_t memfree; + struct mem_block *block, **heap; + + if ( !dev_priv ) { + DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ ); + return -EINVAL; + } + + DRM_COPY_FROM_USER_IOCTL( memfree, (drm_radeon_mem_free_t *)data, + sizeof(memfree) ); + + heap = get_heap( dev_priv, memfree.region ); + if (!heap || !*heap) + return -EFAULT; + + block = find_block( *heap, memfree.region_offset ); + if (!block) + return -EFAULT; + + if (block->pid != current->pid) + return -EPERM; + + free_block( block ); + return 0; +} + +int radeon_mem_init_heap(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long data) +{ + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + drm_radeon_private_t *dev_priv = dev->dev_private; + drm_radeon_mem_init_heap_t initheap; + struct mem_block **heap; + + if ( !dev_priv ) { + DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ ); + return -EINVAL; + } + + DRM_COPY_FROM_USER_IOCTL( initheap, (drm_radeon_mem_init_heap_t *)data, + sizeof(initheap) ); + + heap = get_heap( dev_priv, initheap.region ); + if (!heap) + return -EFAULT; + + if (*heap) { + DRM_ERROR("heap already initialized?"); + return -EFAULT; + } + + return init_heap( heap, initheap.start, initheap.size ); +} + + diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/radeon_state.c linux.21rc1-ac1/drivers/char/drm/radeon_state.c --- linux.21rc1/drivers/char/drm/radeon_state.c 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/radeon_state.c 2003-04-22 16:44:36.000000000 +0100 @@ -29,10 +29,11 @@ #include "radeon.h" #include "drmP.h" -#include "radeon_drv.h" #include "drm.h" -#include - +#include "drm_sarea.h" +#include "radeon_drm.h" +#include "radeon_drv.h" +#include "drm_os_linux.h" /* ================================================================ * CP hardware state programming functions @@ -47,360 +48,254 @@ box->x1, box->y1, box->x2, box->y2 ); BEGIN_RING( 4 ); - OUT_RING( CP_PACKET0( RADEON_RE_TOP_LEFT, 0 ) ); OUT_RING( (box->y1 << 16) | box->x1 ); - OUT_RING( CP_PACKET0( RADEON_RE_WIDTH_HEIGHT, 0 ) ); OUT_RING( ((box->y2 - 1) << 16) | (box->x2 - 1) ); - - ADVANCE_RING(); -} - -static inline void radeon_emit_context( drm_radeon_private_t *dev_priv ) -{ - drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_radeon_context_regs_t *ctx = &sarea_priv->context_state; - RING_LOCALS; - DRM_DEBUG( " %s\n", __FUNCTION__ ); - - BEGIN_RING( 14 ); - - OUT_RING( CP_PACKET0( RADEON_PP_MISC, 6 ) ); - OUT_RING( ctx->pp_misc ); - OUT_RING( ctx->pp_fog_color ); - OUT_RING( ctx->re_solid_color ); - OUT_RING( ctx->rb3d_blendcntl ); - OUT_RING( ctx->rb3d_depthoffset ); - OUT_RING( ctx->rb3d_depthpitch ); - OUT_RING( ctx->rb3d_zstencilcntl ); - - OUT_RING( CP_PACKET0( RADEON_PP_CNTL, 2 ) ); - OUT_RING( ctx->pp_cntl ); - OUT_RING( ctx->rb3d_cntl ); - OUT_RING( ctx->rb3d_coloroffset ); - - OUT_RING( CP_PACKET0( RADEON_RB3D_COLORPITCH, 0 ) ); - OUT_RING( ctx->rb3d_colorpitch ); - - ADVANCE_RING(); -} - -static inline void radeon_emit_vertfmt( drm_radeon_private_t *dev_priv ) -{ - drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_radeon_context_regs_t *ctx = &sarea_priv->context_state; - RING_LOCALS; - DRM_DEBUG( " %s\n", __FUNCTION__ ); - - BEGIN_RING( 2 ); - - OUT_RING( CP_PACKET0( RADEON_SE_COORD_FMT, 0 ) ); - OUT_RING( ctx->se_coord_fmt ); - - ADVANCE_RING(); -} - -static inline void radeon_emit_line( drm_radeon_private_t *dev_priv ) -{ - drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_radeon_context_regs_t *ctx = &sarea_priv->context_state; - RING_LOCALS; - DRM_DEBUG( " %s\n", __FUNCTION__ ); - - BEGIN_RING( 5 ); - - OUT_RING( CP_PACKET0( RADEON_RE_LINE_PATTERN, 1 ) ); - OUT_RING( ctx->re_line_pattern ); - OUT_RING( ctx->re_line_state ); - - OUT_RING( CP_PACKET0( RADEON_SE_LINE_WIDTH, 0 ) ); - OUT_RING( ctx->se_line_width ); - - ADVANCE_RING(); -} - -static inline void radeon_emit_bumpmap( drm_radeon_private_t *dev_priv ) -{ - drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_radeon_context_regs_t *ctx = &sarea_priv->context_state; - RING_LOCALS; - DRM_DEBUG( " %s\n", __FUNCTION__ ); - - BEGIN_RING( 5 ); - - OUT_RING( CP_PACKET0( RADEON_PP_LUM_MATRIX, 0 ) ); - OUT_RING( ctx->pp_lum_matrix ); - - OUT_RING( CP_PACKET0( RADEON_PP_ROT_MATRIX_0, 1 ) ); - OUT_RING( ctx->pp_rot_matrix_0 ); - OUT_RING( ctx->pp_rot_matrix_1 ); - - ADVANCE_RING(); -} - -static inline void radeon_emit_masks( drm_radeon_private_t *dev_priv ) -{ - drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_radeon_context_regs_t *ctx = &sarea_priv->context_state; - RING_LOCALS; - DRM_DEBUG( " %s\n", __FUNCTION__ ); - - BEGIN_RING( 4 ); - - OUT_RING( CP_PACKET0( RADEON_RB3D_STENCILREFMASK, 2 ) ); - OUT_RING( ctx->rb3d_stencilrefmask ); - OUT_RING( ctx->rb3d_ropcntl ); - OUT_RING( ctx->rb3d_planemask ); - - ADVANCE_RING(); -} - -static inline void radeon_emit_viewport( drm_radeon_private_t *dev_priv ) -{ - drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_radeon_context_regs_t *ctx = &sarea_priv->context_state; - RING_LOCALS; - DRM_DEBUG( " %s\n", __FUNCTION__ ); - - BEGIN_RING( 7 ); - - OUT_RING( CP_PACKET0( RADEON_SE_VPORT_XSCALE, 5 ) ); - OUT_RING( ctx->se_vport_xscale ); - OUT_RING( ctx->se_vport_xoffset ); - OUT_RING( ctx->se_vport_yscale ); - OUT_RING( ctx->se_vport_yoffset ); - OUT_RING( ctx->se_vport_zscale ); - OUT_RING( ctx->se_vport_zoffset ); - - ADVANCE_RING(); -} - -static inline void radeon_emit_setup( drm_radeon_private_t *dev_priv ) -{ - drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_radeon_context_regs_t *ctx = &sarea_priv->context_state; - RING_LOCALS; - DRM_DEBUG( " %s\n", __FUNCTION__ ); - - BEGIN_RING( 4 ); - - OUT_RING( CP_PACKET0( RADEON_SE_CNTL, 0 ) ); - OUT_RING( ctx->se_cntl ); - OUT_RING( CP_PACKET0( RADEON_SE_CNTL_STATUS, 0 ) ); - OUT_RING( ctx->se_cntl_status ); - - ADVANCE_RING(); -} - -static inline void radeon_emit_tcl( drm_radeon_private_t *dev_priv ) -{ -#ifdef TCL_ENABLE - drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_radeon_context_regs_t *ctx = &sarea_priv->context_state; - RING_LOCALS; - DRM_DEBUG( " %s\n", __FUNCTION__ ); - - BEGIN_RING( 29 ); - - OUT_RING( CP_PACKET0( RADEON_SE_TCL_MATERIAL_EMMISSIVE_RED, 27 ) ); - OUT_RING( ctx->se_tcl_material_emmissive.red ); - OUT_RING( ctx->se_tcl_material_emmissive.green ); - OUT_RING( ctx->se_tcl_material_emmissive.blue ); - OUT_RING( ctx->se_tcl_material_emmissive.alpha ); - OUT_RING( ctx->se_tcl_material_ambient.red ); - OUT_RING( ctx->se_tcl_material_ambient.green ); - OUT_RING( ctx->se_tcl_material_ambient.blue ); - OUT_RING( ctx->se_tcl_material_ambient.alpha ); - OUT_RING( ctx->se_tcl_material_diffuse.red ); - OUT_RING( ctx->se_tcl_material_diffuse.green ); - OUT_RING( ctx->se_tcl_material_diffuse.blue ); - OUT_RING( ctx->se_tcl_material_diffuse.alpha ); - OUT_RING( ctx->se_tcl_material_specular.red ); - OUT_RING( ctx->se_tcl_material_specular.green ); - OUT_RING( ctx->se_tcl_material_specular.blue ); - OUT_RING( ctx->se_tcl_material_specular.alpha ); - OUT_RING( ctx->se_tcl_shininess ); - OUT_RING( ctx->se_tcl_output_vtx_fmt ); - OUT_RING( ctx->se_tcl_output_vtx_sel ); - OUT_RING( ctx->se_tcl_matrix_select_0 ); - OUT_RING( ctx->se_tcl_matrix_select_1 ); - OUT_RING( ctx->se_tcl_ucp_vert_blend_ctl ); - OUT_RING( ctx->se_tcl_texture_proc_ctl ); - OUT_RING( ctx->se_tcl_light_model_ctl ); - for ( i = 0 ; i < 4 ; i++ ) { - OUT_RING( ctx->se_tcl_per_light_ctl[i] ); - } - ADVANCE_RING(); -#else - DRM_ERROR( "TCL not enabled!\n" ); -#endif } -static inline void radeon_emit_misc( drm_radeon_private_t *dev_priv ) -{ - drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_radeon_context_regs_t *ctx = &sarea_priv->context_state; - RING_LOCALS; - DRM_DEBUG( " %s\n", __FUNCTION__ ); - - BEGIN_RING( 2 ); - - OUT_RING( CP_PACKET0( RADEON_RE_MISC, 0 ) ); - OUT_RING( ctx->re_misc ); - - ADVANCE_RING(); -} - -static inline void radeon_emit_tex0( drm_radeon_private_t *dev_priv ) -{ - drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_radeon_texture_regs_t *tex = &sarea_priv->tex_state[0]; - RING_LOCALS; - DRM_DEBUG( " %s: offset=0x%x\n", __FUNCTION__, tex->pp_txoffset ); - - BEGIN_RING( 9 ); - - OUT_RING( CP_PACKET0( RADEON_PP_TXFILTER_0, 5 ) ); - OUT_RING( tex->pp_txfilter ); - OUT_RING( tex->pp_txformat ); - OUT_RING( tex->pp_txoffset ); - OUT_RING( tex->pp_txcblend ); - OUT_RING( tex->pp_txablend ); - OUT_RING( tex->pp_tfactor ); - - OUT_RING( CP_PACKET0( RADEON_PP_BORDER_COLOR_0, 0 ) ); - OUT_RING( tex->pp_border_color ); - - ADVANCE_RING(); -} - -static inline void radeon_emit_tex1( drm_radeon_private_t *dev_priv ) -{ - drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_radeon_texture_regs_t *tex = &sarea_priv->tex_state[1]; - RING_LOCALS; - DRM_DEBUG( " %s: offset=0x%x\n", __FUNCTION__, tex->pp_txoffset ); - - BEGIN_RING( 9 ); - - OUT_RING( CP_PACKET0( RADEON_PP_TXFILTER_1, 5 ) ); - OUT_RING( tex->pp_txfilter ); - OUT_RING( tex->pp_txformat ); - OUT_RING( tex->pp_txoffset ); - OUT_RING( tex->pp_txcblend ); - OUT_RING( tex->pp_txablend ); - OUT_RING( tex->pp_tfactor ); - - OUT_RING( CP_PACKET0( RADEON_PP_BORDER_COLOR_1, 0 ) ); - OUT_RING( tex->pp_border_color ); - - ADVANCE_RING(); -} - -static inline void radeon_emit_tex2( drm_radeon_private_t *dev_priv ) +/* Emit 1.1 state + */ +static void radeon_emit_state( drm_radeon_private_t *dev_priv, + drm_radeon_context_regs_t *ctx, + drm_radeon_texture_regs_t *tex, + unsigned int dirty ) { - drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_radeon_texture_regs_t *tex = &sarea_priv->tex_state[2]; RING_LOCALS; - DRM_DEBUG( " %s\n", __FUNCTION__ ); - - BEGIN_RING( 9 ); - - OUT_RING( CP_PACKET0( RADEON_PP_TXFILTER_2, 5 ) ); - OUT_RING( tex->pp_txfilter ); - OUT_RING( tex->pp_txformat ); - OUT_RING( tex->pp_txoffset ); - OUT_RING( tex->pp_txcblend ); - OUT_RING( tex->pp_txablend ); - OUT_RING( tex->pp_tfactor ); - - OUT_RING( CP_PACKET0( RADEON_PP_BORDER_COLOR_2, 0 ) ); - OUT_RING( tex->pp_border_color ); - - ADVANCE_RING(); -} - -static inline void radeon_emit_state( drm_radeon_private_t *dev_priv ) -{ - drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; - unsigned int dirty = sarea_priv->dirty; - - DRM_DEBUG( "%s: dirty=0x%08x\n", __FUNCTION__, dirty ); + DRM_DEBUG( "dirty=0x%08x\n", dirty ); if ( dirty & RADEON_UPLOAD_CONTEXT ) { - radeon_emit_context( dev_priv ); - sarea_priv->dirty &= ~RADEON_UPLOAD_CONTEXT; + BEGIN_RING( 14 ); + OUT_RING( CP_PACKET0( RADEON_PP_MISC, 6 ) ); + OUT_RING( ctx->pp_misc ); + OUT_RING( ctx->pp_fog_color ); + OUT_RING( ctx->re_solid_color ); + OUT_RING( ctx->rb3d_blendcntl ); + OUT_RING( ctx->rb3d_depthoffset ); + OUT_RING( ctx->rb3d_depthpitch ); + OUT_RING( ctx->rb3d_zstencilcntl ); + OUT_RING( CP_PACKET0( RADEON_PP_CNTL, 2 ) ); + OUT_RING( ctx->pp_cntl ); + OUT_RING( ctx->rb3d_cntl ); + OUT_RING( ctx->rb3d_coloroffset ); + OUT_RING( CP_PACKET0( RADEON_RB3D_COLORPITCH, 0 ) ); + OUT_RING( ctx->rb3d_colorpitch ); + ADVANCE_RING(); } if ( dirty & RADEON_UPLOAD_VERTFMT ) { - radeon_emit_vertfmt( dev_priv ); - sarea_priv->dirty &= ~RADEON_UPLOAD_VERTFMT; + BEGIN_RING( 2 ); + OUT_RING( CP_PACKET0( RADEON_SE_COORD_FMT, 0 ) ); + OUT_RING( ctx->se_coord_fmt ); + ADVANCE_RING(); } if ( dirty & RADEON_UPLOAD_LINE ) { - radeon_emit_line( dev_priv ); - sarea_priv->dirty &= ~RADEON_UPLOAD_LINE; + BEGIN_RING( 5 ); + OUT_RING( CP_PACKET0( RADEON_RE_LINE_PATTERN, 1 ) ); + OUT_RING( ctx->re_line_pattern ); + OUT_RING( ctx->re_line_state ); + OUT_RING( CP_PACKET0( RADEON_SE_LINE_WIDTH, 0 ) ); + OUT_RING( ctx->se_line_width ); + ADVANCE_RING(); } if ( dirty & RADEON_UPLOAD_BUMPMAP ) { - radeon_emit_bumpmap( dev_priv ); - sarea_priv->dirty &= ~RADEON_UPLOAD_BUMPMAP; + BEGIN_RING( 5 ); + OUT_RING( CP_PACKET0( RADEON_PP_LUM_MATRIX, 0 ) ); + OUT_RING( ctx->pp_lum_matrix ); + OUT_RING( CP_PACKET0( RADEON_PP_ROT_MATRIX_0, 1 ) ); + OUT_RING( ctx->pp_rot_matrix_0 ); + OUT_RING( ctx->pp_rot_matrix_1 ); + ADVANCE_RING(); } if ( dirty & RADEON_UPLOAD_MASKS ) { - radeon_emit_masks( dev_priv ); - sarea_priv->dirty &= ~RADEON_UPLOAD_MASKS; + BEGIN_RING( 4 ); + OUT_RING( CP_PACKET0( RADEON_RB3D_STENCILREFMASK, 2 ) ); + OUT_RING( ctx->rb3d_stencilrefmask ); + OUT_RING( ctx->rb3d_ropcntl ); + OUT_RING( ctx->rb3d_planemask ); + ADVANCE_RING(); } if ( dirty & RADEON_UPLOAD_VIEWPORT ) { - radeon_emit_viewport( dev_priv ); - sarea_priv->dirty &= ~RADEON_UPLOAD_VIEWPORT; + BEGIN_RING( 7 ); + OUT_RING( CP_PACKET0( RADEON_SE_VPORT_XSCALE, 5 ) ); + OUT_RING( ctx->se_vport_xscale ); + OUT_RING( ctx->se_vport_xoffset ); + OUT_RING( ctx->se_vport_yscale ); + OUT_RING( ctx->se_vport_yoffset ); + OUT_RING( ctx->se_vport_zscale ); + OUT_RING( ctx->se_vport_zoffset ); + ADVANCE_RING(); } if ( dirty & RADEON_UPLOAD_SETUP ) { - radeon_emit_setup( dev_priv ); - sarea_priv->dirty &= ~RADEON_UPLOAD_SETUP; - } - - if ( dirty & RADEON_UPLOAD_TCL ) { -#ifdef TCL_ENABLE - radeon_emit_tcl( dev_priv ); -#endif - sarea_priv->dirty &= ~RADEON_UPLOAD_TCL; + BEGIN_RING( 4 ); + OUT_RING( CP_PACKET0( RADEON_SE_CNTL, 0 ) ); + OUT_RING( ctx->se_cntl ); + OUT_RING( CP_PACKET0( RADEON_SE_CNTL_STATUS, 0 ) ); + OUT_RING( ctx->se_cntl_status ); + ADVANCE_RING(); } if ( dirty & RADEON_UPLOAD_MISC ) { - radeon_emit_misc( dev_priv ); - sarea_priv->dirty &= ~RADEON_UPLOAD_MISC; + BEGIN_RING( 2 ); + OUT_RING( CP_PACKET0( RADEON_RE_MISC, 0 ) ); + OUT_RING( ctx->re_misc ); + ADVANCE_RING(); } if ( dirty & RADEON_UPLOAD_TEX0 ) { - radeon_emit_tex0( dev_priv ); - sarea_priv->dirty &= ~RADEON_UPLOAD_TEX0; + BEGIN_RING( 9 ); + OUT_RING( CP_PACKET0( RADEON_PP_TXFILTER_0, 5 ) ); + OUT_RING( tex[0].pp_txfilter ); + OUT_RING( tex[0].pp_txformat ); + OUT_RING( tex[0].pp_txoffset ); + OUT_RING( tex[0].pp_txcblend ); + OUT_RING( tex[0].pp_txablend ); + OUT_RING( tex[0].pp_tfactor ); + OUT_RING( CP_PACKET0( RADEON_PP_BORDER_COLOR_0, 0 ) ); + OUT_RING( tex[0].pp_border_color ); + ADVANCE_RING(); } if ( dirty & RADEON_UPLOAD_TEX1 ) { - radeon_emit_tex1( dev_priv ); - sarea_priv->dirty &= ~RADEON_UPLOAD_TEX1; + BEGIN_RING( 9 ); + OUT_RING( CP_PACKET0( RADEON_PP_TXFILTER_1, 5 ) ); + OUT_RING( tex[1].pp_txfilter ); + OUT_RING( tex[1].pp_txformat ); + OUT_RING( tex[1].pp_txoffset ); + OUT_RING( tex[1].pp_txcblend ); + OUT_RING( tex[1].pp_txablend ); + OUT_RING( tex[1].pp_tfactor ); + OUT_RING( CP_PACKET0( RADEON_PP_BORDER_COLOR_1, 0 ) ); + OUT_RING( tex[1].pp_border_color ); + ADVANCE_RING(); } if ( dirty & RADEON_UPLOAD_TEX2 ) { -#if 0 - radeon_emit_tex2( dev_priv ); -#endif - sarea_priv->dirty &= ~RADEON_UPLOAD_TEX2; + BEGIN_RING( 9 ); + OUT_RING( CP_PACKET0( RADEON_PP_TXFILTER_2, 5 ) ); + OUT_RING( tex[2].pp_txfilter ); + OUT_RING( tex[2].pp_txformat ); + OUT_RING( tex[2].pp_txoffset ); + OUT_RING( tex[2].pp_txcblend ); + OUT_RING( tex[2].pp_txablend ); + OUT_RING( tex[2].pp_tfactor ); + OUT_RING( CP_PACKET0( RADEON_PP_BORDER_COLOR_2, 0 ) ); + OUT_RING( tex[2].pp_border_color ); + ADVANCE_RING(); } +} - sarea_priv->dirty &= ~(RADEON_UPLOAD_TEX0IMAGES | - RADEON_UPLOAD_TEX1IMAGES | - RADEON_UPLOAD_TEX2IMAGES | - RADEON_REQUIRE_QUIESCENCE); +/* Emit 1.2 state + */ +static void radeon_emit_state2( drm_radeon_private_t *dev_priv, + drm_radeon_state_t *state ) +{ + RING_LOCALS; + + if (state->dirty & RADEON_UPLOAD_ZBIAS) { + BEGIN_RING( 3 ); + OUT_RING( CP_PACKET0( RADEON_SE_ZBIAS_FACTOR, 1 ) ); + OUT_RING( state->context2.se_zbias_factor ); + OUT_RING( state->context2.se_zbias_constant ); + ADVANCE_RING(); + } + + radeon_emit_state( dev_priv, &state->context, + state->tex, state->dirty ); } +/* New (1.3) state mechanism. 3 commands (packet, scalar, vector) in + * 1.3 cmdbuffers allow all previous state to be updated as well as + * the tcl scalar and vector areas. + */ +static struct { + int start; + int len; + const char *name; +} packet[RADEON_MAX_STATE_PACKETS] = { + { RADEON_PP_MISC,7,"RADEON_PP_MISC" }, + { RADEON_PP_CNTL,3,"RADEON_PP_CNTL" }, + { RADEON_RB3D_COLORPITCH,1,"RADEON_RB3D_COLORPITCH" }, + { RADEON_RE_LINE_PATTERN,2,"RADEON_RE_LINE_PATTERN" }, + { RADEON_SE_LINE_WIDTH,1,"RADEON_SE_LINE_WIDTH" }, + { RADEON_PP_LUM_MATRIX,1,"RADEON_PP_LUM_MATRIX" }, + { RADEON_PP_ROT_MATRIX_0,2,"RADEON_PP_ROT_MATRIX_0" }, + { RADEON_RB3D_STENCILREFMASK,3,"RADEON_RB3D_STENCILREFMASK" }, + { RADEON_SE_VPORT_XSCALE,6,"RADEON_SE_VPORT_XSCALE" }, + { RADEON_SE_CNTL,2,"RADEON_SE_CNTL" }, + { RADEON_SE_CNTL_STATUS,1,"RADEON_SE_CNTL_STATUS" }, + { RADEON_RE_MISC,1,"RADEON_RE_MISC" }, + { RADEON_PP_TXFILTER_0,6,"RADEON_PP_TXFILTER_0" }, + { RADEON_PP_BORDER_COLOR_0,1,"RADEON_PP_BORDER_COLOR_0" }, + { RADEON_PP_TXFILTER_1,6,"RADEON_PP_TXFILTER_1" }, + { RADEON_PP_BORDER_COLOR_1,1,"RADEON_PP_BORDER_COLOR_1" }, + { RADEON_PP_TXFILTER_2,6,"RADEON_PP_TXFILTER_2" }, + { RADEON_PP_BORDER_COLOR_2,1,"RADEON_PP_BORDER_COLOR_2" }, + { RADEON_SE_ZBIAS_FACTOR,2,"RADEON_SE_ZBIAS_FACTOR" }, + { RADEON_SE_TCL_OUTPUT_VTX_FMT,11,"RADEON_SE_TCL_OUTPUT_VTX_FMT" }, + { RADEON_SE_TCL_MATERIAL_EMMISSIVE_RED,17,"RADEON_SE_TCL_MATERIAL_EMMISSIVE_RED" }, + { R200_PP_TXCBLEND_0, 4, "R200_PP_TXCBLEND_0" }, + { R200_PP_TXCBLEND_1, 4, "R200_PP_TXCBLEND_1" }, + { R200_PP_TXCBLEND_2, 4, "R200_PP_TXCBLEND_2" }, + { R200_PP_TXCBLEND_3, 4, "R200_PP_TXCBLEND_3" }, + { R200_PP_TXCBLEND_4, 4, "R200_PP_TXCBLEND_4" }, + { R200_PP_TXCBLEND_5, 4, "R200_PP_TXCBLEND_5" }, + { R200_PP_TXCBLEND_6, 4, "R200_PP_TXCBLEND_6" }, + { R200_PP_TXCBLEND_7, 4, "R200_PP_TXCBLEND_7" }, + { R200_SE_TCL_LIGHT_MODEL_CTL_0, 6, "R200_SE_TCL_LIGHT_MODEL_CTL_0" }, + { R200_PP_TFACTOR_0, 6, "R200_PP_TFACTOR_0" }, + { R200_SE_VTX_FMT_0, 4, "R200_SE_VTX_FMT_0" }, + { R200_SE_VAP_CNTL, 1, "R200_SE_VAP_CNTL" }, + { R200_SE_TCL_MATRIX_SEL_0, 5, "R200_SE_TCL_MATRIX_SEL_0" }, + { R200_SE_TCL_TEX_PROC_CTL_2, 5, "R200_SE_TCL_TEX_PROC_CTL_2" }, + { R200_SE_TCL_UCP_VERT_BLEND_CTL, 1, "R200_SE_TCL_UCP_VERT_BLEND_CTL" }, + { R200_PP_TXFILTER_0, 6, "R200_PP_TXFILTER_0" }, + { R200_PP_TXFILTER_1, 6, "R200_PP_TXFILTER_1" }, + { R200_PP_TXFILTER_2, 6, "R200_PP_TXFILTER_2" }, + { R200_PP_TXFILTER_3, 6, "R200_PP_TXFILTER_3" }, + { R200_PP_TXFILTER_4, 6, "R200_PP_TXFILTER_4" }, + { R200_PP_TXFILTER_5, 6, "R200_PP_TXFILTER_5" }, + { R200_PP_TXOFFSET_0, 1, "R200_PP_TXOFFSET_0" }, + { R200_PP_TXOFFSET_1, 1, "R200_PP_TXOFFSET_1" }, + { R200_PP_TXOFFSET_2, 1, "R200_PP_TXOFFSET_2" }, + { R200_PP_TXOFFSET_3, 1, "R200_PP_TXOFFSET_3" }, + { R200_PP_TXOFFSET_4, 1, "R200_PP_TXOFFSET_4" }, + { R200_PP_TXOFFSET_5, 1, "R200_PP_TXOFFSET_5" }, + { R200_SE_VTE_CNTL, 1, "R200_SE_VTE_CNTL" }, + { R200_SE_TCL_OUTPUT_VTX_COMP_SEL, 1, "R200_SE_TCL_OUTPUT_VTX_COMP_SEL" }, + { R200_PP_TAM_DEBUG3, 1, "R200_PP_TAM_DEBUG3" }, + { R200_PP_CNTL_X, 1, "R200_PP_CNTL_X" }, + { R200_RB3D_DEPTHXY_OFFSET, 1, "R200_RB3D_DEPTHXY_OFFSET" }, + { R200_RE_AUX_SCISSOR_CNTL, 1, "R200_RE_AUX_SCISSOR_CNTL" }, + { R200_RE_SCISSOR_TL_0, 2, "R200_RE_SCISSOR_TL_0" }, + { R200_RE_SCISSOR_TL_1, 2, "R200_RE_SCISSOR_TL_1" }, + { R200_RE_SCISSOR_TL_2, 2, "R200_RE_SCISSOR_TL_2" }, + { R200_SE_VAP_CNTL_STATUS, 1, "R200_SE_VAP_CNTL_STATUS" }, + { R200_SE_VTX_STATE_CNTL, 1, "R200_SE_VTX_STATE_CNTL" }, + { R200_RE_POINTSIZE, 1, "R200_RE_POINTSIZE" }, + { R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_0, 4, "R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_0" }, + { R200_PP_CUBIC_FACES_0, 1, "R200_PP_CUBIC_FACES_0" }, /* 61 */ + { R200_PP_CUBIC_OFFSET_F1_0, 5, "R200_PP_CUBIC_OFFSET_F1_0" }, /* 62 */ + { R200_PP_CUBIC_FACES_1, 1, "R200_PP_CUBIC_FACES_1" }, + { R200_PP_CUBIC_OFFSET_F1_1, 5, "R200_PP_CUBIC_OFFSET_F1_1" }, + { R200_PP_CUBIC_FACES_2, 1, "R200_PP_CUBIC_FACES_2" }, + { R200_PP_CUBIC_OFFSET_F1_2, 5, "R200_PP_CUBIC_OFFSET_F1_2" }, + { R200_PP_CUBIC_FACES_3, 1, "R200_PP_CUBIC_FACES_3" }, + { R200_PP_CUBIC_OFFSET_F1_3, 5, "R200_PP_CUBIC_OFFSET_F1_3" }, + { R200_PP_CUBIC_FACES_4, 1, "R200_PP_CUBIC_FACES_4" }, + { R200_PP_CUBIC_OFFSET_F1_4, 5, "R200_PP_CUBIC_OFFSET_F1_4" }, + { R200_PP_CUBIC_FACES_5, 1, "R200_PP_CUBIC_FACES_5" }, + { R200_PP_CUBIC_OFFSET_F1_5, 5, "R200_PP_CUBIC_OFFSET_F1_5" }, +}; + + -#if RADEON_PERFORMANCE_BOXES /* ================================================================ * Performance monitoring functions */ @@ -409,10 +304,12 @@ int x, int y, int w, int h, int r, int g, int b ) { - u32 pitch, offset; u32 color; RING_LOCALS; + x += dev_priv->sarea_priv->boxes[0].x1; + y += dev_priv->sarea_priv->boxes[0].y1; + switch ( dev_priv->color_fmt ) { case RADEON_COLOR_FORMAT_RGB565: color = (((r & 0xf8) << 8) | @@ -425,8 +322,11 @@ break; } - offset = dev_priv->back_offset; - pitch = dev_priv->back_pitch >> 3; + BEGIN_RING( 4 ); + RADEON_WAIT_UNTIL_3D_IDLE(); + OUT_RING( CP_PACKET0( RADEON_DP_WRITE_MASK, 0 ) ); + OUT_RING( 0xffffffff ); + ADVANCE_RING(); BEGIN_RING( 6 ); @@ -438,7 +338,12 @@ RADEON_ROP3_P | RADEON_GMC_CLR_CMP_CNTL_DIS ); - OUT_RING( (pitch << 22) | (offset >> 5) ); + if ( dev_priv->page_flipping && dev_priv->current_page == 1 ) { + OUT_RING( dev_priv->front_pitch_offset ); + } else { + OUT_RING( dev_priv->back_pitch_offset ); + } + OUT_RING( color ); OUT_RING( (x << 16) | y ); @@ -449,53 +354,77 @@ static void radeon_cp_performance_boxes( drm_radeon_private_t *dev_priv ) { - if ( atomic_read( &dev_priv->idle_count ) == 0 ) { - radeon_clear_box( dev_priv, 64, 4, 8, 8, 0, 255, 0 ); - } else { - atomic_set( &dev_priv->idle_count, 0 ); + /* Collapse various things into a wait flag -- trying to + * guess if userspase slept -- better just to have them tell us. + */ + if (dev_priv->stats.last_frame_reads > 1 || + dev_priv->stats.last_clear_reads > dev_priv->stats.clears) { + dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE; } -} -#endif + if (dev_priv->stats.freelist_loops) { + dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE; + } + + /* Purple box for page flipping + */ + if ( dev_priv->stats.boxes & RADEON_BOX_FLIP ) + radeon_clear_box( dev_priv, 4, 4, 8, 8, 255, 0, 255 ); + /* Red box if we have to wait for idle at any point + */ + if ( dev_priv->stats.boxes & RADEON_BOX_WAIT_IDLE ) + radeon_clear_box( dev_priv, 16, 4, 8, 8, 255, 0, 0 ); + /* Blue box: lost context? + */ + + /* Yellow box for texture swaps + */ + if ( dev_priv->stats.boxes & RADEON_BOX_TEXTURE_LOAD ) + radeon_clear_box( dev_priv, 40, 4, 8, 8, 255, 255, 0 ); + + /* Green box if hardware never idles (as far as we can tell) + */ + if ( !(dev_priv->stats.boxes & RADEON_BOX_DMA_IDLE) ) + radeon_clear_box( dev_priv, 64, 4, 8, 8, 0, 255, 0 ); + + + /* Draw bars indicating number of buffers allocated + * (not a great measure, easily confused) + */ + if (dev_priv->stats.requested_bufs) { + if (dev_priv->stats.requested_bufs > 100) + dev_priv->stats.requested_bufs = 100; + + radeon_clear_box( dev_priv, 4, 16, + dev_priv->stats.requested_bufs, 4, + 196, 128, 128 ); + } + + memset( &dev_priv->stats, 0, sizeof(dev_priv->stats) ); + +} /* ================================================================ * CP command dispatch functions */ -static void radeon_print_dirty( const char *msg, unsigned int flags ) -{ - DRM_DEBUG( "%s: (0x%x) %s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", - msg, - flags, - (flags & RADEON_UPLOAD_CONTEXT) ? "context, " : "", - (flags & RADEON_UPLOAD_VERTFMT) ? "vertfmt, " : "", - (flags & RADEON_UPLOAD_LINE) ? "line, " : "", - (flags & RADEON_UPLOAD_BUMPMAP) ? "bumpmap, " : "", - (flags & RADEON_UPLOAD_MASKS) ? "masks, " : "", - (flags & RADEON_UPLOAD_VIEWPORT) ? "viewport, " : "", - (flags & RADEON_UPLOAD_SETUP) ? "setup, " : "", - (flags & RADEON_UPLOAD_TCL) ? "tcl, " : "", - (flags & RADEON_UPLOAD_MISC) ? "misc, " : "", - (flags & RADEON_UPLOAD_TEX0) ? "tex0, " : "", - (flags & RADEON_UPLOAD_TEX1) ? "tex1, " : "", - (flags & RADEON_UPLOAD_TEX2) ? "tex2, " : "", - (flags & RADEON_UPLOAD_CLIPRECTS) ? "cliprects, " : "", - (flags & RADEON_REQUIRE_QUIESCENCE) ? "quiescence, " : "" ); -} - static void radeon_cp_dispatch_clear( drm_device_t *dev, drm_radeon_clear_t *clear, drm_radeon_clear_rect_t *depth_boxes ) { drm_radeon_private_t *dev_priv = dev->dev_private; drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; + drm_radeon_depth_clear_t *depth_clear = &dev_priv->depth_clear; int nbox = sarea_priv->nbox; drm_clip_rect_t *pbox = sarea_priv->boxes; unsigned int flags = clear->flags; + u32 rb3d_cntl = 0, rb3d_stencilrefmask= 0; int i; RING_LOCALS; - DRM_DEBUG( "%s\n", __FUNCTION__ ); + DRM_DEBUG( "flags = 0x%x\n", flags ); + + dev_priv->stats.clears++; if ( dev_priv->page_flipping && dev_priv->current_page == 1 ) { unsigned int tmp = flags; @@ -505,127 +434,277 @@ if ( tmp & RADEON_BACK ) flags |= RADEON_FRONT; } - for ( i = 0 ; i < nbox ; i++ ) { - int x = pbox[i].x1; - int y = pbox[i].y1; - int w = pbox[i].x2 - x; - int h = pbox[i].y2 - y; + if ( flags & (RADEON_FRONT | RADEON_BACK) ) { - DRM_DEBUG( "dispatch clear %d,%d-%d,%d flags 0x%x\n", - x, y, w, h, flags ); + BEGIN_RING( 4 ); - if ( flags & (RADEON_FRONT | RADEON_BACK) ) { - BEGIN_RING( 4 ); + /* Ensure the 3D stream is idle before doing a + * 2D fill to clear the front or back buffer. + */ + RADEON_WAIT_UNTIL_3D_IDLE(); + + OUT_RING( CP_PACKET0( RADEON_DP_WRITE_MASK, 0 ) ); + OUT_RING( clear->color_mask ); - /* Ensure the 3D stream is idle before doing a - * 2D fill to clear the front or back buffer. - */ - RADEON_WAIT_UNTIL_3D_IDLE(); + ADVANCE_RING(); - OUT_RING( CP_PACKET0( RADEON_DP_WRITE_MASK, 0 ) ); - OUT_RING( clear->color_mask ); + /* Make sure we restore the 3D state next time. + */ + dev_priv->sarea_priv->ctx_owner = 0; - ADVANCE_RING(); + for ( i = 0 ; i < nbox ; i++ ) { + int x = pbox[i].x1; + int y = pbox[i].y1; + int w = pbox[i].x2 - x; + int h = pbox[i].y2 - y; + + DRM_DEBUG( "dispatch clear %d,%d-%d,%d flags 0x%x\n", + x, y, w, h, flags ); + + if ( flags & RADEON_FRONT ) { + BEGIN_RING( 6 ); + + OUT_RING( CP_PACKET3( RADEON_CNTL_PAINT_MULTI, 4 ) ); + OUT_RING( RADEON_GMC_DST_PITCH_OFFSET_CNTL | + RADEON_GMC_BRUSH_SOLID_COLOR | + (dev_priv->color_fmt << 8) | + RADEON_GMC_SRC_DATATYPE_COLOR | + RADEON_ROP3_P | + RADEON_GMC_CLR_CMP_CNTL_DIS ); + + OUT_RING( dev_priv->front_pitch_offset ); + OUT_RING( clear->clear_color ); + + OUT_RING( (x << 16) | y ); + OUT_RING( (w << 16) | h ); + + ADVANCE_RING(); + } + + if ( flags & RADEON_BACK ) { + BEGIN_RING( 6 ); + + OUT_RING( CP_PACKET3( RADEON_CNTL_PAINT_MULTI, 4 ) ); + OUT_RING( RADEON_GMC_DST_PITCH_OFFSET_CNTL | + RADEON_GMC_BRUSH_SOLID_COLOR | + (dev_priv->color_fmt << 8) | + RADEON_GMC_SRC_DATATYPE_COLOR | + RADEON_ROP3_P | + RADEON_GMC_CLR_CMP_CNTL_DIS ); + + OUT_RING( dev_priv->back_pitch_offset ); + OUT_RING( clear->clear_color ); - /* Make sure we restore the 3D state next time. - */ - dev_priv->sarea_priv->dirty |= (RADEON_UPLOAD_CONTEXT | - RADEON_UPLOAD_MASKS); + OUT_RING( (x << 16) | y ); + OUT_RING( (w << 16) | h ); + + ADVANCE_RING(); + } } + } - if ( flags & RADEON_FRONT ) { - BEGIN_RING( 6 ); + /* We have to clear the depth and/or stencil buffers by + * rendering a quad into just those buffers. Thus, we have to + * make sure the 3D engine is configured correctly. + */ + if ( dev_priv->is_r200 && + (flags & (RADEON_DEPTH | RADEON_STENCIL)) ) { - OUT_RING( CP_PACKET3( RADEON_CNTL_PAINT_MULTI, 4 ) ); - OUT_RING( RADEON_GMC_DST_PITCH_OFFSET_CNTL | - RADEON_GMC_BRUSH_SOLID_COLOR | - (dev_priv->color_fmt << 8) | - RADEON_GMC_SRC_DATATYPE_COLOR | - RADEON_ROP3_P | - RADEON_GMC_CLR_CMP_CNTL_DIS ); + int tempPP_CNTL; + int tempRE_CNTL; + int tempRB3D_CNTL; + int tempRB3D_ZSTENCILCNTL; + int tempRB3D_STENCILREFMASK; + int tempRB3D_PLANEMASK; + int tempSE_CNTL; + int tempSE_VTE_CNTL; + int tempSE_VTX_FMT_0; + int tempSE_VTX_FMT_1; + int tempSE_VAP_CNTL; + int tempRE_AUX_SCISSOR_CNTL; - OUT_RING( dev_priv->front_pitch_offset ); - OUT_RING( clear->clear_color ); + tempPP_CNTL = 0; + tempRE_CNTL = 0; - OUT_RING( (x << 16) | y ); - OUT_RING( (w << 16) | h ); + tempRB3D_CNTL = depth_clear->rb3d_cntl; + tempRB3D_CNTL &= ~(1<<15); /* unset radeon magic flag */ - ADVANCE_RING(); + tempRB3D_ZSTENCILCNTL = depth_clear->rb3d_zstencilcntl; + tempRB3D_STENCILREFMASK = 0x0; + + tempSE_CNTL = depth_clear->se_cntl; + + + + /* Disable TCL */ + + tempSE_VAP_CNTL = (/* SE_VAP_CNTL__FORCE_W_TO_ONE_MASK | */ + (0x9 << SE_VAP_CNTL__VF_MAX_VTX_NUM__SHIFT)); + + tempRB3D_PLANEMASK = 0x0; + + tempRE_AUX_SCISSOR_CNTL = 0x0; + + tempSE_VTE_CNTL = + SE_VTE_CNTL__VTX_XY_FMT_MASK | + SE_VTE_CNTL__VTX_Z_FMT_MASK; + + /* Vertex format (X, Y, Z, W)*/ + tempSE_VTX_FMT_0 = + SE_VTX_FMT_0__VTX_Z0_PRESENT_MASK | + SE_VTX_FMT_0__VTX_W0_PRESENT_MASK; + tempSE_VTX_FMT_1 = 0x0; + + + /* + * Depth buffer specific enables + */ + if (flags & RADEON_DEPTH) { + /* Enable depth buffer */ + tempRB3D_CNTL |= RADEON_Z_ENABLE; + } else { + /* Disable depth buffer */ + tempRB3D_CNTL &= ~RADEON_Z_ENABLE; } - if ( flags & RADEON_BACK ) { - BEGIN_RING( 6 ); + /* + * Stencil buffer specific enables + */ + if ( flags & RADEON_STENCIL ) { + tempRB3D_CNTL |= RADEON_STENCIL_ENABLE; + tempRB3D_STENCILREFMASK = clear->depth_mask; + } else { + tempRB3D_CNTL &= ~RADEON_STENCIL_ENABLE; + tempRB3D_STENCILREFMASK = 0x00000000; + } - OUT_RING( CP_PACKET3( RADEON_CNTL_PAINT_MULTI, 4 ) ); - OUT_RING( RADEON_GMC_DST_PITCH_OFFSET_CNTL | - RADEON_GMC_BRUSH_SOLID_COLOR | - (dev_priv->color_fmt << 8) | - RADEON_GMC_SRC_DATATYPE_COLOR | - RADEON_ROP3_P | - RADEON_GMC_CLR_CMP_CNTL_DIS ); + BEGIN_RING( 26 ); + RADEON_WAIT_UNTIL_2D_IDLE(); - OUT_RING( dev_priv->back_pitch_offset ); - OUT_RING( clear->clear_color ); + OUT_RING_REG( RADEON_PP_CNTL, tempPP_CNTL ); + OUT_RING_REG( R200_RE_CNTL, tempRE_CNTL ); + OUT_RING_REG( RADEON_RB3D_CNTL, tempRB3D_CNTL ); + OUT_RING_REG( RADEON_RB3D_ZSTENCILCNTL, + tempRB3D_ZSTENCILCNTL ); + OUT_RING_REG( RADEON_RB3D_STENCILREFMASK, + tempRB3D_STENCILREFMASK ); + OUT_RING_REG( RADEON_RB3D_PLANEMASK, tempRB3D_PLANEMASK ); + OUT_RING_REG( RADEON_SE_CNTL, tempSE_CNTL ); + OUT_RING_REG( R200_SE_VTE_CNTL, tempSE_VTE_CNTL ); + OUT_RING_REG( R200_SE_VTX_FMT_0, tempSE_VTX_FMT_0 ); + OUT_RING_REG( R200_SE_VTX_FMT_1, tempSE_VTX_FMT_1 ); + OUT_RING_REG( R200_SE_VAP_CNTL, tempSE_VAP_CNTL ); + OUT_RING_REG( R200_RE_AUX_SCISSOR_CNTL, + tempRE_AUX_SCISSOR_CNTL ); + ADVANCE_RING(); - OUT_RING( (x << 16) | y ); - OUT_RING( (w << 16) | h ); + /* Make sure we restore the 3D state next time. + */ + dev_priv->sarea_priv->ctx_owner = 0; - ADVANCE_RING(); + for ( i = 0 ; i < nbox ; i++ ) { + + /* Funny that this should be required -- + * sets top-left? + */ + radeon_emit_clip_rect( dev_priv, + &sarea_priv->boxes[i] ); + BEGIN_RING( 14 ); + OUT_RING( CP_PACKET3( R200_3D_DRAW_IMMD_2, 12 ) ); + OUT_RING( (RADEON_PRIM_TYPE_RECT_LIST | + RADEON_PRIM_WALK_RING | + (3 << RADEON_NUM_VERTICES_SHIFT)) ); + OUT_RING( depth_boxes[i].ui[CLEAR_X1] ); + OUT_RING( depth_boxes[i].ui[CLEAR_Y1] ); + OUT_RING( depth_boxes[i].ui[CLEAR_DEPTH] ); + OUT_RING( 0x3f800000 ); + OUT_RING( depth_boxes[i].ui[CLEAR_X1] ); + OUT_RING( depth_boxes[i].ui[CLEAR_Y2] ); + OUT_RING( depth_boxes[i].ui[CLEAR_DEPTH] ); + OUT_RING( 0x3f800000 ); + OUT_RING( depth_boxes[i].ui[CLEAR_X2] ); + OUT_RING( depth_boxes[i].ui[CLEAR_Y2] ); + OUT_RING( depth_boxes[i].ui[CLEAR_DEPTH] ); + OUT_RING( 0x3f800000 ); + ADVANCE_RING(); } + } + else if ( (flags & (RADEON_DEPTH | RADEON_STENCIL)) ) { + + rb3d_cntl = depth_clear->rb3d_cntl; if ( flags & RADEON_DEPTH ) { - drm_radeon_depth_clear_t *depth_clear = - &dev_priv->depth_clear; + rb3d_cntl |= RADEON_Z_ENABLE; + } else { + rb3d_cntl &= ~RADEON_Z_ENABLE; + } - if ( sarea_priv->dirty & ~RADEON_UPLOAD_CLIPRECTS ) { - radeon_emit_state( dev_priv ); - } + if ( flags & RADEON_STENCIL ) { + rb3d_cntl |= RADEON_STENCIL_ENABLE; + rb3d_stencilrefmask = clear->depth_mask; /* misnamed field */ + } else { + rb3d_cntl &= ~RADEON_STENCIL_ENABLE; + rb3d_stencilrefmask = 0x00000000; + } - /* FIXME: Render a rectangle to clear the depth - * buffer. So much for those "fast Z clears"... - */ - BEGIN_RING( 23 ); + BEGIN_RING( 13 ); + RADEON_WAIT_UNTIL_2D_IDLE(); + + OUT_RING( CP_PACKET0( RADEON_PP_CNTL, 1 ) ); + OUT_RING( 0x00000000 ); + OUT_RING( rb3d_cntl ); + + OUT_RING_REG( RADEON_RB3D_ZSTENCILCNTL, + depth_clear->rb3d_zstencilcntl ); + OUT_RING_REG( RADEON_RB3D_STENCILREFMASK, + rb3d_stencilrefmask ); + OUT_RING_REG( RADEON_RB3D_PLANEMASK, + 0x00000000 ); + OUT_RING_REG( RADEON_SE_CNTL, + depth_clear->se_cntl ); + ADVANCE_RING(); + + /* Make sure we restore the 3D state next time. + */ + dev_priv->sarea_priv->ctx_owner = 0; - RADEON_WAIT_UNTIL_2D_IDLE(); + for ( i = 0 ; i < nbox ; i++ ) { + + /* Funny that this should be required -- + * sets top-left? + */ + radeon_emit_clip_rect( dev_priv, + &sarea_priv->boxes[i] ); - OUT_RING( CP_PACKET0( RADEON_PP_CNTL, 1 ) ); - OUT_RING( 0x00000000 ); - OUT_RING( depth_clear->rb3d_cntl ); - OUT_RING( CP_PACKET0( RADEON_RB3D_ZSTENCILCNTL, 0 ) ); - OUT_RING( depth_clear->rb3d_zstencilcntl ); - OUT_RING( CP_PACKET0( RADEON_RB3D_PLANEMASK, 0 ) ); - OUT_RING( 0x00000000 ); - OUT_RING( CP_PACKET0( RADEON_SE_CNTL, 0 ) ); - OUT_RING( depth_clear->se_cntl ); + BEGIN_RING( 15 ); - OUT_RING( CP_PACKET3( RADEON_3D_DRAW_IMMD, 10 ) ); - OUT_RING( RADEON_VTX_Z_PRESENT ); + OUT_RING( CP_PACKET3( RADEON_3D_DRAW_IMMD, 13 ) ); + OUT_RING( RADEON_VTX_Z_PRESENT | + RADEON_VTX_PKCOLOR_PRESENT); OUT_RING( (RADEON_PRIM_TYPE_RECT_LIST | RADEON_PRIM_WALK_RING | RADEON_MAOS_ENABLE | RADEON_VTX_FMT_RADEON_MODE | (3 << RADEON_NUM_VERTICES_SHIFT)) ); + OUT_RING( depth_boxes[i].ui[CLEAR_X1] ); OUT_RING( depth_boxes[i].ui[CLEAR_Y1] ); OUT_RING( depth_boxes[i].ui[CLEAR_DEPTH] ); + OUT_RING( 0x0 ); OUT_RING( depth_boxes[i].ui[CLEAR_X1] ); OUT_RING( depth_boxes[i].ui[CLEAR_Y2] ); OUT_RING( depth_boxes[i].ui[CLEAR_DEPTH] ); + OUT_RING( 0x0 ); OUT_RING( depth_boxes[i].ui[CLEAR_X2] ); OUT_RING( depth_boxes[i].ui[CLEAR_Y2] ); OUT_RING( depth_boxes[i].ui[CLEAR_DEPTH] ); + OUT_RING( 0x0 ); ADVANCE_RING(); - - /* Make sure we restore the 3D state next time. - */ - dev_priv->sarea_priv->dirty |= (RADEON_UPLOAD_CONTEXT | - RADEON_UPLOAD_SETUP | - RADEON_UPLOAD_MASKS); } } @@ -651,13 +730,13 @@ drm_clip_rect_t *pbox = sarea_priv->boxes; int i; RING_LOCALS; - DRM_DEBUG( "%s\n", __FUNCTION__ ); + DRM_DEBUG( "\n" ); -#if RADEON_PERFORMANCE_BOXES /* Do some trivial performance monitoring... */ - radeon_cp_performance_boxes( dev_priv ); -#endif + if (dev_priv->do_boxes) + radeon_cp_performance_boxes( dev_priv ); + /* Wait for the 3D stream to idle before dispatching the bitblt. * This will prevent data corruption between the two streams. @@ -689,9 +768,17 @@ RADEON_DP_SRC_SOURCE_MEMORY | RADEON_GMC_CLR_CMP_CNTL_DIS | RADEON_GMC_WR_MSK_DIS ); - - OUT_RING( dev_priv->back_pitch_offset ); - OUT_RING( dev_priv->front_pitch_offset ); + + /* Make this work even if front & back are flipped: + */ + if (dev_priv->current_page == 0) { + OUT_RING( dev_priv->back_pitch_offset ); + OUT_RING( dev_priv->front_pitch_offset ); + } + else { + OUT_RING( dev_priv->front_pitch_offset ); + OUT_RING( dev_priv->back_pitch_offset ); + } OUT_RING( (x << 16) | y ); OUT_RING( (x << 16) | y ); @@ -717,29 +804,33 @@ static void radeon_cp_dispatch_flip( drm_device_t *dev ) { drm_radeon_private_t *dev_priv = dev->dev_private; - RING_LOCALS; - DRM_DEBUG( "%s: page=%d\n", __FUNCTION__, dev_priv->current_page ); + drm_sarea_t *sarea = (drm_sarea_t *)dev_priv->sarea->handle; + int offset = (dev_priv->current_page == 1) + ? dev_priv->front_offset : dev_priv->back_offset; + RING_LOCALS; + DRM_DEBUG( "%s: page=%d pfCurrentPage=%d\n", + __FUNCTION__, + dev_priv->current_page, + dev_priv->sarea_priv->pfCurrentPage); -#if RADEON_PERFORMANCE_BOXES /* Do some trivial performance monitoring... */ - radeon_cp_performance_boxes( dev_priv ); -#endif + if (dev_priv->do_boxes) { + dev_priv->stats.boxes |= RADEON_BOX_FLIP; + radeon_cp_performance_boxes( dev_priv ); + } + /* Update the frame offsets for both CRTCs + */ BEGIN_RING( 6 ); RADEON_WAIT_UNTIL_3D_IDLE(); - RADEON_WAIT_UNTIL_PAGE_FLIPPED(); - - OUT_RING( CP_PACKET0( RADEON_CRTC_OFFSET, 0 ) ); - - if ( dev_priv->current_page == 0 ) { - OUT_RING( dev_priv->back_offset ); - dev_priv->current_page = 1; - } else { - OUT_RING( dev_priv->front_offset ); - dev_priv->current_page = 0; - } + OUT_RING_REG( RADEON_CRTC_OFFSET, ( ( sarea->frame.y * dev_priv->front_pitch + + sarea->frame.x + * ( dev_priv->color_fmt - 2 ) ) & ~7 ) + + offset ); + OUT_RING_REG( RADEON_CRTC2_OFFSET, dev_priv->sarea_priv->crtc2_base + + offset ); ADVANCE_RING(); @@ -748,6 +839,8 @@ * performing the swapbuffer ioctl. */ dev_priv->sarea_priv->last_frame++; + dev_priv->sarea_priv->pfCurrentPage = dev_priv->current_page = + 1 - dev_priv->current_page; BEGIN_RING( 2 ); @@ -756,82 +849,118 @@ ADVANCE_RING(); } +static int bad_prim_vertex_nr( int primitive, int nr ) +{ + switch (primitive & RADEON_PRIM_TYPE_MASK) { + case RADEON_PRIM_TYPE_NONE: + case RADEON_PRIM_TYPE_POINT: + return nr < 1; + case RADEON_PRIM_TYPE_LINE: + return (nr & 1) || nr == 0; + case RADEON_PRIM_TYPE_LINE_STRIP: + return nr < 2; + case RADEON_PRIM_TYPE_TRI_LIST: + case RADEON_PRIM_TYPE_3VRT_POINT_LIST: + case RADEON_PRIM_TYPE_3VRT_LINE_LIST: + case RADEON_PRIM_TYPE_RECT_LIST: + return nr % 3 || nr == 0; + case RADEON_PRIM_TYPE_TRI_FAN: + case RADEON_PRIM_TYPE_TRI_STRIP: + return nr < 3; + default: + return 1; + } +} + + + +typedef struct { + unsigned int start; + unsigned int finish; + unsigned int prim; + unsigned int numverts; + unsigned int offset; + unsigned int vc_format; +} drm_radeon_tcl_prim_t; + static void radeon_cp_dispatch_vertex( drm_device_t *dev, - drm_buf_t *buf ) + drm_buf_t *buf, + drm_radeon_tcl_prim_t *prim, + drm_clip_rect_t *boxes, + int nbox ) + { drm_radeon_private_t *dev_priv = dev->dev_private; - drm_radeon_buf_priv_t *buf_priv = buf->dev_private; - drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; - int format = sarea_priv->vc_format; - int offset = dev_priv->agp_buffers_offset + buf->offset; - int size = buf->used; - int prim = buf_priv->prim; + drm_clip_rect_t box; + int offset = dev_priv->agp_buffers_offset + buf->offset + prim->start; + int numverts = (int)prim->numverts; int i = 0; RING_LOCALS; - DRM_DEBUG( "%s: nbox=%d\n", __FUNCTION__, sarea_priv->nbox ); - if ( 0 ) - radeon_print_dirty( "dispatch_vertex", sarea_priv->dirty ); + DRM_DEBUG("hwprim 0x%x vfmt 0x%x %d..%d %d verts\n", + prim->prim, + prim->vc_format, + prim->start, + prim->finish, + prim->numverts); + + if (bad_prim_vertex_nr( prim->prim, prim->numverts )) { + DRM_ERROR( "bad prim %x numverts %d\n", + prim->prim, prim->numverts ); + return; + } + + do { + /* Emit the next cliprect */ + if ( i < nbox ) { + if (__copy_from_user( &box, &boxes[i], sizeof(box) )) + return; - if ( buf->used ) { - buf_priv->dispatched = 1; - - if ( sarea_priv->dirty & ~RADEON_UPLOAD_CLIPRECTS ) { - radeon_emit_state( dev_priv ); + radeon_emit_clip_rect( dev_priv, &box ); } - do { - /* Emit the next set of up to three cliprects */ - if ( i < sarea_priv->nbox ) { - radeon_emit_clip_rect( dev_priv, - &sarea_priv->boxes[i] ); - } + /* Emit the vertex buffer rendering commands */ + BEGIN_RING( 5 ); - /* Emit the vertex buffer rendering commands */ - BEGIN_RING( 5 ); + OUT_RING( CP_PACKET3( RADEON_3D_RNDR_GEN_INDX_PRIM, 3 ) ); + OUT_RING( offset ); + OUT_RING( numverts ); + OUT_RING( prim->vc_format ); + OUT_RING( prim->prim | RADEON_PRIM_WALK_LIST | + RADEON_COLOR_ORDER_RGBA | + RADEON_VTX_FMT_RADEON_MODE | + (numverts << RADEON_NUM_VERTICES_SHIFT) ); - OUT_RING( CP_PACKET3( RADEON_3D_RNDR_GEN_INDX_PRIM, 3 ) ); - OUT_RING( offset ); - OUT_RING( size ); - OUT_RING( format ); - OUT_RING( prim | RADEON_PRIM_WALK_LIST | - RADEON_COLOR_ORDER_RGBA | - RADEON_VTX_FMT_RADEON_MODE | - (size << RADEON_NUM_VERTICES_SHIFT) ); + ADVANCE_RING(); - ADVANCE_RING(); + i++; + } while ( i < nbox ); +} - i++; - } while ( i < sarea_priv->nbox ); - } - if ( buf_priv->discard ) { - buf_priv->age = dev_priv->sarea_priv->last_dispatch; - /* Emit the vertex buffer age */ - BEGIN_RING( 2 ); - RADEON_DISPATCH_AGE( buf_priv->age ); - ADVANCE_RING(); +static void radeon_cp_discard_buffer( drm_device_t *dev, drm_buf_t *buf ) +{ + drm_radeon_private_t *dev_priv = dev->dev_private; + drm_radeon_buf_priv_t *buf_priv = buf->dev_private; + RING_LOCALS; - buf->pending = 1; - buf->used = 0; - /* FIXME: Check dispatched field */ - buf_priv->dispatched = 0; - } + buf_priv->age = ++dev_priv->sarea_priv->last_dispatch; - dev_priv->sarea_priv->last_dispatch++; + /* Emit the vertex buffer age */ + BEGIN_RING( 2 ); + RADEON_DISPATCH_AGE( buf_priv->age ); + ADVANCE_RING(); - sarea_priv->dirty &= ~RADEON_UPLOAD_CLIPRECTS; - sarea_priv->nbox = 0; + buf->pending = 1; + buf->used = 0; } - static void radeon_cp_dispatch_indirect( drm_device_t *dev, drm_buf_t *buf, int start, int end ) { drm_radeon_private_t *dev_priv = dev->dev_private; - drm_radeon_buf_priv_t *buf_priv = buf->dev_private; RING_LOCALS; DRM_DEBUG( "indirect: buf=%d s=0x%x e=0x%x\n", buf->idx, start, end ); @@ -852,8 +981,6 @@ data[dwords++] = RADEON_CP_PACKET2; } - buf_priv->dispatched = 1; - /* Fire off the indirect buffer */ BEGIN_RING( 3 ); @@ -863,100 +990,75 @@ ADVANCE_RING(); } - - if ( buf_priv->discard ) { - buf_priv->age = dev_priv->sarea_priv->last_dispatch; - - /* Emit the indirect buffer age */ - BEGIN_RING( 2 ); - RADEON_DISPATCH_AGE( buf_priv->age ); - ADVANCE_RING(); - - buf->pending = 1; - buf->used = 0; - /* FIXME: Check dispatched field */ - buf_priv->dispatched = 0; - } - - dev_priv->sarea_priv->last_dispatch++; } + static void radeon_cp_dispatch_indices( drm_device_t *dev, - drm_buf_t *buf, - int start, int end, - int count ) + drm_buf_t *elt_buf, + drm_radeon_tcl_prim_t *prim, + drm_clip_rect_t *boxes, + int nbox ) { drm_radeon_private_t *dev_priv = dev->dev_private; - drm_radeon_buf_priv_t *buf_priv = buf->dev_private; - drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; - int format = sarea_priv->vc_format; - int offset = dev_priv->agp_buffers_offset; - int prim = buf_priv->prim; + drm_clip_rect_t box; + int offset = dev_priv->agp_buffers_offset + prim->offset; u32 *data; int dwords; int i = 0; - RING_LOCALS; - DRM_DEBUG( "indices: s=%d e=%d c=%d\n", start, end, count ); - - if ( 0 ) - radeon_print_dirty( "dispatch_indices", sarea_priv->dirty ); - - if ( start != end ) { - buf_priv->dispatched = 1; - - if ( sarea_priv->dirty & ~RADEON_UPLOAD_CLIPRECTS ) { - radeon_emit_state( dev_priv ); - } - - dwords = (end - start + 3) / sizeof(u32); - - data = (u32 *)((char *)dev_priv->buffers->handle - + buf->offset + start); + int start = prim->start + RADEON_INDEX_PRIM_OFFSET; + int count = (prim->finish - start) / sizeof(u16); - data[0] = CP_PACKET3( RADEON_3D_RNDR_GEN_INDX_PRIM, dwords-2 ); - - data[1] = offset; - data[2] = RADEON_MAX_VB_VERTS; - data[3] = format; - data[4] = (prim | RADEON_PRIM_WALK_IND | - RADEON_COLOR_ORDER_RGBA | - RADEON_VTX_FMT_RADEON_MODE | - (count << RADEON_NUM_VERTICES_SHIFT) ); - - if ( count & 0x1 ) { - data[dwords-1] &= 0x0000ffff; - } - - do { - /* Emit the next set of up to three cliprects */ - if ( i < sarea_priv->nbox ) { - radeon_emit_clip_rect( dev_priv, - &sarea_priv->boxes[i] ); - } - - radeon_cp_dispatch_indirect( dev, buf, start, end ); - - i++; - } while ( i < sarea_priv->nbox ); + DRM_DEBUG("hwprim 0x%x vfmt 0x%x %d..%d offset: %x nr %d\n", + prim->prim, + prim->vc_format, + prim->start, + prim->finish, + prim->offset, + prim->numverts); + + if (bad_prim_vertex_nr( prim->prim, count )) { + DRM_ERROR( "bad prim %x count %d\n", + prim->prim, count ); + return; } - if ( buf_priv->discard ) { - buf_priv->age = dev_priv->sarea_priv->last_dispatch; - /* Emit the vertex buffer age */ - BEGIN_RING( 2 ); - RADEON_DISPATCH_AGE( buf_priv->age ); - ADVANCE_RING(); + if ( start >= prim->finish || + (prim->start & 0x7) ) { + DRM_ERROR( "buffer prim %d\n", prim->prim ); + return; + } + + dwords = (prim->finish - prim->start + 3) / sizeof(u32); + + data = (u32 *)((char *)dev_priv->buffers->handle + + elt_buf->offset + prim->start); + + data[0] = CP_PACKET3( RADEON_3D_RNDR_GEN_INDX_PRIM, dwords-2 ); + data[1] = offset; + data[2] = prim->numverts; + data[3] = prim->vc_format; + data[4] = (prim->prim | + RADEON_PRIM_WALK_IND | + RADEON_COLOR_ORDER_RGBA | + RADEON_VTX_FMT_RADEON_MODE | + (count << RADEON_NUM_VERTICES_SHIFT) ); + + do { + if ( i < nbox ) { + if (__copy_from_user( &box, &boxes[i], sizeof(box) )) + return; + + radeon_emit_clip_rect( dev_priv, &box ); + } - buf->pending = 1; - /* FIXME: Check dispatched field */ - buf_priv->dispatched = 0; - } + radeon_cp_dispatch_indirect( dev, elt_buf, + prim->start, + prim->finish ); - dev_priv->sarea_priv->last_dispatch++; + i++; + } while ( i < nbox ); - sarea_priv->dirty &= ~RADEON_UPLOAD_CLIPRECTS; - sarea_priv->nbox = 0; } #define RADEON_MAX_TEXTURE_SIZE (RADEON_BUFFER_SIZE - 8 * sizeof(u32)) @@ -967,25 +1069,35 @@ { drm_radeon_private_t *dev_priv = dev->dev_private; drm_buf_t *buf; - drm_radeon_buf_priv_t *buf_priv; u32 format; u32 *buffer; - u8 *data; + const u8 *data; int size, dwords, tex_width, blit_width; - u32 y, height; - int ret = 0, i; + u32 height; + int i; RING_LOCALS; - /* FIXME: Be smarter about this... + dev_priv->stats.boxes |= RADEON_BOX_TEXTURE_LOAD; + + /* Flush the pixel cache. This ensures no pixel data gets mixed + * up with the texture data from the host data blit, otherwise + * part of the texture image may be corrupted. */ - buf = radeon_freelist_get( dev ); - if ( !buf ) return -EAGAIN; + BEGIN_RING( 4 ); + RADEON_FLUSH_CACHE(); + RADEON_WAIT_UNTIL_IDLE(); + ADVANCE_RING(); - DRM_DEBUG( "tex: ofs=0x%x p=%d f=%d x=%hd y=%hd w=%hd h=%hd\n", - tex->offset >> 10, tex->pitch, tex->format, - image->x, image->y, image->width, image->height ); +#ifdef __BIG_ENDIAN + /* The Mesa texture functions provide the data in little endian as the + * chip wants it, but we need to compensate for the fact that the CP + * ring gets byte-swapped + */ + BEGIN_RING( 2 ); + OUT_RING_REG( RADEON_RBBM_GUICNTL, RADEON_HOST_DATA_SWAP_32BIT ); + ADVANCE_RING(); +#endif - buf_priv = buf->dev_private; /* The compiler won't optimize away a division by a variable, * even if the only legal values are powers of two. Thus, we'll @@ -1002,6 +1114,8 @@ case RADEON_TXFORMAT_ARGB1555: case RADEON_TXFORMAT_RGB565: case RADEON_TXFORMAT_ARGB4444: + case RADEON_TXFORMAT_VYUY422: + case RADEON_TXFORMAT_YVYU422: format = RADEON_COLOR_FORMAT_RGB565; tex_width = tex->width * 2; blit_width = image->width * 2; @@ -1017,56 +1131,46 @@ return -EINVAL; } - DRM_DEBUG( " tex=%dx%d blit=%d\n", - tex_width, tex->height, blit_width ); - - /* Flush the pixel cache. This ensures no pixel data gets mixed - * up with the texture data from the host data blit, otherwise - * part of the texture image may be corrupted. - */ - BEGIN_RING( 4 ); - - RADEON_FLUSH_CACHE(); - RADEON_WAIT_UNTIL_IDLE(); + DRM_DEBUG("tex=%dx%d blit=%d\n", tex_width, tex->height, blit_width ); - ADVANCE_RING(); + do { + DRM_DEBUG( "tex: ofs=0x%x p=%d f=%d x=%hd y=%hd w=%hd h=%hd\n", + tex->offset >> 10, tex->pitch, tex->format, + image->x, image->y, image->width, image->height ); - /* Make a copy of the parameters in case we have to update them - * for a multi-pass texture blit. + /* Make a copy of some parameters in case we have to + * update them for a multi-pass texture blit. */ - y = image->y; height = image->height; - data = (u8 *)image->data; + data = (const u8 *)image->data; size = height * blit_width; if ( size > RADEON_MAX_TEXTURE_SIZE ) { - /* Texture image is too large, do a multipass upload */ - ret = -EAGAIN; - - /* Adjust the blit size to fit the indirect buffer */ height = RADEON_MAX_TEXTURE_SIZE / blit_width; size = height * blit_width; - - /* Update the input parameters for next time */ - image->y += height; - image->height -= height; - image->data = (char *)image->data + size; - - if ( copy_to_user( tex->image, image, sizeof(*image) ) ) { - DRM_ERROR( "EFAULT on tex->image\n" ); - return -EFAULT; - } } else if ( size < 4 && size > 0 ) { size = 4; + } else if ( size == 0 ) { + return 0; + } + + buf = radeon_freelist_get( dev ); + if ( 0 && !buf ) { + radeon_do_cp_idle( dev_priv ); + buf = radeon_freelist_get( dev ); + } + if ( !buf ) { + DRM_DEBUG("radeon_cp_dispatch_texture: EAGAIN\n"); + copy_to_user( tex->image, image, sizeof(*image) ); + return -EAGAIN; } - dwords = size / 4; /* Dispatch the indirect buffer. */ - buffer = (u32 *)((char *)dev_priv->buffers->handle + buf->offset); - + buffer = (u32*)((char*)dev_priv->buffers->handle + buf->offset); + dwords = size / 4; buffer[0] = CP_PACKET3( RADEON_CNTL_HOSTDATA_BLT, dwords + 6 ); buffer[1] = (RADEON_GMC_DST_PITCH_OFFSET_CNTL | RADEON_GMC_BRUSH_NONE | @@ -1080,7 +1184,7 @@ buffer[2] = (tex->pitch << 22) | (tex->offset >> 10); buffer[3] = 0xffffffff; buffer[4] = 0xffffffff; - buffer[5] = (y << 16) | image->x; + buffer[5] = (image->y << 16) | image->x; buffer[6] = (height << 16) | image->width; buffer[7] = dwords; @@ -1112,30 +1216,34 @@ buf->pid = current->pid; buf->used = (dwords + 8) * sizeof(u32); - buf_priv->discard = 1; radeon_cp_dispatch_indirect( dev, buf, 0, buf->used ); + radeon_cp_discard_buffer( dev, buf ); + + /* Update the input parameters for next time */ + image->y += height; + image->height -= height; + (const u8 *)image->data += size; + } while (image->height > 0); /* Flush the pixel cache after the blit completes. This ensures * the texture data is written out to memory before rendering * continues. */ BEGIN_RING( 4 ); - RADEON_FLUSH_CACHE(); RADEON_WAIT_UNTIL_2D_IDLE(); - ADVANCE_RING(); - - return ret; + return 0; } + static void radeon_cp_dispatch_stipple( drm_device_t *dev, u32 *stipple ) { drm_radeon_private_t *dev_priv = dev->dev_private; int i; RING_LOCALS; - DRM_DEBUG( "%s\n", __FUNCTION__ ); + DRM_DEBUG( "\n" ); BEGIN_RING( 35 ); @@ -1158,31 +1266,95 @@ int radeon_cp_clear( struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg ) { - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + drm_radeon_private_t *dev_priv = dev->dev_private; + drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; + drm_radeon_clear_t clear; + drm_radeon_clear_rect_t depth_boxes[RADEON_NR_SAREA_CLIPRECTS]; + DRM_DEBUG( "\n" ); + + LOCK_TEST_WITH_RETURN( dev ); + + if ( copy_from_user( &clear, (drm_radeon_clear_t *)arg, + sizeof(clear) ) ) + return -EFAULT; + + RING_SPACE_TEST_WITH_RETURN( dev_priv ); + + if ( sarea_priv->nbox > RADEON_NR_SAREA_CLIPRECTS ) + sarea_priv->nbox = RADEON_NR_SAREA_CLIPRECTS; + + if ( copy_from_user( &depth_boxes, clear.depth_boxes, + sarea_priv->nbox * sizeof(depth_boxes[0]) ) ) + return -EFAULT; + + radeon_cp_dispatch_clear( dev, &clear, depth_boxes ); + + COMMIT_RING(); + return 0; +} + + +/* Not sure why this isn't set all the time: + */ +static int radeon_do_init_pageflip( drm_device_t *dev ) +{ + drm_radeon_private_t *dev_priv = dev->dev_private; + RING_LOCALS; + + DRM_DEBUG( "\n" ); + + BEGIN_RING( 6 ); + RADEON_WAIT_UNTIL_3D_IDLE(); + OUT_RING( CP_PACKET0( RADEON_CRTC_OFFSET_CNTL, 0 ) ); + OUT_RING( RADEON_READ( RADEON_CRTC_OFFSET_CNTL ) | RADEON_CRTC_OFFSET_FLIP_CNTL ); + OUT_RING( CP_PACKET0( RADEON_CRTC2_OFFSET_CNTL, 0 ) ); + OUT_RING( RADEON_READ( RADEON_CRTC2_OFFSET_CNTL ) | RADEON_CRTC_OFFSET_FLIP_CNTL ); + ADVANCE_RING(); + + dev_priv->page_flipping = 1; + dev_priv->current_page = 0; + dev_priv->sarea_priv->pfCurrentPage = dev_priv->current_page; + + return 0; +} + +/* Called whenever a client dies, from DRM(release). + * NOTE: Lock isn't necessarily held when this is called! + */ +int radeon_do_cleanup_pageflip( drm_device_t *dev ) +{ + drm_radeon_private_t *dev_priv = dev->dev_private; + DRM_DEBUG( "\n" ); + + if (dev_priv->current_page != 0) + radeon_cp_dispatch_flip( dev ); + + dev_priv->page_flipping = 0; + return 0; +} + +/* Swapping and flipping are different operations, need different ioctls. + * They can & should be intermixed to support multiple 3d windows. + */ +int radeon_cp_flip(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long data ) +{ + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; drm_radeon_private_t *dev_priv = dev->dev_private; - drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_radeon_clear_t clear; - drm_radeon_clear_rect_t depth_boxes[RADEON_NR_SAREA_CLIPRECTS]; - DRM_DEBUG( "%s\n", __FUNCTION__ ); + DRM_DEBUG( "\n" ); LOCK_TEST_WITH_RETURN( dev ); - if ( copy_from_user( &clear, (drm_radeon_clear_t *)arg, - sizeof(clear) ) ) - return -EFAULT; - RING_SPACE_TEST_WITH_RETURN( dev_priv ); - if ( sarea_priv->nbox > RADEON_NR_SAREA_CLIPRECTS ) - sarea_priv->nbox = RADEON_NR_SAREA_CLIPRECTS; - - if ( copy_from_user( &depth_boxes, clear.depth_boxes, - sarea_priv->nbox * sizeof(depth_boxes[0]) ) ) - return -EFAULT; - - radeon_cp_dispatch_clear( dev, &clear, depth_boxes ); + if (!dev_priv->page_flipping) + radeon_do_init_pageflip( dev ); + + radeon_cp_dispatch_flip( dev ); + COMMIT_RING(); return 0; } @@ -1193,7 +1365,7 @@ drm_device_t *dev = priv->dev; drm_radeon_private_t *dev_priv = dev->dev_private; drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; - DRM_DEBUG( "%s\n", __FUNCTION__ ); + DRM_DEBUG( "\n" ); LOCK_TEST_WITH_RETURN( dev ); @@ -1202,14 +1374,10 @@ if ( sarea_priv->nbox > RADEON_NR_SAREA_CLIPRECTS ) sarea_priv->nbox = RADEON_NR_SAREA_CLIPRECTS; - if ( !dev_priv->page_flipping ) { - radeon_cp_dispatch_swap( dev ); - dev_priv->sarea_priv->dirty |= (RADEON_UPLOAD_CONTEXT | - RADEON_UPLOAD_MASKS); - } else { - radeon_cp_dispatch_flip( dev ); - } + radeon_cp_dispatch_swap( dev ); + dev_priv->sarea_priv->ctx_owner = 0; + COMMIT_RING(); return 0; } @@ -1219,10 +1387,11 @@ drm_file_t *priv = filp->private_data; drm_device_t *dev = priv->dev; drm_radeon_private_t *dev_priv = dev->dev_private; + drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; drm_device_dma_t *dma = dev->dma; drm_buf_t *buf; - drm_radeon_buf_priv_t *buf_priv; drm_radeon_vertex_t vertex; + drm_radeon_tcl_prim_t prim; LOCK_TEST_WITH_RETURN( dev ); @@ -1235,8 +1404,8 @@ sizeof(vertex) ) ) return -EFAULT; - DRM_DEBUG( "%s: pid=%d index=%d count=%d discard=%d\n", - __FUNCTION__, current->pid, + DRM_DEBUG( "pid=%d index=%d count=%d discard=%d\n", + current->pid, vertex.idx, vertex.count, vertex.discard ); if ( vertex.idx < 0 || vertex.idx >= dma->buf_count ) { @@ -1254,7 +1423,6 @@ VB_AGE_TEST_WITH_RETURN( dev_priv ); buf = dma->buflist[vertex.idx]; - buf_priv = buf->dev_private; if ( buf->pid != current->pid ) { DRM_ERROR( "process %d using buffer owned by %d\n", @@ -1266,12 +1434,39 @@ return -EINVAL; } - buf->used = vertex.count; - buf_priv->prim = vertex.prim; - buf_priv->discard = vertex.discard; + /* Build up a prim_t record: + */ + if (vertex.count) { + buf->used = vertex.count; /* not used? */ + + if ( sarea_priv->dirty & ~RADEON_UPLOAD_CLIPRECTS ) { + radeon_emit_state( dev_priv, + &sarea_priv->context_state, + sarea_priv->tex_state, + sarea_priv->dirty ); + + sarea_priv->dirty &= ~(RADEON_UPLOAD_TEX0IMAGES | + RADEON_UPLOAD_TEX1IMAGES | + RADEON_UPLOAD_TEX2IMAGES | + RADEON_REQUIRE_QUIESCENCE); + } + + prim.start = 0; + prim.finish = vertex.count; /* unused */ + prim.prim = vertex.prim; + prim.numverts = vertex.count; + prim.vc_format = dev_priv->sarea_priv->vc_format; + + radeon_cp_dispatch_vertex( dev, buf, &prim, + dev_priv->sarea_priv->boxes, + dev_priv->sarea_priv->nbox ); + } - radeon_cp_dispatch_vertex( dev, buf ); + if (vertex.discard) { + radeon_cp_discard_buffer( dev, buf ); + } + COMMIT_RING(); return 0; } @@ -1281,10 +1476,11 @@ drm_file_t *priv = filp->private_data; drm_device_t *dev = priv->dev; drm_radeon_private_t *dev_priv = dev->dev_private; + drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; drm_device_dma_t *dma = dev->dma; drm_buf_t *buf; - drm_radeon_buf_priv_t *buf_priv; drm_radeon_indices_t elts; + drm_radeon_tcl_prim_t prim; int count; LOCK_TEST_WITH_RETURN( dev ); @@ -1317,7 +1513,6 @@ VB_AGE_TEST_WITH_RETURN( dev_priv ); buf = dma->buflist[elts.idx]; - buf_priv = buf->dev_private; if ( buf->pid != current->pid ) { DRM_ERROR( "process %d using buffer owned by %d\n", @@ -1342,11 +1537,37 @@ } buf->used = elts.end; - buf_priv->prim = elts.prim; - buf_priv->discard = elts.discard; - radeon_cp_dispatch_indices( dev, buf, elts.start, elts.end, count ); + if ( sarea_priv->dirty & ~RADEON_UPLOAD_CLIPRECTS ) { + radeon_emit_state( dev_priv, + &sarea_priv->context_state, + sarea_priv->tex_state, + sarea_priv->dirty ); + + sarea_priv->dirty &= ~(RADEON_UPLOAD_TEX0IMAGES | + RADEON_UPLOAD_TEX1IMAGES | + RADEON_UPLOAD_TEX2IMAGES | + RADEON_REQUIRE_QUIESCENCE); + } + + + /* Build up a prim_t record: + */ + prim.start = elts.start; + prim.finish = elts.end; + prim.prim = elts.prim; + prim.offset = 0; /* offset from start of dma buffers */ + prim.numverts = RADEON_MAX_VB_VERTS; /* duh */ + prim.vc_format = dev_priv->sarea_priv->vc_format; + + radeon_cp_dispatch_indices( dev, buf, &prim, + dev_priv->sarea_priv->boxes, + dev_priv->sarea_priv->nbox ); + if (elts.discard) { + radeon_cp_discard_buffer( dev, buf ); + } + COMMIT_RING(); return 0; } @@ -1358,6 +1579,7 @@ drm_radeon_private_t *dev_priv = dev->dev_private; drm_radeon_texture_t tex; drm_radeon_tex_image_t image; + int ret; LOCK_TEST_WITH_RETURN( dev ); @@ -1377,7 +1599,10 @@ RING_SPACE_TEST_WITH_RETURN( dev_priv ); VB_AGE_TEST_WITH_RETURN( dev_priv ); - return radeon_cp_dispatch_texture( dev, &tex, &image ); + ret = radeon_cp_dispatch_texture( dev, &tex, &image ); + + COMMIT_RING(); + return ret; } int radeon_cp_stipple( struct inode *inode, struct file *filp, @@ -1402,6 +1627,7 @@ radeon_cp_dispatch_stipple( dev, mask ); + COMMIT_RING(); return 0; } @@ -1413,7 +1639,6 @@ drm_radeon_private_t *dev_priv = dev->dev_private; drm_device_dma_t *dma = dev->dma; drm_buf_t *buf; - drm_radeon_buf_priv_t *buf_priv; drm_radeon_indirect_t indirect; RING_LOCALS; @@ -1439,7 +1664,6 @@ } buf = dma->buflist[indirect.idx]; - buf_priv = buf->dev_private; if ( buf->pid != current->pid ) { DRM_ERROR( "process %d using buffer owned by %d\n", @@ -1461,7 +1685,6 @@ VB_AGE_TEST_WITH_RETURN( dev_priv ); buf->used = indirect.end; - buf_priv->discard = indirect.discard; /* Wait for the 3D stream to idle before the indirect buffer * containing 2D acceleration commands is processed. @@ -1477,6 +1700,526 @@ * privileged clients. */ radeon_cp_dispatch_indirect( dev, buf, indirect.start, indirect.end ); + if (indirect.discard) { + radeon_cp_discard_buffer( dev, buf ); + } + + + COMMIT_RING(); + return 0; +} + +int radeon_cp_vertex2(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long data ) +{ + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + drm_radeon_private_t *dev_priv = dev->dev_private; + drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; + drm_device_dma_t *dma = dev->dma; + drm_buf_t *buf; + drm_radeon_vertex2_t vertex; + int i; + unsigned char laststate; + + LOCK_TEST_WITH_RETURN( dev ); + + if ( !dev_priv ) { + DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ ); + return -EINVAL; + } + + DRM_COPY_FROM_USER_IOCTL( vertex, (drm_radeon_vertex2_t *)data, + sizeof(vertex) ); + + DRM_DEBUG( "pid=%d index=%d discard=%d\n", + current->pid, + vertex.idx, vertex.discard ); + + if ( vertex.idx < 0 || vertex.idx >= dma->buf_count ) { + DRM_ERROR( "buffer index %d (of %d max)\n", + vertex.idx, dma->buf_count - 1 ); + return -EINVAL; + } + + RING_SPACE_TEST_WITH_RETURN( dev_priv ); + VB_AGE_TEST_WITH_RETURN( dev_priv ); + + buf = dma->buflist[vertex.idx]; + + if ( buf->pid != current->pid ) { + DRM_ERROR( "process %d using buffer owned by %d\n", + current->pid, buf->pid ); + return -EINVAL; + } + + if ( buf->pending ) { + DRM_ERROR( "sending pending buffer %d\n", vertex.idx ); + return -EINVAL; + } + + if (sarea_priv->nbox > RADEON_NR_SAREA_CLIPRECTS) + return -EINVAL; + + for (laststate = 0xff, i = 0 ; i < vertex.nr_prims ; i++) { + drm_radeon_prim_t prim; + drm_radeon_tcl_prim_t tclprim; + + if ( copy_from_user( &prim, &vertex.prim[i], sizeof(prim) ) ) + return -EFAULT; + + if ( prim.stateidx != laststate ) { + drm_radeon_state_t state; + + if ( copy_from_user( &state, + &vertex.state[prim.stateidx], + sizeof(state) ) ) + return -EFAULT; + + radeon_emit_state2( dev_priv, &state ); + + laststate = prim.stateidx; + } + + tclprim.start = prim.start; + tclprim.finish = prim.finish; + tclprim.prim = prim.prim; + tclprim.vc_format = prim.vc_format; + + if ( prim.prim & RADEON_PRIM_WALK_IND ) { + tclprim.offset = prim.numverts * 64; + tclprim.numverts = RADEON_MAX_VB_VERTS; /* duh */ + + radeon_cp_dispatch_indices( dev, buf, &tclprim, + sarea_priv->boxes, + sarea_priv->nbox); + } else { + tclprim.numverts = prim.numverts; + tclprim.offset = 0; /* not used */ + + radeon_cp_dispatch_vertex( dev, buf, &tclprim, + sarea_priv->boxes, + sarea_priv->nbox); + } + + if (sarea_priv->nbox == 1) + sarea_priv->nbox = 0; + } + + if ( vertex.discard ) { + radeon_cp_discard_buffer( dev, buf ); + } + + COMMIT_RING(); + return 0; +} + + +static int radeon_emit_packets( + drm_radeon_private_t *dev_priv, + drm_radeon_cmd_header_t header, + drm_radeon_cmd_buffer_t *cmdbuf ) +{ + int id = (int)header.packet.packet_id; + int sz, reg; + int *data = (int *)cmdbuf->buf; + RING_LOCALS; + + if (id >= RADEON_MAX_STATE_PACKETS) + return -EINVAL; + + sz = packet[id].len; + reg = packet[id].start; + + if (sz * sizeof(int) > cmdbuf->bufsz) + return -EINVAL; + + BEGIN_RING(sz+1); + OUT_RING( CP_PACKET0( reg, (sz-1) ) ); + OUT_RING_USER_TABLE( data, sz ); + ADVANCE_RING(); + + cmdbuf->buf += sz * sizeof(int); + cmdbuf->bufsz -= sz * sizeof(int); + return 0; +} + +static __inline__ int radeon_emit_scalars( + drm_radeon_private_t *dev_priv, + drm_radeon_cmd_header_t header, + drm_radeon_cmd_buffer_t *cmdbuf ) +{ + int sz = header.scalars.count; + int *data = (int *)cmdbuf->buf; + int start = header.scalars.offset; + int stride = header.scalars.stride; + RING_LOCALS; + + BEGIN_RING( 3+sz ); + OUT_RING( CP_PACKET0( RADEON_SE_TCL_SCALAR_INDX_REG, 0 ) ); + OUT_RING( start | (stride << RADEON_SCAL_INDX_DWORD_STRIDE_SHIFT)); + OUT_RING( CP_PACKET0_TABLE( RADEON_SE_TCL_SCALAR_DATA_REG, sz-1 ) ); + OUT_RING_USER_TABLE( data, sz ); + ADVANCE_RING(); + cmdbuf->buf += sz * sizeof(int); + cmdbuf->bufsz -= sz * sizeof(int); + return 0; +} + +/* God this is ugly + */ +static __inline__ int radeon_emit_scalars2( + drm_radeon_private_t *dev_priv, + drm_radeon_cmd_header_t header, + drm_radeon_cmd_buffer_t *cmdbuf ) +{ + int sz = header.scalars.count; + int *data = (int *)cmdbuf->buf; + int start = ((unsigned int)header.scalars.offset) + 0x100; + int stride = header.scalars.stride; + RING_LOCALS; + + BEGIN_RING( 3+sz ); + OUT_RING( CP_PACKET0( RADEON_SE_TCL_SCALAR_INDX_REG, 0 ) ); + OUT_RING( start | (stride << RADEON_SCAL_INDX_DWORD_STRIDE_SHIFT)); + OUT_RING( CP_PACKET0_TABLE( RADEON_SE_TCL_SCALAR_DATA_REG, sz-1 ) ); + OUT_RING_USER_TABLE( data, sz ); + ADVANCE_RING(); + cmdbuf->buf += sz * sizeof(int); + cmdbuf->bufsz -= sz * sizeof(int); + return 0; +} + +static __inline__ int radeon_emit_vectors( + drm_radeon_private_t *dev_priv, + drm_radeon_cmd_header_t header, + drm_radeon_cmd_buffer_t *cmdbuf ) +{ + int sz = header.vectors.count; + int *data = (int *)cmdbuf->buf; + int start = header.vectors.offset; + int stride = header.vectors.stride; + RING_LOCALS; + + BEGIN_RING( 3+sz ); + OUT_RING( CP_PACKET0( RADEON_SE_TCL_VECTOR_INDX_REG, 0 ) ); + OUT_RING( start | (stride << RADEON_VEC_INDX_OCTWORD_STRIDE_SHIFT)); + OUT_RING( CP_PACKET0_TABLE( RADEON_SE_TCL_VECTOR_DATA_REG, (sz-1) ) ); + OUT_RING_USER_TABLE( data, sz ); + ADVANCE_RING(); + + cmdbuf->buf += sz * sizeof(int); + cmdbuf->bufsz -= sz * sizeof(int); + return 0; +} + + +static int radeon_emit_packet3( drm_device_t *dev, + drm_radeon_cmd_buffer_t *cmdbuf ) +{ + drm_radeon_private_t *dev_priv = dev->dev_private; + int cmdsz, tmp; + int *cmd = (int *)cmdbuf->buf; + RING_LOCALS; + + DRM_DEBUG("\n"); + + if (__get_user( tmp, &cmd[0])) + return -EFAULT; + + cmdsz = 2 + ((tmp & RADEON_CP_PACKET_COUNT_MASK) >> 16); + + if ((tmp & 0xc0000000) != RADEON_CP_PACKET3 || + cmdsz * 4 > cmdbuf->bufsz) + return -EINVAL; + + BEGIN_RING( cmdsz ); + OUT_RING_USER_TABLE( cmd, cmdsz ); + ADVANCE_RING(); + + cmdbuf->buf += cmdsz * 4; + cmdbuf->bufsz -= cmdsz * 4; + return 0; +} + + +static int radeon_emit_packet3_cliprect( drm_device_t *dev, + drm_radeon_cmd_buffer_t *cmdbuf, + int orig_nbox ) +{ + drm_radeon_private_t *dev_priv = dev->dev_private; + drm_clip_rect_t box; + int cmdsz, tmp; + int *cmd = (int *)cmdbuf->buf; + drm_clip_rect_t *boxes = cmdbuf->boxes; + int i = 0; + RING_LOCALS; + + DRM_DEBUG("\n"); + + if (__get_user( tmp, &cmd[0])) + return -EFAULT; + + cmdsz = 2 + ((tmp & RADEON_CP_PACKET_COUNT_MASK) >> 16); + + if ((tmp & 0xc0000000) != RADEON_CP_PACKET3 || + cmdsz * 4 > cmdbuf->bufsz) + return -EINVAL; + + if (!orig_nbox) + goto out; + + do { + if ( i < cmdbuf->nbox ) { + if (__copy_from_user( &box, &boxes[i], sizeof(box) )) + return -EFAULT; + /* FIXME The second and subsequent times round + * this loop, send a WAIT_UNTIL_3D_IDLE before + * calling emit_clip_rect(). This fixes a + * lockup on fast machines when sending + * several cliprects with a cmdbuf, as when + * waving a 2D window over a 3D + * window. Something in the commands from user + * space seems to hang the card when they're + * sent several times in a row. That would be + * the correct place to fix it but this works + * around it until I can figure that out - Tim + * Smith */ + if ( i ) { + BEGIN_RING( 2 ); + RADEON_WAIT_UNTIL_3D_IDLE(); + ADVANCE_RING(); + } + radeon_emit_clip_rect( dev_priv, &box ); + } + + BEGIN_RING( cmdsz ); + OUT_RING_USER_TABLE( cmd, cmdsz ); + ADVANCE_RING(); + + } while ( ++i < cmdbuf->nbox ); + if (cmdbuf->nbox == 1) + cmdbuf->nbox = 0; + + out: + cmdbuf->buf += cmdsz * 4; + cmdbuf->bufsz -= cmdsz * 4; + return 0; +} + + +static int radeon_emit_wait( drm_device_t *dev, int flags ) +{ + drm_radeon_private_t *dev_priv = dev->dev_private; + RING_LOCALS; + + DRM_DEBUG("%s: %x\n", __FUNCTION__, flags); + switch (flags) { + case RADEON_WAIT_2D: + BEGIN_RING( 2 ); + RADEON_WAIT_UNTIL_2D_IDLE(); + ADVANCE_RING(); + break; + case RADEON_WAIT_3D: + BEGIN_RING( 2 ); + RADEON_WAIT_UNTIL_3D_IDLE(); + ADVANCE_RING(); + break; + case RADEON_WAIT_2D|RADEON_WAIT_3D: + BEGIN_RING( 2 ); + RADEON_WAIT_UNTIL_IDLE(); + ADVANCE_RING(); + break; + default: + return -EINVAL; + } + + return 0; +} + +int radeon_cp_cmdbuf(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long data ) +{ + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + drm_radeon_private_t *dev_priv = dev->dev_private; + drm_device_dma_t *dma = dev->dma; + drm_buf_t *buf = 0; + int idx; + drm_radeon_cmd_buffer_t cmdbuf; + drm_radeon_cmd_header_t header; + int orig_nbox; + + LOCK_TEST_WITH_RETURN( dev ); + + if ( !dev_priv ) { + DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ ); + return -EINVAL; + } + + DRM_COPY_FROM_USER_IOCTL( cmdbuf, (drm_radeon_cmd_buffer_t *)data, + sizeof(cmdbuf) ); + + RING_SPACE_TEST_WITH_RETURN( dev_priv ); + VB_AGE_TEST_WITH_RETURN( dev_priv ); + + + if (verify_area( VERIFY_READ, cmdbuf.buf, cmdbuf.bufsz )) + return -EFAULT; + + if (cmdbuf.nbox && + verify_area( VERIFY_READ, cmdbuf.boxes, + cmdbuf.nbox * sizeof(drm_clip_rect_t))) + return -EFAULT; + + orig_nbox = cmdbuf.nbox; + + while ( cmdbuf.bufsz >= sizeof(header) ) { + + if (__get_user( header.i, (int *)cmdbuf.buf )) { + DRM_ERROR("__get_user %p\n", cmdbuf.buf); + return -EFAULT; + } + + cmdbuf.buf += sizeof(header); + cmdbuf.bufsz -= sizeof(header); + + switch (header.header.cmd_type) { + case RADEON_CMD_PACKET: + DRM_DEBUG("RADEON_CMD_PACKET\n"); + if (radeon_emit_packets( dev_priv, header, &cmdbuf )) { + DRM_ERROR("radeon_emit_packets failed\n"); + return -EINVAL; + } + break; + + case RADEON_CMD_SCALARS: + DRM_DEBUG("RADEON_CMD_SCALARS\n"); + if (radeon_emit_scalars( dev_priv, header, &cmdbuf )) { + DRM_ERROR("radeon_emit_scalars failed\n"); + return -EINVAL; + } + break; + + case RADEON_CMD_VECTORS: + DRM_DEBUG("RADEON_CMD_VECTORS\n"); + if (radeon_emit_vectors( dev_priv, header, &cmdbuf )) { + DRM_ERROR("radeon_emit_vectors failed\n"); + return -EINVAL; + } + break; + + case RADEON_CMD_DMA_DISCARD: + DRM_DEBUG("RADEON_CMD_DMA_DISCARD\n"); + idx = header.dma.buf_idx; + if ( idx < 0 || idx >= dma->buf_count ) { + DRM_ERROR( "buffer index %d (of %d max)\n", + idx, dma->buf_count - 1 ); + return -EINVAL; + } + + buf = dma->buflist[idx]; + if ( buf->pid != current->pid || buf->pending ) { + DRM_ERROR( "bad buffer\n" ); + return -EINVAL; + } + + radeon_cp_discard_buffer( dev, buf ); + break; + + case RADEON_CMD_PACKET3: + DRM_DEBUG("RADEON_CMD_PACKET3\n"); + if (radeon_emit_packet3( dev, &cmdbuf )) { + DRM_ERROR("radeon_emit_packet3 failed\n"); + return -EINVAL; + } + break; + + case RADEON_CMD_PACKET3_CLIP: + DRM_DEBUG("RADEON_CMD_PACKET3_CLIP\n"); + if (radeon_emit_packet3_cliprect( dev, &cmdbuf, orig_nbox )) { + DRM_ERROR("radeon_emit_packet3_clip failed\n"); + return -EINVAL; + } + break; + + case RADEON_CMD_SCALARS2: + DRM_DEBUG("RADEON_CMD_SCALARS2\n"); + if (radeon_emit_scalars2( dev_priv, header, &cmdbuf )) { + DRM_ERROR("radeon_emit_scalars2 failed\n"); + return -EINVAL; + } + break; + + case RADEON_CMD_WAIT: + DRM_DEBUG("RADEON_CMD_WAIT\n"); + if (radeon_emit_wait( dev, header.wait.flags )) { + DRM_ERROR("radeon_emit_wait failed\n"); + return -EINVAL; + } + break; + default: + DRM_ERROR("bad cmd_type %d at %p\n", + header.header.cmd_type, + cmdbuf.buf - sizeof(header)); + return -EINVAL; + } + } + + + DRM_DEBUG("DONE\n"); + COMMIT_RING(); + return 0; +} + + + +int radeon_cp_getparam(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long data) +{ + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + drm_radeon_private_t *dev_priv = dev->dev_private; + drm_radeon_getparam_t param; + int value; + + if ( !dev_priv ) { + DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ ); + return -EINVAL; + } + + DRM_COPY_FROM_USER_IOCTL( param, (drm_radeon_getparam_t *)data, + sizeof(param) ); + + DRM_DEBUG( "pid=%d\n", current->pid ); + + switch( param.param ) { + case RADEON_PARAM_AGP_BUFFER_OFFSET: + value = dev_priv->agp_buffers_offset; + break; + case RADEON_PARAM_LAST_FRAME: + dev_priv->stats.last_frame_reads++; + value = GET_SCRATCH( 0 ); + break; + case RADEON_PARAM_LAST_DISPATCH: + value = GET_SCRATCH( 1 ); + break; + case RADEON_PARAM_LAST_CLEAR: + dev_priv->stats.last_clear_reads++; + value = GET_SCRATCH( 2 ); + break; + case RADEON_PARAM_IRQ_NR: + value = dev->irq; + break; + case RADEON_PARAM_AGP_BASE: + value = dev_priv->agp_vm_start; + break; + default: + return -EINVAL; + } + + if ( copy_to_user( param.value, &value, sizeof(int) ) ) { + DRM_ERROR( "copy_to_user\n" ); + return -EFAULT; + } + return 0; } diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/sis_drm.h linux.21rc1-ac1/drivers/char/drm/sis_drm.h --- linux.21rc1/drivers/char/drm/sis_drm.h 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/sis_drm.h 2003-04-22 16:44:36.000000000 +0100 @@ -2,6 +2,16 @@ #ifndef _sis_drm_public_h_ #define _sis_drm_public_h_ +/* SiS specific ioctls */ +#define SIS_IOCTL_FB_ALLOC DRM_IOWR(0x44, drm_sis_mem_t) +#define SIS_IOCTL_FB_FREE DRM_IOW( 0x45, drm_sis_mem_t) +#define SIS_IOCTL_AGP_INIT DRM_IOWR(0x53, drm_sis_agp_t) +#define SIS_IOCTL_AGP_ALLOC DRM_IOWR(0x54, drm_sis_mem_t) +#define SIS_IOCTL_AGP_FREE DRM_IOW( 0x55, drm_sis_mem_t) +#define SIS_IOCTL_FLIP DRM_IOW( 0x48, drm_sis_flip_t) +#define SIS_IOCTL_FLIP_INIT DRM_IO( 0x49) +#define SIS_IOCTL_FLIP_FINAL DRM_IO( 0x50) + typedef struct { int context; unsigned int offset; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/sis_drv.c linux.21rc1-ac1/drivers/char/drm/sis_drv.c --- linux.21rc1/drivers/char/drm/sis_drv.c 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/sis_drv.c 2003-04-22 16:44:36.000000000 +0100 @@ -31,31 +31,6 @@ #include "sis_drm.h" #include "sis_drv.h" -#define DRIVER_AUTHOR "SIS" -#define DRIVER_NAME "sis" -#define DRIVER_DESC "SIS 300/630/540" -#define DRIVER_DATE "20010503" -#define DRIVER_MAJOR 1 -#define DRIVER_MINOR 0 -#define DRIVER_PATCHLEVEL 0 - -#define DRIVER_IOCTLS \ - [DRM_IOCTL_NR(SIS_IOCTL_FB_ALLOC)] = { sis_fb_alloc, 1, 0 }, \ - [DRM_IOCTL_NR(SIS_IOCTL_FB_FREE)] = { sis_fb_free, 1, 0 }, \ - /* AGP Memory Management */ \ - [DRM_IOCTL_NR(SIS_IOCTL_AGP_INIT)] = { sisp_agp_init, 1, 0 }, \ - [DRM_IOCTL_NR(SIS_IOCTL_AGP_ALLOC)] = { sisp_agp_alloc, 1, 0 }, \ - [DRM_IOCTL_NR(SIS_IOCTL_AGP_FREE)] = { sisp_agp_free, 1, 0 } -#if 0 /* these don't appear to be defined */ - /* SIS Stereo */ - [DRM_IOCTL_NR(DRM_IOCTL_CONTROL)] = { sis_control, 1, 1 }, - [DRM_IOCTL_NR(SIS_IOCTL_FLIP)] = { sis_flip, 1, 1 }, - [DRM_IOCTL_NR(SIS_IOCTL_FLIP_INIT)] = { sis_flip_init, 1, 1 }, - [DRM_IOCTL_NR(SIS_IOCTL_FLIP_FINAL)] = { sis_flip_final, 1, 1 } -#endif - -#define __HAVE_COUNTERS 5 - #include "drm_auth.h" #include "drm_agpsupport.h" #include "drm_bufs.h" diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/sis_ds.c linux.21rc1-ac1/drivers/char/drm/sis_ds.c --- linux.21rc1/drivers/char/drm/sis_ds.c 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/sis_ds.c 2003-04-22 16:44:36.000000000 +0100 @@ -49,16 +49,19 @@ set_t *set; set = (set_t *)MALLOC(sizeof(set_t)); - if (set) { + if(set) + { for(i = 0; i < SET_SIZE; i++){ set->list[i].free_next = i+1; set->list[i].alloc_next = -1; - } + } + set->list[SET_SIZE-1].free_next = -1; set->free = 0; set->alloc = -1; set->trace = -1; } + return set; } diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/sis.h linux.21rc1-ac1/drivers/char/drm/sis.h --- linux.21rc1/drivers/char/drm/sis.h 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/sis.h 2003-04-22 16:44:36.000000000 +0100 @@ -24,7 +24,7 @@ * DEALINGS IN THE SOFTWARE. * */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/sis.h,v 1.1 2001/05/19 18:29:22 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/sis.h,v 1.2 2001/12/19 21:25:59 dawes Exp $ */ #ifndef __SIS_H__ #define __SIS_H__ @@ -42,6 +42,31 @@ #define __HAVE_MTRR 1 #define __HAVE_CTX_BITMAP 1 +#define DRIVER_AUTHOR "SIS" +#define DRIVER_NAME "sis" +#define DRIVER_DESC "SIS 300/630/540" +#define DRIVER_DATE "20010503" +#define DRIVER_MAJOR 1 +#define DRIVER_MINOR 0 +#define DRIVER_PATCHLEVEL 0 + +#define DRIVER_IOCTLS \ + [DRM_IOCTL_NR(SIS_IOCTL_FB_ALLOC)] = { sis_fb_alloc, 1, 0 }, \ + [DRM_IOCTL_NR(SIS_IOCTL_FB_FREE)] = { sis_fb_free, 1, 0 }, \ + /* AGP Memory Management */ \ + [DRM_IOCTL_NR(SIS_IOCTL_AGP_INIT)] = { sisp_agp_init, 1, 0 }, \ + [DRM_IOCTL_NR(SIS_IOCTL_AGP_ALLOC)] = { sisp_agp_alloc, 1, 0 }, \ + [DRM_IOCTL_NR(SIS_IOCTL_AGP_FREE)] = { sisp_agp_free, 1, 0 } +#if 0 /* these don't appear to be defined */ + /* SIS Stereo */ + [DRM_IOCTL_NR(DRM_IOCTL_CONTROL)] = { sis_control, 1, 1 }, + [DRM_IOCTL_NR(SIS_IOCTL_FLIP)] = { sis_flip, 1, 1 }, + [DRM_IOCTL_NR(SIS_IOCTL_FLIP_INIT)] = { sis_flip_init, 1, 1 }, + [DRM_IOCTL_NR(SIS_IOCTL_FLIP_FINAL)] = { sis_flip_final, 1, 1 } +#endif + +#define __HAVE_COUNTERS 5 + /* Buffer customization: */ #define DRIVER_AGP_BUFFERS_MAP( dev ) \ diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm/tdfx_drv.c linux.21rc1-ac1/drivers/char/drm/tdfx_drv.c --- linux.21rc1/drivers/char/drm/tdfx_drv.c 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm/tdfx_drv.c 2003-04-22 16:44:36.000000000 +0100 @@ -82,25 +82,6 @@ #include "drm_drawable.h" #include "drm_drv.h" -#ifndef MODULE -/* DRM(options) is called by the kernel to parse command-line options - * passed via the boot-loader (e.g., LILO). It calls the insmod option - * routine, drm_parse_drm. - */ - -/* JH- We have to hand expand the string ourselves because of the cpp. If - * anyone can think of a way that we can fit into the __setup macro without - * changing it, then please send the solution my way. - */ -static int __init tdfx_options( char *str ) -{ - DRM(parse_options)( str ); - return 1; -} - -__setup( DRIVER_NAME "=", tdfx_options ); -#endif - #include "drm_fops.h" #include "drm_init.h" #include "drm_ioctl.h" diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm-4.0/agpsupport.c linux.21rc1-ac1/drivers/char/drm-4.0/agpsupport.c --- linux.21rc1/drivers/char/drm-4.0/agpsupport.c 2003-04-22 16:39:34.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm-4.0/agpsupport.c 2003-04-22 16:44:36.000000000 +0100 @@ -277,7 +277,6 @@ break; case VIA_APOLLO_KT400: head->chipset = "VIA Apollo KT400"; break; - case VIA_APOLLO_P4X400: head->chipset = "VIA Apollo P4X400"; #endif case VIA_APOLLO_PRO: head->chipset = "VIA Apollo Pro"; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/drm-4.0/tdfx_drv.c linux.21rc1-ac1/drivers/char/drm-4.0/tdfx_drv.c --- linux.21rc1/drivers/char/drm-4.0/tdfx_drv.c 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/drm-4.0/tdfx_drv.c 2003-04-22 16:44:36.000000000 +0100 @@ -554,7 +554,6 @@ lock.context, current->pid, j, dev->lock.lock_time, jiffies); current->state = TASK_INTERRUPTIBLE; - current->policy |= SCHED_YIELD; schedule_timeout(DRM_LOCK_SLICE-j); DRM_DEBUG("jiffies=%d\n", jiffies); } diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/dz.c linux.21rc1-ac1/drivers/char/dz.c --- linux.21rc1/drivers/char/dz.c 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/dz.c 2003-04-22 16:44:36.000000000 +0100 @@ -1054,7 +1054,7 @@ restore_flags(flags); return; } - if ((tty->count == 1) && (info->count != 1)) { + if ((atomic_read(&tty->count) == 1) && (info->count != 1)) { /* * Uh, oh. tty->count is 1, which means that the tty * structure will be freed. Info->count should always diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/esp.c linux.21rc1-ac1/drivers/char/esp.c --- linux.21rc1/drivers/char/esp.c 2003-04-22 16:38:39.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/esp.c 2003-04-22 16:44:36.000000000 +0100 @@ -136,7 +136,7 @@ #if defined(MODULE) && defined(SERIAL_DEBUG_MCOUNT) #define DBG_CNT(s) printk("(%s): [%x] refc=%d, serc=%d, ttyc=%d -> %s\n", \ - kdevname(tty->device), (info->flags), serial_refcount,info->count,tty->count,s) + kdevname(tty->device), (info->flags), serial_refcount,info->count,atomic_read(&tty->count),s) #else #define DBG_CNT(s) #endif @@ -2051,7 +2051,7 @@ #ifdef SERIAL_DEBUG_OPEN printk("rs_close ttys%d, count = %d\n", info->line, info->count); #endif - if ((tty->count == 1) && (info->count != 1)) { + if ((atomic_read(&tty->count) == 1) && (info->count != 1)) { /* * Uh, oh. tty->count is 1, which means that the tty * structure will be freed. Info->count should always diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/generic_serial.c linux.21rc1-ac1/drivers/char/generic_serial.c --- linux.21rc1/drivers/char/generic_serial.c 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/generic_serial.c 2003-04-22 16:44:36.000000000 +0100 @@ -753,7 +753,7 @@ return; } - if ((tty->count == 1) && (port->count != 1)) { + if ((atomic_read(&tty->count) == 1) && (port->count != 1)) { printk(KERN_ERR "gs: gs_close: bad port count;" " tty->count is 1, port count is %d\n", port->count); port->count = 1; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/ip2main.c linux.21rc1-ac1/drivers/char/ip2main.c --- linux.21rc1/drivers/char/ip2main.c 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/ip2main.c 2003-04-22 16:44:37.000000000 +0100 @@ -372,7 +372,7 @@ #if defined(MODULE) && defined(IP2DEBUG_OPEN) #define DBG_CNT(s) printk(KERN_DEBUG "(%s): [%x] refc=%d, ttyc=%d, modc=%x -> %s\n", \ kdevname(tty->device),(pCh->flags),ref_count, \ - tty->count,/*GET_USE_COUNT(module)*/0,s) + atomic_read(&tty->count),/*GET_USE_COUNT(module)*/0,s) #else #define DBG_CNT(s) #endif @@ -1740,7 +1740,7 @@ noblock: /* first open - Assign termios structure to port */ - if ( tty->count == 1 ) { + if ( atomic_read(&tty->count) == 1 ) { i2QueueCommands(PTYPE_INLINE, pCh, 0, 2, CMD_CTSFL_DSAB, CMD_RTSFL_DSAB); if ( pCh->flags & ASYNC_SPLIT_TERMIOS ) { if ( tty->driver.subtype == SERIAL_TYPE_NORMAL ) { @@ -1805,7 +1805,7 @@ return; } - if ( tty->count > 1 ) { /* not the last close */ + if ( atomic_read(&tty->count) > 1 ) { /* not the last close */ MOD_DEC_USE_COUNT; ip2trace (CHANN, ITRC_CLOSE, 2, 1, 3 ); @@ -3364,7 +3364,7 @@ pCh = DevTable[i]; if (pCh) { tty = pCh->pTTY; - if (tty && tty->count) { + if (tty && atomic_read(&tty->count)) { len += sprintf(buf+len,FMTLINE,i,(int)tty->flags,pCh->flags, tty->termios->c_cflag,tty->termios->c_iflag); diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/ipmi/ipmi_devintf.c linux.21rc1-ac1/drivers/char/ipmi/ipmi_devintf.c --- linux.21rc1/drivers/char/ipmi/ipmi_devintf.c 2003-04-22 16:39:34.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/ipmi/ipmi_devintf.c 2003-04-22 18:21:37.000000000 +0100 @@ -81,10 +81,10 @@ unsigned int mask = 0; unsigned long flags; - spin_lock_irqsave(&priv->recv_msg_lock, flags); - poll_wait(file, &priv->wait, wait); + spin_lock_irqsave(&priv->recv_msg_lock, flags); + if (! list_empty(&(priv->recv_msgs))) mask |= (POLLIN | POLLRDNORM); diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/ipmi/ipmi_kcs_intf.c linux.21rc1-ac1/drivers/char/ipmi/ipmi_kcs_intf.c --- linux.21rc1/drivers/char/ipmi/ipmi_kcs_intf.c 2003-04-22 16:39:34.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/ipmi/ipmi_kcs_intf.c 2003-04-22 18:21:37.000000000 +0100 @@ -60,6 +60,14 @@ /* Measure times between events in the driver. */ #undef DEBUG_TIMING +/* Timing parameters. Call every 10 ms when not doing anything, + otherwise call every KCS_SHORT_TIMEOUT_USEC microseconds. */ +#define KCS_TIMEOUT_TIME_USEC 10000 +#define KCS_USEC_PER_JIFFY (1000000/HZ) +#define KCS_TIMEOUT_JIFFIES (KCS_TIMEOUT_TIME_USEC/KCS_USEC_PER_JIFFY) +#define KCS_SHORT_TIMEOUT_USEC 250 /* .25ms when the SM request a + short timeout */ + #ifdef CONFIG_IPMI_KCS /* This forces a dependency to the config file for this option. */ #endif @@ -131,6 +139,8 @@ int interrupt_disabled; }; +static void kcs_restart_short_timer(struct kcs_info *kcs_info); + static void deliver_recv_msg(struct kcs_info *kcs_info, struct ipmi_smi_msg *msg) { /* Deliver the message to the upper layer with the lock @@ -308,6 +318,9 @@ #endif switch (kcs_info->kcs_state) { case KCS_NORMAL: + if (!kcs_info->curr_msg) + break; + kcs_info->curr_msg->rsp_size = kcs_get_result(kcs_info->kcs_sm, kcs_info->curr_msg->rsp, @@ -562,8 +575,9 @@ spin_lock_irqsave(&(kcs_info->kcs_lock), flags); result = kcs_event_handler(kcs_info, 0); while (result != KCS_SM_IDLE) { - udelay(500); - result = kcs_event_handler(kcs_info, 500); + udelay(KCS_SHORT_TIMEOUT_USEC); + result = kcs_event_handler(kcs_info, + KCS_SHORT_TIMEOUT_USEC); } spin_unlock_irqrestore(&(kcs_info->kcs_lock), flags); return; @@ -581,6 +595,7 @@ && (kcs_info->curr_msg == NULL)) { start_next_msg(kcs_info); + kcs_restart_short_timer(kcs_info); } spin_unlock_irqrestore(&(kcs_info->kcs_lock), flags); } @@ -597,8 +612,9 @@ if (i_run_to_completion) { result = kcs_event_handler(kcs_info, 0); while (result != KCS_SM_IDLE) { - udelay(500); - result = kcs_event_handler(kcs_info, 500); + udelay(KCS_SHORT_TIMEOUT_USEC); + result = kcs_event_handler(kcs_info, + KCS_SHORT_TIMEOUT_USEC); } } @@ -624,14 +640,40 @@ MOD_DEC_USE_COUNT; } -/* Call every 10 ms. */ -#define KCS_TIMEOUT_TIME_USEC 10000 -#define KCS_USEC_PER_JIFFY (1000000/HZ) -#define KCS_TIMEOUT_JIFFIES (KCS_TIMEOUT_TIME_USEC/KCS_USEC_PER_JIFFY) -#define KCS_SHORT_TIMEOUT_USEC 500 /* .5ms when the SM request a - short timeout */ static int initialized = 0; +/* Must be called with interrupts off and with the kcs_lock held. */ +static void kcs_restart_short_timer(struct kcs_info *kcs_info) +{ +#ifdef CONFIG_HIGH_RES_TIMERS + unsigned long jiffies_now; + + if (del_timer(&(kcs_info->kcs_timer))) { + /* If we don't delete the timer, then it will go off + immediately, anyway. So we only process if we + actually delete the timer. */ + + /* We already have irqsave on, so no need for it + here. */ + read_lock(&xtime_lock); + jiffies_now = jiffies; + kcs_info->kcs_timer.expires = jiffies_now; + + kcs_info->kcs_timer.sub_expires + = quick_update_jiffies_sub(jiffies_now); + read_unlock(&xtime_lock); + + kcs_info->kcs_timer.sub_expires + += usec_to_arch_cycles(KCS_SHORT_TIMEOUT_USEC); + while (kcs_info->kcs_timer.sub_expires >= cycles_per_jiffies) { + kcs_info->kcs_timer.expires++; + kcs_info->kcs_timer.sub_expires -= cycles_per_jiffies; + } + add_timer(&(kcs_info->kcs_timer)); + } +#endif +} + static void kcs_timeout(unsigned long data) { struct kcs_info *kcs_info = (struct kcs_info *) data; @@ -654,12 +696,11 @@ printk("**Timer: %d.%9.9d\n", t.tv_sec, t.tv_usec); #endif jiffies_now = jiffies; + time_diff = ((jiffies_now - kcs_info->last_timeout_jiffies) * KCS_USEC_PER_JIFFY); kcs_result = kcs_event_handler(kcs_info, time_diff); - spin_unlock_irqrestore(&(kcs_info->kcs_lock), flags); - kcs_info->last_timeout_jiffies = jiffies_now; if ((kcs_info->irq) && (! kcs_info->interrupt_disabled)) { @@ -680,6 +721,7 @@ } } else { kcs_info->kcs_timer.expires = jiffies + KCS_TIMEOUT_JIFFIES; + kcs_info->kcs_timer.sub_expires = 0; } #else /* If requested, take the shortest delay possible */ @@ -692,6 +734,7 @@ do_add_timer: add_timer(&(kcs_info->kcs_timer)); + spin_unlock_irqrestore(&(kcs_info->kcs_lock), flags); } static void kcs_irq_handler(int irq, void *data, struct pt_regs *regs) @@ -838,7 +881,7 @@ if (kcs_port && kcs_physaddr) return -EINVAL; - new_kcs = kmalloc(kcs_size(), GFP_KERNEL); + new_kcs = kmalloc(sizeof(*new_kcs), GFP_KERNEL); if (!new_kcs) { printk(KERN_ERR "ipmi_kcs: out of memory\n"); return -ENOMEM; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/ipmi/ipmi_kcs_sm.c linux.21rc1-ac1/drivers/char/ipmi/ipmi_kcs_sm.c --- linux.21rc1/drivers/char/ipmi/ipmi_kcs_sm.c 2003-04-22 16:39:34.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/ipmi/ipmi_kcs_sm.c 2003-04-22 18:21:37.000000000 +0100 @@ -468,7 +468,7 @@ break; case KCS_HOSED: - return KCS_SM_HOSED; + break; } if (kcs->state == KCS_HOSED) { diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/ipmi/ipmi_msghandler.c linux.21rc1-ac1/drivers/char/ipmi/ipmi_msghandler.c --- linux.21rc1/drivers/char/ipmi/ipmi_msghandler.c 2003-04-22 16:39:34.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/ipmi/ipmi_msghandler.c 2003-04-22 18:21:37.000000000 +0100 @@ -174,8 +174,8 @@ int ipmi_register_all_cmd_rcvr(ipmi_user_t user) { - int flags; - int rv = -EBUSY; + unsigned long flags; + int rv = -EBUSY; write_lock_irqsave(&(user->intf->users_lock), flags); write_lock(&(user->intf->cmd_rcvr_lock)); @@ -193,8 +193,8 @@ int ipmi_unregister_all_cmd_rcvr(ipmi_user_t user) { - int flags; - int rv = -EINVAL; + unsigned long flags; + int rv = -EINVAL; write_lock_irqsave(&(user->intf->users_lock), flags); write_lock(&(user->intf->cmd_rcvr_lock)); @@ -1022,7 +1022,7 @@ int rv; ipmi_smi_t new_intf; struct list_head *entry; - unsigned int flags; + unsigned long flags; /* Make sure the driver is actually initialized, this handles @@ -1156,7 +1156,7 @@ int rv = -ENODEV; int i; struct list_head *entry; - unsigned int flags; + unsigned long flags; down_write(&interfaces_sem); if (list_empty(&(intf->users))) @@ -1773,9 +1773,13 @@ } +static atomic_t smi_msg_inuse_count = ATOMIC_INIT(0); +static atomic_t recv_msg_inuse_count = ATOMIC_INIT(0); + /* FIXME - convert these to slabs. */ static void free_smi_msg(struct ipmi_smi_msg *msg) { + atomic_dec(&smi_msg_inuse_count); kfree(msg); } @@ -1783,13 +1787,16 @@ { struct ipmi_smi_msg *rv; rv = kmalloc(sizeof(struct ipmi_smi_msg), GFP_ATOMIC); - if (rv) + if (rv) { rv->done = free_smi_msg; + atomic_inc(&smi_msg_inuse_count); + } return rv; } static void free_recv_msg(struct ipmi_recv_msg *msg) { + atomic_dec(&recv_msg_inuse_count); kfree(msg); } @@ -1798,8 +1805,10 @@ struct ipmi_recv_msg *rv; rv = kmalloc(sizeof(struct ipmi_recv_msg), GFP_ATOMIC); - if (rv) + if (rv) { rv->done = free_recv_msg; + atomic_inc(&recv_msg_inuse_count); + } return rv; } @@ -1932,6 +1941,8 @@ static __exit void cleanup_ipmi(void) { + int count; + if (!initialized) return; @@ -1948,6 +1959,16 @@ } initialized = 0; + + /* Check for buffer leaks. */ + count = atomic_read(&smi_msg_inuse_count); + if (count != 0) + printk("ipmi_msghandler: SMI message count %d at exit\n", + count); + count = atomic_read(&recv_msg_inuse_count); + if (count != 0) + printk("ipmi_msghandler: recv message count %d at exit\n", + count); } module_exit(cleanup_ipmi); diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/ipmi/ipmi_watchdog.c linux.21rc1-ac1/drivers/char/ipmi/ipmi_watchdog.c --- linux.21rc1/drivers/char/ipmi/ipmi_watchdog.c 2003-04-22 16:39:34.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/ipmi/ipmi_watchdog.c 2003-04-22 18:21:37.000000000 +0100 @@ -215,13 +215,13 @@ struct ipmi_recv_msg *recv_msg, int *send_heartbeat_now) { - struct ipmi_msg msg; - unsigned char data[6]; - int rv; + struct ipmi_msg msg; + unsigned char data[6]; + int rv; struct ipmi_system_interface_addr addr; + int hbnow = 0; - *send_heartbeat_now = 0; data[0] = 0; WDOG_SET_TIMER_USE(data[0], WDOG_TIMER_USE_SMS_OS); @@ -233,7 +233,7 @@ } else if (ipmi_watchdog_state != WDOG_TIMEOUT_NONE) { /* In ipmi 1.0, setting the timer stops the watchdog, we need to start it back up again. */ - *send_heartbeat_now = 1; + hbnow = 1; } data[1] = 0; @@ -268,10 +268,18 @@ rv); } + if (send_heartbeat_now) + *send_heartbeat_now = hbnow; + return rv; } -static int ipmi_set_timeout(void) +/* Parameters to ipmi_set_timeout */ +#define IPMI_SET_TIMEOUT_NO_HB 0 +#define IPMI_SET_TIMEOUT_HB_IF_NECESSARY 1 +#define IPMI_SET_TIMEOUT_FORCE_HB 2 + +static int ipmi_set_timeout(int do_heartbeat) { int send_heartbeat_now; int rv; @@ -288,8 +296,12 @@ if (rv) { up(&set_timeout_lock); } else { - if (send_heartbeat_now) + if ((do_heartbeat == IPMI_SET_TIMEOUT_FORCE_HB) + || ((send_heartbeat_now) + && (do_heartbeat == IPMI_SET_TIMEOUT_HB_IF_NECESSARY))) + { rv = ipmi_heartbeat(); + } } return rv; @@ -312,7 +324,7 @@ /* Special call, doesn't claim any locks. This is only to be called at panic or halt time, in run-to-completion mode, when the caller - is the only CPU and the only thing that will be going IPMI + is the only CPU and the only thing that will be going is these IPMI calls. */ static void panic_halt_ipmi_set_timeout(void) { @@ -339,7 +351,7 @@ else ipmi_watchdog_state = WDOG_TIMEOUT_RESET; timeout = delay; - ipmi_set_timeout(); + ipmi_set_timeout(IPMI_SET_TIMEOUT_HB_IF_NECESSARY); } /* We use a semaphore to make sure that only one thing can send a @@ -390,16 +402,14 @@ if (ipmi_start_timer_on_heartbeat) { ipmi_start_timer_on_heartbeat = 0; ipmi_watchdog_state = action_val; - return ipmi_set_timeout(); - } - - if (pretimeout_since_last_heartbeat) { + return ipmi_set_timeout(IPMI_SET_TIMEOUT_FORCE_HB); + } else if (pretimeout_since_last_heartbeat) { /* A pretimeout occurred, make sure we set the timeout. We don't want to set the action, though, we want to leave that alone (thus it can't be combined with the above operation. */ pretimeout_since_last_heartbeat = 0; - return ipmi_set_timeout(); + return ipmi_set_timeout(IPMI_SET_TIMEOUT_HB_IF_NECESSARY); } down(&heartbeat_lock); @@ -501,7 +511,7 @@ if (i) return -EFAULT; timeout = val; - return ipmi_set_timeout(); + return ipmi_set_timeout(IPMI_SET_TIMEOUT_HB_IF_NECESSARY); case WDIOC_GETTIMEOUT: i = copy_to_user((void *) arg, @@ -516,7 +526,7 @@ if (i) return -EFAULT; pretimeout = val; - return ipmi_set_timeout(); + return ipmi_set_timeout(IPMI_SET_TIMEOUT_HB_IF_NECESSARY); case WDIOC_GET_PRETIMEOUT: i = copy_to_user((void *) arg, @@ -536,14 +546,14 @@ if (val & WDIOS_DISABLECARD) { ipmi_watchdog_state = WDOG_TIMEOUT_NONE; - ipmi_set_timeout(); + ipmi_set_timeout(IPMI_SET_TIMEOUT_NO_HB); ipmi_start_timer_on_heartbeat = 0; } if (val & WDIOS_ENABLECARD) { ipmi_watchdog_state = action_val; - ipmi_set_timeout(); + ipmi_set_timeout(IPMI_SET_TIMEOUT_FORCE_HB); } return 0; @@ -679,7 +689,7 @@ { #ifndef CONFIG_WATCHDOG_NOWAYOUT ipmi_watchdog_state = WDOG_TIMEOUT_NONE; - ipmi_set_timeout(); + ipmi_set_timeout(IPMI_SET_TIMEOUT_NO_HB); #endif ipmi_wdog_open = 0; } @@ -731,14 +741,14 @@ wake_up_interruptible(&read_q); kill_fasync(&fasync_q, SIGIO, POLL_IN); - /* On some machines, the heartbeat will give - an error and not work unless we re-enable - the timer. So do so. */ - pretimeout_since_last_heartbeat = 1; - spin_unlock(&ipmi_read_lock); } } + + /* On some machines, the heartbeat will give + an error and not work unless we re-enable + the timer. So do so. */ + pretimeout_since_last_heartbeat = 1; } static struct ipmi_user_hndl ipmi_hndlrs = @@ -751,7 +761,7 @@ { int rv = -EBUSY; - down_read(®ister_sem); + down_write(®ister_sem); if (watchdog_user) goto out; @@ -779,7 +789,7 @@ /* Run from startup, so start the timer now. */ start_now = 0; /* Disable this function after first startup. */ ipmi_watchdog_state = action_val; - ipmi_set_timeout(); + ipmi_set_timeout(IPMI_SET_TIMEOUT_FORCE_HB); printk("Starting IPMI Watchdog now!\n"); } } @@ -792,6 +802,12 @@ watchdog. */ if ((!handled) && (preop_val == WDOG_PREOP_PANIC)) panic("IPMI watchdog pre-timeout"); + + /* On some machines, the heartbeat will give + an error and not work unless we re-enable + the timer. So do so. */ + pretimeout_since_last_heartbeat = 1; + return NOTIFY_DONE; } @@ -916,7 +932,7 @@ } else if (strcmp(preaction, "pre_int") == 0) { preaction_val = WDOG_PRETIMEOUT_MSG_INT; } else { - action_val = WDOG_PRETIMEOUT_NONE; + preaction_val = WDOG_PRETIMEOUT_NONE; printk("ipmi_watchdog: Unknown preaction '%s', defaulting to" " none\n", preaction); } @@ -928,7 +944,7 @@ } else if (strcmp(preop, "preop_give_data") == 0) { preop_val = WDOG_PREOP_GIVE_DATA; } else { - action_val = WDOG_PREOP_NONE; + preop_val = WDOG_PREOP_NONE; printk("ipmi_watchdog: Unknown preop '%s', defaulting to" " none\n", preop); } @@ -1008,7 +1024,7 @@ /* Disable the timer. */ ipmi_watchdog_state = WDOG_TIMEOUT_NONE; - ipmi_set_timeout(); + ipmi_set_timeout(IPMI_SET_TIMEOUT_NO_HB); /* Wait to make sure the message makes it out. The lower layer has pointers to our buffers, we want to make sure they are done before diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/isicom.c linux.21rc1-ac1/drivers/char/isicom.c --- linux.21rc1/drivers/char/isicom.c 2003-04-22 16:39:34.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/isicom.c 2003-04-22 16:44:37.000000000 +0100 @@ -1160,7 +1160,7 @@ return; } - if ((tty->count == 1) && (port->count != 1)) { + if ((atomic_read(&tty->count) == 1) && (port->count != 1)) { printk(KERN_WARNING "ISICOM:(0x%x) isicom_close: bad port count" "tty->count = 1 port count = %d.\n", card->base, port->count); diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/istallion.c linux.21rc1-ac1/drivers/char/istallion.c --- linux.21rc1/drivers/char/istallion.c 2003-04-22 16:38:41.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/istallion.c 2003-04-22 16:44:37.000000000 +0100 @@ -1173,7 +1173,7 @@ restore_flags(flags); return; } - if ((tty->count == 1) && (portp->refcount != 1)) + if ((atomic_read(&tty->count) == 1) && (portp->refcount != 1)) portp->refcount = 1; if (portp->refcount-- > 1) { MOD_DEC_USE_COUNT; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/Makefile linux.21rc1-ac1/drivers/char/Makefile --- linux.21rc1/drivers/char/Makefile 2003-04-22 16:39:34.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/Makefile 2003-04-22 16:44:37.000000000 +0100 @@ -199,6 +199,12 @@ obj-$(CONFIG_SYNCLINKMP) += synclinkmp.o obj-$(CONFIG_N_HDLC) += n_hdlc.o obj-$(CONFIG_SPECIALIX) += specialix.o + +subdir-$(CONFIG_ATI_CD1865) += cd1865 +ifeq ($(CONFIG_ATI_CD1865),y) + obj-y += cd1865/SILX.o +endif + obj-$(CONFIG_AMIGA_BUILTIN_SERIAL) += amiserial.o obj-$(CONFIG_A2232) += ser_a2232.o generic_serial.o obj-$(CONFIG_SX) += sx.o generic_serial.o diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/moxa.c linux.21rc1-ac1/drivers/char/moxa.c --- linux.21rc1/drivers/char/moxa.c 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/moxa.c 2003-04-22 16:44:37.000000000 +0100 @@ -642,7 +642,7 @@ } ch = (struct moxa_str *) tty->driver_data; - if ((tty->count == 1) && (ch->count != 1)) { + if ((atomic_read(&tty->count) == 1) && (ch->count != 1)) { printk("moxa_close: bad serial port count; tty->count is 1, " "ch->count is %d\n", ch->count); ch->count = 1; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/mwave/mwavedd.c linux.21rc1-ac1/drivers/char/mwave/mwavedd.c --- linux.21rc1/drivers/char/mwave/mwavedd.c 2003-04-22 16:39:34.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/mwave/mwavedd.c 2003-04-22 16:44:37.000000000 +0100 @@ -279,7 +279,6 @@ pDrvData->IPCs[ipcnum].bIsHere = FALSE; pDrvData->IPCs[ipcnum].bIsEnabled = TRUE; #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,0) - current->nice = -20; /* boost to provide priority timing */ #else current->priority = 0x28; /* boost to provide priority timing */ #endif diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/mxser.c linux.21rc1-ac1/drivers/char/mxser.c --- linux.21rc1/drivers/char/mxser.c 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/mxser.c 2003-04-22 16:44:37.000000000 +0100 @@ -824,7 +824,7 @@ MOD_DEC_USE_COUNT; return; } - if ((tty->count == 1) && (info->count != 1)) { + if ((atomic_read(&tty->count) == 1) && (info->count != 1)) { /* * Uh, oh. tty->count is 1, which means that the tty * structure will be freed. Info->count should always diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/n_hdlc.c linux.21rc1-ac1/drivers/char/n_hdlc.c --- linux.21rc1/drivers/char/n_hdlc.c 2003-04-22 16:38:46.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/n_hdlc.c 2003-04-22 16:44:37.000000000 +0100 @@ -9,7 +9,7 @@ * Al Longyear , Paul Mackerras * * Original release 01/11/99 - * $Id: n_hdlc.c,v 3.3 2001/11/08 16:16:03 paulkf Exp $ + * $Id: n_hdlc.c,v 3.6 2002/12/19 18:58:56 paulkf Exp $ * * This code is released under the GNU General Public License (GPL) * @@ -78,7 +78,7 @@ */ #define HDLC_MAGIC 0x239e -#define HDLC_VERSION "$Revision: 3.3 $" +#define HDLC_VERSION "$Revision: 3.6 $" #include #include @@ -172,9 +172,9 @@ /* * HDLC buffer list manipulation functions */ -void n_hdlc_buf_list_init(N_HDLC_BUF_LIST *list); -void n_hdlc_buf_put(N_HDLC_BUF_LIST *list,N_HDLC_BUF *buf); -N_HDLC_BUF* n_hdlc_buf_get(N_HDLC_BUF_LIST *list); +static void n_hdlc_buf_list_init(N_HDLC_BUF_LIST *list); +static void n_hdlc_buf_put(N_HDLC_BUF_LIST *list,N_HDLC_BUF *buf); +static N_HDLC_BUF* n_hdlc_buf_get(N_HDLC_BUF_LIST *list); /* Local functions */ @@ -186,10 +186,10 @@ /* debug level can be set by insmod for debugging purposes */ #define DEBUG_LEVEL_INFO 1 -int debuglevel=0; +static int debuglevel=0; /* max frame size for memory allocations */ -ssize_t maxframe=4096; +static ssize_t maxframe=4096; /* TTY callbacks */ @@ -265,7 +265,8 @@ } else break; } - + if (n_hdlc->tbuf) + kfree(n_hdlc->tbuf); kfree(n_hdlc); } /* end of n_hdlc_release() */ @@ -905,7 +906,7 @@ * Arguments: list pointer to buffer list * Return Value: None */ -void n_hdlc_buf_list_init(N_HDLC_BUF_LIST *list) +static void n_hdlc_buf_list_init(N_HDLC_BUF_LIST *list) { memset(list,0,sizeof(N_HDLC_BUF_LIST)); spin_lock_init(&list->spinlock); @@ -922,7 +923,7 @@ * * Return Value: None */ -void n_hdlc_buf_put(N_HDLC_BUF_LIST *list,N_HDLC_BUF *buf) +static void n_hdlc_buf_put(N_HDLC_BUF_LIST *list,N_HDLC_BUF *buf) { unsigned long flags; spin_lock_irqsave(&list->spinlock,flags); @@ -952,7 +953,7 @@ * * pointer to HDLC buffer if available, otherwise NULL */ -N_HDLC_BUF* n_hdlc_buf_get(N_HDLC_BUF_LIST *list) +static N_HDLC_BUF* n_hdlc_buf_get(N_HDLC_BUF_LIST *list) { unsigned long flags; N_HDLC_BUF *buf; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/n_tty.c linux.21rc1-ac1/drivers/char/n_tty.c --- linux.21rc1/drivers/char/n_tty.c 2003-04-22 16:38:39.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/n_tty.c 2003-04-22 16:44:37.000000000 +0100 @@ -119,7 +119,7 @@ */ static void check_unthrottle(struct tty_struct * tty) { - if (tty->count && + if (atomic_read(&tty->count) && test_and_clear_bit(TTY_THROTTLED, &tty->flags) && tty->driver.unthrottle) tty->driver.unthrottle(tty); @@ -1170,7 +1170,8 @@ retval = -ERESTARTSYS; break; } - if (tty_hung_up_p(file) || (tty->link && !tty->link->count)) { + if (tty_hung_up_p(file) || + (tty->link && !atomic_read(&tty->link->count))) { retval = -EIO; break; } diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/nwflash.c linux.21rc1-ac1/drivers/char/nwflash.c --- linux.21rc1/drivers/char/nwflash.c 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/nwflash.c 2003-04-22 16:44:37.000000000 +0100 @@ -154,12 +154,11 @@ if (down_interruptible(&nwflash_sem)) return -ERESTARTSYS; - ret = copy_to_user(buf, (void *)(FLASH_BASE + p), count); - if (ret == 0) { - ret = count; - *ppos += count; - } + ret = count - copy_to_user(buf, (void *)(FLASH_BASE + p), count); + *ppos += ret; up(&nwflash_sem); + if (ret == 0) + ret = -EFAULT; } return ret; } diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/pc_keyb.c linux.21rc1-ac1/drivers/char/pc_keyb.c --- linux.21rc1/drivers/char/pc_keyb.c 2003-04-22 16:38:46.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/pc_keyb.c 2003-04-22 16:44:37.000000000 +0100 @@ -1225,41 +1225,13 @@ #endif /* CONFIG_PSMOUSE */ -static int blink_frequency = HZ/2; +void pckbd_blink (char led) { + led = led ? (0x01 | 0x04) : 0x00; -/* Tell the user who may be running in X and not see the console that we have - panic'ed. This is to distingush panics from "real" lockups. - Could in theory send the panic message as morse, but that is left as an - exercise for the reader. */ -void panic_blink(void) -{ - static unsigned long last_jiffie; - static char led; - /* Roughly 1/2s frequency. KDB uses about 1s. Make sure it is - different. */ - if (!blink_frequency) - return; - if (jiffies - last_jiffie > blink_frequency) { - led ^= 0x01 | 0x04; while (kbd_read_status() & KBD_STAT_IBF) mdelay(1); kbd_write_output(KBD_CMD_SET_LEDS); mdelay(1); while (kbd_read_status() & KBD_STAT_IBF) mdelay(1); mdelay(1); kbd_write_output(led); - last_jiffie = jiffies; - } -} - -static int __init panicblink_setup(char *str) -{ - int par; - if (get_option(&str,&par)) - blink_frequency = par*(1000/HZ); - return 1; } - -/* panicblink=0 disables the blinking as it caused problems with some console - switches. otherwise argument is ms of a blink period. */ -__setup("panicblink=", panicblink_setup); - diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/pcmcia/synclink_cs.c linux.21rc1-ac1/drivers/char/pcmcia/synclink_cs.c --- linux.21rc1/drivers/char/pcmcia/synclink_cs.c 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/pcmcia/synclink_cs.c 2003-04-22 16:44:37.000000000 +0100 @@ -2626,7 +2626,7 @@ if (!info->count || tty_hung_up_p(filp)) goto cleanup; - if ((tty->count == 1) && (info->count != 1)) { + if ((atomic_read(&tty->count) == 1) && (info->count != 1)) { /* * tty->count is 1 and the tty structure will be freed. * info->count should be one in this case. diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/pcxx.c linux.21rc1-ac1/drivers/char/pcxx.c --- linux.21rc1/drivers/char/pcxx.c 2003-04-22 16:38:46.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/pcxx.c 2003-04-22 16:44:37.000000000 +0100 @@ -581,7 +581,7 @@ return; } /* this check is in serial.c, it won't hurt to do it here too */ - if ((tty->count == 1) && (info->count != 1)) { + if ((atomic_read(&tty->count) == 1) && (info->count != 1)) { /* * Uh, oh. tty->count is 1, which means that the tty * structure will be freed. Info->count should always diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/pty.c linux.21rc1-ac1/drivers/char/pty.c --- linux.21rc1/drivers/char/pty.c 2003-04-22 16:38:39.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/pty.c 2003-04-22 16:44:37.000000000 +0100 @@ -70,13 +70,18 @@ static void pty_close(struct tty_struct * tty, struct file * filp) { + int count; + if (!tty) return; + + count = atomic_read(&tty->count); if (tty->driver.subtype == PTY_TYPE_MASTER) { - if (tty->count > 1) - printk("master pty_close: count = %d!!\n", tty->count); + if (count > 1) + printk("master pty_close: count = %d!!\n", + atomic_read(&tty->count)); } else { - if (tty->count > 2) + if (count > 2) return; } wake_up_interruptible(&tty->read_wait); @@ -329,7 +334,7 @@ goto out; if (test_bit(TTY_PTY_LOCK, &tty->link->flags)) goto out; - if (tty->link->count != 1) + if (atomic_read(&tty->link->count) != 1) goto out; clear_bit(TTY_OTHER_CLOSED, &tty->link->flags); diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/raw.c linux.21rc1-ac1/drivers/char/raw.c --- linux.21rc1/drivers/char/raw.c 2003-04-22 16:39:34.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/raw.c 2003-04-22 16:44:37.000000000 +0100 @@ -86,12 +86,6 @@ filp->f_op = &raw_ctl_fops; return 0; } - - if (!filp->f_iobuf) { - err = alloc_kiovec(1, &filp->f_iobuf); - if (err) - return err; - } down(&raw_devices[minor].mutex); /* @@ -292,7 +286,6 @@ size_t size, loff_t *offp) { struct kiobuf * iobuf; - int new_iobuf; int err = 0; unsigned long blocknr, blocks; size_t transferred; @@ -311,18 +304,10 @@ minor = MINOR(filp->f_dentry->d_inode->i_rdev); - new_iobuf = 0; - iobuf = filp->f_iobuf; - if (test_and_set_bit(0, &filp->f_iobuf_lock)) { - /* - * A parallel read/write is using the preallocated iobuf - * so just run slow and allocate a new one. - */ - err = alloc_kiovec(1, &iobuf); - if (err) - goto out; - new_iobuf = 1; - } + err = alloc_kiovec(1, &iobuf); + if (err) + return err; + dev = to_kdev_t(raw_devices[minor].binding->bd_dev); sector_size = raw_devices[minor].sector_size; @@ -395,10 +380,6 @@ } out_free: - if (!new_iobuf) - clear_bit(0, &filp->f_iobuf_lock); - else - free_kiovec(1, &iobuf); - out: + free_kiovec(1, &iobuf); return err; } diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/riscom8.c linux.21rc1-ac1/drivers/char/riscom8.c --- linux.21rc1/drivers/char/riscom8.c 2003-04-22 16:38:46.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/riscom8.c 2003-04-22 16:44:37.000000000 +0100 @@ -1142,7 +1142,7 @@ goto out; bp = port_Board(port); - if ((tty->count == 1) && (port->count != 1)) { + if ((atomic_read(&tty->count) == 1) && (port->count != 1)) { printk(KERN_INFO "rc%d: rc_close: bad port count;" " tty->count is 1, port count is %d\n", board_No(bp), port->count); diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/rocket.c linux.21rc1-ac1/drivers/char/rocket.c --- linux.21rc1/drivers/char/rocket.c 2003-04-22 16:38:41.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/rocket.c 2003-04-22 16:44:37.000000000 +0100 @@ -1052,7 +1052,7 @@ restore_flags(flags); return; } - if ((tty->count == 1) && (info->count != 1)) { + if ((atomic_read(&tty->count) == 1) && (info->count != 1)) { /* * Uh, oh. tty->count is 1, which means that the tty * structure will be freed. Info->count should always diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/serial167.c linux.21rc1-ac1/drivers/char/serial167.c --- linux.21rc1/drivers/char/serial167.c 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/serial167.c 2003-04-22 16:44:37.000000000 +0100 @@ -1877,7 +1877,7 @@ printk("cy_close ttyS%d, count = %d\n", info->line, info->count); #endif - if ((tty->count == 1) && (info->count != 1)) { + if ((atomic_read(&tty->count) == 1) && (info->count != 1)) { /* * Uh, oh. tty->count is 1, which means that the tty * structure will be freed. Info->count should always diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/serial_amba.c linux.21rc1-ac1/drivers/char/serial_amba.c --- linux.21rc1/drivers/char/serial_amba.c 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/serial_amba.c 2003-04-22 16:44:37.000000000 +0100 @@ -1404,7 +1404,7 @@ return; } - if ((tty->count == 1) && (state->count != 1)) { + if ((atomic_read(&tty->count) == 1) && (state->count != 1)) { /* * Uh, oh. tty->count is 1, which means that the tty * structure will be freed. state->count should always diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/serial.c linux.21rc1-ac1/drivers/char/serial.c --- linux.21rc1/drivers/char/serial.c 2003-04-22 16:39:34.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/serial.c 2003-04-22 16:44:37.000000000 +0100 @@ -62,6 +62,10 @@ * Robert Schwebel , * Juergen Beisert , * Theodore Ts'o + * 4/02: added TTY_DO_WRITE_WAKEUP to enable n_tty to send POLL_OUTS + * to waiting processes + * Sapan Bhatia + * */ static char *serial_version = "5.05c"; @@ -203,6 +207,7 @@ #include #include #include +#include #if (LINUX_VERSION_CODE >= 131343) #include #endif @@ -370,7 +375,7 @@ #if defined(MODULE) && defined(SERIAL_DEBUG_MCOUNT) #define DBG_CNT(s) printk("(%s): [%x] refc=%d, serc=%d, ttyc=%d -> %s\n", \ - kdevname(tty->device), (info->flags), serial_refcount,info->count,tty->count,s) + kdevname(tty->device), (info->flags), serial_refcount,info->count,atomic_read(&tty->count),s) #else #define DBG_CNT(s) #endif @@ -1218,7 +1223,7 @@ if (!page) return -ENOMEM; - save_flags(flags); cli(); + spin_lock_irqsave( &info->irq_spinlock, flags); if (info->flags & ASYNC_INITIALIZED) { free_page(page); @@ -1456,11 +1461,11 @@ change_speed(info, 0); info->flags |= ASYNC_INITIALIZED; - restore_flags(flags); + spin_unlock_irqrestore( &info->irq_spinlock, flags); return 0; errout: - restore_flags(flags); + spin_unlock_irqrestore( &info->irq_spinlock, flags); return retval; } @@ -1484,7 +1489,7 @@ state->irq); #endif - save_flags(flags); cli(); /* Disable interrupts */ + spin_lock_irqsave( &info->irq_spinlock, flags); /* * clear delta_msr_wait queue to avoid mem leaks: we may free the irq @@ -1492,41 +1497,6 @@ */ wake_up_interruptible(&info->delta_msr_wait); - /* - * First unlink the serial port from the IRQ chain... - */ - if (info->next_port) - info->next_port->prev_port = info->prev_port; - if (info->prev_port) - info->prev_port->next_port = info->next_port; - else - IRQ_ports[state->irq] = info->next_port; - figure_IRQ_timeout(state->irq); - - /* - * Free the IRQ, if necessary - */ - if (state->irq && (!IRQ_ports[state->irq] || - !IRQ_ports[state->irq]->next_port)) { - if (IRQ_ports[state->irq]) { - free_irq(state->irq, &IRQ_ports[state->irq]); - retval = request_irq(state->irq, rs_interrupt_single, - SA_SHIRQ, "serial", - &IRQ_ports[state->irq]); - - if (retval) - printk("serial shutdown: request_irq: error %d" - " Couldn't reacquire IRQ.\n", retval); - } else - free_irq(state->irq, &IRQ_ports[state->irq]); - } - - if (info->xmit.buf) { - unsigned long pg = (unsigned long) info->xmit.buf; - info->xmit.buf = 0; - free_page(pg); - } - info->IER = 0; serial_outp(info, UART_IER, 0x00); /* disable all intrs */ #ifdef CONFIG_SERIAL_MANY_PORTS @@ -1583,7 +1553,43 @@ serial_outp(info, UART_IER, UART_IERX_SLEEP); } info->flags &= ~ASYNC_INITIALIZED; - restore_flags(flags); + + /* + * First unlink the serial port from the IRQ chain... + */ + if (info->next_port) + info->next_port->prev_port = info->prev_port; + if (info->prev_port) + info->prev_port->next_port = info->next_port; + else + IRQ_ports[state->irq] = info->next_port; + figure_IRQ_timeout(state->irq); + + /* + * Free the IRQ, if necessary + */ + if (state->irq && (!IRQ_ports[state->irq] || + !IRQ_ports[state->irq]->next_port)) { + if (IRQ_ports[state->irq]) { + free_irq(state->irq, &IRQ_ports[state->irq]); + retval = request_irq(state->irq, rs_interrupt_single, + SA_SHIRQ, "serial", + &IRQ_ports[state->irq]); + + if (retval) + printk("serial shutdown: request_irq: error %d" + " Couldn't reacquire IRQ.\n", retval); + } else + free_irq(state->irq, &IRQ_ports[state->irq]); + } + + if (info->xmit.buf) { + unsigned long pg = (unsigned long) info->xmit.buf; + info->xmit.buf = 0; + free_page(pg); + } + + spin_unlock_irqrestore( &info->irq_spinlock, flags); } #if (LINUX_VERSION_CODE < 131394) /* Linux 2.1.66 */ @@ -2791,7 +2797,7 @@ #ifdef SERIAL_DEBUG_OPEN printk("rs_close ttys%d, count = %d\n", info->line, state->count); #endif - if ((tty->count == 1) && (state->count != 1)) { + if ((atomic_read(&tty->count) == 1) && (state->count != 1)) { /* * Uh, oh. tty->count is 1, which means that the tty * structure will be freed. state->count should always @@ -3128,6 +3134,7 @@ info->tqueue.routine = do_softint; info->tqueue.data = info; info->state = sstate; + spin_lock_init(&info->irq_spinlock); if (sstate->info) { kfree(info); *ret_info = sstate->info; @@ -3242,6 +3249,7 @@ #ifdef SERIAL_DEBUG_OPEN printk("rs_open ttys%d successful...", info->line); #endif + set_bit(TTY_DO_WRITE_WAKEUP, &tty->flags); return 0; } @@ -3655,6 +3663,7 @@ info->io_type = state->io_type; info->iomem_base = state->iomem_base; info->iomem_reg_shift = state->iomem_reg_shift; + info->irq_spinlock= (spinlock_t) SPIN_LOCK_UNLOCKED; save_flags(flags); cli(); @@ -3907,7 +3916,14 @@ case 6: /* BAR 4*/ case 7: base_idx=idx-2; /* BAR 5*/ } - + + /* AFAVLAB uses a different mixture of BARs and offsets */ + /* Not that ugly ;) -- HW */ + if (dev->vendor == PCI_VENDOR_ID_AFAVLAB && idx >= 4) { + base_idx = 4; + offset = (idx - 4) * 8; + } + /* Some Titan cards are also a little weird */ if (dev->vendor == PCI_VENDOR_ID_TITAN && (dev->device == PCI_DEVICE_ID_TITAN_400L || @@ -4311,9 +4327,11 @@ pbn_b0_bt_1_115200, pbn_b0_bt_2_115200, + pbn_b0_bt_8_115200, pbn_b0_bt_1_460800, pbn_b0_bt_2_460800, pbn_b0_bt_2_921600, + pbn_b0_bt_4_460800, pbn_b1_1_115200, pbn_b1_2_115200, @@ -4392,9 +4410,11 @@ { SPCI_FL_BASE0 | SPCI_FL_BASE_TABLE, 1, 115200 }, /* pbn_b0_bt_1_115200 */ { SPCI_FL_BASE0 | SPCI_FL_BASE_TABLE, 2, 115200 }, /* pbn_b0_bt_2_115200 */ + { SPCI_FL_BASE0 | SPCI_FL_BASE_TABLE, 8, 115200 }, /* pbn_b0_bt_8_115200 */ { SPCI_FL_BASE0 | SPCI_FL_BASE_TABLE, 1, 460800 }, /* pbn_b0_bt_1_460800 */ { SPCI_FL_BASE0 | SPCI_FL_BASE_TABLE, 2, 460800 }, /* pbn_b0_bt_2_460800 */ { SPCI_FL_BASE0 | SPCI_FL_BASE_TABLE, 2, 921600 }, /* pbn_b0_bt_2_921600 */ + { SPCI_FL_BASE0 | SPCI_FL_BASE_TABLE, 4, 460800 }, /* pbn_b0_bt_4_460800 */ { SPCI_FL_BASE1, 1, 115200 }, /* pbn_b1_1_115200 */ { SPCI_FL_BASE1, 2, 115200 }, /* pbn_b1_2_115200 */ @@ -4859,6 +4879,12 @@ { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_QUAD_B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, pbn_b0_bt_2_460800 }, + { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_OCTO_A, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, + pbn_b0_bt_4_460800 }, + { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_OCTO_B, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, + pbn_b0_bt_4_460800 }, { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_SSERIAL, PCI_ANY_ID, PCI_ANY_ID, 0, 0, pbn_b0_bt_1_115200 }, @@ -4871,6 +4897,11 @@ PCI_ANY_ID, PCI_ANY_ID, 0, 0, pbn_b2_bt_2_115200 }, + /* AFAVLAB serial card, from Harald Welte */ + { PCI_VENDOR_ID_AFAVLAB, PCI_DEVICE_ID_AFAVLAB_P028, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, + pbn_b0_bt_8_115200 }, + /* EKF addition for i960 Boards form EKF with serial port */ { PCI_VENDOR_ID_INTEL, 0x1960, 0xE4BF, PCI_ANY_ID, 0, 0, @@ -4890,6 +4921,7 @@ 0x1048, 0x1500, 0, 0, pbn_b1_1_115200 }, + /* SGI IOC3 board */ { PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_IOC3, 0xFF00, 0, 0, 0, pbn_sgi_ioc3 }, @@ -5542,12 +5574,22 @@ tty_register_devfs(&callout_driver, 0, callout_driver.minor_start + state->line); } +#ifdef CONFIG_SERIAL_GSC + probe_serial_gsc(); +#endif +#ifdef CONFIG_SUPERIO + superio_serial_init(); +#endif #ifdef ENABLE_SERIAL_PCI probe_serial_pci(); #endif #ifdef ENABLE_SERIAL_PNP probe_serial_pnp(); #endif + // FIXME: Clean this one up +#if defined(CONFIG_SERIAL_CONSOLE) && defined(CONFIG_PARISC) + serial_console_init(); +#endif return 0; } @@ -5657,6 +5699,7 @@ info->io_type = req->io_type; info->iomem_base = req->iomem_base; info->iomem_reg_shift = req->iomem_reg_shift; + info->irq_spinlock= (spinlock_t) SPIN_LOCK_UNLOCKED; } autoconfig(state); if (state->type == PORT_UNKNOWN) { @@ -5964,6 +6007,7 @@ info->io_type = state->io_type; info->iomem_base = state->iomem_base; info->iomem_reg_shift = state->iomem_reg_shift; + info->irq_spinlock= (spinlock_t) SPIN_LOCK_UNLOCKED; quot = state->baud_base / baud; cval = cflag & (CSIZE | CSTOPB); #if defined(__powerpc__) || defined(__alpha__) diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/serial_txx927.c linux.21rc1-ac1/drivers/char/serial_txx927.c --- linux.21rc1/drivers/char/serial_txx927.c 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/serial_txx927.c 2003-04-22 16:44:37.000000000 +0100 @@ -155,7 +155,7 @@ #if defined(MODULE) && defined(SERIAL_DEBUG_MCOUNT) #define DBG_CNT(s) printk("(%s): [%x] refc=%d, serc=%d, ttyc=%d -> %s\n", \ - kdevname(tty->device), (info->flags), serial_refcount,info->count,tty->count,s) + kdevname(tty->device), (info->flags), serial_refcount,info->count,atomic_read(&tty->count),s) #else #define DBG_CNT(s) #endif @@ -1407,7 +1407,7 @@ #ifdef SERIAL_DEBUG_OPEN printk("rs_close ttys%d, count = %d\n", info->line, state->count); #endif - if ((tty->count == 1) && (state->count != 1)) { + if ((atomic_read(&tty->count) == 1) && (state->count != 1)) { /* * Uh, oh. tty->count is 1, which means that the tty * structure will be freed. state->count should always diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/sonypi.c linux.21rc1-ac1/drivers/char/sonypi.c --- linux.21rc1/drivers/char/sonypi.c 2003-04-22 16:39:34.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/sonypi.c 2003-04-22 16:44:37.000000000 +0100 @@ -162,7 +162,7 @@ } /* Disables the device - this comes from the AML code in the ACPI bios */ -static void __devexit sonypi_type1_dis(void) { +static void sonypi_type1_dis(void) { u32 v; pci_read_config_dword(sonypi_device.dev, SONYPI_G10A, &v); @@ -174,7 +174,7 @@ outl(v, SONYPI_IRQ_PORT); } -static void __devexit sonypi_type2_dis(void) { +static void sonypi_type2_dis(void) { if (ec_write(SONYPI_SHIB, 0)) printk(KERN_WARNING "ec_write failed\n"); if (ec_write(SONYPI_SLOB, 0)) @@ -696,14 +696,36 @@ } for (i = 0; irq_list[i].irq; i++) { - if (!request_irq(irq_list[i].irq, sonypi_irq, - SA_SHIRQ, "sonypi", sonypi_irq)) { - sonypi_device.irq = irq_list[i].irq; - sonypi_device.bits = irq_list[i].bits; + + sonypi_device.irq = irq_list[i].irq; + sonypi_device.bits = irq_list[i].bits; + + /* Enable sonypi IRQ settings */ + if (sonypi_device.model == SONYPI_DEVICE_MODEL_TYPE2) + sonypi_type2_srs(); + else + sonypi_type1_srs(); + + sonypi_call1(0x82); + sonypi_call2(0x81, 0xff); + if (compat) + sonypi_call1(0x92); + else + sonypi_call1(0x82); + + /* Now try requesting the irq from the system */ + if (!request_irq(sonypi_device.irq, sonypi_irq, + SA_SHIRQ, "sonypi", sonypi_irq)) break; - } + + /* If request_irq failed, disable sonypi IRQ settings */ + if (sonypi_device.model == SONYPI_DEVICE_MODEL_TYPE2) + sonypi_type2_dis(); + else + sonypi_type1_dis(); } - if (!sonypi_device.irq ) { + + if (!irq_list[i].irq) { printk(KERN_ERR "sonypi: request_irq failed\n"); ret = -ENODEV; goto out3; @@ -715,17 +737,6 @@ outb(0xf0, 0xb2); #endif - if (sonypi_device.model == SONYPI_DEVICE_MODEL_TYPE2) - sonypi_type2_srs(); - else - sonypi_type1_srs(); - - sonypi_call1(0x82); - sonypi_call2(0x81, 0xff); - if (compat) - sonypi_call1(0x92); - else - sonypi_call1(0x82); printk(KERN_INFO "sonypi: Sony Programmable I/O Controller Driver v%d.%d.\n", SONYPI_DRIVER_MAJORVERSION, diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/sonypi.h linux.21rc1-ac1/drivers/char/sonypi.h --- linux.21rc1/drivers/char/sonypi.h 2003-04-22 16:39:34.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/sonypi.h 2003-04-22 19:20:12.000000000 +0100 @@ -37,7 +37,7 @@ #ifdef __KERNEL__ #define SONYPI_DRIVER_MAJORVERSION 1 -#define SONYPI_DRIVER_MINORVERSION 18 +#define SONYPI_DRIVER_MINORVERSION 19 #define SONYPI_DEVICE_MODEL_TYPE1 1 #define SONYPI_DEVICE_MODEL_TYPE2 2 diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/specialix.c linux.21rc1-ac1/drivers/char/specialix.c --- linux.21rc1/drivers/char/specialix.c 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/specialix.c 2003-04-22 16:44:37.000000000 +0100 @@ -1517,7 +1517,7 @@ } bp = port_Board(port); - if ((tty->count == 1) && (port->count != 1)) { + if ((atomic_read(&tty->count) == 1) && (port->count != 1)) { printk(KERN_ERR "sx%d: sx_close: bad port count;" " tty->count is 1, port count is %d\n", board_No(bp), port->count); diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/stallion.c linux.21rc1-ac1/drivers/char/stallion.c --- linux.21rc1/drivers/char/stallion.c 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/stallion.c 2003-04-22 16:44:37.000000000 +0100 @@ -1197,7 +1197,7 @@ restore_flags(flags); return; } - if ((tty->count == 1) && (portp->refcount != 1)) + if ((atomic_read(&tty->count) == 1) && (portp->refcount != 1)) portp->refcount = 1; if (portp->refcount-- > 1) { MOD_DEC_USE_COUNT; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/synclink.c linux.21rc1-ac1/drivers/char/synclink.c --- linux.21rc1/drivers/char/synclink.c 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/synclink.c 2003-04-22 16:44:37.000000000 +0100 @@ -3261,7 +3261,7 @@ if (!info->count || tty_hung_up_p(filp)) goto cleanup; - if ((tty->count == 1) && (info->count != 1)) { + if ((atomic_read(&tty->count) == 1) && (info->count != 1)) { /* * tty->count is 1 and the tty structure will be freed. * info->count should be one in this case. diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/synclinkmp.c linux.21rc1-ac1/drivers/char/synclinkmp.c --- linux.21rc1/drivers/char/synclinkmp.c 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/synclinkmp.c 2003-04-22 16:44:37.000000000 +0100 @@ -851,7 +851,7 @@ if (!info->count || tty_hung_up_p(filp)) goto cleanup; - if ((tty->count == 1) && (info->count != 1)) { + if ((atomic_read(&tty->count) == 1) && (info->count != 1)) { /* * tty->count is 1 and the tty structure will be freed. * info->count should be one in this case. diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/tty_io.c linux.21rc1-ac1/drivers/char/tty_io.c --- linux.21rc1/drivers/char/tty_io.c 2003-04-22 16:38:39.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/tty_io.c 2003-04-22 16:44:37.000000000 +0100 @@ -247,14 +247,15 @@ file_list_unlock(); if (tty->driver.type == TTY_DRIVER_TYPE_PTY && tty->driver.subtype == PTY_TYPE_SLAVE && - tty->link && tty->link->count) + tty->link && atomic_read(&tty->link->count)) count++; - if (tty->count != count) { + if (atomic_read(&tty->count) != count) { printk(KERN_WARNING "Warning: dev (%s) tty->count(%d) " "!= #fd's(%d) in %s\n", - kdevname(tty->device), tty->count, count, routine); + kdevname(tty->device), atomic_read(&tty->count), + count, routine); return count; - } + } #endif return 0; } @@ -904,7 +905,7 @@ o_tty->termios_locked = *o_ltp_loc; (*driver->other->refcount)++; if (driver->subtype == PTY_TYPE_MASTER) - o_tty->count++; + atomic_inc(&o_tty->count); /* Establish the links in both directions */ tty->link = o_tty; @@ -925,7 +926,7 @@ tty->termios = *tp_loc; tty->termios_locked = *ltp_loc; (*driver->refcount)++; - tty->count++; + atomic_inc(&tty->count); /* * Structures all installed ... call the ldisc open routines. @@ -964,13 +965,13 @@ * special case for PTY masters: only one open permitted, * and the slave side open count is incremented as well. */ - if (tty->count) { + if (atomic_read(&tty->count)) { retval = -EIO; goto end_init; } - tty->link->count++; + atomic_inc(&tty->link->count); } - tty->count++; + atomic_inc(&tty->count); tty->driver = *driver; /* N.B. why do this every time?? */ success: @@ -1094,7 +1095,7 @@ #ifdef TTY_DEBUG_HANGUP printk(KERN_DEBUG "release_dev of %s (tty count=%d)...", - tty_name(tty, buf), tty->count); + tty_name(tty, buf), atomic_read(&tty->count)); #endif #ifdef TTY_PARANOIA_CHECK @@ -1146,9 +1147,9 @@ * each iteration we avoid any problems. */ while (1) { - tty_closing = tty->count <= 1; + tty_closing = atomic_read(&tty->count) <= 1; o_tty_closing = o_tty && - (o_tty->count <= (pty_master ? 1 : 0)); + (atomic_read(&o_tty->count) <= (pty_master ? 1 : 0)); do_sleep = 0; if (tty_closing) { @@ -1185,17 +1186,20 @@ * block, so it's safe to proceed with closing. */ if (pty_master) { - if (--o_tty->count < 0) { + atomic_dec(&o_tty->count); + if (atomic_read(&o_tty->count) < 0) { printk(KERN_WARNING "release_dev: bad pty slave count " "(%d) for %s\n", - o_tty->count, tty_name(o_tty, buf)); - o_tty->count = 0; + atomic_read(&o_tty->count), + tty_name(o_tty, buf)); + atomic_set(&o_tty->count, 0); } } - if (--tty->count < 0) { + atomic_dec(&tty->count); + if (atomic_read(&tty->count) < 0) { printk(KERN_WARNING "release_dev: bad tty->count (%d) for %s\n", - tty->count, tty_name(tty, buf)); - tty->count = 0; + atomic_read(&tty->count), tty_name(tty, buf)); + atomic_set(&tty->count, 0); } /* @@ -1414,7 +1418,7 @@ } if ((tty->driver.type == TTY_DRIVER_TYPE_SERIAL) && (tty->driver.subtype == SERIAL_TYPE_CALLOUT) && - (tty->count == 1)) { + (atomic_read(&tty->count) == 1)) { static int nr_warns; if (nr_warns < 5) { printk(KERN_WARNING "tty_io.c: " diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/char/vt.c linux.21rc1-ac1/drivers/char/vt.c --- linux.21rc1/drivers/char/vt.c 2003-04-22 16:38:39.000000000 +0100 +++ linux.21rc1-ac1/drivers/char/vt.c 2003-04-22 16:44:37.000000000 +0100 @@ -40,7 +40,8 @@ char vt_dont_switch; extern struct tty_driver console_driver; -#define VT_IS_IN_USE(i) (console_driver.table[i] && console_driver.table[i]->count) +#define VT_IS_IN_USE(i) (console_driver.table[i] && \ + atomic_read(&console_driver.table[i]->count)) #define VT_BUSY(i) (VT_IS_IN_USE(i) || i == fg_console || i == sel_cons) /* diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/hotplug/Config.in linux.21rc1-ac1/drivers/hotplug/Config.in --- linux.21rc1/drivers/hotplug/Config.in 2003-04-22 16:38:54.000000000 +0100 +++ linux.21rc1-ac1/drivers/hotplug/Config.in 2003-04-22 16:44:37.000000000 +0100 @@ -6,11 +6,11 @@ dep_tristate 'Support for PCI Hotplug (EXPERIMENTAL)' CONFIG_HOTPLUG_PCI $CONFIG_EXPERIMENTAL $CONFIG_PCI +dep_tristate ' ACPI PCI Hotplug driver' CONFIG_HOTPLUG_PCI_ACPI $CONFIG_ACPI $CONFIG_HOTPLUG_PCI dep_tristate ' Compaq PCI Hotplug driver' CONFIG_HOTPLUG_PCI_COMPAQ $CONFIG_HOTPLUG_PCI $CONFIG_X86 dep_mbool ' Save configuration into NVRAM on Compaq servers' CONFIG_HOTPLUG_PCI_COMPAQ_NVRAM $CONFIG_HOTPLUG_PCI_COMPAQ if [ "$CONFIG_X86_IO_APIC" = "y" ]; then dep_tristate ' IBM PCI Hotplug driver' CONFIG_HOTPLUG_PCI_IBM $CONFIG_HOTPLUG_PCI $CONFIG_X86_IO_APIC $CONFIG_X86 fi -dep_tristate ' ACPI PCI Hotplug driver' CONFIG_HOTPLUG_PCI_ACPI $CONFIG_ACPI $CONFIG_HOTPLUG_PCI - +dep_tristate ' IBM Thinkpad (20H2999) Docking driver (VERY EXPERIMENTAL) ' CONFIG_HOTPLUG_PCI_H2999 $CONFIG_HOTPLUG_PCI $CONFIG_X86 endmenu diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/hotplug/Makefile linux.21rc1-ac1/drivers/hotplug/Makefile --- linux.21rc1/drivers/hotplug/Makefile 2003-04-22 16:39:34.000000000 +0100 +++ linux.21rc1-ac1/drivers/hotplug/Makefile 2003-04-22 16:44:37.000000000 +0100 @@ -12,6 +12,7 @@ obj-$(CONFIG_HOTPLUG_PCI_COMPAQ) += cpqphp.o obj-$(CONFIG_HOTPLUG_PCI_IBM) += ibmphp.o obj-$(CONFIG_HOTPLUG_PCI_ACPI) += acpiphp.o +obj-$(CONFIG_HOTPLUG_PCI_H2999) += tp600.o pci_hotplug-objs := pci_hotplug_core.o \ pci_hotplug_util.o diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/hotplug/tp600.c linux.21rc1-ac1/drivers/hotplug/tp600.c --- linux.21rc1/drivers/hotplug/tp600.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.21rc1-ac1/drivers/hotplug/tp600.c 2003-04-22 16:44:37.000000000 +0100 @@ -0,0 +1,500 @@ +/* + * Drivers for the IBM 20H2999 found in the IBM thinkpad series + * machines. + * + * This driver was done without documentation from IBM + * + * _ + * { } + * | | All reverse engineering done + * | | in accordance with 92/250/EEC + * .-.! !.-. and Copyright (Computer Programs) + * .-! ! ! !.-. Regulations 1992 (S.I. 1992 No. 3233) + * ! ! ! ; + * \ ; + * \ ; + * ! : + * ! | + * | | + * + * + * Various other IBM's tried to obtain docs but failed. For that + * reason we only support warm not hot undocking at the moment. + * + * Known bugs: + * Sometimes we hang with an IRQ storm. I don't know what + * deals with the IRQ disables yet. (Hot dock) + * Sometimes busmastering (and maybe IRQs) don't come back + * (Seems to be a buffering issue for hot dock) + * + * Yet to do: + * ISA is not yet handled (oh god help us) + * Instead of saving/restoring pci devices we should + * re-enumerate that subtree so you can change devices + * (That also deals with stale save problems) + * We need to do a proper warm save/restore interface + * Bridged cards don't yet work + * + * Usage: + * Load module + * Pray + * + */ + +#include +#include +#include +#include +#include +#include +#include + +#include "pci_hotplug.h" +#include "tp600.h" + +static struct h2999_dev *testdev; + +/** + * pci_save_slot - save slot PCI data + * @slot: slot to save + * + * Save the slot data from a PCI device + */ + +static void pci_save_slot(struct h2999_slot *s) +{ + int i, n; + + for(i=0;i<8;i++) + { + struct pci_dev *p = pci_find_slot(s->dev->hotplug_bus, PCI_DEVFN(s->slotid, i)); + s->pci[i] = p; + if(p) + { + for(n = 0; n < 64; n++) + pci_read_config_dword(p, n * 4, &s->save[i][n]); +// printk("Saved %02X:%02X.%X\n", +// s->dev->hotplug_bus, s->slotid, i); + } + } +} + +static void pci_restore_slot(struct h2999_slot *s) +{ + int i,n; + + for(i = 0 ; i < 8; i++) + { + if(s->pci[i]) + { + pci_set_power_state(s->pci[i], 0); + + for(n = 0; n < 54; n++) + if(n!=1) + pci_write_config_dword(s->pci[i], n * 4, s->save[i][n]); + pci_write_config_dword(s->pci[i], 4, s->save[i][1]); +// printk("Restored %02X:%02X.%X\n", +// s->dev->hotplug_bus, s->slotid, i); + } + } +} + +/** + * slot_enable - enable H2999 slot + * @slot: slot to enable + * + * Enable a slot. Its not actually clear what this means with + * a hot dock. We can certainly 'discover' the PCI device in the + * slot when asked. + */ + +static int slot_enable(struct hotplug_slot *slot) +{ + struct h2999_slot *s = slot->private; + int i; + pci_restore_slot(s); + for(i=0; i < 8; i++) + { + if(s->pci[i] && (s->drivermap&(1<pci[i]); + } + return 0; +} + +/** + * slot_disable - disable H2999 slot + * @slot: slot to disable + * + * Disable a slot. Its not actually clear what to do here. We could + * report the device as having been removed when we are told to do + * this. + */ + +static int slot_disable(struct hotplug_slot *slot) +{ + struct h2999_slot *s = slot->private; + struct pci_dev *pdev; + int i; + + for(i = 0; i < 8; i++) + { + pdev = s->pci[i]; + /* Hack for now */ + if (pdev && pdev->driver) { + if (!pdev->driver->remove) + return -EBUSY; + } + } + + s->drivermap = 0; + + for(i = 0; i < 8; i++) + { + pdev = s->pci[i]; + if(pdev) + { + if(pdev->driver) + { + s->drivermap|=(1<driver->remove(pdev); + pdev->driver = NULL; + } + } + } + return 0; +} + +/** + * set_attention_status - set attention callback + * @slot: slot to set + * @value: on/off + * + * Called when the hotplug layer wants to set the attention status of + * the hotplug slot. The H2999 doesn't have an attention control (at + * least not that we know of). So we ignore this. + */ + +static int set_attention_status(struct hotplug_slot *slot, u8 value) +{ + return 0; +} + +/** + * hardware_test - test hardware callback + * @slot: slot to test + * value: test to run + * + * The H2999 does not support any hardware tests that we know of. + */ + +static int hardware_test(struct hotplug_slot *slot, u32 value) +{ + return 0; +} + +/** + * get_power_status - power query callback + * @slot; slot to query + * @value: returned state + * + * Called when the hotplug layer wants to ask us if the slot is + * powered. We work on the basis that all slots are powered when + * the unit is docked. This seems to be correct but I've not actually + * rammed a voltmeter into the slots to see if they are cleverer than + * that. + */ + +static int get_power_status(struct hotplug_slot *slot, u8 *value) +{ + struct h2999_slot *s = slot->private; + + /* Slots are all powered when docked */ + if(s->dev->docked > 0) + *value = 1; + else + *value = 0; + return 0; +} + +/** + * get_adapter_status - card presence query + * @slot: slot to query + * @value: returned state + * + * If we are not docked, we know the "slot" is empty. If we are + * docked its a bit more complicated. + */ + +static int get_adapter_status(struct hotplug_slot *slot, u8 *value) +{ + struct h2999_slot *s = slot->private; + + *value = 0; + + if(s->dev->docked) + *value = 1; + return 0; +} + +static struct hotplug_slot_ops h2999_ops = { + THIS_MODULE, + slot_enable, + slot_disable, + set_attention_status, + hardware_test, + get_power_status, + NULL, + NULL, + get_adapter_status +}; + +/** + * h2999_is_docked - check if docked + * @dev: h2999 device + * + * Check if we are currently docked. The method we use at the moment + * relies on poking around behind the bridge. There is no doubt a + * correct way to do this. Maybe one day IBM will be decide to + * actually provide documentation + */ + +static int h2999_is_docked(struct h2999_dev *dev) +{ + struct pci_dev *pdev = pci_find_slot(dev->hotplug_bus, PCI_DEVFN(0,0)); + u32 status; + + if(pdev == NULL) + return 0; /* Shouldnt happen - must be undocked */ + + if(pci_read_config_dword(pdev, PCI_VENDOR_ID, &status)) + return 0; /* Config read failed - its missing */ + + if(status == 0xFFFFFFFFUL) /* Failed */ + return 0; + + /* Must be docked */ + return 1; +} +/** + * h2999_reconfigure_dock - redock event handler + * @dev: h2999 device + * + * A redocking event has occurred. There may also have been an undock + * before hand. If so then the unconfigure routine is called first. + */ + +static void h2999_reconfigure_dock(struct h2999_dev *dev) +{ + int docked, i; + + docked = h2999_is_docked(dev); + + if(docked ^ dev->docked) + { + printk("h2999: Now %sdocked.\n", + docked?"":"un"); + if(docked) + { + /* We should do the re-enumeration of the bus here + The current save/restore is a test hack */ + for(i=0; i < H2999_SLOTS; i++) + { + if(dev->slots[i].hotplug_slot.private != &dev->slots[i]) + BUG(); + slot_enable(&dev->slots[i].hotplug_slot); + } + } + else + { + for(i=0; i < H2999_SLOTS; i++) + { + if(slot_disable(&dev->slots[i].hotplug_slot)) + printk(KERN_ERR "h2999: someone undocked while devices were in use, how rude!\n"); + } + } + dev->docked = docked; + } + /* Clear bits */ + pci_write_config_byte(dev->pdev, 0x1f, 0xf0); +} + +/* + * h2999_attach - attach an H2999 bridge + * @pdev: PCI device + * @unused: unused + * + * Called when the PCI layer discovers an H2999 docking bridge is + * present in the system. We scan the bridge to obtain its current + * status and register it with the hot plug layer + */ + +static int __devinit h2999_attach(struct pci_dev *pdev, const struct pci_device_id *unused) +{ + /* PCI core found a new H2999 */ + struct h2999_dev *dev; + u8 bus; + int i; + + dev = kmalloc(sizeof(*dev), GFP_KERNEL); + if(dev == NULL) + goto nomem; + + memset(dev, 0, sizeof(*dev)); + + dev->pdev = pdev; + + pci_read_config_byte(pdev, PCI_SECONDARY_BUS, &bus); + dev->hotplug_bus = bus; + + /* Requires hotplug_bus and pdev are set */ + + dev->docked = h2999_is_docked(dev); + + printk(KERN_INFO "Found IBM 20H2999. Status is %sdocked, docking bus is %d.\n", + dev->docked?"":"un", dev->hotplug_bus); + + /* + * Allow for 8 devices. On the TP600 at least we have + * 0-3 as the onboard devices, and 4-7 as the slots. + * To add more fun there is an ISA bridge which we + * don't really handle yet. + */ + + for(i = 0; i < H2999_SLOTS; i++) + { + struct h2999_slot *s = &dev->slots[i]; + int ret; + + s->hotplug_slot.info = &s->hotplug_info; + s->hotplug_slot.private = s; + s->slotid = i; + s->dev = dev; + s->live = 1; + s->hotplug_slot.ops = &h2999_ops; + s->hotplug_slot.name = s->name; + s->hotplug_info.power_status = dev->docked; + /* FIXME - should probe here + In truth the hp_register ought to call thse as needed! */ + s->hotplug_info.adapter_status = 0; + s->pdev = pci_find_slot(dev->hotplug_bus, PCI_DEVFN(i, 0)); + snprintf(s->name, SLOT_NAME_SIZE, "Dock%d.%d", dev->hotplug_bus, i); + pci_save_slot(s); + ret = pci_hp_register(&s->hotplug_slot); + if(ret) + { + printk(KERN_ERR "pci_hp_register failed for slot %d with error %d\n", i, ret); + s->live = 0; + } + } + pci_set_drvdata(pdev, dev); + + testdev = dev; + return 0; +nomem: + printk(KERN_ERR "h2999_attach: out of memory.\n"); + return -ENOMEM; +} + +/** + * h2999_cleanup - free H2999 memory resources + * @dev: h2999 device + * + * Unregister and free up all of our slots + */ + +static int __devinit h2999_cleanup(struct h2999_dev *dev) +{ + struct h2999_slot *s; + int slot; + + for(slot = 0; slot < H2999_SLOTS; slot++) + { + s = &dev->slots[slot]; + if(s->live) + pci_hp_deregister(&s->hotplug_slot); + } + kfree(dev); +} + +/** + * h2999_detach - an H2999 controller vanished + * @dev: device that vanished + * + * Called when the PCI layer sees the bridge unplugged. At the moment + * this doesn't happen and since its currently unclear what to do + * in the hot plug layer if it does this may be a good thing 8) + */ + +static void __devinit h2999_detach(struct pci_dev *pdev) +{ + struct h2999_dev *dev = pci_get_drvdata(pdev); + h2999_cleanup(dev); +} + + +static struct pci_device_id h2999_id_tbl[] __devinitdata = { + { PCI_VENDOR_ID_IBM, 0x0095, PCI_ANY_ID, PCI_ANY_ID, }, + { 0, } +}; + +MODULE_DEVICE_TABLE(pci, h2999_id_tbl); + +static struct pci_driver h2999_driver = { + name: "h2999", + id_table: h2999_id_tbl, + probe: h2999_attach, + remove: __devexit_p(h2999_detach) + /* FIXME - PM functions */ +}; + +/* + * Test harness + */ + +static struct completion thread_done; + +static int h2999_thread(void *unused) +{ + lock_kernel(); + while(testdev != NULL) + { + set_current_state(TASK_INTERRUPTIBLE); + if(signal_pending(current)) + break; + schedule_timeout(HZ); + h2999_reconfigure_dock(testdev); + } + unlock_kernel(); + complete_and_exit(&thread_done, 0); +} + +static int __init h2999_init_module(void) +{ + int rc; + printk(KERN_INFO "IBM 20H2999 PCI docking bridge driver v0.01\n"); + + init_completion(&thread_done); + + rc = pci_module_init(&h2999_driver); + if (rc == 0) + { + if( kernel_thread(h2999_thread, NULL, CLONE_SIGHAND) >= 0) + return 0; + } + complete(&thread_done); + return rc; +} + +static void __exit h2999_cleanup_module(void) +{ + pci_unregister_driver(&h2999_driver); + wait_for_completion(&thread_done); +} + +module_init(h2999_init_module); +module_exit(h2999_cleanup_module); + +MODULE_AUTHOR("Alan Cox"); +MODULE_DESCRIPTION("IBM 20H2999 Docking Bridge Driver"); +MODULE_LICENSE("GPL"); + diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/hotplug/tp600.h linux.21rc1-ac1/drivers/hotplug/tp600.h --- linux.21rc1/drivers/hotplug/tp600.h 1970-01-01 01:00:00.000000000 +0100 +++ linux.21rc1-ac1/drivers/hotplug/tp600.h 2003-04-22 16:44:37.000000000 +0100 @@ -0,0 +1,29 @@ +#define SLOT_NAME_SIZE 12 + +struct h2999_slot +{ + int slotid; + + struct hotplug_slot hotplug_slot; + struct hotplug_slot_info hotplug_info; + char name[SLOT_NAME_SIZE]; + + struct h2999_dev *dev; + struct pci_dev *pdev; + int live; + + struct pci_dev *pci[8]; + u32 save[8][64]; + u8 drivermap; +}; + +#define H2999_SLOTS 8 + +struct h2999_dev +{ + int docked; + int hotplug_bus; + struct pci_dev *pdev; + + struct h2999_slot slots[H2999_SLOTS]; +}; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/i2c/i2c-dev.c linux.21rc1-ac1/drivers/i2c/i2c-dev.c --- linux.21rc1/drivers/i2c/i2c-dev.c 2003-04-22 16:38:53.000000000 +0100 +++ linux.21rc1-ac1/drivers/i2c/i2c-dev.c 2003-04-22 16:44:37.000000000 +0100 @@ -254,6 +254,11 @@ sizeof(rdwr_arg))) return -EFAULT; + /* Put an arbritrary limit on the number of messages that can + * be sent at once */ + if (rdwr_arg.nmsgs > 42) + return -EINVAL; + rdwr_pa = (struct i2c_msg *) kmalloc(rdwr_arg.nmsgs * sizeof(struct i2c_msg), GFP_KERNEL); @@ -270,6 +275,11 @@ res = -EFAULT; break; } + /* Limit the size of the message to a sane amount */ + if (rdwr_pa[i].len > 8192) { + res = -EINVAL; + break; + } rdwr_pa[i].buf = kmalloc(rdwr_pa[i].len, GFP_KERNEL); if(rdwr_pa[i].buf == NULL) { @@ -280,11 +290,17 @@ rdwr_arg.msgs[i].buf, rdwr_pa[i].len)) { - kfree(rdwr_pa[i].buf); res = -EFAULT; break; } } + if (res < 0) { + int j; + for (j = 0; j < i; ++j) + kfree(rdwr_pa[j].buf); + kfree(rdwr_pa); + return res; + } if (!res) { res = i2c_transfer(client->adapter, diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/ide/Config.in linux.21rc1-ac1/drivers/ide/Config.in --- linux.21rc1/drivers/ide/Config.in 2003-04-22 16:39:34.000000000 +0100 +++ linux.21rc1-ac1/drivers/ide/Config.in 2003-04-22 16:44:37.000000000 +0100 @@ -43,7 +43,7 @@ define_bool CONFIG_BLK_DEV_IDEDMA $CONFIG_BLK_DEV_IDEDMA_PCI dep_bool ' ATA Work(s) In Progress (EXPERIMENTAL)' CONFIG_IDEDMA_PCI_WIP $CONFIG_BLK_DEV_IDEDMA_PCI $CONFIG_EXPERIMENTAL # dep_bool ' Good-Bad DMA Model-Firmware (WIP)' CONFIG_IDEDMA_NEW_DRIVE_LISTINGS $CONFIG_IDEDMA_PCI_WIP - dep_tristate ' Pacific Digital ADMA-100 basic support' CONFIG_BLK_DEV_ADMA100 + dep_tristate ' Pacific Digital ADMA-100 basic support' CONFIG_BLK_DEV_ADMA100 $CONFIG_BLK_DEV_IDEDMA_PCI dep_tristate ' AEC62XX chipset support' CONFIG_BLK_DEV_AEC62XX $CONFIG_BLK_DEV_IDEDMA_PCI dep_tristate ' ALI M15x3 chipset support' CONFIG_BLK_DEV_ALI15X3 $CONFIG_BLK_DEV_IDEDMA_PCI dep_mbool ' ALI M15x3 WDC support (DANGEROUS)' CONFIG_WDC_ALI15X3 $CONFIG_BLK_DEV_ALI15X3 diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/ide/ide.c linux.21rc1-ac1/drivers/ide/ide.c --- linux.21rc1/drivers/ide/ide.c 2003-04-22 16:39:34.000000000 +0100 +++ linux.21rc1-ac1/drivers/ide/ide.c 2003-04-22 18:33:42.000000000 +0100 @@ -1,5 +1,5 @@ /* - * linux/drivers/ide/ide.c Version 7.00beta2 Mar 05 2003 + * linux/drivers/ide/ide.c Version 7.00beta3 Apr 22 2003 * * Copyright (C) 1994-1998 Linus Torvalds & authors (see below) */ @@ -121,8 +121,8 @@ * */ -#define REVISION "Revision: 7.00beta-2.4" -#define VERSION "Id: ide.c 7.00b1 20021129" +#define REVISION "Revision: 7.00beta3-.2.4" +#define VERSION "Id: ide.c 7.00b3 20030422" #undef REALLY_SLOW_IO /* most systems can safely undef this */ @@ -1185,7 +1185,7 @@ * * Automatically remove all the driver specific settings for this * drive. This function may sleep and must not be called from IRQ - * context. Takes the settings_lock + * context. Caller must hold the setting lock. */ static void auto_remove_settings (ide_drive_t *drive) @@ -1407,8 +1407,11 @@ ide_add_setting(drive, "init_speed", SETTING_RW, -1, -1, TYPE_BYTE, 0, 70, 1, 1, &drive->init_speed, NULL); ide_add_setting(drive, "current_speed", SETTING_RW, -1, -1, TYPE_BYTE, 0, 70, 1, 1, &drive->current_speed, set_xfer_rate); ide_add_setting(drive, "number", SETTING_RW, -1, -1, TYPE_BYTE, 0, 3, 1, 1, &drive->dn, NULL); +#if 0 + /* Experimental, but this needs the setting/register locking rewritten to be used */ if (drive->media != ide_disk) ide_add_setting(drive, "ide-scsi", SETTING_RW, -1, HDIO_SET_IDE_SCSI, TYPE_BYTE, 0, 1, 1, 1, &drive->scsi, ide_atapi_to_scsi); +#endif } /* @@ -2598,10 +2601,12 @@ int ide_unregister_subdriver (ide_drive_t *drive) { unsigned long flags; - + + down(&ide_setting_sem); spin_lock_irqsave(&io_request_lock, flags); if (drive->usage || drive->busy || DRIVER(drive)->busy) { spin_unlock_irqrestore(&io_request_lock, flags); + up(&ide_setting_sem); return 1; } #if defined(CONFIG_BLK_DEV_ISAPNP) && defined(CONFIG_ISAPNP) && defined(MODULE) @@ -2611,10 +2616,11 @@ ide_remove_proc_entries(drive->proc, DRIVER(drive)->proc); ide_remove_proc_entries(drive->proc, generic_subdriver_entries); #endif - auto_remove_settings(drive); drive->driver = &idedefault_driver; setup_driver_defaults(drive); + auto_remove_settings(drive); spin_unlock_irqrestore(&io_request_lock, flags); + up(&ide_setting_sem); return 0; } diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/ide/ide-disk.c linux.21rc1-ac1/drivers/ide/ide-disk.c --- linux.21rc1/drivers/ide/ide-disk.c 2003-04-22 16:39:34.000000000 +0100 +++ linux.21rc1-ac1/drivers/ide/ide-disk.c 2003-04-22 18:38:01.000000000 +0100 @@ -1707,18 +1707,10 @@ drive->mult_count = 0; if (id->max_multsect) { -#ifdef CONFIG_IDEDISK_MULTI_MODE id->multsect = ((id->max_multsect/2) > 1) ? id->max_multsect : 0; id->multsect_valid = id->multsect ? 1 : 0; drive->mult_req = id->multsect_valid ? id->max_multsect : INITIAL_MULT_COUNT; drive->special.b.set_multmode = drive->mult_req ? 1 : 0; -#else /* original, pre IDE-NFG, per request of AC */ - drive->mult_req = INITIAL_MULT_COUNT; - if (drive->mult_req > id->max_multsect) - drive->mult_req = id->max_multsect; - if (drive->mult_req || ((id->multsect_valid & 1) && id->multsect)) - drive->special.b.set_multmode = 1; -#endif /* CONFIG_IDEDISK_MULTI_MODE */ } drive->no_io_32bit = id->dword_io ? 1 : 0; if (drive->id->cfs_enable_2 & 0x3000) diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/ide/ide-taskfile.c linux.21rc1-ac1/drivers/ide/ide-taskfile.c --- linux.21rc1/drivers/ide/ide-taskfile.c 2003-04-22 16:39:34.000000000 +0100 +++ linux.21rc1-ac1/drivers/ide/ide-taskfile.c 2003-04-22 16:44:37.000000000 +0100 @@ -854,11 +854,6 @@ rq->errors = 0; return ide_started; #else /* ! ALTERNATE_STATE_DIAGRAM_MULTI_OUT */ - -#if 0 - if (wait_for_ready(drive, 100)) - IDE_DEBUG(__LINE__); //BUG(); -#else if (!(drive_is_ready(drive))) { int i; for (i=0; i<100; i++) { @@ -866,7 +861,7 @@ break; } } -#endif + /* * WARNING :: if the drive as not acked good status we may not * move the DATA-TRANSFER T-Bar as BSY != 0. diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/ide/pci/alim15x3.c linux.21rc1-ac1/drivers/ide/pci/alim15x3.c --- linux.21rc1/drivers/ide/pci/alim15x3.c 2003-04-22 16:39:35.000000000 +0100 +++ linux.21rc1-ac1/drivers/ide/pci/alim15x3.c 2003-04-22 16:44:37.000000000 +0100 @@ -368,7 +368,7 @@ * Check the drive and controller revisions. Return 0 if UDMA is * not available, or 1 if UDMA can be used. The actual rules for * the ALi are - * No UDMA on revisions <= 0x20 + * No UDMA on revisions <= 0xC1 * Disk only for revisions < 0xC2 * Not WDC drives for revisions < 0xC2 * diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/ide/pci/serverworks.c linux.21rc1-ac1/drivers/ide/pci/serverworks.c --- linux.21rc1/drivers/ide/pci/serverworks.c 2003-04-22 16:39:35.000000000 +0100 +++ linux.21rc1-ac1/drivers/ide/pci/serverworks.c 2003-04-22 16:44:37.000000000 +0100 @@ -419,7 +419,10 @@ static void svwks_tune_drive (ide_drive_t *drive, u8 pio) { - (void) svwks_tune_chipset(drive, (XFER_PIO_0 + pio)); + if(pio == 255) + (void) svwks_tune_chipset(drive, 255); + else + (void) svwks_tune_chipset(drive, (XFER_PIO_0 + pio)); } static int config_chipset_for_dma (ide_drive_t *drive) diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/ide/raid/hptraid.c linux.21rc1-ac1/drivers/ide/raid/hptraid.c --- linux.21rc1/drivers/ide/raid/hptraid.c 2003-04-22 16:39:35.000000000 +0100 +++ linux.21rc1-ac1/drivers/ide/raid/hptraid.c 2003-04-22 16:44:37.000000000 +0100 @@ -38,7 +38,9 @@ static int hptraid_open(struct inode * inode, struct file * filp); static int hptraid_release(struct inode * inode, struct file * filp); static int hptraid_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg); -static int hptraid_make_request (request_queue_t *q, int rw, struct buffer_head * bh); +static int hptraidspan_make_request (request_queue_t *q, int rw, struct buffer_head * bh); +static int hptraid0_make_request (request_queue_t *q, int rw, struct buffer_head * bh); +static int hptraid1_make_request (request_queue_t *q, int rw, struct buffer_head * bh); @@ -46,28 +48,68 @@ kdev_t device; unsigned long sectors; struct block_device *bdev; + unsigned long last_pos; }; struct hptraid { unsigned int stride; unsigned int disks; unsigned long sectors; + u_int32_t magic_0; struct geom geom; struct hptdisk disk[8]; - unsigned long cutoff[8]; unsigned int cutoff_disks[8]; }; -static struct raid_device_operations hptraid_ops = { +struct hptraid_dev { + int major; + int minor; + int device; +}; + +static struct hptraid_dev devlist[]= +{ + + {IDE0_MAJOR, 0, -1}, + {IDE0_MAJOR, 64, -1}, + {IDE1_MAJOR, 0, -1}, + {IDE1_MAJOR, 64, -1}, + {IDE2_MAJOR, 0, -1}, + {IDE2_MAJOR, 64, -1}, + {IDE3_MAJOR, 0, -1}, + {IDE3_MAJOR, 64, -1}, + {IDE4_MAJOR, 0, -1}, + {IDE4_MAJOR, 64, -1}, + {IDE5_MAJOR, 0, -1}, + {IDE5_MAJOR, 64, -1}, + {IDE6_MAJOR, 0, -1}, + {IDE6_MAJOR, 64, -1} +}; + +static struct raid_device_operations hptraidspan_ops = { + open: hptraid_open, + release: hptraid_release, + ioctl: hptraid_ioctl, + make_request: hptraidspan_make_request +}; + +static struct raid_device_operations hptraid0_ops = { + open: hptraid_open, + release: hptraid_release, + ioctl: hptraid_ioctl, + make_request: hptraid0_make_request +}; + +static struct raid_device_operations hptraid1_ops = { open: hptraid_open, release: hptraid_release, ioctl: hptraid_ioctl, - make_request: hptraid_make_request + make_request: hptraid1_make_request }; -static struct hptraid raid[16]; +static struct hptraid raid[14]; static int hptraid_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg) { @@ -131,7 +173,50 @@ } -static int hptraid_make_request (request_queue_t *q, int rw, struct buffer_head * bh) +static int hptraidspan_make_request (request_queue_t *q, int rw, struct buffer_head * bh) +{ + unsigned long rsect; + unsigned int disk; + int device; + struct hptraid *thisraid; + + rsect = bh->b_rsector; + + device = (bh->b_rdev >> SHIFT)&MAJOR_MASK; + thisraid = &raid[device]; + + /* Partitions need adding of the start sector of the partition to the requested sector */ + + rsect += ataraid_gendisk.part[MINOR(bh->b_rdev)].start_sect; + + for (disk=0;diskdisks;disk++) { + if (disk==1) + rsect+=10; + // the "on next disk" contition check is a bit odd + if (thisraid->disk[disk].sectors > rsect+1) + break; + rsect-=thisraid->disk[disk].sectors-(disk?11:1); + } + + // request spans over 2 disks => request must be split + if(rsect+bh->b_size/512 >= thisraid->disk[disk].sectors) + return -1; + + /* + * The new BH_Lock semantics in ll_rw_blk.c guarantee that this + * is the only IO operation happening on this bh. + */ + + bh->b_rdev = thisraid->disk[disk].device; + bh->b_rsector = rsect; + + /* + * Let the main block layer submit the IO and resolve recursion: + */ + return 1; +} + +static int hptraid0_make_request (request_queue_t *q, int rw, struct buffer_head * bh) { unsigned long rsect; unsigned long rsect_left,rsect_accum = 0; @@ -218,6 +303,106 @@ return 1; } +static int hptraid1_read_request (request_queue_t *q, int rw, struct buffer_head * bh) +{ + int device; + int dist; + int bestsofar,bestdist,i; + static int previous; + + /* Reads are simple in principle. Pick a disk and go. + Initially I cheat by just picking the one which the last known + head position is closest by. + Later on, online/offline checking and performance needs adding */ + + device = (bh->b_rdev >> SHIFT)&MAJOR_MASK; + bh->b_rsector += ataraid_gendisk.part[MINOR(bh->b_rdev)].start_sect; + + bestsofar = 0; + bestdist = raid[device].disk[0].last_pos - bh->b_rsector; + if (bestdist<0) + bestdist=-bestdist; + if (bestdist>4095) + bestdist=4095; + + for (i=1 ; ib_rsector; + if (dist<0) + dist = -dist; + if (dist>4095) + dist=4095; + + if (bestdist==dist) { /* it's a tie; try to do some read balancing */ + if ((previous>bestsofar)&&(previous<=i)) + bestsofar = i; + previous = (previous + 1) % raid[device].disks; + } else if (bestdist>dist) { + bestdist = dist; + bestsofar = i; + } + + } + + bh->b_rsector += bestsofar?10:0; + bh->b_rdev = raid[device].disk[bestsofar].device; + raid[device].disk[bestsofar].last_pos = bh->b_rsector+(bh->b_size>>9); + + /* + * Let the main block layer submit the IO and resolve recursion: + */ + + return 1; +} + +static int hptraid1_write_request(request_queue_t *q, int rw, struct buffer_head * bh) +{ + struct buffer_head *bh1; + struct ataraid_bh_private *private; + int device; + int i; + + device = (bh->b_rdev >> SHIFT)&MAJOR_MASK; + private = ataraid_get_private(); + if (private==NULL) + BUG(); + + private->parent = bh; + + atomic_set(&private->count,raid[device].disks); + + + for (i = 0; i< raid[device].disks; i++) { + bh1=ataraid_get_bhead(); + /* If this ever fails we're doomed */ + if (!bh1) + BUG(); + + /* dupe the bufferhead and update the parts that need to be different */ + memcpy(bh1, bh, sizeof(*bh)); + + bh1->b_end_io = ataraid_end_request; + bh1->b_private = private; + bh1->b_rsector += ataraid_gendisk.part[MINOR(bh->b_rdev)].start_sect+(i==0?0:10); /* partition offset */ + bh1->b_rdev = raid[device].disk[i].device; + + /* update the last known head position for the drive */ + raid[device].disk[i].last_pos = bh1->b_rsector+(bh1->b_size>>9); + + generic_make_request(rw,bh1); + } + return 0; +} + +static int hptraid1_make_request (request_queue_t *q, int rw, struct buffer_head * bh) { + /* Read and Write are totally different cases; split them totally here */ + if (rw==READA) + rw = READ; + + if (rw==READ) + return hptraid1_read_request(q,rw,bh); + else + return hptraid1_write_request(q,rw,bh); +} #include "hptraid.h" @@ -271,35 +456,49 @@ return lba; } -static void __init probedisk(int major, int minor,int device) +static void __init probedisk(struct hptraid_dev *disk, int device, u_int8_t type) { int i; struct highpoint_raid_conf *prom; static unsigned char block[4096]; struct block_device *bdev; - if (maxsectors(major,minor)==0) + if (disk->device != -1) /* disk is occupied? */ + return; + + if (maxsectors(disk->major,disk->minor)==0) return; - if (read_disk_sb(major,minor,(unsigned char*)&block,sizeof(block))) + if (read_disk_sb(disk->major,disk->minor,(unsigned char*)&block,sizeof(block))) return; prom = (struct highpoint_raid_conf*)&block[512]; if (prom->magic!= 0x5a7816f0) return; - if (prom->type) { - printk(KERN_INFO "hptraid: only RAID0 is supported currently\n"); - return; + switch (prom->type) { + case HPT_T_SPAN: + case HPT_T_RAID_0: + case HPT_T_RAID_1: + if(prom->type != type) + return; + break; + default: + printk(KERN_INFO "hptraid: only SPAN, RAID0 and RAID1 is currently supported \n"); + return; } + /* disk from another array? */ + if(raid[device].disks && prom->magic_0 != raid[device].magic_0) + return; + i = prom->disk_number; if (i<0) return; if (i>8) return; - bdev = bdget(MKDEV(major,minor)); + bdev = bdget(MKDEV(disk->major,disk->minor)); if (bdev && blkdev_get(bdev,FMODE_READ|FMODE_WRITE,0,BDEV_RAW) == 0) { int j=0; struct gendisk *gd; @@ -308,17 +507,22 @@ /* now blank the /proc/partitions table for the wrong partition table, so that scripts don't accidentally mount it and crash the kernel */ /* XXX: the 0 is an utter hack --hch */ - gd=get_gendisk(MKDEV(major, 0)); + gd=get_gendisk(MKDEV(disk->major, 0)); if (gd!=NULL) { - for (j=1+(minor<minor_shift);j<((minor+1)<minor_shift);j++) - gd->part[j].nr_sects=0; + if (gd->major==disk->major) + for (j=1+(disk->minor<minor_shift); + j<((disk->minor+1)<minor_shift); + j++) gd->part[j].nr_sects=0; } } - raid[device].disk[i].device = MKDEV(major,minor); - raid[device].disk[i].sectors = maxsectors(major,minor); + raid[device].disk[i].device = MKDEV(disk->major,disk->minor); + raid[device].disk[i].sectors = maxsectors(disk->major,disk->minor); raid[device].stride = (1<raid0_shift); raid[device].disks = prom->raid_disks; - raid[device].sectors = prom->total_secs; + raid[device].sectors = prom->total_secs-(prom->total_secs%(255*63)); + raid[device].sectors += raid[device].sectors&1?1:0; + raid[device].magic_0=prom->magic_0; + disk->device=device; } @@ -349,31 +553,23 @@ } -static __init int hptraid_init_one(int device) +static __init int hptraid_init_one(int device, u_int8_t type) { int i,count; - probedisk(IDE0_MAJOR, 0, device); - probedisk(IDE0_MAJOR, 64, device); - probedisk(IDE1_MAJOR, 0, device); - probedisk(IDE1_MAJOR, 64, device); - probedisk(IDE2_MAJOR, 0, device); - probedisk(IDE2_MAJOR, 64, device); - probedisk(IDE3_MAJOR, 0, device); - probedisk(IDE3_MAJOR, 64, device); - probedisk(IDE4_MAJOR, 0, device); - probedisk(IDE4_MAJOR, 64, device); - probedisk(IDE5_MAJOR, 0, device); - probedisk(IDE5_MAJOR, 64, device); + memset(raid+device, 0, sizeof(struct hptraid)); + for(i=0; i < 14; i++) { + probedisk(devlist+i, device, type); + } - fill_cutoff(device); + if(type == HPT_T_RAID_0) + fill_cutoff(device); /* Initialize the gendisk structure */ ataraid_register_disk(device,raid[device].sectors); count=0; - printk(KERN_INFO "Highpoint HPT370 Softwareraid driver for linux version 0.01\n"); for (i=0;i<8;i++) { if (raid[device].disk[i].device!=0) { @@ -394,15 +590,44 @@ static __init int hptraid_init(void) { - int retval,device; - - device=ataraid_get_device(&hptraid_ops); - if (device<0) - return -ENODEV; - retval = hptraid_init_one(device); - if (retval) - ataraid_release_device(device); - return retval; + int retval,device,count=0; + + printk(KERN_INFO "Highpoint HPT370 Softwareraid driver for linux version 0.01-ww1\n"); + + do + { + device=ataraid_get_device(&hptraid0_ops); + if (device<0) + return (count?0:-ENODEV); + retval = hptraid_init_one(device, HPT_T_RAID_0); + if (retval) + ataraid_release_device(device); + else + count++; + } while(!retval); + do + { + device=ataraid_get_device(&hptraid1_ops); + if (device<0) + return (count?0:-ENODEV); + retval = hptraid_init_one(device, HPT_T_RAID_1); + if (retval) + ataraid_release_device(device); + else + count++; + } while(!retval); + do + { + device=ataraid_get_device(&hptraidspan_ops); + if (device<0) + return (count?0:-ENODEV); + retval = hptraid_init_one(device, HPT_T_SPAN); + if (retval) + ataraid_release_device(device); + else + count++; + } while(!retval); + return (count?0:retval); } static void __exit hptraid_exit (void) diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/isdn/hisax/st5481.h linux.21rc1-ac1/drivers/isdn/hisax/st5481.h --- linux.21rc1/drivers/isdn/hisax/st5481.h 2003-04-22 16:39:35.000000000 +0100 +++ linux.21rc1-ac1/drivers/isdn/hisax/st5481.h 2003-04-22 19:20:12.000000000 +0100 @@ -218,6 +218,19 @@ #define L1_EVENT_COUNT (EV_TIMER3 + 1) +#if (__GNUC__ > 2) + +#define ERR(format, arg...) \ +printk(KERN_ERR __FILE__ ": %s: " format "\n" , __FUNCTION__ , ## arg) + +#define WARN(format, arg...) \ +printk(KERN_WARNING __FILE__ ": %s: " format "\n" , __FUNCTION__ , ## arg) + +#define INFO(format, arg...) \ +printk(KERN_INFO __FILE__ ": %s: " format "\n" , __FUNCTION__ , ## arg) + +#else + #define ERR(format, arg...) \ printk(KERN_ERR __FILE__ ": " __FUNCTION__ ": " format "\n" , ## arg) @@ -227,6 +240,8 @@ #define INFO(format, arg...) \ printk(KERN_INFO __FILE__ ": " __FUNCTION__ ": " format "\n" , ## arg) +#endif + #include "isdnhdlc.h" #include "fsm.h" #include "hisax_if.h" diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/isdn/isdn_tty.c linux.21rc1-ac1/drivers/isdn/isdn_tty.c --- linux.21rc1/drivers/isdn/isdn_tty.c 2003-04-22 16:38:49.000000000 +0100 +++ linux.21rc1-ac1/drivers/isdn/isdn_tty.c 2003-04-22 16:44:37.000000000 +0100 @@ -1807,7 +1807,7 @@ #endif return; } - if ((tty->count == 1) && (info->count != 1)) { + if ((atomic_read(&tty->count) == 1) && (info->count != 1)) { /* * Uh, oh. tty->count is 1, which means that the tty * structure will be freed. Info->count should always diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/macintosh/macserial.c linux.21rc1-ac1/drivers/macintosh/macserial.c --- linux.21rc1/drivers/macintosh/macserial.c 2003-04-22 16:38:52.000000000 +0100 +++ linux.21rc1-ac1/drivers/macintosh/macserial.c 2003-04-22 16:44:37.000000000 +0100 @@ -1957,7 +1957,7 @@ } OPNDBG("rs_close ttyS%d, count = %d\n", info->line, info->count); - if ((tty->count == 1) && (info->count != 1)) { + if ((atomic_read(&tty->count) == 1) && (info->count != 1)) { /* * Uh, oh. tty->count is 1, which means that the tty * structure will be freed. Info->count should always diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/md/Config.in linux.21rc1-ac1/drivers/md/Config.in --- linux.21rc1/drivers/md/Config.in 2003-04-22 16:38:54.000000000 +0100 +++ linux.21rc1-ac1/drivers/md/Config.in 2003-04-22 16:44:37.000000000 +0100 @@ -14,5 +14,8 @@ dep_tristate ' Multipath I/O support' CONFIG_MD_MULTIPATH $CONFIG_BLK_DEV_MD dep_tristate ' Logical volume manager (LVM) support' CONFIG_BLK_DEV_LVM $CONFIG_MD +if [ "$CONFIG_EXPERIMENTAL" = "y" ]; then + dep_tristate ' Device-mapper support (EXPERIMENTAL)' CONFIG_BLK_DEV_DM $CONFIG_MD +fi endmenu diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/md/dm.c linux.21rc1-ac1/drivers/md/dm.c --- linux.21rc1/drivers/md/dm.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.21rc1-ac1/drivers/md/dm.c 2003-04-22 16:44:37.000000000 +0100 @@ -0,0 +1,1158 @@ +/* + * Copyright (C) 2001 Sistina Software (UK) Limited. + * + * This file is released under the GPL. + */ + +#include "dm.h" + +#include +#include + +/* we only need this for the lv_bmap struct definition, not happy */ +#include + +#define DEFAULT_READ_AHEAD 64 + +static const char *_name = DM_NAME; + +static int major = 0; +static int _major = 0; + +struct io_hook { + struct mapped_device *md; + struct target *target; + int rw; + + void (*end_io) (struct buffer_head * bh, int uptodate); + void *context; +}; + +static kmem_cache_t *_io_hook_cache; + +static struct mapped_device *_devs[MAX_DEVICES]; +static struct rw_semaphore _dev_locks[MAX_DEVICES]; + +/* + * This lock is only held by dm_create and dm_set_name to avoid + * race conditions where someone else may create a device with + * the same name. + */ +static spinlock_t _create_lock = SPIN_LOCK_UNLOCKED; + +/* block device arrays */ +static int _block_size[MAX_DEVICES]; +static int _blksize_size[MAX_DEVICES]; +static int _hardsect_size[MAX_DEVICES]; + +static devfs_handle_t _dev_dir; + +static int request(request_queue_t * q, int rw, struct buffer_head *bh); +static int dm_user_bmap(struct inode *inode, struct lv_bmap *lvb); + +/* + * Protect the mapped_devices referenced from _dev[] + */ +struct mapped_device *dm_get_r(int minor) +{ + struct mapped_device *md; + + if (minor >= MAX_DEVICES) + return NULL; + + down_read(_dev_locks + minor); + md = _devs[minor]; + if (!md) + up_read(_dev_locks + minor); + return md; +} + +struct mapped_device *dm_get_w(int minor) +{ + struct mapped_device *md; + + if (minor >= MAX_DEVICES) + return NULL; + + down_write(_dev_locks + minor); + md = _devs[minor]; + if (!md) + up_write(_dev_locks + minor); + return md; +} + +static int namecmp(struct mapped_device *md, const char *name, int nametype) +{ + switch (nametype) { + case DM_LOOKUP_BY_NAME: + return strcmp(md->name, name); + break; + + case DM_LOOKUP_BY_UUID: + if (!md->uuid) + return -1; /* never equal */ + + return strcmp(md->uuid, name); + break; + + default: + DMWARN("Unknown comparison type in namecmp: %d", nametype); + BUG(); + } + + return -1; +} + +/* + * The interface (eg, ioctl) will probably access the devices + * through these slow 'by name' locks, this needs improving at + * some point if people start playing with *large* numbers of dm + * devices. + */ +struct mapped_device *dm_get_name_r(const char *name, int nametype) +{ + int i; + struct mapped_device *md; + + for (i = 0; i < MAX_DEVICES; i++) { + md = dm_get_r(i); + if (md) { + if (!namecmp(md, name, nametype)) + return md; + + dm_put_r(md); + } + } + + return NULL; +} + +struct mapped_device *dm_get_name_w(const char *name, int nametype) +{ + int i; + struct mapped_device *md; + + /* + * To avoid getting write locks on all the devices we try + * and promote a read lock to a write lock, this can + * fail, in which case we just start again. + */ + + restart: + for (i = 0; i < MAX_DEVICES; i++) { + md = dm_get_r(i); + if (!md) + continue; + + if (namecmp(md, name, nametype)) { + dm_put_r(md); + continue; + } + + /* found it */ + dm_put_r(md); + + md = dm_get_w(i); + if (!md) + goto restart; + + if (namecmp(md, name, nametype)) { + dm_put_w(md); + goto restart; + } + + return md; + } + + return NULL; +} + +void dm_put_r(struct mapped_device *md) +{ + int minor = MINOR(md->dev); + + if (minor >= MAX_DEVICES) + return; + + up_read(_dev_locks + minor); +} + +void dm_put_w(struct mapped_device *md) +{ + int minor = MINOR(md->dev); + + if (minor >= MAX_DEVICES) + return; + + up_write(_dev_locks + minor); +} + +/* + * Setup and tear down the driver + */ +static __init void init_locks(void) +{ + int i; + + for (i = 0; i < MAX_DEVICES; i++) + init_rwsem(_dev_locks + i); +} + +static __init int local_init(void) +{ + int r; + + init_locks(); + + /* allocate a slab for the io-hooks */ + if (!_io_hook_cache && + !(_io_hook_cache = kmem_cache_create("dm io hooks", + sizeof(struct io_hook), + 0, 0, NULL, NULL))) + return -ENOMEM; + + _major = major; + r = devfs_register_blkdev(_major, _name, &dm_blk_dops); + if (r < 0) { + DMERR("register_blkdev failed"); + kmem_cache_destroy(_io_hook_cache); + return r; + } + + if (!_major) + _major = r; + + /* set up the arrays */ + read_ahead[_major] = DEFAULT_READ_AHEAD; + blk_size[_major] = _block_size; + blksize_size[_major] = _blksize_size; + hardsect_size[_major] = _hardsect_size; + + blk_queue_make_request(BLK_DEFAULT_QUEUE(_major), request); + + _dev_dir = devfs_mk_dir(0, DM_DIR, NULL); + + return 0; +} + +static void local_exit(void) +{ + if (kmem_cache_destroy(_io_hook_cache)) + DMWARN("io_hooks still allocated during unregistration"); + _io_hook_cache = NULL; + + if (devfs_unregister_blkdev(_major, _name) < 0) + DMERR("devfs_unregister_blkdev failed"); + + read_ahead[_major] = 0; + blk_size[_major] = NULL; + blksize_size[_major] = NULL; + hardsect_size[_major] = NULL; + _major = 0; + + DMINFO("cleaned up"); +} + +/* + * We have a lot of init/exit functions, so it seems easier to + * store them in an array. The disposable macro 'xx' + * expands a prefix into a pair of function names. + */ +static struct { + int (*init)(void); + void (*exit)(void); + +} _inits[] = { +#define xx(n) {n ## _init, n ## _exit}, + xx(local) + xx(dm_target) + xx(dm_linear) + xx(dm_stripe) + xx(dm_snapshot) + xx(dm_interface) +#undef xx +}; + +static int __init dm_init(void) +{ + const int count = sizeof(_inits) / sizeof(*_inits); + + int r, i; + + for (i = 0; i < count; i++) { + r = _inits[i].init(); + if (r) + goto bad; + } + + return 0; + + bad: + while (i--) + _inits[i].exit(); + + return r; +} + +static void __exit dm_exit(void) +{ + int i = sizeof(_inits) / sizeof(*_inits); + + dm_destroy_all(); + while (i--) + _inits[i].exit(); +} + +/* + * Block device functions + */ +static int dm_blk_open(struct inode *inode, struct file *file) +{ + struct mapped_device *md; + + md = dm_get_w(MINOR(inode->i_rdev)); + if (!md) + return -ENXIO; + + md->use_count++; + dm_put_w(md); + + return 0; +} + +static int dm_blk_close(struct inode *inode, struct file *file) +{ + struct mapped_device *md; + + md = dm_get_w(MINOR(inode->i_rdev)); + if (!md) + return -ENXIO; + + if (md->use_count < 1) + DMWARN("incorrect reference count found in mapped_device"); + + md->use_count--; + dm_put_w(md); + + return 0; +} + +/* In 512-byte units */ +#define VOLUME_SIZE(minor) (_block_size[(minor)] << 1) + +static int dm_blk_ioctl(struct inode *inode, struct file *file, + uint command, unsigned long a) +{ + int minor = MINOR(inode->i_rdev); + long size; + + if (minor >= MAX_DEVICES) + return -ENXIO; + + switch (command) { + case BLKROSET: + case BLKROGET: + case BLKRASET: + case BLKRAGET: + case BLKFLSBUF: + case BLKSSZGET: + //case BLKRRPART: /* Re-read partition tables */ + //case BLKPG: + case BLKELVGET: + case BLKELVSET: + case BLKBSZGET: + case BLKBSZSET: + return blk_ioctl(inode->i_rdev, command, a); + break; + + case BLKGETSIZE: + size = VOLUME_SIZE(minor); + if (copy_to_user((void *) a, &size, sizeof(long))) + return -EFAULT; + break; + + case BLKGETSIZE64: + size = VOLUME_SIZE(minor); + if (put_user((u64) ((u64) size) << 9, (u64 *) a)) + return -EFAULT; + break; + + case BLKRRPART: + return -ENOTTY; + + case LV_BMAP: + return dm_user_bmap(inode, (struct lv_bmap *) a); + + default: + DMWARN("unknown block ioctl 0x%x", command); + return -ENOTTY; + } + + return 0; +} + +static inline struct io_hook *alloc_io_hook(void) +{ + return kmem_cache_alloc(_io_hook_cache, GFP_NOIO); +} + +static inline void free_io_hook(struct io_hook *ih) +{ + kmem_cache_free(_io_hook_cache, ih); +} + +/* + * FIXME: We need to decide if deferred_io's need + * their own slab, I say no for now since they are + * only used when the device is suspended. + */ +static inline struct deferred_io *alloc_deferred(void) +{ + return kmalloc(sizeof(struct deferred_io), GFP_NOIO); +} + +static inline void free_deferred(struct deferred_io *di) +{ + kfree(di); +} + +/* + * Call a target's optional error function if an I/O failed. + */ +static inline int call_err_fn(struct io_hook *ih, struct buffer_head *bh) +{ + dm_err_fn err = ih->target->type->err; + + if (err) + return err(bh, ih->rw, ih->target->private); + + return 0; +} + +/* + * bh->b_end_io routine that decrements the pending count + * and then calls the original bh->b_end_io fn. + */ +static void dec_pending(struct buffer_head *bh, int uptodate) +{ + struct io_hook *ih = bh->b_private; + + if (!uptodate && call_err_fn(ih, bh)) + return; + + if (atomic_dec_and_test(&ih->md->pending)) + /* nudge anyone waiting on suspend queue */ + wake_up(&ih->md->wait); + + bh->b_end_io = ih->end_io; + bh->b_private = ih->context; + free_io_hook(ih); + + bh->b_end_io(bh, uptodate); +} + +/* + * Add the bh to the list of deferred io. + */ +static int queue_io(struct buffer_head *bh, int rw) +{ + struct deferred_io *di = alloc_deferred(); + struct mapped_device *md; + + if (!di) + return -ENOMEM; + + md = dm_get_w(MINOR(bh->b_rdev)); + if (!md) { + free_deferred(di); + return -ENXIO; + } + + if (!md->suspended) { + dm_put_w(md); + free_deferred(di); + return 1; + } + + di->bh = bh; + di->rw = rw; + di->next = md->deferred; + md->deferred = di; + + dm_put_w(md); + + return 0; /* deferred successfully */ +} + +/* + * Do the bh mapping for a given leaf + */ +static inline int __map_buffer(struct mapped_device *md, + struct buffer_head *bh, int rw, int leaf) +{ + int r; + dm_map_fn fn; + void *context; + struct io_hook *ih = NULL; + struct target *ti = md->map->targets + leaf; + + fn = ti->type->map; + context = ti->private; + + ih = alloc_io_hook(); + + if (!ih) + return -1; + + ih->md = md; + ih->rw = rw; + ih->target = ti; + ih->end_io = bh->b_end_io; + ih->context = bh->b_private; + + r = fn(bh, rw, context); + + if (r > 0) { + /* hook the end io request fn */ + atomic_inc(&md->pending); + bh->b_end_io = dec_pending; + bh->b_private = ih; + + } else if (r == 0) + /* we don't need to hook */ + free_io_hook(ih); + + else if (r < 0) { + free_io_hook(ih); + return -1; + } + + return r; +} + +/* + * Search the btree for the correct target. + */ +static inline int __find_node(struct dm_table *t, struct buffer_head *bh) +{ + int l, n = 0, k = 0; + offset_t *node; + + for (l = 0; l < t->depth; l++) { + n = get_child(n, k); + node = get_node(t, l, n); + + for (k = 0; k < KEYS_PER_NODE; k++) + if (node[k] >= bh->b_rsector) + break; + } + + return (KEYS_PER_NODE * n) + k; +} + +static int request(request_queue_t * q, int rw, struct buffer_head *bh) +{ + struct mapped_device *md; + int r, minor = MINOR(bh->b_rdev); + unsigned int block_size = _blksize_size[minor]; + + md = dm_get_r(minor); + if (!md) { + buffer_IO_error(bh); + return 0; + } + + /* + * Sanity checks. + */ + if (bh->b_size > block_size) + DMERR("request is larger than block size " + "b_size (%d), block size (%d)", + bh->b_size, block_size); + + if (bh->b_rsector & ((bh->b_size >> 9) - 1)) + DMERR("misaligned block requested logical " + "sector (%lu), b_size (%d)", + bh->b_rsector, bh->b_size); + + /* + * If we're suspended we have to queue + * this io for later. + */ + while (md->suspended) { + dm_put_r(md); + + if (rw == READA) + goto bad_no_lock; + + r = queue_io(bh, rw); + + if (r < 0) + goto bad_no_lock; + + else if (r == 0) + return 0; /* deferred successfully */ + + /* + * We're in a while loop, because someone could suspend + * before we get to the following read lock. + */ + md = dm_get_r(minor); + if (!md) { + buffer_IO_error(bh); + return 0; + } + } + + if ((r = __map_buffer(md, bh, rw, __find_node(md->map, bh))) < 0) + goto bad; + + dm_put_r(md); + return r; + + bad: + dm_put_r(md); + + bad_no_lock: + buffer_IO_error(bh); + return 0; +} + +static int check_dev_size(int minor, unsigned long block) +{ + /* FIXME: check this */ + unsigned long max_sector = (_block_size[minor] << 1) + 1; + unsigned long sector = (block + 1) * (_blksize_size[minor] >> 9); + + return (sector > max_sector) ? 0 : 1; +} + +/* + * Creates a dummy buffer head and maps it (for lilo). + */ +static int do_bmap(kdev_t dev, unsigned long block, + kdev_t * r_dev, unsigned long *r_block) +{ + struct mapped_device *md; + struct buffer_head bh; + int minor = MINOR(dev), r; + struct target *t; + + md = dm_get_r(minor); + if (!md) + return -ENXIO; + + if (md->suspended) { + dm_put_r(md); + return -EPERM; + } + + if (!check_dev_size(minor, block)) { + dm_put_r(md); + return -EINVAL; + } + + /* setup dummy bh */ + memset(&bh, 0, sizeof(bh)); + bh.b_blocknr = block; + bh.b_dev = bh.b_rdev = dev; + bh.b_size = _blksize_size[minor]; + bh.b_rsector = block * (bh.b_size >> 9); + + /* find target */ + t = md->map->targets + __find_node(md->map, &bh); + + /* do the mapping */ + r = t->type->map(&bh, READ, t->private); + + *r_dev = bh.b_rdev; + *r_block = bh.b_rsector / (bh.b_size >> 9); + + dm_put_r(md); + return r; +} + +/* + * Marshals arguments and results between user and kernel space. + */ +static int dm_user_bmap(struct inode *inode, struct lv_bmap *lvb) +{ + unsigned long block, r_block; + kdev_t r_dev; + int r; + + if (get_user(block, &lvb->lv_block)) + return -EFAULT; + + if ((r = do_bmap(inode->i_rdev, block, &r_dev, &r_block))) + return r; + + if (put_user(kdev_t_to_nr(r_dev), &lvb->lv_dev) || + put_user(r_block, &lvb->lv_block)) + return -EFAULT; + + return 0; +} + +/* + * See if the device with a specific minor # is free. The write + * lock is held when it returns successfully. + */ +static inline int specific_dev(int minor, struct mapped_device *md) +{ + if (minor >= MAX_DEVICES) { + DMWARN("request for a mapped_device beyond MAX_DEVICES (%d)", + MAX_DEVICES); + return -1; + } + + down_write(_dev_locks + minor); + if (_devs[minor]) { + /* in use */ + up_write(_dev_locks + minor); + return -1; + } + + return minor; +} + +/* + * Find the first free device. Again the write lock is held on + * success. + */ +static int any_old_dev(struct mapped_device *md) +{ + int i; + + for (i = 0; i < MAX_DEVICES; i++) + if (specific_dev(i, md) != -1) + return i; + + return -1; +} + +/* + * Allocate and initialise a blank device. + * Caller must ensure uuid is null-terminated. + * Device is returned with a write lock held. + */ +static struct mapped_device *alloc_dev(const char *name, const char *uuid, + int minor) +{ + struct mapped_device *md = kmalloc(sizeof(*md), GFP_KERNEL); + int len; + + if (!md) { + DMWARN("unable to allocate device, out of memory."); + return NULL; + } + + memset(md, 0, sizeof(*md)); + + /* + * This grabs the write lock if it succeeds. + */ + minor = (minor < 0) ? any_old_dev(md) : specific_dev(minor, md); + if (minor < 0) { + kfree(md); + return NULL; + } + + md->dev = MKDEV(_major, minor); + md->suspended = 0; + + strncpy(md->name, name, sizeof(md->name) - 1); + md->name[sizeof(md->name) - 1] = '\0'; + + /* + * Copy in the uuid. + */ + if (uuid && *uuid) { + len = strlen(uuid) + 1; + if (!(md->uuid = kmalloc(len, GFP_KERNEL))) { + DMWARN("unable to allocate uuid - out of memory."); + kfree(md); + return NULL; + } + strcpy(md->uuid, uuid); + } + + init_waitqueue_head(&md->wait); + return md; +} + +static int __register_device(struct mapped_device *md) +{ + md->devfs_entry = + devfs_register(_dev_dir, md->name, DEVFS_FL_CURRENT_OWNER, + MAJOR(md->dev), MINOR(md->dev), + S_IFBLK | S_IRUSR | S_IWUSR | S_IRGRP, + &dm_blk_dops, NULL); + + return 0; +} + +static int __unregister_device(struct mapped_device *md) +{ + devfs_unregister(md->devfs_entry); + return 0; +} + +/* + * The hardsect size for a mapped device is the largest hardsect size + * from the devices it maps onto. + */ +static int __find_hardsect_size(struct list_head *devices) +{ + int result = 512, size; + struct list_head *tmp; + + list_for_each(tmp, devices) { + struct dm_dev *dd = list_entry(tmp, struct dm_dev, list); + size = get_hardsect_size(dd->dev); + if (size > result) + result = size; + } + + return result; +} + +/* + * Bind a table to the device. + */ +static int __bind(struct mapped_device *md, struct dm_table *t) +{ + int minor = MINOR(md->dev); + + md->map = t; + + if (!t->num_targets) { + _block_size[minor] = 0; + _blksize_size[minor] = BLOCK_SIZE; + _hardsect_size[minor] = 0; + return 0; + } + + /* in k */ + _block_size[minor] = (t->highs[t->num_targets - 1] + 1) >> 1; + + _blksize_size[minor] = BLOCK_SIZE; + _hardsect_size[minor] = __find_hardsect_size(&t->devices); + register_disk(NULL, md->dev, 1, &dm_blk_dops, _block_size[minor]); + + return 0; +} + +static void __unbind(struct mapped_device *md) +{ + int minor = MINOR(md->dev); + + dm_table_destroy(md->map); + md->map = NULL; + + _block_size[minor] = 0; + _blksize_size[minor] = 0; + _hardsect_size[minor] = 0; +} + +static int check_name(const char *name) +{ + struct mapped_device *md; + + if (strchr(name, '/') || strlen(name) > DM_NAME_LEN) { + DMWARN("invalid device name"); + return -1; + } + + md = dm_get_name_r(name, DM_LOOKUP_BY_NAME); + if (md) { + dm_put_r(md); + DMWARN("device name already in use"); + return -1; + } + + return 0; +} + +static int check_uuid(const char *uuid) +{ + struct mapped_device *md; + + if (uuid) { + md = dm_get_name_r(uuid, DM_LOOKUP_BY_UUID); + if (md) { + dm_put_r(md); + DMWARN("device uuid already in use"); + return -1; + } + } + + return 0; +} + +/* + * Constructor for a new device. + */ +int dm_create(const char *name, const char *uuid, int minor, int ro, + struct dm_table *table) +{ + int r; + struct mapped_device *md; + + spin_lock(&_create_lock); + if (check_name(name) || check_uuid(uuid)) { + spin_unlock(&_create_lock); + return -EINVAL; + } + + md = alloc_dev(name, uuid, minor); + if (!md) { + spin_unlock(&_create_lock); + return -ENXIO; + } + minor = MINOR(md->dev); + _devs[minor] = md; + + r = __register_device(md); + if (r) + goto err; + + r = __bind(md, table); + if (r) + goto err; + + dm_set_ro(md, ro); + + spin_unlock(&_create_lock); + dm_put_w(md); + return 0; + + err: + _devs[minor] = NULL; + if (md->uuid) + kfree(md->uuid); + + dm_put_w(md); + kfree(md); + spin_unlock(&_create_lock); + return r; +} + +/* + * Renames the device. No lock held. + */ +int dm_set_name(const char *name, int nametype, const char *newname) +{ + int r; + struct mapped_device *md; + + spin_lock(&_create_lock); + if (check_name(newname) < 0) { + spin_unlock(&_create_lock); + return -EINVAL; + } + + md = dm_get_name_w(name, nametype); + if (!md) { + spin_unlock(&_create_lock); + return -ENXIO; + } + + r = __unregister_device(md); + if (r) + goto out; + + strcpy(md->name, newname); + r = __register_device(md); + + out: + dm_put_w(md); + spin_unlock(&_create_lock); + return r; +} + +/* + * Destructor for the device. You cannot destroy an open + * device. Write lock must be held before calling. + * Caller must dm_put_w(md) then kfree(md) if call was successful. + */ +int dm_destroy(struct mapped_device *md) +{ + int minor, r; + + if (md->use_count) + return -EPERM; + + r = __unregister_device(md); + if (r) + return r; + + minor = MINOR(md->dev); + _devs[minor] = NULL; + __unbind(md); + + if (md->uuid) + kfree(md->uuid); + + return 0; +} + +/* + * Destroy all devices - except open ones + */ +void dm_destroy_all(void) +{ + int i, some_destroyed, r; + struct mapped_device *md; + + do { + some_destroyed = 0; + for (i = 0; i < MAX_DEVICES; i++) { + md = dm_get_w(i); + if (!md) + continue; + + r = dm_destroy(md); + dm_put_w(md); + + if (!r) { + kfree(md); + some_destroyed = 1; + } + } + } while (some_destroyed); +} + +/* + * Sets or clears the read-only flag for the device. Write lock + * must be held. + */ +void dm_set_ro(struct mapped_device *md, int ro) +{ + md->read_only = ro; + set_device_ro(md->dev, ro); +} + +/* + * Requeue the deferred buffer_heads by calling generic_make_request. + */ +static void flush_deferred_io(struct deferred_io *c) +{ + struct deferred_io *n; + + while (c) { + n = c->next; + generic_make_request(c->rw, c->bh); + free_deferred(c); + c = n; + } +} + +/* + * Swap in a new table (destroying old one). Write lock must be + * held. + */ +int dm_swap_table(struct mapped_device *md, struct dm_table *table) +{ + int r; + + /* device must be suspended */ + if (!md->suspended) + return -EPERM; + + __unbind(md); + + r = __bind(md, table); + if (r) + return r; + + return 0; +} + +/* + * We need to be able to change a mapping table under a mounted + * filesystem. for example we might want to move some data in + * the background. Before the table can be swapped with + * dm_bind_table, dm_suspend must be called to flush any in + * flight buffer_heads and ensure that any further io gets + * deferred. Write lock must be held. + */ +int dm_suspend(struct mapped_device *md) +{ + int minor = MINOR(md->dev); + DECLARE_WAITQUEUE(wait, current); + + if (md->suspended) + return -EINVAL; + + md->suspended = 1; + dm_put_w(md); + + /* wait for all the pending io to flush */ + add_wait_queue(&md->wait, &wait); + current->state = TASK_UNINTERRUPTIBLE; + do { + md = dm_get_w(minor); + if (!md) { + /* Caller expects to free this lock. Yuck. */ + down_write(_dev_locks + minor); + return -ENXIO; + } + + if (!atomic_read(&md->pending)) + break; + + dm_put_w(md); + schedule(); + + } while (1); + + current->state = TASK_RUNNING; + remove_wait_queue(&md->wait, &wait); + + return 0; +} + +int dm_resume(struct mapped_device *md) +{ + int minor = MINOR(md->dev); + struct deferred_io *def; + + if (!md->suspended || !md->map->num_targets) + return -EINVAL; + + md->suspended = 0; + def = md->deferred; + md->deferred = NULL; + + dm_put_w(md); + flush_deferred_io(def); + run_task_queue(&tq_disk); + + if (!dm_get_w(minor)) { + /* FIXME: yuck */ + down_write(_dev_locks + minor); + return -ENXIO; + } + + return 0; +} + +struct block_device_operations dm_blk_dops = { + open: dm_blk_open, + release: dm_blk_close, + ioctl: dm_blk_ioctl, + owner: THIS_MODULE +}; + +/* + * module hooks + */ +module_init(dm_init); +module_exit(dm_exit); + +MODULE_PARM(major, "i"); +MODULE_PARM_DESC(major, "The major number of the device mapper"); +MODULE_DESCRIPTION(DM_NAME " driver"); +MODULE_AUTHOR("Joe Thornber "); +MODULE_LICENSE("GPL"); diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/md/dm-exception-store.c linux.21rc1-ac1/drivers/md/dm-exception-store.c --- linux.21rc1/drivers/md/dm-exception-store.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.21rc1-ac1/drivers/md/dm-exception-store.c 2003-04-22 16:44:37.000000000 +0100 @@ -0,0 +1,724 @@ +/* + * dm-snapshot.c + * + * Copyright (C) 2001-2002 Sistina Software (UK) Limited. + * + * This file is released under the GPL. + */ + +#include "dm-snapshot.h" +#include "kcopyd.h" +#include +#include + +#define SECTOR_SIZE 512 +#define SECTOR_SHIFT 9 + +/*----------------------------------------------------------------- + * Persistent snapshots, by persistent we mean that the snapshot + * will survive a reboot. + *---------------------------------------------------------------*/ + +/* + * We need to store a record of which parts of the origin have + * been copied to the snapshot device. The snapshot code + * requires that we copy exception chunks to chunk aligned areas + * of the COW store. It makes sense therefore, to store the + * metadata in chunk size blocks. + * + * There is no backward or forward compatibility implemented, + * snapshots with different disk versions than the kernel will + * not be usable. It is expected that "lvcreate" will blank out + * the start of a fresh COW device before calling the snapshot + * constructor. + * + * The first chunk of the COW device just contains the header. + * After this there is a chunk filled with exception metadata, + * followed by as many exception chunks as can fit in the + * metadata areas. + * + * All on disk structures are in little-endian format. The end + * of the exceptions info is indicated by an exception with a + * new_chunk of 0, which is invalid since it would point to the + * header chunk. + */ + +/* + * Magic for persistent snapshots: "SnAp" - Feeble isn't it. + */ +#define SNAP_MAGIC 0x70416e53 + +/* + * The on-disk version of the metadata. + */ +#define SNAPSHOT_DISK_VERSION 1 + +struct disk_header { + uint32_t magic; + + /* + * Is this snapshot valid. There is no way of recovering + * an invalid snapshot. + */ + int valid; + + /* + * Simple, incrementing version. no backward + * compatibility. + */ + uint32_t version; + + /* In sectors */ + uint32_t chunk_size; +}; + +struct disk_exception { + uint64_t old_chunk; + uint64_t new_chunk; +}; + +struct commit_callback { + void (*callback)(void *, int success); + void *context; +}; + +/* + * The top level structure for a persistent exception store. + */ +struct pstore { + struct dm_snapshot *snap; /* up pointer to my snapshot */ + int version; + int valid; + uint32_t chunk_size; + uint32_t exceptions_per_area; + + /* + * Now that we have an asynchronous kcopyd there is no + * need for large chunk sizes, so it wont hurt to have a + * whole chunks worth of metadata in memory at once. + */ + void *area; + struct kiobuf *iobuf; + + /* + * Used to keep track of which metadata area the data in + * 'chunk' refers to. + */ + uint32_t current_area; + + /* + * The next free chunk for an exception. + */ + uint32_t next_free; + + /* + * The index of next free exception in the current + * metadata area. + */ + uint32_t current_committed; + + atomic_t pending_count; + uint32_t callback_count; + struct commit_callback *callbacks; +}; + +/* + * For performance reasons we want to defer writing a committed + * exceptions metadata to disk so that we can amortise away this + * exensive operation. + * + * For the initial version of this code we will remain with + * synchronous io. There are some deadlock issues with async + * that I haven't yet worked out. + */ +static int do_io(int rw, struct kcopyd_region *where, struct kiobuf *iobuf) +{ + int i, sectors_per_block, nr_blocks, start; + int blocksize = get_hardsect_size(where->dev); + int status; + + sectors_per_block = blocksize / SECTOR_SIZE; + + nr_blocks = where->count / sectors_per_block; + start = where->sector / sectors_per_block; + + for (i = 0; i < nr_blocks; i++) + iobuf->blocks[i] = start++; + + iobuf->length = where->count << 9; + iobuf->locked = 1; + + status = brw_kiovec(rw, 1, &iobuf, where->dev, iobuf->blocks, + blocksize); + if (status != (where->count << 9)) + return -EIO; + + return 0; +} + +#if LINUX_VERSION_CODE < KERNEL_VERSION ( 2, 4, 19) +/* + * FIXME: Remove once 2.4.19 has been released. + */ +struct page *vmalloc_to_page(void *vmalloc_addr) +{ + unsigned long addr = (unsigned long) vmalloc_addr; + struct page *page = NULL; + pmd_t *pmd; + pte_t *pte; + pgd_t *pgd; + + pgd = pgd_offset_k(addr); + if (!pgd_none(*pgd)) { + pmd = pmd_offset(pgd, addr); + if (!pmd_none(*pmd)) { + pte = pte_offset(pmd, addr); + if (pte_present(*pte)) { + page = pte_page(*pte); + } + } + } + return page; +} +#endif + +static int allocate_iobuf(struct pstore *ps) +{ + size_t i, r = -ENOMEM, len, nr_pages; + struct page *page; + + len = ps->chunk_size << SECTOR_SHIFT; + + /* + * Allocate the chunk_size block of memory that will hold + * a single metadata area. + */ + ps->area = vmalloc(len); + if (!ps->area) + return r; + + if (alloc_kiovec(1, &ps->iobuf)) + goto bad; + + nr_pages = ps->chunk_size / (PAGE_SIZE / SECTOR_SIZE); + r = expand_kiobuf(ps->iobuf, nr_pages); + if (r) + goto bad; + + /* + * We lock the pages for ps->area into memory since they'll be + * doing a lot of io. + */ + for (i = 0; i < nr_pages; i++) { + page = vmalloc_to_page(ps->area + (i * PAGE_SIZE)); + LockPage(page); + ps->iobuf->maplist[i] = page; + ps->iobuf->nr_pages++; + } + + ps->iobuf->nr_pages = nr_pages; + ps->iobuf->offset = 0; + + return 0; + + bad: + if (ps->iobuf) + free_kiovec(1, &ps->iobuf); + + if (ps->area) + vfree(ps->area); + ps->iobuf = NULL; + return r; +} + +static void free_iobuf(struct pstore *ps) +{ + int i; + + for (i = 0; i < ps->iobuf->nr_pages; i++) + UnlockPage(ps->iobuf->maplist[i]); + ps->iobuf->locked = 0; + + free_kiovec(1, &ps->iobuf); + vfree(ps->area); +} + +/* + * Read or write a chunk aligned and sized block of data from a device. + */ +static int chunk_io(struct pstore *ps, uint32_t chunk, int rw) +{ + int r; + struct kcopyd_region where; + + where.dev = ps->snap->cow->dev; + where.sector = ps->chunk_size * chunk; + where.count = ps->chunk_size; + + r = do_io(rw, &where, ps->iobuf); + if (r) + return r; + + return 0; +} + +/* + * Read or write a metadata area. Remembering to skip the first + * chunk which holds the header. + */ +static int area_io(struct pstore *ps, uint32_t area, int rw) +{ + int r; + uint32_t chunk; + + /* convert a metadata area index to a chunk index */ + chunk = 1 + ((ps->exceptions_per_area + 1) * area); + + r = chunk_io(ps, chunk, rw); + if (r) + return r; + + ps->current_area = area; + return 0; +} + +static int zero_area(struct pstore *ps, uint32_t area) +{ + memset(ps->area, 0, ps->chunk_size << SECTOR_SHIFT); + return area_io(ps, area, WRITE); +} + +static int read_header(struct pstore *ps, int *new_snapshot) +{ + int r; + struct disk_header *dh; + + r = chunk_io(ps, 0, READ); + if (r) + return r; + + dh = (struct disk_header *) ps->area; + + if (dh->magic == 0) { + *new_snapshot = 1; + + } else if (dh->magic == SNAP_MAGIC) { + *new_snapshot = 0; + ps->valid = dh->valid; + ps->version = dh->version; + ps->chunk_size = dh->chunk_size; + + } else { + DMWARN("Invalid/corrupt snapshot"); + r = -ENXIO; + } + + return r; +} + +static int write_header(struct pstore *ps) +{ + struct disk_header *dh; + + memset(ps->area, 0, ps->chunk_size << SECTOR_SHIFT); + + dh = (struct disk_header *) ps->area; + dh->magic = SNAP_MAGIC; + dh->valid = ps->valid; + dh->version = ps->version; + dh->chunk_size = ps->chunk_size; + + return chunk_io(ps, 0, WRITE); +} + +/* + * Access functions for the disk exceptions, these do the endian conversions. + */ +static struct disk_exception *get_exception(struct pstore *ps, uint32_t index) +{ + if (index >= ps->exceptions_per_area) + return NULL; + + return ((struct disk_exception *) ps->area) + index; +} + +static int read_exception(struct pstore *ps, + uint32_t index, struct disk_exception *result) +{ + struct disk_exception *e; + + e = get_exception(ps, index); + if (!e) + return -EINVAL; + + /* copy it */ + result->old_chunk = le64_to_cpu(e->old_chunk); + result->new_chunk = le64_to_cpu(e->new_chunk); + + return 0; +} + +static int write_exception(struct pstore *ps, + uint32_t index, struct disk_exception *de) +{ + struct disk_exception *e; + + e = get_exception(ps, index); + if (!e) + return -EINVAL; + + /* copy it */ + e->old_chunk = cpu_to_le64(de->old_chunk); + e->new_chunk = cpu_to_le64(de->new_chunk); + + return 0; +} + +/* + * Registers the exceptions that are present in the current area. + * 'full' is filled in to indicate if the area has been + * filled. + */ +static int insert_exceptions(struct pstore *ps, int *full) +{ + int i, r; + struct disk_exception de; + + /* presume the area is full */ + *full = 1; + + for (i = 0; i < ps->exceptions_per_area; i++) { + r = read_exception(ps, i, &de); + + if (r) + return r; + + /* + * If the new_chunk is pointing at the start of + * the COW device, where the first metadata area + * is we know that we've hit the end of the + * exceptions. Therefore the area is not full. + */ + if (de.new_chunk == 0LL) { + ps->current_committed = i; + *full = 0; + break; + } + + /* + * Keep track of the start of the free chunks. + */ + if (ps->next_free <= de.new_chunk) + ps->next_free = de.new_chunk + 1; + + /* + * Otherwise we add the exception to the snapshot. + */ + r = dm_add_exception(ps->snap, de.old_chunk, de.new_chunk); + if (r) + return r; + } + + return 0; +} + +static int read_exceptions(struct pstore *ps) +{ + uint32_t area; + int r, full = 1; + + /* + * Keeping reading chunks and inserting exceptions until + * we find a partially full area. + */ + for (area = 0; full; area++) { + r = area_io(ps, area, READ); + if (r) + return r; + + r = insert_exceptions(ps, &full); + if (r) + return r; + + area++; + } + + return 0; +} + +static inline struct pstore *get_info(struct exception_store *store) +{ + return (struct pstore *) store->context; +} + +static int persistent_percentfull(struct exception_store *store) +{ + struct pstore *ps = get_info(store); + return (ps->next_free * store->snap->chunk_size * 100) / + get_dev_size(store->snap->cow->dev); +} + +static void persistent_destroy(struct exception_store *store) +{ + struct pstore *ps = get_info(store); + + vfree(ps->callbacks); + free_iobuf(ps); + kfree(ps); +} + +static int persistent_prepare(struct exception_store *store, + struct exception *e) +{ + struct pstore *ps = get_info(store); + uint32_t stride; + offset_t size = get_dev_size(store->snap->cow->dev); + + /* Is there enough room ? */ + if (size <= (ps->next_free * store->snap->chunk_size)) + return -ENOSPC; + + e->new_chunk = ps->next_free; + + /* + * Move onto the next free pending, making sure to take + * into account the location of the metadata chunks. + */ + stride = (ps->exceptions_per_area + 1); + if (!(++ps->next_free % stride)) + ps->next_free++; + + atomic_inc(&ps->pending_count); + return 0; +} + +static void persistent_commit(struct exception_store *store, + struct exception *e, + void (*callback) (void *, int success), + void *callback_context) +{ + int r, i; + struct pstore *ps = get_info(store); + struct disk_exception de; + struct commit_callback *cb; + + de.old_chunk = e->old_chunk; + de.new_chunk = e->new_chunk; + write_exception(ps, ps->current_committed++, &de); + + /* + * Add the callback to the back of the array. This code + * is the only place where the callback array is + * manipulated, and we know that it will never be called + * multiple times concurrently. + */ + cb = ps->callbacks + ps->callback_count++; + cb->callback = callback; + cb->context = callback_context; + + /* + * If there are no more exceptions in flight, or we have + * filled this metadata area we commit the exceptions to + * disk. + */ + if (atomic_dec_and_test(&ps->pending_count) || + (ps->current_committed == ps->exceptions_per_area)) { + r = area_io(ps, ps->current_area, WRITE); + if (r) + ps->valid = 0; + + for (i = 0; i < ps->callback_count; i++) { + cb = ps->callbacks + i; + cb->callback(cb->context, r == 0 ? 1 : 0); + } + + ps->callback_count = 0; + } + + /* + * Have we completely filled the current area ? + */ + if (ps->current_committed == ps->exceptions_per_area) { + ps->current_committed = 0; + r = zero_area(ps, ps->current_area + 1); + if (r) + ps->valid = 0; + } +} + +static void persistent_drop(struct exception_store *store) +{ + struct pstore *ps = get_info(store); + + ps->valid = 0; + if (write_header(ps)) + DMWARN("write header failed"); +} + +int dm_create_persistent(struct exception_store *store, uint32_t chunk_size) +{ + int r, new_snapshot; + struct pstore *ps; + + /* allocate the pstore */ + ps = kmalloc(sizeof(*ps), GFP_KERNEL); + if (!ps) + return -ENOMEM; + + ps->snap = store->snap; + ps->valid = 1; + ps->version = SNAPSHOT_DISK_VERSION; + ps->chunk_size = chunk_size; + ps->exceptions_per_area = (chunk_size << SECTOR_SHIFT) / + sizeof(struct disk_exception); + ps->next_free = 2; /* skipping the header and first area */ + ps->current_committed = 0; + + r = allocate_iobuf(ps); + if (r) + goto bad; + + /* + * Allocate space for all the callbacks. + */ + ps->callback_count = 0; + atomic_set(&ps->pending_count, 0); + ps->callbacks = vcalloc(ps->exceptions_per_area, + sizeof(*ps->callbacks)); + + if (!ps->callbacks) + goto bad; + + /* + * Read the snapshot header. + */ + r = read_header(ps, &new_snapshot); + if (r) + goto bad; + + /* + * Do we need to setup a new snapshot ? + */ + if (new_snapshot) { + r = write_header(ps); + if (r) { + DMWARN("write_header failed"); + goto bad; + } + + r = zero_area(ps, 0); + if (r) { + DMWARN("zero_area(0) failed"); + goto bad; + } + + } else { + /* + * Sanity checks. + */ + if (ps->chunk_size != chunk_size) { + DMWARN("chunk size for existing snapshot different " + "from that requested"); + r = -EINVAL; + goto bad; + } + + if (ps->version != SNAPSHOT_DISK_VERSION) { + DMWARN("unable to handle snapshot disk version %d", + ps->version); + r = -EINVAL; + goto bad; + } + + /* + * Read the metadata. + */ + r = read_exceptions(ps); + if (r) + goto bad; + } + + store->destroy = persistent_destroy; + store->prepare_exception = persistent_prepare; + store->commit_exception = persistent_commit; + store->drop_snapshot = persistent_drop; + store->percent_full = persistent_percentfull; + store->context = ps; + + return r; + + bad: + if (ps) { + if (ps->callbacks) + vfree(ps->callbacks); + + if (ps->iobuf) + free_iobuf(ps); + + kfree(ps); + } + return r; +} + +/*----------------------------------------------------------------- + * Implementation of the store for non-persistent snapshots. + *---------------------------------------------------------------*/ +struct transient_c { + offset_t next_free; +}; + +void transient_destroy(struct exception_store *store) +{ + kfree(store->context); +} + +int transient_prepare(struct exception_store *store, struct exception *e) +{ + struct transient_c *tc = (struct transient_c *) store->context; + offset_t size = get_dev_size(store->snap->cow->dev); + + if (size < (tc->next_free + store->snap->chunk_size)) + return -1; + + e->new_chunk = sector_to_chunk(store->snap, tc->next_free); + tc->next_free += store->snap->chunk_size; + + return 0; +} + +void transient_commit(struct exception_store *store, + struct exception *e, + void (*callback) (void *, int success), + void *callback_context) +{ + /* Just succeed */ + callback(callback_context, 1); +} + +static int transient_percentfull(struct exception_store *store) +{ + struct transient_c *tc = (struct transient_c *) store->context; + return (tc->next_free * 100) / get_dev_size(store->snap->cow->dev); +} + +int dm_create_transient(struct exception_store *store, + struct dm_snapshot *s, int blocksize, void **error) +{ + struct transient_c *tc; + + memset(store, 0, sizeof(*store)); + store->destroy = transient_destroy; + store->prepare_exception = transient_prepare; + store->commit_exception = transient_commit; + store->percent_full = transient_percentfull; + store->snap = s; + + tc = kmalloc(sizeof(struct transient_c), GFP_KERNEL); + if (!tc) + return -ENOMEM; + + tc->next_free = 0; + store->context = tc; + + return 0; +} diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/md/dm.h linux.21rc1-ac1/drivers/md/dm.h --- linux.21rc1/drivers/md/dm.h 1970-01-01 01:00:00.000000000 +0100 +++ linux.21rc1-ac1/drivers/md/dm.h 2003-04-22 19:20:12.000000000 +0100 @@ -0,0 +1,241 @@ +/* + * Internal header file for device mapper + * + * Copyright (C) 2001 Sistina Software + * + * This file is released under the LGPL. + */ + +#ifndef DM_INTERNAL_H +#define DM_INTERNAL_H + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DM_NAME "device-mapper" /* Name for messaging */ +#define DM_DRIVER_EMAIL "lvm-devel@lists.sistina.com" +#define MAX_DEPTH 16 +#define NODE_SIZE L1_CACHE_BYTES +#define KEYS_PER_NODE (NODE_SIZE / sizeof(offset_t)) +#define CHILDREN_PER_NODE (KEYS_PER_NODE + 1) +#define MAX_ARGS 32 +#define MAX_DEVICES 256 + +/* + * List of devices that a metadevice uses and should open/close. + */ +struct dm_dev { + atomic_t count; + struct list_head list; + + int mode; + + kdev_t dev; + struct block_device *bd; +}; + +/* + * I/O that had to be deferred while we were suspended + */ +struct deferred_io { + int rw; + struct buffer_head *bh; + struct deferred_io *next; +}; + +/* + * Btree leaf - this does the actual mapping + */ +struct target { + struct target_type *type; + void *private; +}; + +/* + * The btree + */ +struct dm_table { + /* btree table */ + int depth; + int counts[MAX_DEPTH]; /* in nodes */ + offset_t *index[MAX_DEPTH]; + + int num_targets; + int num_allocated; + offset_t *highs; + struct target *targets; + + /* + * Indicates the rw permissions for the new logical + * device. This should be a combination of FMODE_READ + * and FMODE_WRITE. + */ + int mode; + + /* a list of devices used by this table */ + struct list_head devices; + + /* + * A waitqueue for processes waiting for something + * interesting to happen to this table. + */ + wait_queue_head_t eventq; +}; + +/* + * The actual device struct + */ +struct mapped_device { + kdev_t dev; + char name[DM_NAME_LEN]; + char *uuid; + + int use_count; + int suspended; + int read_only; + + /* a list of io's that arrived while we were suspended */ + atomic_t pending; + wait_queue_head_t wait; + struct deferred_io *deferred; + + struct dm_table *map; + + /* used by dm-fs.c */ + devfs_handle_t devfs_entry; +}; + +extern struct block_device_operations dm_blk_dops; + +/* dm-target.c */ +int dm_target_init(void); +struct target_type *dm_get_target_type(const char *name); +void dm_put_target_type(struct target_type *t); +void dm_target_exit(void); + +/* + * Destructively splits argument list to pass to ctr. + */ +int split_args(int max, int *argc, char **argv, char *input); + +/* dm.c */ +struct mapped_device *dm_get_r(int minor); +struct mapped_device *dm_get_w(int minor); + +/* + * There are two ways to lookup a device. + */ +enum { + DM_LOOKUP_BY_NAME, + DM_LOOKUP_BY_UUID +}; + +struct mapped_device *dm_get_name_r(const char *name, int nametype); +struct mapped_device *dm_get_name_w(const char *name, int nametype); + +void dm_put_r(struct mapped_device *md); +void dm_put_w(struct mapped_device *md); + +/* + * Call with no lock. + */ +int dm_create(const char *name, const char *uuid, int minor, int ro, + struct dm_table *table); +int dm_set_name(const char *name, int nametype, const char *newname); +void dm_destroy_all(void); + +/* + * You must have the write lock before calling the remaining md + * methods. + */ +int dm_destroy(struct mapped_device *md); +void dm_set_ro(struct mapped_device *md, int ro); + +/* + * The device must be suspended before calling this method. + */ +int dm_swap_table(struct mapped_device *md, struct dm_table *t); + +/* + * A device can still be used while suspended, but I/O is deferred. + */ +int dm_suspend(struct mapped_device *md); +int dm_resume(struct mapped_device *md); + +/* dm-table.c */ +int dm_table_create(struct dm_table **result, int mode); +void dm_table_destroy(struct dm_table *t); + +int dm_table_add_target(struct dm_table *t, offset_t highs, + struct target_type *type, void *private); +int dm_table_complete(struct dm_table *t); + +/* + * Event handling + */ +void dm_table_event(struct dm_table *t); + +#define DMWARN(f, x...) printk(KERN_WARNING DM_NAME ": " f "\n" , ## x) +#define DMERR(f, x...) printk(KERN_ERR DM_NAME ": " f "\n" , ## x) +#define DMINFO(f, x...) printk(KERN_INFO DM_NAME ": " f "\n" , ## x) + +/* + * Calculate the index of the child node of the n'th node k'th key. + */ +static inline int get_child(int n, int k) +{ + return (n * CHILDREN_PER_NODE) + k; +} + +/* + * Return the n'th node of level l from table t. + */ +static inline offset_t *get_node(struct dm_table *t, int l, int n) +{ + return t->index[l] + (n * KEYS_PER_NODE); +} + +static inline int array_too_big(unsigned long fixed, unsigned long obj, + unsigned long num) +{ + return (num > (ULONG_MAX - fixed) / obj); +} + + +/* + * Targets + */ +int dm_linear_init(void); +void dm_linear_exit(void); + +int dm_stripe_init(void); +void dm_stripe_exit(void); + +int dm_snapshot_init(void); +void dm_snapshot_exit(void); + + +/* + * Init functions for the user interface to device-mapper. At + * the moment an ioctl interface on a special char device is + * used. A filesystem based interface would be a nicer way to + * go. + */ +int __init dm_interface_init(void); +void dm_interface_exit(void); + + +#endif diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/md/dm-ioctl.c linux.21rc1-ac1/drivers/md/dm-ioctl.c --- linux.21rc1/drivers/md/dm-ioctl.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.21rc1-ac1/drivers/md/dm-ioctl.c 2003-04-22 16:44:37.000000000 +0100 @@ -0,0 +1,830 @@ +/* + * Copyright (C) 2001 Sistina Software (UK) Limited. + * + * This file is released under the GPL. + */ + +#include "dm.h" + +#include +#include +#include +#include + +/*----------------------------------------------------------------- + * Implementation of the ioctl commands + *---------------------------------------------------------------*/ + +/* + * All the ioctl commands get dispatched to functions with this + * prototype. + */ +typedef int (*ioctl_fn)(struct dm_ioctl *param, struct dm_ioctl *user); + +/* + * This is really a debug only call. + */ +static int remove_all(struct dm_ioctl *param, struct dm_ioctl *user) +{ + dm_destroy_all(); + return 0; +} + +/* + * Check a string doesn't overrun the chunk of + * memory we copied from userland. + */ +static int valid_str(char *str, void *begin, void *end) +{ + while (((void *) str >= begin) && ((void *) str < end)) + if (!*str++) + return 0; + + return -EINVAL; +} + +static int next_target(struct dm_target_spec *last, uint32_t next, + void *begin, void *end, + struct dm_target_spec **spec, char **params) +{ + *spec = (struct dm_target_spec *) + ((unsigned char *) last + next); + *params = (char *) (*spec + 1); + + if (*spec < (last + 1) || ((void *) *spec > end)) + return -EINVAL; + + return valid_str(*params, begin, end); +} + +/* + * Checks to see if there's a gap in the table. + * Returns true iff there is a gap. + */ +static int gap(struct dm_table *table, struct dm_target_spec *spec) +{ + if (!table->num_targets) + return (spec->sector_start > 0) ? 1 : 0; + + if (spec->sector_start != table->highs[table->num_targets - 1] + 1) + return 1; + + return 0; +} + +static int populate_table(struct dm_table *table, struct dm_ioctl *args) +{ + int i = 0, r, first = 1, argc; + struct dm_target_spec *spec; + char *params, *argv[MAX_ARGS]; + struct target_type *ttype; + void *context, *begin, *end; + offset_t highs = 0; + + if (!args->target_count) { + DMWARN("populate_table: no targets specified"); + return -EINVAL; + } + + begin = (void *) args; + end = begin + args->data_size; + +#define PARSE_ERROR(msg) {DMWARN(msg); return -EINVAL;} + + for (i = 0; i < args->target_count; i++) { + + if (first) + r = next_target((struct dm_target_spec *) args, + args->data_start, + begin, end, &spec, ¶ms); + else + r = next_target(spec, spec->next, begin, end, + &spec, ¶ms); + + if (r) + PARSE_ERROR("unable to find target"); + + /* Look up the target type */ + ttype = dm_get_target_type(spec->target_type); + if (!ttype) + PARSE_ERROR("unable to find target type"); + + if (gap(table, spec)) + PARSE_ERROR("gap in target ranges"); + + /* Split up the parameter list */ + if (split_args(MAX_ARGS, &argc, argv, params) < 0) + PARSE_ERROR("Too many arguments"); + + /* Build the target */ + if (ttype->ctr(table, spec->sector_start, spec->length, + argc, argv, &context)) { + DMWARN("%s: target constructor failed", + (char *) context); + return -EINVAL; + } + + /* Add the target to the table */ + highs = spec->sector_start + (spec->length - 1); + if (dm_table_add_target(table, highs, ttype, context)) + PARSE_ERROR("internal error adding target to table"); + + first = 0; + } + +#undef PARSE_ERROR + + r = dm_table_complete(table); + return r; +} + +/* + * Round up the ptr to the next 'align' boundary. Obviously + * 'align' must be a power of 2. + */ +static inline void *align_ptr(void *ptr, unsigned int align) +{ + align--; + return (void *) (((unsigned long) (ptr + align)) & ~align); +} + +/* + * Copies a dm_ioctl and an optional additional payload to + * userland. + */ +static int results_to_user(struct dm_ioctl *user, struct dm_ioctl *param, + void *data, uint32_t len) +{ + int r; + void *ptr = NULL; + + if (data) { + ptr = align_ptr(user + 1, sizeof(unsigned long)); + param->data_start = ptr - (void *) user; + } + + /* + * The version number has already been filled in, so we + * just copy later fields. + */ + r = copy_to_user(&user->data_size, ¶m->data_size, + sizeof(*param) - sizeof(param->version)); + if (r) + return -EFAULT; + + if (data) { + if (param->data_start + len > param->data_size) + return -ENOSPC; + + if (copy_to_user(ptr, data, len)) + r = -EFAULT; + } + + return r; +} + +/* + * Fills in a dm_ioctl structure, ready for sending back to + * userland. + */ +static void __info(struct mapped_device *md, struct dm_ioctl *param) +{ + param->flags = DM_EXISTS_FLAG; + if (md->suspended) + param->flags |= DM_SUSPEND_FLAG; + if (md->read_only) + param->flags |= DM_READONLY_FLAG; + + strncpy(param->name, md->name, sizeof(param->name)); + + if (md->uuid) + strncpy(param->uuid, md->uuid, sizeof(param->uuid) - 1); + else + param->uuid[0] = '\0'; + + param->open_count = md->use_count; + param->dev = kdev_t_to_nr(md->dev); + param->target_count = md->map->num_targets; +} + +/* + * Always use UUID for lookups if it's present, otherwise use name. + */ +static inline char *lookup_name(struct dm_ioctl *param) +{ + return (*param->uuid) ? param->uuid : param->name; +} + +static inline int lookup_type(struct dm_ioctl *param) +{ + return (*param->uuid) ? DM_LOOKUP_BY_UUID : DM_LOOKUP_BY_NAME; +} + +#define ALIGNMENT sizeof(int) +static void *_align(void *ptr, unsigned int a) +{ + register unsigned long align = --a; + + return (void *) (((unsigned long) ptr + align) & ~align); +} + +/* + * Copies device info back to user space, used by + * the create and info ioctls. + */ +static int info(struct dm_ioctl *param, struct dm_ioctl *user) +{ + struct mapped_device *md; + + param->flags = 0; + + md = dm_get_name_r(lookup_name(param), lookup_type(param)); + if (!md) + /* + * Device not found - returns cleared exists flag. + */ + goto out; + + __info(md, param); + dm_put_r(md); + + out: + return results_to_user(user, param, NULL, 0); +} + +static inline int get_mode(struct dm_ioctl *param) +{ + int mode = FMODE_READ | FMODE_WRITE; + + if (param->flags & DM_READONLY_FLAG) + mode = FMODE_READ; + + return mode; +} + +static int create(struct dm_ioctl *param, struct dm_ioctl *user) +{ + int r, ro; + struct dm_table *t; + int minor; + + r = dm_table_create(&t, get_mode(param)); + if (r) + return r; + + r = populate_table(t, param); + if (r) { + dm_table_destroy(t); + return r; + } + + minor = (param->flags & DM_PERSISTENT_DEV_FLAG) ? + MINOR(to_kdev_t(param->dev)) : -1; + + ro = (param->flags & DM_READONLY_FLAG) ? 1 : 0; + + r = dm_create(param->name, param->uuid, minor, ro, t); + if (r) { + dm_table_destroy(t); + return r; + } + + r = info(param, user); + return r; +} + + + +/* + * Build up the status struct for each target + */ +static int __status(struct mapped_device *md, struct dm_ioctl *param, + char *outbuf, int *len) +{ + int i; + struct dm_target_spec *spec; + uint64_t sector = 0LL; + char *outptr; + status_type_t type; + + if (param->flags & DM_STATUS_TABLE_FLAG) + type = STATUSTYPE_TABLE; + else + type = STATUSTYPE_INFO; + + outptr = outbuf; + + /* Get all the target info */ + for (i = 0; i < md->map->num_targets; i++) { + struct target_type *tt = md->map->targets[i].type; + offset_t high = md->map->highs[i]; + + if (outptr - outbuf + + sizeof(struct dm_target_spec) > param->data_size) + return -ENOMEM; + + spec = (struct dm_target_spec *) outptr; + + spec->status = 0; + spec->sector_start = sector; + spec->length = high - sector + 1; + strncpy(spec->target_type, tt->name, sizeof(spec->target_type)); + + outptr += sizeof(struct dm_target_spec); + + /* Get the status/table string from the target driver */ + if (tt->status) + tt->status(type, outptr, + outbuf + param->data_size - outptr, + md->map->targets[i].private); + else + outptr[0] = '\0'; + + outptr += strlen(outptr) + 1; + _align(outptr, ALIGNMENT); + + sector = high + 1; + + spec->next = outptr - outbuf; + } + + param->target_count = md->map->num_targets; + *len = outptr - outbuf; + + return 0; +} + +/* + * Return the status of a device as a text string for each + * target. + */ +static int get_status(struct dm_ioctl *param, struct dm_ioctl *user) +{ + struct mapped_device *md; + int len = 0; + int ret; + char *outbuf = NULL; + + md = dm_get_name_r(lookup_name(param), lookup_type(param)); + if (!md) + /* + * Device not found - returns cleared exists flag. + */ + goto out; + + /* We haven't a clue how long the resultant data will be so + just allocate as much as userland has allowed us and make sure + we don't overun it */ + outbuf = kmalloc(param->data_size, GFP_KERNEL); + if (!outbuf) + goto out; + /* + * Get the status of all targets + */ + __status(md, param, outbuf, &len); + + /* + * Setup the basic dm_ioctl structure. + */ + __info(md, param); + + out: + if (md) + dm_put_r(md); + + ret = results_to_user(user, param, outbuf, len); + + if (outbuf) + kfree(outbuf); + + return ret; +} + +/* + * Wait for a device to report an event + */ +static int wait_device_event(struct dm_ioctl *param, struct dm_ioctl *user) +{ + struct mapped_device *md; + DECLARE_WAITQUEUE(wq, current); + + md = dm_get_name_r(lookup_name(param), lookup_type(param)); + if (!md) + /* + * Device not found - returns cleared exists flag. + */ + goto out; + /* + * Setup the basic dm_ioctl structure. + */ + __info(md, param); + + /* + * Wait for a notification event + */ + set_current_state(TASK_INTERRUPTIBLE); + add_wait_queue(&md->map->eventq, &wq); + + dm_put_r(md); + + schedule(); + set_current_state(TASK_RUNNING); + + out: + return results_to_user(user, param, NULL, 0); +} + +/* + * Retrieves a list of devices used by a particular dm device. + */ +static int dep(struct dm_ioctl *param, struct dm_ioctl *user) +{ + int count, r; + struct mapped_device *md; + struct list_head *tmp; + size_t len = 0; + struct dm_target_deps *deps = NULL; + + md = dm_get_name_r(lookup_name(param), lookup_type(param)); + if (!md) + goto out; + + /* + * Setup the basic dm_ioctl structure. + */ + __info(md, param); + + /* + * Count the devices. + */ + count = 0; + list_for_each(tmp, &md->map->devices) + count++; + + /* + * Allocate a kernel space version of the dm_target_status + * struct. + */ + if (array_too_big(sizeof(*deps), sizeof(*deps->dev), count)) { + dm_put_r(md); + return -ENOMEM; + } + + len = sizeof(*deps) + (sizeof(*deps->dev) * count); + deps = kmalloc(len, GFP_KERNEL); + if (!deps) { + dm_put_r(md); + return -ENOMEM; + } + + /* + * Fill in the devices. + */ + deps->count = count; + count = 0; + list_for_each(tmp, &md->map->devices) { + struct dm_dev *dd = list_entry(tmp, struct dm_dev, list); + deps->dev[count++] = kdev_t_to_nr(dd->dev); + } + dm_put_r(md); + + out: + r = results_to_user(user, param, deps, len); + + kfree(deps); + return r; +} + +static int remove(struct dm_ioctl *param, struct dm_ioctl *user) +{ + int r; + struct mapped_device *md; + + md = dm_get_name_w(lookup_name(param), lookup_type(param)); + if (!md) + return -ENXIO; + + r = dm_destroy(md); + dm_put_w(md); + if (!r) + kfree(md); + + return r; +} + +static int suspend(struct dm_ioctl *param, struct dm_ioctl *user) +{ + int r; + struct mapped_device *md; + + md = dm_get_name_w(lookup_name(param), lookup_type(param)); + if (!md) + return -ENXIO; + + r = (param->flags & DM_SUSPEND_FLAG) ? dm_suspend(md) : dm_resume(md); + dm_put_w(md); + + return r; +} + +static int reload(struct dm_ioctl *param, struct dm_ioctl *user) +{ + int r; + struct mapped_device *md; + struct dm_table *t; + + r = dm_table_create(&t, get_mode(param)); + if (r) + return r; + + r = populate_table(t, param); + if (r) { + dm_table_destroy(t); + return r; + } + + md = dm_get_name_w(lookup_name(param), lookup_type(param)); + if (!md) { + dm_table_destroy(t); + return -ENXIO; + } + + r = dm_swap_table(md, t); + if (r) { + dm_put_w(md); + dm_table_destroy(t); + return r; + } + + dm_set_ro(md, (param->flags & DM_READONLY_FLAG) ? 1 : 0); + dm_put_w(md); + + r = info(param, user); + return r; +} + +static int rename(struct dm_ioctl *param, struct dm_ioctl *user) +{ + char *newname = (char *) param + param->data_start; + + if (valid_str(newname, (void *) param, + (void *) param + param->data_size) || + dm_set_name(lookup_name(param), lookup_type(param), newname)) { + DMWARN("Invalid new logical volume name supplied."); + return -EINVAL; + } + + return 0; +} + + +/*----------------------------------------------------------------- + * Implementation of open/close/ioctl on the special char + * device. + *---------------------------------------------------------------*/ +static int ctl_open(struct inode *inode, struct file *file) +{ + /* only root can open this */ + if (!capable(CAP_SYS_ADMIN)) + return -EACCES; + + MOD_INC_USE_COUNT; + + return 0; +} + +static int ctl_close(struct inode *inode, struct file *file) +{ + MOD_DEC_USE_COUNT; + return 0; +} + +static ioctl_fn lookup_ioctl(unsigned int cmd) +{ + static struct { + int cmd; + ioctl_fn fn; + } _ioctls[] = { + {DM_VERSION_CMD, NULL}, /* version is dealt with elsewhere */ + {DM_REMOVE_ALL_CMD, remove_all}, + {DM_DEV_CREATE_CMD, create}, + {DM_DEV_REMOVE_CMD, remove}, + {DM_DEV_RELOAD_CMD, reload}, + {DM_DEV_RENAME_CMD, rename}, + {DM_DEV_SUSPEND_CMD, suspend}, + {DM_DEV_DEPS_CMD, dep}, + {DM_DEV_STATUS_CMD, info}, + {DM_TARGET_STATUS_CMD, get_status}, + {DM_TARGET_WAIT_CMD, wait_device_event}, + }; + static int nelts = sizeof(_ioctls) / sizeof(*_ioctls); + + return (cmd >= nelts) ? NULL : _ioctls[cmd].fn; +} + +/* + * As well as checking the version compatibility this always + * copies the kernel interface version out. + */ +static int check_version(int cmd, struct dm_ioctl *user) +{ + uint32_t version[3]; + int r = 0; + + if (copy_from_user(version, user->version, sizeof(version))) + return -EFAULT; + + if ((DM_VERSION_MAJOR != version[0]) || + (DM_VERSION_MINOR < version[1])) { + DMWARN("ioctl interface mismatch: " + "kernel(%u.%u.%u), user(%u.%u.%u), cmd(%d)", + DM_VERSION_MAJOR, DM_VERSION_MINOR, + DM_VERSION_PATCHLEVEL, + version[0], version[1], version[2], cmd); + r = -EINVAL; + } + + /* + * Fill in the kernel version. + */ + version[0] = DM_VERSION_MAJOR; + version[1] = DM_VERSION_MINOR; + version[2] = DM_VERSION_PATCHLEVEL; + if (copy_to_user(user->version, version, sizeof(version))) + return -EFAULT; + + return r; +} + +static void free_params(struct dm_ioctl *param) +{ + vfree(param); +} + +static int copy_params(struct dm_ioctl *user, struct dm_ioctl **param) +{ + struct dm_ioctl tmp, *dmi; + + if (copy_from_user(&tmp, user, sizeof(tmp))) + return -EFAULT; + + if (tmp.data_size < sizeof(tmp) || tmp.data_size > 65536) + return -EINVAL; + + dmi = (struct dm_ioctl *) vmalloc(tmp.data_size); + if (!dmi) + return -ENOMEM; + + if (copy_from_user(dmi, user, tmp.data_size)) { + vfree(dmi); + return -EFAULT; + } + + *param = dmi; + return 0; +} + +static int validate_params(uint cmd, struct dm_ioctl *param) +{ + /* Ignores parameters */ + if (cmd == DM_REMOVE_ALL_CMD) + return 0; + + /* Unless creating, either name of uuid but not both */ + if (cmd != DM_DEV_CREATE_CMD) { + if ((!*param->uuid && !*param->name) || + (*param->uuid && *param->name)) { + DMWARN("one of name or uuid must be supplied"); + return -EINVAL; + } + } + + /* Ensure strings are terminated */ + param->name[DM_NAME_LEN - 1] = '\0'; + param->uuid[DM_UUID_LEN - 1] = '\0'; + + return 0; +} + +static int ctl_ioctl(struct inode *inode, struct file *file, + uint command, ulong u) +{ + + int r = 0, cmd; + struct dm_ioctl *param; + struct dm_ioctl *user = (struct dm_ioctl *) u; + ioctl_fn fn = NULL; + + if (_IOC_TYPE(command) != DM_IOCTL) + return -ENOTTY; + + cmd = _IOC_NR(command); + + /* + * Check the interface version passed in. This also + * writes out the kernel's interface version. + */ + r = check_version(cmd, user); + if (r) + return r; + + /* + * Nothing more to do for the version command. + */ + if (cmd == DM_VERSION_CMD) + return 0; + + fn = lookup_ioctl(cmd); + if (!fn) { + DMWARN("dm_ctl_ioctl: unknown command 0x%x", command); + return -ENOTTY; + } + + /* + * Copy the parameters into kernel space. + */ + r = copy_params(user, ¶m); + if (r) + return r; + + r = validate_params(cmd, param); + if (r) { + free_params(param); + return r; + } + + r = fn(param, user); + free_params(param); + return r; +} + +static struct file_operations _ctl_fops = { + open: ctl_open, + release: ctl_close, + ioctl: ctl_ioctl, + owner: THIS_MODULE, +}; + +static devfs_handle_t _ctl_handle; + +static struct miscdevice _dm_misc = { + minor: MISC_DYNAMIC_MINOR, + name: DM_NAME, + fops: &_ctl_fops +}; + +static int __init dm_devfs_init(void) { + int r; + char rname[64]; + + r = devfs_generate_path(_dm_misc.devfs_handle, rname + 3, + sizeof rname - 3); + if (r == -ENOSYS) + return 0; /* devfs not present */ + + if (r < 0) { + DMERR("devfs_generate_path failed for control device"); + return r; + } + + strncpy(rname + r, "../", 3); + r = devfs_mk_symlink(NULL, DM_DIR "/control", + DEVFS_FL_DEFAULT, rname + r, &_ctl_handle, NULL); + if (r) { + DMERR("devfs_mk_symlink failed for control device"); + return r; + } + devfs_auto_unregister(_dm_misc.devfs_handle, _ctl_handle); + + return 0; +} + +/* Create misc character device and link to DM_DIR/control */ +int __init dm_interface_init(void) +{ + int r; + + r = misc_register(&_dm_misc); + if (r) { + DMERR("misc_register failed for control device"); + return r; + } + + r = dm_devfs_init(); + if (r) { + misc_deregister(&_dm_misc); + return r; + } + + DMINFO("%d.%d.%d%s initialised: %s", DM_VERSION_MAJOR, + DM_VERSION_MINOR, DM_VERSION_PATCHLEVEL, DM_VERSION_EXTRA, + DM_DRIVER_EMAIL); + + return 0; +} + +void dm_interface_exit(void) +{ + if (misc_deregister(&_dm_misc) < 0) + DMERR("misc_deregister failed for control device"); +} diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/md/dm-linear.c linux.21rc1-ac1/drivers/md/dm-linear.c --- linux.21rc1/drivers/md/dm-linear.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.21rc1-ac1/drivers/md/dm-linear.c 2003-04-22 16:44:37.000000000 +0100 @@ -0,0 +1,125 @@ +/* + * Copyright (C) 2001 Sistina Software (UK) Limited. + * + * This file is released under the GPL. + */ + +#include "dm.h" + +#include +#include +#include + +/* + * Linear: maps a linear range of a device. + */ +struct linear_c { + long delta; /* FIXME: we need a signed offset type */ + long start; /* For display only */ + struct dm_dev *dev; +}; + +/* + * Construct a linear mapping: + */ +static int linear_ctr(struct dm_table *t, offset_t b, offset_t l, + int argc, char **argv, void **context) +{ + struct linear_c *lc; + unsigned long start; /* FIXME: unsigned long long */ + char *end; + + if (argc != 2) { + *context = "dm-linear: Not enough arguments"; + return -EINVAL; + } + + lc = kmalloc(sizeof(*lc), GFP_KERNEL); + if (lc == NULL) { + *context = "dm-linear: Cannot allocate linear context"; + return -ENOMEM; + } + + start = simple_strtoul(argv[1], &end, 10); + if (*end) { + *context = "dm-linear: Invalid device sector"; + goto bad; + } + + if (dm_table_get_device(t, argv[0], start, l, t->mode, &lc->dev)) { + *context = "dm-linear: Device lookup failed"; + goto bad; + } + + lc->delta = (int) start - (int) b; + lc->start = start; + *context = lc; + return 0; + + bad: + kfree(lc); + return -EINVAL; +} + +static void linear_dtr(struct dm_table *t, void *c) +{ + struct linear_c *lc = (struct linear_c *) c; + + dm_table_put_device(t, lc->dev); + kfree(c); +} + +static int linear_map(struct buffer_head *bh, int rw, void *context) +{ + struct linear_c *lc = (struct linear_c *) context; + + bh->b_rdev = lc->dev->dev; + bh->b_rsector = bh->b_rsector + lc->delta; + + return 1; +} + +static int linear_status(status_type_t type, char *result, int maxlen, + void *context) +{ + struct linear_c *lc = (struct linear_c *) context; + + switch (type) { + case STATUSTYPE_INFO: + result[0] = '\0'; + break; + + case STATUSTYPE_TABLE: + snprintf(result, maxlen, "%s %ld", kdevname(lc->dev->dev), + lc->start); + break; + } + return 0; +} + +static struct target_type linear_target = { + name: "linear", + module: THIS_MODULE, + ctr: linear_ctr, + dtr: linear_dtr, + map: linear_map, + status: linear_status, +}; + +int __init dm_linear_init(void) +{ + int r = dm_register_target(&linear_target); + + if (r < 0) + DMERR("linear: register failed %d", r); + + return r; +} + +void dm_linear_exit(void) +{ + int r = dm_unregister_target(&linear_target); + + if (r < 0) + DMERR("linear: unregister failed %d", r); +} diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/md/dm-snapshot.c linux.21rc1-ac1/drivers/md/dm-snapshot.c --- linux.21rc1/drivers/md/dm-snapshot.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.21rc1-ac1/drivers/md/dm-snapshot.c 2003-04-22 16:44:37.000000000 +0100 @@ -0,0 +1,1169 @@ +/* + * dm-snapshot.c + * + * Copyright (C) 2001-2002 Sistina Software (UK) Limited. + * + * This file is released under the GPL. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "dm-snapshot.h" +#include "kcopyd.h" + +/* + * FIXME: Remove this before release. + */ +#if 0 +#define DMDEBUG(x...) DMWARN( ## x) +#else +#define DMDEBUG(x...) +#endif + +/* + * The percentage increment we will wake up users at + */ +#define WAKE_UP_PERCENT 5 + +/* + * Hard sector size used all over the kernel + */ +#define SECTOR_SIZE 512 + +/* + * kcopyd priority of snapshot operations + */ +#define SNAPSHOT_COPY_PRIORITY 2 + +struct pending_exception { + struct exception e; + + /* + * Origin buffers waiting for this to complete are held + * in a list (using b_reqnext). + */ + struct buffer_head *origin_bhs; + struct buffer_head *snapshot_bhs; + + /* + * Other pending_exceptions that are processing this + * chunk. When this list is empty, we know we can + * complete the origins. + */ + struct list_head siblings; + + /* Pointer back to snapshot context */ + struct dm_snapshot *snap; + + /* + * 1 indicates the exception has already been sent to + * kcopyd. + */ + int started; +}; + +/* + * Hash table mapping origin volumes to lists of snapshots and + * a lock to protect it + */ +static kmem_cache_t *exception_cache; +static kmem_cache_t *pending_cache; +static mempool_t *pending_pool; + +/* + * One of these per registered origin, held in the snapshot_origins hash + */ +struct origin { + /* The origin device */ + kdev_t dev; + + struct list_head hash_list; + + /* List of snapshots for this origin */ + struct list_head snapshots; +}; + +/* + * Size of the hash table for origin volumes. If we make this + * the size of the minors list then it should be nearly perfect + */ +#define ORIGIN_HASH_SIZE 256 +#define ORIGIN_MASK 0xFF +static struct list_head *_origins; +static struct rw_semaphore _origins_lock; + +static int init_origin_hash(void) +{ + int i; + + _origins = kmalloc(ORIGIN_HASH_SIZE * sizeof(struct list_head), + GFP_KERNEL); + if (!_origins) { + DMERR("Device mapper: Snapshot: unable to allocate memory"); + return -ENOMEM; + } + + for (i = 0; i < ORIGIN_HASH_SIZE; i++) + INIT_LIST_HEAD(_origins + i); + init_rwsem(&_origins_lock); + + return 0; +} + +static void exit_origin_hash(void) +{ + kfree(_origins); +} + +static inline unsigned int origin_hash(kdev_t dev) +{ + return MINOR(dev) & ORIGIN_MASK; +} + +static struct origin *__lookup_origin(kdev_t origin) +{ + struct list_head *slist; + struct list_head *ol; + struct origin *o; + + ol = &_origins[origin_hash(origin)]; + list_for_each(slist, ol) { + o = list_entry(slist, struct origin, hash_list); + + if (o->dev == origin) + return o; + } + + return NULL; +} + +static void __insert_origin(struct origin *o) +{ + struct list_head *sl = &_origins[origin_hash(o->dev)]; + list_add_tail(&o->hash_list, sl); +} + +/* + * Make a note of the snapshot and its origin so we can look it + * up when the origin has a write on it. + */ +static int register_snapshot(struct dm_snapshot *snap) +{ + struct origin *o; + kdev_t dev = snap->origin->dev; + + down_write(&_origins_lock); + o = __lookup_origin(dev); + + if (!o) { + /* New origin */ + o = kmalloc(sizeof(*o), GFP_KERNEL); + if (!o) { + up_write(&_origins_lock); + return -ENOMEM; + } + + /* Initialise the struct */ + INIT_LIST_HEAD(&o->snapshots); + o->dev = dev; + + __insert_origin(o); + } + + list_add_tail(&snap->list, &o->snapshots); + + up_write(&_origins_lock); + return 0; +} + +static void unregister_snapshot(struct dm_snapshot *s) +{ + struct origin *o; + + down_write(&_origins_lock); + o = __lookup_origin(s->origin->dev); + + list_del(&s->list); + if (list_empty(&o->snapshots)) { + list_del(&o->hash_list); + kfree(o); + } + + up_write(&_origins_lock); +} + +/* + * Implementation of the exception hash tables. + */ +static int init_exception_table(struct exception_table *et, uint32_t size) +{ + int i; + + et->hash_mask = size - 1; + et->table = vcalloc(size, sizeof(struct list_head)); + if (!et->table) + return -ENOMEM; + + for (i = 0; i < size; i++) + INIT_LIST_HEAD(et->table + i); + + return 0; +} + +static void exit_exception_table(struct exception_table *et, kmem_cache_t *mem) +{ + struct list_head *slot, *entry, *temp; + struct exception *ex; + int i, size; + + size = et->hash_mask + 1; + for (i = 0; i < size; i++) { + slot = et->table + i; + + list_for_each_safe(entry, temp, slot) { + ex = list_entry(entry, struct exception, hash_list); + kmem_cache_free(mem, ex); + } + } + + vfree(et->table); +} + +/* + * FIXME: check how this hash fn is performing. + */ +static inline uint32_t exception_hash(struct exception_table *et, chunk_t chunk) +{ + return chunk & et->hash_mask; +} + +static void insert_exception(struct exception_table *eh, struct exception *e) +{ + struct list_head *l = &eh->table[exception_hash(eh, e->old_chunk)]; + list_add(&e->hash_list, l); +} + +static inline void remove_exception(struct exception *e) +{ + list_del(&e->hash_list); +} + +/* + * Return the exception data for a sector, or NULL if not + * remapped. + */ +static struct exception *lookup_exception(struct exception_table *et, + chunk_t chunk) +{ + struct list_head *slot, *el; + struct exception *e; + + slot = &et->table[exception_hash(et, chunk)]; + list_for_each(el, slot) { + e = list_entry(el, struct exception, hash_list); + if (e->old_chunk == chunk) + return e; + } + + return NULL; +} + +static inline struct exception *alloc_exception(void) +{ + struct exception *e; + + e = kmem_cache_alloc(exception_cache, GFP_NOIO); + if (!e) + e = kmem_cache_alloc(exception_cache, GFP_ATOMIC); + + return e; +} + +static inline void free_exception(struct exception *e) +{ + kmem_cache_free(exception_cache, e); +} + +static inline struct pending_exception *alloc_pending_exception(void) +{ + return mempool_alloc(pending_pool, GFP_NOIO); +} + +static inline void free_pending_exception(struct pending_exception *pe) +{ + mempool_free(pe, pending_pool); +} + +int dm_add_exception(struct dm_snapshot *s, chunk_t old, chunk_t new) +{ + struct exception *e; + + e = alloc_exception(); + if (!e) + return -ENOMEM; + + e->old_chunk = old; + e->new_chunk = new; + insert_exception(&s->complete, e); + return 0; +} + +/* + * Hard coded magic. + */ +static int calc_max_buckets(void) +{ + unsigned long mem; + + mem = num_physpages << PAGE_SHIFT; + mem /= 50; + mem /= sizeof(struct list_head); + + return mem; +} + +/* + * Rounds a number down to a power of 2. + */ +static inline uint32_t round_down(uint32_t n) +{ + while (n & (n - 1)) + n &= (n - 1); + return n; +} + +/* + * Allocate room for a suitable hash table. + */ +static int init_hash_tables(struct dm_snapshot *s) +{ + offset_t hash_size, cow_dev_size, origin_dev_size, max_buckets; + + /* + * Calculate based on the size of the original volume or + * the COW volume... + */ + cow_dev_size = get_dev_size(s->cow->dev); + origin_dev_size = get_dev_size(s->origin->dev); + max_buckets = calc_max_buckets(); + + hash_size = min(origin_dev_size, cow_dev_size) / s->chunk_size; + hash_size = min(hash_size, max_buckets); + + /* Round it down to a power of 2 */ + hash_size = round_down(hash_size); + if (init_exception_table(&s->complete, hash_size)) + return -ENOMEM; + + /* + * Allocate hash table for in-flight exceptions + * Make this smaller than the real hash table + */ + hash_size >>= 3; + if (!hash_size) + hash_size = 64; + + if (init_exception_table(&s->pending, hash_size)) { + exit_exception_table(&s->complete, exception_cache); + return -ENOMEM; + } + + return 0; +} + +/* + * Round a number up to the nearest 'size' boundary. size must + * be a power of 2. + */ +static inline ulong round_up(ulong n, ulong size) +{ + size--; + return (n + size) & ~size; +} + +/* + * Construct a snapshot mapping:

+ */ +static int snapshot_ctr(struct dm_table *t, offset_t b, offset_t l, + int argc, char **argv, void **context) +{ + struct dm_snapshot *s; + unsigned long chunk_size; + int r = -EINVAL; + char *persistent; + char *origin_path; + char *cow_path; + char *value; + int blocksize; + + if (argc < 4) { + *context = "dm-snapshot: requires exactly 4 arguments"; + r = -EINVAL; + goto bad; + } + + origin_path = argv[0]; + cow_path = argv[1]; + persistent = argv[2]; + + if ((*persistent & 0x5f) != 'P' && (*persistent & 0x5f) != 'N') { + *context = "Persistent flag is not P or N"; + r = -EINVAL; + goto bad; + } + + chunk_size = simple_strtoul(argv[3], &value, 10); + if (chunk_size == 0 || value == NULL) { + *context = "Invalid chunk size"; + r = -EINVAL; + goto bad; + } + + s = kmalloc(sizeof(*s), GFP_KERNEL); + if (s == NULL) { + *context = "Cannot allocate snapshot context private structure"; + r = -ENOMEM; + goto bad; + } + + r = dm_table_get_device(t, origin_path, 0, 0, FMODE_READ, &s->origin); + if (r) { + *context = "Cannot get origin device"; + goto bad_free; + } + + r = dm_table_get_device(t, cow_path, 0, 0, + FMODE_READ | FMODE_WRITE, &s->cow); + if (r) { + dm_table_put_device(t, s->origin); + *context = "Cannot get COW device"; + goto bad_free; + } + + /* + * Chunk size must be multiple of page size. Silently + * round up if it's not. + */ + chunk_size = round_up(chunk_size, PAGE_SIZE / SECTOR_SIZE); + + /* Validate the chunk size against the device block size */ + blocksize = get_hardsect_size(s->cow->dev); + if (chunk_size % (blocksize / SECTOR_SIZE)) { + *context = "Chunk size is not a multiple of device blocksize"; + r = -EINVAL; + goto bad_putdev; + } + + /* Check the sizes are small enough to fit in one kiovec */ + if (chunk_size > KIO_MAX_SECTORS) { + *context = "Chunk size is too big"; + r = -EINVAL; + goto bad_putdev; + } + + /* Check chunk_size is a power of 2 */ + if (chunk_size & (chunk_size - 1)) { + *context = "Chunk size is not a power of 2"; + r = -EINVAL; + goto bad_putdev; + } + + s->chunk_size = chunk_size; + s->chunk_mask = chunk_size - 1; + s->type = *persistent; + for (s->chunk_shift = 0; chunk_size; + s->chunk_shift++, chunk_size >>= 1) + ; + s->chunk_shift--; + + s->valid = 1; + s->last_percent = 0; + s->table = t; + init_rwsem(&s->lock); + + /* Allocate hash table for COW data */ + if (init_hash_tables(s)) { + *context = "Unable to allocate hash table space"; + r = -ENOMEM; + goto bad_putdev; + } + + /* + * Check the persistent flag - done here because we need the iobuf + * to check the LV header + */ + s->store.snap = s; + + if ((*persistent & 0x5f) == 'P') + r = dm_create_persistent(&s->store, s->chunk_size); + else + r = dm_create_transient(&s->store, s, blocksize, context); + + if (r) { + *context = "Couldn't create exception store"; + r = -EINVAL; + goto bad_free1; + } + + /* Flush IO to the origin device */ +#if LVM_VFS_ENHANCEMENT + fsync_dev_lockfs(s->origin->dev); +#else + fsync_dev(s->origin->dev); +#endif + + /* Add snapshot to the list of snapshots for this origin */ + if (register_snapshot(s)) { + r = -EINVAL; + *context = "Cannot register snapshot origin"; + goto bad_free2; + } +#if LVM_VFS_ENHANCEMENT + unlockfs(s->origin->dev); +#endif + kcopyd_inc_client_count(); + + *context = s; + return 0; + + bad_free2: + s->store.destroy(&s->store); + + bad_free1: + exit_exception_table(&s->pending, pending_cache); + exit_exception_table(&s->complete, exception_cache); + + bad_putdev: + dm_table_put_device(t, s->cow); + dm_table_put_device(t, s->origin); + + bad_free: + kfree(s); + + bad: + return r; +} + +static void snapshot_dtr(struct dm_table *t, void *context) +{ + struct dm_snapshot *s = (struct dm_snapshot *) context; + + dm_table_event(s->table); + + unregister_snapshot(s); + + exit_exception_table(&s->pending, pending_cache); + exit_exception_table(&s->complete, exception_cache); + + /* Deallocate memory used */ + s->store.destroy(&s->store); + + dm_table_put_device(t, s->origin); + dm_table_put_device(t, s->cow); + kfree(s); + + kcopyd_dec_client_count(); +} + +/* + * We hold lists of buffer_heads, using the b_reqnext field. + */ +static void queue_buffer(struct buffer_head **queue, struct buffer_head *bh) +{ + bh->b_reqnext = *queue; + *queue = bh; +} + +/* + * Flush a list of buffers. + */ +static void flush_buffers(struct buffer_head *bh) +{ + struct buffer_head *n; + + DMDEBUG("begin flush"); + while (bh) { + n = bh->b_reqnext; + bh->b_reqnext = NULL; + DMDEBUG("flushing %p", bh); + generic_make_request(WRITE, bh); + bh = n; + } + + run_task_queue(&tq_disk); +} + +/* + * Error a list of buffers. + */ +static void error_buffers(struct buffer_head *bh) +{ + struct buffer_head *n; + + while (bh) { + n = bh->b_reqnext; + bh->b_reqnext = NULL; + buffer_IO_error(bh); + bh = n; + } +} + +static void pending_complete(struct pending_exception *pe, int success) +{ + struct exception *e; + struct dm_snapshot *s = pe->snap; + + if (success) { + e = alloc_exception(); + if (!e) { + printk("Unable to allocate exception."); + down_write(&s->lock); + s->store.drop_snapshot(&s->store); + s->valid = 0; + up_write(&s->lock); + return; + } + + /* + * Add a proper exception, and remove the + * inflight exception from the list. + */ + down_write(&s->lock); + + memcpy(e, &pe->e, sizeof(*e)); + insert_exception(&s->complete, e); + remove_exception(&pe->e); + + /* Submit any pending write BHs */ + up_write(&s->lock); + + flush_buffers(pe->snapshot_bhs); + DMDEBUG("Exception completed successfully."); + + /* Notify any interested parties */ + if (s->store.percent_full) { + int pc = s->store.percent_full(&s->store); + + if (pc >= s->last_percent + WAKE_UP_PERCENT) { + dm_table_event(s->table); + s->last_percent = pc - pc % WAKE_UP_PERCENT; + } + } + + } else { + /* Read/write error - snapshot is unusable */ + DMERR("Error reading/writing snapshot"); + + down_write(&s->lock); + s->store.drop_snapshot(&s->store); + s->valid = 0; + remove_exception(&pe->e); + up_write(&s->lock); + + error_buffers(pe->snapshot_bhs); + + dm_table_event(s->table); + DMDEBUG("Exception failed."); + } + + if (list_empty(&pe->siblings)) + flush_buffers(pe->origin_bhs); + else + list_del(&pe->siblings); + + free_pending_exception(pe); +} + +static void commit_callback(void *context, int success) +{ + struct pending_exception *pe = (struct pending_exception *) context; + pending_complete(pe, success); +} + +/* + * Called when the copy I/O has finished. kcopyd actually runs + * this code so don't block. + */ +static void copy_callback(int err, void *context) +{ + struct pending_exception *pe = (struct pending_exception *) context; + struct dm_snapshot *s = pe->snap; + + if (err) + pending_complete(pe, 0); + + else + /* Update the metadata if we are persistent */ + s->store.commit_exception(&s->store, &pe->e, commit_callback, + pe); +} + +/* + * Dispatches the copy operation to kcopyd. + */ +static inline void start_copy(struct pending_exception *pe) +{ + struct dm_snapshot *s = pe->snap; + struct kcopyd_region src, dest; + + src.dev = s->origin->dev; + src.sector = chunk_to_sector(s, pe->e.old_chunk); + src.count = s->chunk_size; + + dest.dev = s->cow->dev; + dest.sector = chunk_to_sector(s, pe->e.new_chunk); + dest.count = s->chunk_size; + + if (!pe->started) { + /* Hand over to kcopyd */ + kcopyd_copy(&src, &dest, copy_callback, pe); + pe->started = 1; + } +} + +/* + * Looks to see if this snapshot already has a pending exception + * for this chunk, otherwise it allocates a new one and inserts + * it into the pending table. + */ +static struct pending_exception *find_pending_exception(struct dm_snapshot *s, + struct buffer_head *bh) +{ + struct exception *e; + struct pending_exception *pe; + chunk_t chunk = sector_to_chunk(s, bh->b_rsector); + + /* + * Is there a pending exception for this already ? + */ + e = lookup_exception(&s->pending, chunk); + if (e) { + /* cast the exception to a pending exception */ + pe = list_entry(e, struct pending_exception, e); + + } else { + /* Create a new pending exception */ + pe = alloc_pending_exception(); + if (!pe) { + DMWARN("Couldn't allocate pending exception."); + return NULL; + } + + pe->e.old_chunk = chunk; + pe->origin_bhs = pe->snapshot_bhs = NULL; + INIT_LIST_HEAD(&pe->siblings); + pe->snap = s; + pe->started = 0; + + if (s->store.prepare_exception(&s->store, &pe->e)) { + free_pending_exception(pe); + s->valid = 0; + return NULL; + } + + insert_exception(&s->pending, &pe->e); + } + + return pe; +} + +static inline void remap_exception(struct dm_snapshot *s, struct exception *e, + struct buffer_head *bh) +{ + bh->b_rdev = s->cow->dev; + bh->b_rsector = chunk_to_sector(s, e->new_chunk) + + (bh->b_rsector & s->chunk_mask); +} + +static int snapshot_map(struct buffer_head *bh, int rw, void *context) +{ + struct exception *e; + struct dm_snapshot *s = (struct dm_snapshot *) context; + int r = 1; + chunk_t chunk; + struct pending_exception *pe; + + chunk = sector_to_chunk(s, bh->b_rsector); + + /* Full snapshots are not usable */ + if (!s->valid) + return -1; + + /* + * Write to snapshot - higher level takes care of RW/RO + * flags so we should only get this if we are + * writeable. + */ + if (rw == WRITE) { + + down_write(&s->lock); + + /* If the block is already remapped - use that, else remap it */ + e = lookup_exception(&s->complete, chunk); + if (e) + remap_exception(s, e, bh); + + else { + pe = find_pending_exception(s, bh); + + if (!pe) { + s->store.drop_snapshot(&s->store); + s->valid = 0; + } + + queue_buffer(&pe->snapshot_bhs, bh); + start_copy(pe); + r = 0; + } + + up_write(&s->lock); + + } else { + /* + * FIXME: this read path scares me because we + * always use the origin when we have a pending + * exception. However I can't think of a + * situation where this is wrong - ejt. + */ + + /* Do reads */ + down_read(&s->lock); + + /* See if it it has been remapped */ + e = lookup_exception(&s->complete, chunk); + if (e) + remap_exception(s, e, bh); + else + bh->b_rdev = s->origin->dev; + + up_read(&s->lock); + } + + return r; +} + +static void list_merge(struct list_head *l1, struct list_head *l2) +{ + struct list_head *l1_n, *l2_p; + + l1_n = l1->next; + l2_p = l2->prev; + + l1->next = l2; + l2->prev = l1; + + l2_p->next = l1_n; + l1_n->prev = l2_p; +} + +static int __origin_write(struct list_head *snapshots, struct buffer_head *bh) +{ + int r = 1; + struct list_head *sl; + struct dm_snapshot *snap; + struct exception *e; + struct pending_exception *pe, *last = NULL; + chunk_t chunk; + + /* Do all the snapshots on this origin */ + list_for_each(sl, snapshots) { + snap = list_entry(sl, struct dm_snapshot, list); + + /* Only deal with valid snapshots */ + if (!snap->valid) + continue; + + down_write(&snap->lock); + + /* + * Remember, different snapshots can have + * different chunk sizes. + */ + chunk = sector_to_chunk(snap, bh->b_rsector); + + /* + * Check exception table to see if block + * is already remapped in this snapshot + * and trigger an exception if not. + */ + e = lookup_exception(&snap->complete, chunk); + if (!e) { + pe = find_pending_exception(snap, bh); + if (!pe) { + snap->store.drop_snapshot(&snap->store); + snap->valid = 0; + + } else { + if (last) + list_merge(&pe->siblings, + &last->siblings); + + last = pe; + r = 0; + } + } + + up_write(&snap->lock); + } + + /* + * Now that we have a complete pe list we can start the copying. + */ + if (last) { + pe = last; + do { + down_write(&pe->snap->lock); + queue_buffer(&pe->origin_bhs, bh); + start_copy(pe); + up_write(&pe->snap->lock); + pe = list_entry(pe->siblings.next, + struct pending_exception, siblings); + + } while (pe != last); + } + + return r; +} + +static int snapshot_status(status_type_t type, char *result, + int maxlen, void *context) +{ + struct dm_snapshot *snap = (struct dm_snapshot *) context; + char cow[16]; + char org[16]; + + switch (type) { + case STATUSTYPE_INFO: + if (!snap->valid) + snprintf(result, maxlen, "Invalid"); + else { + if (snap->store.percent_full) + snprintf(result, maxlen, "%d%%", + snap->store.percent_full(&snap-> + store)); + else + snprintf(result, maxlen, "Unknown"); + } + break; + + case STATUSTYPE_TABLE: + /* + * kdevname returns a static pointer so we need + * to make private copies if the output is to + * make sense. + */ + strncpy(cow, kdevname(snap->cow->dev), sizeof(cow)); + strncpy(org, kdevname(snap->origin->dev), sizeof(org)); + snprintf(result, maxlen, "%s %s %c %ld", org, cow, + snap->type, snap->chunk_size); + break; + } + + return 0; +} + +/* + * Called on a write from the origin driver. + */ +int do_origin(struct dm_dev *origin, struct buffer_head *bh) +{ + struct origin *o; + int r; + + down_read(&_origins_lock); + o = __lookup_origin(origin->dev); + if (!o) + BUG(); + + r = __origin_write(&o->snapshots, bh); + up_read(&_origins_lock); + + return r; +} + +/* + * Origin: maps a linear range of a device, with hooks for snapshotting. + */ + +/* + * Construct an origin mapping: + * The context for an origin is merely a 'struct dm_dev *' + * pointing to the real device. + */ +static int origin_ctr(struct dm_table *t, offset_t b, offset_t l, + int argc, char **argv, void **context) +{ + int r; + struct dm_dev *dev; + + if (argc != 1) { + *context = "dm-origin: incorrect number of arguments"; + return -EINVAL; + } + + r = dm_table_get_device(t, argv[0], 0, l, t->mode, &dev); + if (r) { + *context = "Cannot get target device"; + return r; + } + + *context = dev; + + return 0; +} + +static void origin_dtr(struct dm_table *t, void *c) +{ + struct dm_dev *dev = (struct dm_dev *) c; + dm_table_put_device(t, dev); +} + +static int origin_map(struct buffer_head *bh, int rw, void *context) +{ + struct dm_dev *dev = (struct dm_dev *) context; + bh->b_rdev = dev->dev; + + /* Only tell snapshots if this is a write */ + return (rw == WRITE) ? do_origin(dev, bh) : 1; +} + +static int origin_status(status_type_t type, char *result, + int maxlen, void *context) +{ + struct dm_dev *dev = (struct dm_dev *) context; + + switch (type) { + case STATUSTYPE_INFO: + result[0] = '\0'; + break; + + case STATUSTYPE_TABLE: + snprintf(result, maxlen, "%s", kdevname(dev->dev)); + break; + } + + return 0; +} + +static struct target_type origin_target = { + name: "snapshot-origin", + module: THIS_MODULE, + ctr: origin_ctr, + dtr: origin_dtr, + map: origin_map, + status: origin_status, + err: NULL +}; + +static struct target_type snapshot_target = { + name: "snapshot", + module: THIS_MODULE, + ctr: snapshot_ctr, + dtr: snapshot_dtr, + map: snapshot_map, + status: snapshot_status, + err: NULL +}; + +int __init dm_snapshot_init(void) +{ + int r; + + r = dm_register_target(&snapshot_target); + if (r) { + DMERR("snapshot target register failed %d", r); + return r; + } + + r = dm_register_target(&origin_target); + if (r < 0) { + DMERR("Device mapper: Origin: register failed %d\n", r); + goto bad1; + } + + r = init_origin_hash(); + if (r) { + DMERR("init_origin_hash failed."); + goto bad2; + } + + exception_cache = kmem_cache_create("dm-snapshot-ex", + sizeof(struct exception), + __alignof__(struct exception), + 0, NULL, NULL); + if (!exception_cache) { + DMERR("Couldn't create exception cache."); + r = -ENOMEM; + goto bad3; + } + + pending_cache = + kmem_cache_create("dm-snapshot-in", + sizeof(struct pending_exception), + __alignof__(struct pending_exception), + 0, NULL, NULL); + if (!pending_cache) { + DMERR("Couldn't create pending cache."); + r = -ENOMEM; + goto bad4; + } + + pending_pool = mempool_create(128, mempool_alloc_slab, + mempool_free_slab, pending_cache); + if (!pending_pool) { + DMERR("Couldn't create pending pool."); + r = -ENOMEM; + goto bad5; + } + + return 0; + + bad5: + kmem_cache_destroy(pending_cache); + bad4: + kmem_cache_destroy(exception_cache); + bad3: + exit_origin_hash(); + bad2: + dm_unregister_target(&origin_target); + bad1: + dm_unregister_target(&snapshot_target); + return r; +} + +void dm_snapshot_exit(void) +{ + int r; + + r = dm_unregister_target(&snapshot_target); + if (r) + DMERR("snapshot unregister failed %d", r); + + r = dm_unregister_target(&origin_target); + if (r) + DMERR("origin unregister failed %d", r); + + exit_origin_hash(); + mempool_destroy(pending_pool); + kmem_cache_destroy(pending_cache); + kmem_cache_destroy(exception_cache); +} + +/* + * Overrides for Emacs so that we follow Linus's tabbing style. + * Emacs will notice this stuff at the end of the file and automatically + * adjust the settings for this buffer only. This must remain at the end + * of the file. + * --------------------------------------------------------------------------- + * Local variables: + * c-file-style: "linux" + * End: + */ diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/md/dm-snapshot.h linux.21rc1-ac1/drivers/md/dm-snapshot.h --- linux.21rc1/drivers/md/dm-snapshot.h 1970-01-01 01:00:00.000000000 +0100 +++ linux.21rc1-ac1/drivers/md/dm-snapshot.h 2003-04-22 19:20:12.000000000 +0100 @@ -0,0 +1,147 @@ +/* + * dm-snapshot.c + * + * Copyright (C) 2001-2002 Sistina Software (UK) Limited. + * + * This file is released under the GPL. + */ + +#ifndef DM_SNAPSHOT_H +#define DM_SNAPSHOT_H + +#include "dm.h" +#include + +struct exception_table { + uint32_t hash_mask; + struct list_head *table; +}; + +/* + * The snapshot code deals with largish chunks of the disk at a + * time. Typically 64k - 256k. + */ +/* FIXME: can we get away with limiting these to a uint32_t ? */ +typedef offset_t chunk_t; + +/* + * An exception is used where an old chunk of data has been + * replaced by a new one. + */ +struct exception { + struct list_head hash_list; + + chunk_t old_chunk; + chunk_t new_chunk; +}; + +/* + * Abstraction to handle the meta/layout of exception stores (the + * COW device). + */ +struct exception_store { + + /* + * Destroys this object when you've finished with it. + */ + void (*destroy) (struct exception_store *store); + + /* + * Find somewhere to store the next exception. + */ + int (*prepare_exception) (struct exception_store *store, + struct exception *e); + + /* + * Update the metadata with this exception. + */ + void (*commit_exception) (struct exception_store *store, + struct exception *e, + void (*callback) (void *, int success), + void *callback_context); + + /* + * The snapshot is invalid, note this in the metadata. + */ + void (*drop_snapshot) (struct exception_store *store); + + /* + * Return the %age full of the snapshot + */ + int (*percent_full) (struct exception_store *store); + + struct dm_snapshot *snap; + void *context; +}; + +struct dm_snapshot { + struct rw_semaphore lock; + struct dm_table *table; + + struct dm_dev *origin; + struct dm_dev *cow; + + /* List of snapshots per Origin */ + struct list_head list; + + /* Size of data blocks saved - must be a power of 2 */ + chunk_t chunk_size; + chunk_t chunk_mask; + chunk_t chunk_shift; + + /* You can't use a snapshot if this is 0 (e.g. if full) */ + int valid; + + /* Used for display of table */ + char type; + + /* The last percentage we notified */ + int last_percent; + + struct exception_table pending; + struct exception_table complete; + + /* The on disk metadata handler */ + struct exception_store store; +}; + +/* + * Used by the exception stores to load exceptions hen + * initialising. + */ +int dm_add_exception(struct dm_snapshot *s, chunk_t old, chunk_t new); + +/* + * Constructor and destructor for the default persistent + * store. + */ +int dm_create_persistent(struct exception_store *store, uint32_t chunk_size); + +int dm_create_transient(struct exception_store *store, + struct dm_snapshot *s, int blocksize, void **error); + +/* + * Return the number of sectors in the device. + */ +static inline offset_t get_dev_size(kdev_t dev) +{ + int *sizes; + + sizes = blk_size[MAJOR(dev)]; + if (sizes) + return sizes[MINOR(dev)] << 1; + + return 0; +} + +static inline chunk_t sector_to_chunk(struct dm_snapshot *s, offset_t sector) +{ + return (sector & ~s->chunk_mask) >> s->chunk_shift; +} + +static inline offset_t chunk_to_sector(struct dm_snapshot *s, chunk_t chunk) +{ + return chunk << s->chunk_shift; +} + +#endif diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/md/dm-stripe.c linux.21rc1-ac1/drivers/md/dm-stripe.c --- linux.21rc1/drivers/md/dm-stripe.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.21rc1-ac1/drivers/md/dm-stripe.c 2003-04-22 16:44:37.000000000 +0100 @@ -0,0 +1,234 @@ +/* + * Copyright (C) 2001 Sistina Software (UK) Limited. + * + * This file is released under the GPL. + */ + +#include "dm.h" + +#include +#include +#include + +struct stripe { + struct dm_dev *dev; + offset_t physical_start; +}; + +struct stripe_c { + offset_t logical_start; + uint32_t stripes; + + /* The size of this target / num. stripes */ + uint32_t stripe_width; + + /* stripe chunk size */ + uint32_t chunk_shift; + offset_t chunk_mask; + + struct stripe stripe[0]; +}; + +static inline struct stripe_c *alloc_context(int stripes) +{ + size_t len; + + if (array_too_big(sizeof(struct stripe_c), sizeof(struct stripe), + stripes)) + return NULL; + + len = sizeof(struct stripe_c) + (sizeof(struct stripe) * stripes); + + return kmalloc(len, GFP_KERNEL); +} + +/* + * Parse a single pair + */ +static int get_stripe(struct dm_table *t, struct stripe_c *sc, + int stripe, char **argv) +{ + char *end; + unsigned long start; + + start = simple_strtoul(argv[1], &end, 10); + if (*end) + return -EINVAL; + + if (dm_table_get_device(t, argv[0], start, sc->stripe_width, + t->mode, &sc->stripe[stripe].dev)) + return -ENXIO; + + sc->stripe[stripe].physical_start = start; + return 0; +} + +/* + * Construct a striped mapping. + * [ ]+ + */ +static int stripe_ctr(struct dm_table *t, offset_t b, offset_t l, + int argc, char **argv, void **context) +{ + struct stripe_c *sc; + uint32_t stripes; + uint32_t chunk_size; + char *end; + int r, i; + + if (argc < 2) { + *context = "dm-stripe: Not enough arguments"; + return -EINVAL; + } + + stripes = simple_strtoul(argv[0], &end, 10); + if (*end) { + *context = "dm-stripe: Invalid stripe count"; + return -EINVAL; + } + + chunk_size = simple_strtoul(argv[1], &end, 10); + if (*end) { + *context = "dm-stripe: Invalid chunk_size"; + return -EINVAL; + } + + if (l % stripes) { + *context = "dm-stripe: Target length not divisable by " + "number of stripes"; + return -EINVAL; + } + + sc = alloc_context(stripes); + if (!sc) { + *context = "dm-stripe: Memory allocation for striped context " + "failed"; + return -ENOMEM; + } + + sc->logical_start = b; + sc->stripes = stripes; + sc->stripe_width = l / stripes; + + /* + * chunk_size is a power of two + */ + if (!chunk_size || (chunk_size & (chunk_size - 1))) { + *context = "dm-stripe: Invalid chunk size"; + kfree(sc); + return -EINVAL; + } + + sc->chunk_mask = chunk_size - 1; + for (sc->chunk_shift = 0; chunk_size; sc->chunk_shift++) + chunk_size >>= 1; + sc->chunk_shift--; + + /* + * Get the stripe destinations. + */ + for (i = 0; i < stripes; i++) { + if (argc < 2) { + *context = "dm-stripe: Not enough destinations " + "specified"; + kfree(sc); + return -EINVAL; + } + + argv += 2; + + r = get_stripe(t, sc, i, argv); + if (r < 0) { + *context = "dm-stripe: Couldn't parse stripe " + "destination"; + while (i--) + dm_table_put_device(t, sc->stripe[i].dev); + kfree(sc); + return r; + } + } + + *context = sc; + return 0; +} + +static void stripe_dtr(struct dm_table *t, void *c) +{ + unsigned int i; + struct stripe_c *sc = (struct stripe_c *) c; + + for (i = 0; i < sc->stripes; i++) + dm_table_put_device(t, sc->stripe[i].dev); + + kfree(sc); +} + +static int stripe_map(struct buffer_head *bh, int rw, void *context) +{ + struct stripe_c *sc = (struct stripe_c *) context; + + offset_t offset = bh->b_rsector - sc->logical_start; + uint32_t chunk = (uint32_t) (offset >> sc->chunk_shift); + uint32_t stripe = chunk % sc->stripes; /* 32bit modulus */ + chunk = chunk / sc->stripes; + + bh->b_rdev = sc->stripe[stripe].dev->dev; + bh->b_rsector = sc->stripe[stripe].physical_start + + (chunk << sc->chunk_shift) + (offset & sc->chunk_mask); + return 1; +} + +static int stripe_status(status_type_t type, char *result, int maxlen, + void *context) +{ + struct stripe_c *sc = (struct stripe_c *) context; + int offset; + int i; + + switch (type) { + case STATUSTYPE_INFO: + result[0] = '\0'; + break; + + case STATUSTYPE_TABLE: + offset = snprintf(result, maxlen, "%d %ld", + sc->stripes, sc->chunk_mask + 1); + for (i = 0; i < sc->stripes; i++) { + offset += + snprintf(result + offset, maxlen - offset, + " %s %ld", + kdevname(sc->stripe[i].dev->dev), + sc->stripe[i].physical_start); + } + break; + } + return 0; +} + +static struct target_type stripe_target = { + name: "striped", + module: THIS_MODULE, + ctr: stripe_ctr, + dtr: stripe_dtr, + map: stripe_map, + status: stripe_status, +}; + +int __init dm_stripe_init(void) +{ + int r; + + r = dm_register_target(&stripe_target); + if (r < 0) + DMWARN("striped target registration failed"); + + return r; +} + +void dm_stripe_exit(void) +{ + if (dm_unregister_target(&stripe_target)) + DMWARN("striped target unregistration failed"); + + return; +} diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/md/dm-table.c linux.21rc1-ac1/drivers/md/dm-table.c --- linux.21rc1/drivers/md/dm-table.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.21rc1-ac1/drivers/md/dm-table.c 2003-04-22 16:44:37.000000000 +0100 @@ -0,0 +1,452 @@ +/* + * Copyright (C) 2001 Sistina Software (UK) Limited. + * + * This file is released under the GPL. + */ + +#include "dm.h" + +#include + +/* ceiling(n / size) * size */ +static inline unsigned long round_up(unsigned long n, unsigned long size) +{ + unsigned long r = n % size; + return n + (r ? (size - r) : 0); +} + +/* ceiling(n / size) */ +static inline unsigned long div_up(unsigned long n, unsigned long size) +{ + return round_up(n, size) / size; +} + +/* similar to ceiling(log_size(n)) */ +static uint int_log(unsigned long n, unsigned long base) +{ + int result = 0; + + while (n > 1) { + n = div_up(n, base); + result++; + } + + return result; +} + +/* + * return the highest key that you could lookup + * from the n'th node on level l of the btree. + */ +static offset_t high(struct dm_table *t, int l, int n) +{ + for (; l < t->depth - 1; l++) + n = get_child(n, CHILDREN_PER_NODE - 1); + + if (n >= t->counts[l]) + return (offset_t) - 1; + + return get_node(t, l, n)[KEYS_PER_NODE - 1]; +} + +/* + * fills in a level of the btree based on the + * highs of the level below it. + */ +static int setup_btree_index(int l, struct dm_table *t) +{ + int n, k; + offset_t *node; + + for (n = 0; n < t->counts[l]; n++) { + node = get_node(t, l, n); + + for (k = 0; k < KEYS_PER_NODE; k++) + node[k] = high(t, l + 1, get_child(n, k)); + } + + return 0; +} + +/* + * highs, and targets are managed as dynamic + * arrays during a table load. + */ +static int alloc_targets(struct dm_table *t, int num) +{ + offset_t *n_highs; + struct target *n_targets; + int n = t->num_targets; + + /* + * Allocate both the target array and offset array at once. + */ + n_highs = (offset_t *) vcalloc(sizeof(struct target) + sizeof(offset_t), + num); + if (!n_highs) + return -ENOMEM; + + n_targets = (struct target *) (n_highs + num); + + if (n) { + memcpy(n_highs, t->highs, sizeof(*n_highs) * n); + memcpy(n_targets, t->targets, sizeof(*n_targets) * n); + } + + memset(n_highs + n, -1, sizeof(*n_highs) * (num - n)); + if (t->highs) + vfree(t->highs); + + t->num_allocated = num; + t->highs = n_highs; + t->targets = n_targets; + + return 0; +} + +int dm_table_create(struct dm_table **result, int mode) +{ + struct dm_table *t = kmalloc(sizeof(*t), GFP_NOIO); + + if (!t) + return -ENOMEM; + + memset(t, 0, sizeof(*t)); + INIT_LIST_HEAD(&t->devices); + + /* allocate a single node's worth of targets to begin with */ + if (alloc_targets(t, KEYS_PER_NODE)) { + kfree(t); + t = NULL; + return -ENOMEM; + } + + init_waitqueue_head(&t->eventq); + t->mode = mode; + *result = t; + return 0; +} + +static void free_devices(struct list_head *devices) +{ + struct list_head *tmp, *next; + + for (tmp = devices->next; tmp != devices; tmp = next) { + struct dm_dev *dd = list_entry(tmp, struct dm_dev, list); + next = tmp->next; + kfree(dd); + } +} + +void dm_table_destroy(struct dm_table *t) +{ + int i; + + /* destroying the table counts as an event */ + dm_table_event(t); + + /* free the indexes (see dm_table_complete) */ + if (t->depth >= 2) + vfree(t->index[t->depth - 2]); + + /* free the targets */ + for (i = 0; i < t->num_targets; i++) { + struct target *tgt = &t->targets[i]; + + dm_put_target_type(t->targets[i].type); + + if (tgt->type->dtr) + tgt->type->dtr(t, tgt->private); + } + + vfree(t->highs); + + /* free the device list */ + if (t->devices.next != &t->devices) { + DMWARN("devices still present during destroy: " + "dm_table_remove_device calls missing"); + + free_devices(&t->devices); + } + + kfree(t); +} + +/* + * Checks to see if we need to extend highs or targets. + */ +static inline int check_space(struct dm_table *t) +{ + if (t->num_targets >= t->num_allocated) + return alloc_targets(t, t->num_allocated * 2); + + return 0; +} + +/* + * Convert a device path to a kdev_t. + */ +int lookup_device(const char *path, kdev_t *dev) +{ + int r; + struct nameidata nd; + struct inode *inode; + + if (!path_init(path, LOOKUP_FOLLOW, &nd)) + return 0; + + if ((r = path_walk(path, &nd))) + goto bad; + + inode = nd.dentry->d_inode; + if (!inode) { + r = -ENOENT; + goto bad; + } + + if (!S_ISBLK(inode->i_mode)) { + r = -EINVAL; + goto bad; + } + + *dev = inode->i_rdev; + + bad: + path_release(&nd); + return r; +} + +/* + * See if we've already got a device in the list. + */ +static struct dm_dev *find_device(struct list_head *l, kdev_t dev) +{ + struct list_head *tmp; + + list_for_each(tmp, l) { + struct dm_dev *dd = list_entry(tmp, struct dm_dev, list); + if (dd->dev == dev) + return dd; + } + + return NULL; +} + +/* + * Open a device so we can use it as a map destination. + */ +static int open_dev(struct dm_dev *d) +{ + int err; + + if (d->bd) + BUG(); + + if (!(d->bd = bdget(kdev_t_to_nr(d->dev)))) + return -ENOMEM; + + if ((err = blkdev_get(d->bd, d->mode, 0, BDEV_FILE))) + return err; + + return 0; +} + +/* + * Close a device that we've been using. + */ +static void close_dev(struct dm_dev *d) +{ + if (!d->bd) + return; + + blkdev_put(d->bd, BDEV_FILE); + d->bd = NULL; +} + +/* + * If possible (ie. blk_size[major] is set), this + * checks an area of a destination device is + * valid. + */ +static int check_device_area(kdev_t dev, offset_t start, offset_t len) +{ + int *sizes; + offset_t dev_size; + + if (!(sizes = blk_size[MAJOR(dev)]) || !(dev_size = sizes[MINOR(dev)])) + /* we don't know the device details, + * so give the benefit of the doubt */ + return 1; + + /* convert to 512-byte sectors */ + dev_size <<= 1; + + return ((start < dev_size) && (len <= (dev_size - start))); +} + +/* + * This upgrades the mode on an already open dm_dev. Being + * careful to leave things as they were if we fail to reopen the + * device. + */ +static int upgrade_mode(struct dm_dev *dd, int new_mode) +{ + int r; + struct dm_dev dd_copy; + + memcpy(&dd_copy, dd, sizeof(dd_copy)); + + dd->mode |= new_mode; + dd->bd = NULL; + r = open_dev(dd); + if (!r) + close_dev(&dd_copy); + else + memcpy(dd, &dd_copy, sizeof(dd_copy)); + + return r; +} + +/* + * Add a device to the list, or just increment the usage count + * if it's already present. + */ +int dm_table_get_device(struct dm_table *t, const char *path, + offset_t start, offset_t len, int mode, + struct dm_dev **result) +{ + int r; + kdev_t dev; + struct dm_dev *dd; + int major, minor; + + if (sscanf(path, "%x:%x", &major, &minor) == 2) { + /* Extract the major/minor numbers */ + dev = MKDEV(major, minor); + } else { + /* convert the path to a device */ + if ((r = lookup_device(path, &dev))) + return r; + } + + dd = find_device(&t->devices, dev); + if (!dd) { + dd = kmalloc(sizeof(*dd), GFP_KERNEL); + if (!dd) + return -ENOMEM; + + dd->mode = mode; + dd->dev = dev; + dd->bd = NULL; + + if ((r = open_dev(dd))) { + kfree(dd); + return r; + } + + atomic_set(&dd->count, 0); + list_add(&dd->list, &t->devices); + + } else if (dd->mode != (mode | dd->mode)) { + r = upgrade_mode(dd, mode); + if (r) + return r; + } + atomic_inc(&dd->count); + + if (!check_device_area(dd->dev, start, len)) { + DMWARN("device %s too small for target", path); + dm_table_put_device(t, dd); + return -EINVAL; + } + + *result = dd; + + return 0; +} + +/* + * Decrement a devices use count and remove it if neccessary. + */ +void dm_table_put_device(struct dm_table *t, struct dm_dev *dd) +{ + if (atomic_dec_and_test(&dd->count)) { + close_dev(dd); + list_del(&dd->list); + kfree(dd); + } +} + +/* + * Adds a target to the map + */ +int dm_table_add_target(struct dm_table *t, offset_t highs, + struct target_type *type, void *private) +{ + int r, n; + + if ((r = check_space(t))) + return r; + + n = t->num_targets++; + t->highs[n] = highs; + t->targets[n].type = type; + t->targets[n].private = private; + + return 0; +} + +static int setup_indexes(struct dm_table *t) +{ + int i, total = 0; + offset_t *indexes; + + /* allocate the space for *all* the indexes */ + for (i = t->depth - 2; i >= 0; i--) { + t->counts[i] = div_up(t->counts[i + 1], CHILDREN_PER_NODE); + total += t->counts[i]; + } + + indexes = (offset_t *) vcalloc(total, (unsigned long) NODE_SIZE); + if (!indexes) + return -ENOMEM; + + /* set up internal nodes, bottom-up */ + for (i = t->depth - 2, total = 0; i >= 0; i--) { + t->index[i] = indexes; + indexes += (KEYS_PER_NODE * t->counts[i]); + setup_btree_index(i, t); + } + + return 0; +} + +/* + * Builds the btree to index the map + */ +int dm_table_complete(struct dm_table *t) +{ + int leaf_nodes, r = 0; + + /* how many indexes will the btree have ? */ + leaf_nodes = div_up(t->num_targets, KEYS_PER_NODE); + t->depth = 1 + int_log(leaf_nodes, CHILDREN_PER_NODE); + + /* leaf layer has already been set up */ + t->counts[t->depth - 1] = leaf_nodes; + t->index[t->depth - 1] = t->highs; + + if (t->depth >= 2) + r = setup_indexes(t); + + return r; +} + +void dm_table_event(struct dm_table *t) +{ + wake_up_interruptible(&t->eventq); +} + +EXPORT_SYMBOL(dm_table_get_device); +EXPORT_SYMBOL(dm_table_put_device); +EXPORT_SYMBOL(dm_table_event); diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/md/dm-target.c linux.21rc1-ac1/drivers/md/dm-target.c --- linux.21rc1/drivers/md/dm-target.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.21rc1-ac1/drivers/md/dm-target.c 2003-04-22 16:44:37.000000000 +0100 @@ -0,0 +1,242 @@ +/* + * Copyright (C) 2001 Sistina Software (UK) Limited + * + * This file is released under the GPL. + */ + +#include "dm.h" + +#include + +struct tt_internal { + struct target_type tt; + + struct list_head list; + long use; +}; + +static LIST_HEAD(_targets); +static rwlock_t _lock = RW_LOCK_UNLOCKED; + +#define DM_MOD_NAME_SIZE 32 + +/* + * Destructively splits up the argument list to pass to ctr. + */ +int split_args(int max, int *argc, char **argv, char *input) +{ + char *start, *end = input, *out; + *argc = 0; + + while (1) { + start = end; + + /* Skip whitespace */ + while (*start && isspace(*start)) + start++; + + if (!*start) + break; /* success, we hit the end */ + + /* 'out' is used to remove any back-quotes */ + end = out = start; + while (*end) { + /* Everything apart from '\0' can be quoted */ + if (*end == '\\' && *(end + 1)) { + *out++ = *(end + 1); + end += 2; + continue; + } + + if (isspace(*end)) + break; /* end of token */ + + *out++ = *end++; + } + + /* have we already filled the array ? */ + if ((*argc + 1) > max) + return -EINVAL; + + /* we know this is whitespace */ + if (*end) + end++; + + /* terminate the string and put it in the array */ + *out = '\0'; + argv[*argc] = start; + (*argc)++; + } + + return 0; +} + +static inline struct tt_internal *__find_target_type(const char *name) +{ + struct list_head *tih; + struct tt_internal *ti; + + list_for_each(tih, &_targets) { + ti = list_entry(tih, struct tt_internal, list); + + if (!strcmp(name, ti->tt.name)) + return ti; + } + + return NULL; +} + +static struct tt_internal *get_target_type(const char *name) +{ + struct tt_internal *ti; + + read_lock(&_lock); + ti = __find_target_type(name); + + if (ti) { + if (ti->use == 0 && ti->tt.module) + __MOD_INC_USE_COUNT(ti->tt.module); + ti->use++; + } + read_unlock(&_lock); + + return ti; +} + +static void load_module(const char *name) +{ + char module_name[DM_MOD_NAME_SIZE] = "dm-"; + + /* Length check for strcat() below */ + if (strlen(name) > (DM_MOD_NAME_SIZE - 4)) + return; + + strcat(module_name, name); + request_module(module_name); + + return; +} + +struct target_type *dm_get_target_type(const char *name) +{ + struct tt_internal *ti = get_target_type(name); + + if (!ti) { + load_module(name); + ti = get_target_type(name); + } + + return ti ? &ti->tt : NULL; +} + +void dm_put_target_type(struct target_type *t) +{ + struct tt_internal *ti = (struct tt_internal *) t; + + read_lock(&_lock); + if (--ti->use == 0 && ti->tt.module) + __MOD_DEC_USE_COUNT(ti->tt.module); + + if (ti->use < 0) + BUG(); + read_unlock(&_lock); + + return; +} + +static struct tt_internal *alloc_target(struct target_type *t) +{ + struct tt_internal *ti = kmalloc(sizeof(*ti), GFP_KERNEL); + + if (ti) { + memset(ti, 0, sizeof(*ti)); + ti->tt = *t; + } + + return ti; +} + +int dm_register_target(struct target_type *t) +{ + int rv = 0; + struct tt_internal *ti = alloc_target(t); + + if (!ti) + return -ENOMEM; + + write_lock(&_lock); + if (__find_target_type(t->name)) + rv = -EEXIST; + else + list_add(&ti->list, &_targets); + + write_unlock(&_lock); + return rv; +} + +int dm_unregister_target(struct target_type *t) +{ + struct tt_internal *ti; + + write_lock(&_lock); + if (!(ti = __find_target_type(t->name))) { + write_unlock(&_lock); + return -EINVAL; + } + + if (ti->use) { + write_unlock(&_lock); + return -ETXTBSY; + } + + list_del(&ti->list); + kfree(ti); + + write_unlock(&_lock); + return 0; +} + +/* + * io-err: always fails an io, useful for bringing + * up LV's that have holes in them. + */ +static int io_err_ctr(struct dm_table *t, offset_t b, offset_t l, + int argc, char **args, void **context) +{ + *context = NULL; + return 0; +} + +static void io_err_dtr(struct dm_table *t, void *c) +{ + /* empty */ + return; +} + +static int io_err_map(struct buffer_head *bh, int rw, void *context) +{ + buffer_IO_error(bh); + return 0; +} + +static struct target_type error_target = { + name: "error", + ctr: io_err_ctr, + dtr: io_err_dtr, + map: io_err_map, + status: NULL, +}; + +int dm_target_init(void) +{ + return dm_register_target(&error_target); +} + +void dm_target_exit(void) +{ + if (dm_unregister_target(&error_target)) + DMWARN("error target unregistration failed"); +} + +EXPORT_SYMBOL(dm_register_target); +EXPORT_SYMBOL(dm_unregister_target); diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/md/kcopyd.c linux.21rc1-ac1/drivers/md/kcopyd.c --- linux.21rc1/drivers/md/kcopyd.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.21rc1-ac1/drivers/md/kcopyd.c 2003-04-22 16:44:37.000000000 +0100 @@ -0,0 +1,841 @@ +/* + * Copyright (C) 2002 Sistina Software (UK) Limited. + * + * This file is released under the GPL. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "kcopyd.h" + +/* FIXME: this is only needed for the DMERR macros */ +#include "dm.h" + +/* + * Hard sector size used all over the kernel. + */ +#define SECTOR_SIZE 512 +#define SECTOR_SHIFT 9 + +static void wake_kcopyd(void); + +/*----------------------------------------------------------------- + * We reserve our own pool of preallocated pages that are + * only used for kcopyd io. + *---------------------------------------------------------------*/ + +/* + * FIXME: This should be configurable. + */ +#define NUM_PAGES 512 + +static DECLARE_MUTEX(_pages_lock); +static int _num_free_pages; +static struct page *_pages_array[NUM_PAGES]; +static DECLARE_MUTEX(start_lock); + +static int init_pages(void) +{ + int i; + struct page *p; + + for (i = 0; i < NUM_PAGES; i++) { + p = alloc_page(GFP_KERNEL); + if (!p) + goto bad; + + LockPage(p); + _pages_array[i] = p; + } + + _num_free_pages = NUM_PAGES; + return 0; + + bad: + while (i--) + __free_page(_pages_array[i]); + return -ENOMEM; +} + +static void exit_pages(void) +{ + int i; + struct page *p; + + for (i = 0; i < NUM_PAGES; i++) { + p = _pages_array[i]; + UnlockPage(p); + __free_page(p); + } + + _num_free_pages = 0; +} + +static int kcopyd_get_pages(int num, struct page **result) +{ + int i; + + down(&_pages_lock); + if (_num_free_pages < num) { + up(&_pages_lock); + return -ENOMEM; + } + + for (i = 0; i < num; i++) { + _num_free_pages--; + result[i] = _pages_array[_num_free_pages]; + } + up(&_pages_lock); + + return 0; +} + +static void kcopyd_free_pages(int num, struct page **result) +{ + int i; + + down(&_pages_lock); + for (i = 0; i < num; i++) + _pages_array[_num_free_pages++] = result[i]; + up(&_pages_lock); +} + +/*----------------------------------------------------------------- + * We keep our own private pool of buffer_heads. These are just + * held in a list on the b_reqnext field. + *---------------------------------------------------------------*/ + +/* + * Make sure we have enough buffers to always keep the pages + * occupied. So we assume the worst case scenario where blocks + * are the size of a single sector. + */ +#define NUM_BUFFERS NUM_PAGES * (PAGE_SIZE / SECTOR_SIZE) + +static spinlock_t _buffer_lock = SPIN_LOCK_UNLOCKED; +static struct buffer_head *_all_buffers; +static struct buffer_head *_free_buffers; + +static int init_buffers(void) +{ + int i; + struct buffer_head *buffers; + + buffers = vcalloc(NUM_BUFFERS, sizeof(struct buffer_head)); + if (!buffers) { + DMWARN("Couldn't allocate buffer heads."); + return -ENOMEM; + } + + for (i = 0; i < NUM_BUFFERS; i++) { + if (i < NUM_BUFFERS - 1) + buffers[i].b_reqnext = &buffers[i + 1]; + init_waitqueue_head(&buffers[i].b_wait); + INIT_LIST_HEAD(&buffers[i].b_inode_buffers); + } + + _all_buffers = _free_buffers = buffers; + return 0; +} + +static void exit_buffers(void) +{ + vfree(_all_buffers); +} + +static struct buffer_head *alloc_buffer(void) +{ + struct buffer_head *r; + int flags; + + spin_lock_irqsave(&_buffer_lock, flags); + + if (!_free_buffers) + r = NULL; + else { + r = _free_buffers; + _free_buffers = _free_buffers->b_reqnext; + r->b_reqnext = NULL; + } + + spin_unlock_irqrestore(&_buffer_lock, flags); + + return r; +} + +/* + * Only called from interrupt context. + */ +static void free_buffer(struct buffer_head *bh) +{ + int flags, was_empty; + + spin_lock_irqsave(&_buffer_lock, flags); + was_empty = (_free_buffers == NULL) ? 1 : 0; + bh->b_reqnext = _free_buffers; + _free_buffers = bh; + spin_unlock_irqrestore(&_buffer_lock, flags); + + /* + * If the buffer list was empty then kcopyd probably went + * to sleep because it ran out of buffer heads, so let's + * wake it up. + */ + if (was_empty) + wake_kcopyd(); +} + +/*----------------------------------------------------------------- + * kcopyd_jobs need to be allocated by the *clients* of kcopyd, + * for this reason we use a mempool to prevent the client from + * ever having to do io (which could cause a + * deadlock). + *---------------------------------------------------------------*/ +#define MIN_JOBS NUM_PAGES + +static kmem_cache_t *_job_cache = NULL; +static mempool_t *_job_pool = NULL; + +/* + * We maintain three lists of jobs: + * + * i) jobs waiting for pages + * ii) jobs that have pages, and are waiting for the io to be issued. + * iii) jobs that have completed. + * + * All three of these are protected by job_lock. + */ + +static spinlock_t _job_lock = SPIN_LOCK_UNLOCKED; + +static LIST_HEAD(_complete_jobs); +static LIST_HEAD(_io_jobs); +static LIST_HEAD(_pages_jobs); + +static int init_jobs(void) +{ + INIT_LIST_HEAD(&_complete_jobs); + INIT_LIST_HEAD(&_io_jobs); + INIT_LIST_HEAD(&_pages_jobs); + + _job_cache = kmem_cache_create("kcopyd-jobs", sizeof(struct kcopyd_job), + __alignof__(struct kcopyd_job), + 0, NULL, NULL); + if (!_job_cache) + return -ENOMEM; + + _job_pool = mempool_create(MIN_JOBS, mempool_alloc_slab, + mempool_free_slab, _job_cache); + if (!_job_pool) { + kmem_cache_destroy(_job_cache); + return -ENOMEM; + } + + return 0; +} + +static void exit_jobs(void) +{ + mempool_destroy(_job_pool); + kmem_cache_destroy(_job_cache); +} + +struct kcopyd_job *kcopyd_alloc_job(void) +{ + struct kcopyd_job *job; + + job = mempool_alloc(_job_pool, GFP_KERNEL); + if (!job) + return NULL; + + memset(job, 0, sizeof(*job)); + return job; +} + +void kcopyd_free_job(struct kcopyd_job *job) +{ + mempool_free(job, _job_pool); +} + +/* + * Functions to push and pop a job onto the head of a given job + * list. + */ +static inline struct kcopyd_job *pop(struct list_head *jobs) +{ + struct kcopyd_job *job = NULL; + int flags; + + spin_lock_irqsave(&_job_lock, flags); + + if (!list_empty(jobs)) { + job = list_entry(jobs->next, struct kcopyd_job, list); + list_del(&job->list); + } + spin_unlock_irqrestore(&_job_lock, flags); + + return job; +} + +static inline void push(struct list_head *jobs, struct kcopyd_job *job) +{ + int flags; + + spin_lock_irqsave(&_job_lock, flags); + list_add(&job->list, jobs); + spin_unlock_irqrestore(&_job_lock, flags); +} + +/* + * Completion function for one of our buffers. + */ +static void end_bh(struct buffer_head *bh, int uptodate) +{ + struct kcopyd_job *job = bh->b_private; + + mark_buffer_uptodate(bh, uptodate); + unlock_buffer(bh); + + if (!uptodate) + job->err = -EIO; + + /* are we the last ? */ + if (atomic_dec_and_test(&job->nr_incomplete)) { + push(&_complete_jobs, job); + wake_kcopyd(); + } + + free_buffer(bh); +} + +static void dispatch_bh(struct kcopyd_job *job, + struct buffer_head *bh, int block) +{ + int p; + + /* + * Add in the job offset + */ + bh->b_blocknr = (job->disk.sector >> job->block_shift) + block; + + p = block >> job->bpp_shift; + block &= job->bpp_mask; + + bh->b_dev = B_FREE; + bh->b_size = job->block_size; + set_bh_page(bh, job->pages[p], ((block << job->block_shift) + + job->offset) << SECTOR_SHIFT); + bh->b_this_page = bh; + + init_buffer(bh, end_bh, job); + + bh->b_dev = job->disk.dev; + bh->b_state = ((1 << BH_Mapped) | (1 << BH_Lock) | (1 << BH_Req)); + + set_bit(BH_Uptodate, &bh->b_state); + if (job->rw == WRITE) + clear_bit(BH_Dirty, &bh->b_state); + + submit_bh(job->rw, bh); +} + +/* + * These three functions process 1 item from the corresponding + * job list. + * + * They return: + * < 0: error + * 0: success + * > 0: can't process yet. + */ +static int run_complete_job(struct kcopyd_job *job) +{ + job->callback(job); + return 0; +} + +/* + * Request io on as many buffer heads as we can currently get for + * a particular job. + */ +static int run_io_job(struct kcopyd_job *job) +{ + unsigned int block; + struct buffer_head *bh; + + for (block = atomic_read(&job->nr_requested); + block < job->nr_blocks; block++) { + bh = alloc_buffer(); + if (!bh) + break; + + atomic_inc(&job->nr_requested); + dispatch_bh(job, bh, block); + } + + return (block == job->nr_blocks) ? 0 : 1; +} + +static int run_pages_job(struct kcopyd_job *job) +{ + int r; + + job->nr_pages = (job->disk.count + job->offset) / + (PAGE_SIZE / SECTOR_SIZE); + r = kcopyd_get_pages(job->nr_pages, job->pages); + + if (!r) { + /* this job is ready for io */ + push(&_io_jobs, job); + return 0; + } + + if (r == -ENOMEM) + /* can complete now */ + return 1; + + return r; +} + +/* + * Run through a list for as long as possible. Returns the count + * of successful jobs. + */ +static int process_jobs(struct list_head *jobs, int (*fn) (struct kcopyd_job *)) +{ + struct kcopyd_job *job; + int r, count = 0; + + while ((job = pop(jobs))) { + + r = fn(job); + + if (r < 0) { + /* error this rogue job */ + job->err = r; + push(&_complete_jobs, job); + break; + } + + if (r > 0) { + /* + * We couldn't service this job ATM, so + * push this job back onto the list. + */ + push(jobs, job); + break; + } + + count++; + } + + return count; +} + +/* + * kcopyd does this every time it's woken up. + */ +static void do_work(void) +{ + int count; + + /* + * We loop round until there is no more work to do. + */ + do { + count = process_jobs(&_complete_jobs, run_complete_job); + count += process_jobs(&_io_jobs, run_io_job); + count += process_jobs(&_pages_jobs, run_pages_job); + + } while (count); + + run_task_queue(&tq_disk); +} + +/*----------------------------------------------------------------- + * The daemon + *---------------------------------------------------------------*/ +static atomic_t _kcopyd_must_die; +static DECLARE_MUTEX(_run_lock); +static DECLARE_WAIT_QUEUE_HEAD(_job_queue); + +static int kcopyd(void *arg) +{ + DECLARE_WAITQUEUE(wq, current); + + daemonize(); + strcpy(current->comm, "kcopyd"); + atomic_set(&_kcopyd_must_die, 0); + + add_wait_queue(&_job_queue, &wq); + + down(&_run_lock); + up(&start_lock); + + while (1) { + set_current_state(TASK_INTERRUPTIBLE); + + if (atomic_read(&_kcopyd_must_die)) + break; + + do_work(); + schedule(); + } + + set_current_state(TASK_RUNNING); + remove_wait_queue(&_job_queue, &wq); + + up(&_run_lock); + + return 0; +} + +static int start_daemon(void) +{ + static pid_t pid = 0; + + down(&start_lock); + + pid = kernel_thread(kcopyd, NULL, 0); + if (pid <= 0) { + DMERR("Failed to start kcopyd thread"); + return -EAGAIN; + } + + /* + * wait for the daemon to up this mutex. + */ + down(&start_lock); + up(&start_lock); + + return 0; +} + +static int stop_daemon(void) +{ + atomic_set(&_kcopyd_must_die, 1); + wake_kcopyd(); + down(&_run_lock); + up(&_run_lock); + + return 0; +} + +static void wake_kcopyd(void) +{ + wake_up_interruptible(&_job_queue); +} + +static int calc_shift(unsigned int n) +{ + int s; + + for (s = 0; n; s++, n >>= 1) + ; + + return --s; +} + +static void calc_block_sizes(struct kcopyd_job *job) +{ + job->block_size = get_hardsect_size(job->disk.dev); + job->block_shift = calc_shift(job->block_size / SECTOR_SIZE); + job->bpp_shift = PAGE_SHIFT - job->block_shift - SECTOR_SHIFT; + job->bpp_mask = (1 << job->bpp_shift) - 1; + job->nr_blocks = job->disk.count >> job->block_shift; + atomic_set(&job->nr_requested, 0); + atomic_set(&job->nr_incomplete, job->nr_blocks); +} + +int kcopyd_io(struct kcopyd_job *job) +{ + calc_block_sizes(job); + push(job->pages[0] ? &_io_jobs : &_pages_jobs, job); + wake_kcopyd(); + return 0; +} + +/*----------------------------------------------------------------- + * The copier is implemented on top of the simpler async io + * daemon above. + *---------------------------------------------------------------*/ +struct copy_info { + kcopyd_notify_fn notify; + void *notify_context; + + struct kcopyd_region to; +}; + +#define MIN_INFOS 128 +static kmem_cache_t *_copy_cache = NULL; +static mempool_t *_copy_pool = NULL; + +static int init_copier(void) +{ + _copy_cache = kmem_cache_create("kcopyd-info", + sizeof(struct copy_info), + __alignof__(struct copy_info), + 0, NULL, NULL); + if (!_copy_cache) + return -ENOMEM; + + _copy_pool = mempool_create(MIN_INFOS, mempool_alloc_slab, + mempool_free_slab, _copy_cache); + if (!_copy_pool) { + kmem_cache_destroy(_copy_cache); + return -ENOMEM; + } + + return 0; +} + +static void exit_copier(void) +{ + if (_copy_pool) + mempool_destroy(_copy_pool); + + if (_copy_cache) + kmem_cache_destroy(_copy_cache); +} + +static inline struct copy_info *alloc_copy_info(void) +{ + return mempool_alloc(_copy_pool, GFP_KERNEL); +} + +static inline void free_copy_info(struct copy_info *info) +{ + mempool_free(info, _copy_pool); +} + +void copy_complete(struct kcopyd_job *job) +{ + struct copy_info *info = (struct copy_info *) job->context; + + if (info->notify) + info->notify(job->err, info->notify_context); + + free_copy_info(info); + + kcopyd_free_pages(job->nr_pages, job->pages); + + kcopyd_free_job(job); +} + +static void page_write_complete(struct kcopyd_job *job) +{ + struct copy_info *info = (struct copy_info *) job->context; + int i; + + if (info->notify) + info->notify(job->err, info->notify_context); + + free_copy_info(info); + for (i = 0; i < job->nr_pages; i++) + put_page(job->pages[i]); + + kcopyd_free_job(job); +} + +/* + * These callback functions implement the state machine that copies regions. + */ +void copy_write(struct kcopyd_job *job) +{ + struct copy_info *info = (struct copy_info *) job->context; + + if (job->err && info->notify) { + info->notify(job->err, job->context); + kcopyd_free_job(job); + free_copy_info(info); + return; + } + + job->rw = WRITE; + memcpy(&job->disk, &info->to, sizeof(job->disk)); + job->callback = copy_complete; + job->context = info; + + /* + * Queue the write. + */ + kcopyd_io(job); +} + +int kcopyd_write_pages(struct kcopyd_region *to, int nr_pages, + struct page **pages, int offset, kcopyd_notify_fn fn, + void *context) +{ + struct copy_info *info; + struct kcopyd_job *job; + int i; + + /* + * Allocate a new copy_info. + */ + info = alloc_copy_info(); + if (!info) + return -ENOMEM; + + job = kcopyd_alloc_job(); + if (!job) { + free_copy_info(info); + return -ENOMEM; + } + + /* + * set up for the write. + */ + info->notify = fn; + info->notify_context = context; + memcpy(&info->to, to, sizeof(*to)); + + /* Get the pages */ + job->nr_pages = nr_pages; + for (i = 0; i < nr_pages; i++) { + get_page(pages[i]); + job->pages[i] = pages[i]; + } + + job->rw = WRITE; + + memcpy(&job->disk, &info->to, sizeof(job->disk)); + job->offset = offset; + calc_block_sizes(job); + job->callback = page_write_complete; + job->context = info; + + /* + * Trigger job. + */ + kcopyd_io(job); + return 0; +} + +int kcopyd_copy(struct kcopyd_region *from, struct kcopyd_region *to, + kcopyd_notify_fn fn, void *context) +{ + struct copy_info *info; + struct kcopyd_job *job; + + /* + * Allocate a new copy_info. + */ + info = alloc_copy_info(); + if (!info) + return -ENOMEM; + + job = kcopyd_alloc_job(); + if (!job) { + free_copy_info(info); + return -ENOMEM; + } + + /* + * set up for the read. + */ + info->notify = fn; + info->notify_context = context; + memcpy(&info->to, to, sizeof(*to)); + + job->rw = READ; + memcpy(&job->disk, from, sizeof(*from)); + + job->offset = 0; + calc_block_sizes(job); + job->callback = copy_write; + job->context = info; + + /* + * Trigger job. + */ + kcopyd_io(job); + return 0; +} + +/*----------------------------------------------------------------- + * Unit setup + *---------------------------------------------------------------*/ +static struct { + int (*init) (void); + void (*exit) (void); + +} _inits[] = { +#define xx(n) { init_ ## n, exit_ ## n} + xx(pages), + xx(buffers), + xx(jobs), + xx(copier) +#undef xx +}; + +static int _client_count = 0; +static DECLARE_MUTEX(_client_count_sem); + +static int kcopyd_init(void) +{ + const int count = sizeof(_inits) / sizeof(*_inits); + + int r, i; + + for (i = 0; i < count; i++) { + r = _inits[i].init(); + if (r) + goto bad; + } + + start_daemon(); + return 0; + + bad: + while (i--) + _inits[i].exit(); + + return r; +} + +static void kcopyd_exit(void) +{ + int i = sizeof(_inits) / sizeof(*_inits); + + if (stop_daemon()) + DMWARN("Couldn't stop kcopyd."); + + while (i--) + _inits[i].exit(); +} + +void kcopyd_inc_client_count(void) +{ + /* + * What I need here is an atomic_test_and_inc that returns + * the previous value of the atomic... In its absence I lock + * an int with a semaphore. :-( + */ + down(&_client_count_sem); + if (_client_count == 0) + kcopyd_init(); + _client_count++; + + up(&_client_count_sem); +} + +void kcopyd_dec_client_count(void) +{ + down(&_client_count_sem); + if (--_client_count == 0) + kcopyd_exit(); + + up(&_client_count_sem); +} diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/md/kcopyd.h linux.21rc1-ac1/drivers/md/kcopyd.h --- linux.21rc1/drivers/md/kcopyd.h 1970-01-01 01:00:00.000000000 +0100 +++ linux.21rc1-ac1/drivers/md/kcopyd.h 2003-04-22 19:20:12.000000000 +0100 @@ -0,0 +1,101 @@ +/* + * Copyright (C) 2001 Sistina Software + * + * This file is released under the GPL. + */ + +#ifndef DM_KCOPYD_H +#define DM_KCOPYD_H + +/* + * Needed for the definition of offset_t. + */ +#include +#include + +struct kcopyd_region { + kdev_t dev; + offset_t sector; + offset_t count; +}; + +#define MAX_KCOPYD_PAGES 128 + +struct kcopyd_job { + struct list_head list; + + /* + * Error state of the job. + */ + int err; + + /* + * Either READ or WRITE + */ + int rw; + + /* + * The source or destination for the transfer. + */ + struct kcopyd_region disk; + + int nr_pages; + struct page *pages[MAX_KCOPYD_PAGES]; + + /* + * Shifts and masks that will be useful when dispatching + * each buffer_head. + */ + offset_t offset; + offset_t block_size; + offset_t block_shift; + offset_t bpp_shift; /* blocks per page */ + offset_t bpp_mask; + + /* + * nr_blocks is how many buffer heads will have to be + * displatched to service this job, nr_requested is how + * many have been dispatched and nr_complete is how many + * have come back. + */ + unsigned int nr_blocks; + atomic_t nr_requested; + atomic_t nr_incomplete; + + /* + * Set this to ensure you are notified when the job has + * completed. 'context' is for callback to use. + */ + void (*callback)(struct kcopyd_job *job); + void *context; +}; + +/* + * Low level async io routines. + */ +struct kcopyd_job *kcopyd_alloc_job(void); +void kcopyd_free_job(struct kcopyd_job *job); + +int kcopyd_queue_job(struct kcopyd_job *job); + +/* + * Submit a copy job to kcopyd. This is built on top of the + * previous three fns. + */ +typedef void (*kcopyd_notify_fn)(int err, void *context); + +int kcopyd_copy(struct kcopyd_region *from, struct kcopyd_region *to, + kcopyd_notify_fn fn, void *context); + +int kcopyd_write_pages(struct kcopyd_region *to, int nr_pages, + struct page **pages, int offset, kcopyd_notify_fn fn, + void *context); + +/* + * We only want kcopyd to reserve resources if someone is + * actually using it. + */ +void kcopyd_inc_client_count(void); +void kcopyd_dec_client_count(void); + +#endif diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/md/Makefile linux.21rc1-ac1/drivers/md/Makefile --- linux.21rc1/drivers/md/Makefile 2003-04-22 16:38:54.000000000 +0100 +++ linux.21rc1-ac1/drivers/md/Makefile 2003-04-22 16:44:37.000000000 +0100 @@ -4,9 +4,11 @@ O_TARGET := mddev.o -export-objs := md.o xor.o +export-objs := md.o xor.o dm-table.o dm-target.o kcopyd.o list-multi := lvm-mod.o lvm-mod-objs := lvm.o lvm-snap.o lvm-fs.o +dm-mod-objs := dm.o dm-table.o dm-target.o dm-linear.o dm-stripe.o \ + dm-ioctl.o dm-snapshot.o dm-exception-store.o kcopyd.o # Note: link order is important. All raid personalities # and xor.o must come before md.o, as they each initialise @@ -20,8 +22,12 @@ obj-$(CONFIG_MD_MULTIPATH) += multipath.o obj-$(CONFIG_BLK_DEV_MD) += md.o obj-$(CONFIG_BLK_DEV_LVM) += lvm-mod.o +obj-$(CONFIG_BLK_DEV_DM) += dm-mod.o include $(TOPDIR)/Rules.make lvm-mod.o: $(lvm-mod-objs) $(LD) -r -o $@ $(lvm-mod-objs) + +dm-mod.o: $(dm-mod-objs) + $(LD) -r -o $@ $(dm-mod-objs) diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/md/md.c linux.21rc1-ac1/drivers/md/md.c --- linux.21rc1/drivers/md/md.c 2003-04-22 16:39:35.000000000 +0100 +++ linux.21rc1-ac1/drivers/md/md.c 2003-04-22 16:44:37.000000000 +0100 @@ -77,7 +77,7 @@ */ static int sysctl_speed_limit_min = 100; -static int sysctl_speed_limit_max = 100000; +static int sysctl_speed_limit_max = 10000; static struct ctl_table_header *raid_table_header; @@ -2931,8 +2931,6 @@ * bdflush, otherwise bdflush will deadlock if there are too * many dirty RAID5 blocks. */ - current->policy = SCHED_OTHER; - current->nice = -20; md_unlock_kernel(); complete(thread->event); @@ -3454,11 +3452,6 @@ "(but not more than %d KB/sec) for reconstruction.\n", sysctl_speed_limit_max); - /* - * Resync has low priority. - */ - current->nice = 19; - is_mddev_idle(mddev); /* this also initializes IO event counters */ for (m = 0; m < SYNC_MARKS; m++) { mark[m] = jiffies; @@ -3536,16 +3529,13 @@ currspeed = (j-mddev->resync_mark_cnt)/2/((jiffies-mddev->resync_mark)/HZ +1) +1; if (currspeed > sysctl_speed_limit_min) { - current->nice = 19; - if ((currspeed > sysctl_speed_limit_max) || !is_mddev_idle(mddev)) { current->state = TASK_INTERRUPTIBLE; md_schedule_timeout(HZ/4); goto repeat; } - } else - current->nice = -20; + } } printk(KERN_INFO "md: md%d: sync done.\n",mdidx(mddev)); err = 0; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/media/video/bttv-driver.c linux.21rc1-ac1/drivers/media/video/bttv-driver.c --- linux.21rc1/drivers/media/video/bttv-driver.c 2003-04-22 16:39:35.000000000 +0100 +++ linux.21rc1-ac1/drivers/media/video/bttv-driver.c 2003-04-22 16:44:37.000000000 +0100 @@ -1649,28 +1649,23 @@ case VIDIOCGCHAN: { struct video_channel v; - unsigned int channel; - if(copy_from_user(&v, arg,sizeof(v))) return -EFAULT; - channel = v.channel; - if (channel>=bttv_tvcards[btv->type].video_inputs) - return -EINVAL; v.flags=VIDEO_VC_AUDIO; v.tuners=0; v.type=VIDEO_TYPE_CAMERA; v.norm = btv->win.norm; - if(channel==bttv_tvcards[btv->type].tuner) + if (v.channel < 0 || v.channel >= bttv_tvcards[btv->type].video_inputs) + return -EINVAL; + if(v.channel==bttv_tvcards[btv->type].tuner) { strcpy(v.name,"Television"); v.flags|=VIDEO_VC_TUNER; v.type=VIDEO_TYPE_TV; v.tuners=1; } - else if (channel==bttv_tvcards[btv->type].svhs) + else if(v.channel==bttv_tvcards[btv->type].svhs) strcpy(v.name,"S-Video"); - else if (bttv_tvcards[btv->type].muxsel[v.channel] < 0) - strcpy(v.name,"Digital Video"); else sprintf(v.name,"Composite%d",v.channel); @@ -1684,20 +1679,17 @@ case VIDIOCSCHAN: { struct video_channel v; - unsigned int channel; - if(copy_from_user(&v, arg,sizeof(v))) return -EFAULT; - channel = v.channel; - if (channel>bttv_tvcards[btv->type].video_inputs) + if (v.channel < 0 || v.channel >= bttv_tvcards[btv->type].video_inputs) return -EINVAL; if (v.norm > TVNORMS) return -EOPNOTSUPP; bttv_call_i2c_clients(btv,cmd,&v); down(&btv->lock); - bt848_muxsel(btv, channel); + bt848_muxsel(btv, v.channel); bttv_set_norm(btv, v.norm); up(&btv->lock); return 0; @@ -1726,13 +1718,10 @@ case VIDIOCSTUNER: { struct video_tuner v; - unsigned int tuner; - if(copy_from_user(&v, arg, sizeof(v))) return -EFAULT; - tuner = v.tuner; /* Only one channel has a tuner */ - if(tuner!=bttv_tvcards[btv->type].tuner) + if(v.tuner!=bttv_tvcards[btv->type].tuner) return -EINVAL; if(v.mode!=VIDEO_MODE_PAL&&v.mode!=VIDEO_MODE_NTSC @@ -1990,13 +1979,9 @@ case VIDIOCSAUDIO: { struct video_audio v; - unsigned int n; if(copy_from_user(&v,arg, sizeof(v))) return -EFAULT; - n = v.audio; - if(n >= bttv_tvcards[btv->type].audio_inputs) - return -EINVAL; down(&btv->lock); if(v.flags&VIDEO_AUDIO_MUTE) audio(btv, AUDIO_MUTE); @@ -2017,12 +2002,12 @@ case VIDIOCSYNC: { + int i; DECLARE_WAITQUEUE(wait, current); - unsigned int i; if(copy_from_user((void *)&i,arg,sizeof(int))) return -EFAULT; - if (i >= gbuffers) + if (i < 0 || i >= gbuffers) return -EINVAL; switch (btv->gbuf[i].stat) { case GBUFFER_UNUSED: @@ -2094,8 +2079,7 @@ case VIDIOCGMBUF: { struct video_mbuf vm; - unsigned int i; - + int i; memset(&vm, 0 , sizeof(vm)); vm.size=gbufsize*gbuffers; vm.frames=gbuffers; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/media/video/zoran_procfs.c linux.21rc1-ac1/drivers/media/video/zoran_procfs.c --- linux.21rc1/drivers/media/video/zoran_procfs.c 2003-04-22 16:38:53.000000000 +0100 +++ linux.21rc1-ac1/drivers/media/video/zoran_procfs.c 2003-04-22 16:44:37.000000000 +0100 @@ -119,7 +119,11 @@ printk(KERN_ERR "%s: write_proc: can not allocate memory\n", zr->name); return -ENOMEM; } - memcpy(string, buffer, count); + if(copy_from_user(string, buffer, count)) + { + vfree(string); + return -EFAULT; + } string[count] = 0; DEBUG2(printk(KERN_INFO "%s: write_proc: name=%s count=%lu data=%x\n", zr->name, file->f_dentry->d_name.name, count, (int) data)); ldelim = " \t\n"; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/media/video/zr36120.c linux.21rc1-ac1/drivers/media/video/zr36120.c --- linux.21rc1/drivers/media/video/zr36120.c 2003-04-22 16:38:53.000000000 +0100 +++ linux.21rc1-ac1/drivers/media/video/zr36120.c 2003-04-22 16:44:37.000000000 +0100 @@ -1700,12 +1700,12 @@ for (x=0; optr+1w; x++) { unsigned char a = iptr[x*2]; - *optr++ = a; - *optr++ = a; + __put_user(a, optr++); + __put_user(a, optr++); } /* and clear the rest of the line */ for (x*=2; optrbpl; x++) - *optr++ = 0; + __put_user(0, optr++); /* next line */ iptr += done->bpl; } @@ -1722,10 +1722,10 @@ { /* copy to doubled data to userland */ for (x=0; optrw; x++) - *optr++ = iptr[x*2]; + __put_user(iptr[x*2], optr++); /* and clear the rest of the line */ for (;optrbpl; x++) - *optr++ = 0; + __put_user(0, optr++); /* next line */ iptr += done->bpl; } @@ -1734,7 +1734,7 @@ /* API compliance: * place the framenumber (half fieldnr) in the last long */ - ((ulong*)eptr)[-1] = done->fieldnr/2; + __put_user(done->fieldnr/2, ((ulong*)eptr)-1); } /* keep the engine running */ diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/message/fusion/isense.c linux.21rc1-ac1/drivers/message/fusion/isense.c --- linux.21rc1/drivers/message/fusion/isense.c 2003-04-22 16:38:54.000000000 +0100 +++ linux.21rc1-ac1/drivers/message/fusion/isense.c 2003-04-22 16:44:37.000000000 +0100 @@ -92,6 +92,7 @@ EXPORT_NO_SYMBOLS; MODULE_AUTHOR(MODULEAUTHOR); MODULE_DESCRIPTION(my_NAME); +MODULE_LICENSE("GPL"); /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ int __init isense_init(void) diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/message/fusion/linux_compat.h linux.21rc1-ac1/drivers/message/fusion/linux_compat.h --- linux.21rc1/drivers/message/fusion/linux_compat.h 2003-04-22 16:39:35.000000000 +0100 +++ linux.21rc1-ac1/drivers/message/fusion/linux_compat.h 2003-04-22 19:20:12.000000000 +0100 @@ -246,35 +246,17 @@ #endif /* - * We use our new error handling code if the kernel version is 2.5.1 or newer. + * We use our new error handling code if the kernel version is 2.4.18 or newer. */ -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,1) +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,18) #define MPT_SCSI_USE_NEW_EH #endif -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,28) -#define mptscsih_lock(iocp, flags) \ - spin_lock_irqsave(&iocp->FreeQlock, flags) -#else -#define mptscsih_lock(iocp, flags) \ -({ save_flags(flags); \ - cli(); \ -}) -#endif - -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,28) -#define mptscsih_unlock(iocp, flags) \ - spin_unlock_irqrestore(&iocp->FreeQlock, flags) -#else -#define mptscsih_unlock(iocp, flags) restore_flags(flags); -#endif - - #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,41) -#define mpt_work_struct work_struct +#define mpt_work_struct work_struct #define MPT_INIT_WORK(_task, _func, _data) INIT_WORK(_task, _func, _data) #else -#define mpt_work_struct tq_struct +#define mpt_work_struct tq_struct #define MPT_INIT_WORK(_task, _func, _data) \ ({ (_task)->sync = 0; \ (_task)->routine = (_func); \ @@ -282,6 +264,13 @@ }) #endif +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,28) +#define mptscsih_sync_irq(_irq) synchronize_irq(_irq) +#else +#define mptscsih_sync_irq(_irq) synchronize_irq() +#endif + + /*}-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ #endif /* _LINUX_COMPAT_H */ diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/message/fusion/mptbase.c linux.21rc1-ac1/drivers/message/fusion/mptbase.c --- linux.21rc1/drivers/message/fusion/mptbase.c 2003-04-22 16:39:35.000000000 +0100 +++ linux.21rc1-ac1/drivers/message/fusion/mptbase.c 2003-04-22 16:44:37.000000000 +0100 @@ -49,7 +49,7 @@ * (mailto:sjralston1@netscape.net) * (mailto:Pam.Delaney@lsil.com) * - * $Id: mptbase.c,v 1.124 2002/11/01 17:58:12 pdelaney Exp $ + * $Id: mptbase.c,v 1.126 2002/12/16 15:28:45 pdelaney Exp $ */ /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ /* @@ -208,6 +208,7 @@ static int mpt_GetScsiPortSettings(MPT_ADAPTER *ioc, int portnum); static int mpt_readScsiDevicePageHeaders(MPT_ADAPTER *ioc, int portnum); static int mpt_findImVolumes(MPT_ADAPTER *ioc); +static void mpt_read_ioc_pg_1(MPT_ADAPTER *ioc); static void mpt_timer_expired(unsigned long data); static int SendEventNotification(MPT_ADAPTER *ioc, u8 EvSwitch); static int SendEventAck(MPT_ADAPTER *ioc, EventNotificationReply_t *evnp); @@ -1156,7 +1157,7 @@ dprintk((KERN_INFO MYNAM ": Checking for MPT adapters...\n")); /* - * NOTE: The 929, 929X and 1030 will appear as 2 separate PCI devices, + * NOTE: The 929, 929X, 1030 and 1035 will appear as 2 separate PCI devices, * one for each channel. */ pci_for_each_dev(pdev) { @@ -1170,18 +1171,14 @@ (pdev->device != MPI_MANUFACTPAGE_DEVICEID_FC929X) && (pdev->device != MPI_MANUFACTPAGE_DEVICEID_FC919X) && (pdev->device != MPI_MANUFACTPAGE_DEVID_53C1030) && -#if 0 - /* FIXME! C103x family */ - (pdev->device != MPI_MANUFACTPAGE_DEVID_53C1030_ZC) && - (pdev->device != MPI_MANUFACTPAGE_DEVID_53C1035) && -#endif + (pdev->device != MPI_MANUFACTPAGE_DEVID_1030_53C1035) && 1) { dprintk((KERN_INFO MYNAM ": Skipping LSI device=%04xh\n", pdev->device)); continue; } /* GRRRRR - * dual function devices (929, 929X, 1030) may be presented in Func 1,0 order, + * dual function devices (929, 929X, 1030, 1035) may be presented in Func 1,0 order, * but we'd really really rather have them in Func 0,1 order. * Do some kind of look ahead here... */ @@ -1445,15 +1442,24 @@ ioc->chip_type = C1030; ioc->prod_name = "LSI53C1030"; { + u8 revision; + /* 1030 Chip Fix. Disable Split transactions - * for PCIX. Set bits 4 - 6 to zero. + * for PCIX. Set bits 4 - 6 to zero if Rev < C0( = 8) */ - u16 pcixcmd = 0; - pci_read_config_word(pdev, 0x6a, &pcixcmd); - pcixcmd &= 0xFF8F; - pci_write_config_word(pdev, 0x6a, pcixcmd); + pci_read_config_byte(pdev, PCI_CLASS_REVISION, &revision); + if (revision < 0x08) { + u16 pcixcmd = 0; + pci_read_config_word(pdev, 0x6a, &pcixcmd); + pcixcmd &= 0xFF8F; + pci_write_config_word(pdev, 0x6a, pcixcmd); + } } } + else if (pdev->device == MPI_MANUFACTPAGE_DEVID_1030_53C1035) { + ioc->chip_type = C1035; + ioc->prod_name = "LSI53C1035"; + } sprintf(ioc->name, "ioc%d", ioc->id); @@ -1465,6 +1471,12 @@ ioc->active = 0; CHIPREG_WRITE32(&ioc->chip->IntStatus, 0); + /* tack onto tail of our MPT adapter list */ + Q_ADD_TAIL(&MptAdapters, ioc, MPT_ADAPTER); + + /* Set lookup ptr. */ + mpt_adapters[ioc->id] = ioc; + ioc->pci_irq = -1; if (pdev->irq) { r = request_irq(pdev->irq, mpt_interrupt, SA_SHIRQ, ioc->name, ioc); @@ -1477,6 +1489,8 @@ printk(MYIOC_s_ERR_FMT "Unable to allocate interrupt %s!\n", ioc->name, __irq_itoa(pdev->irq)); #endif + Q_DEL_ITEM(ioc); + mpt_adapters[ioc->id] = NULL; iounmap(mem); kfree(ioc); return -EBUSY; @@ -1493,16 +1507,11 @@ #endif } - /* tack onto tail of our MPT adapter list */ - Q_ADD_TAIL(&MptAdapters, ioc, MPT_ADAPTER); - - /* Set lookup ptr. */ - mpt_adapters[ioc->id] = ioc; - /* NEW! 20010220 -sralston - * Check for "bound ports" (929, 929X, 1030) to reduce redundant resets. + * Check for "bound ports" (929, 929X, 1030, 1035) to reduce redundant resets. */ - if ((ioc->chip_type == FC929) || (ioc->chip_type == C1030) || (ioc->chip_type == FC929X)) + if ((ioc->chip_type == FC929) || (ioc->chip_type == C1030) + || (ioc->chip_type == C1035) || (ioc->chip_type == FC929X)) mpt_detect_bound_ports(ioc, pdev); if ((r = mpt_do_ioc_recovery(ioc, MPT_HOSTEVENT_IOC_BRINGUP, CAN_SLEEP)) != 0) { @@ -1632,6 +1641,9 @@ printk(KERN_WARNING MYNAM ": firmware upload failure!\n"); /* Handle the alt IOC too */ if ((alt_ioc_ready) && (ioc->alt_ioc->upload_fw)){ + ddlprintk((MYIOC_s_INFO_FMT + "Alt-ioc firmware upload required!\n", + ioc->name)); r = mpt_do_upload(ioc->alt_ioc, sleepFlag); if (r != 0) printk(KERN_WARNING MYNAM ": firmware upload failure!\n"); @@ -1708,6 +1720,10 @@ */ if (ioc->facts.MsgVersion >= 0x0102) mpt_findImVolumes(ioc); + + /* Check, and possibly reset, the coalescing value + */ + mpt_read_ioc_pg_1(ioc); } GetIoUnitPage2(ioc); @@ -1746,7 +1762,7 @@ /* * mpt_detect_bound_ports - Search for PCI bus/dev_function * which matches PCI bus/dev_function (+/-1) for newly discovered 929, - * 929X or 1030. + * 929X, 1030 or 1035. * @ioc: Pointer to MPT adapter structure * @pdev: Pointer to (struct pci_dev) structure * @@ -1914,6 +1930,11 @@ sz_first = this->alloc_total; + if (this->alt_ioc != NULL) { + this->alt_ioc->alt_ioc = NULL; + this->alt_ioc = NULL; + } + mpt_adapter_disable(this, 1); if (this->pci_irq != -1) { @@ -2290,9 +2311,6 @@ ioc->reply_sz = ioc->req_sz; ioc->reply_depth = MIN(MPT_DEFAULT_REPLY_DEPTH, facts->ReplyQueueDepth); - /* 1030 - should we use a smaller DEFAULT_REPLY_DEPTH? - * FIX - */ dprintk((MYIOC_s_INFO_FMT "reply_sz=%3d, reply_depth=%4d\n", ioc->name, ioc->reply_sz, ioc->reply_depth)); dprintk((MYIOC_s_INFO_FMT "req_sz =%3d, req_depth =%4d\n", @@ -3252,11 +3270,7 @@ ioc->name, diag0val, diag1val)); #endif /* Write the PreventIocBoot bit */ -#if 1 if ((ioc->cached_fw) || (ioc->alt_ioc && ioc->alt_ioc->cached_fw)) { -#else - if (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT) { -#endif diag0val |= MPI_DIAG_PREVENT_IOC_BOOT; CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val); } @@ -3302,11 +3316,7 @@ /* FIXME? Examine results here? */ } -#if 1 if ((ioc->cached_fw) || (ioc->alt_ioc && ioc->alt_ioc->cached_fw)) { -#else - if (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT) { -#endif /* If the DownloadBoot operation fails, the * IOC will be left unusable. This is a fatal error * case. _diag_reset will return < 0 @@ -4462,17 +4472,13 @@ mpt_findImVolumes(MPT_ADAPTER *ioc) { IOCPage2_t *pIoc2 = NULL; - IOCPage3_t *pIoc3 = NULL; ConfigPageIoc2RaidVol_t *pIocRv = NULL; - u8 *mem; dma_addr_t ioc2_dma; - dma_addr_t ioc3_dma; CONFIGPARMS cfg; ConfigPageHeader_t header; int jj; int rc = 0; int iocpage2sz; - int iocpage3sz = 0; u8 nVols, nPhys; u8 vid, vbus, vioc; @@ -4539,44 +4545,7 @@ /* No physical disks. Done. */ } else { - /* There is at least one physical disk. - * Read and save IOC Page 3 - */ - header.PageVersion = 0; - header.PageLength = 0; - header.PageNumber = 3; - header.PageType = MPI_CONFIG_PAGETYPE_IOC; - cfg.hdr = &header; - cfg.physAddr = -1; - cfg.pageAddr = 0; - cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER; - cfg.dir = 0; - cfg.timeout = 0; - if (mpt_config(ioc, &cfg) != 0) - goto done_and_free; - - if (header.PageLength == 0) - goto done_and_free; - - /* Read Header good, alloc memory - */ - iocpage3sz = header.PageLength * 4; - pIoc3 = pci_alloc_consistent(ioc->pcidev, iocpage3sz, &ioc3_dma); - if (!pIoc3) - goto done_and_free; - - /* Read the Page and save the data - * into malloc'd memory. - */ - cfg.physAddr = ioc3_dma; - cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT; - if (mpt_config(ioc, &cfg) == 0) { - mem = kmalloc(iocpage3sz, GFP_ATOMIC); - if (mem) { - memcpy(mem, (u8 *)pIoc3, iocpage3sz); - ioc->spi_data.pIocPg3 = (IOCPage3_t *) mem; - } - } + mpt_read_ioc_pg_3(ioc); } done_and_free: @@ -4585,14 +4554,159 @@ pIoc2 = NULL; } + return rc; +} + +int +mpt_read_ioc_pg_3(MPT_ADAPTER *ioc) +{ + IOCPage3_t *pIoc3 = NULL; + u8 *mem; + CONFIGPARMS cfg; + ConfigPageHeader_t header; + dma_addr_t ioc3_dma; + int iocpage3sz = 0; + + /* Free the old page + */ + if (ioc->spi_data.pIocPg3) { + kfree(ioc->spi_data.pIocPg3); + ioc->spi_data.pIocPg3 = NULL; + } + + /* There is at least one physical disk. + * Read and save IOC Page 3 + */ + header.PageVersion = 0; + header.PageLength = 0; + header.PageNumber = 3; + header.PageType = MPI_CONFIG_PAGETYPE_IOC; + cfg.hdr = &header; + cfg.physAddr = -1; + cfg.pageAddr = 0; + cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER; + cfg.dir = 0; + cfg.timeout = 0; + if (mpt_config(ioc, &cfg) != 0) + return 0; + + if (header.PageLength == 0) + return 0; + + /* Read Header good, alloc memory + */ + iocpage3sz = header.PageLength * 4; + pIoc3 = pci_alloc_consistent(ioc->pcidev, iocpage3sz, &ioc3_dma); + if (!pIoc3) + return 0; + + /* Read the Page and save the data + * into malloc'd memory. + */ + cfg.physAddr = ioc3_dma; + cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT; + if (mpt_config(ioc, &cfg) == 0) { + mem = kmalloc(iocpage3sz, GFP_ATOMIC); + if (mem) { + memcpy(mem, (u8 *)pIoc3, iocpage3sz); + ioc->spi_data.pIocPg3 = (IOCPage3_t *) mem; + } + } + if (pIoc3) { pci_free_consistent(ioc->pcidev, iocpage3sz, pIoc3, ioc3_dma); pIoc3 = NULL; } - return rc; + return 0; } +static void +mpt_read_ioc_pg_1(MPT_ADAPTER *ioc) +{ + IOCPage1_t *pIoc1 = NULL; + CONFIGPARMS cfg; + ConfigPageHeader_t header; + dma_addr_t ioc1_dma; + int iocpage1sz = 0; + u32 tmp; + + /* Check the Coalescing Timeout in IOC Page 1 + */ + header.PageVersion = 0; + header.PageLength = 0; + header.PageNumber = 1; + header.PageType = MPI_CONFIG_PAGETYPE_IOC; + cfg.hdr = &header; + cfg.physAddr = -1; + cfg.pageAddr = 0; + cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER; + cfg.dir = 0; + cfg.timeout = 0; + if (mpt_config(ioc, &cfg) != 0) + return; + + if (header.PageLength == 0) + return; + + /* Read Header good, alloc memory + */ + iocpage1sz = header.PageLength * 4; + pIoc1 = pci_alloc_consistent(ioc->pcidev, iocpage1sz, &ioc1_dma); + if (!pIoc1) + return; + + /* Read the Page and check coalescing timeout + */ + cfg.physAddr = ioc1_dma; + cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT; + if (mpt_config(ioc, &cfg) == 0) { + + tmp = le32_to_cpu(pIoc1->Flags) & MPI_IOCPAGE1_REPLY_COALESCING; + if (tmp == MPI_IOCPAGE1_REPLY_COALESCING) { + tmp = le32_to_cpu(pIoc1->CoalescingTimeout); + + dprintk((MYIOC_s_INFO_FMT "Coalescing Enabled Timeout = %d\n", + ioc->name, tmp)); + + if (tmp > MPT_COALESCING_TIMEOUT) { + pIoc1->CoalescingTimeout = cpu_to_le32(MPT_COALESCING_TIMEOUT); + + /* Write NVRAM and current + */ + cfg.dir = 1; + cfg.action = MPI_CONFIG_ACTION_PAGE_WRITE_CURRENT; + if (mpt_config(ioc, &cfg) == 0) { + dprintk((MYIOC_s_INFO_FMT "Reset Current Coalescing Timeout to = %d\n", + ioc->name, MPT_COALESCING_TIMEOUT)); + + cfg.action = MPI_CONFIG_ACTION_PAGE_WRITE_NVRAM; + if (mpt_config(ioc, &cfg) == 0) { + dprintk((MYIOC_s_INFO_FMT "Reset NVRAM Coalescing Timeout to = %d\n", + ioc->name, MPT_COALESCING_TIMEOUT)); + } else { + dprintk((MYIOC_s_INFO_FMT "Reset NVRAM Coalescing Timeout Failed\n", + ioc->name)); + } + + } else { + dprintk((MYIOC_s_WARN_FMT "Reset of Current Coalescing Timeout Failed!\n", + ioc->name)); + } + } + + } else { + dprintk((MYIOC_s_WARN_FMT "Coalescing Disabled\n", ioc->name)); + } + } + + if (pIoc1) { + pci_free_consistent(ioc->pcidev, iocpage1sz, pIoc1, ioc1_dma); + pIoc1 = NULL; + } + + return; +} /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ /* @@ -5094,8 +5208,7 @@ */ if (isense_idx == ii) len += sprintf(buf+len, " Fusion MPT isense driver\n"); - } else - break; + } } MPT_PROC_READ_RETURN(buf,start,offset,request,eof,len); @@ -5772,6 +5885,7 @@ EXPORT_SYMBOL(mpt_stm_index); EXPORT_SYMBOL(mpt_HardResetHandler); EXPORT_SYMBOL(mpt_config); +EXPORT_SYMBOL(mpt_read_ioc_pg_3); EXPORT_SYMBOL(mpt_alloc_fw_memory); EXPORT_SYMBOL(mpt_free_fw_memory); @@ -5841,6 +5955,7 @@ fusion_exit(void) { MPT_ADAPTER *this; + struct pci_dev *pdev = NULL; dprintk((KERN_INFO MYNAM ": fusion_exit() called!\n")); @@ -5859,9 +5974,14 @@ this->active = 0; + pdev = (struct pci_dev *)this->pcidev; + mptscsih_sync_irq(pdev->irq); + /* Clear any lingering interrupt */ CHIPREG_WRITE32(&this->chip->IntStatus, 0); + CHIPREG_READ32(&this->chip->IntStatus); + Q_DEL_ITEM(this); mpt_adapter_dispose(this); } diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/message/fusion/mptbase.h linux.21rc1-ac1/drivers/message/fusion/mptbase.h --- linux.21rc1/drivers/message/fusion/mptbase.h 2003-04-22 16:39:35.000000000 +0100 +++ linux.21rc1-ac1/drivers/message/fusion/mptbase.h 2003-04-22 19:20:12.000000000 +0100 @@ -13,7 +13,7 @@ * (mailto:sjralston1@netscape.net) * (mailto:Pam.Delaney@lsil.com) * - * $Id: mptbase.h,v 1.139 2002/11/11 18:33:40 pdelaney Exp $ + * $Id: mptbase.h,v 1.144 2003/01/28 21:31:56 pdelaney Exp $ */ /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ /* @@ -80,8 +80,8 @@ #define COPYRIGHT "Copyright (c) 1999-2002 " MODULEAUTHOR #endif -#define MPT_LINUX_VERSION_COMMON "2.03.00" -#define MPT_LINUX_PACKAGE_NAME "@(#)mptlinux-2.03.00" +#define MPT_LINUX_VERSION_COMMON "2.05.00+" +#define MPT_LINUX_PACKAGE_NAME "@(#)mptlinux-2.05.00+" #define WHAT_MAGIC_STRING "@" "(" "#" ")" #define show_mptmod_ver(s,ver) \ @@ -134,8 +134,10 @@ #define CAN_SLEEP 1 #define NO_SLEEP 0 -/* - * SCSI transfer rate defines. +#define MPT_COALESCING_TIMEOUT 0x10 + +/* + * SCSI transfer rate defines. */ #define MPT_ULTRA320 0x08 #define MPT_ULTRA160 0x09 @@ -301,6 +303,7 @@ FC919 = 0x0919, FC929 = 0x0929, C1030 = 0x1030, + C1035 = 0x1035, FCUNK = 0xFBAD } CHIP_TYPE; @@ -368,6 +371,7 @@ typedef struct _VirtDevice { struct _VirtDevice *forw; struct _VirtDevice *back; + struct scsi_device *device; rwlock_t VdevLock; int ref_cnt; u8 tflags; @@ -522,7 +526,7 @@ #define MPT_SCSICFG_DV_PENDING 0x04 /* DV on this physical id pending */ #define MPT_SCSICFG_DV_NOT_DONE 0x08 /* DV has not been performed */ #define MPT_SCSICFG_BLK_NEGO 0x10 /* WriteSDP1 with WDTR and SDTR disabled */ - +#define MPT_SCSICFG_RELOAD_IOC_PG3 0x20 /* IOC Pg 3 data is obsolete */ /* Args passed to writeSDP1: */ #define MPT_SCSICFG_USE_NVRAM 0x01 /* WriteSDP1 using NVRAM */ #define MPT_SCSICFG_ALL_IDS 0x02 /* WriteSDP1 to all IDS */ @@ -915,6 +919,7 @@ unsigned long hard_resets; /* driver forced bus resets count */ unsigned long soft_resets; /* fw/external bus resets count */ unsigned long timeouts; /* cmd timeouts */ + ushort sel_timeout[MPT_MAX_FC_DEVICES]; } MPT_SCSI_HOST; /* @@ -1006,6 +1011,7 @@ extern int mpt_config(MPT_ADAPTER *ioc, CONFIGPARMS *cfg); extern void *mpt_alloc_fw_memory(MPT_ADAPTER *ioc, int size, int *frags, int *alloc_sz); extern void mpt_free_fw_memory(MPT_ADAPTER *ioc, fw_image_t **alt_img); +extern int mpt_read_ioc_pg_3(MPT_ADAPTER *ioc); /* * Public data decl's... @@ -1038,7 +1044,7 @@ #define offsetof(t, m) ((size_t) (&((t *)0)->m)) #endif -#if defined(__alpha__) || defined(__sparc_v9__) || defined(__ia64__) +#if defined(__alpha__) || defined(__sparc_v9__) || defined(__ia64__) || defined(__x86_64__) #define CAST_U32_TO_PTR(x) ((void *)(u64)x) #define CAST_PTR_TO_U32(x) ((u32)(u64)x) #else diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/message/fusion/mptctl.c linux.21rc1-ac1/drivers/message/fusion/mptctl.c --- linux.21rc1/drivers/message/fusion/mptctl.c 2003-04-22 16:39:35.000000000 +0100 +++ linux.21rc1-ac1/drivers/message/fusion/mptctl.c 2003-04-22 16:44:37.000000000 +0100 @@ -34,7 +34,7 @@ * (mailto:sjralston1@netscape.net) * (mailto:Pam.Delaney@lsil.com) * - * $Id: mptctl.c,v 1.62 2002/11/01 17:58:13 pdelaney Exp $ + * $Id: mptctl.c,v 1.63 2002/12/03 21:26:33 pdelaney Exp $ */ /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ /* @@ -139,14 +139,6 @@ static int mptctl_hp_hostinfo(unsigned long arg); static int mptctl_hp_targetinfo(unsigned long arg); -static int mptctl_compaq_ioctl(struct file *file, unsigned int cmd, unsigned long arg); -static int mptctl_cpq_getpciinfo(unsigned long arg); -static int mptctl_cpq_getdriver(unsigned long arg); -static int mptctl_cpq_ctlr_status(unsigned long arg); -static int mptctl_cpq_target_address(unsigned long arg); -static int mptctl_cpq_passthru(unsigned long arg); -static int mptctl_compaq_scsiio(VENDOR_IOCTL_REQ *pVenReq, cpqfc_passthru_t *pPass); - /* * Private function calls. */ @@ -625,14 +617,6 @@ } ret = -ENXIO; /* (-6) No such device or address */ - - /* Test for Compaq-specific IOCTL's. - */ - if ((cmd == CPQFCTS_GETPCIINFO) || (cmd == CPQFCTS_CTLR_STATUS) || - (cmd == CPQFCTS_GETDRIVVER) || (cmd == CPQFCTS_SCSI_PASSTHRU) || - (cmd == CPQFCTS_SCSI_IOCTL_FC_TARGET_ADDRESS)) - return mptctl_compaq_ioctl(file, cmd, arg); - /* Verify intended MPT adapter - set iocnum and the adapter * pointer (iocp) */ @@ -2065,9 +2049,37 @@ } break; + case MPI_FUNCTION_IOC_INIT: + { + IOCInit_t *pInit = (IOCInit_t *) mf; + u32 high_addr, sense_high; + + /* Verify that all entries in the IOC INIT match + * existing setup (and in LE format). + */ + if (sizeof(dma_addr_t) == sizeof(u64)) { + high_addr = cpu_to_le32((u32)((u64)ioc->req_frames_dma >> 32)); + sense_high= cpu_to_le32((u32)((u64)ioc->sense_buf_pool_dma >> 32)); + } else { + high_addr = 0; + sense_high= 0; + } + + if ((pInit->Flags != 0) || (pInit->MaxDevices != ioc->facts.MaxDevices) || + (pInit->MaxBuses != ioc->facts.MaxBuses) || + (pInit->ReplyFrameSize != cpu_to_le16(ioc->reply_sz)) || + (pInit->HostMfaHighAddr != high_addr) || + (pInit->SenseBufferHighAddr != sense_high)) { + printk(KERN_ERR "%s@%d::mptctl_do_mpt_command - " + "IOC_INIT issued with 1 or more incorrect parameters. Rejected.\n", + __FILE__, __LINE__); + rc = -EFAULT; + goto done_free_mem; + } + } + break; default: /* - * MPI_FUNCTION_IOC_INIT * MPI_FUNCTION_PORT_ENABLE * MPI_FUNCTION_TARGET_CMD_BUFFER_POST * MPI_FUNCTION_TARGET_ASSIST @@ -2554,6 +2566,7 @@ SCSIDevicePage0_t *pg0_alloc; SCSIDevicePage3_t *pg3_alloc; MPT_ADAPTER *ioc; + MPT_SCSI_HOST *hd = NULL; hp_target_info_t karg; int iocnum; int data_sz; @@ -2668,6 +2681,9 @@ pci_free_consistent(ioc->pcidev, data_sz, (u8 *) pg3_alloc, page_dma); } } + hd = (MPT_SCSI_HOST *) ioc->sh->hostdata; + if (hd != NULL) + karg.select_timeouts = hd->sel_timeout[karg.hdr.id]; /* Copy the data from kernel memory to user memory */ @@ -2681,558 +2697,6 @@ return 0; } - - -/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ -/* Routine for the Compaq IOCTL commands. - * - * Outputs: None. - * Return: 0 if successful - * -EBUSY if previous command timout and IOC reset is not complete. - * -EFAULT if data unavailable - * -ENODEV if no such device/adapter - * -ETIME if timer expires - * -ENOMEM if memory allocation error - */ -static int -mptctl_compaq_ioctl(struct file *file, unsigned int cmd, unsigned long arg) -{ - int iocnum = 0; - unsigned iocnumX = 0; - int ret; - int nonblock = (file->f_flags & O_NONBLOCK); - MPT_ADAPTER *iocp = NULL; - - if (cmd == CPQFCTS_SCSI_PASSTHRU) { - /* Update the iocnum */ - if (copy_from_user(&iocnumX, (int *)arg, sizeof(int))) { - printk(KERN_ERR "%s::mptctl_compaq_ioctl() @%d - " - "Unable to read controller number @ %p\n", - __FILE__, __LINE__, (void*)arg); - return -EFAULT; - } - iocnumX &= 0xFF; - } - - if (((iocnum = mpt_verify_adapter(iocnumX, &iocp)) < 0) || - (iocp == NULL)) { - dctlprintk((KERN_ERR "%s::mptctl_compaq_ioctl() @%d - ioc%d not found!\n", - __FILE__, __LINE__, iocnumX)); - return -ENODEV; - } - - /* All of these commands require an interrupt or - * are unknown/illegal. - */ - if ((ret = mptctl_syscall_down(iocp, nonblock)) != 0) - return ret; - - dctlprintk((MYIOC_s_INFO_FMT ": mptctl_compaq_ioctl()\n", iocp->name)); - - switch(cmd) { - case CPQFCTS_GETPCIINFO: - ret = mptctl_cpq_getpciinfo(arg); - break; - case CPQFCTS_GETDRIVVER: - ret = mptctl_cpq_getdriver(arg); - break; - case CPQFCTS_CTLR_STATUS: - ret = mptctl_cpq_ctlr_status(arg); - break; - case CPQFCTS_SCSI_IOCTL_FC_TARGET_ADDRESS: - ret = mptctl_cpq_target_address(arg); - break; - case CPQFCTS_SCSI_PASSTHRU: - ret = mptctl_cpq_passthru(arg); - break; - default: - ret = -EINVAL; - } - - up(&mptctl_syscall_sem_ioc[iocp->id]); - - return ret; - -} - -/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ -/* mptctl_cpq_getpciinfo - Get PCI Information in format desired by Compaq - * - * Outputs: None. - * Return: 0 if successful - * -EBUSY if previous command timout and IOC reset is not complete. - * -EFAULT if data unavailable - * -ENODEV if no such device/adapter - * -ETIME if timer expires - */ -static int -mptctl_cpq_getpciinfo(unsigned long arg) -{ - cpqfc_pci_info_struct *uarg = (cpqfc_pci_info_struct *) arg; - cpqfc_pci_info_struct karg; - MPT_ADAPTER *ioc; - struct pci_dev *pdev; - CONFIGPARMS cfg; - ConfigPageHeader_t hdr; - int iocnum = 0, iocnumX = 0; - dma_addr_t buf_dma; - u8 *pbuf = NULL; - int failed; - - dctlprintk((": mptctl_cpq_pciinfo called.\n")); - if (copy_from_user(&karg, uarg, sizeof(cpqfc_pci_info_struct))) { - printk(KERN_ERR "%s@%d::mptctl_cpq_pciinfo - " - "Unable to read in cpqfc_pci_info_struct @ %p\n", - __FILE__, __LINE__, (void*)uarg); - return -EINVAL; - } - - if (((iocnum = mpt_verify_adapter(iocnumX, &ioc)) < 0) || - (ioc == NULL)) { - dctlprintk((KERN_ERR "%s::mptctl_pciinfo() @%d - ioc%d not found!\n", - __FILE__, __LINE__, iocnum)); - return -ENODEV; - } - - pdev = (struct pci_dev *) ioc->pcidev; - - /* Populate the structure. */ - karg.bus = pdev->bus->number; - karg.bus_type = 1; /* 1 = PCI; 4 = unknown */ - karg.device_fn = PCI_FUNC(pdev->devfn); - karg.slot_number = PCI_SLOT(pdev->devfn); - karg.vendor_id = pdev->vendor; - karg.device_id = pdev->device; - karg.board_id = (karg.device_id | (karg.vendor_id << 16)); - karg.class_code = pdev->class; -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,0) - karg.sub_vendor_id = pdev->subsystem_vendor; - karg.sub_device_id = pdev->subsystem_device; -#endif - - /* Issue a config request to get the device serial number - */ - hdr.PageVersion = 0; - hdr.PageLength = 0; - hdr.PageNumber = 0; - hdr.PageType = MPI_CONFIG_PAGETYPE_MANUFACTURING; - cfg.hdr = &hdr; - cfg.physAddr = -1; - cfg.pageAddr = 0; - cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER; - cfg.dir = 0; /* read */ - cfg.timeout = 10; - - failed = 1; - - if (mpt_config(ioc, &cfg) == 0) { - if (cfg.hdr->PageLength > 0) { - /* Issue the second config page request */ - cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT; - - pbuf = pci_alloc_consistent(ioc->pcidev, hdr.PageLength * 4, &buf_dma); - if (pbuf) { - cfg.physAddr = buf_dma; - if (mpt_config(ioc, &cfg) == 0) { - ManufacturingPage0_t *pdata = (ManufacturingPage0_t *) pbuf; - strncpy(karg.serial_number, pdata->BoardTracerNumber, 17); - failed = 0; - } - pci_free_consistent(ioc->pcidev, hdr.PageLength * 4, pbuf, buf_dma); - pbuf = NULL; - } - } - } - if (failed) - strncpy(karg.serial_number, " ", 17); - - /* Copy the data from kernel memory to user memory - */ - if (copy_to_user((char *)arg, &karg, - sizeof(cpqfc_pci_info_struct))) { - printk(KERN_ERR "%s@%d::mptctl_cpq_pciinfo - " - "Unable to write out cpqfc_pci_info_struct @ %p\n", - __FILE__, __LINE__, (void*)uarg); - return -EFAULT; - } - - return 0; -} - -/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ -/* mptctl_cpq_getdriver - Get Driver Version in format desired by Compaq - * - * Outputs: None. - * Return: 0 if successful - * -EFAULT if data unavailable - * -ENODEV if no such device/adapter - */ -static int -mptctl_cpq_getdriver(unsigned long arg) -{ - int *uarg = (int *)arg; - int karg; - MPT_ADAPTER *ioc = NULL; - int iocnum = 0, iocnumX = 0; - int ii, jj; - char version[10]; - char val; - char *vptr = NULL; - char *pptr = NULL; - - dctlprintk((": mptctl_cpq_getdriver called.\n")); - if (copy_from_user(&karg, uarg, sizeof(int))) { - printk(KERN_ERR "%s@%d::mptctl_cpq_getdriver - " - "Unable to read in struct @ %p\n", - __FILE__, __LINE__, (void*)uarg); - return -EFAULT; - } - - if (((iocnum = mpt_verify_adapter(iocnumX, &ioc)) < 0) || - (ioc == NULL)) { - dctlprintk((KERN_ERR "%s::mptctl_cpq_getdriver() @%d - ioc%d not found!\n", - __FILE__, __LINE__, iocnum)); - return -ENODEV; - } - - strncpy(version, MPT_LINUX_VERSION_COMMON, 8); - - karg = 0; - vptr = version; - ii = 3; - while (ii > 0) { - pptr = strchr(vptr, '.'); - if (pptr) { - *pptr = '\0'; - val = 0; - for (jj=0; vptr[jj]>='0' && vptr[jj]<='9'; jj++) - val = 10 * val + (vptr[jj] - '0'); - karg |= (val << (8*ii)); - pptr++; - vptr = pptr; - } else - break; - ii--; - } - - /* Copy the data from kernel memory to user memory - */ - if (copy_to_user((char *)arg, &karg, - sizeof(int))) { - printk(KERN_ERR "%s@%d::mptctl_cpq_getdriver - " - "Unable to write out stuct @ %p\n", - __FILE__, __LINE__, (void*)uarg); - return -EFAULT; - } - - return 0; -} - -/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ -/* mptctl_cpq_ctlr_status - Get controller status in format desired by Compaq - * - * Outputs: None. - * Return: 0 if successful - * -EFAULT if data unavailable - * -ENODEV if no such device/adapter - */ -static int -mptctl_cpq_ctlr_status(unsigned long arg) -{ - cpqfc_ctlr_status *uarg = (cpqfc_ctlr_status *) arg; - cpqfc_ctlr_status karg; - MPT_ADAPTER *ioc; - int iocnum = 0, iocnumX = 0; - - dctlprintk((": mptctl_cpq_pciinfo called.\n")); - if (copy_from_user(&karg, uarg, sizeof(cpqfc_ctlr_status))) { - printk(KERN_ERR "%s@%d::mptctl_cpq_ctlr_status - " - "Unable to read in cpqfc_ctlr_status @ %p\n", - __FILE__, __LINE__, (void*)uarg); - return -EFAULT; - } - - if (((iocnum = mpt_verify_adapter(iocnumX, &ioc)) < 0) || - (ioc == NULL)) { - dctlprintk((KERN_ERR "%s::mptctl_cpq_ctlr_status() @%d - ioc%d not found!\n", - __FILE__, __LINE__, iocnum)); - return -ENODEV; - } - - karg.status = ioc->last_state; - karg.offline_reason = 0; - - /* Copy the data from kernel memory to user memory - */ - if (copy_to_user((char *)arg, &karg, - sizeof(cpqfc_ctlr_status))) { - printk(KERN_ERR "%s@%d::mptctl_cpq_ctlr_status - " - "Unable to write out cpqfc_ctlr_status @ %p\n", - __FILE__, __LINE__, (void*)uarg); - return -EFAULT; - } - - return 0; -} - -/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ -/* mptctl_cpq_target_address - Get WWN Information in format desired by Compaq - * - * Outputs: None. - * Return: 0 if successful - * -EBUSY if previous command timout and IOC reset is not complete. - * -EFAULT if data unavailable - * -ENODEV if no such device/adapter - * -ETIME if timer expires - */ -static int -mptctl_cpq_target_address(unsigned long arg) -{ - Scsi_FCTargAddress *uarg = (Scsi_FCTargAddress *) arg; - Scsi_FCTargAddress karg; - MPT_ADAPTER *ioc; - int iocnum = 0, iocnumX = 0; - CONFIGPARMS cfg; - ConfigPageHeader_t hdr; - dma_addr_t buf_dma; - u8 *pbuf = NULL; - FCPortPage0_t *ppp0; - int ii, failed; - u32 low, high; - - dctlprintk((": mptctl_cpq_target_address called.\n")); - if (copy_from_user(&karg, uarg, sizeof(Scsi_FCTargAddress))) { - printk(KERN_ERR "%s@%d::mptctl_cpq_target_address - " - "Unable to read in Scsi_FCTargAddress @ %p\n", - __FILE__, __LINE__, (void*)uarg); - return -EFAULT; - } - - if (((iocnum = mpt_verify_adapter(iocnumX, &ioc)) < 0) || - (ioc == NULL)) { - dctlprintk((KERN_ERR "%s::mptctl_cpq_target_address() @%d - ioc%d not found!\n", - __FILE__, __LINE__, iocnum)); - return -ENODEV; - } - - karg.host_port_id = 0; - - /* Issue a config request to get the device wwn - */ - hdr.PageVersion = 0; - hdr.PageLength = 0; - hdr.PageNumber = 0; - hdr.PageType = MPI_CONFIG_PAGETYPE_FC_PORT; - cfg.hdr = &hdr; - cfg.physAddr = -1; - cfg.pageAddr = 0; - cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER; - cfg.dir = 0; /* read */ - cfg.timeout = 10; - - failed = 1; - - if (mpt_config(ioc, &cfg) == 0) { - if (cfg.hdr->PageLength > 0) { - /* Issue the second config page request */ - cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT; - - pbuf = pci_alloc_consistent(ioc->pcidev, hdr.PageLength * 4, &buf_dma); - if (pbuf) { - cfg.physAddr = buf_dma; - if (mpt_config(ioc, &cfg) == 0) { - ppp0 = (FCPortPage0_t *) pbuf; - - low = le32_to_cpu(ppp0->WWNN.Low); - high = le32_to_cpu(ppp0->WWNN.High); - - for (ii = 0; ii < 4; ii++) { - karg.host_wwn[7-ii] = low & 0xFF; - karg.host_wwn[3-ii] = high & 0xFF; - low = (low >> 8); - high = (high >> 8); - } - failed = 0; - } - pci_free_consistent(ioc->pcidev, hdr.PageLength * 4, pbuf, buf_dma); - pbuf = NULL; - } - } - } - - if (failed) { - for (ii = 7; ii >= 0; ii--) - karg.host_wwn[ii] = 0; - } - - /* Copy the data from kernel memory to user memory - */ - if (copy_to_user((char *)arg, &karg, - sizeof(Scsi_FCTargAddress))) { - printk(KERN_ERR "%s@%d::mptctl_cpq_target_address - " - "Unable to write out Scsi_FCTargAddress @ %p\n", - __FILE__, __LINE__, (void*)uarg); - return -EFAULT; - } - - return 0; -} - -/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ -/* mptctl_cpq_passthru - Construct and issue a SCSI IO Passthru - * - * Requires the SCSI host driver to be loaded. - * I386 version. - * - * Outputs: None. - * Return: 0 if successful - * -EBUSY if previous command timout and IOC reset is not complete. - * -EFAULT if data unavailable - * -ENODEV if no such device/adapter - * -ETIME if timer expires - */ -static int -mptctl_cpq_passthru(unsigned long arg) -{ - VENDOR_IOCTL_REQ *uarg = (VENDOR_IOCTL_REQ *) arg; - VENDOR_IOCTL_REQ karg; - cpqfc_passthru_t kpass; - MPT_ADAPTER *ioc; - int iocnum = 0, iocnumX = 0; - int rc; - - dctlprintk((": mptctl_cpq_passthru called.\n")); - if (copy_from_user(&karg, uarg, sizeof(VENDOR_IOCTL_REQ))) { - printk(KERN_ERR "%s@%d::mptctl_cpq_passthru - " - "Unable to read in VENDOR_IOCTL_REQ @ %p\n", - __FILE__, __LINE__, (void*)uarg); - return -EFAULT; - } - - /* Set the IOC number */ - iocnumX = karg.lc & 0xFF; - if (((iocnum = mpt_verify_adapter(iocnumX, &ioc)) < 0) || - (ioc == NULL)) { - dctlprintk((KERN_ERR "%s::mptctl_cpq_passthru() @%d - ioc%d not found!\n", - __FILE__, __LINE__, iocnum)); - return -ENODEV; - } - - if (ioc->sh == NULL) { - printk(KERN_ERR "%s::mptctl_cpq_passthru() @%d - SCSI Host driver not loaded!\n", - __FILE__, __LINE__); - return -EFAULT; - } - - /* Read in the second buffer */ - if (copy_from_user(&kpass, uarg->argp, sizeof(cpqfc_passthru_t))) { - printk(KERN_ERR "%s@%d::mptctl_cpq_passthru - " - "Unable to read in cpqfc_passthru_t @ %p\n", - __FILE__, __LINE__, (void*)uarg); - return -EFAULT; - } - - - /* Generate the SCSI IO command and issue */ - rc = mptctl_compaq_scsiio(&karg, &kpass); - return rc; -} - -/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ -/* mptctl_compaq_scsiio - Reformat Compaq structures into driver structures - * Call the generic _do_mpt_command function. - * - * Requires the SCSI host driver to be loaded. - * I386 version. - * - * Outputs: None. - * Return: 0 if successful - * -EBUSY if previous command timout and IOC reset is not complete. - * -EFAULT if data unavailable - * -ENODEV if no such device/adapter - * -ETIME if timer expires - */ -static int -mptctl_compaq_scsiio(VENDOR_IOCTL_REQ *pVenReq, cpqfc_passthru_t *pPass) -{ - struct mpt_ioctl_command karg; - SCSIIORequest_t request ; - SCSIIORequest_t *pMf; - int ii, rc; - u8 opcode; - - /* Fill in parameters to karg */ - karg.hdr.iocnum = pVenReq->lc; - karg.hdr.port = 0; - karg.hdr.maxDataSize = 0; /* not used */ - karg.timeout = 0; /* use default */ - - karg.replyFrameBufPtr = NULL; /* no reply data */ - karg.maxReplyBytes = 0; - - karg.senseDataPtr = pPass->sense_data; - karg.maxSenseBytes = pPass->sense_len; /* max is 40 */ - - if (pPass->rw_flag == MPT_COMPAQ_WRITE) { - karg.dataOutBufPtr = pPass->bufp; - karg.dataOutSize = pPass->len; - karg.dataInBufPtr = NULL; - karg.dataInSize = 0; - } else { - karg.dataInBufPtr = pPass->bufp; - karg.dataInSize = pPass->len; - karg.dataOutBufPtr = NULL; - karg.dataOutSize = 0; - } - - karg.dataSgeOffset = (sizeof(SCSIIORequest_t) - sizeof(SGE_IO_UNION))/4; - - /* Construct the Message frame */ - pMf = &request; - - pMf->TargetID = (u8) pVenReq->ld; /* ???? FIXME */ - pMf->Bus = (u8) pPass->bus; - pMf->ChainOffset = 0; - pMf->Function = MPI_FUNCTION_SCSI_IO_REQUEST; - - /* May need some tweaking here */ - opcode = (u8) pPass->cdb[0]; - if (opcode < 0x20) - pMf->CDBLength = 6; - else if (opcode < 0x60) - pMf->CDBLength = 10; - else if ((opcode < 0xC0) && (opcode >= 0xA0)) - pMf->CDBLength = 12; - else - pMf->CDBLength = 16; - - pMf->SenseBufferLength = karg.maxSenseBytes; /* max is 40 */ - pMf->Reserved = 0; - pMf->MsgFlags = 0; /* set later */ - pMf->MsgContext = 0; /* set later */ - - for (ii = 0; ii < 8; ii++) - pMf->LUN[ii] = 0; - pMf->LUN[1] = 0; /* ???? FIXME */ - - /* Tag values set by _do_mpt_command */ - if (pPass->rw_flag == MPT_COMPAQ_WRITE) - pMf->Control = MPI_SCSIIO_CONTROL_WRITE; - else - pMf->Control = MPI_SCSIIO_CONTROL_READ; - - for (ii = 0; ii < 16; ii++) - pMf->CDB[ii] = pPass->cdb[ii]; - - pMf->DataLength = pPass->len; - - /* All remaining fields are set by the next function - */ - rc = mptctl_do_mpt_command (karg, (char *)pMf, 1); - return rc; -} - - /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,3,51) @@ -3371,70 +2835,6 @@ return ret; } -static int -sparc32_mptctl_cpq_passthru(unsigned int fd, unsigned int cmd, - unsigned long arg, struct file *filp) -{ - VENDOR_IOCTL_REQ32 *uarg = (VENDOR_IOCTL_REQ32 *) arg; - VENDOR_IOCTL_REQ32 karg32; - VENDOR_IOCTL_REQ karg; - cpqfc_passthru32_t kpass32; - cpqfc_passthru_t kpass; - MPT_ADAPTER *ioc; - int nonblock = (filp->f_flags & O_NONBLOCK); - int iocnum = 0, iocnumX = 0; - int rc; - int ii; - - dctlprintk((KERN_INFO MYNAM "::sparc32_mptctl_cpq_passthru() called\n")); - - if (copy_from_user(&karg32, (char *)arg, sizeof(karg32))) - return -EFAULT; - - /* Verify intended MPT adapter */ - iocnumX = karg32.lc & 0xFF; - if (((iocnum = mpt_verify_adapter(iocnumX, &ioc)) < 0) || - (ioc == NULL)) { - dctlprintk((KERN_ERR MYNAM "::sparc32_mpt_command @%d - ioc%d not found!\n", - __LINE__, iocnumX)); - return -ENODEV; - } - - if ((rc = mptctl_syscall_down(ioc, nonblock)) != 0) - return rc; - - /* Copy data to karg */ - karg.ld = karg32.ld; - karg.node = karg32.node; - karg.lc = karg32.lc; - karg.nexus = karg32.nexus; - karg.argp = (void *)(unsigned long)karg32.argp; - - /* Read in the second buffer */ - if (copy_from_user(&kpass32, karg.argp, sizeof(cpqfc_passthru32_t))) { - printk(KERN_ERR "%s@%d::sparc32_mptctl_cpq_passthru - " - "Unable to read in cpqfc_passthru_t @ %p\n", - __FILE__, __LINE__, (void*)uarg); - return -EFAULT; - } - - /* Copy the 32bit buffer to kpass */ - for (ii = 0; ii < 16; ii++) - kpass.cdb[ii] = kpass32.cdb[ii]; - kpass.bus = kpass32.bus; - kpass.pdrive = kpass32.pdrive; - kpass.len = kpass32.len; - kpass.sense_len = kpass32.sense_len; - kpass.bufp = (void *)(unsigned long)kpass32.bufp; - kpass.rw_flag = kpass32.rw_flag; - - /* Generate the SCSI IO command and issue */ - rc = mptctl_compaq_scsiio(&karg, &kpass); - - up(&mptctl_syscall_sem_ioc[ioc->id]); - return rc; -} - #endif /*} linux >= 2.3.x */ #endif /*} sparc */ @@ -3503,16 +2903,6 @@ err = register_ioctl32_conversion(MPTFWDOWNLOAD32, sparc32_mptfwxfer_ioctl); if (++where && err) goto out_fail; - err = register_ioctl32_conversion(CPQFCTS_GETPCIINFO, NULL); - if (++where && err) goto out_fail; - err = register_ioctl32_conversion(CPQFCTS_CTLR_STATUS, NULL); - if (++where && err) goto out_fail; - err = register_ioctl32_conversion(CPQFCTS_GETDRIVVER, NULL); - if (++where && err) goto out_fail; - err = register_ioctl32_conversion(CPQFCTS_SCSI_IOCTL_FC_TARGET_ADDRESS, NULL); - if (++where && err) goto out_fail; - err = register_ioctl32_conversion(CPQFCTS_SCSI_PASSTHRU32, sparc32_mptctl_cpq_passthru); - if (++where && err) goto out_fail; err = register_ioctl32_conversion(HP_GETHOSTINFO, NULL); if (++where && err) goto out_fail; err = register_ioctl32_conversion(HP_GETTARGETINFO, NULL); @@ -3521,9 +2911,9 @@ #endif /*} sparc */ /* Register this device */ - if (misc_register(&mptctl_miscdev) == -1) { + err = misc_register(&mptctl_miscdev); + if (err < 0) { printk(KERN_ERR MYNAM ": Can't register misc device [minor=%d].\n", MPT_MINOR); - err = -EBUSY; goto out_fail; } printk(KERN_INFO MYNAM ": Registered with Fusion MPT base driver\n"); @@ -3564,11 +2954,6 @@ unregister_ioctl32_conversion(MPTHARDRESET); unregister_ioctl32_conversion(MPTCOMMAND32); unregister_ioctl32_conversion(MPTFWDOWNLOAD32); - unregister_ioctl32_conversion(CPQFCTS_GETPCIINFO); - unregister_ioctl32_conversion(CPQFCTS_GETDRIVVER); - unregister_ioctl32_conversion(CPQFCTS_CTLR_STATUS); - unregister_ioctl32_conversion(CPQFCTS_SCSI_IOCTL_FC_TARGET_ADDRESS); - unregister_ioctl32_conversion(CPQFCTS_SCSI_PASSTHRU32); unregister_ioctl32_conversion(HP_GETHOSTINFO); unregister_ioctl32_conversion(HP_GETTARGETINFO); #endif /*} linux >= 2.3.x */ diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/message/fusion/mptctl.h linux.21rc1-ac1/drivers/message/fusion/mptctl.h --- linux.21rc1/drivers/message/fusion/mptctl.h 2003-04-22 16:39:35.000000000 +0100 +++ linux.21rc1-ac1/drivers/message/fusion/mptctl.h 2003-04-22 17:37:24.000000000 +0100 @@ -20,7 +20,7 @@ * (mailto:sjralston1@netscape.net) * (mailto:Pam.Delaney@lsil.com) * - * $Id: mptctl.h,v 1.12 2002/10/17 20:15:58 pdelaney Exp $ + * $Id: mptctl.h,v 1.13 2002/12/03 21:26:33 pdelaney Exp $ */ /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ /* @@ -310,103 +310,15 @@ #endif /*}*/ - -/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ - /* - * COMPAQ Specific IOCTL Defines and Structures - */ - -#define CPQFCTS_IOC_MAGIC 'Z' - -#define CPQFCTS_GETPCIINFO _IOR(CPQFCTS_IOC_MAGIC, 1, cpqfc_pci_info_struct) -#define CPQFCTS_GETDRIVVER _IOR(CPQFCTS_IOC_MAGIC, 9, int) -#define CPQFCTS_CTLR_STATUS _IOR(CPQFCTS_IOC_MAGIC, 3, struct _cpqfc_ctlr_status) -#define CPQFCTS_SCSI_IOCTL_FC_TARGET_ADDRESS _IOR(CPQFCTS_IOC_MAGIC, 13, struct scsi_fctargaddress) -#define CPQFCTS_SCSI_PASSTHRU _IOWR(CPQFCTS_IOC_MAGIC, 11, VENDOR_IOCTL_REQ) -#if defined(__sparc__) && defined(__sparc_v9__) -#define CPQFCTS_SCSI_PASSTHRU32 _IOWR(CPQFCTS_IOC_MAGIC, 11, VENDOR_IOCTL_REQ32) -#endif - -typedef struct { - unsigned short bus; - unsigned short bus_type; - unsigned short device_fn; - u32 board_id; - u32 slot_number; - unsigned short vendor_id; - unsigned short device_id; - unsigned short class_code; - unsigned short sub_vendor_id; - unsigned short sub_device_id; - u8 serial_number[81]; -} cpqfc_pci_info_struct; - - -typedef struct scsi_fctargaddress { - unsigned int host_port_id; - u8 host_wwn[8]; /* WW Network Name */ -} Scsi_FCTargAddress; - -typedef struct _cpqfc_ctlr_status { - u32 status; - u32 offline_reason; -} cpqfc_ctlr_status; - - -/* Compaq SCSI I/O Passthru structures. - */ -#define MPT_COMPAQ_READ 0x26 -#define MPT_COMPAQ_WRITE 0x27 - -typedef struct { - int lc; /* controller number */ - int node; /* node number */ - int ld; /* target logical id */ - u32 nexus; - void *argp; -} VENDOR_IOCTL_REQ; - -#if defined(__KERNEL__) && defined(__sparc__) && defined(__sparc_v9__) /*{*/ -typedef struct { - int lc; /* controller number */ - int node; /* node number */ - int ld; /* target logical id */ - u32 nexus; - u32 argp; -} VENDOR_IOCTL_REQ32; -#endif - -typedef struct { - char cdb[16]; /* cdb */ - unsigned short bus; /* bus number */ - unsigned short pdrive; /* physical drive */ - int len; /* data area size */ - int sense_len; /* sense size */ - char sense_data[40]; /* sense buffer */ - void *bufp; /* data buffer pointer */ - char rw_flag; -} cpqfc_passthru_t; - -#if defined(__KERNEL__) && defined(__sparc__) && defined(__sparc_v9__) /*{*/ -typedef struct { - char cdb[16]; /* cdb */ - unsigned short bus; /* bus number */ - unsigned short pdrive; /* physical drive */ - int len; /* data area size */ - int sense_len; /* sense size */ - char sense_data[40]; /* sense buffer */ - u32 bufp; /* data buffer pointer */ - char rw_flag; -} cpqfc_passthru32_t; -#endif - /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ /* * HP Specific IOCTL Defines and Structures */ -#define HP_GETHOSTINFO _IOR(CPQFCTS_IOC_MAGIC, 20, hp_host_info_t) -#define HP_GETTARGETINFO _IOR(CPQFCTS_IOC_MAGIC, 21, hp_target_info_t) +#define CPQFCTS_IOC_MAGIC 'Z' +#define HP_IOC_MAGIC 'Z' +#define HP_GETHOSTINFO _IOR(HP_IOC_MAGIC, 20, hp_host_info_t) +#define HP_GETTARGETINFO _IOR(HP_IOC_MAGIC, 21, hp_target_info_t) /* All HP IOCTLs must include this header */ diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/message/fusion/mptlan.h linux.21rc1-ac1/drivers/message/fusion/mptlan.h --- linux.21rc1/drivers/message/fusion/mptlan.h 2003-04-22 16:39:35.000000000 +0100 +++ linux.21rc1-ac1/drivers/message/fusion/mptlan.h 2003-04-22 19:20:12.000000000 +0100 @@ -21,11 +21,7 @@ #include #include #include -#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,41) #include -#else -#include -#endif #include // #include diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/message/fusion/mptscsih.c linux.21rc1-ac1/drivers/message/fusion/mptscsih.c --- linux.21rc1/drivers/message/fusion/mptscsih.c 2003-04-22 16:39:35.000000000 +0100 +++ linux.21rc1-ac1/drivers/message/fusion/mptscsih.c 2003-04-22 16:44:37.000000000 +0100 @@ -26,7 +26,7 @@ * (mailto:sjralston1@netscape.net) * (mailto:Pam.Delaney@lsil.com) * - * $Id: mptscsih.c,v 1.103 2002/10/17 20:15:59 pdelaney Exp $ + * $Id: mptscsih.c,v 1.106 2003/01/28 21:31:57 pdelaney Exp $ */ /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ /* @@ -78,7 +78,9 @@ #include /* notifier code */ #include "../../scsi/scsi.h" #include "../../scsi/hosts.h" +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,45) #include "../../scsi/sd.h" +#endif #include "mptbase.h" #include "mptscsih.h" @@ -157,11 +159,9 @@ static int mptscsih_io_done(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf, MPT_FRAME_HDR *r); static void mptscsih_report_queue_full(Scsi_Cmnd *sc, SCSIIOReply_t *pScsiReply, SCSIIORequest_t *pScsiReq); static int mptscsih_taskmgmt_complete(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf, MPT_FRAME_HDR *r); -static int mptscsih_io_direction(Scsi_Cmnd *cmd); static int mptscsih_AddSGE(MPT_SCSI_HOST *hd, Scsi_Cmnd *SCpnt, SCSIIORequest_t *pReq, int req_idx); -static int mptscsih_getFreeChainBuffer(MPT_SCSI_HOST *hd, int *retIndex); static void mptscsih_freeChainBuffers(MPT_SCSI_HOST *hd, int req_idx); static int mptscsih_initChainBuffers (MPT_SCSI_HOST *hd, int init); static void copy_sense_data(Scsi_Cmnd *sc, MPT_SCSI_HOST *hd, MPT_FRAME_HDR *mf, SCSIIOReply_t *pScsiReply); @@ -272,147 +272,579 @@ /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ /* - * mptscsih_io_done - Main SCSI IO callback routine registered to - * Fusion MPT (base) driver - * @ioc: Pointer to MPT_ADAPTER structure - * @mf: Pointer to original MPT request frame - * @r: Pointer to MPT reply frame (NULL if TurboReply) + * Private inline routines... + */ +/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ +/* 19991030 -sralston + * Return absolute SCSI data direction: + * 1 = _DATA_OUT + * 0 = _DIR_NONE + * -1 = _DATA_IN * - * This routine is called from mpt.c::mpt_interrupt() at the completion - * of any SCSI IO request. - * This routine is registered with the Fusion MPT (base) driver at driver - * load/init time via the mpt_register() API call. + * Changed: 3-20-2002 pdelaney to use the default data + * direction and the defines set up in the + * 2.4 kernel series + * 1 = _DATA_OUT changed to SCSI_DATA_WRITE (1) + * 0 = _DIR_NONE changed to SCSI_DATA_NONE (3) + * -1 = _DATA_IN changed to SCSI_DATA_READ (2) + * If the direction is unknown, fall through to original code. * - * Returns 1 indicating alloc'd request frame ptr should be freed. + * Mid-layer bug fix(): sg interface generates the wrong data + * direction in some cases. Set the direction the hard way for + * the most common commands. */ -static int -mptscsih_io_done(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf, MPT_FRAME_HDR *mr) +static inline int +mptscsih_io_direction(Scsi_Cmnd *cmd) { - Scsi_Cmnd *sc; - MPT_SCSI_HOST *hd; - SCSIIORequest_t *pScsiReq; - SCSIIOReply_t *pScsiReply; -#ifndef MPT_SCSI_USE_NEW_EH - unsigned long flags; -#endif - u16 req_idx; + switch (cmd->cmnd[0]) { + case WRITE_6: + case WRITE_10: + return SCSI_DATA_WRITE; + break; + case READ_6: + case READ_10: + return SCSI_DATA_READ; + break; + } - hd = (MPT_SCSI_HOST *) ioc->sh->hostdata; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,0) + if (cmd->sc_data_direction != SCSI_DATA_UNKNOWN) + return cmd->sc_data_direction; +#endif + switch (cmd->cmnd[0]) { + /* _DATA_OUT commands */ + case WRITE_6: case WRITE_10: case WRITE_12: + case WRITE_LONG: case WRITE_SAME: case WRITE_BUFFER: + case WRITE_VERIFY: case WRITE_VERIFY_12: + case COMPARE: case COPY: case COPY_VERIFY: + case SEARCH_EQUAL: case SEARCH_HIGH: case SEARCH_LOW: + case SEARCH_EQUAL_12: case SEARCH_HIGH_12: case SEARCH_LOW_12: + case MODE_SELECT: case MODE_SELECT_10: case LOG_SELECT: + case SEND_DIAGNOSTIC: case CHANGE_DEFINITION: case UPDATE_BLOCK: + case SET_WINDOW: case MEDIUM_SCAN: case SEND_VOLUME_TAG: + case REASSIGN_BLOCKS: + case PERSISTENT_RESERVE_OUT: + case 0xea: + case 0xa3: + return SCSI_DATA_WRITE; - if ((mf == NULL) || - (mf >= MPT_INDEX_2_MFPTR(ioc, ioc->req_depth))) { - printk(MYIOC_s_ERR_FMT "%s req frame ptr! (=%p)!\n", - ioc->name, mf?"BAD":"NULL", (void *) mf); - /* return 1; CHECKME SteveR. Don't free. */ - return 0; - } + /* No data transfer commands */ + case SEEK_6: case SEEK_10: + case RESERVE: case RELEASE: + case TEST_UNIT_READY: + case START_STOP: + case ALLOW_MEDIUM_REMOVAL: + return SCSI_DATA_NONE; - req_idx = le16_to_cpu(mf->u.frame.hwhdr.msgctxu.fld.req_idx); - sc = hd->ScsiLookup[req_idx]; - if (sc == NULL) { - MPIHeader_t *hdr = (MPIHeader_t *)mf; + /* Conditional data transfer commands */ + case FORMAT_UNIT: + if (cmd->cmnd[1] & 0x10) /* FmtData (data out phase)? */ + return SCSI_DATA_WRITE; + else + return SCSI_DATA_NONE; - atomic_dec(&queue_depth); + case VERIFY: + if (cmd->cmnd[1] & 0x02) /* VERIFY:BYTCHK (data out phase)? */ + return SCSI_DATA_WRITE; + else + return SCSI_DATA_NONE; - /* writeSDP1 will use the ScsiDoneCtx - * There is no processing for the reply. - * Just return to the calling function. - */ - if (hdr->Function == MPI_FUNCTION_SCSI_IO_REQUEST) - printk(MYIOC_s_ERR_FMT "NULL ScsiCmd ptr!\n", ioc->name); + case RESERVE_10: + if (cmd->cmnd[1] & 0x03) /* RESERVE:{LongID|Extent} (data out phase)? */ + return SCSI_DATA_WRITE; + else + return SCSI_DATA_NONE; - mptscsih_freeChainBuffers(hd, req_idx); - return 1; + /* Must be data _IN! */ + default: + return SCSI_DATA_READ; } +} /* mptscsih_io_direction() */ - dmfprintk((MYIOC_s_INFO_FMT "ScsiDone (mf=%p,mr=%p,sc=%p,idx=%d)\n", - ioc->name, mf, mr, sc, req_idx)); +/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ +/** + * mptscsih_add_sge - Place a simple SGE at address pAddr. + * @pAddr: virtual address for SGE + * @flagslength: SGE flags and data transfer length + * @dma_addr: Physical address + * + * This routine places a MPT request frame back on the MPT adapter's + * FreeQ. + */ +static inline void +mptscsih_add_sge(char *pAddr, u32 flagslength, dma_addr_t dma_addr) +{ + if (sizeof(dma_addr_t) == sizeof(u64)) { + SGESimple64_t *pSge = (SGESimple64_t *) pAddr; + u32 tmp = dma_addr & 0xFFFFFFFF; + + pSge->FlagsLength = cpu_to_le32(flagslength); + pSge->Address.Low = cpu_to_le32(tmp); + tmp = (u32) ((u64)dma_addr >> 32); + pSge->Address.High = cpu_to_le32(tmp); - atomic_dec(&queue_depth); + } else { + SGESimple32_t *pSge = (SGESimple32_t *) pAddr; + pSge->FlagsLength = cpu_to_le32(flagslength); + pSge->Address = cpu_to_le32(dma_addr); + } +} /* mptscsih_add_sge() */ - sc->result = DID_OK << 16; /* Set default reply as OK */ - pScsiReq = (SCSIIORequest_t *) mf; - pScsiReply = (SCSIIOReply_t *) mr; +/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ +/** + * mptscsih_add_chain - Place a chain SGE at address pAddr. + * @pAddr: virtual address for SGE + * @next: nextChainOffset value (u32's) + * @length: length of next SGL segment + * @dma_addr: Physical address + * + * This routine places a MPT request frame back on the MPT adapter's + * FreeQ. + */ +static inline void +mptscsih_add_chain(char *pAddr, u8 next, u16 length, dma_addr_t dma_addr) +{ + if (sizeof(dma_addr_t) == sizeof(u64)) { + SGEChain64_t *pChain = (SGEChain64_t *) pAddr; + u32 tmp = dma_addr & 0xFFFFFFFF; + + pChain->Length = cpu_to_le16(length); + pChain->Flags = MPI_SGE_FLAGS_CHAIN_ELEMENT | mpt_addr_size(); + + pChain->NextChainOffset = next; + + pChain->Address.Low = cpu_to_le32(tmp); + tmp = (u32) ((u64)dma_addr >> 32); + pChain->Address.High = cpu_to_le32(tmp); + } else { + SGEChain32_t *pChain = (SGEChain32_t *) pAddr; + pChain->Length = cpu_to_le16(length); + pChain->Flags = MPI_SGE_FLAGS_CHAIN_ELEMENT | mpt_addr_size(); + pChain->NextChainOffset = next; + pChain->Address = cpu_to_le32(dma_addr); + } +} /* mptscsih_add_chain() */ - if (pScsiReply == NULL) { - /* special context reply handling */ +/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ +/* + * mptscsih_getFreeChainBuffes - Function to get a free chain + * from the MPT_SCSI_HOST FreeChainQ. + * @hd: Pointer to the MPT_SCSI_HOST instance + * @req_idx: Index of the SCSI IO request frame. (output) + * + * return SUCCESS or FAILED + */ +static inline int +mptscsih_getFreeChainBuffer(MPT_SCSI_HOST *hd, int *retIndex) +{ + MPT_FRAME_HDR *chainBuf = NULL; + unsigned long flags; + int rc = FAILED; + int chain_idx = MPT_HOST_NO_CHAIN; - /* If regular Inquiry cmd - save inquiry data - */ - if (pScsiReq->CDB[0] == INQUIRY && !(pScsiReq->CDB[1] & 0x3)) { - int dlen; + spin_lock_irqsave(&hd->ioc->FreeQlock, flags); + if (!Q_IS_EMPTY(&hd->FreeChainQ)) { - dlen = le32_to_cpu(pScsiReq->DataLength); - if (dlen >= SCSI_STD_INQUIRY_BYTES) { - mptscsih_initTarget(hd, - hd->port, - sc->target, - pScsiReq->LUN[1], - sc->buffer, - dlen); - } - } -#ifdef MPT_SAVE_AUTOSENSE - clear_sense_flag(hd, pScsiReq); -#endif - } else { - u32 xfer_cnt; - u16 status; - u8 scsi_state; + int offset; - status = le16_to_cpu(pScsiReply->IOCStatus) & MPI_IOCSTATUS_MASK; - scsi_state = pScsiReply->SCSIState; + chainBuf = hd->FreeChainQ.head; + Q_DEL_ITEM(&chainBuf->u.frame.linkage); + offset = (u8 *)chainBuf - (u8 *)hd->ChainBuffer; + chain_idx = offset / hd->ioc->req_sz; + rc = SUCCESS; + } + spin_unlock_irqrestore(&hd->ioc->FreeQlock, flags); - dprintk((KERN_NOTICE " Uh-Oh! (%d:%d:%d) mf=%p, mr=%p, sc=%p\n", - ioc->id, pScsiReq->TargetID, pScsiReq->LUN[1], - mf, mr, sc)); - dprintk((KERN_NOTICE " IOCStatus=%04xh, SCSIState=%02xh" - ", SCSIStatus=%02xh, IOCLogInfo=%08xh\n", - status, scsi_state, pScsiReply->SCSIStatus, - le32_to_cpu(pScsiReply->IOCLogInfo))); - if (scsi_state & MPI_SCSI_STATE_AUTOSENSE_VALID) - copy_sense_data(sc, hd, mf, pScsiReply); + *retIndex = chain_idx; - /* - * Look for + dump FCP ResponseInfo[]! - */ - if (scsi_state & MPI_SCSI_STATE_RESPONSE_INFO_VALID) { - dprintk((KERN_NOTICE " FCP_ResponseInfo=%08xh\n", - le32_to_cpu(pScsiReply->ResponseInfo))); - } + dsgprintk((MYIOC_s_INFO_FMT "getFreeChainBuffer (index %d), got buf=%p\n", + hd->ioc->name, *retIndex, chainBuf)); - switch(status) { - case MPI_IOCSTATUS_BUSY: /* 0x0002 */ - /* CHECKME! - * Maybe: DRIVER_BUSY | SUGGEST_RETRY | DID_SOFT_ERROR (retry) - * But not: DID_BUS_BUSY lest one risk - * killing interrupt handler:-( - */ - sc->result = STS_BUSY; - break; + return rc; +} /* mptscsih_getFreeChainBuffer() */ - case MPI_IOCSTATUS_SCSI_INVALID_BUS: /* 0x0041 */ - case MPI_IOCSTATUS_SCSI_INVALID_TARGETID: /* 0x0042 */ - sc->result = DID_BAD_TARGET << 16; - break; +/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ +/* + * mptscsih_AddSGE - Add a SGE (plus chain buffers) to the + * SCSIIORequest_t Message Frame. + * @hd: Pointer to MPT_SCSI_HOST structure + * @SCpnt: Pointer to Scsi_Cmnd structure + * @pReq: Pointer to SCSIIORequest_t structure + * + * Returns ... + */ +static int +mptscsih_AddSGE(MPT_SCSI_HOST *hd, Scsi_Cmnd *SCpnt, + SCSIIORequest_t *pReq, int req_idx) +{ + char *psge; + char *chainSge; + struct scatterlist *sg; + int frm_sz; + int sges_left, sg_done; + int chain_idx = MPT_HOST_NO_CHAIN; + int sgeOffset; + int numSgeSlots, numSgeThisFrame; + u32 sgflags, sgdir, thisxfer = 0; + int chain_dma_off = 0; + int newIndex; + int ii; + dma_addr_t v2; - case MPI_IOCSTATUS_SCSI_DEVICE_NOT_THERE: /* 0x0043 */ - /* Spoof to SCSI Selection Timeout! */ - sc->result = DID_NO_CONNECT << 16; - break; + sgdir = le32_to_cpu(pReq->Control) & MPI_SCSIIO_CONTROL_DATADIRECTION_MASK; + if (sgdir == MPI_SCSIIO_CONTROL_WRITE) { + sgdir = MPT_TRANSFER_HOST_TO_IOC; + } else { + sgdir = MPT_TRANSFER_IOC_TO_HOST; + } - case MPI_IOCSTATUS_SCSI_TASK_TERMINATED: /* 0x0048 */ -#ifndef MPT_SCSI_USE_NEW_EH - search_taskQ_for_cmd(sc, hd); -#endif - /* Linux handles an unsolicited DID_RESET better - * than an unsolicited DID_ABORT. - */ - sc->result = DID_RESET << 16; + psge = (char *) &pReq->SGL; + frm_sz = hd->ioc->req_sz; - /* GEM Workaround. */ - if (hd->is_spi) + /* Map the data portion, if any. + * sges_left = 0 if no data transfer. + */ + sges_left = SCpnt->use_sg; + if (SCpnt->use_sg) { + sges_left = pci_map_sg(hd->ioc->pcidev, + (struct scatterlist *) SCpnt->request_buffer, + SCpnt->use_sg, + scsi_to_pci_dma_dir(SCpnt->sc_data_direction)); + } else if (SCpnt->request_bufflen) { + dma_addr_t buf_dma_addr; + scPrivate *my_priv; + + buf_dma_addr = pci_map_single(hd->ioc->pcidev, + SCpnt->request_buffer, + SCpnt->request_bufflen, + scsi_to_pci_dma_dir(SCpnt->sc_data_direction)); + + /* We hide it here for later unmap. */ + my_priv = (scPrivate *) &SCpnt->SCp; + my_priv->p1 = (void *)(ulong) buf_dma_addr; + + dsgprintk((MYIOC_s_INFO_FMT "SG: non-SG for %p, len=%d\n", + hd->ioc->name, SCpnt, SCpnt->request_bufflen)); + + mptscsih_add_sge((char *) &pReq->SGL, + 0xD1000000|MPT_SGE_FLAGS_ADDRESSING|sgdir|SCpnt->request_bufflen, + buf_dma_addr); + + return SUCCESS; + } + + /* Handle the SG case. + */ + sg = (struct scatterlist *) SCpnt->request_buffer; + sg_done = 0; + sgeOffset = sizeof(SCSIIORequest_t) - sizeof(SGE_IO_UNION); + chainSge = NULL; + + /* Prior to entering this loop - the following must be set + * current MF: sgeOffset (bytes) + * chainSge (Null if original MF is not a chain buffer) + * sg_done (num SGE done for this MF) + */ + +nextSGEset: + numSgeSlots = ((frm_sz - sgeOffset) / (sizeof(u32) + sizeof(dma_addr_t)) ); + numSgeThisFrame = (sges_left < numSgeSlots) ? sges_left : numSgeSlots; + + sgflags = MPT_SGE_FLAGS_SIMPLE_ELEMENT | MPT_SGE_FLAGS_ADDRESSING | sgdir; + + /* Get first (num - 1) SG elements + * Skip any SG entries with a length of 0 + * NOTE: at finish, sg and psge pointed to NEXT data/location positions + */ + for (ii=0; ii < (numSgeThisFrame-1); ii++) { + thisxfer = sg_dma_len(sg); + if (thisxfer == 0) { + sg ++; /* Get next SG element from the OS */ + sg_done++; + continue; + } + + v2 = sg_dma_address(sg); + mptscsih_add_sge(psge, sgflags | thisxfer, v2); + + sg++; /* Get next SG element from the OS */ + psge += (sizeof(u32) + sizeof(dma_addr_t)); + sgeOffset += (sizeof(u32) + sizeof(dma_addr_t)); + sg_done++; + } + + if (numSgeThisFrame == sges_left) { + /* Add last element, end of buffer and end of list flags. + */ + sgflags |= MPT_SGE_FLAGS_LAST_ELEMENT | + MPT_SGE_FLAGS_END_OF_BUFFER | + MPT_SGE_FLAGS_END_OF_LIST; + + /* Add last SGE and set termination flags. + * Note: Last SGE may have a length of 0 - which should be ok. + */ + thisxfer = sg_dma_len(sg); + + v2 = sg_dma_address(sg); + mptscsih_add_sge(psge, sgflags | thisxfer, v2); + /* + sg++; + psge += (sizeof(u32) + sizeof(dma_addr_t)); + */ + sgeOffset += (sizeof(u32) + sizeof(dma_addr_t)); + sg_done++; + + if (chainSge) { + /* The current buffer is a chain buffer, + * but there is not another one. + * Update the chain element + * Offset and Length fields. + */ + mptscsih_add_chain((char *)chainSge, 0, sgeOffset, hd->ChainBufferDMA + chain_dma_off); + } else { + /* The current buffer is the original MF + * and there is no Chain buffer. + */ + pReq->ChainOffset = 0; + } + } else { + /* At least one chain buffer is needed. + * Complete the first MF + * - last SGE element, set the LastElement bit + * - set ChainOffset (words) for orig MF + * (OR finish previous MF chain buffer) + * - update MFStructPtr ChainIndex + * - Populate chain element + * Also + * Loop until done. + */ + + dsgprintk((MYIOC_s_INFO_FMT "SG: Chain Required! sg done %d\n", + hd->ioc->name, sg_done)); + + /* Set LAST_ELEMENT flag for last non-chain element + * in the buffer. Since psge points at the NEXT + * SGE element, go back one SGE element, update the flags + * and reset the pointer. (Note: sgflags & thisxfer are already + * set properly). + */ + if (sg_done) { + u32 *ptmp = (u32 *) (psge - (sizeof(u32) + sizeof(dma_addr_t))); + sgflags = le32_to_cpu(*ptmp); + sgflags |= MPT_SGE_FLAGS_LAST_ELEMENT; + *ptmp = cpu_to_le32(sgflags); + } + + if (chainSge) { + /* The current buffer is a chain buffer. + * chainSge points to the previous Chain Element. + * Update its chain element Offset and Length (must + * include chain element size) fields. + * Old chain element is now complete. + */ + u8 nextChain = (u8) (sgeOffset >> 2); + sgeOffset += (sizeof(u32) + sizeof(dma_addr_t)); + mptscsih_add_chain((char *)chainSge, nextChain, sgeOffset, hd->ChainBufferDMA + chain_dma_off); + } else { + /* The original MF buffer requires a chain buffer - + * set the offset. + * Last element in this MF is a chain element. + */ + pReq->ChainOffset = (u8) (sgeOffset >> 2); + } + + sges_left -= sg_done; + + + /* NOTE: psge points to the beginning of the chain element + * in current buffer. Get a chain buffer. + */ + if ((mptscsih_getFreeChainBuffer(hd, &newIndex)) == FAILED) + return FAILED; + + /* Update the tracking arrays. + * If chainSge == NULL, update ReqToChain, else ChainToChain + */ + if (chainSge) { + hd->ChainToChain[chain_idx] = newIndex; + } else { + hd->ReqToChain[req_idx] = newIndex; + } + chain_idx = newIndex; + chain_dma_off = hd->ioc->req_sz * chain_idx; + + /* Populate the chainSGE for the current buffer. + * - Set chain buffer pointer to psge and fill + * out the Address and Flags fields. + */ + chainSge = (char *) psge; + dsgprintk((KERN_INFO " Current buff @ %p (index 0x%x)", + psge, req_idx)); + + /* Start the SGE for the next buffer + */ + psge = (char *) (hd->ChainBuffer + chain_dma_off); + sgeOffset = 0; + sg_done = 0; + + dsgprintk((KERN_INFO " Chain buff @ %p (index 0x%x)\n", + psge, chain_idx)); + + /* Start the SGE for the next buffer + */ + + goto nextSGEset; + } + + return SUCCESS; +} /* mptscsih_AddSGE() */ + +/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ +/* + * mptscsih_io_done - Main SCSI IO callback routine registered to + * Fusion MPT (base) driver + * @ioc: Pointer to MPT_ADAPTER structure + * @mf: Pointer to original MPT request frame + * @r: Pointer to MPT reply frame (NULL if TurboReply) + * + * This routine is called from mpt.c::mpt_interrupt() at the completion + * of any SCSI IO request. + * This routine is registered with the Fusion MPT (base) driver at driver + * load/init time via the mpt_register() API call. + * + * Returns 1 indicating alloc'd request frame ptr should be freed. + */ +static int +mptscsih_io_done(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf, MPT_FRAME_HDR *mr) +{ + Scsi_Cmnd *sc; + MPT_SCSI_HOST *hd; + SCSIIORequest_t *pScsiReq; + SCSIIOReply_t *pScsiReply; +#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,0) + unsigned long flags; +#endif + u16 req_idx; + + hd = (MPT_SCSI_HOST *) ioc->sh->hostdata; + + if ((mf == NULL) || + (mf >= MPT_INDEX_2_MFPTR(ioc, ioc->req_depth))) { + printk(MYIOC_s_ERR_FMT "%s req frame ptr! (=%p)!\n", + ioc->name, mf?"BAD":"NULL", (void *) mf); + return 0; + } + + req_idx = le16_to_cpu(mf->u.frame.hwhdr.msgctxu.fld.req_idx); + sc = hd->ScsiLookup[req_idx]; + if (sc == NULL) { + MPIHeader_t *hdr = (MPIHeader_t *)mf; + + atomic_dec(&queue_depth); + + /* writeSDP1 will use the ScsiDoneCtx + * There is no processing for the reply. + * Just return to the calling function. + */ + if (hdr->Function == MPI_FUNCTION_SCSI_IO_REQUEST) + printk(MYIOC_s_ERR_FMT "NULL ScsiCmd ptr!\n", ioc->name); + + mptscsih_freeChainBuffers(hd, req_idx); + return 1; + } + + dmfprintk((MYIOC_s_INFO_FMT "ScsiDone (mf=%p,mr=%p,sc=%p,idx=%d)\n", + ioc->name, mf, mr, sc, req_idx)); + + atomic_dec(&queue_depth); + + sc->result = DID_OK << 16; /* Set default reply as OK */ + pScsiReq = (SCSIIORequest_t *) mf; + pScsiReply = (SCSIIOReply_t *) mr; + + if (pScsiReply == NULL) { + /* special context reply handling */ + + /* If regular Inquiry cmd - save inquiry data + */ + if (pScsiReq->CDB[0] == INQUIRY && !(pScsiReq->CDB[1] & 0x3)) { + int dlen; + + dlen = le32_to_cpu(pScsiReq->DataLength); + if (dlen >= SCSI_STD_INQUIRY_BYTES) { + mptscsih_initTarget(hd, + hd->port, + sc->target, + pScsiReq->LUN[1], + sc->buffer, + dlen); + } + } +#ifdef MPT_SAVE_AUTOSENSE + clear_sense_flag(hd, pScsiReq); +#endif + } else { + u32 xfer_cnt; + u16 status; + u8 scsi_state; + + status = le16_to_cpu(pScsiReply->IOCStatus) & MPI_IOCSTATUS_MASK; + scsi_state = pScsiReply->SCSIState; + + dprintk((KERN_NOTICE " Uh-Oh! (%d:%d:%d) mf=%p, mr=%p, sc=%p\n", + ioc->id, pScsiReq->TargetID, pScsiReq->LUN[1], + mf, mr, sc)); + dprintk((KERN_NOTICE " IOCStatus=%04xh, SCSIState=%02xh" + ", SCSIStatus=%02xh, IOCLogInfo=%08xh\n", + status, scsi_state, pScsiReply->SCSIStatus, + le32_to_cpu(pScsiReply->IOCLogInfo))); + + if (scsi_state & MPI_SCSI_STATE_AUTOSENSE_VALID) + copy_sense_data(sc, hd, mf, pScsiReply); + + /* + * Look for + dump FCP ResponseInfo[]! + */ + if (scsi_state & MPI_SCSI_STATE_RESPONSE_INFO_VALID) { + dprintk((KERN_NOTICE " FCP_ResponseInfo=%08xh\n", + le32_to_cpu(pScsiReply->ResponseInfo))); + } + + switch(status) { + case MPI_IOCSTATUS_BUSY: /* 0x0002 */ + /* CHECKME! + * Maybe: DRIVER_BUSY | SUGGEST_RETRY | DID_SOFT_ERROR (retry) + * But not: DID_BUS_BUSY lest one risk + * killing interrupt handler:-( + */ + sc->result = STS_BUSY; + break; + + case MPI_IOCSTATUS_SCSI_INVALID_BUS: /* 0x0041 */ + case MPI_IOCSTATUS_SCSI_INVALID_TARGETID: /* 0x0042 */ + sc->result = DID_BAD_TARGET << 16; + break; + + case MPI_IOCSTATUS_SCSI_DEVICE_NOT_THERE: /* 0x0043 */ + /* Spoof to SCSI Selection Timeout! */ + sc->result = DID_NO_CONNECT << 16; + + if (hd->sel_timeout[pScsiReq->TargetID] < 0xFFFF) + hd->sel_timeout[pScsiReq->TargetID]++; + break; + + case MPI_IOCSTATUS_SCSI_TASK_TERMINATED: /* 0x0048 */ +#ifndef MPT_SCSI_USE_NEW_EH + search_taskQ_for_cmd(sc, hd); +#endif + /* Linux handles an unsolicited DID_RESET better + * than an unsolicited DID_ABORT. + */ + sc->result = DID_RESET << 16; + + /* GEM Workaround. */ + if (hd->is_spi) mptscsih_no_negotiate(hd, sc->target); break; @@ -423,7 +855,7 @@ #endif sc->result = DID_RESET << 16; - /* GEM Workaround. */ + /* GEM Workaround. */ if (hd->is_spi) mptscsih_no_negotiate(hd, sc->target); break; @@ -501,7 +933,7 @@ ; } else if (scsi_state & MPI_SCSI_STATE_AUTOSENSE_VALID) { /* - * If running agains circa 200003dd 909 MPT f/w, + * If running against circa 200003dd 909 MPT f/w, * may get this (AUTOSENSE_VALID) for actual TASK_SET_FULL * (QUEUE_FULL) returned from device! --> get 0x0000?128 * and with SenseBytes set to 0. @@ -620,7 +1052,9 @@ hd->ScsiLookup[req_idx] = NULL; - sc->host_scribble = NULL; /* CHECKME! - Do we need to clear this??? */ +#ifndef MPT_SCSI_USE_NEW_EH + sc->host_scribble = NULL; +#endif MPT_HOST_LOCK(flags); sc->scsi_done(sc); /* Issue the command callback */ @@ -889,7 +1323,7 @@ int ii; int max = hd->ioc->req_depth; -#ifndef MPT_SCSI_USE_NEW_EH +#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,0) unsigned long flags; #endif @@ -906,7 +1340,7 @@ search_taskQ_for_cmd(SCpnt, hd); #endif - /* Search pendingQ, if found, + /* Search pendingQ, if found, * delete from Q. If found, do not decrement * queue_depth, command never posted. */ @@ -1056,7 +1490,7 @@ * of chain buffers to be allocated. * index = chain_idx * - * Calculate the number of chain buffers needed(plus 1) per I/O + * Calculate the number of chain buffers needed(plus 1) per I/O * then multiply the the maximum number of simultaneous cmds * * num_sge = num sge in request frame + last chain buffer @@ -1170,6 +1604,7 @@ /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ static int BeenHereDoneThat = 0; +static char *info_kbuf = NULL; /* SCSI host fops start here... */ /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ @@ -1258,9 +1693,10 @@ #if LINUX_VERSION_CODE < KERNEL_VERSION(2,3,0) tpnt->proc_dir = &proc_mpt_scsihost; #endif + tpnt->proc_info = mptscsih_proc_info; sh = scsi_register(tpnt, sizeof(MPT_SCSI_HOST)); if (sh != NULL) { - mptscsih_lock(this, flags); + spin_lock_irqsave(&this->FreeQlock, flags); sh->io_port = 0; sh->n_io_port = 0; sh->irq = 0; @@ -1295,10 +1731,12 @@ #endif sh->this_id = this->pfacts[portnum].PortSCSIID; +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,44) /* OS entry to allow host drivers to force * a queue depth on a per device basis. */ sh->select_queue_depths = mptscsih_select_queue_depths; +#endif /* Required entry. */ sh->unique_id = this->id; @@ -1319,7 +1757,7 @@ } else { numSGE = 1 + (scale - 1) * (this->facts.MaxChainDepth-1) + scale + (this->req_sz - 64) / (sizeof(dma_addr_t) + sizeof(u32)); - } + } if (numSGE < sh->sg_tablesize) { /* Reset this value */ @@ -1333,7 +1771,7 @@ */ scsi_set_pci_device(sh, this->pcidev); - mptscsih_unlock(this, flags); + spin_unlock_irqrestore(&this->FreeQlock, flags); hd = (MPT_SCSI_HOST *) sh->hostdata; hd->ioc = this; @@ -1496,12 +1934,25 @@ done: if (mpt_scsi_hosts > 0) register_reboot_notifier(&mptscsih_notifier); + else { + mpt_reset_deregister(ScsiDoneCtx); + dprintk((KERN_INFO MYNAM ": Deregistered for IOC reset notifications\n")); + + mpt_event_deregister(ScsiDoneCtx); + dprintk((KERN_INFO MYNAM ": Deregistered for IOC event notifications\n")); + + mpt_deregister(ScsiScanDvCtx); + mpt_deregister(ScsiTaskCtx); + mpt_deregister(ScsiDoneCtx); + + if (info_kbuf != NULL) + kfree(info_kbuf); + } return mpt_scsi_hosts; } /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ - static char *info_kbuf = NULL; /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ /** * mptscsih_release - Unregister SCSI host from linux scsi mid-layer @@ -1662,763 +2113,589 @@ dprintk((KERN_INFO MYNAM ": Deregistered for IOC event notifications\n")); mpt_deregister(ScsiScanDvCtx); - mpt_deregister(ScsiTaskCtx); - mpt_deregister(ScsiDoneCtx); - - if (info_kbuf != NULL) - kfree(info_kbuf); - } - } - - return 0; -} - -/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ -/** - * mptscsih_halt - Process the reboot notification - * @nb: Pointer to a struct notifier_block (ignored) - * @event: event (SYS_HALT, SYS_RESTART, SYS_POWER_OFF) - * @buf: Pointer to a data buffer (ignored) - * - * This routine called if a system shutdown or reboot is to occur. - * - * Return NOTIFY_DONE if this is something other than a reboot message. - * NOTIFY_OK if this is a reboot message. - */ -static int -mptscsih_halt(struct notifier_block *nb, ulong event, void *buf) -{ - MPT_ADAPTER *ioc = NULL; - MPT_SCSI_HOST *hd = NULL; - - /* Ignore all messages other than reboot message - */ - if ((event != SYS_RESTART) && (event != SYS_HALT) - && (event != SYS_POWER_OFF)) - return (NOTIFY_DONE); - - for (ioc = mpt_adapter_find_first(); ioc != NULL; ioc = mpt_adapter_find_next(ioc)) { - /* Flush the cache of this adapter - */ - if (ioc->sh) { - hd = (MPT_SCSI_HOST *) ioc->sh->hostdata; - if (hd) { - mptscsih_synchronize_cache(hd, 0); - } - } - } - - unregister_reboot_notifier(&mptscsih_notifier); - return NOTIFY_OK; -} - -/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ -/** - * mptscsih_info - Return information about MPT adapter - * @SChost: Pointer to Scsi_Host structure - * - * (linux Scsi_Host_Template.info routine) - * - * Returns pointer to buffer where information was written. - */ -const char * -mptscsih_info(struct Scsi_Host *SChost) -{ - MPT_SCSI_HOST *h; - int size = 0; - - if (info_kbuf == NULL) - if ((info_kbuf = kmalloc(0x1000 /* 4Kb */, GFP_KERNEL)) == NULL) - return info_kbuf; - - h = (MPT_SCSI_HOST *)SChost->hostdata; - info_kbuf[0] = '\0'; - mpt_print_ioc_summary(h->ioc, info_kbuf, &size, 0, 0); - info_kbuf[size-1] = '\0'; - - return info_kbuf; -} - -/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ - static int max_qd = 1; -#if 0 -static int index_log[128]; -static int index_ent = 0; -static __inline__ void ADD_INDEX_LOG(int req_ent) -{ - int i = index_ent++; - - index_log[i & (128 - 1)] = req_ent; -} -#else -#define ADD_INDEX_LOG(req_ent) do { } while(0) -#endif - -#ifdef DROP_TEST -#define DROP_IOC 1 /* IOC to force failures */ -#define DROP_TARGET 3 /* Target ID to force failures */ -#define DROP_THIS_CMD 10000 /* iteration to drop command */ -static int dropCounter = 0; -static int dropTestOK = 0; /* num did good */ -static int dropTestBad = 0; /* num did bad */ -static int dropTestNum = 0; /* total = good + bad + incomplete */ -static int numTotCmds = 0; -static MPT_FRAME_HDR *dropMfPtr = NULL; -static int numTMrequested = 0; -#endif - -/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ -/* - * mptscsih_put_msgframe - Wrapper routine to post message frame to F/W. - * @context: Call back context (ScsiDoneCtx, ScsiScanDvCtx) - * @id: IOC id number - * @mf: Pointer to message frame - * - * Handles the call to mptbase for posting request and queue depth - * tracking. - * - * Returns none. - */ -static void -mptscsih_put_msgframe(int context, int id, MPT_FRAME_HDR *mf) -{ - /* Main banana... */ - atomic_inc(&queue_depth); - if (atomic_read(&queue_depth) > max_qd) { - max_qd = atomic_read(&queue_depth); - dprintk((KERN_INFO MYNAM ": Queue depth now %d.\n", max_qd)); - } - - mpt_put_msg_frame(context, id, mf); - - return; -} - -/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ -/** - * mptscsih_qcmd - Primary Fusion MPT SCSI initiator IO start routine. - * @SCpnt: Pointer to Scsi_Cmnd structure - * @done: Pointer SCSI mid-layer IO completion function - * - * (linux Scsi_Host_Template.queuecommand routine) - * This is the primary SCSI IO start routine. Create a MPI SCSIIORequest - * from a linux Scsi_Cmnd request and send it to the IOC. - * - * Returns 0. (rtn value discarded by linux scsi mid-layer) - */ -int -mptscsih_qcmd(Scsi_Cmnd *SCpnt, void (*done)(Scsi_Cmnd *)) -{ - MPT_SCSI_HOST *hd; - MPT_FRAME_HDR *mf; - SCSIIORequest_t *pScsiReq; - VirtDevice *pTarget; - MPT_DONE_Q *buffer = NULL; - unsigned long flags; - int target; - int lun; - int datadir; - u32 datalen; - u32 scsictl; - u32 scsidir; - u32 qtag; - u32 cmd_len; - int my_idx; - int ii; - int rc; - int did_errcode; - int issueCmd; - - did_errcode = 0; - hd = (MPT_SCSI_HOST *) SCpnt->host->hostdata; - target = SCpnt->target; - lun = SCpnt->lun; - SCpnt->scsi_done = done; - - pTarget = hd->Targets[target]; - - dmfprintk((MYIOC_s_INFO_FMT "qcmd: SCpnt=%p, done()=%p\n", - (hd && hd->ioc) ? hd->ioc->name : "ioc?", SCpnt, done)); - -#ifdef MPT_SAVE_AUTOSENSE - /* 20000617 -sralston - * GRRRRR... Shouldn't have to do this but... - * Do explicit check for REQUEST_SENSE and cached SenseData. - * If yes, return cached SenseData. - */ - if (SCpnt->cmnd[0] == REQUEST_SENSE) { - u8 *dest = NULL; - int sz; - - if (pTarget && (pTarget->tflags & MPT_TARGET_FLAGS_VALID_SENSE)) { - pTarget->tflags &= ~MPT_TARGET_FLAGS_VALID_SENSE; //sjr-moved-here - if (!SCpnt->use_sg) { - dest = SCpnt->request_buffer; - } else { - struct scatterlist *sg = (struct scatterlist *) SCpnt->request_buffer; - if (sg) - dest = (u8 *)(ulong)sg_dma_address(sg); - } - - if (dest) { - sz = MIN (SCSI_STD_SENSE_BYTES, SCpnt->request_bufflen); - memcpy(dest, pTarget->sense, sz); - -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,3,0) - SCpnt->resid = SCpnt->request_bufflen - sz; -#endif - SCpnt->result = 0; - SCpnt->scsi_done(SCpnt); - - //sjr-moved-up//pTarget->tflags &= ~MPT_TARGET_FLAGS_VALID_SENSE; - - return 0; - } - } - } -#endif - - if (hd->resetPending) { - /* Prevent new commands from being issued - * while reloading the FW. - */ - did_errcode = 1; - goto did_error; - } - - /* - * Put together a MPT SCSI request... - */ - if ((mf = mpt_get_msg_frame(ScsiDoneCtx, hd->ioc->id)) == NULL) { - dprintk((MYIOC_s_WARN_FMT "QueueCmd, no msg frames!!\n", - hd->ioc->name)); - did_errcode = 2; - goto did_error; - } - - pScsiReq = (SCSIIORequest_t *) mf; - - my_idx = le16_to_cpu(mf->u.frame.hwhdr.msgctxu.fld.req_idx); - - ADD_INDEX_LOG(my_idx); - - /* - * The scsi layer should be handling this stuff - * (In 2.3.x it does -DaveM) - */ - - /* BUG FIX! 19991030 -sralston - * TUR's being issued with scsictl=0x02000000 (DATA_IN)! - * Seems we may receive a buffer (datalen>0) even when there - * will be no data transfer! GRRRRR... - */ - datadir = mptscsih_io_direction(SCpnt); - if (datadir == SCSI_DATA_READ) { - datalen = SCpnt->request_bufflen; - scsidir = MPI_SCSIIO_CONTROL_READ; /* DATA IN (host<--ioc<--dev) */ - } else if (datadir == SCSI_DATA_WRITE) { - datalen = SCpnt->request_bufflen; - scsidir = MPI_SCSIIO_CONTROL_WRITE; /* DATA OUT (host-->ioc-->dev) */ - } else { - datalen = 0; - scsidir = MPI_SCSIIO_CONTROL_NODATATRANSFER; - } + mpt_deregister(ScsiTaskCtx); + mpt_deregister(ScsiDoneCtx); - /* Default to untagged. Once a target structure has been allocated, - * use the Inquiry data to determine if device supports tagged. - */ - qtag = MPI_SCSIIO_CONTROL_UNTAGGED; - if (pTarget && (pTarget->tflags & MPT_TARGET_FLAGS_Q_YES) - && (SCpnt->device->tagged_supported)) { - /* - * Some drives are too stupid to handle fairness issues - * with tagged queueing. We throw in the odd ordered - * tag to stop them starving themselves. - */ - if ((jiffies - hd->qtag_tick) > (5*HZ)) { - qtag = MPI_SCSIIO_CONTROL_ORDEREDQ; - hd->qtag_tick = jiffies; + if (info_kbuf != NULL) + kfree(info_kbuf); } - else - qtag = MPI_SCSIIO_CONTROL_SIMPLEQ; } - scsictl = scsidir | qtag; - /* Use the above information to set up the message frame - */ - pScsiReq->TargetID = target; - pScsiReq->Bus = hd->port; - pScsiReq->ChainOffset = 0; - pScsiReq->Function = MPI_FUNCTION_SCSI_IO_REQUEST; - pScsiReq->CDBLength = SCpnt->cmd_len; - pScsiReq->SenseBufferLength = MPT_SENSE_BUFFER_SIZE; - pScsiReq->Reserved = 0; - pScsiReq->MsgFlags = mpt_msg_flags(); - pScsiReq->LUN[0] = 0; - pScsiReq->LUN[1] = lun; - pScsiReq->LUN[2] = 0; - pScsiReq->LUN[3] = 0; - pScsiReq->LUN[4] = 0; - pScsiReq->LUN[5] = 0; - pScsiReq->LUN[6] = 0; - pScsiReq->LUN[7] = 0; - pScsiReq->Control = cpu_to_le32(scsictl); + return 0; +} - /* - * Write SCSI CDB into the message +/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ +/** + * mptscsih_halt - Process the reboot notification + * @nb: Pointer to a struct notifier_block (ignored) + * @event: event (SYS_HALT, SYS_RESTART, SYS_POWER_OFF) + * @buf: Pointer to a data buffer (ignored) + * + * This routine called if a system shutdown or reboot is to occur. + * + * Return NOTIFY_DONE if this is something other than a reboot message. + * NOTIFY_OK if this is a reboot message. + */ +static int +mptscsih_halt(struct notifier_block *nb, ulong event, void *buf) +{ + MPT_ADAPTER *ioc = NULL; + MPT_SCSI_HOST *hd = NULL; + + /* Ignore all messages other than reboot message */ - cmd_len = SCpnt->cmd_len; - for (ii=0; ii < cmd_len; ii++) - pScsiReq->CDB[ii] = SCpnt->cmnd[ii]; - for (ii=cmd_len; ii < 16; ii++) - pScsiReq->CDB[ii] = 0; + if ((event != SYS_RESTART) && (event != SYS_HALT) + && (event != SYS_POWER_OFF)) + return (NOTIFY_DONE); - /* DataLength */ - pScsiReq->DataLength = cpu_to_le32(datalen); + for (ioc = mpt_adapter_find_first(); ioc != NULL; ioc = mpt_adapter_find_next(ioc)) { + /* Flush the cache of this adapter + */ + if (ioc->sh) { + hd = (MPT_SCSI_HOST *) ioc->sh->hostdata; + if (hd) { + mptscsih_synchronize_cache(hd, 0); + } + } + } - /* SenseBuffer low address */ - pScsiReq->SenseBufferLowAddr = cpu_to_le32(hd->ioc->sense_buf_low_dma - + (my_idx * MPT_SENSE_BUFFER_ALLOC)); + unregister_reboot_notifier(&mptscsih_notifier); + return NOTIFY_OK; +} - /* Now add the SG list - * Always have a SGE even if null length. - */ - rc = SUCCESS; - if (datalen == 0) { - /* Add a NULL SGE */ - mpt_add_sge((char *)&pScsiReq->SGL, MPT_SGE_FLAGS_SSIMPLE_READ | 0, - (dma_addr_t) -1); - } else { - /* Add a 32 or 64 bit SGE */ - rc = mptscsih_AddSGE(hd, SCpnt, pScsiReq, my_idx); +/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ +/** + * mptscsih_info - Return information about MPT adapter + * @SChost: Pointer to Scsi_Host structure + * + * (linux Scsi_Host_Template.info routine) + * + * Returns pointer to buffer where information was written. + */ +const char * +mptscsih_info(struct Scsi_Host *SChost) +{ + MPT_SCSI_HOST *h = NULL; + int size = 0; + + if (info_kbuf == NULL) + if ((info_kbuf = kmalloc(0x1000 /* 4Kb */, GFP_KERNEL)) == NULL) + return info_kbuf; + + h = (MPT_SCSI_HOST *)SChost->hostdata; + info_kbuf[0] = '\0'; + if (h) { + mpt_print_ioc_summary(h->ioc, info_kbuf, &size, 0, 0); + info_kbuf[size-1] = '\0'; } + return info_kbuf; +} - if (rc == SUCCESS) { - hd->ScsiLookup[my_idx] = SCpnt; - SCpnt->host_scribble = NULL; +struct info_str { + char *buffer; + int length; + int offset; + int pos; +}; -#ifdef DROP_TEST - numTotCmds++; - /* If the IOC number and target match, increment - * counter. If counter matches DROP_THIS, do not - * issue command to FW to force a reset. - * Save the MF pointer so we can free resources - * when task mgmt completes. - */ - if ((hd->ioc->id == DROP_IOC) && (target == DROP_TARGET)) { - dropCounter++; +static void copy_mem_info(struct info_str *info, char *data, int len) +{ + if (info->pos + len > info->length) + len = info->length - info->pos; - if (dropCounter == DROP_THIS_CMD) { - dropCounter = 0; + if (info->pos + len < info->offset) { + info->pos += len; + return; + } - /* If global is set, then we are already - * doing something - so keep issuing commands. - */ - if (dropMfPtr == NULL) { - dropTestNum++; - dropMfPtr = mf; - atomic_inc(&queue_depth); - printk(MYIOC_s_INFO_FMT - "Dropped SCSI cmd (%p)\n", - hd->ioc->name, SCpnt); - printk("mf (%p) req (%4x) tot cmds (%d)\n", - mf, my_idx, numTotCmds); + if (info->pos < info->offset) { + data += (info->offset - info->pos); + len -= (info->offset - info->pos); + } - return 0; - } - } - } -#endif + if (len > 0) { + memcpy(info->buffer + info->pos, data, len); + info->pos += len; + } +} - /* SCSI specific processing */ - issueCmd = 1; - if (hd->is_spi) { - int dvStatus = hd->ioc->spi_data.dvStatus[target]; +static int copy_info(struct info_str *info, char *fmt, ...) +{ + va_list args; + char buf[81]; + int len; - if (dvStatus || hd->ioc->spi_data.forceDv) { + va_start(args, fmt); + len = vsprintf(buf, fmt, args); + va_end(args); - /* Write SDP1 on this I/O to this target */ - if (dvStatus & MPT_SCSICFG_NEGOTIATE) { - mptscsih_writeSDP1(hd, 0, target, hd->negoNvram); - dvStatus &= ~MPT_SCSICFG_NEGOTIATE; - hd->ioc->spi_data.dvStatus[target] = dvStatus; - } else if (dvStatus & MPT_SCSICFG_BLK_NEGO) { - mptscsih_writeSDP1(hd, 0, target, MPT_SCSICFG_BLK_NEGO); - dvStatus &= ~MPT_SCSICFG_BLK_NEGO; - hd->ioc->spi_data.dvStatus[target] = dvStatus; - } + copy_mem_info(info, buf, len); + return len; +} -#ifndef MPTSCSIH_DISABLE_DOMAIN_VALIDATION - if ((dvStatus & MPT_SCSICFG_NEED_DV) || hd->ioc->spi_data.forceDv) { - unsigned long lflags; - /* Schedule DV if necessary */ - spin_lock_irqsave(&dvtaskQ_lock, lflags); - if (!dvtaskQ_active) { - dvtaskQ_active = 1; - spin_unlock_irqrestore(&dvtaskQ_lock, lflags); - MPT_INIT_WORK(&mptscsih_dvTask, mptscsih_domainValidation, (void *) hd); +static int mptscsih_host_info(MPT_ADAPTER *ioc, char *pbuf, off_t offset, int len) +{ + struct info_str info; - SCHEDULE_TASK(&mptscsih_dvTask); - } else { - spin_unlock_irqrestore(&dvtaskQ_lock, lflags); - } - hd->ioc->spi_data.forceDv = 0; - } + info.buffer = pbuf; + info.length = len; + info.offset = offset; + info.pos = 0; - /* Trying to do DV to this target, extend timeout. - * Wait to issue intil flag is clear - */ - if (dvStatus & MPT_SCSICFG_DV_PENDING) { - mod_timer(&SCpnt->eh_timeout, jiffies + 40 * HZ); - issueCmd = 0; - } + copy_info(&info, "%s: %s, ", ioc->name, ioc->prod_name); + copy_info(&info, "%s%08xh, ", MPT_FW_REV_MAGIC_ID_STRING, ioc->facts.FWVersion.Word); + copy_info(&info, "Ports=%d, ", ioc->facts.NumberOfPorts); + copy_info(&info, "MaxQ=%d\n", ioc->req_depth); - /* Set the DV flags. - */ - if (dvStatus & MPT_SCSICFG_DV_NOT_DONE) - mptscsih_set_dvflags(hd, pScsiReq); -#endif - } - } + return ((info.pos > info.offset) ? info.pos - info.offset : 0); +} - if (issueCmd) { - mptscsih_put_msgframe(ScsiDoneCtx, hd->ioc->id, mf); - dmfprintk((MYIOC_s_INFO_FMT "Issued SCSI cmd (%p) mf=%p idx=%d\n", - hd->ioc->name, SCpnt, mf, my_idx)); - } else { - ddvtprintk((MYIOC_s_INFO_FMT "Pending cmd=%p idx %d\n", - hd->ioc->name, SCpnt, my_idx)); - /* Place this command on the pendingQ if possible */ - spin_lock_irqsave(&hd->freedoneQlock, flags); - if (!Q_IS_EMPTY(&hd->freeQ)) { - buffer = hd->freeQ.head; - Q_DEL_ITEM(buffer); +static int mptscsih_user_command(MPT_ADAPTER *ioc, char *pbuf, int len) +{ + /* Not yet implemented */ + return len; +} - /* Save the mf pointer - */ - buffer->argp = (void *)mf; +/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ +/** + * mptscsih_proc_info - Return information about MPT adapter + * + * (linux Scsi_Host_Template.info routine) + * + * buffer: if write, user data; if read, buffer for user + * length: if write, return length; + * offset: if write, 0; if read, the current offset into the buffer from + * the previous read. + * hostno: scsi host number + * func: if write = 1; if read = 0 + */ +int mptscsih_proc_info(char *buffer, char **start, off_t offset, + int length, int hostno, int func) +{ + MPT_ADAPTER *ioc = NULL; + MPT_SCSI_HOST *hd = NULL; + int size = 0; - /* Add to the pendingQ - */ - Q_ADD_TAIL(&hd->pendingQ.head, buffer, MPT_DONE_Q); - spin_unlock_irqrestore(&hd->freedoneQlock, flags); - } else { - spin_unlock_irqrestore(&hd->freedoneQlock, flags); - SCpnt->result = (DID_BUS_BUSY << 16); - SCpnt->scsi_done(SCpnt); - } + dprintk(("Called mptscsih_proc_info: hostno=%d, func=%d\n", hostno, func)); + dprintk(("buffer %p, start=%p (%p) offset=%ld length = %d\n", + buffer, start, *start, offset, length)); + + for (ioc = mpt_adapter_find_first(); ioc != NULL; ioc = mpt_adapter_find_next(ioc)) { + if ((ioc->sh) && (ioc->sh->host_no == hostno)) { + hd = (MPT_SCSI_HOST *)ioc->sh->hostdata; + break; } + } + if ((ioc == NULL) || (ioc->sh == NULL) || (hd == NULL)) + return 0; + + if (func) { + size = mptscsih_user_command(ioc, buffer, length); } else { - mptscsih_freeChainBuffers(hd, my_idx); - mpt_free_msg_frame(ScsiDoneCtx, hd->ioc->id, mf); - did_errcode = 3; - goto did_error; + if (start) + *start = buffer; + + size = mptscsih_host_info(ioc, buffer, offset, length); } - return 0; + return size; +} -did_error: - dprintk((MYIOC_s_WARN_FMT "_qcmd did_errcode=%d (sc=%p)\n", - hd->ioc->name, did_errcode, SCpnt)); - /* Just wish OS to issue a retry */ - SCpnt->result = (DID_BUS_BUSY << 16); - spin_lock_irqsave(&hd->freedoneQlock, flags); - if (!Q_IS_EMPTY(&hd->freeQ)) { - buffer = hd->freeQ.head; - Q_DEL_ITEM(buffer); - /* Set the Scsi_Cmnd pointer - */ - buffer->argp = (void *)SCpnt; +/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ + static int max_qd = 1; +#if 0 +static int index_log[128]; +static int index_ent = 0; +static __inline__ void ADD_INDEX_LOG(int req_ent) +{ + int i = index_ent++; + + index_log[i & (128 - 1)] = req_ent; +} +#else +#define ADD_INDEX_LOG(req_ent) do { } while(0) +#endif - /* Add to the doneQ - */ - Q_ADD_TAIL(&hd->doneQ.head, buffer, MPT_DONE_Q); - spin_unlock_irqrestore(&hd->freedoneQlock, flags); - } else { - spin_unlock_irqrestore(&hd->freedoneQlock, flags); - SCpnt->scsi_done(SCpnt); +#ifdef DROP_TEST +#define DROP_IOC 1 /* IOC to force failures */ +#define DROP_TARGET 3 /* Target ID to force failures */ +#define DROP_THIS_CMD 10000 /* iteration to drop command */ +static int dropCounter = 0; +static int dropTestOK = 0; /* num did good */ +static int dropTestBad = 0; /* num did bad */ +static int dropTestNum = 0; /* total = good + bad + incomplete */ +static int numTotCmds = 0; +static MPT_FRAME_HDR *dropMfPtr = NULL; +static int numTMrequested = 0; +#endif + +/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ +/* + * mptscsih_put_msgframe - Wrapper routine to post message frame to F/W. + * @context: Call back context (ScsiDoneCtx, ScsiScanDvCtx) + * @id: IOC id number + * @mf: Pointer to message frame + * + * Handles the call to mptbase for posting request and queue depth + * tracking. + * + * Returns none. + */ +static inline void +mptscsih_put_msgframe(int context, int id, MPT_FRAME_HDR *mf) +{ + /* Main banana... */ + atomic_inc(&queue_depth); + if (atomic_read(&queue_depth) > max_qd) { + max_qd = atomic_read(&queue_depth); + dprintk((KERN_INFO MYNAM ": Queue depth now %d.\n", max_qd)); } - return 0; + mpt_put_msg_frame(context, id, mf); + + return; } /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ -/* - * mptscsih_AddSGE - Add a SGE (plus chain buffers) to the - * SCSIIORequest_t Message Frame. - * @hd: Pointer to MPT_SCSI_HOST structure +/** + * mptscsih_qcmd - Primary Fusion MPT SCSI initiator IO start routine. * @SCpnt: Pointer to Scsi_Cmnd structure - * @pReq: Pointer to SCSIIORequest_t structure + * @done: Pointer SCSI mid-layer IO completion function * - * Returns ... + * (linux Scsi_Host_Template.queuecommand routine) + * This is the primary SCSI IO start routine. Create a MPI SCSIIORequest + * from a linux Scsi_Cmnd request and send it to the IOC. + * + * Returns 0. (rtn value discarded by linux scsi mid-layer) */ -static int -mptscsih_AddSGE(MPT_SCSI_HOST *hd, Scsi_Cmnd *SCpnt, - SCSIIORequest_t *pReq, int req_idx) +int +mptscsih_qcmd(Scsi_Cmnd *SCpnt, void (*done)(Scsi_Cmnd *)) { - char *psge; - char *chainSge; - struct scatterlist *sg; - int frm_sz; - int sges_left, sg_done; - int chain_idx = MPT_HOST_NO_CHAIN; - int sgeOffset; - int numSgeSlots, numSgeThisFrame; - u32 sgflags, sgdir, thisxfer = 0; - int chain_dma_off = 0; - int newIndex; + MPT_SCSI_HOST *hd; + MPT_FRAME_HDR *mf; + SCSIIORequest_t *pScsiReq; + VirtDevice *pTarget; + MPT_DONE_Q *buffer = NULL; + unsigned long flags; + int target; + int lun; + int datadir; + u32 datalen; + u32 scsictl; + u32 scsidir; + u32 cmd_len; + int my_idx; int ii; - dma_addr_t v2; + int rc; + int did_errcode; + int issueCmd; - sgdir = le32_to_cpu(pReq->Control) & MPI_SCSIIO_CONTROL_DATADIRECTION_MASK; - if (sgdir == MPI_SCSIIO_CONTROL_WRITE) { - sgdir = MPT_TRANSFER_HOST_TO_IOC; - } else { - sgdir = MPT_TRANSFER_IOC_TO_HOST; - } + did_errcode = 0; + hd = (MPT_SCSI_HOST *) SCpnt->host->hostdata; + target = SCpnt->target; + lun = SCpnt->lun; + SCpnt->scsi_done = done; - psge = (char *) &pReq->SGL; - frm_sz = hd->ioc->req_sz; + pTarget = hd->Targets[target]; - /* Map the data portion, if any. - * sges_left = 0 if no data transfer. + dmfprintk((MYIOC_s_INFO_FMT "qcmd: SCpnt=%p, done()=%p\n", + (hd && hd->ioc) ? hd->ioc->name : "ioc?", SCpnt, done)); + +#ifdef MPT_SAVE_AUTOSENSE + /* 20000617 -sralston + * GRRRRR... Shouldn't have to do this but... + * Do explicit check for REQUEST_SENSE and cached SenseData. + * If yes, return cached SenseData. */ - sges_left = SCpnt->use_sg; - if (SCpnt->use_sg) { - sges_left = pci_map_sg(hd->ioc->pcidev, - (struct scatterlist *) SCpnt->request_buffer, - SCpnt->use_sg, - scsi_to_pci_dma_dir(SCpnt->sc_data_direction)); - } else if (SCpnt->request_bufflen) { - dma_addr_t buf_dma_addr; - scPrivate *my_priv; + if (SCpnt->cmnd[0] == REQUEST_SENSE) { + u8 *dest = NULL; + int sz; - buf_dma_addr = pci_map_single(hd->ioc->pcidev, - SCpnt->request_buffer, - SCpnt->request_bufflen, - scsi_to_pci_dma_dir(SCpnt->sc_data_direction)); + if (pTarget && (pTarget->tflags & MPT_TARGET_FLAGS_VALID_SENSE)) { + pTarget->tflags &= ~MPT_TARGET_FLAGS_VALID_SENSE; //sjr-moved-here + if (!SCpnt->use_sg) { + dest = SCpnt->request_buffer; + } else { + struct scatterlist *sg = (struct scatterlist *) SCpnt->request_buffer; + if (sg) + dest = (u8 *)(ulong)sg_dma_address(sg); + } - /* We hide it here for later unmap. */ - my_priv = (scPrivate *) &SCpnt->SCp; - my_priv->p1 = (void *)(ulong) buf_dma_addr; + if (dest) { + sz = MIN (SCSI_STD_SENSE_BYTES, SCpnt->request_bufflen); + memcpy(dest, pTarget->sense, sz); - dsgprintk((MYIOC_s_INFO_FMT "SG: non-SG for %p, len=%d\n", - hd->ioc->name, SCpnt, SCpnt->request_bufflen)); +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,3,0) + SCpnt->resid = SCpnt->request_bufflen - sz; +#endif + SCpnt->result = 0; + SCpnt->scsi_done(SCpnt); - mpt_add_sge((char *) &pReq->SGL, - 0xD1000000|MPT_SGE_FLAGS_ADDRESSING|sgdir|SCpnt->request_bufflen, - buf_dma_addr); + //sjr-moved-up//pTarget->tflags &= ~MPT_TARGET_FLAGS_VALID_SENSE; - return SUCCESS; + return 0; + } + } } +#endif - /* Handle the SG case. - */ - sg = (struct scatterlist *) SCpnt->request_buffer; - sg_done = 0; - sgeOffset = sizeof(SCSIIORequest_t) - sizeof(SGE_IO_UNION); - chainSge = NULL; + if (hd->resetPending) { + /* Prevent new commands from being issued + * while reloading the FW. + */ + did_errcode = 1; + goto did_error; + } - /* Prior to entering this loop - the following must be set - * current MF: sgeOffset (bytes) - * chainSge (Null if original MF is not a chain buffer) - * sg_done (num SGE done for this MF) + /* + * Put together a MPT SCSI request... */ + if ((mf = mpt_get_msg_frame(ScsiDoneCtx, hd->ioc->id)) == NULL) { + dprintk((MYIOC_s_WARN_FMT "QueueCmd, no msg frames!!\n", + hd->ioc->name)); + did_errcode = 2; + goto did_error; + } -nextSGEset: - numSgeSlots = ((frm_sz - sgeOffset) / (sizeof(u32) + sizeof(dma_addr_t)) ); - numSgeThisFrame = (sges_left < numSgeSlots) ? sges_left : numSgeSlots; + pScsiReq = (SCSIIORequest_t *) mf; - sgflags = MPT_SGE_FLAGS_SIMPLE_ELEMENT | MPT_SGE_FLAGS_ADDRESSING | sgdir; + my_idx = le16_to_cpu(mf->u.frame.hwhdr.msgctxu.fld.req_idx); - /* Get first (num - 1) SG elements - * Skip any SG entries with a length of 0 - * NOTE: at finish, sg and psge pointed to NEXT data/location positions + ADD_INDEX_LOG(my_idx); + + /* + * The scsi layer should be handling this stuff + * (In 2.3.x it does -DaveM) */ - for (ii=0; ii < (numSgeThisFrame-1); ii++) { - thisxfer = sg_dma_len(sg); - if (thisxfer == 0) { - sg ++; /* Get next SG element from the OS */ - sg_done++; - continue; - } - v2 = sg_dma_address(sg); - mpt_add_sge(psge, sgflags | thisxfer, v2); + /* BUG FIX! 19991030 -sralston + * TUR's being issued with scsictl=0x02000000 (DATA_IN)! + * Seems we may receive a buffer (datalen>0) even when there + * will be no data transfer! GRRRRR... + */ + datadir = mptscsih_io_direction(SCpnt); + if (datadir == SCSI_DATA_READ) { + datalen = SCpnt->request_bufflen; + scsidir = MPI_SCSIIO_CONTROL_READ; /* DATA IN (host<--ioc<--dev) */ + } else if (datadir == SCSI_DATA_WRITE) { + datalen = SCpnt->request_bufflen; + scsidir = MPI_SCSIIO_CONTROL_WRITE; /* DATA OUT (host-->ioc-->dev) */ + } else { + datalen = 0; + scsidir = MPI_SCSIIO_CONTROL_NODATATRANSFER; + } - sg++; /* Get next SG element from the OS */ - psge += (sizeof(u32) + sizeof(dma_addr_t)); - sgeOffset += (sizeof(u32) + sizeof(dma_addr_t)); - sg_done++; + /* Default to untagged. Once a target structure has been allocated, + * use the Inquiry data to determine if device supports tagged. + */ + if ( pTarget + && (pTarget->tflags & MPT_TARGET_FLAGS_Q_YES) + && (SCpnt->device->tagged_supported)) { + scsictl = scsidir | MPI_SCSIIO_CONTROL_SIMPLEQ; + } else { + scsictl = scsidir | MPI_SCSIIO_CONTROL_UNTAGGED; } - if (numSgeThisFrame == sges_left) { - /* Add last element, end of buffer and end of list flags. - */ - sgflags |= MPT_SGE_FLAGS_LAST_ELEMENT | - MPT_SGE_FLAGS_END_OF_BUFFER | - MPT_SGE_FLAGS_END_OF_LIST; + /* Use the above information to set up the message frame + */ + pScsiReq->TargetID = target; + pScsiReq->Bus = hd->port; + pScsiReq->ChainOffset = 0; + pScsiReq->Function = MPI_FUNCTION_SCSI_IO_REQUEST; + pScsiReq->CDBLength = SCpnt->cmd_len; + pScsiReq->SenseBufferLength = MPT_SENSE_BUFFER_SIZE; + pScsiReq->Reserved = 0; + pScsiReq->MsgFlags = mpt_msg_flags(); + pScsiReq->LUN[0] = 0; + pScsiReq->LUN[1] = lun; + pScsiReq->LUN[2] = 0; + pScsiReq->LUN[3] = 0; + pScsiReq->LUN[4] = 0; + pScsiReq->LUN[5] = 0; + pScsiReq->LUN[6] = 0; + pScsiReq->LUN[7] = 0; + pScsiReq->Control = cpu_to_le32(scsictl); - /* Add last SGE and set termination flags. - * Note: Last SGE may have a length of 0 - which should be ok. - */ - thisxfer = sg_dma_len(sg); + /* + * Write SCSI CDB into the message + * Should write from cmd_len up to 16, but skip for performance reasons. + */ + cmd_len = SCpnt->cmd_len; + for (ii=0; ii < cmd_len; ii++) + pScsiReq->CDB[ii] = SCpnt->cmnd[ii]; - v2 = sg_dma_address(sg); - mpt_add_sge(psge, sgflags | thisxfer, v2); - /* - sg++; - psge += (sizeof(u32) + sizeof(dma_addr_t)); - */ - sgeOffset += (sizeof(u32) + sizeof(dma_addr_t)); - sg_done++; + /* DataLength */ + pScsiReq->DataLength = cpu_to_le32(datalen); - if (chainSge) { - /* The current buffer is a chain buffer, - * but there is not another one. - * Update the chain element - * Offset and Length fields. - */ - mpt_add_chain((char *)chainSge, 0, sgeOffset, hd->ChainBufferDMA + chain_dma_off); - } else { - /* The current buffer is the original MF - * and there is no Chain buffer. - */ - pReq->ChainOffset = 0; - } - } else { - /* At least one chain buffer is needed. - * Complete the first MF - * - last SGE element, set the LastElement bit - * - set ChainOffset (words) for orig MF - * (OR finish previous MF chain buffer) - * - update MFStructPtr ChainIndex - * - Populate chain element - * Also - * Loop until done. - */ + /* SenseBuffer low address */ + pScsiReq->SenseBufferLowAddr = cpu_to_le32(hd->ioc->sense_buf_low_dma + + (my_idx * MPT_SENSE_BUFFER_ALLOC)); - dsgprintk((MYIOC_s_INFO_FMT "SG: Chain Required! sg done %d\n", - hd->ioc->name, sg_done)); + /* Now add the SG list + * Always have a SGE even if null length. + */ + rc = SUCCESS; + if (datalen == 0) { + /* Add a NULL SGE */ + mptscsih_add_sge((char *)&pScsiReq->SGL, MPT_SGE_FLAGS_SSIMPLE_READ | 0, + (dma_addr_t) -1); + } else { + /* Add a 32 or 64 bit SGE */ + rc = mptscsih_AddSGE(hd, SCpnt, pScsiReq, my_idx); + } - /* Set LAST_ELEMENT flag for last non-chain element - * in the buffer. Since psge points at the NEXT - * SGE element, go back one SGE element, update the flags - * and reset the pointer. (Note: sgflags & thisxfer are already - * set properly). - */ - if (sg_done) { - u32 *ptmp = (u32 *) (psge - (sizeof(u32) + sizeof(dma_addr_t))); - sgflags = le32_to_cpu(*ptmp); - sgflags |= MPT_SGE_FLAGS_LAST_ELEMENT; - *ptmp = cpu_to_le32(sgflags); - } - if (chainSge) { - /* The current buffer is a chain buffer. - * chainSge points to the previous Chain Element. - * Update its chain element Offset and Length (must - * include chain element size) fields. - * Old chain element is now complete. - */ - u8 nextChain = (u8) (sgeOffset >> 2); - sgeOffset += (sizeof(u32) + sizeof(dma_addr_t)); - mpt_add_chain((char *)chainSge, nextChain, sgeOffset, hd->ChainBufferDMA + chain_dma_off); - } else { - /* The original MF buffer requires a chain buffer - - * set the offset. - * Last element in this MF is a chain element. - */ - pReq->ChainOffset = (u8) (sgeOffset >> 2); - } + if (rc == SUCCESS) { + hd->ScsiLookup[my_idx] = SCpnt; + SCpnt->host_scribble = NULL; - sges_left -= sg_done; +#ifdef DROP_TEST + numTotCmds++; + /* If the IOC number and target match, increment + * counter. If counter matches DROP_THIS, do not + * issue command to FW to force a reset. + * Save the MF pointer so we can free resources + * when task mgmt completes. + */ + if ((hd->ioc->id == DROP_IOC) && (target == DROP_TARGET)) { + dropCounter++; + if (dropCounter == DROP_THIS_CMD) { + dropCounter = 0; - /* NOTE: psge points to the beginning of the chain element - * in current buffer. Get a chain buffer. - */ - if ((mptscsih_getFreeChainBuffer(hd, &newIndex)) == FAILED) - return FAILED; + /* If global is set, then we are already + * doing something - so keep issuing commands. + */ + if (dropMfPtr == NULL) { + dropTestNum++; + dropMfPtr = mf; + atomic_inc(&queue_depth); + printk(MYIOC_s_INFO_FMT + "Dropped SCSI cmd (%p)\n", + hd->ioc->name, SCpnt); + printk("mf (%p) req (%4x) tot cmds (%d)\n", + mf, my_idx, numTotCmds); - /* Update the tracking arrays. - * If chainSge == NULL, update ReqToChain, else ChainToChain - */ - if (chainSge) { - hd->ChainToChain[chain_idx] = newIndex; - } else { - hd->ReqToChain[req_idx] = newIndex; + return 0; + } + } } - chain_idx = newIndex; - chain_dma_off = hd->ioc->req_sz * chain_idx; +#endif - /* Populate the chainSGE for the current buffer. - * - Set chain buffer pointer to psge and fill - * out the Address and Flags fields. - */ - chainSge = (char *) psge; - dsgprintk((KERN_INFO " Current buff @ %p (index 0x%x)", - psge, req_idx)); + /* SCSI specific processing */ + issueCmd = 1; + if (hd->is_spi) { + int dvStatus = hd->ioc->spi_data.dvStatus[target]; - /* Start the SGE for the next buffer - */ - psge = (char *) (hd->ChainBuffer + chain_dma_off); - sgeOffset = 0; - sg_done = 0; + if (dvStatus || hd->ioc->spi_data.forceDv) { - dsgprintk((KERN_INFO " Chain buff @ %p (index 0x%x)\n", - psge, chain_idx)); + /* Write SDP1 on this I/O to this target */ + if (dvStatus & MPT_SCSICFG_NEGOTIATE) { + mptscsih_writeSDP1(hd, 0, target, hd->negoNvram); + dvStatus &= ~MPT_SCSICFG_NEGOTIATE; + hd->ioc->spi_data.dvStatus[target] = dvStatus; + } else if (dvStatus & MPT_SCSICFG_BLK_NEGO) { + mptscsih_writeSDP1(hd, 0, target, MPT_SCSICFG_BLK_NEGO); + dvStatus &= ~MPT_SCSICFG_BLK_NEGO; + hd->ioc->spi_data.dvStatus[target] = dvStatus; + } - /* Start the SGE for the next buffer - */ +#ifndef MPTSCSIH_DISABLE_DOMAIN_VALIDATION + if ((dvStatus & MPT_SCSICFG_NEED_DV) || + (hd->ioc->spi_data.forceDv & MPT_SCSICFG_NEED_DV)) { + unsigned long lflags; + /* Schedule DV if necessary */ + spin_lock_irqsave(&dvtaskQ_lock, lflags); + if (!dvtaskQ_active) { + dvtaskQ_active = 1; + spin_unlock_irqrestore(&dvtaskQ_lock, lflags); + MPT_INIT_WORK(&mptscsih_dvTask, mptscsih_domainValidation, (void *) hd); - goto nextSGEset; - } + SCHEDULE_TASK(&mptscsih_dvTask); + } else { + spin_unlock_irqrestore(&dvtaskQ_lock, lflags); + } + hd->ioc->spi_data.forceDv &= ~MPT_SCSICFG_NEED_DV; + } - return SUCCESS; -} + /* Trying to do DV to this target, extend timeout. + * Wait to issue intil flag is clear + */ + if (dvStatus & MPT_SCSICFG_DV_PENDING) { + mod_timer(&SCpnt->eh_timeout, jiffies + 40 * HZ); + issueCmd = 0; + } -/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ -/* - * mptscsih_getFreeChainBuffes - Function to get a free chain - * from the MPT_SCSI_HOST FreeChainQ. - * @hd: Pointer to the MPT_SCSI_HOST instance - * @req_idx: Index of the SCSI IO request frame. (output) - * - * return SUCCESS or FAILED - */ -static int -mptscsih_getFreeChainBuffer(MPT_SCSI_HOST *hd, int *retIndex) -{ - MPT_FRAME_HDR *chainBuf = NULL; - unsigned long flags; - int rc = FAILED; - int chain_idx = MPT_HOST_NO_CHAIN; + /* Set the DV flags. + */ + if (dvStatus & MPT_SCSICFG_DV_NOT_DONE) + mptscsih_set_dvflags(hd, pScsiReq); +#endif + } + } - //spin_lock_irqsave(&hd->FreeChainQlock, flags); - spin_lock_irqsave(&hd->ioc->FreeQlock, flags); - if (!Q_IS_EMPTY(&hd->FreeChainQ)) { + if (issueCmd) { + mptscsih_put_msgframe(ScsiDoneCtx, hd->ioc->id, mf); + dmfprintk((MYIOC_s_INFO_FMT "Issued SCSI cmd (%p) mf=%p idx=%d\n", + hd->ioc->name, SCpnt, mf, my_idx)); + } else { + ddvtprintk((MYIOC_s_INFO_FMT "Pending cmd=%p idx %d\n", + hd->ioc->name, SCpnt, my_idx)); + /* Place this command on the pendingQ if possible */ + spin_lock_irqsave(&hd->freedoneQlock, flags); + if (!Q_IS_EMPTY(&hd->freeQ)) { + buffer = hd->freeQ.head; + Q_DEL_ITEM(buffer); - int offset; + /* Save the mf pointer + */ + buffer->argp = (void *)mf; - chainBuf = hd->FreeChainQ.head; - Q_DEL_ITEM(&chainBuf->u.frame.linkage); - offset = (u8 *)chainBuf - (u8 *)hd->ChainBuffer; - chain_idx = offset / hd->ioc->req_sz; - rc = SUCCESS; + /* Add to the pendingQ + */ + Q_ADD_TAIL(&hd->pendingQ.head, buffer, MPT_DONE_Q); + spin_unlock_irqrestore(&hd->freedoneQlock, flags); + } else { + spin_unlock_irqrestore(&hd->freedoneQlock, flags); + SCpnt->result = (DID_BUS_BUSY << 16); + SCpnt->scsi_done(SCpnt); + } + } + } else { + mptscsih_freeChainBuffers(hd, my_idx); + mpt_free_msg_frame(ScsiDoneCtx, hd->ioc->id, mf); + did_errcode = 3; + goto did_error; } - //spin_unlock_irqrestore(&hd->FreeChainQlock, flags); - spin_unlock_irqrestore(&hd->ioc->FreeQlock, flags); + return 0; + +did_error: + dprintk((MYIOC_s_WARN_FMT "_qcmd did_errcode=%d (sc=%p)\n", + hd->ioc->name, did_errcode, SCpnt)); + /* Just wish OS to issue a retry */ + SCpnt->result = (DID_BUS_BUSY << 16); + spin_lock_irqsave(&hd->freedoneQlock, flags); + if (!Q_IS_EMPTY(&hd->freeQ)) { + buffer = hd->freeQ.head; + Q_DEL_ITEM(buffer); - *retIndex = chain_idx; + /* Set the Scsi_Cmnd pointer + */ + buffer->argp = (void *)SCpnt; - dsgprintk((MYIOC_s_INFO_FMT "getFreeChainBuffer (index %d), got buf=%p\n", - hd->ioc->name, *retIndex, chainBuf)); + /* Add to the doneQ + */ + Q_ADD_TAIL(&hd->doneQ.head, buffer, MPT_DONE_Q); + spin_unlock_irqrestore(&hd->freedoneQlock, flags); + } else { + spin_unlock_irqrestore(&hd->freedoneQlock, flags); + SCpnt->scsi_done(SCpnt); + } - return rc; + return 0; } /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ @@ -2540,8 +2817,8 @@ #ifdef MPT_DEBUG_RESET if ((ioc_raw_state & MPI_IOC_STATE_MASK) != MPI_IOC_STATE_OPERATIONAL) { - printk(MYIOC_s_WARN_FMT - "TM Handler: IOC Not operational! state 0x%x Calling HardResetHandler\n", + printk(MYIOC_s_WARN_FMT + "TM Handler: IOC Not operational! state 0x%x Calling HardResetHandler\n", hd->ioc->name, ioc_raw_state); } #endif @@ -2555,12 +2832,9 @@ hd->hard_resets++; rc = mptscsih_IssueTaskMgmt(hd, type, target, lun, ctx2abort, sleepFlag); if (rc) { -#ifdef MPT_SCSI_USE_NEW_EH - hd->tmState = TM_STATE_ERROR; -#endif printk(MYIOC_s_INFO_FMT "Issue of TaskMgmt failed!\n", hd->ioc->name); } else { - printk(MYIOC_s_INFO_FMT "Issue of TaskMgmt Successful!\n", hd->ioc->name); + dtmprintk((MYIOC_s_INFO_FMT "Issue of TaskMgmt Successful!\n", hd->ioc->name)); } } #ifdef DROP_TEST @@ -2688,7 +2962,6 @@ { MPT_SCSI_HOST *hd; MPT_FRAME_HDR *mf; - unsigned long flags; u32 ctx2abort; int scpnt_idx; @@ -2703,10 +2976,8 @@ return FAILED; } - printk(KERN_WARNING MYNAM ": %s: >> Attempting task abort! (sc=%p)\n", - hd->ioc->name, SCpnt); - printk(KERN_WARNING MYNAM ": %s: IOs outstanding = %d\n", - hd->ioc->name, atomic_read(&queue_depth)); + printk(KERN_WARNING MYNAM ": %s: >> Attempting task abort! (sc=%p, numIOs=%d)\n", + hd->ioc->name, SCpnt, atomic_read(&queue_depth)); if (hd->timeouts < -1) hd->timeouts++; @@ -2763,11 +3034,9 @@ ctx2abort = mf->u.frame.hwhdr.msgctxu.MsgContext; hd->abortSCpnt = SCpnt; - if (mptscsih_TMHandler(hd, MPI_SCSITASKMGMT_TASKTYPE_ABORT_TASK, - SCpnt->target, SCpnt->lun, ctx2abort, CAN_SLEEP) - < 0 - || hd->tmState == TM_STATE_ERROR) { + SCpnt->target, SCpnt->lun, ctx2abort, NO_SLEEP) + < 0) { /* The TM request failed and the subsequent FW-reload failed! * Fatal error case. @@ -2775,14 +3044,6 @@ printk(MYIOC_s_WARN_FMT "Error issuing abort task! (sc=%p)\n", hd->ioc->name, SCpnt); - /* If command not found, do not do callback, - * just return failed. CHECKME - */ - if (hd->ScsiLookup[scpnt_idx] != NULL) { - SCpnt->result = STS_BUSY; - SCpnt->scsi_done(SCpnt); - } - /* We must clear our pending flag before clearing our state. */ hd->tmPending = 0; @@ -2790,34 +3051,8 @@ return FAILED; } + return FAILED; - /* Our task management request will either complete or time out. So we - * spin until tmPending is != 1. If tmState is set to TM_STATE_ERROR, - * we encountered an error executing the task management request. - */ - while (hd->tmPending == 1){ - set_current_state(TASK_INTERRUPTIBLE); - schedule_timeout(HZ/4); - } - spin_lock_irqsave(&hd->ioc->FreeQlock, flags); - if (hd->tmState == TM_STATE_ERROR){ - hd->tmState = TM_STATE_NONE; - spin_unlock_irqrestore(&hd->ioc->FreeQlock, flags); - nehprintk((KERN_WARNING MYNAM ": %s: mptscsih_abort: " - "TM timeout error! (sc=%p)\n", - hd->ioc->name, - SCpnt)); - return FAILED; - } - hd->tmState = TM_STATE_NONE; - spin_unlock_irqrestore(&hd->ioc->FreeQlock, flags); - - nehprintk((KERN_WARNING MYNAM ": %s: mptscsih_abort: " - "Abort was successful! (sc=%p)\n", - hd->ioc->name, - SCpnt)); - - return SUCCESS; } /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ @@ -2833,7 +3068,6 @@ mptscsih_dev_reset(Scsi_Cmnd * SCpnt) { MPT_SCSI_HOST *hd; - unsigned long flags; /* If we can't locate our host adapter structure, return FAILED status. */ @@ -2844,10 +3078,13 @@ return FAILED; } - printk(KERN_WARNING MYNAM ": %s: >> Attempting target reset! (sc=%p)\n", - hd->ioc->name, SCpnt); - printk(KERN_WARNING MYNAM ": %s: IOs outstanding = %d\n", - hd->ioc->name, atomic_read(&queue_depth)); + printk(KERN_WARNING MYNAM ": %s: >> Attempting target reset! (sc=%p, numIOs=%d)\n", + hd->ioc->name, SCpnt, atomic_read(&queue_depth)); + + /* Unsupported for SCSI. Suppored for FCP + */ + if (hd->is_spi) + return FAILED; /* Wait a fixed amount of time for the TM pending flag to be cleared. * If we time out, then we return a FAILED status to the caller. This @@ -2863,7 +3100,7 @@ } if (mptscsih_TMHandler(hd, MPI_SCSITASKMGMT_TASKTYPE_TARGET_RESET, - SCpnt->target, 0, 0, CAN_SLEEP) + SCpnt->target, 0, 0, NO_SLEEP) < 0){ /* The TM request failed and the subsequent FW-reload failed! * Fatal error case. @@ -2874,34 +3111,8 @@ hd->tmState = TM_STATE_NONE; return FAILED; } - - /* Our task management request will either complete or time out. So we - * spin until tmPending is != 1. If tmState is set to TM_STATE_ERROR, - * we encountered an error executing the task management request. - */ - while (hd->tmPending == 1){ - set_current_state(TASK_INTERRUPTIBLE); - schedule_timeout(HZ/4); - } - spin_lock_irqsave(&hd->ioc->FreeQlock, flags); - if (hd->tmState == TM_STATE_ERROR){ - hd->tmState = TM_STATE_NONE; - spin_unlock_irqrestore(&hd->ioc->FreeQlock, flags); - nehprintk((KERN_WARNING MYNAM ": %s: mptscsih_dev_reset: " - "TM timeout error! (sc=%p)\n", - hd->ioc->name, - SCpnt)); - return FAILED; - } - hd->tmState = TM_STATE_NONE; - spin_unlock_irqrestore(&hd->ioc->FreeQlock, flags); - - nehprintk((KERN_WARNING MYNAM ": %s: mptscsih_dev_reset: " - "Device reset was successful! (sc=%p)\n", - hd->ioc->name, - SCpnt)); - return SUCCESS; + } /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ @@ -2917,7 +3128,6 @@ mptscsih_bus_reset(Scsi_Cmnd * SCpnt) { MPT_SCSI_HOST *hd; - unsigned long flags; /* If we can't locate our host adapter structure, return FAILED status. */ @@ -2928,10 +3138,8 @@ return FAILED; } - printk(KERN_WARNING MYNAM ": %s: >> Attempting bus reset! (sc=%p)\n", - hd->ioc->name, SCpnt); - printk(KERN_WARNING MYNAM ": %s: IOs outstanding = %d\n", - hd->ioc->name, atomic_read(&queue_depth)); + printk(KERN_WARNING MYNAM ": %s: >> Attempting bus reset! (sc=%p, numIOs=%d)\n", + hd->ioc->name, SCpnt, atomic_read(&queue_depth)); if (hd->timeouts < -1) hd->timeouts++; @@ -2945,19 +3153,19 @@ nehprintk((KERN_WARNING MYNAM ": %s: mptscsih_bus_reset: " "Timed out waiting for previous TM to complete! " "(sc = %p)\n", - hd->ioc->name, SCpnt ) ); + hd->ioc->name, SCpnt)); return FAILED; } /* We are now ready to execute the task management request. */ if (mptscsih_TMHandler(hd, MPI_SCSITASKMGMT_TASKTYPE_RESET_BUS, - 0, 0, 0, CAN_SLEEP) + 0, 0, 0, NO_SLEEP) < 0){ /* The TM request failed and the subsequent FW-reload failed! * Fatal error case. */ - printk(MYIOC_s_WARN_FMT + printk(MYIOC_s_WARN_FMT "Error processing TaskMgmt request (sc=%p)\n", hd->ioc->name, SCpnt); hd->tmPending = 0; @@ -2965,32 +3173,6 @@ return FAILED; } - /* Our task management request will either complete or time out. So we - * spin until tmPending is != 1. If tmState is set to TM_STATE_ERROR, - * we encountered an error executing the task management request. - */ - while (hd->tmPending == 1){ - set_current_state(TASK_INTERRUPTIBLE); - schedule_timeout(HZ/4); - } - spin_lock_irqsave(&hd->ioc->FreeQlock, flags); - if (hd->tmState == TM_STATE_ERROR){ - hd->tmState = TM_STATE_NONE; - spin_unlock_irqrestore(&hd->ioc->FreeQlock, flags); - nehprintk((KERN_WARNING MYNAM ": %s: mptscsih_bus_reset: " - "TM timeout error! (sc=%p)\n", - hd->ioc->name, - SCpnt)); - return FAILED; - } - hd->tmState = TM_STATE_NONE; - spin_unlock_irqrestore(&hd->ioc->FreeQlock, flags); - - nehprintk((KERN_WARNING MYNAM ": %s: mptscsih_bus_reset: " - "Bus reset was successful! (sc=%p)\n", - hd->ioc->name, - SCpnt)); - return SUCCESS; } @@ -3026,11 +3208,11 @@ /* If our attempts to reset the host failed, then return a failed * status. The host will be taken off line by the SCSI mid-layer. */ - if (mpt_HardResetHandler(hd->ioc, CAN_SLEEP) < 0){ + if (mpt_HardResetHandler(hd->ioc, NO_SLEEP) < 0){ status = FAILED; } else { - /* Make sure TM pending is cleared and TM state is set to - * NONE. + /* Make sure TM pending is cleared and TM state is set to + * NONE. */ hd->tmPending = 0; hd->tmState = TM_STATE_NONE; @@ -3046,7 +3228,7 @@ /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ /** - * mptscsih_tm_pending_wait - wait for pending task management request to + * mptscsih_tm_pending_wait - wait for pending task management request to * complete. * @hd: Pointer to MPT host structure. * @@ -3069,9 +3251,7 @@ break; } spin_unlock_irqrestore(&hd->ioc->FreeQlock, flags); - set_current_state(TASK_INTERRUPTIBLE); - schedule_timeout(HZ/4); - + mdelay(250); } while (--loop_count); return status; @@ -3182,7 +3362,7 @@ SCpnt->host_scribble = (u8 *) MPT_INDEX_2_MFPTR (hd->ioc, scpnt_idx); /* For the time being, force bus reset on any abort - * requests for the 1030 FW. + * requests for the 1030/1035 FW. */ if (hd->is_spi) mf->u.frame.linkage.arg1 = MPI_SCSITASKMGMT_TASKTYPE_RESET_BUS; @@ -3204,7 +3384,7 @@ * (bottom/unused portion of) MPT request frame. */ ptaskfoo = (struct mpt_work_struct *) &mptscsih_ptaskfoo; - MPT_INIT_WORK(&mptscsih_ptaskfoo, mptscsih_taskmgmt_bh, (void *) SCpnt); + MPT_INIT_WORK(&mptscsih_ptaskfoo, mptscsih_taskmgmt_bh, (void *) SCpnt); SCHEDULE_TASK(ptaskfoo); } else { @@ -3335,7 +3515,7 @@ * (bottom/unused portion of) MPT request frame. */ ptaskfoo = (struct mpt_work_struct *) &mptscsih_ptaskfoo; - MPT_INIT_WORK(&mptscsih_ptaskfoo, mptscsih_taskmgmt_bh, (void *) SCpnt); + MPT_INIT_WORK(&mptscsih_ptaskfoo, mptscsih_taskmgmt_bh, (void *) SCpnt); SCHEDULE_TASK(ptaskfoo); } else { @@ -3602,9 +3782,6 @@ } } } -#ifdef MPT_SCSI_USE_NEW_EH - hd->tmState = TM_STATE_ERROR; -#endif } else { dtmprintk((KERN_INFO " SCSI TaskMgmt SUCCESS!\n")); @@ -3648,6 +3825,9 @@ spin_lock_irqsave(&ioc->FreeQlock, flags); hd->tmPending = 0; spin_unlock_irqrestore(&ioc->FreeQlock, flags); +#ifdef MPT_SCSI_USE_NEW_EH + hd->tmState = TM_STATE_NONE; +#endif return 1; } @@ -3657,15 +3837,22 @@ * This is anyones guess quite frankly. */ int -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,28) -mptscsih_bios_param(Disk * disk, struct block_device *dev, int *ip) +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,45) +mptscsih_bios_param(struct scsi_device * sdev, struct block_device *bdev, + sector_t capacity, int *ip) +{ +#elif LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,28) +mptscsih_bios_param(Disk * disk, struct block_device *bdev, int *ip) +{ + sector_t capacity = disk->capacity; #else mptscsih_bios_param(Disk * disk, kdev_t dev, int *ip) -#endif { + unsigned capacity = disk->capacity; +#endif int size; - size = disk->capacity; + size = capacity; ip[0] = 64; /* heads */ ip[1] = 32; /* sectors */ if ((ip[2] = size >> 11) > 1024) { /* cylinders, test for big disk */ @@ -3682,13 +3869,49 @@ * Called once per device the bus scan. Use it to force the queue_depth * member to 1 if a device does not support Q tags. */ +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,44) +int +mptscsih_slave_attach(Scsi_Device *device) +{ + struct Scsi_Host *host = device->host; + VirtDevice *pTarget; + MPT_SCSI_HOST *hd; + + hd = (MPT_SCSI_HOST *)host->hostdata; + if (hd && (hd->Targets != NULL)) { + pTarget = hd->Targets[device->id]; + if (pTarget) { + if (!device->tagged_supported || + !(pTarget->tflags & MPT_TARGET_FLAGS_Q_YES)) { + scsi_adjust_queue_depth(device, 0, 1); + + } else if ((pTarget->tflags & MPT_TARGET_FLAGS_VALID_INQUIRY) + && (pTarget->inq_data[0] & 0x1f) == 0x00 + && (pTarget->minSyncFactor <= MPT_ULTRA160 || !hd->is_spi)) { + scsi_adjust_queue_depth(device, MSG_SIMPLE_TAG, + MPT_SCSI_CMD_PER_DEV_HIGH); + } else { + scsi_adjust_queue_depth(device, MSG_SIMPLE_TAG, + MPT_SCSI_CMD_PER_DEV_LOW); + } +#if 0 + /* Original Code for 2.5 */ + } else { + scsi_adjust_queue_depth(device, MSG_SIMPLE_TAG, + device->host->can_queue >> 1); + } +#endif + } + } + return 0; +} +#else /* LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,44) */ void mptscsih_select_queue_depths(struct Scsi_Host *sh, Scsi_Device *sdList) { struct scsi_device *device; VirtDevice *pTarget; MPT_SCSI_HOST *hd; - int ii, max; for (device = sdList; device != NULL; device = device->next) { @@ -3700,119 +3923,44 @@ continue; if (hd->Targets != NULL) { - if (hd->is_spi) - max = MPT_MAX_SCSI_DEVICES; - else - max = MPT_MAX_FC_DEVICES<256 ? MPT_MAX_FC_DEVICES : 255; + pTarget = NULL; + if (device->id > sh->max_id) { + /* error case, should never happen */ + device->queue_depth = 1; + continue; + } else { + pTarget = hd->Targets[device->id]; + } - for (ii=0; ii < max; ii++) { - pTarget = hd->Targets[ii]; - if (pTarget && !(pTarget->tflags & MPT_TARGET_FLAGS_Q_YES)) { + if (pTarget == NULL) { + /* error case - don't know about this device */ + device->queue_depth = 1; + } else if (pTarget->tflags & MPT_TARGET_FLAGS_VALID_INQUIRY) { + if (!(pTarget->tflags & MPT_TARGET_FLAGS_Q_YES)) device->queue_depth = 1; - } + else if (((pTarget->inq_data[0] & 0x1f) == 0x00) + && (pTarget->minSyncFactor <= MPT_ULTRA160 || !hd->is_spi)){ + device->queue_depth = MPT_SCSI_CMD_PER_DEV_HIGH; + } else + device->queue_depth = MPT_SCSI_CMD_PER_DEV_LOW; + + } else { + /* error case - No Inq. Data */ + device->queue_depth = 1; } + dprintk((MYIOC_s_INFO_FMT + "target = %d, sync factor = %x, queue depth = %d\n", + hd->ioc->name, pTarget->target_id, + pTarget->minSyncFactor, device->queue_depth)); } } } +#endif /* LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,44) */ /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ /* * Private routines... */ -/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ -/* 19991030 -sralston - * Return absolute SCSI data direction: - * 1 = _DATA_OUT - * 0 = _DIR_NONE - * -1 = _DATA_IN - * - * Changed: 3-20-2002 pdelaney to use the default data - * direction and the defines set up in the - * 2.4 kernel series - * 1 = _DATA_OUT changed to SCSI_DATA_WRITE (1) - * 0 = _DIR_NONE changed to SCSI_DATA_NONE (3) - * -1 = _DATA_IN changed to SCSI_DATA_READ (2) - * If the direction is unknown, fall through to original code. - * - * Mid-layer bug fix(): sg interface generates the wrong data - * direction in some cases. Set the direction the hard way for - * the most common commands. - */ -static int -mptscsih_io_direction(Scsi_Cmnd *cmd) -{ - switch (cmd->cmnd[0]) { - case WRITE_6: - case WRITE_10: - return SCSI_DATA_WRITE; - break; - case READ_6: - case READ_10: - return SCSI_DATA_READ; - break; - } - -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,0) - if (cmd->sc_data_direction != SCSI_DATA_UNKNOWN) - return cmd->sc_data_direction; -#endif - switch (cmd->cmnd[0]) { - /* _DATA_OUT commands */ - case WRITE_6: case WRITE_10: case WRITE_12: - case WRITE_LONG: case WRITE_SAME: case WRITE_BUFFER: - case WRITE_VERIFY: case WRITE_VERIFY_12: - case COMPARE: case COPY: case COPY_VERIFY: - case SEARCH_EQUAL: case SEARCH_HIGH: case SEARCH_LOW: - case SEARCH_EQUAL_12: case SEARCH_HIGH_12: case SEARCH_LOW_12: - case MODE_SELECT: case MODE_SELECT_10: case LOG_SELECT: - case SEND_DIAGNOSTIC: case CHANGE_DEFINITION: case UPDATE_BLOCK: - case SET_WINDOW: case MEDIUM_SCAN: case SEND_VOLUME_TAG: - case REASSIGN_BLOCKS: - case PERSISTENT_RESERVE_OUT: - case 0xea: - case 0xa3: - return SCSI_DATA_WRITE; - - /* No data transfer commands */ - case SEEK_6: case SEEK_10: - case RESERVE: case RELEASE: - case TEST_UNIT_READY: - case START_STOP: - case ALLOW_MEDIUM_REMOVAL: - return SCSI_DATA_NONE; - - /* Conditional data transfer commands */ - case FORMAT_UNIT: - if (cmd->cmnd[1] & 0x10) /* FmtData (data out phase)? */ - return SCSI_DATA_WRITE; - else - return SCSI_DATA_NONE; - - case VERIFY: - if (cmd->cmnd[1] & 0x02) /* VERIFY:BYTCHK (data out phase)? */ - return SCSI_DATA_WRITE; - else - return SCSI_DATA_NONE; - - case RESERVE_10: - if (cmd->cmnd[1] & 0x03) /* RESERVE:{LongID|Extent} (data out phase)? */ - return SCSI_DATA_WRITE; - else - return SCSI_DATA_NONE; - -#if 0 - case REZERO_UNIT: /* (or REWIND) */ - case SPACE: - case ERASE: case ERASE_10: - case SYNCHRONIZE_CACHE: - case LOCK_UNLOCK_CACHE: -#endif - - /* Must be data _IN! */ - default: - return SCSI_DATA_READ; - } -} /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ /* Utility function to copy sense data from the scsi_cmnd buffer @@ -3848,7 +3996,7 @@ /* save sense data to the target device */ - if (target) { + if (hd->is_spi && target) { #ifdef MPT_SAVE_AUTOSENSE int sz; @@ -3861,7 +4009,7 @@ #ifdef ABORT_FIX if (sz >= SCSI_STD_SENSE_BYTES) { - if ((sense_data[02] == ABORTED_COMMAND) && + if ((sense_data[02] == ABORTED_COMMAND) && (sense_data[12] == 0x47) && (sense_data[13] == 0x00)){ target->numAborts++; if ((target->raidVolume == 0) && (target->numAborts > 5)) { @@ -3954,7 +4102,7 @@ /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ /* Search the pendingQ for a command with specific index. - * If found, delete and return mf pointer + * If found, delete and return mf pointer * If not found, return NULL */ static MPT_FRAME_HDR * @@ -4122,6 +4270,8 @@ ioc->name)); } else { + ScsiCfgData *pSpi = NULL; + dtmprintk((MYIOC_s_WARN_FMT "Do Post-Diag Reset handling\n", ioc->name)); @@ -4160,6 +4310,9 @@ spin_unlock_irqrestore(&ioc->FreeQlock, flags); hd->resetPending = 0; hd->numTMrequests = 0; +#ifdef MPT_SCSI_USE_NEW_EH + hd->tmState = TM_STATE_NONE; +#endif /* 6. If there was an internal command, * wake this process up. @@ -4181,6 +4334,14 @@ dtmprintk((MYIOC_s_WARN_FMT "Post-Reset handling complete.\n", ioc->name)); + + + /* 8. Set then flag to force DV and re-read IOC Page 3 + */ + pSpi = &ioc->spi_data; + pSpi->forceDv = MPT_SCSICFG_NEED_DV | MPT_SCSICFG_RELOAD_IOC_PG3; + ddvtprintk(("Set reload IOC Pg3 Flag\n")); + } return 1; /* currently means nothing really */ @@ -4203,10 +4364,11 @@ case MPI_EVENT_IOC_BUS_RESET: /* 04 */ case MPI_EVENT_EXT_BUS_RESET: /* 05 */ hd = NULL; - if (ioc->sh) + if (ioc->sh) { hd = (MPT_SCSI_HOST *) ioc->sh->hostdata; - if (hd && (hd->is_spi) && (hd->soft_resets < -1)) - hd->soft_resets++; + if (hd && (hd->is_spi) && (hd->soft_resets < -1)) + hd->soft_resets++; + } break; case MPI_EVENT_LOGOUT: /* 09 */ /* FIXME! */ @@ -4226,7 +4388,7 @@ case MPI_EVENT_INTEGRATED_RAID: /* 0B */ #ifndef MPTSCSIH_DISABLE_DOMAIN_VALIDATION - /* negoNvram set to 0 if DV enabled and to USE_NVRAM if + /* negoNvram set to 0 if DV enabled and to USE_NVRAM if * if DV disabled. Need to check for target mode. */ hd = NULL; @@ -4242,11 +4404,12 @@ reason = (le32_to_cpu(pEvReply->Data[0]) & 0x00FF0000) >> 16; if (reason == MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED) { - /* New or replaced disk. + /* New or replaced disk. * Set DV flag and schedule DV. */ pSpi = &ioc->spi_data; physDiskNum = (le32_to_cpu(pEvReply->Data[0]) & 0xFF000000) >> 24; + ddvtprintk(("DV requested for phys disk id %d\n", physDiskNum)); if (pSpi->pIocPg3) { pPDisk = pSpi->pIocPg3->PhysDisk; numPDisk =pSpi->pIocPg3->NumPhysDisks; @@ -4261,6 +4424,16 @@ pPDisk++; numPDisk--; } + + if (numPDisk == 0) { + /* The physical disk that needs DV was not found + * in the stored IOC Page 3. The driver must reload + * this page. DV routine will set the NEED_DV flag for + * all phys disks that have DV_NOT_DONE set. + */ + pSpi->forceDv = MPT_SCSICFG_NEED_DV | MPT_SCSICFG_RELOAD_IOC_PG3; + ddvtprintk(("phys disk %d not found. Setting reload IOC Pg3 Flag\n", physDiskNum)); + } } } } @@ -4724,7 +4897,7 @@ if (ioop->cdbPtr == NULL) { return 0; } else if ((ioop->cdbPtr[0] == CMD_TestUnitReady) || - (ioop->cdbPtr[0] == CMD_ReadCapacity) || + (ioop->cdbPtr[0] == CMD_ReadCapacity) || (ioop->cdbPtr[0] == 0x43)) { return 0; } @@ -4839,16 +5012,16 @@ } } - if (vdev) { + vdev->raidVolume = 0; + if (vdev && hd->is_spi) { if (hd->ioc->spi_data.isRaid & (1 << target_id)) { vdev->raidVolume = 1; ddvtprintk((KERN_INFO "RAID Volume @ id %d\n", target_id)); - } else - vdev->raidVolume = 0; + } } if (vdev && data) { - if ((!(vdev->tflags & MPT_TARGET_FLAGS_VALID_INQUIRY)) || + if ((!(vdev->tflags & MPT_TARGET_FLAGS_VALID_INQUIRY)) || ((dlen > 56) && (!(vdev->tflags & MPT_TARGET_FLAGS_VALID_56)))) { /* Copy the inquiry data - if we haven't yet. @@ -4868,7 +5041,7 @@ /* If LUN 0, tape and have not done DV, set the DV flag. */ - if ((lun == 0) && ((data[0] & 0x1F) == 0x01)) { + if (hd->is_spi && (lun == 0) && ((data[0] & 0x1F) == 0x01)) { ScsiCfgData *pSpi = &hd->ioc->spi_data; if (pSpi->dvStatus[target_id] & MPT_SCSICFG_DV_NOT_DONE) pSpi->dvStatus[target_id] |= MPT_SCSICFG_NEED_DV; @@ -4907,6 +5080,13 @@ ddvtprintk((KERN_INFO "set Target: (id %d) byte56 0x%x\n", id, byte56)); + if (!hd->is_spi) { + if (target->tflags & MPT_TARGET_FLAGS_VALID_INQUIRY) { + if (target->inq_data[7] & 0x02) + target->tflags |= MPT_TARGET_FLAGS_Q_YES; + } + return; + } /* Set flags based on Inquiry data */ if (target->tflags & MPT_TARGET_FLAGS_VALID_INQUIRY) { @@ -4931,7 +5111,7 @@ factor = MPT_ULTRA320; /* If RAID, never disable QAS - * else if non RAID, do not disable + * else if non RAID, do not disable * QAS if bit 1 is set * bit 1 QAS support, non-raid only * bit 0 IU support @@ -5054,8 +5234,8 @@ #endif /* If DV disabled (negoNvram set to USE_NVARM) or if not LUN 0, return. - * Else set the NEED_DV flag after Read Capacity Issued (disks) - * or Mode Sense (cdroms). + * Else set the NEED_DV flag after Read Capacity Issued (disks) + * or Mode Sense (cdroms). * * Tapes, initTarget will set this flag on completion of Inquiry command. * Called only if DV_NOT_DONE flag is set @@ -5091,7 +5271,7 @@ /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ /* - * If no Target, bus reset on 1st I/O. Set the flag to + * If no Target, bus reset on 1st I/O. Set the flag to * prevent any future negotiations to this device. */ static void mptscsih_no_negotiate(MPT_SCSI_HOST *hd, int target_id) @@ -5229,7 +5409,6 @@ maxfactor = MPT_ASYNC; } - /* Set the negotiation flags. */ negoFlags = ioc->spi_data.noQas; @@ -5341,9 +5520,9 @@ pData->Reserved = 0; pData->Configuration = cpu_to_le32(configuration); - dprintk((MYIOC_s_INFO_FMT + dprintk((MYIOC_s_INFO_FMT "write SDP1: id %d pgaddr 0x%x req 0x%x config 0x%x\n", - ioc->name, id, (id | (bus<<8)), + ioc->name, id, (id | (bus<<8)), requested, configuration)); mptscsih_put_msgframe(ScsiDoneCtx, ioc->id, mf); @@ -5371,13 +5550,6 @@ */ del_timer(&hd->TMtimer); -#ifdef MPT_SCSI_USE_NEW_EH - /* Set the error flag to 1 so that the function that started the - * task management request knows it timed out. - */ - hd->tmState = TM_STATE_ERROR; -#endif - /* Call the reset handler. Already had a TM request * timeout - so issue a diagnostic reset */ @@ -5389,8 +5561,8 @@ /* Because we have reset the IOC, no TM requests can be * pending. So let's make sure the tmPending flag is reset. */ - nehprintk((KERN_WARNING MYNAM - ": %s: mptscsih_taskmgmt_timeout\n", + nehprintk((KERN_WARNING MYNAM + ": %s: mptscsih_taskmgmt_timeout\n", hd->ioc->name)); hd->tmPending = 0; } @@ -5628,7 +5800,7 @@ if (hd->tmPending) { spin_unlock_irqrestore(&hd->ioc->FreeQlock, flags); return; - } else + } else hd->tmPending = 1; spin_unlock_irqrestore(&hd->ioc->FreeQlock, flags); @@ -5707,7 +5879,7 @@ pReq->ActionDataWord = 0; /* Reserved for this action */ //pReq->ActionDataSGE = 0; - mpt_add_sge((char *)&pReq->ActionDataSGE, + mpt_add_sge((char *)&pReq->ActionDataSGE, MPT_SGE_FLAGS_SSIMPLE_READ | 0, (dma_addr_t) -1); ddvprintk((MYIOC_s_INFO_FMT "RAID Volume action %x id %d\n", @@ -6036,7 +6208,7 @@ if (id == hostId) id++; - /* Write SDP1 for all SCSI devices + /* Write SDP1 for all SCSI devices * Alloc memory and set up config buffer */ if (hd->is_spi) { @@ -6159,7 +6331,7 @@ spin_unlock_irqrestore(&dvtaskQ_lock, flags); /* For this ioc, loop through all devices and do dv to each device. - * When complete with this ioc, search through the ioc list, and + * When complete with this ioc, search through the ioc list, and * for each scsi ioc found, do dv for all devices. Exit when no * device needs dv. */ @@ -6190,6 +6362,23 @@ if (hd == NULL) continue; + if ((ioc->spi_data.forceDv & MPT_SCSICFG_RELOAD_IOC_PG3) != 0) { + mpt_read_ioc_pg_3(ioc); + if (ioc->spi_data.pIocPg3) { + Ioc3PhysDisk_t *pPDisk = ioc->spi_data.pIocPg3->PhysDisk; + int numPDisk = ioc->spi_data.pIocPg3->NumPhysDisks; + + while (numPDisk) { + if (ioc->spi_data.dvStatus[pPDisk->PhysDiskID] & MPT_SCSICFG_DV_NOT_DONE) + ioc->spi_data.dvStatus[pPDisk->PhysDiskID] |= MPT_SCSICFG_NEED_DV; + + pPDisk++; + numPDisk--; + } + } + ioc->spi_data.forceDv &= ~MPT_SCSICFG_RELOAD_IOC_PG3; + } + maxid = MIN (ioc->sh->max_id, MPT_MAX_SCSI_DEVICES); for (id = 0; id < maxid; id++) { @@ -6380,7 +6569,7 @@ lun = 0; bus = 0; - ddvtprintk((MYIOC_s_NOTE_FMT + ddvtprintk((MYIOC_s_NOTE_FMT "DV started: numIOs %d bus=%d, id %d dv @ %p\n", ioc->name, atomic_read(&queue_depth), bus, id, &dv)); @@ -6485,7 +6674,7 @@ /* Skip this ID? Set cfg.hdr to force config page write */ if ((ioc->spi_data.nvram[id] != MPT_HOST_NVRAM_INVALID) && - (!(ioc->spi_data.nvram[id] & MPT_NVRAM_ID_SCAN_ENABLE))) { + (!(ioc->spi_data.nvram[id] & MPT_NVRAM_ID_SCAN_ENABLE))) { ddvprintk((MYIOC_s_NOTE_FMT "DV Skipped: bus, id, lun (%d, %d, %d)\n", ioc->name, bus, id, lun)); @@ -6557,11 +6746,11 @@ /* Wide - narrow - wide workaround case */ - if ((rc == MPT_SCANDV_ISSUE_SENSE) && dv.max.width) { + if ((rc == MPT_SCANDV_ISSUE_SENSE) && dv.max.width) { /* Send an untagged command to reset disk Qs corrupted * when a parity error occurs on a Request Sense. */ - if ((hd->ioc->facts.FWVersion.Word >= 0x01000600) || + if ((hd->ioc->facts.FWVersion.Word >= 0x01000600) || ((hd->ioc->facts.FWVersion.Word >= 0x01010000) && (hd->ioc->facts.FWVersion.Word < 0x01010B00)) ) { @@ -6597,7 +6786,11 @@ rc = hd->pLocal->completion; if (rc == MPT_SCANDV_GOOD) { if (hd->pLocal->scsiStatus == STS_BUSY) { - retcode = 1; + if ((iocmd.flags & MPT_ICFLAG_TAGGED_CMD) == 0) + retcode = 1; + else + retcode = 0; + goto target_done; } } else if (rc == MPT_SCANDV_SENSE) { @@ -6669,7 +6862,7 @@ * Fujitsu: PPR U320 -> Msg Reject and Ultra2 and wide * Resetart with a request for U160. */ - if ((dv.now.factor == MPT_ULTRA320) && (sdp0_nego == MPT_ULTRA2)) { + if ((dv.now.factor == MPT_ULTRA320) && (sdp0_nego == MPT_ULTRA2)) { doFallback = 1; } else { dv.cmd = MPT_UPDATE_MAX; @@ -6693,7 +6886,7 @@ } - } else if (rc == MPT_SCANDV_ISSUE_SENSE) + } else if (rc == MPT_SCANDV_ISSUE_SENSE) doFallback = 1; /* set fallback flag */ else if ((rc == MPT_SCANDV_DID_RESET) || (rc == MPT_SCANDV_SENSE)) doFallback = 1; /* set fallback flag */ @@ -6933,7 +7126,7 @@ mdelay (2000); notDone++; } else { - ddvprintk((MYIOC_s_INFO_FMT + ddvprintk((MYIOC_s_INFO_FMT "DV: Reserved Failed.", ioc->name)); goto target_done; } @@ -6997,7 +7190,7 @@ patt = -1; continue; } - } + } goto target_done; } else @@ -7110,7 +7303,7 @@ if (hd->pLocal->completion == MPT_SCANDV_GOOD) iocmd.flags &= ~MPT_ICFLAG_RESERVED; } else { - printk(MYIOC_s_INFO_FMT "DV: Release failed. id %d", + printk(MYIOC_s_INFO_FMT "DV: Release failed. id %d", ioc->name, id); } } @@ -7128,7 +7321,7 @@ mptscsih_dv_parms(hd, &dv, (void *)pcfg1Data); #if 0 - /* Double writes to SDP1 can cause problems, + /* Double writes to SDP1 can cause problems, * skip here since unnecessary */ /* Save the final negotiated settings to @@ -7284,7 +7477,7 @@ case MPT_SET_MIN: ddvprintk((MYIOC_s_NOTE_FMT "Setting Min: ", hd->ioc->name)); - /* Set page to asynchronous and narrow + /* Set page to asynchronous and narrow * Do not update now, breaks fallback routine. */ width = MPT_NARROW; offset = 0; @@ -7306,7 +7499,7 @@ case MPT_FALLBACK: ddvprintk((MYIOC_s_NOTE_FMT "Fallback: Start: offset %d, factor %x, width %d \n", - hd->ioc->name, dv->now.offset, + hd->ioc->name, dv->now.offset, dv->now.factor, dv->now.width)); width = dv->now.width; offset = dv->now.offset; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/message/fusion/mptscsih.h linux.21rc1-ac1/drivers/message/fusion/mptscsih.h --- linux.21rc1/drivers/message/fusion/mptscsih.h 2003-04-22 16:39:35.000000000 +0100 +++ linux.21rc1-ac1/drivers/message/fusion/mptscsih.h 2003-04-22 19:20:12.000000000 +0100 @@ -20,7 +20,7 @@ * (mailto:netscape.net) * (mailto:Pam.Delaney@lsil.com) * - * $Id: mptscsih.h,v 1.20 2002/10/17 20:16:00 pdelaney Exp $ + * $Id: mptscsih.h,v 1.22 2002/12/16 15:28:48 pdelaney Exp $ */ /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ /* @@ -73,9 +73,16 @@ * Try to keep these at 2^N-1 */ #define MPT_FC_CAN_QUEUE 63 -//#define MPT_SCSI_CAN_QUEUE 31 -#define MPT_SCSI_CAN_QUEUE MPT_FC_CAN_QUEUE -#define MPT_SCSI_CMD_PER_LUN 7 +#if defined MPT_SCSI_USE_NEW_EH + #define MPT_SCSI_CAN_QUEUE 127 +#else + #define MPT_SCSI_CAN_QUEUE 63 +#endif + +#define MPT_SCSI_CMD_PER_DEV_HIGH 31 +#define MPT_SCSI_CMD_PER_DEV_LOW 7 + +#define MPT_SCSI_CMD_PER_LUN 7 #define MPT_SCSI_MAX_SECTORS 8192 @@ -206,11 +213,16 @@ #define x_scsi_dev_reset mptscsih_dev_reset #define x_scsi_host_reset mptscsih_host_reset #define x_scsi_bios_param mptscsih_bios_param -#define x_scsi_select_queue_depths mptscsih_select_queue_depths #define x_scsi_taskmgmt_bh mptscsih_taskmgmt_bh #define x_scsi_old_abort mptscsih_old_abort #define x_scsi_old_reset mptscsih_old_reset +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,44) +#define x_scsi_slave_attach mptscsih_slave_attach +#else +#define x_scsi_select_queue_depths mptscsih_select_queue_depths +#endif +#define x_scsi_proc_info mptscsih_proc_info /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ /* @@ -229,13 +241,22 @@ extern int x_scsi_old_abort(Scsi_Cmnd *); extern int x_scsi_old_reset(Scsi_Cmnd *, unsigned int); #endif -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,28) +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,45) +extern int x_scsi_bios_param(struct scsi_device * sdev, struct block_device *bdev, + sector_t capacity, int *ip); +#elif LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,28) extern int x_scsi_bios_param(Disk *, struct block_device *, int *); #else extern int x_scsi_bios_param(Disk *, kdev_t, int *); #endif -extern void x_scsi_select_queue_depths(struct Scsi_Host *, Scsi_Device *); extern void x_scsi_taskmgmt_bh(void *); +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,44) +extern int x_scsi_slave_attach(Scsi_Device *); +#else +extern void x_scsi_select_queue_depths(struct Scsi_Host *, Scsi_Device *); +#endif + +extern int x_scsi_proc_info(char *, char **, off_t, int, int, int); #if LINUX_VERSION_CODE < KERNEL_VERSION(2,3,0) #define PROC_SCSI_DECL @@ -245,56 +266,84 @@ #ifdef MPT_SCSI_USE_NEW_EH -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,1) +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,44) + +#define MPT_SCSIHOST { \ + PROC_SCSI_DECL \ + .proc_info = x_scsi_proc_info, \ + .name = "MPT SCSI Host", \ + .detect = x_scsi_detect, \ + .release = x_scsi_release, \ + .info = x_scsi_info, \ + .command = NULL, \ + .queuecommand = x_scsi_queuecommand, \ + .slave_attach = x_scsi_slave_attach, \ + .eh_strategy_handler = NULL, \ + .eh_abort_handler = x_scsi_abort, \ + .eh_device_reset_handler = x_scsi_dev_reset, \ + .eh_bus_reset_handler = x_scsi_bus_reset, \ + .eh_host_reset_handler = x_scsi_host_reset, \ + .bios_param = x_scsi_bios_param, \ + .can_queue = MPT_SCSI_CAN_QUEUE, \ + .this_id = -1, \ + .sg_tablesize = MPT_SCSI_SG_DEPTH, \ + .max_sectors = MPT_SCSI_MAX_SECTORS, \ + .cmd_per_lun = MPT_SCSI_CMD_PER_LUN, \ + .unchecked_isa_dma = 0, \ + .use_clustering = ENABLE_CLUSTERING, \ +} + +#elif LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,1) #define MPT_SCSIHOST { \ - next: NULL, \ PROC_SCSI_DECL \ - name: "MPT SCSI Host", \ - detect: x_scsi_detect, \ - release: x_scsi_release, \ - info: x_scsi_info, \ - command: NULL, \ - queuecommand: x_scsi_queuecommand, \ - eh_strategy_handler: NULL, \ - eh_abort_handler: x_scsi_abort, \ - eh_device_reset_handler: x_scsi_dev_reset, \ - eh_bus_reset_handler: x_scsi_bus_reset, \ - eh_host_reset_handler: x_scsi_host_reset, \ - bios_param: x_scsi_bios_param, \ - can_queue: MPT_SCSI_CAN_QUEUE, \ - this_id: -1, \ - sg_tablesize: MPT_SCSI_SG_DEPTH, \ - max_sectors: MPT_SCSI_MAX_SECTORS, \ - cmd_per_lun: MPT_SCSI_CMD_PER_LUN, \ - unchecked_isa_dma: 0, \ - use_clustering: ENABLE_CLUSTERING, \ + .proc_info = x_scsi_proc_info, \ + .name = "MPT SCSI Host", \ + .detect = x_scsi_detect, \ + .release = x_scsi_release, \ + .info = x_scsi_info, \ + .command = NULL, \ + .queuecommand = x_scsi_queuecommand, \ + .eh_strategy_handler = NULL, \ + .eh_abort_handler = x_scsi_abort, \ + .eh_device_reset_handler = x_scsi_dev_reset, \ + .eh_bus_reset_handler = x_scsi_bus_reset, \ + .eh_host_reset_handler = x_scsi_host_reset, \ + .bios_param = x_scsi_bios_param, \ + .can_queue = MPT_SCSI_CAN_QUEUE, \ + .this_id = -1, \ + .sg_tablesize = MPT_SCSI_SG_DEPTH, \ + .max_sectors = MPT_SCSI_MAX_SECTORS, \ + .cmd_per_lun = MPT_SCSI_CMD_PER_LUN, \ + .unchecked_isa_dma = 0, \ + .use_clustering = ENABLE_CLUSTERING, \ } #else /* LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,1) */ #define MPT_SCSIHOST { \ - next: NULL, \ + .next = NULL, \ PROC_SCSI_DECL \ - name: "MPT SCSI Host", \ - detect: x_scsi_detect, \ - release: x_scsi_release, \ - info: x_scsi_info, \ - command: NULL, \ - queuecommand: x_scsi_queuecommand, \ - eh_strategy_handler: NULL, \ - eh_abort_handler: x_scsi_abort, \ - eh_device_reset_handler: x_scsi_dev_reset, \ - eh_bus_reset_handler: x_scsi_bus_reset, \ - eh_host_reset_handler: NULL, \ - bios_param: x_scsi_bios_param, \ - can_queue: MPT_SCSI_CAN_QUEUE, \ - this_id: -1, \ - sg_tablesize: MPT_SCSI_SG_DEPTH, \ - cmd_per_lun: MPT_SCSI_CMD_PER_LUN, \ - unchecked_isa_dma: 0, \ - use_clustering: ENABLE_CLUSTERING, \ - use_new_eh_code: 1 \ + .proc_info = x_scsi_proc_info, \ + .name = "MPT SCSI Host", \ + .detect = x_scsi_detect, \ + .release = x_scsi_release, \ + .info = x_scsi_info, \ + .command = NULL, \ + .queuecommand = x_scsi_queuecommand, \ + .eh_strategy_handler = NULL, \ + .eh_abort_handler = x_scsi_abort, \ + .eh_device_reset_handler = x_scsi_dev_reset, \ + .eh_bus_reset_handler = x_scsi_bus_reset, \ + .eh_host_reset_handler = NULL, \ + .bios_param = x_scsi_bios_param, \ + .can_queue = MPT_SCSI_CAN_QUEUE, \ + .this_id = -1, \ + .sg_tablesize = MPT_SCSI_SG_DEPTH, \ + .cmd_per_lun = MPT_SCSI_CMD_PER_LUN, \ + .unchecked_isa_dma = 0, \ + .use_clustering = ENABLE_CLUSTERING, \ + .use_new_eh_code = 1 \ } #endif /* LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,1) */ @@ -302,23 +351,23 @@ #else /* MPT_SCSI_USE_NEW_EH */ #define MPT_SCSIHOST { \ - next: NULL, \ + .next = NULL, \ PROC_SCSI_DECL \ - name: "MPT SCSI Host", \ - detect: x_scsi_detect, \ - release: x_scsi_release, \ - info: x_scsi_info, \ - command: NULL, \ - queuecommand: x_scsi_queuecommand, \ - abort: x_scsi_old_abort, \ - reset: x_scsi_old_reset, \ - bios_param: x_scsi_bios_param, \ - can_queue: MPT_SCSI_CAN_QUEUE, \ - this_id: -1, \ - sg_tablesize: MPT_SCSI_SG_DEPTH, \ - cmd_per_lun: MPT_SCSI_CMD_PER_LUN, \ - unchecked_isa_dma: 0, \ - use_clustering: ENABLE_CLUSTERING \ + .name = "MPT SCSI Host", \ + .detect = x_scsi_detect, \ + .release = x_scsi_release, \ + .info = x_scsi_info, \ + .command = NULL, \ + .queuecommand = x_scsi_queuecommand, \ + .abort = x_scsi_old_abort, \ + .reset = x_scsi_old_reset, \ + .bios_param = x_scsi_bios_param, \ + .can_queue = MPT_SCSI_CAN_QUEUE, \ + .this_id = -1, \ + .sg_tablesize = MPT_SCSI_SG_DEPTH, \ + .cmd_per_lun = MPT_SCSI_CMD_PER_LUN, \ + .unchecked_isa_dma = 0, \ + .use_clustering = ENABLE_CLUSTERING \ } #endif /* MPT_SCSI_USE_NEW_EH */ diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/mtd/maps/Config.in linux.21rc1-ac1/drivers/mtd/maps/Config.in --- linux.21rc1/drivers/mtd/maps/Config.in 2003-04-22 16:39:35.000000000 +0100 +++ linux.21rc1-ac1/drivers/mtd/maps/Config.in 2003-04-22 16:44:37.000000000 +0100 @@ -19,7 +19,7 @@ if [ "$CONFIG_X86" = "y" ]; then dep_tristate ' CFI Flash device mapped on Photron PNC-2000' CONFIG_MTD_PNC2000 $CONFIG_MTD_CFI $CONFIG_MTD_PARTITIONS - dep_tristate ' CFI Flash device mapped on AMD SC520 CDP' CONFIG_MTD_SC520CDP $CONFIG_MTD_CFI + dep_tristate ' CFI Flash device mapped on AMD SC520 CDP' CONFIG_MTD_SC520CDP $CONFIG_MTD_CFI $CONFIG_MTD_CONCAT dep_tristate ' CFI Flash device mapped on AMD NetSc520' CONFIG_MTD_NETSC520 $CONFIG_MTD_CFI $CONFIG_MTD_PARTITIONS dep_tristate ' CFI Flash device mapped on Arcom SBC-GXx boards' CONFIG_MTD_SBC_GXX $CONFIG_MTD_CFI_INTELEXT $CONFIG_MTD_PARTITIONS dep_tristate ' CFI Flash device mapped on Arcom ELAN-104NC' CONFIG_MTD_ELAN_104NC $CONFIG_MTD_CFI_INTELEXT $CONFIG_MTD_PARTITIONS diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/net/3c59x.c linux.21rc1-ac1/drivers/net/3c59x.c --- linux.21rc1/drivers/net/3c59x.c 2003-04-22 16:39:35.000000000 +0100 +++ linux.21rc1-ac1/drivers/net/3c59x.c 2003-04-22 16:44:37.000000000 +0100 @@ -166,6 +166,11 @@ - Rename wait_for_completion() to issue_and_wait() to avoid completion.h clash. + LK1.1.18ac 01Jul02 akpm + - Fix for undocumented transceiver power-up bit on some 3c566B's + (Donald Becker, Rahul Karnik) + + - See http://www.uow.edu.au/~andrewm/linux/#3c59x-2.3 for more details. - Also see Documentation/networking/vortex.txt */ @@ -181,8 +186,8 @@ #define DRV_NAME "3c59x" -#define DRV_VERSION "LK1.1.16" -#define DRV_RELDATE "19 July 2001" +#define DRV_VERSION "LK1.1.18-ac" +#define DRV_RELDATE "1 July 2002" @@ -400,7 +405,7 @@ EEPROM_8BIT=0x10, /* AKPM: Uses 0x230 as the base bitmaps for EEPROM reads */ HAS_PWR_CTRL=0x20, HAS_MII=0x40, HAS_NWAY=0x80, HAS_CB_FNS=0x100, INVERT_MII_PWR=0x200, INVERT_LED_PWR=0x400, MAX_COLLISION_RESET=0x800, - EEPROM_OFFSET=0x1000, HAS_HWCKSM=0x2000 }; + EEPROM_OFFSET=0x1000, HAS_HWCKSM=0x2000, WNO_XCVR_PWR=0x4000 }; enum vortex_chips { CH_3C590 = 0, @@ -424,6 +429,7 @@ CH_3C905B_2, CH_3C905B_FX, CH_3C905C, + CH_3C905C2, CH_3C980, CH_3C9805, @@ -495,6 +501,8 @@ PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, }, {"3c905C Tornado", PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_HWCKSM, 128, }, + {"3c905C Tornado 2", + PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_HWCKSM, 128, }, {"3c980 Cyclone", PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, }, {"3c982 Dual Port Server Cyclone", @@ -509,7 +517,7 @@ HAS_HWCKSM, 128, }, {"3c556B Laptop Hurricane", PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|EEPROM_OFFSET|HAS_CB_FNS|INVERT_MII_PWR| - HAS_HWCKSM, 128, }, + WNO_XCVR_PWR|HAS_HWCKSM, 128, }, {"3c575 [Megahertz] 10/100 LAN CardBus", PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG|HAS_MII|EEPROM_8BIT, 128, }, @@ -561,6 +569,7 @@ { 0x10B7, 0x9058, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905B_2 }, { 0x10B7, 0x905A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905B_FX }, { 0x10B7, 0x9200, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905C }, + { 0x10B7, 0x9201, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905C2 }, { 0x10B7, 0x9800, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C980 }, { 0x10B7, 0x9805, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C9805 }, @@ -578,7 +587,6 @@ { 0x10B7, 0x6564, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3CCFEM656_1 }, { 0x10B7, 0x4500, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C450 }, - { 0x10B7, 0x9201, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C920 }, {0,} /* 0 terminated list. */ }; MODULE_DEVICE_TABLE(pci, vortex_pci_tbl); @@ -1190,6 +1198,10 @@ if (vp->drv_flags & INVERT_MII_PWR) n |= 0x4000; outw(n, ioaddr + Wn2_ResetOptions); + if (vp->drv_flags & WNO_XCVR_PWR) { + EL3WINDOW(0); + outw(0x0800, ioaddr); + } } /* Extract our information from the EEPROM data. */ diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/net/aironet4500_core.c linux.21rc1-ac1/drivers/net/aironet4500_core.c --- linux.21rc1/drivers/net/aironet4500_core.c 2003-04-22 16:38:38.000000000 +0100 +++ linux.21rc1-ac1/drivers/net/aironet4500_core.c 2003-04-22 16:44:37.000000000 +0100 @@ -2676,10 +2676,8 @@ #endif //awc_dump_registers(dev); - if (adhoc & !max_mtu) - max_mtu= 2250; - else if (!max_mtu) - max_mtu= 1500; + if (!max_mtu) + max_mtu= adhoc ? 2250 : 1500; priv->sleeping_bap = 1; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/net/arcnet/arcnet.c linux.21rc1-ac1/drivers/net/arcnet/arcnet.c --- linux.21rc1/drivers/net/arcnet/arcnet.c 2003-04-22 16:38:38.000000000 +0100 +++ linux.21rc1-ac1/drivers/net/arcnet/arcnet.c 2003-04-22 16:44:37.000000000 +0100 @@ -57,8 +57,8 @@ /* "do nothing" functions for protocol drivers */ static void null_rx(struct net_device *dev, int bufnum, struct archdr *pkthdr, int length); -static int null_build_header(struct sk_buff *skb, unsigned short type, - uint8_t daddr); +static int null_build_header(struct sk_buff *skb, struct net_device *dev, + unsigned short type, uint8_t daddr); static int null_prepare_tx(struct net_device *dev, struct archdr *pkt, int length, int bufnum); @@ -512,7 +512,7 @@ arc_bcast_proto->suffix); proto = arc_bcast_proto; } - return proto->build_header(skb, type, _daddr); + return proto->build_header(skb, dev, type, _daddr); } @@ -528,6 +528,7 @@ int status = 0; /* default is failure */ unsigned short type; uint8_t daddr=0; + struct ArcProto *proto; if (skb->nh.raw - skb->mac.raw != 2) { BUGMSG(D_NORMAL, @@ -556,7 +557,8 @@ return 0; /* add the _real_ header this time! */ - arc_proto_map[lp->default_proto[daddr]]->build_header(skb, type, daddr); + proto = arc_proto_map[lp->default_proto[daddr]]; + proto->build_header(skb, dev, type, daddr); return 1; /* success */ } @@ -986,10 +988,9 @@ } -static int null_build_header(struct sk_buff *skb, unsigned short type, - uint8_t daddr) +static int null_build_header(struct sk_buff *skb, struct net_device *dev, + unsigned short type, uint8_t daddr) { - struct net_device *dev = skb->dev; struct arcnet_local *lp = (struct arcnet_local *) dev->priv; BUGMSG(D_PROTO, diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/net/arcnet/arc-rawmode.c linux.21rc1-ac1/drivers/net/arcnet/arc-rawmode.c --- linux.21rc1/drivers/net/arcnet/arc-rawmode.c 2003-04-22 16:38:38.000000000 +0100 +++ linux.21rc1-ac1/drivers/net/arcnet/arc-rawmode.c 2003-04-22 16:44:37.000000000 +0100 @@ -37,8 +37,8 @@ static void rx(struct net_device *dev, int bufnum, struct archdr *pkthdr, int length); -static int build_header(struct sk_buff *skb, unsigned short type, - uint8_t daddr); +static int build_header(struct sk_buff *skb, struct net_device *dev, + unsigned short type, uint8_t daddr); static int prepare_tx(struct net_device *dev, struct archdr *pkt, int length, int bufnum); @@ -137,10 +137,9 @@ * Create the ARCnet hard/soft headers for raw mode. * There aren't any soft headers in raw mode - not even the protocol id. */ -static int build_header(struct sk_buff *skb, unsigned short type, - uint8_t daddr) +static int build_header(struct sk_buff *skb, struct net_device *dev, + unsigned short type, uint8_t daddr) { - struct net_device *dev = skb->dev; int hdr_size = ARC_HDR_SIZE; struct archdr *pkt = (struct archdr *) skb_push(skb, hdr_size); diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/net/arcnet/rfc1051.c linux.21rc1-ac1/drivers/net/arcnet/rfc1051.c --- linux.21rc1/drivers/net/arcnet/rfc1051.c 2003-04-22 16:38:38.000000000 +0100 +++ linux.21rc1-ac1/drivers/net/arcnet/rfc1051.c 2003-04-22 16:44:37.000000000 +0100 @@ -37,8 +37,8 @@ static unsigned short type_trans(struct sk_buff *skb, struct net_device *dev); static void rx(struct net_device *dev, int bufnum, struct archdr *pkthdr, int length); -static int build_header(struct sk_buff *skb, unsigned short type, - uint8_t daddr); +static int build_header(struct sk_buff *skb, struct net_device *dev, + unsigned short type, uint8_t daddr); static int prepare_tx(struct net_device *dev, struct archdr *pkt, int length, int bufnum); @@ -170,10 +170,9 @@ /* * Create the ARCnet hard/soft headers for RFC1051. */ -static int build_header(struct sk_buff *skb, unsigned short type, - uint8_t daddr) +static int build_header(struct sk_buff *skb, struct net_device *dev, + unsigned short type, uint8_t daddr) { - struct net_device *dev = skb->dev; struct arcnet_local *lp = (struct arcnet_local *) dev->priv; int hdr_size = ARC_HDR_SIZE + RFC1051_HDR_SIZE; struct archdr *pkt = (struct archdr *) skb_push(skb, hdr_size); diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/net/arcnet/rfc1201.c linux.21rc1-ac1/drivers/net/arcnet/rfc1201.c --- linux.21rc1/drivers/net/arcnet/rfc1201.c 2003-04-22 16:38:38.000000000 +0100 +++ linux.21rc1-ac1/drivers/net/arcnet/rfc1201.c 2003-04-22 16:44:37.000000000 +0100 @@ -36,8 +36,8 @@ static unsigned short type_trans(struct sk_buff *skb, struct net_device *dev); static void rx(struct net_device *dev, int bufnum, struct archdr *pkthdr, int length); -static int build_header(struct sk_buff *skb, unsigned short type, - uint8_t daddr); +static int build_header(struct sk_buff *skb, struct net_device *dev, + unsigned short type, uint8_t daddr); static int prepare_tx(struct net_device *dev, struct archdr *pkt, int length, int bufnum); static int continue_tx(struct net_device *dev, int bufnum); @@ -375,10 +375,9 @@ /* Create the ARCnet hard/soft headers for RFC1201. */ -static int build_header(struct sk_buff *skb, unsigned short type, - uint8_t daddr) +static int build_header(struct sk_buff *skb, struct net_device *dev, + unsigned short type, uint8_t daddr) { - struct net_device *dev = skb->dev; struct arcnet_local *lp = (struct arcnet_local *) dev->priv; int hdr_size = ARC_HDR_SIZE + RFC1201_HDR_SIZE; struct archdr *pkt = (struct archdr *) skb_push(skb, hdr_size); diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/net/Config.in linux.21rc1-ac1/drivers/net/Config.in --- linux.21rc1/drivers/net/Config.in 2003-04-22 16:39:35.000000000 +0100 +++ linux.21rc1-ac1/drivers/net/Config.in 2003-04-22 16:44:37.000000000 +0100 @@ -185,7 +185,7 @@ dep_tristate ' Davicom DM910x/DM980x support' CONFIG_DM9102 $CONFIG_PCI dep_tristate ' EtherExpressPro/100 support (eepro100, original Becker driver)' CONFIG_EEPRO100 $CONFIG_PCI if [ "$CONFIG_VISWS" = "y" ]; then - define_mbool CONFIG_EEPRO100_PIO y + define_bool CONFIG_EEPRO100_PIO y else dep_mbool ' Use PIO instead of MMIO' CONFIG_EEPRO100_PIO $CONFIG_EEPRO100 fi diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/net/pcnet32.c linux.21rc1-ac1/drivers/net/pcnet32.c --- linux.21rc1/drivers/net/pcnet32.c 2003-04-22 16:39:36.000000000 +0100 +++ linux.21rc1-ac1/drivers/net/pcnet32.c 2003-04-22 16:44:37.000000000 +0100 @@ -1,5 +1,5 @@ -/* pcnet32.c: An AMD PCnet32 ethernet driver for linux. */ -/* +/* pcnet32.c: An AMD PCnet32 ethernet driver for linux. + * * Copyright 1996-1999 Thomas Bogendoerfer * * Derived from the lance driver written 1993,1994,1995 by Donald Becker. @@ -543,7 +543,7 @@ /* initialize variables */ fdx = mii = fset = dxsuflo = ltint = 0; chip_version = (chip_version >> 12) & 0xffff; - + switch (chip_version) { case 0x2420: chipname = "PCnet/PCI 79C970"; /* PCI */ @@ -1175,19 +1175,12 @@ if (err_status & 0x04000000) lp->stats.tx_aborted_errors++; if (err_status & 0x08000000) lp->stats.tx_carrier_errors++; if (err_status & 0x10000000) lp->stats.tx_window_errors++; -#ifndef DO_DXSUFLO if (err_status & 0x40000000) { lp->stats.tx_fifo_errors++; - /* Ackk! On FIFO errors the Tx unit is turned off! */ - /* Remove this verbosity later! */ - printk(KERN_ERR "%s: Tx FIFO error! CSR0=%4.4x\n", - dev->name, csr0); - must_restart = 1; - } -#else - if (err_status & 0x40000000) { - lp->stats.tx_fifo_errors++; - if (! lp->dxsuflo) { /* If controller doesn't recover ... */ +#ifdef DO_DXSUFLO + if (! lp->dxsuflo) +#endif + { /* If controller doesn't recover ... */ /* Ackk! On FIFO errors the Tx unit is turned off! */ /* Remove this verbosity later! */ printk(KERN_ERR "%s: Tx FIFO error! CSR0=%4.4x\n", @@ -1195,7 +1188,6 @@ must_restart = 1; } } -#endif } else { if (status & 0x1800) lp->stats.collisions++; @@ -1722,12 +1714,13 @@ } } + module_init(pcnet32_init_module); module_exit(pcnet32_cleanup_module); /* * Local variables: - * compile-command: "gcc -D__KERNEL__ -I/usr/src/linux/net/inet -Wall -Wstrict-prototypes -O6 -m486 -c pcnet32.c" + * compile-command: "gcc -D__KERNEL__ -I/usr/src/linux/include/linux -Wall -Wstrict-prototypes -O2 -m486 -c pcnet32.c" * c-indent-level: 4 * tab-width: 8 * End: diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/net/r8169.c linux.21rc1-ac1/drivers/net/r8169.c --- linux.21rc1/drivers/net/r8169.c 2003-04-22 16:39:36.000000000 +0100 +++ linux.21rc1-ac1/drivers/net/r8169.c 2003-04-22 16:44:37.000000000 +0100 @@ -1110,7 +1110,7 @@ .name = MODULENAME, .id_table = rtl8169_pci_tbl, .probe = rtl8169_init_one, - .remove = rtl8169_remove_one, + .remove = __devexit_p(rtl8169_remove_one), .suspend = NULL, .resume = NULL, }; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/net/sis900.c linux.21rc1-ac1/drivers/net/sis900.c --- linux.21rc1/drivers/net/sis900.c 2003-04-22 16:39:36.000000000 +0100 +++ linux.21rc1-ac1/drivers/net/sis900.c 2003-04-22 19:10:48.000000000 +0100 @@ -125,6 +125,7 @@ { "ICS LAN PHY", 0x0015, 0xF440, LAN }, { "NS 83851 PHY", 0x2000, 0x5C20, MIX }, { "Realtek RTL8201 PHY", 0x0000, 0x8200, LAN }, + { "VIA 6103 PHY", 0x0101, 0x8f20, LAN }, {0,}, }; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/net/sk98lin/build_no.c linux.21rc1-ac1/drivers/net/sk98lin/build_no.c --- linux.21rc1/drivers/net/sk98lin/build_no.c 2003-04-22 16:39:36.000000000 +0100 +++ linux.21rc1-ac1/drivers/net/sk98lin/build_no.c 2003-04-22 16:44:37.000000000 +0100 @@ -7,4 +7,3 @@ static const char SysKonnectBuildNumber[] = "@(#)SK-BUILD: 6.02 (20021219) PL: ALL.01"; -^Z \ No newline at end of file diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/net/tun.c linux.21rc1-ac1/drivers/net/tun.c --- linux.21rc1/drivers/net/tun.c 2003-04-22 16:38:38.000000000 +0100 +++ linux.21rc1-ac1/drivers/net/tun.c 2003-04-22 16:44:37.000000000 +0100 @@ -188,7 +188,7 @@ size_t len = count; if (!(tun->flags & TUN_NO_PI)) { - if ((len -= sizeof(pi)) < 0) + if ((len -= sizeof(pi)) > len) return -EINVAL; memcpy_fromiovec((void *)&pi, iv, sizeof(pi)); diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/net/wan/8253x/8253xsyn.c linux.21rc1-ac1/drivers/net/wan/8253x/8253xsyn.c --- linux.21rc1/drivers/net/wan/8253x/8253xsyn.c 2003-04-22 16:38:37.000000000 +0100 +++ linux.21rc1-ac1/drivers/net/wan/8253x/8253xsyn.c 2003-04-22 16:44:37.000000000 +0100 @@ -1030,7 +1030,7 @@ } #if 0 - if ((tty->count == 1) && (port->count != 0)) + if ((atomic_read(&tty->count) == 1) && (port->count != 0)) { /* * Uh, oh. tty->count is 1, which means that the tty diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/net/wan/c101.c linux.21rc1-ac1/drivers/net/wan/c101.c --- linux.21rc1/drivers/net/wan/c101.c 2003-04-22 16:39:39.000000000 +0100 +++ linux.21rc1-ac1/drivers/net/wan/c101.c 2003-04-22 16:44:37.000000000 +0100 @@ -1,12 +1,11 @@ /* * Moxa C101 synchronous serial card driver for Linux * - * Copyright (C) 2000-2002 Krzysztof Halasa + * Copyright (C) 2000-2003 Krzysztof Halasa * * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. + * under the terms of version 2 of the GNU General Public License + * as published by the Free Software Foundation. * * For information see http://hq.pm.waw.pl/hdlc/ * @@ -31,7 +30,7 @@ #include "hd64570.h" -static const char* version = "Moxa C101 driver version: 1.10"; +static const char* version = "Moxa C101 driver version: 1.12"; static const char* devname = "C101"; #define C101_PAGE 0x1D00 @@ -78,7 +77,12 @@ #define sca_in(reg, card) readb((card)->win0base + C101_SCA + (reg)) #define sca_out(value, reg, card) writeb(value, (card)->win0base + C101_SCA + (reg)) #define sca_inw(reg, card) readw((card)->win0base + C101_SCA + (reg)) -#define sca_outw(value, reg, card) writew(value, (card)->win0base + C101_SCA + (reg)) + +/* EDA address register must be set in EDAL, EDAH order - 8 bit ISA bus */ +#define sca_outw(value, reg, card) do { \ + writeb(value & 0xFF, (card)->win0base + C101_SCA + (reg)); \ + writeb((value >> 8 ) & 0xFF, (card)->win0base + C101_SCA + (reg+1));\ +} while(0) #define port_to_card(port) (port) #define log_node(port) (0) @@ -352,7 +356,7 @@ c101_run(irq, ram); if (*hw == '\x0') - return 0; + return first_card ? 0 : -ENOSYS; }while(*hw++ == ':'); printk(KERN_ERR "c101: invalid hardware parameters\n"); diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/net/wan/Config.in linux.21rc1-ac1/drivers/net/wan/Config.in --- linux.21rc1/drivers/net/wan/Config.in 2003-04-22 16:39:39.000000000 +0100 +++ linux.21rc1-ac1/drivers/net/wan/Config.in 2003-04-22 16:44:37.000000000 +0100 @@ -68,6 +68,7 @@ tristate ' Generic HDLC layer' CONFIG_HDLC if [ "$CONFIG_HDLC" != "n" ]; then bool ' Raw HDLC support' CONFIG_HDLC_RAW + bool ' Raw HDLC Ethernet device support' CONFIG_HDLC_RAW_ETH bool ' Cisco HDLC support' CONFIG_HDLC_CISCO bool ' Frame Relay support' CONFIG_HDLC_FR bool ' Synchronous Point-to-Point Protocol (PPP) support' CONFIG_HDLC_PPP @@ -76,6 +77,18 @@ else comment ' X.25/LAPB support is disabled' fi + if [ "$CONFIG_PCI" != "n" ]; then + dep_tristate ' Cyclades-PC300 support (RS-232/V.35, X.21, T1/E1 boards)' CONFIG_PC300 $CONFIG_HDLC + if [ "$CONFIG_PC300" != "n" ]; then + if ["$CONFIG_PPP" != "n" -a "$CONFIG_PPP_MULTLINK" != "n" -a "$CONFIG_PPP_SYNCTTY" != "n" -a "$CONFIG_HDLC_PPP" = "y"]; + then + bool ' Cyclades-PC300 MLPPP support' CONFIG_PC300_MLPPP + else + comment ' Cyclades-PC300 MLPPP support is disabled. You have to enable PPP, PPP_MULTILINK' + comment ' PPP_SYNCTTY and HDLC_PPP to use this package.' + fi + fi + fi dep_tristate ' SDL RISCom/N2 support' CONFIG_N2 $CONFIG_HDLC dep_tristate ' Moxa C101 support' CONFIG_C101 $CONFIG_HDLC dep_tristate ' FarSync T-Series support' CONFIG_FARSYNC $CONFIG_HDLC diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/net/wan/cosa.c linux.21rc1-ac1/drivers/net/wan/cosa.c --- linux.21rc1/drivers/net/wan/cosa.c 2003-04-22 16:38:37.000000000 +0100 +++ linux.21rc1-ac1/drivers/net/wan/cosa.c 2003-04-22 16:44:37.000000000 +0100 @@ -1071,7 +1071,8 @@ return -EPERM; } - if (get_user(addr, &(d->addr)) || + if (verify_area(VERIFY_READ, d, sizeof(*d)) || + __get_user(addr, &(d->addr)) || __get_user(len, &(d->len)) || __get_user(code, &(d->code))) return -EFAULT; @@ -1079,7 +1080,7 @@ /* If something fails, force the user to reset the card */ cosa->firmware_status &= ~COSA_FW_RESET; - if ((i=readmem(cosa, d->code, len, addr)) < 0) { + if ((i=readmem(cosa, code, len, addr)) < 0) { printk(KERN_NOTICE "cosa%d: reading memory failed: %d\n", cosa->num, i); return -EIO; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/net/wan/dscc4.c linux.21rc1-ac1/drivers/net/wan/dscc4.c --- linux.21rc1/drivers/net/wan/dscc4.c 2003-04-22 16:39:39.000000000 +0100 +++ linux.21rc1-ac1/drivers/net/wan/dscc4.c 2003-04-22 16:44:37.000000000 +0100 @@ -487,9 +487,9 @@ skb = dev_alloc_skb(len); dpriv->rx_skbuff[dirty] = skb; if (skb) { - skb->dev = dev; - skb->protocol = htons(ETH_P_HDLC); - skb->mac.raw = skb->data; + skb->dev = dev; + skb->protocol = hdlc_type_trans(skb, dev); + skb->mac.raw = skb->data; rx_fd->data = pci_map_single(dpriv->pci_priv->pdev, skb->data, len, PCI_DMA_FROMDEVICE); } else { @@ -1757,7 +1757,7 @@ (++i%TX_RING_SIZE)*sizeof(*tx_fd)); } while (i < TX_RING_SIZE); - if (dscc4_init_dummy_skb(dpriv) < 0) + if (dscc4_init_dummy_skb(dpriv) == NULL) goto err_free_dma_tx; memset(dpriv->rx_skbuff, 0, sizeof(struct sk_buff *)*RX_RING_SIZE); diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/net/wan/farsync.c linux.21rc1-ac1/drivers/net/wan/farsync.c --- linux.21rc1/drivers/net/wan/farsync.c 2003-04-22 16:39:39.000000000 +0100 +++ linux.21rc1-ac1/drivers/net/wan/farsync.c 2003-04-22 16:44:37.000000000 +0100 @@ -764,7 +764,7 @@ /* Push upstream */ skb->mac.raw = skb->data; skb->dev = hdlc_to_dev ( &port->hdlc ); - skb->protocol = htons ( ETH_P_HDLC ); + skb->protocol = hdlc_type_trans(skb, skb->dev); netif_rx ( skb ); port_to_dev ( port )->last_rx = jiffies; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/net/wan/hd64572.h linux.21rc1-ac1/drivers/net/wan/hd64572.h --- linux.21rc1/drivers/net/wan/hd64572.h 1970-01-01 01:00:00.000000000 +0100 +++ linux.21rc1-ac1/drivers/net/wan/hd64572.h 2003-04-22 16:44:37.000000000 +0100 @@ -0,0 +1,433 @@ +/* + * hd64572.h Description of the Hitachi HD64572 (SCA-II), valid for + * CPU modes 0 & 2. + * + * Author: Ivan Passos + * + * Copyright: (c) 2000-2001 Cyclades Corp. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + * + */ + +#ifndef _HD64572_H +#define _HD64572_H + +/* Illegal Access Register */ +#define ILAR 0x00 + +/* Wait Controller Registers */ +#define PABR0L 0x20 /* Physical Addr Boundary Register 0 L */ +#define PABR0H 0x21 /* Physical Addr Boundary Register 0 H */ +#define PABR1L 0x22 /* Physical Addr Boundary Register 1 L */ +#define PABR1H 0x23 /* Physical Addr Boundary Register 1 H */ +#define WCRL 0x24 /* Wait Control Register L */ +#define WCRM 0x25 /* Wait Control Register M */ +#define WCRH 0x26 /* Wait Control Register H */ + +/* Interrupt Registers */ +#define IVR 0x60 /* Interrupt Vector Register */ +#define IMVR 0x64 /* Interrupt Modified Vector Register */ +#define ITCR 0x68 /* Interrupt Control Register */ +#define ISR0 0x6c /* Interrupt Status Register 0 */ +#define ISR1 0x70 /* Interrupt Status Register 1 */ +#define IER0 0x74 /* Interrupt Enable Register 0 */ +#define IER1 0x78 /* Interrupt Enable Register 1 */ + +/* Register Access Macros (chan is 0 or 1 in _any_ case) */ +#define M_REG(reg, chan) (reg + 0x80*chan) /* MSCI */ +#define DRX_REG(reg, chan) (reg + 0x40*chan) /* DMA Rx */ +#define DTX_REG(reg, chan) (reg + 0x20*(2*chan + 1)) /* DMA Tx */ +#define TRX_REG(reg, chan) (reg + 0x20*chan) /* Timer Rx */ +#define TTX_REG(reg, chan) (reg + 0x10*(2*chan + 1)) /* Timer Tx */ +#define ST_REG(reg, chan) (reg + 0x80*chan) /* Status Cnt */ +#define IR0_DRX(val, chan) ((val)<<(8*(chan))) /* Int DMA Rx */ +#define IR0_DTX(val, chan) ((val)<<(4*(2*chan + 1))) /* Int DMA Tx */ +#define IR0_M(val, chan) ((val)<<(8*(chan))) /* Int MSCI */ + +/* MSCI Channel Registers */ +#define MD0 0x138 /* Mode reg 0 */ +#define MD1 0x139 /* Mode reg 1 */ +#define MD2 0x13a /* Mode reg 2 */ +#define MD3 0x13b /* Mode reg 3 */ +#define CTL 0x130 /* Control reg */ +#define RXS 0x13c /* RX clock source */ +#define TXS 0x13d /* TX clock source */ +#define EXS 0x13e /* External clock input selection */ +#define TMCT 0x144 /* Time constant (Tx) */ +#define TMCR 0x145 /* Time constant (Rx) */ +#define CMD 0x128 /* Command reg */ +#define ST0 0x118 /* Status reg 0 */ +#define ST1 0x119 /* Status reg 1 */ +#define ST2 0x11a /* Status reg 2 */ +#define ST3 0x11b /* Status reg 3 */ +#define ST4 0x11c /* Status reg 4 */ +#define FST 0x11d /* frame Status reg */ +#define IE0 0x120 /* Interrupt enable reg 0 */ +#define IE1 0x121 /* Interrupt enable reg 1 */ +#define IE2 0x122 /* Interrupt enable reg 2 */ +#define IE4 0x124 /* Interrupt enable reg 4 */ +#define FIE 0x125 /* Frame Interrupt enable reg */ +#define SA0 0x140 /* Syn Address reg 0 */ +#define SA1 0x141 /* Syn Address reg 1 */ +#define IDL 0x142 /* Idle register */ +#define TRBL 0x100 /* TX/RX buffer reg L */ +#define TRBK 0x101 /* TX/RX buffer reg K */ +#define TRBJ 0x102 /* TX/RX buffer reg J */ +#define TRBH 0x103 /* TX/RX buffer reg H */ +#define TRC0 0x148 /* TX Ready control reg 0 */ +#define TRC1 0x149 /* TX Ready control reg 1 */ +#define RRC 0x14a /* RX Ready control reg */ +#define CST0 0x108 /* Current Status Register 0 */ +#define CST1 0x109 /* Current Status Register 1 */ +#define CST2 0x10a /* Current Status Register 2 */ +#define CST3 0x10b /* Current Status Register 3 */ +#define GPO 0x131 /* General Purpose Output Pin Ctl Reg */ +#define TFS 0x14b /* Tx Start Threshold Ctl Reg */ +#define TFN 0x143 /* Inter-transmit-frame Time Fill Ctl Reg */ +#define TBN 0x110 /* Tx Buffer Number Reg */ +#define RBN 0x111 /* Rx Buffer Number Reg */ +#define TNR0 0x150 /* Tx DMA Request Ctl Reg 0 */ +#define TNR1 0x151 /* Tx DMA Request Ctl Reg 1 */ +#define TCR 0x152 /* Tx DMA Critical Request Reg */ +#define RNR 0x154 /* Rx DMA Request Ctl Reg */ +#define RCR 0x156 /* Rx DMA Critical Request Reg */ + +/* Timer Registers */ +#define TCNTL 0x200 /* Timer Upcounter L */ +#define TCNTH 0x201 /* Timer Upcounter H */ +#define TCONRL 0x204 /* Timer Constant Register L */ +#define TCONRH 0x205 /* Timer Constant Register H */ +#define TCSR 0x206 /* Timer Control/Status Register */ +#define TEPR 0x207 /* Timer Expand Prescale Register */ + +/* DMA registers */ +#define PCR 0x40 /* DMA priority control reg */ +#define DRR 0x44 /* DMA reset reg */ +#define DMER 0x07 /* DMA Master Enable reg */ +#define BTCR 0x08 /* Burst Tx Ctl Reg */ +#define BOLR 0x0c /* Back-off Length Reg */ +#define DSR_RX(chan) (0x48 + 2*chan) /* DMA Status Reg (Rx) */ +#define DSR_TX(chan) (0x49 + 2*chan) /* DMA Status Reg (Tx) */ +#define DIR_RX(chan) (0x4c + 2*chan) /* DMA Interrupt Enable Reg (Rx) */ +#define DIR_TX(chan) (0x4d + 2*chan) /* DMA Interrupt Enable Reg (Tx) */ +#define FCT_RX(chan) (0x50 + 2*chan) /* Frame End Interrupt Counter (Rx) */ +#define FCT_TX(chan) (0x51 + 2*chan) /* Frame End Interrupt Counter (Tx) */ +#define DMR_RX(chan) (0x54 + 2*chan) /* DMA Mode Reg (Rx) */ +#define DMR_TX(chan) (0x55 + 2*chan) /* DMA Mode Reg (Tx) */ +#define DCR_RX(chan) (0x58 + 2*chan) /* DMA Command Reg (Rx) */ +#define DCR_TX(chan) (0x59 + 2*chan) /* DMA Command Reg (Tx) */ + +/* DMA Channel Registers */ +#define DARL 0x80 /* Dest Addr Register L (single-block, RX only) */ +#define DARH 0x81 /* Dest Addr Register H (single-block, RX only) */ +#define DARB 0x82 /* Dest Addr Register B (single-block, RX only) */ +#define DARBH 0x83 /* Dest Addr Register BH (single-block, RX only) */ +#define SARL 0x80 /* Source Addr Register L (single-block, TX only) */ +#define SARH 0x81 /* Source Addr Register H (single-block, TX only) */ +#define SARB 0x82 /* Source Addr Register B (single-block, TX only) */ +#define DARBH 0x83 /* Source Addr Register BH (single-block, TX only) */ +#define BARL 0x80 /* Buffer Addr Register L (chained-block) */ +#define BARH 0x81 /* Buffer Addr Register H (chained-block) */ +#define BARB 0x82 /* Buffer Addr Register B (chained-block) */ +#define BARBH 0x83 /* Buffer Addr Register BH (chained-block) */ +#define CDAL 0x84 /* Current Descriptor Addr Register L */ +#define CDAH 0x85 /* Current Descriptor Addr Register H */ +#define CDAB 0x86 /* Current Descriptor Addr Register B */ +#define CDABH 0x87 /* Current Descriptor Addr Register BH */ +#define EDAL 0x88 /* Error Descriptor Addr Register L */ +#define EDAH 0x89 /* Error Descriptor Addr Register H */ +#define EDAB 0x8a /* Error Descriptor Addr Register B */ +#define EDABH 0x8b /* Error Descriptor Addr Register BH */ +#define BFLL 0x90 /* RX Buffer Length L (only RX) */ +#define BFLH 0x91 /* RX Buffer Length H (only RX) */ +#define BCRL 0x8c /* Byte Count Register L */ +#define BCRH 0x8d /* Byte Count Register H */ + +/* Block Descriptor Structure */ +typedef struct { + unsigned long next; /* pointer to next block descriptor */ + unsigned long ptbuf; /* buffer pointer */ + unsigned short len; /* data length */ + unsigned char status; /* status */ + unsigned char filler[5]; /* alignment filler (16 bytes) */ +} pcsca_bd_t; + +/* + Descriptor Status definitions: + + Bit Transmission Reception + + 7 EOM EOM + 6 - Short Frame + 5 - Abort + 4 - Residual bit + 3 Underrun Overrun + 2 - CRC + 1 Ownership Ownership + 0 EOT - +*/ +#define DST_EOT 0x01 /* End of transmit command */ +#define DST_OSB 0x02 /* Ownership bit */ +#define DST_CRC 0x04 /* CRC Error */ +#define DST_OVR 0x08 /* Overrun */ +#define DST_UDR 0x08 /* Underrun */ +#define DST_RBIT 0x10 /* Residual bit */ +#define DST_ABT 0x20 /* Abort */ +#define DST_SHRT 0x40 /* Short Frame */ +#define DST_EOM 0x80 /* End of Message */ + +/* Status Counter Registers */ +#define CMCR 0x158 /* Counter Master Ctl Reg */ +#define TECNTL 0x160 /* Tx EOM Counter L */ +#define TECNTM 0x161 /* Tx EOM Counter M */ +#define TECNTH 0x162 /* Tx EOM Counter H */ +#define TECCR 0x163 /* Tx EOM Counter Ctl Reg */ +#define URCNTL 0x164 /* Underrun Counter L */ +#define URCNTH 0x165 /* Underrun Counter H */ +#define URCCR 0x167 /* Underrun Counter Ctl Reg */ +#define RECNTL 0x168 /* Rx EOM Counter L */ +#define RECNTM 0x169 /* Rx EOM Counter M */ +#define RECNTH 0x16a /* Rx EOM Counter H */ +#define RECCR 0x16b /* Rx EOM Counter Ctl Reg */ +#define ORCNTL 0x16c /* Overrun Counter L */ +#define ORCNTH 0x16d /* Overrun Counter H */ +#define ORCCR 0x16f /* Overrun Counter Ctl Reg */ +#define CECNTL 0x170 /* CRC Counter L */ +#define CECNTH 0x171 /* CRC Counter H */ +#define CECCR 0x173 /* CRC Counter Ctl Reg */ +#define ABCNTL 0x174 /* Abort frame Counter L */ +#define ABCNTH 0x175 /* Abort frame Counter H */ +#define ABCCR 0x177 /* Abort frame Counter Ctl Reg */ +#define SHCNTL 0x178 /* Short frame Counter L */ +#define SHCNTH 0x179 /* Short frame Counter H */ +#define SHCCR 0x17b /* Short frame Counter Ctl Reg */ +#define RSCNTL 0x17c /* Residual bit Counter L */ +#define RSCNTH 0x17d /* Residual bit Counter H */ +#define RSCCR 0x17f /* Residual bit Counter Ctl Reg */ + +/* Register Programming Constants */ + +#define IR0_DMIC 0x00000001 +#define IR0_DMIB 0x00000002 +#define IR0_DMIA 0x00000004 +#define IR0_EFT 0x00000008 +#define IR0_DMAREQ 0x00010000 +#define IR0_TXINT 0x00020000 +#define IR0_RXINTB 0x00040000 +#define IR0_RXINTA 0x00080000 +#define IR0_TXRDY 0x00100000 +#define IR0_RXRDY 0x00200000 + +#define MD0_CRC16_0 0x00 +#define MD0_CRC16_1 0x01 +#define MD0_CRC32 0x02 +#define MD0_CRC_CCITT 0x03 +#define MD0_CRCC0 0x04 +#define MD0_CRCC1 0x08 +#define MD0_AUTO_ENA 0x10 +#define MD0_ASYNC 0x00 +#define MD0_BY_MSYNC 0x20 +#define MD0_BY_BISYNC 0x40 +#define MD0_BY_EXT 0x60 +#define MD0_BIT_SYNC 0x80 +#define MD0_TRANSP 0xc0 + +#define MD1_NOADDR 0x00 +#define MD1_SADDR1 0x40 +#define MD1_SADDR2 0x80 +#define MD1_DADDR 0xc0 + +#define MD2_F_DUPLEX 0x00 +#define MD2_AUTO_ECHO 0x01 +#define MD2_LOOP_HI_Z 0x02 +#define MD2_LOOP_MIR 0x03 +#define MD2_ADPLL_X8 0x00 +#define MD2_ADPLL_X16 0x08 +#define MD2_ADPLL_X32 0x10 +#define MD2_NRZ 0x00 +#define MD2_NRZI 0x20 +#define MD2_NRZ_IEEE 0x40 +#define MD2_MANCH 0x00 +#define MD2_FM1 0x20 +#define MD2_FM0 0x40 +#define MD2_FM 0x80 + +#define CTL_RTS 0x01 +#define CTL_DTR 0x02 +#define CTL_SYN 0x04 +#define CTL_IDLC 0x10 +#define CTL_UDRNC 0x20 +#define CTL_URSKP 0x40 +#define CTL_URCT 0x80 + +#define RXS_BR0 0x01 +#define RXS_BR1 0x02 +#define RXS_BR2 0x04 +#define RXS_BR3 0x08 +#define RXS_ECLK 0x00 +#define RXS_ECLK_NS 0x20 +#define RXS_IBRG 0x40 +#define RXS_PLL1 0x50 +#define RXS_PLL2 0x60 +#define RXS_PLL3 0x70 +#define RXS_DRTXC 0x80 + +#define TXS_BR0 0x01 +#define TXS_BR1 0x02 +#define TXS_BR2 0x04 +#define TXS_BR3 0x08 +#define TXS_ECLK 0x00 +#define TXS_IBRG 0x40 +#define TXS_RCLK 0x60 +#define TXS_DTRXC 0x80 + +#define EXS_RES0 0x01 +#define EXS_RES1 0x02 +#define EXS_RES2 0x04 +#define EXS_TES0 0x10 +#define EXS_TES1 0x20 +#define EXS_TES2 0x40 + +#define CMD_RX_RST 0x11 +#define CMD_RX_ENA 0x12 +#define CMD_RX_DIS 0x13 +#define CMD_RX_CRC_INIT 0x14 +#define CMD_RX_MSG_REJ 0x15 +#define CMD_RX_MP_SRCH 0x16 +#define CMD_RX_CRC_EXC 0x17 +#define CMD_RX_CRC_FRC 0x18 +#define CMD_TX_RST 0x01 +#define CMD_TX_ENA 0x02 +#define CMD_TX_DISA 0x03 +#define CMD_TX_CRC_INIT 0x04 +#define CMD_TX_CRC_EXC 0x05 +#define CMD_TX_EOM 0x06 +#define CMD_TX_ABORT 0x07 +#define CMD_TX_MP_ON 0x08 +#define CMD_TX_BUF_CLR 0x09 +#define CMD_TX_DISB 0x0b +#define CMD_CH_RST 0x21 +#define CMD_SRCH_MODE 0x31 +#define CMD_NOP 0x00 + +#define ST0_RXRDY 0x01 +#define ST0_TXRDY 0x02 +#define ST0_RXINTB 0x20 +#define ST0_RXINTA 0x40 +#define ST0_TXINT 0x80 + +#define ST1_IDLE 0x01 +#define ST1_ABORT 0x02 +#define ST1_CDCD 0x04 +#define ST1_CCTS 0x08 +#define ST1_SYN_FLAG 0x10 +#define ST1_CLMD 0x20 +#define ST1_TXIDLE 0x40 +#define ST1_UDRN 0x80 + +#define ST2_CRCE 0x04 +#define ST2_ONRN 0x08 +#define ST2_RBIT 0x10 +#define ST2_ABORT 0x20 +#define ST2_SHORT 0x40 +#define ST2_EOM 0x80 + +#define ST3_RX_ENA 0x01 +#define ST3_TX_ENA 0x02 +#define ST3_DCD 0x04 +#define ST3_CTS 0x08 +#define ST3_SRCH_MODE 0x10 +#define ST3_SLOOP 0x20 +#define ST3_GPI 0x80 + +#define ST4_RDNR 0x01 +#define ST4_RDCR 0x02 +#define ST4_TDNR 0x04 +#define ST4_TDCR 0x08 +#define ST4_OCLM 0x20 +#define ST4_CFT 0x40 +#define ST4_CGPI 0x80 + +#define FST_CRCEF 0x04 +#define FST_OVRNF 0x08 +#define FST_RBIF 0x10 +#define FST_ABTF 0x20 +#define FST_SHRTF 0x40 +#define FST_EOMF 0x80 + +#define IE0_RXRDY 0x01 +#define IE0_TXRDY 0x02 +#define IE0_RXINTB 0x20 +#define IE0_RXINTA 0x40 +#define IE0_TXINT 0x80 + +#define IE1_IDLD 0x01 +#define IE1_ABTD 0x02 +#define IE1_CDCD 0x04 +#define IE1_CCTS 0x08 +#define IE1_SYNCD 0x10 +#define IE1_CLMD 0x20 +#define IE1_IDL 0x40 +#define IE1_UDRN 0x80 + +#define IE2_CRCE 0x04 +#define IE2_OVRN 0x08 +#define IE2_RBIT 0x10 +#define IE2_ABT 0x20 +#define IE2_SHRT 0x40 +#define IE2_EOM 0x80 + +#define IE4_RDNR 0x01 +#define IE4_RDCR 0x02 +#define IE4_TDNR 0x04 +#define IE4_TDCR 0x08 +#define IE4_OCLM 0x20 +#define IE4_CFT 0x40 +#define IE4_CGPI 0x80 + +#define FIE_CRCEF 0x04 +#define FIE_OVRNF 0x08 +#define FIE_RBIF 0x10 +#define FIE_ABTF 0x20 +#define FIE_SHRTF 0x40 +#define FIE_EOMF 0x80 + +#define DSR_DWE 0x01 +#define DSR_DE 0x02 +#define DSR_REF 0x04 +#define DSR_UDRF 0x04 +#define DSR_COA 0x08 +#define DSR_COF 0x10 +#define DSR_BOF 0x20 +#define DSR_EOM 0x40 +#define DSR_EOT 0x80 + +#define DIR_REF 0x04 +#define DIR_UDRF 0x04 +#define DIR_COA 0x08 +#define DIR_COF 0x10 +#define DIR_BOF 0x20 +#define DIR_EOM 0x40 +#define DIR_EOT 0x80 + +#define DMR_CNTE 0x02 +#define DMR_NF 0x04 +#define DMR_SEOME 0x08 +#define DMR_TMOD 0x10 + +#define DCR_SW_ABT 0x01 +#define DCR_FCT_CLR 0x02 + +#define PCR_PR0 0x01 +#define PCR_PR1 0x02 +#define PCR_PR2 0x04 +#define PCR_CCC 0x08 +#define PCR_BRC 0x10 +#define PCR_OSB 0x40 +#define PCR_BURST 0x80 + +#endif /* (_HD64572_H) */ diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/net/wan/hd6457x.c linux.21rc1-ac1/drivers/net/wan/hd6457x.c --- linux.21rc1/drivers/net/wan/hd6457x.c 2003-04-22 16:39:39.000000000 +0100 +++ linux.21rc1-ac1/drivers/net/wan/hd6457x.c 2003-04-22 16:44:37.000000000 +0100 @@ -1,12 +1,11 @@ /* * Hitachi SCA HD64570 and HD64572 common driver for Linux * - * Copyright (C) 1998-2000 Krzysztof Halasa + * Copyright (C) 1998-2003 Krzysztof Halasa * * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. + * under the terms of version 2 of the GNU General Public License + * as published by the Free Software Foundation. * * Sources of information: * Hitachi HD64570 SCA User's Manual @@ -42,7 +41,7 @@ #error Either hd64570.h or hd64572.h must be included #endif -static char sca_version[]="1.09"; +static char sca_version[]="1.12"; #define get_msci(port) (phy_node(port) ? MSCI1_OFFSET : MSCI0_OFFSET) #define get_dmac_rx(port) (phy_node(port) ? DMAC1RX_OFFSET : DMAC0RX_OFFSET) @@ -294,7 +293,7 @@ skb->mac.raw = skb->data; skb->dev = hdlc_to_dev(&port->hdlc); skb->dev->last_rx = jiffies; - skb->protocol = htons(ETH_P_HDLC); + skb->protocol = hdlc_type_trans(skb, hdlc_to_dev(&port->hdlc)); netif_rx(skb); } diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/net/wan/hdlc_cisco.c linux.21rc1-ac1/drivers/net/wan/hdlc_cisco.c --- linux.21rc1/drivers/net/wan/hdlc_cisco.c 2003-04-22 16:39:39.000000000 +0100 +++ linux.21rc1-ac1/drivers/net/wan/hdlc_cisco.c 2003-04-22 16:44:37.000000000 +0100 @@ -2,12 +2,11 @@ * Generic HDLC support routines for Linux * Cisco HDLC support * - * Copyright (C) 2000 - 2001 Krzysztof Halasa + * Copyright (C) 2000 - 2003 Krzysztof Halasa * * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. + * under the terms of version 2 of the GNU General Public License + * as published by the Free Software Foundation. */ #include @@ -85,12 +84,37 @@ skb_put(skb, sizeof(cisco_packet)); skb->priority = TC_PRIO_CONTROL; skb->dev = hdlc_to_dev(hdlc); + skb->nh.raw = skb->data; dev_queue_xmit(skb); } +static unsigned short cisco_type_trans(struct sk_buff *skb, + struct net_device *dev) +{ + hdlc_header *data = (hdlc_header*)skb->data; + + if (skb->len < sizeof(hdlc_header)) + return __constant_htons(ETH_P_HDLC); + + if (data->address != CISCO_MULTICAST && + data->address != CISCO_UNICAST) + return __constant_htons(ETH_P_HDLC); + + switch(data->protocol) { + case __constant_htons(ETH_P_IP): + case __constant_htons(ETH_P_IPX): + case __constant_htons(ETH_P_IPV6): + skb_pull(skb, sizeof(hdlc_header)); + return data->protocol; + default: + return __constant_htons(ETH_P_HDLC); + } +} + + static void cisco_rx(struct sk_buff *skb) { hdlc_device *hdlc = dev_to_hdlc(skb->dev); @@ -109,14 +133,6 @@ skb_pull(skb, sizeof(hdlc_header)); switch(ntohs(data->protocol)) { - case ETH_P_IP: - case ETH_P_IPX: - case ETH_P_IPV6: - skb->protocol = data->protocol; - skb->dev = hdlc_to_dev(hdlc); - netif_rx(skb); - return; - case CISCO_SYS_INFO: /* Packet is not needed, drop it. */ dev_kfree_skb_any(skb); @@ -288,6 +304,7 @@ hdlc->open = cisco_open; hdlc->stop = cisco_close; hdlc->netif_rx = cisco_rx; + hdlc->type_trans = cisco_type_trans; hdlc->proto = IF_PROTO_CISCO; dev->hard_start_xmit = hdlc->xmit; dev->hard_header = cisco_hard_header; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/net/wan/hdlc_fr.c linux.21rc1-ac1/drivers/net/wan/hdlc_fr.c --- linux.21rc1/drivers/net/wan/hdlc_fr.c 2003-04-22 16:39:39.000000000 +0100 +++ linux.21rc1-ac1/drivers/net/wan/hdlc_fr.c 2003-04-22 16:44:37.000000000 +0100 @@ -2,13 +2,22 @@ * Generic HDLC support routines for Linux * Frame Relay support * - * Copyright (C) 1999 - 2001 Krzysztof Halasa + * Copyright (C) 1999 - 2003 Krzysztof Halasa * * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ + * under the terms of version 2 of the GNU General Public License + * as published by the Free Software Foundation. + * + + Theory of PVC state in DCE mode: + + (exist,new) -> 0,0 when "PVC create" or if "link unreliable" + 0,x -> 1,1 if "link reliable" when sending FULL STATUS + 1,1 -> 1,0 if received FULL STATUS ACK + + (active) -> 0 when "ifconfig PVC down" or "link unreliable" or "PVC create" + -> 1 when "PVC up" and (exist,new) = 1,0 +*/ #include #include @@ -20,19 +29,23 @@ #include #include #include +#include #include #include #include +#include #include __inline__ pvc_device* find_pvc(hdlc_device *hdlc, u16 dlci) { - pvc_device *pvc=hdlc->state.fr.first_pvc; + pvc_device *pvc = hdlc->state.fr.first_pvc; - while (pvc) { - if (netdev_dlci(&pvc->netdev) == dlci) + while(pvc) { + if (pvc->dlci == dlci) return pvc; + if (pvc->dlci > dlci) + return NULL; /* the listed is sorted */ pvc = pvc->next; } @@ -40,18 +53,72 @@ } +__inline__ pvc_device* add_pvc(hdlc_device *hdlc, u16 dlci) +{ + pvc_device *pvc, **pvc_p = &hdlc->state.fr.first_pvc; + + while(*pvc_p) { + if ((*pvc_p)->dlci == dlci) + return *pvc_p; + if ((*pvc_p)->dlci > dlci) + break; /* the listed is sorted */ + pvc_p = &(*pvc_p)->next; + } + + pvc = kmalloc(sizeof(pvc_device), GFP_KERNEL); + if (!pvc) + return NULL; + + memset(pvc, 0, sizeof(pvc_device)); + pvc->dlci = dlci; + pvc->master = hdlc; + pvc->next = *pvc_p; /* Put it in the chain */ + *pvc_p = pvc; + return pvc; +} + + +__inline__ int pvc_is_used(pvc_device *pvc) +{ + return pvc->main != NULL || pvc->ether != NULL; +} + + +__inline__ void delete_unused_pvcs(hdlc_device *hdlc) +{ + pvc_device **pvc_p = &hdlc->state.fr.first_pvc; + + while(*pvc_p) { + if (!pvc_is_used(*pvc_p)) { + pvc_device *pvc = *pvc_p; + *pvc_p = pvc->next; + kfree(pvc); + continue; + } + pvc_p = &(*pvc_p)->next; + } +} + -__inline__ u16 status_to_dlci(hdlc_device *hdlc, u8 *status, - int *active, int *new) +__inline__ struct net_device** get_dev_p(pvc_device *pvc, int type) { - *new = (status[2] & 0x08); - *active = (!*new && (status[2] & 0x02)); + if (type == ARPHRD_ETHER) + return &pvc->ether; + else + return &pvc->main; +} + + +__inline__ u16 status_to_dlci(u8 *status, int *active, int *new) +{ + *new = (status[2] & 0x08) ? 1 : 0; + *active = (status[2] & 0x02) ? 1 : 0; return ((status[0] & 0x3F)<<4) | ((status[1] & 0x78)>>3); } -__inline__ void dlci_to_status(hdlc_device *hdlc, u16 dlci, u8 *status, +__inline__ void dlci_to_status(u16 dlci, u8 *status, int active, int new) { status[0] = (dlci>>4) & 0x3F; @@ -66,37 +133,50 @@ -static int fr_hard_header(struct sk_buff *skb, struct net_device *dev, - u16 type, void *daddr, void *saddr, unsigned int len) +static int fr_hard_header(struct sk_buff **skb_p, u16 dlci) { u16 head_len; + struct sk_buff *skb = *skb_p; - if (!daddr) - daddr = dev->broadcast; - -#ifdef CONFIG_HDLC_DEBUG_HARD_HEADER - printk(KERN_DEBUG "%s: fr_hard_header called\n", dev->name); -#endif - - switch(type) { - case ETH_P_IP: + switch(skb->protocol) { + case __constant_ntohs(ETH_P_IP): head_len = 4; skb_push(skb, head_len); skb->data[3] = NLPID_IP; break; - case ETH_P_IPV6: + case __constant_ntohs(ETH_P_IPV6): head_len = 4; skb_push(skb, head_len); skb->data[3] = NLPID_IPV6; break; - case LMI_PROTO: + case __constant_ntohs(LMI_PROTO): head_len = 4; skb_push(skb, head_len); skb->data[3] = LMI_PROTO; break; + case __constant_ntohs(ETH_P_802_3): + head_len = 10; + if (skb_headroom(skb) < head_len) { + struct sk_buff *skb2 = skb_realloc_headroom(skb, + head_len); + if (!skb2) + return -ENOBUFS; + dev_kfree_skb(skb); + skb = *skb_p = skb2; + } + skb_push(skb, head_len); + skb->data[3] = FR_PAD; + skb->data[4] = NLPID_SNAP; + skb->data[5] = FR_PAD; + skb->data[6] = 0x80; + skb->data[7] = 0xC2; + skb->data[8] = 0x00; + skb->data[9] = 0x07; /* bridged Ethernet frame w/out FCS */ + break; + default: head_len = 10; skb_push(skb, head_len); @@ -105,14 +185,12 @@ skb->data[5] = FR_PAD; skb->data[6] = FR_PAD; skb->data[7] = FR_PAD; - skb->data[8] = type>>8; - skb->data[9] = (u8)type; + *(u16*)(skb->data + 8) = skb->protocol; } - memcpy(skb->data, daddr, 2); + dlci_to_q922(skb->data, dlci); skb->data[2] = FR_UI; - - return head_len; + return 0; } @@ -124,13 +202,12 @@ if ((hdlc_to_dev(pvc->master)->flags & IFF_UP) == 0) return -EIO; /* Master must be UP in order to activate PVC */ - if (pvc->master->state.fr.settings.lmi != LMI_NONE) - pvc->state.active = 0; - else - pvc->state.active = 1; + if (pvc->open_count++ == 0) { + if (pvc->master->state.fr.settings.lmi == LMI_NONE) + pvc->state.active = 1; - pvc->state.new = 0; - pvc->master->state.fr.changed = 1; + pvc->master->state.fr.dce_changed = 1; + } return 0; } @@ -139,38 +216,94 @@ static int pvc_close(struct net_device *dev) { pvc_device *pvc = dev_to_pvc(dev); - pvc->state.active = pvc->state.new = 0; - pvc->master->state.fr.changed = 1; + + if (--pvc->open_count == 0) { + if (pvc->master->state.fr.settings.lmi == LMI_NONE) + pvc->state.active = 0; + + if (pvc->master->state.fr.settings.dce) { + pvc->master->state.fr.dce_changed = 1; + pvc->state.active = 0; + } + } return 0; } -static int pvc_xmit(struct sk_buff *skb, struct net_device *dev) +int pvc_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) { pvc_device *pvc = dev_to_pvc(dev); + fr_proto_pvc_info info; - if (pvc->state.active) { - skb->dev = hdlc_to_dev(pvc->master); - pvc->stats.tx_bytes += skb->len; - pvc->stats.tx_packets++; - if (pvc->state.fecn) - pvc->stats.tx_compressed++; /* TX Congestion counter */ - dev_queue_xmit(skb); - } else { - pvc->stats.tx_dropped++; - dev_kfree_skb(skb); + if (ifr->ifr_settings.type == IF_GET_PROTO) { + if (dev->type == ARPHRD_ETHER) + ifr->ifr_settings.type = IF_PROTO_FR_ETH_PVC; + else + ifr->ifr_settings.type = IF_PROTO_FR_PVC; + + if (ifr->ifr_settings.size < sizeof(info)) { + /* data size wanted */ + ifr->ifr_settings.size = sizeof(info); + return -ENOBUFS; + } + + info.dlci = pvc->dlci; + memcpy(info.master, hdlc_to_name(pvc->master), IFNAMSIZ); + if (copy_to_user(ifr->ifr_settings.ifs_ifsu.fr_pvc_info, + &info, sizeof(info))) + return -EFAULT; + return 0; } - return 0; + return -EINVAL; +} + + +__inline__ struct net_device_stats *pvc_get_stats(struct net_device *dev) +{ + return (struct net_device_stats *) + ((char *)dev + sizeof(struct net_device)); } -static struct net_device_stats *pvc_get_stats(struct net_device *dev) +static int pvc_xmit(struct sk_buff *skb, struct net_device *dev) { pvc_device *pvc = dev_to_pvc(dev); - return &pvc->stats; + struct net_device_stats *stats = pvc_get_stats(dev); + + if (pvc->state.active) { + if (dev->type == ARPHRD_ETHER) { + int pad = ETH_ZLEN - skb->len; + if (pad > 0) { /* Pad the frame with zeros */ + int len = skb->len; + if (skb_tailroom(skb) < pad) + if (pskb_expand_head(skb, 0, pad, + GFP_ATOMIC)) { + stats->tx_dropped++; + dev_kfree_skb(skb); + return 0; + } + skb_put(skb, pad); + memset(skb->data + len, 0, pad); + } + skb->protocol = __constant_htons(ETH_P_802_3); + } + if (!fr_hard_header(&skb, pvc->dlci)) { + stats->tx_bytes += skb->len; + stats->tx_packets++; + if (pvc->state.fecn) /* TX Congestion counter */ + stats->tx_compressed++; + skb->dev = hdlc_to_dev(pvc->master); + dev_queue_xmit(skb); + return 0; + } + } + + stats->tx_dropped++; + dev_kfree_skb(skb); + return 0; } @@ -187,9 +320,15 @@ static inline void fr_log_dlci_active(pvc_device *pvc) { - printk(KERN_INFO "%s: %sactive%s\n", pvc_to_name(pvc), - pvc->state.active ? "" : "in", - pvc->state.new ? " new" : ""); + printk(KERN_INFO "%s: DLCI %d [%s%s%s]%s %s\n", + hdlc_to_name(pvc->master), + pvc->dlci, + pvc->main ? pvc->main->name : "", + pvc->main && pvc->ether ? " " : "", + pvc->ether ? pvc->ether->name : "", + pvc->state.new ? " new" : "", + !pvc->state.exist ? "deleted" : + pvc->state.active ? "active" : "inactive"); } @@ -213,8 +352,8 @@ int i = 0; if (hdlc->state.fr.settings.dce && fullrep) { - len += hdlc->state.fr.pvc_count * (2 + stat_len); - if (len > HDLC_MAX_MTU) { + len += hdlc->state.fr.dce_pvc_count * (2 + stat_len); + if (len > HDLC_MAX_MRU) { printk(KERN_WARNING "%s: Too many PVCs while sending " "LMI full report\n", hdlc_to_name(hdlc)); return; @@ -224,12 +363,13 @@ skb = dev_alloc_skb(len); if (!skb) { printk(KERN_WARNING "%s: Memory squeeze on fr_lmi_send()\n", - hdlc_to_name(hdlc)); + hdlc_to_name(hdlc)); return; } memset(skb->data, 0, len); skb_reserve(skb, 4); - fr_hard_header(skb, hdlc_to_dev(hdlc), LMI_PROTO, NULL, NULL, 0); + skb->protocol = __constant_htons(LMI_PROTO); + fr_hard_header(&skb, LMI_DLCI); data = skb->tail; data[i++] = LMI_CALLREF; data[i++] = hdlc->state.fr.settings.dce @@ -253,16 +393,20 @@ ? LMI_CCITT_PVCSTAT : LMI_PVCSTAT; data[i++] = stat_len; - if (hdlc->state.fr.reliable && - (pvc->netdev.flags & IFF_UP) && - !pvc->state.active && - !pvc->state.new) { - pvc->state.new = 1; + /* LMI start/restart */ + if (hdlc->state.fr.reliable && !pvc->state.exist) { + pvc->state.exist = pvc->state.new = 1; + fr_log_dlci_active(pvc); + } + + /* ifconfig PVC up */ + if (pvc->open_count && !pvc->state.active && + pvc->state.exist && !pvc->state.new) { + pvc->state.active = 1; fr_log_dlci_active(pvc); } - dlci_to_status(hdlc, netdev_dlci(&pvc->netdev), - data + i, + dlci_to_status(pvc->dlci, data + i, pvc->state.active, pvc->state.new); i += stat_len; pvc = pvc->next; @@ -272,6 +416,7 @@ skb_put(skb, i); skb->priority = TC_PRIO_CONTROL; skb->dev = hdlc_to_dev(hdlc); + skb->nh.raw = skb->data; dev_queue_xmit(skb); } @@ -312,10 +457,11 @@ if (reliable) { hdlc->state.fr.n391cnt = 0; /* Request full status */ - hdlc->state.fr.changed = 1; + hdlc->state.fr.dce_changed = 1; } else { while (pvc) { /* Deactivate all PVCs */ - pvc->state.new = pvc->state.active = 0; + pvc->state.exist = 0; + pvc->state.active = pvc->state.new = 0; pvc = pvc->next; } } @@ -346,7 +492,7 @@ { int stat_len; pvc_device *pvc; - int reptype = -1, error; + int reptype = -1, error, no_ram; u8 rxseq, txseq; int i; @@ -420,20 +566,18 @@ while (pvc) { if (pvc->state.new) { pvc->state.new = 0; - pvc->state.active = 1; - fr_log_dlci_active(pvc); /* Tell DTE that new PVC is now active */ - hdlc->state.fr.changed = 1; + hdlc->state.fr.dce_changed = 1; } pvc = pvc->next; } } - if (hdlc->state.fr.changed) { + if (hdlc->state.fr.dce_changed) { reptype = LMI_FULLREP; hdlc->state.fr.fullrep_sent = 1; - hdlc->state.fr.changed = 0; + hdlc->state.fr.dce_changed = 0; } fr_lmi_send(hdlc, reptype == LMI_FULLREP ? 1 : 0); @@ -449,13 +593,14 @@ pvc = hdlc->state.fr.first_pvc; while (pvc) { - pvc->state.deleted = pvc->state.active; /* mark active PVCs */ + pvc->state.deleted = 1; pvc = pvc->next; } + no_ram = 0; while (skb->len >= i + 2 + stat_len) { u16 dlci; - int active, new; + unsigned int active, new; if (skb->data[i] != ((hdlc->state.fr.settings.lmi == LMI_CCITT) ? LMI_CCITT_PVCSTAT : LMI_PVCSTAT)) { @@ -472,21 +617,28 @@ } i++; - dlci = status_to_dlci(hdlc, skb->data + i, &active, &new); - pvc = find_pvc(hdlc, dlci); + dlci = status_to_dlci(skb->data + i, &active, &new); + + pvc = add_pvc(hdlc, dlci); + + if (!pvc && !no_ram) { + printk(KERN_WARNING + "%s: Memory squeeze on fr_lmi_recv()\n", + hdlc_to_name(hdlc)); + no_ram = 1; + } - active |= new; if (pvc) { - if (active && !pvc->state.active && - (pvc->netdev.flags & IFF_UP)) { + pvc->state.exist = 1; + pvc->state.deleted = 0; + if (active != pvc->state.active || + new != pvc->state.new || + !pvc->state.exist) { + pvc->state.new = new; pvc->state.active = active; fr_log_dlci_active(pvc); } - pvc->state.deleted = 0; } - else if (new) - printk(KERN_INFO "%s: new PVC available, DLCI=%u\n", - hdlc_to_name(hdlc), dlci); i += stat_len; } @@ -494,10 +646,10 @@ pvc = hdlc->state.fr.first_pvc; while (pvc) { - if (pvc->state.deleted) { + if (pvc->state.deleted && pvc->state.exist) { pvc->state.active = pvc->state.new = 0; + pvc->state.exist = 0; fr_log_dlci_active(pvc); - pvc->state.deleted = 0; } pvc = pvc->next; } @@ -517,8 +669,9 @@ u8 *data = skb->data; u16 dlci; pvc_device *pvc; + struct net_device *dev = NULL; - if (skb->len<4 || fh->ea1 || data[2] != FR_UI) + if (skb->len <= 4 || fh->ea1 || data[2] != FR_UI) goto rx_error; dlci = q922_to_dlci(skb->data); @@ -550,57 +703,39 @@ printk(KERN_INFO "%s: No PVC for received frame's DLCI %d\n", hdlc_to_name(hdlc), dlci); #endif - goto rx_error; - } - - if ((pvc->netdev.flags & IFF_UP) == 0) { -#ifdef CONFIG_HDLC_DEBUG_PKT - printk(KERN_INFO "%s: PVC for received frame's DLCI %d is down\n", - hdlc_to_name(hdlc), dlci); -#endif - goto rx_error; + dev_kfree_skb_any(skb); + return; } - pvc->stats.rx_packets++; /* PVC traffic */ - pvc->stats.rx_bytes += skb->len; - - if (pvc->state.fecn != (fh->fecn ? PVC_STATE_FECN : 0)) { + if (pvc->state.fecn != fh->fecn) { #ifdef CONFIG_HDLC_DEBUG_ECN - printk(KERN_DEBUG "%s: FECN O%s\n", pvc_to_name(pvc), - fh->fecn ? "N" : "FF"); + printk(KERN_DEBUG "%s: DLCI %d FECN O%s\n", hdlc_to_name(pvc), + dlci, fh->fecn ? "N" : "FF"); #endif pvc->state.fecn ^= 1; } - if (pvc->state.becn != (fh->becn ? PVC_STATE_BECN : 0)) { + if (pvc->state.becn != fh->becn) { #ifdef CONFIG_HDLC_DEBUG_ECN - printk(KERN_DEBUG "%s: BECN O%s\n", pvc_to_name(pvc), - fh->becn ? "N" : "FF"); + printk(KERN_DEBUG "%s: DLCI %d BECN O%s\n", hdlc_to_name(pvc), + dlci, fh->becn ? "N" : "FF"); #endif pvc->state.becn ^= 1; } - if (pvc->state.becn) - pvc->stats.rx_compressed++; - - skb->dev = &pvc->netdev; if (data[3] == NLPID_IP) { skb_pull(skb, 4); /* Remove 4-byte header (hdr, UI, NLPID) */ + dev = pvc->main; skb->protocol = htons(ETH_P_IP); - netif_rx(skb); - return; - } - - if (data[3] == NLPID_IPV6) { + } else if (data[3] == NLPID_IPV6) { skb_pull(skb, 4); /* Remove 4-byte header (hdr, UI, NLPID) */ + dev = pvc->main; skb->protocol = htons(ETH_P_IPV6); - netif_rx(skb); - return; - } - if (data[3] == FR_PAD && data[4] == NLPID_SNAP && data[5] == FR_PAD) { + } else if (skb->len > 10 && data[3] == FR_PAD && + data[4] == NLPID_SNAP && data[5] == FR_PAD) { u16 oui = ntohs(*(u16*)(data + 6)); u16 pid = ntohs(*(u16*)(data + 8)); skb_pull(skb, 10); @@ -610,23 +745,39 @@ case ETH_P_IPX: case ETH_P_IP: /* a long variant */ case ETH_P_IPV6: + dev = pvc->main; skb->protocol = htons(pid); break; + case 0x80C20007: /* bridged Ethernet frame */ + if ((dev = pvc->ether) != NULL) + skb->protocol = eth_type_trans(skb, dev); + break; + default: printk(KERN_INFO "%s: Unsupported protocol, OUI=%x " "PID=%x\n", hdlc_to_name(hdlc), oui, pid); dev_kfree_skb_any(skb); return; } - - netif_rx(skb); + } else { + printk(KERN_INFO "%s: Unsupported protocol, NLPID=%x " + "length = %i\n", hdlc_to_name(hdlc), data[3], skb->len); + dev_kfree_skb_any(skb); return; } - printk(KERN_INFO "%s: Unsupported protocol, NLPID=%x\n", - hdlc_to_name(hdlc), data[3]); - dev_kfree_skb_any(skb); + if (dev) { + struct net_device_stats *stats = pvc_get_stats(dev); + stats->rx_packets++; /* PVC traffic */ + stats->rx_bytes += skb->len; + if (pvc->state.becn) + stats->rx_compressed++; + skb->dev = dev; + netif_rx(skb); + } else + dev_kfree_skb_any(skb); + return; rx_error: @@ -641,7 +792,7 @@ if (hdlc->state.fr.settings.lmi != LMI_NONE) { hdlc->state.fr.last_poll = 0; hdlc->state.fr.reliable = 0; - hdlc->state.fr.changed = 1; + hdlc->state.fr.dce_changed = 1; hdlc->state.fr.request = 0; hdlc->state.fr.fullrep_sent = 0; hdlc->state.fr.last_errors = 0xFFFFFFFF; @@ -669,90 +820,119 @@ if (hdlc->state.fr.settings.lmi != LMI_NONE) del_timer_sync(&hdlc->state.fr.timer); - while(pvc) { - dev_close(&pvc->netdev); /* Shutdown all PVCs for this FRAD */ + while(pvc) { /* Shutdown all PVCs for this FRAD */ + if (pvc->main) + dev_close(pvc->main); + if (pvc->ether) + dev_close(pvc->ether); + pvc->state.active = pvc->state.new = pvc->state.fecn = + pvc->state.becn = 0; + pvc->state.exist = 0; pvc = pvc->next; } } - -static int fr_pvc(hdlc_device *hdlc, unsigned int dlci, int create) +static int fr_add_pvc(hdlc_device *hdlc, unsigned int dlci, int type) { - pvc_device **pvc_p = &hdlc->state.fr.first_pvc; - pvc_device *pvc; - int result; + pvc_device *pvc = NULL; + struct net_device *dev; + int result, used; + char * prefix = "pvc%d"; - if(dlci <= 0 || dlci >= 1024) - return -EINVAL; /* Only 10 bits for DLCI, DLCI 0 reserved */ + if (type == ARPHRD_ETHER) + prefix = "pvceth%d"; - while(*pvc_p) { - if (netdev_dlci(&(*pvc_p)->netdev) == dlci) - break; - pvc_p = &(*pvc_p)->next; + if ((pvc = add_pvc(hdlc, dlci)) == NULL) { + printk(KERN_WARNING "%s: Memory squeeze on fr_add_pvc()\n", + hdlc_to_name(hdlc)); + return -ENOBUFS; } - if (create) { /* Create PVC */ - if (*pvc_p != NULL) - return -EEXIST; - - pvc = *pvc_p = kmalloc(sizeof(pvc_device), GFP_KERNEL); - if (!pvc) { - printk(KERN_WARNING "%s: Memory squeeze on fr_pvc()\n", - hdlc_to_name(hdlc)); - return -ENOBUFS; - } - memset(pvc, 0, sizeof(pvc_device)); + if (*get_dev_p(pvc, type)) + return -EEXIST; - pvc->netdev.hard_start_xmit = pvc_xmit; - pvc->netdev.get_stats = pvc_get_stats; - pvc->netdev.open = pvc_open; - pvc->netdev.stop = pvc_close; - pvc->netdev.change_mtu = pvc_change_mtu; - pvc->netdev.mtu = HDLC_MAX_MTU; - - pvc->netdev.type = ARPHRD_DLCI; - pvc->netdev.hard_header_len = 16; - pvc->netdev.hard_header = fr_hard_header; - pvc->netdev.tx_queue_len = 0; - pvc->netdev.flags = IFF_POINTOPOINT; - - pvc->master = hdlc; - *(u16*)pvc->netdev.dev_addr = htons(dlci); - dlci_to_q922(pvc->netdev.broadcast, dlci); - pvc->netdev.addr_len = 2; + used = pvc_is_used(pvc); - result = dev_alloc_name(&pvc->netdev, "pvc%d"); - if (result < 0) { - kfree(pvc); - *pvc_p = NULL; - return result; - } - - if (register_netdevice(&pvc->netdev) != 0) { - kfree(pvc); - *pvc_p = NULL; - return -EIO; - } + dev = kmalloc(sizeof(struct net_device) + + sizeof(struct net_device_stats), GFP_KERNEL); + if (!dev) { + printk(KERN_WARNING "%s: Memory squeeze on fr_pvc()\n", + hdlc_to_name(hdlc)); + delete_unused_pvcs(hdlc); + return -ENOBUFS; + } + memset(dev, 0, sizeof(struct net_device) + + sizeof(struct net_device_stats)); - hdlc->state.fr.changed = 1; - hdlc->state.fr.pvc_count++; - return 0; + if (type == ARPHRD_ETHER) { + ether_setup(dev); + memcpy(dev->dev_addr, "\x00\x01", 2); + get_random_bytes(dev->dev_addr + 2, ETH_ALEN - 2); + } else { + dev->type = ARPHRD_DLCI; + dev->flags = IFF_POINTOPOINT; + dev->hard_header_len = 10; + dev->addr_len = 2; + *(u16*)dev->dev_addr = htons(dlci); + dlci_to_q922(dev->broadcast, dlci); + } + dev->hard_start_xmit = pvc_xmit; + dev->get_stats = pvc_get_stats; + dev->open = pvc_open; + dev->stop = pvc_close; + dev->do_ioctl = pvc_ioctl; + dev->change_mtu = pvc_change_mtu; + dev->mtu = HDLC_MAX_MTU; + dev->tx_queue_len = 0; + dev->priv = pvc; + + result = dev_alloc_name(dev, prefix); + if (result < 0) { + kfree(dev); + delete_unused_pvcs(hdlc); + return result; + } + + if (register_netdevice(dev) != 0) { + kfree(dev); + delete_unused_pvcs(hdlc); + return -EIO; + } + + *get_dev_p(pvc, type) = dev; + if (!used) { + hdlc->state.fr.dce_changed = 1; + hdlc->state.fr.dce_pvc_count++; } + return 0; +} + + - if (*pvc_p == NULL) /* Delete PVC */ +static int fr_del_pvc(hdlc_device *hdlc, unsigned int dlci, int type) +{ + pvc_device *pvc; + struct net_device *dev; + + if ((pvc = find_pvc(hdlc, dlci)) == NULL) return -ENOENT; - pvc = *pvc_p; + if ((dev = *get_dev_p(pvc, type)) == NULL) + return -ENOENT; - if (pvc->netdev.flags & IFF_UP) + if (dev->flags & IFF_UP) return -EBUSY; /* PVC in use */ - hdlc->state.fr.changed = 1; - hdlc->state.fr.pvc_count--; - *pvc_p = pvc->next; - unregister_netdevice(&pvc->netdev); - kfree(pvc); + unregister_netdevice(dev); + kfree(dev); + *get_dev_p(pvc, type) = NULL; + + if (!pvc_is_used(pvc)) { + hdlc->state.fr.dce_pvc_count--; + hdlc->state.fr.dce_changed = 1; + } + delete_unused_pvcs(hdlc); return 0; } @@ -763,14 +943,21 @@ pvc_device *pvc = hdlc->state.fr.first_pvc; while(pvc) { pvc_device *next = pvc->next; - unregister_netdev(&pvc->netdev); + if (pvc->main) { + unregister_netdevice(pvc->main); + kfree(pvc->main); + } + if (pvc->ether) { + unregister_netdevice(pvc->ether); + kfree(pvc->ether); + } kfree(pvc); pvc = next; } hdlc->state.fr.first_pvc = NULL; /* All PVCs destroyed */ - hdlc->state.fr.pvc_count = 0; - hdlc->state.fr.changed = 1; + hdlc->state.fr.dce_pvc_count = 0; + hdlc->state.fr.dce_changed = 1; } @@ -828,25 +1015,27 @@ if (hdlc->proto != IF_PROTO_FR) { hdlc_proto_detach(hdlc); hdlc->state.fr.first_pvc = NULL; - hdlc->state.fr.pvc_count = 0; + hdlc->state.fr.dce_pvc_count = 0; } memcpy(&hdlc->state.fr.settings, &new_settings, size); hdlc->open = fr_open; hdlc->stop = fr_close; hdlc->netif_rx = fr_rx; + hdlc->type_trans = NULL; hdlc->proto_detach = fr_destroy; hdlc->proto = IF_PROTO_FR; dev->hard_start_xmit = hdlc->xmit; - dev->hard_header = fr_hard_header; + dev->hard_header = NULL; dev->type = ARPHRD_FRAD; - dev->addr_len = 2; - *(u16*)dev->dev_addr = htons(LMI_DLCI); - dlci_to_q922(dev->broadcast, LMI_DLCI); + dev->flags = IFF_POINTOPOINT | IFF_NOARP; + dev->addr_len = 0; return 0; case IF_PROTO_FR_ADD_PVC: case IF_PROTO_FR_DEL_PVC: + case IF_PROTO_FR_ADD_ETH_PVC: + case IF_PROTO_FR_DEL_ETH_PVC: if(!capable(CAP_NET_ADMIN)) return -EPERM; @@ -854,8 +1043,20 @@ sizeof(fr_proto_pvc))) return -EFAULT; - return fr_pvc(hdlc, pvc.dlci, - ifr->ifr_settings.type == IF_PROTO_FR_ADD_PVC); + if (pvc.dlci <= 0 || pvc.dlci >= 1024) + return -EINVAL; /* Only 10 bits, DLCI 0 reserved */ + + if (ifr->ifr_settings.type == IF_PROTO_FR_ADD_ETH_PVC || + ifr->ifr_settings.type == IF_PROTO_FR_DEL_ETH_PVC) + result = ARPHRD_ETHER; /* bridged Ethernet device */ + else + result = ARPHRD_DLCI; + + if (ifr->ifr_settings.type == IF_PROTO_FR_ADD_PVC || + ifr->ifr_settings.type == IF_PROTO_FR_ADD_ETH_PVC) + return fr_add_pvc(hdlc, pvc.dlci, result); + else + return fr_del_pvc(hdlc, pvc.dlci, result); } return -EINVAL; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/net/wan/hdlc_generic.c linux.21rc1-ac1/drivers/net/wan/hdlc_generic.c --- linux.21rc1/drivers/net/wan/hdlc_generic.c 2003-04-22 16:39:39.000000000 +0100 +++ linux.21rc1-ac1/drivers/net/wan/hdlc_generic.c 2003-04-22 16:44:37.000000000 +0100 @@ -1,17 +1,13 @@ /* * Generic HDLC support routines for Linux * - * Copyright (C) 1999 - 2001 Krzysztof Halasa + * Copyright (C) 1999 - 2003 Krzysztof Halasa * * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. + * under the terms of version 2 of the GNU General Public License + * as published by the Free Software Foundation. * - * Current status: - * - this is work in progress - * - not heavily tested on SMP - * - currently supported: + * Currently supported: * * raw IP-in-HDLC * * Cisco HDLC * * Frame Relay with ANSI or CCITT LMI (both user and network side) @@ -37,7 +33,7 @@ #include -static const char* version = "HDLC support module revision 1.11"; +static const char* version = "HDLC support module revision 1.12"; static int hdlc_change_mtu(struct net_device *dev, int new_mtu) @@ -60,7 +56,13 @@ static int hdlc_rcv(struct sk_buff *skb, struct net_device *dev, struct packet_type *p) { - dev_to_hdlc(dev)->netif_rx(skb); + hdlc_device *hdlc = dev_to_hdlc(dev); + if (hdlc->netif_rx) + hdlc->netif_rx(skb); + else { + hdlc->stats.rx_dropped++; /* Shouldn't happen */ + dev_kfree_skb(skb); + } return 0; } @@ -69,6 +71,10 @@ #define hdlc_raw_ioctl(hdlc, ifr) -ENOSYS #endif +#ifndef CONFIG_HDLC_RAW_ETH +#define hdlc_raw_eth_ioctl(hdlc, ifr) -ENOSYS +#endif + #ifndef CONFIG_HDLC_PPP #define hdlc_ppp_ioctl(hdlc, ifr) -ENOSYS #endif @@ -96,6 +102,7 @@ switch(ifr->ifr_settings.type) { case IF_PROTO_HDLC: + case IF_PROTO_HDLC_ETH: case IF_PROTO_PPP: case IF_PROTO_CISCO: case IF_PROTO_FR: @@ -109,6 +116,7 @@ switch(proto) { case IF_PROTO_HDLC: return hdlc_raw_ioctl(hdlc, ifr); + case IF_PROTO_HDLC_ETH: return hdlc_raw_eth_ioctl(hdlc, ifr); case IF_PROTO_PPP: return hdlc_ppp_ioctl(hdlc, ifr); case IF_PROTO_CISCO: return hdlc_cisco_ioctl(hdlc, ifr); case IF_PROTO_FR: return hdlc_fr_ioctl(hdlc, ifr); diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/net/wan/hdlc_ppp.c linux.21rc1-ac1/drivers/net/wan/hdlc_ppp.c --- linux.21rc1/drivers/net/wan/hdlc_ppp.c 2003-04-22 16:39:39.000000000 +0100 +++ linux.21rc1-ac1/drivers/net/wan/hdlc_ppp.c 2003-04-22 16:44:37.000000000 +0100 @@ -2,12 +2,11 @@ * Generic HDLC support routines for Linux * Point-to-point protocol support * - * Copyright (C) 1999 - 2001 Krzysztof Halasa + * Copyright (C) 1999 - 2003 Krzysztof Halasa * * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. + * under the terms of version 2 of the GNU General Public License + * as published by the Free Software Foundation. */ #include @@ -68,10 +67,10 @@ -static void ppp_rx(struct sk_buff *skb) +static unsigned short ppp_type_trans(struct sk_buff *skb, + struct net_device *dev) { - skb->protocol = htons(ETH_P_WAN_PPP); - netif_rx(skb); + return __constant_htons(ETH_P_WAN_PPP); } @@ -103,7 +102,8 @@ hdlc->open = ppp_open; hdlc->stop = ppp_close; - hdlc->netif_rx = ppp_rx; + hdlc->netif_rx = NULL; + hdlc->type_trans = ppp_type_trans; hdlc->proto = IF_PROTO_PPP; dev->hard_start_xmit = hdlc->xmit; dev->hard_header = NULL; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/net/wan/hdlc_raw.c linux.21rc1-ac1/drivers/net/wan/hdlc_raw.c --- linux.21rc1/drivers/net/wan/hdlc_raw.c 2003-04-22 16:39:39.000000000 +0100 +++ linux.21rc1-ac1/drivers/net/wan/hdlc_raw.c 2003-04-22 16:44:37.000000000 +0100 @@ -2,12 +2,11 @@ * Generic HDLC support routines for Linux * HDLC support * - * Copyright (C) 1999 - 2001 Krzysztof Halasa + * Copyright (C) 1999 - 2003 Krzysztof Halasa * * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. + * under the terms of version 2 of the GNU General Public License + * as published by the Free Software Foundation. */ #include @@ -26,10 +25,10 @@ #include -static void raw_rx(struct sk_buff *skb) +static unsigned short raw_type_trans(struct sk_buff *skb, + struct net_device *dev) { - skb->protocol = htons(ETH_P_IP); - netif_rx(skb); + return __constant_htons(ETH_P_IP); } @@ -67,7 +66,7 @@ new_settings.encoding = ENCODING_NRZ; if (new_settings.parity == PARITY_DEFAULT) - new_settings.parity = PARITY_NONE; + new_settings.parity = PARITY_CRC16_PR1_CCITT; result = hdlc->attach(hdlc, new_settings.encoding, new_settings.parity); @@ -79,11 +78,13 @@ hdlc->open = NULL; hdlc->stop = NULL; - hdlc->netif_rx = raw_rx; + hdlc->netif_rx = NULL; + hdlc->type_trans = raw_type_trans; hdlc->proto = IF_PROTO_HDLC; dev->hard_start_xmit = hdlc->xmit; dev->hard_header = NULL; dev->type = ARPHRD_RAWHDLC; + dev->flags = IFF_POINTOPOINT | IFF_NOARP; dev->addr_len = 0; return 0; } diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/net/wan/hdlc_raw_eth.c linux.21rc1-ac1/drivers/net/wan/hdlc_raw_eth.c --- linux.21rc1/drivers/net/wan/hdlc_raw_eth.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.21rc1-ac1/drivers/net/wan/hdlc_raw_eth.c 2003-04-22 16:44:37.000000000 +0100 @@ -0,0 +1,110 @@ +/* + * Generic HDLC support routines for Linux + * HDLC Ethernet emulation support + * + * Copyright (C) 2002-2003 Krzysztof Halasa + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License + * as published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +static int eth_tx(struct sk_buff *skb, struct net_device *dev) +{ + int pad = ETH_ZLEN - skb->len; + if (pad > 0) { /* Pad the frame with zeros */ + int len = skb->len; + if (skb_tailroom(skb) < pad) + if (pskb_expand_head(skb, 0, pad, GFP_ATOMIC)) { + dev_to_hdlc(dev)->stats.tx_dropped++; + dev_kfree_skb(skb); + return 0; + } + skb_put(skb, pad); + memset(skb->data + len, 0, pad); + } + return dev_to_hdlc(dev)->xmit(skb, dev); +} + + +int hdlc_raw_eth_ioctl(hdlc_device *hdlc, struct ifreq *ifr) +{ + raw_hdlc_proto *raw_s = ifr->ifr_settings.ifs_ifsu.raw_hdlc; + const size_t size = sizeof(raw_hdlc_proto); + raw_hdlc_proto new_settings; + struct net_device *dev = hdlc_to_dev(hdlc); + int result; + void *old_ch_mtu; + int old_qlen; + + switch (ifr->ifr_settings.type) { + case IF_GET_PROTO: + ifr->ifr_settings.type = IF_PROTO_HDLC_ETH; + if (ifr->ifr_settings.size < size) { + ifr->ifr_settings.size = size; /* data size wanted */ + return -ENOBUFS; + } + if (copy_to_user(raw_s, &hdlc->state.raw_hdlc.settings, size)) + return -EFAULT; + return 0; + + case IF_PROTO_HDLC_ETH: + if (!capable(CAP_NET_ADMIN)) + return -EPERM; + + if (dev->flags & IFF_UP) + return -EBUSY; + + if (copy_from_user(&new_settings, raw_s, size)) + return -EFAULT; + + if (new_settings.encoding == ENCODING_DEFAULT) + new_settings.encoding = ENCODING_NRZ; + + if (new_settings.parity == PARITY_DEFAULT) + new_settings.parity = PARITY_CRC16_PR1_CCITT; + + result = hdlc->attach(hdlc, new_settings.encoding, + new_settings.parity); + if (result) + return result; + + hdlc_proto_detach(hdlc); + memcpy(&hdlc->state.raw_hdlc.settings, &new_settings, size); + + hdlc->open = NULL; + hdlc->stop = NULL; + hdlc->netif_rx = NULL; + hdlc->type_trans = eth_type_trans; + hdlc->proto = IF_PROTO_HDLC_ETH; + dev->hard_start_xmit = eth_tx; + old_ch_mtu = dev->change_mtu; + old_qlen = dev->tx_queue_len; + ether_setup(dev); + dev->change_mtu = old_ch_mtu; + dev->tx_queue_len = old_qlen; + memcpy(dev->dev_addr, "\x00\x01", 2); + get_random_bytes(dev->dev_addr + 2, ETH_ALEN - 2); + return 0; + } + + return -EINVAL; +} diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/net/wan/hdlc_x25.c linux.21rc1-ac1/drivers/net/wan/hdlc_x25.c --- linux.21rc1/drivers/net/wan/hdlc_x25.c 2003-04-22 16:39:39.000000000 +0100 +++ linux.21rc1-ac1/drivers/net/wan/hdlc_x25.c 2003-04-22 16:44:37.000000000 +0100 @@ -2,12 +2,11 @@ * Generic HDLC support routines for Linux * X.25 support * - * Copyright (C) 1999 - 2001 Krzysztof Halasa + * Copyright (C) 1999 - 2003 Krzysztof Halasa * * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. + * under the terms of version 2 of the GNU General Public License + * as published by the Free Software Foundation. */ #include @@ -204,6 +203,7 @@ hdlc->open = x25_open; hdlc->stop = x25_close; hdlc->netif_rx = x25_rx; + hdlc->type_trans = NULL; hdlc->proto = IF_PROTO_X25; dev->hard_start_xmit = x25_xmit; dev->hard_header = NULL; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/net/wan/Makefile linux.21rc1-ac1/drivers/net/wan/Makefile --- linux.21rc1/drivers/net/wan/Makefile 2003-04-22 16:39:39.000000000 +0100 +++ linux.21rc1-ac1/drivers/net/wan/Makefile 2003-04-22 16:44:37.000000000 +0100 @@ -9,7 +9,7 @@ O_TARGET := wan.o -export-objs = z85230.o syncppp.o comx.o sdladrv.o cycx_drv.o hdlc_generic.o +export-objs = z85230.o syncppp.o comx.o sdladrv.o cycx_drv.o hdlc_generic.o pc300_drv.o list-multi = wanpipe.o cyclomx.o wanpipe-objs = sdlamain.o sdla_ft1.o $(wanpipe-y) @@ -24,12 +24,15 @@ hdlc-y := hdlc_generic.o hdlc-$(CONFIG_HDLC_RAW) += hdlc_raw.o +hdlc-$(CONFIG_HDLC_RAW_ETH) += hdlc_raw_eth.o hdlc-$(CONFIG_HDLC_CISCO) += hdlc_cisco.o hdlc-$(CONFIG_HDLC_FR) += hdlc_fr.o hdlc-$(CONFIG_HDLC_PPP) += hdlc_ppp.o hdlc-$(CONFIG_HDLC_X25) += hdlc_x25.o hdlc-objs := $(hdlc-y) +pc300-$(CONFIG_PC300_MLPPP) += pc300_tty.o + obj-$(CONFIG_HOSTESS_SV11) += z85230.o syncppp.o hostess_sv11.o obj-$(CONFIG_SEALEVEL_4021) += z85230.o syncppp.o sealevel.o obj-$(CONFIG_COMX) += comx.o @@ -70,6 +73,7 @@ obj-$(CONFIG_CYCLADES_SYNC) += cycx_drv.o cyclomx.o obj-$(CONFIG_LAPBETHER) += lapbether.o obj-$(CONFIG_SBNI) += sbni.o +obj-$(CONFIG_PC300) += pc300.o obj-$(CONFIG_HDLC) += hdlc.o ifeq ($(CONFIG_HDLC_PPP),y) obj-$(CONFIG_HDLC) += syncppp.o @@ -79,6 +83,9 @@ include $(TOPDIR)/Rules.make +pc300.o: pc300_drv.o $(pc300-y) + $(LD) -r -o $@ pc300_drv.o $(pc300-y) + hdlc.o: $(hdlc-objs) $(LD) -r -o $@ $(hdlc-objs) diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/net/wan/pc300_drv.c linux.21rc1-ac1/drivers/net/wan/pc300_drv.c --- linux.21rc1/drivers/net/wan/pc300_drv.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.21rc1-ac1/drivers/net/wan/pc300_drv.c 2003-04-22 16:44:37.000000000 +0100 @@ -0,0 +1,3489 @@ +/* + * pc300.c Cyclades-PC300(tm) Driver. + * + * Author: Ivan Passos + * Maintainer: Henrique Gobbi + * + * Copyright: (c) 1999-2002 Cyclades Corp. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + * + */ + +#define USE_PCI_CLOCK + +static char rcsid[] = +"Revision: 3.4.8 Date: 2002/07/19 "; + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "pc300.h" + +#define CPC_LOCK(card,flags) \ + do { \ + spin_lock_irqsave(&card->card_lock, flags); \ + } while (0) + +#define CPC_UNLOCK(card,flags) \ + do { \ + spin_unlock_irqrestore(&card->card_lock, flags); \ + } while (0) + +#undef PC300_DEBUG_PCI +#undef PC300_DEBUG_INTR +#undef PC300_DEBUG_TX +#undef PC300_DEBUG_RX +#undef PC300_DEBUG_OTHER + +static struct pci_device_id cpc_pci_dev_id[] __devinitdata = { + /* PC300/RSV or PC300/X21, 2 chan */ + {0x120e, 0x300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0x300}, + /* PC300/RSV or PC300/X21, 1 chan */ + {0x120e, 0x301, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0x301}, + /* PC300/TE, 2 chan */ + {0x120e, 0x310, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0x310}, + /* PC300/TE, 1 chan */ + {0x120e, 0x311, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0x311}, + /* PC300/TE-M, 2 chan */ + {0x120e, 0x320, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0x320}, + /* PC300/TE-M, 1 chan */ + {0x120e, 0x321, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0x321}, + /* End of table */ + {0,}, +}; +MODULE_DEVICE_TABLE(pci, cpc_pci_dev_id); + +#ifndef cpc_min +#define cpc_min(a,b) (((a)<(b))?(a):(b)) +#endif +#ifndef cpc_max +#define cpc_max(a,b) (((a)>(b))?(a):(b)) +#endif + +/* prototypes */ +static void tx_dma_buf_pt_init(pc300_t *, int); +static void tx_dma_buf_init(pc300_t *, int); +static void rx_dma_buf_pt_init(pc300_t *, int); +static void rx_dma_buf_init(pc300_t *, int); +static void tx_dma_buf_check(pc300_t *, int); +static void rx_dma_buf_check(pc300_t *, int); +static void cpc_intr(int, void *, struct pt_regs *); +static struct net_device_stats *cpc_get_stats(struct net_device *); +static int clock_rate_calc(uclong, uclong, int *); +static uclong detect_ram(pc300_t *); +static void plx_init(pc300_t *); +static void cpc_trace(struct net_device *, struct sk_buff *, char); +static int cpc_attach(hdlc_device *, unsigned short, unsigned short); + +#ifdef CONFIG_PC300_MLPPP +void cpc_tty_init(pc300dev_t * dev); +void cpc_tty_unregister_service(pc300dev_t * pc300dev); +void cpc_tty_receive(pc300dev_t * pc300dev); +void cpc_tty_trigger_poll(pc300dev_t * pc300dev); +void cpc_tty_reset_var(void); +#endif + +/************************/ +/*** DMA Routines ***/ +/************************/ +static void tx_dma_buf_pt_init(pc300_t * card, int ch) +{ + int i; + int ch_factor = ch * N_DMA_TX_BUF; + volatile pcsca_bd_t *ptdescr = (pcsca_bd_t *) (card->hw.rambase + + DMA_TX_BD_BASE + ch_factor * sizeof(pcsca_bd_t)); + + for (i = 0; i < N_DMA_TX_BUF; i++, ptdescr++) { + cpc_writel(&ptdescr->next, (uclong) (DMA_TX_BD_BASE + + (ch_factor + ((i + 1) & (N_DMA_TX_BUF - 1))) * sizeof(pcsca_bd_t))); + cpc_writel(&ptdescr->ptbuf, + (uclong) (DMA_TX_BASE + (ch_factor + i) * BD_DEF_LEN)); + } +} + +static void tx_dma_buf_init(pc300_t * card, int ch) +{ + int i; + int ch_factor = ch * N_DMA_TX_BUF; + volatile pcsca_bd_t *ptdescr = (pcsca_bd_t *) (card->hw.rambase + + DMA_TX_BD_BASE + ch_factor * sizeof(pcsca_bd_t)); + + for (i = 0; i < N_DMA_TX_BUF; i++, ptdescr++) { + memset_io(ptdescr, 0, sizeof(pcsca_bd_t)); + cpc_writew(&ptdescr->len, 0); + cpc_writeb(&ptdescr->status, DST_OSB); + } + tx_dma_buf_pt_init(card, ch); +} + +static void rx_dma_buf_pt_init(pc300_t * card, int ch) +{ + int i; + int ch_factor = ch * N_DMA_RX_BUF; + volatile pcsca_bd_t *ptdescr = (pcsca_bd_t *) (card->hw.rambase + + DMA_RX_BD_BASE + ch_factor * sizeof(pcsca_bd_t)); + + for (i = 0; i < N_DMA_RX_BUF; i++, ptdescr++) { + cpc_writel(&ptdescr->next, (uclong) (DMA_RX_BD_BASE + + (ch_factor + ((i + 1) & (N_DMA_RX_BUF - 1))) * sizeof(pcsca_bd_t))); + cpc_writel(&ptdescr->ptbuf, + (uclong) (DMA_RX_BASE + (ch_factor + i) * BD_DEF_LEN)); + } +} + +static void rx_dma_buf_init(pc300_t * card, int ch) +{ + int i; + int ch_factor = ch * N_DMA_RX_BUF; + volatile pcsca_bd_t *ptdescr = (pcsca_bd_t *) (card->hw.rambase + + DMA_RX_BD_BASE + ch_factor * sizeof(pcsca_bd_t)); + + for (i = 0; i < N_DMA_RX_BUF; i++, ptdescr++) { + memset_io(ptdescr, 0, sizeof(pcsca_bd_t)); + cpc_writew(&ptdescr->len, 0); + cpc_writeb(&ptdescr->status, 0); + } + rx_dma_buf_pt_init(card, ch); +} + +static void tx_dma_buf_check(pc300_t * card, int ch) +{ + volatile pcsca_bd_t *ptdescr; + int i; + ucshort first_bd = card->chan[ch].tx_first_bd; + ucshort next_bd = card->chan[ch].tx_next_bd; + + printk("#CH%d: f_bd = %d(0x%08x), n_bd = %d(0x%08x)\n", ch, + first_bd, TX_BD_ADDR(ch, first_bd), + next_bd, TX_BD_ADDR(ch, next_bd)); + for (i = first_bd, + ptdescr = (pcsca_bd_t *) (card->hw.rambase + TX_BD_ADDR(ch, first_bd)); + i != ((next_bd + 1) & (N_DMA_TX_BUF - 1)); + i = (i + 1) & (N_DMA_TX_BUF - 1), + ptdescr = (pcsca_bd_t *) (card->hw.rambase + TX_BD_ADDR(ch, i))) { + printk("\n CH%d TX%d: next=0x%lx, ptbuf=0x%lx, ST=0x%x, len=%d", + ch, i, (uclong) cpc_readl(&ptdescr->next), + (uclong) cpc_readl(&ptdescr->ptbuf), + cpc_readb(&ptdescr->status), cpc_readw(&ptdescr->len)); + } + printk("\n"); +} + +#ifdef PC300_DEBUG_OTHER +/* Show all TX buffer descriptors */ +static void tx1_dma_buf_check(pc300_t * card, int ch) +{ + volatile pcsca_bd_t *ptdescr; + int i; + ucshort first_bd = card->chan[ch].tx_first_bd; + ucshort next_bd = card->chan[ch].tx_next_bd; + uclong scabase = card->hw.scabase; + + printk ("\nnfree_tx_bd = %d \n", card->chan[ch].nfree_tx_bd); + printk("#CH%d: f_bd = %d(0x%08x), n_bd = %d(0x%08x)\n", ch, + first_bd, TX_BD_ADDR(ch, first_bd), + next_bd, TX_BD_ADDR(ch, next_bd)); + printk("TX_CDA=0x%08lx, TX_EDA=0x%08lx\n", + (uclong) cpc_readl(scabase + DTX_REG(CDAL, ch)), + (uclong) cpc_readl(scabase + DTX_REG(EDAL, ch))); + for (i = 0; i < N_DMA_TX_BUF; i++) { + ptdescr = (pcsca_bd_t *) (card->hw.rambase + TX_BD_ADDR(ch, i)); + printk("\n CH%d TX%d: next=0x%lx, ptbuf=0x%lx, ST=0x%x, len=%d", + ch, i, (uclong) cpc_readl(&ptdescr->next), + (uclong) cpc_readl(&ptdescr->ptbuf), + cpc_readb(&ptdescr->status), cpc_readw(&ptdescr->len)); + } + printk("\n"); +} +#endif + +static void rx_dma_buf_check(pc300_t * card, int ch) +{ + volatile pcsca_bd_t *ptdescr; + int i; + ucshort first_bd = card->chan[ch].rx_first_bd; + ucshort last_bd = card->chan[ch].rx_last_bd; + int ch_factor; + + ch_factor = ch * N_DMA_RX_BUF; + printk("#CH%d: f_bd = %d, l_bd = %d\n", ch, first_bd, last_bd); + for (i = 0, ptdescr = (pcsca_bd_t *) (card->hw.rambase + + DMA_RX_BD_BASE + ch_factor * sizeof(pcsca_bd_t)); + i < N_DMA_RX_BUF; i++, ptdescr++) { + if (cpc_readb(&ptdescr->status) & DST_OSB) + printk ("\n CH%d RX%d: next=0x%lx, ptbuf=0x%lx, ST=0x%x, len=%d", + ch, i, (uclong) cpc_readl(&ptdescr->next), + (uclong) cpc_readl(&ptdescr->ptbuf), + cpc_readb(&ptdescr->status), + cpc_readw(&ptdescr->len)); + } + printk("\n"); +} + +int dma_get_rx_frame_size(pc300_t * card, int ch) +{ + volatile pcsca_bd_t *ptdescr; + ucshort first_bd = card->chan[ch].rx_first_bd; + int rcvd = 0; + volatile ucchar status; + + ptdescr = (pcsca_bd_t *)(card->hw.rambase + RX_BD_ADDR(ch, first_bd)); + while ((status = cpc_readb(&ptdescr->status)) & DST_OSB) { + rcvd += cpc_readw(&ptdescr->len); + first_bd = (first_bd + 1) & (N_DMA_RX_BUF - 1); + if ((status & DST_EOM) || (first_bd == card->chan[ch].rx_last_bd)) { + /* Return the size of a good frame or incomplete bad frame + * (dma_buf_read will clean the buffer descriptors in this case). */ + return (rcvd); + } + ptdescr = (pcsca_bd_t *)(card->hw.rambase + cpc_readl(&ptdescr->next)); + } + return (-1); +} + +/* + * dma_buf_write: writes a frame to the Tx DMA buffers + * NOTE: this function writes one frame at a time. + */ +int dma_buf_write(pc300_t * card, int ch, ucchar * ptdata, int len) +{ + int i, nchar; + volatile pcsca_bd_t *ptdescr; + int tosend = len; + ucchar nbuf = ((len - 1) / BD_DEF_LEN) + 1; + + if (nbuf >= card->chan[ch].nfree_tx_bd) { + return -ENOMEM; + } + + for (i = 0; i < nbuf; i++) { + ptdescr = (pcsca_bd_t *) (card->hw.rambase + + TX_BD_ADDR(ch, card->chan[ch].tx_next_bd)); + nchar = cpc_min(BD_DEF_LEN, tosend); + if (cpc_readb(&ptdescr->status) & DST_OSB) { + memcpy_toio((void *)(card->hw.rambase + cpc_readl(&ptdescr->ptbuf)), + &ptdata[len - tosend], nchar); + cpc_writew(&ptdescr->len, nchar); + card->chan[ch].nfree_tx_bd--; + if ((i + 1) == nbuf) { + /* This must be the last BD to be used */ + cpc_writeb(&ptdescr->status, DST_EOM); + } else { + cpc_writeb(&ptdescr->status, 0); + } + } else { + return -ENOMEM; + } + tosend -= nchar; + card->chan[ch].tx_next_bd = + (card->chan[ch].tx_next_bd + 1) & (N_DMA_TX_BUF - 1); + } + /* If it gets to here, it means we have sent the whole frame */ + return 0; +} + +/* + * dma_buf_read: reads a frame from the Rx DMA buffers + * NOTE: this function reads one frame at a time. + */ +int dma_buf_read(pc300_t * card, int ch, struct sk_buff *skb) +{ + int nchar; + pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; + volatile pcsca_bd_t *ptdescr; + int rcvd = 0; + volatile ucchar status; + + ptdescr = (pcsca_bd_t *) (card->hw.rambase + + RX_BD_ADDR(ch, chan->rx_first_bd)); + while ((status = cpc_readb(&ptdescr->status)) & DST_OSB) { + nchar = cpc_readw(&ptdescr->len); + if ((status & (DST_OVR | DST_CRC | DST_RBIT | DST_SHRT | DST_ABT)) + || (nchar > BD_DEF_LEN)) { + + if (nchar > BD_DEF_LEN) + status |= DST_RBIT; + rcvd = -status; + /* Discard remaining descriptors used by the bad frame */ + while (chan->rx_first_bd != chan->rx_last_bd) { + cpc_writeb(&ptdescr->status, 0); + chan->rx_first_bd = (chan->rx_first_bd+1) & (N_DMA_RX_BUF-1); + if (status & DST_EOM) + break; + ptdescr = (pcsca_bd_t *) (card->hw.rambase + + cpc_readl(&ptdescr->next)); + status = cpc_readb(&ptdescr->status); + } + break; + } + if (nchar != 0) { + if (skb) { + memcpy_fromio(skb_put(skb, nchar), + (void *)(card->hw.rambase+cpc_readl(&ptdescr->ptbuf)),nchar); + } + rcvd += nchar; + } + cpc_writeb(&ptdescr->status, 0); + cpc_writeb(&ptdescr->len, 0); + chan->rx_first_bd = (chan->rx_first_bd + 1) & (N_DMA_RX_BUF - 1); + + if (status & DST_EOM) + break; + + ptdescr = (pcsca_bd_t *) (card->hw.rambase + cpc_readl(&ptdescr->next)); + } + + if (rcvd != 0) { + /* Update pointer */ + chan->rx_last_bd = (chan->rx_first_bd - 1) & (N_DMA_RX_BUF - 1); + /* Update EDA */ + cpc_writel(card->hw.scabase + DRX_REG(EDAL, ch), + RX_BD_ADDR(ch, chan->rx_last_bd)); + } + return (rcvd); +} + +void tx_dma_stop(pc300_t * card, int ch) +{ + uclong scabase = card->hw.scabase; + ucchar drr_ena_bit = 1 << (5 + 2 * ch); + ucchar drr_rst_bit = 1 << (1 + 2 * ch); + + /* Disable DMA */ + cpc_writeb(scabase + DRR, drr_ena_bit); + cpc_writeb(scabase + DRR, drr_rst_bit & ~drr_ena_bit); +} + +void rx_dma_stop(pc300_t * card, int ch) +{ + uclong scabase = card->hw.scabase; + ucchar drr_ena_bit = 1 << (4 + 2 * ch); + ucchar drr_rst_bit = 1 << (2 * ch); + + /* Disable DMA */ + cpc_writeb(scabase + DRR, drr_ena_bit); + cpc_writeb(scabase + DRR, drr_rst_bit & ~drr_ena_bit); +} + +void rx_dma_start(pc300_t * card, int ch) +{ + uclong scabase = card->hw.scabase; + pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; + + /* Start DMA */ + cpc_writel(scabase + DRX_REG(CDAL, ch), + RX_BD_ADDR(ch, chan->rx_first_bd)); + if (cpc_readl(scabase + DRX_REG(CDAL,ch)) != + RX_BD_ADDR(ch, chan->rx_first_bd)) { + cpc_writel(scabase + DRX_REG(CDAL, ch), + RX_BD_ADDR(ch, chan->rx_first_bd)); + } + cpc_writel(scabase + DRX_REG(EDAL, ch), + RX_BD_ADDR(ch, chan->rx_last_bd)); + cpc_writew(scabase + DRX_REG(BFLL, ch), BD_DEF_LEN); + cpc_writeb(scabase + DSR_RX(ch), DSR_DE); + if (!(cpc_readb(scabase + DSR_RX(ch)) & DSR_DE)) { + cpc_writeb(scabase + DSR_RX(ch), DSR_DE); + } +} + +/*************************/ +/*** FALC Routines ***/ +/*************************/ +void falc_issue_cmd(pc300_t * card, int ch, ucchar cmd) +{ + uclong falcbase = card->hw.falcbase; + unsigned long i = 0; + + while (cpc_readb(falcbase + F_REG(SIS, ch)) & SIS_CEC) { + if (i++ >= PC300_FALC_MAXLOOP) { + printk("%s: FALC command locked(cmd=0x%x).\n", + card->chan[ch].d.name, cmd); + break; + } + } + cpc_writeb(falcbase + F_REG(CMDR, ch), cmd); +} + +void falc_intr_enable(pc300_t * card, int ch) +{ + pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; + pc300chconf_t *conf = (pc300chconf_t *) & chan->conf; + falc_t *pfalc = (falc_t *) & chan->falc; + uclong falcbase = card->hw.falcbase; + + /* Interrupt pins are open-drain */ + cpc_writeb(falcbase + F_REG(IPC, ch), + cpc_readb(falcbase + F_REG(IPC, ch)) & ~IPC_IC0); + /* Conters updated each second */ + cpc_writeb(falcbase + F_REG(FMR1, ch), + cpc_readb(falcbase + F_REG(FMR1, ch)) | FMR1_ECM); + /* Enable SEC and ES interrupts */ + cpc_writeb(falcbase + F_REG(IMR3, ch), + cpc_readb(falcbase + F_REG(IMR3, ch)) & ~(IMR3_SEC | IMR3_ES)); + if (conf->fr_mode == PC300_FR_UNFRAMED) { + cpc_writeb(falcbase + F_REG(IMR4, ch), + cpc_readb(falcbase + F_REG(IMR4, ch)) & ~(IMR4_LOS)); + } else { + cpc_writeb(falcbase + F_REG(IMR4, ch), + cpc_readb(falcbase + F_REG(IMR4, ch)) & + ~(IMR4_LFA | IMR4_AIS | IMR4_LOS | IMR4_SLIP)); + } + if (conf->media == IF_IFACE_T1) { + cpc_writeb(falcbase + F_REG(IMR3, ch), + cpc_readb(falcbase + F_REG(IMR3, ch)) & ~IMR3_LLBSC); + } else { + cpc_writeb(falcbase + F_REG(IPC, ch), + cpc_readb(falcbase + F_REG(IPC, ch)) | IPC_SCI); + if (conf->fr_mode == PC300_FR_UNFRAMED) { + cpc_writeb(falcbase + F_REG(IMR2, ch), + cpc_readb(falcbase + F_REG(IMR2, ch)) & ~(IMR2_LOS)); + } else { + cpc_writeb(falcbase + F_REG(IMR2, ch), + cpc_readb(falcbase + F_REG(IMR2, ch)) & + ~(IMR2_FAR | IMR2_LFA | IMR2_AIS | IMR2_LOS)); + if (pfalc->multiframe_mode) { + cpc_writeb(falcbase + F_REG(IMR2, ch), + cpc_readb(falcbase + F_REG(IMR2, ch)) & + ~(IMR2_T400MS | IMR2_MFAR)); + } else { + cpc_writeb(falcbase + F_REG(IMR2, ch), + cpc_readb(falcbase + F_REG(IMR2, ch)) | + IMR2_T400MS | IMR2_MFAR); + } + } + } +} + +void falc_open_timeslot(pc300_t * card, int ch, int timeslot) +{ + uclong falcbase = card->hw.falcbase; + ucchar tshf = card->chan[ch].falc.offset; + + cpc_writeb(falcbase + F_REG((ICB1 + (timeslot - tshf) / 8), ch), + cpc_readb(falcbase + F_REG((ICB1 + (timeslot - tshf) / 8), ch)) & + ~(0x80 >> ((timeslot - tshf) & 0x07))); + cpc_writeb(falcbase + F_REG((TTR1 + timeslot / 8), ch), + cpc_readb(falcbase + F_REG((TTR1 + timeslot / 8), ch)) | + (0x80 >> (timeslot & 0x07))); + cpc_writeb(falcbase + F_REG((RTR1 + timeslot / 8), ch), + cpc_readb(falcbase + F_REG((RTR1 + timeslot / 8), ch)) | + (0x80 >> (timeslot & 0x07))); +} + +void falc_close_timeslot(pc300_t * card, int ch, int timeslot) +{ + uclong falcbase = card->hw.falcbase; + ucchar tshf = card->chan[ch].falc.offset; + + cpc_writeb(falcbase + F_REG((ICB1 + (timeslot - tshf) / 8), ch), + cpc_readb(falcbase + F_REG((ICB1 + (timeslot - tshf) / 8), ch)) | + (0x80 >> ((timeslot - tshf) & 0x07))); + cpc_writeb(falcbase + F_REG((TTR1 + timeslot / 8), ch), + cpc_readb(falcbase + F_REG((TTR1 + timeslot / 8), ch)) & + ~(0x80 >> (timeslot & 0x07))); + cpc_writeb(falcbase + F_REG((RTR1 + timeslot / 8), ch), + cpc_readb(falcbase + F_REG((RTR1 + timeslot / 8), ch)) & + ~(0x80 >> (timeslot & 0x07))); +} + +void falc_close_all_timeslots(pc300_t * card, int ch) +{ + pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; + pc300chconf_t *conf = (pc300chconf_t *) & chan->conf; + uclong falcbase = card->hw.falcbase; + + cpc_writeb(falcbase + F_REG(ICB1, ch), 0xff); + cpc_writeb(falcbase + F_REG(TTR1, ch), 0); + cpc_writeb(falcbase + F_REG(RTR1, ch), 0); + cpc_writeb(falcbase + F_REG(ICB2, ch), 0xff); + cpc_writeb(falcbase + F_REG(TTR2, ch), 0); + cpc_writeb(falcbase + F_REG(RTR2, ch), 0); + cpc_writeb(falcbase + F_REG(ICB3, ch), 0xff); + cpc_writeb(falcbase + F_REG(TTR3, ch), 0); + cpc_writeb(falcbase + F_REG(RTR3, ch), 0); + if (conf->media == IF_IFACE_E1) { + cpc_writeb(falcbase + F_REG(ICB4, ch), 0xff); + cpc_writeb(falcbase + F_REG(TTR4, ch), 0); + cpc_writeb(falcbase + F_REG(RTR4, ch), 0); + } +} + +void falc_open_all_timeslots(pc300_t * card, int ch) +{ + pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; + pc300chconf_t *conf = (pc300chconf_t *) & chan->conf; + uclong falcbase = card->hw.falcbase; + + cpc_writeb(falcbase + F_REG(ICB1, ch), 0); + if (conf->fr_mode == PC300_FR_UNFRAMED) { + cpc_writeb(falcbase + F_REG(TTR1, ch), 0xff); + cpc_writeb(falcbase + F_REG(RTR1, ch), 0xff); + } else { + /* Timeslot 0 is never enabled */ + cpc_writeb(falcbase + F_REG(TTR1, ch), 0x7f); + cpc_writeb(falcbase + F_REG(RTR1, ch), 0x7f); + } + cpc_writeb(falcbase + F_REG(ICB2, ch), 0); + cpc_writeb(falcbase + F_REG(TTR2, ch), 0xff); + cpc_writeb(falcbase + F_REG(RTR2, ch), 0xff); + cpc_writeb(falcbase + F_REG(ICB3, ch), 0); + cpc_writeb(falcbase + F_REG(TTR3, ch), 0xff); + cpc_writeb(falcbase + F_REG(RTR3, ch), 0xff); + if (conf->media == IF_IFACE_E1) { + cpc_writeb(falcbase + F_REG(ICB4, ch), 0); + cpc_writeb(falcbase + F_REG(TTR4, ch), 0xff); + cpc_writeb(falcbase + F_REG(RTR4, ch), 0xff); + } else { + cpc_writeb(falcbase + F_REG(ICB4, ch), 0xff); + cpc_writeb(falcbase + F_REG(TTR4, ch), 0x80); + cpc_writeb(falcbase + F_REG(RTR4, ch), 0x80); + } +} + +void falc_init_timeslot(pc300_t * card, int ch) +{ + pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; + pc300chconf_t *conf = (pc300chconf_t *) & chan->conf; + falc_t *pfalc = (falc_t *) & chan->falc; + int tslot; + + for (tslot = 0; tslot < pfalc->num_channels; tslot++) { + if (conf->tslot_bitmap & (1 << tslot)) { + // Channel enabled + falc_open_timeslot(card, ch, tslot + 1); + } else { + // Channel disabled + falc_close_timeslot(card, ch, tslot + 1); + } + } +} + +void falc_enable_comm(pc300_t * card, int ch) +{ + pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; + falc_t *pfalc = (falc_t *) & chan->falc; + + if (pfalc->full_bandwidth) { + falc_open_all_timeslots(card, ch); + } else { + falc_init_timeslot(card, ch); + } + // CTS/DCD ON + cpc_writeb(card->hw.falcbase + card->hw.cpld_reg1, + cpc_readb(card->hw.falcbase + card->hw.cpld_reg1) & + ~((CPLD_REG1_FALC_DCD | CPLD_REG1_FALC_CTS) << (2 * ch))); +} + +void falc_disable_comm(pc300_t * card, int ch) +{ + pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; + falc_t *pfalc = (falc_t *) & chan->falc; + + if (pfalc->loop_active != 2) { + falc_close_all_timeslots(card, ch); + } + // CTS/DCD OFF + cpc_writeb(card->hw.falcbase + card->hw.cpld_reg1, + cpc_readb(card->hw.falcbase + card->hw.cpld_reg1) | + ((CPLD_REG1_FALC_DCD | CPLD_REG1_FALC_CTS) << (2 * ch))); +} + +void falc_init_t1(pc300_t * card, int ch) +{ + pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; + pc300chconf_t *conf = (pc300chconf_t *) & chan->conf; + falc_t *pfalc = (falc_t *) & chan->falc; + uclong falcbase = card->hw.falcbase; + ucchar dja = (ch ? (LIM2_DJA2 | LIM2_DJA1) : 0); + + /* Switch to T1 mode (PCM 24) */ + cpc_writeb(falcbase + F_REG(FMR1, ch), FMR1_PMOD); + + /* Wait 20 us for setup */ + udelay(20); + + /* Transmit Buffer Size (1 frame) */ + cpc_writeb(falcbase + F_REG(SIC1, ch), SIC1_XBS0); + + /* Clock mode */ + if (conf->phys_settings.clock_type == CLOCK_INT) { /* Master mode */ + cpc_writeb(falcbase + F_REG(LIM0, ch), + cpc_readb(falcbase + F_REG(LIM0, ch)) | LIM0_MAS); + } else { /* Slave mode */ + cpc_writeb(falcbase + F_REG(LIM0, ch), + cpc_readb(falcbase + F_REG(LIM0, ch)) & ~LIM0_MAS); + cpc_writeb(falcbase + F_REG(LOOP, ch), + cpc_readb(falcbase + F_REG(LOOP, ch)) & ~LOOP_RTM); + } + + cpc_writeb(falcbase + F_REG(IPC, ch), IPC_SCI); + cpc_writeb(falcbase + F_REG(FMR0, ch), + cpc_readb(falcbase + F_REG(FMR0, ch)) & + ~(FMR0_XC0 | FMR0_XC1 | FMR0_RC0 | FMR0_RC1)); + + switch (conf->lcode) { + case PC300_LC_AMI: + cpc_writeb(falcbase + F_REG(FMR0, ch), + cpc_readb(falcbase + F_REG(FMR0, ch)) | + FMR0_XC1 | FMR0_RC1); + /* Clear Channel register to ON for all channels */ + cpc_writeb(falcbase + F_REG(CCB1, ch), 0xff); + cpc_writeb(falcbase + F_REG(CCB2, ch), 0xff); + cpc_writeb(falcbase + F_REG(CCB3, ch), 0xff); + break; + + case PC300_LC_B8ZS: + cpc_writeb(falcbase + F_REG(FMR0, ch), + cpc_readb(falcbase + F_REG(FMR0, ch)) | + FMR0_XC0 | FMR0_XC1 | FMR0_RC0 | FMR0_RC1); + break; + + case PC300_LC_NRZ: + cpc_writeb(falcbase + F_REG(FMR0, ch), + cpc_readb(falcbase + F_REG(FMR0, ch)) | 0x00); + break; + } + + cpc_writeb(falcbase + F_REG(LIM0, ch), + cpc_readb(falcbase + F_REG(LIM0, ch)) | LIM0_ELOS); + cpc_writeb(falcbase + F_REG(LIM0, ch), + cpc_readb(falcbase + F_REG(LIM0, ch)) & ~(LIM0_SCL1 | LIM0_SCL0)); + /* Set interface mode to 2 MBPS */ + cpc_writeb(falcbase + F_REG(FMR1, ch), + cpc_readb(falcbase + F_REG(FMR1, ch)) | FMR1_IMOD); + + switch (conf->fr_mode) { + case PC300_FR_ESF: + pfalc->multiframe_mode = 0; + cpc_writeb(falcbase + F_REG(FMR4, ch), + cpc_readb(falcbase + F_REG(FMR4, ch)) | FMR4_FM1); + cpc_writeb(falcbase + F_REG(FMR1, ch), + cpc_readb(falcbase + F_REG(FMR1, ch)) | + FMR1_CRC | FMR1_EDL); + cpc_writeb(falcbase + F_REG(XDL1, ch), 0); + cpc_writeb(falcbase + F_REG(XDL2, ch), 0); + cpc_writeb(falcbase + F_REG(XDL3, ch), 0); + cpc_writeb(falcbase + F_REG(FMR0, ch), + cpc_readb(falcbase + F_REG(FMR0, ch)) & ~FMR0_SRAF); + cpc_writeb(falcbase + F_REG(FMR2, ch), + cpc_readb(falcbase + F_REG(FMR2,ch)) | FMR2_MCSP | FMR2_SSP); + break; + + case PC300_FR_D4: + pfalc->multiframe_mode = 1; + cpc_writeb(falcbase + F_REG(FMR4, ch), + cpc_readb(falcbase + F_REG(FMR4, ch)) & + ~(FMR4_FM1 | FMR4_FM0)); + cpc_writeb(falcbase + F_REG(FMR0, ch), + cpc_readb(falcbase + F_REG(FMR0, ch)) | FMR0_SRAF); + cpc_writeb(falcbase + F_REG(FMR2, ch), + cpc_readb(falcbase + F_REG(FMR2, ch)) & ~FMR2_SSP); + break; + } + + /* Enable Automatic Resynchronization */ + cpc_writeb(falcbase + F_REG(FMR4, ch), + cpc_readb(falcbase + F_REG(FMR4, ch)) | FMR4_AUTO); + + /* Transmit Automatic Remote Alarm */ + cpc_writeb(falcbase + F_REG(FMR2, ch), + cpc_readb(falcbase + F_REG(FMR2, ch)) | FMR2_AXRA); + + /* Channel translation mode 1 : one to one */ + cpc_writeb(falcbase + F_REG(FMR1, ch), + cpc_readb(falcbase + F_REG(FMR1, ch)) | FMR1_CTM); + + /* No signaling */ + cpc_writeb(falcbase + F_REG(FMR1, ch), + cpc_readb(falcbase + F_REG(FMR1, ch)) & ~FMR1_SIGM); + cpc_writeb(falcbase + F_REG(FMR5, ch), + cpc_readb(falcbase + F_REG(FMR5, ch)) & + ~(FMR5_EIBR | FMR5_SRS)); + cpc_writeb(falcbase + F_REG(CCR1, ch), 0); + + cpc_writeb(falcbase + F_REG(LIM1, ch), + cpc_readb(falcbase + F_REG(LIM1, ch)) | LIM1_RIL0 | LIM1_RIL1); + + switch (conf->lbo) { + /* Provides proper Line Build Out */ + case PC300_LBO_0_DB: + cpc_writeb(falcbase + F_REG(LIM2, ch), (LIM2_LOS1 | dja)); + cpc_writeb(falcbase + F_REG(XPM0, ch), 0x5a); + cpc_writeb(falcbase + F_REG(XPM1, ch), 0x8f); + cpc_writeb(falcbase + F_REG(XPM2, ch), 0x20); + break; + case PC300_LBO_7_5_DB: + cpc_writeb(falcbase + F_REG(LIM2, ch), (0x40 | LIM2_LOS1 | dja)); + cpc_writeb(falcbase + F_REG(XPM0, ch), 0x11); + cpc_writeb(falcbase + F_REG(XPM1, ch), 0x02); + cpc_writeb(falcbase + F_REG(XPM2, ch), 0x20); + break; + case PC300_LBO_15_DB: + cpc_writeb(falcbase + F_REG(LIM2, ch), (0x80 | LIM2_LOS1 | dja)); + cpc_writeb(falcbase + F_REG(XPM0, ch), 0x8e); + cpc_writeb(falcbase + F_REG(XPM1, ch), 0x01); + cpc_writeb(falcbase + F_REG(XPM2, ch), 0x20); + break; + case PC300_LBO_22_5_DB: + cpc_writeb(falcbase + F_REG(LIM2, ch), (0xc0 | LIM2_LOS1 | dja)); + cpc_writeb(falcbase + F_REG(XPM0, ch), 0x09); + cpc_writeb(falcbase + F_REG(XPM1, ch), 0x01); + cpc_writeb(falcbase + F_REG(XPM2, ch), 0x20); + break; + } + + /* Transmit Clock-Slot Offset */ + cpc_writeb(falcbase + F_REG(XC0, ch), + cpc_readb(falcbase + F_REG(XC0, ch)) | 0x01); + /* Transmit Time-slot Offset */ + cpc_writeb(falcbase + F_REG(XC1, ch), 0x3e); + /* Receive Clock-Slot offset */ + cpc_writeb(falcbase + F_REG(RC0, ch), 0x05); + /* Receive Time-slot offset */ + cpc_writeb(falcbase + F_REG(RC1, ch), 0x00); + + /* LOS Detection after 176 consecutive 0s */ + cpc_writeb(falcbase + F_REG(PCDR, ch), 0x0a); + /* LOS Recovery after 22 ones in the time window of PCD */ + cpc_writeb(falcbase + F_REG(PCRR, ch), 0x15); + + cpc_writeb(falcbase + F_REG(IDLE, ch), 0x7f); + + if (conf->fr_mode == PC300_FR_ESF_JAPAN) { + cpc_writeb(falcbase + F_REG(RC1, ch), + cpc_readb(falcbase + F_REG(RC1, ch)) | 0x80); + } + + falc_close_all_timeslots(card, ch); +} + +void falc_init_e1(pc300_t * card, int ch) +{ + pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; + pc300chconf_t *conf = (pc300chconf_t *) & chan->conf; + falc_t *pfalc = (falc_t *) & chan->falc; + uclong falcbase = card->hw.falcbase; + ucchar dja = (ch ? (LIM2_DJA2 | LIM2_DJA1) : 0); + + /* Switch to E1 mode (PCM 30) */ + cpc_writeb(falcbase + F_REG(FMR1, ch), + cpc_readb(falcbase + F_REG(FMR1, ch)) & ~FMR1_PMOD); + + /* Clock mode */ + if (conf->phys_settings.clock_type == CLOCK_INT) { /* Master mode */ + cpc_writeb(falcbase + F_REG(LIM0, ch), + cpc_readb(falcbase + F_REG(LIM0, ch)) | LIM0_MAS); + } else { /* Slave mode */ + cpc_writeb(falcbase + F_REG(LIM0, ch), + cpc_readb(falcbase + F_REG(LIM0, ch)) & ~LIM0_MAS); + } + cpc_writeb(falcbase + F_REG(LOOP, ch), + cpc_readb(falcbase + F_REG(LOOP, ch)) & ~LOOP_SFM); + + cpc_writeb(falcbase + F_REG(IPC, ch), IPC_SCI); + cpc_writeb(falcbase + F_REG(FMR0, ch), + cpc_readb(falcbase + F_REG(FMR0, ch)) & + ~(FMR0_XC0 | FMR0_XC1 | FMR0_RC0 | FMR0_RC1)); + + switch (conf->lcode) { + case PC300_LC_AMI: + cpc_writeb(falcbase + F_REG(FMR0, ch), + cpc_readb(falcbase + F_REG(FMR0, ch)) | + FMR0_XC1 | FMR0_RC1); + break; + + case PC300_LC_HDB3: + cpc_writeb(falcbase + F_REG(FMR0, ch), + cpc_readb(falcbase + F_REG(FMR0, ch)) | + FMR0_XC0 | FMR0_XC1 | FMR0_RC0 | FMR0_RC1); + break; + + case PC300_LC_NRZ: + break; + } + + cpc_writeb(falcbase + F_REG(LIM0, ch), + cpc_readb(falcbase + F_REG(LIM0, ch)) & ~(LIM0_SCL1 | LIM0_SCL0)); + /* Set interface mode to 2 MBPS */ + cpc_writeb(falcbase + F_REG(FMR1, ch), + cpc_readb(falcbase + F_REG(FMR1, ch)) | FMR1_IMOD); + + cpc_writeb(falcbase + F_REG(XPM0, ch), 0x18); + cpc_writeb(falcbase + F_REG(XPM1, ch), 0x03); + cpc_writeb(falcbase + F_REG(XPM2, ch), 0x00); + + switch (conf->fr_mode) { + case PC300_FR_MF_CRC4: + pfalc->multiframe_mode = 1; + cpc_writeb(falcbase + F_REG(FMR1, ch), + cpc_readb(falcbase + F_REG(FMR1, ch)) | FMR1_XFS); + cpc_writeb(falcbase + F_REG(FMR2, ch), + cpc_readb(falcbase + F_REG(FMR2, ch)) | FMR2_RFS1); + cpc_writeb(falcbase + F_REG(FMR2, ch), + cpc_readb(falcbase + F_REG(FMR2, ch)) & ~FMR2_RFS0); + cpc_writeb(falcbase + F_REG(FMR3, ch), + cpc_readb(falcbase + F_REG(FMR3, ch)) & ~FMR3_EXTIW); + + /* MultiFrame Resynchronization */ + cpc_writeb(falcbase + F_REG(FMR1, ch), + cpc_readb(falcbase + F_REG(FMR1, ch)) | FMR1_MFCS); + + /* Automatic Loss of Multiframe > 914 CRC errors */ + cpc_writeb(falcbase + F_REG(FMR2, ch), + cpc_readb(falcbase + F_REG(FMR2, ch)) | FMR2_ALMF); + + /* S1 and SI1/SI2 spare Bits set to 1 */ + cpc_writeb(falcbase + F_REG(XSP, ch), + cpc_readb(falcbase + F_REG(XSP, ch)) & ~XSP_AXS); + cpc_writeb(falcbase + F_REG(XSP, ch), + cpc_readb(falcbase + F_REG(XSP, ch)) | XSP_EBP); + cpc_writeb(falcbase + F_REG(XSP, ch), + cpc_readb(falcbase + F_REG(XSP, ch)) | XSP_XS13 | XSP_XS15); + + /* Automatic Force Resynchronization */ + cpc_writeb(falcbase + F_REG(FMR1, ch), + cpc_readb(falcbase + F_REG(FMR1, ch)) | FMR1_AFR); + + /* Transmit Automatic Remote Alarm */ + cpc_writeb(falcbase + F_REG(FMR2, ch), + cpc_readb(falcbase + F_REG(FMR2, ch)) | FMR2_AXRA); + + /* Transmit Spare Bits for National Use (Y, Sn, Sa) */ + cpc_writeb(falcbase + F_REG(XSW, ch), + cpc_readb(falcbase + F_REG(XSW, ch)) | + XSW_XY0 | XSW_XY1 | XSW_XY2 | XSW_XY3 | XSW_XY4); + break; + + case PC300_FR_MF_NON_CRC4: + case PC300_FR_D4: + pfalc->multiframe_mode = 0; + cpc_writeb(falcbase + F_REG(FMR1, ch), + cpc_readb(falcbase + F_REG(FMR1, ch)) & ~FMR1_XFS); + cpc_writeb(falcbase + F_REG(FMR2, ch), + cpc_readb(falcbase + F_REG(FMR2, ch)) & + ~(FMR2_RFS1 | FMR2_RFS0)); + cpc_writeb(falcbase + F_REG(XSW, ch), + cpc_readb(falcbase + F_REG(XSW, ch)) | XSW_XSIS); + cpc_writeb(falcbase + F_REG(XSP, ch), + cpc_readb(falcbase + F_REG(XSP, ch)) | XSP_XSIF); + + /* Automatic Force Resynchronization */ + cpc_writeb(falcbase + F_REG(FMR1, ch), + cpc_readb(falcbase + F_REG(FMR1, ch)) | FMR1_AFR); + + /* Transmit Automatic Remote Alarm */ + cpc_writeb(falcbase + F_REG(FMR2, ch), + cpc_readb(falcbase + F_REG(FMR2, ch)) | FMR2_AXRA); + + /* Transmit Spare Bits for National Use (Y, Sn, Sa) */ + cpc_writeb(falcbase + F_REG(XSW, ch), + cpc_readb(falcbase + F_REG(XSW, ch)) | + XSW_XY0 | XSW_XY1 | XSW_XY2 | XSW_XY3 | XSW_XY4); + break; + + case PC300_FR_UNFRAMED: + pfalc->multiframe_mode = 0; + cpc_writeb(falcbase + F_REG(FMR1, ch), + cpc_readb(falcbase + F_REG(FMR1, ch)) & ~FMR1_XFS); + cpc_writeb(falcbase + F_REG(FMR2, ch), + cpc_readb(falcbase + F_REG(FMR2, ch)) & + ~(FMR2_RFS1 | FMR2_RFS0)); + cpc_writeb(falcbase + F_REG(XSP, ch), + cpc_readb(falcbase + F_REG(XSP, ch)) | XSP_TT0); + cpc_writeb(falcbase + F_REG(XSW, ch), + cpc_readb(falcbase + F_REG(XSW, ch)) & + ~(XSW_XTM|XSW_XY0|XSW_XY1|XSW_XY2|XSW_XY3|XSW_XY4)); + cpc_writeb(falcbase + F_REG(TSWM, ch), 0xff); + cpc_writeb(falcbase + F_REG(FMR2, ch), + cpc_readb(falcbase + F_REG(FMR2, ch)) | + (FMR2_RTM | FMR2_DAIS)); + cpc_writeb(falcbase + F_REG(FMR2, ch), + cpc_readb(falcbase + F_REG(FMR2, ch)) & ~FMR2_AXRA); + cpc_writeb(falcbase + F_REG(FMR1, ch), + cpc_readb(falcbase + F_REG(FMR1, ch)) & ~FMR1_AFR); + pfalc->sync = 1; + cpc_writeb(falcbase + card->hw.cpld_reg2, + cpc_readb(falcbase + card->hw.cpld_reg2) | + (CPLD_REG2_FALC_LED2 << (2 * ch))); + break; + } + + /* No signaling */ + cpc_writeb(falcbase + F_REG(XSP, ch), + cpc_readb(falcbase + F_REG(XSP, ch)) & ~XSP_CASEN); + cpc_writeb(falcbase + F_REG(CCR1, ch), 0); + + cpc_writeb(falcbase + F_REG(LIM1, ch), + cpc_readb(falcbase + F_REG(LIM1, ch)) | LIM1_RIL0 | LIM1_RIL1); + cpc_writeb(falcbase + F_REG(LIM2, ch), (LIM2_LOS1 | dja)); + + /* Transmit Clock-Slot Offset */ + cpc_writeb(falcbase + F_REG(XC0, ch), + cpc_readb(falcbase + F_REG(XC0, ch)) | 0x01); + /* Transmit Time-slot Offset */ + cpc_writeb(falcbase + F_REG(XC1, ch), 0x3e); + /* Receive Clock-Slot offset */ + cpc_writeb(falcbase + F_REG(RC0, ch), 0x05); + /* Receive Time-slot offset */ + cpc_writeb(falcbase + F_REG(RC1, ch), 0x00); + + /* LOS Detection after 176 consecutive 0s */ + cpc_writeb(falcbase + F_REG(PCDR, ch), 0x0a); + /* LOS Recovery after 22 ones in the time window of PCD */ + cpc_writeb(falcbase + F_REG(PCRR, ch), 0x15); + + cpc_writeb(falcbase + F_REG(IDLE, ch), 0x7f); + + falc_close_all_timeslots(card, ch); +} + +void falc_init_hdlc(pc300_t * card, int ch) +{ + uclong falcbase = card->hw.falcbase; + pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; + pc300chconf_t *conf = (pc300chconf_t *) & chan->conf; + + /* Enable transparent data transfer */ + if (conf->fr_mode == PC300_FR_UNFRAMED) { + cpc_writeb(falcbase + F_REG(MODE, ch), 0); + } else { + cpc_writeb(falcbase + F_REG(MODE, ch), + cpc_readb(falcbase + F_REG(MODE, ch)) | + (MODE_HRAC | MODE_MDS2)); + cpc_writeb(falcbase + F_REG(RAH2, ch), 0xff); + cpc_writeb(falcbase + F_REG(RAH1, ch), 0xff); + cpc_writeb(falcbase + F_REG(RAL2, ch), 0xff); + cpc_writeb(falcbase + F_REG(RAL1, ch), 0xff); + } + + /* Tx/Rx reset */ + falc_issue_cmd(card, ch, CMDR_RRES | CMDR_XRES | CMDR_SRES); + + /* Enable interrupt sources */ + falc_intr_enable(card, ch); +} + +void te_config(pc300_t * card, int ch) +{ + pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; + pc300chconf_t *conf = (pc300chconf_t *) & chan->conf; + falc_t *pfalc = (falc_t *) & chan->falc; + uclong falcbase = card->hw.falcbase; + ucchar dummy; + unsigned long flags; + + memset(pfalc, 0, sizeof(falc_t)); + switch (conf->media) { + case IF_IFACE_T1: + pfalc->num_channels = NUM_OF_T1_CHANNELS; + pfalc->offset = 1; + break; + case IF_IFACE_E1: + pfalc->num_channels = NUM_OF_E1_CHANNELS; + pfalc->offset = 0; + break; + } + if (conf->tslot_bitmap == 0xffffffffUL) + pfalc->full_bandwidth = 1; + else + pfalc->full_bandwidth = 0; + + CPC_LOCK(card, flags); + /* Reset the FALC chip */ + cpc_writeb(card->hw.falcbase + card->hw.cpld_reg1, + cpc_readb(card->hw.falcbase + card->hw.cpld_reg1) | + (CPLD_REG1_FALC_RESET << (2 * ch))); + udelay(10000); + cpc_writeb(card->hw.falcbase + card->hw.cpld_reg1, + cpc_readb(card->hw.falcbase + card->hw.cpld_reg1) & + ~(CPLD_REG1_FALC_RESET << (2 * ch))); + + if (conf->media == IF_IFACE_T1) { + falc_init_t1(card, ch); + } else { + falc_init_e1(card, ch); + } + falc_init_hdlc(card, ch); + if (conf->rx_sens == PC300_RX_SENS_SH) { + cpc_writeb(falcbase + F_REG(LIM0, ch), + cpc_readb(falcbase + F_REG(LIM0, ch)) & ~LIM0_EQON); + } else { + cpc_writeb(falcbase + F_REG(LIM0, ch), + cpc_readb(falcbase + F_REG(LIM0, ch)) | LIM0_EQON); + } + cpc_writeb(card->hw.falcbase + card->hw.cpld_reg2, + cpc_readb(card->hw.falcbase + card->hw.cpld_reg2) | + ((CPLD_REG2_FALC_TX_CLK | CPLD_REG2_FALC_RX_CLK) << (2 * ch))); + + /* Clear all interrupt registers */ + dummy = cpc_readb(falcbase + F_REG(FISR0, ch)) + + cpc_readb(falcbase + F_REG(FISR1, ch)) + + cpc_readb(falcbase + F_REG(FISR2, ch)) + + cpc_readb(falcbase + F_REG(FISR3, ch)); + CPC_UNLOCK(card, flags); +} + +void falc_check_status(pc300_t * card, int ch, unsigned char frs0) +{ + pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; + pc300chconf_t *conf = (pc300chconf_t *) & chan->conf; + falc_t *pfalc = (falc_t *) & chan->falc; + uclong falcbase = card->hw.falcbase; + + /* Verify LOS */ + if (frs0 & FRS0_LOS) { + if (!pfalc->red_alarm) { + pfalc->red_alarm = 1; + pfalc->los++; + if (!pfalc->blue_alarm) { + // EVENT_FALC_ABNORMAL + if (conf->media == IF_IFACE_T1) { + /* Disable this interrupt as it may otherwise interfere + * with other working boards. */ + cpc_writeb(falcbase + F_REG(IMR0, ch), + cpc_readb(falcbase + F_REG(IMR0, ch)) + | IMR0_PDEN); + } + falc_disable_comm(card, ch); + // EVENT_FALC_ABNORMAL + } + } + } else { + if (pfalc->red_alarm) { + pfalc->red_alarm = 0; + pfalc->losr++; + } + } + + if (conf->fr_mode != PC300_FR_UNFRAMED) { + /* Verify AIS alarm */ + if (frs0 & FRS0_AIS) { + if (!pfalc->blue_alarm) { + pfalc->blue_alarm = 1; + pfalc->ais++; + // EVENT_AIS + if (conf->media == IF_IFACE_T1) { + /* Disable this interrupt as it may otherwise interfere with other working boards. */ + cpc_writeb(falcbase + F_REG(IMR0, ch), + cpc_readb(falcbase + F_REG(IMR0, ch)) | IMR0_PDEN); + } + falc_disable_comm(card, ch); + // EVENT_AIS + } + } else { + pfalc->blue_alarm = 0; + } + + /* Verify LFA */ + if (frs0 & FRS0_LFA) { + if (!pfalc->loss_fa) { + pfalc->loss_fa = 1; + pfalc->lfa++; + if (!pfalc->blue_alarm && !pfalc->red_alarm) { + // EVENT_FALC_ABNORMAL + if (conf->media == IF_IFACE_T1) { + /* Disable this interrupt as it may otherwise + * interfere with other working boards. */ + cpc_writeb(falcbase + F_REG(IMR0, ch), + cpc_readb(falcbase + F_REG(IMR0, ch)) + | IMR0_PDEN); + } + falc_disable_comm(card, ch); + // EVENT_FALC_ABNORMAL + } + } + } else { + if (pfalc->loss_fa) { + pfalc->loss_fa = 0; + pfalc->farec++; + } + } + + /* Verify LMFA */ + if (pfalc->multiframe_mode && (frs0 & FRS0_LMFA)) { + /* D4 or CRC4 frame mode */ + if (!pfalc->loss_mfa) { + pfalc->loss_mfa = 1; + pfalc->lmfa++; + if (!pfalc->blue_alarm && !pfalc->red_alarm && + !pfalc->loss_fa) { + // EVENT_FALC_ABNORMAL + if (conf->media == IF_IFACE_T1) { + /* Disable this interrupt as it may otherwise + * interfere with other working boards. */ + cpc_writeb(falcbase + F_REG(IMR0, ch), + cpc_readb(falcbase + F_REG(IMR0, ch)) + | IMR0_PDEN); + } + falc_disable_comm(card, ch); + // EVENT_FALC_ABNORMAL + } + } + } else { + pfalc->loss_mfa = 0; + } + + /* Verify Remote Alarm */ + if (frs0 & FRS0_RRA) { + if (!pfalc->yellow_alarm) { + pfalc->yellow_alarm = 1; + pfalc->rai++; + if (pfalc->sync) { + // EVENT_RAI + falc_disable_comm(card, ch); + // EVENT_RAI + } + } + } else { + pfalc->yellow_alarm = 0; + } + } /* if !PC300_UNFRAMED */ + + if (pfalc->red_alarm || pfalc->loss_fa || + pfalc->loss_mfa || pfalc->blue_alarm) { + if (pfalc->sync) { + pfalc->sync = 0; + chan->d.line_off++; + cpc_writeb(falcbase + card->hw.cpld_reg2, + cpc_readb(falcbase + card->hw.cpld_reg2) & + ~(CPLD_REG2_FALC_LED2 << (2 * ch))); + } + } else { + if (!pfalc->sync) { + pfalc->sync = 1; + chan->d.line_on++; + cpc_writeb(falcbase + card->hw.cpld_reg2, + cpc_readb(falcbase + card->hw.cpld_reg2) | + (CPLD_REG2_FALC_LED2 << (2 * ch))); + } + } + + if (pfalc->sync && !pfalc->yellow_alarm) { + if (!pfalc->active) { + // EVENT_FALC_NORMAL + if (pfalc->loop_active) { + return; + } + if (conf->media == IF_IFACE_T1) { + cpc_writeb(falcbase + F_REG(IMR0, ch), + cpc_readb(falcbase + F_REG(IMR0, ch)) & ~IMR0_PDEN); + } + falc_enable_comm(card, ch); + // EVENT_FALC_NORMAL + pfalc->active = 1; + } + } else { + if (pfalc->active) { + pfalc->active = 0; + } + } +} + +void falc_update_stats(pc300_t * card, int ch) +{ + pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; + pc300chconf_t *conf = (pc300chconf_t *) & chan->conf; + falc_t *pfalc = (falc_t *) & chan->falc; + uclong falcbase = card->hw.falcbase; + ucshort counter; + + counter = cpc_readb(falcbase + F_REG(FECL, ch)); + counter |= cpc_readb(falcbase + F_REG(FECH, ch)) << 8; + pfalc->fec += counter; + + counter = cpc_readb(falcbase + F_REG(CVCL, ch)); + counter |= cpc_readb(falcbase + F_REG(CVCH, ch)) << 8; + pfalc->cvc += counter; + + counter = cpc_readb(falcbase + F_REG(CECL, ch)); + counter |= cpc_readb(falcbase + F_REG(CECH, ch)) << 8; + pfalc->cec += counter; + + counter = cpc_readb(falcbase + F_REG(EBCL, ch)); + counter |= cpc_readb(falcbase + F_REG(EBCH, ch)) << 8; + pfalc->ebc += counter; + + if (cpc_readb(falcbase + F_REG(LCR1, ch)) & LCR1_EPRM) { + mdelay(10); + counter = cpc_readb(falcbase + F_REG(BECL, ch)); + counter |= cpc_readb(falcbase + F_REG(BECH, ch)) << 8; + pfalc->bec += counter; + + if (((conf->media == IF_IFACE_T1) && + (cpc_readb(falcbase + F_REG(FRS1, ch)) & FRS1_LLBAD) && + (!(cpc_readb(falcbase + F_REG(FRS1, ch)) & FRS1_PDEN))) + || + ((conf->media == IF_IFACE_E1) && + (cpc_readb(falcbase + F_REG(RSP, ch)) & RSP_LLBAD))) { + pfalc->prbs = 2; + } else { + pfalc->prbs = 1; + } + } +} + +/*---------------------------------------------------------------------------- + * falc_remote_loop + *---------------------------------------------------------------------------- + * Description: In the remote loopback mode the clock and data recovered + * from the line inputs RL1/2 or RDIP/RDIN are routed back + * to the line outputs XL1/2 or XDOP/XDON via the analog + * transmitter. As in normal mode they are processsed by + * the synchronizer and then sent to the system interface. + *---------------------------------------------------------------------------- + */ +void falc_remote_loop(pc300_t * card, int ch, int loop_on) +{ + pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; + pc300chconf_t *conf = (pc300chconf_t *) & chan->conf; + falc_t *pfalc = (falc_t *) & chan->falc; + uclong falcbase = card->hw.falcbase; + + if (loop_on) { + // EVENT_FALC_ABNORMAL + if (conf->media == IF_IFACE_T1) { + /* Disable this interrupt as it may otherwise interfere with + * other working boards. */ + cpc_writeb(falcbase + F_REG(IMR0, ch), + cpc_readb(falcbase + F_REG(IMR0, ch)) | IMR0_PDEN); + } + falc_disable_comm(card, ch); + // EVENT_FALC_ABNORMAL + cpc_writeb(falcbase + F_REG(LIM1, ch), + cpc_readb(falcbase + F_REG(LIM1, ch)) | LIM1_RL); + pfalc->loop_active = 1; + } else { + cpc_writeb(falcbase + F_REG(LIM1, ch), + cpc_readb(falcbase + F_REG(LIM1, ch)) & ~LIM1_RL); + pfalc->sync = 0; + cpc_writeb(falcbase + card->hw.cpld_reg2, + cpc_readb(falcbase + card->hw.cpld_reg2) & + ~(CPLD_REG2_FALC_LED2 << (2 * ch))); + pfalc->active = 0; + falc_issue_cmd(card, ch, CMDR_XRES); + pfalc->loop_active = 0; + } +} + +/*---------------------------------------------------------------------------- + * falc_local_loop + *---------------------------------------------------------------------------- + * Description: The local loopback mode disconnects the receive lines + * RL1/RL2 resp. RDIP/RDIN from the receiver. Instead of the + * signals coming from the line the data provided by system + * interface are routed through the analog receiver back to + * the system interface. The unipolar bit stream will be + * undisturbed transmitted on the line. Receiver and transmitter + * coding must be identical. + *---------------------------------------------------------------------------- + */ +void falc_local_loop(pc300_t * card, int ch, int loop_on) +{ + pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; + falc_t *pfalc = (falc_t *) & chan->falc; + uclong falcbase = card->hw.falcbase; + + if (loop_on) { + cpc_writeb(falcbase + F_REG(LIM0, ch), + cpc_readb(falcbase + F_REG(LIM0, ch)) | LIM0_LL); + pfalc->loop_active = 1; + } else { + cpc_writeb(falcbase + F_REG(LIM0, ch), + cpc_readb(falcbase + F_REG(LIM0, ch)) & ~LIM0_LL); + pfalc->loop_active = 0; + } +} + +/*---------------------------------------------------------------------------- + * falc_payload_loop + *---------------------------------------------------------------------------- + * Description: This routine allows to enable/disable payload loopback. + * When the payload loop is activated, the received 192 bits + * of payload data will be looped back to the transmit + * direction. The framing bits, CRC6 and DL bits are not + * looped. They are originated by the FALC-LH transmitter. + *---------------------------------------------------------------------------- + */ +void falc_payload_loop(pc300_t * card, int ch, int loop_on) +{ + pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; + pc300chconf_t *conf = (pc300chconf_t *) & chan->conf; + falc_t *pfalc = (falc_t *) & chan->falc; + uclong falcbase = card->hw.falcbase; + + if (loop_on) { + // EVENT_FALC_ABNORMAL + if (conf->media == IF_IFACE_T1) { + /* Disable this interrupt as it may otherwise interfere with + * other working boards. */ + cpc_writeb(falcbase + F_REG(IMR0, ch), + cpc_readb(falcbase + F_REG(IMR0, ch)) | IMR0_PDEN); + } + falc_disable_comm(card, ch); + // EVENT_FALC_ABNORMAL + cpc_writeb(falcbase + F_REG(FMR2, ch), + cpc_readb(falcbase + F_REG(FMR2, ch)) | FMR2_PLB); + if (conf->media == IF_IFACE_T1) { + cpc_writeb(falcbase + F_REG(FMR4, ch), + cpc_readb(falcbase + F_REG(FMR4, ch)) | FMR4_TM); + } else { + cpc_writeb(falcbase + F_REG(FMR5, ch), + cpc_readb(falcbase + F_REG(FMR5, ch)) | XSP_TT0); + } + falc_open_all_timeslots(card, ch); + pfalc->loop_active = 2; + } else { + cpc_writeb(falcbase + F_REG(FMR2, ch), + cpc_readb(falcbase + F_REG(FMR2, ch)) & ~FMR2_PLB); + if (conf->media == IF_IFACE_T1) { + cpc_writeb(falcbase + F_REG(FMR4, ch), + cpc_readb(falcbase + F_REG(FMR4, ch)) & ~FMR4_TM); + } else { + cpc_writeb(falcbase + F_REG(FMR5, ch), + cpc_readb(falcbase + F_REG(FMR5, ch)) & ~XSP_TT0); + } + pfalc->sync = 0; + cpc_writeb(falcbase + card->hw.cpld_reg2, + cpc_readb(falcbase + card->hw.cpld_reg2) & + ~(CPLD_REG2_FALC_LED2 << (2 * ch))); + pfalc->active = 0; + falc_issue_cmd(card, ch, CMDR_XRES); + pfalc->loop_active = 0; + } +} + +/*---------------------------------------------------------------------------- + * turn_off_xlu + *---------------------------------------------------------------------------- + * Description: Turns XLU bit off in the proper register + *---------------------------------------------------------------------------- + */ +void turn_off_xlu(pc300_t * card, int ch) +{ + pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; + pc300chconf_t *conf = (pc300chconf_t *) & chan->conf; + uclong falcbase = card->hw.falcbase; + + if (conf->media == IF_IFACE_T1) { + cpc_writeb(falcbase + F_REG(FMR5, ch), + cpc_readb(falcbase + F_REG(FMR5, ch)) & ~FMR5_XLU); + } else { + cpc_writeb(falcbase + F_REG(FMR3, ch), + cpc_readb(falcbase + F_REG(FMR3, ch)) & ~FMR3_XLU); + } +} + +/*---------------------------------------------------------------------------- + * turn_off_xld + *---------------------------------------------------------------------------- + * Description: Turns XLD bit off in the proper register + *---------------------------------------------------------------------------- + */ +void turn_off_xld(pc300_t * card, int ch) +{ + pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; + pc300chconf_t *conf = (pc300chconf_t *) & chan->conf; + uclong falcbase = card->hw.falcbase; + + if (conf->media == IF_IFACE_T1) { + cpc_writeb(falcbase + F_REG(FMR5, ch), + cpc_readb(falcbase + F_REG(FMR5, ch)) & ~FMR5_XLD); + } else { + cpc_writeb(falcbase + F_REG(FMR3, ch), + cpc_readb(falcbase + F_REG(FMR3, ch)) & ~FMR3_XLD); + } +} + +/*---------------------------------------------------------------------------- + * falc_generate_loop_up_code + *---------------------------------------------------------------------------- + * Description: This routine writes the proper FALC chip register in order + * to generate a LOOP activation code over a T1/E1 line. + *---------------------------------------------------------------------------- + */ +void falc_generate_loop_up_code(pc300_t * card, int ch) +{ + pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; + pc300chconf_t *conf = (pc300chconf_t *) & chan->conf; + falc_t *pfalc = (falc_t *) & chan->falc; + uclong falcbase = card->hw.falcbase; + + if (conf->media == IF_IFACE_T1) { + cpc_writeb(falcbase + F_REG(FMR5, ch), + cpc_readb(falcbase + F_REG(FMR5, ch)) | FMR5_XLU); + } else { + cpc_writeb(falcbase + F_REG(FMR3, ch), + cpc_readb(falcbase + F_REG(FMR3, ch)) | FMR3_XLU); + } + // EVENT_FALC_ABNORMAL + if (conf->media == IF_IFACE_T1) { + /* Disable this interrupt as it may otherwise interfere with + * other working boards. */ + cpc_writeb(falcbase + F_REG(IMR0, ch), + cpc_readb(falcbase + F_REG(IMR0, ch)) | IMR0_PDEN); + } + falc_disable_comm(card, ch); + // EVENT_FALC_ABNORMAL + pfalc->loop_gen = 1; +} + +/*---------------------------------------------------------------------------- + * falc_generate_loop_down_code + *---------------------------------------------------------------------------- + * Description: This routine writes the proper FALC chip register in order + * to generate a LOOP deactivation code over a T1/E1 line. + *---------------------------------------------------------------------------- + */ +void falc_generate_loop_down_code(pc300_t * card, int ch) +{ + pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; + pc300chconf_t *conf = (pc300chconf_t *) & chan->conf; + falc_t *pfalc = (falc_t *) & chan->falc; + uclong falcbase = card->hw.falcbase; + + if (conf->media == IF_IFACE_T1) { + cpc_writeb(falcbase + F_REG(FMR5, ch), + cpc_readb(falcbase + F_REG(FMR5, ch)) | FMR5_XLD); + } else { + cpc_writeb(falcbase + F_REG(FMR3, ch), + cpc_readb(falcbase + F_REG(FMR3, ch)) | FMR3_XLD); + } + pfalc->sync = 0; + cpc_writeb(falcbase + card->hw.cpld_reg2, + cpc_readb(falcbase + card->hw.cpld_reg2) & + ~(CPLD_REG2_FALC_LED2 << (2 * ch))); + pfalc->active = 0; +//? falc_issue_cmd(card, ch, CMDR_XRES); + pfalc->loop_gen = 0; +} + +/*---------------------------------------------------------------------------- + * falc_pattern_test + *---------------------------------------------------------------------------- + * Description: This routine generates a pattern code and checks + * it on the reception side. + *---------------------------------------------------------------------------- + */ +void falc_pattern_test(pc300_t * card, int ch, unsigned int activate) +{ + pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; + pc300chconf_t *conf = (pc300chconf_t *) & chan->conf; + falc_t *pfalc = (falc_t *) & chan->falc; + uclong falcbase = card->hw.falcbase; + + if (activate) { + pfalc->prbs = 1; + pfalc->bec = 0; + if (conf->media == IF_IFACE_T1) { + /* Disable local loop activation/deactivation detect */ + cpc_writeb(falcbase + F_REG(IMR3, ch), + cpc_readb(falcbase + F_REG(IMR3, ch)) | IMR3_LLBSC); + } else { + /* Disable local loop activation/deactivation detect */ + cpc_writeb(falcbase + F_REG(IMR1, ch), + cpc_readb(falcbase + F_REG(IMR1, ch)) | IMR1_LLBSC); + } + /* Activates generation and monitoring of PRBS + * (Pseudo Random Bit Sequence) */ + cpc_writeb(falcbase + F_REG(LCR1, ch), + cpc_readb(falcbase + F_REG(LCR1, ch)) | LCR1_EPRM | LCR1_XPRBS); + } else { + pfalc->prbs = 0; + /* Deactivates generation and monitoring of PRBS + * (Pseudo Random Bit Sequence) */ + cpc_writeb(falcbase + F_REG(LCR1, ch), + cpc_readb(falcbase+F_REG(LCR1,ch)) & ~(LCR1_EPRM | LCR1_XPRBS)); + if (conf->media == IF_IFACE_T1) { + /* Enable local loop activation/deactivation detect */ + cpc_writeb(falcbase + F_REG(IMR3, ch), + cpc_readb(falcbase + F_REG(IMR3, ch)) & ~IMR3_LLBSC); + } else { + /* Enable local loop activation/deactivation detect */ + cpc_writeb(falcbase + F_REG(IMR1, ch), + cpc_readb(falcbase + F_REG(IMR1, ch)) & ~IMR1_LLBSC); + } + } +} + +/*---------------------------------------------------------------------------- + * falc_pattern_test_error + *---------------------------------------------------------------------------- + * Description: This routine returns the bit error counter value + *---------------------------------------------------------------------------- + */ +ucshort falc_pattern_test_error(pc300_t * card, int ch) +{ + pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; + falc_t *pfalc = (falc_t *) & chan->falc; + + return (pfalc->bec); +} + +/**********************************/ +/*** Net Interface Routines ***/ +/**********************************/ + +static void +cpc_trace(struct net_device *dev, struct sk_buff *skb_main, char rx_tx) +{ + struct sk_buff *skb; + + if ((skb = dev_alloc_skb(10 + skb_main->len)) == NULL) { + printk("%s: out of memory\n", dev->name); + return; + } + skb_put(skb, 10 + skb_main->len); + + skb->dev = dev; + skb->protocol = htons(ETH_P_CUST); + skb->mac.raw = skb->data; + skb->pkt_type = PACKET_HOST; + skb->len = 10 + skb_main->len; + + memcpy(skb->data, dev->name, 5); + skb->data[5] = '['; + skb->data[6] = rx_tx; + skb->data[7] = ']'; + skb->data[8] = ':'; + skb->data[9] = ' '; + memcpy(&skb->data[10], skb_main->data, skb_main->len); + + netif_rx(skb); +} + +void cpc_tx_timeout(struct net_device *dev) +{ + pc300dev_t *d = (pc300dev_t *) dev->priv; + pc300ch_t *chan = (pc300ch_t *) d->chan; + pc300_t *card = (pc300_t *) chan->card; + struct net_device_stats *stats = &d->hdlc->stats; + int ch = chan->channel; + uclong flags; + ucchar ilar; + + stats->tx_errors++; + stats->tx_aborted_errors++; + CPC_LOCK(card, flags); + if ((ilar = cpc_readb(card->hw.scabase + ILAR)) != 0) { + printk("%s: ILAR=0x%x\n", dev->name, ilar); + cpc_writeb(card->hw.scabase + ILAR, ilar); + cpc_writeb(card->hw.scabase + DMER, 0x80); + } + if (card->hw.type == PC300_TE) { + cpc_writeb(card->hw.falcbase + card->hw.cpld_reg2, + cpc_readb(card->hw.falcbase + card->hw.cpld_reg2) & + ~(CPLD_REG2_FALC_LED1 << (2 * ch))); + } + dev->trans_start = jiffies; + CPC_UNLOCK(card, flags); + netif_wake_queue(dev); +} + +int cpc_queue_xmit(struct sk_buff *skb, struct net_device *dev) +{ + pc300dev_t *d = (pc300dev_t *) dev->priv; + pc300ch_t *chan = (pc300ch_t *) d->chan; + pc300_t *card = (pc300_t *) chan->card; + struct net_device_stats *stats = &d->hdlc->stats; + int ch = chan->channel; + uclong flags; +#ifdef PC300_DEBUG_TX + int i; +#endif + + if (chan->conf.monitor) { + /* In monitor mode no Tx is done: ignore packet */ + dev_kfree_skb(skb); + return 0; + } else if (!netif_carrier_ok(dev)) { + /* DCD must be OFF: drop packet */ + dev_kfree_skb(skb); + stats->tx_errors++; + stats->tx_carrier_errors++; + return 0; + } else if (cpc_readb(card->hw.scabase + M_REG(ST3, ch)) & ST3_DCD) { + printk("%s: DCD is OFF. Going administrative down.\n", dev->name); + stats->tx_errors++; + stats->tx_carrier_errors++; + dev_kfree_skb(skb); + netif_carrier_off(dev); + CPC_LOCK(card, flags); + cpc_writeb(card->hw.scabase + M_REG(CMD, ch), CMD_TX_BUF_CLR); + if (card->hw.type == PC300_TE) { + cpc_writeb(card->hw.falcbase + card->hw.cpld_reg2, + cpc_readb(card->hw.falcbase + card->hw.cpld_reg2) & + ~(CPLD_REG2_FALC_LED1 << (2 * ch))); + } + CPC_UNLOCK(card, flags); + netif_wake_queue(dev); + return 0; + } + + /* Write buffer to DMA buffers */ + if (dma_buf_write(card, ch, (ucchar *) skb->data, skb->len) != 0) { +// printk("%s: write error. Dropping TX packet.\n", dev->name); + netif_stop_queue(dev); + dev_kfree_skb(skb); + stats->tx_errors++; + stats->tx_dropped++; + return 0; + } +#ifdef PC300_DEBUG_TX + printk("%s T:", dev->name); + for (i = 0; i < skb->len; i++) + printk(" %02x", *(skb->data + i)); + printk("\n"); +#endif + + if (d->trace_on) { + cpc_trace(dev, skb, 'T'); + } + dev->trans_start = jiffies; + + /* Start transmission */ + CPC_LOCK(card, flags); + /* verify if it has more than one free descriptor */ + if (card->chan[ch].nfree_tx_bd <= 1) { + /* don't have so stop the queue */ + netif_stop_queue(dev); + } + cpc_writel(card->hw.scabase + DTX_REG(EDAL, ch), + TX_BD_ADDR(ch, chan->tx_next_bd)); + cpc_writeb(card->hw.scabase + M_REG(CMD, ch), CMD_TX_ENA); + cpc_writeb(card->hw.scabase + DSR_TX(ch), DSR_DE); + if (card->hw.type == PC300_TE) { + cpc_writeb(card->hw.falcbase + card->hw.cpld_reg2, + cpc_readb(card->hw.falcbase + card->hw.cpld_reg2) | + (CPLD_REG2_FALC_LED1 << (2 * ch))); + } + CPC_UNLOCK(card, flags); + dev_kfree_skb(skb); + + return 0; +} + +void cpc_net_rx(hdlc_device * hdlc) +{ + struct net_device *dev = hdlc_to_dev(hdlc); + pc300dev_t *d = (pc300dev_t *) dev->priv; + pc300ch_t *chan = (pc300ch_t *) d->chan; + pc300_t *card = (pc300_t *) chan->card; + struct net_device_stats *stats = &d->hdlc->stats; + int ch = chan->channel; +#ifdef PC300_DEBUG_RX + int i; +#endif + int rxb; + struct sk_buff *skb; + + while (1) { + if ((rxb = dma_get_rx_frame_size(card, ch)) == -1) + return; + + if (!netif_carrier_ok(dev)) { + /* DCD must be OFF: drop packet */ + printk("%s : DCD is OFF - drop %d rx bytes\n", dev->name, rxb); + skb = NULL; + } else { + if (rxb > (dev->mtu + 40)) { /* add headers */ + printk("%s : MTU exceeded %d\n", dev->name, rxb); + skb = NULL; + } else { + skb = dev_alloc_skb(rxb); + if (skb == NULL) { + printk("%s: Memory squeeze!!\n", dev->name); + return; + } + skb->dev = dev; + } + } + + if (((rxb = dma_buf_read(card, ch, skb)) <= 0) || (skb == NULL)) { +#ifdef PC300_DEBUG_RX + printk("%s: rxb = %x\n", dev->name, rxb); +#endif + if ((skb == NULL) && (rxb > 0)) { + /* rxb > dev->mtu */ + stats->rx_errors++; + stats->rx_length_errors++; + continue; + } + + if (rxb < 0) { /* Invalid frame */ + rxb = -rxb; + if (rxb & DST_OVR) { + stats->rx_errors++; + stats->rx_fifo_errors++; + } + if (rxb & DST_CRC) { + stats->rx_errors++; + stats->rx_crc_errors++; + } + if (rxb & (DST_RBIT | DST_SHRT | DST_ABT)) { + stats->rx_errors++; + stats->rx_frame_errors++; + } + } + if (skb) { + dev_kfree_skb_irq(skb); + } + continue; + } + + stats->rx_bytes += rxb; + +#ifdef PC300_DEBUG_RX + printk("%s R:", dev->name); + for (i = 0; i < skb->len; i++) + printk(" %02x", *(skb->data + i)); + printk("\n"); +#endif + if (d->trace_on) { + cpc_trace(dev, skb, 'R'); + } + stats->rx_packets++; + skb->mac.raw = skb->data; + skb->protocol = htons(ETH_P_HDLC); + netif_rx(skb); + } +} + +/************************************/ +/*** PC300 Interrupt Routines ***/ +/************************************/ +static void sca_tx_intr(pc300dev_t *dev) +{ + pc300ch_t *chan = (pc300ch_t *)dev->chan; + pc300_t *card = (pc300_t *)chan->card; + int ch = chan->channel; + volatile pcsca_bd_t * ptdescr; + struct net_device_stats *stats = &dev->hdlc->stats; + + /* Clean up descriptors from previous transmission */ + ptdescr = (pcsca_bd_t *)(card->hw.rambase + + TX_BD_ADDR(ch,chan->tx_first_bd)); + while ((cpc_readl(card->hw.scabase + DTX_REG(CDAL,ch)) != + TX_BD_ADDR(ch,chan->tx_first_bd)) && + (cpc_readb(&ptdescr->status) & DST_OSB)) { + stats->tx_packets++; + stats->tx_bytes += cpc_readw(&ptdescr->len); + cpc_writeb(&ptdescr->status, DST_OSB); + cpc_writew(&ptdescr->len, 0); + chan->nfree_tx_bd++; + chan->tx_first_bd = (chan->tx_first_bd + 1) & (N_DMA_TX_BUF - 1); + ptdescr = (pcsca_bd_t *)(card->hw.rambase + + TX_BD_ADDR(ch,chan->tx_first_bd)); + } + +#ifdef CONFIG_PC300_MLPPP + if (chan->conf.proto == PC300_PROTO_MLPPP) { + cpc_tty_trigger_poll(dev); + } else { +#endif + /* Tell the upper layer we are ready to transmit more packets */ + netif_wake_queue((struct net_device*)dev->hdlc); +#ifdef CONFIG_PC300_MLPPP + } +#endif +} + +static void sca_intr(pc300_t * card) +{ + uclong scabase = card->hw.scabase; + volatile uclong status; + int ch; + int intr_count = 0; + unsigned char dsr_rx; + + while ((status = cpc_readl(scabase + ISR0)) != 0) { + for (ch = 0; ch < card->hw.nchan; ch++) { + pc300ch_t *chan = &card->chan[ch]; + pc300dev_t *d = &chan->d; + hdlc_device *hdlc = d->hdlc; + struct net_device *dev = hdlc_to_dev(hdlc); + + spin_lock(&card->card_lock); + + /**** Reception ****/ + if (status & IR0_DRX((IR0_DMIA | IR0_DMIB), ch)) { + ucchar drx_stat = cpc_readb(scabase + DSR_RX(ch)); + + /* Clear RX interrupts */ + cpc_writeb(scabase + DSR_RX(ch), drx_stat | DSR_DWE); + +#ifdef PC300_DEBUG_INTR + printk ("sca_intr: RX intr chan[%d] (st=0x%08lx, dsr=0x%02x)\n", + ch, status, drx_stat); +#endif + if (status & IR0_DRX(IR0_DMIA, ch)) { + if (drx_stat & DSR_BOF) { +#ifdef CONFIG_PC300_MLPPP + if (chan->conf.proto == PC300_PROTO_MLPPP) { + /* verify if driver is TTY */ + if ((cpc_readb(scabase + DSR_RX(ch)) & DSR_DE)) { + rx_dma_stop(card, ch); + } + cpc_tty_receive(d); + rx_dma_start(card, ch); + } else +#endif + { + if ((cpc_readb(scabase + DSR_RX(ch)) & DSR_DE)) { + rx_dma_stop(card, ch); + } + cpc_net_rx(hdlc); + /* Discard invalid frames */ + hdlc->stats.rx_errors++; + hdlc->stats.rx_over_errors++; + chan->rx_first_bd = 0; + chan->rx_last_bd = N_DMA_RX_BUF - 1; + rx_dma_start(card, ch); + } + } + } + if (status & IR0_DRX(IR0_DMIB, ch)) { + if (drx_stat & DSR_EOM) { + if (card->hw.type == PC300_TE) { + cpc_writeb(card->hw.falcbase + + card->hw.cpld_reg2, + cpc_readb (card->hw.falcbase + + card->hw.cpld_reg2) | + (CPLD_REG2_FALC_LED1 << (2 * ch))); + } +#ifdef CONFIG_PC300_MLPPP + if (chan->conf.proto == PC300_PROTO_MLPPP) { + /* verify if driver is TTY */ + cpc_tty_receive(d); + } else { + cpc_net_rx(hdlc); + } +#else + cpc_net_rx(hdlc); +#endif + if (card->hw.type == PC300_TE) { + cpc_writeb(card->hw.falcbase + + card->hw.cpld_reg2, + cpc_readb (card->hw.falcbase + + card->hw.cpld_reg2) & + ~ (CPLD_REG2_FALC_LED1 << (2 * ch))); + } + } + } + if (!(dsr_rx = cpc_readb(scabase + DSR_RX(ch)) & DSR_DE)) { + +printk("%s: RX intr chan[%d] (st=0x%08lx, dsr=0x%02x, dsr2=0x%02x)\n", + dev->name, ch, status, drx_stat, dsr_rx); + cpc_writeb(scabase + DSR_RX(ch), (dsr_rx | DSR_DE) & 0xfe); + } + } + + /**** Transmission ****/ + if (status & IR0_DTX((IR0_EFT | IR0_DMIA | IR0_DMIB), ch)) { + ucchar dtx_stat = cpc_readb(scabase + DSR_TX(ch)); + + /* Clear TX interrupts */ + cpc_writeb(scabase + DSR_TX(ch), dtx_stat | DSR_DWE); + +#ifdef PC300_DEBUG_INTR + printk ("sca_intr: TX intr chan[%d] (st=0x%08lx, dsr=0x%02x)\n", + ch, status, dtx_stat); +#endif + if (status & IR0_DTX(IR0_EFT, ch)) { + if (dtx_stat & DSR_UDRF) { + if (cpc_readb (scabase + M_REG(TBN, ch)) != 0) { + cpc_writeb(scabase + M_REG(CMD,ch), CMD_TX_BUF_CLR); + } + if (card->hw.type == PC300_TE) { + cpc_writeb(card->hw.falcbase + card->hw.cpld_reg2, + cpc_readb (card->hw.falcbase + + card->hw.cpld_reg2) & + ~ (CPLD_REG2_FALC_LED1 << (2 * ch))); + } + hdlc->stats.tx_errors++; + hdlc->stats.tx_fifo_errors++; + sca_tx_intr(d); + } + } + if (status & IR0_DTX(IR0_DMIA, ch)) { + if (dtx_stat & DSR_BOF) { + } + } + if (status & IR0_DTX(IR0_DMIB, ch)) { + if (dtx_stat & DSR_EOM) { + if (card->hw.type == PC300_TE) { + cpc_writeb(card->hw.falcbase + card->hw.cpld_reg2, + cpc_readb (card->hw.falcbase + + card->hw.cpld_reg2) & + ~ (CPLD_REG2_FALC_LED1 << (2 * ch))); + } + sca_tx_intr(d); + } + } + } + + /**** MSCI ****/ + if (status & IR0_M(IR0_RXINTA, ch)) { + ucchar st1 = cpc_readb(scabase + M_REG(ST1, ch)); + + /* Clear MSCI interrupts */ + cpc_writeb(scabase + M_REG(ST1, ch), st1); + +#ifdef PC300_DEBUG_INTR + printk("sca_intr: MSCI intr chan[%d] (st=0x%08lx, st1=0x%02x)\n", + ch, status, st1); +#endif + if (st1 & ST1_CDCD) { /* DCD changed */ + if (cpc_readb(scabase + M_REG(ST3, ch)) & ST3_DCD) { + printk ("%s: DCD is OFF. Going administrative down.\n", + dev->name); +#ifdef CONFIG_PC300_MLPPP + if (chan->conf.proto != PC300_PROTO_MLPPP) { + netif_carrier_off(dev); + } +#else + netif_carrier_off(dev); + +#endif + card->chan[ch].d.line_off++; + } else { /* DCD = 1 */ + printk ("%s: DCD is ON. Going administrative up.\n", + dev->name); +#ifdef CONFIG_PC300_MLPPP + if (chan->conf.proto != PC300_PROTO_MLPPP) + /* verify if driver is not TTY */ +#endif + netif_carrier_on(dev); + card->chan[ch].d.line_on++; + } + } + } + spin_unlock(&card->card_lock); + } + if (++intr_count == 10) + /* Too much work at this board. Force exit */ + break; + } +} + +static void falc_t1_loop_detection(pc300_t * card, int ch, ucchar frs1) +{ + pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; + falc_t *pfalc = (falc_t *) & chan->falc; + uclong falcbase = card->hw.falcbase; + + if (((cpc_readb(falcbase + F_REG(LCR1, ch)) & LCR1_XPRBS) == 0) && + !pfalc->loop_gen) { + if (frs1 & FRS1_LLBDD) { + // A Line Loop Back Deactivation signal detected + if (pfalc->loop_active) { + falc_remote_loop(card, ch, 0); + } + } else { + if ((frs1 & FRS1_LLBAD) && + ((cpc_readb(falcbase + F_REG(LCR1, ch)) & LCR1_EPRM) == 0)) { + // A Line Loop Back Activation signal detected + if (!pfalc->loop_active) { + falc_remote_loop(card, ch, 1); + } + } + } + } +} + +static void falc_e1_loop_detection(pc300_t * card, int ch, ucchar rsp) +{ + pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; + falc_t *pfalc = (falc_t *) & chan->falc; + uclong falcbase = card->hw.falcbase; + + if (((cpc_readb(falcbase + F_REG(LCR1, ch)) & LCR1_XPRBS) == 0) && + !pfalc->loop_gen) { + if (rsp & RSP_LLBDD) { + // A Line Loop Back Deactivation signal detected + if (pfalc->loop_active) { + falc_remote_loop(card, ch, 0); + } + } else { + if ((rsp & RSP_LLBAD) && + ((cpc_readb(falcbase + F_REG(LCR1, ch)) & LCR1_EPRM) == 0)) { + // A Line Loop Back Activation signal detected + if (!pfalc->loop_active) { + falc_remote_loop(card, ch, 1); + } + } + } + } +} + +static void falc_t1_intr(pc300_t * card, int ch) +{ + pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; + falc_t *pfalc = (falc_t *) & chan->falc; + uclong falcbase = card->hw.falcbase; + ucchar isr0, isr3, gis; + ucchar dummy; + + while ((gis = cpc_readb(falcbase + F_REG(GIS, ch))) != 0) { + if (gis & GIS_ISR0) { + isr0 = cpc_readb(falcbase + F_REG(FISR0, ch)); + if (isr0 & FISR0_PDEN) { + /* Read the bit to clear the situation */ + if (cpc_readb(falcbase + F_REG(FRS1, ch)) & + FRS1_PDEN) { + pfalc->pden++; + } + } + } + + if (gis & GIS_ISR1) { + dummy = cpc_readb(falcbase + F_REG(FISR1, ch)); + } + + if (gis & GIS_ISR2) { + dummy = cpc_readb(falcbase + F_REG(FISR2, ch)); + } + + if (gis & GIS_ISR3) { + isr3 = cpc_readb(falcbase + F_REG(FISR3, ch)); + if (isr3 & FISR3_SEC) { + pfalc->sec++; + falc_update_stats(card, ch); + falc_check_status(card, ch, + cpc_readb(falcbase + F_REG(FRS0, ch))); + } + if (isr3 & FISR3_ES) { + pfalc->es++; + } + if (isr3 & FISR3_LLBSC) { + falc_t1_loop_detection(card, ch, + cpc_readb(falcbase + F_REG(FRS1, ch))); + } + } + } +} + +static void falc_e1_intr(pc300_t * card, int ch) +{ + pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; + falc_t *pfalc = (falc_t *) & chan->falc; + uclong falcbase = card->hw.falcbase; + ucchar isr1, isr2, isr3, gis, rsp; + ucchar dummy; + + while ((gis = cpc_readb(falcbase + F_REG(GIS, ch))) != 0) { + rsp = cpc_readb(falcbase + F_REG(RSP, ch)); + + if (gis & GIS_ISR0) { + dummy = cpc_readb(falcbase + F_REG(FISR0, ch)); + } + if (gis & GIS_ISR1) { + isr1 = cpc_readb(falcbase + F_REG(FISR1, ch)); + if (isr1 & FISR1_XMB) { + if ((pfalc->xmb_cause & 2) + && pfalc->multiframe_mode) { + if (cpc_readb (falcbase + F_REG(FRS0, ch)) & + (FRS0_LOS | FRS0_AIS | FRS0_LFA)) { + cpc_writeb(falcbase + F_REG(XSP, ch), + cpc_readb(falcbase + F_REG(XSP, ch)) + & ~XSP_AXS); + } else { + cpc_writeb(falcbase + F_REG(XSP, ch), + cpc_readb(falcbase + F_REG(XSP, ch)) + | XSP_AXS); + } + } + pfalc->xmb_cause = 0; + cpc_writeb(falcbase + F_REG(IMR1, ch), + cpc_readb(falcbase + F_REG(IMR1, ch)) | IMR1_XMB); + } + if (isr1 & FISR1_LLBSC) { + falc_e1_loop_detection(card, ch, rsp); + } + } + if (gis & GIS_ISR2) { + isr2 = cpc_readb(falcbase + F_REG(FISR2, ch)); + if (isr2 & FISR2_T400MS) { + cpc_writeb(falcbase + F_REG(XSW, ch), + cpc_readb(falcbase + F_REG(XSW, ch)) | XSW_XRA); + } + if (isr2 & FISR2_MFAR) { + cpc_writeb(falcbase + F_REG(XSW, ch), + cpc_readb(falcbase + F_REG(XSW, ch)) & ~XSW_XRA); + } + if (isr2 & (FISR2_FAR | FISR2_LFA | FISR2_AIS | FISR2_LOS)) { + pfalc->xmb_cause |= 2; + cpc_writeb(falcbase + F_REG(IMR1, ch), + cpc_readb(falcbase + F_REG(IMR1, ch)) & ~IMR1_XMB); + } + } + if (gis & GIS_ISR3) { + isr3 = cpc_readb(falcbase + F_REG(FISR3, ch)); + if (isr3 & FISR3_SEC) { + pfalc->sec++; + falc_update_stats(card, ch); + falc_check_status(card, ch, + cpc_readb(falcbase + F_REG(FRS0, ch))); + } + if (isr3 & FISR3_ES) { + pfalc->es++; + } + } + } +} + +static void falc_intr(pc300_t * card) +{ + int ch; + + for (ch = 0; ch < card->hw.nchan; ch++) { + pc300ch_t *chan = &card->chan[ch]; + pc300chconf_t *conf = (pc300chconf_t *) & chan->conf; + + if (conf->media == IF_IFACE_T1) { + falc_t1_intr(card, ch); + } else { + falc_e1_intr(card, ch); + } + } +} + +static void cpc_intr(int irq, void *dev_id, struct pt_regs *regs) +{ + pc300_t *card; + volatile ucchar plx_status; + + if ((card = (pc300_t *) dev_id) == 0) { +#ifdef PC300_DEBUG_INTR + printk("cpc_intr: spurious intr %d\n", irq); +#endif + return; /* spurious intr */ + } + + if (card->hw.rambase == 0) { +#ifdef PC300_DEBUG_INTR + printk("cpc_intr: spurious intr2 %d\n", irq); +#endif + return; /* spurious intr */ + } + + switch (card->hw.type) { + case PC300_RSV: + case PC300_X21: + sca_intr(card); + break; + + case PC300_TE: + while ( (plx_status = (cpc_readb(card->hw.plxbase + card->hw.intctl_reg) & + (PLX_9050_LINT1_STATUS | PLX_9050_LINT2_STATUS))) != 0) { + if (plx_status & PLX_9050_LINT1_STATUS) { /* SCA Interrupt */ + sca_intr(card); + } + if (plx_status & PLX_9050_LINT2_STATUS) { /* FALC Interrupt */ + falc_intr(card); + } + } + break; + } +} + +void cpc_sca_status(pc300_t * card, int ch) +{ + ucchar ilar; + uclong scabase = card->hw.scabase; + uclong flags; + + tx_dma_buf_check(card, ch); + rx_dma_buf_check(card, ch); + ilar = cpc_readb(scabase + ILAR); + printk ("ILAR=0x%02x, WCRL=0x%02x, PCR=0x%02x, BTCR=0x%02x, BOLR=0x%02x\n", + ilar, cpc_readb(scabase + WCRL), cpc_readb(scabase + PCR), + cpc_readb(scabase + BTCR), cpc_readb(scabase + BOLR)); + printk("TX_CDA=0x%08lx, TX_EDA=0x%08lx\n", + (uclong) cpc_readl(scabase + DTX_REG(CDAL, ch)), + (uclong) cpc_readl(scabase + DTX_REG(EDAL, ch))); + printk("RX_CDA=0x%08lx, RX_EDA=0x%08lx, BFL=0x%04x\n", + (uclong) cpc_readl(scabase + DRX_REG(CDAL, ch)), + (uclong) cpc_readl(scabase + DRX_REG(EDAL, ch)), + cpc_readw(scabase + DRX_REG(BFLL, ch))); + printk("DMER=0x%02x, DSR_TX=0x%02x, DSR_RX=0x%02x\n", + cpc_readb(scabase + DMER), cpc_readb(scabase + DSR_TX(ch)), + cpc_readb(scabase + DSR_RX(ch))); + printk("DMR_TX=0x%02x, DMR_RX=0x%02x, DIR_TX=0x%02x, DIR_RX=0x%02x\n", + cpc_readb(scabase + DMR_TX(ch)), cpc_readb(scabase + DMR_RX(ch)), + cpc_readb(scabase + DIR_TX(ch)), + cpc_readb(scabase + DIR_RX(ch))); + printk("DCR_TX=0x%02x, DCR_RX=0x%02x, FCT_TX=0x%02x, FCT_RX=0x%02x\n", + cpc_readb(scabase + DCR_TX(ch)), cpc_readb(scabase + DCR_RX(ch)), + cpc_readb(scabase + FCT_TX(ch)), + cpc_readb(scabase + FCT_RX(ch))); + printk("MD0=0x%02x, MD1=0x%02x, MD2=0x%02x, MD3=0x%02x, IDL=0x%02x\n", + cpc_readb(scabase + M_REG(MD0, ch)), + cpc_readb(scabase + M_REG(MD1, ch)), + cpc_readb(scabase + M_REG(MD2, ch)), + cpc_readb(scabase + M_REG(MD3, ch)), + cpc_readb(scabase + M_REG(IDL, ch))); + printk("CMD=0x%02x, SA0=0x%02x, SA1=0x%02x, TFN=0x%02x, CTL=0x%02x\n", + cpc_readb(scabase + M_REG(CMD, ch)), + cpc_readb(scabase + M_REG(SA0, ch)), + cpc_readb(scabase + M_REG(SA1, ch)), + cpc_readb(scabase + M_REG(TFN, ch)), + cpc_readb(scabase + M_REG(CTL, ch))); + printk("ST0=0x%02x, ST1=0x%02x, ST2=0x%02x, ST3=0x%02x, ST4=0x%02x\n", + cpc_readb(scabase + M_REG(ST0, ch)), + cpc_readb(scabase + M_REG(ST1, ch)), + cpc_readb(scabase + M_REG(ST2, ch)), + cpc_readb(scabase + M_REG(ST3, ch)), + cpc_readb(scabase + M_REG(ST4, ch))); + printk ("CST0=0x%02x, CST1=0x%02x, CST2=0x%02x, CST3=0x%02x, FST=0x%02x\n", + cpc_readb(scabase + M_REG(CST0, ch)), + cpc_readb(scabase + M_REG(CST1, ch)), + cpc_readb(scabase + M_REG(CST2, ch)), + cpc_readb(scabase + M_REG(CST3, ch)), + cpc_readb(scabase + M_REG(FST, ch))); + printk("TRC0=0x%02x, TRC1=0x%02x, RRC=0x%02x, TBN=0x%02x, RBN=0x%02x\n", + cpc_readb(scabase + M_REG(TRC0, ch)), + cpc_readb(scabase + M_REG(TRC1, ch)), + cpc_readb(scabase + M_REG(RRC, ch)), + cpc_readb(scabase + M_REG(TBN, ch)), + cpc_readb(scabase + M_REG(RBN, ch))); + printk("TFS=0x%02x, TNR0=0x%02x, TNR1=0x%02x, RNR=0x%02x\n", + cpc_readb(scabase + M_REG(TFS, ch)), + cpc_readb(scabase + M_REG(TNR0, ch)), + cpc_readb(scabase + M_REG(TNR1, ch)), + cpc_readb(scabase + M_REG(RNR, ch))); + printk("TCR=0x%02x, RCR=0x%02x, TNR1=0x%02x, RNR=0x%02x\n", + cpc_readb(scabase + M_REG(TCR, ch)), + cpc_readb(scabase + M_REG(RCR, ch)), + cpc_readb(scabase + M_REG(TNR1, ch)), + cpc_readb(scabase + M_REG(RNR, ch))); + printk("TXS=0x%02x, RXS=0x%02x, EXS=0x%02x, TMCT=0x%02x, TMCR=0x%02x\n", + cpc_readb(scabase + M_REG(TXS, ch)), + cpc_readb(scabase + M_REG(RXS, ch)), + cpc_readb(scabase + M_REG(EXS, ch)), + cpc_readb(scabase + M_REG(TMCT, ch)), + cpc_readb(scabase + M_REG(TMCR, ch))); + printk("IE0=0x%02x, IE1=0x%02x, IE2=0x%02x, IE4=0x%02x, FIE=0x%02x\n", + cpc_readb(scabase + M_REG(IE0, ch)), + cpc_readb(scabase + M_REG(IE1, ch)), + cpc_readb(scabase + M_REG(IE2, ch)), + cpc_readb(scabase + M_REG(IE4, ch)), + cpc_readb(scabase + M_REG(FIE, ch))); + printk("IER0=0x%08lx\n", (uclong) cpc_readl(scabase + IER0)); + + if (ilar != 0) { + CPC_LOCK(card, flags); + cpc_writeb(scabase + ILAR, ilar); + cpc_writeb(scabase + DMER, 0x80); + CPC_UNLOCK(card, flags); + } +} + +void cpc_falc_status(pc300_t * card, int ch) +{ + pc300ch_t *chan = &card->chan[ch]; + falc_t *pfalc = (falc_t *) & chan->falc; + uclong flags; + + CPC_LOCK(card, flags); + printk("CH%d: %s %s %d channels\n", + ch, (pfalc->sync ? "SYNC" : ""), (pfalc->active ? "ACTIVE" : ""), + pfalc->num_channels); + + printk(" pden=%d, los=%d, losr=%d, lfa=%d, farec=%d\n", + pfalc->pden, pfalc->los, pfalc->losr, pfalc->lfa, pfalc->farec); + printk(" lmfa=%d, ais=%d, sec=%d, es=%d, rai=%d\n", + pfalc->lmfa, pfalc->ais, pfalc->sec, pfalc->es, pfalc->rai); + printk(" bec=%d, fec=%d, cvc=%d, cec=%d, ebc=%d\n", + pfalc->bec, pfalc->fec, pfalc->cvc, pfalc->cec, pfalc->ebc); + + printk("\n"); + printk(" STATUS: %s %s %s %s %s %s\n", + (pfalc->red_alarm ? "RED" : ""), + (pfalc->blue_alarm ? "BLU" : ""), + (pfalc->yellow_alarm ? "YEL" : ""), + (pfalc->loss_fa ? "LFA" : ""), + (pfalc->loss_mfa ? "LMF" : ""), (pfalc->prbs ? "PRB" : "")); + CPC_UNLOCK(card, flags); +} + +int cpc_change_mtu(struct net_device *dev, int new_mtu) +{ + if ((new_mtu < 128) || (new_mtu > PC300_DEF_MTU)) + return -EINVAL; + dev->mtu = new_mtu; + return 0; +} + +int cpc_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) +{ + hdlc_device *hdlc = dev_to_hdlc(dev); + pc300dev_t *d = (pc300dev_t *) dev->priv; + pc300ch_t *chan = (pc300ch_t *) d->chan; + pc300_t *card = (pc300_t *) chan->card; + pc300conf_t conf_aux; + pc300chconf_t *conf = (pc300chconf_t *) & chan->conf; + int ch = chan->channel; + void *arg = (void *) ifr->ifr_data; + uclong scabase = card->hw.scabase; + + if (!capable(CAP_NET_ADMIN)) + return -EPERM; + + switch (cmd) { + case SIOCGPC300CONF: +#ifdef CONFIG_PC300_MLPPP + if (conf->proto != PC300_PROTO_MLPPP) { + conf->proto = hdlc->proto; + } +#else + conf->proto = hdlc->proto; +#endif + memcpy(&conf_aux.conf, conf, sizeof(pc300chconf_t)); + memcpy(&conf_aux.hw, &card->hw, sizeof(pc300hw_t)); + if (!arg || + copy_to_user(arg, &conf_aux, sizeof(pc300conf_t))) + return -EINVAL; + return 0; + case SIOCSPC300CONF: + if (!suser()) + return -EPERM; + if (!arg || + copy_from_user(&conf_aux.conf, arg, sizeof(pc300chconf_t))) + return -EINVAL; + if (card->hw.cpld_id < 0x02 && + conf_aux.conf.fr_mode == PC300_FR_UNFRAMED) { + /* CPLD_ID < 0x02 doesn't support Unframed E1 */ + return -EINVAL; + } +#ifdef CONFIG_PC300_MLPPP + if (conf_aux.conf.proto == PC300_PROTO_MLPPP) { + if (conf->proto != PC300_PROTO_MLPPP) { + memcpy(conf, &conf_aux.conf, sizeof(pc300chconf_t)); + cpc_tty_init(d); /* init TTY driver */ + } + } else { + if (conf_aux.conf.proto == 0xffff) { + if (conf->proto == PC300_PROTO_MLPPP){ + /* ifdown interface */ + cpc_close(dev); + } + } else { + memcpy(conf, &conf_aux.conf, sizeof(pc300chconf_t)); + hdlc->proto = conf->proto; + } + } +#else + memcpy(conf, &conf_aux.conf, sizeof(pc300chconf_t)); + hdlc->proto = conf->proto; +#endif + return 0; + case SIOCGPC300STATUS: + cpc_sca_status(card, ch); + return 0; + case SIOCGPC300FALCSTATUS: + cpc_falc_status(card, ch); + return 0; + + case SIOCGPC300UTILSTATS: + { + if (!arg) { /* clear statistics */ + memset(&hdlc->stats, 0, sizeof(struct net_device_stats)); + if (card->hw.type == PC300_TE) { + memset(&chan->falc, 0, sizeof(falc_t)); + } + } else { + pc300stats_t pc300stats; + + memset(&pc300stats, 0, sizeof(pc300stats_t)); + pc300stats.hw_type = card->hw.type; + pc300stats.line_on = card->chan[ch].d.line_on; + pc300stats.line_off = card->chan[ch].d.line_off; + memcpy(&pc300stats.gen_stats, &hdlc->stats, + sizeof(struct net_device_stats)); + if (card->hw.type == PC300_TE) + memcpy(&pc300stats.te_stats,&chan->falc,sizeof(falc_t)); + copy_to_user(arg, &pc300stats, sizeof(pc300stats_t)); + } + return 0; + } + + case SIOCGPC300UTILSTATUS: + { + struct pc300status pc300status; + + pc300status.hw_type = card->hw.type; + if (card->hw.type == PC300_TE) { + pc300status.te_status.sync = chan->falc.sync; + pc300status.te_status.red_alarm = chan->falc.red_alarm; + pc300status.te_status.blue_alarm = chan->falc.blue_alarm; + pc300status.te_status.loss_fa = chan->falc.loss_fa; + pc300status.te_status.yellow_alarm =chan->falc.yellow_alarm; + pc300status.te_status.loss_mfa = chan->falc.loss_mfa; + pc300status.te_status.prbs = chan->falc.prbs; + } else { + pc300status.gen_status.dcd = + !(cpc_readb (scabase + M_REG(ST3, ch)) & ST3_DCD); + pc300status.gen_status.cts = + !(cpc_readb (scabase + M_REG(ST3, ch)) & ST3_CTS); + pc300status.gen_status.rts = + !(cpc_readb (scabase + M_REG(CTL, ch)) & CTL_RTS); + pc300status.gen_status.dtr = + !(cpc_readb (scabase + M_REG(CTL, ch)) & CTL_DTR); + /* There is no DSR in HD64572 */ + } + if (!arg + || copy_to_user(arg, &pc300status, sizeof(pc300status_t))) + return -EINVAL; + return 0; + } + + case SIOCSPC300TRACE: + /* Sets/resets a trace_flag for the respective device */ + if (!arg || copy_from_user(&d->trace_on, arg,sizeof(unsigned char))) + return -EINVAL; + return 0; + + case SIOCSPC300LOOPBACK: + { + struct pc300loopback pc300loop; + + /* TE boards only */ + if (card->hw.type != PC300_TE) + return -EINVAL; + + if (!arg || + copy_from_user(&pc300loop, arg, sizeof(pc300loopback_t))) + return -EINVAL; + switch (pc300loop.loop_type) { + case PC300LOCLOOP: /* Turn the local loop on/off */ + falc_local_loop(card, ch, pc300loop.loop_on); + return 0; + + case PC300REMLOOP: /* Turn the remote loop on/off */ + falc_remote_loop(card, ch, pc300loop.loop_on); + return 0; + + case PC300PAYLOADLOOP: /* Turn the payload loop on/off */ + falc_payload_loop(card, ch, pc300loop.loop_on); + return 0; + + case PC300GENLOOPUP: /* Generate loop UP */ + if (pc300loop.loop_on) { + falc_generate_loop_up_code (card, ch); + } else { + turn_off_xlu(card, ch); + } + return 0; + + case PC300GENLOOPDOWN: /* Generate loop DOWN */ + if (pc300loop.loop_on) { + falc_generate_loop_down_code (card, ch); + } else { + turn_off_xld(card, ch); + } + return 0; + + default: + return -EINVAL; + } + } + + case SIOCSPC300PATTERNTEST: + /* Turn the pattern test on/off and show the errors counter */ + { + struct pc300patterntst pc300patrntst; + + /* TE boards only */ + if (card->hw.type != PC300_TE) + return -EINVAL; + + if (card->hw.cpld_id < 0x02) { + /* CPLD_ID < 0x02 doesn't support pattern test */ + return -EINVAL; + } + + if (!arg || + copy_from_user(&pc300patrntst,arg,sizeof(pc300patterntst_t))) + return -EINVAL; + if (pc300patrntst.patrntst_on == 2) { + if (chan->falc.prbs == 0) { + falc_pattern_test(card, ch, 1); + } + pc300patrntst.num_errors = + falc_pattern_test_error(card, ch); + if (!arg + || copy_to_user(arg, &pc300patrntst, + sizeof (pc300patterntst_t))) + return -EINVAL; + } else { + falc_pattern_test(card, ch, pc300patrntst.patrntst_on); + } + return 0; + } + + case SIOCWANDEV: + switch (ifr->ifr_settings.type) { + case IF_GET_IFACE: + { + const size_t size = sizeof(sync_serial_settings); + ifr->ifr_settings.type = conf->media; + if (ifr->ifr_settings.size == 0) { + return 0; //return interface type only + } + if (ifr->ifr_settings.size < size) { + return -ENOMEM; //small buffer + } + if (copy_to_user(& ifr->ifr_settings.ifs_ifsu, + &conf->phys_settings, size)) { + return -EFAULT; + } + ifr->ifr_settings.size = size; + return 0; + } + + case IF_IFACE_V35: + case IF_IFACE_V24: + case IF_IFACE_X21: + { + const size_t size = sizeof(sync_serial_settings); + + if (!capable(CAP_NET_ADMIN)) { + return -EPERM; + } + if (ifr->ifr_settings.size != size) { + return -ENOMEM; //incorrect data len + } + if (copy_from_user(&conf->phys_settings, + &ifr->ifr_settings.ifs_ifsu, size)) { + return -EFAULT; + } + if (conf->phys_settings.loopback) { + cpc_writeb(card->hw.scabase + M_REG(MD2, ch), + cpc_readb(card->hw.scabase + M_REG(MD2, ch)) | + MD2_LOOP_MIR); + } + conf->media = ifr->ifr_settings.type; + return 0; + } + + case IF_IFACE_T1: + case IF_IFACE_E1: + { + const size_t te_size = sizeof(te1_settings); + const size_t size = sizeof(sync_serial_settings); + + if (!capable(CAP_NET_ADMIN)) { + return -EPERM; + } + if (ifr->ifr_settings.size != te_size) { + return -ENOMEM; //incorrect data len + } + if (copy_from_user(&conf->phys_settings, + &ifr->ifr_settings.ifs_ifsu, size)) { + return -EFAULT; + }/* Ignoring HDLC slot_map for a while */ + if (conf->phys_settings.loopback) { + cpc_writeb(card->hw.scabase + M_REG(MD2, ch), + cpc_readb(card->hw.scabase + M_REG(MD2, ch)) | + MD2_LOOP_MIR); + } + conf->media = ifr->ifr_settings.type; + return 0; + } + + default: + return hdlc_ioctl(dev, ifr, cmd); + } + + default: + return hdlc_ioctl(dev, ifr, cmd); + } +} + +static struct net_device_stats *cpc_get_stats(struct net_device *dev) +{ + pc300dev_t *d = (pc300dev_t *) dev->priv; + + if (d) + return &d->hdlc->stats; + else + return NULL; +} + +static int clock_rate_calc(uclong rate, uclong clock, int *br_io) +{ + int br, tc; + int br_pwr, error; + + if (rate == 0) + return (0); + + for (br = 0, br_pwr = 1; br <= 9; br++, br_pwr <<= 1) { + if ((tc = clock / br_pwr / rate) <= 0xff) { + *br_io = br; + break; + } + } + + if (tc <= 0xff) { + error = ((rate - (clock / br_pwr / rate)) / rate) * 1000; + /* Errors bigger than +/- 1% won't be tolerated */ + if (error < -10 || error > 10) + return (-1); + else + return (tc); + } else { + return (-1); + } +} + +int ch_config(pc300dev_t * d) +{ + pc300ch_t *chan = (pc300ch_t *) d->chan; + pc300chconf_t *conf = (pc300chconf_t *) & chan->conf; + pc300_t *card = (pc300_t *) chan->card; + uclong scabase = card->hw.scabase; + uclong plxbase = card->hw.plxbase; + int ch = chan->channel; + uclong clkrate = chan->conf.phys_settings.clock_rate; + uclong clktype = chan->conf.phys_settings.clock_type; + ucshort encoding = chan->conf.proto_settings.encoding; + ucshort parity = chan->conf.proto_settings.parity; + int tmc, br; + ucchar md0, md2; + + /* Reset the channel */ + cpc_writeb(scabase + M_REG(CMD, ch), CMD_CH_RST); + + /* Configure the SCA registers */ + switch (parity) { + case PARITY_NONE: + md0 = MD0_BIT_SYNC; + break; + case PARITY_CRC16_PR0: + md0 = MD0_CRC16_0|MD0_CRCC0|MD0_BIT_SYNC; + break; + case PARITY_CRC16_PR1: + md0 = MD0_CRC16_1|MD0_CRCC0|MD0_BIT_SYNC; + break; + case PARITY_CRC32_PR1_CCITT: + md0 = MD0_CRC32|MD0_CRCC0|MD0_BIT_SYNC; + break; + case PARITY_CRC16_PR1_CCITT: + default: + md0 = MD0_CRC_CCITT|MD0_CRCC0|MD0_BIT_SYNC; + break; + } + switch (encoding) { + case ENCODING_NRZI: + md2 = MD2_F_DUPLEX|MD2_ADPLL_X8|MD2_NRZI; + break; + case ENCODING_FM_MARK: /* FM1 */ + md2 = MD2_F_DUPLEX|MD2_ADPLL_X8|MD2_FM|MD2_FM1; + break; + case ENCODING_FM_SPACE: /* FM0 */ + md2 = MD2_F_DUPLEX|MD2_ADPLL_X8|MD2_FM|MD2_FM0; + break; + case ENCODING_MANCHESTER: /* It's not working... */ + md2 = MD2_F_DUPLEX|MD2_ADPLL_X8|MD2_FM|MD2_MANCH; + break; + case ENCODING_NRZ: + default: + md2 = MD2_F_DUPLEX|MD2_ADPLL_X8|MD2_NRZ; + break; + } + cpc_writeb(scabase + M_REG(MD0, ch), md0); + cpc_writeb(scabase + M_REG(MD1, ch), 0); + cpc_writeb(scabase + M_REG(MD2, ch), md2); + cpc_writeb(scabase + M_REG(IDL, ch), 0x7e); + cpc_writeb(scabase + M_REG(CTL, ch), CTL_URSKP | CTL_IDLC); + + /* Configure HW media */ + switch (card->hw.type) { + case PC300_RSV: + if (conf->media == IF_IFACE_V35) { + cpc_writel((plxbase + card->hw.gpioc_reg), + cpc_readl(plxbase + card->hw.gpioc_reg) | PC300_CHMEDIA_MASK(ch)); + } else { + cpc_writel((plxbase + card->hw.gpioc_reg), + cpc_readl(plxbase + card->hw.gpioc_reg) & ~PC300_CHMEDIA_MASK(ch)); + } + break; + + case PC300_X21: + break; + + case PC300_TE: + te_config(card, ch); + break; + } + + switch (card->hw.type) { + case PC300_RSV: + case PC300_X21: + if (clktype == CLOCK_INT || clktype == CLOCK_TXINT) { + /* Calculate the clkrate parameters */ + tmc = clock_rate_calc(clkrate, card->hw.clock, &br); + cpc_writeb(scabase + M_REG(TMCT, ch), tmc); + cpc_writeb(scabase + M_REG(TXS, ch), + (TXS_DTRXC | TXS_IBRG | br)); + if (clktype == CLOCK_INT) { + cpc_writeb(scabase + M_REG(TMCR, ch), tmc); + cpc_writeb(scabase + M_REG(RXS, ch), + (RXS_IBRG | br)); + } else { + cpc_writeb(scabase + M_REG(TMCR, ch), 1); + cpc_writeb(scabase + M_REG(RXS, ch), 0); + } + if (card->hw.type == PC300_X21) { + cpc_writeb(scabase + M_REG(GPO, ch), 1); + cpc_writeb(scabase + M_REG(EXS, ch), EXS_TES1 | EXS_RES1); + } else { + cpc_writeb(scabase + M_REG(EXS, ch), EXS_TES1); + } + } else { + cpc_writeb(scabase + M_REG(TMCT, ch), 1); + if (clktype == CLOCK_EXT) { + cpc_writeb(scabase + M_REG(TXS, ch), + TXS_DTRXC); + } else { + cpc_writeb(scabase + M_REG(TXS, ch), + TXS_DTRXC|TXS_RCLK); + } + cpc_writeb(scabase + M_REG(TMCR, ch), 1); + cpc_writeb(scabase + M_REG(RXS, ch), 0); + if (card->hw.type == PC300_X21) { + cpc_writeb(scabase + M_REG(GPO, ch), 0); + cpc_writeb(scabase + M_REG(EXS, ch), EXS_TES1 | EXS_RES1); + } else { + cpc_writeb(scabase + M_REG(EXS, ch), EXS_TES1); + } + } + break; + + case PC300_TE: + /* SCA always receives clock from the FALC chip */ + cpc_writeb(scabase + M_REG(TMCT, ch), 1); + cpc_writeb(scabase + M_REG(TXS, ch), 0); + cpc_writeb(scabase + M_REG(TMCR, ch), 1); + cpc_writeb(scabase + M_REG(RXS, ch), 0); + cpc_writeb(scabase + M_REG(EXS, ch), 0); + break; + } + + /* Enable Interrupts */ + cpc_writel(scabase + IER0, + cpc_readl(scabase + IER0) | + IR0_M(IR0_RXINTA, ch) | + IR0_DRX(IR0_EFT | IR0_DMIA | IR0_DMIB, ch) | + IR0_DTX(IR0_EFT | IR0_DMIA | IR0_DMIB, ch)); + cpc_writeb(scabase + M_REG(IE0, ch), + cpc_readl(scabase + M_REG(IE0, ch)) | IE0_RXINTA); + cpc_writeb(scabase + M_REG(IE1, ch), + cpc_readl(scabase + M_REG(IE1, ch)) | IE1_CDCD); + + return 0; +} + +int rx_config(pc300dev_t * d) +{ + pc300ch_t *chan = (pc300ch_t *) d->chan; + pc300_t *card = (pc300_t *) chan->card; + uclong scabase = card->hw.scabase; + int ch = chan->channel; + + cpc_writeb(scabase + DSR_RX(ch), 0); + + /* General RX settings */ + cpc_writeb(scabase + M_REG(RRC, ch), 0); + cpc_writeb(scabase + M_REG(RNR, ch), 16); + + /* Enable reception */ + cpc_writeb(scabase + M_REG(CMD, ch), CMD_RX_CRC_INIT); + cpc_writeb(scabase + M_REG(CMD, ch), CMD_RX_ENA); + + /* Initialize DMA stuff */ + chan->rx_first_bd = 0; + chan->rx_last_bd = N_DMA_RX_BUF - 1; + rx_dma_buf_init(card, ch); + cpc_writeb(scabase + DCR_RX(ch), DCR_FCT_CLR); + cpc_writeb(scabase + DMR_RX(ch), (DMR_TMOD | DMR_NF)); + cpc_writeb(scabase + DIR_RX(ch), (DIR_EOM | DIR_BOF)); + + /* Start DMA */ + rx_dma_start(card, ch); + + return 0; +} + +int tx_config(pc300dev_t * d) +{ + pc300ch_t *chan = (pc300ch_t *) d->chan; + pc300_t *card = (pc300_t *) chan->card; + uclong scabase = card->hw.scabase; + int ch = chan->channel; + + cpc_writeb(scabase + DSR_TX(ch), 0); + + /* General TX settings */ + cpc_writeb(scabase + M_REG(TRC0, ch), 0); + cpc_writeb(scabase + M_REG(TFS, ch), 32); + cpc_writeb(scabase + M_REG(TNR0, ch), 20); + cpc_writeb(scabase + M_REG(TNR1, ch), 48); + cpc_writeb(scabase + M_REG(TCR, ch), 8); + + /* Enable transmission */ + cpc_writeb(scabase + M_REG(CMD, ch), CMD_TX_CRC_INIT); + + /* Initialize DMA stuff */ + chan->tx_first_bd = 0; + chan->tx_next_bd = 0; + tx_dma_buf_init(card, ch); + cpc_writeb(scabase + DCR_TX(ch), DCR_FCT_CLR); + cpc_writeb(scabase + DMR_TX(ch), (DMR_TMOD | DMR_NF)); + cpc_writeb(scabase + DIR_TX(ch), (DIR_EOM | DIR_BOF | DIR_UDRF)); + cpc_writel(scabase + DTX_REG(CDAL, ch), TX_BD_ADDR(ch, chan->tx_first_bd)); + cpc_writel(scabase + DTX_REG(EDAL, ch), TX_BD_ADDR(ch, chan->tx_next_bd)); + + return 0; +} + +static int cpc_attach(hdlc_device * hdlc, unsigned short encoding, + unsigned short parity) +{ + struct net_device * dev = hdlc_to_dev(hdlc); + pc300dev_t *d = (pc300dev_t *)dev->priv; + pc300ch_t *chan = (pc300ch_t *)d->chan; + pc300_t *card = (pc300_t *)chan->card; + pc300chconf_t *conf = (pc300chconf_t *)&chan->conf; + + if (card->hw.type == PC300_TE) { + if (encoding != ENCODING_NRZ && encoding != ENCODING_NRZI) { + return -EINVAL; + } + } else { + if (encoding != ENCODING_NRZ && encoding != ENCODING_NRZI && + encoding != ENCODING_FM_MARK && encoding != ENCODING_FM_SPACE) { + /* Driver doesn't support ENCODING_MANCHESTER yet */ + return -EINVAL; + } + } + + if (parity != PARITY_NONE && parity != PARITY_CRC16_PR0 && + parity != PARITY_CRC16_PR1 && parity != PARITY_CRC32_PR1_CCITT && + parity != PARITY_CRC16_PR1_CCITT) { + return -EINVAL; + } + + conf->proto_settings.encoding = encoding; + conf->proto_settings.parity = parity; + return 0; +} + +void cpc_opench(pc300dev_t * d) +{ + pc300ch_t *chan = (pc300ch_t *) d->chan; + pc300_t *card = (pc300_t *) chan->card; + int ch = chan->channel; + uclong scabase = card->hw.scabase; + + ch_config(d); + + rx_config(d); + + tx_config(d); + + /* Assert RTS and DTR */ + cpc_writeb(scabase + M_REG(CTL, ch), + cpc_readb(scabase + M_REG(CTL, ch)) & ~(CTL_RTS | CTL_DTR)); +} + +void cpc_closech(pc300dev_t * d) +{ + pc300ch_t *chan = (pc300ch_t *) d->chan; + pc300_t *card = (pc300_t *) chan->card; + falc_t *pfalc = (falc_t *) & chan->falc; + int ch = chan->channel; + + cpc_writeb(card->hw.scabase + M_REG(CMD, ch), CMD_CH_RST); + rx_dma_stop(card, ch); + tx_dma_stop(card, ch); + + if (card->hw.type == PC300_TE) { + memset(pfalc, 0, sizeof(falc_t)); + cpc_writeb(card->hw.falcbase + card->hw.cpld_reg2, + cpc_readb(card->hw.falcbase + card->hw.cpld_reg2) & + ~((CPLD_REG2_FALC_TX_CLK | CPLD_REG2_FALC_RX_CLK | + CPLD_REG2_FALC_LED2) << (2 * ch))); + /* Reset the FALC chip */ + cpc_writeb(card->hw.falcbase + card->hw.cpld_reg1, + cpc_readb(card->hw.falcbase + card->hw.cpld_reg1) | + (CPLD_REG1_FALC_RESET << (2 * ch))); + udelay(10000); + cpc_writeb(card->hw.falcbase + card->hw.cpld_reg1, + cpc_readb(card->hw.falcbase + card->hw.cpld_reg1) & + ~(CPLD_REG1_FALC_RESET << (2 * ch))); + } +} + +int cpc_open(struct net_device *dev) +{ + hdlc_device *hdlc = dev_to_hdlc(dev); + pc300dev_t *d = (pc300dev_t *) dev->priv; + struct ifreq ifr; + int result; + +#ifdef PC300_DEBUG_OTHER + printk("pc300: cpc_open"); +#endif + + if (hdlc->proto == IF_PROTO_PPP) { + d->if_ptr = &hdlc->state.ppp.pppdev; + } + + result = hdlc_open(hdlc); + if (hdlc->proto == IF_PROTO_PPP) { + dev->priv = d; + } + if (result) { + return result; + } + + MOD_INC_USE_COUNT; + sprintf(ifr.ifr_name, "%s", dev->name); + cpc_opench(d); + netif_start_queue(dev); + return 0; +} + +int cpc_close(struct net_device *dev) +{ + hdlc_device *hdlc = dev_to_hdlc(dev); + pc300dev_t *d = (pc300dev_t *) dev->priv; + pc300ch_t *chan = (pc300ch_t *) d->chan; + pc300_t *card = (pc300_t *) chan->card; + uclong flags; + +#ifdef PC300_DEBUG_OTHER + printk("pc300: cpc_close"); +#endif + + netif_stop_queue(dev); + + CPC_LOCK(card, flags); + cpc_closech(d); + CPC_UNLOCK(card, flags); + + hdlc_close(hdlc); + if (hdlc->proto == IF_PROTO_PPP) { + d->if_ptr = NULL; + } +#ifdef CONFIG_PC300_MLPPP + if (chan->conf.proto == PC300_PROTO_MLPPP) { + cpc_tty_unregister_service(d); + chan->conf.proto = 0xffff; + } +#endif + + MOD_DEC_USE_COUNT; + return 0; +} + +static uclong detect_ram(pc300_t * card) +{ + uclong i; + ucchar data; + uclong rambase = card->hw.rambase; + + card->hw.ramsize = PC300_RAMSIZE; + /* Let's find out how much RAM is present on this board */ + for (i = 0; i < card->hw.ramsize; i++) { + data = (ucchar) (i & 0xff); + cpc_writeb(rambase + i, data); + if (cpc_readb(rambase + i) != data) { + break; + } + } + return (i); +} + +static void plx_init(pc300_t * card) +{ + struct RUNTIME_9050 *plx_ctl = (struct RUNTIME_9050 *) card->hw.plxbase; + + /* Reset PLX */ + cpc_writel(&plx_ctl->init_ctrl, + cpc_readl(&plx_ctl->init_ctrl) | 0x40000000); + udelay(10000L); + cpc_writel(&plx_ctl->init_ctrl, + cpc_readl(&plx_ctl->init_ctrl) & ~0x40000000); + + /* Reload Config. Registers from EEPROM */ + cpc_writel(&plx_ctl->init_ctrl, + cpc_readl(&plx_ctl->init_ctrl) | 0x20000000); + udelay(10000L); + cpc_writel(&plx_ctl->init_ctrl, + cpc_readl(&plx_ctl->init_ctrl) & ~0x20000000); + +} + +static inline void show_version(void) +{ + char *rcsvers, *rcsdate, *tmp; + + rcsvers = strchr(rcsid, ' '); + rcsvers++; + tmp = strchr(rcsvers, ' '); + *tmp++ = '\0'; + rcsdate = strchr(tmp, ' '); + rcsdate++; + tmp = strrchr(rcsdate, ' '); + *tmp = '\0'; + printk(KERN_INFO "Cyclades-PC300 driver %s %s (built %s %s)\n", + rcsvers, rcsdate, __DATE__, __TIME__); +} /* show_version */ + +static void cpc_init_card(pc300_t * card) +{ + int i, devcount = 0; + static int board_nbr = 1; + + /* Enable interrupts on the PCI bridge */ + plx_init(card); + cpc_writew(card->hw.plxbase + card->hw.intctl_reg, + cpc_readw(card->hw.plxbase + card->hw.intctl_reg) | 0x0040); + +#ifdef USE_PCI_CLOCK + /* Set board clock to PCI clock */ + cpc_writel(card->hw.plxbase + card->hw.gpioc_reg, + cpc_readl(card->hw.plxbase + card->hw.gpioc_reg) | 0x00000004UL); + card->hw.clock = PC300_PCI_CLOCK; +#else + /* Set board clock to internal oscillator clock */ + cpc_writel(card->hw.plxbase + card->hw.gpioc_reg, + cpc_readl(card->hw.plxbase + card->hw.gpioc_reg) & ~0x00000004UL); + card->hw.clock = PC300_OSC_CLOCK; +#endif + + /* Detect actual on-board RAM size */ + card->hw.ramsize = detect_ram(card); + + /* Set Global SCA-II registers */ + cpc_writeb(card->hw.scabase + PCR, PCR_PR2); + cpc_writeb(card->hw.scabase + BTCR, 0x10); + cpc_writeb(card->hw.scabase + WCRL, 0); + cpc_writeb(card->hw.scabase + DMER, 0x80); + + if (card->hw.type == PC300_TE) { + ucchar reg1; + + /* Check CPLD version */ + reg1 = cpc_readb(card->hw.falcbase + CPLD_REG1); + cpc_writeb(card->hw.falcbase + CPLD_REG1, (reg1 + 0x5a)); + if (cpc_readb(card->hw.falcbase + CPLD_REG1) == reg1) { + /* New CPLD */ + card->hw.cpld_id = cpc_readb(card->hw.falcbase + CPLD_ID_REG); + card->hw.cpld_reg1 = CPLD_V2_REG1; + card->hw.cpld_reg2 = CPLD_V2_REG2; + } else { + /* old CPLD */ + card->hw.cpld_id = 0; + card->hw.cpld_reg1 = CPLD_REG1; + card->hw.cpld_reg2 = CPLD_REG2; + cpc_writeb(card->hw.falcbase + CPLD_REG1, reg1); + } + + /* Enable the board's global clock */ + cpc_writeb(card->hw.falcbase + card->hw.cpld_reg1, + cpc_readb(card->hw.falcbase + card->hw.cpld_reg1) | + CPLD_REG1_GLOBAL_CLK); + + } + + for (i = 0; i < card->hw.nchan; i++) { + pc300ch_t *chan = &card->chan[i]; + pc300dev_t *d = &chan->d; + hdlc_device *hdlc; + struct net_device *dev; + + chan->card = card; + chan->channel = i; + chan->conf.phys_settings.clock_rate = 0; + chan->conf.phys_settings.clock_type = CLOCK_EXT; + chan->conf.proto_settings.encoding = ENCODING_NRZ; + chan->conf.proto_settings.parity = PARITY_CRC16_PR1_CCITT; + switch (card->hw.type) { + case PC300_TE: + chan->conf.media = IF_IFACE_T1; + chan->conf.lcode = PC300_LC_B8ZS; + chan->conf.fr_mode = PC300_FR_ESF; + chan->conf.lbo = PC300_LBO_0_DB; + chan->conf.rx_sens = PC300_RX_SENS_SH; + chan->conf.tslot_bitmap = 0xffffffffUL; + break; + + case PC300_X21: + chan->conf.media = IF_IFACE_X21; + break; + + case PC300_RSV: + default: + chan->conf.media = IF_IFACE_V35; + break; + } + chan->conf.proto = IF_PROTO_PPP; + chan->tx_first_bd = 0; + chan->tx_next_bd = 0; + chan->rx_first_bd = 0; + chan->rx_last_bd = N_DMA_RX_BUF - 1; + chan->nfree_tx_bd = N_DMA_TX_BUF; + + d->chan = chan; + d->tx_skb = NULL; + d->trace_on = 0; + d->line_on = 0; + d->line_off = 0; + + d->hdlc = (hdlc_device *) kmalloc(sizeof(hdlc_device), GFP_KERNEL); + if (d->hdlc == NULL) + continue; + memset(d->hdlc, 0, sizeof(hdlc_device)); + + hdlc = d->hdlc; + hdlc->xmit = cpc_queue_xmit; + hdlc->attach = cpc_attach; + + dev = hdlc_to_dev(hdlc); + + dev->mem_start = card->hw.ramphys; + dev->mem_end = card->hw.ramphys + card->hw.ramsize - 1; + dev->irq = card->hw.irq; + dev->init = NULL; + dev->tx_queue_len = PC300_TX_QUEUE_LEN; + dev->mtu = PC300_DEF_MTU; + + dev->open = cpc_open; + dev->stop = cpc_close; + dev->tx_timeout = cpc_tx_timeout; + dev->watchdog_timeo = PC300_TX_TIMEOUT; + dev->get_stats = cpc_get_stats; + dev->set_multicast_list = NULL; + dev->set_mac_address = NULL; + dev->change_mtu = cpc_change_mtu; + dev->do_ioctl = cpc_ioctl; + + if (register_hdlc_device(hdlc) == 0) { + dev->priv = d; /* We need 'priv', hdlc doesn't */ + printk("%s: Cyclades-PC300/", dev->name); + switch (card->hw.type) { + case PC300_TE: + if (card->hw.bus == PC300_PMC) { + printk("TE-M"); + } else { + printk("TE "); + } + break; + + case PC300_X21: + printk("X21 "); + break; + + case PC300_RSV: + default: + printk("RSV "); + break; + } + printk (" #%d, %ldKB of RAM at 0x%08lx, IRQ%d, channel %d.\n", + board_nbr, card->hw.ramsize / 1024, + card->hw.ramphys, card->hw.irq, i + 1); + devcount++; + } else { + printk ("Dev%d on card(0x%08lx): unable to allocate i/f name.\n", + i + 1, card->hw.ramphys); + *(dev->name) = 0; + kfree(d->hdlc); + continue; + } + } + spin_lock_init(&card->card_lock); + + board_nbr++; +} + +static int __devinit +cpc_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) +{ + static int first_time = 1; + ucchar cpc_rev_id; + int err = 0, eeprom_outdated = 0; + ucshort device_id; + pc300_t *card; + + if (first_time) { + first_time = 0; + show_version(); +#ifdef CONFIG_PC300_MLPPP + cpc_tty_reset_var(); +#endif + } + + card = (pc300_t *) kmalloc(sizeof(pc300_t), GFP_KERNEL); + if (card == NULL) { + printk("PC300 found at RAM 0x%08lx, " + "but could not allocate card structure.\n", + pci_resource_start(pdev, 3)); + return -ENOMEM; + } + memset(card, 0, sizeof(pc300_t)); + + /* read PCI configuration area */ + device_id = ent->device; + card->hw.irq = pdev->irq; + card->hw.iophys = pci_resource_start(pdev, 1); + card->hw.iosize = pci_resource_len(pdev, 1); + card->hw.scaphys = pci_resource_start(pdev, 2); + card->hw.scasize = pci_resource_len(pdev, 2); + card->hw.ramphys = pci_resource_start(pdev, 3); + card->hw.alloc_ramsize = pci_resource_len(pdev, 3); + card->hw.falcphys = pci_resource_start(pdev, 4); + card->hw.falcsize = pci_resource_len(pdev, 4); + card->hw.plxphys = pci_resource_start(pdev, 5); + card->hw.plxsize = pci_resource_len(pdev, 5); + pci_read_config_byte(pdev, PCI_REVISION_ID, &cpc_rev_id); + + switch (device_id) { + case PCI_DEVICE_ID_PC300_RX_1: + case PCI_DEVICE_ID_PC300_TE_1: + card->hw.nchan = 1; + break; + + case PCI_DEVICE_ID_PC300_RX_2: + case PCI_DEVICE_ID_PC300_TE_2: + default: + card->hw.nchan = PC300_MAXCHAN; + break; + } +#ifdef PC300_DEBUG_PCI + printk("cpc (bus=0x0%x,pci_id=0x%x,", pdev->bus->number, pdev->devfn); + printk("rev_id=%d) IRQ%d\n", cpc_rev_id, card->hw.irq); + printk("cpc:found ramaddr=0x%08lx plxaddr=0x%08lx " + "ctladdr=0x%08lx falcaddr=0x%08lx\n", + card->hw.ramphys, card->hw.plxphys, card->hw.scaphys, + card->hw.falcphys); +#endif + /* Although we don't use this I/O region, we should + * request it from the kernel anyway, to avoid problems + * with other drivers accessing it. */ + if (!request_region(card->hw.iophys, card->hw.iosize, "PLX Registers")) { + /* In case we can't allocate it, warn user */ + printk("WARNING: couldn't allocate I/O region for PC300 board " + "at 0x%08lx!\n", card->hw.ramphys); + } + + if (card->hw.plxphys) { + pci_write_config_dword(pdev, PCI_BASE_ADDRESS_0, card->hw.plxphys); + } else { + eeprom_outdated = 1; + card->hw.plxphys = pci_resource_start(pdev, 0); + card->hw.plxsize = pci_resource_len(pdev, 0); + } + + if (!request_mem_region(card->hw.plxphys, card->hw.plxsize, + "PLX Registers")) { + printk("PC300 found at RAM 0x%08lx, " + "but could not allocate PLX mem region.\n", + card->hw.ramphys); + err = -ENODEV; + goto err_release_io; + } + if (!request_mem_region(card->hw.ramphys, card->hw.alloc_ramsize, + "On-board RAM")) { + printk("PC300 found at RAM 0x%08lx, " + "but could not allocate RAM mem region.\n", + card->hw.ramphys); + err = -ENODEV; + goto err_release_plx; + } + if (!request_mem_region(card->hw.scaphys, card->hw.scasize, + "SCA-II Registers")) { + printk("PC300 found at RAM 0x%08lx, " + "but could not allocate SCA mem region.\n", + card->hw.ramphys); + err = -ENODEV; + goto err_release_ram; + } + + if ((err = pci_enable_device(pdev)) != 0) + goto err_release_sca; + + card->hw.plxbase = (uclong) ioremap(card->hw.plxphys, card->hw.plxsize); + card->hw.rambase = (uclong) ioremap(card->hw.ramphys, + card->hw.alloc_ramsize); + card->hw.scabase = (uclong) ioremap(card->hw.scaphys, card->hw.scasize); + switch (device_id) { + case PCI_DEVICE_ID_PC300_TE_1: + case PCI_DEVICE_ID_PC300_TE_2: + request_mem_region(card->hw.falcphys, card->hw.falcsize, + "FALC Registers"); + card->hw.falcbase = (uclong) ioremap(card->hw.falcphys, + card->hw.falcsize); + break; + + case PCI_DEVICE_ID_PC300_RX_1: + case PCI_DEVICE_ID_PC300_RX_2: + default: + card->hw.falcbase = 0; + break; + } + +#ifdef PC300_DEBUG_PCI + printk("cpc: relocate ramaddr=0x%08lx plxaddr=0x%08lx " + "ctladdr=0x%08lx falcaddr=0x%08lx\n", + card->hw.rambase, card->hw.plxbase, card->hw.scabase, + card->hw.falcbase); +#endif + + /* Set PCI drv pointer to the card structure */ + pdev->driver_data = card; + + /* Set board type */ + switch (device_id) { + case PCI_DEVICE_ID_PC300_TE_1: + case PCI_DEVICE_ID_PC300_TE_2: + card->hw.type = PC300_TE; + card->hw.bus = PC300_PCI; + /* Set PLX register offsets */ + card->hw.gpioc_reg = 0x50; + card->hw.intctl_reg = 0x4c; + break; + case PCI_DEVICE_ID_PC300_RX_1: + case PCI_DEVICE_ID_PC300_RX_2: + default: + card->hw.bus = PC300_PCI; + /* Set PLX register offsets */ + card->hw.gpioc_reg = 0x50; + card->hw.intctl_reg = 0x4c; + + if ((cpc_readl(card->hw.plxbase + card->hw.gpioc_reg) & PC300_CTYPE_MASK)) { + card->hw.type = PC300_X21; + } else { + card->hw.type = PC300_RSV; + } + break; + } + + /* Allocate IRQ */ + if (request_irq(card->hw.irq, cpc_intr, SA_SHIRQ, "Cyclades-PC300", card)) { + printk ("PC300 found at RAM 0x%08lx, but could not allocate IRQ%d.\n", + card->hw.ramphys, card->hw.irq); + goto err_io_unmap; + } + + cpc_init_card(card); + + if (eeprom_outdated) + printk("WARNING: PC300 with outdated EEPROM.\n"); + return 0; + +err_io_unmap: + iounmap((void *) card->hw.plxbase); + iounmap((void *) card->hw.scabase); + iounmap((void *) card->hw.rambase); + if (card->hw.type == PC300_TE) { + iounmap((void *) card->hw.falcbase); + release_mem_region(card->hw.falcphys, card->hw.falcsize); + } +err_release_sca: + release_mem_region(card->hw.scaphys, card->hw.scasize); +err_release_ram: + release_mem_region(card->hw.ramphys, card->hw.alloc_ramsize); +err_release_plx: + release_mem_region(card->hw.plxphys, card->hw.plxsize); +err_release_io: + release_region(card->hw.iophys, card->hw.iosize); + kfree(card); + return -ENODEV; +} + +static void __devexit cpc_remove_one(struct pci_dev *pdev) +{ + pc300_t *card = (pc300_t *) pdev->driver_data; + + if (card->hw.rambase != 0) { + int i; + + /* Disable interrupts on the PCI bridge */ + cpc_writew(card->hw.plxbase + card->hw.intctl_reg, + cpc_readw(card->hw.plxbase + card->hw.intctl_reg) & ~(0x0040)); + + for (i = 0; i < card->hw.nchan; i++) { + unregister_hdlc_device(card->chan[i].d.hdlc); + } + iounmap((void *) card->hw.plxbase); + iounmap((void *) card->hw.scabase); + iounmap((void *) card->hw.rambase); + release_mem_region(card->hw.plxphys, card->hw.plxsize); + release_mem_region(card->hw.ramphys, card->hw.alloc_ramsize); + release_mem_region(card->hw.scaphys, card->hw.scasize); + release_region(card->hw.iophys, card->hw.iosize); + if (card->hw.type == PC300_TE) { + iounmap((void *) card->hw.falcbase); + release_mem_region(card->hw.falcphys, card->hw.falcsize); + } + if (card->hw.irq) + free_irq(card->hw.irq, card); + kfree(card); + } +} + +static struct pci_driver cpc_driver = { + name:"pc300", + id_table:cpc_pci_dev_id, + probe:cpc_init_one, + remove:cpc_remove_one, + suspend:NULL, + resume:NULL, +}; + +static int __init cpc_init(void) +{ + return pci_module_init(&cpc_driver); +} + +static void __exit cpc_cleanup_module(void) +{ + pci_unregister_driver(&cpc_driver); +} + +module_init(cpc_init); +module_exit(cpc_cleanup_module); + +MODULE_DESCRIPTION("Cyclades-PC300 cards driver"); +MODULE_AUTHOR( "Author: Ivan Passos \r\n" + "Maintainer: Henrique Gobbi + * + * Copyright: (c) 2000-2001 Cyclades Corp. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + * + */ + +#ifndef _FALC_LH_H +#define _FALC_LH_H + +#define NUM_OF_T1_CHANNELS 24 +#define NUM_OF_E1_CHANNELS 32 + +/*>>>>>>>>>>>>>>>>> FALC Register Bits (Transmit Mode) <<<<<<<<<<<<<<<<<<< */ + +/* CMDR (Command Register) + ---------------- E1 & T1 ------------------------------ */ +#define CMDR_RMC 0x80 +#define CMDR_RRES 0x40 +#define CMDR_XREP 0x20 +#define CMDR_XRES 0x10 +#define CMDR_XHF 0x08 +#define CMDR_XTF 0x04 +#define CMDR_XME 0x02 +#define CMDR_SRES 0x01 + +/* MODE (Mode Register) + ----------------- E1 & T1 ----------------------------- */ +#define MODE_MDS2 0x80 +#define MODE_MDS1 0x40 +#define MODE_MDS0 0x20 +#define MODE_BRAC 0x10 +#define MODE_HRAC 0x08 + +/* IPC (Interrupt Port Configuration) + ----------------- E1 & T1 ----------------------------- */ +#define IPC_VIS 0x80 +#define IPC_SCI 0x04 +#define IPC_IC1 0x02 +#define IPC_IC0 0x01 + +/* CCR1 (Common Configuration Register 1) + ----------------- E1 & T1 ----------------------------- */ +#define CCR1_SFLG 0x80 +#define CCR1_XTS16RA 0x40 +#define CCR1_BRM 0x40 +#define CCR1_CASSYM 0x20 +#define CCR1_EDLX 0x20 +#define CCR1_EITS 0x10 +#define CCR1_ITF 0x08 +#define CCR1_RFT1 0x02 +#define CCR1_RFT0 0x01 + +/* CCR3 (Common Configuration Register 3) + ---------------- E1 & T1 ------------------------------ */ + +#define CCR3_PRE1 0x80 +#define CCR3_PRE0 0x40 +#define CCR3_EPT 0x20 +#define CCR3_RADD 0x10 +#define CCR3_RCRC 0x04 +#define CCR3_XCRC 0x02 + + +/* RTR1-4 (Receive Timeslot Register 1-4) + ---------------- E1 & T1 ------------------------------ */ + +#define RTR1_TS0 0x80 +#define RTR1_TS1 0x40 +#define RTR1_TS2 0x20 +#define RTR1_TS3 0x10 +#define RTR1_TS4 0x08 +#define RTR1_TS5 0x04 +#define RTR1_TS6 0x02 +#define RTR1_TS7 0x01 + +#define RTR2_TS8 0x80 +#define RTR2_TS9 0x40 +#define RTR2_TS10 0x20 +#define RTR2_TS11 0x10 +#define RTR2_TS12 0x08 +#define RTR2_TS13 0x04 +#define RTR2_TS14 0x02 +#define RTR2_TS15 0x01 + +#define RTR3_TS16 0x80 +#define RTR3_TS17 0x40 +#define RTR3_TS18 0x20 +#define RTR3_TS19 0x10 +#define RTR3_TS20 0x08 +#define RTR3_TS21 0x04 +#define RTR3_TS22 0x02 +#define RTR3_TS23 0x01 + +#define RTR4_TS24 0x80 +#define RTR4_TS25 0x40 +#define RTR4_TS26 0x20 +#define RTR4_TS27 0x10 +#define RTR4_TS28 0x08 +#define RTR4_TS29 0x04 +#define RTR4_TS30 0x02 +#define RTR4_TS31 0x01 + + +/* TTR1-4 (Transmit Timeslot Register 1-4) + ---------------- E1 & T1 ------------------------------ */ + +#define TTR1_TS0 0x80 +#define TTR1_TS1 0x40 +#define TTR1_TS2 0x20 +#define TTR1_TS3 0x10 +#define TTR1_TS4 0x08 +#define TTR1_TS5 0x04 +#define TTR1_TS6 0x02 +#define TTR1_TS7 0x01 + +#define TTR2_TS8 0x80 +#define TTR2_TS9 0x40 +#define TTR2_TS10 0x20 +#define TTR2_TS11 0x10 +#define TTR2_TS12 0x08 +#define TTR2_TS13 0x04 +#define TTR2_TS14 0x02 +#define TTR2_TS15 0x01 + +#define TTR3_TS16 0x80 +#define TTR3_TS17 0x40 +#define TTR3_TS18 0x20 +#define TTR3_TS19 0x10 +#define TTR3_TS20 0x08 +#define TTR3_TS21 0x04 +#define TTR3_TS22 0x02 +#define TTR3_TS23 0x01 + +#define TTR4_TS24 0x80 +#define TTR4_TS25 0x40 +#define TTR4_TS26 0x20 +#define TTR4_TS27 0x10 +#define TTR4_TS28 0x08 +#define TTR4_TS29 0x04 +#define TTR4_TS30 0x02 +#define TTR4_TS31 0x01 + + + +/* IMR0-4 (Interrupt Mask Register 0-4) + + ----------------- E1 & T1 ----------------------------- */ + +#define IMR0_RME 0x80 +#define IMR0_RFS 0x40 +#define IMR0_T8MS 0x20 +#define IMR0_ISF 0x20 +#define IMR0_RMB 0x10 +#define IMR0_CASC 0x08 +#define IMR0_RSC 0x08 +#define IMR0_CRC6 0x04 +#define IMR0_CRC4 0x04 +#define IMR0_PDEN 0x02 +#define IMR0_RPF 0x01 + +#define IMR1_CASE 0x80 +#define IMR1_RDO 0x40 +#define IMR1_ALLS 0x20 +#define IMR1_XDU 0x10 +#define IMR1_XMB 0x08 +#define IMR1_XLSC 0x02 +#define IMR1_XPR 0x01 +#define IMR1_LLBSC 0x80 + +#define IMR2_FAR 0x80 +#define IMR2_LFA 0x40 +#define IMR2_MFAR 0x20 +#define IMR2_T400MS 0x10 +#define IMR2_LMFA 0x10 +#define IMR2_AIS 0x08 +#define IMR2_LOS 0x04 +#define IMR2_RAR 0x02 +#define IMR2_RA 0x01 + +#define IMR3_ES 0x80 +#define IMR3_SEC 0x40 +#define IMR3_LMFA16 0x20 +#define IMR3_AIS16 0x10 +#define IMR3_RA16 0x08 +#define IMR3_API 0x04 +#define IMR3_XSLP 0x20 +#define IMR3_XSLN 0x10 +#define IMR3_LLBSC 0x08 +#define IMR3_XRS 0x04 +#define IMR3_SLN 0x02 +#define IMR3_SLP 0x01 + +#define IMR4_LFA 0x80 +#define IMR4_FER 0x40 +#define IMR4_CER 0x20 +#define IMR4_AIS 0x10 +#define IMR4_LOS 0x08 +#define IMR4_CVE 0x04 +#define IMR4_SLIP 0x02 +#define IMR4_EBE 0x01 + +/* FMR0-5 for E1 and T1 (Framer Mode Register ) */ + +#define FMR0_XC1 0x80 +#define FMR0_XC0 0x40 +#define FMR0_RC1 0x20 +#define FMR0_RC0 0x10 +#define FMR0_EXTD 0x08 +#define FMR0_ALM 0x04 +#define E1_FMR0_FRS 0x02 +#define T1_FMR0_FRS 0x08 +#define FMR0_SRAF 0x04 +#define FMR0_EXLS 0x02 +#define FMR0_SIM 0x01 + +#define FMR1_MFCS 0x80 +#define FMR1_AFR 0x40 +#define FMR1_ENSA 0x20 +#define FMR1_CTM 0x80 +#define FMR1_SIGM 0x40 +#define FMR1_EDL 0x20 +#define FMR1_PMOD 0x10 +#define FMR1_XFS 0x08 +#define FMR1_CRC 0x08 +#define FMR1_ECM 0x04 +#define FMR1_IMOD 0x02 +#define FMR1_XAIS 0x01 + +#define FMR2_RFS1 0x80 +#define FMR2_RFS0 0x40 +#define FMR2_MCSP 0x40 +#define FMR2_RTM 0x20 +#define FMR2_SSP 0x20 +#define FMR2_DAIS 0x10 +#define FMR2_SAIS 0x08 +#define FMR2_PLB 0x04 +#define FMR2_AXRA 0x02 +#define FMR2_ALMF 0x01 +#define FMR2_EXZE 0x01 + +#define LOOP_RTM 0x40 +#define LOOP_SFM 0x40 +#define LOOP_ECLB 0x20 +#define LOOP_CLA 0x1f + +/*--------------------- E1 ----------------------------*/ +#define FMR3_XLD 0x20 +#define FMR3_XLU 0x10 + +/*--------------------- T1 ----------------------------*/ +#define FMR4_AIS3 0x80 +#define FMR4_TM 0x40 +#define FMR4_XRA 0x20 +#define FMR4_SSC1 0x10 +#define FMR4_SSC0 0x08 +#define FMR4_AUTO 0x04 +#define FMR4_FM1 0x02 +#define FMR4_FM0 0x01 + +#define FMR5_SRS 0x80 +#define FMR5_EIBR 0x40 +#define FMR5_XLD 0x20 +#define FMR5_XLU 0x10 + + +/* LOOP (Channel Loop Back) + + ------------------ E1 & T1 ---------------------------- */ + +#define LOOP_SFM 0x40 +#define LOOP_ECLB 0x20 +#define LOOP_CLA4 0x10 +#define LOOP_CLA3 0x08 +#define LOOP_CLA2 0x04 +#define LOOP_CLA1 0x02 +#define LOOP_CLA0 0x01 + + + +/* XSW (Transmit Service Word Pulseframe) + + ------------------- E1 --------------------------- */ + +#define XSW_XSIS 0x80 +#define XSW_XTM 0x40 +#define XSW_XRA 0x20 +#define XSW_XY0 0x10 +#define XSW_XY1 0x08 +#define XSW_XY2 0x04 +#define XSW_XY3 0x02 +#define XSW_XY4 0x01 + + +/* XSP (Transmit Spare Bits) + + ------------------- E1 --------------------------- */ + +#define XSP_XAP 0x80 +#define XSP_CASEN 0x40 +#define XSP_TT0 0x20 +#define XSP_EBP 0x10 +#define XSP_AXS 0x08 +#define XSP_XSIF 0x04 +#define XSP_XS13 0x02 +#define XSP_XS15 0x01 + + +/* XC0/1 (Transmit Control 0/1) + ------------------ E1 & T1 ---------------------------- */ + +#define XC0_SA8E 0x80 +#define XC0_SA7E 0x40 +#define XC0_SA6E 0x20 +#define XC0_SA5E 0x10 +#define XC0_SA4E 0x08 +#define XC0_BRM 0x80 +#define XC0_MFBS 0x40 +#define XC0_SFRZ 0x10 +#define XC0_XCO2 0x04 +#define XC0_XCO1 0x02 +#define XC0_XCO0 0x01 + +#define XC1_XTO5 0x20 +#define XC1_XTO4 0x10 +#define XC1_XTO3 0x08 +#define XC1_XTO2 0x04 +#define XC1_XTO1 0x02 +#define XC1_XTO0 0x01 + + +/* RC0/1 (Receive Control 0/1) + ------------------ E1 & T1 ---------------------------- */ + +#define RC0_SICS 0x40 +#define RC0_CRCI 0x20 +#define RC0_XCRCI 0x10 +#define RC0_RDIS 0x08 +#define RC0_RCO2 0x04 +#define RC0_RCO1 0x02 +#define RC0_RCO0 0x01 + +#define RC1_SWD 0x80 +#define RC1_ASY4 0x40 +#define RC1_RRAM 0x40 +#define RC1_RTO5 0x20 +#define RC1_RTO4 0x10 +#define RC1_RTO3 0x08 +#define RC1_RTO2 0x04 +#define RC1_RTO1 0x02 +#define RC1_RTO0 0x01 + + + +/* XPM0-2 (Transmit Pulse Mask 0-2) + --------------------- E1 & T1 ------------------------- */ + +#define XPM0_XP12 0x80 +#define XPM0_XP11 0x40 +#define XPM0_XP10 0x20 +#define XPM0_XP04 0x10 +#define XPM0_XP03 0x08 +#define XPM0_XP02 0x04 +#define XPM0_XP01 0x02 +#define XPM0_XP00 0x01 + +#define XPM1_XP30 0x80 +#define XPM1_XP24 0x40 +#define XPM1_XP23 0x20 +#define XPM1_XP22 0x10 +#define XPM1_XP21 0x08 +#define XPM1_XP20 0x04 +#define XPM1_XP14 0x02 +#define XPM1_XP13 0x01 + +#define XPM2_XLHP 0x80 +#define XPM2_XLT 0x40 +#define XPM2_DAXLT 0x20 +#define XPM2_XP34 0x08 +#define XPM2_XP33 0x04 +#define XPM2_XP32 0x02 +#define XPM2_XP31 0x01 + + +/* TSWM (Transparent Service Word Mask) + ------------------ E1 ---------------------------- */ + +#define TSWM_TSIS 0x80 +#define TSWM_TSIF 0x40 +#define TSWM_TRA 0x20 +#define TSWM_TSA4 0x10 +#define TSWM_TSA5 0x08 +#define TSWM_TSA6 0x04 +#define TSWM_TSA7 0x02 +#define TSWM_TSA8 0x01 + +/* IDLE + + ------------------ E1 & T1 ----------------------- */ + +#define IDLE_IDL7 0x80 +#define IDLE_IDL6 0x40 +#define IDLE_IDL5 0x20 +#define IDLE_IDL4 0x10 +#define IDLE_IDL3 0x08 +#define IDLE_IDL2 0x04 +#define IDLE_IDL1 0x02 +#define IDLE_IDL0 0x01 + + +/* XSA4-8 + -------------------E1 ----------------------------- */ + +#define XSA4_XS47 0x80 +#define XSA4_XS46 0x40 +#define XSA4_XS45 0x20 +#define XSA4_XS44 0x10 +#define XSA4_XS43 0x08 +#define XSA4_XS42 0x04 +#define XSA4_XS41 0x02 +#define XSA4_XS40 0x01 + +#define XSA5_XS57 0x80 +#define XSA5_XS56 0x40 +#define XSA5_XS55 0x20 +#define XSA5_XS54 0x10 +#define XSA5_XS53 0x08 +#define XSA5_XS52 0x04 +#define XSA5_XS51 0x02 +#define XSA5_XS50 0x01 + +#define XSA6_XS67 0x80 +#define XSA6_XS66 0x40 +#define XSA6_XS65 0x20 +#define XSA6_XS64 0x10 +#define XSA6_XS63 0x08 +#define XSA6_XS62 0x04 +#define XSA6_XS61 0x02 +#define XSA6_XS60 0x01 + +#define XSA7_XS77 0x80 +#define XSA7_XS76 0x40 +#define XSA7_XS75 0x20 +#define XSA7_XS74 0x10 +#define XSA7_XS73 0x08 +#define XSA7_XS72 0x04 +#define XSA7_XS71 0x02 +#define XSA7_XS70 0x01 + +#define XSA8_XS87 0x80 +#define XSA8_XS86 0x40 +#define XSA8_XS85 0x20 +#define XSA8_XS84 0x10 +#define XSA8_XS83 0x08 +#define XSA8_XS82 0x04 +#define XSA8_XS81 0x02 +#define XSA8_XS80 0x01 + + +/* XDL1-3 (Transmit DL-Bit Register1-3 (read/write)) + ----------------------- T1 --------------------- */ + +#define XDL1_XDL17 0x80 +#define XDL1_XDL16 0x40 +#define XDL1_XDL15 0x20 +#define XDL1_XDL14 0x10 +#define XDL1_XDL13 0x08 +#define XDL1_XDL12 0x04 +#define XDL1_XDL11 0x02 +#define XDL1_XDL10 0x01 + +#define XDL2_XDL27 0x80 +#define XDL2_XDL26 0x40 +#define XDL2_XDL25 0x20 +#define XDL2_XDL24 0x10 +#define XDL2_XDL23 0x08 +#define XDL2_XDL22 0x04 +#define XDL2_XDL21 0x02 +#define XDL2_XDL20 0x01 + +#define XDL3_XDL37 0x80 +#define XDL3_XDL36 0x40 +#define XDL3_XDL35 0x20 +#define XDL3_XDL34 0x10 +#define XDL3_XDL33 0x08 +#define XDL3_XDL32 0x04 +#define XDL3_XDL31 0x02 +#define XDL3_XDL30 0x01 + + +/* ICB1-4 (Idle Channel Register 1-4) + ------------------ E1 ---------------------------- */ + +#define E1_ICB1_IC0 0x80 +#define E1_ICB1_IC1 0x40 +#define E1_ICB1_IC2 0x20 +#define E1_ICB1_IC3 0x10 +#define E1_ICB1_IC4 0x08 +#define E1_ICB1_IC5 0x04 +#define E1_ICB1_IC6 0x02 +#define E1_ICB1_IC7 0x01 + +#define E1_ICB2_IC8 0x80 +#define E1_ICB2_IC9 0x40 +#define E1_ICB2_IC10 0x20 +#define E1_ICB2_IC11 0x10 +#define E1_ICB2_IC12 0x08 +#define E1_ICB2_IC13 0x04 +#define E1_ICB2_IC14 0x02 +#define E1_ICB2_IC15 0x01 + +#define E1_ICB3_IC16 0x80 +#define E1_ICB3_IC17 0x40 +#define E1_ICB3_IC18 0x20 +#define E1_ICB3_IC19 0x10 +#define E1_ICB3_IC20 0x08 +#define E1_ICB3_IC21 0x04 +#define E1_ICB3_IC22 0x02 +#define E1_ICB3_IC23 0x01 + +#define E1_ICB4_IC24 0x80 +#define E1_ICB4_IC25 0x40 +#define E1_ICB4_IC26 0x20 +#define E1_ICB4_IC27 0x10 +#define E1_ICB4_IC28 0x08 +#define E1_ICB4_IC29 0x04 +#define E1_ICB4_IC30 0x02 +#define E1_ICB4_IC31 0x01 + +/* ICB1-4 (Idle Channel Register 1-4) + ------------------ T1 ---------------------------- */ + +#define T1_ICB1_IC1 0x80 +#define T1_ICB1_IC2 0x40 +#define T1_ICB1_IC3 0x20 +#define T1_ICB1_IC4 0x10 +#define T1_ICB1_IC5 0x08 +#define T1_ICB1_IC6 0x04 +#define T1_ICB1_IC7 0x02 +#define T1_ICB1_IC8 0x01 + +#define T1_ICB2_IC9 0x80 +#define T1_ICB2_IC10 0x40 +#define T1_ICB2_IC11 0x20 +#define T1_ICB2_IC12 0x10 +#define T1_ICB2_IC13 0x08 +#define T1_ICB2_IC14 0x04 +#define T1_ICB2_IC15 0x02 +#define T1_ICB2_IC16 0x01 + +#define T1_ICB3_IC17 0x80 +#define T1_ICB3_IC18 0x40 +#define T1_ICB3_IC19 0x20 +#define T1_ICB3_IC20 0x10 +#define T1_ICB3_IC21 0x08 +#define T1_ICB3_IC22 0x04 +#define T1_ICB3_IC23 0x02 +#define T1_ICB3_IC24 0x01 + +/* FMR3 (Framer Mode Register 3) + --------------------E1------------------------ */ + +#define FMR3_CMI 0x08 +#define FMR3_SYNSA 0x04 +#define FMR3_CFRZ 0x02 +#define FMR3_EXTIW 0x01 + + + +/* CCB1-3 (Clear Channel Register) + ------------------- T1 ----------------------- */ + +#define CCB1_CH1 0x80 +#define CCB1_CH2 0x40 +#define CCB1_CH3 0x20 +#define CCB1_CH4 0x10 +#define CCB1_CH5 0x08 +#define CCB1_CH6 0x04 +#define CCB1_CH7 0x02 +#define CCB1_CH8 0x01 + +#define CCB2_CH9 0x80 +#define CCB2_CH10 0x40 +#define CCB2_CH11 0x20 +#define CCB2_CH12 0x10 +#define CCB2_CH13 0x08 +#define CCB2_CH14 0x04 +#define CCB2_CH15 0x02 +#define CCB2_CH16 0x01 + +#define CCB3_CH17 0x80 +#define CCB3_CH18 0x40 +#define CCB3_CH19 0x20 +#define CCB3_CH20 0x10 +#define CCB3_CH21 0x08 +#define CCB3_CH22 0x04 +#define CCB3_CH23 0x02 +#define CCB3_CH24 0x01 + + +/* LIM0/1 (Line Interface Mode 0/1) + ------------------- E1 & T1 --------------------------- */ + +#define LIM0_XFB 0x80 +#define LIM0_XDOS 0x40 +#define LIM0_SCL1 0x20 +#define LIM0_SCL0 0x10 +#define LIM0_EQON 0x08 +#define LIM0_ELOS 0x04 +#define LIM0_LL 0x02 +#define LIM0_MAS 0x01 + +#define LIM1_EFSC 0x80 +#define LIM1_RIL2 0x40 +#define LIM1_RIL1 0x20 +#define LIM1_RIL0 0x10 +#define LIM1_DCOC 0x08 +#define LIM1_JATT 0x04 +#define LIM1_RL 0x02 +#define LIM1_DRS 0x01 + + +/* PCDR (Pulse Count Detection Register(Read/Write)) + ------------------ E1 & T1 ------------------------- */ + +#define PCDR_PCD7 0x80 +#define PCDR_PCD6 0x40 +#define PCDR_PCD5 0x20 +#define PCDR_PCD4 0x10 +#define PCDR_PCD3 0x08 +#define PCDR_PCD2 0x04 +#define PCDR_PCD1 0x02 +#define PCDR_PCD0 0x01 + +#define PCRR_PCR7 0x80 +#define PCRR_PCR6 0x40 +#define PCRR_PCR5 0x20 +#define PCRR_PCR4 0x10 +#define PCRR_PCR3 0x08 +#define PCRR_PCR2 0x04 +#define PCRR_PCR1 0x02 +#define PCRR_PCR0 0x01 + + +/* LIM2 (Line Interface Mode 2) + + ------------------ E1 & T1 ---------------------------- */ + +#define LIM2_DJA2 0x20 +#define LIM2_DJA1 0x10 +#define LIM2_LOS2 0x02 +#define LIM2_LOS1 0x01 + +/* LCR1 (Loop Code Register 1) */ + +#define LCR1_EPRM 0x80 +#define LCR1_XPRBS 0x40 + +/* SIC1 (System Interface Control 1) */ +#define SIC1_SRSC 0x80 +#define SIC1_RBS1 0x20 +#define SIC1_RBS0 0x10 +#define SIC1_SXSC 0x08 +#define SIC1_XBS1 0x02 +#define SIC1_XBS0 0x01 + +/* DEC (Disable Error Counter) + ------------------ E1 & T1 ---------------------------- */ + +#define DEC_DCEC3 0x20 +#define DEC_DBEC 0x10 +#define DEC_DCEC1 0x08 +#define DEC_DCEC 0x08 +#define DEC_DEBC 0x04 +#define DEC_DCVC 0x02 +#define DEC_DFEC 0x01 + + +/* FALC Register Bits (Receive Mode) + ---------------------------------------------------------------------------- */ + + +/* FRS0/1 (Framer Receive Status Register 0/1) + ----------------- E1 & T1 ---------------------------------- */ + +#define FRS0_LOS 0x80 +#define FRS0_AIS 0x40 +#define FRS0_LFA 0x20 +#define FRS0_RRA 0x10 +#define FRS0_API 0x08 +#define FRS0_NMF 0x04 +#define FRS0_LMFA 0x02 +#define FRS0_FSRF 0x01 + +#define FRS1_TS16RA 0x40 +#define FRS1_TS16LOS 0x20 +#define FRS1_TS16AIS 0x10 +#define FRS1_TS16LFA 0x08 +#define FRS1_EXZD 0x80 +#define FRS1_LLBDD 0x10 +#define FRS1_LLBAD 0x08 +#define FRS1_XLS 0x02 +#define FRS1_XLO 0x01 +#define FRS1_PDEN 0x40 + +/* FRS2/3 (Framer Receive Status Register 2/3) + ----------------- T1 ---------------------------------- */ + +#define FRS2_ESC2 0x80 +#define FRS2_ESC1 0x40 +#define FRS2_ESC0 0x20 + +#define FRS3_FEH5 0x20 +#define FRS3_FEH4 0x10 +#define FRS3_FEH3 0x08 +#define FRS3_FEH2 0x04 +#define FRS3_FEH1 0x02 +#define FRS3_FEH0 0x01 + + +/* RSW (Receive Service Word Pulseframe) + ----------------- E1 ------------------------------ */ + +#define RSW_RSI 0x80 +#define RSW_RRA 0x20 +#define RSW_RYO 0x10 +#define RSW_RY1 0x08 +#define RSW_RY2 0x04 +#define RSW_RY3 0x02 +#define RSW_RY4 0x01 + + +/* RSP (Receive Spare Bits / Additional Status) + ---------------- E1 ------------------------------- */ + +#define RSP_SI1 0x80 +#define RSP_SI2 0x40 +#define RSP_LLBDD 0x10 +#define RSP_LLBAD 0x08 +#define RSP_RSIF 0x04 +#define RSP_RS13 0x02 +#define RSP_RS15 0x01 + + +/* FECL (Framing Error Counter) + ---------------- E1 & T1 -------------------------- */ + +#define FECL_FE7 0x80 +#define FECL_FE6 0x40 +#define FECL_FE5 0x20 +#define FECL_FE4 0x10 +#define FECL_FE3 0x08 +#define FECL_FE2 0x04 +#define FECL_FE1 0x02 +#define FECL_FE0 0x01 + +#define FECH_FE15 0x80 +#define FECH_FE14 0x40 +#define FECH_FE13 0x20 +#define FECH_FE12 0x10 +#define FECH_FE11 0x08 +#define FECH_FE10 0x04 +#define FECH_FE9 0x02 +#define FECH_FE8 0x01 + + +/* CVCl (Code Violation Counter) + ----------------- E1 ------------------------- */ + +#define CVCL_CV7 0x80 +#define CVCL_CV6 0x40 +#define CVCL_CV5 0x20 +#define CVCL_CV4 0x10 +#define CVCL_CV3 0x08 +#define CVCL_CV2 0x04 +#define CVCL_CV1 0x02 +#define CVCL_CV0 0x01 + +#define CVCH_CV15 0x80 +#define CVCH_CV14 0x40 +#define CVCH_CV13 0x20 +#define CVCH_CV12 0x10 +#define CVCH_CV11 0x08 +#define CVCH_CV10 0x04 +#define CVCH_CV9 0x02 +#define CVCH_CV8 0x01 + + +/* CEC1-3L (CRC Error Counter) + ------------------ E1 ----------------------------- */ + +#define CEC1L_CR7 0x80 +#define CEC1L_CR6 0x40 +#define CEC1L_CR5 0x20 +#define CEC1L_CR4 0x10 +#define CEC1L_CR3 0x08 +#define CEC1L_CR2 0x04 +#define CEC1L_CR1 0x02 +#define CEC1L_CR0 0x01 + +#define CEC1H_CR15 0x80 +#define CEC1H_CR14 0x40 +#define CEC1H_CR13 0x20 +#define CEC1H_CR12 0x10 +#define CEC1H_CR11 0x08 +#define CEC1H_CR10 0x04 +#define CEC1H_CR9 0x02 +#define CEC1H_CR8 0x01 + +#define CEC2L_CR7 0x80 +#define CEC2L_CR6 0x40 +#define CEC2L_CR5 0x20 +#define CEC2L_CR4 0x10 +#define CEC2L_CR3 0x08 +#define CEC2L_CR2 0x04 +#define CEC2L_CR1 0x02 +#define CEC2L_CR0 0x01 + +#define CEC2H_CR15 0x80 +#define CEC2H_CR14 0x40 +#define CEC2H_CR13 0x20 +#define CEC2H_CR12 0x10 +#define CEC2H_CR11 0x08 +#define CEC2H_CR10 0x04 +#define CEC2H_CR9 0x02 +#define CEC2H_CR8 0x01 + +#define CEC3L_CR7 0x80 +#define CEC3L_CR6 0x40 +#define CEC3L_CR5 0x20 +#define CEC3L_CR4 0x10 +#define CEC3L_CR3 0x08 +#define CEC3L_CR2 0x04 +#define CEC3L_CR1 0x02 +#define CEC3L_CR0 0x01 + +#define CEC3H_CR15 0x80 +#define CEC3H_CR14 0x40 +#define CEC3H_CR13 0x20 +#define CEC3H_CR12 0x10 +#define CEC3H_CR11 0x08 +#define CEC3H_CR10 0x04 +#define CEC3H_CR9 0x02 +#define CEC3H_CR8 0x01 + + +/* CECL (CRC Error Counter) + + ------------------ T1 ----------------------------- */ + +#define CECL_CR7 0x80 +#define CECL_CR6 0x40 +#define CECL_CR5 0x20 +#define CECL_CR4 0x10 +#define CECL_CR3 0x08 +#define CECL_CR2 0x04 +#define CECL_CR1 0x02 +#define CECL_CR0 0x01 + +#define CECH_CR15 0x80 +#define CECH_CR14 0x40 +#define CECH_CR13 0x20 +#define CECH_CR12 0x10 +#define CECH_CR11 0x08 +#define CECH_CR10 0x04 +#define CECH_CR9 0x02 +#define CECH_CR8 0x01 + +/* EBCL (E Bit Error Counter) + ------------------- E1 & T1 ------------------------- */ + +#define EBCL_EB7 0x80 +#define EBCL_EB6 0x40 +#define EBCL_EB5 0x20 +#define EBCL_EB4 0x10 +#define EBCL_EB3 0x08 +#define EBCL_EB2 0x04 +#define EBCL_EB1 0x02 +#define EBCL_EB0 0x01 + +#define EBCH_EB15 0x80 +#define EBCH_EB14 0x40 +#define EBCH_EB13 0x20 +#define EBCH_EB12 0x10 +#define EBCH_EB11 0x08 +#define EBCH_EB10 0x04 +#define EBCH_EB9 0x02 +#define EBCH_EB8 0x01 + + +/* RSA4-8 (Receive Sa4-8-Bit Register) + -------------------- E1 --------------------------- */ + +#define RSA4_RS47 0x80 +#define RSA4_RS46 0x40 +#define RSA4_RS45 0x20 +#define RSA4_RS44 0x10 +#define RSA4_RS43 0x08 +#define RSA4_RS42 0x04 +#define RSA4_RS41 0x02 +#define RSA4_RS40 0x01 + +#define RSA5_RS57 0x80 +#define RSA5_RS56 0x40 +#define RSA5_RS55 0x20 +#define RSA5_RS54 0x10 +#define RSA5_RS53 0x08 +#define RSA5_RS52 0x04 +#define RSA5_RS51 0x02 +#define RSA5_RS50 0x01 + +#define RSA6_RS67 0x80 +#define RSA6_RS66 0x40 +#define RSA6_RS65 0x20 +#define RSA6_RS64 0x10 +#define RSA6_RS63 0x08 +#define RSA6_RS62 0x04 +#define RSA6_RS61 0x02 +#define RSA6_RS60 0x01 + +#define RSA7_RS77 0x80 +#define RSA7_RS76 0x40 +#define RSA7_RS75 0x20 +#define RSA7_RS74 0x10 +#define RSA7_RS73 0x08 +#define RSA7_RS72 0x04 +#define RSA7_RS71 0x02 +#define RSA7_RS70 0x01 + +#define RSA8_RS87 0x80 +#define RSA8_RS86 0x40 +#define RSA8_RS85 0x20 +#define RSA8_RS84 0x10 +#define RSA8_RS83 0x08 +#define RSA8_RS82 0x04 +#define RSA8_RS81 0x02 +#define RSA8_RS80 0x01 + +/* RSA6S (Receive Sa6 Bit Status Register) + ------------------------ T1 ------------------------- */ + +#define RSA6S_SX 0x20 +#define RSA6S_SF 0x10 +#define RSA6S_SE 0x08 +#define RSA6S_SC 0x04 +#define RSA6S_SA 0x02 +#define RSA6S_S8 0x01 + + +/* RDL1-3 Receive DL-Bit Register1-3) + ------------------------ T1 ------------------------- */ + +#define RDL1_RDL17 0x80 +#define RDL1_RDL16 0x40 +#define RDL1_RDL15 0x20 +#define RDL1_RDL14 0x10 +#define RDL1_RDL13 0x08 +#define RDL1_RDL12 0x04 +#define RDL1_RDL11 0x02 +#define RDL1_RDL10 0x01 + +#define RDL2_RDL27 0x80 +#define RDL2_RDL26 0x40 +#define RDL2_RDL25 0x20 +#define RDL2_RDL24 0x10 +#define RDL2_RDL23 0x08 +#define RDL2_RDL22 0x04 +#define RDL2_RDL21 0x02 +#define RDL2_RDL20 0x01 + +#define RDL3_RDL37 0x80 +#define RDL3_RDL36 0x40 +#define RDL3_RDL35 0x20 +#define RDL3_RDL34 0x10 +#define RDL3_RDL33 0x08 +#define RDL3_RDL32 0x04 +#define RDL3_RDL31 0x02 +#define RDL3_RDL30 0x01 + + +/* SIS (Signaling Status Register) + + -------------------- E1 & T1 -------------------------- */ + +#define SIS_XDOV 0x80 +#define SIS_XFW 0x40 +#define SIS_XREP 0x20 +#define SIS_RLI 0x08 +#define SIS_CEC 0x04 +#define SIS_BOM 0x01 + + +/* RSIS (Receive Signaling Status Register) + + -------------------- E1 & T1 --------------------------- */ + +#define RSIS_VFR 0x80 +#define RSIS_RDO 0x40 +#define RSIS_CRC16 0x20 +#define RSIS_RAB 0x10 +#define RSIS_HA1 0x08 +#define RSIS_HA0 0x04 +#define RSIS_HFR 0x02 +#define RSIS_LA 0x01 + + +/* RBCL/H (Receive Byte Count Low/High) + + ------------------- E1 & T1 ----------------------- */ + +#define RBCL_RBC7 0x80 +#define RBCL_RBC6 0x40 +#define RBCL_RBC5 0x20 +#define RBCL_RBC4 0x10 +#define RBCL_RBC3 0x08 +#define RBCL_RBC2 0x04 +#define RBCL_RBC1 0x02 +#define RBCL_RBC0 0x01 + +#define RBCH_OV 0x10 +#define RBCH_RBC11 0x08 +#define RBCH_RBC10 0x04 +#define RBCH_RBC9 0x02 +#define RBCH_RBC8 0x01 + + +/* ISR1-3 (Interrupt Status Register 1-3) + + ------------------ E1 & T1 ------------------------------ */ + +#define FISR0_RME 0x80 +#define FISR0_RFS 0x40 +#define FISR0_T8MS 0x20 +#define FISR0_ISF 0x20 +#define FISR0_RMB 0x10 +#define FISR0_CASC 0x08 +#define FISR0_RSC 0x08 +#define FISR0_CRC6 0x04 +#define FISR0_CRC4 0x04 +#define FISR0_PDEN 0x02 +#define FISR0_RPF 0x01 + +#define FISR1_CASE 0x80 +#define FISR1_LLBSC 0x80 +#define FISR1_RDO 0x40 +#define FISR1_ALLS 0x20 +#define FISR1_XDU 0x10 +#define FISR1_XMB 0x08 +#define FISR1_XLSC 0x02 +#define FISR1_XPR 0x01 + +#define FISR2_FAR 0x80 +#define FISR2_LFA 0x40 +#define FISR2_MFAR 0x20 +#define FISR2_T400MS 0x10 +#define FISR2_LMFA 0x10 +#define FISR2_AIS 0x08 +#define FISR2_LOS 0x04 +#define FISR2_RAR 0x02 +#define FISR2_RA 0x01 + +#define FISR3_ES 0x80 +#define FISR3_SEC 0x40 +#define FISR3_LMFA16 0x20 +#define FISR3_AIS16 0x10 +#define FISR3_RA16 0x08 +#define FISR3_API 0x04 +#define FISR3_XSLP 0x20 +#define FISR3_XSLN 0x10 +#define FISR3_LLBSC 0x08 +#define FISR3_XRS 0x04 +#define FISR3_SLN 0x02 +#define FISR3_SLP 0x01 + + +/* GIS (Global Interrupt Status Register) + + --------------------- E1 & T1 --------------------- */ + +#define GIS_ISR3 0x08 +#define GIS_ISR2 0x04 +#define GIS_ISR1 0x02 +#define GIS_ISR0 0x01 + + +/* VSTR (Version Status Register) + + --------------------- E1 & T1 --------------------- */ + +#define VSTR_VN3 0x08 +#define VSTR_VN2 0x04 +#define VSTR_VN1 0x02 +#define VSTR_VN0 0x01 + + +/*>>>>>>>>>>>>>>>>>>>>> Local Control Structures <<<<<<<<<<<<<<<<<<<<<<<<< */ + +/* Write-only Registers (E1/T1 control mode write registers) */ +#define XFIFOH 0x00 /* Tx FIFO High Byte */ +#define XFIFOL 0x01 /* Tx FIFO Low Byte */ +#define CMDR 0x02 /* Command Reg */ +#define DEC 0x60 /* Disable Error Counter */ +#define TEST2 0x62 /* Manuf. Test Reg 2 */ +#define XS(nbr) (0x70 + (nbr)) /* Tx CAS Reg (0 to 15) */ + +/* Read-write Registers (E1/T1 status mode read registers) */ +#define MODE 0x03 /* Mode Reg */ +#define RAH1 0x04 /* Receive Address High 1 */ +#define RAH2 0x05 /* Receive Address High 2 */ +#define RAL1 0x06 /* Receive Address Low 1 */ +#define RAL2 0x07 /* Receive Address Low 2 */ +#define IPC 0x08 /* Interrupt Port Configuration */ +#define CCR1 0x09 /* Common Configuration Reg 1 */ +#define CCR3 0x0A /* Common Configuration Reg 3 */ +#define PRE 0x0B /* Preamble Reg */ +#define RTR1 0x0C /* Receive Timeslot Reg 1 */ +#define RTR2 0x0D /* Receive Timeslot Reg 2 */ +#define RTR3 0x0E /* Receive Timeslot Reg 3 */ +#define RTR4 0x0F /* Receive Timeslot Reg 4 */ +#define TTR1 0x10 /* Transmit Timeslot Reg 1 */ +#define TTR2 0x11 /* Transmit Timeslot Reg 2 */ +#define TTR3 0x12 /* Transmit Timeslot Reg 3 */ +#define TTR4 0x13 /* Transmit Timeslot Reg 4 */ +#define IMR0 0x14 /* Interrupt Mask Reg 0 */ +#define IMR1 0x15 /* Interrupt Mask Reg 1 */ +#define IMR2 0x16 /* Interrupt Mask Reg 2 */ +#define IMR3 0x17 /* Interrupt Mask Reg 3 */ +#define IMR4 0x18 /* Interrupt Mask Reg 4 */ +#define IMR5 0x19 /* Interrupt Mask Reg 5 */ +#define FMR0 0x1A /* Framer Mode Reigster 0 */ +#define FMR1 0x1B /* Framer Mode Reigster 1 */ +#define FMR2 0x1C /* Framer Mode Reigster 2 */ +#define LOOP 0x1D /* Channel Loop Back */ +#define XSW 0x1E /* Transmit Service Word */ +#define FMR4 0x1E /* Framer Mode Reg 4 */ +#define XSP 0x1F /* Transmit Spare Bits */ +#define FMR5 0x1F /* Framer Mode Reg 5 */ +#define XC0 0x20 /* Transmit Control 0 */ +#define XC1 0x21 /* Transmit Control 1 */ +#define RC0 0x22 /* Receive Control 0 */ +#define RC1 0x23 /* Receive Control 1 */ +#define XPM0 0x24 /* Transmit Pulse Mask 0 */ +#define XPM1 0x25 /* Transmit Pulse Mask 1 */ +#define XPM2 0x26 /* Transmit Pulse Mask 2 */ +#define TSWM 0x27 /* Transparent Service Word Mask */ +#define TEST1 0x28 /* Manuf. Test Reg 1 */ +#define IDLE 0x29 /* Idle Channel Code */ +#define XSA4 0x2A /* Transmit SA4 Bit Reg */ +#define XDL1 0x2A /* Transmit DL-Bit Reg 2 */ +#define XSA5 0x2B /* Transmit SA4 Bit Reg */ +#define XDL2 0x2B /* Transmit DL-Bit Reg 2 */ +#define XSA6 0x2C /* Transmit SA4 Bit Reg */ +#define XDL3 0x2C /* Transmit DL-Bit Reg 2 */ +#define XSA7 0x2D /* Transmit SA4 Bit Reg */ +#define CCB1 0x2D /* Clear Channel Reg 1 */ +#define XSA8 0x2E /* Transmit SA4 Bit Reg */ +#define CCB2 0x2E /* Clear Channel Reg 2 */ +#define FMR3 0x2F /* Framer Mode Reg. 3 */ +#define CCB3 0x2F /* Clear Channel Reg 3 */ +#define ICB1 0x30 /* Idle Channel Reg 1 */ +#define ICB2 0x31 /* Idle Channel Reg 2 */ +#define ICB3 0x32 /* Idle Channel Reg 3 */ +#define ICB4 0x33 /* Idle Channel Reg 4 */ +#define LIM0 0x34 /* Line Interface Mode 0 */ +#define LIM1 0x35 /* Line Interface Mode 1 */ +#define PCDR 0x36 /* Pulse Count Detection */ +#define PCRR 0x37 /* Pulse Count Recovery */ +#define LIM2 0x38 /* Line Interface Mode Reg 2 */ +#define LCR1 0x39 /* Loop Code Reg 1 */ +#define LCR2 0x3A /* Loop Code Reg 2 */ +#define LCR3 0x3B /* Loop Code Reg 3 */ +#define SIC1 0x3C /* System Interface Control 1 */ + +/* Read-only Registers (E1/T1 control mode read registers) */ +#define RFIFOH 0x00 /* Receive FIFO */ +#define RFIFOL 0x01 /* Receive FIFO */ +#define FRS0 0x4C /* Framer Receive Status 0 */ +#define FRS1 0x4D /* Framer Receive Status 1 */ +#define RSW 0x4E /* Receive Service Word */ +#define FRS2 0x4E /* Framer Receive Status 2 */ +#define RSP 0x4F /* Receive Spare Bits */ +#define FRS3 0x4F /* Framer Receive Status 3 */ +#define FECL 0x50 /* Framing Error Counter */ +#define FECH 0x51 /* Framing Error Counter */ +#define CVCL 0x52 /* Code Violation Counter */ +#define CVCH 0x53 /* Code Violation Counter */ +#define CECL 0x54 /* CRC Error Counter 1 */ +#define CECH 0x55 /* CRC Error Counter 1 */ +#define EBCL 0x56 /* E-Bit Error Counter */ +#define EBCH 0x57 /* E-Bit Error Counter */ +#define BECL 0x58 /* Bit Error Counter Low */ +#define BECH 0x59 /* Bit Error Counter Low */ +#define CEC3 0x5A /* CRC Error Counter 3 (16-bit) */ +#define RSA4 0x5C /* Receive SA4 Bit Reg */ +#define RDL1 0x5C /* Receive DL-Bit Reg 1 */ +#define RSA5 0x5D /* Receive SA5 Bit Reg */ +#define RDL2 0x5D /* Receive DL-Bit Reg 2 */ +#define RSA6 0x5E /* Receive SA6 Bit Reg */ +#define RDL3 0x5E /* Receive DL-Bit Reg 3 */ +#define RSA7 0x5F /* Receive SA7 Bit Reg */ +#define RSA8 0x60 /* Receive SA8 Bit Reg */ +#define RSA6S 0x61 /* Receive SA6 Bit Status Reg */ +#define TSR0 0x62 /* Manuf. Test Reg 0 */ +#define TSR1 0x63 /* Manuf. Test Reg 1 */ +#define SIS 0x64 /* Signaling Status Reg */ +#define RSIS 0x65 /* Receive Signaling Status Reg */ +#define RBCL 0x66 /* Receive Byte Control */ +#define RBCH 0x67 /* Receive Byte Control */ +#define FISR0 0x68 /* Interrupt Status Reg 0 */ +#define FISR1 0x69 /* Interrupt Status Reg 1 */ +#define FISR2 0x6A /* Interrupt Status Reg 2 */ +#define FISR3 0x6B /* Interrupt Status Reg 3 */ +#define GIS 0x6E /* Global Interrupt Status */ +#define VSTR 0x6F /* Version Status */ +#define RS(nbr) (0x70 + (nbr)) /* Rx CAS Reg (0 to 15) */ + +#endif /* _FALC_LH_H */ + diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/net/wan/pc300.h linux.21rc1-ac1/drivers/net/wan/pc300.h --- linux.21rc1/drivers/net/wan/pc300.h 1970-01-01 01:00:00.000000000 +0100 +++ linux.21rc1-ac1/drivers/net/wan/pc300.h 2003-04-22 19:20:12.000000000 +0100 @@ -0,0 +1,428 @@ +/* + * pc300.h Cyclades-PC300(tm) Kernel API Definitions. + * + * Author: Ivan Passos + * + * Copyright: (c) 1999-2002 Cyclades Corp. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + * + */ + +#ifndef _PC300_H +#define _PC300_H + +#ifndef __HDLC_IOCTL_H__ +#include +#endif + +#ifndef __HDLC_H +#include +#endif + +#ifndef _HD64572_H +#include "hd64572.h" +#endif +#ifndef _FALC_LH_H +#include "pc300-falc-lh.h" +#endif + +#ifndef CY_TYPES +#define CY_TYPES +#if defined(__alpha__) +typedef unsigned long ucdouble; /* 64 bits, unsigned */ +typedef unsigned int uclong; /* 32 bits, unsigned */ +#else +typedef unsigned long uclong; /* 32 bits, unsigned */ +#endif +typedef unsigned short ucshort; /* 16 bits, unsigned */ +typedef unsigned char ucchar; /* 8 bits, unsigned */ +#endif /* CY_TYPES */ + +#define PC300_PROTO_MLPPP 1 + +#define PC300_KERNEL "2.4.x" /* Kernel supported by this driver */ + +#define PC300_DEVNAME "hdlc" /* Dev. name base (for hdlc0, hdlc1, etc.) */ +#define PC300_MAXINDEX 100 /* Max dev. name index (the '0' in hdlc0) */ + +#define PC300_MAXCARDS 4 /* Max number of cards per system */ +#define PC300_MAXCHAN 2 /* Number of channels per card */ + +#define PC300_PLX_WIN 0x80 /* PLX control window size (128b) */ +#define PC300_RAMSIZE 0x40000 /* RAM window size (256Kb) */ +#define PC300_SCASIZE 0x400 /* SCA window size (1Kb) */ +#define PC300_FALCSIZE 0x400 /* FALC window size (1Kb) */ + +#define PC300_OSC_CLOCK 24576000 +#define PC300_PCI_CLOCK 33000000 + +#define BD_DEF_LEN 0x0800 /* DMA buffer length (2KB) */ +#define DMA_TX_MEMSZ 0x8000 /* Total DMA Tx memory size (32KB/ch) */ +#define DMA_RX_MEMSZ 0x10000 /* Total DMA Rx memory size (64KB/ch) */ + +#define N_DMA_TX_BUF (DMA_TX_MEMSZ / BD_DEF_LEN) /* DMA Tx buffers */ +#define N_DMA_RX_BUF (DMA_RX_MEMSZ / BD_DEF_LEN) /* DMA Rx buffers */ + +/* DMA Buffer Offsets */ +#define DMA_TX_BASE ((N_DMA_TX_BUF + N_DMA_RX_BUF) * \ + PC300_MAXCHAN * sizeof(pcsca_bd_t)) +#define DMA_RX_BASE (DMA_TX_BASE + PC300_MAXCHAN*DMA_TX_MEMSZ) + +/* DMA Descriptor Offsets */ +#define DMA_TX_BD_BASE 0x0000 +#define DMA_RX_BD_BASE (DMA_TX_BD_BASE + ((PC300_MAXCHAN*DMA_TX_MEMSZ / \ + BD_DEF_LEN) * sizeof(pcsca_bd_t))) + +/* DMA Descriptor Macros */ +#define TX_BD_ADDR(chan, n) (DMA_TX_BD_BASE + \ + ((N_DMA_TX_BUF*chan) + n) * sizeof(pcsca_bd_t)) +#define RX_BD_ADDR(chan, n) (DMA_RX_BD_BASE + \ + ((N_DMA_RX_BUF*chan) + n) * sizeof(pcsca_bd_t)) + +/* Macro to access the FALC registers (TE only) */ +#define F_REG(reg, chan) (0x200*(chan) + ((reg)<<2)) + +/*************************************** + * Memory access functions/macros * + * (required to support Alpha systems) * + ***************************************/ +#ifdef __KERNEL__ +#define cpc_writeb(port,val) {writeb((ucchar)(val),(ulong)(port)); mb();} +#define cpc_writew(port,val) {writew((ushort)(val),(ulong)(port)); mb();} +#define cpc_writel(port,val) {writel((uclong)(val),(ulong)(port)); mb();} + +#define cpc_readb(port) readb(port) +#define cpc_readw(port) readw(port) +#define cpc_readl(port) readl(port) + +#else /* __KERNEL__ */ +#define cpc_writeb(port,val) (*(volatile ucchar *)(port) = (ucchar)(val)) +#define cpc_writew(port,val) (*(volatile ucshort *)(port) = (ucshort)(val)) +#define cpc_writel(port,val) (*(volatile uclong *)(port) = (uclong)(val)) + +#define cpc_readb(port) (*(volatile ucchar *)(port)) +#define cpc_readw(port) (*(volatile ucshort *)(port)) +#define cpc_readl(port) (*(volatile uclong *)(port)) + +#endif /* __KERNEL__ */ + +/****** Data Structures *****************************************************/ + +/* + * RUNTIME_9050 - PLX PCI9050-1 local configuration and shared runtime + * registers. This structure can be used to access the 9050 registers + * (memory mapped). + */ +struct RUNTIME_9050 { + uclong loc_addr_range[4]; /* 00-0Ch : Local Address Ranges */ + uclong loc_rom_range; /* 10h : Local ROM Range */ + uclong loc_addr_base[4]; /* 14-20h : Local Address Base Addrs */ + uclong loc_rom_base; /* 24h : Local ROM Base */ + uclong loc_bus_descr[4]; /* 28-34h : Local Bus Descriptors */ + uclong rom_bus_descr; /* 38h : ROM Bus Descriptor */ + uclong cs_base[4]; /* 3C-48h : Chip Select Base Addrs */ + uclong intr_ctrl_stat; /* 4Ch : Interrupt Control/Status */ + uclong init_ctrl; /* 50h : EEPROM ctrl, Init Ctrl, etc */ +}; + +#define PLX_9050_LINT1_ENABLE 0x01 +#define PLX_9050_LINT1_POL 0x02 +#define PLX_9050_LINT1_STATUS 0x04 +#define PLX_9050_LINT2_ENABLE 0x08 +#define PLX_9050_LINT2_POL 0x10 +#define PLX_9050_LINT2_STATUS 0x20 +#define PLX_9050_INTR_ENABLE 0x40 +#define PLX_9050_SW_INTR 0x80 + +/* Masks to access the init_ctrl PLX register */ +#define PC300_CLKSEL_MASK (0x00000004UL) +#define PC300_CHMEDIA_MASK(chan) (0x00000020UL<<(chan*3)) +#define PC300_CTYPE_MASK (0x00000800UL) + +/* CPLD Registers (base addr = falcbase, TE only) */ +/* CPLD v. 0 */ +#define CPLD_REG1 0x140 /* Chip resets, DCD/CTS status */ +#define CPLD_REG2 0x144 /* Clock enable , LED control */ +/* CPLD v. 2 or higher */ +#define CPLD_V2_REG1 0x100 /* Chip resets, DCD/CTS status */ +#define CPLD_V2_REG2 0x104 /* Clock enable , LED control */ +#define CPLD_ID_REG 0x108 /* CPLD version */ + +/* CPLD Register bit description: for the FALC bits, they should always be + set based on the channel (use (bit<<(2*ch)) to access the correct bit for + that channel) */ +#define CPLD_REG1_FALC_RESET 0x01 +#define CPLD_REG1_SCA_RESET 0x02 +#define CPLD_REG1_GLOBAL_CLK 0x08 +#define CPLD_REG1_FALC_DCD 0x10 +#define CPLD_REG1_FALC_CTS 0x20 + +#define CPLD_REG2_FALC_TX_CLK 0x01 +#define CPLD_REG2_FALC_RX_CLK 0x02 +#define CPLD_REG2_FALC_LED1 0x10 +#define CPLD_REG2_FALC_LED2 0x20 + +/* Structure with FALC-related fields (TE only) */ +#define PC300_FALC_MAXLOOP 0x0000ffff /* for falc_issue_cmd() */ + +typedef struct falc { + ucchar sync; /* If true FALC is synchronized */ + ucchar active; /* if TRUE then already active */ + ucchar loop_active; /* if TRUE a line loopback UP was received */ + ucchar loop_gen; /* if TRUE a line loopback UP was issued */ + + ucchar num_channels; + ucchar offset; /* 1 for T1, 0 for E1 */ + ucchar full_bandwidth; + + ucchar xmb_cause; + ucchar multiframe_mode; + + /* Statistics */ + ucshort pden; /* Pulse Density violation count */ + ucshort los; /* Loss of Signal count */ + ucshort losr; /* Loss of Signal recovery count */ + ucshort lfa; /* Loss of frame alignment count */ + ucshort farec; /* Frame Alignment Recovery count */ + ucshort lmfa; /* Loss of multiframe alignment count */ + ucshort ais; /* Remote Alarm indication Signal count */ + ucshort sec; /* One-second timer */ + ucshort es; /* Errored second */ + ucshort rai; /* remote alarm received */ + ucshort bec; + ucshort fec; + ucshort cvc; + ucshort cec; + ucshort ebc; + + /* Status */ + ucchar red_alarm; + ucchar blue_alarm; + ucchar loss_fa; + ucchar yellow_alarm; + ucchar loss_mfa; + ucchar prbs; +} falc_t; + +typedef struct falc_status { + ucchar sync; /* If true FALC is synchronized */ + ucchar red_alarm; + ucchar blue_alarm; + ucchar loss_fa; + ucchar yellow_alarm; + ucchar loss_mfa; + ucchar prbs; +} falc_status_t; + +typedef struct rsv_x21_status { + ucchar dcd; + ucchar dsr; + ucchar cts; + ucchar rts; + ucchar dtr; +} rsv_x21_status_t; + +typedef struct pc300stats { + int hw_type; + uclong line_on; + uclong line_off; + struct net_device_stats gen_stats; + falc_t te_stats; +} pc300stats_t; + +typedef struct pc300status { + int hw_type; + rsv_x21_status_t gen_status; + falc_status_t te_status; +} pc300status_t; + +typedef struct pc300loopback { + char loop_type; + char loop_on; +} pc300loopback_t; + +typedef struct pc300patterntst { + char patrntst_on; /* 0 - off; 1 - on; 2 - read num_errors */ + ucshort num_errors; +} pc300patterntst_t; + +typedef struct pc300dev { + void *if_ptr; /* General purpose pointer */ + struct pc300ch *chan; + ucchar trace_on; + uclong line_on; /* DCD(X.21, RSV) / sync(TE) change counters */ + uclong line_off; +#ifdef __KERNEL__ + char name[16]; + hdlc_device *hdlc; + + void *private; + struct sk_buff *tx_skb; + union { /* This union has all the protocol-specific structures */ + struct ppp_device pppdev; + }ifu; +#ifdef CONFIG_PC300_MLPPP + void *cpc_tty; /* information to PC300 TTY driver */ +#endif +#endif /* __KERNEL__ */ +}pc300dev_t; + +typedef struct pc300hw { + int type; /* RSV, X21, etc. */ + int bus; /* Bus (PCI, PMC, etc.) */ + int nchan; /* number of channels */ + int irq; /* interrupt request level */ + uclong clock; /* Board clock */ + ucchar cpld_id; /* CPLD ID (TE only) */ + ucshort cpld_reg1; /* CPLD reg 1 (TE only) */ + ucshort cpld_reg2; /* CPLD reg 2 (TE only) */ + ucshort gpioc_reg; /* PLX GPIOC reg */ + ucshort intctl_reg; /* PLX Int Ctrl/Status reg */ + uclong iophys; /* PLX registers I/O base */ + uclong iosize; /* PLX registers I/O size */ + uclong plxphys; /* PLX registers MMIO base (physical) */ + uclong plxbase; /* PLX registers MMIO base (virtual) */ + uclong plxsize; /* PLX registers MMIO size */ + uclong scaphys; /* SCA registers MMIO base (physical) */ + uclong scabase; /* SCA registers MMIO base (virtual) */ + uclong scasize; /* SCA registers MMIO size */ + uclong ramphys; /* On-board RAM MMIO base (physical) */ + uclong rambase; /* On-board RAM MMIO base (virtual) */ + uclong alloc_ramsize; /* RAM MMIO size allocated by the PCI bridge */ + uclong ramsize; /* On-board RAM MMIO size */ + uclong falcphys; /* FALC registers MMIO base (physical) */ + uclong falcbase; /* FALC registers MMIO base (virtual) */ + uclong falcsize; /* FALC registers MMIO size */ +} pc300hw_t; + +typedef struct pc300chconf { + sync_serial_settings phys_settings; /* Clock type/rate (in bps), + loopback mode */ + raw_hdlc_proto proto_settings; /* Encoding, parity (CRC) */ + uclong media; /* HW media (RS232, V.35, etc.) */ + uclong proto; /* Protocol (PPP, X.25, etc.) */ + ucchar monitor; /* Monitor mode (0 = off, !0 = on) */ + + /* TE-specific parameters */ + ucchar lcode; /* Line Code (AMI, B8ZS, etc.) */ + ucchar fr_mode; /* Frame Mode (ESF, D4, etc.) */ + ucchar lbo; /* Line Build Out */ + ucchar rx_sens; /* Rx Sensitivity (long- or short-haul) */ + uclong tslot_bitmap; /* bit[i]=1 => timeslot _i_ is active */ +} pc300chconf_t; + +typedef struct pc300ch { + struct pc300 *card; + int channel; + pc300dev_t d; + pc300chconf_t conf; + ucchar tx_first_bd; /* First TX DMA block descr. w/ data */ + ucchar tx_next_bd; /* Next free TX DMA block descriptor */ + ucchar rx_first_bd; /* First free RX DMA block descriptor */ + ucchar rx_last_bd; /* Last free RX DMA block descriptor */ + ucchar nfree_tx_bd; /* Number of free TX DMA block descriptors */ + falc_t falc; /* FALC structure (TE only) */ +} pc300ch_t; + +typedef struct pc300 { + pc300hw_t hw; /* hardware config. */ + pc300ch_t chan[PC300_MAXCHAN]; +#ifdef __KERNEL__ + spinlock_t card_lock; +#endif /* __KERNEL__ */ +} pc300_t; + +typedef struct pc300conf { + pc300hw_t hw; + pc300chconf_t conf; +} pc300conf_t; + +/* DEV ioctl() commands */ +#define N_SPPP_IOCTLS 2 + +enum pc300_ioctl_cmds { + SIOCCPCRESERVED = (SIOCDEVPRIVATE + N_SPPP_IOCTLS), + SIOCGPC300CONF, + SIOCSPC300CONF, + SIOCGPC300STATUS, + SIOCGPC300FALCSTATUS, + SIOCGPC300UTILSTATS, + SIOCGPC300UTILSTATUS, + SIOCSPC300TRACE, + SIOCSPC300LOOPBACK, + SIOCSPC300PATTERNTEST, +}; + +/* Loopback types - PC300/TE boards */ +enum pc300_loopback_cmds { + PC300LOCLOOP = 1, + PC300REMLOOP, + PC300PAYLOADLOOP, + PC300GENLOOPUP, + PC300GENLOOPDOWN, +}; + +/* Control Constant Definitions */ +#define PC300_RSV 0x01 +#define PC300_X21 0x02 +#define PC300_TE 0x03 + +#define PC300_PCI 0x00 +#define PC300_PMC 0x01 + +#define PC300_LC_AMI 0x01 +#define PC300_LC_B8ZS 0x02 +#define PC300_LC_NRZ 0x03 +#define PC300_LC_HDB3 0x04 + +/* Framing (T1) */ +#define PC300_FR_ESF 0x01 +#define PC300_FR_D4 0x02 +#define PC300_FR_ESF_JAPAN 0x03 + +/* Framing (E1) */ +#define PC300_FR_MF_CRC4 0x04 +#define PC300_FR_MF_NON_CRC4 0x05 +#define PC300_FR_UNFRAMED 0x06 + +#define PC300_LBO_0_DB 0x00 +#define PC300_LBO_7_5_DB 0x01 +#define PC300_LBO_15_DB 0x02 +#define PC300_LBO_22_5_DB 0x03 + +#define PC300_RX_SENS_SH 0x01 +#define PC300_RX_SENS_LH 0x02 + +#define PC300_TX_TIMEOUT (2*HZ) +#define PC300_TX_QUEUE_LEN 100 +#define PC300_DEF_MTU 1600 + +#ifdef __KERNEL__ +/* Function Prototypes */ +int dma_buf_write(pc300_t *, int, ucchar *, int); +int dma_buf_read(pc300_t *, int, struct sk_buff *); +void tx_dma_start(pc300_t *, int); +void rx_dma_start(pc300_t *, int); +void tx_dma_stop(pc300_t *, int); +void rx_dma_stop(pc300_t *, int); +int cpc_queue_xmit(struct sk_buff *, struct net_device *); +void cpc_net_rx(hdlc_device *); +void cpc_sca_status(pc300_t *, int); +int cpc_change_mtu(struct net_device *, int); +int cpc_ioctl(struct net_device *, struct ifreq *, int); +int ch_config(pc300dev_t *); +int rx_config(pc300dev_t *); +int tx_config(pc300dev_t *); +void cpc_opench(pc300dev_t *); +void cpc_closech(pc300dev_t *); +int cpc_open(struct net_device *dev); +int cpc_close(struct net_device *dev); +int cpc_set_media(hdlc_device *, int); +#endif /* __KERNEL__ */ + +#endif /* _PC300_H */ + diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/net/wan/pc300_tty.c linux.21rc1-ac1/drivers/net/wan/pc300_tty.c --- linux.21rc1/drivers/net/wan/pc300_tty.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.21rc1-ac1/drivers/net/wan/pc300_tty.c 2003-04-22 16:44:37.000000000 +0100 @@ -0,0 +1,1122 @@ +/* + * pc300_tty.c Cyclades-PC300(tm) TTY Driver. + * + * Author: Regina Kodato + * + * Copyright: (c) 1999-2002 Cyclades Corp. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* TTY includes */ +#include +#include +#include + +#include "pc300.h" + +/* defines and macros */ +/* TTY Global definitions */ +#define CPC_TTY_NPORTS 8 /* maximum number of the sync tty connections */ +#define CPC_TTY_MAJOR CYCLADES_MAJOR +#define CPC_TTY_MINOR_START 240 /* minor of the first PC300 interface */ + +#define CPC_TTY_MAX_MTU 2000 + +/* tty interface state */ +#define CPC_TTY_ST_IDLE 0 +#define CPC_TTY_ST_INIT 1 /* configured with MLPPP and up */ +#define CPC_TTY_ST_OPEN 2 /* opened by application */ + +#define CPC_TTY_LOCK(card,flags)\ + do {\ + spin_lock_irqsave(&card->card_lock, flags); \ + } while (0) + +#define CPC_TTY_UNLOCK(card,flags) \ + do {\ + spin_unlock_irqrestore(&card->card_lock, flags); \ + } while (0) + +//#define CPC_TTY_DBG(format,a...) printk(format,##a) +#define CPC_TTY_DBG(format,a...) + +/* data structures */ +typedef struct _st_cpc_rx_buf { + struct _st_cpc_rx_buf *next; + int size; + unsigned char data[1]; +} st_cpc_rx_buf; + +struct st_cpc_rx_list { + st_cpc_rx_buf *first; + st_cpc_rx_buf *last; +}; + +typedef struct _st_cpc_tty_area { + int state; /* state of the TTY interface */ + int num_open; + unsigned int tty_minor; /* minor this interface */ + volatile struct st_cpc_rx_list buf_rx; /* ptr. to reception buffer */ + unsigned char* buf_tx; /* ptr. to transmission buffer */ + pc300dev_t* pc300dev; /* ptr. to info struct in PC300 driver */ + unsigned char name[20]; /* interf. name + "-tty" */ + struct tty_struct *tty; + struct tq_struct tty_tx_task_queue; /* tx task - tx interrupt */ + struct tq_struct tty_rx_task_queue; /* rx task - rx interrupt */ + } st_cpc_tty_area; + +/* TTY data structures */ +static struct tty_struct *cpc_tty_serial_table[CPC_TTY_NPORTS]; +static struct termios *cpc_tty_serial_termios[CPC_TTY_NPORTS]; +static struct termios *cpc_tty_serial_termios_locked[CPC_TTY_NPORTS]; +static struct tty_driver serial_drv, callout_drv; + +/* local variables */ +st_cpc_tty_area cpc_tty_area[CPC_TTY_NPORTS]; + +int cpc_tty_cnt=0; /* number of intrfaces configured with MLPPP */ +int cpc_tty_refcount; +int cpc_tty_unreg_flag = 0; + +/* TTY functions prototype */ +static int cpc_tty_open(struct tty_struct *tty, struct file *flip); +static void cpc_tty_close(struct tty_struct *tty, struct file *flip); +static int cpc_tty_write(struct tty_struct *tty, int from_user, + const unsigned char *buf, int count); +static int cpc_tty_write_room(struct tty_struct *tty); +static int cpc_tty_chars_in_buffer(struct tty_struct *tty); +static int cpc_tty_ioctl(struct tty_struct *tty, struct file *file, + unsigned int cmd, unsigned long arg); +static void cpc_tty_flush_buffer(struct tty_struct *tty); +static void cpc_tty_hangup(struct tty_struct *tty); +static void cpc_tty_rx_task(void *data); +static void cpc_tty_tx_task(void *data); +static int cpc_tty_send_to_card(pc300dev_t *dev,void *buf, int len); +static void cpc_tty_trace(pc300dev_t *dev, char* buf, int len, char rxtx); +static void cpc_tty_dtr_off(pc300dev_t *pc300dev); +static void cpc_tty_dtr_on(pc300dev_t *pc300dev); + +/* functions called by PC300 driver */ +void cpc_tty_init(pc300dev_t *dev); +void cpc_tty_unregister_service(pc300dev_t *pc300dev); +void cpc_tty_receive(pc300dev_t *pc300dev); +void cpc_tty_trigger_poll(pc300dev_t *pc300dev); +void cpc_tty_reset_var(void); + +/* + * PC300 TTY clear DTR signal + */ +static void cpc_tty_dtr_off(pc300dev_t *pc300dev) +{ + pc300ch_t *pc300chan = (pc300ch_t *)pc300dev->chan; + pc300_t *card = (pc300_t *) pc300chan->card; + int ch = pc300chan->channel; + unsigned long flags; + + CPC_TTY_DBG("%s-tty: Clear signal DTR\n", + ((struct net_device*)(pc300dev->hdlc))->name); + CPC_TTY_LOCK(card, flags); + cpc_writeb(card->hw.scabase + M_REG(CTL,ch), + cpc_readb(card->hw.scabase+M_REG(CTL,ch))& CTL_DTR); + CPC_TTY_UNLOCK(card,flags); +} + +/* + * PC300 TTY set DTR signal to ON + */ +static void cpc_tty_dtr_on(pc300dev_t *pc300dev) +{ + pc300ch_t *pc300chan = (pc300ch_t *)pc300dev->chan; + pc300_t *card = (pc300_t *) pc300chan->card; + int ch = pc300chan->channel; + unsigned long flags; + + CPC_TTY_DBG("%s-tty: Set signal DTR\n", + ((struct net_device*)(pc300dev->hdlc))->name); + CPC_TTY_LOCK(card, flags); + cpc_writeb(card->hw.scabase + M_REG(CTL,ch), + cpc_readb(card->hw.scabase+M_REG(CTL,ch))& ~CTL_DTR); + CPC_TTY_UNLOCK(card,flags); +} + +/* + * PC300 TTY initialization routine + * + * This routine is called by the PC300 driver during board configuration + * (ioctl=SIOCSP300CONF). At this point the adapter is completely + * initialized. + * o verify kernel version (only 2.4.x) + * o register TTY driver + * o init cpc_tty_area struct + */ +void cpc_tty_init(pc300dev_t *pc300dev) +{ + int port, aux; + st_cpc_tty_area * cpc_tty; + + if (LINUX_VERSION_CODE < KERNEL_VERSION(2,4,0)) { + printk("%s-tty: Error: TTY driver is supported on 2.4.X kernel!\n", + ((struct net_device*)(pc300dev->hdlc))->name); + return; + } + + /* hdlcX - X=interface number */ + port = ((struct net_device*)(pc300dev->hdlc))->name[4] - '0'; + if (port >= CPC_TTY_NPORTS) { + printk("%s-tty: invalid interface selected (0-%i): %i", + ((struct net_device*)(pc300dev->hdlc))->name, + CPC_TTY_NPORTS-1,port); + return; + } + + if (cpc_tty_cnt == 0) { /* first TTY connection -> register driver */ + CPC_TTY_DBG("%s-tty: driver init, major:%i, minor range:%i=%i\n", + ((struct net_device*)(pc300dev->hdlc))->name, + CPC_TTY_MAJOR, CPC_TTY_MINOR_START, + CPC_TTY_MINOR_START+CPC_TTY_NPORTS); + /* initialize tty driver struct */ + memset(&serial_drv,0,sizeof(struct tty_driver)); + serial_drv.magic = TTY_DRIVER_MAGIC; + serial_drv.driver_name = "pc300_tty"; + serial_drv.name = "ttyCP"; + serial_drv.major = CPC_TTY_MAJOR; + serial_drv.minor_start = CPC_TTY_MINOR_START; + serial_drv.num = CPC_TTY_NPORTS; + serial_drv.type = TTY_DRIVER_TYPE_SERIAL; + serial_drv.subtype = SERIAL_TYPE_NORMAL; + + serial_drv.init_termios = tty_std_termios; + serial_drv.init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL; + serial_drv.flags = TTY_DRIVER_REAL_RAW; + serial_drv.refcount = &cpc_tty_refcount; + + /* tty data structures */ + serial_drv.table = cpc_tty_serial_table; + serial_drv.termios = cpc_tty_serial_termios; + serial_drv.termios_locked = cpc_tty_serial_termios_locked; + + /* interface routines from the upper tty layer to the tty driver */ + serial_drv.open = cpc_tty_open; + serial_drv.close = cpc_tty_close; + serial_drv.write = cpc_tty_write; + serial_drv.write_room = cpc_tty_write_room; + serial_drv.chars_in_buffer = cpc_tty_chars_in_buffer; + serial_drv.ioctl = cpc_tty_ioctl; + serial_drv.flush_buffer = cpc_tty_flush_buffer; + serial_drv.hangup = cpc_tty_hangup; + + /* the callout device is just like normal device except for major */ + /* number and the subtype code */ + callout_drv = serial_drv; + callout_drv.name = "cucp"; + callout_drv.major = CPC_TTY_MAJOR + 1; + callout_drv.subtype = SERIAL_TYPE_CALLOUT; + callout_drv.read_proc = 0; + callout_drv.proc_entry = 0; + + /* register the TTY driver */ + if (tty_register_driver(&serial_drv)) { + printk("%s-tty: Failed to register serial driver! ", + ((struct net_device*)(pc300dev->hdlc))->name); + return; + } + + if (tty_register_driver(&callout_drv)) { + CPC_TTY_DBG("%s-tty: Failed to register callout driver! ", + ((struct net_device*)(pc300dev->hdlc))->name); + return; + } + memset((void *)cpc_tty_area, 0, + sizeof(st_cpc_tty_area) * CPC_TTY_NPORTS); + } + + cpc_tty = &cpc_tty_area[port]; + + if (cpc_tty->state != CPC_TTY_ST_IDLE) { + CPC_TTY_DBG("%s-tty: TTY port %i, already in use.\n", + ((struct net_device*)(pc300dev->hdlc))->name,port); + return; + } + + cpc_tty_cnt++; + cpc_tty->state = CPC_TTY_ST_INIT; + cpc_tty->num_open= 0; + cpc_tty->tty_minor = port + CPC_TTY_MINOR_START; + cpc_tty->pc300dev = pc300dev; + + cpc_tty->tty_tx_task_queue.routine = cpc_tty_tx_task; + cpc_tty->tty_tx_task_queue.data = (void *)cpc_tty; + + cpc_tty->tty_rx_task_queue.routine = cpc_tty_rx_task; + cpc_tty->tty_rx_task_queue.data = (void *) port; + + cpc_tty->buf_rx.first = cpc_tty->buf_rx.last = 0; + + pc300dev->cpc_tty = (void *)cpc_tty; + + aux = strlen(((struct net_device*)(pc300dev->hdlc))->name); + memcpy(cpc_tty->name,((struct net_device*)(pc300dev->hdlc))->name,aux); + memcpy(&cpc_tty->name[aux], "-tty", 5); + + cpc_open((struct net_device *)pc300dev->hdlc); + cpc_tty_dtr_off(pc300dev); + + CPC_TTY_DBG("%s: Initializing TTY Sync Driver, tty major#%d minor#%i\n", + cpc_tty->name,CPC_TTY_MAJOR,cpc_tty->tty_minor); + return; +} + +/* + * PC300 TTY OPEN routine + * + * This routine is called by the tty driver to open the interface + * o verify minor + * o allocate buffer to Rx and Tx + */ +static int cpc_tty_open(struct tty_struct *tty, struct file *flip) +{ + int port ; + st_cpc_tty_area *cpc_tty; + + if (!tty) { + return -ENODEV; + } + + port = MINOR(tty->device) - tty->driver.minor_start; + + if ((port < 0) || (port >= CPC_TTY_NPORTS)){ + CPC_TTY_DBG("pc300_tty: open invalid minor %i\n",MINOR(tty->device)); + return -ENODEV; + } + + cpc_tty = &cpc_tty_area[port]; + + if (cpc_tty->state == CPC_TTY_ST_IDLE){ + CPC_TTY_DBG("%s: open - invalid interface, minor=%i\n", + cpc_tty->name, MINOR(tty->device)); + return -ENODEV; + } + + if (cpc_tty->num_open == 0) { /* first open of this tty */ + if (!cpc_tty_area[port].buf_tx){ + cpc_tty_area[port].buf_tx = kmalloc(CPC_TTY_MAX_MTU,GFP_KERNEL); + if (cpc_tty_area[port].buf_tx == 0){ + CPC_TTY_DBG("%s: error in memory allocation\n",cpc_tty->name); + return -ENOMEM; + } + } + + if (cpc_tty_area[port].buf_rx.first) { + unsigned char * aux; + while (cpc_tty_area[port].buf_rx.first) { + aux = (unsigned char *)cpc_tty_area[port].buf_rx.first; + cpc_tty_area[port].buf_rx.first = cpc_tty_area[port].buf_rx.first->next; + kfree(aux); + } + cpc_tty_area[port].buf_rx.first = NULL; + cpc_tty_area[port].buf_rx.last = NULL; + } + + cpc_tty_area[port].state = CPC_TTY_ST_OPEN; + cpc_tty_area[port].tty = tty; + tty->driver_data = &cpc_tty_area[port]; + + cpc_tty_dtr_on(cpc_tty->pc300dev); + } + + cpc_tty->num_open++; + + CPC_TTY_DBG("%s: opening TTY driver\n", cpc_tty->name); + + /* avisar driver PC300 */ + return 0; +} + +/* + * PC300 TTY CLOSE routine + * + * This routine is called by the tty driver to close the interface + * o call close channel in PC300 driver (cpc_closech) + * o free Rx and Tx buffers + */ + +static void cpc_tty_close(struct tty_struct *tty, struct file *flip) +{ + st_cpc_tty_area *cpc_tty; + unsigned long flags; + int res; + + if (!tty || !tty->driver_data ) { + CPC_TTY_DBG("hdlx-tty: no TTY in close \n"); + return; + } + + cpc_tty = (st_cpc_tty_area *) tty->driver_data; + + if ((cpc_tty->tty != tty)|| (cpc_tty->state != CPC_TTY_ST_OPEN)) { + CPC_TTY_DBG("%s: TTY is not opened\n",cpc_tty->name); + return; + } + + if (!cpc_tty->num_open) { + CPC_TTY_DBG("%s: TTY is closed\n",cpc_tty->name); + return; + } + + if (--cpc_tty->num_open > 0) { + CPC_TTY_DBG("%s: TTY closed\n",cpc_tty->name); + return; + } + + cpc_tty_dtr_off(cpc_tty->pc300dev); + + CPC_TTY_LOCK(cpc_tty->pc300dev->chan->card, flags); /* lock irq */ + cpc_tty->tty = NULL; + cpc_tty->state = CPC_TTY_ST_INIT; + CPC_TTY_UNLOCK(cpc_tty->pc300dev->chan->card, flags); /* unlock irq */ + + if (cpc_tty->buf_rx.first) { + unsigned char * aux; + while (cpc_tty->buf_rx.first) { + aux = (unsigned char *)cpc_tty->buf_rx.first; + cpc_tty->buf_rx.first = cpc_tty->buf_rx.first->next; + kfree(aux); + } + cpc_tty->buf_rx.first = NULL; + cpc_tty->buf_rx.last = NULL; + } + + if (cpc_tty->buf_tx) { + kfree(cpc_tty->buf_tx); + cpc_tty->buf_tx = NULL; + } + + CPC_TTY_DBG("%s: TTY closed\n",cpc_tty->name); + + if (!cpc_tty_refcount && cpc_tty_unreg_flag) { + cpc_tty_unreg_flag = 0; + CPC_TTY_DBG("%s: unregister the tty driver\n", cpc_tty->name); + if ((res=tty_unregister_driver(&serial_drv))) { + CPC_TTY_DBG("%s: ERROR ->unregister the tty driver error=%d\n", + cpc_tty->name,res); + } + if ((res=tty_unregister_driver(&callout_drv))) { + CPC_TTY_DBG("%s: ERROR ->unregister the tty driver error=%d\n", + cpc_tty->name,res); + } + } + return; +} + +/* + * PC300 TTY WRITE routine + * + * This routine is called by the tty driver to write a series of characters + * to the tty device. The characters may come from user or kernel space. + * o verify the DCD signal + * o send characters to board and start the transmission + */ +static int cpc_tty_write(struct tty_struct *tty, int from_user, + const unsigned char *buf, int count) +{ + st_cpc_tty_area *cpc_tty; + pc300ch_t *pc300chan; + pc300_t *card; + int ch; + unsigned long flags; + struct net_device_stats *stats; + + if (!tty || !tty->driver_data ) { + CPC_TTY_DBG("hdlcX-tty: no TTY in write\n"); + return -ENODEV; + } + + cpc_tty = (st_cpc_tty_area *) tty->driver_data; + + if ((cpc_tty->tty != tty) || (cpc_tty->state != CPC_TTY_ST_OPEN)) { + CPC_TTY_DBG("%s: TTY is not opened\n", cpc_tty->name); + return -ENODEV; + } + + if (count > CPC_TTY_MAX_MTU) { + CPC_TTY_DBG("%s: count is invalid\n",cpc_tty->name); + return -EINVAL; /* frame too big */ + } + + CPC_TTY_DBG("%s: cpc_tty_write %s data len=%i\n",cpc_tty->name, + (from_user)?"from user" : "from kernel",count); + + pc300chan = (pc300ch_t *)((pc300dev_t*)cpc_tty->pc300dev)->chan; + stats = &((pc300dev_t*)cpc_tty->pc300dev)->hdlc->stats; + card = (pc300_t *) pc300chan->card; + ch = pc300chan->channel; + + /* verify DCD signal*/ + if (cpc_readb(card->hw.scabase + M_REG(ST3,ch)) & ST3_DCD) { + /* DCD is OFF */ + CPC_TTY_DBG("%s : DCD is OFF\n", cpc_tty->name); + stats->tx_errors++; + stats->tx_carrier_errors++; + CPC_TTY_LOCK(card, flags); + cpc_writeb(card->hw.scabase + M_REG(CMD, ch), CMD_TX_BUF_CLR); + + if (card->hw.type == PC300_TE) { + cpc_writeb(card->hw.falcbase + card->hw.cpld_reg2, + cpc_readb(card->hw.falcbase + card->hw.cpld_reg2) & + ~(CPLD_REG2_FALC_LED1 << (2 *ch))); + } + + CPC_TTY_UNLOCK(card, flags); + + return -EINVAL; + } + + if (from_user) { + unsigned char *buf_tmp; + + buf_tmp = cpc_tty->buf_tx; + if (copy_from_user(buf_tmp, buf, count)) { + /* failed to copy from user */ + CPC_TTY_DBG("%s: error in copy from user\n",cpc_tty->name); + return -EINVAL; + } + + if (cpc_tty_send_to_card(cpc_tty->pc300dev, (void*) buf_tmp,count)) { + /* failed to send */ + CPC_TTY_DBG("%s: transmission error\n",cpc_tty->name); + return 0; + } + } else { + if (cpc_tty_send_to_card(cpc_tty->pc300dev, (void*)buf, count)) { + /* failed to send */ + CPC_TTY_DBG("%s: trasmition error\n", cpc_tty->name); + return 0; + } + } + return count; +} + +/* + * PC300 TTY Write Room routine + * + * This routine returns the numbers of characteres the tty driver will accept + * for queuing to be written. + * o return MTU + */ +static int cpc_tty_write_room(struct tty_struct *tty) +{ + st_cpc_tty_area *cpc_tty; + + if (!tty || !tty->driver_data ) { + CPC_TTY_DBG("hdlcX-tty: no TTY to write room\n"); + return -ENODEV; + } + + cpc_tty = (st_cpc_tty_area *) tty->driver_data; + + if ((cpc_tty->tty != tty) || (cpc_tty->state != CPC_TTY_ST_OPEN)) { + CPC_TTY_DBG("%s: TTY is not opened\n",cpc_tty->name); + return -ENODEV; + } + + CPC_TTY_DBG("%s: write room\n",cpc_tty->name); + + return CPC_TTY_MAX_MTU; +} + +/* + * PC300 TTY chars in buffer routine + * + * This routine returns the chars number in the transmission buffer + * o returns 0 + */ +static int cpc_tty_chars_in_buffer(struct tty_struct *tty) +{ + st_cpc_tty_area *cpc_tty; + + if (!tty || !tty->driver_data ) { + CPC_TTY_DBG("hdlcX-tty: no TTY to chars in buffer\n"); + return -ENODEV; + } + + cpc_tty = (st_cpc_tty_area *) tty->driver_data; + + if ((cpc_tty->tty != tty) || (cpc_tty->state != CPC_TTY_ST_OPEN)) { + CPC_TTY_DBG("%s: TTY is not opened\n",cpc_tty->name); + return -ENODEV; + } + + return(0); +} + +/* + * PC300 TTY IOCTL routine + * + * This routine treats TIOCMBIS (set DTR signal) and TIOCMBIC (clear DTR + * signal)IOCTL commands. + */ +static int cpc_tty_ioctl(struct tty_struct *tty, struct file *file, + unsigned int cmd, unsigned long arg) + +{ + st_cpc_tty_area *cpc_tty; + + if (!tty || !tty->driver_data ) { + CPC_TTY_DBG("hdlcX-tty: no TTY to chars in buffer\n"); + return -ENODEV; + } + + cpc_tty = (st_cpc_tty_area *) tty->driver_data; + + if ((cpc_tty->tty != tty) || (cpc_tty->state != CPC_TTY_ST_OPEN)) { + CPC_TTY_DBG("%s: TTY is not opened\n",cpc_tty->name); + return -ENODEV; + } + + CPC_TTY_DBG("%s: IOCTL cmd %x\n",cpc_tty->name,cmd); + + switch (cmd) { + case TIOCMBIS : /* set DTR */ + cpc_tty_dtr_on(cpc_tty->pc300dev); + break; + + case TIOCMBIC: /* clear DTR */ + cpc_tty_dtr_off(cpc_tty->pc300dev); + break; + default : + return -ENOIOCTLCMD; + } + return 0; +} + +/* + * PC300 TTY Flush Buffer routine + * + * This routine resets the transmission buffer + */ +static void cpc_tty_flush_buffer(struct tty_struct *tty) +{ + st_cpc_tty_area *cpc_tty; + + if (!tty || !tty->driver_data ) { + CPC_TTY_DBG("hdlcX-tty: no TTY to flush buffer\n"); + return; + } + + cpc_tty = (st_cpc_tty_area *) tty->driver_data; + + if ((cpc_tty->tty != tty) || (cpc_tty->state != CPC_TTY_ST_OPEN)) { + CPC_TTY_DBG("%s: TTY is not opened\n",cpc_tty->name); + return; + } + + CPC_TTY_DBG("%s: call wake_up_interruptible\n",cpc_tty->name); + + wake_up_interruptible(&tty->write_wait); + + if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) && tty->ldisc.write_wakeup){ + CPC_TTY_DBG("%s: call line disc. wake up\n",cpc_tty->name); + tty->ldisc.write_wakeup(tty); + } + + return; +} + +/* + * PC300 TTY Hangup routine + * + * This routine is called by the tty driver to hangup the interface + * o clear DTR signal + */ + +static void cpc_tty_hangup(struct tty_struct *tty) +{ + st_cpc_tty_area *cpc_tty; + int res; + + if (!tty || !tty->driver_data ) { + CPC_TTY_DBG("hdlcX-tty: no TTY to hangup\n"); + return ; + } + + cpc_tty = (st_cpc_tty_area *) tty->driver_data; + + if ((cpc_tty->tty != tty) || (cpc_tty->state != CPC_TTY_ST_OPEN)) { + CPC_TTY_DBG("%s: TTY is not opened\n",cpc_tty->name); + return ; + } + if (!cpc_tty_refcount && cpc_tty_unreg_flag) { + cpc_tty_unreg_flag = 0; + CPC_TTY_DBG("%s: unregister the tty driver\n", cpc_tty->name); + if ((res=tty_unregister_driver(&serial_drv))) { + CPC_TTY_DBG("%s: ERROR ->unregister the tty driver error=%d\n", + cpc_tty->name,res); + } + if ((res=tty_unregister_driver(&callout_drv))) { + CPC_TTY_DBG("%s: ERROR ->unregister the tty driver error=%d\n", + cpc_tty->name,res); + } + } + cpc_tty_dtr_off(cpc_tty->pc300dev); +} + +/* + * PC300 TTY RX task routine + * This routine treats RX task + * o verify read buffer + * o call the line disc. read + * o free memory + */ +static void cpc_tty_rx_task(void * data) +{ + int port, i, j; + st_cpc_tty_area *cpc_tty; + volatile st_cpc_rx_buf * buf; + char flags=0,flg_rx=1; + + if (cpc_tty_cnt == 0) return; + + for (i=0; (i < 4) && flg_rx ; i++) { + flg_rx = 0; + port = (int) data; + for (j=0; j < CPC_TTY_NPORTS; j++) { + cpc_tty = &cpc_tty_area[port]; + + if ((buf=cpc_tty->buf_rx.first) != 0) { + + if (cpc_tty->tty && (cpc_tty->tty->ldisc.receive_buf)) { + CPC_TTY_DBG("%s: call line disc. receive_buf\n",cpc_tty->name); + cpc_tty->tty->ldisc.receive_buf(cpc_tty->tty, buf->data, + &flags, buf->size); + } + cpc_tty->buf_rx.first = cpc_tty->buf_rx.first->next; + kfree((unsigned char *)buf); + buf = cpc_tty->buf_rx.first; + flg_rx = 1; + } + if (++port == CPC_TTY_NPORTS) port = 0; + } + } +} + +/* + * PC300 TTY RX task routine + * + * This routine treats RX interrupt. + * o read all frames in card + * o verify the frame size + * o read the frame in rx buffer + */ +static void cpc_tty_rx_disc_frame(pc300ch_t *pc300chan) +{ + volatile pcsca_bd_t * ptdescr; + volatile unsigned char status; + pc300_t *card = (pc300_t *)pc300chan->card; + int ch = pc300chan->channel; + + /* dma buf read */ + ptdescr = (pcsca_bd_t *)(card->hw.rambase + + RX_BD_ADDR(ch, pc300chan->rx_first_bd)); + while (pc300chan->rx_first_bd != pc300chan->rx_last_bd) { + status = cpc_readb(&ptdescr->status); + cpc_writeb(&ptdescr->status, 0); + cpc_writeb(&ptdescr->len, 0); + pc300chan->rx_first_bd = (pc300chan->rx_first_bd + 1) & + (N_DMA_RX_BUF - 1); + if (status & DST_EOM) { + break; /* end of message */ + } + ptdescr = (pcsca_bd_t *)(card->hw.rambase + cpc_readl(&ptdescr->next)); + } +} + +void cpc_tty_receive(pc300dev_t *pc300dev) +{ + st_cpc_tty_area *cpc_tty; + pc300ch_t *pc300chan = (pc300ch_t *)pc300dev->chan; + pc300_t *card = (pc300_t *)pc300chan->card; + int ch = pc300chan->channel; + volatile pcsca_bd_t * ptdescr; + struct net_device_stats *stats = &pc300dev->hdlc->stats; + int rx_len, rx_aux; + volatile unsigned char status; + unsigned short first_bd = pc300chan->rx_first_bd; + st_cpc_rx_buf *new; + unsigned char dsr_rx; + + if (pc300dev->cpc_tty == NULL) { + return; + } + + dsr_rx = cpc_readb(card->hw.scabase + DSR_RX(ch)); + + cpc_tty = (st_cpc_tty_area *)pc300dev->cpc_tty; + + while (1) { + rx_len = 0; + ptdescr = (pcsca_bd_t *)(card->hw.rambase + RX_BD_ADDR(ch, first_bd)); + while ((status = cpc_readb(&ptdescr->status)) & DST_OSB) { + rx_len += cpc_readw(&ptdescr->len); + first_bd = (first_bd + 1) & (N_DMA_RX_BUF - 1); + if (status & DST_EOM) { + break; + } + ptdescr=(pcsca_bd_t*)(card->hw.rambase+cpc_readl(&ptdescr->next)); + } + + if (!rx_len) { + if (dsr_rx & DSR_BOF) { + /* update EDA */ + cpc_writel(card->hw.scabase + DRX_REG(EDAL, ch), + RX_BD_ADDR(ch, pc300chan->rx_last_bd)); + } + return; + } + + if (rx_len > CPC_TTY_MAX_MTU) { + /* Free RX descriptors */ + CPC_TTY_DBG("%s: frame size is invalid.\n",cpc_tty->name); + stats->rx_errors++; + stats->rx_frame_errors++; + cpc_tty_rx_disc_frame(pc300chan); + continue; + } + + new = (st_cpc_rx_buf *) kmalloc(rx_len + sizeof(st_cpc_rx_buf), GFP_ATOMIC); + if (new == 0) { + cpc_tty_rx_disc_frame(pc300chan); + continue; + } + + /* dma buf read */ + ptdescr = (pcsca_bd_t *)(card->hw.rambase + + RX_BD_ADDR(ch, pc300chan->rx_first_bd)); + + rx_len = 0; /* counter frame size */ + + while ((status = cpc_readb(&ptdescr->status)) & DST_OSB) { + rx_aux = cpc_readw(&ptdescr->len); + if ((status & (DST_OVR | DST_CRC | DST_RBIT | DST_SHRT | DST_ABT)) + || (rx_aux > BD_DEF_LEN)) { + CPC_TTY_DBG("%s: reception error\n", cpc_tty->name); + stats->rx_errors++; + if (status & DST_OVR) { + stats->rx_fifo_errors++; + } + if (status & DST_CRC) { + stats->rx_crc_errors++; + } + if ((status & (DST_RBIT | DST_SHRT | DST_ABT)) || + (rx_aux > BD_DEF_LEN)) { + stats->rx_frame_errors++; + } + /* discard remainig descriptors used by the bad frame */ + CPC_TTY_DBG("%s: reception error - discard descriptors", + cpc_tty->name); + cpc_tty_rx_disc_frame(pc300chan); + rx_len = 0; + kfree((unsigned char *)new); + break; /* read next frame - while(1) */ + } + + if (cpc_tty->state != CPC_TTY_ST_OPEN) { + /* Free RX descriptors */ + cpc_tty_rx_disc_frame(pc300chan); + stats->rx_dropped++; + rx_len = 0; + kfree((unsigned char *)new); + break; /* read next frame - while(1) */ + } + + /* read the segment of the frame */ + if (rx_aux != 0) { + memcpy_fromio((new->data + rx_len), + (void *)(card->hw.rambase + + cpc_readl(&ptdescr->ptbuf)), rx_aux); + rx_len += rx_aux; + } + cpc_writeb(&ptdescr->status,0); + cpc_writeb(&ptdescr->len, 0); + pc300chan->rx_first_bd = (pc300chan->rx_first_bd + 1) & + (N_DMA_RX_BUF -1); + if (status & DST_EOM)break; + + ptdescr = (pcsca_bd_t *) (card->hw.rambase + + cpc_readl(&ptdescr->next)); + } + /* update pointer */ + pc300chan->rx_last_bd = (pc300chan->rx_first_bd - 1) & + (N_DMA_RX_BUF - 1) ; + if (!(dsr_rx & DSR_BOF)) { + /* update EDA */ + cpc_writel(card->hw.scabase + DRX_REG(EDAL, ch), + RX_BD_ADDR(ch, pc300chan->rx_last_bd)); + } + if (rx_len != 0) { + stats->rx_bytes += rx_len; + + if (pc300dev->trace_on) { + cpc_tty_trace(pc300dev, new->data,rx_len, 'R'); + } + new->size = rx_len; + new->next = 0; + if (cpc_tty->buf_rx.first == 0) { + cpc_tty->buf_rx.first = new; + cpc_tty->buf_rx.last = new; + } else { + cpc_tty->buf_rx.last->next = new; + cpc_tty->buf_rx.last = new; + } + schedule_task(&(cpc_tty->tty_rx_task_queue)); + stats->rx_packets++; + } + } +} + +/* + * PC300 TTY TX task routine + * + * This routine treats TX interrupt. + * o if need call line discipline wakeup + * o call wake_up_interruptible + */ +static void cpc_tty_tx_task(void *data) +{ + st_cpc_tty_area *cpc_tty = (st_cpc_tty_area *) data; + struct tty_struct *tty; + + CPC_TTY_DBG("%s: cpc_tty_tx_task init\n",cpc_tty->name); + + if ((tty = cpc_tty->tty) == 0) { + CPC_TTY_DBG("%s: the interface is not opened\n",cpc_tty->name); + return; + } + + if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) && tty->ldisc.write_wakeup){ + CPC_TTY_DBG("%s:call line disc. wakeup\n",cpc_tty->name); + tty->ldisc.write_wakeup (tty); + } + + wake_up_interruptible(&tty->write_wait); +} + +/* + * PC300 TTY send to card routine + * + * This routine send data to card. + * o clear descriptors + * o write data to DMA buffers + * o start the transmission + */ +static int cpc_tty_send_to_card(pc300dev_t *dev,void* buf, int len) +{ + pc300ch_t *chan = (pc300ch_t *)dev->chan; + pc300_t *card = (pc300_t *)chan->card; + int ch = chan->channel; + struct net_device_stats *stats = &dev->hdlc->stats; + unsigned long flags; + volatile pcsca_bd_t * ptdescr; + int i, nchar; + int tosend = len; + int nbuf = ((len - 1)/BD_DEF_LEN) + 1; + unsigned char *pdata=buf; + + CPC_TTY_DBG("%s:cpc_tty_send_to_cars len=%i", + (st_cpc_tty_area *)dev->cpc_tty->name,len); + + if (nbuf >= card->chan[ch].nfree_tx_bd) { + return 1; + } + + /* write buffer to DMA buffers */ + CPC_TTY_DBG("%s: call dma_buf_write\n", + (st_cpc_tty_area *)dev->cpc_tty->name); + for (i = 0 ; i < nbuf ; i++) { + ptdescr = (pcsca_bd_t *)(card->hw.rambase + + TX_BD_ADDR(ch, card->chan[ch].tx_next_bd)); + nchar = (BD_DEF_LEN > tosend) ? tosend : BD_DEF_LEN; + if (cpc_readb(&ptdescr->status) & DST_OSB) { + memcpy_toio((void *)(card->hw.rambase + + cpc_readl(&ptdescr->ptbuf)), + &pdata[len - tosend], + nchar); + card->chan[ch].nfree_tx_bd--; + if ((i + 1) == nbuf) { + /* This must be the last BD to be used */ + cpc_writeb(&ptdescr->status, DST_EOM); + } else { + cpc_writeb(&ptdescr->status, 0); + } + cpc_writew(&ptdescr->len, nchar); + } else { + CPC_TTY_DBG("%s: error in dma_buf_write\n", + (st_cpc_tty_area *)dev->cpc_tty->name); + stats->tx_dropped++; + return 1; + } + tosend -= nchar; + card->chan[ch].tx_next_bd = + (card->chan[ch].tx_next_bd + 1) & (N_DMA_TX_BUF - 1); + } + + if (dev->trace_on) { + cpc_tty_trace(dev, buf, len,'T'); + } + + /* start transmission */ + CPC_TTY_DBG("%s: start transmission\n", + (st_cpc_tty_area *)dev->cpc_tty->name); + + CPC_TTY_LOCK(card, flags); + cpc_writeb(card->hw.scabase + DTX_REG(EDAL, ch), + TX_BD_ADDR(ch, chan->tx_next_bd)); + cpc_writeb(card->hw.scabase + M_REG(CMD, ch), CMD_TX_ENA); + cpc_writeb(card->hw.scabase + DSR_TX(ch), DSR_DE); + + if (card->hw.type == PC300_TE) { + cpc_writeb(card->hw.falcbase + card->hw.cpld_reg2, + cpc_readb(card->hw.falcbase + card->hw.cpld_reg2) | + (CPLD_REG2_FALC_LED1 << (2 * ch))); + } + CPC_TTY_UNLOCK(card, flags); + return 0; +} + +/* + * PC300 TTY trace routine + * + * This routine send trace of connection to application. + * o clear descriptors + * o write data to DMA buffers + * o start the transmission + */ + +static void cpc_tty_trace(pc300dev_t *dev, char* buf, int len, char rxtx) +{ + struct sk_buff *skb; + + if ((skb = dev_alloc_skb(10 + len)) == NULL) { + /* out of memory */ + CPC_TTY_DBG("%s: tty_trace - out of memory\n", + ((struct net_device *)(dev->hdlc))->name); + return; + } + + skb_put (skb, 10 + len); + skb->dev = (struct net_device *) dev->hdlc; + skb->protocol = htons(ETH_P_CUST); + skb->mac.raw = skb->data; + skb->pkt_type = PACKET_HOST; + skb->len = 10 + len; + + memcpy(skb->data,((struct net_device *)(dev->hdlc))->name,5); + skb->data[5] = '['; + skb->data[6] = rxtx; + skb->data[7] = ']'; + skb->data[8] = ':'; + skb->data[9] = ' '; + memcpy(&skb->data[10], buf, len); + netif_rx(skb); +} + +/* + * PC300 TTY unregister service routine + * + * This routine unregister one interface. + */ +void cpc_tty_unregister_service(pc300dev_t *pc300dev) +{ + st_cpc_tty_area *cpc_tty; + ulong flags; + int res; + + if ((cpc_tty= (st_cpc_tty_area *) pc300dev->cpc_tty) == 0) { + CPC_TTY_DBG("%s: interface is not TTY\n", + ((struct net_device *)(pc300dev->hdlc))->name); + return; + } + CPC_TTY_DBG("%s: cpc_tty_unregister_service", cpc_tty->name); + + if (cpc_tty->pc300dev != pc300dev) { + CPC_TTY_DBG("%s: invalid tty ptr=%s\n", + ((struct net_device *)(pc300dev->hdlc))->name, cpc_tty->name); + return; + } + + if (--cpc_tty_cnt == 0) { + if (cpc_tty_refcount) { + CPC_TTY_DBG("%s: unregister is not possible, refcount=%d", + cpc_tty->name, cpc_tty_refcount); + cpc_tty_cnt++; + cpc_tty_unreg_flag = 1; + return; + } else { + CPC_TTY_DBG("%s: unregister the tty driver\n", cpc_tty->name); + if ((res=tty_unregister_driver(&serial_drv))) { + CPC_TTY_DBG("%s: ERROR ->unregister the tty driver error=%d\n", + cpc_tty->name,res); + } + if ((res=tty_unregister_driver(&callout_drv))) { + CPC_TTY_DBG("%s: ERROR ->unregister the tty driver error=%d\n", + cpc_tty->name,res); + } + } + } + CPC_TTY_LOCK(pc300dev->chan->card,flags); + cpc_tty->tty = NULL; + CPC_TTY_UNLOCK(pc300dev->chan->card, flags); + cpc_tty->tty_minor = 0; + cpc_tty->state = CPC_TTY_ST_IDLE; +} + +/* + * PC300 TTY trigger poll routine + * This routine is called by pc300driver to treats Tx interrupt. + */ +void cpc_tty_trigger_poll(pc300dev_t *pc300dev) +{ + st_cpc_tty_area *cpc_tty = (st_cpc_tty_area *)pc300dev->cpc_tty; + if (!cpc_tty) { + return; + } + schedule_task(&(cpc_tty->tty_tx_task_queue)); +} + +/* + * PC300 TTY reset var routine + * This routine is called by pc300driver to init the TTY area. + */ + +void cpc_tty_reset_var(void) +{ + int i ; + + CPC_TTY_DBG("hdlcX-tty: reset variables\n"); + /* reset the tty_driver structure - serial_drv */ + memset(&serial_drv, 0, sizeof(struct tty_driver)); + memset(&callout_drv, 0, sizeof(struct tty_driver)); + for (i=0; i < CPC_TTY_NPORTS; i++){ + memset(&cpc_tty_area[i],0, sizeof(st_cpc_tty_area)); + } +} diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/pcmcia/i82092.c linux.21rc1-ac1/drivers/pcmcia/i82092.c --- linux.21rc1/drivers/pcmcia/i82092.c 2003-04-22 16:38:53.000000000 +0100 +++ linux.21rc1-ac1/drivers/pcmcia/i82092.c 2003-04-22 19:08:46.000000000 +0100 @@ -1,12 +1,12 @@ /* * Driver for Intel I82092AA PCI-PCMCIA bridge. * - * (C) 2001 Red Hat, Inc. + * (C) 2001-2003 Red Hat, Inc. * - * Author: Arjan Van De Ven - * Loosly based on i82365.c from the pcmcia-cs package + * Author: Arjan Van De Ven + * Loosely based on i82365.c from the pcmcia-cs package * - * $Id: i82092aa.c,v 1.2 2001/10/23 14:43:34 arjanv Exp $ + * $Id: i82092.c,v 1.16 2003/04/15 16:36:42 dwmw2 Exp $ */ #include @@ -26,6 +26,11 @@ #include "i82365.h" MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Red Hat, Inc. - Arjan Van De Ven "); +MODULE_DESCRIPTION("Socket driver for Intel i82092AA PCI-PCMCIA bridge"); + +/* Extra i82092-specific register */ +#define I365_CPAGE 0x26 /* PCI core routines */ static struct pci_device_id i82092aa_pci_ids[] = { @@ -73,9 +78,9 @@ 1 = empty socket, 2 = card but not initialized, 3 = operational card */ - int io_base; /* base io address of the socket */ + unsigned long io_base; /* base io address of the socket */ socket_cap_t cap; - + unsigned int pending_events; /* Pending events on this interface */ void (*handler)(void *info, u_int events); @@ -87,19 +92,35 @@ #define MAX_SOCKETS 4 static struct socket_info sockets[MAX_SOCKETS]; -static int socket_count; /* shortcut */ +static int socket_count; /* shortcut */ + +int membase = -1; +int isa_setup; +MODULE_PARM(membase, "i"); +MODULE_PARM(isa_setup, "i"); static int __init i82092aa_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) { unsigned char configbyte; + struct pci_dev *parent; int i; enter("i82092aa_pci_probe"); if (pci_enable_device(dev)) return -EIO; - + + /* Since we have no memory BARs some firmware we may not + have had PCI_COMMAND_MEM enabled, yet the device needs + it. */ + pci_read_config_byte(dev, PCI_COMMAND, &configbyte); + if (!(configbyte | PCI_COMMAND_MEMORY)) { + dprintk(KERN_DEBUG "Enabling PCI_COMMAND_MEMORY\n"); + configbyte |= PCI_COMMAND_MEMORY; + pci_write_config_byte(dev, PCI_COMMAND, configbyte); + } + pci_read_config_byte(dev, 0x40, &configbyte); /* PCI Configuration Control */ switch(configbyte&6) { case 0: @@ -122,6 +143,53 @@ break; } + if (membase == -1) { + for (i = 0; i < 4; i++) { + if ((dev->bus->resource[i]->flags & (IORESOURCE_MEM|IORESOURCE_READONLY|IORESOURCE_CACHEABLE|IORESOURCE_SHADOWABLE)) + == IORESOURCE_MEM) { + membase = dev->bus->resource[i]->start >> 24; + goto mem_ok; + } + } + printk(KERN_WARNING "No suitable memory range for i82092aa found\n"); + return -ENOSPC; + } + mem_ok: + if (membase) + printk(KERN_NOTICE "i82092 memory base address set to 0x%02x000000\n", membase); + + /* If we're down the end of the PCI bus chain where ISA cycles don't get sent, then + only 1/4 of the I/O address space is going to be usable, unless we make sure that + the NO_ISA bit in the Bridge Control register of all upstream busses is cleared. + Since some PCMCIA cards (most serial ports, for example) will decode 10 bits and + respond only to addresses where bits 8 and 9 are non-zero, we need to do this. */ + for (parent = dev->bus->self; + parent && (parent->class>>8) == PCI_CLASS_BRIDGE_PCI; + parent = parent->bus->self) { + uint16_t brctl; + + if (pci_read_config_word(parent, PCI_BRIDGE_CONTROL, &brctl)) { + printk(KERN_WARNING "Error reading bridge control word from device %s\n", parent->slot_name); + continue; + } + + if (!(brctl & PCI_BRIDGE_CTL_NO_ISA)) + continue; + + if (isa_setup) { + printk(KERN_NOTICE "PCI bridge %s has NOISA bit set. Clearing to allow full PCMCIA operation\n", + parent->slot_name); + brctl &= ~PCI_BRIDGE_CTL_NO_ISA; + if (pci_write_config_word(parent, PCI_BRIDGE_CONTROL, brctl)) + printk(KERN_WARNING "Error writing bridge control word from device %s\n", parent->slot_name); + } else { + printk(KERN_NOTICE "PCI bridge %s has NOISA bit set. Some I/O addresses for PCMCIA cards will not work.\n", + parent->slot_name); + printk(KERN_NOTICE "Perhaps use 'isa_setup=1' option to i82092.o?\n"); + break; + } + } + for (i = 0;iresource[0].start & ~1); @@ -129,10 +197,13 @@ request_region(sockets[i].io_base, 2, "i82092aa"); - sockets[i].cap.features |= SS_CAP_PCCARD; + sockets[i].cap.features |= SS_CAP_PCCARD | SS_CAP_PAGE_REGS; sockets[i].cap.map_size = 0x1000; sockets[i].cap.irq_mask = 0; sockets[i].cap.pci_irq = dev->irq; + + /* Trick the resource code into doing the right thing... */ + sockets[i].cap.cb_dev = dev; if (card_present(i)) { sockets[i].card_state = 3; @@ -177,7 +248,7 @@ static unsigned char indirect_read(int socket, unsigned short reg) { - unsigned short int port; + unsigned long port; unsigned char val; unsigned long flags; spin_lock_irqsave(&port_lock,flags); @@ -191,7 +262,7 @@ static unsigned short indirect_read16(int socket, unsigned short reg) { - unsigned short int port; + unsigned long port; unsigned short tmp; unsigned long flags; spin_lock_irqsave(&port_lock,flags); @@ -208,7 +279,7 @@ static void indirect_write(int socket, unsigned short reg, unsigned char value) { - unsigned short int port; + unsigned long port; unsigned long flags; spin_lock_irqsave(&port_lock,flags); reg = reg + socket * 0x40; @@ -220,7 +291,7 @@ static void indirect_setbit(int socket, unsigned short reg, unsigned char mask) { - unsigned short int port; + unsigned long port; unsigned char val; unsigned long flags; spin_lock_irqsave(&port_lock,flags); @@ -237,7 +308,7 @@ static void indirect_resetbit(int socket, unsigned short reg, unsigned char mask) { - unsigned short int port; + unsigned long port; unsigned char val; unsigned long flags; spin_lock_irqsave(&port_lock,flags); @@ -253,7 +324,7 @@ static void indirect_write16(int socket, unsigned short reg, unsigned short value) { - unsigned short int port; + unsigned long port; unsigned char val; unsigned long flags; spin_lock_irqsave(&port_lock,flags); @@ -299,7 +370,7 @@ for (i=0; i < socket_count; i++) { events = xchg(&(sockets[i].pending_events),0); - printk("events = %x \n",events); + dprintk("events = %x \n",events); if (sockets[i].handler) sockets[i].handler(sockets[i].info, events); } @@ -343,7 +414,7 @@ if (csc & I365_CSC_DETECT) { events |= SS_DETECT; - printk("Card detected in socket %i!\n",i); + dprintk("Card detected in socket %i!\n",i); } if (indirect_read(i,I365_INTCTL) & I365_PC_IOCARD) { @@ -419,7 +490,6 @@ enter("i82092aa_init"); - mem.sys_stop = 0x0fff; i82092aa_set_socket(s, &dead_socket); for (i = 0; i < 2; i++) { io.map = i; @@ -604,11 +674,11 @@ reg = I365_PWR_NORESET; /* default: disable resetdrv on resume */ if (state->flags & SS_PWR_AUTO) { - printk("Auto power\n"); + dprintk("Auto power\n"); reg |= I365_PWR_AUTO; /* automatic power mngmnt */ } if (state->flags & SS_OUTPUT_ENA) { - printk("Power Enabled \n"); + dprintk("Power Enabled \n"); reg |= I365_PWR_OUT; /* enable power */ } @@ -616,11 +686,11 @@ case 0: break; case 50: - printk("setting voltage to Vcc to 5V on socket %i\n",sock); + dprintk("setting voltage to Vcc to 5V on socket %i\n",sock); reg |= I365_VCC_5V; break; default: - printk("i82092aa: i82092aa_set_socket called with invalid VCC power value: %i ", state->Vcc); + printk(KERN_WARNING "i82092aa: i82092aa_set_socket called with invalid VCC power value: %i ", state->Vcc); leave("i82092aa_set_socket"); return -EINVAL; } @@ -628,18 +698,18 @@ switch (state->Vpp) { case 0: - printk("not setting Vpp on socket %i\n",sock); + dprintk("not setting Vpp on socket %i\n",sock); break; case 50: - printk("setting Vpp to 5.0 for socket %i\n",sock); + dprintk("setting Vpp to 5.0 for socket %i\n",sock); reg |= I365_VPP1_5V | I365_VPP2_5V; break; case 120: - printk("setting Vpp to 12.0\n"); + dprintk("setting Vpp to 12.0\n"); reg |= I365_VPP1_12V | I365_VPP2_12V; break; default: - printk("i82092aa: i82092aa_set_socket called with invalid VPP power value: %i ", state->Vcc); + printk(KERN_WARNING "i82092aa: i82092aa_set_socket called with invalid VPP power value: %i ", state->Vcc); leave("i82092aa_set_socket"); return -EINVAL; } @@ -797,7 +867,7 @@ mem->card_start = ( (unsigned long)(i & 0x3fff)<12) + mem->sys_start; mem->card_start &= 0x3ffffff; - printk("Card %i is from %lx to %lx \n",sock,mem->sys_start,mem->sys_stop); + dprintk("Card %i is from %lx to %lx \n",sock,mem->sys_start,mem->sys_stop); leave("i82092aa_get_mem_map"); return 0; @@ -808,7 +878,7 @@ { unsigned short base, i; unsigned char map; - + enter("i82092aa_set_mem_map"); map = mem->map; @@ -817,17 +887,22 @@ return -EINVAL; } + /* Turn off the window before changing anything */ + if (indirect_read(sock, I365_ADDRWIN) & I365_ENA_MEM(map)) + indirect_resetbit(sock, I365_ADDRWIN, I365_ENA_MEM(map)); + + if (!(mem->flags & MAP_ACTIVE)) + return 0; + if ( (mem->card_start > 0x3ffffff) || (mem->sys_start > mem->sys_stop) || + ((mem->sys_start >> 24) != membase) || ((mem->sys_stop >> 24) != membase) || (mem->speed > 1000) ) { leave("i82092aa_set_mem_map: invalid address / speed"); - printk("invalid mem map for socket %i : %lx to %lx with a start of %x \n",sock,mem->sys_start, mem->sys_stop, mem->card_start); + printk(KERN_WARNING "invalid mem map for socket %i : %lx to %lx with a start of %x \n",sock,mem->sys_start, mem->sys_stop, mem->card_start); return -EINVAL; } - /* Turn off the window before changing anything */ - if (indirect_read(sock, I365_ADDRWIN) & I365_ENA_MEM(map)) - indirect_resetbit(sock, I365_ADDRWIN, I365_ENA_MEM(map)); /* printk("set_mem_map: Setting map %i range to %x - %x on socket %i, speed is %i, active = %i \n",map, mem->sys_start,mem->sys_stop,sock,mem->speed,mem->flags & MAP_ACTIVE); */ @@ -862,7 +937,7 @@ /* card start */ - i = ((mem->card_start - mem->sys_start) >> 12) & 0x3fff; + i = (((mem->card_start - mem->sys_start) >> 12) - (membase << 12)) & 0x3fff; if (mem->flags & MAP_WRPROT) i |= I365_MEM_WRPROT; if (mem->flags & MAP_ATTRIB) { @@ -872,10 +947,10 @@ /* printk("requesting normal memory for socket %i\n",sock);*/ } indirect_write16(sock,base+I365_W_OFF,i); - + indirect_write(sock, I365_CPAGE, membase); + /* Enable the window if necessary */ - if (mem->flags & MAP_ACTIVE) - indirect_setbit(sock, I365_ADDRWIN, I365_ENA_MEM(map)); + indirect_setbit(sock, I365_ADDRWIN, I365_ENA_MEM(map)); leave("i82092aa_set_mem_map"); return 0; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/pcmcia/ti113x.h linux.21rc1-ac1/drivers/pcmcia/ti113x.h --- linux.21rc1/drivers/pcmcia/ti113x.h 2003-04-22 16:38:53.000000000 +0100 +++ linux.21rc1-ac1/drivers/pcmcia/ti113x.h 2003-04-22 17:37:24.000000000 +0100 @@ -167,6 +167,27 @@ new |= I365_INTR_ENA; if (new != reg) exca_writeb(socket, I365_INTCTL, new); + + /* + * If ISA interrupts don't work, then fall back to routing card + * interrupts to the PCI interrupt of the socket. + */ + if (!socket->cap.irq_mask) { + int irqmux, devctl; + + printk (KERN_INFO "ti113x: Routing card interrupts to PCI\n"); + + devctl = config_readb(socket, TI113X_DEVICE_CONTROL); + devctl &= ~TI113X_DCR_IMODE_MASK; + + irqmux = config_readl(socket, TI122X_IRQMUX); + irqmux = (irqmux & ~0x0f) | 0x02; /* route INTA */ + irqmux = (irqmux & ~0xf0) | 0x20; /* route INTB */ + + config_writel(socket, TI122X_IRQMUX, irqmux); + config_writeb(socket, TI113X_DEVICE_CONTROL, devctl); + } + return 0; } diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/pnp/Config.in linux.21rc1-ac1/drivers/pnp/Config.in --- linux.21rc1/drivers/pnp/Config.in 2003-04-22 16:38:49.000000000 +0100 +++ linux.21rc1-ac1/drivers/pnp/Config.in 2003-04-22 16:44:37.000000000 +0100 @@ -8,4 +8,8 @@ dep_tristate ' ISA Plug and Play support' CONFIG_ISAPNP $CONFIG_PNP +if [ "$CONFIG_EXPERIMENTAL" = "y" ]; then + dep_bool ' PNPBIOS support (EXPERIMENTAL)' CONFIG_PNPBIOS $CONFIG_PNP +fi + endmenu diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/pnp/Makefile linux.21rc1-ac1/drivers/pnp/Makefile --- linux.21rc1/drivers/pnp/Makefile 2003-04-22 16:38:49.000000000 +0100 +++ linux.21rc1-ac1/drivers/pnp/Makefile 2003-04-22 16:44:37.000000000 +0100 @@ -10,15 +10,22 @@ O_TARGET := pnp.o -export-objs := isapnp.o -list-multi := isa-pnp.o +export-objs := isapnp.o pnpbios_core.o +multi-objs := isa-pnp.o pnpbios.o -proc-$(CONFIG_PROC_FS) = isapnp_proc.o -isa-pnp-objs := isapnp.o quirks.o $(proc-y) +isa-pnp-proc-$(CONFIG_PROC_FS) = isapnp_proc.o +pnpbios-proc-$(CONFIG_PROC_FS) = pnpbios_proc.o + +isa-pnp-objs := isapnp.o quirks.o $(isa-pnp-proc-y) +pnpbios-objs := pnpbios_core.o $(pnpbios-proc-y) obj-$(CONFIG_ISAPNP) += isa-pnp.o +obj-$(CONFIG_PNPBIOS) += pnpbios.o include $(TOPDIR)/Rules.make isa-pnp.o: $(isa-pnp-objs) $(LD) $(LD_RFLAG) -r -o $@ $(isa-pnp-objs) + +pnpbios.o: $(pnpbios-objs) + $(LD) $(LD_RFLAG) -r -o $@ $(pnpbios-objs) diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/pnp/pnpbios_core.c linux.21rc1-ac1/drivers/pnp/pnpbios_core.c --- linux.21rc1/drivers/pnp/pnpbios_core.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.21rc1-ac1/drivers/pnp/pnpbios_core.c 2003-04-22 16:44:37.000000000 +0100 @@ -0,0 +1,1352 @@ +/* + * PnP BIOS services + * + * Originally (C) 1998 Christian Schmidt + * Modifications (c) 1998 Tom Lees + * Minor reorganizations by David Hinds + * Modifications (c) 2001,2002 by Thomas Hood + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2, or (at your option) any + * later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * References: + * Compaq Computer Corporation, Phoenix Technologies Ltd., Intel Corporation + * Plug and Play BIOS Specification, Version 1.0A, May 5, 1994 + * Plug and Play BIOS Clarification Paper, October 6, 1994 + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +/* + * + * PnP BIOS INTERFACE + * + */ + +/* PnP BIOS signature: "$PnP" */ +#define PNP_SIGNATURE (('$' << 0) + ('P' << 8) + ('n' << 16) + ('P' << 24)) + +#pragma pack(1) +union pnp_bios_expansion_header { + struct { + u32 signature; /* "$PnP" */ + u8 version; /* in BCD */ + u8 length; /* length in bytes, currently 21h */ + u16 control; /* system capabilities */ + u8 checksum; /* all bytes must add up to 0 */ + + u32 eventflag; /* phys. address of the event flag */ + u16 rmoffset; /* real mode entry point */ + u16 rmcseg; + u16 pm16offset; /* 16 bit protected mode entry */ + u32 pm16cseg; + u32 deviceID; /* EISA encoded system ID or 0 */ + u16 rmdseg; /* real mode data segment */ + u32 pm16dseg; /* 16 bit pm data segment base */ + } fields; + char chars[0x21]; /* To calculate the checksum */ +}; +#pragma pack() + +static struct { + u16 offset; + u16 segment; +} pnp_bios_callpoint; + +static union pnp_bios_expansion_header * pnp_bios_hdr = NULL; + +/* The PnP BIOS entries in the GDT */ +#define PNP_GDT (0x0060) +#define PNP_CS32 (PNP_GDT+0x00) /* segment for calling fn */ +#define PNP_CS16 (PNP_GDT+0x08) /* code segment for BIOS */ +#define PNP_DS (PNP_GDT+0x10) /* data segment for BIOS */ +#define PNP_TS1 (PNP_GDT+0x18) /* transfer data segment */ +#define PNP_TS2 (PNP_GDT+0x20) /* another data segment */ + +/* + * These are some opcodes for a "static asmlinkage" + * As this code is *not* executed inside the linux kernel segment, but in a + * alias at offset 0, we need a far return that can not be compiled by + * default (please, prove me wrong! this is *really* ugly!) + * This is the only way to get the bios to return into the kernel code, + * because the bios code runs in 16 bit protected mode and therefore can only + * return to the caller if the call is within the first 64kB, and the linux + * kernel begins at offset 3GB... + */ + +asmlinkage void pnp_bios_callfunc(void); + +__asm__( + ".text \n" + __ALIGN_STR "\n" + SYMBOL_NAME_STR(pnp_bios_callfunc) ":\n" + " pushl %edx \n" + " pushl %ecx \n" + " pushl %ebx \n" + " pushl %eax \n" + " lcallw " SYMBOL_NAME_STR(pnp_bios_callpoint) "\n" + " addl $16, %esp \n" + " lret \n" + ".previous \n" +); + +#define Q_SET_SEL(selname, address, size) \ +set_base (gdt [(selname) >> 3], __va((u32)(address))); \ +set_limit (gdt [(selname) >> 3], size) + +#define Q2_SET_SEL(selname, address, size) \ +set_base (gdt [(selname) >> 3], (u32)(address)); \ +set_limit (gdt [(selname) >> 3], size) + +/* + * At some point we want to use this stack frame pointer to unwind + * after PnP BIOS oopses. + */ + +u32 pnp_bios_fault_esp; +u32 pnp_bios_fault_eip; +u32 pnp_bios_is_utter_crap = 0; + +static spinlock_t pnp_bios_lock; + +static inline u16 call_pnp_bios(u16 func, u16 arg1, u16 arg2, u16 arg3, + u16 arg4, u16 arg5, u16 arg6, u16 arg7, + void *ts1_base, u32 ts1_size, + void *ts2_base, u32 ts2_size) +{ + unsigned long flags; + u16 status; + + /* + * PnP BIOSes are generally not terribly re-entrant. + * Also, don't rely on them to save everything correctly. + */ + if(pnp_bios_is_utter_crap) + return PNP_FUNCTION_NOT_SUPPORTED; + + /* On some boxes IRQ's during PnP BIOS calls are deadly. */ + spin_lock_irqsave(&pnp_bios_lock, flags); + + if (ts1_size) + Q2_SET_SEL(PNP_TS1, ts1_base, ts1_size); + if (ts2_size) + Q2_SET_SEL(PNP_TS2, ts2_base, ts2_size); + + __asm__ __volatile__( + "pushl %%ebp\n\t" + "pushl %%edi\n\t" + "pushl %%esi\n\t" + "pushl %%ds\n\t" + "pushl %%es\n\t" + "pushl %%fs\n\t" + "pushl %%gs\n\t" + "pushfl\n\t" + "movl %%esp, pnp_bios_fault_esp\n\t" + "movl $1f, pnp_bios_fault_eip\n\t" + "lcall %5,%6\n\t" + "1:popfl\n\t" + "popl %%gs\n\t" + "popl %%fs\n\t" + "popl %%es\n\t" + "popl %%ds\n\t" + "popl %%esi\n\t" + "popl %%edi\n\t" + "popl %%ebp\n\t" + : "=a" (status) + : "0" ((func) | (((u32)arg1) << 16)), + "b" ((arg2) | (((u32)arg3) << 16)), + "c" ((arg4) | (((u32)arg5) << 16)), + "d" ((arg6) | (((u32)arg7) << 16)), + "i" (PNP_CS32), + "i" (0) + : "memory" + ); + spin_unlock_irqrestore(&pnp_bios_lock, flags); + + /* If we get here and this is set then the PnP BIOS faulted on us. */ + if(pnp_bios_is_utter_crap) + { + printk(KERN_ERR "PnPBIOS: Warning! Your PnP BIOS caused a fatal error. Attempting to continue.\n"); + printk(KERN_ERR "PnPBIOS: You may need to reboot with the \"pnpbios=off\" option to operate stably.\n"); + printk(KERN_ERR "PnPBIOS: Check with your vendor for an updated BIOS.\n"); + } + + return status; +} + + +/* + * + * UTILITY FUNCTIONS + * + */ + +static void pnpbios_warn_unexpected_status(const char * module, u16 status) +{ + printk(KERN_ERR "PnPBIOS: %s: Unexpected status 0x%x\n", module, status); +} + +void *pnpbios_kmalloc(size_t size, int f) +{ + void *p = kmalloc( size, f ); + if ( p == NULL ) + printk(KERN_ERR "PnPBIOS: kmalloc() failed\n"); + return p; +} + +/* + * Call this only after init time + */ +static inline int pnp_bios_present(void) +{ + return (pnp_bios_hdr != NULL); +} + +/* Forward declaration */ +static void update_devlist( u8 nodenum, struct pnp_bios_node *data ); + + +/* + * + * PnP BIOS ACCESS FUNCTIONS + * + */ + +#define PNP_GET_NUM_SYS_DEV_NODES 0x00 +#define PNP_GET_SYS_DEV_NODE 0x01 +#define PNP_SET_SYS_DEV_NODE 0x02 +#define PNP_GET_EVENT 0x03 +#define PNP_SEND_MESSAGE 0x04 +#define PNP_GET_DOCKING_STATION_INFORMATION 0x05 +#define PNP_SET_STATIC_ALLOCED_RES_INFO 0x09 +#define PNP_GET_STATIC_ALLOCED_RES_INFO 0x0a +#define PNP_GET_APM_ID_TABLE 0x0b +#define PNP_GET_PNP_ISA_CONFIG_STRUC 0x40 +#define PNP_GET_ESCD_INFO 0x41 +#define PNP_READ_ESCD 0x42 +#define PNP_WRITE_ESCD 0x43 + +/* + * Call PnP BIOS with function 0x00, "get number of system device nodes" + */ +static int __pnp_bios_dev_node_info(struct pnp_dev_node_info *data) +{ + u16 status; + if (!pnp_bios_present()) + return PNP_FUNCTION_NOT_SUPPORTED; + status = call_pnp_bios(PNP_GET_NUM_SYS_DEV_NODES, 0, PNP_TS1, 2, PNP_TS1, PNP_DS, 0, 0, + data, sizeof(struct pnp_dev_node_info), 0, 0); + data->no_nodes &= 0xff; + return status; +} + +int pnp_bios_dev_node_info(struct pnp_dev_node_info *data) +{ + int status = __pnp_bios_dev_node_info( data ); + if ( status ) + pnpbios_warn_unexpected_status( "dev_node_info", status ); + return status; +} + +/* + * Note that some PnP BIOSes (e.g., on Sony Vaio laptops) die a horrible + * death if they are asked to access the "current" configuration. + * Therefore, if it's a matter of indifference, it's better to call + * get_dev_node() and set_dev_node() with boot=1 rather than with boot=0. + */ + +/* + * Call PnP BIOS with function 0x01, "get system device node" + * Input: *nodenum = desired node, + * boot = whether to get nonvolatile boot (!=0) + * or volatile current (0) config + * Output: *nodenum=next node or 0xff if no more nodes + */ +static int __pnp_bios_get_dev_node(u8 *nodenum, char boot, struct pnp_bios_node *data) +{ + u16 status; + if (!pnp_bios_present()) + return PNP_FUNCTION_NOT_SUPPORTED; + if ( !boot & pnpbios_dont_use_current_config ) + return PNP_FUNCTION_NOT_SUPPORTED; + status = call_pnp_bios(PNP_GET_SYS_DEV_NODE, 0, PNP_TS1, 0, PNP_TS2, boot ? 2 : 1, PNP_DS, 0, + nodenum, sizeof(char), data, 65536); + return status; +} + +int pnp_bios_get_dev_node(u8 *nodenum, char boot, struct pnp_bios_node *data) +{ + int status; + status = __pnp_bios_get_dev_node( nodenum, boot, data ); + if ( status ) + pnpbios_warn_unexpected_status( "get_dev_node", status ); + return status; +} + + +/* + * Call PnP BIOS with function 0x02, "set system device node" + * Input: *nodenum = desired node, + * boot = whether to set nonvolatile boot (!=0) + * or volatile current (0) config + */ +static int __pnp_bios_set_dev_node(u8 nodenum, char boot, struct pnp_bios_node *data) +{ + u16 status; + if (!pnp_bios_present()) + return PNP_FUNCTION_NOT_SUPPORTED; + if ( !boot & pnpbios_dont_use_current_config ) + return PNP_FUNCTION_NOT_SUPPORTED; + status = call_pnp_bios(PNP_SET_SYS_DEV_NODE, nodenum, 0, PNP_TS1, boot ? 2 : 1, PNP_DS, 0, 0, + data, 65536, 0, 0); + return status; +} + +int pnp_bios_set_dev_node(u8 nodenum, char boot, struct pnp_bios_node *data) +{ + int status; + status = __pnp_bios_set_dev_node( nodenum, boot, data ); + if ( status ) { + pnpbios_warn_unexpected_status( "set_dev_node", status ); + return status; + } + if ( !boot ) { /* Update devlist */ + u8 thisnodenum = nodenum; + status = pnp_bios_get_dev_node( &nodenum, boot, data ); + if ( status ) + return status; + update_devlist( thisnodenum, data ); + } + return status; +} + +#if needed +/* + * Call PnP BIOS with function 0x03, "get event" + */ +static int pnp_bios_get_event(u16 *event) +{ + u16 status; + if (!pnp_bios_present()) + return PNP_FUNCTION_NOT_SUPPORTED; + status = call_pnp_bios(PNP_GET_EVENT, 0, PNP_TS1, PNP_DS, 0, 0 ,0 ,0, + event, sizeof(u16), 0, 0); + return status; +} +#endif + +#if needed +/* + * Call PnP BIOS with function 0x04, "send message" + */ +static int pnp_bios_send_message(u16 message) +{ + u16 status; + if (!pnp_bios_present()) + return PNP_FUNCTION_NOT_SUPPORTED; + status = call_pnp_bios(PNP_SEND_MESSAGE, message, PNP_DS, 0, 0, 0, 0, 0, 0, 0, 0, 0); + return status; +} +#endif + +#ifdef CONFIG_HOTPLUG +/* + * Call PnP BIOS with function 0x05, "get docking station information" + */ +static int pnp_bios_dock_station_info(struct pnp_docking_station_info *data) +{ + u16 status; + if (!pnp_bios_present()) + return PNP_FUNCTION_NOT_SUPPORTED; + status = call_pnp_bios(PNP_GET_DOCKING_STATION_INFORMATION, 0, PNP_TS1, PNP_DS, 0, 0, 0, 0, + data, sizeof(struct pnp_docking_station_info), 0, 0); + return status; +} +#endif + +#if needed +/* + * Call PnP BIOS with function 0x09, "set statically allocated resource + * information" + */ +static int pnp_bios_set_stat_res(char *info) +{ + u16 status; + if (!pnp_bios_present()) + return PNP_FUNCTION_NOT_SUPPORTED; + status = call_pnp_bios(PNP_SET_STATIC_ALLOCED_RES_INFO, 0, PNP_TS1, PNP_DS, 0, 0, 0, 0, + info, *((u16 *) info), 0, 0); + return status; +} +#endif + +/* + * Call PnP BIOS with function 0x0a, "get statically allocated resource + * information" + */ +static int __pnp_bios_get_stat_res(char *info) +{ + u16 status; + if (!pnp_bios_present()) + return PNP_FUNCTION_NOT_SUPPORTED; + status = call_pnp_bios(PNP_GET_STATIC_ALLOCED_RES_INFO, 0, PNP_TS1, PNP_DS, 0, 0, 0, 0, + info, 65536, 0, 0); + return status; +} + +int pnp_bios_get_stat_res(char *info) +{ + int status; + status = __pnp_bios_get_stat_res( info ); + if ( status ) + pnpbios_warn_unexpected_status( "get_stat_res", status ); + return status; +} + +#if needed +/* + * Call PnP BIOS with function 0x0b, "get APM id table" + */ +static int pnp_bios_apm_id_table(char *table, u16 *size) +{ + u16 status; + if (!pnp_bios_present()) + return PNP_FUNCTION_NOT_SUPPORTED; + status = call_pnp_bios(PNP_GET_APM_ID_TABLE, 0, PNP_TS2, 0, PNP_TS1, PNP_DS, 0, 0, + table, *size, size, sizeof(u16)); + return status; +} +#endif + +/* + * Call PnP BIOS with function 0x40, "get isa pnp configuration structure" + */ +static int __pnp_bios_isapnp_config(struct pnp_isa_config_struc *data) +{ + u16 status; + if (!pnp_bios_present()) + return PNP_FUNCTION_NOT_SUPPORTED; + status = call_pnp_bios(PNP_GET_PNP_ISA_CONFIG_STRUC, 0, PNP_TS1, PNP_DS, 0, 0, 0, 0, + data, sizeof(struct pnp_isa_config_struc), 0, 0); + return status; +} + +int pnp_bios_isapnp_config(struct pnp_isa_config_struc *data) +{ + int status; + status = __pnp_bios_isapnp_config( data ); + if ( status ) + pnpbios_warn_unexpected_status( "isapnp_config", status ); + return status; +} + +/* + * Call PnP BIOS with function 0x41, "get ESCD info" + */ +static int __pnp_bios_escd_info(struct escd_info_struc *data) +{ + u16 status; + if (!pnp_bios_present()) + return ESCD_FUNCTION_NOT_SUPPORTED; + status = call_pnp_bios(PNP_GET_ESCD_INFO, 0, PNP_TS1, 2, PNP_TS1, 4, PNP_TS1, PNP_DS, + data, sizeof(struct escd_info_struc), 0, 0); + return status; +} + +int pnp_bios_escd_info(struct escd_info_struc *data) +{ + int status; + status = __pnp_bios_escd_info( data ); + if ( status ) + pnpbios_warn_unexpected_status( "escd_info", status ); + return status; +} + +/* + * Call PnP BIOS function 0x42, "read ESCD" + * nvram_base is determined by calling escd_info + */ +static int __pnp_bios_read_escd(char *data, u32 nvram_base) +{ + u16 status; + if (!pnp_bios_present()) + return ESCD_FUNCTION_NOT_SUPPORTED; + status = call_pnp_bios(PNP_READ_ESCD, 0, PNP_TS1, PNP_TS2, PNP_DS, 0, 0, 0, + data, 65536, (void *)nvram_base, 65536); + return status; +} + +int pnp_bios_read_escd(char *data, u32 nvram_base) +{ + int status; + status = __pnp_bios_read_escd( data, nvram_base ); + if ( status ) + pnpbios_warn_unexpected_status( "read_escd", status ); + return status; +} + +#if needed +/* + * Call PnP BIOS function 0x43, "write ESCD" + */ +static int pnp_bios_write_escd(char *data, u32 nvram_base) +{ + u16 status; + if (!pnp_bios_present()) + return ESCD_FUNCTION_NOT_SUPPORTED; + status = call_pnp_bios(PNP_WRITE_ESCD, 0, PNP_TS1, PNP_TS2, PNP_DS, 0, 0, 0, + data, 65536, nvram_base, 65536); + return status; +} +#endif + + +/* + * + * DOCKING FUNCTIONS + * + */ + +#ifdef CONFIG_HOTPLUG + +static int unloading = 0; +static struct completion unload_sem; + +/* + * (Much of this belongs in a shared routine somewhere) + */ + +static int pnp_dock_event(int dock, struct pnp_docking_station_info *info) +{ + char *argv [3], **envp, *buf, *scratch; + int i = 0, value; + + if (!hotplug_path [0]) + return -ENOENT; + if (!current->fs->root) { + return -EAGAIN; + } + if (!(envp = (char **) pnpbios_kmalloc (20 * sizeof (char *), GFP_KERNEL))) { + return -ENOMEM; + } + if (!(buf = pnpbios_kmalloc (256, GFP_KERNEL))) { + kfree (envp); + return -ENOMEM; + } + + /* only one standardized param to hotplug command: type */ + argv [0] = hotplug_path; + argv [1] = "dock"; + argv [2] = 0; + + /* minimal command environment */ + envp [i++] = "HOME=/"; + envp [i++] = "PATH=/sbin:/bin:/usr/sbin:/usr/bin"; + +#ifdef DEBUG + /* hint that policy agent should enter no-stdout debug mode */ + envp [i++] = "DEBUG=kernel"; +#endif + /* extensible set of named bus-specific parameters, + * supporting multiple driver selection algorithms. + */ + scratch = buf; + + /* action: add, remove */ + envp [i++] = scratch; + scratch += sprintf (scratch, "ACTION=%s", dock?"add":"remove") + 1; + + /* Report the ident for the dock */ + envp [i++] = scratch; + scratch += sprintf (scratch, "DOCK=%x/%x/%x", + info->location_id, info->serial, info->capabilities); + envp[i] = 0; + + value = call_usermodehelper (argv [0], argv, envp); + kfree (buf); + kfree (envp); + return 0; +} + +/* + * Poll the PnP docking at regular intervals + */ +static int pnp_dock_thread(void * unused) +{ + static struct pnp_docking_station_info now; + int docked = -1, d = 0; + daemonize(); + reparent_to_init(); + strcpy(current->comm, "kpnpbiosd"); + while(!unloading && !signal_pending(current)) + { + int status; + + /* + * Poll every 2 seconds + */ + set_current_state(TASK_INTERRUPTIBLE); + schedule_timeout(HZ*2); + if(signal_pending(current)) + break; + + status = pnp_bios_dock_station_info(&now); + + switch(status) + { + /* + * No dock to manage + */ + case PNP_FUNCTION_NOT_SUPPORTED: + complete_and_exit(&unload_sem, 0); + case PNP_SYSTEM_NOT_DOCKED: + d = 0; + break; + case PNP_SUCCESS: + d = 1; + break; + default: + pnpbios_warn_unexpected_status( "pnp_dock_thread", status ); + continue; + } + if(d != docked) + { + if(pnp_dock_event(d, &now)==0) + { + docked = d; +#if 0 + printk(KERN_INFO "PnPBIOS: Docking station %stached\n", docked?"at":"de"); +#endif + } + } + } + complete_and_exit(&unload_sem, 0); +} + +#endif /* CONFIG_HOTPLUG */ + + +/* + * + * NODE DATA PARSING FUNCTIONS + * + */ + +static void add_irqresource(struct pci_dev *dev, int irq) +{ + int i = 0; + while (!(dev->irq_resource[i].flags & IORESOURCE_UNSET) && i < DEVICE_COUNT_IRQ) i++; + if (i < DEVICE_COUNT_IRQ) { + dev->irq_resource[i].start = (unsigned long) irq; + dev->irq_resource[i].flags = IORESOURCE_IRQ; // Also clears _UNSET flag + } +} + +static void add_dmaresource(struct pci_dev *dev, int dma) +{ + int i = 0; + while (!(dev->dma_resource[i].flags & IORESOURCE_UNSET) && i < DEVICE_COUNT_DMA) i++; + if (i < DEVICE_COUNT_DMA) { + dev->dma_resource[i].start = (unsigned long) dma; + dev->dma_resource[i].flags = IORESOURCE_DMA; // Also clears _UNSET flag + } +} + +static void add_ioresource(struct pci_dev *dev, int io, int len) +{ + int i = 0; + while (!(dev->resource[i].flags & IORESOURCE_UNSET) && i < DEVICE_COUNT_RESOURCE) i++; + if (i < DEVICE_COUNT_RESOURCE) { + dev->resource[i].start = (unsigned long) io; + dev->resource[i].end = (unsigned long)(io + len - 1); + dev->resource[i].flags = IORESOURCE_IO; // Also clears _UNSET flag + } +} + +static void add_memresource(struct pci_dev *dev, int mem, int len) +{ + int i = 0; + while (!(dev->resource[i].flags & IORESOURCE_UNSET) && i < DEVICE_COUNT_RESOURCE) i++; + if (i < DEVICE_COUNT_RESOURCE) { + dev->resource[i].start = (unsigned long) mem; + dev->resource[i].end = (unsigned long)(mem + len - 1); + dev->resource[i].flags = IORESOURCE_MEM; // Also clears _UNSET flag + } +} + +static void node_resource_data_to_dev(struct pnp_bios_node *node, struct pci_dev *dev) +{ + unsigned char *p = node->data, *lastp=NULL; + int i; + + /* + * First, set resource info to default values + */ + for (i=0;iresource[i].start = 0; // "disabled" + dev->resource[i].flags = IORESOURCE_UNSET; + } + for (i=0;iirq_resource[i].start = (unsigned long)-1; // "disabled" + dev->irq_resource[i].flags = IORESOURCE_UNSET; + } + for (i=0;idma_resource[i].start = (unsigned long)-1; // "disabled" + dev->dma_resource[i].flags = IORESOURCE_UNSET; + } + + /* + * Fill in dev resource info + */ + while ( (char *)p < ((char *)node->data + node->size )) { + if(p==lastp) break; + + if( p[0] & 0x80 ) {// large item + switch (p[0] & 0x7f) { + case 0x01: // memory + { + int io = *(short *) &p[4]; + int len = *(short *) &p[10]; + add_memresource(dev, io, len); + break; + } + case 0x02: // device name + { + int len = *(short *) &p[1]; + memcpy(dev->name, p + 3, len >= 80 ? 79 : len); + break; + } + case 0x05: // 32-bit memory + { + int io = *(int *) &p[4]; + int len = *(int *) &p[16]; + add_memresource(dev, io, len); + break; + } + case 0x06: // fixed location 32-bit memory + { + int io = *(int *) &p[4]; + int len = *(int *) &p[8]; + add_memresource(dev, io, len); + break; + } + } /* switch */ + lastp = p+3; + p = p + p[1] + p[2]*256 + 3; + continue; + } + if ((p[0]>>3) == 0x0f) // end tag + break; + switch (p[0]>>3) { + case 0x04: // irq + { + int i, mask, irq = -1; + mask= p[1] + p[2]*256; + for (i=0;i<16;i++, mask=mask>>1) + if(mask & 0x01) irq=i; + add_irqresource(dev, irq); + break; + } + case 0x05: // dma + { + int i, mask, dma = -1; + mask = p[1]; + for (i=0;i<8;i++, mask = mask>>1) + if(mask & 0x01) dma=i; + add_dmaresource(dev, dma); + break; + } + case 0x08: // io + { + int io= p[2] + p[3] *256; + int len = p[7]; + add_ioresource(dev, io, len); + break; + } + case 0x09: // fixed location io + { + int io = p[1] + p[2] * 256; + int len = p[3]; + add_ioresource(dev, io, len); + break; + } + } /* switch */ + lastp=p+1; + p = p + (p[0] & 0x07) + 1; + + } /* while */ + + return; +} + + +/* + * + * DEVICE LIST MANAGEMENT FUNCTIONS + * + * + * Some of these are exported to give public access + * + * Question: Why maintain a device list when the PnP BIOS can + * list devices for us? Answer: Some PnP BIOSes can't report + * the current configuration, only the boot configuration. + * The boot configuration can be changed, so we need to keep + * a record of what the configuration was when we booted; + * presumably it continues to describe the current config. + * For those BIOSes that can change the current config, we + * keep the information in the devlist up to date. + * + * Note that it is currently assumed that the list does not + * grow or shrink in size after init time, and slot_name + * never changes. The list is protected by a spinlock. + */ + +static LIST_HEAD(pnpbios_devices); + +static spinlock_t pnpbios_devices_lock; + +static int inline insert_device(struct pci_dev *dev) +{ + + /* + * FIXME: Check for re-add of existing node; + * return -1 if node already present + */ + + /* We don't lock because we only do this at init time */ + list_add_tail(&dev->global_list, &pnpbios_devices); + + return 0; +} + +#define HEX(id,a) hex[((id)>>a) & 15] +#define CHAR(id,a) (0x40 + (((id)>>a) & 31)) +// +static void inline pnpid32_to_pnpid(u32 id, char *str) +{ + const char *hex = "0123456789abcdef"; + + id = be32_to_cpu(id); + str[0] = CHAR(id, 26); + str[1] = CHAR(id, 21); + str[2] = CHAR(id,16); + str[3] = HEX(id, 12); + str[4] = HEX(id, 8); + str[5] = HEX(id, 4); + str[6] = HEX(id, 0); + str[7] = '\0'; + + return; +} +// +#undef CHAR +#undef HEX + +/* + * Build a linked list of pci_devs in order of ascending node number + * Called only at init time. + */ +static void __init build_devlist(void) +{ + u8 nodenum; + unsigned int nodes_got = 0; + unsigned int devs = 0; + struct pnp_bios_node *node; + struct pnp_dev_node_info node_info; + struct pci_dev *dev; + + if (!pnp_bios_present()) + return; + + if (pnp_bios_dev_node_info(&node_info) != 0) + return; + + node = pnpbios_kmalloc(node_info.max_node_size, GFP_KERNEL); + if (!node) + return; + + for(nodenum=0; nodenum<0xff; ) { + u8 thisnodenum = nodenum; + /* We build the list from the "boot" config because + * asking for the "current" config causes some + * BIOSes to crash. + */ + if (pnp_bios_get_dev_node(&nodenum, (char )1 , node)) + break; + nodes_got++; + dev = pnpbios_kmalloc(sizeof (struct pci_dev), GFP_KERNEL); + if (!dev) + break; + memset(dev,0,sizeof(struct pci_dev)); + dev->devfn = thisnodenum; + memcpy(dev->name,"PNPBIOS",8); + pnpid32_to_pnpid(node->eisa_id,dev->slot_name); + node_resource_data_to_dev(node,dev); + if(insert_device(dev)<0) + kfree(dev); + else + devs++; + if (nodenum <= thisnodenum) { + printk(KERN_ERR "PnPBIOS: build_devlist: Node number 0x%x is out of sequence following node 0x%x. Aborting.\n", (unsigned int)nodenum, (unsigned int)thisnodenum); + break; + } + } + kfree(node); + + printk(KERN_INFO "PnPBIOS: %i node%s reported by PnP BIOS; %i recorded by driver\n", + nodes_got, nodes_got != 1 ? "s" : "", devs); +} + +static struct pci_dev *find_device_by_nodenum( u8 nodenum ) +{ + struct pci_dev *dev; + + pnpbios_for_each_dev(dev) { + if(dev->devfn == nodenum) + return dev; + } + + return NULL; +} + +static void update_devlist( u8 nodenum, struct pnp_bios_node *data ) +{ + unsigned long flags; + struct pci_dev *dev; + + spin_lock_irqsave(&pnpbios_devices_lock, flags); + dev = find_device_by_nodenum( nodenum ); + if ( dev ) { + node_resource_data_to_dev(data,dev); + } + spin_unlock_irqrestore(&pnpbios_devices_lock, flags); + + return; +} + + +/* + * + * DRIVER REGISTRATION FUNCTIONS + * + * + * Exported to give public access + * + */ + +static LIST_HEAD(pnpbios_drivers); + +static const struct pnpbios_device_id * +match_device(const struct pnpbios_device_id *ids, const struct pci_dev *dev) +{ + while (*ids->id) + { + if(memcmp(ids->id, dev->slot_name, 7)==0) + return ids; + ids++; + } + return NULL; +} + +static int announce_device(struct pnpbios_driver *drv, struct pci_dev *dev) +{ + const struct pnpbios_device_id *id; + struct pci_dev tmpdev; + int ret; + + if (drv->id_table) { + id = match_device(drv->id_table, dev); + if (!id) + return 0; + } else + id = NULL; + + memcpy( &tmpdev, dev, sizeof(struct pci_dev)); + tmpdev.global_list.prev = NULL; + tmpdev.global_list.next = NULL; + + dev_probe_lock(); + /* Obviously, probe() should not call any pnpbios functions */ + ret = drv->probe(&tmpdev, id); + dev_probe_unlock(); + if (ret < 1) + return 0; + + dev->driver = (void *)drv; + + return 1; +} + +/** + * pnpbios_register_driver - register a new pci driver + * @drv: the driver structure to register + * + * Adds the driver structure to the list of registered drivers + * + * For each device in the pnpbios device list that matches one of + * the ids in drv->id_table, calls the driver's "probe" function with + * arguments (1) a pointer to a *temporary* struct pci_dev containing + * resource info for the device, and (2) a pointer to the id string + * of the device. Expects the probe function to return 1 if the + * driver claims the device (otherwise 0) in which case, marks the + * device as having this driver. + * + * Returns the number of pci devices which were claimed by the driver + * during registration. The driver remains registered even if the + * return value is zero. + */ +int pnpbios_register_driver(struct pnpbios_driver *drv) +{ + struct pci_dev *dev; + unsigned long flags; + int count = 0; + + list_add_tail(&drv->node, &pnpbios_drivers); + spin_lock_irqsave(&pnpbios_devices_lock, flags); + pnpbios_for_each_dev(dev) { + if (!pnpbios_dev_driver(dev)) + count += announce_device(drv, dev); + } + spin_unlock_irqrestore(&pnpbios_devices_lock, flags); + return count; +} + +EXPORT_SYMBOL(pnpbios_register_driver); + +/** + * pnpbios_unregister_driver - unregister a pci driver + * @drv: the driver structure to unregister + * + * Deletes the driver structure from the list of registered PnPBIOS + * drivers, gives it a chance to clean up by calling its "remove" + * function for each device it was responsible for, and marks those + * devices as driverless. + */ +void pnpbios_unregister_driver(struct pnpbios_driver *drv) +{ + unsigned long flags; + struct pci_dev *dev; + + list_del(&drv->node); + spin_lock_irqsave(&pnpbios_devices_lock, flags); + pnpbios_for_each_dev(dev) { + if (dev->driver == (void *)drv) { + if (drv->remove) + drv->remove(dev); + dev->driver = NULL; + } + } + spin_unlock_irqrestore(&pnpbios_devices_lock, flags); +} + +EXPORT_SYMBOL(pnpbios_unregister_driver); + + +/* + * + * RESOURCE RESERVATION FUNCTIONS + * + * + * Used only at init time + * + */ + +static void __init reserve_ioport_range(char *pnpid, int start, int end) +{ + struct resource *res; + char *regionid; + +#if 0 + /* + * TEMPORARY hack to work around the fact that the + * floppy driver inappropriately reserves ioports 0x3f0 and 0x3f1 + * Remove this once the floppy driver is fixed. + */ + if ( + (0x3f0 >= start && 0x3f0 <= end) + || (0x3f1 >= start && 0x3f1 <= end) + ) { + printk(KERN_INFO + "PnPBIOS: %s: ioport range 0x%x-0x%x NOT reserved\n", + pnpid, start, end + ); + return; + } +#endif + + regionid = pnpbios_kmalloc(16, GFP_KERNEL); + if ( regionid == NULL ) + return; + snprintf(regionid, 16, "PnPBIOS %s", pnpid); + res = request_region(start,end-start+1,regionid); + if ( res == NULL ) + kfree( regionid ); + else + res->flags &= ~IORESOURCE_BUSY; + /* + * Failures at this point are usually harmless. pci quirks for + * example do reserve stuff they know about too, so we may well + * have double reservations. + */ + printk(KERN_INFO + "PnPBIOS: %s: ioport range 0x%x-0x%x %s reserved\n", + pnpid, start, end, + NULL != res ? "has been" : "could not be" + ); + + return; +} + +static void __init reserve_resources_of_dev( struct pci_dev *dev ) +{ + int i; + + for (i=0;iresource[i].flags & IORESOURCE_UNSET ) + /* end of resources */ + break; + if (dev->resource[i].flags & IORESOURCE_IO) { + /* ioport */ + if ( dev->resource[i].start == 0 ) + /* disabled */ + /* Do nothing */ + continue; + if ( dev->resource[i].start < 0x100 ) + /* + * Below 0x100 is only standard PC hardware + * (pics, kbd, timer, dma, ...) + * We should not get resource conflicts there, + * and the kernel reserves these anyway + * (see arch/i386/kernel/setup.c). + * So, do nothing + */ + continue; + if ( dev->resource[i].end < dev->resource[i].start ) + /* invalid endpoint */ + /* Do nothing */ + continue; + reserve_ioport_range( + dev->slot_name, + dev->resource[i].start, + dev->resource[i].end + ); + } else if (dev->resource[i].flags & IORESOURCE_MEM) { + /* iomem */ + /* For now do nothing */ + continue; + } else { + /* Neither ioport nor iomem */ + /* Do nothing */ + continue; + } + } + + return; +} + +static void __init reserve_resources( void ) +{ + struct pci_dev *dev; + + pnpbios_for_each_dev(dev) { + if ( + 0 != strcmp(dev->slot_name,"PNP0c01") && /* memory controller */ + 0 != strcmp(dev->slot_name,"PNP0c02") /* system peripheral: other */ + ) { + continue; + } + reserve_resources_of_dev(dev); + } + + return; +} + + +/* + * + * INIT AND EXIT + * + */ + +extern int is_sony_vaio_laptop; + +static int pnpbios_disabled; /* = 0 */ +static int dont_reserve_resources; /* = 0 */ +int pnpbios_dont_use_current_config; /* = 0 */ + +#ifndef MODULE +static int __init pnpbios_setup(char *str) +{ + int invert; + + while ((str != NULL) && (*str != '\0')) { + if (strncmp(str, "off", 3) == 0) + pnpbios_disabled=1; + if (strncmp(str, "on", 2) == 0) + pnpbios_disabled=0; + invert = (strncmp(str, "no-", 3) == 0); + if (invert) + str += 3; + if (strncmp(str, "curr", 4) == 0) + pnpbios_dont_use_current_config = invert; + if (strncmp(str, "res", 3) == 0) + dont_reserve_resources = invert; + str = strchr(str, ','); + if (str != NULL) + str += strspn(str, ", \t"); + } + + return 1; +} + +__setup("pnpbios=", pnpbios_setup); +#endif + +int __init pnpbios_init(void) +{ + union pnp_bios_expansion_header *check; + u8 sum; + int i, length, r; + + spin_lock_init(&pnp_bios_lock); + spin_lock_init(&pnpbios_devices_lock); + + if(pnpbios_disabled) { + printk(KERN_INFO "PnPBIOS: Disabled\n"); + return -ENODEV; + } + + if ( is_sony_vaio_laptop ) + pnpbios_dont_use_current_config = 1; + + /* + * Search the defined area (0xf0000-0xffff0) for a valid PnP BIOS + * structure and, if one is found, sets up the selectors and + * entry points + */ + for (check = (union pnp_bios_expansion_header *) __va(0xf0000); + check < (union pnp_bios_expansion_header *) __va(0xffff0); + ((void *) (check)) += 16) { + if (check->fields.signature != PNP_SIGNATURE) + continue; + length = check->fields.length; + if (!length) + continue; + for (sum = 0, i = 0; i < length; i++) + sum += check->chars[i]; + if (sum) + continue; + if (check->fields.version < 0x10) { + printk(KERN_WARNING "PnPBIOS: PnP BIOS version %d.%d is not supported\n", + check->fields.version >> 4, + check->fields.version & 15); + continue; + } + printk(KERN_INFO "PnPBIOS: Found PnP BIOS installation structure at 0x%p\n", check); + printk(KERN_INFO "PnPBIOS: PnP BIOS version %d.%d, entry 0x%x:0x%x, dseg 0x%x\n", + check->fields.version >> 4, check->fields.version & 15, + check->fields.pm16cseg, check->fields.pm16offset, + check->fields.pm16dseg); + Q2_SET_SEL(PNP_CS32, &pnp_bios_callfunc, 64 * 1024); + Q_SET_SEL(PNP_CS16, check->fields.pm16cseg, 64 * 1024); + Q_SET_SEL(PNP_DS, check->fields.pm16dseg, 64 * 1024); + pnp_bios_callpoint.offset = check->fields.pm16offset; + pnp_bios_callpoint.segment = PNP_CS16; + pnp_bios_hdr = check; + break; + } + if (!pnp_bios_present()) + return -ENODEV; + build_devlist(); + if ( ! dont_reserve_resources ) + reserve_resources(); +#ifdef CONFIG_PROC_FS + r = pnpbios_proc_init(); + if (r) + return r; +#endif + return 0; +} + +static int pnpbios_thread_init(void) +{ +#ifdef CONFIG_HOTPLUG + init_completion(&unload_sem); + if(kernel_thread(pnp_dock_thread, NULL, CLONE_FS | CLONE_FILES | CLONE_SIGNAL)>0) + unloading = 0; +#endif + return 0; +} + +#ifndef MODULE + +/* init/main.c calls pnpbios_init early */ + +/* Start the kernel thread later: */ +module_init(pnpbios_thread_init); + +#else + +/* + * N.B.: Building pnpbios as a module hasn't been fully implemented + */ + +MODULE_LICENSE("GPL"); + +static int pnpbios_init_all(void) +{ + int r; + r = pnpbios_init(); + if (r) + return r; + r = pnpbios_thread_init(); + if (r) + return r; + return 0; +} + +static void __exit pnpbios_exit(void) +{ +#ifdef CONFIG_HOTPLUG + unloading = 1; + wait_for_completion(&unload_sem); +#endif + pnpbios_proc_exit(); + /* We ought to free resources here */ + return; +} + +module_init(pnpbios_init_all); +module_exit(pnpbios_exit); + +#endif diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/pnp/pnpbios_proc.c linux.21rc1-ac1/drivers/pnp/pnpbios_proc.c --- linux.21rc1/drivers/pnp/pnpbios_proc.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.21rc1-ac1/drivers/pnp/pnpbios_proc.c 2003-04-22 16:44:37.000000000 +0100 @@ -0,0 +1,278 @@ +/* + * /proc/bus/pnp interface for Plug and Play devices + * + * Written by David Hinds, dahinds@users.sourceforge.net + * Modified by Thomas Hood, jdthood@mail.com + * + * The .../devices and .../ and .../boot/ files are + * utilized by the lspnp and setpnp utilities, supplied with the + * pcmcia-cs package. + * http://pcmcia-cs.sourceforge.net + * + * The .../escd file is utilized by the lsescd utility written by + * Gunther Mayer. + * http://home.t-online.de/home/gunther.mayer/lsescd + * + * The .../legacy_device_resources file is not used yet. + * + * The other files are human-readable. + */ + +//#include +#define __NO_VERSION__ +//#include + +#include +#include +#include +#include +#include +#include + +static struct proc_dir_entry *proc_pnp = NULL; +static struct proc_dir_entry *proc_pnp_boot = NULL; +static struct pnp_dev_node_info node_info; + +static int proc_read_pnpconfig(char *buf, char **start, off_t pos, + int count, int *eof, void *data) +{ + struct pnp_isa_config_struc pnps; + + if (pnp_bios_isapnp_config(&pnps)) + return -EIO; + return snprintf(buf, count, + "structure_revision %d\n" + "number_of_CSNs %d\n" + "ISA_read_data_port 0x%x\n", + pnps.revision, + pnps.no_csns, + pnps.isa_rd_data_port + ); +} + +static int proc_read_escdinfo(char *buf, char **start, off_t pos, + int count, int *eof, void *data) +{ + struct escd_info_struc escd; + + if (pnp_bios_escd_info(&escd)) + return -EIO; + return snprintf(buf, count, + "min_ESCD_write_size %d\n" + "ESCD_size %d\n" + "NVRAM_base 0x%x\n", + escd.min_escd_write_size, + escd.escd_size, + escd.nv_storage_base + ); +} + +#define MAX_SANE_ESCD_SIZE (32*1024) +static int proc_read_escd(char *buf, char **start, off_t pos, + int count, int *eof, void *data) +{ + struct escd_info_struc escd; + char *tmpbuf; + int escd_size, escd_left_to_read, n; + + if (pnp_bios_escd_info(&escd)) + return -EIO; + + /* sanity check */ + if (escd.escd_size > MAX_SANE_ESCD_SIZE) { + printk(KERN_ERR "PnPBIOS: proc_read_escd: ESCD size reported by BIOS escd_info call is too great\n"); + return -EFBIG; + } + + tmpbuf = pnpbios_kmalloc(escd.escd_size, GFP_KERNEL); + if (!tmpbuf) return -ENOMEM; + + if (pnp_bios_read_escd(tmpbuf, escd.nv_storage_base)) + return -EIO; + + escd_size = (unsigned char)(tmpbuf[0]) + (unsigned char)(tmpbuf[1])*256; + + /* sanity check */ + if (escd_size > MAX_SANE_ESCD_SIZE) { + printk(KERN_ERR "PnPBIOS: proc_read_escd: ESCD size reported by BIOS read_escd call is too great\n"); + return -EFBIG; + } + + escd_left_to_read = escd_size - pos; + if (escd_left_to_read < 0) escd_left_to_read = 0; + if (escd_left_to_read == 0) *eof = 1; + n = min(count,escd_left_to_read); + memcpy(buf, tmpbuf + pos, n); + kfree(tmpbuf); + *start = buf; + return n; +} + +static int proc_read_legacyres(char *buf, char **start, off_t pos, + int count, int *eof, void *data) +{ + /* Assume that the following won't overflow the buffer */ + if (pnp_bios_get_stat_res(buf)) + return -EIO; + + return count; // FIXME: Return actual length +} + +static int proc_read_devices(char *buf, char **start, off_t pos, + int count, int *eof, void *data) +{ + struct pnp_bios_node *node; + u8 nodenum; + char *p = buf; + + if (pos >= 0xff) + return 0; + + node = pnpbios_kmalloc(node_info.max_node_size, GFP_KERNEL); + if (!node) return -ENOMEM; + + for (nodenum=pos; nodenum<0xff; ) { + u8 thisnodenum = nodenum; + /* 26 = the number of characters per line sprintf'ed */ + if ((p - buf + 26) > count) + break; + if (pnp_bios_get_dev_node(&nodenum, 1, node)) + break; + p += sprintf(p, "%02x\t%08x\t%02x:%02x:%02x\t%04x\n", + node->handle, node->eisa_id, + node->type_code[0], node->type_code[1], + node->type_code[2], node->flags); + if (nodenum <= thisnodenum) { + printk(KERN_ERR "%s Node number 0x%x is out of sequence following node 0x%x. Aborting.\n", "PnPBIOS: proc_read_devices:", (unsigned int)nodenum, (unsigned int)thisnodenum); + *eof = 1; + break; + } + } + kfree(node); + if (nodenum == 0xff) + *eof = 1; + *start = (char *)((off_t)nodenum - pos); + return p - buf; +} + +static int proc_read_node(char *buf, char **start, off_t pos, + int count, int *eof, void *data) +{ + struct pnp_bios_node *node; + int boot = (long)data >> 8; + u8 nodenum = (long)data; + int len; + + node = pnpbios_kmalloc(node_info.max_node_size, GFP_KERNEL); + if (!node) return -ENOMEM; + if (pnp_bios_get_dev_node(&nodenum, boot, node)) + return -EIO; + len = node->size - sizeof(struct pnp_bios_node); + memcpy(buf, node->data, len); + kfree(node); + return len; +} + +static int proc_write_node(struct file *file, const char *buf, + unsigned long count, void *data) +{ + struct pnp_bios_node *node; + int boot = (long)data >> 8; + u8 nodenum = (long)data; + + node = pnpbios_kmalloc(node_info.max_node_size, GFP_KERNEL); + if (!node) return -ENOMEM; + if ( pnp_bios_get_dev_node(&nodenum, boot, node) ) + return -EIO; + if (count != node->size - sizeof(struct pnp_bios_node)) + return -EINVAL; + memcpy(node->data, buf, count); + if (pnp_bios_set_dev_node(node->handle, boot, node) != 0) + return -EINVAL; + kfree(node); + return count; +} + +/* + * When this is called, pnpbios functions are assumed to + * work and the pnpbios_dont_use_current_config flag + * should already have been set to the appropriate value + */ +int __init pnpbios_proc_init( void ) +{ + struct pnp_bios_node *node; + struct proc_dir_entry *ent; + char name[3]; + u8 nodenum; + + if (pnp_bios_dev_node_info(&node_info)) + return -EIO; + + proc_pnp = proc_mkdir("pnp", proc_bus); + if (!proc_pnp) + return -EIO; + proc_pnp_boot = proc_mkdir("boot", proc_pnp); + if (!proc_pnp_boot) + return -EIO; + create_proc_read_entry("devices", 0, proc_pnp, proc_read_devices, NULL); + create_proc_read_entry("configuration_info", 0, proc_pnp, proc_read_pnpconfig, NULL); + create_proc_read_entry("escd_info", S_IRUSR, proc_pnp, proc_read_escdinfo, NULL); + create_proc_read_entry("escd", S_IRUSR, proc_pnp, proc_read_escd, NULL); + create_proc_read_entry("legacy_device_resources", 0, proc_pnp, proc_read_legacyres, NULL); + + node = pnpbios_kmalloc(node_info.max_node_size, GFP_KERNEL); + if (!node) + return -ENOMEM; + + for (nodenum=0; nodenum<0xff; ) { + u8 thisnodenum = nodenum; + if (pnp_bios_get_dev_node(&nodenum, 1, node) != 0) + break; + sprintf(name, "%02x", node->handle); + if ( !pnpbios_dont_use_current_config ) { + ent = create_proc_entry(name, 0, proc_pnp); + if (ent) { + ent->read_proc = proc_read_node; + ent->write_proc = proc_write_node; + ent->data = (void *)(long)(node->handle); + } + } + ent = create_proc_entry(name, 0, proc_pnp_boot); + if (ent) { + ent->read_proc = proc_read_node; + ent->write_proc = proc_write_node; + ent->data = (void *)(long)(node->handle+0x100); + } + if (nodenum <= thisnodenum) { + printk(KERN_ERR "%s Node number 0x%x is out of sequence following node 0x%x. Aborting.\n", "PnPBIOS: proc_init:", (unsigned int)nodenum, (unsigned int)thisnodenum); + break; + } + } + kfree(node); + + return 0; +} + +void __exit pnpbios_proc_exit(void) +{ + int i; + char name[3]; + + if (!proc_pnp) return; + + for (i=0; i<0xff; i++) { + sprintf(name, "%02x", i); + if ( !pnpbios_dont_use_current_config ) + remove_proc_entry(name, proc_pnp); + remove_proc_entry(name, proc_pnp_boot); + } + remove_proc_entry("legacy_device_resources", proc_pnp); + remove_proc_entry("escd", proc_pnp); + remove_proc_entry("escd_info", proc_pnp); + remove_proc_entry("configuration_info", proc_pnp); + remove_proc_entry("devices", proc_pnp); + remove_proc_entry("boot", proc_pnp); + remove_proc_entry("pnp", proc_bus); + + return; +} diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/s390/char/con3215.c linux.21rc1-ac1/drivers/s390/char/con3215.c --- linux.21rc1/drivers/s390/char/con3215.c 2003-04-22 16:38:53.000000000 +0100 +++ linux.21rc1-ac1/drivers/s390/char/con3215.c 2003-04-22 16:44:37.000000000 +0100 @@ -897,7 +897,7 @@ raw3215_info *raw; raw = (raw3215_info *) tty->driver_data; - if (raw == NULL || tty->count > 1) + if (raw == NULL || atomic_read(&tty->count) > 1) return; tty->closing = 1; /* Shutdown the terminal */ diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/s390/char/hwc_tty.c linux.21rc1-ac1/drivers/s390/char/hwc_tty.c --- linux.21rc1/drivers/s390/char/hwc_tty.c 2003-04-22 16:38:53.000000000 +0100 +++ linux.21rc1-ac1/drivers/s390/char/hwc_tty.c 2003-04-22 16:44:37.000000000 +0100 @@ -83,7 +83,7 @@ "do not close hwc tty because of wrong device number"); return; } - if (tty->count > 1) + if (atomic_read(&tty->count) > 1) return; hwc_tty_data.tty = NULL; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/s390/Config.in linux.21rc1-ac1/drivers/s390/Config.in --- linux.21rc1/drivers/s390/Config.in 2003-04-22 16:39:39.000000000 +0100 +++ linux.21rc1-ac1/drivers/s390/Config.in 2003-04-22 16:44:37.000000000 +0100 @@ -80,6 +80,7 @@ tristate 'Universal TUN/TAP device driver support' CONFIG_TUN bool 'Ethernet (10 or 100Mbit)' CONFIG_NET_ETHERNET bool 'Token Ring driver support' CONFIG_TR + dep_tristate 'Cisco 7000 support' CONFIG_C7000 m bool 'FDDI driver support' CONFIG_FDDI comment 'S/390 network device drivers' bool 'Channel Device Configuration' CONFIG_CHANDEV diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/s390/net/c7000.c linux.21rc1-ac1/drivers/s390/net/c7000.c --- linux.21rc1/drivers/s390/net/c7000.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.21rc1-ac1/drivers/s390/net/c7000.c 2003-04-22 16:44:37.000000000 +0100 @@ -0,0 +1,3301 @@ +/* + Cisco/7000 driver -- Copyright (C) 2000 UTS Global LLC. + Author: Bob Scardapane (UTS Global LLC). + Version: 3. + + To use this driver, run the LINUX command: + + insmod c7000 base0=0xYYYY lhost0=s1 uhost0=s2 lappl0=s3 uappl0=s4 dbg=x + + base0=0xYYYY defines the base unit address of the interface. + lhost0=s1 defines the local host name. + uhost0=s2 defines the unit host name. + lappl0=s3 defines the local application name. + uappl0=s4 defines the unit application name. + dbg=x defines the message level. Higher values will result in + additional diagnostic messages. + + Additional interfaces are defined on insmod by using the variable + name groups "base1,lhost1,lappl1,uhost1,uappl1", etc... up to three + additional groups. + + In addition, the module will automatically detect the unit base + addresses by scanning all active irq's for a control unit type + of 0x3088 and a model of 0x61 (CLAW mode). The noauto parameter + can be used to suppress automatic detection. + + The values of lhostx, lapplx, uhostx and uapplx default to: + + lapplx - TCPIP + lhostx - UTS + uapplx - TCPIP + uhostx - C7011 + + Note that the values passed in the insmod command will always + override the automatic detection of the unit base addreeses and + the default values of lapplx, lhostx, uapplx and uhostx. + + The parameter noauto can be used to disable automatic detection of + devices: + + noauto=1 (disable automatic detection) + noauto=0 (Enable automatic detectio. This is the default value.) + + The values in base0 - base3 will be copied to the bases array when + the module is loaded. + + To configure the interface(s), run the LINUX command(s): + + ifconfig ci0 ... + ifconfig ci1 ... + ifconfig ci2 ... + ifconfig ci3 ... + + There is one device structure for each controller in the c7000_devices + array. The base address of each controller is in the bases array. + These arrays parallel each other. There is also one c7000_controller + structure for each controller. This structure is pointed to by field + priv in the individual device structure. + + In each c7000_controller, there are embedded c7000_unit structures. + There is one c7000_unit structure per device number that makes up + a controller (currently 2 units per controller). +*/ + +#include +#if defined(CONFIG_MODVERSIONS) && !defined(MODVERSIONS) +#define MODVERSIONS +#endif + +#ifdef MODVERSIONS +#include +#endif + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + Global defines +*/ + +/* + Maximum number of controllers. +*/ + +#define MAX_C7000 4 + +/* + Number of units per controller. +*/ + +#define NUNITS 2 + +/* + Define indexes of read and write units in the cunits array. +*/ + +#define C7000_RD 0 +#define C7000_WR 1 + +/* + Number of device buffers. +*/ + +#define C7000_MAXBUF 40 + +/* + Transmission queue length. +*/ + +#define C7000_TXQUEUE_LEN 100 +/* + Size of the IP packet data. +*/ + +#define C7000_DATAL 4096 + +/* + Size of the read header data. +*/ + +#define C7000_READHDRL 4 + +/* + Size of read flag byte. +*/ + +#define C7000_READFFL 1 + +/* + Size of a device buffer. This is how it is arranged in memory: + 4096 (IP packet data) + 4 (read header) + 1 (read flag) = 4101. +*/ + +#define C7000_BUFSIZE C7000_DATAL + C7000_READHDRL + C7000_READFFL + +/* + Size of sigsmod data. +*/ + +#define C7000_SIGSMODL 1 + +/* + Flag value that indicates a read was completed in the flag + field of a c7000_rd_header. +*/ + +#define FLAG_FF 0xff +/* + Size of C7000 sense id data. +*/ + +#define SIDL 32 + +/* + Maximum number of read and write retries. +*/ + +#define C7000_MAX_RETRIES 3 + +/* + Define sense byte0 value for a box reset. +*/ + +#define C7000_BOX_RESET 0x41 + +/* + CCW commands. +*/ + +#define C7000_WRITE_CCW 0x01 /* normal write */ +#define C7000_READ_CCW 0x02 /* normal read */ +#define C7000_NOOP_CCW 0x03 /* no operation */ +#define C7000_SIGSMOD_CCW 0x05 /* signal status modifier */ +#define C7000_TIC_CCW 0x08 /* transfer in channel */ +#define C7000_READHDR_CCW 0x12 /* read header */ +#define C7000_READFF_CCW 0x22 /* read FF flag */ +#define C7000_SID_CCW 0xe4 /* sense identification */ + +/* + Control commands. +*/ + +#define C7000_SYS_VALIDATE 1 +#define C7000_SYS_VALIDATE_RESP 2 +#define C7000_CONN_REQ 33 +#define C7000_CONN_RESP 34 +#define C7000_CONN_CONFRM 35 +#define C7000_DISCONN 36 +#define C7000_BOXERROR 65 + +/* + State machine values. +*/ + +#define C7000_INIT 1 +#define C7000_HALT 2 +#define C7000_SID 3 +#define C7000_SYSVAL 4 +#define C7000_CONNECT 5 +#define C7000_READY 6 +#define C7000_READ 7 +#define C7000_WRITE 8 +#define C7000_DISC 9 +#define C7000_STOP 10 +#define C7000_STOPPED 11 +#define C7000_ERROR 12 + +/* + The lower subchannel is used for read operations and the one that is + one higher is used for write operations. + + Both subchannels are initially in state C7000_INIT. A transition to + state C7000_HALT occurs when halt_IO is issued on each. When the + halts completes a transition to state C7000_SID occurs and a channel + program is issued to do a sense identification on both subchannels. + + When the sense identification completes, the state C7000_SYSVAL is + entered on the read subchannel. A read channel program is issued. + + When the sense identification completes, the write subchannel enters + state C7000_SYSVAL and a system validation request is written. The + read subchannel is also put into this state. + + When both the system validation response is read and an inbound system + validation request is read, the inbound system validation request is + responded to and both subchannels enter the C7000_CONNECT state. + + A read channel program is posted to look for the inbound connect + request. When that is received a connection confirmation is written. + The state of both subchannels is then changed to C7000_READY. A + read channel program is then posted and the state is changed to + C7000_READ. When a read completes, the packet is sent to the higher + layers and the read channel program is restarted. + + When there is a packet to be written, state C7000_WRITE is entered + and a channel program is issued to write the data. The subchannel + is in state C7000_READY when there is nothing to be written. + + When the stop method is executed, a disconnect message is sent and + the state is changed to C7000_DISC in both subchannels. A halt_IO + will be issued to both subchannels and state C7000_STOP will be entered. + When the halt IO completes, state C7000_STOPPED will be set. + + State C7000_ERROR is set when an error occurs in the interrupt + routine. Recycle the interface (ifconfig down / ifconfig up) + to reset this state. +*/ + +/* + Results from c7000_check_csw. +*/ + +enum c7000_rupt { + C7000_NORMAL, + C7000_CHANERR, + C7000_UCK, + C7000_UCK_RESET, + C7000_UE, + C7000_ATTN, + C7000_BUSY, + C7000_OTHER +}; + +/* + Bits set in device structure tbusy field. +*/ + +#define TB_TX 0 /* sk buffer handling in progress */ +#define TB_STOP 1 /* network device stop in progress */ +#define TB_RETRY 2 /* retry in progress */ +#define TB_NOBUFFER 3 /* no buffer on free queue */ + +/* + Bit in c7000_unit.flag_a that indicates the bh routine is busy. +*/ + +#define C7000_BH_ACTIVE 0 + +#define CPrintk(level, args...) \ + if (level <= dbg) \ + printk(args) + +/* + Maximum length of a system validation string. +*/ + +#define NAMLEN 8 + +#define Err_Conn_Confirm 1 +#define Err_Names_not_Matched 166 +#define Err_C7000_NOT_READY 167 +#define Err_Duplicate 170 +#define Err_Closing 171 +#define Err_No_Such_App 172 +#define Err_Host_Not_Ready 173 +#define Err_CLOSING 174 +#define Err_Dup_Link 175 +#define Err_Wrong_Version 179 +#define Err_Wrong_Frame_Size 180 + +/* + Define a macro to extract the logical link identifier from + the c7000 read header command field. +*/ + +#define C7000_LINKID(cmd) ((unsigned char)cmd >> 3) + +/* + Define the control unit type for a Cisco 7000. +*/ + +#define C7000_CU_TYPE 0x3088 + +/* + Define the control unit model for a Cisco 7000. +*/ + +#define C7000_CU_MODEL 0x61 + +/* + Define the default system validate parameters (lapplx, + lhostx, uapplx, uhostx). +*/ + +#define C7000_DFLT_LAPPL "TCPIP" +#define C7000_DFLT_LHOST "UTS" +#define C7000_DFLT_UAPPL "TCPIP" +#define C7000_DFLT_UHOST "C7011" + +/* + Global variables. +*/ + +/* + Base device addresses of the controllers. +*/ + +static int base0 = -1; +static int base1 = -1; +static int base2 = -1; +static int base3 = -1; + +static int bases[MAX_C7000]; + +/* + Local application names. +*/ + +static char *lappl0; +static char *lappl1; +static char *lappl2; +static char *lappl3; + +/* + Local host names. +*/ + +static char *lhost0; +static char *lhost1; +static char *lhost2; +static char *lhost3; + +/* + Unit application names. +*/ + +static char *uappl0; +static char *uappl1; +static char *uappl2; +static char *uappl3; + +/* + Unit hosts names. +*/ + +static char *uhost0; +static char *uhost1; +static char *uhost2; +static char *uhost3; + +/* + Debugging level (higher numbers emit lower priority messages). +*/ + +static unsigned int dbg = 0; + +/* + Parameter that controls auto detection. +*/ + +static int noauto = 0; + +/* + Interface names. +*/ + +static char ifnames[MAX_C7000][8] = {"ci0", "ci1", "ci2", "ci3"}; + +/* + One device structure per controller. +*/ + +/* RBH Try out the new code for 2.4.0 */ +#define NEWSTUFF + +#ifdef NEWSTUFF +#define STRUCT_NET_DEVICE struct net_device +#else +#define STRUCT_NET_DEVICE struct device +#endif + +STRUCT_NET_DEVICE c7000_devices[MAX_C7000]; + +/* + Scratch variable filled in with controller name. +*/ + +static char *controller; + +/* + Identify parameters that can be passed on the LINUX insmod command. +*/ + +MODULE_AUTHOR("Robert Scardapane (UTS Global)"); +MODULE_DESCRIPTION("Network module for Cisco 7000 box."); + +MODULE_PARM(base0, "1i"); +MODULE_PARM_DESC(base0, "Base unit address for 1st C7000 box."); +MODULE_PARM(base1, "1i"); +MODULE_PARM_DESC(base1, "Base unit address for 2nd C7000 box."); +MODULE_PARM(base2, "1i"); +MODULE_PARM_DESC(base2, "Base unit address for 3rd C7000 box."); +MODULE_PARM(base3, "1i"); +MODULE_PARM_DESC(base3, "Base unit address for 4th C7000 box."); + +MODULE_PARM(lappl0, "s"); +MODULE_PARM_DESC(lappl0, "Application name for 1st C7000 box."); +MODULE_PARM(lappl1, "s"); +MODULE_PARM_DESC(lappl1, "Application name for 2nd C7000 box."); +MODULE_PARM(lappl2, "s"); +MODULE_PARM_DESC(lappl2, "Application name for 3rd C7000 box."); +MODULE_PARM(lappl3, "s"); +MODULE_PARM_DESC(lappl3, "Application name for 4th C7000 box."); + +MODULE_PARM(lhost0, "s"); +MODULE_PARM_DESC(lhost0, "Host name for 1st C7000 box."); +MODULE_PARM(lhost1, "s"); +MODULE_PARM_DESC(lhost1, "Host name for 2nd C7000 box."); +MODULE_PARM(lhost2, "s"); +MODULE_PARM_DESC(lhost2, "Host name for 3rd C7000 box."); +MODULE_PARM(lhost3, "s"); +MODULE_PARM_DESC(lhost3, "Host name for 4th C7000 box."); + +MODULE_PARM(uhost0, "s"); +MODULE_PARM_DESC(uhost0, "Unit name for 1st C7000 box."); +MODULE_PARM(uhost1, "s"); +MODULE_PARM_DESC(uhost1, "Unit name for 2nd C7000 box."); +MODULE_PARM(uhost2, "s"); +MODULE_PARM_DESC(uhost2, "Unit name for 3rd C7000 box."); +MODULE_PARM(uhost3, "s"); +MODULE_PARM_DESC(uhost3, "Unit name for 4th C7000 box."); + +MODULE_PARM(uappl0, "s"); +MODULE_PARM_DESC(uappl0, "Unit application name for 1st C7000 box."); +MODULE_PARM(uappl1, "s"); +MODULE_PARM_DESC(uappl1, "Unit application name for 2nd C7000 box."); +MODULE_PARM(uappl2, "s"); +MODULE_PARM_DESC(uappl2, "Unit application name for 3rd C7000 box."); +MODULE_PARM(uappl3, "s"); +MODULE_PARM_DESC(uappl3, "Unit application name for 4th C7000 box."); + +MODULE_PARM(dbg, "1i"); +MODULE_PARM_DESC(dbg, "Message level for debugging."); + +MODULE_PARM(noauto, "1i"); +MODULE_PARM_DESC(noauto, "Control automatic detection of unit base addresses."); + +/* + Structure used to manage unit buffers. +*/ + +struct c7000_buffer { + ccw1_t ccws[7]; /* channel program */ + struct c7000_buffer *next; /* list pointer */ + char *data; /* pointer to actual data */ + int len; /* length of the data */ +}; + +/* + C7000 Control Block. + */ + +struct c7000_control_blk { + unsigned char cmd; + unsigned char ver; + unsigned char link_id; + unsigned char correlator; + unsigned char ret_code; + unsigned char resvd1[3]; + unsigned char unitname[NAMLEN]; + unsigned char hostname[NAMLEN]; + unsigned short rdsize; /* read frame size */ + unsigned short wrtsize; /* write frame size */ + unsigned char resvd2[4]; +}; + +/* + Per unit structure contained within the c7000_controller structure. +*/ + +struct c7000_unit { + ccw1_t ccws[5]; /* control ccws */ + int devno; /* device number */ + int irq; /* subchannel number */ + int IO_active; /* IO activity flag */ + int state; /* fsm state */ + int retries; /* retry counter */ + unsigned long flag_a; /* bh activity flag */ + devstat_t devstat; /* device status */ +#ifdef NEWSTUFF + wait_queue_head_t wait; /* sleep q head */ +#else + struct wait_queue *wait; /* sleep q pointer */ +#endif + struct c7000_controller *cntlp; /* controller pointer */ + struct c7000_buffer *free; /* free buffer anchor */ + struct c7000_buffer *proc_head; /* proc head */ + struct c7000_buffer *proc_tail; /* proc tail */ + struct c7000_buffer *bh_head; /* bh head */ + struct c7000_buffer *bh_tail; /* bh tail */ + struct tq_struct tq; /* bh scheduling */ + char senseid[SIDL]; /* sense id data */ + struct c7000_control_blk control_blk; /* control block */ + unsigned char sigsmod; /* sigsmod flag */ + unsigned char readhdr[4]; /* read header */ + unsigned char readff; /* readff flag */ +}; + +/* + Private structure pointed to by dev->priv. +*/ + +struct c7000_controller { + struct net_device_stats stats; /* statistics */ + STRUCT_NET_DEVICE *dev; /* -> device struct */ + unsigned int base_addr; /* base address */ + char lappl[NAMLEN]; /* local appl */ + char lhost[NAMLEN]; /* local host */ + char uappl[NAMLEN]; /* unit appl */ + char uhost[NAMLEN]; /* unit host */ + unsigned char version; /* version = 2 */ + unsigned char linkid; /* link id */ + struct c7000_unit cunits[NUNITS]; /* embedded units */ +#ifdef NEWSTUFF + int tbusy; +#endif +}; + +/* + This is the structure returned by the C7000_READHDR_CCW. +*/ + +struct c7000_rd_header { + unsigned short len; /* packet length */ + unsigned char cmd; /* command code */ + unsigned char flag; /* flag */ +}; + +/* + Set the device structure transmission busy flag. +*/ + +#ifdef NEWSTUFF +#define c7000_set_busy(dev) netif_stop_queue(dev) +#else +static __inline__ void +c7000_set_busy(STRUCT_NET_DEVICE *dev) +{ + dev->tbusy = 1; + eieio(); + return; +} +#endif + +/* + Clear the device structure transmission busy flag. +*/ + +#ifdef NEWSTUFF +#define c7000_clear_busy(dev) netif_wake_queue(dev) +#else +static __inline__ void +c7000_clear_busy(STRUCT_NET_DEVICE *dev) +{ + dev->tbusy = 0; + eieio(); + return; +} +#endif + +/* + Extract the device structure transmission busy flag. +*/ + +#ifdef NEWSTUFF +#define c7000_check_busy(dev) netif_queue_stopped(dev) +#else +static __inline__ int +c7000_check_busy(STRUCT_NET_DEVICE *dev) +{ + eieio(); + return(dev->tbusy); +} +#endif + +/* + Set a bit in the device structure transmission busy flag. +*/ + +static __inline__ void +c7000_setbit_busy(int nr, STRUCT_NET_DEVICE *dev) +{ +#ifdef NEWSTUFF + netif_stop_queue(dev); + test_and_set_bit(nr, &((struct c7000_controller *)dev->priv)->tbusy); +#else + set_bit(nr, (void *)&dev->tbusy); +#endif + return; +} + +/* + Clear a bit in the device structure transmission busy flag. +*/ + +static __inline__ void +c7000_clearbit_busy(int nr, STRUCT_NET_DEVICE *dev) +{ +#ifdef NEWSTUFF + clear_bit(nr, &((struct c7000_controller *)dev->priv)->tbusy); + netif_wake_queue(dev); +#else + clear_bit(nr, (void *)&dev->tbusy); +#endif + return; +} + +/* + Test and set a bit in the device structure transmission busy flag. +*/ + +static __inline__ int +c7000_ts_busy(int nr, STRUCT_NET_DEVICE *dev) +{ +#ifdef NEWSTUFF + netif_stop_queue(dev); + return test_and_set_bit(nr, &((struct c7000_controller *)dev->priv)->tbusy); +#else + return(test_and_set_bit(nr, (void *)&dev->tbusy)); +#endif +} + +/* + Set the C7000 controller in the error state. +*/ + +static void +c7000_error(struct c7000_controller *ccp) +{ + int i; + struct c7000_unit *cup; + STRUCT_NET_DEVICE *dev = ccp->dev; + + for (i = 0; i < NUNITS; i++) { + cup = &ccp->cunits[i]; + cup->state = C7000_ERROR; + } + + if (dev != NULL) +#ifdef NEWSTUFF + /* RBH XXX Should we be doing this? */ + dev->state &= ~__LINK_STATE_START; +#else + dev->flags &= ~IFF_RUNNING; +#endif + + CPrintk(0, "c7000: c7000_error: base unit 0x%x is down\n", ccp->base_addr); + return; +} + +/* + Based on the SENSE ID information, fill in the + controller name. Note that this is the SENSE ID + information saved by LINUX/390 at boot time. +*/ + +static int +c7000_check_type(senseid_t *id) +{ + + switch (id->cu_type) { + + case C7000_CU_TYPE: + + if (id->cu_model == C7000_CU_MODEL) { + controller = "C7000 "; + return(0); + } + + break; + + default: + break; + } + + return(-1); +} + +/* + Check the device information for the controller. +*/ + +static int +c7000_check_devices(int devno) +{ + int i; + s390_dev_info_t temp; + + /* + Get the SENSE ID information for each device. + */ + + for (i = devno; i < (devno + NUNITS); i++) { + + if (get_dev_info_by_devno(devno, &temp) != 0) + return(-1); + + if (c7000_check_type(&temp.sid_data) == -1) + return(-1); + } + + CPrintk(1, "c7000: c7000_check_devices: device type is %s\n", controller); + return(0); +} + +/* + Issue a halt I/O to device pointed to by cup. +*/ + +static int +c7000_haltio(struct c7000_unit *cup) +{ + __u32 parm; + __u8 flags = 0x00; + __u32 saveflags; + DECLARE_WAITQUEUE(wait, current); + int rc; + + s390irq_spin_lock_irqsave(cup->irq, saveflags); + parm = (unsigned long)cup; + + if ((rc = halt_IO(cup->irq, parm, flags)) != 0) { + s390irq_spin_unlock_irqrestore(cup->irq, saveflags); + return(rc); + } + + /* + Wait for the halt I/O to finish. + */ + + add_wait_queue(&cup->wait, &wait); + current->state = TASK_UNINTERRUPTIBLE; + s390irq_spin_unlock_irqrestore(cup->irq, saveflags); + schedule(); + remove_wait_queue(&cup->wait, &wait); + return(0); +} + +/* + Issue a start I/O to device pointed to by cup. +*/ + +static int +c7000_doio(struct c7000_unit *cup) +{ + __u32 parm; + __u8 flags = 0x00; + __u32 saveflags; + DECLARE_WAITQUEUE(wait, current); + int rc; + + /* + Do no further I/O while the device is in the ERROR, STOP + or STOPPED state. + */ + + if (cup->state == C7000_ERROR || cup->state == C7000_STOP || cup->state == C7000_STOPPED) + return(-1); + + s390irq_spin_lock_irqsave(cup->irq, saveflags); + parm = (unsigned long)cup; + + if ((rc = do_IO(cup->irq, &cup->ccws[0], parm, 0xff, flags)) != 0) { + s390irq_spin_unlock_irqrestore(cup->irq, saveflags); + return(rc); + } + + /* + Wait for the I/O to complete. + */ + + add_wait_queue(&cup->wait, &wait); + current->state = TASK_UNINTERRUPTIBLE; + s390irq_spin_unlock_irqrestore(cup->irq, saveflags); + schedule(); + remove_wait_queue(&cup->wait, &wait); + + /* + Interrupt handling may have marked the device in ERROR. + */ + + if (cup->state == C7000_ERROR) + return(-1); + + return(0); +} + +/* + Build a channel program to do a sense id channel program. +*/ + +static void +c7000_bld_senseid_chpgm(struct c7000_unit *cup) +{ + ccw1_t *ccwp; + + ccwp = &cup->ccws[0]; + ccwp->cmd_code = C7000_SID_CCW; + ccwp->flags = (CCW_FLAG_SLI | CCW_FLAG_CC); + ccwp->cda = (__u32)virt_to_phys(&cup->senseid); + ccwp->count = SIDL; + ccwp++; + ccwp->cmd_code = C7000_NOOP_CCW; + ccwp->flags = CCW_FLAG_SLI; + ccwp->cda = (__u32)NULL; + ccwp->count = 1; + return; +} + +/* + Build a channel program to write a control message. +*/ + +static void +c7000_bld_wrtctl_chpgm(struct c7000_unit *cup) +{ + ccw1_t *ccwp; + + ccwp = &cup->ccws[0]; + ccwp->cmd_code = C7000_WRITE_CCW; + ccwp->flags = (CCW_FLAG_SLI | CCW_FLAG_CC); + ccwp->cda = (__u32)virt_to_phys(&cup->control_blk); + ccwp->count = sizeof(struct c7000_control_blk); + ccwp++; + ccwp->cmd_code = C7000_READFF_CCW; + ccwp->flags = (CCW_FLAG_SLI | CCW_FLAG_CC); + ccwp->cda = (__u32)virt_to_phys(&cup->readff); + ccwp->count = C7000_READFFL; + ccwp++; + ccwp->cmd_code = C7000_TIC_CCW; + ccwp->flags = 0; + ccwp->cda = (__u32)virt_to_phys(ccwp + 1); + ccwp->count = 0; + ccwp++; + ccwp->cmd_code = C7000_NOOP_CCW; + ccwp->flags = CCW_FLAG_SLI; + ccwp->cda = (__u32)NULL; + ccwp->count = 1; + return; +} + +/* + Build a write channel program to write the indicated buffer. +*/ + +static void +c7000_bld_wrt_chpgm(struct c7000_unit *cup, struct c7000_buffer *buf) +{ + ccw1_t *ccwp; + struct c7000_controller *ccp = cup->cntlp; + + ccwp = &buf->ccws[0]; + ccwp->cmd_code = C7000_WRITE_CCW | (ccp->linkid << 3); + ccwp->flags = (CCW_FLAG_SLI | CCW_FLAG_CC); + ccwp->cda = (__u32)virt_to_phys(buf->data); + ccwp->count = buf->len; + ccwp++; + ccwp->cmd_code = C7000_READFF_CCW; + ccwp->flags = (CCW_FLAG_SLI | CCW_FLAG_CC); + ccwp->cda = (__u32)virt_to_phys(buf->data + C7000_DATAL + C7000_READHDRL); + ccwp->count = C7000_READFFL; + ccwp++; + ccwp->cmd_code = C7000_TIC_CCW; + ccwp->flags = 0; + ccwp->cda = (__u32)virt_to_phys(ccwp + 1); + ccwp->count = 0; + ccwp++; + ccwp->cmd_code = C7000_NOOP_CCW; + ccwp->flags = (CCW_FLAG_SLI); + ccwp->cda = (__u32)NULL; + ccwp->count = 1; + return; +} + +/* + Build a channel program to read a control message. +*/ + +static void +c7000_bld_readctl_chpgm(struct c7000_unit *cup) +{ + ccw1_t *ccwp; + + ccwp = &cup->ccws[0]; + ccwp->cmd_code = C7000_READ_CCW; + ccwp->flags = (CCW_FLAG_SLI | CCW_FLAG_CC); + ccwp->cda = (__u32)virt_to_phys(&cup->control_blk); + ccwp->count = sizeof(struct c7000_control_blk); + ccwp++; + ccwp->cmd_code = C7000_READHDR_CCW; + ccwp->flags = (CCW_FLAG_SLI | CCW_FLAG_CC); + ccwp->cda = (__u32)virt_to_phys(&cup->readhdr); + ccwp->count = C7000_READHDRL; + ccwp++; + ccwp->cmd_code = C7000_SIGSMOD_CCW; + ccwp->flags = (CCW_FLAG_SLI | CCW_FLAG_CC); + ccwp->cda = (__u32)virt_to_phys(&cup->sigsmod); + ccwp->count = C7000_SIGSMODL; + ccwp++; + ccwp->cmd_code = C7000_TIC_CCW; + ccwp->flags = 0; + ccwp->cda = (__u32)virt_to_phys(ccwp + 1); + ccwp->count = 0; + ccwp++; + ccwp->cmd_code = C7000_NOOP_CCW; + ccwp->flags = (CCW_FLAG_SLI); + ccwp->cda = (__u32)NULL; + ccwp->count = 1; + return; +} + +/* + Build a channel program to read the indicated buffer. +*/ + +static void +c7000_bld_read_chpgm(struct c7000_unit *cup, struct c7000_buffer *buf) +{ + ccw1_t *ccwp; + + ccwp = &buf->ccws[0]; + ccwp->cmd_code = C7000_READ_CCW; + ccwp->flags = (CCW_FLAG_SLI | CCW_FLAG_CC); + ccwp->cda = (__u32)virt_to_phys(buf->data); + ccwp->count = C7000_DATAL; + ccwp++; + ccwp->cmd_code = C7000_READHDR_CCW; + ccwp->flags = (CCW_FLAG_SLI | CCW_FLAG_CC); + ccwp->cda = (__u32)virt_to_phys(buf->data + C7000_DATAL); + ccwp->count = C7000_READHDRL; + ccwp++; + ccwp->cmd_code = C7000_SIGSMOD_CCW; + ccwp->flags = (CCW_FLAG_SLI | CCW_FLAG_CC); + ccwp->cda = (__u32)virt_to_phys(&cup->sigsmod); + ccwp->count = C7000_SIGSMODL; + ccwp++; + ccwp->cmd_code = C7000_TIC_CCW; + ccwp->flags = 0; + ccwp->cda = (__u32)virt_to_phys(ccwp + 3); + ccwp->count = 0; + ccwp++; + ccwp->cmd_code = C7000_READFF_CCW; + ccwp->flags = (CCW_FLAG_SLI | CCW_FLAG_CC | CCW_FLAG_PCI); + ccwp->cda = (__u32)virt_to_phys(&cup->readff); + ccwp->count = C7000_READFFL; + ccwp++; + ccwp->cmd_code = C7000_TIC_CCW; + ccwp->flags = 0; + ccwp->cda = (__u32)virt_to_phys(ccwp + 1); + ccwp->count = 0; + ccwp++; + ccwp->cmd_code = C7000_NOOP_CCW; + ccwp->flags = (CCW_FLAG_SLI); + ccwp->cda = (__u32)NULL; + ccwp->count = 1; + return; +} + +/* + Allocate buffer structure headers and buffers for all units + A return value of 0 means that all allocations worked. A -1 + means that an allocation failed. It is expected that the caller + will call c7000_free_buffers when -1 is returned. +*/ + +static int +c7000_alloc_buffers(STRUCT_NET_DEVICE *dev) +{ + int i; + int j; + char *data; + struct c7000_buffer *bufptr; + struct c7000_controller *ccp = (struct c7000_controller *) dev->priv; + struct c7000_unit *cup; + + for (i = 0; i < NUNITS; i++) { + cup = &ccp->cunits[i]; + cup->free = NULL; + + for (j = 0; j < C7000_MAXBUF; j++) { + bufptr = kmalloc(sizeof(struct c7000_buffer), GFP_KERNEL); + data = kmalloc(C7000_BUFSIZE, GFP_KERNEL); + + if (bufptr == NULL) + { + if(data) + kfree(data); + return(-1); + } + + /* + Place filled in buffer header on free anchor. + */ + + bufptr->next = cup->free; + bufptr->data = data; + bufptr->len = 0; + cup->free = bufptr; + + if (data == NULL) + return(-1); + + memset(data, '\0', C7000_BUFSIZE); + } + + } + + CPrintk(1, "c7000: c7000_alloc_buffers: allocated buffers for base unit 0x%lx\n", dev->base_addr); + return(0); +} + +/* + Free buffers on a chain. +*/ + +static void +c7000_free_chain(struct c7000_buffer *buf) +{ + char *data; + struct c7000_buffer *bufptr = buf; + struct c7000_buffer *tmp; + + while (bufptr != NULL) { + data = bufptr->data; + + if (data != NULL) + kfree(data); + + tmp = bufptr; + bufptr = bufptr->next; + kfree(tmp); + } + + return; +} + +/* + Free buffers on all possible chains for all units. +*/ + +static void +c7000_free_buffers(STRUCT_NET_DEVICE *dev) +{ + int i; + struct c7000_controller *ccp = (struct c7000_controller *) dev->priv; + struct c7000_unit *cup; + + for (i = 0; i < NUNITS; i++) { + cup = &ccp->cunits[i]; + c7000_free_chain(cup->free); + cup->free = NULL; + c7000_free_chain(cup->proc_head); + cup->proc_head = cup->proc_tail = NULL; + c7000_free_chain(cup->bh_head); + cup->bh_head = cup->bh_tail = NULL; + } + + CPrintk(1, "c7000: c7000_free_buffers: freed buffers for base unit 0x%lx\n", dev->base_addr); + return; +} + +/* + Obtain a free buffer. Return a pointer to the c7000_buffer + structure OR NULL. +*/ + +struct c7000_buffer * +c7000_get_buffer(struct c7000_unit *cup) +{ + struct c7000_buffer *buf; + + buf = cup->free; + + if (buf == NULL) + return(NULL); + + cup->free = buf->next; + buf->next = NULL; + return(buf); +} + +/* + Release a buffer to the free list. +*/ + +void +c7000_release_buffer(struct c7000_unit *cup, struct c7000_buffer *buf) +{ + struct c7000_buffer *tmp; + + tmp = cup->free; + cup->free = buf; + buf->next = tmp; + return; +} + +/* + Queue a buffer on the end of the processing (proc) chain. +*/ + +void +c7000_queue_buffer(struct c7000_unit *cup, struct c7000_buffer *buf) +{ + buf->next = NULL; + + if (cup->proc_head == NULL) { + cup->proc_head = cup->proc_tail = buf; + return; + } + + cup->proc_tail->next = buf; + cup->proc_tail = buf; + return; +} + +/* + Dequeue a buffer from the start of the processing (proc) chain. +*/ + +struct c7000_buffer * +c7000_dequeue_buffer(struct c7000_unit *cup) +{ + struct c7000_buffer *buf = cup->proc_head; + + if (buf == NULL) + return(NULL); + + cup->proc_head = buf->next; + + if (cup->proc_head == NULL) + cup->proc_tail = NULL; + + buf->next = NULL; + return(buf); +} + +/* + Queue a buffer on the end of the bh routine chain. +*/ + +void +c7000_queue_bh_buffer(struct c7000_unit *cup, struct c7000_buffer *buf) +{ + buf->next = NULL; + + if (cup->bh_head == NULL) { + cup->bh_head = cup->bh_tail = buf; + return; + } + + cup->bh_tail->next = buf; + cup->bh_tail = buf; + return; +} + +/* + Dequeue a buffer from the start of the bh routine chain. +*/ + +struct c7000_buffer * +c7000_dequeue_bh_buffer(struct c7000_unit *cup) +{ + struct c7000_buffer *buf = cup->bh_head; + + if (buf == NULL) + return(NULL); + + cup->bh_head = buf->next; + + if (cup->bh_head == NULL) + cup->bh_tail = NULL; + + buf->next = NULL; + return(buf); +} + +/* + Build up a list of buffers to read. Each buffer is described + by one c7000_buffer structure. The c7000_buffer structure + contains a channel segment that will read that one buffer. + The channel program segments are chained together via TIC + CCWS. +*/ + +static int +c7000_bld_read_chain(struct c7000_unit *cup) +{ + struct c7000_buffer *buf, *pbuf = NULL; + struct c7000_rd_header *head; + int num = 0; + + while (cup->free != NULL) { + + /* + Obtain a buffer for a read channel segment. + */ + + if ((buf = c7000_get_buffer(cup)) == NULL) { + CPrintk(0, "c7000: c7000_bld_read_chain: can not obtain a read buffer for unit 0x%x\n", cup->devno); + return(-ENOMEM); + } + + num++; + buf->len = 0; + + /* + Clear out the read header flag. + */ + + head = (struct c7000_rd_header *)(buf->data + C7000_DATAL); + head->flag = 0x00; + c7000_queue_buffer(cup, buf); + + /* + Build the read channel program segment. + */ + + c7000_bld_read_chpgm(cup, buf); + + /* + Chain the prior (if any) channel program segment to + this one. + */ + + if (pbuf != NULL) + pbuf->ccws[3].cda = pbuf->ccws[5].cda = (__u32)virt_to_phys(&buf->ccws[0]); + + pbuf = buf; + } + + CPrintk(1, "c7000: c7000_bld_read_chain: chained %d buffers for unit 0x%x\n", num, cup->devno); + return(0); +} + +/* + Build up a list of buffers to write. Each buffer is described + by one c7000_buffer structure. The c7000_buffer structure + contains a channel segment that will write that one buffer. + The channel program segments are chained together via TIC + CCWS. +*/ + +static void +c7000_bld_wrt_chain(struct c7000_unit *cup) +{ + struct c7000_buffer *buf = cup->proc_head, *pbuf = NULL; + int num = 0; + + while (buf != NULL) { + c7000_bld_wrt_chpgm(cup, buf); + + /* + Chain the channel program segments together. + */ + + if (pbuf != NULL) + pbuf->ccws[2].cda = (__u32)virt_to_phys(&buf->ccws[0]); + + pbuf = buf; + buf = buf->next; + num++; + } + + CPrintk(1, "c7000: c7000_bld_wrt_chain: chained %d buffers for unit 0x%x\n", num, cup->devno); + return; +} + +/* + Interrupt handler bottom half (bh) routine. + Process all of the buffers on the c7000_unit bh chain. + The bh chain is populated by the interrupt routine when + a READ channel program completes on a buffer. +*/ + +static void +c7000_irq_bh(struct c7000_unit *cup) +{ + struct c7000_buffer *buf, *pbuf; + struct c7000_rd_header *head; + struct sk_buff *skb; + struct c7000_controller *ccp; + STRUCT_NET_DEVICE *dev; + int rc; + __u16 data_length; + __u32 parm; + __u8 flags = 0x00; + __u32 saveflags; + + ccp = cup->cntlp; + dev = ccp->dev; + + s390irq_spin_lock_irqsave(cup->irq, saveflags); + + /* + Process all buffers sent to bh by the interrupt routine. + */ + + while (cup->bh_head != NULL) { + buf = c7000_dequeue_bh_buffer(cup); + + /* + Deference the data as a c7000 header. + */ + + head = (struct c7000_rd_header *)(buf->data + C7000_DATAL); + + /* + If it is a control message, release the buffer and + continue the loop. + */ + + if (C7000_LINKID(head->cmd) == 0) { + CPrintk(0, "c7000: c7000_irq_bh: unexpected control command %d on unit 0x%x\n", head->cmd, cup->devno); + c7000_release_buffer(cup, buf); + continue; + } + + /* + Allocate a socket buffer. + */ + + data_length = head->len; + skb = dev_alloc_skb(data_length); + + /* + Copy the data to the skb. + Send it to the upper layers. + */ + + if (skb != NULL) { + memcpy(skb_put(skb, data_length), buf->data, data_length); + skb->dev = dev; + skb->protocol = htons(ETH_P_IP); + skb->pkt_type = PACKET_HOST; + skb->mac.raw = skb->data; + skb->ip_summed = CHECKSUM_UNNECESSARY; + netif_rx(skb); + ccp->stats.rx_packets++; + } else { + CPrintk(0, "c7000: c7000_irq_bh: can not allocate a skb for unit 0x%x\n", cup->devno); + ccp->stats.rx_dropped++; + } + + /* + Rechain the buffer on the processing list. + */ + + head->flag = 0x00; + buf->len = 0; + pbuf = cup->proc_tail; + c7000_queue_buffer(cup, buf); + + /* + Rechain the buffer on the running channel program. + */ + + if (pbuf != NULL) + pbuf->ccws[3].cda = pbuf->ccws[5].cda = (__u32)virt_to_phys(&buf->ccws[0]); + + } + + /* + Restart the READ channel program if IO_active is 0. + */ + + if (test_and_set_bit(0, (void *)&cup->IO_active) == 0) { + + if ((rc = c7000_bld_read_chain(cup)) != 0) { + CPrintk(0, "c7000: c7000_irq_bh: can not build read chain for unit 0x%x, return code %d\n", cup->devno, rc); + c7000_error(cup->cntlp); + clear_bit(C7000_BH_ACTIVE, (void *)&cup->flag_a); + s390irq_spin_unlock_irqrestore(cup->irq, saveflags); + return; + } + + parm = (__u32)cup; + cup->state = C7000_READ; + + if ((rc = do_IO(cup->irq, &cup->proc_head->ccws[0], parm, 0xff, flags)) != 0) { + CPrintk(0, "c7000: c7000_irq_bh: can not start READ IO to unit 0x%x, return code %d\n", cup->devno, rc); + c7000_error(cup->cntlp); + clear_bit(C7000_BH_ACTIVE, (void *)&cup->flag_a); + s390irq_spin_unlock_irqrestore(cup->irq, saveflags); + return; + } + + CPrintk(1, "c7000: c7000_irq_bh: started READ IO to unit 0x%x\n", cup->devno); + } + + /* + Clear the bh active indication. + */ + + clear_bit(C7000_BH_ACTIVE, (void *)&cup->flag_a); + s390irq_spin_unlock_irqrestore(cup->irq, saveflags); + return; +} + +/* + Send a system validate control command to a unit. +*/ + +static int +c7000_send_sysval(struct c7000_unit *cup) +{ + int rc; + struct c7000_controller *ccp = cup->cntlp; + struct c7000_control_blk *ctlblkp = &(cup->control_blk); + + CPrintk(1, "c7000: c7000_send_sysval: send sysval for device 0x%x\n", cup->devno); + + /* + Build the system validate control message. + */ + + memset(ctlblkp, '\0', sizeof(struct c7000_control_blk)); + ctlblkp->cmd = C7000_SYS_VALIDATE; + ctlblkp->correlator = 0; + ctlblkp->link_id = ccp->linkid; + ctlblkp->ver = ccp->version; + memcpy(ctlblkp->hostname, ccp->lhost, NAMLEN); + memcpy(ctlblkp->unitname, ccp->uhost, NAMLEN); + ctlblkp->rdsize = C7000_DATAL; + ctlblkp->wrtsize = C7000_DATAL; + + /* + Build the channel program. + */ + + c7000_bld_wrtctl_chpgm(cup); + + /* + Do the IO and wait for write to complete. + */ + + if ((rc = c7000_doio(cup)) != 0) { + CPrintk(0, "c7000: c7000_send_sysval failed with rc = %d for unit 0x%x\n", rc, cup->devno); + return(-1); + } + + return(0); +} + +/* + Send a system validate response control command to a unit. +*/ + +static int +c7000_send_sysval_resp(struct c7000_unit *cup, unsigned char correlator, int ret_code) +{ + int rc; + struct c7000_controller *ccp = cup->cntlp; + struct c7000_control_blk *ctlblkp = &(cup->control_blk); + + CPrintk(1, "c7000: c7000_send_sysval_resp: send sysval response for device 0x%x\n", cup->devno); + + /* + Build the system validate response control message. + */ + + memset(ctlblkp, '\0', sizeof(struct c7000_control_blk)); + ctlblkp->cmd = C7000_SYS_VALIDATE_RESP; + ctlblkp->correlator = correlator; + ctlblkp->ret_code = ret_code; + ctlblkp->link_id = ccp->linkid; + ctlblkp->ver = ccp->version; + memcpy(ctlblkp->hostname, ccp->lhost, NAMLEN); + memcpy(ctlblkp->unitname, ccp->uhost, NAMLEN); + ctlblkp->rdsize = C7000_DATAL; + ctlblkp->wrtsize = C7000_DATAL; + + /* + Build the channel program. + */ + + c7000_bld_wrtctl_chpgm(cup); + + /* + Do the IO and wait for write to complete. + */ + + if ((rc = c7000_doio(cup)) != 0) { + CPrintk(0, "c7000: c7000_send_sysval_resp failed with rc = %d for unit 0x%x\n", rc, cup->devno); + return(-1); + } + + return(0); +} + +/* + Check the information read in a SYS_VALIDATE control message. +*/ + +static int +c7000_checkinfo(struct c7000_unit *cup) +{ + struct c7000_controller *ccp = cup->cntlp; + struct c7000_control_blk *ctlblkp = &cup->control_blk; + int ret_code = 0; + + if (memcmp(ccp->lhost, ctlblkp->hostname, NAMLEN) || + memcmp(ccp->uhost, ctlblkp->unitname, NAMLEN)) + ret_code = Err_Names_not_Matched; + + if (ctlblkp->ver != ccp->version) + ret_code = Err_Wrong_Version; + + if ((ctlblkp->rdsize < C7000_DATAL) || (ctlblkp->wrtsize < C7000_DATAL)) + ret_code = Err_Wrong_Frame_Size; + + if (ret_code != 0) + CPrintk(0, "c7000: c7000_checkinfo: ret_code %d for device 0x%x\n", ret_code, cup->devno); + + return(ret_code); +} + +/* + Keep reading until a sysval response comes in or an error. +*/ + +static int +c7000_get_sysval_resp(struct c7000_unit *cup) +{ + struct c7000_controller *ccp = cup->cntlp; + int resp = 1; + int req = 1; + int rc; + int ret_code = 0; + + CPrintk(1, "c7000: c7000_get_sysval_resp: get sysval response for unit 0x%x\n", cup->devno); + + /* + Wait for the response to C7000_SYS_VALIDATE and for an + inbound C7000_SYS_VALIDATE. + */ + + while (resp || req) { + + /* + Build the read channel program. + */ + + c7000_bld_readctl_chpgm(cup); + + if ((rc = c7000_doio(cup)) != 0) { + CPrintk(0, "c7000: c7000_get_sysval_resp: failed with rc = %d for unit 0x%x\n", rc, cup->devno); + return(-1); + } + + /* + Process the control message. + */ + + switch (cup->control_blk.cmd) { + + /* + Check that response is positive and return + with success. Otherwise, return with an + error. + */ + + case C7000_SYS_VALIDATE_RESP: + + if (cup->control_blk.ret_code == 0) + resp = 0; + else { + CPrintk(0, "c7000: c7000_get_sysval_resp: receive sysval response for device 0x%x, return code %d\n", + cup->devno, + cup->control_blk.ret_code); + return(-1); + } + + break; + + /* + Check that the request is reasonable and + send a SYS_VALIDATE_RESP. Otherwise, + return with an error. + */ + + case C7000_SYS_VALIDATE: + CPrintk(1, "c7000: c7000_get_sysval_resp: receive sysval for device 0x%x\n", cup->devno); + req = 0; + ret_code = c7000_checkinfo(cup); + + if (c7000_send_sysval_resp(&ccp->cunits[C7000_WR], cup->control_blk.correlator, ret_code) != 0) + return(-1); + + if (ret_code != 0) + return(-1); + + break; + + /* + Anything else is unexpected and will result + in a return with an error. + */ + + default: + CPrintk(0, "c7000: c7000_get_sysval_resp: receive unexpected command for device 0x%x, command %d\n", cup->devno, cup->control_blk.cmd); + return(-1); + break; + } + + } + + return(0); +} + +/* + Send a connection confirm control message. +*/ + +static int +c7000_conn_confrm(struct c7000_unit *cup, unsigned char correlator, int linkid) +{ + int rc; + struct c7000_controller *ccp = cup->cntlp; + struct c7000_control_blk *ctlblkp = &(cup->control_blk); + + CPrintk(1, "c7000: c7000_conn_confrm: send the connection confirmation message for unit 0x%x\n", cup->devno); + + /* + Build the connection confirm control message. + */ + + memset(ctlblkp, '\0', sizeof(struct c7000_control_blk)); + ctlblkp->cmd = C7000_CONN_CONFRM; + ctlblkp->ver = ccp->version; + ctlblkp->link_id = linkid; + ctlblkp->correlator = correlator; + ctlblkp->rdsize = 0; + ctlblkp->wrtsize = 0; + memcpy(ctlblkp->hostname, ccp->lappl, NAMLEN); + memcpy(ctlblkp->unitname, ccp->uappl, NAMLEN); + + /* + Build the channel program. + */ + + c7000_bld_wrtctl_chpgm(cup); + + /* + Do the IO and wait for write to complete. + */ + + if ((rc = c7000_doio(cup)) != 0) { + CPrintk(0, "c7000: c7000_conn_confrm: failed with rc = %d for unit 0x%x\n", rc, cup->devno); + return(-1); + } + + return(0); +} + +/* + Send a connection request control message. +*/ + +static int +c7000_send_conn(struct c7000_unit *cup) +{ + int rc; + struct c7000_controller *ccp = cup->cntlp; + struct c7000_control_blk *ctlblkp = &(cup->control_blk); + + CPrintk(1, "c7000: c7000_send_conn: send the connection request message for unit 0x%x\n", cup->devno); + + /* + Build the connection request control message. + */ + + memset(ctlblkp, '\0', sizeof(struct c7000_control_blk)); + ctlblkp->cmd = C7000_CONN_REQ; + ctlblkp->ver = ccp->version; + ctlblkp->link_id = 0; + ctlblkp->correlator = 0; + ctlblkp->rdsize = C7000_DATAL; + ctlblkp->wrtsize = C7000_DATAL; + memcpy(ctlblkp->hostname, ccp->lappl, NAMLEN); + memcpy(ctlblkp->unitname, ccp->uappl, NAMLEN); + + /* + Build the channel program. + */ + + c7000_bld_wrtctl_chpgm(cup); + + /* + Do the IO and wait for write to complete. + */ + + if ((rc = c7000_doio(cup)) != 0) { + CPrintk(0, "c7000: c7000_send_conn: failed with rc = %d for unit 0x%x\n", rc, cup->devno); + return(-1); + } + + return(0); +} + +/* + Send a disconnect control message to the link with the value of + linkid. +*/ + +static int +c7000_send_disc(struct c7000_unit *cup, int linkid) +{ + int rc; + struct c7000_controller *ccp = cup->cntlp; + struct c7000_control_blk *ctlblkp = &(cup->control_blk); + + CPrintk(1, "c7000: c7000_send_disc: send disconnect message for unit 0x%x\n", cup->devno); + + /* + Build the disconnect control message. + */ + + memset(ctlblkp, '\0', sizeof(struct c7000_control_blk)); + ctlblkp->cmd = C7000_DISCONN; + ctlblkp->ver = ccp->version; + ctlblkp->link_id = linkid; + ctlblkp->correlator = 0; + ctlblkp->rdsize = C7000_DATAL; + ctlblkp->wrtsize = C7000_DATAL; + memcpy(ctlblkp->hostname, ccp->lappl, NAMLEN); + memcpy(ctlblkp->unitname, ccp->uappl, NAMLEN); + + /* + Build the channel program. + */ + + c7000_bld_wrtctl_chpgm(cup); + + /* + Do the IO and wait for write to complete. + */ + + if ((rc = c7000_doio(cup)) != 0) { + CPrintk(0, "c7000: c7000_send_disc: failed with rc = %d for unit 0x%x\n", rc, cup->devno); + return(-1); + } + + return(0); +} + +/* + Resolve the race condition based on the link identifier value. + The adapter microcode assigns the identifiers. A higher value implies + that the race was lost. A side effect of this function is that + ccp->linkid is set to the link identifier to be used for this + connection (provided that 0 is returned). +*/ + +static int +c7000_resolve_race(struct c7000_unit *cup, int local_linkid, int remote_linkid) +{ + struct c7000_controller *ccp = cup->cntlp; + + CPrintk(1, "c7000: c7000_resolve_race: for unit 0x%x, local linkid %d, remote linkid %d\n", cup->devno, local_linkid, remote_linkid); + + /* + This local link identifier should not be zero.. + */ + + if (local_linkid == 0) { + CPrintk(0, "c7000: c7000_resolve_race: error for unit 0x%x, local linkid is null\n", cup->devno); + return(-1); + } + + /* + This indicates that there is no race. Just use our + local link identifier. + */ + + if (remote_linkid == 0) { + ccp->linkid = local_linkid; + return(0); + } + + /* + Send a connection confirm message if we lost the race to + the winning link identifier. + + Either way, save the winning link identifier. + */ + + if (local_linkid > remote_linkid) { + + if (c7000_conn_confrm(&ccp->cunits[C7000_WR], cup->control_blk.correlator, remote_linkid) != 0) { + CPrintk(0, "c7000: c7000_resolve_race: failed for unit 0x%x\n", cup->devno); + return(-1); + } + + ccp->linkid = remote_linkid; + } else { + ccp->linkid = local_linkid; + } + + return(0); +} + +/* + Get connected by processing the connection request/response/confirm + control messages. A connection request has already been sent by + calling function c7000_send_conn. +*/ + +static int +c7000_get_conn(struct c7000_unit *cup) +{ + struct c7000_controller *ccp = cup->cntlp; + int rc; + int cont = 1; + int remote_linkid = 0; + int local_linkid = 0; + + CPrintk(1, "c7000: c7000_get_conn: read the connected message for unit 0x%x\n", cup->devno); + ccp->linkid = 0; + + while (cont == 1) { + + /* + Build the read channel program. + */ + + c7000_bld_readctl_chpgm(cup); + + /* + Start the channel program to read a control message. + */ + + if ((rc = c7000_doio(cup)) != 0) { + CPrintk(0, "c7000: c7000_get_conn: failed with rc = %d for unit 0x%x\n", rc, cup->devno); + return(-1); + } + + /* + Process the control message that was received based + on the command code. + */ + + CPrintk(1, "c7000: c7000_get_conn: received command %d for unit 0x%x\n", cup->control_blk.cmd, cup->devno); + + switch(cup->control_blk.cmd) { + + /* + Save the remote link_id in the message for + a check in c7000_resolve_race. + */ + + case C7000_CONN_REQ: + remote_linkid = cup->control_blk.link_id; + break; + + /* + A connection response received. Resolve + the network race condition (if any) by + comparing the link identifier values. + */ + + case C7000_CONN_RESP: + + if (cup->control_blk.ret_code != 0) { + CPrintk(0, "c7000: c7000_get_conn: failed for unit 0x%x , connection response return code %d\n", + cup->devno, cup->control_blk.ret_code); + return(-1); + } + + local_linkid = cup->control_blk.link_id; + + if (c7000_resolve_race(cup, local_linkid, remote_linkid) != 0) + return(-1); + + break; + + /* + Got a confirmation to our connection request. + Disconnect the remote link identifier (if any). + Break out of the loop. + */ + + case C7000_CONN_CONFRM: + + if (remote_linkid != 0) { + + if (c7000_send_disc(&ccp->cunits[C7000_WR], remote_linkid) != 0) { + CPrintk(0, "c7000: c7000_get_conn: send disconnect failed for unit 0x%x\n", cup->devno); + return(-1); + } + + } + + cont = 0; + break; + + /* + Got a disconnect to our connection request. + Break out of the loop. + */ + + case C7000_DISCONN: + cont = 0; + break; + + /* + Anything else must be an error. + Return with an error immediately. + */ + + default: + CPrintk(0, "c7000: c7000_get_conn: failed for unit 0x%x unexpected command %d\n", + cup->devno, cup->control_blk.cmd); + return(-1); + } + + } + + /* + Be sure that we now have a link identifier. + */ + + if (ccp->linkid == 0) + return(-1); + + return(0); +} + +/* + Get statistics method. +*/ + +struct net_device_stats * +c7000_stats(STRUCT_NET_DEVICE *dev) +{ + struct c7000_controller *ccp = (struct c7000_controller *)dev->priv; + + return(&ccp->stats); +} + +/* + Open method. +*/ + +static int +c7000_open(STRUCT_NET_DEVICE *dev) +{ + int i; + struct c7000_controller *ccp = (struct c7000_controller *)dev->priv; + struct c7000_unit *cup; + int rc; + __u32 parm; + __u8 flags = 0x00; + + c7000_set_busy(dev); + + /* + Allocate space for the unit buffers. + */ + + if (c7000_alloc_buffers(dev) == -1) { + CPrintk(0, "c7000: c7000_open: can not allocate buffer space for base unit 0x%lx\n", dev->base_addr); + c7000_free_buffers(dev); /* free partially allocated buffers */ + c7000_clear_busy(dev); + return(-ENOMEM); + } + + /* + Perform the initialization for all units. + */ + + for (i = 0; i < NUNITS; i++) { + cup = &ccp->cunits[i]; + + /* + Initialize task queue structure used for the bottom + half routine. + */ + +#ifndef NEWSTUFF + cup->tq.next = NULL; +#endif + cup->tq.sync = 0; + cup->tq.routine = (void *)(void *)c7000_irq_bh; + cup->tq.data = cup; + cup->state = C7000_HALT; +#ifdef NEWSTUFF + init_waitqueue_head(&cup->wait); +#endif + CPrintk(1, "c7000: c7000_open: issuing halt to unit 0x%x\n", cup->devno); + + /* + Issue a halt I/O to the unit + */ + + if ((rc = c7000_haltio(cup)) != 0) { + CPrintk(0, "c7000: c7000_open: halt_IO failed with rc = %d for unit 0x%x\n", rc, cup->devno); + continue; + } + + cup->IO_active = 0; + cup->flag_a = 0; + cup->sigsmod = 0x00; + + CPrintk(1, "c7000: c7000_open: halt complete for unit 0x%x\n", cup->devno); + } + + /* + On each subchannel send a sense id. + */ + + for (i = 0; i < NUNITS; i++) { + cup = &ccp->cunits[i]; + + /* + Build SENSE ID channel program. + */ + + c7000_bld_senseid_chpgm(cup); + + /* + Issue the start I/O for SENSE ID channel program. + */ + + CPrintk(1, "c7000: c7000_open: issuing SENSEID to unit 0x%x\n", cup->devno); + + if ((rc = c7000_doio(cup)) != 0) { + CPrintk(0, "c7000: c7000_open: SENSEID failed with rc = %d for unit 0x%x\n", rc, cup->devno); + c7000_clear_busy(dev); + return(-EIO); + } + + CPrintk(1, "c7000: c7000_open: SENSEID complete for unit 0x%x\n", cup->devno); + } + + /* + Send the system validation control message. + */ + + cup = &ccp->cunits[C7000_WR]; + + if (c7000_send_sysval(cup) != 0) { + CPrintk(0, "c7000: c7000_open: can not send sysval for unit 0x%x\n", cup->devno); + c7000_clear_busy(dev); + return(-EIO); + } + + CPrintk(1, "c7000: c7000_open: successfully sent sysval for unit 0x%x\n", cup->devno); + /* + Get the system validation response message. + */ + + cup = &ccp->cunits[C7000_RD]; + + if (c7000_get_sysval_resp(cup) != 0) { + CPrintk(0, "c7000: c7000_open: can not read sysval response for unit 0x%x\n", cup->devno); + c7000_clear_busy(dev); + return(-EIO); + } + + CPrintk(1, "c7000: c7000_open: successfully received sysval reply for unit 0x%x\n", cup->devno); + ccp->cunits[C7000_RD].state = ccp->cunits[C7000_WR].state = C7000_CONNECT; + + cup = &ccp->cunits[C7000_WR]; + + /* + Send a connection request. + */ + + if (c7000_send_conn(cup) != 0) { + CPrintk(0, "c7000: c7000_open: connection failed for unit 0x%x\n", cup->devno); + c7000_clear_busy(dev); + return(-EIO); + } + + cup = &ccp->cunits[C7000_RD]; + + /* + Get the response to our connection request Note that a + network race may occur. This is handled in c7000_get_conn. + */ + + if (c7000_get_conn(cup) != 0) { + CPrintk(0, "c7000: c7000_open: unit 0x%x has connected\n", cup->devno); + c7000_clear_busy(dev); + return(-EIO); + } + + CPrintk(1, "c7000: c7000_open: successfully received connection request for unit 0x%x\n", cup->devno); + ccp->cunits[C7000_RD].state = ccp->cunits[C7000_WR].state = C7000_READY; + + /* + Clear the interface statistics. + */ + + memset(&ccp->stats, '\0', sizeof(struct net_device_stats)); + + if ((rc = c7000_bld_read_chain(cup)) != 0) { + c7000_clear_busy(dev); + return(rc); + } + + /* + Start the C7000_READ channel program but do not wait for it's + completion. + */ + + cup->state = C7000_READ; + parm = (__u32) cup; + set_bit(0, (void *)&cup->IO_active); + + if ((rc = do_IO(cup->irq, &cup->proc_head->ccws[0], parm, 0xff, flags)) != 0) { + CPrintk(0, "c7000: c7000_open: READ failed with return code %d for unit 0x%x\n", rc, cup->devno); + c7000_error(cup->cntlp); + clear_bit(0, (void *)&cup->IO_active); + c7000_clear_busy(dev); + return(-EIO); + } + +#ifdef NEWSTUFF + netif_start_queue(dev); +#else + dev->start = 1; +#endif + CPrintk(0, "c7000: c7000_open: base unit 0x%lx is opened\n", dev->base_addr); + c7000_clear_busy(dev); + MOD_INC_USE_COUNT; /* increment module usage count */ + return(0); +} + +/* + Stop method. +*/ + +static int +c7000_stop(STRUCT_NET_DEVICE *dev) +{ + int i; + struct c7000_controller *ccp = (struct c7000_controller *)dev->priv; + struct c7000_unit *cup; + int rc; + +#ifdef NEWSTUFF +/* nothing? */ +#else + dev->start = 0; +#endif + c7000_set_busy(dev); + + /* + Send a disconnect message. + */ + + ccp->cunits[C7000_RD].state = ccp->cunits[C7000_WR].state = C7000_DISC; + cup = &ccp->cunits[C7000_WR]; + + if (c7000_send_disc(cup, ccp->linkid) != 0) { + CPrintk(0, "c7000: c7000_stop: send of disconnect message failed for unit 0x%x\n", cup->devno); + } + + CPrintk(1, "c7000: c7000_stop: successfully sent disconnect message to unit 0x%x\n", cup->devno); + + /* + Issue a halt I/O to all units. + */ + + for (i = 0; i < NUNITS; i++) { + cup = &ccp->cunits[i]; + cup->state = C7000_STOP; + CPrintk(1, "c7000: c7000_stop: issuing halt to unit 0x%x\n", cup->devno); + + if ((rc = c7000_haltio(cup)) != 0) { + CPrintk(0, "c7000: c7000_stop: halt_IO failed with rc = %d for unit 0x%x\n", rc, cup->devno); + continue; + } + + CPrintk(1, "c7000: c7000_stop: halt complete for unit 0x%x\n", cup->devno); + } + + c7000_free_buffers(dev); + CPrintk(0, "c7000: c7000_stop: base unit 0x%lx is stopped\n", dev->base_addr); + MOD_DEC_USE_COUNT; /* Decrement module usage count */ + return(0); +} + +/* + Configure the interface. +*/ + +static int +c7000_config(STRUCT_NET_DEVICE *dev, struct ifmap *map) +{ + CPrintk(1, "c7000: c7000_config: entered for base unit 0x%lx\n", dev->base_addr); + return(0); +} + +/* + Transmit a packet. +*/ + +static int +c7000_xmit(struct sk_buff *skb, STRUCT_NET_DEVICE *dev) +{ + struct c7000_controller *ccp = (struct c7000_controller *)dev->priv; + struct c7000_unit *cup; + __u32 saveflags; + __u32 parm; + __u8 flags = 0x00; + struct c7000_buffer *buf, *pbuf; + int rc; + + CPrintk(1, "c7000: c7000_xmit: entered for base unit 0x%lx\n", dev->base_addr); + + /* + When the skb pointer is NULL return. + */ + + if (skb == NULL) { + CPrintk(0, "c7000: c7000_xmit: skb pointer is null for base unit 0x%lx\n", dev->base_addr); + ccp->stats.tx_dropped++; + return(-EIO); + } + + cup = &ccp->cunits[C7000_WR]; + + /* + Lock the irq. + */ + + s390irq_spin_lock_irqsave(cup->irq, saveflags); + + /* + When the device transmission busy flag is on , no data + can be sent. Unlock the irq and return EBUSY. + */ + + if (c7000_check_busy(dev)) { + CPrintk(1, "c7000: c7000_xmit: c7000_check_busy returns true for base unit 0x%lx\n", dev->base_addr); + s390irq_spin_unlock_irqrestore(cup->irq, saveflags); + return(-EBUSY); + } + + /* + Set the device transmission busy flag on atomically. + */ + + if (c7000_ts_busy(TB_TX, dev)) { + CPrintk(1, "c7000: c7000_xmit: c7000_ts_busy returns true for base unit 0x%lx\n", dev->base_addr); + s390irq_spin_unlock_irqrestore(cup->irq, saveflags); + return(-EBUSY); + } + + CPrintk(1, "c7000: c7000_xmit: set TB_TX for unit 0x%x\n", cup->devno); + + /* + Obtain a free buffer. If none are free then mark tbusy + with TB_NOBUFFER and return EBUSY. + */ + + if ((buf = c7000_get_buffer(cup)) == NULL) { + CPrintk(1, "c7000: c7000_xmit: setting TB_NOBUFFER for base unit 0x%lx\n", dev->base_addr); + c7000_setbit_busy(TB_NOBUFFER, dev); + c7000_clearbit_busy(TB_TX, dev); + s390irq_spin_unlock_irqrestore(cup->irq, saveflags); + return(-EBUSY); + } + + CPrintk(1, "c7000: c7000_xmit: Got buffer for unit 0x%x\n", cup->devno); + + /* + Save the length of the skb data and then copy it to the + buffer. Queue the buffer on the processing list. + */ + + buf->len = skb->len; + memcpy(buf->data, skb->data, skb->len); + memset(buf->data + C7000_DATAL + C7000_READHDRL, '\0', C7000_READFFL); + pbuf = cup->proc_tail; + c7000_queue_buffer(cup, buf); + + /* + Chain the buffer to the running channel program. + */ + + if (test_bit(0, (void *)&cup->IO_active) && pbuf != NULL) { + c7000_bld_wrt_chpgm(cup, buf); + pbuf->ccws[2].cda = (__u32)virt_to_phys(&buf->ccws[0]); + } + + /* + Free the socket buffer. + */ + + dev_kfree_skb(skb); + + /* + If the unit is not currently doing IO, build a channel + program and start the IO for the buffers on the processing + chain. + */ + + if (test_and_set_bit(0, (void *)&cup->IO_active) == 0) { + CPrintk(1, "c7000: c7000_xmit: start IO for unit 0x%x\n", cup->devno); + c7000_bld_wrt_chain(cup); + parm = (__u32) cup; + cup->state = C7000_WRITE; + + if ((rc = do_IO(cup->irq, &cup->proc_head->ccws[0], parm, 0xff, flags)) != 0) { + CPrintk(0, "c7000: c7000_xmit: do_IO failed with return code %d for unit 0x%x\n", rc, cup->devno); + c7000_error(cup->cntlp); + c7000_clearbit_busy(TB_TX, dev); + s390irq_spin_unlock_irqrestore(cup->irq, saveflags); + return(-EIO); + } + + dev->trans_start = jiffies; + CPrintk(1, "c7000: c7000_xmit: do_IO succeeds for unit 0x%x\n", cup->devno); + } + + /* + If the free chain is now NULL, set the TB_NOBUFFER flag. + */ + + if (cup->free == NULL) { + CPrintk(1, "c7000: c7000_xmit: setting TB_NOBUFFER for base unit 0x%lx\n", dev->base_addr); + c7000_setbit_busy(TB_NOBUFFER, dev); + } + + c7000_clearbit_busy(TB_TX, dev); + s390irq_spin_unlock_irqrestore(cup->irq, saveflags); + CPrintk(1, "c7000: c7000_xmit: exits for unit 0x%x\n", cup->devno); + return(0); +} + +/* + Handle an ioctl from a user process. +*/ + +static int +c7000_ioctl(STRUCT_NET_DEVICE *dev, struct ifreq *ifr, int cmd) +{ + CPrintk(1, "c7000: c7000_ioctl: entered for base unit 0x%lx with cmd %d\n", dev->base_addr, cmd); + return(0); +} + +/* + Analyze the interrupt status and return a value + that identifies the type. +*/ + +static enum c7000_rupt +c7000_check_csw(devstat_t *devstat) +{ + + /* + Check for channel detected conditions (except PCI). + */ + + if ((devstat->cstat & ~SCHN_STAT_PCI) != 0) { + CPrintk(0, "c7000: c7000_check_csw: channel status 0x%x for unit 0x%x\n", devstat->cstat, devstat->devno); + return(C7000_CHANERR); + } + + /* + Fast path the normal cases. + */ + + if (devstat->dstat == (DEV_STAT_CHN_END | DEV_STAT_DEV_END)) + return(C7000_NORMAL); + + if (devstat->cstat == SCHN_STAT_PCI) + return(C7000_NORMAL); + + /* + Check for exceptions. + */ + + if (devstat->dstat & DEV_STAT_UNIT_CHECK) { + CPrintk(0, "c7000: c7000_check_csw: unit check for unit 0x%x, sense byte0 0x%2.2x\n", devstat->devno, devstat->ii.sense.data[0]); + + if (devstat->ii.sense.data[0] == C7000_BOX_RESET) + return(C7000_UCK_RESET); + else + return(C7000_UCK); + + } else if (devstat->dstat & DEV_STAT_UNIT_EXCEP) { + CPrintk(0, "c7000: c7000_check_csw: unit exception for unit 0x%x\n", devstat->devno); + return(C7000_UE); + + } else if (devstat->dstat & DEV_STAT_ATTENTION) { + CPrintk(0, "c7000: c7000_check_csw: attention for unit 0x%x\n", devstat->devno); + return(C7000_ATTN); + + } else if (devstat->dstat & DEV_STAT_BUSY) { + CPrintk(0, "c7000: c7000_check_csw: busy for unit 0x%x\n", devstat->devno); + return(C7000_BUSY); + + } else { + CPrintk(0, "c7000: c7000_check_csw: channel status 0x%2.2x , device status 0x%2.2x, devstat flags 0x%8.8x for unit 0x%x\n", + devstat->cstat, devstat->dstat, devstat->flag, devstat->devno); + return(C7000_OTHER); + } + + /* NOT REACHED */ + +} + +/* + Retry the last CCW chain to the unit. +*/ + +static void +c7000_retry_io(struct c7000_unit *cup) +{ + int rc; + __u32 parm; + __u8 flags = 0x00; + ccw1_t *ccwp; + + if (++cup->retries > C7000_MAX_RETRIES) { + c7000_error(cup->cntlp); + CPrintk(0, "c7000: c7000_retry_io: retry IO for unit 0x%x exceeds maximum retry count\n", cup->devno); + return; + } + + set_bit(0, (void *)&cup->IO_active); + parm = (__u32)cup; + + if (cup->state == C7000_READ || cup->state == C7000_WRITE) + ccwp = &cup->proc_head->ccws[0]; + else + ccwp = &cup->ccws[0]; + + if ((rc = do_IO(cup->irq, ccwp, parm, 0xff, flags)) != 0) { + CPrintk(0, "c7000: c7000_retry_io: can not retry IO for unit 0x%x, return code %d\n", cup->devno, rc); + clear_bit(0, (void *)&cup->IO_active); + c7000_error(cup->cntlp); + } + + CPrintk(1, "c7000: c7000_retry_io: retry IO for unit 0x%x, retry count %d\n", cup->devno, cup->retries); + return; +} + +/* + Process a read interrupt by scanning the list of buffers + for ones that have completed and queue them for the bottom + half to process. +*/ + +static void +c7000_proc_rintr(struct c7000_unit *cup) +{ + struct c7000_buffer *buf; + struct c7000_rd_header *head; + int num_read = 0; + + while (cup->proc_head != NULL) { + head = (struct c7000_rd_header *)(cup->proc_head->data + C7000_DATAL); + + /* + The flag byte in the read header will be set to + FLAG_FF when the buffer has been read. + */ + + if (head->flag != FLAG_FF) + break; + + /* + Dequeue the buffer from the proc chain + and enqueue it on the bh chain for + the bh routine to process. + */ + + buf = c7000_dequeue_buffer(cup); + c7000_queue_bh_buffer(cup, buf); + num_read++; + } + + CPrintk(1, "c7000: c7000_proc_rintr: %d buffers read for unit 0x%x\n", num_read, cup->devno); + return; +} + +/* + Process all completed buffers on the proc chain. + A buffer is completed if it's READFF flag is FLAG_FF. +*/ + +static int +c7000_proc_wintr(struct c7000_unit *cup) +{ + struct c7000_controller *ccp = cup->cntlp; + struct c7000_buffer *buf; + int num_write = 0; + + if (cup->proc_head == NULL) { + CPrintk(0, "c7000: c7000_proc_wintr: unexpected NULL processing chain pointer for unit 0x%x\n", cup->devno); + return(num_write); + } + + while (cup->proc_head != NULL) { + + /* + Check if the buffer has completed. + */ + + if (*(cup->proc_head->data + C7000_DATAL + C7000_READHDRL) != FLAG_FF) + break; + + /* + Remove buffer from top of processing chain. + Place it on free list. + */ + + buf = c7000_dequeue_buffer(cup); + c7000_release_buffer(cup, buf); + num_write++; + + /* + Update transmitted packets statistic. + */ + + ccp->stats.tx_packets++; + } + + CPrintk(1, "c7000: c7000_proc_wintr: %d buffers written for unit 0x%x\n", num_write, cup->devno); + return(num_write); +} + +/* + Interrupt handler. +*/ + +static void +c7000_intr(int irq, void *initparm, struct pt_regs *regs) +{ + devstat_t *devstat = ((devstat_t *) initparm); + struct c7000_unit *cup = NULL; + struct c7000_controller *ccp = NULL; + STRUCT_NET_DEVICE *dev = NULL; + __u32 parm; + __u8 flags = 0x00; + int rc; + + /* + Discard unsolicited interrupts + */ + + if (devstat->intparm == 0) { + CPrintk(0, "c7000: c7000_intr: unsolicited interrupt for device 0x%x, cstat = 0x%2.2x, dstat = 0x%2.2x, flag = 0x%8.8x\n", + devstat->devno, devstat->cstat, devstat->dstat, devstat->flag); + return; + } + + /* + Obtain the c7000_unit structure pointer. + */ + + cup = (struct c7000_unit *)(devstat->intparm); + + /* + Obtain the c7000_controller structure and device structure + pointers. + */ + + if (cup == NULL) { + CPrintk(0, "c7000: c7000_intr: c7000_unit pointer is NULL in devstat\n"); + return; + } + + ccp = cup->cntlp; + + if (ccp == NULL) { + CPrintk(0, "c7000: c7000_intr: c7000_cntlp pointer is NULL in c7000_unit structure 0x%x for unit 0x%x\n", (int)cup, cup->devno); + return; + } + + dev = ccp->dev; + + if (dev == NULL) { + CPrintk(0, "c7000: c7000_intr: device pointer is NULL in c7000_controller structure 0x%x for unit 0x%x\n", (int)ccp, cup->devno); + return; + } + + /* + Finite state machine (fsm) handling. + */ + + CPrintk(1, "c7000: c7000_intr: entered with state %d flag 0x%8.8x for unit 0x%x\n", cup->state, devstat->flag, cup->devno); + + switch(cup->state) { + + /* + Not expected to be here when in INIT state. + */ + + case C7000_INIT: + + break; + + /* + Enter state C7000_SID and wakeup the sleeping + process in c7000_open. + */ + + case C7000_HALT: + + if ((devstat->flag & DEVSTAT_FINAL_STATUS) == 0) + break; + + cup->state = C7000_SID; + wake_up(&cup->wait); + break; + + /* + Enter state C7000_SYSVAL and wakeup the sleeping + process in c7000_open. + */ + + case C7000_SID: + + if ((devstat->flag & DEVSTAT_FINAL_STATUS) == 0) + break; + + if (c7000_check_csw(devstat) != 0) { + c7000_retry_io(cup); + + if (cup->state == C7000_ERROR) + wake_up(&cup->wait); + + break; + } + + cup->retries = 0; + cup->state = C7000_SYSVAL; + wake_up(&cup->wait); + break; + + /* + Wakeup the sleeping process in c7000_open. + */ + + case C7000_SYSVAL: + + if ((devstat->flag & DEVSTAT_FINAL_STATUS) == 0) + break; + + if (c7000_check_csw(devstat) != 0) { + c7000_retry_io(cup); + + if (cup->state == C7000_ERROR) + wake_up(&cup->wait); + + break; + } + + cup->retries = 0; + wake_up(&cup->wait); + break; + + /* + Wakeup the sleeping process in c7000_open. + */ + + case C7000_CONNECT: + + if ((devstat->flag & DEVSTAT_FINAL_STATUS) == 0) + break; + + if (c7000_check_csw(devstat) != 0) { + c7000_retry_io(cup); + + if (cup->state == C7000_ERROR) + wake_up(&cup->wait); + + break; + } + + cup->retries = 0; + wake_up(&cup->wait); + break; + + /* + Not expected to be entered here. + */ + + case C7000_READY: + break; + + /* + Process the data that was just read. + */ + + case C7000_READ: + + if ((devstat->flag & (DEVSTAT_PCI | DEVSTAT_FINAL_STATUS)) == 0) + break; + + CPrintk(1, "c7000: c7000_intr: process read interrupt for unit 0x%x , devstat flag = 0x%8.8x\n", cup->devno, devstat->flag); + + /* + Check for serious errors. + */ + + if (c7000_check_csw(devstat) != 0) { + ccp->stats.rx_errors++; + c7000_error(cup->cntlp); + break; + } + + /* + Build the bottom half buffer list. + */ + + c7000_proc_rintr(cup); + + /* + When final status is received clear + the IO active bit. + */ + + if (devstat->flag & DEVSTAT_FINAL_STATUS) { + clear_bit(0, (void *)&cup->IO_active); + } + + /* + If there are free buffers redrive the IO. + */ + + if ((devstat->flag & DEVSTAT_FINAL_STATUS) && + (cup->free != NULL)) { + c7000_bld_read_chain(cup); + parm = (__u32)cup; + set_bit(0, (void *)&cup->IO_active); + + if ((rc = do_IO(cup->irq, &cup->proc_head->ccws[0], parm, 0xff, flags)) != 0) { + clear_bit(0, (void *)&cup->IO_active); + CPrintk(0, "c7000: c7000_intr: do_IO failed with return code %d for unit 0x%x\n", rc, cup->devno); + c7000_error(cup->cntlp); + break; + } + + CPrintk(1, "c7000: c7000_intr: started read io for unit 0x%x\n", cup->devno); + } + + /* + Initiate bottom half routine to process + data that was read. + */ + + if (test_and_set_bit(C7000_BH_ACTIVE, (void *)&cup->flag_a) == 0) { + queue_task(&cup->tq, &tq_immediate); + mark_bh(IMMEDIATE_BH); + } + + break; + + /* + Free the transmitted buffers and restart the channel + process (if necessary). + */ + + case C7000_WRITE: + + if ((devstat->flag & DEVSTAT_FINAL_STATUS) == 0) + break; + + if (c7000_check_csw(devstat) != 0) { + ccp->stats.tx_errors++; + c7000_error(cup->cntlp); + break; + } + + /* + If at least one buffer was freed, clear + the NOBUFFER indication. + */ + + if (c7000_proc_wintr(cup) != 0) { + c7000_clearbit_busy(TB_NOBUFFER, dev); + } + + /* + Restart the channel program if there are more + buffers on the processing chain. + */ + + if (cup->proc_head != NULL) { + c7000_bld_wrt_chain(cup); + parm = (__u32)cup; + set_bit(0, (void *)&cup->IO_active); + + if ((rc = do_IO(cup->irq, &cup->proc_head->ccws[0], parm, 0xff, flags)) != 0) { + CPrintk(0, "c7000: c7000_intr: do_IO failed with return code %d for unit 0x%x\n", rc, cup->devno); + clear_bit(0, (void *)&cup->IO_active); + c7000_error(cup->cntlp); + break; + } + + dev->trans_start = jiffies; + } else { + clear_bit(0, (void *)&cup->IO_active); + cup->state = C7000_READY; + } + + break; + + /* + Disconnect message completed. Wakeup the + sleeping process in c7000_stop. + */ + + case C7000_DISC: + if ((devstat->flag & DEVSTAT_FINAL_STATUS) == 0) + break; + + if (c7000_check_csw(devstat) != 0) { + c7000_retry_io(cup); + + if (cup->state == C7000_ERROR) + wake_up(&cup->wait); + + break; + } + + cup->retries = 0; + wake_up(&cup->wait); + break; + + /* + Subchannel is now halted. Wakeup the sleeping + process in c7000_stop. Set the state to C7000_STOPPED. + */ + + case C7000_STOP: + + cup->state = C7000_STOPPED; + wake_up(&cup->wait); + break; + + /* + When in error state, stay there until the + interface is recycled. + */ + + case C7000_ERROR: + + break; + + /* + Should not reach here + */ + + default: + CPrintk(0, "c7000: c7000_intr: entered default case for unit 0x%x, state %d\n", cup->devno, cup->state); + break; + + } + + CPrintk(1, "c7000: c7000_intr: exited with state %d for unit 0x%x\n", cup->state, cup->devno); + return; +} + +/* + Fill in system validation name padding it with blanks. +*/ + +static void +c7000_fill_name(char *dst, char *src) +{ + char *tmp = dst; + int i; + + for (i = 0; i < NAMLEN; i++, tmp++) + *tmp = ' '; + + for (i = 0; i < NAMLEN && *src != '\0'; i++) + *dst++ = *src++; + + return; +} + +/* + Initialization routine called when the device is registered. +*/ + +static int +c7000_init(STRUCT_NET_DEVICE *dev) +{ + struct c7000_controller *ccp; + int i; + int unitaddr; + int irq; + + /* + Find the position of base_addr in the bases array. + */ + + for (i = 0; i < MAX_C7000; i++) + if (bases[i] == dev->base_addr) + break; + + if (i == MAX_C7000) + return(-ENODEV); + + /* + Make sure it is a C7000 type of device. + */ + + if (c7000_check_devices(dev->base_addr) != 0) { + CPrintk(0, "c7000: c7000_init: base unit 0x%lx is not the right type\n", dev->base_addr); + return(-ENODEV); + } + + /* + Initialize the device structure functions. + Note that ARP is not done on the CLAW interface. + There is no ethernet header. + */ + + dev->mtu = C7000_DATAL; + dev->hard_header_len = 0; + dev->addr_len = 0; + dev->type = ARPHRD_SLIP; + dev->tx_queue_len = C7000_TXQUEUE_LEN; + dev->flags = IFF_NOARP; + dev->open = c7000_open; + dev->stop = c7000_stop; + dev->set_config = c7000_config; + dev->hard_start_xmit = c7000_xmit; + dev->do_ioctl = c7000_ioctl; + dev->get_stats = c7000_stats; + + /* + Allocate space for a private data structure. + */ + + if ((ccp = dev->priv = kmalloc(sizeof(struct c7000_controller), GFP_KERNEL)) == NULL) { + CPrintk(0, "c7000: c7000_init: base unit 0x%lx can not be initialized\n", dev->base_addr); + return(-ENOMEM); + } + + CPrintk(1, "c7000: c7000_init: allocated a c7000_controller structure at address 0x%x\n", (int)ccp); + memset(ccp, '\0', sizeof(struct c7000_controller)); + ccp->dev = dev; + ccp->base_addr = dev->base_addr; + + /* + Populate the system validation name with default values. + */ + + c7000_fill_name(ccp->lappl, C7000_DFLT_LAPPL); + c7000_fill_name(ccp->lhost, C7000_DFLT_LHOST); + c7000_fill_name(ccp->uappl, C7000_DFLT_UAPPL); + c7000_fill_name(ccp->uhost, C7000_DFLT_UHOST); + + /* + When values have been supplied, replace the prior defaults. + */ + + if (i == 0) { + + if (lappl0 != NULL) + c7000_fill_name(ccp->lappl, lappl0); + + if (lhost0 != NULL) + c7000_fill_name(ccp->lhost, lhost0); + + if (uappl0 != NULL) + c7000_fill_name(ccp->uappl, uappl0); + + if (uhost0 != NULL) + c7000_fill_name(ccp->uhost, uhost0); + + } else if (i == 1) { + + if (lappl1 != NULL) + c7000_fill_name(ccp->lappl, lappl1); + + if (lhost1 != NULL) + c7000_fill_name(ccp->lhost, lhost1); + + if (uappl1 != NULL) + c7000_fill_name(ccp->uappl, uappl1); + + if (uhost1 != NULL) + c7000_fill_name(ccp->uhost, uhost1); + + } else if (i == 2) { + + if (lappl2 != NULL) + c7000_fill_name(ccp->lappl, lappl2); + + if (lhost2 != NULL) + c7000_fill_name(ccp->lhost, lhost2); + + if (uappl2 != NULL) + c7000_fill_name(ccp->uappl, uappl2); + + if (uhost2 != NULL) + c7000_fill_name(ccp->uhost, uhost2); + + } else { + + if (lappl3 != NULL) + c7000_fill_name(ccp->lappl, lappl3); + + if (lhost3 != NULL) + c7000_fill_name(ccp->lhost, lhost3); + + if (uappl3 != NULL) + c7000_fill_name(ccp->uappl, uappl3); + + if (uhost3 != NULL) + c7000_fill_name(ccp->uhost, uhost3); + + } + + CPrintk(1, "c7000: c7000_init: lappl = %8.8s lhost = %8.8s uappl = %8.8s uhost = %8.8s for base unit 0x%x\n", ccp->lappl, ccp->lhost, ccp->uappl, ccp->uhost, ccp->base_addr); + ccp->version = 2; + ccp->linkid = 0; + + /* + Initialize the fields in the embedded cunits + array. This type of controller occupies a range + of three contiguous device numbers. + */ + + for (i = 0; i < NUNITS; i++) { + unitaddr = dev->base_addr + i; + + /* + Get the subchannel number. + */ + + if ((irq = ccp->cunits[i].irq = get_irq_by_devno(unitaddr)) == -1) { + CPrintk(0, "c7000: c7000_init: can not get subchannel for unit 0x%x\n", unitaddr); + return(-ENODEV); + } + + /* + Get control of the subchannel. + */ + + if (request_irq(irq, c7000_intr, SA_INTERRUPT, dev->name, &ccp->cunits[i].devstat) != 0) { + CPrintk(0, "c7000: c7000_init: can not get control of subchannel 0x%x for unit 0x%x\n", irq, unitaddr); + return(-EBUSY); + } + + CPrintk(1, "c7000: c7000_init: obtained control of subchannel 0x%x for unit 0x%x\n", irq, unitaddr); + ccp->cunits[i].devno = unitaddr; + ccp->cunits[i].IO_active = 0; + ccp->cunits[i].state = C7000_INIT; + ccp->cunits[i].cntlp = ccp; + CPrintk(1, "c7000: c7000_init: initialized unit 0x%x on subchannel 0x%x\n", unitaddr, irq); + } + + return(0); +} + +/* + Probe for the Cisco 7000 unit base addresses. +*/ + +static void +c7000_probe(void) +{ + s390_dev_info_t d; + int i; + int j; + int idx; + + /* + Probe for up to MAX_C7000 devices. + Get the first irq into variable idx. + */ + + idx = get_irq_first(); + + for (j = 0; j < MAX_C7000; j++) { + + if (idx < 0) + break; + + /* + Continue scanning the irq's. Variable idx + maintains the location from the prior scan. + */ + + for (i = idx; i >= 0; i = get_irq_next(i)) { + + /* + Ignore invalid irq's. + */ + + if (get_dev_info_by_irq(i, &d) < 0) + continue; + + /* + A Cisco 7000 is defined as a 3088 model + type 0x61. + */ + + if (d.sid_data.cu_type == C7000_CU_TYPE && + d.sid_data.cu_model == C7000_CU_MODEL) { + CPrintk(0, "c7000_probe: unit probe found 0x%x\n", d.devno); + bases[j] = d.devno; + + /* + Skip the write irq and setup idx + to probe for the next box. + */ + + idx = get_irq_next(i + 1); + break; + } + + } + + } + + return; +} + +/* + Module loading. Register each C7000 interface found via probing + or insmod command parameters. +*/ + +int +init_module(void) +{ + int result; + int i; + + for (i = 0 ; i < MAX_C7000; i++) + bases[i] = -1; + + /* + Perform automatic detection provided it has not been disabled + by the noauto parameter. + */ + + if (noauto == 0) + c7000_probe(); + + /* + Populate bases array from the module basex parameters replacing + what probing found above. + */ + + if (base0 != -1) + bases[0] = base0; + + if (base1 != -1) + bases[1] = base1; + + if (base2 != -1) + bases[2] = base2; + + if (base3 != -1) + bases[3] = base3; + + for (i = 0; i < MAX_C7000; i++) { + + if (bases[i] == -1) + continue; + + /* + Initialize the device structure. + */ + + memset(&c7000_devices[i], '\0', sizeof(STRUCT_NET_DEVICE)); +#ifdef NEWSTUFF + strcpy(c7000_devices[i].name, ifnames[i]); +#else + c7000_devices[i].name = &ifnames[i][0]; +#endif + c7000_devices[i].base_addr = bases[i]; + c7000_devices[i].init = c7000_init; + + /* + Register the device. This creates the interface + such as ci0. + */ + + if ((result = register_netdev(&c7000_devices[i])) != 0) { + CPrintk(0, "c7000: init_module: error %d registering base unit 0x%x\n", + result, bases[i]); + c7000_devices[i].base_addr = -1; + } else { + CPrintk(1, "c7000: init_module: registered base unit 0x%x on interface %s\n", bases[i], ifnames[i]); + } + + } + + CPrintk(0, "c7000: init_module: module loaded\n"); + return(0); +} + +/* + Module unloading. Unregister the interface and free kernel + allocated memory. +*/ + +void +cleanup_module(void) +{ + int i; + int j; + struct c7000_controller *ccp; + + for (i = 0; i < MAX_C7000; i++) { + + if (bases[i] == -1) + continue; + + /* + If the device was registered, it must be unregistered + prior to unloading the module. + */ + + if (c7000_devices[i].base_addr != -1) { + + ccp = (struct c7000_controller *) c7000_devices[i].priv; + + if (ccp != NULL) { + + for (j = 0; j < NUNITS ; j++) { + CPrintk(1, "c7000: clean_module: free subchannel 0x%x for unit 0x%x\n", ccp->cunits[j].irq, ccp->cunits[j].devno); + free_irq(ccp->cunits[j].irq, &ccp->cunits[j].devstat); + } + + CPrintk(1, "c7000: clean_module: free a c7000_controller structure at address 0x%x\n", (int)ccp); + kfree(ccp); + } + + unregister_netdev(&c7000_devices[i]); + } + + bases[i] = -1; + } + + CPrintk(0, "c7000: clean_module: module unloaded\n"); + return; +} diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/s390/net/ctctty.c linux.21rc1-ac1/drivers/s390/net/ctctty.c --- linux.21rc1/drivers/s390/net/ctctty.c 2003-04-22 16:38:53.000000000 +0100 +++ linux.21rc1-ac1/drivers/s390/net/ctctty.c 2003-04-22 16:44:37.000000000 +0100 @@ -1066,7 +1066,7 @@ #endif return; } - if ((tty->count == 1) && (info->count != 1)) { + if ((atomic_read(&tty->count) == 1) && (info->count != 1)) { /* * Uh, oh. tty->count is 1, which means that the tty * structure will be freed. Info->count should always diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/s390/net/Makefile linux.21rc1-ac1/drivers/s390/net/Makefile --- linux.21rc1/drivers/s390/net/Makefile 2003-04-22 16:38:53.000000000 +0100 +++ linux.21rc1-ac1/drivers/s390/net/Makefile 2003-04-22 16:44:37.000000000 +0100 @@ -12,6 +12,7 @@ obj-$(CONFIG_IUCV) += iucv.o fsm.o obj-$(CONFIG_CTC) += ctc.o fsm.o obj-$(CONFIG_IUCV) += netiucv.o +obj-$(CONFIG_C7000) += c7000.o include $(TOPDIR)/Rules.make diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/sbus/char/aurora.c linux.21rc1-ac1/drivers/sbus/char/aurora.c --- linux.21rc1/drivers/sbus/char/aurora.c 2003-04-22 16:38:49.000000000 +0100 +++ linux.21rc1-ac1/drivers/sbus/char/aurora.c 2003-04-22 16:44:37.000000000 +0100 @@ -1504,7 +1504,7 @@ } bp = port_Board(port); - if ((tty->count == 1) && (port->count != 1)) { + if ((atomic_read(&tty->count) == 1) && (port->count != 1)) { printk(KERN_DEBUG "aurora%d: aurora_close: bad port count; " "tty->count is 1, port count is %d\n", board_No(bp), port->count); diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/sbus/char/sab82532.c linux.21rc1-ac1/drivers/sbus/char/sab82532.c --- linux.21rc1/drivers/sbus/char/sab82532.c 2003-04-22 16:38:49.000000000 +0100 +++ linux.21rc1-ac1/drivers/sbus/char/sab82532.c 2003-04-22 16:44:37.000000000 +0100 @@ -1610,7 +1610,7 @@ #ifdef SERIAL_DEBUG_OPEN printk("sab82532_close ttys%d, count = %d\n", info->line, info->count); #endif - if ((tty->count == 1) && (info->count != 1)) { + if ((atomic_read(&tty->count) == 1) && (info->count != 1)) { /* * Uh, oh. tty->count is 1, which means that the tty * structure will be freed. info->count should always diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/sbus/char/su.c linux.21rc1-ac1/drivers/sbus/char/su.c --- linux.21rc1/drivers/sbus/char/su.c 2003-04-22 16:38:49.000000000 +0100 +++ linux.21rc1-ac1/drivers/sbus/char/su.c 2003-04-22 16:44:37.000000000 +0100 @@ -39,7 +39,7 @@ do { \ printk("(%s): [%x] refc=%d, serc=%d, ttyc=%d -> %s\n", \ kdevname(tty->device), (info->flags), serial_refcount, \ - info->count,tty->count,s); \ + info->count,atomic_read(&tty->count),s); \ } while (0) #else #define DBG_CNT(s) @@ -1756,7 +1756,7 @@ #ifdef SERIAL_DEBUG_OPEN printk("su_close ttys%d, count = %d\n", info->line, info->count); #endif - if ((tty->count == 1) && (info->count != 1)) { + if ((atomic_read(&tty->count) == 1) && (info->count != 1)) { /* * Uh, oh. tty->count is 1, which means that the tty * structure will be freed. info->count should always diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/sbus/char/zs.c linux.21rc1-ac1/drivers/sbus/char/zs.c --- linux.21rc1/drivers/sbus/char/zs.c 2003-04-22 16:38:49.000000000 +0100 +++ linux.21rc1-ac1/drivers/sbus/char/zs.c 2003-04-22 16:44:37.000000000 +0100 @@ -1547,7 +1547,7 @@ #ifdef SERIAL_DEBUG_OPEN printk("zs_close tty-%d, count = %d\n", info->line, info->count); #endif - if ((tty->count == 1) && (info->count != 1)) { + if ((atomic_read(&tty->count) == 1) && (info->count != 1)) { /* * Uh, oh. tty->count is 1, which means that the tty * structure will be freed. Info->count should always diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/scsi/aha152x.c linux.21rc1-ac1/drivers/scsi/aha152x.c --- linux.21rc1/drivers/scsi/aha152x.c 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/scsi/aha152x.c 2003-04-22 16:44:37.000000000 +0100 @@ -2649,7 +2649,7 @@ static void datai_run(struct Scsi_Host *shpnt) { - unsigned int the_time; + unsigned long the_time; int fifodata, data_count; /* @@ -2791,7 +2791,7 @@ static void datao_run(struct Scsi_Host *shpnt) { - unsigned int the_time; + unsigned long the_time; int data_count; /* until phase changes or all data sent */ diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/scsi/cpqfcTSinit.c linux.21rc1-ac1/drivers/scsi/cpqfcTSinit.c --- linux.21rc1/drivers/scsi/cpqfcTSinit.c 2003-04-22 16:39:40.000000000 +0100 +++ linux.21rc1-ac1/drivers/scsi/cpqfcTSinit.c 2003-04-22 16:44:37.000000000 +0100 @@ -468,8 +468,10 @@ // Need data from user? // make sure caller's buffer is in kernel space. if ((vendor_cmd->rw_flag == VENDOR_WRITE_OPCODE) && vendor_cmd->len) - if (copy_from_user(buf, vendor_cmd->bufp, vendor_cmd->len)) + if (copy_from_user(buf, vendor_cmd->bufp, vendor_cmd->len)) { + kfree(buf); return (-EFAULT); + } // copy the CDB (if/when MAX_COMMAND_SIZE is 16, remove copy below) memcpy(&ScsiPassThruCmnd->cmnd[0], &vendor_cmd->cdb[0], MAX_COMMAND_SIZE); @@ -534,7 +536,7 @@ // need to pass data back to user (space)? if ((vendor_cmd->rw_flag == VENDOR_READ_OPCODE) && vendor_cmd->len) if (copy_to_user(vendor_cmd->bufp, buf, vendor_cmd->len)) - return (-EFAULT); + result = -EFAULT; if (buf) kfree(buf); diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/scsi/ide-scsi.c linux.21rc1-ac1/drivers/scsi/ide-scsi.c --- linux.21rc1/drivers/scsi/ide-scsi.c 2003-04-22 16:39:40.000000000 +0100 +++ linux.21rc1-ac1/drivers/scsi/ide-scsi.c 2003-04-22 16:44:37.000000000 +0100 @@ -321,7 +321,7 @@ { idescsi_scsi_t *scsi = drive->driver_data; struct request *rq = HWGROUP(drive)->rq; - idescsi_pc_t *pc = (idescsi_pc_t *) rq->buffer; + idescsi_pc_t *pc = (idescsi_pc_t *) rq->special; int log = test_bit(IDESCSI_LOG_CMD, &scsi->log); u8 *scsi_buf; unsigned long flags; @@ -587,7 +587,7 @@ #endif /* IDESCSI_DEBUG_LOG */ if (rq->cmd == IDESCSI_PC_RQ) { - return idescsi_issue_pc(drive, (idescsi_pc_t *) rq->buffer); + return idescsi_issue_pc(drive, rq->special); } printk(KERN_ERR "ide-scsi: %s: unsupported command in request " "queue (%x)\n", drive->name, rq->cmd); @@ -1083,7 +1083,7 @@ } ide_init_drive_cmd(rq); - rq->buffer = (char *) pc; + rq->special = pc; rq->bh = idescsi_dma_bh(drive, pc); rq->cmd = IDESCSI_PC_RQ; spin_unlock_irq(&io_request_lock); diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/scsi/ips.c linux.21rc1-ac1/drivers/scsi/ips.c --- linux.21rc1/drivers/scsi/ips.c 2003-04-22 16:39:40.000000000 +0100 +++ linux.21rc1-ac1/drivers/scsi/ips.c 2003-04-22 16:44:37.000000000 +0100 @@ -246,9 +246,6 @@ #define IPS_SG_ADDRESS(sg) ((sg)->address) #define IPS_LOCK_SAVE(lock,flags) spin_lock_irqsave(&io_request_lock,flags) #define IPS_UNLOCK_RESTORE(lock,flags) spin_unlock_irqrestore(&io_request_lock,flags) - #ifndef __devexit_p - #define __devexit_p(x) x - #endif #else #define IPS_SG_ADDRESS(sg) (page_address((sg)->page) ? \ page_address((sg)->page)+(sg)->offset : 0) @@ -338,48 +335,48 @@ static char ips_hot_plug_name[] = "ips"; static int __devinit ips_insert_device(struct pci_dev *pci_dev, const struct pci_device_id *ent); - static void __devexit ips_remove_device(struct pci_dev *pci_dev); + static void ips_remove_device(struct pci_dev *pci_dev); struct pci_driver ips_pci_driver = { name: ips_hot_plug_name, id_table: ips_pci_table, probe: ips_insert_device, - remove: __devexit_p(ips_remove_device), + remove: ips_remove_device, }; struct pci_driver ips_pci_driver_anaconda = { name: ips_hot_plug_name, id_table: ips_pci_table_anaconda, probe: ips_insert_device, - remove: __devexit_p(ips_remove_device), + remove: ips_remove_device, }; struct pci_driver ips_pci_driver_5i = { name: ips_hot_plug_name, id_table: ips_pci_table_5i, probe: ips_insert_device, - remove: __devexit_p(ips_remove_device), + remove: ips_remove_device, }; struct pci_driver ips_pci_driver_6i = { name: ips_hot_plug_name, id_table: ips_pci_table_6i, probe: ips_insert_device, - remove: __devexit_p(ips_remove_device), + remove: ips_remove_device, }; struct pci_driver ips_pci_driver_i960 = { name: ips_hot_plug_name, id_table: ips_pci_table_i960, probe: ips_insert_device, - remove: __devexit_p(ips_remove_device), + remove: ips_remove_device, }; struct pci_driver ips_pci_driver_adaptec = { name: ips_hot_plug_name, id_table: ips_pci_table_adaptec, probe: ips_insert_device, - remove: __devexit_p(ips_remove_device), + remove: ips_remove_device, }; #endif @@ -7346,7 +7343,7 @@ /* Routine Description: */ /* Remove one Adapter ( Hot Plugging ) */ /*---------------------------------------------------------------------------*/ -static void __devexit ips_remove_device(struct pci_dev *pci_dev) +static void ips_remove_device(struct pci_dev *pci_dev) { int i; struct Scsi_Host *sh; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/scsi/nsp32.c linux.21rc1-ac1/drivers/scsi/nsp32.c --- linux.21rc1/drivers/scsi/nsp32.c 2003-04-22 16:39:40.000000000 +0100 +++ linux.21rc1-ac1/drivers/scsi/nsp32.c 2003-04-22 16:44:37.000000000 +0100 @@ -2125,7 +2125,7 @@ .name = "nsp32", .id_table = nsp32_pci_table, .probe = nsp32_probe, - .remove = nsp32_remove, + .remove = __devexit_p(nsp32_remove), #ifdef CONFIG_PM /* .suspend = nsp32_suspend,*/ /* .resume = nsp32_resume,*/ diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/scsi/qlogicisp.c linux.21rc1-ac1/drivers/scsi/qlogicisp.c --- linux.21rc1/drivers/scsi/qlogicisp.c 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/scsi/qlogicisp.c 2003-04-22 16:44:37.000000000 +0100 @@ -722,8 +722,8 @@ continue; fail_uninit: - iounmap((void *)hostdata->memaddr); - release_region(host->io_port, 0xff); + if (hostdata->memaddr) iounmap((void *)hostdata->memaddr); + if (host->io_port) release_region(host->io_port, 0xff); fail_and_unregister: if (hostdata->res_cpu) pci_free_consistent(hostdata->pci_dev, @@ -755,9 +755,9 @@ isp_outw(0x0, host, PCI_INTF_CTL); free_irq(host->irq, host); - iounmap((void *)hostdata->memaddr); + if (hostdata->memaddr) iounmap((void *)hostdata->memaddr); - release_region(host->io_port, 0xff); + if (host->io_port) release_region(host->io_port, 0xff); LEAVE("isp1020_release"); @@ -1396,13 +1396,6 @@ return 1; } -#ifdef __alpha__ - /* Force ALPHA to use bus I/O and not bus MEM. - This is to avoid having to use HAE_MEM registers, - which is broken on some platforms and with SMP. */ - command &= ~PCI_COMMAND_MEMORY; -#endif - if (!(command & PCI_COMMAND_MASTER)) { printk("qlogicisp : bus mastering is disabled\n"); return 1; @@ -1410,26 +1403,34 @@ sh->io_port = io_base; - if (!request_region(sh->io_port, 0xff, "qlogicisp")) { - printk("qlogicisp : i/o region 0x%lx-0x%lx already " - "in use\n", - sh->io_port, sh->io_port + 0xff); - return 1; - } - + /* + By default, we choose to use PCI memory-mapped registers, + if configured/available. + + NOTE: we only ioremap() if we are going to use PCI + memory-mapped registers, or only request_region() if using + PCI I/O registers; we never do both anymore. + */ if ((command & PCI_COMMAND_MEMORY) && ((mem_flags & 1) == 0)) { mem_base = (u_long) ioremap(mem_base, PAGE_SIZE); if (!mem_base) { printk("qlogicisp : i/o remapping failed.\n"); - goto out_release; + return 1; } hostdata->memaddr = mem_base; + sh->io_port = io_base = 0; } else { if (command & PCI_COMMAND_IO && (io_flags & 3) != 1) { printk("qlogicisp : i/o mapping is disabled\n"); - goto out_release; + return 1; } + if (!request_region(sh->io_port, 0xff, "qlogicisp")) { + printk("qlogicisp : i/o region 0x%lx-0x%lx already " + "in use\n", + sh->io_port, sh->io_port + 0xff); + return 1; + } hostdata->memaddr = 0; /* zero to signify no i/o mapping */ mem_base = 0; } @@ -1477,9 +1478,8 @@ return 0; out_unmap: - iounmap((void *)hostdata->memaddr); -out_release: - release_region(sh->io_port, 0xff); + if (mem_base) iounmap((void *)hostdata->memaddr); + if (io_base) release_region(sh->io_port, 0xff); return 1; } diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/scsi/README.st linux.21rc1-ac1/drivers/scsi/README.st --- linux.21rc1/drivers/scsi/README.st 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/scsi/README.st 2003-04-22 16:44:37.000000000 +0100 @@ -1,8 +1,8 @@ This file contains brief information about the SCSI tape driver. The driver is currently maintained by Kai Mäkisara (email -Kai.Makisara@metla.fi) +Kai.Makisara@kolumbus.fi) -Last modified: Tue Apr 16 22:32:10 2002 by makisara +Last modified: Sun Apr 6 22:44:55 2003 by makisara BASICS @@ -112,7 +112,7 @@ Asynchronous writing. Writing the buffer contents to the tape is started and the write call returns immediately. The status is checked -at the next tape operation. +at the next tape operation. Applies only to variable block mode. Buffered writes and asynchronous writes may in some rare cases cause problems in multivolume operations if there is not enough space on the @@ -147,11 +147,6 @@ supports scatter/gather (the allocation is not limited to "DMA memory" and the buffer can be composed of several fragments). -The threshold for triggering asynchronous write in fixed block mode -is defined by ST_WRITE_THRESHOLD. This may be optimized for each -use pattern. The default triggers asynchronous write after three -default sized writes (10 kB) from tar. - Scatter/gather buffers (buffers that consist of chunks non-contiguous in the physical memory) are used if contiguous buffers can't be allocated. To support all SCSI adapters (including those not @@ -184,7 +179,6 @@ are configurable when the driver is loaded as a module. The keywords are: buffer_kbs=xxx the buffer size in kilobytes is set to xxx -write_threshold_kbs=xxx the write threshold in kilobytes set to xxx max_buffers=xxx the maximum number of tape buffer set to xxx max_sg_segs=xxx the maximum number of scatter/gather segments @@ -213,7 +207,7 @@ where aa is the buffer size in 1024 byte units - bb is the write threshold in 1024 byte units + bb is the write threshold in 1024 byte units (not used any more) cc is the maximum number of tape buffers to allocate (the number of buffers is bounded also by the number of drives detected) dd is the maximum number of scatter/gather segments @@ -321,9 +315,6 @@ MT_ST_SETBOOLEANS MT_ST_CLEARBOOLEANS Sets or clears the option bits. - MT_ST_WRITE_THRESHOLD - Sets the write threshold for this device to kilobytes - specified by the lowest bits. MT_ST_DEF_BLKSIZE Defines the default block size set automatically. Value 0xffffff means that the default is not used any more. diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/scsi/scsi.c linux.21rc1-ac1/drivers/scsi/scsi.c --- linux.21rc1/drivers/scsi/scsi.c 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/scsi/scsi.c 2003-04-22 16:44:37.000000000 +0100 @@ -352,8 +352,9 @@ int interruptable) { struct Scsi_Host *host; - Scsi_Cmnd *SCpnt = NULL; + Scsi_Cmnd *SCpnt; Scsi_Device *SDpnt; + struct list_head *lp; unsigned long flags; if (!device) @@ -364,7 +365,6 @@ spin_lock_irqsave(&device_request_lock, flags); while (1 == 1) { - SCpnt = NULL; if (!device->device_blocked) { if (device->single_lun) { /* @@ -404,26 +404,21 @@ * If asked to wait, we need to wait, otherwise * return NULL. */ - SCpnt = NULL; goto busy; } } /* - * Now we can check for a free command block for this device. + * Is there a free command block for this device? */ - for (SCpnt = device->device_queue; SCpnt; SCpnt = SCpnt->next) { - if (SCpnt->request.rq_status == RQ_INACTIVE) - break; - } + if (!list_empty(&device->sdev_free_q)) + goto found; } + /* - * If we couldn't find a free command block, and we have been + * Couldn't find a free command block, and we have been * asked to wait, then do so. */ - if (SCpnt) { - break; - } - busy: +busy: /* * If we have been asked to wait for a free block, then * wait here. @@ -475,12 +470,20 @@ return NULL; } } + continue; } else { spin_unlock_irqrestore(&device_request_lock, flags); return NULL; } } +found: + lp = device->sdev_free_q.next; + list_del(lp); + SCpnt = list_entry(lp, Scsi_Cmnd, sc_list); + if (SCpnt->request.rq_status != RQ_INACTIVE) + BUG(); + SCpnt->request.rq_status = RQ_SCSI_BUSY; SCpnt->request.waiting = NULL; /* And no one is waiting for this * to complete */ @@ -526,6 +529,9 @@ SDpnt = SCpnt->device; + /* command is now free - add to list */ + list_add(&SCpnt->sc_list, &SDpnt->sdev_free_q); + SCpnt->request.rq_status = RQ_INACTIVE; SCpnt->state = SCSI_STATE_UNUSED; SCpnt->owner = SCSI_OWNER_NOBODY; @@ -1333,14 +1339,10 @@ */ int scsi_retry_command(Scsi_Cmnd * SCpnt) { - memcpy((void *) SCpnt->cmnd, (void *) SCpnt->data_cmnd, - sizeof(SCpnt->data_cmnd)); - SCpnt->request_buffer = SCpnt->buffer; - SCpnt->request_bufflen = SCpnt->bufflen; - SCpnt->use_sg = SCpnt->old_use_sg; - SCpnt->cmd_len = SCpnt->old_cmd_len; - SCpnt->sc_data_direction = SCpnt->sc_old_data_direction; - SCpnt->underflow = SCpnt->old_underflow; + /* + * Restore the SCSI command state. + */ + scsi_setup_cmd_retry(SCpnt); /* * Zero the sense information from the last time we tried @@ -1448,6 +1450,7 @@ spin_lock_irqsave(&device_request_lock, flags); for (SCpnt = SDpnt->device_queue; SCpnt; SCpnt = SCnext) { SDpnt->device_queue = SCnext = SCpnt->next; + list_del(&SCpnt->sc_list); kfree((char *) SCpnt); } SDpnt->has_cmdblocks = 0; @@ -1484,6 +1487,7 @@ SDpnt->queue_depth = 1; /* live to fight another day */ } SDpnt->device_queue = NULL; + INIT_LIST_HEAD(&SDpnt->sdev_free_q); for (j = 0; j < SDpnt->queue_depth; j++) { SCpnt = (Scsi_Cmnd *) @@ -1513,6 +1517,7 @@ SDpnt->device_queue = SCpnt; SCpnt->state = SCSI_STATE_UNUSED; SCpnt->owner = SCSI_OWNER_NOBODY; + list_add(&SCpnt->sc_list, &SDpnt->sdev_free_q); } if (j < SDpnt->queue_depth) { /* low on space (D.Gilbert 990424) */ printk(KERN_WARNING "scsi_build_commandblocks: want=%d, space for=%d blocks\n", diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/scsi/scsi_error.c linux.21rc1-ac1/drivers/scsi/scsi_error.c --- linux.21rc1/drivers/scsi/scsi_error.c 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/scsi/scsi_error.c 2003-04-22 19:07:25.000000000 +0100 @@ -385,16 +385,10 @@ */ STATIC int scsi_eh_retry_command(Scsi_Cmnd * SCpnt) { - memcpy((void *) SCpnt->cmnd, (void *) SCpnt->data_cmnd, - sizeof(SCpnt->data_cmnd)); - SCpnt->request_buffer = SCpnt->buffer; - SCpnt->request_bufflen = SCpnt->bufflen; - SCpnt->use_sg = SCpnt->old_use_sg; - SCpnt->cmd_len = SCpnt->old_cmd_len; - SCpnt->sc_data_direction = SCpnt->sc_old_data_direction; - SCpnt->underflow = SCpnt->old_underflow; - - scsi_send_eh_cmnd(SCpnt, SCpnt->timeout_per_command); + do { + scsi_setup_cmd_retry(SCpnt); + scsi_send_eh_cmnd(SCpnt, SCpnt->timeout_per_command); + } while (SCpnt->eh_state == NEEDS_RETRY); /* * Hey, we are done. Let's look to see what happened. @@ -425,12 +419,6 @@ ASSERT_LOCK(&io_request_lock, 0); - memcpy((void *) SCpnt->cmnd, (void *) generic_sense, - sizeof(generic_sense)); - - if (SCpnt->device->scsi_level <= SCSI_2) - SCpnt->cmnd[1] = SCpnt->lun << 5; - scsi_result = (!SCpnt->host->hostt->unchecked_isa_dma) ? &scsi_result0[0] : kmalloc(512, GFP_ATOMIC | GFP_DMA); @@ -438,24 +426,40 @@ printk("cannot allocate scsi_result in scsi_request_sense.\n"); return FAILED; } - /* - * Zero the sense buffer. Some host adapters automatically always request - * sense, so it is not a good idea that SCpnt->request_buffer and - * SCpnt->sense_buffer point to the same address (DB). - * 0 is not a valid sense code. - */ - memset((void *) SCpnt->sense_buffer, 0, sizeof(SCpnt->sense_buffer)); - memset((void *) scsi_result, 0, 256); saved_result = SCpnt->result; - SCpnt->request_buffer = scsi_result; - SCpnt->request_bufflen = 256; - SCpnt->use_sg = 0; - SCpnt->cmd_len = COMMAND_SIZE(SCpnt->cmnd[0]); - SCpnt->sc_data_direction = SCSI_DATA_READ; - SCpnt->underflow = 0; - scsi_send_eh_cmnd(SCpnt, SENSE_TIMEOUT); + do { + memcpy((void *) SCpnt->cmnd, (void *) generic_sense, + sizeof(generic_sense)); + + if (SCpnt->device->scsi_level <= SCSI_2) + SCpnt->cmnd[1] = SCpnt->lun << 5; + + /* + * Zero the sense buffer. Some host adapters automatically + * always request sense, so it is not a good idea that + * SCpnt->request_buffer and SCpnt->sense_buffer point to + * the same address (DB). 0 is not a valid sense code. + */ + memset((void *) SCpnt->sense_buffer, 0, + sizeof(SCpnt->sense_buffer)); + memset((void *) scsi_result, 0, 256); + + SCpnt->request_buffer = scsi_result; + SCpnt->request_bufflen = 256; + SCpnt->use_sg = 0; + SCpnt->cmd_len = COMMAND_SIZE(SCpnt->cmnd[0]); + SCpnt->sc_data_direction = SCSI_DATA_READ; + SCpnt->underflow = 0; + + scsi_send_eh_cmnd(SCpnt, SENSE_TIMEOUT); + /* + * If the SCSI device responded with "logical unit + * is in process of becoming ready", we need to + * retry this command. + */ + } while (SCpnt->eh_state == NEEDS_RETRY); /* Last chance to have valid sense data */ if (!scsi_sense_valid(SCpnt)) @@ -479,6 +483,7 @@ SCpnt->cmd_len = SCpnt->old_cmd_len; SCpnt->sc_data_direction = SCpnt->sc_old_data_direction; SCpnt->underflow = SCpnt->old_underflow; + memset(SCpnt->sense_buffer, 0, sizeof(SCpnt->sense_buffer)); /* * Hey, we are done. Let's look to see what happened. @@ -497,26 +502,34 @@ static unsigned char tur_command[6] = {TEST_UNIT_READY, 0, 0, 0, 0, 0}; - memcpy((void *) SCpnt->cmnd, (void *) tur_command, - sizeof(tur_command)); + do { + memcpy((void *) SCpnt->cmnd, (void *) tur_command, + sizeof(tur_command)); - if (SCpnt->device->scsi_level <= SCSI_2) - SCpnt->cmnd[1] = SCpnt->lun << 5; + if (SCpnt->device->scsi_level <= SCSI_2) + SCpnt->cmnd[1] = SCpnt->lun << 5; - /* - * Zero the sense buffer. The SCSI spec mandates that any - * untransferred sense data should be interpreted as being zero. - */ - memset((void *) SCpnt->sense_buffer, 0, sizeof(SCpnt->sense_buffer)); + /* + * Zero the sense buffer. The SCSI spec mandates that any + * untransferred sense data should be interpreted as being zero. + */ + memset((void *) SCpnt->sense_buffer, 0, + sizeof(SCpnt->sense_buffer)); - SCpnt->request_buffer = NULL; - SCpnt->request_bufflen = 0; - SCpnt->use_sg = 0; - SCpnt->cmd_len = COMMAND_SIZE(SCpnt->cmnd[0]); - SCpnt->underflow = 0; - SCpnt->sc_data_direction = SCSI_DATA_NONE; + SCpnt->request_buffer = NULL; + SCpnt->request_bufflen = 0; + SCpnt->use_sg = 0; + SCpnt->cmd_len = COMMAND_SIZE(SCpnt->cmnd[0]); + SCpnt->underflow = 0; + SCpnt->sc_data_direction = SCSI_DATA_NONE; - scsi_send_eh_cmnd(SCpnt, SENSE_TIMEOUT); + scsi_send_eh_cmnd(SCpnt, SENSE_TIMEOUT); + /* + * If the SCSI device responded with "logical unit + * is in process of becoming ready", we need to + * retry this command. + */ + } while (SCpnt->eh_state == NEEDS_RETRY); /* * When we eventually call scsi_finish, we really wish to complete @@ -589,7 +602,6 @@ host = SCpnt->host; - retry: /* * We will use a queued command if possible, otherwise we will emulate the * queuing and calling of completion function ourselves. @@ -672,14 +684,13 @@ SCSI_LOG_ERROR_RECOVERY(3, printk("scsi_send_eh_cmnd: scsi_eh_completed_normally %x\n", ret)); switch (ret) { - case SUCCESS: - SCpnt->eh_state = SUCCESS; - break; - case NEEDS_RETRY: - goto retry; - case FAILED: default: - SCpnt->eh_state = FAILED; + ret = FAILED; + /*FALLTHROUGH*/ + case FAILED: + case NEEDS_RETRY: + case SUCCESS: + SCpnt->eh_state = ret; break; } } else { diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/scsi/scsi.h linux.21rc1-ac1/drivers/scsi/scsi.h --- linux.21rc1/drivers/scsi/scsi.h 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/scsi/scsi.h 2003-04-22 19:20:12.000000000 +0100 @@ -465,6 +465,7 @@ int sectors); extern struct Scsi_Device_Template *scsi_get_request_dev(struct request *); extern int scsi_init_cmd_errh(Scsi_Cmnd * SCpnt); +extern void scsi_setup_cmd_retry(Scsi_Cmnd *SCpnt); extern int scsi_insert_special_cmd(Scsi_Cmnd * SCpnt, int); extern void scsi_io_completion(Scsi_Cmnd * SCpnt, int good_sectors, int block_sectors); @@ -558,6 +559,7 @@ int (*scsi_init_io_fn) (Scsi_Cmnd *); /* Used to initialize new request */ Scsi_Cmnd *device_queue; /* queue of SCSI Command structures */ + struct list_head sdev_free_q; /* list of free cmds */ /* public: */ unsigned int id, lun, channel; @@ -775,6 +777,8 @@ * received on original command * (auto-sense) */ + struct list_head sc_list; /* Inactive cmd list linkage, guarded + * by device_request_lock. */ unsigned flags; /* diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/scsi/scsi_ioctl.c linux.21rc1-ac1/drivers/scsi/scsi_ioctl.c --- linux.21rc1/drivers/scsi/scsi_ioctl.c 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/scsi/scsi_ioctl.c 2003-04-22 16:44:37.000000000 +0100 @@ -279,6 +279,7 @@ cmd[1] = (cmd[1] & 0x1f) | (dev->lun << 5); switch (opcode) { + case SEND_DIAGNOSTIC: case FORMAT_UNIT: timeout = FORMAT_UNIT_TIMEOUT; retries = 1; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/scsi/scsi_lib.c linux.21rc1-ac1/drivers/scsi/scsi_lib.c --- linux.21rc1/drivers/scsi/scsi_lib.c 2003-04-22 16:39:40.000000000 +0100 +++ linux.21rc1-ac1/drivers/scsi/scsi_lib.c 2003-04-22 16:44:37.000000000 +0100 @@ -208,6 +208,30 @@ } /* + * Function: scsi_setup_cmd_retry() + * + * Purpose: Restore the command state for a retry + * + * Arguments: SCpnt - command to be restored + * + * Returns: Nothing + * + * Notes: Immediately prior to retrying a command, we need + * to restore certain fields that we saved above. + */ +void scsi_setup_cmd_retry(Scsi_Cmnd *SCpnt) +{ + memcpy((void *) SCpnt->cmnd, (void *) SCpnt->data_cmnd, + sizeof(SCpnt->data_cmnd)); + SCpnt->request_buffer = SCpnt->buffer; + SCpnt->request_bufflen = SCpnt->bufflen; + SCpnt->use_sg = SCpnt->old_use_sg; + SCpnt->cmd_len = SCpnt->old_cmd_len; + SCpnt->sc_data_direction = SCpnt->sc_old_data_direction; + SCpnt->underflow = SCpnt->old_underflow; +} + +/* * Function: scsi_queue_next_request() * * Purpose: Handle post-processing of completed commands. @@ -722,7 +746,7 @@ printk("scsi%d: ERROR on channel %d, id %d, lun %d, CDB: ", SCpnt->host->host_no, (int) SCpnt->channel, (int) SCpnt->target, (int) SCpnt->lun); - print_command(SCpnt->cmnd); + print_command(SCpnt->data_cmnd); print_sense("sd", SCpnt); SCpnt = scsi_end_request(SCpnt, 0, block_sectors); return; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/scsi/scsi_scan.c linux.21rc1-ac1/drivers/scsi/scsi_scan.c --- linux.21rc1/drivers/scsi/scsi_scan.c 2003-04-22 16:39:40.000000000 +0100 +++ linux.21rc1-ac1/drivers/scsi/scsi_scan.c 2003-04-22 16:44:37.000000000 +0100 @@ -608,6 +608,7 @@ } else { /* assume no peripheral if any other sort of error */ scsi_release_request(SRpnt); + scsi_release_commandblocks(SDpnt); return 0; } } @@ -631,6 +632,7 @@ */ if ((scsi_result[0] >> 5) == 3) { scsi_release_request(SRpnt); + scsi_release_commandblocks(SDpnt); return 0; /* assume no peripheral if any sort of error */ } /* The Toshiba ROM was "gender-changed" here as an inline hack. diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/scsi/sd.c linux.21rc1-ac1/drivers/scsi/sd.c --- linux.21rc1/drivers/scsi/sd.c 2003-04-22 16:39:40.000000000 +0100 +++ linux.21rc1-ac1/drivers/scsi/sd.c 2003-04-22 17:04:13.000000000 +0100 @@ -852,10 +852,13 @@ break; } - /* Look for non-removable devices that return NOT_READY. + /* Look for non-removable devices that return NOT_READY, + * and don't require manual intervention. * Issue command to spin up drive for these cases. */ if (the_result && !rscsi_disks[i].device->removable && - SRpnt->sr_sense_buffer[2] == NOT_READY) { + SRpnt->sr_sense_buffer[2] == NOT_READY && + ! ( SRpnt->sr_sense_buffer[12] == 0x04 && /* ASC */ + SRpnt->sr_sense_buffer[13] == 0x03 )) { /* ASCQ */ unsigned long time1; if (!spintime) { printk("%s: Spinning up disk...", nbuff); @@ -1013,7 +1016,7 @@ } printk("SCSI device %s: " - "%u %d-byte hdwr sectors (%u MB)\n", + "%u %d-byte hdwr sectors (%d MB)\n", nbuff, rscsi_disks[i].capacity, hard_sector, (sz - sz/625 + 974)/1950); } diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/scsi/sd.h linux.21rc1-ac1/drivers/scsi/sd.h --- linux.21rc1/drivers/scsi/sd.h 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/scsi/sd.h 2003-04-22 19:20:12.000000000 +0100 @@ -24,13 +24,13 @@ #endif typedef struct scsi_disk { - unsigned capacity; /* size in blocks */ Scsi_Device *device; - unsigned char ready; /* flag ready for FLOPTICAL */ - unsigned char write_prot; /* flag write_protect for rmvable dev */ - unsigned char sector_bit_size; /* sector_size = 2 to the bit size power */ - unsigned char sector_bit_shift; /* power of 2 sectors per FS block */ + unsigned capacity; /* size in blocks */ + unsigned char sector_bit_size; /* sector_size = 2 to the bit size power */ + unsigned char sector_bit_shift; /* power of 2 sectors per FS block */ unsigned has_part_table:1; /* has partition table */ + unsigned ready:1; /* flag ready for FLOPTICAL */ + unsigned write_prot:1; /* flag write_protect for rmvable dev */ } Scsi_Disk; extern int revalidate_scsidisk(kdev_t dev, int maxusage); diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/scsi/sim710_d.h linux.21rc1-ac1/drivers/scsi/sim710_d.h --- linux.21rc1/drivers/scsi/sim710_d.h 2003-04-22 16:38:48.000000000 +0100 +++ linux.21rc1-ac1/drivers/scsi/sim710_d.h 2003-04-22 16:44:37.000000000 +0100 @@ -18,15 +18,12 @@ ABSOLUTE reselected_identify = 0 ABSOLUTE msgin_buf = 0 +ABSOLUTE msg_reject = 0 +ABSOLUTE test1_src = 0 +ABSOLUTE test1_dst = 0 -ABSOLUTE int_bad_extmsg1a = 0xab930000 -ABSOLUTE int_bad_extmsg1b = 0xab930001 -ABSOLUTE int_bad_extmsg2a = 0xab930002 -ABSOLUTE int_bad_extmsg2b = 0xab930003 -ABSOLUTE int_bad_extmsg3a = 0xab930004 -ABSOLUTE int_bad_extmsg3b = 0xab930005 ABSOLUTE int_bad_msg1 = 0xab930006 ABSOLUTE int_bad_msg2 = 0xab930007 ABSOLUTE int_bad_msg3 = 0xab930008 @@ -50,7 +47,7 @@ ABSOLUTE int_disc2 = 0xab93001a ABSOLUTE int_disc3 = 0xab93001b ABSOLUTE int_not_rej = 0xab93001c - +ABSOLUTE int_test1 = 0xab93001d @@ -65,6 +62,9 @@ +ABSOLUTE did_reject = 0x01 + + @@ -74,1641 +74,1709 @@ at 0x00000000 : */ 0x60000200,0x00000000, /* - MOVE SCRATCH0 & 0 TO SCRATCH0 - -at 0x00000002 : */ 0x7c340000,0x00000000, -/* ; Enable selection timer MOVE CTEST7 & 0xef TO CTEST7 -at 0x00000004 : */ 0x7c1bef00,0x00000000, +at 0x00000002 : */ 0x7c1bef00,0x00000000, /* SELECT ATN FROM dsa_select, reselect -at 0x00000006 : */ 0x43000000,0x00000c48, +at 0x00000004 : */ 0x43000000,0x00000cd0, /* JUMP get_status, WHEN STATUS -at 0x00000008 : */ 0x830b0000,0x000000a0, +at 0x00000006 : */ 0x830b0000,0x00000098, /* ; Disable selection timer MOVE CTEST7 | 0x10 TO CTEST7 -at 0x0000000a : */ 0x7a1b1000,0x00000000, +at 0x00000008 : */ 0x7a1b1000,0x00000000, /* MOVE SCRATCH0 | had_select TO SCRATCH0 -at 0x0000000c : */ 0x7a340100,0x00000000, +at 0x0000000a : */ 0x7a340100,0x00000000, /* INT int_sel_no_ident, IF NOT MSG_OUT -at 0x0000000e : */ 0x9e020000,0xab930013, +at 0x0000000c : */ 0x9e020000,0xab930013, /* MOVE SCRATCH0 | had_msgout TO SCRATCH0 -at 0x00000010 : */ 0x7a340200,0x00000000, +at 0x0000000e : */ 0x7a340200,0x00000000, /* MOVE FROM dsa_msgout, when MSG_OUT -at 0x00000012 : */ 0x1e000000,0x00000008, +at 0x00000010 : */ 0x1e000000,0x00000008, /* ENTRY done_ident done_ident: JUMP get_status, IF STATUS -at 0x00000014 : */ 0x830a0000,0x000000a0, +at 0x00000012 : */ 0x830a0000,0x00000098, /* redo_msgin1: JUMP get_msgin1, WHEN MSG_IN -at 0x00000016 : */ 0x870b0000,0x00000920, +at 0x00000014 : */ 0x870b0000,0x00000918, /* INT int_sel_not_cmd, IF NOT CMD -at 0x00000018 : */ 0x9a020000,0xab930014, +at 0x00000016 : */ 0x9a020000,0xab930014, /* ENTRY resume_cmd resume_cmd: MOVE SCRATCH0 | had_cmdout TO SCRATCH0 -at 0x0000001a : */ 0x7a340400,0x00000000, +at 0x00000018 : */ 0x7a340400,0x00000000, /* MOVE FROM dsa_cmnd, WHEN CMD -at 0x0000001c : */ 0x1a000000,0x00000010, +at 0x0000001a : */ 0x1a000000,0x00000010, /* ENTRY resume_pmm resume_pmm: redo_msgin2: JUMP get_msgin2, WHEN MSG_IN -at 0x0000001e : */ 0x870b0000,0x00000a20, +at 0x0000001c : */ 0x870b0000,0x00000a48, /* JUMP get_status, IF STATUS -at 0x00000020 : */ 0x830a0000,0x000000a0, +at 0x0000001e : */ 0x830a0000,0x00000098, /* JUMP input_data, IF DATA_IN -at 0x00000022 : */ 0x810a0000,0x000000e0, +at 0x00000020 : */ 0x810a0000,0x000000d8, /* JUMP output_data, IF DATA_OUT -at 0x00000024 : */ 0x800a0000,0x000004f8, +at 0x00000022 : */ 0x800a0000,0x000004f0, /* INT int_cmd_bad_phase -at 0x00000026 : */ 0x98080000,0xab930009, +at 0x00000024 : */ 0x98080000,0xab930009, /* get_status: ; Disable selection timer MOVE CTEST7 | 0x10 TO CTEST7 -at 0x00000028 : */ 0x7a1b1000,0x00000000, +at 0x00000026 : */ 0x7a1b1000,0x00000000, /* MOVE FROM dsa_status, WHEN STATUS -at 0x0000002a : */ 0x1b000000,0x00000018, +at 0x00000028 : */ 0x1b000000,0x00000018, /* INT int_status_not_msgin, WHEN NOT MSG_IN -at 0x0000002c : */ 0x9f030000,0xab930015, +at 0x0000002a : */ 0x9f030000,0xab930015, /* MOVE FROM dsa_msgin, WHEN MSG_IN -at 0x0000002e : */ 0x1f000000,0x00000020, +at 0x0000002c : */ 0x1f000000,0x00000020, /* INT int_not_cmd_complete, IF NOT 0x00 -at 0x00000030 : */ 0x98040000,0xab930012, +at 0x0000002e : */ 0x98040000,0xab930012, /* CLEAR ACK -at 0x00000032 : */ 0x60000040,0x00000000, +at 0x00000030 : */ 0x60000040,0x00000000, /* ENTRY wait_disc_complete wait_disc_complete: WAIT DISCONNECT -at 0x00000034 : */ 0x48000000,0x00000000, +at 0x00000032 : */ 0x48000000,0x00000000, /* INT int_cmd_complete -at 0x00000036 : */ 0x98080000,0xab93000a, +at 0x00000034 : */ 0x98080000,0xab93000a, /* input_data: MOVE SCRATCH0 | had_datain TO SCRATCH0 -at 0x00000038 : */ 0x7a340800,0x00000000, +at 0x00000036 : */ 0x7a340800,0x00000000, /* ENTRY patch_input_data patch_input_data: JUMP 0 -at 0x0000003a : */ 0x80080000,0x00000000, +at 0x00000038 : */ 0x80080000,0x00000000, /* MOVE FROM dsa_datain+0x0000, WHEN DATA_IN -at 0x0000003c : */ 0x19000000,0x00000028, +at 0x0000003a : */ 0x19000000,0x00000028, /* MOVE FROM dsa_datain+0x0008, WHEN DATA_IN -at 0x0000003e : */ 0x19000000,0x00000030, +at 0x0000003c : */ 0x19000000,0x00000030, /* MOVE FROM dsa_datain+0x0010, WHEN DATA_IN -at 0x00000040 : */ 0x19000000,0x00000038, +at 0x0000003e : */ 0x19000000,0x00000038, /* MOVE FROM dsa_datain+0x0018, WHEN DATA_IN -at 0x00000042 : */ 0x19000000,0x00000040, +at 0x00000040 : */ 0x19000000,0x00000040, /* MOVE FROM dsa_datain+0x0020, WHEN DATA_IN -at 0x00000044 : */ 0x19000000,0x00000048, +at 0x00000042 : */ 0x19000000,0x00000048, /* MOVE FROM dsa_datain+0x0028, WHEN DATA_IN -at 0x00000046 : */ 0x19000000,0x00000050, +at 0x00000044 : */ 0x19000000,0x00000050, /* MOVE FROM dsa_datain+0x0030, WHEN DATA_IN -at 0x00000048 : */ 0x19000000,0x00000058, +at 0x00000046 : */ 0x19000000,0x00000058, /* MOVE FROM dsa_datain+0x0038, WHEN DATA_IN -at 0x0000004a : */ 0x19000000,0x00000060, +at 0x00000048 : */ 0x19000000,0x00000060, /* MOVE FROM dsa_datain+0x0040, WHEN DATA_IN -at 0x0000004c : */ 0x19000000,0x00000068, +at 0x0000004a : */ 0x19000000,0x00000068, /* MOVE FROM dsa_datain+0x0048, WHEN DATA_IN -at 0x0000004e : */ 0x19000000,0x00000070, +at 0x0000004c : */ 0x19000000,0x00000070, /* MOVE FROM dsa_datain+0x0050, WHEN DATA_IN -at 0x00000050 : */ 0x19000000,0x00000078, +at 0x0000004e : */ 0x19000000,0x00000078, /* MOVE FROM dsa_datain+0x0058, WHEN DATA_IN -at 0x00000052 : */ 0x19000000,0x00000080, +at 0x00000050 : */ 0x19000000,0x00000080, /* MOVE FROM dsa_datain+0x0060, WHEN DATA_IN -at 0x00000054 : */ 0x19000000,0x00000088, +at 0x00000052 : */ 0x19000000,0x00000088, /* MOVE FROM dsa_datain+0x0068, WHEN DATA_IN -at 0x00000056 : */ 0x19000000,0x00000090, +at 0x00000054 : */ 0x19000000,0x00000090, /* MOVE FROM dsa_datain+0x0070, WHEN DATA_IN -at 0x00000058 : */ 0x19000000,0x00000098, +at 0x00000056 : */ 0x19000000,0x00000098, /* MOVE FROM dsa_datain+0x0078, WHEN DATA_IN -at 0x0000005a : */ 0x19000000,0x000000a0, +at 0x00000058 : */ 0x19000000,0x000000a0, /* MOVE FROM dsa_datain+0x0080, WHEN DATA_IN -at 0x0000005c : */ 0x19000000,0x000000a8, +at 0x0000005a : */ 0x19000000,0x000000a8, /* MOVE FROM dsa_datain+0x0088, WHEN DATA_IN -at 0x0000005e : */ 0x19000000,0x000000b0, +at 0x0000005c : */ 0x19000000,0x000000b0, /* MOVE FROM dsa_datain+0x0090, WHEN DATA_IN -at 0x00000060 : */ 0x19000000,0x000000b8, +at 0x0000005e : */ 0x19000000,0x000000b8, /* MOVE FROM dsa_datain+0x0098, WHEN DATA_IN -at 0x00000062 : */ 0x19000000,0x000000c0, +at 0x00000060 : */ 0x19000000,0x000000c0, /* MOVE FROM dsa_datain+0x00a0, WHEN DATA_IN -at 0x00000064 : */ 0x19000000,0x000000c8, +at 0x00000062 : */ 0x19000000,0x000000c8, /* MOVE FROM dsa_datain+0x00a8, WHEN DATA_IN -at 0x00000066 : */ 0x19000000,0x000000d0, +at 0x00000064 : */ 0x19000000,0x000000d0, /* MOVE FROM dsa_datain+0x00b0, WHEN DATA_IN -at 0x00000068 : */ 0x19000000,0x000000d8, +at 0x00000066 : */ 0x19000000,0x000000d8, /* MOVE FROM dsa_datain+0x00b8, WHEN DATA_IN -at 0x0000006a : */ 0x19000000,0x000000e0, +at 0x00000068 : */ 0x19000000,0x000000e0, /* MOVE FROM dsa_datain+0x00c0, WHEN DATA_IN -at 0x0000006c : */ 0x19000000,0x000000e8, +at 0x0000006a : */ 0x19000000,0x000000e8, /* MOVE FROM dsa_datain+0x00c8, WHEN DATA_IN -at 0x0000006e : */ 0x19000000,0x000000f0, +at 0x0000006c : */ 0x19000000,0x000000f0, /* MOVE FROM dsa_datain+0x00d0, WHEN DATA_IN -at 0x00000070 : */ 0x19000000,0x000000f8, +at 0x0000006e : */ 0x19000000,0x000000f8, /* MOVE FROM dsa_datain+0x00d8, WHEN DATA_IN -at 0x00000072 : */ 0x19000000,0x00000100, +at 0x00000070 : */ 0x19000000,0x00000100, /* MOVE FROM dsa_datain+0x00e0, WHEN DATA_IN -at 0x00000074 : */ 0x19000000,0x00000108, +at 0x00000072 : */ 0x19000000,0x00000108, /* MOVE FROM dsa_datain+0x00e8, WHEN DATA_IN -at 0x00000076 : */ 0x19000000,0x00000110, +at 0x00000074 : */ 0x19000000,0x00000110, /* MOVE FROM dsa_datain+0x00f0, WHEN DATA_IN -at 0x00000078 : */ 0x19000000,0x00000118, +at 0x00000076 : */ 0x19000000,0x00000118, /* MOVE FROM dsa_datain+0x00f8, WHEN DATA_IN -at 0x0000007a : */ 0x19000000,0x00000120, +at 0x00000078 : */ 0x19000000,0x00000120, /* MOVE FROM dsa_datain+0x0100, WHEN DATA_IN -at 0x0000007c : */ 0x19000000,0x00000128, +at 0x0000007a : */ 0x19000000,0x00000128, /* MOVE FROM dsa_datain+0x0108, WHEN DATA_IN -at 0x0000007e : */ 0x19000000,0x00000130, +at 0x0000007c : */ 0x19000000,0x00000130, /* MOVE FROM dsa_datain+0x0110, WHEN DATA_IN -at 0x00000080 : */ 0x19000000,0x00000138, +at 0x0000007e : */ 0x19000000,0x00000138, /* MOVE FROM dsa_datain+0x0118, WHEN DATA_IN -at 0x00000082 : */ 0x19000000,0x00000140, +at 0x00000080 : */ 0x19000000,0x00000140, /* MOVE FROM dsa_datain+0x0120, WHEN DATA_IN -at 0x00000084 : */ 0x19000000,0x00000148, +at 0x00000082 : */ 0x19000000,0x00000148, /* MOVE FROM dsa_datain+0x0128, WHEN DATA_IN -at 0x00000086 : */ 0x19000000,0x00000150, +at 0x00000084 : */ 0x19000000,0x00000150, /* MOVE FROM dsa_datain+0x0130, WHEN DATA_IN -at 0x00000088 : */ 0x19000000,0x00000158, +at 0x00000086 : */ 0x19000000,0x00000158, /* MOVE FROM dsa_datain+0x0138, WHEN DATA_IN -at 0x0000008a : */ 0x19000000,0x00000160, +at 0x00000088 : */ 0x19000000,0x00000160, /* MOVE FROM dsa_datain+0x0140, WHEN DATA_IN -at 0x0000008c : */ 0x19000000,0x00000168, +at 0x0000008a : */ 0x19000000,0x00000168, /* MOVE FROM dsa_datain+0x0148, WHEN DATA_IN -at 0x0000008e : */ 0x19000000,0x00000170, +at 0x0000008c : */ 0x19000000,0x00000170, /* MOVE FROM dsa_datain+0x0150, WHEN DATA_IN -at 0x00000090 : */ 0x19000000,0x00000178, +at 0x0000008e : */ 0x19000000,0x00000178, /* MOVE FROM dsa_datain+0x0158, WHEN DATA_IN -at 0x00000092 : */ 0x19000000,0x00000180, +at 0x00000090 : */ 0x19000000,0x00000180, /* MOVE FROM dsa_datain+0x0160, WHEN DATA_IN -at 0x00000094 : */ 0x19000000,0x00000188, +at 0x00000092 : */ 0x19000000,0x00000188, /* MOVE FROM dsa_datain+0x0168, WHEN DATA_IN -at 0x00000096 : */ 0x19000000,0x00000190, +at 0x00000094 : */ 0x19000000,0x00000190, /* MOVE FROM dsa_datain+0x0170, WHEN DATA_IN -at 0x00000098 : */ 0x19000000,0x00000198, +at 0x00000096 : */ 0x19000000,0x00000198, /* MOVE FROM dsa_datain+0x0178, WHEN DATA_IN -at 0x0000009a : */ 0x19000000,0x000001a0, +at 0x00000098 : */ 0x19000000,0x000001a0, /* MOVE FROM dsa_datain+0x0180, WHEN DATA_IN -at 0x0000009c : */ 0x19000000,0x000001a8, +at 0x0000009a : */ 0x19000000,0x000001a8, /* MOVE FROM dsa_datain+0x0188, WHEN DATA_IN -at 0x0000009e : */ 0x19000000,0x000001b0, +at 0x0000009c : */ 0x19000000,0x000001b0, /* MOVE FROM dsa_datain+0x0190, WHEN DATA_IN -at 0x000000a0 : */ 0x19000000,0x000001b8, +at 0x0000009e : */ 0x19000000,0x000001b8, /* MOVE FROM dsa_datain+0x0198, WHEN DATA_IN -at 0x000000a2 : */ 0x19000000,0x000001c0, +at 0x000000a0 : */ 0x19000000,0x000001c0, /* MOVE FROM dsa_datain+0x01a0, WHEN DATA_IN -at 0x000000a4 : */ 0x19000000,0x000001c8, +at 0x000000a2 : */ 0x19000000,0x000001c8, /* MOVE FROM dsa_datain+0x01a8, WHEN DATA_IN -at 0x000000a6 : */ 0x19000000,0x000001d0, +at 0x000000a4 : */ 0x19000000,0x000001d0, /* MOVE FROM dsa_datain+0x01b0, WHEN DATA_IN -at 0x000000a8 : */ 0x19000000,0x000001d8, +at 0x000000a6 : */ 0x19000000,0x000001d8, /* MOVE FROM dsa_datain+0x01b8, WHEN DATA_IN -at 0x000000aa : */ 0x19000000,0x000001e0, +at 0x000000a8 : */ 0x19000000,0x000001e0, /* MOVE FROM dsa_datain+0x01c0, WHEN DATA_IN -at 0x000000ac : */ 0x19000000,0x000001e8, +at 0x000000aa : */ 0x19000000,0x000001e8, /* MOVE FROM dsa_datain+0x01c8, WHEN DATA_IN -at 0x000000ae : */ 0x19000000,0x000001f0, +at 0x000000ac : */ 0x19000000,0x000001f0, /* MOVE FROM dsa_datain+0x01d0, WHEN DATA_IN -at 0x000000b0 : */ 0x19000000,0x000001f8, +at 0x000000ae : */ 0x19000000,0x000001f8, /* MOVE FROM dsa_datain+0x01d8, WHEN DATA_IN -at 0x000000b2 : */ 0x19000000,0x00000200, +at 0x000000b0 : */ 0x19000000,0x00000200, /* MOVE FROM dsa_datain+0x01e0, WHEN DATA_IN -at 0x000000b4 : */ 0x19000000,0x00000208, +at 0x000000b2 : */ 0x19000000,0x00000208, /* MOVE FROM dsa_datain+0x01e8, WHEN DATA_IN -at 0x000000b6 : */ 0x19000000,0x00000210, +at 0x000000b4 : */ 0x19000000,0x00000210, /* MOVE FROM dsa_datain+0x01f0, WHEN DATA_IN -at 0x000000b8 : */ 0x19000000,0x00000218, +at 0x000000b6 : */ 0x19000000,0x00000218, /* MOVE FROM dsa_datain+0x01f8, WHEN DATA_IN -at 0x000000ba : */ 0x19000000,0x00000220, +at 0x000000b8 : */ 0x19000000,0x00000220, /* MOVE FROM dsa_datain+0x0200, WHEN DATA_IN -at 0x000000bc : */ 0x19000000,0x00000228, +at 0x000000ba : */ 0x19000000,0x00000228, /* MOVE FROM dsa_datain+0x0208, WHEN DATA_IN -at 0x000000be : */ 0x19000000,0x00000230, +at 0x000000bc : */ 0x19000000,0x00000230, /* MOVE FROM dsa_datain+0x0210, WHEN DATA_IN -at 0x000000c0 : */ 0x19000000,0x00000238, +at 0x000000be : */ 0x19000000,0x00000238, /* MOVE FROM dsa_datain+0x0218, WHEN DATA_IN -at 0x000000c2 : */ 0x19000000,0x00000240, +at 0x000000c0 : */ 0x19000000,0x00000240, /* MOVE FROM dsa_datain+0x0220, WHEN DATA_IN -at 0x000000c4 : */ 0x19000000,0x00000248, +at 0x000000c2 : */ 0x19000000,0x00000248, /* MOVE FROM dsa_datain+0x0228, WHEN DATA_IN -at 0x000000c6 : */ 0x19000000,0x00000250, +at 0x000000c4 : */ 0x19000000,0x00000250, /* MOVE FROM dsa_datain+0x0230, WHEN DATA_IN -at 0x000000c8 : */ 0x19000000,0x00000258, +at 0x000000c6 : */ 0x19000000,0x00000258, /* MOVE FROM dsa_datain+0x0238, WHEN DATA_IN -at 0x000000ca : */ 0x19000000,0x00000260, +at 0x000000c8 : */ 0x19000000,0x00000260, /* MOVE FROM dsa_datain+0x0240, WHEN DATA_IN -at 0x000000cc : */ 0x19000000,0x00000268, +at 0x000000ca : */ 0x19000000,0x00000268, /* MOVE FROM dsa_datain+0x0248, WHEN DATA_IN -at 0x000000ce : */ 0x19000000,0x00000270, +at 0x000000cc : */ 0x19000000,0x00000270, /* MOVE FROM dsa_datain+0x0250, WHEN DATA_IN -at 0x000000d0 : */ 0x19000000,0x00000278, +at 0x000000ce : */ 0x19000000,0x00000278, /* MOVE FROM dsa_datain+0x0258, WHEN DATA_IN -at 0x000000d2 : */ 0x19000000,0x00000280, +at 0x000000d0 : */ 0x19000000,0x00000280, /* MOVE FROM dsa_datain+0x0260, WHEN DATA_IN -at 0x000000d4 : */ 0x19000000,0x00000288, +at 0x000000d2 : */ 0x19000000,0x00000288, /* MOVE FROM dsa_datain+0x0268, WHEN DATA_IN -at 0x000000d6 : */ 0x19000000,0x00000290, +at 0x000000d4 : */ 0x19000000,0x00000290, /* MOVE FROM dsa_datain+0x0270, WHEN DATA_IN -at 0x000000d8 : */ 0x19000000,0x00000298, +at 0x000000d6 : */ 0x19000000,0x00000298, /* MOVE FROM dsa_datain+0x0278, WHEN DATA_IN -at 0x000000da : */ 0x19000000,0x000002a0, +at 0x000000d8 : */ 0x19000000,0x000002a0, /* MOVE FROM dsa_datain+0x0280, WHEN DATA_IN -at 0x000000dc : */ 0x19000000,0x000002a8, +at 0x000000da : */ 0x19000000,0x000002a8, /* MOVE FROM dsa_datain+0x0288, WHEN DATA_IN -at 0x000000de : */ 0x19000000,0x000002b0, +at 0x000000dc : */ 0x19000000,0x000002b0, /* MOVE FROM dsa_datain+0x0290, WHEN DATA_IN -at 0x000000e0 : */ 0x19000000,0x000002b8, +at 0x000000de : */ 0x19000000,0x000002b8, /* MOVE FROM dsa_datain+0x0298, WHEN DATA_IN -at 0x000000e2 : */ 0x19000000,0x000002c0, +at 0x000000e0 : */ 0x19000000,0x000002c0, /* MOVE FROM dsa_datain+0x02a0, WHEN DATA_IN -at 0x000000e4 : */ 0x19000000,0x000002c8, +at 0x000000e2 : */ 0x19000000,0x000002c8, /* MOVE FROM dsa_datain+0x02a8, WHEN DATA_IN -at 0x000000e6 : */ 0x19000000,0x000002d0, +at 0x000000e4 : */ 0x19000000,0x000002d0, /* MOVE FROM dsa_datain+0x02b0, WHEN DATA_IN -at 0x000000e8 : */ 0x19000000,0x000002d8, +at 0x000000e6 : */ 0x19000000,0x000002d8, /* MOVE FROM dsa_datain+0x02b8, WHEN DATA_IN -at 0x000000ea : */ 0x19000000,0x000002e0, +at 0x000000e8 : */ 0x19000000,0x000002e0, /* MOVE FROM dsa_datain+0x02c0, WHEN DATA_IN -at 0x000000ec : */ 0x19000000,0x000002e8, +at 0x000000ea : */ 0x19000000,0x000002e8, /* MOVE FROM dsa_datain+0x02c8, WHEN DATA_IN -at 0x000000ee : */ 0x19000000,0x000002f0, +at 0x000000ec : */ 0x19000000,0x000002f0, /* MOVE FROM dsa_datain+0x02d0, WHEN DATA_IN -at 0x000000f0 : */ 0x19000000,0x000002f8, +at 0x000000ee : */ 0x19000000,0x000002f8, /* MOVE FROM dsa_datain+0x02d8, WHEN DATA_IN -at 0x000000f2 : */ 0x19000000,0x00000300, +at 0x000000f0 : */ 0x19000000,0x00000300, /* MOVE FROM dsa_datain+0x02e0, WHEN DATA_IN -at 0x000000f4 : */ 0x19000000,0x00000308, +at 0x000000f2 : */ 0x19000000,0x00000308, /* MOVE FROM dsa_datain+0x02e8, WHEN DATA_IN -at 0x000000f6 : */ 0x19000000,0x00000310, +at 0x000000f4 : */ 0x19000000,0x00000310, /* MOVE FROM dsa_datain+0x02f0, WHEN DATA_IN -at 0x000000f8 : */ 0x19000000,0x00000318, +at 0x000000f6 : */ 0x19000000,0x00000318, /* MOVE FROM dsa_datain+0x02f8, WHEN DATA_IN -at 0x000000fa : */ 0x19000000,0x00000320, +at 0x000000f8 : */ 0x19000000,0x00000320, /* MOVE FROM dsa_datain+0x0300, WHEN DATA_IN -at 0x000000fc : */ 0x19000000,0x00000328, +at 0x000000fa : */ 0x19000000,0x00000328, /* MOVE FROM dsa_datain+0x0308, WHEN DATA_IN -at 0x000000fe : */ 0x19000000,0x00000330, +at 0x000000fc : */ 0x19000000,0x00000330, /* MOVE FROM dsa_datain+0x0310, WHEN DATA_IN -at 0x00000100 : */ 0x19000000,0x00000338, +at 0x000000fe : */ 0x19000000,0x00000338, /* MOVE FROM dsa_datain+0x0318, WHEN DATA_IN -at 0x00000102 : */ 0x19000000,0x00000340, +at 0x00000100 : */ 0x19000000,0x00000340, /* MOVE FROM dsa_datain+0x0320, WHEN DATA_IN -at 0x00000104 : */ 0x19000000,0x00000348, +at 0x00000102 : */ 0x19000000,0x00000348, /* MOVE FROM dsa_datain+0x0328, WHEN DATA_IN -at 0x00000106 : */ 0x19000000,0x00000350, +at 0x00000104 : */ 0x19000000,0x00000350, /* MOVE FROM dsa_datain+0x0330, WHEN DATA_IN -at 0x00000108 : */ 0x19000000,0x00000358, +at 0x00000106 : */ 0x19000000,0x00000358, /* MOVE FROM dsa_datain+0x0338, WHEN DATA_IN -at 0x0000010a : */ 0x19000000,0x00000360, +at 0x00000108 : */ 0x19000000,0x00000360, /* MOVE FROM dsa_datain+0x0340, WHEN DATA_IN -at 0x0000010c : */ 0x19000000,0x00000368, +at 0x0000010a : */ 0x19000000,0x00000368, /* MOVE FROM dsa_datain+0x0348, WHEN DATA_IN -at 0x0000010e : */ 0x19000000,0x00000370, +at 0x0000010c : */ 0x19000000,0x00000370, /* MOVE FROM dsa_datain+0x0350, WHEN DATA_IN -at 0x00000110 : */ 0x19000000,0x00000378, +at 0x0000010e : */ 0x19000000,0x00000378, /* MOVE FROM dsa_datain+0x0358, WHEN DATA_IN -at 0x00000112 : */ 0x19000000,0x00000380, +at 0x00000110 : */ 0x19000000,0x00000380, /* MOVE FROM dsa_datain+0x0360, WHEN DATA_IN -at 0x00000114 : */ 0x19000000,0x00000388, +at 0x00000112 : */ 0x19000000,0x00000388, /* MOVE FROM dsa_datain+0x0368, WHEN DATA_IN -at 0x00000116 : */ 0x19000000,0x00000390, +at 0x00000114 : */ 0x19000000,0x00000390, /* MOVE FROM dsa_datain+0x0370, WHEN DATA_IN -at 0x00000118 : */ 0x19000000,0x00000398, +at 0x00000116 : */ 0x19000000,0x00000398, /* MOVE FROM dsa_datain+0x0378, WHEN DATA_IN -at 0x0000011a : */ 0x19000000,0x000003a0, +at 0x00000118 : */ 0x19000000,0x000003a0, /* MOVE FROM dsa_datain+0x0380, WHEN DATA_IN -at 0x0000011c : */ 0x19000000,0x000003a8, +at 0x0000011a : */ 0x19000000,0x000003a8, /* MOVE FROM dsa_datain+0x0388, WHEN DATA_IN -at 0x0000011e : */ 0x19000000,0x000003b0, +at 0x0000011c : */ 0x19000000,0x000003b0, /* MOVE FROM dsa_datain+0x0390, WHEN DATA_IN -at 0x00000120 : */ 0x19000000,0x000003b8, +at 0x0000011e : */ 0x19000000,0x000003b8, /* MOVE FROM dsa_datain+0x0398, WHEN DATA_IN -at 0x00000122 : */ 0x19000000,0x000003c0, +at 0x00000120 : */ 0x19000000,0x000003c0, /* MOVE FROM dsa_datain+0x03a0, WHEN DATA_IN -at 0x00000124 : */ 0x19000000,0x000003c8, +at 0x00000122 : */ 0x19000000,0x000003c8, /* MOVE FROM dsa_datain+0x03a8, WHEN DATA_IN -at 0x00000126 : */ 0x19000000,0x000003d0, +at 0x00000124 : */ 0x19000000,0x000003d0, /* MOVE FROM dsa_datain+0x03b0, WHEN DATA_IN -at 0x00000128 : */ 0x19000000,0x000003d8, +at 0x00000126 : */ 0x19000000,0x000003d8, /* MOVE FROM dsa_datain+0x03b8, WHEN DATA_IN -at 0x0000012a : */ 0x19000000,0x000003e0, +at 0x00000128 : */ 0x19000000,0x000003e0, /* MOVE FROM dsa_datain+0x03c0, WHEN DATA_IN -at 0x0000012c : */ 0x19000000,0x000003e8, +at 0x0000012a : */ 0x19000000,0x000003e8, /* MOVE FROM dsa_datain+0x03c8, WHEN DATA_IN -at 0x0000012e : */ 0x19000000,0x000003f0, +at 0x0000012c : */ 0x19000000,0x000003f0, /* MOVE FROM dsa_datain+0x03d0, WHEN DATA_IN -at 0x00000130 : */ 0x19000000,0x000003f8, +at 0x0000012e : */ 0x19000000,0x000003f8, /* MOVE FROM dsa_datain+0x03d8, WHEN DATA_IN -at 0x00000132 : */ 0x19000000,0x00000400, +at 0x00000130 : */ 0x19000000,0x00000400, /* MOVE FROM dsa_datain+0x03e0, WHEN DATA_IN -at 0x00000134 : */ 0x19000000,0x00000408, +at 0x00000132 : */ 0x19000000,0x00000408, /* MOVE FROM dsa_datain+0x03e8, WHEN DATA_IN -at 0x00000136 : */ 0x19000000,0x00000410, +at 0x00000134 : */ 0x19000000,0x00000410, /* MOVE FROM dsa_datain+0x03f0, WHEN DATA_IN -at 0x00000138 : */ 0x19000000,0x00000418, +at 0x00000136 : */ 0x19000000,0x00000418, /* MOVE FROM dsa_datain+0x03f8, WHEN DATA_IN -at 0x0000013a : */ 0x19000000,0x00000420, +at 0x00000138 : */ 0x19000000,0x00000420, /* JUMP end_data_trans -at 0x0000013c : */ 0x80080000,0x00000908, +at 0x0000013a : */ 0x80080000,0x00000900, /* output_data: MOVE SCRATCH0 | had_dataout TO SCRATCH0 -at 0x0000013e : */ 0x7a341000,0x00000000, +at 0x0000013c : */ 0x7a341000,0x00000000, /* ENTRY patch_output_data patch_output_data: JUMP 0 -at 0x00000140 : */ 0x80080000,0x00000000, +at 0x0000013e : */ 0x80080000,0x00000000, /* MOVE FROM dsa_dataout+0x0000, WHEN DATA_OUT -at 0x00000142 : */ 0x18000000,0x00000428, +at 0x00000140 : */ 0x18000000,0x00000428, /* MOVE FROM dsa_dataout+0x0008, WHEN DATA_OUT -at 0x00000144 : */ 0x18000000,0x00000430, +at 0x00000142 : */ 0x18000000,0x00000430, /* MOVE FROM dsa_dataout+0x0010, WHEN DATA_OUT -at 0x00000146 : */ 0x18000000,0x00000438, +at 0x00000144 : */ 0x18000000,0x00000438, /* MOVE FROM dsa_dataout+0x0018, WHEN DATA_OUT -at 0x00000148 : */ 0x18000000,0x00000440, +at 0x00000146 : */ 0x18000000,0x00000440, /* MOVE FROM dsa_dataout+0x0020, WHEN DATA_OUT -at 0x0000014a : */ 0x18000000,0x00000448, +at 0x00000148 : */ 0x18000000,0x00000448, /* MOVE FROM dsa_dataout+0x0028, WHEN DATA_OUT -at 0x0000014c : */ 0x18000000,0x00000450, +at 0x0000014a : */ 0x18000000,0x00000450, /* MOVE FROM dsa_dataout+0x0030, WHEN DATA_OUT -at 0x0000014e : */ 0x18000000,0x00000458, +at 0x0000014c : */ 0x18000000,0x00000458, /* MOVE FROM dsa_dataout+0x0038, WHEN DATA_OUT -at 0x00000150 : */ 0x18000000,0x00000460, +at 0x0000014e : */ 0x18000000,0x00000460, /* MOVE FROM dsa_dataout+0x0040, WHEN DATA_OUT -at 0x00000152 : */ 0x18000000,0x00000468, +at 0x00000150 : */ 0x18000000,0x00000468, /* MOVE FROM dsa_dataout+0x0048, WHEN DATA_OUT -at 0x00000154 : */ 0x18000000,0x00000470, +at 0x00000152 : */ 0x18000000,0x00000470, /* MOVE FROM dsa_dataout+0x0050, WHEN DATA_OUT -at 0x00000156 : */ 0x18000000,0x00000478, +at 0x00000154 : */ 0x18000000,0x00000478, /* MOVE FROM dsa_dataout+0x0058, WHEN DATA_OUT -at 0x00000158 : */ 0x18000000,0x00000480, +at 0x00000156 : */ 0x18000000,0x00000480, /* MOVE FROM dsa_dataout+0x0060, WHEN DATA_OUT -at 0x0000015a : */ 0x18000000,0x00000488, +at 0x00000158 : */ 0x18000000,0x00000488, /* MOVE FROM dsa_dataout+0x0068, WHEN DATA_OUT -at 0x0000015c : */ 0x18000000,0x00000490, +at 0x0000015a : */ 0x18000000,0x00000490, /* MOVE FROM dsa_dataout+0x0070, WHEN DATA_OUT -at 0x0000015e : */ 0x18000000,0x00000498, +at 0x0000015c : */ 0x18000000,0x00000498, /* MOVE FROM dsa_dataout+0x0078, WHEN DATA_OUT -at 0x00000160 : */ 0x18000000,0x000004a0, +at 0x0000015e : */ 0x18000000,0x000004a0, /* MOVE FROM dsa_dataout+0x0080, WHEN DATA_OUT -at 0x00000162 : */ 0x18000000,0x000004a8, +at 0x00000160 : */ 0x18000000,0x000004a8, /* MOVE FROM dsa_dataout+0x0088, WHEN DATA_OUT -at 0x00000164 : */ 0x18000000,0x000004b0, +at 0x00000162 : */ 0x18000000,0x000004b0, /* MOVE FROM dsa_dataout+0x0090, WHEN DATA_OUT -at 0x00000166 : */ 0x18000000,0x000004b8, +at 0x00000164 : */ 0x18000000,0x000004b8, /* MOVE FROM dsa_dataout+0x0098, WHEN DATA_OUT -at 0x00000168 : */ 0x18000000,0x000004c0, +at 0x00000166 : */ 0x18000000,0x000004c0, /* MOVE FROM dsa_dataout+0x00a0, WHEN DATA_OUT -at 0x0000016a : */ 0x18000000,0x000004c8, +at 0x00000168 : */ 0x18000000,0x000004c8, /* MOVE FROM dsa_dataout+0x00a8, WHEN DATA_OUT -at 0x0000016c : */ 0x18000000,0x000004d0, +at 0x0000016a : */ 0x18000000,0x000004d0, /* MOVE FROM dsa_dataout+0x00b0, WHEN DATA_OUT -at 0x0000016e : */ 0x18000000,0x000004d8, +at 0x0000016c : */ 0x18000000,0x000004d8, /* MOVE FROM dsa_dataout+0x00b8, WHEN DATA_OUT -at 0x00000170 : */ 0x18000000,0x000004e0, +at 0x0000016e : */ 0x18000000,0x000004e0, /* MOVE FROM dsa_dataout+0x00c0, WHEN DATA_OUT -at 0x00000172 : */ 0x18000000,0x000004e8, +at 0x00000170 : */ 0x18000000,0x000004e8, /* MOVE FROM dsa_dataout+0x00c8, WHEN DATA_OUT -at 0x00000174 : */ 0x18000000,0x000004f0, +at 0x00000172 : */ 0x18000000,0x000004f0, /* MOVE FROM dsa_dataout+0x00d0, WHEN DATA_OUT -at 0x00000176 : */ 0x18000000,0x000004f8, +at 0x00000174 : */ 0x18000000,0x000004f8, /* MOVE FROM dsa_dataout+0x00d8, WHEN DATA_OUT -at 0x00000178 : */ 0x18000000,0x00000500, +at 0x00000176 : */ 0x18000000,0x00000500, /* MOVE FROM dsa_dataout+0x00e0, WHEN DATA_OUT -at 0x0000017a : */ 0x18000000,0x00000508, +at 0x00000178 : */ 0x18000000,0x00000508, /* MOVE FROM dsa_dataout+0x00e8, WHEN DATA_OUT -at 0x0000017c : */ 0x18000000,0x00000510, +at 0x0000017a : */ 0x18000000,0x00000510, /* MOVE FROM dsa_dataout+0x00f0, WHEN DATA_OUT -at 0x0000017e : */ 0x18000000,0x00000518, +at 0x0000017c : */ 0x18000000,0x00000518, /* MOVE FROM dsa_dataout+0x00f8, WHEN DATA_OUT -at 0x00000180 : */ 0x18000000,0x00000520, +at 0x0000017e : */ 0x18000000,0x00000520, /* MOVE FROM dsa_dataout+0x0100, WHEN DATA_OUT -at 0x00000182 : */ 0x18000000,0x00000528, +at 0x00000180 : */ 0x18000000,0x00000528, /* MOVE FROM dsa_dataout+0x0108, WHEN DATA_OUT -at 0x00000184 : */ 0x18000000,0x00000530, +at 0x00000182 : */ 0x18000000,0x00000530, /* MOVE FROM dsa_dataout+0x0110, WHEN DATA_OUT -at 0x00000186 : */ 0x18000000,0x00000538, +at 0x00000184 : */ 0x18000000,0x00000538, /* MOVE FROM dsa_dataout+0x0118, WHEN DATA_OUT -at 0x00000188 : */ 0x18000000,0x00000540, +at 0x00000186 : */ 0x18000000,0x00000540, /* MOVE FROM dsa_dataout+0x0120, WHEN DATA_OUT -at 0x0000018a : */ 0x18000000,0x00000548, +at 0x00000188 : */ 0x18000000,0x00000548, /* MOVE FROM dsa_dataout+0x0128, WHEN DATA_OUT -at 0x0000018c : */ 0x18000000,0x00000550, +at 0x0000018a : */ 0x18000000,0x00000550, /* MOVE FROM dsa_dataout+0x0130, WHEN DATA_OUT -at 0x0000018e : */ 0x18000000,0x00000558, +at 0x0000018c : */ 0x18000000,0x00000558, /* MOVE FROM dsa_dataout+0x0138, WHEN DATA_OUT -at 0x00000190 : */ 0x18000000,0x00000560, +at 0x0000018e : */ 0x18000000,0x00000560, /* MOVE FROM dsa_dataout+0x0140, WHEN DATA_OUT -at 0x00000192 : */ 0x18000000,0x00000568, +at 0x00000190 : */ 0x18000000,0x00000568, /* MOVE FROM dsa_dataout+0x0148, WHEN DATA_OUT -at 0x00000194 : */ 0x18000000,0x00000570, +at 0x00000192 : */ 0x18000000,0x00000570, /* MOVE FROM dsa_dataout+0x0150, WHEN DATA_OUT -at 0x00000196 : */ 0x18000000,0x00000578, +at 0x00000194 : */ 0x18000000,0x00000578, /* MOVE FROM dsa_dataout+0x0158, WHEN DATA_OUT -at 0x00000198 : */ 0x18000000,0x00000580, +at 0x00000196 : */ 0x18000000,0x00000580, /* MOVE FROM dsa_dataout+0x0160, WHEN DATA_OUT -at 0x0000019a : */ 0x18000000,0x00000588, +at 0x00000198 : */ 0x18000000,0x00000588, /* MOVE FROM dsa_dataout+0x0168, WHEN DATA_OUT -at 0x0000019c : */ 0x18000000,0x00000590, +at 0x0000019a : */ 0x18000000,0x00000590, /* MOVE FROM dsa_dataout+0x0170, WHEN DATA_OUT -at 0x0000019e : */ 0x18000000,0x00000598, +at 0x0000019c : */ 0x18000000,0x00000598, /* MOVE FROM dsa_dataout+0x0178, WHEN DATA_OUT -at 0x000001a0 : */ 0x18000000,0x000005a0, +at 0x0000019e : */ 0x18000000,0x000005a0, /* MOVE FROM dsa_dataout+0x0180, WHEN DATA_OUT -at 0x000001a2 : */ 0x18000000,0x000005a8, +at 0x000001a0 : */ 0x18000000,0x000005a8, /* MOVE FROM dsa_dataout+0x0188, WHEN DATA_OUT -at 0x000001a4 : */ 0x18000000,0x000005b0, +at 0x000001a2 : */ 0x18000000,0x000005b0, /* MOVE FROM dsa_dataout+0x0190, WHEN DATA_OUT -at 0x000001a6 : */ 0x18000000,0x000005b8, +at 0x000001a4 : */ 0x18000000,0x000005b8, /* MOVE FROM dsa_dataout+0x0198, WHEN DATA_OUT -at 0x000001a8 : */ 0x18000000,0x000005c0, +at 0x000001a6 : */ 0x18000000,0x000005c0, /* MOVE FROM dsa_dataout+0x01a0, WHEN DATA_OUT -at 0x000001aa : */ 0x18000000,0x000005c8, +at 0x000001a8 : */ 0x18000000,0x000005c8, /* MOVE FROM dsa_dataout+0x01a8, WHEN DATA_OUT -at 0x000001ac : */ 0x18000000,0x000005d0, +at 0x000001aa : */ 0x18000000,0x000005d0, /* MOVE FROM dsa_dataout+0x01b0, WHEN DATA_OUT -at 0x000001ae : */ 0x18000000,0x000005d8, +at 0x000001ac : */ 0x18000000,0x000005d8, /* MOVE FROM dsa_dataout+0x01b8, WHEN DATA_OUT -at 0x000001b0 : */ 0x18000000,0x000005e0, +at 0x000001ae : */ 0x18000000,0x000005e0, /* MOVE FROM dsa_dataout+0x01c0, WHEN DATA_OUT -at 0x000001b2 : */ 0x18000000,0x000005e8, +at 0x000001b0 : */ 0x18000000,0x000005e8, /* MOVE FROM dsa_dataout+0x01c8, WHEN DATA_OUT -at 0x000001b4 : */ 0x18000000,0x000005f0, +at 0x000001b2 : */ 0x18000000,0x000005f0, /* MOVE FROM dsa_dataout+0x01d0, WHEN DATA_OUT -at 0x000001b6 : */ 0x18000000,0x000005f8, +at 0x000001b4 : */ 0x18000000,0x000005f8, /* MOVE FROM dsa_dataout+0x01d8, WHEN DATA_OUT -at 0x000001b8 : */ 0x18000000,0x00000600, +at 0x000001b6 : */ 0x18000000,0x00000600, /* MOVE FROM dsa_dataout+0x01e0, WHEN DATA_OUT -at 0x000001ba : */ 0x18000000,0x00000608, +at 0x000001b8 : */ 0x18000000,0x00000608, /* MOVE FROM dsa_dataout+0x01e8, WHEN DATA_OUT -at 0x000001bc : */ 0x18000000,0x00000610, +at 0x000001ba : */ 0x18000000,0x00000610, /* MOVE FROM dsa_dataout+0x01f0, WHEN DATA_OUT -at 0x000001be : */ 0x18000000,0x00000618, +at 0x000001bc : */ 0x18000000,0x00000618, /* MOVE FROM dsa_dataout+0x01f8, WHEN DATA_OUT -at 0x000001c0 : */ 0x18000000,0x00000620, +at 0x000001be : */ 0x18000000,0x00000620, /* MOVE FROM dsa_dataout+0x0200, WHEN DATA_OUT -at 0x000001c2 : */ 0x18000000,0x00000628, +at 0x000001c0 : */ 0x18000000,0x00000628, /* MOVE FROM dsa_dataout+0x0208, WHEN DATA_OUT -at 0x000001c4 : */ 0x18000000,0x00000630, +at 0x000001c2 : */ 0x18000000,0x00000630, /* MOVE FROM dsa_dataout+0x0210, WHEN DATA_OUT -at 0x000001c6 : */ 0x18000000,0x00000638, +at 0x000001c4 : */ 0x18000000,0x00000638, /* MOVE FROM dsa_dataout+0x0218, WHEN DATA_OUT -at 0x000001c8 : */ 0x18000000,0x00000640, +at 0x000001c6 : */ 0x18000000,0x00000640, /* MOVE FROM dsa_dataout+0x0220, WHEN DATA_OUT -at 0x000001ca : */ 0x18000000,0x00000648, +at 0x000001c8 : */ 0x18000000,0x00000648, /* MOVE FROM dsa_dataout+0x0228, WHEN DATA_OUT -at 0x000001cc : */ 0x18000000,0x00000650, +at 0x000001ca : */ 0x18000000,0x00000650, /* MOVE FROM dsa_dataout+0x0230, WHEN DATA_OUT -at 0x000001ce : */ 0x18000000,0x00000658, +at 0x000001cc : */ 0x18000000,0x00000658, /* MOVE FROM dsa_dataout+0x0238, WHEN DATA_OUT -at 0x000001d0 : */ 0x18000000,0x00000660, +at 0x000001ce : */ 0x18000000,0x00000660, /* MOVE FROM dsa_dataout+0x0240, WHEN DATA_OUT -at 0x000001d2 : */ 0x18000000,0x00000668, +at 0x000001d0 : */ 0x18000000,0x00000668, /* MOVE FROM dsa_dataout+0x0248, WHEN DATA_OUT -at 0x000001d4 : */ 0x18000000,0x00000670, +at 0x000001d2 : */ 0x18000000,0x00000670, /* MOVE FROM dsa_dataout+0x0250, WHEN DATA_OUT -at 0x000001d6 : */ 0x18000000,0x00000678, +at 0x000001d4 : */ 0x18000000,0x00000678, /* MOVE FROM dsa_dataout+0x0258, WHEN DATA_OUT -at 0x000001d8 : */ 0x18000000,0x00000680, +at 0x000001d6 : */ 0x18000000,0x00000680, /* MOVE FROM dsa_dataout+0x0260, WHEN DATA_OUT -at 0x000001da : */ 0x18000000,0x00000688, +at 0x000001d8 : */ 0x18000000,0x00000688, /* MOVE FROM dsa_dataout+0x0268, WHEN DATA_OUT -at 0x000001dc : */ 0x18000000,0x00000690, +at 0x000001da : */ 0x18000000,0x00000690, /* MOVE FROM dsa_dataout+0x0270, WHEN DATA_OUT -at 0x000001de : */ 0x18000000,0x00000698, +at 0x000001dc : */ 0x18000000,0x00000698, /* MOVE FROM dsa_dataout+0x0278, WHEN DATA_OUT -at 0x000001e0 : */ 0x18000000,0x000006a0, +at 0x000001de : */ 0x18000000,0x000006a0, /* MOVE FROM dsa_dataout+0x0280, WHEN DATA_OUT -at 0x000001e2 : */ 0x18000000,0x000006a8, +at 0x000001e0 : */ 0x18000000,0x000006a8, /* MOVE FROM dsa_dataout+0x0288, WHEN DATA_OUT -at 0x000001e4 : */ 0x18000000,0x000006b0, +at 0x000001e2 : */ 0x18000000,0x000006b0, /* MOVE FROM dsa_dataout+0x0290, WHEN DATA_OUT -at 0x000001e6 : */ 0x18000000,0x000006b8, +at 0x000001e4 : */ 0x18000000,0x000006b8, /* MOVE FROM dsa_dataout+0x0298, WHEN DATA_OUT -at 0x000001e8 : */ 0x18000000,0x000006c0, +at 0x000001e6 : */ 0x18000000,0x000006c0, /* MOVE FROM dsa_dataout+0x02a0, WHEN DATA_OUT -at 0x000001ea : */ 0x18000000,0x000006c8, +at 0x000001e8 : */ 0x18000000,0x000006c8, /* MOVE FROM dsa_dataout+0x02a8, WHEN DATA_OUT -at 0x000001ec : */ 0x18000000,0x000006d0, +at 0x000001ea : */ 0x18000000,0x000006d0, /* MOVE FROM dsa_dataout+0x02b0, WHEN DATA_OUT -at 0x000001ee : */ 0x18000000,0x000006d8, +at 0x000001ec : */ 0x18000000,0x000006d8, /* MOVE FROM dsa_dataout+0x02b8, WHEN DATA_OUT -at 0x000001f0 : */ 0x18000000,0x000006e0, +at 0x000001ee : */ 0x18000000,0x000006e0, /* MOVE FROM dsa_dataout+0x02c0, WHEN DATA_OUT -at 0x000001f2 : */ 0x18000000,0x000006e8, +at 0x000001f0 : */ 0x18000000,0x000006e8, /* MOVE FROM dsa_dataout+0x02c8, WHEN DATA_OUT -at 0x000001f4 : */ 0x18000000,0x000006f0, +at 0x000001f2 : */ 0x18000000,0x000006f0, /* MOVE FROM dsa_dataout+0x02d0, WHEN DATA_OUT -at 0x000001f6 : */ 0x18000000,0x000006f8, +at 0x000001f4 : */ 0x18000000,0x000006f8, /* MOVE FROM dsa_dataout+0x02d8, WHEN DATA_OUT -at 0x000001f8 : */ 0x18000000,0x00000700, +at 0x000001f6 : */ 0x18000000,0x00000700, /* MOVE FROM dsa_dataout+0x02e0, WHEN DATA_OUT -at 0x000001fa : */ 0x18000000,0x00000708, +at 0x000001f8 : */ 0x18000000,0x00000708, /* MOVE FROM dsa_dataout+0x02e8, WHEN DATA_OUT -at 0x000001fc : */ 0x18000000,0x00000710, +at 0x000001fa : */ 0x18000000,0x00000710, /* MOVE FROM dsa_dataout+0x02f0, WHEN DATA_OUT -at 0x000001fe : */ 0x18000000,0x00000718, +at 0x000001fc : */ 0x18000000,0x00000718, /* MOVE FROM dsa_dataout+0x02f8, WHEN DATA_OUT -at 0x00000200 : */ 0x18000000,0x00000720, +at 0x000001fe : */ 0x18000000,0x00000720, /* MOVE FROM dsa_dataout+0x0300, WHEN DATA_OUT -at 0x00000202 : */ 0x18000000,0x00000728, +at 0x00000200 : */ 0x18000000,0x00000728, /* MOVE FROM dsa_dataout+0x0308, WHEN DATA_OUT -at 0x00000204 : */ 0x18000000,0x00000730, +at 0x00000202 : */ 0x18000000,0x00000730, /* MOVE FROM dsa_dataout+0x0310, WHEN DATA_OUT -at 0x00000206 : */ 0x18000000,0x00000738, +at 0x00000204 : */ 0x18000000,0x00000738, /* MOVE FROM dsa_dataout+0x0318, WHEN DATA_OUT -at 0x00000208 : */ 0x18000000,0x00000740, +at 0x00000206 : */ 0x18000000,0x00000740, /* MOVE FROM dsa_dataout+0x0320, WHEN DATA_OUT -at 0x0000020a : */ 0x18000000,0x00000748, +at 0x00000208 : */ 0x18000000,0x00000748, /* MOVE FROM dsa_dataout+0x0328, WHEN DATA_OUT -at 0x0000020c : */ 0x18000000,0x00000750, +at 0x0000020a : */ 0x18000000,0x00000750, /* MOVE FROM dsa_dataout+0x0330, WHEN DATA_OUT -at 0x0000020e : */ 0x18000000,0x00000758, +at 0x0000020c : */ 0x18000000,0x00000758, /* MOVE FROM dsa_dataout+0x0338, WHEN DATA_OUT -at 0x00000210 : */ 0x18000000,0x00000760, +at 0x0000020e : */ 0x18000000,0x00000760, /* MOVE FROM dsa_dataout+0x0340, WHEN DATA_OUT -at 0x00000212 : */ 0x18000000,0x00000768, +at 0x00000210 : */ 0x18000000,0x00000768, /* MOVE FROM dsa_dataout+0x0348, WHEN DATA_OUT -at 0x00000214 : */ 0x18000000,0x00000770, +at 0x00000212 : */ 0x18000000,0x00000770, /* MOVE FROM dsa_dataout+0x0350, WHEN DATA_OUT -at 0x00000216 : */ 0x18000000,0x00000778, +at 0x00000214 : */ 0x18000000,0x00000778, /* MOVE FROM dsa_dataout+0x0358, WHEN DATA_OUT -at 0x00000218 : */ 0x18000000,0x00000780, +at 0x00000216 : */ 0x18000000,0x00000780, /* MOVE FROM dsa_dataout+0x0360, WHEN DATA_OUT -at 0x0000021a : */ 0x18000000,0x00000788, +at 0x00000218 : */ 0x18000000,0x00000788, /* MOVE FROM dsa_dataout+0x0368, WHEN DATA_OUT -at 0x0000021c : */ 0x18000000,0x00000790, +at 0x0000021a : */ 0x18000000,0x00000790, /* MOVE FROM dsa_dataout+0x0370, WHEN DATA_OUT -at 0x0000021e : */ 0x18000000,0x00000798, +at 0x0000021c : */ 0x18000000,0x00000798, /* MOVE FROM dsa_dataout+0x0378, WHEN DATA_OUT -at 0x00000220 : */ 0x18000000,0x000007a0, +at 0x0000021e : */ 0x18000000,0x000007a0, /* MOVE FROM dsa_dataout+0x0380, WHEN DATA_OUT -at 0x00000222 : */ 0x18000000,0x000007a8, +at 0x00000220 : */ 0x18000000,0x000007a8, /* MOVE FROM dsa_dataout+0x0388, WHEN DATA_OUT -at 0x00000224 : */ 0x18000000,0x000007b0, +at 0x00000222 : */ 0x18000000,0x000007b0, /* MOVE FROM dsa_dataout+0x0390, WHEN DATA_OUT -at 0x00000226 : */ 0x18000000,0x000007b8, +at 0x00000224 : */ 0x18000000,0x000007b8, /* MOVE FROM dsa_dataout+0x0398, WHEN DATA_OUT -at 0x00000228 : */ 0x18000000,0x000007c0, +at 0x00000226 : */ 0x18000000,0x000007c0, /* MOVE FROM dsa_dataout+0x03a0, WHEN DATA_OUT -at 0x0000022a : */ 0x18000000,0x000007c8, +at 0x00000228 : */ 0x18000000,0x000007c8, /* MOVE FROM dsa_dataout+0x03a8, WHEN DATA_OUT -at 0x0000022c : */ 0x18000000,0x000007d0, +at 0x0000022a : */ 0x18000000,0x000007d0, /* MOVE FROM dsa_dataout+0x03b0, WHEN DATA_OUT -at 0x0000022e : */ 0x18000000,0x000007d8, +at 0x0000022c : */ 0x18000000,0x000007d8, /* MOVE FROM dsa_dataout+0x03b8, WHEN DATA_OUT -at 0x00000230 : */ 0x18000000,0x000007e0, +at 0x0000022e : */ 0x18000000,0x000007e0, /* MOVE FROM dsa_dataout+0x03c0, WHEN DATA_OUT -at 0x00000232 : */ 0x18000000,0x000007e8, +at 0x00000230 : */ 0x18000000,0x000007e8, /* MOVE FROM dsa_dataout+0x03c8, WHEN DATA_OUT -at 0x00000234 : */ 0x18000000,0x000007f0, +at 0x00000232 : */ 0x18000000,0x000007f0, /* MOVE FROM dsa_dataout+0x03d0, WHEN DATA_OUT -at 0x00000236 : */ 0x18000000,0x000007f8, +at 0x00000234 : */ 0x18000000,0x000007f8, /* MOVE FROM dsa_dataout+0x03d8, WHEN DATA_OUT -at 0x00000238 : */ 0x18000000,0x00000800, +at 0x00000236 : */ 0x18000000,0x00000800, /* MOVE FROM dsa_dataout+0x03e0, WHEN DATA_OUT -at 0x0000023a : */ 0x18000000,0x00000808, +at 0x00000238 : */ 0x18000000,0x00000808, /* MOVE FROM dsa_dataout+0x03e8, WHEN DATA_OUT -at 0x0000023c : */ 0x18000000,0x00000810, +at 0x0000023a : */ 0x18000000,0x00000810, /* MOVE FROM dsa_dataout+0x03f0, WHEN DATA_OUT -at 0x0000023e : */ 0x18000000,0x00000818, +at 0x0000023c : */ 0x18000000,0x00000818, /* MOVE FROM dsa_dataout+0x03f8, WHEN DATA_OUT -at 0x00000240 : */ 0x18000000,0x00000820, +at 0x0000023e : */ 0x18000000,0x00000820, /* ENTRY end_data_trans end_data_trans: redo_msgin3: JUMP get_status, WHEN STATUS -at 0x00000242 : */ 0x830b0000,0x000000a0, +at 0x00000240 : */ 0x830b0000,0x00000098, /* JUMP get_msgin3, WHEN MSG_IN -at 0x00000244 : */ 0x870b0000,0x00000b20, +at 0x00000242 : */ 0x870b0000,0x00000b78, /* INT int_data_bad_phase -at 0x00000246 : */ 0x98080000,0xab93000b, +at 0x00000244 : */ 0x98080000,0xab93000b, /* get_msgin1: MOVE SCRATCH0 | had_msgin TO SCRATCH0 -at 0x00000248 : */ 0x7a344000,0x00000000, +at 0x00000246 : */ 0x7a344000,0x00000000, /* MOVE 1, msgin_buf, WHEN MSG_IN -at 0x0000024a : */ 0x0f000001,0x00000000, +at 0x00000248 : */ 0x0f000001,0x00000000, /* JUMP ext_msg1, IF 0x01 ; Extended Message -at 0x0000024c : */ 0x800c0001,0x00000968, +at 0x0000024a : */ 0x800c0001,0x00000960, /* JUMP ignore_msg1, IF 0x02 ; Save Data Pointers -at 0x0000024e : */ 0x800c0002,0x00000958, +at 0x0000024c : */ 0x800c0002,0x00000950, /* JUMP ignore_msg1, IF 0x03 ; Save Restore Pointers -at 0x00000250 : */ 0x800c0003,0x00000958, +at 0x0000024e : */ 0x800c0003,0x00000950, /* JUMP disc1, IF 0x04 ; Disconnect -at 0x00000252 : */ 0x800c0004,0x000009c8, +at 0x00000250 : */ 0x800c0004,0x000009f0, /* INT int_bad_msg1 -at 0x00000254 : */ 0x98080000,0xab930006, +at 0x00000252 : */ 0x98080000,0xab930006, /* ignore_msg1: CLEAR ACK -at 0x00000256 : */ 0x60000040,0x00000000, +at 0x00000254 : */ 0x60000040,0x00000000, /* JUMP redo_msgin1 -at 0x00000258 : */ 0x80080000,0x00000058, +at 0x00000256 : */ 0x80080000,0x00000050, /* ext_msg1: MOVE SCRATCH0 | had_extmsg TO SCRATCH0 -at 0x0000025a : */ 0x7a348000,0x00000000, +at 0x00000258 : */ 0x7a348000,0x00000000, /* CLEAR ACK -at 0x0000025c : */ 0x60000040,0x00000000, +at 0x0000025a : */ 0x60000040,0x00000000, /* MOVE 1, msgin_buf + 1, WHEN MSG_IN -at 0x0000025e : */ 0x0f000001,0x00000001, +at 0x0000025c : */ 0x0f000001,0x00000001, /* - JUMP ext_msg1a, IF 0x03 + JUMP reject_msg1, IF NOT 0x03 ; Only handle SDTR -at 0x00000260 : */ 0x800c0003,0x00000990, +at 0x0000025e : */ 0x80040003,0x000009b0, /* - INT int_bad_extmsg1a + CLEAR ACK -at 0x00000262 : */ 0x98080000,0xab930000, +at 0x00000260 : */ 0x60000040,0x00000000, +/* + MOVE 1, msgin_buf + 2, WHEN MSG_IN + +at 0x00000262 : */ 0x0f000001,0x00000002, +/* + JUMP reject_msg1, IF NOT 0x01 ; Only handle SDTR + +at 0x00000264 : */ 0x80040001,0x000009b0, /* -ext_msg1a: CLEAR ACK -at 0x00000264 : */ 0x60000040,0x00000000, +at 0x00000266 : */ 0x60000040,0x00000000, /* - MOVE 1, msgin_buf + 2, WHEN MSG_IN + MOVE 2, msgin_buf + 3, WHEN MSG_IN -at 0x00000266 : */ 0x0f000001,0x00000002, +at 0x00000268 : */ 0x0f000002,0x00000003, /* - JUMP ext_msg1b, IF 0x01 ; Must be SDTR + INT int_msg_sdtr1 + +at 0x0000026a : */ 0x98080000,0xab93000c, +/* +reject_msg1: + MOVE SCRATCH1 | did_reject TO SCRATCH1 -at 0x00000268 : */ 0x800c0001,0x000009b0, +at 0x0000026c : */ 0x7a350100,0x00000000, /* - INT int_bad_extmsg1b + SET ATN -at 0x0000026a : */ 0x98080000,0xab930001, +at 0x0000026e : */ 0x58000008,0x00000000, /* -ext_msg1b: CLEAR ACK -at 0x0000026c : */ 0x60000040,0x00000000, +at 0x00000270 : */ 0x60000040,0x00000000, /* - MOVE 2, msgin_buf + 3, WHEN MSG_IN + JUMP reject_msg1a, WHEN NOT MSG_IN -at 0x0000026e : */ 0x0f000002,0x00000003, +at 0x00000272 : */ 0x87030000,0x000009e0, /* - INT int_msg_sdtr1 + MOVE 1, msgin_buf + 7, WHEN MSG_IN -at 0x00000270 : */ 0x98080000,0xab93000c, +at 0x00000274 : */ 0x0f000001,0x00000007, +/* + JUMP reject_msg1 + +at 0x00000276 : */ 0x80080000,0x000009b0, +/* +reject_msg1a: + MOVE 1, msg_reject, WHEN MSG_OUT + +at 0x00000278 : */ 0x0e000001,0x00000000, +/* + JUMP redo_msgin1 + +at 0x0000027a : */ 0x80080000,0x00000050, /* disc1: CLEAR ACK -at 0x00000272 : */ 0x60000040,0x00000000, +at 0x0000027c : */ 0x60000040,0x00000000, /* ENTRY wait_disc1 wait_disc1: WAIT DISCONNECT -at 0x00000274 : */ 0x48000000,0x00000000, +at 0x0000027e : */ 0x48000000,0x00000000, /* INT int_disc1 -at 0x00000276 : */ 0x98080000,0xab930019, +at 0x00000280 : */ 0x98080000,0xab930019, /* ENTRY resume_msgin1a resume_msgin1a: CLEAR ACK -at 0x00000278 : */ 0x60000040,0x00000000, +at 0x00000282 : */ 0x60000040,0x00000000, /* JUMP redo_msgin1 -at 0x0000027a : */ 0x80080000,0x00000058, +at 0x00000284 : */ 0x80080000,0x00000050, /* ENTRY resume_msgin1b resume_msgin1b: SET ATN -at 0x0000027c : */ 0x58000008,0x00000000, +at 0x00000286 : */ 0x58000008,0x00000000, /* CLEAR ACK -at 0x0000027e : */ 0x60000040,0x00000000, +at 0x00000288 : */ 0x60000040,0x00000000, /* INT int_no_msgout1, WHEN NOT MSG_OUT -at 0x00000280 : */ 0x9e030000,0xab93000f, +at 0x0000028a : */ 0x9e030000,0xab93000f, /* MOVE SCRATCH0 | had_msgout TO SCRATCH0 -at 0x00000282 : */ 0x7a340200,0x00000000, +at 0x0000028c : */ 0x7a340200,0x00000000, /* MOVE FROM dsa_msgout, when MSG_OUT -at 0x00000284 : */ 0x1e000000,0x00000008, +at 0x0000028e : */ 0x1e000000,0x00000008, /* JUMP redo_msgin1 -at 0x00000286 : */ 0x80080000,0x00000058, +at 0x00000290 : */ 0x80080000,0x00000050, /* get_msgin2: MOVE SCRATCH0 | had_msgin TO SCRATCH0 -at 0x00000288 : */ 0x7a344000,0x00000000, +at 0x00000292 : */ 0x7a344000,0x00000000, /* MOVE 1, msgin_buf, WHEN MSG_IN -at 0x0000028a : */ 0x0f000001,0x00000000, +at 0x00000294 : */ 0x0f000001,0x00000000, /* JUMP ext_msg2, IF 0x01 ; Extended Message -at 0x0000028c : */ 0x800c0001,0x00000a68, +at 0x00000296 : */ 0x800c0001,0x00000a90, /* JUMP ignore_msg2, IF 0x02 ; Save Data Pointers -at 0x0000028e : */ 0x800c0002,0x00000a58, +at 0x00000298 : */ 0x800c0002,0x00000a80, /* JUMP ignore_msg2, IF 0x03 ; Save Restore Pointers -at 0x00000290 : */ 0x800c0003,0x00000a58, +at 0x0000029a : */ 0x800c0003,0x00000a80, /* JUMP disc2, IF 0x04 ; Disconnect -at 0x00000292 : */ 0x800c0004,0x00000ac8, +at 0x0000029c : */ 0x800c0004,0x00000b20, /* INT int_bad_msg2 -at 0x00000294 : */ 0x98080000,0xab930007, +at 0x0000029e : */ 0x98080000,0xab930007, /* ignore_msg2: CLEAR ACK -at 0x00000296 : */ 0x60000040,0x00000000, +at 0x000002a0 : */ 0x60000040,0x00000000, /* JUMP redo_msgin2 -at 0x00000298 : */ 0x80080000,0x00000078, +at 0x000002a2 : */ 0x80080000,0x00000070, /* ext_msg2: MOVE SCRATCH0 | had_extmsg TO SCRATCH0 -at 0x0000029a : */ 0x7a348000,0x00000000, +at 0x000002a4 : */ 0x7a348000,0x00000000, /* CLEAR ACK -at 0x0000029c : */ 0x60000040,0x00000000, +at 0x000002a6 : */ 0x60000040,0x00000000, /* MOVE 1, msgin_buf + 1, WHEN MSG_IN -at 0x0000029e : */ 0x0f000001,0x00000001, +at 0x000002a8 : */ 0x0f000001,0x00000001, +/* + JUMP reject_msg2, IF NOT 0x03 ; Only handle SDTR + +at 0x000002aa : */ 0x80040003,0x00000ae0, +/* + CLEAR ACK + +at 0x000002ac : */ 0x60000040,0x00000000, /* - JUMP ext_msg2a, IF 0x03 + MOVE 1, msgin_buf + 2, WHEN MSG_IN -at 0x000002a0 : */ 0x800c0003,0x00000a90, +at 0x000002ae : */ 0x0f000001,0x00000002, /* - INT int_bad_extmsg2a + JUMP reject_msg2, IF NOT 0x01 ; Only handle SDTR -at 0x000002a2 : */ 0x98080000,0xab930002, +at 0x000002b0 : */ 0x80040001,0x00000ae0, /* -ext_msg2a: CLEAR ACK -at 0x000002a4 : */ 0x60000040,0x00000000, +at 0x000002b2 : */ 0x60000040,0x00000000, /* - MOVE 1, msgin_buf + 2, WHEN MSG_IN + MOVE 2, msgin_buf + 3, WHEN MSG_IN + +at 0x000002b4 : */ 0x0f000002,0x00000003, +/* + INT int_msg_sdtr2 -at 0x000002a6 : */ 0x0f000001,0x00000002, +at 0x000002b6 : */ 0x98080000,0xab93000d, /* - JUMP ext_msg2b, IF 0x01 ; Must be SDTR +reject_msg2: + MOVE SCRATCH1 | did_reject TO SCRATCH1 -at 0x000002a8 : */ 0x800c0001,0x00000ab0, +at 0x000002b8 : */ 0x7a350100,0x00000000, /* - INT int_bad_extmsg2b + SET ATN -at 0x000002aa : */ 0x98080000,0xab930003, +at 0x000002ba : */ 0x58000008,0x00000000, /* -ext_msg2b: CLEAR ACK -at 0x000002ac : */ 0x60000040,0x00000000, +at 0x000002bc : */ 0x60000040,0x00000000, /* - MOVE 2, msgin_buf + 3, WHEN MSG_IN + JUMP reject_msg2a, WHEN NOT MSG_IN -at 0x000002ae : */ 0x0f000002,0x00000003, +at 0x000002be : */ 0x87030000,0x00000b10, /* - INT int_msg_sdtr2 + MOVE 1, msgin_buf + 7, WHEN MSG_IN + +at 0x000002c0 : */ 0x0f000001,0x00000007, +/* + JUMP reject_msg2 + +at 0x000002c2 : */ 0x80080000,0x00000ae0, +/* +reject_msg2a: + MOVE 1, msg_reject, WHEN MSG_OUT + +at 0x000002c4 : */ 0x0e000001,0x00000000, +/* + JUMP redo_msgin2 -at 0x000002b0 : */ 0x98080000,0xab93000d, +at 0x000002c6 : */ 0x80080000,0x00000070, /* disc2: CLEAR ACK -at 0x000002b2 : */ 0x60000040,0x00000000, +at 0x000002c8 : */ 0x60000040,0x00000000, /* ENTRY wait_disc2 wait_disc2: WAIT DISCONNECT -at 0x000002b4 : */ 0x48000000,0x00000000, +at 0x000002ca : */ 0x48000000,0x00000000, /* INT int_disc2 -at 0x000002b6 : */ 0x98080000,0xab93001a, +at 0x000002cc : */ 0x98080000,0xab93001a, /* ENTRY resume_msgin2a resume_msgin2a: CLEAR ACK -at 0x000002b8 : */ 0x60000040,0x00000000, +at 0x000002ce : */ 0x60000040,0x00000000, /* JUMP redo_msgin2 -at 0x000002ba : */ 0x80080000,0x00000078, +at 0x000002d0 : */ 0x80080000,0x00000070, /* ENTRY resume_msgin2b resume_msgin2b: SET ATN -at 0x000002bc : */ 0x58000008,0x00000000, +at 0x000002d2 : */ 0x58000008,0x00000000, /* CLEAR ACK -at 0x000002be : */ 0x60000040,0x00000000, +at 0x000002d4 : */ 0x60000040,0x00000000, /* INT int_no_msgout2, WHEN NOT MSG_OUT -at 0x000002c0 : */ 0x9e030000,0xab930010, +at 0x000002d6 : */ 0x9e030000,0xab930010, /* MOVE SCRATCH0 | had_msgout TO SCRATCH0 -at 0x000002c2 : */ 0x7a340200,0x00000000, +at 0x000002d8 : */ 0x7a340200,0x00000000, /* MOVE FROM dsa_msgout, when MSG_OUT -at 0x000002c4 : */ 0x1e000000,0x00000008, +at 0x000002da : */ 0x1e000000,0x00000008, /* JUMP redo_msgin2 -at 0x000002c6 : */ 0x80080000,0x00000078, +at 0x000002dc : */ 0x80080000,0x00000070, /* get_msgin3: MOVE SCRATCH0 | had_msgin TO SCRATCH0 -at 0x000002c8 : */ 0x7a344000,0x00000000, +at 0x000002de : */ 0x7a344000,0x00000000, /* MOVE 1, msgin_buf, WHEN MSG_IN -at 0x000002ca : */ 0x0f000001,0x00000000, +at 0x000002e0 : */ 0x0f000001,0x00000000, /* JUMP ext_msg3, IF 0x01 ; Extended Message -at 0x000002cc : */ 0x800c0001,0x00000b68, +at 0x000002e2 : */ 0x800c0001,0x00000bc0, /* JUMP ignore_msg3, IF 0x02 ; Save Data Pointers -at 0x000002ce : */ 0x800c0002,0x00000b58, +at 0x000002e4 : */ 0x800c0002,0x00000bb0, /* JUMP ignore_msg3, IF 0x03 ; Save Restore Pointers -at 0x000002d0 : */ 0x800c0003,0x00000b58, +at 0x000002e6 : */ 0x800c0003,0x00000bb0, /* JUMP disc3, IF 0x04 ; Disconnect -at 0x000002d2 : */ 0x800c0004,0x00000bc8, +at 0x000002e8 : */ 0x800c0004,0x00000c50, /* INT int_bad_msg3 -at 0x000002d4 : */ 0x98080000,0xab930008, +at 0x000002ea : */ 0x98080000,0xab930008, /* ignore_msg3: CLEAR ACK -at 0x000002d6 : */ 0x60000040,0x00000000, +at 0x000002ec : */ 0x60000040,0x00000000, /* JUMP redo_msgin3 -at 0x000002d8 : */ 0x80080000,0x00000908, +at 0x000002ee : */ 0x80080000,0x00000900, /* ext_msg3: MOVE SCRATCH0 | had_extmsg TO SCRATCH0 -at 0x000002da : */ 0x7a348000,0x00000000, +at 0x000002f0 : */ 0x7a348000,0x00000000, /* CLEAR ACK -at 0x000002dc : */ 0x60000040,0x00000000, +at 0x000002f2 : */ 0x60000040,0x00000000, /* MOVE 1, msgin_buf + 1, WHEN MSG_IN -at 0x000002de : */ 0x0f000001,0x00000001, +at 0x000002f4 : */ 0x0f000001,0x00000001, /* - JUMP ext_msg3a, IF 0x03 + JUMP reject_msg3, IF NOT 0x03 ; Only handle SDTR -at 0x000002e0 : */ 0x800c0003,0x00000b90, +at 0x000002f6 : */ 0x80040003,0x00000c10, /* - INT int_bad_extmsg3a + CLEAR ACK -at 0x000002e2 : */ 0x98080000,0xab930004, +at 0x000002f8 : */ 0x60000040,0x00000000, +/* + MOVE 1, msgin_buf + 2, WHEN MSG_IN + +at 0x000002fa : */ 0x0f000001,0x00000002, +/* + JUMP reject_msg3, IF NOT 0x01 ; Only handle SDTR + +at 0x000002fc : */ 0x80040001,0x00000c10, /* -ext_msg3a: CLEAR ACK -at 0x000002e4 : */ 0x60000040,0x00000000, +at 0x000002fe : */ 0x60000040,0x00000000, /* - MOVE 1, msgin_buf + 2, WHEN MSG_IN + MOVE 2, msgin_buf + 3, WHEN MSG_IN + +at 0x00000300 : */ 0x0f000002,0x00000003, +/* + INT int_msg_sdtr3 -at 0x000002e6 : */ 0x0f000001,0x00000002, +at 0x00000302 : */ 0x98080000,0xab93000e, /* - JUMP ext_msg3b, IF 0x01 ; Must be SDTR +reject_msg3: + MOVE SCRATCH1 | did_reject TO SCRATCH1 -at 0x000002e8 : */ 0x800c0001,0x00000bb0, +at 0x00000304 : */ 0x7a350100,0x00000000, /* - INT int_bad_extmsg3b + SET ATN -at 0x000002ea : */ 0x98080000,0xab930005, +at 0x00000306 : */ 0x58000008,0x00000000, /* -ext_msg3b: CLEAR ACK -at 0x000002ec : */ 0x60000040,0x00000000, +at 0x00000308 : */ 0x60000040,0x00000000, /* - MOVE 2, msgin_buf + 3, WHEN MSG_IN + JUMP reject_msg3a, WHEN NOT MSG_IN -at 0x000002ee : */ 0x0f000002,0x00000003, +at 0x0000030a : */ 0x87030000,0x00000c40, /* - INT int_msg_sdtr3 + MOVE 1, msgin_buf + 7, WHEN MSG_IN + +at 0x0000030c : */ 0x0f000001,0x00000007, +/* + JUMP reject_msg3 + +at 0x0000030e : */ 0x80080000,0x00000c10, +/* +reject_msg3a: + MOVE 1, msg_reject, WHEN MSG_OUT -at 0x000002f0 : */ 0x98080000,0xab93000e, +at 0x00000310 : */ 0x0e000001,0x00000000, +/* + JUMP redo_msgin3 + +at 0x00000312 : */ 0x80080000,0x00000900, /* disc3: CLEAR ACK -at 0x000002f2 : */ 0x60000040,0x00000000, +at 0x00000314 : */ 0x60000040,0x00000000, /* ENTRY wait_disc3 wait_disc3: WAIT DISCONNECT -at 0x000002f4 : */ 0x48000000,0x00000000, +at 0x00000316 : */ 0x48000000,0x00000000, /* INT int_disc3 -at 0x000002f6 : */ 0x98080000,0xab93001b, +at 0x00000318 : */ 0x98080000,0xab93001b, /* ENTRY resume_msgin3a resume_msgin3a: CLEAR ACK -at 0x000002f8 : */ 0x60000040,0x00000000, +at 0x0000031a : */ 0x60000040,0x00000000, /* JUMP redo_msgin3 -at 0x000002fa : */ 0x80080000,0x00000908, +at 0x0000031c : */ 0x80080000,0x00000900, /* ENTRY resume_msgin3b resume_msgin3b: SET ATN -at 0x000002fc : */ 0x58000008,0x00000000, +at 0x0000031e : */ 0x58000008,0x00000000, /* CLEAR ACK -at 0x000002fe : */ 0x60000040,0x00000000, +at 0x00000320 : */ 0x60000040,0x00000000, /* INT int_no_msgout3, WHEN NOT MSG_OUT -at 0x00000300 : */ 0x9e030000,0xab930011, +at 0x00000322 : */ 0x9e030000,0xab930011, /* MOVE SCRATCH0 | had_msgout TO SCRATCH0 -at 0x00000302 : */ 0x7a340200,0x00000000, +at 0x00000324 : */ 0x7a340200,0x00000000, /* MOVE FROM dsa_msgout, when MSG_OUT -at 0x00000304 : */ 0x1e000000,0x00000008, +at 0x00000326 : */ 0x1e000000,0x00000008, /* JUMP redo_msgin3 -at 0x00000306 : */ 0x80080000,0x00000908, +at 0x00000328 : */ 0x80080000,0x00000900, /* ENTRY resume_rej_ident resume_rej_ident: CLEAR ATN -at 0x00000308 : */ 0x60000008,0x00000000, +at 0x0000032a : */ 0x60000008,0x00000000, /* MOVE 1, msgin_buf, WHEN MSG_IN -at 0x0000030a : */ 0x0f000001,0x00000000, +at 0x0000032c : */ 0x0f000001,0x00000000, /* INT int_not_rej, IF NOT 0x07 ; Reject -at 0x0000030c : */ 0x98040007,0xab93001c, +at 0x0000032e : */ 0x98040007,0xab93001c, /* CLEAR ACK -at 0x0000030e : */ 0x60000040,0x00000000, +at 0x00000330 : */ 0x60000040,0x00000000, /* JUMP done_ident -at 0x00000310 : */ 0x80080000,0x00000050, +at 0x00000332 : */ 0x80080000,0x00000048, /* ENTRY reselect @@ -1716,73 +1784,92 @@ ; Disable selection timer MOVE CTEST7 | 0x10 TO CTEST7 -at 0x00000312 : */ 0x7a1b1000,0x00000000, +at 0x00000334 : */ 0x7a1b1000,0x00000000, /* WAIT RESELECT resel_err -at 0x00000314 : */ 0x50000000,0x00000c70, +at 0x00000336 : */ 0x50000000,0x00000cf8, /* INT int_resel_not_msgin, WHEN NOT MSG_IN -at 0x00000316 : */ 0x9f030000,0xab930016, +at 0x00000338 : */ 0x9f030000,0xab930016, /* MOVE 1, reselected_identify, WHEN MSG_IN -at 0x00000318 : */ 0x0f000001,0x00000000, +at 0x0000033a : */ 0x0f000001,0x00000000, /* INT int_reselected -at 0x0000031a : */ 0x98080000,0xab930017, +at 0x0000033c : */ 0x98080000,0xab930017, /* resel_err: MOVE CTEST2 & 0x40 TO SFBR -at 0x0000031c : */ 0x74164000,0x00000000, +at 0x0000033e : */ 0x74164000,0x00000000, /* JUMP selected, IF 0x00 -at 0x0000031e : */ 0x800c0000,0x00000cb0, +at 0x00000340 : */ 0x800c0000,0x00000d38, /* MOVE SFBR & 0 TO SFBR -at 0x00000320 : */ 0x7c080000,0x00000000, +at 0x00000342 : */ 0x7c080000,0x00000000, /* ENTRY patch_new_dsa patch_new_dsa: MOVE SFBR | 0x11 TO DSA0 -at 0x00000322 : */ 0x6a101100,0x00000000, +at 0x00000344 : */ 0x6a101100,0x00000000, /* MOVE SFBR | 0x22 TO DSA1 -at 0x00000324 : */ 0x6a112200,0x00000000, +at 0x00000346 : */ 0x6a112200,0x00000000, /* MOVE SFBR | 0x33 TO DSA2 -at 0x00000326 : */ 0x6a123300,0x00000000, +at 0x00000348 : */ 0x6a123300,0x00000000, /* MOVE SFBR | 0x44 TO DSA3 -at 0x00000328 : */ 0x6a134400,0x00000000, +at 0x0000034a : */ 0x6a134400,0x00000000, /* JUMP do_select -at 0x0000032a : */ 0x80080000,0x00000000, +at 0x0000034c : */ 0x80080000,0x00000000, /* selected: INT int_selected -at 0x0000032c : */ 0x98080000,0xab930018, +at 0x0000034e : */ 0x98080000,0xab930018, +/* + +ENTRY test1 +test1: + MOVE MEMORY 4, test1_src, test1_dst + +at 0x00000350 : */ 0xc0000004,0x00000000,0x00000000, +/* + INT int_test1 + +at 0x00000353 : */ 0x98080000,0xab93001d, +}; + +#define A_did_reject 0x00000001 +static u32 A_did_reject_used[] __attribute((unused)) = { + 0x0000026c, + 0x000002b8, + 0x00000304, }; #define A_dsa_cmnd 0x00000010 static u32 A_dsa_cmnd_used[] __attribute((unused)) = { - 0x0000001d, + 0x0000001b, }; #define A_dsa_datain 0x00000028 static u32 A_dsa_datain_used[] __attribute((unused)) = { + 0x0000003b, 0x0000003d, 0x0000003f, 0x00000041, @@ -1910,11 +1997,11 @@ 0x00000135, 0x00000137, 0x00000139, - 0x0000013b, }; #define A_dsa_dataout 0x00000428 static u32 A_dsa_dataout_used[] __attribute((unused)) = { + 0x00000141, 0x00000143, 0x00000145, 0x00000147, @@ -2042,25 +2129,24 @@ 0x0000023b, 0x0000023d, 0x0000023f, - 0x00000241, }; #define A_dsa_msgin 0x00000020 static u32 A_dsa_msgin_used[] __attribute((unused)) = { - 0x0000002f, + 0x0000002d, }; #define A_dsa_msgout 0x00000008 static u32 A_dsa_msgout_used[] __attribute((unused)) = { - 0x00000013, - 0x00000285, - 0x000002c5, - 0x00000305, + 0x00000011, + 0x0000028f, + 0x000002db, + 0x00000327, }; #define A_dsa_select 0x00000000 static u32 A_dsa_select_used[] __attribute((unused)) = { - 0x00000006, + 0x00000004, }; #define A_dsa_size 0x00000828 @@ -2069,285 +2155,290 @@ #define A_dsa_status 0x00000018 static u32 A_dsa_status_used[] __attribute((unused)) = { - 0x0000002b, + 0x00000029, }; #define A_had_cmdout 0x00000004 static u32 A_had_cmdout_used[] __attribute((unused)) = { - 0x0000001a, + 0x00000018, }; #define A_had_datain 0x00000008 static u32 A_had_datain_used[] __attribute((unused)) = { - 0x00000038, + 0x00000036, }; #define A_had_dataout 0x00000010 static u32 A_had_dataout_used[] __attribute((unused)) = { - 0x0000013e, + 0x0000013c, }; #define A_had_extmsg 0x00000080 static u32 A_had_extmsg_used[] __attribute((unused)) = { - 0x0000025a, - 0x0000029a, - 0x000002da, + 0x00000258, + 0x000002a4, + 0x000002f0, }; #define A_had_msgin 0x00000040 static u32 A_had_msgin_used[] __attribute((unused)) = { - 0x00000248, - 0x00000288, - 0x000002c8, + 0x00000246, + 0x00000292, + 0x000002de, }; #define A_had_msgout 0x00000002 static u32 A_had_msgout_used[] __attribute((unused)) = { - 0x00000010, - 0x00000282, - 0x000002c2, - 0x00000302, + 0x0000000e, + 0x0000028c, + 0x000002d8, + 0x00000324, }; #define A_had_select 0x00000001 static u32 A_had_select_used[] __attribute((unused)) = { - 0x0000000c, + 0x0000000a, }; #define A_had_status 0x00000020 static u32 A_had_status_used[] __attribute((unused)) = { }; -#define A_int_bad_extmsg1a 0xab930000 -static u32 A_int_bad_extmsg1a_used[] __attribute((unused)) = { - 0x00000263, -}; - -#define A_int_bad_extmsg1b 0xab930001 -static u32 A_int_bad_extmsg1b_used[] __attribute((unused)) = { - 0x0000026b, -}; - -#define A_int_bad_extmsg2a 0xab930002 -static u32 A_int_bad_extmsg2a_used[] __attribute((unused)) = { - 0x000002a3, -}; - -#define A_int_bad_extmsg2b 0xab930003 -static u32 A_int_bad_extmsg2b_used[] __attribute((unused)) = { - 0x000002ab, -}; - -#define A_int_bad_extmsg3a 0xab930004 -static u32 A_int_bad_extmsg3a_used[] __attribute((unused)) = { - 0x000002e3, -}; - -#define A_int_bad_extmsg3b 0xab930005 -static u32 A_int_bad_extmsg3b_used[] __attribute((unused)) = { - 0x000002eb, -}; - #define A_int_bad_msg1 0xab930006 static u32 A_int_bad_msg1_used[] __attribute((unused)) = { - 0x00000255, + 0x00000253, }; #define A_int_bad_msg2 0xab930007 static u32 A_int_bad_msg2_used[] __attribute((unused)) = { - 0x00000295, + 0x0000029f, }; #define A_int_bad_msg3 0xab930008 static u32 A_int_bad_msg3_used[] __attribute((unused)) = { - 0x000002d5, + 0x000002eb, }; #define A_int_cmd_bad_phase 0xab930009 static u32 A_int_cmd_bad_phase_used[] __attribute((unused)) = { - 0x00000027, + 0x00000025, }; #define A_int_cmd_complete 0xab93000a static u32 A_int_cmd_complete_used[] __attribute((unused)) = { - 0x00000037, + 0x00000035, }; #define A_int_data_bad_phase 0xab93000b static u32 A_int_data_bad_phase_used[] __attribute((unused)) = { - 0x00000247, + 0x00000245, }; #define A_int_disc1 0xab930019 static u32 A_int_disc1_used[] __attribute((unused)) = { - 0x00000277, + 0x00000281, }; #define A_int_disc2 0xab93001a static u32 A_int_disc2_used[] __attribute((unused)) = { - 0x000002b7, + 0x000002cd, }; #define A_int_disc3 0xab93001b static u32 A_int_disc3_used[] __attribute((unused)) = { - 0x000002f7, + 0x00000319, }; #define A_int_msg_sdtr1 0xab93000c static u32 A_int_msg_sdtr1_used[] __attribute((unused)) = { - 0x00000271, + 0x0000026b, }; #define A_int_msg_sdtr2 0xab93000d static u32 A_int_msg_sdtr2_used[] __attribute((unused)) = { - 0x000002b1, + 0x000002b7, }; #define A_int_msg_sdtr3 0xab93000e static u32 A_int_msg_sdtr3_used[] __attribute((unused)) = { - 0x000002f1, + 0x00000303, }; #define A_int_no_msgout1 0xab93000f static u32 A_int_no_msgout1_used[] __attribute((unused)) = { - 0x00000281, + 0x0000028b, }; #define A_int_no_msgout2 0xab930010 static u32 A_int_no_msgout2_used[] __attribute((unused)) = { - 0x000002c1, + 0x000002d7, }; #define A_int_no_msgout3 0xab930011 static u32 A_int_no_msgout3_used[] __attribute((unused)) = { - 0x00000301, + 0x00000323, }; #define A_int_not_cmd_complete 0xab930012 static u32 A_int_not_cmd_complete_used[] __attribute((unused)) = { - 0x00000031, + 0x0000002f, }; #define A_int_not_rej 0xab93001c static u32 A_int_not_rej_used[] __attribute((unused)) = { - 0x0000030d, + 0x0000032f, }; #define A_int_resel_not_msgin 0xab930016 static u32 A_int_resel_not_msgin_used[] __attribute((unused)) = { - 0x00000317, + 0x00000339, }; #define A_int_reselected 0xab930017 static u32 A_int_reselected_used[] __attribute((unused)) = { - 0x0000031b, + 0x0000033d, }; #define A_int_sel_no_ident 0xab930013 static u32 A_int_sel_no_ident_used[] __attribute((unused)) = { - 0x0000000f, + 0x0000000d, }; #define A_int_sel_not_cmd 0xab930014 static u32 A_int_sel_not_cmd_used[] __attribute((unused)) = { - 0x00000019, + 0x00000017, }; #define A_int_selected 0xab930018 static u32 A_int_selected_used[] __attribute((unused)) = { - 0x0000032d, + 0x0000034f, }; #define A_int_status_not_msgin 0xab930015 static u32 A_int_status_not_msgin_used[] __attribute((unused)) = { - 0x0000002d, + 0x0000002b, +}; + +#define A_int_test1 0xab93001d +static u32 A_int_test1_used[] __attribute((unused)) = { + 0x00000354, +}; + +#define A_msg_reject 0x00000000 +static u32 A_msg_reject_used[] __attribute((unused)) = { + 0x00000279, + 0x000002c5, + 0x00000311, }; #define A_msgin_buf 0x00000000 static u32 A_msgin_buf_used[] __attribute((unused)) = { - 0x0000024b, - 0x0000025f, - 0x00000267, - 0x0000026f, - 0x0000028b, - 0x0000029f, - 0x000002a7, + 0x00000249, + 0x0000025d, + 0x00000263, + 0x00000269, + 0x00000275, + 0x00000295, + 0x000002a9, 0x000002af, - 0x000002cb, - 0x000002df, - 0x000002e7, - 0x000002ef, - 0x0000030b, + 0x000002b5, + 0x000002c1, + 0x000002e1, + 0x000002f5, + 0x000002fb, + 0x00000301, + 0x0000030d, + 0x0000032d, }; #define A_reselected_identify 0x00000000 static u32 A_reselected_identify_used[] __attribute((unused)) = { - 0x00000319, + 0x0000033b, +}; + +#define A_test1_dst 0x00000000 +static u32 A_test1_dst_used[] __attribute((unused)) = { + 0x00000352, +}; + +#define A_test1_src 0x00000000 +static u32 A_test1_src_used[] __attribute((unused)) = { + 0x00000351, }; #define Ent_do_select 0x00000000 -#define Ent_done_ident 0x00000050 -#define Ent_end_data_trans 0x00000908 -#define Ent_patch_input_data 0x000000e8 -#define Ent_patch_new_dsa 0x00000c88 -#define Ent_patch_output_data 0x00000500 -#define Ent_reselect 0x00000c48 -#define Ent_resume_cmd 0x00000068 -#define Ent_resume_msgin1a 0x000009e0 -#define Ent_resume_msgin1b 0x000009f0 -#define Ent_resume_msgin2a 0x00000ae0 -#define Ent_resume_msgin2b 0x00000af0 -#define Ent_resume_msgin3a 0x00000be0 -#define Ent_resume_msgin3b 0x00000bf0 -#define Ent_resume_pmm 0x00000078 -#define Ent_resume_rej_ident 0x00000c20 -#define Ent_wait_disc1 0x000009d0 -#define Ent_wait_disc2 0x00000ad0 -#define Ent_wait_disc3 0x00000bd0 -#define Ent_wait_disc_complete 0x000000d0 +#define Ent_done_ident 0x00000048 +#define Ent_end_data_trans 0x00000900 +#define Ent_patch_input_data 0x000000e0 +#define Ent_patch_new_dsa 0x00000d10 +#define Ent_patch_output_data 0x000004f8 +#define Ent_reselect 0x00000cd0 +#define Ent_resume_cmd 0x00000060 +#define Ent_resume_msgin1a 0x00000a08 +#define Ent_resume_msgin1b 0x00000a18 +#define Ent_resume_msgin2a 0x00000b38 +#define Ent_resume_msgin2b 0x00000b48 +#define Ent_resume_msgin3a 0x00000c68 +#define Ent_resume_msgin3b 0x00000c78 +#define Ent_resume_pmm 0x00000070 +#define Ent_resume_rej_ident 0x00000ca8 +#define Ent_test1 0x00000d40 +#define Ent_wait_disc1 0x000009f8 +#define Ent_wait_disc2 0x00000b28 +#define Ent_wait_disc3 0x00000c58 +#define Ent_wait_disc_complete 0x000000c8 static u32 LABELPATCHES[] __attribute((unused)) = { + 0x00000005, 0x00000007, - 0x00000009, + 0x00000013, 0x00000015, - 0x00000017, + 0x0000001d, 0x0000001f, 0x00000021, 0x00000023, - 0x00000025, - 0x0000013d, + 0x0000013b, + 0x00000241, 0x00000243, - 0x00000245, + 0x0000024b, 0x0000024d, 0x0000024f, 0x00000251, - 0x00000253, - 0x00000259, - 0x00000261, - 0x00000269, + 0x00000257, + 0x0000025f, + 0x00000265, + 0x00000273, + 0x00000277, 0x0000027b, - 0x00000287, - 0x0000028d, - 0x0000028f, + 0x00000285, 0x00000291, - 0x00000293, + 0x00000297, 0x00000299, - 0x000002a1, - 0x000002a9, - 0x000002bb, + 0x0000029b, + 0x0000029d, + 0x000002a3, + 0x000002ab, + 0x000002b1, + 0x000002bf, + 0x000002c3, 0x000002c7, - 0x000002cd, - 0x000002cf, 0x000002d1, - 0x000002d3, - 0x000002d9, - 0x000002e1, + 0x000002dd, + 0x000002e3, + 0x000002e5, + 0x000002e7, 0x000002e9, - 0x000002fb, - 0x00000307, - 0x00000311, - 0x00000315, - 0x0000031f, - 0x0000032b, + 0x000002ef, + 0x000002f7, + 0x000002fd, + 0x0000030b, + 0x0000030f, + 0x00000313, + 0x0000031d, + 0x00000329, + 0x00000333, + 0x00000337, + 0x00000341, + 0x0000034d, }; static struct { @@ -2356,6 +2447,6 @@ } EXTERNAL_PATCHES[] __attribute((unused)) = { }; -static u32 INSTRUCTIONS __attribute((unused)) = 407; -static u32 PATCHES __attribute((unused)) = 42; +static u32 INSTRUCTIONS __attribute((unused)) = 426; +static u32 PATCHES __attribute((unused)) = 51; static u32 EXTERNAL_PATCHES_LEN __attribute((unused)) = 0; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/scsi/st.c linux.21rc1-ac1/drivers/scsi/st.c --- linux.21rc1/drivers/scsi/st.c 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/scsi/st.c 2003-04-22 16:44:37.000000000 +0100 @@ -9,10 +9,10 @@ Steve Hirsch, Andreas Koppenh"ofer, Michael Leodolter, Eyal Lebedinsky, Michael Schaefer, J"org Weule, and Eric Youngdale. - Copyright 1992 - 2002 Kai Makisara - email Kai.Makisara@metla.fi + Copyright 1992 - 2003 Kai Makisara + email Kai.Makisara@kolumbus.fi - Last modified: Mon Aug 5 22:54:13 2002 by makisara + Last modified: Sun Apr 6 22:44:42 2003 by makisara Some small formal changes - aeb, 950809 Last modified: 18-JAN-1998 Richard Gooch Devfs support @@ -21,7 +21,7 @@ error handling will be discarded. */ -static char *verstr = "20020805"; +static char *verstr = "20030406"; #include @@ -72,7 +72,6 @@ #include "constants.h" static int buffer_kbs; -static int write_threshold_kbs; static int max_buffers = (-1); static int max_sg_segs; static int blocking_open = ST_BLOCKING_OPEN; @@ -84,8 +83,6 @@ MODULE_PARM(buffer_kbs, "i"); MODULE_PARM_DESC(buffer_kbs, "Default driver buffer size (KB; 32)"); -MODULE_PARM(write_threshold_kbs, "i"); -MODULE_PARM_DESC(write_threshold_kbs, "Asynchronous write threshold (KB; 30)"); MODULE_PARM(max_buffers, "i"); MODULE_PARM_DESC(max_buffers, "Maximum number of buffer allocated at initialisation (4)"); MODULE_PARM(max_sg_segs, "i"); @@ -103,8 +100,8 @@ { "buffer_kbs", &buffer_kbs }, - { - "write_threshold_kbs", &write_threshold_kbs + { /* Retained for compatibility */ + "write_threshold_kbs", NULL }, { "max_buffers", &max_buffers @@ -122,7 +119,6 @@ /* The default definitions have been moved to st_options.h */ #define ST_BUFFER_SIZE (ST_BUFFER_BLOCKS * ST_KILOBYTE) -#define ST_WRITE_THRESHOLD (ST_WRITE_THRESHOLD_BLOCKS * ST_KILOBYTE) /* The buffer size should fit into the 24 bits for length in the 6-byte SCSI read and write commands. */ @@ -153,7 +149,6 @@ static int st_nbr_buffers; static ST_buffer **st_buffers = NULL; static int st_buffer_size = ST_BUFFER_SIZE; -static int st_write_threshold = ST_WRITE_THRESHOLD; static int st_max_buffers = ST_MAX_BUFFERS; static int st_max_sg_segs = ST_MAX_SG; @@ -167,6 +162,7 @@ static int set_sg_lengths(ST_buffer *, unsigned int); static int append_to_buffer(const char *, ST_buffer *, int); static int from_buffer(ST_buffer *, char *, int); +static void move_buffer_data(ST_buffer *, int); static int st_init(void); static int st_attach(Scsi_Device *); @@ -1196,6 +1192,7 @@ ssize_t total; ssize_t i, do_count, blks, transfer; ssize_t retval = 0; + int residual, retry_eot = 0, scode; int write_threshold; int doing_write = 0; unsigned char cmd[MAX_COMMAND_SIZE]; @@ -1367,7 +1364,7 @@ write_threshold = 1; } else write_threshold = (STp->buffer)->buffer_blocks * STp->block_size; - if (!STm->do_async_writes) + if (!STm->do_async_writes || STp->block_size > 0) write_threshold--; total = count; @@ -1381,7 +1378,7 @@ b_point = buf; while ((STp->block_size == 0 && !STm->do_async_writes && count > 0) || (STp->block_size != 0 && - (STp->buffer)->buffer_bytes + count > write_threshold)) { + (STp->buffer)->buffer_bytes + count > write_threshold && !retry_eot)) { doing_write = 1; if (STp->block_size == 0) do_count = count; @@ -1398,6 +1395,7 @@ goto out; } + retry_write: if (STp->block_size == 0) blks = transfer = do_count; else { @@ -1420,46 +1418,66 @@ DEBC(printk(ST_DEB_MSG "st%d: Error on write:\n", dev)); if ((SRpnt->sr_sense_buffer[0] & 0x70) == 0x70 && (SRpnt->sr_sense_buffer[2] & 0x40)) { + scode = SRpnt->sr_sense_buffer[2] & 0x0f; if ((SRpnt->sr_sense_buffer[0] & 0x80) != 0) - transfer = (SRpnt->sr_sense_buffer[3] << 24) | + residual = (SRpnt->sr_sense_buffer[3] << 24) | (SRpnt->sr_sense_buffer[4] << 16) | (SRpnt->sr_sense_buffer[5] << 8) | SRpnt->sr_sense_buffer[6]; else if (STp->block_size == 0 && - (SRpnt->sr_sense_buffer[2] & 0x0f) == - VOLUME_OVERFLOW) - transfer = do_count; + scode == VOLUME_OVERFLOW) + residual = do_count; else - transfer = 0; + residual = 0; if (STp->block_size != 0) - transfer *= STp->block_size; - if (transfer <= do_count) { - filp->f_pos += do_count - transfer; - count -= do_count - transfer; + residual *= STp->block_size; + if (residual <= do_count) { + /* Within the data in this write() */ + filp->f_pos += do_count - residual; + count -= do_count - residual; if (STps->drv_block >= 0) { if (STp->block_size == 0 && - transfer < do_count) + residual < do_count) STps->drv_block++; else if (STp->block_size != 0) STps->drv_block += - (do_count - transfer) / + (transfer - residual) / STp->block_size; } STps->eof = ST_EOM_OK; retval = (-ENOSPC); /* EOM within current request */ DEBC(printk(ST_DEB_MSG "st%d: EOM with %d bytes unwritten.\n", - dev, transfer)); + dev, count)); } else { - STps->eof = ST_EOM_ERROR; - STps->drv_block = (-1); /* Too cautious? */ - retval = (-EIO); /* EOM for old data */ - DEBC(printk(ST_DEB_MSG - "st%d: EOM with lost data.\n", - dev)); + /* EOT in within data buffered earlier */ + if (!retry_eot && (SRpnt->sr_sense_buffer[0] & 1) == 0 && + (scode == NO_SENSE || scode == RECOVERED_ERROR)) { + move_buffer_data(STp->buffer, transfer - residual); + retry_eot = TRUE; + if (STps->drv_block >= 0) { + STps->drv_block += (transfer - residual) / + STp->block_size; + } + STps->eof = ST_EOM_OK; + DEBC(printk(ST_DEB_MSG + "st%d: Retry write of %d bytes at EOM.\n", + dev, do_count)); + goto retry_write; + } + else { + /* Either error within data buffered by driver or failed retry */ + STps->eof = ST_EOM_ERROR; + STps->drv_block = (-1); /* Too cautious? */ + retval = (-EIO); /* EOM for old data */ + DEBC(printk(ST_DEB_MSG + "st%d: EOM with lost data.\n", + dev)); + } } } else { STps->drv_block = (-1); /* Too cautious? */ + retry_eot = FALSE; retval = (-EIO); } @@ -1483,7 +1501,7 @@ (STp->buffer)->buffer_bytes = 0; STp->dirty = 0; } - if (count != 0) { + if (count != 0 && !retry_eot) { STp->dirty = 1; i = append_to_buffer(b_point, STp->buffer, count); if (i) { @@ -1499,26 +1517,14 @@ goto out; } - if (STm->do_async_writes && - (((STp->buffer)->buffer_bytes >= STp->write_threshold && - (STp->buffer)->buffer_bytes >= STp->block_size) || - STp->block_size == 0)) { + if (STm->do_async_writes && STp->block_size == 0) { /* Schedule an asynchronous write */ - if (STp->block_size == 0) - (STp->buffer)->writing = (STp->buffer)->buffer_bytes; - else - (STp->buffer)->writing = ((STp->buffer)->buffer_bytes / - STp->block_size) * STp->block_size; - STp->dirty = !((STp->buffer)->writing == - (STp->buffer)->buffer_bytes); - - if (STp->block_size == 0) - blks = (STp->buffer)->writing; - else - blks = (STp->buffer)->writing / STp->block_size; - cmd[2] = blks >> 16; - cmd[3] = blks >> 8; - cmd[4] = blks; + (STp->buffer)->writing = (STp->buffer)->buffer_bytes; + STp->dirty = FALSE; + residual = (STp->buffer)->writing; + cmd[2] = residual >> 16; + cmd[3] = residual >> 8; + cmd[4] = residual; DEB( STp->write_pending = 1; ) SRpnt = st_do_scsi(SRpnt, STp, cmd, (STp->buffer)->writing, @@ -1532,9 +1538,9 @@ } STps->at_sm &= (total == 0); - if (total > 0) + if (total > 0 && !retry_eot) STps->eof = ST_NOEOF; - retval = total; + retval = total - count; out: if (SRpnt != NULL) @@ -1625,9 +1631,14 @@ if (SRpnt->sr_sense_buffer[2] & 0x20) { /* ILI */ if (STp->block_size == 0) { - if (transfer < 0) { + if (transfer <= 0) { + if (transfer < 0) + printk(KERN_NOTICE + "st%d: Failed to read %d byte block with %d byte read.\n", + dev, bytes - transfer, bytes); if (STps->drv_block >= 0) STps->drv_block += 1; + (STp->buffer)->buffer_bytes = 0; return (-ENOMEM); } (STp->buffer)->buffer_bytes = bytes - transfer; @@ -1694,6 +1705,9 @@ } else /* Some other extended sense code */ retval = (-EIO); } + + if ((STp->buffer)->buffer_bytes < 0) /* Caused by bogus sense data */ + (STp->buffer)->buffer_bytes = 0; } /* End of extended sense test */ else { /* Non-extended sense */ @@ -2004,16 +2018,7 @@ debugging = value; ) st_log_options(STp, STm, dev); } else if (code == MT_ST_WRITE_THRESHOLD) { - value = (options & ~MT_ST_OPTIONS) * ST_KILOBYTE; - if (value < 1 || value > st_buffer_size) { - printk(KERN_WARNING - "st%d: Write threshold %d too small or too large.\n", - dev, value); - return (-EIO); - } - STp->write_threshold = value; - printk(KERN_INFO "st%d: Write threshold set to %d bytes.\n", - dev, value); + /* Retained for compatibility */ } else if (code == MT_ST_DEF_BLKSIZE) { value = (options & ~MT_ST_OPTIONS); if (value == ~MT_ST_OPTIONS) { @@ -2155,7 +2160,7 @@ /* Send the mode page in the tape buffer to the drive. Assumes that the mode data in the buffer is correctly formatted. */ -static int write_mode_page(Scsi_Tape *STp, int page) +static int write_mode_page(Scsi_Tape *STp, int page, int slow) { int pgo; unsigned char cmd[MAX_COMMAND_SIZE]; @@ -2174,7 +2179,7 @@ (STp->buffer)->b_data[pgo + MP_OFF_PAGE_NBR] &= MP_MSK_PAGE_NBR; SRpnt = st_do_scsi(SRpnt, STp, cmd, cmd[4], SCSI_DATA_WRITE, - STp->timeout, 0, TRUE); + (slow ? STp->long_timeout : STp->timeout), 0, TRUE); if (SRpnt == NULL) return (STp->buffer)->syscall_result; @@ -2241,7 +2246,7 @@ b_data[mpoffs + CP_OFF_C_ALGO] = 0; /* no compression */ } - retval = write_mode_page(STp, COMPRESSION_PAGE); + retval = write_mode_page(STp, COMPRESSION_PAGE, FALSE); if (retval) { DEBC(printk(ST_DEB_MSG "st%d: Compression change failed.\n", dev)); return (-EIO); @@ -3055,7 +3060,7 @@ bp[pgo + PP_OFF_RESERVED] = 0; bp[pgo + PP_OFF_FLAGS] = PP_BIT_IDP | PP_MSK_PSUM_MB; - result = write_mode_page(STp, PART_PAGE); + result = write_mode_page(STp, PART_PAGE, TRUE); if (result) { printk(KERN_INFO "st%d: Partitioning of tape failed.\n", dev); result = (-EIO); @@ -3644,6 +3649,50 @@ } +/* Move data towards start of buffer */ +static void move_buffer_data(ST_buffer * st_bp, int offset) +{ + int src_seg, dst_seg, src_offset = 0, dst_offset; + int count, total; + + if (offset == 0) + return; + + total=st_bp->buffer_bytes - offset; + for (src_seg=0; src_seg < st_bp->sg_segs; src_seg++) { + src_offset = offset; + if (src_offset < st_bp->sg_lengths[src_seg]) + break; + offset -= st_bp->sg_lengths[src_seg]; + } + if (src_seg == st_bp->sg_segs) { /* Should never happen */ + printk(KERN_WARNING "st: zap_buffer offset overflow.\n"); + return; + } + + st_bp->buffer_bytes = st_bp->read_pointer = total; + for (dst_seg=dst_offset=0; total > 0; ) { + count = min(st_bp->sg_lengths[dst_seg] - dst_offset, + st_bp->sg_lengths[src_seg] - src_offset); + memmove(st_bp->sg[dst_seg].address + dst_offset, + st_bp->sg[src_seg].address + src_offset, count); + printk("st: move (%d,%d) -> (%d,%d) count %d\n", + src_seg, src_offset, dst_seg, dst_offset, count); + src_offset += count; + if (src_offset >= st_bp->sg_lengths[src_seg]) { + src_seg++; + src_offset = 0; + } + dst_offset += count; + if (dst_offset >= st_bp->sg_lengths[dst_seg]) { + dst_seg++; + dst_offset = 0; + } + total -= count; + } +} + + /* Set the scatter/gather list length fields to sum up to the transfer length. Return the number of segments being used. */ static int set_sg_lengths(ST_buffer *st_bp, unsigned int length) @@ -3668,15 +3717,6 @@ { if (buffer_kbs > 0) st_buffer_size = buffer_kbs * ST_KILOBYTE; - if (write_threshold_kbs > 0) - st_write_threshold = write_threshold_kbs * ST_KILOBYTE; - else if (buffer_kbs > 0) - st_write_threshold = st_buffer_size - 2048; - if (st_write_threshold > st_buffer_size) { - st_write_threshold = st_buffer_size; - printk(KERN_WARNING "st: write_threshold limited to %d bytes.\n", - st_write_threshold); - } if (max_buffers >= 0) st_max_buffers = max_buffers; if (max_sg_segs >= ST_FIRST_SG) @@ -3695,13 +3735,15 @@ if (ints[0] > 0) { for (i = 0; i < ints[0] && i < ARRAY_SIZE(parms); i++) - *parms[i].val = ints[i + 1]; + if (parms[i].val) + *parms[i].val = ints[i + 1]; } else { while (stp != NULL) { for (i = 0; i < ARRAY_SIZE(parms); i++) { len = strlen(parms[i].name); if (!strncmp(stp, parms[i].name, len) && - (*(stp + len) == ':' || *(stp + len) == '=')) { + (*(stp + len) == ':' || *(stp + len) == '=') && + parms[i].val) { *parms[i].val = simple_strtoul(stp + len + 1, NULL, 0); break; @@ -3863,7 +3905,6 @@ tpnt->fast_mteom = ST_FAST_MTEOM; tpnt->scsi2_logical = ST_SCSI2LOGICAL; tpnt->immediate = ST_NOWAIT; - tpnt->write_threshold = st_write_threshold; tpnt->default_drvbuffer = 0xff; /* No forced buffering */ tpnt->partition = 0; tpnt->new_partition = 0; @@ -3941,8 +3982,8 @@ return 0; printk(KERN_INFO - "st: Version %s, bufsize %d, wrt %d, max init. bufs %d, s/g segs %d\n", - verstr, st_buffer_size, st_write_threshold, st_max_buffers, st_max_sg_segs); + "st: Version %s, bufsize %d, max init. bufs %d, s/g segs %d\n", + verstr, st_buffer_size, st_max_buffers, st_max_sg_segs); write_lock_irqsave(&st_dev_arr_lock, flags); if (!st_registered) { diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/scsi/st.h linux.21rc1-ac1/drivers/scsi/st.h --- linux.21rc1/drivers/scsi/st.h 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/scsi/st.h 2003-04-22 19:20:12.000000000 +0100 @@ -86,7 +86,6 @@ unsigned char use_pf; /* Set Page Format bit in all mode selects? */ unsigned char c_algo; /* compression algorithm */ int tape_type; - int write_threshold; int timeout; /* timeout for normal commands */ int long_timeout; /* timeout for commands known to take long time */ diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/scsi/st_options.h linux.21rc1-ac1/drivers/scsi/st_options.h --- linux.21rc1/drivers/scsi/st_options.h 2003-04-22 16:38:47.000000000 +0100 +++ linux.21rc1-ac1/drivers/scsi/st_options.h 2003-04-22 16:44:37.000000000 +0100 @@ -1,9 +1,9 @@ /* The compile-time configurable defaults for the Linux SCSI tape driver. - Copyright 1995-2002 Kai Makisara. + Copyright 1995-2003 Kai Makisara. - Last modified: Wed May 1 11:06:47 2002 by makisara + Last modified: Sun Apr 6 22:45:15 2003 by makisara */ #ifndef _ST_OPTIONS_H @@ -33,11 +33,6 @@ /* The tape driver buffer size in kilobytes. Must be non-zero. */ #define ST_BUFFER_BLOCKS 32 -/* The number of kilobytes of data in the buffer that triggers an - asynchronous write in fixed block mode. See also ST_ASYNC_WRITES - below. */ -#define ST_WRITE_THRESHOLD_BLOCKS 30 - /* The maximum number of tape buffers the driver tries to allocate at driver initialisation. The number is also constrained by the number of drives detected. If more buffers are needed, they are allocated diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/sgi/char/sgiserial.c linux.21rc1-ac1/drivers/sgi/char/sgiserial.c --- linux.21rc1/drivers/sgi/char/sgiserial.c 2003-04-22 16:38:52.000000000 +0100 +++ linux.21rc1-ac1/drivers/sgi/char/sgiserial.c 2003-04-22 16:44:37.000000000 +0100 @@ -1489,7 +1489,7 @@ #ifdef SERIAL_DEBUG_OPEN printk("rs_close ttys%d, count = %d\n", info->line, info->count); #endif - if ((tty->count == 1) && (info->count != 1)) { + if ((atomic_read(&tty->count) == 1) && (info->count != 1)) { /* * Uh, oh. tty->count is 1, which means that the tty * structure will be freed. Info->count should always diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/sound/ad1848.c linux.21rc1-ac1/drivers/sound/ad1848.c --- linux.21rc1/drivers/sound/ad1848.c 2003-04-22 16:38:48.000000000 +0100 +++ linux.21rc1-ac1/drivers/sound/ad1848.c 2003-04-22 16:44:37.000000000 +0100 @@ -2969,6 +2969,10 @@ ISAPNP_ANY_ID, ISAPNP_ANY_ID, ISAPNP_VENDOR('Y','M','H'), ISAPNP_FUNCTION(0x0021), 1, 0, 0, 1, 1}, + {"AZT1008", + ISAPNP_ANY_ID, ISAPNP_ANY_ID, + ISAPNP_VENDOR('A','Z','T'), ISAPNP_FUNCTION(0x0001), + 1, 0, 0, 1, 1}, {0} }; @@ -2981,6 +2985,8 @@ ISAPNP_VENDOR('C','S','C'), ISAPNP_FUNCTION(0x0100), 0 }, { ISAPNP_ANY_ID, ISAPNP_ANY_ID, ISAPNP_VENDOR('Y','M','H'), ISAPNP_FUNCTION(0x0021), 0 }, + { ISAPNP_ANY_ID, ISAPNP_ANY_ID, + ISAPNP_VENDOR('A','Z','T'), ISAPNP_FUNCTION(0x0001), 0 }, {0} }; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/sound/ad1889.c linux.21rc1-ac1/drivers/sound/ad1889.c --- linux.21rc1/drivers/sound/ad1889.c 2003-04-22 16:39:40.000000000 +0100 +++ linux.21rc1-ac1/drivers/sound/ad1889.c 2003-04-22 16:44:37.000000000 +0100 @@ -1059,7 +1059,7 @@ name: DEVNAME, id_table: ad1889_id_tbl, probe: ad1889_probe, - remove: ad1889_remove, + remove: __devexit_p(ad1889_remove), }; static int __init ad1889_init_module(void) diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/sound/awe_wave.c linux.21rc1-ac1/drivers/sound/awe_wave.c --- linux.21rc1/drivers/sound/awe_wave.c 2003-04-22 16:38:48.000000000 +0100 +++ linux.21rc1-ac1/drivers/sound/awe_wave.c 2003-04-22 16:44:37.000000000 +0100 @@ -2051,9 +2051,9 @@ awe_info.nr_voices = awe_max_voices; else awe_info.nr_voices = AWE_MAX_CHANNELS; - memcpy((char*)arg, &awe_info, sizeof(awe_info)); + if(copy_to_user(arg, &awe_info, sizeof(awe_info))) + return -EFAULT; return 0; - break; case SNDCTL_SEQ_RESETSAMPLES: awe_reset(dev); diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/sound/cmpci.c linux.21rc1-ac1/drivers/sound/cmpci.c --- linux.21rc1/drivers/sound/cmpci.c 2003-04-22 16:39:40.000000000 +0100 +++ linux.21rc1-ac1/drivers/sound/cmpci.c 2003-04-22 16:44:37.000000000 +0100 @@ -588,7 +588,8 @@ unsigned short *src = (unsigned short *)source; do { - data = (unsigned long) *src++; + __get_user(data, src); + src++; data <<= 12; // ok for 16-bit data if (s->spdif_counter == 2 || s->spdif_counter == 3) data |= 0x40000000; // indicate AC-3 raw data @@ -1599,9 +1600,9 @@ return -ENXIO; if (!s->dma_adc.ready && (ret = prog_dmabuf(s, 1))) return ret; - if (!access_ok(VERIFY_READ, buffer, count)) - return -EFAULT; } + if (!access_ok(VERIFY_READ, buffer, count)) + return -EFAULT; ret = 0; while (count > 0) { diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/sound/via82cxxx_audio.c linux.21rc1-ac1/drivers/sound/via82cxxx_audio.c --- linux.21rc1/drivers/sound/via82cxxx_audio.c 2003-04-22 16:39:40.000000000 +0100 +++ linux.21rc1-ac1/drivers/sound/via82cxxx_audio.c 2003-04-22 16:44:37.000000000 +0100 @@ -1345,7 +1345,7 @@ /** * via_chan_flush_frag - Flush partially-full playback buffer to hardware - * @chan: Channel whose DMA table will be displayed + * @chan: Channel whose DMA table will be flushed * * Flushes partially-full playback buffer to hardware. */ diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/sound/vidc.c linux.21rc1-ac1/drivers/sound/vidc.c --- linux.21rc1/drivers/sound/vidc.c 2003-04-22 16:38:48.000000000 +0100 +++ linux.21rc1-ac1/drivers/sound/vidc.c 2003-04-22 16:44:37.000000000 +0100 @@ -224,9 +224,11 @@ newsize = 208; if (newsize > 4096) newsize = 4096; - for (new2size = 128; new2size < newsize; new2size <<= 1); - if (new2size - newsize > newsize - (new2size >> 1)) - new2size >>= 1; + for (new2size = 128; new2size < newsize; new2size <<= 1) + /* loop */; + + if (new2size - newsize > newsize - (new2size >> 1)) + new2size >>= 1; if (new2size > 4096) { printk(KERN_ERR "VIDC: error: dma buffer (%d) %d > 4K\n", newsize, new2size); diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/tc/zs.c linux.21rc1-ac1/drivers/tc/zs.c --- linux.21rc1/drivers/tc/zs.c 2003-04-22 16:38:53.000000000 +0100 +++ linux.21rc1-ac1/drivers/tc/zs.c 2003-04-22 16:44:37.000000000 +0100 @@ -1374,7 +1374,7 @@ #ifdef SERIAL_DEBUG_OPEN printk("rs_close ttyS%02d, count = %d\n", info->line, info->count); #endif - if ((tty->count == 1) && (info->count != 1)) { + if ((atomic_read(&tty->count) == 1) && (info->count != 1)) { /* * Uh, oh. tty->count is 1, which means that the tty * structure will be freed. Info->count should always diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/usb/devio.c linux.21rc1-ac1/drivers/usb/devio.c --- linux.21rc1/drivers/usb/devio.c 2003-04-22 16:39:40.000000000 +0100 +++ linux.21rc1-ac1/drivers/usb/devio.c 2003-04-22 16:44:37.000000000 +0100 @@ -43,7 +43,7 @@ #include #include #include - +#include struct async { struct list_head asynclist; @@ -1078,6 +1078,8 @@ int size; void *buf = 0; int retval = 0; + struct usb_interface *ifp = 0; + struct usb_driver *driver = 0; /* get input parameters and alloc buffer */ if (copy_from_user(&ctrl, (void *) arg, sizeof (ctrl))) @@ -1095,32 +1097,55 @@ } } - /* ioctl to device */ - if (ctrl.ifno < 0) { - switch (ctrl.ioctl_code) { - /* access/release token for issuing control messages - * ask a particular driver to bind/unbind, ... etc - */ - } - retval = -ENOSYS; - - /* ioctl to the driver which has claimed a given interface */ - } else { - struct usb_interface *ifp = 0; - if (!ps->dev) - retval = -ENODEV; - else if (ctrl.ifno >= ps->dev->actconfig->bNumInterfaces) + if (!ps->dev) + retval = -ENODEV; + else if (!(ifp = usb_ifnum_to_if (ps->dev, ctrl.ifno))) + retval = -EINVAL; + else switch (ctrl.ioctl_code) { + + /* disconnect kernel driver from interface, leaving it unbound */ + case USBDEVFS_DISCONNECT: + driver = ifp->driver; + if (driver) { + down (&driver->serialize); + dbg ("disconnect '%s' from dev %d interface %d", + driver->name, ps->dev->devnum, ctrl.ifno); + driver->disconnect (ps->dev, ifp->private_data); + usb_driver_release_interface (driver, ifp); + up (&driver->serialize); + } else retval = -EINVAL; - else { - if (!(ifp = usb_ifnum_to_if (ps->dev, ctrl.ifno))) - retval = -EINVAL; - else if (ifp->driver == 0 || ifp->driver->ioctl == 0) - retval = -ENOSYS; - } - if (retval == 0) + break; + + /* let kernel drivers try to (re)bind to the interface */ + case USBDEVFS_CONNECT: + usb_find_interface_driver_for_ifnum (ps->dev, ctrl.ifno); + break; + + /* talk directly to the interface's driver */ + default: + lock_kernel(); /* against module unload */ + driver = ifp->driver; + if (driver == 0 || driver->ioctl == 0) { + unlock_kernel(); + retval = -ENOSYS; + } else { + if (ifp->driver->owner) { + __MOD_INC_USE_COUNT(ifp->driver->owner); + unlock_kernel(); + } /* ifno might usefully be passed ... */ - retval = ifp->driver->ioctl (ps->dev, ctrl.ioctl_code, buf); + retval = driver->ioctl (ps->dev, ctrl.ioctl_code, buf); /* size = min_t(int, size, retval)? */ + if (ifp->driver->owner) { + __MOD_DEC_USE_COUNT(ifp->driver->owner); + } else { + unlock_kernel(); + } + } + + if (retval == -ENOIOCTLCMD) + retval = -ENOTTY; } /* cleanup and return */ diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/usb/hid-core.c linux.21rc1-ac1/drivers/usb/hid-core.c --- linux.21rc1/drivers/usb/hid-core.c 2003-04-22 16:39:41.000000000 +0100 +++ linux.21rc1-ac1/drivers/usb/hid-core.c 2003-04-22 16:44:37.000000000 +0100 @@ -1099,6 +1099,9 @@ #define USB_VENDOR_ID_TANGTOP 0x0d3d #define USB_DEVICE_ID_TANGTOP_USBPS2 0x0001 +#define USB_VENDOR_ID_ESSENTIAL_REALITY 0x0d7f +#define USB_DEVICE_ID_ESSENTIAL_REALITY_P5 0x0100 + #define USB_VENDOR_ID_OKI 0x070a #define USB_VENDOR_ID_OKI_MULITI 0x0007 diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/usb/host/usb-ohci.c linux.21rc1-ac1/drivers/usb/host/usb-ohci.c --- linux.21rc1/drivers/usb/host/usb-ohci.c 2003-04-22 16:39:41.000000000 +0100 +++ linux.21rc1-ac1/drivers/usb/host/usb-ohci.c 2003-04-22 18:51:18.000000000 +0100 @@ -490,12 +490,17 @@ usb_pipeout (urb->pipe) ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE); - urb->complete (urb); + if (urb->interval) { + urb->complete (urb); - /* implicitly requeued */ - urb->actual_length = 0; - urb->status = -EINPROGRESS; - td_submit_urb (urb); + /* implicitly requeued */ + urb->actual_length = 0; + urb->status = -EINPROGRESS; + td_submit_urb (urb); + } else { + urb_rm_priv(urb); + urb->complete (urb); + } break; case PIPE_ISOCHRONOUS: diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/usb/pegasus.c linux.21rc1-ac1/drivers/usb/pegasus.c --- linux.21rc1/drivers/usb/pegasus.c 2003-04-22 16:39:41.000000000 +0100 +++ linux.21rc1-ac1/drivers/usb/pegasus.c 2003-04-22 17:04:40.000000000 +0100 @@ -230,7 +230,7 @@ pegasus->dr.bRequestType = PEGASUS_REQT_WRITE; pegasus->dr.bRequest = PEGASUS_REQ_SET_REG; - pegasus->dr.wValue = cpu_to_le16p(&data); + pegasus->dr.wValue = cpu_to_le16(data); pegasus->dr.wIndex = cpu_to_le16p(&indx); pegasus->dr.wLength = cpu_to_le16(1); pegasus->ctrl_urb->transfer_buffer_length = 1; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/usb/storage/unusual_devs.h linux.21rc1-ac1/drivers/usb/storage/unusual_devs.h --- linux.21rc1/drivers/usb/storage/unusual_devs.h 2003-04-22 16:39:41.000000000 +0100 +++ linux.21rc1-ac1/drivers/usb/storage/unusual_devs.h 2003-04-22 17:37:24.000000000 +0100 @@ -229,6 +229,13 @@ US_SC_SCSI, US_PR_CB, NULL, US_FL_SINGLE_LUN | US_FL_START_STOP | US_FL_MODE_XLATE ), +/* This entry is needed because the device reports Sub=ff */ +UNUSUAL_DEV( 0x054c, 0x0010, 0x0106, 0x0432, + "Sony", + "DSC-F707/U10/U20", + US_SC_SCSI, US_PR_CB, NULL, + US_FL_SINGLE_LUN | US_FL_START_STOP | US_FL_MODE_XLATE ), + /* Reported by wim@geeks.nl */ UNUSUAL_DEV( 0x054c, 0x0025, 0x0100, 0x0100, "Sony", @@ -267,6 +274,12 @@ "PEG Mass Storage", US_SC_8070, US_PR_CBI, NULL, US_FL_FIX_INQUIRY ), + +UNUSUAL_DEV( 0x054c, 0x0058, 0x0000, 0x9999, + "Sony", + "PEG-N760C Mass Storage", + US_SC_8070, US_PR_CBI, NULL, + US_FL_FIX_INQUIRY ), UNUSUAL_DEV( 0x057b, 0x0000, 0x0000, 0x0299, "Y-E Data", @@ -364,6 +377,12 @@ US_SC_SCSI, US_PR_BULK, NULL, US_FL_FIX_INQUIRY ), +UNUSUAL_DEV( 0x0636, 0x0003, 0x0000, 0x9999, + "Vivitar", + "Vivicam 35Xx", + US_SC_SCSI, US_PR_BULK, NULL, + US_FL_START_STOP | US_FL_FIX_INQUIRY | US_FL_MODE_XLATE), + UNUSUAL_DEV( 0x0644, 0x0000, 0x0100, 0x0100, "TEAC", "Floppy Drive", @@ -435,6 +454,12 @@ US_FL_SINGLE_LUN | US_FL_START_STOP ), #endif +UNUSUAL_DEV( 0x0784, 0x1688, 0x0000, 0x9999, + "Vivitar", + "Vivicam 36xx", + US_SC_SCSI, US_PR_BULK, NULL, + US_FL_START_STOP | US_FL_FIX_INQUIRY | US_FL_MODE_XLATE), + #ifdef CONFIG_USB_STORAGE_FREECOM UNUSUAL_DEV( 0x07ab, 0xfc01, 0x0000, 0x9999, "Freecom", @@ -518,6 +543,19 @@ US_FL_MODE_XLATE ), #endif +/* Datafab KECF-USB Ver A /Jenoptik Jenreader + * Note: there seem to be two versions of the KECF-USB device. + * The other version (see below) needs only US_FL_INQUIRY, + * whereas this version will not mount without also having + * US_FL_START_STOP. + * Submitted by Chris Clayton (chris@theclaytons.freeserve.co.uk) + */ +UNUSUAL_DEV( 0x07c4, 0xb000, 0x0000, 0xffff, + "Datafab", + "KECF-USB Ver A", + US_SC_SCSI, US_PR_BULK, NULL, + US_FL_FIX_INQUIRY | US_FL_START_STOP ), + /* Datafab KECF-USB / Sagatek DCS-CF / Simpletech Flashlink UCF-100 * Only revision 1.13 tested (same for all of the above devices, * based on the Datafab DF-UG-07 chip). Needed for US_FL_FIX_INQUIRY. @@ -594,3 +632,31 @@ US_SC_SCSI, US_PR_SDDR55, NULL, US_FL_SINGLE_LUN), #endif + +/* + * Panasonic/OEMs compact USB CDROMs status + * KXL-840(CD-ROM11): usb_stor_Bulk_max_lun() is danger, need US_FL_SINGLE_LUN + * KXL-RW11(CDRRW02): usb_stor_Bulk_max_lun() is danger, need US_FL_SINGLE_LUN + * KXL-RW20(CDRRW03): original IClass is 0xFF, use US_PR_CB and need init reset + * KXL-RW21(CDRRW06): original IClass is 0xFF, use US_PR_CB and need init reset + * KXL-RW31(CDRRW05): work fine with current code + * KXL-RW32(CDRRW09): work fine with current code + * Checked: Sun Feb 9 JST 2003 Go Taniguchi + */ +UNUSUAL_DEV( 0x04da, 0x0d01, 0x0000, 0xffff, + "MATSHITA", + "CD-ROM11", + US_SC_8020, US_PR_BULK, NULL, US_FL_SINGLE_LUN), +UNUSUAL_DEV( 0x04da, 0x0d02, 0x0000, 0xffff, + "MATSHITA", + "CDRRW02", + US_SC_8020, US_PR_BULK, NULL, US_FL_SINGLE_LUN), +UNUSUAL_DEV( 0x04da, 0x0d03, 0x0000, 0xffff, + "MATSHITA", + "CDRRW03", + US_SC_8020, US_PR_CB, NULL, US_FL_INIT_RESET), +UNUSUAL_DEV( 0x04da, 0x0d06, 0x0000, 0xffff, + "MATSHITA", + "CDRRW06", + US_SC_8020, US_PR_CB, NULL, US_FL_INIT_RESET), + diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/usb/storage/usb.c linux.21rc1-ac1/drivers/usb/storage/usb.c --- linux.21rc1/drivers/usb/storage/usb.c 2003-04-22 16:39:41.000000000 +0100 +++ linux.21rc1-ac1/drivers/usb/storage/usb.c 2003-04-22 16:44:37.000000000 +0100 @@ -848,7 +848,8 @@ ss->transport_name = "Bulk"; ss->transport = usb_stor_Bulk_transport; ss->transport_reset = usb_stor_Bulk_reset; - ss->max_lun = usb_stor_Bulk_max_lun(ss); + if (!(ss->flags & US_FL_SINGLE_LUN)) + ss->max_lun = usb_stor_Bulk_max_lun(ss); break; #ifdef CONFIG_USB_STORAGE_HP8200e @@ -1027,6 +1028,11 @@ /* now register - our detect function will be called */ ss->htmplt.module = THIS_MODULE; + + /* some device need reset process */ + if (ss->flags & US_FL_INIT_RESET) + ss->transport_reset(ss); + scsi_register_module(MODULE_SCSI_HA, &(ss->htmplt)); /* lock access to the data structures */ diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/usb/storage/usb.h linux.21rc1-ac1/drivers/usb/storage/usb.h --- linux.21rc1/drivers/usb/storage/usb.h 2003-04-22 16:39:41.000000000 +0100 +++ linux.21rc1-ac1/drivers/usb/storage/usb.h 2003-04-22 19:20:12.000000000 +0100 @@ -103,6 +103,7 @@ #define US_FL_IGNORE_SER 0x00000010 /* Ignore the serial number given */ #define US_FL_SCM_MULT_TARG 0x00000020 /* supports multiple targets */ #define US_FL_FIX_INQUIRY 0x00000040 /* INQUIRY response needs fixing */ +#define US_FL_INIT_RESET 0x00000080 /* reset process when initialize */ #define USB_STOR_STRING_LEN 32 diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/usb/usb.c linux.21rc1-ac1/drivers/usb/usb.c --- linux.21rc1/drivers/usb/usb.c 2003-04-22 16:39:41.000000000 +0100 +++ linux.21rc1-ac1/drivers/usb/usb.c 2003-04-22 17:05:08.000000000 +0100 @@ -164,6 +164,26 @@ } } +/* + * usb_ifnum_to_ifpos - convert the interface _number_ (as in interface.bInterfaceNumber) + * to the interface _position_ (as in dev->actconfig->interface + position) + * @dev: the device to use + * @ifnum: the interface number (bInterfaceNumber); not interface position + * + * Note that the number is the same as the position for all interfaces _except_ + * devices with interfaces not sequentially numbered (e.g., 0, 2, 3, etc). + */ +int usb_ifnum_to_ifpos(struct usb_device *dev, unsigned ifnum) +{ + int i; + + for (i = 0; i < dev->actconfig->bNumInterfaces; i++) + if (dev->actconfig->interface[i].altsetting[0].bInterfaceNumber == ifnum) + return i; + + return -EINVAL; +} + /** * usb_deregister - unregister a USB driver * @driver: USB operations of the driver to unregister @@ -546,7 +566,6 @@ iface->private_data = NULL; } - /** * usb_match_id - find first usb_device_id matching device or interface * @dev: the device whose descriptors are considered when matching @@ -759,6 +778,23 @@ return -1; } +/* + * usb_find_interface_driver_for_ifnum - convert ifnum to ifpos via + * usb_ifnum_to_ifpos and call usb_find_interface_driver(). + * @dev: the device to use + * @ifnum: the interface number (bInterfaceNumber); not interface position! + * + * Note usb_find_interface_driver's ifnum parameter is actually interface position. + */ +int usb_find_interface_driver_for_ifnum(struct usb_device *dev, unsigned int ifnum) +{ + int ifpos = usb_ifnum_to_ifpos(dev, ifnum); + + if (0 > ifpos) + return -EINVAL; + + return usb_find_interface_driver(dev, ifpos); +} #ifdef CONFIG_HOTPLUG @@ -2384,6 +2420,7 @@ * into the kernel, and other device drivers are built as modules, * then these symbols need to be exported for the modules to use. */ +EXPORT_SYMBOL(usb_ifnum_to_ifpos); EXPORT_SYMBOL(usb_ifnum_to_if); EXPORT_SYMBOL(usb_epnum_to_ep_desc); @@ -2398,6 +2435,7 @@ EXPORT_SYMBOL(usb_free_dev); EXPORT_SYMBOL(usb_inc_dev_use); +EXPORT_SYMBOL(usb_find_interface_driver_for_ifnum); EXPORT_SYMBOL(usb_driver_claim_interface); EXPORT_SYMBOL(usb_interface_claimed); EXPORT_SYMBOL(usb_driver_release_interface); diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/video/aty/atyfb_base.c linux.21rc1-ac1/drivers/video/aty/atyfb_base.c --- linux.21rc1/drivers/video/aty/atyfb_base.c 2003-04-22 16:38:52.000000000 +0100 +++ linux.21rc1-ac1/drivers/video/aty/atyfb_base.c 2003-04-22 16:44:37.000000000 +0100 @@ -360,6 +360,7 @@ /* 3D RAGE Mobility */ { 0x4c4d, 0x4c4d, 0x00, 0x00, m64n_mob_p, 230, 50, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_MOBIL_BUS }, + { 0x4c52, 0x4c52, 0x00, 0x00, m64n_mob_p, 230, 40, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_MOBIL_BUS | M64F_MAGIC_POSTDIV | M64F_SDRAM_MAGIC_PLL | M64F_XL_DLL }, { 0x4c4e, 0x4c4e, 0x00, 0x00, m64n_mob_a, 230, 50, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_MOBIL_BUS }, #endif /* CONFIG_FB_ATY_CT */ }; @@ -438,7 +439,7 @@ #endif /* defined(CONFIG_PPC) */ -#if defined(CONFIG_PMAC_PBOOK) || defined(CONFIG_PMAC_BACKLIGHT) +#if defined(CONFIG_PMAC_PBOOK) || defined(CONFIG_PMAC_BACKLIGHT) || defined(CONFIG_FB_ATY_CT_VAIO_LCD) static void aty_st_lcd(int index, u32 val, const struct fb_info_aty *info) { unsigned long temp; @@ -460,7 +461,7 @@ /* read the register value */ return aty_ld_le32(LCD_DATA, info); } -#endif /* CONFIG_PMAC_PBOOK || CONFIG_PMAC_BACKLIGHT */ +#endif /* CONFIG_PMAC_PBOOK || CONFIG_PMAC_BACKLIGHT || CONFIG_FB_ATY_CT_VAIO_LCD */ /* ------------------------------------------------------------------------- */ @@ -1772,6 +1773,9 @@ #if defined(CONFIG_PPC) int sense; #endif +#if defined(CONFIG_FB_ATY_CT_VAIO_LCD) + u32 pm, hs; +#endif u8 pll_ref_div; info->aty_cmap_regs = (struct aty_cmap_regs *)(info->ati_regbase+0xc0); @@ -2089,6 +2093,35 @@ var = default_var; #endif /* !__sparc__ */ #endif /* !CONFIG_PPC */ +#if defined(CONFIG_FB_ATY_CT_VAIO_LCD) + /* Power Management */ + pm=aty_ld_lcd(POWER_MANAGEMENT, info); + pm=(pm & ~PWR_MGT_MODE_MASK) | PWR_MGT_MODE_PCI; + pm|=PWR_MGT_ON; + aty_st_lcd(POWER_MANAGEMENT, pm, info); + udelay(10); + + /* OVR_WID_LEFT_RIGHT */ + hs=aty_ld_le32(OVR_WID_LEFT_RIGHT,info); + hs= 0x00000000; + aty_st_le32(OVR_WID_LEFT_RIGHT, hs, info); + udelay(10); + + /* CONFIG_PANEL */ + hs=aty_ld_lcd(CONFIG_PANEL,info); + hs|=DONT_SHADOW_HEND ; + aty_st_lcd(CONFIG_PANEL, hs, info); + udelay(10); + +#if defined(DEBUG) + printk("LCD_INDEX CONFIG_PANEL LCD_GEN_CTRL POWER_MANAGEMENT\n" + "%08x %08x %08x %08x\n", + aty_ld_le32(LCD_INDEX, info), + aty_ld_lcd(CONFIG_PANEL, info), + aty_ld_lcd(LCD_GEN_CTRL, info), + aty_ld_lcd(POWER_MANAGEMENT, info), +#endif /* DEBUG */ +#endif /* CONFIG_FB_ATY_CT_VAIO_LCD */ #endif /* !MODULE */ if (noaccel) var.accel_flags &= ~FB_ACCELF_TEXT; @@ -2714,6 +2747,23 @@ /* * Blank the display. */ +#if defined(CONFIG_FB_ATY_CT_VAIO_LCD) +static int set_backlight_enable(int on, struct fb_info_aty *info) +{ + unsigned int reg = aty_ld_lcd(POWER_MANAGEMENT, info); + if(on) { + reg=(reg & ~SUSPEND_NOW) | PWR_BLON; + } else { + reg=(reg & ~PWR_BLON) | SUSPEND_NOW; + } + aty_st_lcd(POWER_MANAGEMENT, reg, info); + udelay(10); +#ifdef DEBUG + printk(KERN_INFO "set_backlight_enable(%i): %08x\n", on, aty_ld_lcd(POWER_MANAGEMENT, info) ); +#endif + return 0; +} +#endif /* CONFIG_FB_ATY_CT_VAIO_LCD */ static void atyfbcon_blank(int blank, struct fb_info *fb) { @@ -2725,6 +2775,9 @@ set_backlight_enable(0); #endif /* CONFIG_PMAC_BACKLIGHT */ +#if defined(CONFIG_FB_ATY_CT_VAIO_LCD) + set_backlight_enable(!blank, info); +#endif /* CONFIG_FB_ATY_CT_VAIO_LCD */ gen_cntl = aty_ld_8(CRTC_GEN_CNTL, info); if (blank > 0) switch (blank-1) { diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/video/aty/mach64_ct.c linux.21rc1-ac1/drivers/video/aty/mach64_ct.c --- linux.21rc1/drivers/video/aty/mach64_ct.c 2003-04-22 16:38:52.000000000 +0100 +++ linux.21rc1-ac1/drivers/video/aty/mach64_ct.c 2003-04-22 16:44:37.000000000 +0100 @@ -178,11 +178,14 @@ } pll->pll_gen_cntl |= mpostdiv<<4; /* mclk */ - if (M64_HAS(MAGIC_POSTDIV)) - pll->pll_ext_cntl = 0; - else +#if defined(CONFIG_FB_ATY_CT_VAIO_LCD) pll->pll_ext_cntl = mpostdiv; /* xclk == mclk */ - +#else + if ( M64_HAS(MAGIC_POSTDIV) ) + pll->pll_ext_cntl = 0; + else + pll->pll_ext_cntl = mpostdiv; /* xclk == mclk */ +#endif switch (pll->vclk_post_div_real) { case 2: vpostdiv = 1; diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/video/aty/mach64.h linux.21rc1-ac1/drivers/video/aty/mach64.h --- linux.21rc1/drivers/video/aty/mach64.h 2003-04-22 16:38:52.000000000 +0100 +++ linux.21rc1-ac1/drivers/video/aty/mach64.h 2003-04-22 16:44:37.000000000 +0100 @@ -1148,6 +1148,8 @@ #define APC_LUT_MN 0x39 #define APC_LUT_OP 0x3A +/* Values in CONFIG_PANEL */ +#define DONT_SHADOW_HEND 0x00004000 /* Values in LCD_MISC_CNTL */ #define BIAS_MOD_LEVEL_MASK 0x0000ff00 diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/video/Config.in linux.21rc1-ac1/drivers/video/Config.in --- linux.21rc1/drivers/video/Config.in 2003-04-22 16:39:41.000000000 +0100 +++ linux.21rc1-ac1/drivers/video/Config.in 2003-04-22 16:44:37.000000000 +0100 @@ -144,13 +144,20 @@ if [ "$CONFIG_FB_ATY" != "n" ]; then bool ' Mach64 GX support (EXPERIMENTAL)' CONFIG_FB_ATY_GX bool ' Mach64 CT/VT/GT/LT (incl. 3D RAGE) support' CONFIG_FB_ATY_CT + if [ "$CONFIG_FB_ATY_CT" = "y" ]; then + bool ' Sony Vaio C1VE 1024x480 LCD support' CONFIG_FB_ATY_CT_VAIO_LCD + fi fi + tristate ' Intel 830M/845G/852GM/855GM/865G display support (EXPERIMENTAL)' CONFIG_FB_INTEL tristate ' ATI Radeon display support (EXPERIMENTAL)' CONFIG_FB_RADEON +# if [ "$CONFIG_FB_RADEON" = "y" ]; then +# bool ' Sony Vaio C1MV 1280x600 LCD support' CONFIG_FB_RADEON_VAIO_LCD +# fi tristate ' ATI Rage128 display support (EXPERIMENTAL)' CONFIG_FB_ATY128 tristate ' SIS acceleration (EXPERIMENTAL)' CONFIG_FB_SIS if [ "$CONFIG_FB_SIS" != "n" ]; then - bool ' SIS 630/540/730 support' CONFIG_FB_SIS_300 - bool ' SIS 315H/315 support' CONFIG_FB_SIS_315 + bool ' SIS 300/305/540/630/730 support' CONFIG_FB_SIS_300 + bool ' SIS 315/650/M650/651/740/Xabre support' CONFIG_FB_SIS_315 fi tristate ' NeoMagic display support (EXPERIMENTAL)' CONFIG_FB_NEOMAGIC tristate ' 3Dfx Banshee/Voodoo3 display support (EXPERIMENTAL)' CONFIG_FB_3DFX @@ -293,6 +300,7 @@ "$CONFIG_FB_PM3" = "y" -o "$CONFIG_FB_TRIDENT" = "y" -o \ "$CONFIG_FB_P9100" = "y" -o "$CONFIG_FB_ATY128" = "y" -o \ "$CONFIG_FB_RIVA" = "y" -o "$CONFIG_FB_RADEON" = "y" -o \ + "$CONFIG_FB_INTEL" = "y" -o \ "$CONFIG_FB_SGIVW" = "y" -o "$CONFIG_FB_CYBER2000" = "y" -o \ "$CONFIG_FB_SA1100" = "y" -o "$CONFIG_FB_3DFX" = "y" -o \ "$CONFIG_FB_PMAG_BA" = "y" -o "$CONFIG_FB_PMAGB_B" = "y" -o \ @@ -312,12 +320,13 @@ "$CONFIG_FB_VALKYRIE" = "m" -o "$CONFIG_FB_PLATINUM" = "m" -o \ "$CONFIG_FB_IGA" = "m" -o "$CONFIG_FB_MATROX" = "m" -o \ "$CONFIG_FB_CT65550" = "m" -o "$CONFIG_FB_PM2" = "m" -o \ - "$CONFIG_FB_PM3" = "m" -o "$CONFIG_FB_TRIDENT" = "y" -o \ + "$CONFIG_FB_PM3" = "m" -o "$CONFIG_FB_TRIDENT" = "m" -o \ "$CONFIG_FB_P9100" = "m" -o "$CONFIG_FB_ATY128" = "m" -o \ "$CONFIG_FB_RIVA" = "m" -o "$CONFIG_FB_3DFX" = "m" -o \ "$CONFIG_FB_SGIVW" = "m" -o "$CONFIG_FB_CYBER2000" = "m" -o \ "$CONFIG_FB_PMAG_BA" = "m" -o "$CONFIG_FB_PMAGB_B" = "m" -o \ "$CONFIG_FB_MAXINE" = "m" -o "$CONFIG_FB_RADEON" = "m" -o \ + "$CONFIG_FB_INTEL" = "m" -o \ "$CONFIG_FB_SA1100" = "m" -o "$CONFIG_FB_SIS" = "m" -o \ "$CONFIG_FB_TX3912" = "m" -o "$CONFIG_FB_NEOMAGIC" = "m" -o \ "$CONFIG_FB_STI" = "m" ]; then @@ -328,6 +337,7 @@ "$CONFIG_FB_MAC" = "y" -o "$CONFIG_FB_VESA" = "y" -o \ "$CONFIG_FB_VIRTUAL" = "y" -o "$CONFIG_FB_TBOX" = "y" -o \ "$CONFIG_FB_Q40" = "y" -o "$CONFIG_FB_RADEON" = "y" -o \ + "$CONFIG_FB_INTEL" = "y" -o \ "$CONFIG_FB_CONTROL" = "y" -o "$CONFIG_FB_CLGEN" = "y" -o \ "$CONFIG_FB_VIRGE" = "y" -o "$CONFIG_FB_CYBER" = "y" -o \ "$CONFIG_FB_VALKYRIE" = "y" -o "$CONFIG_FB_PLATINUM" = "y" -o \ @@ -350,10 +360,11 @@ "$CONFIG_FB_VALKYRIE" = "m" -o "$CONFIG_FB_PLATINUM" = "m" -o \ "$CONFIG_FB_CT65550" = "m" -o "$CONFIG_FB_MATROX" = "m" -o \ "$CONFIG_FB_PM2" = "m" -o "$CONFIG_FB_SGIVW" = "m" -o \ - "$CONFIG_FB_PM3" = "m" -o "$CONFIG_FB_TRIDENT" = "y" -o \ + "$CONFIG_FB_PM3" = "m" -o "$CONFIG_FB_TRIDENT" = "m" -o \ "$CONFIG_FB_RIVA" = "m" -o "$CONFIG_FB_ATY128" = "m" -o \ "$CONFIG_FB_CYBER2000" = "m" -o "$CONFIG_FB_SIS" = "m" -o \ "$CONFIG_FB_SA1100" = "m" -o "$CONFIG_FB_RADEON" = "m" -o \ + "$CONFIG_FB_INTEL" = "m" -o \ "$CONFIG_FB_PVR2" = "m" -o "$CONFIG_FB_VOODOO1" = "m" -o \ "$CONFIG_FB_NEOMAGIC" = "m" ]; then define_tristate CONFIG_FBCON_CFB16 m @@ -385,6 +396,7 @@ "$CONFIG_FB_RIVA" = "y" -o "$CONFIG_FB_ATY128" = "y" -o \ "$CONFIG_FB_FM2" = "y" -o "$CONFIG_FB_SGIVW" = "y" -o \ "$CONFIG_FB_RADEON" = "y" -o "$CONFIG_FB_PVR2" = "y" -o \ + "$CONFIG_FB_INTEL" = "y" -o \ "$CONFIG_FB_3DFX" = "y" -o "$CONFIG_FB_SIS" = "y" -o \ "$CONFIG_FB_VOODOO1" = "y" -o "$CONFIG_FB_CYBER2000" = "y" -o \ "$CONFIG_FB_STI" = "y" ]; then @@ -395,12 +407,13 @@ "$CONFIG_FB_CONTROL" = "m" -o "$CONFIG_FB_CLGEN" = "m" -o \ "$CONFIG_FB_TGA" = "m" -o "$CONFIG_FB_PLATINUM" = "m" -o \ "$CONFIG_FB_MATROX" = "m" -o "$CONFIG_FB_PM2" = "m" -o \ - "$CONFIG_FB_PM3" = "m" -o "$CONFIG_FB_TRIDENT" = "y" -o \ + "$CONFIG_FB_PM3" = "m" -o "$CONFIG_FB_TRIDENT" = "m" -o \ "$CONFIG_FB_RIVA" = "m" -o "$CONFIG_FB_ATY128" = "m" -o \ "$CONFIG_FB_3DFX" = "m" -o "$CONFIG_FB_RADEON" = "m" -o \ + "$CONFIG_FB_INTEL" = "m" -o \ "$CONFIG_FB_SGIVW" = "m" -o "$CONFIG_FB_SIS" = "m" -o \ "$CONFIG_FB_PVR2" = "m" -o "$CONFIG_FB_VOODOO1" = "m" -o \ - "$CONFIG_FB_CYBER2000" = "m" -o "$CONFIG_FB_STI" = "y" ]; then + "$CONFIG_FB_CYBER2000" = "m" -o "$CONFIG_FB_STI" = "m" ]; then define_tristate CONFIG_FBCON_CFB32 m fi fi @@ -447,9 +460,9 @@ define_tristate CONFIG_FBCON_HGA m fi fi - if [ "$CONFIG_FB_STI" = "y" ]; then - define_tristate CONFIG_FBCON_STI y - fi + fi + if [ "$CONFIG_FB_STI" = "y" ]; then + define_tristate CONFIG_FBCON_STI y fi bool ' Support only 8 pixels wide fonts' CONFIG_FBCON_FONTWIDTH8_ONLY if [ "$CONFIG_SPARC32" = "y" -o "$CONFIG_SPARC64" = "y" ]; then diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/video/modedb.c linux.21rc1-ac1/drivers/video/modedb.c --- linux.21rc1/drivers/video/modedb.c 2003-04-22 16:39:41.000000000 +0100 +++ linux.21rc1-ac1/drivers/video/modedb.c 2003-04-22 17:04:40.000000000 +0100 @@ -43,6 +43,20 @@ #define DEFAULT_MODEDB_INDEX 0 static struct fb_videomode modedb[] __initdata = { +#if defined(CONFIG_FB_ATY_CT_VAIO_LCD) + { + /* 1024x480 @ 65 Hz */ + NULL, 65, 1024, 480, 25203, 24, 24, 1, 17, 144, 4, + 0, FB_VMODE_NONINTERLACED + }, +#endif /* CONFIG_FB_ATY_CT_VAIO_LCD */ +#if defined(CONFIG_FB_RADEON_VAIO_LCD) + { + /* 1280x600 @ 72 Hz, 45.288 kHz hsync */ + NULL, 72, 1280, 600, 13940, 24, 24, 23, 1, 256, 5, + FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED + }, +#endif /* CONFIG_FB_RADEON_VAIO_LCD */ { /* 640x400 @ 70 Hz, 31.5 kHz hsync */ NULL, 70, 640, 400, 39721, 40, 24, 39, 9, 96, 2, diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/video/sis/300vtbl.h linux.21rc1-ac1/drivers/video/sis/300vtbl.h --- linux.21rc1/drivers/video/sis/300vtbl.h 2003-04-22 16:38:52.000000000 +0100 +++ linux.21rc1-ac1/drivers/video/sis/300vtbl.h 2003-04-22 16:44:37.000000000 +0100 @@ -15,7 +15,7 @@ UCHAR VB_StTVYFilterIndex; } SiS300_StStruct; -static const SiS300_StStruct SiS300_SModeIDTable[]= +static const SiS300_StStruct SiS300_SModeIDTable[] = { {0x01,0x9208,0x01,0x00,0x00,0x00,0x00,0x00}, {0x01,0x1210,0x14,0x01,0x01,0x00,0x00,0x00}, @@ -34,10 +34,9 @@ {0x11,0x0212,0x1a,0x04,0x04,0x00,0x00,0x00}, {0x12,0x0212,0x1b,0x04,0x04,0x00,0x00,0x00}, {0x13,0x021b,0x1c,0x00,0x00,0x00,0x00,0x00}, - /* {0x12,0x0210,0x18,0x00,0x00,0x00,0x00,0x00}, */ /* <--- Different in BIOS */ {0x12,0x0010,0x18,0x02,0x02,0x00,0x00,0x00}, {0x12,0x0210,0x18,0x01,0x01,0x00,0x00,0x00}, - {0xff,0,0,0,0,0,0,0} + {0xff, 0, 0, 0, 0, 0, 0, 0} }; typedef struct _SiS300_StandTableStruct @@ -53,9 +52,9 @@ UCHAR GRC[9]; } SiS300_StandTableStruct; -static const SiS300_StandTableStruct SiS300_StandTable[]= -{ /* TW: @ 0x38d4 in BIOS */ - {0x28,0x18,0x08,0x0800, +static const SiS300_StandTableStruct SiS300_StandTable[] = +{ + {0x28,0x18,0x08,0x0800, /* 0x00 */ {0x09,0x03,0x00,0x02}, 0x63, {0x2d,0x27,0x28,0x90,0x2b,0xa0,0xbf,0x1f, @@ -67,7 +66,7 @@ 0x08,0x00,0x0f,0x00}, {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00, 0xff} }, - {0x28,0x18,0x08,0x0800, + {0x28,0x18,0x08,0x0800, /* 0x01 */ {0x09,0x03,0x00,0x02}, 0x63, {0x2d,0x27,0x28,0x90,0x2b,0xa0,0xbf,0x1f, @@ -79,7 +78,7 @@ 0x08,0x00,0x0f,0x00}, {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00, 0xff} }, - {0x50,0x18,0x08,0x1000, + {0x50,0x18,0x08,0x1000, /* 0x02 */ {0x01,0x03,0x00,0x02}, 0x63, {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f, @@ -91,7 +90,7 @@ 0x08,0x00,0x0f,0x00}, {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00, 0xff} }, - {0x50,0x18,0x08,0x1000, + {0x50,0x18,0x08,0x1000, /* 0x03 */ {0x01,0x03,0x00,0x02}, 0x63, {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f, @@ -103,7 +102,7 @@ 0x08,0x00,0x0f,0x00}, {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00, 0xff} }, - {0x28,0x18,0x08,0x4000, + {0x28,0x18,0x08,0x4000, /* 0x04 */ {0x09,0x03,0x00,0x02}, 0x63, {0x2d,0x27,0x28,0x90,0x2b,0x80,0xbf,0x1f, @@ -115,7 +114,7 @@ 0x01,0x00,0x03,0x00}, {0x00,0x00,0x00,0x00,0x00,0x30,0x0f,0x00, 0xff} }, - {0x28,0x18,0x08,0x4000, + {0x28,0x18,0x08,0x4000, /* 0x05 */ {0x09,0x03,0x00,0x02}, 0x63, {0x2d,0x27,0x28,0x90,0x2b,0x80,0xbf,0x1f, @@ -127,7 +126,7 @@ 0x01,0x00,0x03,0x00}, {0x00,0x00,0x00,0x00,0x00,0x30,0x0f,0x00, 0xff} }, - {0x50,0x18,0x08,0x4000, + {0x50,0x18,0x08,0x4000, /* 0x06 */ {0x01,0x01,0x00,0x06}, 0x63, {0x5f,0x4f,0x50,0x82,0x54,0x80,0xbf,0x1f, @@ -139,7 +138,7 @@ 0x01,0x00,0x01,0x00}, {0x00,0x00,0x00,0x00,0x00,0x00,0x0d,0x00, 0xff} }, - {0x50,0x18,0x0e,0x1000, + {0x50,0x18,0x0e,0x1000, /* 0x07 */ {0x00,0x03,0x00,0x03}, 0xa6, {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f, @@ -152,7 +151,7 @@ {0x00,0x00,0x00,0x00,0x00,0x10,0x0a,0x00, 0xff} }, /* MDA_DAC*/ - {0x00,0x00,0x00,0x0000, + {0x00,0x00,0x00,0x0000, /* 0x08 */ {0x00,0x00,0x00,0x15}, 0x15, {0x15,0x15,0x15,0x15,0x15,0x15,0x15,0x15, @@ -165,7 +164,7 @@ {0x15,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f, 0x3f} }, /* CGA_DAC*/ - {0x00,0x10,0x04,0x0114, + {0x00,0x10,0x04,0x0114, /* 0x09 */ {0x11,0x09,0x15,0x00}, 0x10, {0x04,0x14,0x01,0x11,0x09,0x15,0x2a,0x3a, @@ -178,7 +177,7 @@ {0x3f,0x2a,0x3a,0x2e,0x3e,0x2b,0x3b,0x2f, 0x3f} }, /* EGA_DAC*/ - {0x00,0x10,0x04,0x0114, + {0x00,0x10,0x04,0x0114, /* 0x0a */ {0x11,0x05,0x15,0x20}, 0x30, {0x24,0x34,0x21,0x31,0x25,0x35,0x08,0x18, @@ -191,7 +190,7 @@ {0x1f,0x2a,0x3a,0x2e,0x3e,0x2b,0x3b,0x2f, 0x3f} }, /* VGA_DAC*/ - {0x00,0x10,0x04,0x0114, + {0x00,0x10,0x04,0x0114, /* 0x0b */ {0x11,0x09,0x15,0x2a}, 0x3a, {0x2e,0x3e,0x2b,0x3b,0x2f,0x3f,0x00,0x05, @@ -203,7 +202,7 @@ 0x1c,0x0e,0x11,0x15}, {0x18,0x1c,0x14,0x16,0x18,0x1a,0x1c,0x00, 0x04} }, - {0x08,0x0c,0x10,0x0a08, + {0x08,0x0c,0x10,0x0a08, /* 0x0c */ {0x0c,0x0e,0x10,0x0b}, 0x0c, {0x0d,0x0f,0x10,0x10,0x01,0x08,0x00,0x00, @@ -215,7 +214,7 @@ 0x00,0x00,0x00,0x00}, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, 0x00} }, - {0x28,0x18,0x08,0x2000, + {0x28,0x18,0x08,0x2000, /* 0x0d */ {0x09,0x0f,0x00,0x06}, 0x63, {0x2d,0x27,0x28,0x90,0x2b,0x80,0xbf,0x1f, @@ -227,7 +226,7 @@ 0x01,0x00,0x0f,0x00}, {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f, 0xff} }, - {0x50,0x18,0x08,0x4000, + {0x50,0x18,0x08,0x4000, /* 0x0e */ {0x01,0x0f,0x00,0x06}, 0x63, {0x5f,0x4f,0x50,0x82,0x54,0x80,0xbf,0x1f, @@ -239,8 +238,8 @@ 0x01,0x00,0x0f,0x00}, {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f, 0xff} }, - {0x00,0x00,0x00,0x0000, /* TW: Standtable for VGA modes */ - {0x01,0x0f,0x00,0x0e}, /* (identical to BIOS) */ + {0x00,0x00,0x00,0x0000, /* 0x0f */ /* TW: Standtable for VGA modes */ + {0x01,0x0f,0x00,0x0e}, 0x23, {0x5f,0x4f,0x50,0x82,0x54,0x80,0x0b,0x3e, 0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00, @@ -251,7 +250,7 @@ 0x01,0x00,0x00,0x00}, {0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f, 0xff} }, - {0x4a,0x36,0x00,0x00c0, + {0x4a,0x36,0x00,0x00c0, /* 0x10 */ {0x00,0x00,0x00,0x00}, 0x00, {0x00,0x00,0x00,0x00,0x00,0x00,0x66,0x3a, @@ -263,7 +262,7 @@ 0x00,0x00,0x00,0x00}, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, 0x00} }, - {0x50,0x18,0x0e,0x8000, + {0x50,0x18,0x0e,0x8000, /* 0x11 */ {0x01,0x0f,0x00,0x06}, 0xa2, {0x5f,0x4f,0x50,0x82,0x54,0x80,0xbf,0x1f, @@ -275,7 +274,7 @@ 0x0b,0x00,0x05,0x00}, {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x05, 0xff} }, - {0x50,0x18,0x0e,0x8000, + {0x50,0x18,0x0e,0x8000, /* 0x12 */ {0x01,0x0f,0x00,0x06}, 0xa3, {0x5f,0x4f,0x50,0x82,0x54,0x80,0xbf,0x1f, @@ -287,7 +286,7 @@ 0x01,0x00,0x0f,0x00}, {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f, 0xff} }, - {0x28,0x18,0x0e,0x0800, + {0x28,0x18,0x0e,0x0800, /* 0x13 */ {0x09,0x03,0x00,0x02}, 0xa3, {0x2d,0x27,0x28,0x90,0x2b,0xa0,0xbf,0x1f, @@ -299,7 +298,7 @@ 0x08,0x00,0x0f,0x00}, {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00, 0xff} }, - {0x28,0x18,0x0e,0x0800, + {0x28,0x18,0x0e,0x0800, /* 0x14 */ {0x09,0x03,0x00,0x02}, 0xa3, {0x2d,0x27,0x28,0x90,0x2b,0xa0,0xbf,0x1f, @@ -311,7 +310,7 @@ 0x08,0x00,0x0f,0x00}, {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00, 0xff} }, - {0x50,0x18,0x0e,0x1000, + {0x50,0x18,0x0e,0x1000, /* 0x15 */ {0x01,0x03,0x00,0x02}, 0xa3, {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f, @@ -323,7 +322,7 @@ 0x08,0x00,0x0f,0x00}, {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00, 0xff} }, - {0x50,0x18,0x0e,0x1000, + {0x50,0x18,0x0e,0x1000, /* 0x16 */ {0x01,0x03,0x00,0x02}, 0xa3, {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f, @@ -335,7 +334,7 @@ 0x08,0x00,0x0f,0x00}, {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00, 0xff} }, - {0x28,0x18,0x10,0x0800, + {0x28,0x18,0x10,0x0800, /* 0x17 */ {0x08,0x03,0x00,0x02}, 0x67, {0x2d,0x27,0x28,0x90,0x2b,0xa0,0xbf,0x1f, @@ -347,7 +346,7 @@ 0x0c,0x00,0x0f,0x08}, {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00, 0xff} }, - {0x50,0x18,0x10,0x1000, + {0x50,0x18,0x10,0x1000, /* 0x18 */ {0x00,0x03,0x00,0x02}, 0x67, {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f, @@ -359,7 +358,7 @@ 0x0c,0x00,0x0f,0x08}, {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00, 0xff} }, - {0x50,0x18,0x10,0x1000, + {0x50,0x18,0x10,0x1000, /* 0x19 */ {0x00,0x03,0x00,0x02}, 0x66, {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f, @@ -371,7 +370,7 @@ 0x0e,0x00,0x0f,0x08}, {0x00,0x00,0x00,0x00,0x00,0x10,0x0a,0x00, 0xff} }, - {0x50,0x1d,0x10,0xa000, + {0x50,0x1d,0x10,0xa000, /* 0x1a */ {0x01,0x0f,0x00,0x06}, 0xe3, {0x5f,0x4f,0x50,0x82,0x54,0x80,0x0b,0x3e, @@ -383,7 +382,7 @@ 0x01,0x00,0x0f,0x00}, {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x01, 0xff} }, - {0x50,0x1d,0x10,0xa000, + {0x50,0x1d,0x10,0xa000, /* 0x1b */ {0x01,0x0f,0x00,0x06}, 0xe3, {0x5f,0x4f,0x50,0x82,0x54,0x80,0x0b,0x3e, @@ -395,7 +394,7 @@ 0x01,0x00,0x0f,0x00}, {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f, 0xff} }, - {0x28,0x18,0x08,0x2000, + {0x28,0x18,0x08,0x2000, /* 0x1c */ {0x01,0x0f,0x00,0x0e}, 0x63, {0x5f,0x4f,0x50,0x82,0x54,0x80,0xbf,0x1f, @@ -424,61 +423,88 @@ UCHAR REFindex; } SiS300_ExtStruct; -static const SiS300_ExtStruct SiS300_EModeIDTable[]= +static const SiS300_ExtStruct SiS300_EModeIDTable[] = { - {0x6a,0x2212,0x47,0x3563,0x0102,0x08,0x07,0x00,0x00,0x00,0x00}, /* 37ed */ /* 800x600x? */ - {0x2e,0x0a1b,0x36,0x3539,0x0101,0x08,0x06,0x00,0x00,0x00,0x08}, /* 37c3 */ - {0x2f,0x021b,0x35,0x3532,0x0100,0x08,0x05,0x00,0x00,0x00,0x10}, /* 37bc */ - {0x30,0x2a1b,0x47,0x3563,0x0103,0x08,0x07,0x00,0x00,0x00,0x00}, /* 37ed */ - {0x31,0x0a1b,0xad,0x3630,0x0000,0x08,0x0c,0x00,0x00,0x00,0x11}, /* 38ba */ /* 720x480x8 */ - {0x32,0x2a1b,0xae,0x3637,0x0000,0x08,0x0d,0x00,0x00,0x00,0x12}, /* 38c1 */ /* 720x576x8 */ - {0x33,0x0a1d,0xad,0x3630,0x0000,0x08,0x0c,0x00,0x00,0x00,0x11}, /* 38ba */ /* 720x480x16 */ - {0x34,0x2a1d,0xae,0x3637,0x0000,0x08,0x0d,0x00,0x00,0x00,0x12}, /* 38c1 */ /* 720x576x16 */ - {0x35,0x0a1f,0xad,0x3630,0x0000,0x08,0x0c,0x00,0x00,0x00,0x11}, /* 38ba */ /* 720x480x32 */ - {0x36,0x2a1f,0xae,0x3637,0x0000,0x08,0x0d,0x00,0x00,0x00,0x12}, /* 38c1 */ /* 720x576x32 */ - {0x37,0x0212,0x58,0x358d,0x0104,0x08,0x08,0x00,0x00,0x00,0x13}, /* 3817 */ /* 1024x768x? */ - {0x38,0x0a1b,0x58,0x358d,0x0105,0x08,0x08,0x00,0x00,0x00,0x13}, /* 3817 */ /* 1024x768x8 */ - {0x3a,0x0e3b,0x69,0x35be,0x0107,0x08,0x09,0x00,0x00,0x00,0x1a}, /* 3848 */ /* 1280x1024x8 */ - {0x3c,0x063b,0x7a,0x35d4,0x0130,0x08,0x0a,0x00,0x00,0x00,0x1e}, /* 385e */ - {0x3d,0x067d,0x7a,0x35d4,0x0131,0x08,0x0a,0x00,0x00,0x00,0x1e}, /* 385e */ - {0x40,0x921c,0x00,0x3516,0x010d,0x08,0x00,0x00,0x00,0x00,0x23}, /* 37a0 */ - {0x41,0x921d,0x00,0x3516,0x010e,0x08,0x00,0x00,0x00,0x00,0x23}, /* 37a0 */ - {0x43,0x0a1c,0x36,0x3539,0x0110,0x08,0x06,0x00,0x00,0x00,0x08}, /* 37c3 */ - {0x44,0x0a1d,0x36,0x3539,0x0111,0x08,0x06,0x00,0x00,0x00,0x08}, /* 37c3 */ - {0x46,0x2a1c,0x47,0x3563,0x0113,0x08,0x07,0x00,0x00,0x00,0x00}, /* 37ed */ /* 800x600 */ - {0x47,0x2a1d,0x47,0x3563,0x0114,0x08,0x07,0x00,0x00,0x00,0x00}, /* 37ed */ /* 800x600 */ - {0x49,0x0a3c,0x58,0x358d,0x0116,0x08,0x08,0x00,0x00,0x00,0x13}, /* 3817 */ - {0x4a,0x0a3d,0x58,0x358d,0x0117,0x08,0x08,0x00,0x00,0x00,0x13}, /* 3817 */ - {0x4c,0x0e7c,0x69,0x35be,0x0119,0x08,0x09,0x00,0x00,0x00,0x1a}, /* 3848 */ - {0x4d,0x0e7d,0x69,0x35be,0x011a,0x08,0x09,0x00,0x00,0x00,0x1a}, /* 3848 */ - {0x50,0x921b,0x01,0x351d,0x0132,0x08,0x01,0x00,0x00,0x00,0x24}, /* 37a7 */ - {0x51,0xb21b,0x13,0x3524,0x0133,0x08,0x03,0x00,0x00,0x00,0x25}, /* 37ae */ /* 400x300 */ - {0x52,0x921b,0x24,0x352b,0x0134,0x08,0x04,0x00,0x00,0x00,0x26}, /* 37b5 */ - {0x56,0x921d,0x01,0x351d,0x0135,0x08,0x01,0x00,0x00,0x00,0x24}, /* 37a7 */ - {0x57,0xb21d,0x13,0x3524,0x0136,0x08,0x03,0x00,0x00,0x00,0x25}, /* 37ae */ /* 400x300 */ - {0x58,0x921d,0x24,0x352b,0x0137,0x08,0x04,0x00,0x00,0x00,0x26}, /* 37b5 */ - {0x59,0x921b,0x00,0x3516,0x0138,0x08,0x00,0x00,0x00,0x00,0x23}, /* 37a0 */ + {0x6a,0x2212,0x47,0x3563,0x0102,0x08,0x07,0x00,0x00,0x00,0x00}, /* 800x600x? */ + {0x2e,0x0a1b,0x36,0x3539,0x0101,0x08,0x06,0x00,0x00,0x00,0x08}, + {0x2f,0x021b,0x35,0x3532,0x0100,0x08,0x05,0x00,0x00,0x00,0x10}, /* 640x400x8 */ + {0x30,0x2a1b,0x47,0x3563,0x0103,0x08,0x07,0x00,0x00,0x00,0x00}, + {0x31,0x0a1b,0xad,0x3630,0x0000,0x08,0x0c,0x00,0x00,0x00,0x11}, /* 720x480x8 */ + {0x32,0x2a1b,0xae,0x3637,0x0000,0x08,0x0d,0x00,0x00,0x00,0x12}, /* 720x576x8 */ + {0x33,0x0a1d,0xad,0x3630,0x0000,0x08,0x0c,0x00,0x00,0x00,0x11}, /* 720x480x16 */ + {0x34,0x2a1d,0xae,0x3637,0x0000,0x08,0x0d,0x00,0x00,0x00,0x12}, /* 720x576x16 */ + {0x35,0x0a1f,0xad,0x3630,0x0000,0x08,0x0c,0x00,0x00,0x00,0x11}, /* 720x480x32 */ + {0x36,0x2a1f,0xae,0x3637,0x0000,0x08,0x0d,0x00,0x00,0x00,0x12}, /* 720x576x32 */ + {0x37,0x0212,0x58,0x358d,0x0104,0x08,0x08,0x00,0x00,0x00,0x13}, /* 1024x768x? */ + {0x38,0x0a1b,0x58,0x358d,0x0105,0x08,0x08,0x00,0x00,0x00,0x13}, /* 1024x768x8 */ + {0x3a,0x0e3b,0x69,0x35be,0x0107,0x08,0x09,0x00,0x00,0x00,0x1a}, /* 1280x1024x8 */ + {0x3c,0x063b,0x7a,0x35d4,0x0130,0x08,0x0a,0x00,0x00,0x00,0x1e}, + {0x3d,0x067d,0x7a,0x35d4,0x0131,0x08,0x0a,0x00,0x00,0x00,0x1e}, + {0x40,0x921c,0x00,0x3516,0x010d,0x08,0x00,0x00,0x00,0x00,0x23}, /* 320x200x15 */ + {0x41,0x921d,0x00,0x3516,0x010e,0x08,0x00,0x00,0x00,0x00,0x23}, /* 320x200x16 */ + {0x43,0x0a1c,0x36,0x3539,0x0110,0x08,0x06,0x00,0x00,0x00,0x08}, + {0x44,0x0a1d,0x36,0x3539,0x0111,0x08,0x06,0x00,0x00,0x00,0x08}, + {0x46,0x2a1c,0x47,0x3563,0x0113,0x08,0x07,0x00,0x00,0x00,0x00}, /* 800x600x15 */ + {0x47,0x2a1d,0x47,0x3563,0x0114,0x08,0x07,0x00,0x00,0x00,0x00}, /* 800x600x16 */ + {0x49,0x0a3c,0x58,0x358d,0x0116,0x08,0x08,0x00,0x00,0x00,0x13}, + {0x4a,0x0a3d,0x58,0x358d,0x0117,0x08,0x08,0x00,0x00,0x00,0x13}, + {0x4c,0x0e7c,0x69,0x35be,0x0119,0x08,0x09,0x00,0x00,0x00,0x1a}, + {0x4d,0x0e7d,0x69,0x35be,0x011a,0x08,0x09,0x00,0x00,0x00,0x1a}, + {0x50,0x921b,0x01,0x351d,0x0132,0x08,0x01,0x00,0x00,0x00,0x24}, /* 320x240x8 */ + {0x51,0xb21b,0x13,0x3524,0x0133,0x08,0x03,0x00,0x00,0x00,0x25}, /* 400x300x8 */ + {0x52,0x921b,0x24,0x352b,0x0134,0x08,0x04,0x00,0x00,0x00,0x26}, /* 512x384x8 */ + {0x56,0x921d,0x01,0x351d,0x0135,0x08,0x01,0x00,0x00,0x00,0x24}, /* 320x240x16 */ + {0x57,0xb21d,0x13,0x3524,0x0136,0x08,0x03,0x00,0x00,0x00,0x25}, /* 400x300x16 */ + {0x58,0x921d,0x24,0x352b,0x0137,0x08,0x04,0x00,0x00,0x00,0x26}, /* 512x384x16 */ + {0x59,0x921b,0x00,0x3516,0x0138,0x08,0x00,0x00,0x00,0x00,0x23}, /* 320x200x8 */ {0x5c,0x921f,0x24,0x352b,0x0000,0x08,0x04,0x00,0x00,0x00,0x26}, /* TW: inserted 512x384x32 */ - {0x5d,0x021d,0x35,0x3532,0x0139,0x08,0x05,0x00,0x00,0x00,0x10}, /* 37bc */ - {0x62,0x0a3f,0x36,0x3539,0x013a,0x08,0x06,0x00,0x00,0x00,0x08}, /* 37c3 */ - {0x63,0x2a3f,0x47,0x3563,0x013b,0x08,0x07,0x00,0x00,0x00,0x00}, /* 37ed */ /* 800x600 */ - {0x64,0x0a7f,0x58,0x358d,0x013c,0x08,0x08,0x00,0x00,0x00,0x13}, /* 3817 */ - {0x65,0x0eff,0x69,0x35be,0x013d,0x08,0x09,0x00,0x00,0x00,0x1a}, /* 3848 */ - {0x66,0x06ff,0x7a,0x35d4,0x013e,0x08,0x0a,0x00,0x00,0x00,0x1e}, /* 385e */ - {0x68,0x067b,0x8b,0x35ef,0x013f,0x08,0x0b,0x00,0x00,0x00,0x27}, /* 3879 */ - {0x69,0x06fd,0x8b,0x35ef,0x0140,0x08,0x0b,0x00,0x00,0x00,0x27}, /* 3879 */ - {0x6b,0x07ff,0x8b,0x35ef,0x0000,0x10,0x0b,0x00,0x00,0x00,0x27}, /* 3879 */ - {0x6c,0x067b,0x9c,0x35f6,0x0000,0x08,0x0c,0x00,0x00,0x00,0x28}, /* 3880 */ - {0x6d,0x06fd,0x9c,0x35f6,0x0000,0x10,0x0c,0x00,0x00,0x00,0x28}, /* 3880 */ - {0x6e,0x0e3b,0x6f,0x35b2,0x0000,0x08,0x0e,0x00,0x00,0x00,0x29}, /* 383c */ /* 1280x960x8 */ - {0x6f,0x0e7d,0x6f,0x35b2,0x0000,0x08,0x0e,0x00,0x00,0x00,0x29}, /* 383c */ /* 1280x960x16 */ - {0x7b,0x0eff,0x6f,0x35b2,0x0000,0x08,0x0e,0x00,0x00,0x00,0x29}, /* 383c */ /* 1280x960x32 */ - {0x20,0x0a1b,0x54,0x0000,0x0000,0x08,0x0f,0x00,0x00,0x00,0x2b}, /* 1024x600 */ + {0x5d,0x021d,0x35,0x3532,0x0139,0x08,0x05,0x00,0x00,0x00,0x10}, /* 640x400x16 */ + {0x5e,0x021f,0x35,0x3532,0x0000,0x08,0x05,0x00,0x00,0x00,0x10}, /* TW: inserted 640x400x32 */ + {0x62,0x0a3f,0x36,0x3539,0x013a,0x08,0x06,0x00,0x00,0x00,0x08}, + {0x63,0x2a3f,0x47,0x3563,0x013b,0x08,0x07,0x00,0x00,0x00,0x00}, /* 800x600x32 */ + {0x64,0x0a7f,0x58,0x358d,0x013c,0x08,0x08,0x00,0x00,0x00,0x13}, + {0x65,0x0eff,0x69,0x35be,0x013d,0x08,0x09,0x00,0x00,0x00,0x1a}, + {0x66,0x06ff,0x7a,0x35d4,0x013e,0x08,0x0a,0x00,0x00,0x00,0x1e}, + {0x68,0x067b,0x8b,0x35ef,0x013f,0x08,0x0b,0x00,0x00,0x00,0x27}, + {0x69,0x06fd,0x8b,0x35ef,0x0140,0x08,0x0b,0x00,0x00,0x00,0x27}, + {0x6b,0x07ff,0x8b,0x35ef,0x0000,0x10,0x0b,0x00,0x00,0x00,0x27}, + {0x6c,0x067b,0x9c,0x35f6,0x0000,0x08,0x11,0x00,0x00,0x00,0x28}, /* TW: 2048x1536x8 - not in BIOS! */ + {0x6d,0x06fd,0x9c,0x35f6,0x0000,0x10,0x11,0x00,0x00,0x00,0x28}, /* TW: 2048x1536x16 - not in BIOS! */ + {0x6e,0x0a3b,0x6f,0x35b2,0x0000,0x08,0x0e,0x00,0x00,0x00,0x29}, /* 1280x960x8 */ + {0x6f,0x0a7d,0x6f,0x35b2,0x0000,0x08,0x0e,0x00,0x00,0x00,0x29}, /* 1280x960x16 */ + /* TW: 16:9 modes - not in ANY BIOS */ + {0x70,0x2a1b,0x40,0x3b52,0x0000,0x08,0x12,0x00,0x00,0x07,0x2d}, /* 800x480x8 */ + {0x71,0x0a1b,0x51,0x3b63,0x0000,0x08,0x13,0x00,0x00,0x00,0x30}, /* 1024x576x8 */ + {0x74,0x0a1d,0x51,0x3b63,0x0000,0x08,0x13,0x00,0x00,0x00,0x30}, /* 1024x576x16 */ + {0x75,0x0e3d,0x62,0x3b74,0x0000,0x08,0x14,0x00,0x00,0x00,0x33}, /* 1280x720x16 */ + {0x76,0x2a1f,0x40,0x3b52,0x0000,0x08,0x12,0x00,0x00,0x07,0x2d}, /* 800x480x32 */ + {0x77,0x0a3f,0x51,0x3b63,0x0000,0x08,0x13,0x00,0x00,0x00,0x30}, /* 1024x576x32 */ + {0x78,0x0eff,0x62,0x3b74,0x0000,0x08,0x14,0x00,0x00,0x00,0x33}, /* 1280x720x32 */ + {0x79,0x0e3b,0x62,0x3b74,0x0000,0x08,0x14,0x00,0x00,0x00,0x33}, /* 1280x720x8 */ + {0x7a,0x2a1d,0x40,0x3b52,0x0000,0x08,0x12,0x00,0x00,0x07,0x2d}, /* 800x480x16 */ + /* TW: End of new 16:9 modes */ + {0x7b,0x0aff,0x6f,0x35b2,0x0000,0x08,0x0e,0x00,0x00,0x00,0x29}, /* 1280x960x32 */ + {0x20,0x0a1b,0x54,0x0000,0x0000,0x08,0x0f,0x00,0x00,0x00,0x2b}, /* 1024x600 */ {0x21,0x0a3d,0x54,0x0000,0x0000,0x08,0x0f,0x00,0x00,0x00,0x2b}, {0x22,0x0a7f,0x54,0x0000,0x0000,0x08,0x0f,0x00,0x00,0x00,0x2b}, - {0x23,0x0a1b,0xc5,0x0000,0x0000,0x08,0x10,0x00,0x00,0x00,0x2c}, /* 1152x768 */ + {0x23,0x0a1b,0xc5,0x0000,0x0000,0x08,0x10,0x00,0x00,0x00,0x2c}, /* 1152x768 */ {0x24,0x0a3d,0xc5,0x431d,0x0000,0x08,0x10,0x00,0x00,0x00,0x2c}, {0x25,0x0a7f,0xc5,0x431d,0x0000,0x08,0x10,0x00,0x00,0x00,0x2c}, + {0x29,0x0e1b,0xc5,0x0000,0x0000,0x08,0x15,0x00,0x00,0x00,0x36}, /* TW: NEW 1152x864 - not in BIOS */ + {0x2a,0x0e3d,0xc5,0x0000,0x0000,0x08,0x15,0x00,0x00,0x00,0x36}, + {0x2b,0x0e7f,0xc5,0x0000,0x0000,0x08,0x15,0x00,0x00,0x00,0x36}, + {0x39,0x2a1b,0xd6,0x0000,0x0000,0x08,0x16,0x00,0x00,0x00,0x38}, /* TW: NEW 848x480 - not in BIOS */ + {0x3b,0x2a3d,0xd6,0x0000,0x0000,0x08,0x16,0x00,0x00,0x00,0x38}, + {0x3e,0x2a7f,0xd6,0x0000,0x0000,0x08,0x16,0x00,0x00,0x00,0x38}, + {0x3f,0x2a1b,0xd7,0x0000,0x0000,0x08,0x17,0x00,0x00,0x00,0x3a}, /* TW: NEW 856x480 - not in BIOS */ + {0x42,0x2a3d,0xd7,0x0000,0x0000,0x08,0x17,0x00,0x00,0x00,0x3a}, + {0x45,0x2a7f,0xd7,0x0000,0x0000,0x08,0x17,0x00,0x00,0x00,0x3a}, + {0x48,0x223b,0xe8,0x0000,0x0000,0x08,0x18,0x00,0x00,0x00,0x3c}, /* TW: NEW 1360x768 - not in BIOS */ + {0x4b,0x227d,0xe8,0x0000,0x0000,0x08,0x18,0x00,0x00,0x00,0x3c}, + {0x4e,0x22ff,0xe8,0x0000,0x0000,0x08,0x18,0x00,0x00,0x00,0x3c}, + {0x4f,0x921f,0x00,0x0000,0x0000,0x08,0x00,0x00,0x00,0x00,0x23}, /* TW: New 320x200x32 */ + {0x53,0x921f,0x01,0x0000,0x0000,0x08,0x01,0x00,0x00,0x00,0x24}, /* TW: New 320x240x32 */ + {0x54,0xb21f,0x13,0x0000,0x0000,0x08,0x03,0x00,0x00,0x00,0x25}, /* TW: New 400x300x32 */ {0xff,0x0000,0x00,0x0000,0xffff,0x00,0x00,0x00,0x00,0x00,0x00} }; @@ -486,7 +512,7 @@ { USHORT Ext_InfoFlag; UCHAR Ext_CRT1CRTC; /* TW: Index in SiS300_CRT1Table */ - UCHAR Ext_CRTVCLK; + UCHAR Ext_CRTVCLK; /* TW: Index in VCLK array */ UCHAR Ext_CRT2CRTC; /* TW: Index in LCD Paneltype arrays (&3f) */ UCHAR ModeID; USHORT XRes; @@ -494,15 +520,15 @@ USHORT ROM_OFFSET; } SiS300_Ext2Struct; -static const SiS300_Ext2Struct SiS300_RefIndex[]= +static const SiS300_Ext2Struct SiS300_RefIndex[] = { /* TW: Don't ever insert anything here, table is indexed */ {0x085f,0x0d,0x03,0x05,0x6a, 800, 600,0x3563}, /* 00 */ {0x0467,0x0e,0x44,0x05,0x6a, 800, 600,0x3568}, /* 01 */ - {0x0067,0x4f,0x07,0x48,0x6a, 800, 600,0x356d}, /* 02 */ + {0x0067,0x0f,0x07,0x48,0x6a, 800, 600,0x356d}, /* 02 - CRT1CRTC was 0x4f */ {0x0067,0x10,0x06,0x8b,0x6a, 800, 600,0x3572}, /* 03 */ {0x0147,0x11,0x08,0x00,0x6a, 800, 600,0x3577}, /* 04 */ {0x0147,0x12,0x0c,0x00,0x6a, 800, 600,0x357c}, /* 05 */ - {0x0047,0x51,0x4e,0x00,0x6a, 800, 600,0x3581}, /* 06 */ + {0x0047,0x11,0x4e,0x00,0x6a, 800, 600,0x3581}, /* 06 - CRT1CRTC was 0x51 */ {0x0047,0x11,0x13,0x00,0x6a, 800, 600,0x3586}, /* 07 */ {0xc85f,0x05,0x00,0x04,0x2e, 640, 480,0x3539}, /* 08 */ {0xc067,0x06,0x02,0x04,0x2e, 640, 480,0x353e}, /* 09 */ @@ -517,30 +543,46 @@ {0x000f,0x32,0x03,0x06,0x32, 720, 576,0x3637}, /* 12 */ {0x0187,0x15,0x05,0x00,0x37,1024, 768,0x358d}, /* 13 */ {0xc877,0x16,0x09,0x06,0x37,1024, 768,0x3592}, /* 14 */ - {0xc067,0x97,0x0b,0x49,0x37,1024, 768,0x3597}, /* 15 */ + {0xc067,0x17,0x0b,0x49,0x37,1024, 768,0x3597}, /* 15 - CRT1CRTC was 0x97 */ {0x0267,0x18,0x0d,0x00,0x37,1024, 768,0x359c}, /* 16 */ - {0x0047,0x59,0x11,0x8c,0x37,1024, 768,0x35a1}, /* 17 */ + {0x0047,0x19,0x11,0x8c,0x37,1024, 768,0x35a1}, /* 17 - CRT1CRTC was 0x59 */ {0x0047,0x1a,0x52,0x00,0x37,1024, 768,0x35a6}, /* 18 */ - {0x0047,0x5b,0x16,0x00,0x37,1024, 768,0x35ab}, /* 19 */ - {0x0387,0x5c,0x4d,0x00,0x3a,1280,1024,0x35be}, /* 1a */ + {0x0007,0x1b,0x16,0x00,0x37,1024, 768,0x35ab}, /* 19 - CRT1CRTC was 0x5b */ + {0x0387,0x1c,0x4d,0x00,0x3a,1280,1024,0x35be}, /* 1a - CRT1CRTC was 0x5c */ {0x0077,0x1d,0x14,0x07,0x3a,1280,1024,0x35c3}, /* 1b */ {0x0047,0x1e,0x17,0x00,0x3a,1280,1024,0x35c8}, /* 1c */ {0x0007,0x1f,0x98,0x00,0x3a,1280,1024,0x35cd}, /* 1d */ - {0x0007,0x60,0x59,0x00,0x3c,1600,1200,0x35d4}, /* 1e */ + {0x0007,0x20,0x59,0x00,0x3c,1600,1200,0x35d4}, /* 1e - CRT1CRTC was 0x60 */ {0x0007,0x21,0x5a,0x00,0x3c,1600,1200,0x35d9}, /* 1f */ {0x0007,0x22,0x1b,0x00,0x3c,1600,1200,0x35de}, /* 20 */ - {0x0007,0x63,0x1d,0x00,0x3c,1600,1200,0x35e3}, /* 21 */ + {0x0007,0x23,0x1d,0x00,0x3c,1600,1200,0x35e3}, /* 21 - CRT1CRTC was 0x63 */ {0x0007,0x24,0x1e,0x00,0x3c,1600,1200,0x35e8}, /* 22 */ {0x407f,0x00,0x00,0x00,0x40, 320, 200,0x3516}, /* 23 */ {0xc07f,0x01,0x00,0x04,0x50, 320, 240,0x351d}, /* 24 */ {0x0077,0x02,0x04,0x05,0x51, 400, 300,0x3524}, /* 25 */ {0xc877,0x03,0x09,0x06,0x52, 512, 384,0x352b}, /* 26 */ /* was c077 */ {0x8207,0x25,0x1f,0x00,0x68,1920,1440,0x35ef}, /* 27 */ - {0x0007,0x26,0x20,0x00,0x6c, 720, 480,0x35f6}, /* 28 */ - {0x0027,0x27,0x14,0x08,0x6e,1280, 960,0x35b2}, /* 29 */ - {0x0027,0x27,0x14,0x08,0x6e,1280, 960,0x35b7}, /* 2a */ + {0x0007,0x26,0x20,0x00,0x6c,2048,1536,0x35f6}, /* 28 */ + {0x0067,0x27,0x14,0x08,0x6e,1280, 960,0x35b7}, /* 29 - TW: 1280x960-60 */ + {0x0027,0x45,0x3c,0x08,0x6e,1280, 960,0x35b7}, /* 2a - TW: 1280x960-85 */ {0xc077,0x33,0x09,0x06,0x20,1024, 600,0x0000}, /* 2b */ - {0xc077,0x34,0x09,0x06,0x23,1152, 768,0x0000}, /* 2c */ + {0xc077,0x34,0x0b,0x06,0x23,1152, 768,0x0000}, /* 2c */ /* VCLK 0x09 */ + {0x0057,0x35,0x27,0x08,0x70, 800, 480,0x3b52}, /* 2d - TW: 16:9 modes */ + {0x0047,0x36,0x37,0x08,0x70, 800, 480,0x3b57}, /* 2e */ + {0x0047,0x37,0x08,0x08,0x70, 800, 480,0x3b5c}, /* 2f */ + {0x0057,0x38,0x09,0x09,0x71,1024, 576,0x3b63}, /* 30 */ + {0x0047,0x39,0x38,0x09,0x71,1024, 576,0x3b68}, /* 31 */ + {0x0047,0x3a,0x11,0x09,0x71,1024, 576,0x3b6d}, /* 32 */ + {0x0057,0x3b,0x39,0x0a,0x75,1280, 720,0x3b74}, /* 33 */ + {0x0047,0x3c,0x3a,0x0a,0x75,1280, 720,0x3b79}, /* 34 */ + {0x0007,0x3d,0x3b,0x0a,0x75,1280, 720,0x3b7e}, /* 35 - TW: END of 16:9 modes */ + {0x0047,0x3e,0x34,0x06,0x29,1152, 864,0x0000}, /* 36 TW: 1152x864-75Hz - Non-BIOS, new */ + {0x0047,0x44,0x3a,0x06,0x29,1152, 864,0x0000}, /* 37 TW: 1152x864-85Hz - Non-BIOS, new */ + {0x00c7,0x3f,0x28,0x00,0x39, 848, 480,0x0000}, /* 38 TW: 848x480-38Hzi - Non-BIOS, new */ + {0xc047,0x40,0x3d,0x00,0x39, 848, 480,0x0000}, /* 39 TW: 848x480-60Hz - Non-BIOS, new */ + {0x00c7,0x41,0x28,0x00,0x3f, 856, 480,0x0000}, /* 3a TW: 856x480-38Hzi - Non-BIOS, new */ + {0xc047,0x42,0x28,0x00,0x3f, 856, 480,0x0000}, /* 3b TW: 856x480-60Hz - Non-BIOS, new */ + {0x0047,0x43,0x3e,0x00,0x48,1360, 768,0x0000}, /* 3c TW: 1360x768-60Hz - Non-BIOS, new */ {0xffff,0,0,0,0,0,0,0} }; @@ -557,9 +599,9 @@ UCHAR _VB_LCDVIndex; }SiS_VBModeIDTableStruct; -static const SiS_VBModeIDTableStruct SiS300_VBModeIDTable[]= +static const SiS_VBModeIDTableStruct SiS300_VBModeIDTable[] = { - {0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, /* TW: Identical to 630/301B 2.04.50 BIOS */ + {0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, {0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01}, {0x01,0x00,0x00,0x00,0x01,0x00,0x01,0x02}, {0x03,0x00,0x00,0x00,0x02,0x00,0x02,0x00}, @@ -619,46 +661,87 @@ UCHAR CR[17]; } SiS300_CRT1TableStruct; -static const SiS300_CRT1TableStruct SiS300_CRT1Table[]= +static const SiS300_CRT1TableStruct SiS300_CRT1Table[] = { - {{0x2d,0x27,0x28,0x90,0x2c,0x80,0xbf,0x1f, /* 0x00 */ - 0x9c,0x8e,0x8f,0x96,0xb9,0x30,0x00,0x00, +#if 1 + {{0x2d,0x27,0x28,0x90,0x2c,0x80,0xbf,0x1f, /* 0x00 - 320x200 */ + 0x9c,0x8e,0x8f,0x96,0xb9,0x30,0x00,0x00, /* HRE [4],[15] is invalid - but correcting it does not work */ + 0x00}}, +#endif +#if 0 + {{0x2d,0x27,0x27,0x91,0x2c,0x92,0xbf,0x1f, /* 0x00 - corrected 320x200-72 - does not work */ + 0x9c,0x8e,0x8f,0x96,0xb9,0x30,0x00,0x04, 0x00}}, - {{0x2d,0x27,0x28,0x90,0x2c,0x80,0x0b,0x3e, - 0xe9,0x8b,0xdf,0xe7,0x04,0x00,0x00,0x00, +#endif +#if 1 + {{0x2d,0x27,0x28,0x90,0x2c,0x80,0x0b,0x3e, /* 0x01 */ + 0xe9,0x8b,0xdf,0xe7,0x04,0x00,0x00,0x00, /* HRE [4],[15] is invalid - but correcting it does not work */ 0x00}}, - {{0x3d,0x31,0x31,0x81,0x37,0x1f,0x72,0xf0, +#endif +#if 0 + {{0x2d,0x27,0x27,0x91,0x2c,0x92,0x0b,0x3e, /* 0x01 - corrected 320x240-60 - does not work */ + 0xe9,0x8b,0xdf,0xe7,0x04,0x00,0x00,0x04, + 0x00}}, +#endif +#if 1 + {{0x3d,0x31,0x31,0x81,0x37,0x1f,0x72,0xf0, /* 0x02 */ + 0x58,0x8c,0x57,0x57,0x73,0x20,0x00,0x05, + 0x01}}, +#endif +#if 0 + {{0x3d,0x31,0x31,0x81,0x37,0x1f,0x72,0xf0, /* 0x02 - corrected 400x300-60 */ 0x58,0x8c,0x57,0x57,0x73,0x20,0x00,0x05, 0x01}}, +#endif {{0x4f,0x3f,0x3f,0x93,0x45,0x0d,0x24,0xf5, 0x02,0x88,0xff,0xff,0x25,0x10,0x00,0x01, 0x01}}, {{0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f, 0x9c,0x8e,0x8f,0x96,0xb9,0x30,0x00,0x05, 0x00}}, - {{0x5f,0x4f,0x50,0x82,0x55,0x81,0x0b,0x3e, +#if 0 + {{0x5f,0x4f,0x50,0x82,0x55,0x81,0x0b,0x3e, /* 0x05 */ 0xe9,0x8b,0xdf,0xe7,0x04,0x00,0x00,0x05, 0x00}}, - {{0x63,0x4f,0x50,0x86,0x56,0x9b,0x06,0x3e, +#endif + {{0x5f,0x4f,0x4f,0x83,0x55,0x81,0x0b,0x3e, /* 0x05 - corrected 640x480-60 */ + 0xe9,0x8b,0xdf,0xe8,0x0c,0x00,0x00,0x05, + 0x00}}, + #if 0 + {{0x63,0x4f,0x50,0x86,0x56,0x9b,0x06,0x3e, /* 0x06 */ 0xe8,0x8b,0xdf,0xe7,0xff,0x10,0x00,0x01, 0x00}}, +#endif + {{0x63,0x4f,0x4f,0x87,0x56,0x9b,0x06,0x3e, /* 0x06 - corrected 640x480-72 */ + 0xe8,0x8a,0xdf,0xe7,0x07,0x00,0x00,0x01, + 0x00}}, {{0x64,0x4f,0x4f,0x88,0x55,0x9d,0xf2,0x1f, 0xe0,0x83,0xdf,0xdf,0xf3,0x10,0x00,0x01, 0x00}}, {{0x63,0x4f,0x4f,0x87,0x5a,0x81,0xfb,0x1f, 0xe0,0x83,0xdf,0xdf,0xfc,0x10,0x00,0x05, 0x00}}, - {{0x66,0x4f,0x4f,0x86,0x56,0x9e,0x03,0x3e, +#if 0 + {{0x66,0x4f,0x4f,0x86,0x56,0x9e,0x03,0x3e, /* 0x09 */ 0xe4,0x87,0xdf,0xdf,0x04,0x00,0x00,0x01, 0x00}}, +#endif + {{0x67,0x4f,0x4f,0x8b,0x57,0x83,0x10,0x3e, /* 0x09 - corrected 640x480-100 */ + 0xe7,0x8d,0xdf,0xe6,0x11,0x00,0x00,0x05, + 0x00}}, +#if 0 {{0x6c,0x4f,0x4f,0x83,0x59,0x9e,0x00,0x3e, /* 0x0a */ 0xe5,0x8d,0xdf,0xdf,0x01,0x00,0x00,0x01, 0x00}}, +#endif + {{0x67,0x4f,0x4f,0x8b,0x57,0x83,0x10,0x3e, /* 0x0a - corrected 640x480-120 */ + 0xe7,0x8d,0xdf,0xe6,0x11,0x00,0x00,0x05, + 0x00}}, {{0x63,0x4f,0x4f,0x87,0x56,0x9d,0xfb,0x1f, 0xe0,0x83,0xdf,0xdf,0xfc,0x10,0x00,0x01, 0x00}}, {{0x65,0x4f,0x4f,0x89,0x57,0x9f,0xfb,0x1f, - 0xe6,0x8a,0xe5,0xe5,0xfc,0x00,0x00,0x01, + 0xe6,0x8a,0xdf,0xdf,0xfc,0x10,0x00,0x01, /* TW: Corrected VDE, VBE */ 0x00}}, {{0x7b,0x63,0x63,0x9f,0x6a,0x93,0x6f,0xf0, 0x58,0x8a,0x57,0x57,0x70,0x20,0x00,0x05, @@ -699,7 +782,7 @@ {{0xa7,0x7f,0x7f,0x8b,0x89,0x95,0x26,0xf5, 0x00,0x83,0xff,0xff,0x27,0x10,0x00,0x02, 0x01}}, - {{0x9f,0x7f,0x7f,0x83,0x83,0x93,0x1e,0xf5, + {{0x9f,0x7f,0x7f,0x83,0x83,0x93,0x1e,0xf5, /* 0x1a */ 0x00,0x84,0xff,0xff,0x1f,0x10,0x00,0x02, 0x01}}, {{0xa2,0x7f,0x7f,0x86,0x84,0x94,0x37,0xf5, @@ -738,9 +821,14 @@ {{0x55,0xff,0xff,0x99,0x0d,0x0c,0x3e,0xba, 0x00,0x84,0xff,0xff,0x3f,0x0f,0x41,0x05, 0x00}}, - {{0xdc,0x9f,0x9f,0x00,0xab,0x19,0xe6,0xef, +#if 0 + {{0xdc,0x9f,0x9f,0x00,0xab,0x19,0xe6,0xef, /* 0x27: 1280x960-70 - invalid! */ 0xc0,0xc3,0xbf,0xbf,0xe7,0x10,0x00,0x07, 0x01}}, +#endif + {{0xdc,0x9f,0x9f,0x80,0xaf,0x9d,0xe6,0xff, /* 0x27: 1280x960-60 - correct */ + 0xc0,0x83,0xbf,0xbf,0xe7,0x10,0x00,0x07, + 0x01}}, {{0x7f,0x63,0x63,0x83,0x6c,0x1c,0x72,0xba, /* 0x28 */ 0x27,0x8b,0xdf,0xdf,0x73,0x00,0x00,0x06, 0x01}}, @@ -777,9 +865,70 @@ {{0xa3,0x7f,0x7f,0x87,0x86,0x97,0x1e,0xf1, /* 0x33 - 1024x600 */ 0xae,0x85,0x57,0x57,0x1f,0x30,0x00,0x02, 0x01}}, +#if 0 {{0xa3,0x7f,0x7f,0x87,0x86,0x97,0x24,0xf5, /* 0x34 - 1152x768 */ 0x02,0x88,0xff,0xff,0x25,0x10,0x00,0x02, - 0x01}} + 0x01}}, +#endif + {{0xa3,0x8f,0x8f,0x97,0x96,0x97,0x24,0xf5, /* 0x34 - 1152x768 - TW: corrected */ + 0x02,0x88,0xff,0xff,0x25,0x10,0x00,0x02, + 0x01}}, + {{0x7f,0x63,0x63,0x83,0x6c,0x1c,0x72,0xba, /* 0x35 - NEW 16:9 modes, not in BIOS ------ */ + 0x27,0x8b,0xdf,0xdf,0x73,0x00,0x00,0x06, + 0x01}}, /* 0x35 */ + {{0x7f,0x63,0x63,0x83,0x69,0x13,0x6f,0xba, + 0x26,0x89,0xdf,0xdf,0x6f,0x00,0x00,0x06, + 0x01}}, /* 0x36 */ + {{0x7f,0x63,0x63,0x82,0x6b,0x13,0x75,0xba, + 0x29,0x8c,0xdf,0xdf,0x75,0x00,0x00,0x06, + 0x01}}, /* 0x37 */ + {{0xa3,0x7f,0x7f,0x87,0x86,0x97,0x24,0xf1, + 0xaf,0x85,0x3f,0x3f,0x25,0x30,0x00,0x02, + 0x01}}, /* 0x38 */ + {{0x9f,0x7f,0x7f,0x83,0x85,0x91,0x1e,0xf1, + 0xad,0x81,0x3f,0x3f,0x1f,0x30,0x00,0x02, + 0x01}}, /* 0x39 */ + {{0xa7,0x7f,0x7f,0x88,0x89,0x95,0x26,0xf1, /* TW: 95 was 15 - illegal HBE! */ + 0xb1,0x85,0x3f,0x3f,0x27,0x30,0x00,0x02, + 0x01}}, /* 0x3a */ + {{0xce,0x9f,0x9f,0x92,0xa9,0x17,0x28,0xc4, + 0x7a,0x8e,0xcf,0xcf,0x29,0x21,0x00,0x07, + 0x01}}, /* 0x3b */ + {{0xce,0x9f,0x9f,0x92,0xa5,0x17,0x28,0xd4, + 0x7a,0x8e,0xcf,0xcf,0x29,0x21,0x00,0x07, + 0x01}}, /* 0x3c */ + {{0xd3,0x9f,0x9f,0x97,0xab,0x1f,0x2e,0xd4, + 0x7d,0x81,0xcf,0xcf,0x2f,0x21,0x00,0x07, + 0x01}}, /* 0x3d */ /* TW: End of 16:9 modes --------------- */ + {{0xc3,0x8f,0x8f,0x87,0x9b,0x0b,0x82,0xef, /* TW: New, 1152x864-75 (not in any BIOS) */ + 0x60,0x83,0x5f,0x5f,0x83,0x10,0x00,0x07, + 0x01}}, /* 0x3e */ + {{0x86,0x69,0x69,0x8A,0x74,0x06,0x8C,0x15, /* TW: New, 848x480-38i, not in BIOS */ + 0x4F,0x83,0xEF,0xEF,0x8D,0x30,0x00,0x02, + 0x00}}, /* 0x3f */ +#if 0 + {{0x81,0x69,0x69,0x85,0x70,0x00,0x0F,0x3E, /* TW: New, 848x480-60, not in BIOS - incorrect for Philips panel */ + 0xEB,0x8E,0xDF,0xDF,0x10,0x00,0x00,0x02, + 0x00}}, /* 0x40 */ +#endif + {{0x83,0x69,0x69,0x87,0x6f,0x1d,0x03,0x3E, /* TW: New, 848x480-60, not in BIOS */ + 0xE5,0x8d,0xDF,0xe4,0x04,0x00,0x00,0x06, + 0x00}}, /* 0x40 */ + {{0x86,0x6A,0x6A,0x8A,0x74,0x06,0x8C,0x15, /* TW: New, 856x480-38i, not in BIOS */ + 0x4F,0x83,0xEF,0xEF,0x8D,0x30,0x00,0x02, + 0x00}}, /* 0x41 */ + {{0x81,0x6A,0x6A,0x85,0x70,0x00,0x0F,0x3E, /* TW: New, 856x480-60, not in BIOS */ + 0xEB,0x8E,0xDF,0xDF,0x10,0x00,0x00,0x02, + 0x00}}, /* 0x42 */ + {{0xdd,0xa9,0xa9,0x81,0xb4,0x97,0x26,0xfd, /* TW: New, 1360x768-60, not in BIOS */ + 0x01,0x8d,0xff,0x00,0x27,0x10,0x00,0x03, + 0x01}}, /* 0x43 */ + {{0xd9,0x8f,0x8f,0x9d,0xba,0x0a,0x8a,0xff, /* TW: New, 1152x864-84 (not in any BIOS) */ + 0x60,0x8b,0x5f,0x5f,0x8b,0x10,0x00,0x03, + 0x01}}, /* 0x44 */ + {{0xd3,0x9f,0x9f,0x97,0xab,0x1f,0xf1,0xff, /* TW: New, 1280x960-85 (not in any BIOS) */ + 0xc0,0x83,0xbf,0xbf,0xf2,0x10,0x00,0x07, + 0x01}} /* 0x45 */ }; typedef struct _SiS300_MCLKDataStruct @@ -818,7 +967,7 @@ USHORT CLOCK; } SiS300_ECLKDataStruct; -static const SiS300_ECLKDataStruct SiS300_ECLKData[]= +static const SiS300_ECLKDataStruct SiS300_ECLKData[] = { { 0x54,0x43,0x80,100}, { 0x53,0x43,0x80,100}, @@ -836,68 +985,79 @@ USHORT CLOCK; } SiS300_VCLKDataStruct; -static const SiS300_VCLKDataStruct SiS300_VCLKData[]= +static const SiS300_VCLKDataStruct SiS300_VCLKData[] = { - { 0x1b,0xe1, 25}, + { 0x1b,0xe1, 25}, /* 0x00 */ { 0x4e,0xe4, 28}, - { 0x57,0xe4, 32}, + { 0x57,0xe4, 32}, /* 0x02 */ { 0xc3,0xc8, 36}, - { 0x42,0xc3, 40}, + { 0x42,0xc3, 40}, /* 0x04 */ { 0x5d,0xc4, 45}, - { 0x52,0x65, 50}, + { 0x52,0x65, 50}, /* 0x06 */ { 0x53,0x65, 50}, - { 0x6d,0x66, 56}, + { 0x6d,0x66, 56}, /* 0x08 */ { 0x5a,0x64, 65}, - { 0x46,0x44, 68}, + { 0x46,0x44, 68}, /* 0x0a */ { 0x3e,0x43, 75}, - { 0x6d,0x46, 76}, /* 0x0c: 800x600 | LVDS_2(CH), MITAC(CH); - LVDS2(CH), A901(301B): 0xb1,0x46, 76 */ + { 0x6d,0x46, 76}, /* 0x0c: 800x600 | LVDS_2(CH), MITAC(CH); - 730, A901(301B): 0xb1,0x46, 76 */ { 0x41,0x43, 79}, - { 0x31,0x42, 79}, + { 0x31,0x42, 79}, /* 0x0e */ { 0x46,0x25, 85}, { 0x78,0x29, 87}, /* 0x10 */ { 0x62,0x44, 95}, - { 0x2b,0x22,105}, + { 0x2b,0x22,105}, /* 0x12 */ { 0x49,0x24,106}, - { 0xc3,0x28,108}, + { 0xc3,0x28,108}, /* 0x14 */ { 0x3c,0x23,109}, - { 0xf7,0x2c,132}, + { 0xf7,0x2c,132}, /* 0x16 */ { 0xd4,0x28,136}, - { 0x41,0x05,158}, + { 0x41,0x05,158}, /* 0x18 */ { 0x43,0x05,162}, - { 0xe1,0x0f,175}, - { 0xfc,0x12,189}, - { 0xde,0x26,194}, + { 0xe1,0x0f,175}, /* 0x1a */ + { 0xfc,0x12,189}, /* 0x1b */ + { 0xde,0x26,194}, /* 0x1c */ { 0x54,0x05,203}, - { 0x3f,0x03,230}, + { 0x3f,0x03,230}, /* 0x1e */ { 0x30,0x02,234}, - { 0x24,0x01,266}, /* 0x20 */ - { 0x52,0x2a, 54}, /* 301 TV */ - { 0x52,0x6a, 27}, /* 301 TV */ - { 0x62,0x24, 70}, /* 301 TV */ - { 0x62,0x64, 70}, /* 301 TV */ - { 0xa8,0x4c, 30}, /* 301 TV */ - { 0x20,0x26, 33}, /* 301 TV */ + { 0x24,0x01,266}, /* 0x20 */ + { 0x52,0x2a, 54}, /* 301 TV */ + { 0x52,0x6a, 27}, /* 301 TV */ + { 0x62,0x24, 70}, /* 301 TV */ + { 0x62,0x64, 70}, /* 301 TV */ + { 0xa8,0x4c, 30}, /* 301 TV */ + { 0x20,0x26, 33}, /* 301 TV */ { 0x31,0xc2, 39}, - { 0xbf,0xc8, 35}, /* 0x28 */ - { 0x60,0x36, 30}, /* 0x29 CH/UNTSC TEXT | LVDS_2(CH) - LVDS2(CH), A901(301B), Mitac(CH): 0xe0, 0xb6, 30 */ + { 0xbf,0xc8, 35}, /* 0x28 - 856x480 */ + { 0x60,0x36, 30}, /* 0x29 CH/UNTSC TEXT | LVDS_2(CH) - 730, A901(301B), Mitac(CH): 0xe0, 0xb6, 30 */ { 0x40,0x4a, 28}, { 0x9f,0x46, 44}, { 0x97,0x2c, 26}, { 0x44,0xe4, 25}, { 0x7e,0x32, 47}, - { 0x8a,0x24, 31}, /* 0x2f CH/PAL TEXT | LVDS_2(CH), Mitac(CH) - LVDS2(CH), A901(301B): 0x57, 0xe4, 31 */ + { 0x8a,0x24, 31}, /* 0x2f CH/PAL TEXT | LVDS_2(CH), Mitac(CH) - 730, A901(301B): 0x57, 0xe4, 31 */ { 0x97,0x2c, 26}, { 0xce,0x3c, 39}, - { 0x52,0x4a, 36}, + { 0x52,0x4a, 36}, /* 0x32 CH/PAL 800x600 5/6 */ { 0x34,0x61, 95}, { 0x78,0x27,108}, - { 0xce,0x25,189}, - { 0x45,0x6b, 21}, /* 0x36 */ /* TW: Added from Mitac */ - { 0xff,0x00, 0} + { 0xce,0x25,189}, /* 0x35 */ + { 0x45,0x6b, 21}, /* 0x36 */ /* TW: Added from Mitac */ + { 0x52,0xe2, 49}, /* 0x37 - added for 16:9 modes (not in any BIOS) */ + { 0x2b,0x61, 78}, /* 0x38 - added for 16:9 modes (not in any BIOS) */ + { 0x70,0x44,108}, /* 0x39 - added for 16:9 modes (not in any BIOS) */ + { 0x54,0x42,135}, /* 0x3a - added for 16:9 modes (not in any BIOS) */ + { 0x41,0x22,157}, /* 0x3b - added for 16:9 modes (not in any BIOS) */ + { 0x52,0x07,149}, /* 0x3c - added for 1280x960-85 (not in any BIOS)*/ + { 0x62,0xc6, 34}, /* 0x3d - added for 848x480-60 (not in any BIOS) */ + { 0x30,0x23, 88}, /* 0x3e - added for 1360x768-60 (not in any BIOS)*/ + { 0x3f,0x64, 46}, /* 0x3f - added for 640x480-100 (not in any BIOS)*/ + { 0x72,0x2a, 76}, /* 0x40 - test for SiS730 */ + { 0x15,0x21, 79}, /* 0x41 - test for SiS730 */ + { 0xff,0x00, 0} }; #if 0 /* TW: This table is in all BIOSes, but not used */ -static const SiS300_VCLKDataStruct SiS300_VBVCLKData[]= +static const SiS300_VCLKDataStruct SiS300_VBVCLKData[] = { { 0x1b,0xe1, 25}, { 0x4e,0xe4, 28}, @@ -953,7 +1113,8 @@ static const UCHAR SiS300_ScreenOffset[] = { 0x14,0x19,0x20,0x28,0x32,0x40,0x50, - 0x64,0x78,0x80,0x2d,0x35,0x48,0xff + 0x64,0x78,0x80,0x2d,0x35,0x48,0x35, /* 0x35 for 848 and 856 */ + 0x55,0xff /* 0x55 for 1360 */ }; typedef struct _SiS300_StResInfoStruct @@ -997,12 +1158,20 @@ { 720, 576, 8,16}, /* 0x0d */ { 1280, 960, 8,16}, /* 0x0e */ { 1024, 600, 8,16}, /* 0x0f */ - { 1152, 768, 8,16} /* 0x10 */ + { 1152, 768, 8,16}, /* 0x10 */ + { 2048,1536, 8,16}, /* 0x11 - TW: Not in BIOS! */ + { 800, 480, 8,16}, /* 0x12 - TW: New, not in any BIOS */ + { 1024, 576, 8,16}, /* 0x13 - TW: New, not in any BIOS */ + { 1280, 720, 8,16}, /* 0x14 - TW: New, not in any BIOS */ + { 1152, 864, 8,16}, /* 0x15 - TW: New, not in any BIOS */ + { 848, 480, 8,16}, /* 0x16 - TW: New, not in any BIOS */ + { 856, 480, 8,16}, /* 0x17 - TW: New, not in any BIOS */ + { 1360, 768, 8,16} /* 0x18 - TW: New, not in any BIOS */ }; static const UCHAR SiS300_OutputSelect = 0x40; -static const UCHAR SiS300_SoftSetting = 30; +static const UCHAR SiS300_SoftSetting = 0x30; #ifndef LINUX_XF86 static UCHAR SiS300_SR07 = 0x10; @@ -1111,7 +1280,7 @@ USHORT LCDVT; } SiS300_LCDDataStruct; -static const SiS300_LCDDataStruct SiS300_StLCD1024x768Data[]= +static const SiS300_LCDDataStruct SiS300_StLCD1024x768Data[] = { { 66, 31, 992, 510,1320, 816}, { 66, 31, 992, 510,1320, 816}, @@ -1122,7 +1291,7 @@ { 1, 1,1344, 806,1344, 806} }; -static const SiS300_LCDDataStruct SiS300_ExtLCD1024x768Data[]= +static const SiS300_LCDDataStruct SiS300_ExtLCD1024x768Data[] = { { 12, 5, 896, 512,1344, 806}, { 12, 5, 896, 510,1344, 806}, @@ -1139,7 +1308,7 @@ { 1, 1,1344, 806,1344, 806} }; -static const SiS300_LCDDataStruct SiS300_St2LCD1024x768Data[]= +static const SiS300_LCDDataStruct SiS300_St2LCD1024x768Data[] = { { 62, 25, 800, 546,1344, 806}, { 32, 15, 930, 546,1344, 806}, @@ -1150,7 +1319,7 @@ { 1, 1,1344, 806,1344, 806} }; -static const SiS300_LCDDataStruct SiS300_StLCD1280x1024Data[]= +static const SiS300_LCDDataStruct SiS300_StLCD1280x1024Data[] = { { 4, 1, 880, 510,1650,1088}, { 4, 1, 880, 510,1650,1088}, @@ -1162,7 +1331,7 @@ { 1, 1,1688,1066,1688,1066} }; -static const SiS300_LCDDataStruct SiS300_ExtLCD1280x1024Data[]= +static const SiS300_LCDDataStruct SiS300_ExtLCD1280x1024Data[] = { { 211, 60,1024, 501,1688,1066}, { 211, 60,1024, 508,1688,1066}, @@ -1174,7 +1343,7 @@ { 1, 1,1688,1066,1688,1066} }; -static const SiS300_LCDDataStruct SiS300_St2LCD1280x1024Data[]= +static const SiS300_LCDDataStruct SiS300_St2LCD1280x1024Data[] = { { 22, 5, 800, 510,1650,1088}, { 22, 5, 800, 510,1650,1088}, @@ -1186,7 +1355,7 @@ { 1, 1,1688,1066,1688,1066} }; -static const SiS300_LCDDataStruct SiS300_NoScaleData1024x768[]= +static const SiS300_LCDDataStruct SiS300_NoScaleData1024x768[] = { { 1, 1, 800, 449, 800, 449}, { 1, 1, 800, 449, 800, 449}, @@ -1198,7 +1367,7 @@ { 1, 1,1688,1066,1688,1066} }; -static const SiS300_LCDDataStruct SiS300_NoScaleData1280x1024[]= /* TW: Fake */ +static const SiS300_LCDDataStruct SiS300_NoScaleData1280x1024[] = /* TW: Fake */ { { 1, 1, 800, 449, 800, 449}, { 1, 1, 800, 449, 800, 449}, @@ -1210,7 +1379,20 @@ { 1, 1,1688,1066,1688,1066} }; -static const SiS300_LCDDataStruct SiS300_LCD1280x960Data[]= +static const SiS300_LCDDataStruct SiS300_NoScaleData[] = +{ + { 1, 1, 800, 449, 800, 449 }, + { 1, 1, 800, 449, 800, 449 }, + { 1, 1, 900, 449, 900, 449 }, + { 1, 1, 900, 449, 900, 449 }, + { 1, 1, 800, 525, 800, 525 }, + { 1, 1,1056, 628,1056, 628 }, + { 1, 1,1344, 806,1344, 806 }, + { 1, 1,1688,1066,1688,1066 }, + { 1, 1,1800,1000,1800,1000 } /* 1280x960 */ +}; + +static const SiS300_LCDDataStruct SiS300_LCD1280x960Data[] = { { 9, 2, 800, 500,1800,1000}, { 9, 2, 800, 500,1800,1000}, @@ -1325,7 +1507,7 @@ UCHAR RY4COE; } SiS300_TVDataStruct; -static const SiS300_TVDataStruct SiS300_StPALData[]= +static const SiS300_TVDataStruct SiS300_StPALData[] = { { 1, 1, 864, 525,1270, 400, 100, 0, 760,0xf4,0xff,0x1c,0x22}, { 1, 1, 864, 525,1270, 350, 100, 0, 760,0xf4,0xff,0x1c,0x22}, @@ -1335,7 +1517,7 @@ { 1, 1, 864, 525,1270, 600, 50, 0, 0,0xf4,0xff,0x1c,0x22} }; -static const SiS300_TVDataStruct SiS300_ExtPALData[]= +static const SiS300_TVDataStruct SiS300_ExtPALData[] = { { 27, 10, 848, 448,1270, 530, 50, 0, 50,0xf4,0xff,0x1c,0x22}, { 108, 35, 848, 398,1270, 530, 50, 0, 50,0xf4,0xff,0x1c,0x22}, @@ -1348,7 +1530,7 @@ }; -static const SiS300_TVDataStruct SiS300_StNTSCData[]= +static const SiS300_TVDataStruct SiS300_StNTSCData[] = { { 1, 1, 858, 525,1270, 400, 50, 0, 760,0xf1,0x04,0x1f,0x18}, { 1, 1, 858, 525,1270, 350, 50, 0, 640,0xf1,0x04,0x1f,0x18}, @@ -1357,7 +1539,7 @@ { 1, 1, 858, 525,1270, 480, 0, 0, 760,0xf1,0x04,0x1f,0x18} }; -static const SiS300_TVDataStruct SiS300_ExtNTSCData[]= +static const SiS300_TVDataStruct SiS300_ExtNTSCData[] = { { 143, 65, 858, 443,1270, 440, 171, 0, 171,0xf1,0x04,0x1f,0x18}, { 88, 35, 858, 393,1270, 440, 171, 0, 171,0xf1,0x04,0x1f,0x18}, @@ -1369,49 +1551,68 @@ { 65, 64,1056, 791,1270, 480, 638, 0, 0,0xf1,0x04,0x1f,0x18} }; -static const SiS_TVDataStruct SiS300_St1HiTVData[]= +#if 0 +static const SiS300_TVDataStruct SiS300_St1HiTVData[]= { - {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00} + }; +#endif -static const SiS_TVDataStruct SiS300_St2HiTVData[]= +static const SiS300_TVDataStruct SiS300_St2HiTVData[]= { - {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00} + { 3, 1, 0x348,0x1e3,0x670,0x3c0,0x032, 0, 0, 0x00,0x00,0x00,0x00}, + { 1, 1, 0x37c,0x233,0x2b2,0x2bc, 0, 0, 0, 0x00,0x00,0x00,0x00}, + { 3, 1, 0x348,0x1e3,0x670,0x3c0,0x032, 0, 0, 0x00,0x00,0x00,0x00}, + { 1, 1, 0x3e8,0x233,0x311,0x2bc, 0, 0, 0, 0x00,0x00,0x00,0x00}, + { 5, 2, 0x348,0x233,0x670,0x3c0,0x08d,128, 0, 0x00,0x00,0x00,0x00}, + { 8, 5, 0x41a,0x2ab,0x670,0x3c0,0x17c,128, 0, 0x00,0x00,0x00,0x00} +}; + +static const SiS300_TVDataStruct SiS300_ExtHiTVData[]= +{ + { 6, 1, 0x348,0x233,0x660,0x3c0, 0, 0, 0, 0x00,0x00,0x00,0x00}, + { 3, 1, 0x3c0,0x233,0x660,0x3c0, 0, 0, 0, 0x00,0x00,0x00,0x00}, + { 3, 1, 0x348,0x1e3,0x660,0x3c0, 0, 0, 0, 0x00,0x00,0x00,0x00}, + { 3, 1, 0x3c0,0x233,0x660,0x3c0, 0, 0, 0, 0x00,0x00,0x00,0x00}, + { 5, 1, 0x348,0x233,0x670,0x3c0,0x166,128, 0, 0x00,0x00,0x00,0x00}, + { 16, 5, 0x41a,0x2ab,0x670,0x3c0,0x143,128, 0, 0x00,0x00,0x00,0x00}, + { 25, 12, 0x4ec,0x353,0x670,0x3c0,0x032, 0, 0, 0x00,0x00,0x00,0x00}, + { 5, 4, 0x627,0x464,0x670,0x3c0,0x128, 0, 0, 0x00,0x00,0x00,0x00}, + { 4, 1, 0x41a,0x233,0x670,0x3c0,0x143,128, 0, 0x00,0x00,0x00,0x00}, + { 5, 2, 0x578,0x293,0x670,0x3c0,0x032, 0, 0, 0x00,0x00,0x00,0x00}, + { 8, 5, 0x6d6,0x323,0x670,0x3c0,0x128, 0, 0, 0x00,0x00,0x00,0x00} }; -static const SiS_TVDataStruct SiS300_ExtHiTVData[]= +static const UCHAR SiS300_NTSCTiming[] = { - {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00} -}; - -static const UCHAR SiS300_NTSCTiming[] = { 0x17,0x1d,0x03,0x09,0x05,0x06,0x0c,0x0c, 0x94,0x49,0x01,0x0a,0x06,0x0d,0x04,0x0a, 0x06,0x14,0x0d,0x04,0x0a,0x00,0x85,0x1b, -/* 0x0c,0x50,0x00,0x97,0x00,0xda,0x4a,0x17, - old */ - 0x0c,0x50,0x00,0x99,0x00,0xec,0x4a,0x17, /* new (2.04.5a) */ -/* 0x7d,0x05,0x4b,0x00,0x00,0xe2,0x00,0x02, - old */ - 0x88,0x00,0x4b,0x00,0x00,0xe2,0x00,0x02, /* new */ + 0x0c,0x50,0x00,0x97,0x00,0xda,0x4a,0x17, /* (in 2.06.50) */ +/* 0x0c,0x50,0x00,0x99,0x00,0xec,0x4a,0x17, (in 2.04.5a) */ + 0x7d,0x05,0x4b,0x00,0x00,0xe2,0x00,0x02, /* (in 2.06.50) */ +/* 0x88,0x00,0x4b,0x00,0x00,0xe2,0x00,0x02, (in 2.04.5a) */ 0x03,0x0a,0x65,0x9d,0x08,0x92,0x8f,0x40, 0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x50, 0x00,0x40,0x44,0x00,0xdb,0x02,0x3b,0x00 }; -static const UCHAR SiS300_PALTiming[] = { +static const UCHAR SiS300_PALTiming[] = +{ 0x19,0x52,0x35,0x6e,0x04,0x38,0x3d,0x70, 0x94,0x49,0x01,0x12,0x06,0x3e,0x35,0x6d, 0x06,0x14,0x3e,0x35,0x6d,0x00,0x45,0x2b, -/* 0x70,0x50,0x00,0x9b,0x00,0xd9,0x5d,0x17, - old */ - 0x70,0x50,0x00,0x97,0x00,0xd7,0x5d,0x17, /* new */ -/* 0x7d,0x05,0x45,0x00,0x00,0xe8,0x00,0x02, -old */ - 0x88,0x00,0x45,0x00,0x00,0xe8,0x00,0x02, /* new */ + 0x70,0x50,0x00,0x9b,0x00,0xd9,0x5d,0x17, /* (in 2.06.50) */ +/* 0x70,0x50,0x00,0x97,0x00,0xd7,0x5d,0x17, (in 2.04.5a) */ + 0x7d,0x05,0x45,0x00,0x00,0xe8,0x00,0x02, /* (in 2.06.50) */ +/* 0x88,0x00,0x45,0x00,0x00,0xe8,0x00,0x02, (in 2.04.5a) */ 0x0d,0x00,0x68,0xb0,0x0b,0x92,0x8f,0x40, 0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x63, 0x00,0x40,0x3e,0x00,0xe1,0x02,0x28,0x00 }; -#ifdef oldHV -static const UCHAR SiS300_HiTVExtTiming[] = { /* TW: New */ +static const UCHAR SiS300_HiTVExtTiming[] = /* TW: New */ +{ 0x32,0x65,0x2c,0x5f,0x08,0x31,0x3a,0x64, 0x28,0x02,0x01,0x3d,0x06,0x3e,0x35,0x6d, 0x06,0x14,0x3e,0x35,0x6d,0x00,0xc5,0x3f, @@ -1422,7 +1623,8 @@ 0x63,0x4f,0x27,0x00,0xfc,0xff,0x6a,0x00 }; -static const UCHAR SiS300_HiTVSt1Timing[] = { /* TW: New */ +static const UCHAR SiS300_HiTVSt1Timing[] = /* TW: New */ +{ 0x32,0x65,0x2c,0x5f,0x08,0x31,0x3a,0x65, 0x28,0x02,0x01,0x3d,0x06,0x3e,0x35,0x6d, 0x06,0x14,0x3e,0x35,0x6d,0x00,0xc5,0x3f, @@ -1433,7 +1635,8 @@ 0xaf,0x5d,0x0e,0x00,0xfc,0xff,0x2d,0x00 }; -static const UCHAR SiS300_HiTVSt2Timing[] = { /* TW: New */ +static const UCHAR SiS300_HiTVSt2Timing[] = /* TW: New */ +{ 0x32,0x65,0x2c,0x5f,0x08,0x31,0x3a,0x64, 0x28,0x02,0x01,0x3d,0x06,0x3e,0x35,0x6d, 0x06,0x14,0x3e,0x35,0x6d,0x00,0xc5,0x3f, @@ -1444,7 +1647,8 @@ 0x63,0x4f,0x27,0x00,0xfc,0xff,0x6a,0x00 }; -static const UCHAR SiS300_HiTVTextTiming[] = { /* TW: New */ +static const UCHAR SiS300_HiTVTextTiming[] = /* TW: New */ +{ 0x32,0x65,0x2c,0x5f,0x08,0x31,0x3a,0x65, 0x28,0x02,0x01,0x3d,0x06,0x3e,0x35,0x6d, 0x06,0x14,0x3e,0x35,0x6d,0x00,0xc5,0x3f, @@ -1455,7 +1659,8 @@ 0x72,0x5c,0x11,0x00,0xfc,0xff,0x32,0x00 }; -static const UCHAR SiS300_HiTVGroup3Data[] = { /* TW: New */ +static const UCHAR SiS300_HiTVGroup3Data[] = /* TW: New */ +{ 0x00,0x1a,0x22,0x63,0x62,0x22,0x08,0x5f, 0x05,0x21,0xb2,0xb2,0x55,0x77,0x2a,0xa6, 0x25,0x2f,0x47,0xfa,0xc8,0xff,0x8e,0x20, @@ -1466,7 +1671,8 @@ 0x18,0x05,0x18,0x05,0x4c,0xa8,0x01 }; -static const UCHAR SiS300_HiTVGroup3Simu[] = { /* TW: New */ +static const UCHAR SiS300_HiTVGroup3Simu[] = /* TW: New */ +{ 0x00,0x1a,0x22,0x63,0x62,0x22,0x08,0x95, 0xdb,0x20,0xb8,0xb8,0x55,0x47,0x2a,0xa6, 0x25,0x2f,0x47,0xfa,0xc8,0xff,0x8e,0x20, @@ -1477,7 +1683,8 @@ 0x18,0x05,0x18,0x05,0x4c,0xa8,0x01 }; -static const UCHAR SiS300_HiTVGroup3Text[] = { /* TW: New */ +static const UCHAR SiS300_HiTVGroup3Text[] = /* TW: New */ +{ 0x00,0x1a,0x22,0x63,0x62,0x22,0x08,0xa7, 0xf5,0x20,0xce,0xce,0x55,0x47,0x2a,0xa6, 0x25,0x2f,0x47,0xfa,0xc8,0xff,0x8e,0x20, @@ -1487,7 +1694,6 @@ 0x01,0x05,0x03,0x7e,0x65,0x31,0x14,0x75, 0x18,0x05,0x18,0x05,0x4c,0xa8,0x01 }; -#endif typedef struct _SiS300_LVDSDataStruct { @@ -1497,7 +1703,7 @@ USHORT LCDVT; } SiS300_LVDSDataStruct; -static const SiS300_LVDSDataStruct SiS300_LVDS320x480Data_1[]= +static const SiS300_LVDSDataStruct SiS300_LVDS320x480Data_1[] = { {848, 433,400, 525}, {848, 389,400, 525}, @@ -1510,7 +1716,7 @@ {800, 525,1000, 635} }; -static const SiS300_LVDSDataStruct SiS300_LVDS800x600Data_1[]= +static const SiS300_LVDSDataStruct SiS300_LVDS800x600Data_1[] = { {848, 433,1060, 629}, {848, 389,1060, 629}, @@ -1523,7 +1729,7 @@ {800, 525,1000, 635} }; -static const SiS300_LVDSDataStruct SiS300_LVDS800x600Data_2[]= +static const SiS300_LVDSDataStruct SiS300_LVDS800x600Data_2[] = { {1056, 628,1056, 628}, {1056, 628,1056, 628}, @@ -1536,7 +1742,7 @@ {800, 525,1000, 635} }; -static const SiS300_LVDSDataStruct SiS300_LVDS1024x768Data_1[]= +static const SiS300_LVDSDataStruct SiS300_LVDS1024x768Data_1[] = { {840, 438,1344, 806}, {840, 409,1344, 806}, @@ -1549,7 +1755,7 @@ {800, 525,1280, 813} }; -static const SiS300_LVDSDataStruct SiS300_LVDS1024x768Data_2[]= +static const SiS300_LVDSDataStruct SiS300_LVDS1024x768Data_2[] = { {1344, 806,1344, 806}, {1344, 806,1344, 806}, @@ -1562,33 +1768,31 @@ {800, 525,1280, 813} }; -static const SiS300_LVDSDataStruct SiS300_LVDS1280x1024Data_1[]= -{ - {840, 438,1344, 806}, - {840, 409,1344, 806}, - {840, 438,1344, 806}, - {840, 409,1344, 806}, - {840, 518,1344, 806}, - {1050, 638,1344, 806}, - {1344, 806,1344, 806}, - {800, 449,1280, 801}, - {800, 525,1280, 813} +static const SiS300_LVDSDataStruct SiS300_LVDS1280x1024Data_1[]= +{ + {1048, 442,1688,1066}, + {1048, 392,1688,1066}, + {1048, 442,1688,1066}, + {1048, 392,1688,1066}, + {1048, 522,1688,1066}, + {1208, 642,1688,1066}, + {1432, 810,1688,1066}, + {1688,1066,1688,1066} +}; + +static const SiS300_LVDSDataStruct SiS300_LVDS1280x1024Data_2[]= +{ + {1688,1066,1688,1066}, + {1688,1066,1688,1066}, + {1688,1066,1688,1066}, + {1688,1066,1688,1066}, + {1688,1066,1688,1066}, + {1688,1066,1688,1066}, + {1688,1066,1688,1066}, + {1688,1066,1688,1066} }; -static const SiS300_LVDSDataStruct SiS300_LVDS1280x1024Data_2[]= -{ - {1344, 806,1344, 806}, - {1344, 806,1344, 806}, - {1344, 806,1344, 806}, - {1344, 806,1344, 806}, - {1344, 806,1344, 806}, - {1344, 806,1344, 806}, - {1344, 806,1344, 806}, - {800, 449,1280, 801}, - {800, 525,1280, 813} -}; - -static const SiS300_LVDSDataStruct SiS300_LVDS1400x1050Data_1[]= /* TW: New */ +static const SiS300_LVDSDataStruct SiS300_LVDS1400x1050Data_1[] = { {928, 416, 1688, 1066}, {928, 366, 1688, 1066}, @@ -1601,7 +1805,7 @@ {1688, 1066, 1688, 1066} }; -static const SiS300_LVDSDataStruct SiS300_LVDS1400x1050Data_2[]= /* TW: New */ +static const SiS300_LVDSDataStruct SiS300_LVDS1400x1050Data_2[] = { {1688,1066, 1688,1066}, {1688,1066, 1688,1066}, @@ -1614,8 +1818,61 @@ {1688,1066, 1688,1066}, }; -/* TW: New: */ -static const SiS300_LVDSDataStruct SiS300_LVDS1024x600Data_1[]= +static const SiS300_LVDSDataStruct SiS300_LVDS1600x1200Data_1[]= +{ + {1088, 450, 2048,1250}, + {1088, 400, 2048,1250}, + {1088, 450, 2048,1250}, + {1088, 400, 2048,1250}, + {1088, 530, 2048,1250}, + {1248, 650, 2048,1250}, + {1472, 818, 2048,1250}, + {1728,1066, 2048,1250}, + {1848,1066, 2048,1250}, + {2048,1250, 2048,1250} +}; + +static const SiS300_LVDSDataStruct SiS300_LVDS1600x1200Data_2[]= +{ + {2048,1250, 2048,1250}, + {2048,1250, 2048,1250}, + {2048,1250, 2048,1250}, + {2048,1250, 2048,1250}, + {2048,1250, 2048,1250}, + {2048,1250, 2048,1250}, + {2048,1250, 2048,1250}, + {2048,1250, 2048,1250}, + {2048,1250, 2048,1250}, + {2048,1250, 2048,1250} +}; + +static const SiS300_LVDSDataStruct SiS300_LVDS1280x768Data_1[]= +{ + { 768, 438, 1408, 806}, + { 768, 388, 1408, 806}, + { 768, 438, 1408, 806}, + { 768, 388, 1408, 806}, + { 768, 518, 1408, 806}, + { 928, 638, 1408, 806}, + {1152, 806, 1408, 806}, + {1408, 806, 1408, 806}, + {1408, 806, 1408, 806} +}; + +static const SiS300_LVDSDataStruct SiS300_LVDS1280x768Data_2[]= +{ + {1408, 806, 1408, 806}, + {1408, 806, 1408, 806}, + {1408, 806, 1408, 806}, + {1408, 806, 1408, 806}, + {1408, 806, 1408, 806}, + {1408, 806, 1408, 806}, + {1408, 806, 1408, 806}, + {1408, 806, 1408, 806}, + {1408, 806, 1408, 806} +}; + +static const SiS300_LVDSDataStruct SiS300_LVDS1024x600Data_1[] = { {840, 604,1344, 800}, {840, 560,1344, 800}, @@ -1628,8 +1885,7 @@ {800, 525,1280, 785} }; -/* TW: New: */ -static const SiS300_LVDSDataStruct SiS300_LVDS1024x600Data_2[]= +static const SiS300_LVDSDataStruct SiS300_LVDS1024x600Data_2[] = { {1344, 800,1344, 800}, {1344, 800,1344, 800}, @@ -1642,8 +1898,7 @@ {800, 525,1280, 813} }; -/* TW: New: */ -static const SiS300_LVDSDataStruct SiS300_LVDS1152x768Data_1[]= +static const SiS300_LVDSDataStruct SiS300_LVDS1152x768Data_1[] = { {840, 438,1344, 806}, {840, 409,1344, 806}, @@ -1656,8 +1911,7 @@ {800, 525,1280, 813} }; -/* TW: New: */ -static const SiS300_LVDSDataStruct SiS300_LVDS1152x768Data_2[]= +static const SiS300_LVDSDataStruct SiS300_LVDS1152x768Data_2[] = { {1344, 806,1344, 806}, {1344, 806,1344, 806}, @@ -1670,20 +1924,22 @@ {800, 525,1280, 813} }; -/* TW: New in 650/LVDS BIOS - resolution unknown */ -static const SiS300_LVDSDataStruct SiS300_LVDSXXXxXXXData_1[]= /* TW: New */ +/* TW: pass 1:1 data */ +static const SiS300_LVDSDataStruct SiS300_LVDSXXXxXXXData_1[]= { - { 800, 449, 800, 449}, - { 800, 449, 800, 449}, - { 900, 449, 900, 449}, - { 900, 449, 900, 449}, - { 800, 525, 800, 525}, - {1056, 628,1056, 628}, - {1344, 806,1344, 806}, - {1688, 806,1688, 806} + { 800, 449, 800, 449}, + { 800, 449, 800, 449}, + { 900, 449, 900, 449}, + { 900, 449, 900, 449}, + { 800, 525, 800, 525}, /* 640x480 */ + {1056, 628, 1056, 628}, /* 800x600 */ + {1344, 806, 1344, 806}, /* 1024x768 */ + {1344,1066, 1344,1066}, /* 1280x1024 */ /* INSERTED ! */ + {1688, 806, 1688, 806}, /* 1280x768 ! */ + /* No other panels ! */ }; -static const SiS300_LVDSDataStruct SiS300_LVDS640x480Data_1[]= +static const SiS300_LVDSDataStruct SiS300_LVDS640x480Data_1[] = { {800, 449, 800, 449}, {800, 449, 800, 449}, @@ -1696,7 +1952,7 @@ {1056, 628,1056, 628} }; -static const SiS300_LVDSDataStruct SiS300_LVDS1280x960Data_1[]= /* TW: New */ +static const SiS300_LVDSDataStruct SiS300_LVDS1280x960Data_1[] = /* TW: New */ { {840, 438,1344, 806}, {840, 409,1344, 806}, @@ -1709,7 +1965,7 @@ {800, 525,1280, 813} }; -static const SiS300_LVDSDataStruct SiS300_LVDS1280x960Data_2[]= /* TW: New */ +static const SiS300_LVDSDataStruct SiS300_LVDS1280x960Data_2[] = /* TW: New */ { {1344, 806,1344, 806}, {1344, 806,1344, 806}, @@ -1722,7 +1978,7 @@ {800, 525,1280, 813} }; -static const SiS300_LVDSDataStruct SiS300_LCDA1400x1050Data_1[]= /* TW: New */ +static const SiS300_LVDSDataStruct SiS300_LCDA1400x1050Data_1[] = /* TW: New */ { /* TW: Might be temporary (invalid) data */ {928, 416, 1688, 1066}, {928, 366, 1688, 1066}, @@ -1735,7 +1991,7 @@ {1688, 1066, 1688, 1066} }; -static const SiS300_LVDSDataStruct SiS300_LCDA1400x1050Data_2[]= /* TW: New */ +static const SiS300_LVDSDataStruct SiS300_LCDA1400x1050Data_2[] = /* TW: New */ { /* TW: Temporary data. Not valid */ {1344, 806,1344, 806}, {1344, 806,1344, 806}, @@ -1748,7 +2004,7 @@ {800, 525,1280, 813} }; -static const SiS300_LVDSDataStruct SiS300_LCDA1600x1200Data_1[]= /* TW: New */ +static const SiS300_LVDSDataStruct SiS300_LCDA1600x1200Data_1[] = /* TW: New */ { /* TW: Temporary data. Not valid */ {1344, 806,1344, 806}, {1344, 806,1344, 806}, @@ -1761,7 +2017,7 @@ {800, 525,1280, 813} }; -static const SiS300_LVDSDataStruct SiS300_LCDA1600x1200Data_2[]= /* TW: New */ +static const SiS300_LVDSDataStruct SiS300_LCDA1600x1200Data_2[] = /* TW: New */ { /* TW: Temporary data. Not valid */ {0, 0, 0, 0}, {0, 0, 0, 0}, @@ -1779,7 +2035,7 @@ /* TW: New: */ -static const SiS300_LVDSDataStruct SiS300_CHTVUNTSCData[]= +static const SiS300_LVDSDataStruct SiS300_CHTVUNTSCData[] = { {840, 600, 840, 600}, {840, 600, 840, 600}, @@ -1789,7 +2045,7 @@ {1064, 750,1064, 750} }; -static const SiS300_LVDSDataStruct SiS300_CHTVONTSCData[]= +static const SiS300_LVDSDataStruct SiS300_CHTVONTSCData[] = { {840, 525, 840, 525}, {840, 525, 840, 525}, @@ -1799,7 +2055,7 @@ {1040, 700,1040, 700} }; -static const SiS300_LVDSDataStruct SiS300_CHTVUPALData[]= +static const SiS300_LVDSDataStruct SiS300_CHTVUPALData[] = { {1008, 625,1008, 625}, {1008, 625,1008, 625}, @@ -1809,7 +2065,7 @@ {936, 836, 936, 836} }; -static const SiS300_LVDSDataStruct SiS300_CHTVOPALData[]= +static const SiS300_LVDSDataStruct SiS300_CHTVOPALData[] = { {1008, 625,1008, 625}, {1008, 625,1008, 625}, @@ -1818,6 +2074,17 @@ {840, 625, 840, 625}, {960, 750, 960, 750} }; + +static const SiS300_LVDSDataStruct SiS300_CHTVSOPALData[] = +{ + {1008, 625,1008, 625}, + {1008, 625,1008, 625}, + {1008, 625,1008, 625}, + {1008, 625,1008, 625}, + {840, 500, 840, 500}, + {944, 625, 944, 625} +}; + /* TW: new end */ typedef struct _SiS300_LVDSDesStruct @@ -1826,7 +2093,7 @@ USHORT LCDVDES; } SiS300_LVDSDesStruct; -static const SiS300_LVDSDesStruct SiS300_PanelType00_1[]= +static const SiS300_LVDSDesStruct SiS300_PanelType00_1[] = { {0, 626}, {0, 624}, @@ -1839,7 +2106,7 @@ { 0, 0} }; -static const SiS300_LVDSDesStruct SiS300_PanelType01_1[]= +static const SiS300_LVDSDesStruct SiS300_PanelType01_1[] = { {1343, 798}, {1343, 794}, @@ -1852,7 +2119,7 @@ { 0, 0} }; -static const SiS300_LVDSDesStruct SiS300_PanelType02_1[]= +static const SiS300_LVDSDesStruct SiS300_PanelType02_1[] = { {0, 626}, {0, 624}, @@ -1865,7 +2132,7 @@ { 0, 0} }; -static const SiS300_LVDSDesStruct SiS300_PanelType03_1[]= +static const SiS300_LVDSDesStruct SiS300_PanelType03_1[] = { { 8, 436}, { 8, 440}, @@ -1878,7 +2145,7 @@ {1343, 794} }; -static const SiS300_LVDSDesStruct SiS300_PanelType04_1[]= +static const SiS300_LVDSDesStruct SiS300_PanelType04_1[] = { {1343, 798}, {1343, 794}, @@ -1891,7 +2158,7 @@ { 0, 0} }; -static const SiS300_LVDSDesStruct SiS300_PanelType05_1[]= +static const SiS300_LVDSDesStruct SiS300_PanelType05_1[] = { {1343, 798}, {1343, 794}, @@ -1904,7 +2171,7 @@ { 0, 0} }; -static const SiS300_LVDSDesStruct SiS300_PanelType06_1[]= +static const SiS300_LVDSDesStruct SiS300_PanelType06_1[] = { {1343, 798}, {1343, 794}, @@ -1917,7 +2184,7 @@ { 0, 0} }; -static const SiS300_LVDSDesStruct SiS300_PanelType07_1[]= +static const SiS300_LVDSDesStruct SiS300_PanelType07_1[] = { {1343, 798}, {1343, 794}, @@ -1930,7 +2197,7 @@ { 0, 0} }; -static const SiS300_LVDSDesStruct SiS300_PanelType08_1[]= +static const SiS300_LVDSDesStruct SiS300_PanelType08_1[] = { {1059, 626}, {1059, 624}, @@ -1943,7 +2210,7 @@ { 0, 0} }; -static const SiS300_LVDSDesStruct SiS300_PanelType09_1[]= +static const SiS300_LVDSDesStruct SiS300_PanelType09_1[] = { {1343, 798}, {1343, 794}, @@ -1956,7 +2223,7 @@ { 0, 0} }; -static const SiS300_LVDSDesStruct SiS300_PanelType0a_1[]= +static const SiS300_LVDSDesStruct SiS300_PanelType0a_1[] = { {1059, 626}, {1059, 624}, @@ -1969,7 +2236,7 @@ { 0, 0} }; -static const SiS300_LVDSDesStruct SiS300_PanelType0b_1[]= +static const SiS300_LVDSDesStruct SiS300_PanelType0b_1[] = { {1343, 0}, {1343, 0}, @@ -1982,7 +2249,7 @@ { 0, 0} }; -static const SiS300_LVDSDesStruct SiS300_PanelType0c_1[]= +static const SiS300_LVDSDesStruct SiS300_PanelType0c_1[] = { {1343, 798}, {1343, 794}, @@ -1995,7 +2262,7 @@ { 0, 0} }; -static const SiS300_LVDSDesStruct SiS300_PanelType0d_1[]= +static const SiS300_LVDSDesStruct SiS300_PanelType0d_1[] = { {1343, 798}, {1343, 794}, @@ -2008,7 +2275,7 @@ { 0, 0} }; -static const SiS300_LVDSDesStruct SiS300_PanelType0e_1[]= +static const SiS300_LVDSDesStruct SiS300_PanelType0e_1[] = { {1343, 798}, {1343, 794}, @@ -2021,7 +2288,7 @@ { 0, 0} /* 1280x960 - not applicable */ }; -static const SiS300_LVDSDesStruct SiS300_PanelType0f_1[]= +static const SiS300_LVDSDesStruct SiS300_PanelType0f_1[] = { {1343, 798}, {1343, 794}, @@ -2034,7 +2301,7 @@ { 0, 0} }; -static const SiS300_LVDSDesStruct SiS300_PanelType00_2[]= +static const SiS300_LVDSDesStruct SiS300_PanelType00_2[] = { {976, 527}, {976, 502}, @@ -2047,7 +2314,7 @@ { 0, 0} }; -static const SiS300_LVDSDesStruct SiS300_PanelType01_2[]= +static const SiS300_LVDSDesStruct SiS300_PanelType01_2[] = { {1152, 622}, {1152, 597}, @@ -2060,7 +2327,7 @@ { 0, 0} }; -static const SiS300_LVDSDesStruct SiS300_PanelType02_2[]= +static const SiS300_LVDSDesStruct SiS300_PanelType02_2[] = { {976, 527}, {976, 502}, @@ -2073,7 +2340,7 @@ { 0, 0} }; -static const SiS300_LVDSDesStruct SiS300_PanelType03_2[]= +static const SiS300_LVDSDesStruct SiS300_PanelType03_2[] = { {1152, 622}, {1152, 597}, @@ -2086,7 +2353,7 @@ {1152, 597} }; -static const SiS300_LVDSDesStruct SiS300_PanelType04_2[]= +static const SiS300_LVDSDesStruct SiS300_PanelType04_2[] = { {1152, 622}, {1152, 597}, @@ -2099,7 +2366,7 @@ { 0, 0} }; -static const SiS300_LVDSDesStruct SiS300_PanelType05_2[]= +static const SiS300_LVDSDesStruct SiS300_PanelType05_2[] = { {1152, 622}, {1152, 597}, @@ -2112,7 +2379,7 @@ { 0, 0} }; -static const SiS300_LVDSDesStruct SiS300_PanelType06_2[]= +static const SiS300_LVDSDesStruct SiS300_PanelType06_2[] = { {1152, 622}, {1152, 597}, @@ -2125,7 +2392,7 @@ { 0, 0} }; -static const SiS300_LVDSDesStruct SiS300_PanelType07_2[]= +static const SiS300_LVDSDesStruct SiS300_PanelType07_2[] = { {1152, 622}, {1152, 597}, @@ -2138,7 +2405,7 @@ { 0, 0} }; -static const SiS300_LVDSDesStruct SiS300_PanelType08_2[]= +static const SiS300_LVDSDesStruct SiS300_PanelType08_2[] = { {976, 527}, {976, 502}, @@ -2151,7 +2418,7 @@ { 0, 0} }; -static const SiS300_LVDSDesStruct SiS300_PanelType09_2[]= +static const SiS300_LVDSDesStruct SiS300_PanelType09_2[] = { {1152, 622}, {1152, 597}, @@ -2164,7 +2431,7 @@ { 0, 0} }; -static const SiS300_LVDSDesStruct SiS300_PanelType0a_2[]= +static const SiS300_LVDSDesStruct SiS300_PanelType0a_2[] = { {976, 527}, {976, 502}, @@ -2177,7 +2444,7 @@ { 0, 0} }; -static const SiS300_LVDSDesStruct SiS300_PanelType0b_2[]= +static const SiS300_LVDSDesStruct SiS300_PanelType0b_2[] = { { 1152, 700}, { 1152, 675}, @@ -2190,7 +2457,7 @@ { 0, 0} }; -static const SiS300_LVDSDesStruct SiS300_PanelType0c_2[]= +static const SiS300_LVDSDesStruct SiS300_PanelType0c_2[] = { {1152, 622}, {1152, 597}, @@ -2203,7 +2470,7 @@ { 0, 0} }; -static const SiS300_LVDSDesStruct SiS300_PanelType0d_2[]= +static const SiS300_LVDSDesStruct SiS300_PanelType0d_2[] = { {1152, 622}, {1152, 597}, @@ -2216,7 +2483,7 @@ { 0, 0} }; -static const SiS300_LVDSDesStruct SiS300_PanelType0e_2[]= +static const SiS300_LVDSDesStruct SiS300_PanelType0e_2[] = { {1152, 622}, {1152, 597}, @@ -2229,7 +2496,7 @@ { 0, 0} }; -static const SiS300_LVDSDesStruct SiS300_PanelType0f_2[]= +static const SiS300_LVDSDesStruct SiS300_PanelType0f_2[] = { {1152, 622}, {1152, 597}, @@ -2242,7 +2509,35 @@ { 0, 0} }; -static const SiS300_LVDSDesStruct SiS300_PanelType1076_1[]= /* TW: New */ +static const SiS300_LVDSDesStruct SiS300_PanelTypeNS_1[]= +{ + { 8, 0}, + { 8, 0}, + { 8, 0}, + { 8, 0}, + { 8, 0}, + { 0, 0}, + { 0, 0}, + { 0, 0}, + { 0, 806}, + { 0, 0 } +}; + +static const SiS300_LVDSDesStruct SiS300_PanelTypeNS_2[] = +{ + { 0 , 0}, + { 0 , 0}, + { 0 , 0}, + { 0 , 0}, + { 0 , 0}, + { 0 , 0}, + { 0 , 0}, + { 0 , 0}, + { 0 , 0}, + { 0 , 0} +}; + +static const SiS300_LVDSDesStruct SiS300_PanelType1076_1[] = /* TW: New */ { { 0 , 0}, { 0 , 0}, @@ -2255,7 +2550,7 @@ { 0 , 0} }; -static const SiS300_LVDSDesStruct SiS300_PanelType1076_2[]= /* TW: New */ +static const SiS300_LVDSDesStruct SiS300_PanelType1076_2[] = /* TW: New */ { { 1152, 622 }, { 1152, 597 }, @@ -2268,7 +2563,7 @@ { 0, 0 } }; -static const SiS300_LVDSDesStruct SiS300_PanelType1210_1[]= /* TW: New */ +static const SiS300_LVDSDesStruct SiS300_PanelType1210_1[] = /* TW: New */ { { 0 , 0}, { 0 , 0}, @@ -2281,7 +2576,7 @@ { 0 , 0} }; -static const SiS300_LVDSDesStruct SiS300_PanelType1210_2[]= /* TW: New */ +static const SiS300_LVDSDesStruct SiS300_PanelType1210_2[] = /* TW: New */ { { 0 , 0}, { 0 , 0}, @@ -2294,7 +2589,7 @@ { 0 , 0} }; -static const SiS300_LVDSDesStruct SiS300_PanelType1296_1[]= /* TW: New */ +static const SiS300_LVDSDesStruct SiS300_PanelType1296_1[] = /* TW: New */ { { 0 , 0}, { 0 , 0}, @@ -2307,7 +2602,7 @@ { 0 , 0} }; -static const SiS300_LVDSDesStruct SiS300_PanelType1296_2[]= /* TW: New */ +static const SiS300_LVDSDesStruct SiS300_PanelType1296_2[] = /* TW: New */ { { 0 , 0}, { 0 , 0}, @@ -2322,7 +2617,7 @@ /* TW: New */ -static const SiS300_LVDSDesStruct SiS300_CHTVUNTSCDesData[]= +static const SiS300_LVDSDesStruct SiS300_CHTVUNTSCDesData[] = { { 0, 0}, { 0, 0}, @@ -2332,7 +2627,7 @@ { 0, 0} }; -static const SiS300_LVDSDesStruct SiS300_CHTVONTSCDesData[]= +static const SiS300_LVDSDesStruct SiS300_CHTVONTSCDesData[] = { { 0, 0}, { 0, 0}, @@ -2342,7 +2637,7 @@ { 0, 0} }; -static const SiS300_LVDSDesStruct SiS300_CHTVUPALDesData[]= +static const SiS300_LVDSDesStruct SiS300_CHTVUPALDesData[] = { {256, 0}, {256, 0}, @@ -2352,7 +2647,7 @@ { 0, 0} }; -static const SiS300_LVDSDesStruct SiS300_CHTVOPALDesData[]= +static const SiS300_LVDSDesStruct SiS300_CHTVOPALDesData[] = { {256, 0}, {256, 0}, @@ -2363,12 +2658,90 @@ }; /* TW: New end */ +/* TW: New for SiS300+301LV */ +typedef struct _SiS300_Part2PortTblStruct +{ + UCHAR CR[12]; +} SiS300_Part2PortTblStruct; + +static const SiS300_Part2PortTblStruct SiS300_CRT2Part2_1024x768_1[] = +{ /* VESA Timing */ + {{0x21,0x12,0xbf,0xe4,0xc0,0x21,0x45,0x09,0x00,0xa9,0x09,0x04}}, + {{0x2c,0x12,0x9a,0xae,0x88,0x21,0x45,0x09,0x00,0xa9,0x09,0x04}}, + {{0x21,0x12,0xbf,0xe4,0xc0,0x21,0x45,0x09,0x00,0xa9,0x09,0x04}}, + {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}, + {{0x22,0x13,0xfe,0x25,0xff,0x21,0x45,0x0a,0x00,0xa9,0x0d,0x04}}, + {{0x22,0x13,0xfe,0x25,0xff,0x21,0x45,0x0a,0x00,0xa9,0x0d,0x04}}, + {{0x22,0x13,0xfe,0x25,0xff,0x21,0x45,0x0a,0x00,0xa9,0x0d,0x04}} +}; + +static const SiS300_Part2PortTblStruct SiS300_CRT2Part2_1280x1024_1[] = +{ /* TW: Temporary data, invalid */ + {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}} +}; + +static const SiS300_Part2PortTblStruct SiS300_CRT2Part2_1400x1050_1[] = +{ /* TW: Temporary data, invalid */ + {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}} +}; + +static const SiS300_Part2PortTblStruct SiS300_CRT2Part2_1600x1200_1[] = +{ /* TW: Temporary data, invalid */ + {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}} +}; + +static const SiS300_Part2PortTblStruct SiS300_CRT2Part2_1024x768_2[] = +{ /* Non-VESA */ + {{0x28,0x12,0xa3,0xd0,0xaa,0x5a,0x45,0x0a,0x07,0xfa,0x0a,0x24}}, + {{0x2c,0x12,0x9a,0xae,0x88,0x5a,0x45,0x0a,0x07,0xfa,0x0a,0x24}}, + {{0x28,0x12,0xa3,0xd0,0xaa,0x5a,0x45,0x0a,0x07,0xfa,0x0a,0x24}}, + {{0x2c,0x12,0x9a,0xae,0x88,0x5a,0x45,0x0a,0x07,0xfa,0x0a,0x24}}, + {{0x28,0x13,0xe7,0x0b,0xe8,0x5a,0x45,0x0a,0x07,0xfa,0x0a,0x24}}, + {{0x38,0x18,0x16,0x00,0x00,0x5a,0x45,0x0a,0x07,0xfa,0x0a,0x24}}, + {{0x36,0x13,0x13,0x25,0xff,0x5a,0x45,0x0a,0x07,0xfa,0x0a,0x24}} +}; + +static const SiS300_Part2PortTblStruct SiS300_CRT2Part2_1280x1024_2[] = +{ + {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}} +}; + +static const SiS300_Part2PortTblStruct SiS300_CRT2Part2_1400x1050_2[] = +{ + {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}} +}; + +static const SiS300_Part2PortTblStruct SiS300_CRT2Part2_1600x1200_2[] = +{ /* TW: Temporary data, invalid */ + {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}} +}; + +static const SiS300_Part2PortTblStruct SiS300_CRT2Part2_1024x768_3[] = +{ /* TW: Temporary data, invalid */ + {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}} +}; + +static const SiS300_Part2PortTblStruct SiS300_CRT2Part2_1280x1024_3[] = +{ /* TW: Temporary data, invalid */ + {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}} +}; + +static const SiS300_Part2PortTblStruct SiS300_CRT2Part2_1400x1050_3[] = +{ /* TW: Temporary data, invalid */ + {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}} +}; + +static const SiS300_Part2PortTblStruct SiS300_CRT2Part2_1600x1200_3[] = +{ /* TW: Temporary data, invalid */ + {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}} +}; + typedef struct _SiS300_LVDSCRT1DataStruct { UCHAR CR[15]; } SiS300_LVDSCRT1DataStruct; -static const SiS300_LVDSCRT1DataStruct SiS300_LVDSCRT1800x600_1[]= +static const SiS300_LVDSCRT1DataStruct SiS300_LVDSCRT1800x600_1[] = { {{0x65,0x4f,0x89,0x56,0x83,0xaf,0x1f, 0x90,0x85,0x8f,0xab,0x30,0x00,0x05, @@ -2390,7 +2763,29 @@ 0x01 }} }; -static const SiS300_LVDSCRT1DataStruct SiS300_LVDSCRT11024x768_1[]= +static const SiS300_LVDSCRT1DataStruct SiS300_LVDSCRT1800x600_1_H[] = +{ + {{0x30,0x27,0x94,0x2c,0x92,0xaf,0x1f, + 0x90,0x85,0x8f,0xab,0x30,0x00,0x04, + 0x00 }}, + {{0x30,0x27,0x94,0x2c,0x92,0x83,0x1f, + 0x5e,0x83,0x5d,0x79,0x10,0x00,0x04, + 0x00 }}, + {{0x30,0x27,0x94,0x2c,0x92,0xaf,0x1f, + 0x90,0x85,0x8f,0xab,0x30,0x00,0x04, + 0x00 }}, + {{0x30,0x27,0x94,0x2c,0x92,0x83,0x1f, + 0x5e,0x83,0x5d,0x79,0x10,0x00,0x04, + 0x00 }}, + {{0x30,0x27,0x94,0x2c,0x92,0x04,0x3e, + 0xe0,0x85,0xdf,0xfb,0x10,0x00,0x04, + 0x00 }}, + {{0x3d,0x31,0x81,0x37,0x1f,0x72,0xf0, + 0x58,0x8c,0x57,0x73,0x20,0x00,0x05, + 0x01 }} +}; + +static const SiS300_LVDSCRT1DataStruct SiS300_LVDSCRT11024x768_1[] = { {{0x64,0x4f,0x88,0x54,0x9f,0xc4,0x1f, 0x92,0x89,0x8f,0xb5,0x30,0x00,0x01, @@ -2412,58 +2807,34 @@ 0x01}}, {{0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5, 0x02,0x88,0xff,0x25,0x10,0x00,0x02, - 0x01} } -}; - -static const SiS300_LVDSCRT1DataStruct SiS300_LVDSCRT11280x1024_1[]= -{ - {{0x63,0x4f,0x87,0x54,0x9f,0xb4,0x1f, - 0x92,0x89,0x8f,0xb5,0x30,0x00,0x01, - 0x00 }}, - {{0x63,0x4f,0x87,0x54,0x9f,0x82,0x1f, - 0x60,0x87,0x5d,0x83,0x10,0x00,0x01, - 0x00 }}, - {{0x63,0x4f,0x87,0x54,0x9f,0xb4,0x1f, - 0x92,0x89,0x8f,0xb5,0x30,0x00,0x01, - 0x00 }}, - {{0x63,0x4f,0x87,0x54,0x9f,0x82,0x1f, - 0x60,0x87,0x5d,0x83,0x10,0x00,0x01, - 0x00 }}, - {{0x63,0x4f,0x87,0x54,0x9f,0x04,0x3e, - 0xe2,0x89,0xdf,0x05,0x00,0x00,0x01, - 0x00 }}, - {{0x7e,0x63,0x82,0x68,0x15,0x7c,0xf0, - 0x5a,0x8f,0x57,0x7d,0x20,0x00,0x26, - 0x01 }}, - {{0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5, - 0x02,0x88,0xff,0x25,0x10,0x00,0x02, - 0x01 }} + 0x01}} }; -static const SiS300_LVDSCRT1DataStruct SiS300_LVDSCRT1800x600_1_H[]= +static const SiS300_LVDSCRT1DataStruct SiS300_LVDSCRT11024x768_1_H[] = { - {{0x30,0x27,0x94,0x2c,0x92,0xaf,0x1f, - 0x90,0x85,0x8f,0xab,0x30,0x00,0x04, - 0x00 }}, - {{0x30,0x27,0x94,0x2c,0x92,0x83,0x1f, - 0x5e,0x83,0x5d,0x79,0x10,0x00,0x04, - 0x00 }}, - {{0x30,0x27,0x94,0x2c,0x92,0xaf,0x1f, - 0x90,0x85,0x8f,0xab,0x30,0x00,0x04, - 0x00 }}, - {{0x30,0x27,0x94,0x2c,0x92,0x83,0x1f, - 0x5e,0x83,0x5d,0x79,0x10,0x00,0x04, - 0x00 }}, - {{0x30,0x27,0x94,0x2c,0x92,0x04,0x3e, - 0xe0,0x85,0xdf,0xfb,0x10,0x00,0x04, + {{0x2f,0x27,0x93,0x2b,0x90,0xc4,0x1f, + 0x92,0x89,0x8f,0xb5,0x30,0x00,0x44, 0x00 }}, - {{0x3d,0x31,0x81,0x37,0x1f,0x72,0xf0, - 0x58,0x8c,0x57,0x73,0x20,0x00,0x05, + {{0x2f,0x27,0x93,0x2b,0x90,0x97,0x1f, + 0x60,0x87,0x5D,0x83,0x10,0x00,0x44, + 0x00}}, + {{0x2f,0x27,0x93,0x2b,0x90,0xc4,0x1f, + 0x92,0x89,0x8f,0xb5,0x30,0x00,0x44, + 0x00}}, + {{0x2f,0x27,0x93,0x2b,0x90,0x97,0x1f, + 0x60,0x87,0x5D,0x83,0x10,0x00,0x44, + 0x00}}, + {{0x2f,0x27,0x93,0x2b,0x90,0x04,0x3e, + 0xE2,0x89,0xdf,0x05,0x00,0x00,0x44, + 0x00}}, + {{0x3c,0x31,0x80,0x35,0x1c,0x7c,0xf0, + 0x5A,0x8F,0x57,0x7D,0x20,0x00,0x55, + 0x01}}, + {{0x4f,0x3F,0x93,0x45,0x0D,0x24,0xf5, + 0x02,0x88,0xff,0x25,0x10,0x00,0x01, 0x01 }} -}; -static const SiS300_LVDSCRT1DataStruct SiS300_LVDSCRT11024x768_1_H[]= -{ +#if 0 {{0x37,0x27,0x9B,0x2b,0x94,0xc4,0x1f, 0x92,0x89,0x8f,0xb5,0x30,0x00,0x44, 0x00 }}, @@ -2485,9 +2856,35 @@ {{0x4f,0x3F,0x93,0x45,0x0D,0x24,0xf5, 0x02,0x88,0xFf,0x25,0x10,0x00,0x01, 0x01 }} +#endif +}; + +static const SiS300_LVDSCRT1DataStruct SiS300_LVDSCRT11280x1024_1[] = +{ + {{0x63,0x4f,0x87,0x54,0x9f,0xb4,0x1f, + 0x92,0x89,0x8f,0xb5,0x30,0x00,0x01, + 0x00 }}, + {{0x63,0x4f,0x87,0x54,0x9f,0x82,0x1f, + 0x60,0x87,0x5d,0x83,0x10,0x00,0x01, + 0x00 }}, + {{0x63,0x4f,0x87,0x54,0x9f,0xb4,0x1f, + 0x92,0x89,0x8f,0xb5,0x30,0x00,0x01, + 0x00 }}, + {{0x63,0x4f,0x87,0x54,0x9f,0x82,0x1f, + 0x60,0x87,0x5d,0x83,0x10,0x00,0x01, + 0x00 }}, + {{0x63,0x4f,0x87,0x54,0x9f,0x04,0x3e, + 0xe2,0x89,0xdf,0x05,0x00,0x00,0x01, + 0x00 }}, + {{0x7e,0x63,0x82,0x68,0x15,0x7c,0xf0, + 0x5a,0x8f,0x57,0x7d,0x20,0x00,0x26, + 0x01 }}, + {{0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5, + 0x02,0x88,0xff,0x25,0x10,0x00,0x02, + 0x01 }} }; -static const SiS300_LVDSCRT1DataStruct SiS300_LVDSCRT11280x1024_1_H[]= +static const SiS300_LVDSCRT1DataStruct SiS300_LVDSCRT11280x1024_1_H[] = { {{0x2f,0x27,0x93,0x2b,0x90,0xb4,0x1f, 0x92,0x89,0x8f,0xb5,0x30,0x00,0x04, @@ -2512,7 +2909,7 @@ 0x01 }} }; -static const SiS300_LVDSCRT1DataStruct SiS300_LVDSCRT1800x600_2[]= +static const SiS300_LVDSCRT1DataStruct SiS300_LVDSCRT1800x600_2[] = { {{0x7f,0x4f,0x83,0x62,0x12,0x72,0x3e, 0xf4,0x88,0x8f,0x73,0x20,0x00,0x06, @@ -2534,32 +2931,29 @@ 0x01 }} }; -static const SiS300_LVDSCRT1DataStruct SiS300_LVDSCRT11024x768_2[]= +static const SiS300_LVDSCRT1DataStruct SiS300_LVDSCRT1800x600_2_H[] = { - {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb, - 0x4a,0x80,0x8f,0x25,0x30,0x00,0x06, + {{0x3d,0x27,0x81,0x32,0x1a,0x72,0x3e, + 0xf4,0x88,0x8f,0x73,0x20,0x00,0x05, 0x00 }}, - {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb, - 0x31,0x87,0x5d,0x25,0x30,0x00,0x06, + {{0x3d,0x27,0x81,0x32,0x1a,0x72,0x3e, + 0xdb,0x8f,0x5d,0x73,0x20,0x00,0x05, 0x00 }}, - {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb, - 0x4a,0x80,0x8f,0x25,0x30,0x00,0x06, + {{0x3d,0x27,0x81,0x32,0x1a,0x72,0x3e, + 0xf4,0x88,0x8f,0x73,0x20,0x00,0x05, 0x00 }}, - {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb, - 0x31,0x87,0x5d,0x25,0x30,0x00,0x06, + {{0x3d,0x27,0x81,0x3a,0x1a,0x72,0x3e, + 0xdb,0x8f,0x5d,0x73,0x20,0x00,0x05, 0x00 }}, - {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb, - 0x72,0x88,0xdf,0x25,0x30,0x00,0x06, + {{0x3d,0x27,0x81,0x32,0x1a,0x72,0xba, + 0x1c,0x80,0xdf,0x73,0x00,0x00,0x05, 0x00 }}, - {{0xa3,0x63,0x87,0x78,0x89,0x24,0xf1, - 0xae,0x84,0x57,0x25,0x30,0x00,0x02, - 0x01 }}, - {{0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5, - 0x02,0x88,0xff,0x25,0x10,0x00,0x02, + {{0x3d,0x31,0x81,0x37,0x1f,0x72,0xf0, + 0x58,0x8c,0x57,0x73,0x20,0x00,0x05, 0x01 }} }; -static const SiS300_LVDSCRT1DataStruct SiS300_LVDSCRT11280x1024_2[]= +static const SiS300_LVDSCRT1DataStruct SiS300_LVDSCRT11024x768_2[] = { {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb, 0x4a,0x80,0x8f,0x25,0x30,0x00,0x06, @@ -2584,29 +2978,7 @@ 0x01 }} }; -static const SiS300_LVDSCRT1DataStruct SiS300_LVDSCRT1800x600_2_H[]= -{ - {{0x3d,0x27,0x81,0x32,0x1a,0x72,0x3e, - 0xf4,0x88,0x8f,0x73,0x20,0x00,0x05, - 0x00 }}, - {{0x3d,0x27,0x81,0x32,0x1a,0x72,0x3e, - 0xdb,0x8f,0x5d,0x73,0x20,0x00,0x05, - 0x00 }}, - {{0x3d,0x27,0x81,0x32,0x1a,0x72,0x3e, - 0xf4,0x88,0x8f,0x73,0x20,0x00,0x05, - 0x00 }}, - {{0x3d,0x27,0x81,0x3a,0x1a,0x72,0x3e, - 0xdb,0x8f,0x5d,0x73,0x20,0x00,0x05, - 0x00 }}, - {{0x3d,0x27,0x81,0x32,0x1a,0x72,0xba, - 0x1c,0x80,0xdf,0x73,0x00,0x00,0x05, - 0x00 }}, - {{0x3d,0x31,0x81,0x37,0x1f,0x72,0xf0, - 0x58,0x8c,0x57,0x73,0x20,0x00,0x05, - 0x01 }} -}; - -static const SiS300_LVDSCRT1DataStruct SiS300_LVDSCRT11024x768_2_H[]= +static const SiS300_LVDSCRT1DataStruct SiS300_LVDSCRT11024x768_2_H[] = { {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb, 0x4a,0x80,0x8f,0x25,0x30,0x00,0x01, @@ -2631,7 +3003,32 @@ 0x01 }} }; -static const SiS300_LVDSCRT1DataStruct SiS300_LVDSCRT11280x1024_2_H[]= +static const SiS300_LVDSCRT1DataStruct SiS300_LVDSCRT11280x1024_2[] = +{ + {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb, + 0x4a,0x80,0x8f,0x25,0x30,0x00,0x06, + 0x00 }}, + {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb, + 0x31,0x87,0x5d,0x25,0x30,0x00,0x06, + 0x00 }}, + {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb, + 0x4a,0x80,0x8f,0x25,0x30,0x00,0x06, + 0x00 }}, + {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb, + 0x31,0x87,0x5d,0x25,0x30,0x00,0x06, + 0x00 }}, + {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb, + 0x72,0x88,0xdf,0x25,0x30,0x00,0x06, + 0x00 }}, + {{0xa3,0x63,0x87,0x78,0x89,0x24,0xf1, + 0xae,0x84,0x57,0x25,0x30,0x00,0x02, + 0x01 }}, + {{0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5, + 0x02,0x88,0xff,0x25,0x10,0x00,0x02, + 0x01 }} +}; + +static const SiS300_LVDSCRT1DataStruct SiS300_LVDSCRT11280x1024_2_H[] = { {{0x4f,0x27,0x93,0x39,0x81,0x24,0xbb, 0x4a,0x80,0x8f,0x25,0x30,0x00,0x01, @@ -2857,7 +3254,7 @@ }; /* TW: New */ -static const SiS300_LVDSCRT1DataStruct SiS300_CHTVCRT1UNTSC[]= +static const SiS300_LVDSCRT1DataStruct SiS300_CHTVCRT1UNTSC[] = { {{0x64,0x4f,0x88,0x56,0x9f,0x56,0x3e, 0xe8,0x84,0x8f,0x57,0x20,0x00,0x01, @@ -2879,7 +3276,7 @@ 0x01 }} }; -static const SiS300_LVDSCRT1DataStruct SiS300_CHTVCRT1ONTSC[]= +static const SiS300_LVDSCRT1DataStruct SiS300_CHTVCRT1ONTSC[] = { {{0x64,0x4f,0x88,0x5a,0x9f,0x0b,0x3e, 0xc0,0x84,0x8f,0x0c,0x20,0x00,0x01, @@ -2901,7 +3298,7 @@ 0x01 }} }; -static const SiS300_LVDSCRT1DataStruct SiS300_CHTVCRT1UPAL[]= +static const SiS300_LVDSCRT1DataStruct SiS300_CHTVCRT1UPAL[] = { {{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e, 0xf8,0x83,0x8f,0x70,0x20,0x00,0x05, @@ -2923,7 +3320,7 @@ 0x01 }} }; -static const SiS300_LVDSCRT1DataStruct SiS300_CHTVCRT1OPAL[]= +static const SiS300_LVDSCRT1DataStruct SiS300_CHTVCRT1OPAL[] = { {{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e, 0xf0,0x83,0x8f,0x70,0x20,0x00,0x05, @@ -2944,6 +3341,28 @@ 0x90,0x8c,0x57,0xed,0x20,0x00,0x05, 0x01 }} }; + +static const SiS300_LVDSCRT1DataStruct SiS300_CHTVCRT1SOPAL[] = +{ + {{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e, + 0xf0,0x83,0x8f,0x70,0x20,0x00,0x05, + 0x00 }}, + {{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e, + 0xde,0x81,0x5d,0x70,0x00,0x00,0x05, + 0x00 }}, + {{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e, + 0xf0,0x83,0x8f,0x70,0x20,0x00,0x05, + 0x00 }}, + {{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e, + 0xde,0x81,0x5d,0x70,0x00,0x00,0x05, + 0x00 }}, + {{0x64,0x4f,0x88,0x55,0x80,0x6f,0xba, /* TODO */ + 0x20,0x83,0xdf,0x70,0x00,0x00,0x05, + 0x00 }}, + {{0x73,0x63,0x97,0x69,0x8e,0xec,0xf0, /* TODO */ + 0x90,0x8c,0x57,0xed,0x20,0x00,0x05, + 0x01 }} +}; /* TW: New end */ /* TW: New */ @@ -2952,7 +3371,8 @@ UCHAR Reg[16]; } SiS300_CHTVRegDataStruct; -static const SiS300_CHTVRegDataStruct SiS300_CHTVReg_UNTSC[] = { +static const SiS300_CHTVRegDataStruct SiS300_CHTVReg_UNTSC[] = +{ {{0x4a,0x94,0x00,0x48,0xfe,0,0,0,0,0,0,0,0,0,0,0}}, {{0x4a,0x94,0x00,0x48,0xfe,0,0,0,0,0,0,0,0,0,0,0}}, {{0x4a,0x94,0x00,0x48,0xfe,0,0,0,0,0,0,0,0,0,0,0}}, @@ -2961,7 +3381,8 @@ {{0x8d,0xc4,0x00,0x3b,0xfb,0,0,0,0,0,0,0,0,0,0,0}} /* Mode 24: 800x600 NTSC 7/10 */ }; -static const SiS300_CHTVRegDataStruct SiS300_CHTVReg_ONTSC[] = { +static const SiS300_CHTVRegDataStruct SiS300_CHTVReg_ONTSC[] = +{ {{0x49,0x94,0x00,0x34,0xfe,0,0,0,0,0,0,0,0,0,0,0}}, {{0x49,0x94,0x00,0x34,0xfe,0,0,0,0,0,0,0,0,0,0,0}}, {{0x49,0x94,0x00,0x34,0xfe,0,0,0,0,0,0,0,0,0,0,0}}, @@ -2970,37 +3391,51 @@ {{0x8c,0xb4,0x00,0x32,0xf9,0,0,0,0,0,0,0,0,0,0,0}} /* Mode 23: 800x600 NTSC 3/4 */ }; -static const SiS300_CHTVRegDataStruct SiS300_CHTVReg_UPAL[] = { +static const SiS300_CHTVRegDataStruct SiS300_CHTVReg_UPAL[] = +{ {{0x41,0x12,0x01,0x50,0x34,0,0,0,0,0,0,0,0,0,0,0}}, {{0x41,0x12,0x00,0x50,0x00,0,0,0,0,0,0,0,0,0,0,0}}, {{0x41,0x12,0x01,0x50,0x34,0,0,0,0,0,0,0,0,0,0,0}}, {{0x41,0x12,0x00,0x50,0x00,0,0,0,0,0,0,0,0,0,0,0}}, {{0x63,0x94,0x01,0x50,0x30,0,0,0,0,0,0,0,0,0,0,0}}, /* Mode 15: 640x480 PAL 5/6 */ - /* TW: For 800x600, 3/4 is VERY underscan */ {{0x84,0x64,0x01,0x4e,0x2f,0,0,0,0,0,0,0,0,0,0,0}} /* Mode 21: 800x600 PAL 3/4 */ - /* TW: Mode 20 is still underscan, use it instead? */ - /* {{0x83,0x76,0x01,0x40,0x31}} */ /* Mode 20: 800x600 PAL 5/6 */ + }; -static const SiS300_CHTVRegDataStruct SiS300_CHTVReg_OPAL[] = { +static const SiS300_CHTVRegDataStruct SiS300_CHTVReg_OPAL[] = +{ {{0x41,0x12,0x01,0x50,0x34,0,0,0,0,0,0,0,0,0,0,0}}, /* Mode 9: 640x400 PAL 1/1 */ {{0x41,0x12,0x00,0x50,0x00,0,0,0,0,0,0,0,0,0,0,0}}, {{0x41,0x12,0x01,0x50,0x34,0,0,0,0,0,0,0,0,0,0,0}}, {{0x41,0x12,0x00,0x50,0x00,0,0,0,0,0,0,0,0,0,0,0}}, {{0x61,0x94,0x01,0x36,0x30,0,0,0,0,0,0,0,0,0,0,0}}, /* Mode 14: 640x480 PAL 1/1 */ {{0x83,0x76,0x01,0x40,0x31,0,0,0,0,0,0,0,0,0,0,0}} /* Mode 20: 800x600 PAL 5/6 */ - /* {{0x81,0x12,0x01,0x50,0x34}} */ /* TW: (test) Mode 19: 800x600 PAL 1/1 */ + +}; + +static const SiS300_CHTVRegDataStruct SiS300_CHTVReg_SOPAL[] = +{ + {{0x41,0x12,0x01,0x50,0x34,0,0,0,0,0,0,0,0,0,0,0}}, /* Mode 9: 640x400 PAL 5/4 */ + {{0x41,0x12,0x00,0x50,0x00,0,0,0,0,0,0,0,0,0,0,0}}, + {{0x41,0x12,0x01,0x50,0x34,0,0,0,0,0,0,0,0,0,0,0}}, + {{0x41,0x12,0x00,0x50,0x00,0,0,0,0,0,0,0,0,0,0,0}}, + {{0x60,0x30,0x00,0x10,0x00,0,0,0,0,0,0,0,0,0,0,0}}, /* TW: Mode 13: 640x480 PAL 5/4 */ + {{0x81,0x50,0x00,0x1b,0x00,0,0,0,0,0,0,0,0,0,0,0}} /* TW: Mode 19: 800x600 PAL 1/1 */ }; /* TW: New end */ /* TW: New */ -static const UCHAR SiS300_CHTVVCLKUNTSC[] = {0x29,0x29,0x29,0x29,0x2a,0x2e}; +static const UCHAR SiS300_CHTVVCLKUNTSC[] = {0x29,0x29,0x29,0x29,0x2a,0x2e}; + +static const UCHAR SiS300_CHTVVCLKONTSC[] = {0x2c,0x2c,0x2c,0x2c,0x2d,0x2b}; + +static const UCHAR SiS300_CHTVVCLKSONTSC[] = {0x2c,0x2c,0x2c,0x2c,0x2d,0x2b}; -static const UCHAR SiS300_CHTVVCLKONTSC[] = {0x2c,0x2c,0x2c,0x2c,0x2d,0x2b}; +static const UCHAR SiS300_CHTVVCLKUPAL[] = {0x2f,0x2f,0x2f,0x2f,0x2f,0x31}; -static const UCHAR SiS300_CHTVVCLKUPAL[] = {0x2f,0x2f,0x2f,0x2f,0x2f,0x31}; +static const UCHAR SiS300_CHTVVCLKOPAL[] = {0x2f,0x2f,0x2f,0x2f,0x30,0x32}; -static const UCHAR SiS300_CHTVVCLKOPAL[] = {0x2f,0x2f,0x2f,0x2f,0x30,0x32}; +static const UCHAR SiS300_CHTVVCLKSOPAL[] = {0x2f,0x2f,0x2f,0x2f,0x36,0x29}; /* TW: New end */ diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/video/sis/310vtbl.h linux.21rc1-ac1/drivers/video/sis/310vtbl.h --- linux.21rc1/drivers/video/sis/310vtbl.h 2003-04-22 16:38:52.000000000 +0100 +++ linux.21rc1-ac1/drivers/video/sis/310vtbl.h 2003-04-22 16:44:37.000000000 +0100 @@ -1,6 +1,6 @@ -/* Register settings for SiS 310/325 series */ +/* Register settings for SiS 310/325/330 series */ typedef struct _SiS310_StStruct @@ -54,7 +54,7 @@ static const SiS310_StandTableStruct SiS310_StandTable[]= { -/* MD_0_200 */ +/* 0x00: MD_0_200 */ { 0x28,0x18,0x08,0x0800, {0x09,0x03,0x00,0x02}, @@ -69,7 +69,7 @@ {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00, 0xff} }, -/* MD_1_200 */ +/* 0x01: MD_1_200 */ { 0x28,0x18,0x08,0x0800, {0x09,0x03,0x00,0x02}, @@ -84,7 +84,7 @@ {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00, 0xff} }, -/* MD_2_200 */ +/* 0x02: MD_2_200 */ { 0x50,0x18,0x08,0x1000, {0x01,0x03,0x00,0x02}, @@ -99,7 +99,7 @@ {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00, 0xff} }, -/* MD_3_200 */ +/* 0x03: MD_3_200 - mode 0x03 - 0 */ { 0x50,0x18,0x08,0x1000, {0x01,0x03,0x00,0x02}, @@ -114,7 +114,7 @@ {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00, 0xff} }, -/* MD_4 */ +/* 0x04: MD_4 */ { 0x28,0x18,0x08,0x4000, {0x09,0x03,0x00,0x02}, @@ -129,7 +129,7 @@ {0x00,0x00,0x00,0x00,0x00,0x30,0x0f,0x00, 0xff} }, -/* MD_5 */ +/* 0x05: MD_5 */ { 0x28,0x18,0x08,0x4000, {0x09,0x03,0x00,0x02}, @@ -144,7 +144,7 @@ {0x00,0x00,0x00,0x00,0x00,0x30,0x0f,0x00, 0xff} }, -/* MD_6 */ +/* 0x06: MD_6 */ { 0x50,0x18,0x08,0x4000, {0x01,0x01,0x00,0x06}, @@ -159,7 +159,7 @@ {0x00,0x00,0x00,0x00,0x00,0x00,0x0d,0x00, 0xff} }, -/* MD_7 */ +/* 0x07: MD_7 */ { 0x50,0x18,0x0e,0x1000, {0x00,0x03,0x00,0x03}, @@ -174,7 +174,7 @@ {0x00,0x00,0x00,0x00,0x00,0x10,0x0a,0x00, 0xff} }, -/* MDA_DAC */ +/* 0x08: MDA_DAC */ { 0x00,0x00,0x00,0x0000, {0x00,0x00,0x00,0x15}, @@ -189,7 +189,7 @@ {0x15,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f, 0x3f} }, -/* CGA_DAC */ +/* 0x09: CGA_DAC */ { 0x00,0x10,0x04,0x0114, {0x11,0x09,0x15,0x00}, @@ -204,7 +204,7 @@ {0x3f,0x2a,0x3a,0x2e,0x3e,0x2b,0x3b,0x2f, 0x3f} }, -/* EGA_DAC */ +/* 0x0a: EGA_DAC */ { 0x00,0x10,0x04,0x0114, {0x11,0x05,0x15,0x20}, @@ -219,7 +219,7 @@ {0x1f,0x2a,0x3a,0x2e,0x3e,0x2b,0x3b,0x2f, 0x3f} }, -/* VGA_DAC */ +/* 0x0b: VGA_DAC */ { 0x00,0x10,0x04,0x0114, {0x11,0x09,0x15,0x2a}, @@ -234,6 +234,7 @@ {0x18,0x1c,0x14,0x16,0x18,0x1a,0x1c,0x00, 0x04} }, +/* 0x0c */ { 0x08,0x0c,0x10,0x0a08, {0x0c,0x0e,0x10,0x0b}, @@ -248,7 +249,7 @@ {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, 0x00} }, -/* MD_D */ +/* 0x0d: MD_D */ { 0x28,0x18,0x08,0x2000, {0x09,0x0f,0x00,0x06}, @@ -263,7 +264,7 @@ {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f, 0xff} }, -/* MD_E */ +/* 0x0e: MD_E */ { 0x50,0x18,0x08,0x4000, {0x01,0x0f,0x00,0x06}, @@ -278,7 +279,7 @@ {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f, 0xff} }, -/* ExtVGATable */ +/* 0x0f: ExtVGATable - modes > 0x13 */ { 0x00,0x00,0x00,0x0000, {0x01,0x0f,0x00,0x0e}, @@ -293,7 +294,7 @@ {0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f, 0xff} }, -/* ROM_SAVEPTR */ +/* 0x10: ROM_SAVEPTR */ { 0x9f,0x3b,0x00,0x00c0, {0x00,0x00,0x00,0x00}, @@ -308,7 +309,7 @@ {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, 0x00} }, -/* MD_F */ +/* 0x11: MD_F */ { 0x50,0x18,0x0e,0x8000, {0x01,0x0f,0x00,0x06}, @@ -323,7 +324,7 @@ {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x05, 0xff} }, -/* MD_10 */ +/* 0x12: MD_10 */ { 0x50,0x18,0x0e,0x8000, {0x01,0x0f,0x00,0x06}, @@ -338,7 +339,7 @@ {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f, 0xff} }, -/* MD_0_350 */ +/* 0x13: MD_0_350 */ { 0x28,0x18,0x0e,0x0800, {0x09,0x03,0x00,0x02}, @@ -353,7 +354,7 @@ {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00, 0xff} }, -/* MD_1_350 */ +/* 0x14: MD_1_350 */ { 0x28,0x18,0x0e,0x0800, {0x09,0x03,0x00,0x02}, @@ -368,7 +369,7 @@ {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00, 0xff} }, -/* MD_2_350 */ +/* 0x15: MD_2_350 */ { 0x50,0x18,0x0e,0x1000, {0x01,0x03,0x00,0x02}, @@ -383,7 +384,7 @@ {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00, 0xff} }, -/* MD_3_350 */ +/* 0x16: MD_3_350 - mode 0x03 - 1 */ { 0x50,0x18,0x0e,0x1000, {0x01,0x03,0x00,0x02}, @@ -398,7 +399,7 @@ {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00, 0xff} }, -/* MD_0_1_400 */ +/* 0x17: MD_0_1_400 */ { 0x28,0x18,0x10,0x0800, {0x08,0x03,0x00,0x02}, @@ -413,7 +414,7 @@ {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00, 0xff} }, -/* MD_2_3_400 */ +/* 0x18: MD_2_3_400 - mode 0x03 - 2 */ { 0x50,0x18,0x10,0x1000, {0x00,0x03,0x00,0x02}, @@ -428,7 +429,7 @@ {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00, 0xff} }, -/* MD_7_400 */ +/* 0x19: MD_7_400 */ { 0x50,0x18,0x10,0x1000, {0x00,0x03,0x00,0x02}, @@ -443,7 +444,7 @@ {0x00,0x00,0x00,0x00,0x00,0x10,0x0a,0x00, 0xff} }, -/* MD_11 */ +/* 0x1a: MD_11 */ { 0x50,0x1d,0x10,0xa000, {0x01,0x0f,0x00,0x06}, @@ -458,7 +459,7 @@ {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x01, 0xff} }, -/* ExtEGATable */ +/* 0x1b: ExtEGATable - Modes <= 0x02 */ { 0x50,0x1d,0x10,0xa000, {0x01,0x0f,0x00,0x06}, @@ -473,7 +474,7 @@ {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f, 0xff} }, -/* MD_13 */ +/* 0x1c: MD_13 */ { 0x28,0x18,0x08,0x2000, {0x01,0x0f,0x00,0x0e}, @@ -522,45 +523,38 @@ {0x34,0x2a1d,0x0a0e,0x3b8c,0x0000,0x08,0x0e,0x00,0x00,0x06,0x12}, /* 720x576x16 */ {0x35,0x0a1f,0x0a0d,0x3b85,0x0000,0x08,0x0d,0x00,0x00,0x06,0x11}, /* 720x480x32 */ {0x36,0x2a1f,0x0a0e,0x3b8c,0x0000,0x08,0x0e,0x00,0x00,0x06,0x12}, /* 720x576x32 */ - {0x37,0x0212,0x0508,0x3aab,0x0104,0x08,0x08,0x00,0x00,0x00,0x13}, /* 1024x768x? */ - {0x38,0x0a1b,0x0508,0x3aab,0x0105,0x08,0x08,0x00,0x00,0x00,0x13}, /* 1024x768x8 */ -/* {0x38,0x021b,0x0508,0x3aab,0x0105,0x08,0x08,0x00,0x00,0x00,0x13}, */ /* 1024x768x8 - 650/LVDS BIOS (no CRt2Mode) */ + {0x37,0x0212,0x0508,0x3aab,0x0104,0x08,0x08,0x00,0x00,0x08,0x13}, /* 1024x768x? */ + {0x38,0x0a1b,0x0508,0x3aab,0x0105,0x08,0x08,0x00,0x00,0x08,0x13}, /* 1024x768x8 */ {0x3a,0x0e3b,0x0609,0x3adc,0x0107,0x08,0x09,0x00,0x00,0x00,0x1a}, /* 1280x1024x8 */ -/* {0x3a,0x063b,0x0609,0x3adc,0x0107,0x08,0x09,0x00,0x00,0x00,0x1a}, */ /* 1280x1024x8 - 650/LVDS BIOS*/ {0x3c,0x0e3b,0x070a,0x3af2,0x0130,0x08,0x0a,0x00,0x00,0x00,0x1e}, /* 1600x1200x8 */ -/* {0x3c,0x063b,0x070a,0x3af2,0x0130,0x08,0x0a,0x00,0x00,0x00,0x1e}, */ /* 1600x1200x8 - 650/LVDS BIOS */ - {0x3d,0x067d,0x070a,0x3af2,0x0131,0x08,0x0a,0x00,0x00,0x00,0x1e}, /* 1600x1200x16 - 650/301LVx - no CRT2Mode? */ - {0x40,0x9a1c,0x0000,0x3a34,0x010d,0x08,0x00,0x00,0x00,0x04,0x25}, - {0x41,0x9a1d,0x0000,0x3a34,0x010e,0x08,0x00,0x00,0x00,0x04,0x25}, + {0x3d,0x0e7d,0x070a,0x3af2,0x0131,0x08,0x0a,0x00,0x00,0x00,0x1e}, /* 1600x1200x16 - 650/301LVx - no CRT2Mode? */ + {0x40,0x9a1c,0x0000,0x3a34,0x010d,0x08,0x00,0x00,0x00,0x04,0x25}, /* 320x200x15 */ + {0x41,0x9a1d,0x0000,0x3a34,0x010e,0x08,0x00,0x00,0x00,0x04,0x25}, /* 320x200x16 */ {0x43,0x0a1c,0x0306,0x3a57,0x0110,0x08,0x06,0x00,0x00,0x05,0x08}, {0x44,0x0a1d,0x0306,0x3a57,0x0111,0x08,0x06,0x00,0x00,0x05,0x08}, /* 640x480x16 */ {0x46,0x2a1c,0x0407,0x3a81,0x0113,0x08,0x07,0x00,0x00,0x07,0x00}, {0x47,0x2a1d,0x0407,0x3a81,0x0114,0x08,0x07,0x00,0x00,0x07,0x00}, /* 800x600x16 */ {0x49,0x0a3c,0x0508,0x3aab,0x0116,0x08,0x08,0x00,0x00,0x00,0x13}, - {0x4a,0x0a3d,0x0508,0x3aab,0x0117,0x08,0x08,0x00,0x00,0x00,0x13}, /* 1024x768x16 */ + {0x4a,0x0a3d,0x0508,0x3aab,0x0117,0x08,0x08,0x00,0x00,0x08,0x13}, /* 1024x768x16 */ {0x4c,0x0e7c,0x0609,0x3adc,0x0119,0x08,0x09,0x00,0x00,0x00,0x1a}, {0x4d,0x0e7d,0x0609,0x3adc,0x011a,0x08,0x09,0x00,0x00,0x00,0x1a}, /* 1280x1024x16 */ - {0x50,0x9a1b,0x0001,0x3a3b,0x0132,0x08,0x01,0x00,0x00,0x04,0x26}, -/* {0x50,0x921b,0x0001,0x3a3b,0x0132,0x08,0x01,0x00,0x00,0x04,0x26}, */ /* 650/LVDS BIOS */ - {0x51,0xba1b,0x0103,0x3a42,0x0133,0x08,0x03,0x00,0x00,0x07,0x27}, -/* {0x52,0x9a1b,0x0204,0x3a49,0x0134,0x08,0x04,0x00,0x00,0x00,0x28}, */ - {0x52,0xba1b,0x0204,0x3a49,0x0134,0x08,0x04,0x00,0x00,0x00,0x28}, /* 650/301 BIOS */ -/* {0x52,0xb21b,0x0204,0x3a49,0x0134,0x08,0x04,0x00,0x00,0x00,0x28}, */ /* 650/LVDS BIOS (no CRT2Mode) */ - {0x56,0x9a1d,0x0001,0x3a3b,0x0135,0x08,0x01,0x00,0x00,0x04,0x26}, - {0x57,0xba1d,0x0103,0x3a42,0x0136,0x08,0x03,0x00,0x00,0x07,0x27}, -/* {0x58,0x9a1d,0x0204,0x3a49,0x0137,0x08,0x04,0x00,0x00,0x00,0x28}, */ - {0x58,0xba1d,0x0204,0x3a49,0x0137,0x08,0x04,0x00,0x00,0x00,0x28}, /* BIOS (301+LVDS) */ - {0x59,0x9a1b,0x0000,0x3a34,0x0138,0x08,0x00,0x00,0x00,0x04,0x25}, -/* {0x59,0x921b,0x0000,0x3a34,0x0138,0x08,0x00,0x00,0x00,0x04,0x25}, */ /* 650/LVDS BIOS (no CRT2Mode) */ + {0x50,0x9a1b,0x0001,0x3a3b,0x0132,0x08,0x01,0x00,0x00,0x04,0x26}, /* 320x240x8 */ + {0x51,0xba1b,0x0103,0x3a42,0x0133,0x08,0x03,0x00,0x00,0x07,0x27}, /* 400x300x8 */ + {0x52,0xba1b,0x0204,0x3a49,0x0134,0x08,0x04,0x00,0x00,0x00,0x28}, /* 512x384x8 */ + {0x56,0x9a1d,0x0001,0x3a3b,0x0135,0x08,0x01,0x00,0x00,0x04,0x26}, /* 320x240x16 */ + {0x57,0xba1d,0x0103,0x3a42,0x0136,0x08,0x03,0x00,0x00,0x07,0x27}, /* 400x300x16 */ + {0x58,0xba1d,0x0204,0x3a49,0x0137,0x08,0x04,0x00,0x00,0x00,0x28}, /* 512x384x16 */ + {0x59,0x9a1b,0x0000,0x3a34,0x0138,0x08,0x00,0x00,0x00,0x04,0x25}, /* 320x200x8 */ {0x5A,0x021b,0x0014,0x3b83,0x0138,0x08,0x01,0x00,0x00,0x04,0x3f}, /* 320x480x8 fstn add new mode*/ {0x5B,0x0a1d,0x0014,0x3b83,0x0135,0x08,0x01,0x00,0x00,0x04,0x3f}, /* 320x480x16 fstn add new mode*/ {0x5c,0xba1f,0x0204,0x3a49,0x0000,0x08,0x04,0x00,0x00,0x00,0x28}, /* TW: inserted 512x384x32 */ {0x5d,0x0a1d,0x0305,0x3a50,0x0139,0x08,0x05,0x00,0x00,0x07,0x10}, + {0x5e,0x0a1f,0x0305,0x3a50,0x0000,0x08,0x05,0x00,0x00,0x07,0x10}, /* TW: Inserted 640x400x32 */ {0x62,0x0a3f,0x0306,0x3a57,0x013a,0x08,0x06,0x00,0x00,0x05,0x08}, /* 640x480x32 */ {0x63,0x2a3f,0x0407,0x3a81,0x013b,0x08,0x07,0x00,0x00,0x07,0x00}, /* 800x600x32 */ - {0x64,0x0a7f,0x0508,0x3aab,0x013c,0x08,0x08,0x00,0x00,0x00,0x13}, /* 1024x768x32 */ + {0x64,0x0a7f,0x0508,0x3aab,0x013c,0x08,0x08,0x00,0x00,0x08,0x13}, /* 1024x768x32 */ {0x65,0x0eff,0x0609,0x3adc,0x013d,0x08,0x09,0x00,0x00,0x00,0x1a}, /* 1280x1024x32 */ - {0x66,0x06ff,0x070a,0x3af2,0x013e,0x08,0x0a,0x00,0x00,0x00,0x1e}, /* 1600x1200x32 */ + {0x66,0x0eff,0x070a,0x3af2,0x013e,0x08,0x0a,0x00,0x00,0x00,0x1e}, /* 1600x1200x32 */ {0x68,0x067b,0x080b,0x3b17,0x013f,0x08,0x0b,0x00,0x00,0x00,0x29}, /* 1920x1440x8 */ {0x69,0x06fd,0x080b,0x3b17,0x0140,0x08,0x0b,0x00,0x00,0x00,0x29}, /* 1920x1440x16 */ {0x6b,0x07ff,0x080b,0x3b17,0x0141,0x10,0x0b,0x00,0x00,0x00,0x29}, /* 1920x1440x32 */ @@ -580,14 +574,27 @@ {0x7d,0x0e7d,0x060f,0x3ad0,0x0000,0x08,0x0f,0x00,0x00,0x00,0x3d}, /* 1280x960x16 - TW */ {0x7e,0x0eff,0x060f,0x3ad0,0x0000,0x08,0x0f,0x00,0x00,0x00,0x3d}, /* 1280x960x32 - TW */ /* TW: 650/LVDS BIOS new modes */ -/* {0x23,0x063b,0x0614,0x36f7,0x0000,0x08,0x14,0x00,0x00,0x00,0x40}, */ /* 1280x768x8 - 650/LVDS BIOS */ {0x23,0x0e3b,0x0614,0x36f7,0x0000,0x08,0x14,0x00,0x00,0x00,0x40}, /* 1280x768x8 */ {0x24,0x0e7d,0x0614,0x36f7,0x0000,0x08,0x14,0x00,0x00,0x00,0x40}, /* 1280x768x16 */ {0x25,0x0eff,0x0614,0x36f7,0x0000,0x08,0x14,0x00,0x00,0x00,0x40}, /* 1280x768x32 */ {0x26,0x0e3b,0x0c15,0x36fe,0x0000,0x08,0x15,0x00,0x00,0x00,0x41}, /* 1400x1050x8 */ -/* {0x26,0x063b,0x0c15,0x36fe,0x0000,0x08,0x15,0x00,0x00,0x00,0x41}, */ /* 1400x1050x8 - 650/LVDS BIOS */ {0x27,0x0e7d,0x0c15,0x36fe,0x0000,0x08,0x15,0x00,0x00,0x00,0x41}, /* 1400x1050x16 */ {0x28,0x0eff,0x0c15,0x36fe,0x0000,0x08,0x15,0x00,0x00,0x00,0x41}, /* 1400x1050x32*/ + {0x29,0x0e1b,0x0d16,0x0000,0x0000,0x08,0x16,0x00,0x00,0x00,0x43}, /* TW: NEW 1152x864 - not in BIOS */ + {0x2a,0x0e3d,0x0d16,0x0000,0x0000,0x08,0x16,0x00,0x00,0x00,0x43}, + {0x2b,0x0e7f,0x0d16,0x0000,0x0000,0x08,0x16,0x00,0x00,0x00,0x43}, + {0x39,0x2a1b,0x0b17,0x0000,0x0000,0x08,0x17,0x00,0x00,0x00,0x45}, /* TW: NEW 848x480 - not in BIOS */ + {0x3b,0x2a3d,0x0b17,0x0000,0x0000,0x08,0x17,0x00,0x00,0x00,0x45}, + {0x3e,0x2a7f,0x0b17,0x0000,0x0000,0x08,0x17,0x00,0x00,0x00,0x45}, + {0x3f,0x2a1b,0x0b13,0x0000,0x0000,0x08,0x13,0x00,0x00,0x00,0x47}, /* TW: NEW 856x480 - not in BIOS */ + {0x42,0x2a3d,0x0b13,0x0000,0x0000,0x08,0x13,0x00,0x00,0x00,0x47}, + {0x45,0x2a7f,0x0b13,0x0000,0x0000,0x08,0x13,0x00,0x00,0x00,0x47}, + {0x48,0x2a1b,0x0e18,0x0000,0x0000,0x08,0x18,0x00,0x00,0x00,0x49}, /* TW: NEW 1360x768 - not in BIOS */ + {0x4b,0x2a3d,0x0e18,0x0000,0x0000,0x08,0x18,0x00,0x00,0x00,0x49}, + {0x4e,0x2a7f,0x0e18,0x0000,0x0000,0x08,0x18,0x00,0x00,0x00,0x49}, + {0x4f,0x9a1f,0x0000,0x0000,0x0000,0x08,0x00,0x00,0x00,0x04,0x25}, /* TW: New 320x200x32 */ + {0x53,0x9a1f,0x0001,0x0000,0x0000,0x08,0x01,0x00,0x00,0x04,0x26}, /* TW: New 320x240x32 */ + {0x54,0xba1f,0x0103,0x0000,0x0000,0x08,0x03,0x00,0x00,0x07,0x27}, /* TW: New 400x300x32 */ {0xff,0x0000,0x0000,0x0000,0x0000,0x00,0x00,0x00,0x00,0x00,0x00} }; @@ -611,33 +618,33 @@ {0x0067,0x0f,0x08,0x48,0x6a, 800, 600,0x3a8b}, /* 0x2 */ {0x0067,0x10,0x07,0x8b,0x6a, 800, 600,0x3a90}, /* 0x3 */ {0x0147,0x11,0x0a,0x00,0x6a, 800, 600,0x3a95}, /* 0x4 */ - {0x4147,0x12,0x0d,0x00,0x6a, 800, 600,0x3a9a}, /* 0x5 */ - {0x4047,0x13,0x13,0x00,0x6a, 800, 600,0x3a9f}, /* 0x6 */ - {0x4047,0x14,0x1c,0x00,0x6a, 800, 600,0x3aa4}, /* 0x7 */ + {0x0147,0x12,0x0d,0x00,0x6a, 800, 600,0x3a9a}, /* 0x5 - 4147 TW: Test sync change */ + {0x0047,0x13,0x13,0x00,0x6a, 800, 600,0x3a9f}, /* 0x6 - 4047 */ + {0x0047,0x14,0x1c,0x00,0x6a, 800, 600,0x3aa4}, /* 0x7 - 4047 */ /* {0xc05f,0x05,0x00,0x04,0x2e, 640, 480,0x3a57}, 0x8 - TW: Patch for Chrontel 7019 */ {0xc85f,0x05,0x00,0x04,0x2e, 640, 480,0x3a57}, /* 0x8 */ {0xc067,0x06,0x02,0x04,0x2e, 640, 480,0x3a5c}, /* 0x9 */ {0xc067,0x07,0x02,0x47,0x2e, 640, 480,0x3a61}, /* 0xa */ {0xc067,0x08,0x03,0x8a,0x2e, 640, 480,0x3a66}, /* 0xb */ - {0x4047,0x09,0x05,0x00,0x2e, 640, 480,0x3a6b}, /* 0xc */ - {0x4047,0x0a,0x09,0x00,0x2e, 640, 480,0x3a70}, /* 0xd */ - {0x4047,0x0b,0x0e,0x00,0x2e, 640, 480,0x3a75}, /* 0xe */ + {0xc047,0x09,0x05,0x00,0x2e, 640, 480,0x3a6b}, /* 0xc - 4047 */ + {0xc047,0x0a,0x09,0x00,0x2e, 640, 480,0x3a70}, /* 0xd - 4047 */ + {0xc047,0x0b,0x0e,0x00,0x2e, 640, 480,0x3a75}, /* 0xe - 4047 */ {0xc047,0x0c,0x15,0x00,0x2e, 640, 480,0x3a7a}, /* 0xf */ {0x407f,0x04,0x00,0x00,0x2f, 640, 400,0x3a50}, /* 0x10 */ {0xc00f,0x3c,0x01,0x06,0x31, 720, 480,0x3b85}, /* 0x11 */ {0x000f,0x3d,0x03,0x06,0x32, 720, 576,0x3b8c}, /* 0x12 */ {0x0187,0x15,0x06,0x00,0x37,1024, 768,0x3aab}, /* 0x13 */ - {0xc877,0x16,0x0b,0x06,0x37,1024, 768,0x3ab0}, /* 0x14 301b TV1024x768*/ + {0xc877,0x16,0x0b,0x06,0x37,1024, 768,0x3ab0}, /* 0x14 */ {0xc067,0x17,0x0f,0x49,0x37,1024, 768,0x3ab5}, /* 0x15 */ {0x0267,0x18,0x11,0x00,0x37,1024, 768,0x3aba}, /* 0x16 */ {0x0047,0x19,0x16,0x8c,0x37,1024, 768,0x3abf}, /* 0x17 */ - {0x4047,0x1a,0x1b,0x00,0x37,1024, 768,0x3ac4}, /* 0x18 */ - {0x4047,0x1b,0x1f,0x00,0x37,1024, 768,0x3ac9}, /* 0x19 */ + {0x0047,0x1a,0x1b,0x00,0x37,1024, 768,0x3ac4}, /* 0x18 - 4047 */ + {0x0007,0x1b,0x1f,0x00,0x37,1024, 768,0x3ac9}, /* 0x19 - 4047 */ {0x0387,0x1c,0x11,0x00,0x3a,1280,1024,0x3adc}, /* 0x1a */ {0x0077,0x1d,0x19,0x07,0x3a,1280,1024,0x3ae1}, /* 0x1b */ {0x0047,0x1e,0x1e,0x00,0x3a,1280,1024,0x3ae6}, /* 0x1c */ {0x0007,0x1f,0x20,0x00,0x3a,1280,1024,0x3aeb}, /* 0x1d */ - {0x0007,0x20,0x21,0x00,0x3c,1600,1200,0x3af2}, /* 0x1e */ + {0x0027,0x20,0x21,0x09,0x3c,1600,1200,0x3af2}, /* 0x1e */ {0x0007,0x21,0x22,0x00,0x3c,1600,1200,0x3af7}, /* 0x1f */ {0x0007,0x22,0x23,0x00,0x3c,1600,1200,0x3afc}, /* 0x20 */ {0x0007,0x23,0x25,0x00,0x3c,1600,1200,0x3b01}, /* 0x21 */ @@ -667,14 +674,22 @@ {0x0047,0x37,0x16,0x09,0x71,1024, 576,0x3b6d}, /* 0x39 */ {0x0057,0x38,0x19,0x0a,0x75,1280, 720,0x3b74}, /* 0x3a */ {0x0047,0x39,0x1e,0x0a,0x75,1280, 720,0x3b79}, /* 0x3b */ - {0x0047,0x3a,0x20,0x0a,0x75,1280, 720,0x3b7e}, /* 0x3c */ - {0x0027,0x3b,0x19,0x08,0x7c,1280, 960,0x3ad0}, /* 0x3d */ - {0x0027,0x3b,0x19,0x08,0x7c,1280, 960,0x3ad5}, /* 0x3e */ + {0x0007,0x3a,0x20,0x0a,0x75,1280, 720,0x3b7e}, /* 0x3c */ + {0x0067,0x3b,0x19,0x08,0x7c,1280, 960,0x3ad0}, /* 0x3d */ + {0x0027,0x4c,0x59,0x08,0x7c,1280, 960,0x3ad0}, /* 0x3e */ {0xc07f,0x01,0x00,0x06,0x5a, 320, 480,0x3b83}, /* 0x3f */ /* FSTN mode */ - {0x0077,0x42,0x12,0x07,0x23,1280, 768,0x0000}, /* 0x40 */ /* TW: 650/LVDS/301LVx new mode */ - {0x0067,0x43,0x4d,0x08,0x26,1400,1050,0x0000}, /* 0x41 */ /* TW: 650/LVDS/301LVx new mode */ - {0xffff,0x00,0x00,0x00,0x00,0000,0000,0x0000} -}; + {0x0077,0x42,0x5b,0x08,0x23,1280, 768,0x0000}, /* 0x40 */ /* TW: 0x5b was 0x12 */ + {0x0067,0x43,0x4d,0x08,0x26,1400,1050,0x0000}, /* 0x41 */ + {0x0007,0x4b,0x5a,0x08,0x26,1400,1050,0x0000}, /* 0x42 */ /* TW: new, not in any BIOS */ + {0x0047,0x44,0x19,0x00,0x29,1152, 864,0x0000}, /* 0x43 TW: Non-BIOS, new */ + {0x0047,0x4a,0x1e,0x00,0x29,1152, 864,0x0000}, /* 0x44 TW: Non-BIOS, new */ + {0x00c7,0x45,0x57,0x00,0x39, 848, 480,0x0000}, /* 0x45 TW: 848x480-38Hzi - Non-BIOS, new */ + {0xc047,0x46,0x55,0x00,0x39, 848, 480,0x0000}, /* 0x46 TW: 848x480-60Hz - Non-BIOS, new */ + {0x00c7,0x47,0x57,0x00,0x3f, 856, 480,0x0000}, /* 0x47 TW: 856x480-38Hzi - Non-BIOS, new */ + {0xc047,0x48,0x57,0x00,0x3f, 856, 480,0x0000}, /* 0x48 TW: 856x480-60Hz - Non-BIOS, new */ + {0x0047,0x49,0x58,0x00,0x48,1360, 768,0x0000}, /* 0x49 TW: 1360x768-60Hz - Non-BIOS, new */ + {0xffff,0x00,0x00,0x00,0x00, 0, 0,0x0000} +}; typedef struct _SiS310_CRT1TableStruct { @@ -698,12 +713,22 @@ {{0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f, 0x9c,0x8e,0x8f,0x96,0xb9,0x30,0x00,0x05, 0x00}}, /* 0x4 */ +#if 0 {{0x5f,0x4f,0x50,0x82,0x55,0x81,0x0b,0x3e, 0xe9,0x8b,0xdf,0xe7,0x04,0x00,0x00,0x05, 0x00}}, /* 0x5 */ +#endif + {{0x5f,0x4f,0x4f,0x83,0x55,0x81,0x0b,0x3e, /* 0x05 - corrected 640x480-60 */ + 0xe9,0x8b,0xdf,0xe8,0x0c,0x00,0x00,0x05, + 0x00}}, +#if 0 {{0x63,0x4f,0x50,0x86,0x56,0x9b,0x06,0x3e, 0xe8,0x8b,0xdf,0xe7,0xff,0x10,0x00,0x01, 0x00}}, /* 0x6 */ +#endif + {{0x63,0x4f,0x4f,0x87,0x56,0x9b,0x06,0x3e, /* 0x06 - corrected 640x480-72 */ + 0xe8,0x8a,0xdf,0xe7,0x07,0x00,0x00,0x01, + 0x00}}, {{0x64,0x4f,0x4f,0x88,0x55,0x9d,0xf2,0x1f, 0xe0,0x83,0xdf,0xdf,0xf3,0x10,0x00,0x01, 0x00}}, /* 0x7 */ @@ -711,16 +736,16 @@ 0xe0,0x83,0xdf,0xdf,0xfc,0x10,0x00,0x05, 0x00}}, /* 0x8 */ {{0x65,0x4f,0x4f,0x89,0x58,0x80,0xfb,0x1f, - 0xe0,0x83,0xdf,0xdf,0xfc,0x00,0x00,0x05, + 0xe0,0x83,0xdf,0xdf,0xfc,0x10,0x00,0x05, /* TW: Corrected VBE */ 0x61}}, /* 0x9 */ {{0x65,0x4f,0x4f,0x89,0x58,0x80,0x01,0x3e, 0xe0,0x83,0xdf,0xdf,0x02,0x00,0x00,0x05, 0x61}}, /* 0xa */ {{0x67,0x4f,0x4f,0x8b,0x58,0x81,0x0d,0x3e, - 0xe0,0x83,0xdf,0xdf,0x0e,0x10,0x00,0x05, + 0xe0,0x83,0xdf,0xdf,0x0e,0x00,0x00,0x05, /* TW: Corrected VBE */ 0x61}}, /* 0xb */ {{0x65,0x4f,0x4f,0x89,0x57,0x9f,0xfb,0x1f, - 0xe6,0x8a,0xe5,0xe5,0xfc,0x00,0x00,0x01, + 0xe6,0x8a,0xdf,0xdf,0xfc,0x10,0x00,0x01, /* TW: Corrected VDE, VBE */ 0x00}}, /* 0xc */ {{0x7b,0x63,0x63,0x9f,0x6a,0x93,0x6f,0xf0, 0x58,0x8a,0x57,0x57,0x70,0x20,0x00,0x05, @@ -848,7 +873,7 @@ {{0x9f,0x7f,0x7f,0x83,0x85,0x91,0x1e,0xf1, 0xad,0x81,0x3f,0x3f,0x1f,0x30,0x00,0x02, 0x01}}, /* 0x36 */ - {{0xa7,0x7f,0x7f,0x88,0x89,0x15,0x26,0xf1, + {{0xa7,0x7f,0x7f,0x88,0x89,0x95,0x26,0xf1, /* TW: 95 was 15 - illegal HBE! */ 0xb1,0x85,0x3f,0x3f,0x27,0x30,0x00,0x02, 0x01}}, /* 0x37 */ {{0xce,0x9f,0x9f,0x92,0xa9,0x17,0x28,0xc4, @@ -860,9 +885,14 @@ {{0xd3,0x9f,0x9f,0x97,0xab,0x1f,0x2e,0xd4, 0x7d,0x81,0xcf,0xcf,0x2f,0x21,0x00,0x07, 0x01}}, /* 0x3a */ - {{0xdc,0x9f,0x9f,0x00,0xab,0x19,0xe6,0xef, +#if 0 + {{0xdc,0x9f,0x9f,0x00,0xab,0x19,0xe6,0xef, /* 1280x960 - invalid */ 0xc0,0xc3,0xbf,0xbf,0xe7,0x10,0x00,0x07, 0x01}}, /* 0x3b */ +#endif + {{0xdc,0x9f,0x9f,0x80,0xaf,0x9d,0xe6,0xff, /* 1280x960-60 - corrected */ + 0xc0,0x83,0xbf,0xbf,0xe7,0x10,0x00,0x07, + 0x01}}, /* 0x3b */ {{0x6b,0x59,0x59,0x8f,0x5e,0x8c,0x0b,0x3e, 0xe9,0x8b,0xdf,0xe7,0x04,0x00,0x00,0x05, 0x00}}, /* 0x3c */ @@ -875,8 +905,7 @@ {{0x81,0x6a,0x6a,0x85,0x70,0x00,0x0f,0x3e, 0xeb,0x8e,0xdf,0xdf,0x10,0x00,0x00,0x02, 0x00}}, /* 0x3f */ - /* TW: New from 650/LVDS BIOS */ - {{0xa3,0x7f,0x7f,0x87,0x86,0x97,0x1e,0xf1, + {{0xa3,0x7f,0x7f,0x87,0x86,0x97,0x1e,0xf1, /* TW: The following from 650/LVDS BIOS */ 0xae,0x85,0x57,0x57,0x1f,0x30,0x00,0x02, 0x01}}, /* 0x40 */ {{0xa3,0x7f,0x7f,0x87,0x86,0x97,0x24,0xf5, @@ -887,9 +916,37 @@ 0x01}}, /* 0x42 */ {{0xe6,0xae,0xae,0x8a,0xbd,0x90,0x3d,0x10, 0x1a,0x8d,0x19,0x19,0x3e,0x2f,0x00,0x03, - 0x00}} /* 0x43 */ + 0x00}}, /* 0x43 */ + {{0xc3,0x8f,0x8f,0x87,0x9b,0x0b,0x82,0xef, /* TW: New, 1152x864-75, not in any BIOS */ + 0x60,0x83,0x5f,0x5f,0x83,0x10,0x00,0x07, + 0x01}}, /* 0x44 */ + {{0x86,0x69,0x69,0x8A,0x74,0x06,0x8C,0x15, /* TW: New, 848x480-38i, not in BIOS */ + 0x4F,0x83,0xEF,0xEF,0x8D,0x30,0x00,0x02, + 0x00}}, /* 0x45 */ + {{0x83,0x69,0x69,0x87,0x6f,0x1d,0x03,0x3E, /* TW: New, 848x480-60, not in BIOS */ + 0xE5,0x8d,0xDF,0xe4,0x04,0x00,0x00,0x06, + 0x00}}, /* 0x46 */ + {{0x86,0x6A,0x6A,0x8A,0x74,0x06,0x8C,0x15, /* TW: New, 856x480-38i, not in BIOS */ + 0x4F,0x83,0xEF,0xEF,0x8D,0x30,0x00,0x02, + 0x00}}, /* 0x47 */ + {{0x81,0x6A,0x6A,0x85,0x70,0x00,0x0F,0x3E, /* TW: New, 856x480-60, not in BIOS */ + 0xEB,0x8E,0xDF,0xDF,0x10,0x00,0x00,0x02, + 0x00}}, /* 0x48 */ + {{0xdd,0xa9,0xa9,0x81,0xb4,0x97,0x26,0xfd, /* TW: New, 1360x768-60, not in BIOS */ + 0x01,0x8d,0xff,0x00,0x27,0x10,0x00,0x03, + 0x01}}, /* 0x49 */ + {{0xd9,0x8f,0x8f,0x9d,0xba,0x0a,0x8a,0xff, /* TW: New, 1152x864-84, not in any BIOS */ + 0x60,0x8b,0x5f,0x5f,0x8b,0x10,0x00,0x03, + 0x01}}, /* 0x4a */ + {{0xea,0xae,0xae,0x8e,0xba,0x82,0x40,0x10, /* TW: New, 1400x1050-75, not in any BIOS */ + 0x1b,0x87,0x19,0x1a,0x41,0x0f,0x00,0x03, + 0x00}}, /* 0x4b */ + {{0xd3,0x9f,0x9f,0x97,0xab,0x1f,0xf1,0xff, /* TW: New, 1280x960-85, not in any BIOS */ + 0xc0,0x83,0xbf,0xbf,0xf2,0x10,0x00,0x07, + 0x01}} /* 0x4c */ }; + typedef struct _SiS310_MCLKDataStruct { UCHAR SR28,SR29,SR2A; @@ -920,6 +977,18 @@ { 0x37,0x22,0x82,133} }; +static const SiS310_MCLKDataStruct SiS310_MCLKData_0_330[] = /* @ 0x54 */ +{ + { 0x5c,0x23,0x01,166}, + { 0x5c,0x23,0x01,166}, + { 0x7c,0x08,0x01,200}, + { 0x79,0x06,0x01,250}, + { 0x7c,0x08,0x01,200}, + { 0x7c,0x08,0x01,200}, + { 0x7c,0x08,0x01,200}, + { 0x79,0x06,0x01,250} +}; + static const SiS310_MCLKDataStruct SiS310_MCLKData_1[] = /* @ 0x155 */ { { 0x29,0x21,0x82,150}, @@ -1019,7 +1088,6 @@ { 0xa8,0x4c, 30}, /* 0x3e */ { 0x20,0x26, 33}, /* 0x3f */ { 0x31,0xc2, 39}, /* 0x40 */ - /* TW: 650/LVDS BIOS @ 0x574b new: */ { 0x60,0x36, 30}, /* 0x41 */ /* Chrontel */ { 0x40,0x4a, 28}, /* 0x42 */ /* Chrontel */ { 0x9f,0x46, 44}, /* 0x43 */ /* Chrontel */ @@ -1039,7 +1107,14 @@ { 0x54,0x46, 58}, /* 0x51 */ /* Chrontel */ { 0x25,0x42, 61}, /* 0x52 */ { 0x44,0x44, 66}, /* 0x53 */ /* Chrontel */ - { 0x3a,0x62, 70} /* 0x54 */ /* Chrontel */ + { 0x3a,0x62, 70}, /* 0x54 */ /* Chrontel */ + { 0x62,0xc6, 34}, /* 0x55 - added for 848x480-60 (not in any BIOS) */ + { 0x6a,0xc6, 37}, /* 0x56 - added for 848x480-75 (not in any BIOS) - TEMP */ + { 0xbf,0xc8, 35}, /* 0x57 - added for 856x480-38i,60 (not in any BIOS) */ + { 0x30,0x23, 88}, /* 0x58 - added for 1360x768-62 (is 60Hz!) (not in any BIOS) */ + { 0x52,0x07,149}, /* 0x59 - added for 1280x960-85 (Not in any BIOS) */ + { 0x56,0x07,156}, /* 0x5a - added for 1400x1050-75 */ + { 0x7a,0x2a, 81} /* 0x5b */ /* For 1280x768 LCD mode */ }; typedef struct _SiS310_VBVCLKDataStruct @@ -1050,7 +1125,7 @@ static const SiS310_VBVCLKDataStruct SiS310_VBVCLKData[]= { - { 0x1b,0xe1, 25}, /* 0x0 */ /* 650/LVDS BIOS: @ 0x579c */ + { 0x1b,0xe1, 25}, /* 0x0 */ { 0x4e,0xe4, 28}, /* 0x1 */ { 0x57,0xe4, 31}, /* 0x2 */ { 0xc3,0xc8, 36}, /* 0x3 */ @@ -1115,20 +1190,41 @@ { 0xa8,0x4c, 30}, /* 0x3e */ { 0x20,0x26, 33}, /* 0x3f */ { 0x31,0xc2, 39}, /* 0x40 */ - /* TW: 650/LVDS+301 BIOS (@ 0x58a0 in LVDS) new: */ { 0x2e,0x48, 25}, /* 0x41 */ { 0x24,0x46, 25}, /* 0x42 */ { 0x26,0x64, 28}, /* 0x43 */ { 0x37,0x64, 40}, /* 0x44 */ { 0xa1,0x42,108}, /* 0x45 */ { 0x37,0x61,100}, /* 0x46 */ - { 0x78,0x27,108} /* 0x47 */ - /* --- 0x58bc --- */ -}; - -static const UCHAR SiS310_ScreenOffset[]= - { 0x14,0x19,0x20,0x28,0x32,0x40, - 0x50,0x64,0x78,0x80,0x2d,0x35,0x57}; /* TW: Added 1400x1050 offset */ + { 0x78,0x27,108}, /* 0x47 */ + { 0x97,0x2c, 26}, /* 0x48 */ /* UNUSED - Entries from here new, not in any BIOS */ + { 0xce,0x3c, 39}, /* 0x49 */ /* UNUSED */ + { 0x52,0x4a, 36}, /* 0x4a */ /* UNUSED */ + { 0x34,0x61, 95}, /* 0x4b */ /* UNUSED */ + { 0x78,0x27,108}, /* 0x4c */ /* UNUSED */ + { 0x66,0x43,123}, /* 0x4d */ /* 1400x1050-60 */ + { 0x41,0x4e, 21}, /* 0x4e */ /* UNUSED */ + { 0xa1,0x4a, 29}, /* 0x4f */ /* UNUSED */ + { 0x19,0x42, 42}, /* 0x50 */ /* UNUSED */ + { 0x54,0x46, 58}, /* 0x51 */ /* UNUSED */ + { 0x25,0x42, 61}, /* 0x52 */ /* UNUSED */ + { 0x44,0x44, 66}, /* 0x53 */ /* UNUSED */ + { 0x3a,0x62, 70}, /* 0x54 */ /* UNUSED */ + { 0x62,0xc6, 34}, /* 0x55 */ /* 848x480-60 */ + { 0x6a,0xc6, 37}, /* 0x56 */ /* 848x480-75 - TEMP, UNUSED */ + { 0xbf,0xc8, 35}, /* 0x57 */ /* 856x480-38i,60 */ + { 0x30,0x23, 88}, /* 0x58 */ /* 1360x768-62 (is 60Hz!) TEMP, UNUSED */ + { 0x52,0x07,149}, /* 0x59 */ /* 1280x960-85 - UNUSED */ + { 0x56,0x07,156}, /* 0x5a */ /* 1400x1050-75 - UNUSED */ + { 0x7a,0x2a, 81} /* 0x5b */ /* For 1280x768 LCD mode */ +}; + +static const UCHAR SiS310_ScreenOffset[] = +{ + 0x14,0x19,0x20,0x28,0x32,0x40,0x50,0x64, + 0x78,0x80,0x2d,0x35,0x57,0x48,0x55, + 0xff +}; /* TW: Added 1400x1050, 1152x864, 848/856x480, 1360x768 */ typedef struct _SiS310_StResInfoStruct { @@ -1153,7 +1249,7 @@ UCHAR YChar; } SiS310_ModeResInfoStruct; -static const SiS310_ModeResInfoStruct SiS310_ModeResInfo[]= +static const SiS310_ModeResInfoStruct SiS310_ModeResInfo[] = { { 320, 200, 8, 8}, /* 0x00 */ { 320, 240, 8, 8}, /* 0x01 */ @@ -1174,9 +1270,12 @@ { 800, 480, 8,16}, /* 0x10 */ { 1024, 576, 8,16}, /* 0x11 */ { 1280, 720, 8,16}, /* 0x12 */ - { 856, 480, 8,16}, /* 0x13 19; TW: New */ + { 856, 480, 8,16}, /* 0x13 - TW: New, not in any BIOS */ { 1280, 768, 8,16}, /* 0x14 20; TW: New */ - { 1400,1050, 8,16} /* 0x15 21; TW: New */ + { 1400,1050, 8,16}, /* 0x15 21; TW: New */ + { 1152, 864, 8,16}, /* 0x16 - TW: New, not in any BIOS */ + { 848, 480, 8,16}, /* 0x17 - TW: New, not in any BIOS */ + { 1360, 768, 8,16} /* 0x18 - TW: New, not in any BIOS */ }; static const UCHAR SiS310_OutputSelect = 0x40; @@ -1223,7 +1322,7 @@ static const USHORT SiS310_RGBSenseData = 0xd1; static const USHORT SiS310_VideoSenseData = 0xb9; static const USHORT SiS310_YCSenseData = 0xb3; -static const USHORT SiS310_RGBSenseData2 = 0x0190; /*301b*/ +static const USHORT SiS310_RGBSenseData2 = 0x0190; static const USHORT SiS310_VideoSenseData2 = 0x0174; static const USHORT SiS310_YCSenseData2 = 0x016b; #endif @@ -1259,7 +1358,8 @@ { 1, 1,1344, 806,1344, 806} }; -static const SiS310_LCDDataStruct SiS310_ExtLCD1024x768Data[] = /* TW: Checked */ +#if 0 /* Seems out-dated, all BIOSes since 03/27/2002 have the other version */ +static const SiS310_LCDDataStruct SiS310_ExtLCD1024x768Data[] = { { 12, 5, 896, 512,1344, 806}, { 12, 5, 896, 510,1344, 806}, @@ -1275,13 +1375,31 @@ { 42, 25,1024, 625,1344, 806}, { 1, 1,1344, 806,1344, 806} }; +#endif + +static const SiS310_LCDDataStruct SiS310_ExtLCD1024x768Data[] = +{ + { 42, 25,1536, 419,1344, 806}, + { 48, 25,1536, 369,1344, 806}, + { 42, 25,1536, 419,1344, 806}, + { 48, 25,1536, 369,1344, 806}, + { 12, 5, 896, 500,1344, 806}, + { 42, 25,1024, 625,1344, 806}, + { 1, 1,1344, 806,1344, 806}, + { 12, 5, 896, 500,1344, 806}, + { 42, 25,1024, 625,1344, 806}, + { 1, 1,1344, 806,1344, 806}, + { 12, 5, 896, 500,1344, 806}, + { 42, 25,1024, 625,1344, 806}, + { 1, 1,1344, 806,1344, 806} + +}; -static const SiS310_LCDDataStruct SiS310_St2LCD1024x768Data[] = /* TW: Checked */ +static const SiS310_LCDDataStruct SiS310_St2LCD1024x768Data[] = { { 62, 25, 800, 546,1344, 806}, { 32, 15, 930, 546,1344, 806}, -/* { 32, 15, 930, 546,1344, 806}, */ - { 62, 25, 800, 546,1344, 806}, /* TW: Different in 650/301LV BIOS */ + { 62, 25, 800, 546,1344, 806}, { 104, 45, 945, 496,1344, 806}, { 62, 25, 800, 546,1344, 806}, { 31, 18,1008, 624,1344, 806}, @@ -1300,7 +1418,7 @@ { 1, 1,1688,1066,1688,1066} }; -static const SiS310_LCDDataStruct SiS310_ExtLCD1280x1024Data[] = /* TW: Checked */ +static const SiS310_LCDDataStruct SiS310_ExtLCD1280x1024Data[] = { { 211, 60,1024, 501,1688,1066}, { 211, 60,1024, 508,1688,1066}, @@ -1309,7 +1427,8 @@ { 211, 60,1024, 500,1688,1066}, { 211, 75,1024, 625,1688,1066}, { 211, 120,1280, 798,1688,1066}, - { 1, 1,1688,1066,1688,1066} + { 1, 1,1688,1066,1688,1066}, + { 1, 1,1800,1000,1688,1066} /* 1280x960 - does not work, use panel scaler instead */ }; static const SiS310_LCDDataStruct SiS310_St2LCD1280x1024Data[] = @@ -1324,29 +1443,19 @@ { 1, 1,1688,1066,1688,1066} }; -static const SiS310_LCDDataStruct SiS310_NoScaleData1024x768[] = /* TW: Checked */ +static const SiS310_LCDDataStruct SiS310_NoScaleData1024x768[] = { { 1, 1,1344, 806,1344, 806}, { 1, 1,1344, 806,1344, 806}, { 1, 1,1344, 806,1344, 806}, - { 1, 1,1344, 806,1344, 806}, - { 1, 1,1344, 806,1344, 806}, + { 1, 1,1344, 806,1344, 806}, /* 640x400 - does not work */ + { 1, 1,1344, 806,1344, 806}, /* 640x480 - does not work */ { 1, 1,1344, 806,1344, 806}, { 1, 1,1344, 806,1344, 806}, { 1, 1,1344, 806,1344, 806} -#if 0 - { 1, 1, 800, 449, 800, 449}, - { 1, 1, 800, 449, 800, 449}, - { 1, 1, 900, 449, 900, 449}, - { 1, 1, 900, 449, 900, 449}, - { 1, 1, 800, 525, 800, 525}, - { 1, 1,1056, 628,1056, 628}, - { 1, 1,1344, 806,1344, 806}, - { 1, 1,1688,1066,1688,1066} -#endif }; -static const SiS310_LCDDataStruct SiS310_NoScaleData1280x1024[] = /* TW: New; Checked */ +static const SiS310_LCDDataStruct SiS310_NoScaleData1280x1024[] = { { 1, 1,1688,1066,1688,1066}, { 1, 1,1688,1066,1688,1066}, @@ -1355,6 +1464,7 @@ { 1, 1,1688,1066,1688,1066}, { 1, 1,1688,1066,1688,1066}, { 1, 1,1688,1066,1688,1066}, + { 1, 1,1688,1066,1688,1066}, { 1, 1,1688,1066,1688,1066} }; @@ -1371,88 +1481,121 @@ { 1, 1,1800,1000,1800,1000} }; -static const SiS310_LCDDataStruct SiS310_ExtLCD1400x1050Data[] = /* TW: New */ -{ /* TODO */ - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0} -}; - -static const SiS310_LCDDataStruct SiS310_ExtLCD1600x1200Data[] = /* TW: New */ -{ /* TODO */ - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0} -}; - -static const SiS310_LCDDataStruct SiS310_StLCD1400x1050Data[] = /* TW: New */ -{ /* TODO */ - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0} +static const SiS310_LCDDataStruct SiS310_StLCD1400x1050Data[] = +{ /* TW: New from 1.11.6s */ + { 211, 100, 2100, 408, 1688, 1066 }, + { 211, 64, 1536, 358, 1688, 1066 }, + { 211, 100, 2100, 408, 1688, 1066 }, + { 211, 64, 1536, 358, 1688, 1066 }, + { 211, 48, 840, 488, 1688, 1066 }, + { 211, 72, 1008, 609, 1688, 1066 }, + { 211, 128, 1400, 776, 1688, 1066 }, + { 211, 205, 1680, 1041, 1688, 1066 }, + { 1, 1, 1688, 1066, 1688, 1066 } +}; + +static const SiS310_LCDDataStruct SiS310_ExtLCD1400x1050Data[] = +{ /* TW: New from 1.11.6s */ + { 211, 100, 2100, 408, 1688, 1066 }, + { 211, 64, 1536, 358, 1688, 1066 }, + { 211, 100, 2100, 408, 1688, 1066 }, + { 211, 64, 1536, 358, 1688, 1066 }, + { 211, 48, 840, 488, 1688, 1066 }, + { 211, 72, 1008, 609, 1688, 1066 }, + { 211, 128, 1400, 776, 1688, 1066 }, + { 211, 205, 1680, 1041, 1688, 1066 }, + { 1, 1, 1688, 1066, 1688, 1066 } +}; + +static const SiS310_LCDDataStruct SiS310_NoScaleData1400x1050[] = +{ /* TW: To be checked (BIOS uses 1280x1024 data, one line too short) */ + { 1, 1, 1688, 1066, 1688, 1066 }, + { 1, 1, 1688, 1066, 1688, 1066 }, + { 1, 1, 1688, 1066, 1688, 1066 }, + { 1, 1, 1688, 1066, 1688, 1066 }, + { 1, 1, 1688, 1066, 1688, 1066 }, + { 1, 1, 1688, 1066, 1688, 1066 }, + { 1, 1, 1688, 1066, 1688, 1066 }, + { 1, 1, 1688, 1066, 1688, 1066 }, + { 1, 1, 1688, 1066, 1688, 1066 } }; -static const SiS310_LCDDataStruct SiS310_StLCD1600x1200Data[] = /* TW: New */ +static const SiS310_LCDDataStruct SiS310_StLCD1600x1200Data[] = { /* TODO */ - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0}, { 0, 0, 0, 0, 0, 0} }; -static const SiS310_LCDDataStruct SiS310_NoScaleData1400x1050[] = /* TW: New */ +static const SiS310_LCDDataStruct SiS310_ExtLCD1600x1200Data[] = { /* TODO */ - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0}, { 0, 0, 0, 0, 0, 0} }; -static const SiS310_LCDDataStruct SiS310_NoScaleData1600x1200[] = /* TW: New */ -{ /* TODO */ - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0}, - { 0, 0, 0, 0, 0, 0} +static const SiS310_LCDDataStruct SiS310_NoScaleData1600x1200[] = +{ /* TODO - values guessed */ + {1, 1, 2048, 1250, 2048, 1250}, + {1, 1, 2048, 1250, 2048, 1250}, + {1, 1, 2048, 1250, 2048, 1250}, + {1, 1, 2048, 1250, 2048, 1250}, + {1, 1, 2048, 1250, 2048, 1250}, + {1, 1, 2048, 1250, 2048, 1250}, + {1, 1, 2048, 1250, 2048, 1250}, + {1, 1, 2048, 1250, 2048, 1250}, + {1, 1, 2048, 1250, 2048, 1250}, + {1, 1, 2048, 1250, 2048, 1250} +}; + +static const SiS310_LCDDataStruct SiS310_StLCD1280x768Data[] = +{ + { 211, 100, 2100, 408, 1408, 806 }, /* These values are *wrong* */ + { 211, 64, 1536, 358, 1408, 806 }, + { 211, 100, 2100, 408, 1408, 806 }, + { 211, 64, 1536, 358, 1408, 806 }, + { 211, 48, 840, 488, 1408, 806 }, + { 211, 72, 1008, 609, 1408, 806 }, + { 211, 128, 1400, 776, 1408, 806 }, + { 211, 205, 1680, 1041, 1408, 806 }, + { 1, 1, 1408, 806, 1408, 806 } /* That's the only one that *might* be correct */ +}; + +static const SiS310_LCDDataStruct SiS310_ExtLCD1280x768Data[] = +{ + { 211, 100, 2100, 408, 1408, 806 }, /* These values are *wrong* */ + { 211, 64, 1536, 358, 1408, 806 }, + { 211, 100, 2100, 408, 1408, 806 }, + { 211, 64, 1536, 358, 1408, 806 }, + { 211, 48, 840, 488, 1408, 806 }, + { 211, 72, 1008, 609, 1408, 806 }, + { 211, 128, 1400, 776, 1408, 806 }, + { 211, 205, 1680, 1041, 1408, 806 }, + { 1, 1, 1408, 806, 1408, 806 } /* That's the only one that *might* be correct */ +}; + +static const SiS310_LCDDataStruct SiS310_NoScaleData1280x768[] = +{ /* All values guessed */ + { 1, 1, 1408, 806, 1408, 806}, + { 1, 1, 1408, 806, 1408, 806}, + { 1, 1, 1408, 806, 1408, 806}, + { 1, 1, 1408, 806, 1408, 806}, + { 1, 1, 1408, 806, 1408, 806}, + { 1, 1, 1408, 806, 1408, 806}, + { 1, 1, 1408, 806, 1408, 806}, + { 1, 1, 1408, 806, 1408, 806}, + { 1, 1, 1408, 806, 1408, 806} +}; + +static const SiS310_LCDDataStruct SiS310_NoScaleData[] = +{ + { 1, 1, 800, 449, 800, 449 }, + { 1, 1, 800, 449, 800, 449 }, + { 1, 1, 900, 449, 900, 449 }, + { 1, 1, 900, 449, 900, 449 }, + { 1, 1, 800, 525, 800, 525 }, + { 1, 1,1056, 628,1056, 628 }, + { 1, 1,1344, 806,1344, 806 }, + { 1, 1,1688,1066,1688,1066 }, + { 1, 1,1688, 791,1688, 791 }, /* 1280x768: 791 was 860 in both cases */ + { 1, 1,2048,1250,2048,1250 }, /* 1600x1200 (guessed) */ + { 1, 1,1800,1000,1800,1000 } /* 1280x960 */ }; typedef struct _SiS310_TVDataStruct @@ -1482,16 +1625,16 @@ { 1, 1, 864, 525,1270, 600, 50, 0, 0,0xf4,0xff,0x1c,0x22} }; -static const SiS310_TVDataStruct SiS310_ExtPALData[]= +static const SiS310_TVDataStruct SiS310_ExtPALData[] = { { 27, 10, 848, 448,1270, 530, 50, 0, 50,0xf4,0xff,0x1c,0x22}, { 108, 35, 848, 398,1270, 530, 50, 0, 50,0xf4,0xff,0x1c,0x22}, { 12, 5, 954, 448,1270, 530, 50, 0, 50,0xf1,0x04,0x1f,0x18}, { 9, 4, 960, 463,1644, 438, 50, 0, 50,0xf4,0x0b,0x1c,0x0a}, - { 9, 4, 848, 528,1270, 530, 0, 0, 50,0xf5,0xfb,0x1b,0x2a}, + { 9, 4, 848, 528,1270, 530, 0, 0, 50,0xf5,0xfb,0x1b,0x2a}, /* 640x480 */ { 36, 25,1060, 648,1316, 530, 438, 0, 438,0xeb,0x05,0x25,0x16}, /* 800x600 */ - { 3, 2,1080, 619,1270, 540, 438, 0, 438,0xf3,0x00,0x1d,0x20}, - { 1, 1,1170, 821,1270, 520, 686, 0, 686,0xF3,0x00,0x1D,0x20} /*301b*/ + { 3, 2,1080, 619,1270, 540, 438, 0, 438,0xf3,0x00,0x1d,0x20}, /* 720x480/576 */ + { 1, 1,1170, 821,1270, 520, 686, 0, 686,0xF3,0x00,0x1D,0x20} /* 1024x768 */ }; static const SiS310_TVDataStruct SiS310_StNTSCData[]= @@ -1509,29 +1652,45 @@ { 88, 35, 858, 393,1270, 440, 171, 0, 171,0xf1,0x04,0x1f,0x18}, { 143, 70, 924, 443,1270, 440, 92, 0, 92,0xf1,0x04,0x1f,0x18}, { 143, 70, 924, 393,1270, 440, 92, 0, 92,0xf4,0x0b,0x1c,0x0a}, - { 143, 76, 836, 523,1270, 440, 224, 0, 0,0xf1,0x05,0x1f,0x16}, - { 143, 120,1056, 643,1270, 440, 0, 128, 0,0xf4,0x10,0x1c,0x00}, /* 800x600 */ - { 2, 1, 858, 503,1270, 480, 0, 128, 0,0xee,0x0c,0x22,0x08}, - { 65, 64,1056, 791,1270, 480, 638, 0, 0,0xEE,0x0C,0x22,0x08} /*301b*/ + { 143, 76, 836, 523,1270, 440, 224, 0, 0,0xf1,0x05,0x1f,0x16}, /* 640x480 */ + { 143, 120,1056, 643,1270, 440, 0, 128, 0,0xf4,0x10,0x1c,0x00}, /* 800x600 */ + { 2, 1, 858, 503,1270, 480, 0, 128, 0,0xee,0x0c,0x22,0x08}, /* 720x480/576 */ + { 65, 64,1056, 791,1270, 480, 638, 0, 0,0xEE,0x0C,0x22,0x08} /* 1024x768 */ }; -/* TW: These tables will need data ! */ +#if 0 static const SiS310_TVDataStruct SiS310_St1HiTVData[]= { - {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00} + }; +#endif static const SiS310_TVDataStruct SiS310_St2HiTVData[]= { - {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00} + { 3, 1, 0x348,0x1e3,0x670,0x3c0,0x032, 0, 0, 0x00,0x00,0x00,0x00}, + { 1, 1, 0x37c,0x233,0x2b2,0x2bc, 0, 0, 0, 0x00,0x00,0x00,0x00}, + { 3, 1, 0x348,0x1e3,0x670,0x3c0,0x032, 0, 0, 0x00,0x00,0x00,0x00}, + { 1, 1, 0x3e8,0x233,0x311,0x2bc, 0, 0, 0, 0x00,0x00,0x00,0x00}, + { 5, 2, 0x348,0x233,0x670,0x3c0,0x08d,128, 0, 0x00,0x00,0x00,0x00}, + { 8, 5, 0x41a,0x2ab,0x670,0x3c0,0x17c,128, 0, 0x00,0x00,0x00,0x00} }; static const SiS310_TVDataStruct SiS310_ExtHiTVData[]= { - {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00} + { 6, 1, 0x348,0x233,0x660,0x3c0, 0, 0, 0, 0x00,0x00,0x00,0x00}, + { 3, 1, 0x3c0,0x233,0x660,0x3c0, 0, 0, 0, 0x00,0x00,0x00,0x00}, + { 3, 1, 0x348,0x1e3,0x660,0x3c0, 0, 0, 0, 0x00,0x00,0x00,0x00}, + { 3, 1, 0x3c0,0x233,0x660,0x3c0, 0, 0, 0, 0x00,0x00,0x00,0x00}, + { 5, 1, 0x348,0x233,0x670,0x3c0,0x166,128, 0, 0x00,0x00,0x00,0x00}, + { 16, 5, 0x41a,0x2ab,0x670,0x3c0,0x143,128, 0, 0x00,0x00,0x00,0x00}, + { 25, 12, 0x4ec,0x353,0x670,0x3c0,0x032, 0, 0, 0x00,0x00,0x00,0x00}, + { 5, 4, 0x627,0x464,0x670,0x3c0,0x128, 0, 0, 0x00,0x00,0x00,0x00}, + { 4, 1, 0x41a,0x233,0x670,0x3c0,0x143,128, 0, 0x00,0x00,0x00,0x00}, + { 5, 2, 0x578,0x293,0x670,0x3c0,0x032, 0, 0, 0x00,0x00,0x00,0x00}, + { 8, 5, 0x6d6,0x323,0x670,0x3c0,0x128, 0, 0, 0x00,0x00,0x00,0x00} }; -static const UCHAR SiS310_NTSCTiming[] = { /* TW: New (checked 1.09, 1.10.6s) */ +static const UCHAR SiS310_NTSCTiming[] = { 0x17,0x1d,0x03,0x09,0x05,0x06,0x0c,0x0c, 0x94,0x49,0x01,0x0a,0x06,0x0d,0x04,0x0a, 0x06,0x14,0x0d,0x04,0x0a,0x00,0x85,0x1b, @@ -1542,7 +1701,7 @@ 0x00,0x40,0x44,0x00,0xdb,0x02,0x3b,0x00 }; -static const UCHAR SiS310_PALTiming[] = { /* TW: New (checked 1.09, 1.10.6s) */ +static const UCHAR SiS310_PALTiming[] = { 0x19,0x52,0x35,0x6e,0x04,0x38,0x3d,0x70, 0x94,0x49,0x01,0x12,0x06,0x3e,0x35,0x6d, 0x06,0x14,0x3e,0x35,0x6d,0x00,0x45,0x2b, @@ -1553,8 +1712,7 @@ 0x00,0x40,0x3e,0x00,0xe1,0x02,0x28,0x00 }; -#ifdef oldHV -static const UCHAR SiS310_HiTVExtTiming[] = { /* TW: New */ +static const UCHAR SiS310_HiTVExtTiming[] = { 0x32,0x65,0x2c,0x5f,0x08,0x31,0x3a,0x64, 0x28,0x02,0x01,0x3d,0x06,0x3e,0x35,0x6d, 0x06,0x14,0x3e,0x35,0x6d,0x00,0xc5,0x3f, @@ -1565,7 +1723,7 @@ 0x63,0x4f,0x27,0x00,0xfc,0xff,0x6a,0x00 }; -static const UCHAR SiS310_HiTVSt1Timing[] = { /* TW: New */ +static const UCHAR SiS310_HiTVSt1Timing[] = { 0x32,0x65,0x2c,0x5f,0x08,0x31,0x3a,0x65, 0x28,0x02,0x01,0x3d,0x06,0x3e,0x35,0x6d, 0x06,0x14,0x3e,0x35,0x6d,0x00,0xc5,0x3f, @@ -1576,7 +1734,7 @@ 0xaf,0x5d,0x0e,0x00,0xfc,0xff,0x2d,0x00 }; -static const UCHAR SiS310_HiTVSt2Timing[] = { /* TW: New */ +static const UCHAR SiS310_HiTVSt2Timing[] = { 0x32,0x65,0x2c,0x5f,0x08,0x31,0x3a,0x64, 0x28,0x02,0x01,0x3d,0x06,0x3e,0x35,0x6d, 0x06,0x14,0x3e,0x35,0x6d,0x00,0xc5,0x3f, @@ -1587,7 +1745,7 @@ 0x63,0x4f,0x27,0x00,0xfc,0xff,0x6a,0x00 }; -static const UCHAR SiS310_HiTVTextTiming[] = { /* TW: New */ +static const UCHAR SiS310_HiTVTextTiming[] = { 0x32,0x65,0x2c,0x5f,0x08,0x31,0x3a,0x65, 0x28,0x02,0x01,0x3d,0x06,0x3e,0x35,0x6d, 0x06,0x14,0x3e,0x35,0x6d,0x00,0xc5,0x3f, @@ -1598,7 +1756,7 @@ 0x72,0x5c,0x11,0x00,0xfc,0xff,0x32,0x00 }; -static const UCHAR SiS310_HiTVGroup3Data[] = { /* TW: New */ +static const UCHAR SiS310_HiTVGroup3Data[] = { 0x00,0x1a,0x22,0x63,0x62,0x22,0x08,0x5f, 0x05,0x21,0xb2,0xb2,0x55,0x77,0x2a,0xa6, 0x25,0x2f,0x47,0xfa,0xc8,0xff,0x8e,0x20, @@ -1609,7 +1767,7 @@ 0x18,0x05,0x18,0x05,0x4c,0xa8,0x01 }; -static const UCHAR SiS310_HiTVGroup3Simu[] = { /* TW: New */ +static const UCHAR SiS310_HiTVGroup3Simu[] = { 0x00,0x1a,0x22,0x63,0x62,0x22,0x08,0x95, 0xdb,0x20,0xb8,0xb8,0x55,0x47,0x2a,0xa6, 0x25,0x2f,0x47,0xfa,0xc8,0xff,0x8e,0x20, @@ -1620,7 +1778,7 @@ 0x18,0x05,0x18,0x05,0x4c,0xa8,0x01 }; -static const UCHAR SiS310_HiTVGroup3Text[] = { /* TW: New */ +static const UCHAR SiS310_HiTVGroup3Text[] = { 0x00,0x1a,0x22,0x63,0x62,0x22,0x08,0xa7, 0xf5,0x20,0xce,0xce,0x55,0x47,0x2a,0xa6, 0x25,0x2f,0x47,0xfa,0xc8,0xff,0x8e,0x20, @@ -1630,14 +1788,13 @@ 0x01,0x05,0x03,0x7e,0x65,0x31,0x14,0x75, 0x18,0x05,0x18,0x05,0x4c,0xa8,0x01 }; -#endif typedef struct _SiS310_PanelDelayTblStruct { UCHAR timer[2]; } SiS310_PanelDelayTblStruct; -static const SiS310_PanelDelayTblStruct SiS310_PanelDelayTbl[]= /* TW: New */ +static const SiS310_PanelDelayTblStruct SiS310_PanelDelayTbl[]= { {{0x10,0x40}}, /* TW: from 650/301LVx 1.10.6s BIOS */ {{0x10,0x40}}, @@ -1705,31 +1862,31 @@ static const SiS310_LVDSDataStruct SiS310_LVDS320x480Data_1[]= { - {848, 433,400, 525}, - {848, 389,400, 525}, - {848, 433,400, 525}, - {848, 389,400, 525}, - {848, 518,400, 525}, - {1056,628,400, 525}, - {400, 525,400, 525}, - {800, 449,1000, 644}, - {800, 525,1000, 635} -}; - -static const SiS310_LVDSDataStruct SiS310_LVDS800x600Data_1[]= /* TW: New */ -{ - {848, 433,1060, 629}, - {848, 389,1060, 629}, - {848, 433,1060, 629}, - {848, 389,1060, 629}, - {848, 518,1060, 629}, + { 848, 433, 400, 525}, + { 848, 389, 400, 525}, + { 848, 433, 400, 525}, + { 848, 389, 400, 525}, + { 848, 518, 400, 525}, + {1056, 628, 400, 525}, + { 400, 525, 400, 525}, + { 800, 449,1000, 644}, + { 800, 525,1000, 635} +}; + +static const SiS310_LVDSDataStruct SiS310_LVDS800x600Data_1[]= +{ + { 848, 433,1060, 629}, + { 848, 389,1060, 629}, + { 848, 433,1060, 629}, + { 848, 389,1060, 629}, + { 848, 518,1060, 629}, {1056, 628,1056, 628}, {1056, 628,1056, 628}, - {800, 449,1000, 644}, - {800, 525,1000, 635} + { 800, 449,1000, 644}, + { 800, 525,1000, 635} }; -static const SiS310_LVDSDataStruct SiS310_LVDS800x600Data_2[]= /* TW: New */ +static const SiS310_LVDSDataStruct SiS310_LVDS800x600Data_2[]= { {1056, 628,1056, 628}, {1056, 628,1056, 628}, @@ -1738,24 +1895,24 @@ {1056, 628,1056, 628}, {1056, 628,1056, 628}, {1056, 628,1056, 628}, - {800, 449,1000, 644}, - {800, 525,1000, 635} + { 800, 449,1000, 644}, + { 800, 525,1000, 635} }; -static const SiS310_LVDSDataStruct SiS310_LVDS1024x768Data_1[]= /* TW: New */ +static const SiS310_LVDSDataStruct SiS310_LVDS1024x768Data_1[]= { - {840, 438,1344, 806}, - {840, 409,1344, 806}, - {840, 438,1344, 806}, - {840, 409,1344, 806}, - {840, 518,1344, 806}, /* 640x480 */ + { 840, 438,1344, 806}, + { 840, 409,1344, 806}, + { 840, 438,1344, 806}, + { 840, 409,1344, 806}, + { 840, 518,1344, 806}, /* 640x480 */ {1050, 638,1344, 806}, /* 800x600 */ {1344, 806,1344, 806}, /* 1024x768 */ - {800, 449,1280, 801}, - {800, 525,1280, 813} + { 800, 449,1280, 801}, + { 800, 525,1280, 813} }; -static const SiS310_LVDSDataStruct SiS310_LVDS1024x768Data_2[]= /* TW: New */ +static const SiS310_LVDSDataStruct SiS310_LVDS1024x768Data_2[]= { {1344, 806,1344, 806}, {1344, 806,1344, 806}, @@ -1764,50 +1921,48 @@ {1344, 806,1344, 806}, {1344, 806,1344, 806}, {1344, 806,1344, 806}, - {800, 449,1280, 801}, - {800, 525,1280, 813} + { 800, 449,1280, 801}, + { 800, 525,1280, 813} }; -static const SiS310_LVDSDataStruct SiS310_LVDS1280x1024Data_1[]= /* TW: New */ -{ - {840, 438,1344, 806}, - {840, 409,1344, 806}, - {840, 438,1344, 806}, - {840, 409,1344, 806}, - {840, 518,1344, 806}, - {1050, 638,1344, 806}, - {1344, 806,1344, 806}, - {800, 449,1280, 801}, - {800, 525,1280, 813} +static const SiS310_LVDSDataStruct SiS310_LVDS1280x1024Data_1[]= +{ + {1048, 442,1688,1066}, + {1048, 392,1688,1066}, + {1048, 442,1688,1066}, + {1048, 392,1688,1066}, + {1048, 522,1688,1066}, + {1208, 642,1688,1066}, + {1432, 810,1688,1066}, + {1688,1066,1688,1066} }; -static const SiS310_LVDSDataStruct SiS310_LVDS1280x1024Data_2[]= /* TW: New */ -{ - {1344, 806,1344, 806}, - {1344, 806,1344, 806}, - {1344, 806,1344, 806}, - {1344, 806,1344, 806}, - {1344, 806,1344, 806}, - {1344, 806,1344, 806}, - {1344, 806,1344, 806}, - {800, 449,1280, 801}, - {800, 525,1280, 813} +static const SiS310_LVDSDataStruct SiS310_LVDS1280x1024Data_2[]= +{ + {1688,1066,1688,1066}, + {1688,1066,1688,1066}, + {1688,1066,1688,1066}, + {1688,1066,1688,1066}, + {1688,1066,1688,1066}, + {1688,1066,1688,1066}, + {1688,1066,1688,1066}, + {1688,1066,1688,1066} }; -static const SiS310_LVDSDataStruct SiS310_LVDS1400x1050Data_1[]= /* TW: New */ +static const SiS310_LVDSDataStruct SiS310_LVDS1400x1050Data_1[]= { - {928, 416, 1688, 1066}, - {928, 366, 1688, 1066}, - {928, 416, 1688, 1066}, - {928, 366, 1688, 1066}, - {928, 496, 1688, 1066}, - {1088, 616, 1688, 1066}, - {1312, 784, 1688, 1066}, - {1568, 1040, 1688, 1066}, - {1688, 1066, 1688, 1066} + { 928, 416, 1688,1066}, + { 928, 366, 1688,1066}, + { 928, 416, 1688,1066}, + { 928, 366, 1688,1066}, + { 928, 496, 1688,1066}, + {1088, 616, 1688,1066}, + {1312, 784, 1688,1066}, + {1568,1040, 1688,1066}, + {1688,1066, 1688,1066} }; -static const SiS310_LVDSDataStruct SiS310_LVDS1400x1050Data_2[]= /* TW: New */ +static const SiS310_LVDSDataStruct SiS310_LVDS1400x1050Data_2[]= { {1688,1066, 1688,1066}, {1688,1066, 1688,1066}, @@ -1820,102 +1975,154 @@ {1688,1066, 1688,1066}, }; -/* TW: New: - from 300 series */ +static const SiS310_LVDSDataStruct SiS310_LVDS1600x1200Data_1[]= +{ + {1088, 450, 2048,1250}, + {1088, 400, 2048,1250}, + {1088, 450, 2048,1250}, + {1088, 400, 2048,1250}, + {1088, 530, 2048,1250}, + {1248, 650, 2048,1250}, + {1472, 818, 2048,1250}, + {1728,1066, 2048,1250}, + {1848,1066, 2048,1250}, + {2048,1250, 2048,1250} +}; + +static const SiS310_LVDSDataStruct SiS310_LVDS1600x1200Data_2[]= +{ + {2048,1250, 2048,1250}, + {2048,1250, 2048,1250}, + {2048,1250, 2048,1250}, + {2048,1250, 2048,1250}, + {2048,1250, 2048,1250}, + {2048,1250, 2048,1250}, + {2048,1250, 2048,1250}, + {2048,1250, 2048,1250}, + {2048,1250, 2048,1250}, + {2048,1250, 2048,1250} +}; + +static const SiS310_LVDSDataStruct SiS310_LVDS1280x768Data_1[]= +{ + { 768, 438, 1408, 806}, + { 768, 388, 1408, 806}, + { 768, 438, 1408, 806}, + { 768, 388, 1408, 806}, + { 768, 518, 1408, 806}, + { 928, 638, 1408, 806}, + {1152, 806, 1408, 806}, + {1408, 806, 1408, 806}, + {1408, 806, 1408, 806} +}; + +static const SiS310_LVDSDataStruct SiS310_LVDS1280x768Data_2[]= +{ + {1408, 806, 1408, 806}, + {1408, 806, 1408, 806}, + {1408, 806, 1408, 806}, + {1408, 806, 1408, 806}, + {1408, 806, 1408, 806}, + {1408, 806, 1408, 806}, + {1408, 806, 1408, 806}, + {1408, 806, 1408, 806}, + {1408, 806, 1408, 806} +}; + static const SiS310_LVDSDataStruct SiS310_LVDS1024x600Data_1[]= { - {840, 604,1344, 800}, - {840, 560,1344, 800}, - {840, 604,1344, 800}, - {840, 560,1344, 800}, - {840, 689,1344, 800}, - {1050, 800,1344, 800}, - {1344, 800,1344, 800}, - {800, 449,1280, 801}, - {800, 525,1280, 813} + { 840, 604, 1344, 800}, + { 840, 560, 1344, 800}, + { 840, 604, 1344, 800}, + { 840, 560, 1344, 800}, + { 840, 689, 1344, 800}, + {1050, 800, 1344, 800}, + {1344, 800, 1344, 800}, + { 800, 449, 1280, 801}, + { 800, 525, 1280, 813} }; -/* TW: New: - from 300 series */ static const SiS310_LVDSDataStruct SiS310_LVDS1024x600Data_2[]= { - {1344, 800,1344, 800}, - {1344, 800,1344, 800}, - {1344, 800,1344, 800}, - {1344, 800,1344, 800}, - {1344, 800,1344, 800}, - {1344, 800,1344, 800}, - {1344, 800,1344, 800}, - {800, 449,1280, 801}, - {800, 525,1280, 813} + {1344, 800, 1344, 800}, + {1344, 800, 1344, 800}, + {1344, 800, 1344, 800}, + {1344, 800, 1344, 800}, + {1344, 800, 1344, 800}, + {1344, 800, 1344, 800}, + {1344, 800, 1344, 800}, + { 800, 449, 1280, 801}, + { 800, 525, 1280, 813} }; -/* TW: New: - from 300 series */ static const SiS310_LVDSDataStruct SiS310_LVDS1152x768Data_1[]= { - {840, 438,1344, 806}, - {840, 409,1344, 806}, - {840, 438,1344, 806}, - {840, 409,1344, 806}, - {840, 518,1344, 806}, - {1050, 638,1344, 806}, - {1344, 806,1344, 806}, - {800, 449,1280, 801}, - {800, 525,1280, 813} + { 840, 438, 1344, 806}, + { 840, 409, 1344, 806}, + { 840, 438, 1344, 806}, + { 840, 409, 1344, 806}, + { 840, 518, 1344, 806}, + {1050, 638, 1344, 806}, + {1344, 806, 1344, 806}, + { 800, 449, 1280, 801}, + { 800, 525, 1280, 813} }; -/* TW: New: - from 300 series */ static const SiS310_LVDSDataStruct SiS310_LVDS1152x768Data_2[]= { - {1344, 806,1344, 806}, - {1344, 806,1344, 806}, - {1344, 806,1344, 806}, - {1344, 806,1344, 806}, - {1344, 806,1344, 806}, - {1344, 806,1344, 806}, - {1344, 806,1344, 806}, - {800, 449,1280, 801}, - {800, 525,1280, 813} + {1344, 806, 1344, 806}, + {1344, 806, 1344, 806}, + {1344, 806, 1344, 806}, + {1344, 806, 1344, 806}, + {1344, 806, 1344, 806}, + {1344, 806, 1344, 806}, + {1344, 806, 1344, 806}, + { 800, 449, 1280, 801}, + { 800, 525, 1280, 813} +}; + +/* TW: Pass 1:1 data */ +static const SiS310_LVDSDataStruct SiS310_LVDSXXXxXXXData_1[]= +{ + { 800, 449, 800, 449}, + { 800, 449, 800, 449}, + { 900, 449, 900, 449}, + { 900, 449, 900, 449}, + { 800, 525, 800, 525}, /* 640x480 */ + {1056, 628, 1056, 628}, /* 800x600 */ + {1344, 806, 1344, 806}, /* 1024x768 */ + {1344,1066, 1344,1066}, /* 1280x1024 */ /* INSERTED ! */ + {1688, 806, 1688, 806}, /* 1280x768 */ + /* No other panels ! */ }; -/* TW: New in 650/LVDS BIOS - pass 1:1 data */ -static const SiS310_LVDSDataStruct SiS310_LVDSXXXxXXXData_1[]= /* TW: New */ +static const SiS310_LVDSDataStruct SiS310_LVDS640x480Data_1[]= { - { 800, 449, 800, 449}, { 800, 449, 800, 449}, - { 900, 449, 900, 449}, - { 900, 449, 900, 449}, + { 800, 449, 800, 449}, + { 800, 449, 800, 449}, + { 800, 449, 800, 449}, { 800, 525, 800, 525}, {1056, 628,1056, 628}, - {1344, 806,1344, 806}, - {1688, 806,1688, 806} -}; - -static const SiS310_LVDSDataStruct SiS310_LVDS640x480Data_1[]= /* TW: New */ -{ - {800, 449, 800, 449}, - {800, 449, 800, 449}, - {800, 449, 800, 449}, - {800, 449, 800, 449}, - {800, 525, 800, 525}, - {1056, 628,1056, 628}, {1056, 628,1056, 628}, {1056, 628,1056, 628}, {1056, 628,1056, 628} }; -static const SiS310_LVDSDataStruct SiS310_LVDS1280x960Data_1[]= /* TW: New */ +static const SiS310_LVDSDataStruct SiS310_LVDS1280x960Data_1[]= { - {840, 438,1344, 806}, - {840, 409,1344, 806}, - {840, 438,1344, 806}, - {840, 409,1344, 806}, - {840, 518,1344, 806}, + { 840, 438,1344, 806}, + { 840, 409,1344, 806}, + { 840, 438,1344, 806}, + { 840, 409,1344, 806}, + { 840, 518,1344, 806}, {1050, 638,1344, 806}, {1344, 806,1344, 806}, - {800, 449,1280, 801}, - {800, 525,1280, 813} + { 800, 449,1280, 801}, + { 800, 525,1280, 813} }; -static const SiS310_LVDSDataStruct SiS310_LVDS1280x960Data_2[]= /* TW: New */ +static const SiS310_LVDSDataStruct SiS310_LVDS1280x960Data_2[]= { {1344, 806,1344, 806}, {1344, 806,1344, 806}, @@ -1924,24 +2131,26 @@ {1344, 806,1344, 806}, {1344, 806,1344, 806}, {1344, 806,1344, 806}, - {800, 449,1280, 801}, - {800, 525,1280, 813} + { 800, 449,1280, 801}, + { 800, 525,1280, 813} }; -static const SiS310_LVDSDataStruct SiS310_LCDA1400x1050Data_1[]= /* TW: New */ +/* LCDA */ + +static const SiS310_LVDSDataStruct SiS310_LCDA1400x1050Data_1[]= { /* TW: Might be temporary (invalid) data */ - {928, 416, 1688, 1066}, - {928, 366, 1688, 1066}, - {1008, 416, 1688, 1066}, - {1008, 366, 1688, 1066}, - {1200, 530, 1688, 1066}, - {1088, 616, 1688, 1066}, - {1312, 784, 1688, 1066}, - {1568, 1040, 1688, 1066}, - {1688, 1066, 1688, 1066} + { 928, 416, 1688,1066}, + { 928, 366, 1688,1066}, + {1008, 416, 1688,1066}, + {1008, 366, 1688,1066}, + {1200, 530, 1688,1066}, + {1088, 616, 1688,1066}, + {1312, 784, 1688,1066}, + {1568,1040, 1688,1066}, + {1688,1066, 1688,1066} }; -static const SiS310_LVDSDataStruct SiS310_LCDA1400x1050Data_2[]= /* TW: New */ +static const SiS310_LVDSDataStruct SiS310_LCDA1400x1050Data_2[]= { /* TW: Temporary data. Not valid */ {1344, 806,1344, 806}, {1344, 806,1344, 806}, @@ -1950,11 +2159,11 @@ {1344, 806,1344, 806}, {1344, 806,1344, 806}, {1344, 806,1344, 806}, - {800, 449,1280, 801}, - {800, 525,1280, 813} + { 800, 449,1280, 801}, + { 800, 525,1280, 813} }; -static const SiS310_LVDSDataStruct SiS310_LCDA1600x1200Data_1[]= /* TW: New */ +static const SiS310_LVDSDataStruct SiS310_LCDA1600x1200Data_1[]= { /* TW: Temporary data. Not valid */ {1344, 806,1344, 806}, {1344, 806,1344, 806}, @@ -1963,11 +2172,11 @@ {1344, 806,1344, 806}, {1344, 806,1344, 806}, {1344, 806,1344, 806}, - {800, 449,1280, 801}, - {800, 525,1280, 813} + { 800, 449,1280, 801}, + { 800, 525,1280, 813} }; -static const SiS310_LVDSDataStruct SiS310_LCDA1600x1200Data_2[]= /* TW: New */ +static const SiS310_LVDSDataStruct SiS310_LCDA1600x1200Data_2[]= { /* TW: Temporary data. Not valid */ {0, 0, 0, 0}, {0, 0, 0, 0}, @@ -1983,7 +2192,53 @@ {0, 0, 0, 0} }; -static const SiS310_LVDSDataStruct SiS310_CHTVUNTSCData[]= /* TW: New */ +/* Chrontel TV */ + +static const SiS310_LVDSDataStruct SiS310_CHTVUNTSCData[]= +{ + { 840, 600, 840, 600}, + { 840, 600, 840, 600}, + { 840, 600, 840, 600}, + { 840, 600, 840, 600}, + { 784, 600, 784, 600}, + {1064, 750,1064, 750}, + {1160, 945,1160, 945} /* TW: For Ch7019 1024 */ +}; + +static const SiS310_LVDSDataStruct SiS310_CHTVONTSCData[]= +{ + { 840, 525, 840, 525}, + { 840, 525, 840, 525}, + { 840, 525, 840, 525}, + { 840, 525, 840, 525}, + { 784, 525, 784, 525}, + {1040, 700,1040, 700}, + {1160, 840,1160, 840} /* TW: For Ch7019 1024 */ +}; + +static const SiS310_LVDSDataStruct SiS310_CHTVUPALData[]= +{ + {1008, 625,1008, 625}, + {1008, 625,1008, 625}, + {1008, 625,1008, 625}, + {1008, 625,1008, 625}, + { 840, 625, 840, 625}, + { 960, 750, 960, 750}, + {1400,1000,1400,1000} /* TW: For Ch7019 1024 */ +}; + +static const SiS310_LVDSDataStruct SiS310_CHTVOPALData[]= +{ + {1008, 625,1008, 625}, + {1008, 625,1008, 625}, + {1008, 625,1008, 625}, + {1008, 625,1008, 625}, + { 840, 625, 840, 625}, + { 944, 625, 944, 625}, + {1400, 875,1400, 875} /* TW: For Ch7019 1024 */ +}; + +static const SiS310_LVDSDataStruct SiS310_CHTVUPALMData[]= { { 840, 600, 840, 600}, { 840, 600, 840, 600}, @@ -1994,7 +2249,7 @@ {1160, 945,1160, 945} /* TW: For Ch7019 1024 */ }; -static const SiS310_LVDSDataStruct SiS310_CHTVONTSCData[]= /* TW: New */ +static const SiS310_LVDSDataStruct SiS310_CHTVOPALMData[]= { { 840, 525, 840, 525}, { 840, 525, 840, 525}, @@ -2005,7 +2260,7 @@ {1160, 840,1160, 840} /* TW: For Ch7019 1024 */ }; -static const SiS310_LVDSDataStruct SiS310_CHTVUPALData[]= /* TW: New */ +static const SiS310_LVDSDataStruct SiS310_CHTVUPALNData[]= { {1008, 625,1008, 625}, {1008, 625,1008, 625}, @@ -2016,7 +2271,7 @@ {1400,1000,1400,1000} /* TW: For Ch7019 1024 */ }; -static const SiS310_LVDSDataStruct SiS310_CHTVOPALData[]= /* TW: New */ +static const SiS310_LVDSDataStruct SiS310_CHTVOPALNData[]= { {1008, 625,1008, 625}, {1008, 625,1008, 625}, @@ -2027,15 +2282,24 @@ {1400, 875,1400, 875} /* TW: For Ch7019 1024 */ }; +static const SiS310_LVDSDataStruct SiS310_CHTVSOPALData[]= /* TW: (super overscan - no effect on 7019) */ +{ + {1008, 625,1008, 625}, + {1008, 625,1008, 625}, + {1008, 625,1008, 625}, + {1008, 625,1008, 625}, + { 840, 625, 840, 625}, + { 944, 625, 944, 625}, + {1400, 875,1400, 875} +}; + typedef struct _SiS310_LVDSDesStruct { USHORT LCDHDES; USHORT LCDVDES; } SiS310_LVDSDesStruct; -/* TW: PanelType arrays taken from 650/LVDS BIOS 1.10.0 */ - -static const SiS310_LVDSDesStruct SiS310_PanelType00_1[]= /* TW: New */ +static const SiS310_LVDSDesStruct SiS310_PanelType00_1[]= { { 0, 0}, { 0, 0}, @@ -2048,7 +2312,7 @@ { 0, 0} }; -static const SiS310_LVDSDesStruct SiS310_PanelType01_1[]= /* TW: New */ +static const SiS310_LVDSDesStruct SiS310_PanelType01_1[]= { { 0, 0}, { 0, 0}, @@ -2061,7 +2325,7 @@ { 0, 0} }; -static const SiS310_LVDSDesStruct SiS310_PanelType02_1[]= /* TW: New */ +static const SiS310_LVDSDesStruct SiS310_PanelType02_1[]= { { 0, 0}, { 0, 0}, @@ -2076,7 +2340,7 @@ }; -static const SiS310_LVDSDesStruct SiS310_PanelType03_1[]= /* TW: New */ +static const SiS310_LVDSDesStruct SiS310_PanelType03_1[]= { { 0, 0}, { 0, 0}, @@ -2089,7 +2353,7 @@ { 0, 0} }; -static const SiS310_LVDSDesStruct SiS310_PanelType04_1[]= /* TW: New */ +static const SiS310_LVDSDesStruct SiS310_PanelType04_1[]= { {1343, 798}, {1343, 794}, @@ -2102,7 +2366,7 @@ { 0, 0} }; -static const SiS310_LVDSDesStruct SiS310_PanelType05_1[]= /* TW: New */ +static const SiS310_LVDSDesStruct SiS310_PanelType05_1[]= { {1343, 798}, {1343, 794}, @@ -2115,7 +2379,7 @@ { 0, 0} }; -static const SiS310_LVDSDesStruct SiS310_PanelType06_1[]= /* TW: New */ +static const SiS310_LVDSDesStruct SiS310_PanelType06_1[]= { {1343, 798}, {1343, 794}, @@ -2128,7 +2392,7 @@ { 0, 0} }; -static const SiS310_LVDSDesStruct SiS310_PanelType07_1[]= /* TW: New */ +static const SiS310_LVDSDesStruct SiS310_PanelType07_1[]= { {1343, 798}, {1343, 794}, @@ -2141,7 +2405,7 @@ { 0, 0} }; -static const SiS310_LVDSDesStruct SiS310_PanelType08_1[]= /* TW: New */ +static const SiS310_LVDSDesStruct SiS310_PanelType08_1[]= /* 1400x1050 */ { { 0, 0}, { 0, 0}, @@ -2156,32 +2420,37 @@ { 0, 0} }; -static const SiS310_LVDSDesStruct SiS310_PanelType09_1[]= /* TW: New */ +static const SiS310_LVDSDesStruct SiS310_PanelType09_1[]= /* 1280x768 */ { - { 0, 448}, - { 0, 448}, - { 0, 448}, - { 0, 448}, - { 0, 524}, - { 0, 627}, - { 0, 805}, - { 0, 805}, + { 0, 0}, + { 0, 0}, + { 0, 0}, + { 0, 0}, + { 0, 0}, + { 0, 0}, + { 0, 0}, + { 0, 0}, + { 0, 0}, + { 0, 0}, + { 0, 0} }; -static const SiS310_LVDSDesStruct SiS310_PanelType0a_1[]= /* TW: New */ +static const SiS310_LVDSDesStruct SiS310_PanelType0a_1[]= /* 1600x1200 */ { - {1059, 626}, - {1059, 624}, - {1059, 626}, - {1059, 624}, - {1059, 624}, - { 0, 627}, - { 0, 627}, - { 0, 0}, - { 0, 0} + { 0, 0}, + { 0, 0}, + { 0, 0}, + { 0, 0}, + { 0, 0}, + { 0, 0}, + { 0, 0}, + { 0, 0}, + { 0, 0}, + { 0, 0}, + { 0, 0} }; -static const SiS310_LVDSDesStruct SiS310_PanelType0b_1[]= /* TW: New */ +static const SiS310_LVDSDesStruct SiS310_PanelType0b_1[]= { {1343, 798}, {1343, 794}, @@ -2194,7 +2463,7 @@ { 0, 0} }; -static const SiS310_LVDSDesStruct SiS310_PanelType0c_1[]= /* TW: New */ +static const SiS310_LVDSDesStruct SiS310_PanelType0c_1[]= { {1343, 798}, {1343, 794}, @@ -2207,7 +2476,7 @@ { 0, 0} }; -static const SiS310_LVDSDesStruct SiS310_PanelType0d_1[]= /* TW: New */ +static const SiS310_LVDSDesStruct SiS310_PanelType0d_1[]= { {1343, 798}, {1343, 794}, @@ -2220,7 +2489,7 @@ { 0, 0} }; -static const SiS310_LVDSDesStruct SiS310_PanelType0e_1[]= /* TW: New */ +static const SiS310_LVDSDesStruct SiS310_PanelType0e_1[]= { {1343, 798}, {1343, 794}, @@ -2233,7 +2502,7 @@ { 0, 0} }; -static const SiS310_LVDSDesStruct SiS310_PanelType0f_1[]= /* TW: New */ +static const SiS310_LVDSDesStruct SiS310_PanelType0f_1[]= { {1343, 798}, {1343, 794}, @@ -2246,7 +2515,7 @@ { 0, 0} }; -static const SiS310_LVDSDesStruct SiS310_PanelType00_2[]= /* TW: New */ +static const SiS310_LVDSDesStruct SiS310_PanelType00_2[]= { {980, 528}, {980, 503}, @@ -2259,7 +2528,7 @@ { 0, 0} }; -static const SiS310_LVDSDesStruct SiS310_PanelType01_2[]= /* TW: New */ +static const SiS310_LVDSDesStruct SiS310_PanelType01_2[]= { {1152, 622}, {1152, 597}, @@ -2272,7 +2541,7 @@ { 0, 0} }; -static const SiS310_LVDSDesStruct SiS310_PanelType02_2[]= /* TW: New */ +static const SiS310_LVDSDesStruct SiS310_PanelType02_2[]= { {1368, 754}, {1368, 729}, @@ -2287,7 +2556,7 @@ { 0, 0} }; -static const SiS310_LVDSDesStruct SiS310_PanelType03_2[]= /* TW: New */ +static const SiS310_LVDSDesStruct SiS310_PanelType03_2[]= { { 0, 0}, { 0, 0}, @@ -2298,7 +2567,7 @@ { 0, 0} }; -static const SiS310_LVDSDesStruct SiS310_PanelType04_2[]= /* TW: New */ +static const SiS310_LVDSDesStruct SiS310_PanelType04_2[]= { { 0, 0}, { 0, 0}, @@ -2311,7 +2580,7 @@ { 0, 0} }; -static const SiS310_LVDSDesStruct SiS310_PanelType05_2[]= /* TW: New */ +static const SiS310_LVDSDesStruct SiS310_PanelType05_2[]= { {1152, 622}, {1152, 597}, @@ -2324,7 +2593,7 @@ { 0, 0} }; -static const SiS310_LVDSDesStruct SiS310_PanelType06_2[]= /* TW: New */ +static const SiS310_LVDSDesStruct SiS310_PanelType06_2[]= { {1152, 622}, {1152, 597}, @@ -2337,7 +2606,7 @@ { 0, 0} }; -static const SiS310_LVDSDesStruct SiS310_PanelType07_2[]= /* TW: New */ +static const SiS310_LVDSDesStruct SiS310_PanelType07_2[]= { {1152, 622}, {1152, 597}, @@ -2350,8 +2619,20 @@ { 0, 0} }; -static const SiS310_LVDSDesStruct SiS310_PanelType08_2[]= /* TW: New */ +static const SiS310_LVDSDesStruct SiS310_PanelType08_2[]= /* 1400x1050 */ { + {1308, 741}, + {1308, 716}, + {1308, 741}, + {1308, 716}, + {1308, 781}, + {1388, 841}, + {1500, 925}, + {1628,1053}, + { 0,1065}, + { 0, 0}, + { 0, 0} +#if 0 {976, 527}, {976, 502}, {976, 527}, @@ -2361,34 +2642,37 @@ { 0, 627}, { 0, 0}, { 0, 0} +#endif }; -static const SiS310_LVDSDesStruct SiS310_PanelType09_2[]= /* TW: New */ +static const SiS310_LVDSDesStruct SiS310_PanelType09_2[]= /* 1280x768 */ { - { 0, 0}, - { 0, 0}, - { 0, 0}, - { 0, 0}, - { 0, 0}, - { 0, 0}, - { 0, 0}, - { 0, 0} + {1083, 622}, + {1083, 597}, + {1083, 622}, + {1083, 597}, + {1083, 662}, + {1163, 722}, + {1286, 805}, + { 0, 794}, + { 0, 0} }; -static const SiS310_LVDSDesStruct SiS310_PanelType0a_2[]= /* TW: New */ +static const SiS310_LVDSDesStruct SiS310_PanelType0a_2[]= /* 1600x1200 */ { - {976, 527}, - {976, 502}, - {976, 527}, - {976, 502}, - {976, 567}, - { 0, 627}, - { 0, 627}, - { 0, 0}, - { 0, 0} + {1568, 850}, + {1568, 825}, + {1568, 850}, + {1568, 825}, + {1568, 890}, + {1648, 950}, + {1760,1034}, + {1888,1162}, + {1948,1175}, + { 0, 0} }; -static const SiS310_LVDSDesStruct SiS310_PanelType0b_2[]= /* TW: New */ +static const SiS310_LVDSDesStruct SiS310_PanelType0b_2[]= { {1152, 622}, {1152, 597}, @@ -2401,7 +2685,7 @@ { 0, 0} }; -static const SiS310_LVDSDesStruct SiS310_PanelType0c_2[]= /* TW: New */ +static const SiS310_LVDSDesStruct SiS310_PanelType0c_2[]= { {1152, 622}, {1152, 597}, @@ -2414,7 +2698,7 @@ { 0, 0} }; -static const SiS310_LVDSDesStruct SiS310_PanelType0d_2[]= /* TW: New */ +static const SiS310_LVDSDesStruct SiS310_PanelType0d_2[]= { {1152, 622}, {1152, 597}, @@ -2427,7 +2711,7 @@ { 0, 0} }; -static const SiS310_LVDSDesStruct SiS310_PanelType0e_2[]= /* TW: New */ +static const SiS310_LVDSDesStruct SiS310_PanelType0e_2[]= { {1152, 622}, {1152, 597}, @@ -2440,7 +2724,7 @@ { 0, 0} }; -static const SiS310_LVDSDesStruct SiS310_PanelType0f_2[] = /* TW: New */ +static const SiS310_LVDSDesStruct SiS310_PanelType0f_2[] = { {1152, 622}, {1152, 597}, @@ -2453,7 +2737,35 @@ { 0, 0} }; -static const SiS310_LVDSDesStruct SiS310_PanelType1076_1[]= /* TW: New */ +static const SiS310_LVDSDesStruct SiS310_PanelTypeNS_1[]= +{ + { 8, 0}, + { 8, 0}, + { 8, 0}, + { 8, 0}, + { 8, 0}, + { 0, 0}, + { 0, 0}, + { 0, 0}, + { 0, 806}, + { 0, 0 } +}; + +static const SiS310_LVDSDesStruct SiS310_PanelTypeNS_2[] = +{ + { 0 , 0}, + { 0 , 0}, + { 0 , 0}, + { 0 , 0}, + { 0 , 0}, + { 0 , 0}, + { 0 , 0}, + { 0 , 0}, + { 0 , 0}, + { 0 , 0} +}; + +static const SiS310_LVDSDesStruct SiS310_PanelType1076_1[]= { /* 1024x768 - Checked (1.10.6s) */ { 0 , 0}, { 0 , 0}, @@ -2466,7 +2778,7 @@ { 0 , 0} }; -static const SiS310_LVDSDesStruct SiS310_PanelType1076_2[]= /* TW: New */ +static const SiS310_LVDSDesStruct SiS310_PanelType1076_2[]= { /* 1024x768 - Checked (1.10.6s) */ { 1184, 622 }, { 1184, 597 }, @@ -2479,7 +2791,7 @@ { 0, 0 } }; -static const SiS310_LVDSDesStruct SiS310_PanelType1210_1[]= /* TW: New */ +static const SiS310_LVDSDesStruct SiS310_PanelType1210_1[]= { /* 1280x1024 - Checked (1.10.6s) */ { 0 , 0}, { 0 , 0}, @@ -2492,7 +2804,7 @@ { 0 , 0} }; -static const SiS310_LVDSDesStruct SiS310_PanelType1210_2[]= /* TW: New */ +static const SiS310_LVDSDesStruct SiS310_PanelType1210_2[]= { /* 1280x1024 - Checked (1.10.6s) */ { 0 , 0}, { 0 , 0}, @@ -2505,7 +2817,7 @@ { 0 , 0} }; -static const SiS310_LVDSDesStruct SiS310_PanelType1296_1[]= /* TW: New */ +static const SiS310_LVDSDesStruct SiS310_PanelType1296_1[]= { /* 1400x1050 - Checked (1.10.6s) */ { 0 , 0}, { 0 , 0}, @@ -2518,7 +2830,7 @@ { 0 , 0} }; -static const SiS310_LVDSDesStruct SiS310_PanelType1296_2[]= /* TW: New */ +static const SiS310_LVDSDesStruct SiS310_PanelType1296_2[]= { /* 1400x1050 - Checked (1.10.6s) - looks heavily invalid */ { 808 , 740}, { 0 , 715}, @@ -2531,7 +2843,7 @@ { 0 , 0} }; -static const SiS310_LVDSDesStruct SiS310_PanelType1600_1[]= /* TW: New */ +static const SiS310_LVDSDesStruct SiS310_PanelType1600_1[]= { /* 1600x1200 - Checked (1.10.6s) */ { 0 , 0}, { 0 , 0}, @@ -2545,8 +2857,8 @@ { 0 , 0} }; -static const SiS310_LVDSDesStruct SiS310_PanelType1600_2[]= /* TW: New */ -{ /* 1600x1200 - Checked (1.10.6s) - looks heavily invalid */ +static const SiS310_LVDSDesStruct SiS310_PanelType1600_2[]= +{ /* 1600x1200 - Checked (1.10.6s) - looks heavily invalid, not copied */ { 0 , 0}, { 0 , 0}, { 0 , 0}, @@ -2736,6 +3048,7 @@ #endif }; +/* 1 2 4 5 6 1c 1d 1f 20 21 23 25 */ static const SiS310_Part2PortTblStruct SiS310_CRT2Part2_1280x1024_3[] = { /* TW: Temporary data, invalid */ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}}, @@ -2750,7 +3063,7 @@ }; static const SiS310_Part2PortTblStruct SiS310_CRT2Part2_1400x1050_3[] = -{ /* TW: Temporary data, invalid */ +{ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}}, {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}}, {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}}, @@ -3385,7 +3698,7 @@ 0x00 }} }; -static const SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT1800x600_1[] = /* TW: New */ +static const SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT1800x600_1[] = { {{0x6b,0x4f,0x8f,0x55,0x85,0xaa,0x1f, 0x90,0x85,0x8f,0xab,0x30,0x00,0x05, @@ -3407,7 +3720,7 @@ 0x01 }} }; -static const SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11024x768_1[] = /* TW: New */ +static const SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11024x768_1[] = { {{0x73,0x4f,0x97,0x53,0x84,0xb4,0x1f, 0x92,0x89,0x8f,0xb5,0x30,0x00,0x05, @@ -3432,35 +3745,35 @@ 0x01}} }; -static const SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11280x1024_1[] = /* TW: New */ +static const SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11280x1024_1[] = { - {{0x7e,0x4f,0x82,0x56,0x04,0xb8,0x1f, + {{0x7e,0x4f,0x82,0x58,0x04,0xb8,0x1f, 0x90,0x84,0x8f,0xb9,0x30,0x00,0x06, - 0x00 }}, - {{0x7e,0x4f,0x82,0x56,0x04,0x86,0x1f, + 0x00}}, + {{0x7e,0x4f,0x82,0x58,0x04,0x86,0x1f, 0x5e,0x82,0x5d,0x87,0x10,0x00,0x06, - 0x00 }}, - {{0x7e,0x4f,0x82,0x56,0x04,0xb8,0x1f, + 0x00}}, + {{0x7e,0x4f,0x82,0x58,0x04,0xb8,0x1f, 0x90,0x84,0x8f,0xb9,0x30,0x00,0x06, - 0x00 }}, - {{0x7e,0x4f,0x82,0x56,0x04,0x86,0x1f, + 0x00}}, + {{0x7e,0x4f,0x82,0x58,0x04,0x86,0x1f, 0x5e,0x82,0x5d,0x87,0x10,0x00,0x06, - 0x00 }}, - {{0x7e,0x4f,0x82,0x56,0x04,0x08,0x3e, + 0x00}}, + {{0x7e,0x4f,0x82,0x58,0x04,0x08,0x3e, 0xe0,0x84,0xdf,0x09,0x00,0x00,0x06, - 0x00 }}, - {{0x92,0x63,0x96,0x6a,0x18,0x80,0xf0, + 0x00}}, + {{0x92,0x63,0x96,0x6c,0x18,0x80,0xf0, 0x58,0x8c,0x57,0x81,0x20,0x00,0x06, - 0x01 }}, - {{0xae,0x7f,0x92,0x86,0x94,0x28,0xf5, + 0x01}}, + {{0xae,0x7f,0x92,0x88,0x94,0x28,0xf5, 0x00,0x84,0xff,0x29,0x10,0x00,0x02, - 0x01 }}, - {{0xce,0x9f,0x92,0xa6,0x14,0x28,0x5a, + 0x01}}, + {{0xce,0x9f,0x92,0xa8,0x14,0x28,0x5a, 0x00,0x84,0xff,0x29,0x09,0x00,0x07, 0x01}} }; -static const SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT1800x600_1_H[] = /* TW: New */ +static const SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT1800x600_1_H[] = { {{0x43,0x27,0x87,0x2d,0x1d,0xaa,0x1f, 0x90,0x85,0x8f,0xab,0x30,0x00,0x05, @@ -3482,7 +3795,7 @@ 0x01 }} }; -static const SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11024x768_1_H[] = /* TW: New */ +static const SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11024x768_1_H[] = { {{0x4b,0x27,0x8f,0x2b,0x1c,0xb4,0x1f, 0x92,0x89,0x8f,0xb5,0x30,0x00,0x05, @@ -3507,32 +3820,32 @@ 0x01 }} }; -static const SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11280x1024_1_H[] = /* TW: New */ +static const SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11280x1024_1_H[] = { - {{0x56,0x27,0x9a,0x2e,0x1c,0xb8,0x1f, + {{0x56,0x27,0x9a,0x31,0x1c,0xb8,0x1f, 0x90,0x84,0x8f,0xb9,0x30,0x00,0x05, - 0x00 }}, - {{0x56,0x27,0x9a,0x2e,0x1c,0x86,0x1f, + 0x00}}, + {{0x56,0x27,0x9a,0x31,0x1c,0x86,0x1f, 0x5e,0x82,0x5d,0x87,0x10,0x00,0x05, - 0x00 }}, - {{0x56,0x27,0x9a,0x2e,0x1c,0xb8,0x1f, + 0x00}}, + {{0x56,0x27,0x9a,0x31,0x1c,0xb8,0x1f, 0x90,0x84,0x8f,0xb9,0x30,0x00,0x05, - 0x00 }}, - {{0x56,0x27,0x9a,0x2e,0x1c,0x86,0x1f, + 0x00}}, + {{0x56,0x27,0x9a,0x31,0x1c,0x86,0x1f, 0x5e,0x82,0x5d,0x87,0x10,0x00,0x05, - 0x01 }}, - {{0x56,0x27,0x9a,0x2e,0x1c,0x08,0x3e, + 0x01}}, + {{0x56,0x27,0x9a,0x31,0x1c,0x08,0x3e, 0xe0,0x84,0xdf,0x09,0x00,0x00,0x05, - 0x00 }}, - {{0x60,0x31,0x84,0x38,0x86,0x80,0xf0, + 0x00}}, + {{0x60,0x31,0x84,0x3a,0x86,0x80,0xf0, 0x58,0x8c,0x57,0x81,0x20,0x00,0x01, - 0x01 }}, - {{0x6e,0x3f,0x92,0x46,0x94,0x28,0xf5, + 0x01}}, + {{0x6e,0x3f,0x92,0x48,0x94,0x28,0xf5, 0x00,0x84,0xff,0x29,0x10,0x00,0x01, - 0x01 }} + 0x01}} }; -static const SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT1800x600_2[]= /* TW: New */ +static const SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT1800x600_2[]= { {{0x7f,0x4f,0x83,0x62,0x12,0x72,0x3e, 0xff,0x84,0x8f,0x73,0x00,0x00,0x06, @@ -3554,7 +3867,7 @@ 0x01 }} }; -static const SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11024x768_2[] = /* TW: New */ +static const SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11024x768_2[] = { {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb, 0x57,0x8e,0x8f,0x25,0x30,0x00,0x06, @@ -3579,36 +3892,36 @@ 0x01 }} }; -static const SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11280x1024_2[] = /* TW: New */ +static const SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11280x1024_2[] = { - {{0xce,0x4f,0x92,0x81,0x0f,0x28,0x9a, - 0xdb,0x8f,0x8f,0x29,0x21,0x00,0x03, - 0x00 }}, - {{0xce,0x4f,0x92,0x81,0x0f,0x28,0x9a, - 0xc2,0x86,0x5d,0x29,0x01,0x00,0x03, - 0x00 }}, - {{0xce,0x4f,0x92,0x81,0x0f,0x28,0x9a, - 0xdb,0x8f,0x8f,0x29,0x21,0x00,0x03, - 0x00 }}, - {{0xce,0x4f,0x92,0x81,0x0f,0x28,0x9a, - 0xc2,0x86,0x5d,0x29,0x01,0x00,0x03, - 0x00 }}, - {{0xce,0x4f,0x92,0x81,0x0f,0x28,0x9e, - 0x03,0x87,0xdf,0x29,0x01,0x00,0x03, - 0x00 }}, + {{0xce,0x72,0x91,0x81,0x8f,0x28,0x92, + 0xc8,0x8c,0x5d,0x5c,0x01,0x00,0x02, + 0x01}}, + {{0xce,0x72,0x91,0x81,0x8f,0x28,0x92, + 0xaf,0x83,0x44,0x43,0x21,0x00,0x02, + 0x01}}, + {{0xce,0x72,0x91,0x81,0x8f,0x28,0x92, + 0xc8,0x8c,0x5d,0x5c,0x01,0x00,0x02, + 0x01}}, + {{0xce,0x72,0x91,0x81,0x8f,0x28,0x92, + 0xaf,0x83,0x44,0x43,0x21,0x00,0x02, + 0x01}}, + {{0xce,0x72,0x91,0x81,0x8f,0x28,0x92, + 0xf0,0x84,0x85,0x84,0x11,0x00,0x02, + 0x01}}, {{0xce,0x63,0x92,0x8b,0x19,0x28,0xd4, 0x3f,0x83,0x57,0x29,0x01,0x00,0x03, - 0x01 }}, + 0x01}}, {{0xce,0x7f,0x92,0x99,0x07,0x28,0xd4, 0x93,0x87,0xff,0x29,0x21,0x00,0x07, - 0x01 }}, - {{0xce,0x9f,0x92,0xa6,0x14,0x28,0x5a, + 0x01}}, + {{0xce,0x9f,0x92,0xa8,0x14,0x28,0x5a, 0x00,0x84,0xff,0x29,0x09,0x00,0x07, 0x01}} }; -static const SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT1800x600_2_H[] = /* TW: New */ -{ +static const SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT1800x600_2_H[] = +{ {{0x57,0x27,0x9b,0x3a,0x0a,0x72,0x3e, 0xff,0x84,0x8f,0x73,0x00,0x00,0x01, 0x00 }}, @@ -3629,7 +3942,7 @@ 0x01 }} }; -static const SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11024x768_2_H[] = /* TW: New */ +static const SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11024x768_2_H[] = { {{0x7b,0x27,0x9f,0x46,0x97,0x24,0xbb, 0x57,0x8e,0x8f,0x25,0x30,0x00,0x01, @@ -3654,32 +3967,32 @@ 0x01 }} }; -static const SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11280x1024_2_H[] = /* TW: New */ +static const SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11280x1024_2_H[] = { - {{0xa6,0x27,0x8a,0x59,0x87,0x28,0x9a, - 0xdb,0x8f,0x8f,0x29,0x21,0x00,0x06, - 0x00 }}, - {{0xa6,0x27,0x8a,0x59,0x87,0x28,0x9a, - 0xc2,0x86,0x5d,0x29,0x01,0x00,0x06, - 0x00 }}, - {{0xa6,0x27,0x8a,0x59,0x87,0x28,0x9a, - 0xdb,0x8f,0x8f,0x29,0x21,0x00,0x06, - 0x00 }}, - {{0xa6,0x27,0x8a,0x59,0x87,0x28,0x9a, - 0xc2,0x86,0x5d,0x29,0x01,0x00,0x06, - 0x00 }}, - {{0xa6,0x27,0x8a,0x59,0x87,0x28,0x9e, - 0x03,0x87,0xdf,0x29,0x01,0x00,0x06, - 0x00 }}, + {{0xa6,0x4a,0x89,0x59,0x07,0x28,0x92, + 0xc8,0x8c,0x5d,0x5c,0x01,0x00,0x06, + 0x01}}, + {{0xa6,0x4a,0x89,0x59,0x07,0x28,0x92, + 0xaf,0x83,0x44,0x43,0x21,0x00,0x06, + 0x01}}, + {{0xa6,0x4a,0x89,0x59,0x07,0x28,0x92, + 0xc8,0x8c,0x5d,0x5c,0x01,0x00,0x06, + 0x01}}, + {{0xa6,0x4a,0x89,0x59,0x07,0x28,0x92, + 0xfa,0x83,0x44,0x43,0x31,0x00,0x06, + 0x01}}, + {{0xa6,0x4a,0x89,0x59,0x07,0x28,0x92, + 0xf0,0x84,0x85,0x84,0x11,0x00,0x06, + 0x01}}, {{0x9c,0x31,0x80,0x59,0x87,0x28,0xd4, 0x3f,0x83,0x57,0x29,0x01,0x00,0x06, - 0x01 }}, - {{0x8e,0x3f,0x92,0x79,0x07,0x28,0xd4, + 0x01}}, + {{0x8e,0x3f,0x92,0x59,0x07,0x28,0xd4, 0x93,0x87,0xff,0x29,0x21,0x00,0x06, 0x01}} }; -static const SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT1XXXxXXX_1[] = /* TW: New */ +static const SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT1XXXxXXX_1[] = { {{0x5f,0x4f,0x82,0x55,0x81,0xbf,0x1f, 0x9c,0x8e,0x96,0xb9,0x30,0x00,0x05, @@ -3702,12 +4015,15 @@ {{0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5, 0x02,0x88,0xff,0x25,0x10,0x00,0x02, 0x01}}, + {{0xce,0x9f,0x92,0xa8,0x14,0x28,0x5a, + 0x00,0x84,0xff,0x29,0x09,0x00,0x07, + 0x01}}, {{0xce,0x9f,0x92,0xa9,0x17,0x24,0xf5, 0x02,0x88,0xff,0x25,0x10,0x00,0x07, 0x01}} }; -static const SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT1XXXxXXX_1_H[] = /* TW: New */ +static const SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT1XXXxXXX_1_H[] = { {{0x38,0x27,0x9c,0x2c,0x80,0xbf,0x1f, 0x9c,0x8e,0x96,0xb9,0x30,0x00,0x00, @@ -3732,8 +4048,36 @@ 0x01}} }; -static const SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11400x1050_1[] = /* TW: New */ +static const SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11400x1050_1[] = { + {{0x6f,0x4f,0x93,0x54,0x82,0x9e,0x1f, + 0x8f,0x81,0x8f,0x9f,0x30,0x00,0x05, + 0x00}}, + {{0x6f,0x4f,0x93,0x54,0x82,0x6c,0x1f, + 0x5e,0x81,0x5d,0x6d,0x10,0x00,0x05, + 0x00}}, + {{0x6f,0x4f,0x93,0x54,0x82,0x9e,0x1f, + 0x90,0x83,0x8f,0x9f,0x30,0x00,0x05, + 0x00}}, + {{0x6f,0x4f,0x93,0x54,0x82,0x6c,0x1f, + 0x60,0x84,0x5d,0x6d,0x10,0x00,0x05, + 0x00}}, + {{0x6f,0x4f,0x93,0x54,0x82,0xee,0x1f, + 0xdf,0x82,0xdf,0xef,0x10,0x00,0x05, + 0x00}}, + {{0x83,0x63,0x87,0x68,0x16,0x66,0xf0, + 0x57,0x8e,0x57,0x67,0x20,0x00,0x06, + 0x01}}, + {{0x9f,0x7f,0x83,0x84,0x92,0x0e,0xf1, + 0xff,0x86,0xff,0x0f,0x10,0x00,0x02, + 0x01,}}, + {{0xbf,0x9f,0x83,0xa4,0x12,0x0e,0xde, + 0xff,0x86,0xff,0x0f,0x01,0x00,0x07, + 0x01}}, + {{0xce,0xae,0x92,0xb3,0x01,0x28,0x10, + 0x19,0x80,0x19,0x29,0x0f,0x00,0x03, + 0x00}} +#if 0 {{0x6f,0x4f,0x93,0x54,0x82,0x9e,0x1f, 0x93,0x86,0x8f,0x9f,0x30,0x00,0x05, 0x00}}, @@ -3761,11 +4105,40 @@ {{0xce,0xae,0x92,0xb3,0x01,0x28,0x10, 0x1a,0x80,0x19,0x29,0x0f,0x00,0x03, 0x00}} +#endif }; -static const SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11400x1050_1_H[] = /* TW: New */ +static const SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11400x1050_1_H[] = { {{0x47,0x27,0x8b,0x2c,0x1a,0x9e,0x1f, + 0x8f,0x81,0x8f,0x9f,0x30,0x00,0x05, + 0x00}}, + {{0x47,0x27,0x8b,0x2c,0x1a,0x6c,0x1f, + 0x60,0x84,0x5d,0x6d,0x10,0x00,0x05, + 0x00}}, + {{0x47,0x27,0x8b,0x30,0x1e,0x9e,0x1f, + 0x90,0x83,0x8f,0x9f,0x30,0x00,0x05, + 0x00}}, + {{0x47,0x27,0x8b,0x2c,0x1a,0x6c,0x1f, + 0x60,0x84,0x5d,0x6d,0x10,0x00,0x05, + 0x00}}, + {{0x47,0x27,0x8b,0x2c,0x1a,0xee,0x1f, + 0xdf,0x86,0xdf,0xef,0x10,0x00,0x05, + 0x00}}, + {{0x51,0x31,0x95,0x36,0x04,0x66,0xf0, + 0x57,0x8e,0x57,0x67,0x20,0x00,0x01, + 0x01}}, + {{0x5f,0x3f,0x83,0x44,0x92,0x0e,0xf1, + 0xff,0x86,0xff,0x0f,0x10,0x00,0x01, + 0x01}}, + {{0x6f,0x4f,0x93,0x54,0x82,0x0e,0x5a, + 0x02,0x86,0xff,0x0f,0x09,0x00,0x05, + 0x01}}, + {{0x76,0x56,0x9a,0x5b,0x89,0x28,0x10, + 0x1c,0x80,0x19,0x29,0x0b,0x00,0x05, + 0x00}} +#if 0 + {{0x47,0x27,0x8b,0x2c,0x1a,0x9e,0x1f, 0x93,0x86,0x8f,0x9f,0x30,0x00,0x05, 0x00}}, {{0x47,0x27,0x8b,0x2c,0x1a,0x6c,0x1f, @@ -3792,10 +4165,39 @@ {{0x76,0x56,0x9a,0x5b,0x89,0x28,0x10, 0x1c,0x80,0x19,0x29,0x0b,0x00,0x05, 0x00}} +#endif }; -static const SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11400x1050_2[] = /* TW: New */ +static const SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11400x1050_2[] = { + {{0xce,0x72,0x91,0x84,0x92,0x28,0x92, + 0xd7,0x8b,0x5d,0x5c,0x21,0x00,0x02, + 0x01}}, + {{0xce,0x72,0x91,0x84,0x92,0x28,0x92, + 0xbe,0x82,0x44,0x43,0x01,0x00,0x02, + 0x01}}, + {{0xce,0x72,0x91,0x84,0x92,0x28,0x92, + 0xd7,0x8b,0x5d,0x5c,0x21,0x00,0x02, + 0x01}}, + {{0xce,0x72,0x91,0x84,0x92,0x28,0x92, + 0xbe,0x82,0x44,0x43,0x01,0x00,0x02, + 0x01}}, + {{0xce,0x72,0x91,0x84,0x92,0x28,0x92, + 0xff,0x83,0x85,0x84,0x11,0x00,0x02, + 0x01}}, + {{0xce,0x63,0x92,0x8e,0x1c,0x28,0xd4, + 0x3f,0x83,0x57,0x29,0x01,0x00,0x03, + 0x01}}, + {{0xce,0x7f,0x92,0x9c,0x0a,0x28,0xd4, + 0x93,0x87,0xff,0x29,0x21,0x00,0x07, + 0x01}}, + {{0xce,0x9f,0x92,0xac,0x1a,0x28,0x5a, + 0x13,0x87,0xff,0x29,0x29,0x00,0x07, + 0x01}}, + {{0xce,0xae,0x92,0xbc,0x0a,0x28,0x10, + 0x20,0x84,0x19,0x29,0x0f,0x00,0x03, + 0x00}} +#if 0 {{0xce,0x4f,0x92,0x8c,0x1a,0x28,0x9a, 0xdb,0x8f,0x8f,0x29,0x21,0x00,0x03, 0x00}}, @@ -3823,10 +4225,39 @@ {{0xce,0xae,0x92,0xbc,0x0a,0x28,0x10, 0x20,0x84,0x19,0x29,0x0f,0x00,0x03, 0x00}} +#endif }; -static const SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11400x1050_2_H[] = /* TW: New */ +static const SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11400x1050_2_H[] = { + {{0xa6,0x4a,0x89,0x5c,0x0a,0x28,0x92, + 0xd7,0x8b,0x5d,0x5c,0x21,0x00,0x06, + 0x01}}, + {{0xa6,0x4a,0x89,0x5c,0x0a,0x28,0x92, + 0xbe,0x82,0x44,0x43,0x01,0x00,0x06, + 0x01}}, + {{0xa6,0x4a,0x89,0x5c,0x0a,0x28,0x92, + 0xd7,0x8b,0x5d,0x5c,0x21,0x00,0x06, + 0x01}}, + {{0xa6,0x4a,0x89,0x5c,0x0a,0x28,0x92, + 0xbe,0x82,0x44,0x43,0x01,0x00,0x06, + 0x01}}, + {{0xa6,0x4a,0x89,0x5c,0x0a,0x28,0x92, + 0xff,0x83,0x85,0x84,0x11,0x00,0x06, + 0x01}}, + {{0x9c,0x31,0x80,0x5c,0x8a,0x28,0xd4, + 0x3f,0x83,0x57,0x29,0x01,0x00,0x06, + 0x01}}, + {{0x8e,0x3f,0x92,0x5c,0x0a,0x28,0xd4, + 0x93,0x87,0xff,0x29,0x21,0x00,0x06, + 0x01}}, + {{0x7e,0x4f,0x82,0x5c,0x0a,0x28,0x5a, + 0x13,0x87,0xff,0x29,0x29,0x00,0x06, + 0x01}}, + {{0x76,0x56,0x9a,0x64,0x92,0x28,0x10, + 0x20,0x84,0x19,0x29,0x0f,0x00,0x05, + 0x00}} +#if 0 {{0xa6,0x27,0x8a,0x64,0x92,0x28,0x9a, 0xdb,0x8f,0x8f,0x29,0x21,0x00,0x06, 0x00}}, @@ -3854,6 +4285,131 @@ {{0x76,0x56,0x9a,0x64,0x92,0x28,0x10, 0x20,0x84,0x19,0x29,0x0f,0x00,0x05, 0x00}} +#endif +}; + +static const SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11280x768_1[] = +{ + {{0x5b,0x4f,0x9f,0x55,0x19,0xb4,0x1f, + 0x9c,0x8e,0x8f,0xb5,0x10,0x00,0x01, + 0x00}}, + {{0x5b,0x4f,0x9f,0x55,0x19,0x82,0x1f, + 0x6a,0x8c,0x5d,0x83,0x30,0x00,0x01, + 0x00}}, + {{0x5b,0x4f,0x9f,0x55,0x19,0xb4,0x1f, + 0x9c,0x8e,0x8f,0xb5,0x10,0x00,0x01, + 0x00}}, + {{0x5b,0x4f,0x9f,0x55,0x19,0x82,0x1f, + 0x6a,0x8c,0x5d,0x83,0x30,0x00,0x01, + 0x00}}, + {{0x5b,0x4f,0x9f,0x55,0x19,0x04,0x3e, + 0xec,0x8e,0xdf,0x05,0x20,0x00,0x01, + 0x00}}, + {{0x6f,0x63,0x93,0x69,0x8d,0x7c,0xf0, + 0x64,0x86,0x57,0x7d,0x20,0x00,0x05, + 0x01}}, + {{0x8b,0x7f,0x8f,0x85,0x09,0x24,0xf5, + 0x0c,0x8e,0xff,0x25,0x30,0x00,0x02, + 0x01}}, + {{0xab,0x9f,0x8f,0xa5,0x89,0x24,0xf5, + 0x0c,0x8e,0xff,0x25,0x30,0x00,0x06, + 0x01}}, + {{0xab,0x9f,0x8f,0xa5,0x89,0x24,0xf5, + 0x0c,0x8e,0xff,0x25,0x30,0x00,0x06, + 0x01}} +}; + +static const SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11280x768_1_H[] = +{ + {{0x47,0x27,0x8b,0x2c,0x1a,0x9e,0x1f, + 0x93,0x86,0x8f,0x9f,0x30,0x00,0x05, + 0x00}}, + {{0x47,0x27,0x8b,0x2c,0x1a,0x6c,0x1f, + 0x60,0x84,0x5d,0x6d,0x10,0x00,0x05, + 0x00}}, + {{0x47,0x27,0x8b,0x30,0x1e,0x9e,0x1f, + 0x92,0x86,0x8f,0x9f,0x30,0x00,0x05, + 0x00}}, + {{0x47,0x27,0x8b,0x2c,0x1a,0x6c,0x1f, + 0x60,0x84,0x5d,0x6d,0x10,0x00,0x05, + 0x00}}, + {{0x47,0x27,0x8b,0x2c,0x1a,0xee,0x1f, + 0xe2,0x86,0xdf,0xef,0x10,0x00,0x05, + 0x00}}, + {{0x51,0x31,0x95,0x36,0x04,0x66,0xf0, + 0x5a,0x8e,0x57,0x67,0x20,0x00,0x01, + 0x01}}, + {{0x5f,0x3f,0x83,0x44,0x92,0x0e,0xf5, + 0x02,0x86,0xff,0x0f,0x10,0x00,0x01, + 0x01}}, + {{0x6f,0x4f,0x93,0x54,0x82,0x0e,0x5a, + 0x02,0x86,0xff,0x0f,0x09,0x00,0x05, + 0x01}}, + {{0x6f,0x4f,0x93,0x54,0x82,0x0e,0x5a, + 0x02,0x86,0xff,0x0f,0x09,0x00,0x05, + 0x01}} +}; + +static const SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11280x768_2[] = +{ + {{0xab,0x60,0x9f,0x80,0x04,0x24,0xbb, + 0x54,0x86,0xdb,0xda,0x00,0x00,0x02, + 0x00}}, + {{0xab,0x60,0x9f,0x80,0x04,0x24,0xbb, + 0x3b,0x8d,0xc2,0xc1,0x00,0x00,0x02, + 0x00}}, + {{0xab,0x60,0x9f,0x80,0x04,0x24,0xbb, + 0x54,0x86,0xdb,0xda,0x00,0x00,0x02, + 0x00}}, + {{0xab,0x60,0x9f,0x80,0x04,0x24,0xbb, + 0x3b,0x8d,0xc2,0xc1,0x00,0x00,0x02, + 0x00}}, + {{0xab,0x60,0x9f,0x80,0x04,0x24,0xb3, + 0x7c,0x8e,0x03,0x02,0x10,0x00,0x02, + 0x01}}, + {{0xab,0x63,0x8f,0x8a,0x8e,0x24,0xf1, + 0xb6,0x88,0x57,0x25,0x10,0x00,0x02, + 0x01}}, + {{0xab,0x7f,0x8f,0x98,0x9c,0x24,0xf5, + 0x0a,0x8c,0xff,0x25,0x30,0x00,0x02, + 0x01}}, + {{0xab,0x9f,0x8f,0xa8,0x8c,0x24,0xf5, + 0x0a,0x8c,0xff,0x25,0x30,0x00,0x06, + 0x01}}, + {{0xab,0x9f,0x8f,0xa8,0x8c,0x24,0xf5, + 0x0a,0x8c,0xff,0x25,0x30,0x00,0x06, + 0x01}} +}; + +static const SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11280x768_2_H[] = +{ + {{0x83,0x38,0x97,0x58,0x9c,0x24,0xbb, + 0x54,0x86,0xdb,0xda,0x00,0x00,0x01, + 0x00}}, + {{0x83,0x38,0x97,0x58,0x9c,0x24,0xbb, + 0x3b,0x8d,0xc2,0xc1,0x00,0x00,0x01, + 0x00}}, + {{0x83,0x38,0x97,0x58,0x9c,0x24,0xbb, + 0x54,0x86,0xdb,0xda,0x00,0x00,0x01, + 0x00}}, + {{0x83,0x38,0x97,0x58,0x9c,0x24,0xbb, + 0x3b,0x8d,0xc2,0xc1,0x00,0x00,0x01, + 0x00}}, + {{0x83,0x38,0x97,0x58,0x9c,0x24,0xb3, + 0x7c,0x8e,0x03,0x02,0x10,0x00,0x01, + 0x01}}, + {{0x79,0x31,0x9d,0x58,0x9c,0x24,0xf1, + 0xb6,0x88,0x57,0x25,0x10,0x00,0x01, + 0x01}}, + {{0x6b,0x3f,0x8f,0x58,0x9c,0x24,0xf5, + 0x0a,0x8c,0xff,0x25,0x30,0x00,0x01, + 0x01}}, + {{0xab,0x9f,0x8f,0xa8,0x8c,0x24,0xf5, + 0x0a,0x8c,0xff,0x25,0x30,0x00,0x06, + 0x01}}, + {{0xab,0x9f,0x8f,0xa8,0x8c,0x24,0xf5, + 0x0a,0x8c,0xff,0x25,0x30,0x00,0x06, + 0x01}} }; static const SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11024x600_1[] = @@ -4057,131 +4613,143 @@ }; static const SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11600x1200_1[] = -{ /* TW: Temporary data - invalid */ - {{0x6f,0x4f,0x93,0x54,0x82,0x9e,0x1f, - 0x93,0x86,0x8f,0x9f,0x30,0x00,0x05, +{ + {{0x83,0x4f,0x87,0x51,0x09,0xc0,0x1f, + 0x90,0x84,0x8f,0xc1,0x30,0x00,0x06, 0x00}}, - {{0x6f,0x4f,0x93,0x54,0x82,0x6c,0x1f, - 0x60,0x84,0x5d,0x6d,0x10,0x00,0x05, + {{0x83,0x4f,0x87,0x51,0x09,0x8e,0x1f, + 0x5e,0x82,0x5d,0x8f,0x10,0x00,0x06, 0x00}}, - {{0x6f,0x4f,0x93,0x54,0x82,0x9e,0x1f, - 0x93,0x86,0x8f,0x9f,0x30,0x00,0x05, + {{0x83,0x4f,0x87,0x51,0x09,0xc0,0x1f, + 0x90,0x84,0x8f,0xc1,0x30,0x00,0x06, 0x00}}, - {{0x6f,0x4f,0x93,0x54,0x82,0x6c,0x1f, - 0x60,0x84,0x5d,0x6d,0x10,0x00,0x05, + {{0x83,0x4f,0x87,0x51,0x09,0x8e,0x1f, + 0x5e,0x82,0x5d,0x8f,0x10,0x00,0x06, 0x00}}, - {{0x6f,0x4f,0x93,0x54,0x82,0xee,0x1f, - 0xe2,0x86,0xdf,0xef,0x10,0x00,0x05, + {{0x83,0x4f,0x87,0x51,0x09,0x10,0x3e, + 0xe0,0x84,0xdf,0x11,0x00,0x00,0x06, 0x00}}, - {{0x83,0x63,0x87,0x68,0x16,0x66,0xf0, - 0x5a,0x8e,0x57,0x67,0x20,0x00,0x06, + {{0x97,0x63,0x9b,0x65,0x1d,0x88,0xf0, + 0x58,0x8c,0x57,0x89,0x20,0x00,0x06, 0x01}}, - {{0x9f,0x7f,0x83,0x84,0x92,0x0e,0xf5, - 0x02,0x86,0xff,0x0f,0x10,0x00,0x02, + {{0xb3,0x7f,0x97,0x81,0x99,0x30,0xf5, + 0x00,0x84,0xff,0x31,0x10,0x00,0x02, 0x01}}, - {{0xbf,0x9f,0x83,0xa4,0x12,0x0e,0x5a, - 0x02,0x86,0xff,0x0f,0x09,0x00,0x07, + {{0xd3,0x9f,0x97,0xa1,0x19,0x30,0x5a, + 0x00,0x84,0xff,0x31,0x09,0x00,0x07, 0x01}}, - {{0xce,0xae,0x92,0xb3,0x01,0x28,0x10, - 0x1a,0x80,0x19,0x29,0x0f,0x00,0x03, + {{0xe2,0xae,0x86,0xb0,0x88,0x4a,0x10, + 0x1a,0x8e,0x19,0x4b,0x2f,0x00,0x03, + 0x00}}, + {{0xfb,0xc7,0x9f,0xc9,0x81,0xe0,0x10, + 0xb0,0x84,0xaf,0xe1,0x2f,0x00,0x07, 0x00}} }; static const SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11600x1200_1_H[] = -{ /* TW: Temporary data - invalid */ - {{0x47,0x27,0x8b,0x2c,0x1a,0x9e,0x1f, - 0x93,0x86,0x8f,0x9f,0x30,0x00,0x05, +{ + {{0x5b,0x27,0x9f,0x29,0x01,0xc0,0x1f, + 0x90,0x84,0x8f,0xc1,0x30,0x00,0x01, 0x00}}, - {{0x47,0x27,0x8b,0x2c,0x1a,0x6c,0x1f, - 0x60,0x84,0x5d,0x6d,0x10,0x00,0x05, + {{0x5b,0x27,0x9f,0x29,0x01,0x8e,0x1f, + 0x5e,0x82,0x5d,0x8f,0x10,0x00,0x01, 0x00}}, - {{0x47,0x27,0x8b,0x30,0x1e,0x9e,0x1f, - 0x92,0x86,0x8f,0x9f,0x30,0x00,0x05, + {{0x5b,0x27,0x9f,0x29,0x01,0xc0,0x1f, + 0x90,0x84,0x8f,0xc1,0x30,0x00,0x01, 0x00}}, - {{0x47,0x27,0x8b,0x2c,0x1a,0x6c,0x1f, - 0x60,0x84,0x5d,0x6d,0x10,0x00,0x05, + {{0x5b,0x27,0x9f,0x29,0x01,0x8e,0x1f, + 0x5e,0x82,0x5d,0x8f,0x10,0x00,0x01, 0x00}}, - {{0x47,0x27,0x8b,0x2c,0x1a,0xee,0x1f, - 0xe2,0x86,0xdf,0xef,0x10,0x00,0x05, + {{0x5b,0x27,0x9f,0x29,0x01,0x10,0x3e, + 0xe0,0x84,0xdf,0x11,0x00,0x00,0x01, 0x00}}, - {{0x51,0x31,0x95,0x36,0x04,0x66,0xf0, - 0x5a,0x8e,0x57,0x67,0x20,0x00,0x01, + {{0x65,0x31,0x89,0x33,0x8b,0x88,0xf0, + 0x58,0x8c,0x57,0x89,0x20,0x00,0x01, 0x01}}, - {{0x5f,0x3f,0x83,0x44,0x92,0x0e,0xf5, - 0x02,0x86,0xff,0x0f,0x10,0x00,0x01, + {{0x73,0x3f,0x97,0x41,0x99,0x30,0xf5, + 0x00,0x84,0xff,0x31,0x10,0x00,0x01, 0x01}}, - {{0x6f,0x4f,0x93,0x54,0x82,0x0e,0x5a, - 0x02,0x86,0xff,0x0f,0x09,0x00,0x05, + {{0x83,0x4f,0x87,0x51,0x09,0x30,0x5a, + 0x00,0x84,0xff,0x31,0x09,0x00,0x06, 0x01}}, - {{0x76,0x56,0x9a,0x5b,0x89,0x28,0x10, - 0x1c,0x80,0x19,0x29,0x0b,0x00,0x05, + {{0x8a,0x56,0x8e,0x58,0x10,0x4a,0x10, + 0x1a,0x8e,0x19,0x4b,0x2f,0x00,0x06, + 0x00}}, + {{0x97,0x63,0x9b,0x65,0x1d,0xe0,0x10, + 0xb0,0x84,0xaf,0xe1,0x2f,0x00,0x06, 0x00}} }; static const SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11600x1200_2[] = -{ /* TW: Temporary data - invalid */ - {{0xce,0x4f,0x92,0x8c,0x1a,0x28,0x9a, - 0xdb,0x8f,0x8f,0x29,0x21,0x00,0x03, - 0x00}}, - {{0xce,0x4f,0x92,0x8c,0x1a,0x28,0x9a, - 0xc2,0x86,0x5d,0x29,0x01,0x00,0x03, +{ + {{0xfb,0x88,0x87,0x90,0x08,0xe0,0x96, + 0x20,0x84,0xb9,0xb8,0x01,0x00,0x07, 0x01}}, - {{0xce,0x4f,0x92,0x8c,0x1a,0x28,0x9a, - 0xdb,0x8f,0x8f,0x29,0x21,0x00,0x03, - 0x00}}, - {{0xce,0x4f,0x92,0x8c,0x1a,0x28,0x9a, - 0xc2,0x86,0x5d,0x29,0x01,0x00,0x03, - 0x00}}, - {{0xce,0x4f,0x92,0x8c,0x1a,0x28,0x9e, - 0x03,0x87,0xdf,0x29,0x01,0x00,0x03, - 0x00}}, - {{0xce,0x63,0x92,0x96,0x04,0x28,0xd4, - 0x3f,0x83,0x57,0x29,0x01,0x00,0x07, + {{0xfb,0x88,0x87,0x90,0x08,0xe0,0x96, + 0x07,0x8b,0xa0,0x9f,0x01,0x00,0x07, 0x01}}, - {{0xce,0x7f,0x92,0xa4,0x12,0x28,0xd4, - 0x93,0x87,0xff,0x29,0x21,0x00,0x07, + {{0xfb,0x88,0x87,0x90,0x08,0xe0,0x96, + 0x20,0x84,0xb9,0xb8,0x01,0x00,0x07, 0x01}}, - {{0xce,0x9f,0x92,0xb4,0x02,0x28,0x5a, - 0x13,0x87,0xff,0x29,0x29,0x00,0x03, + {{0xfb,0x88,0x87,0x90,0x08,0xe0,0x96, + 0x07,0x8b,0xa0,0x9f,0x01,0x00,0x07, 0x01}}, - {{0xce,0xae,0x92,0xbc,0x0a,0x28,0x10, - 0x20,0x84,0x19,0x29,0x0f,0x00,0x03, + {{0xfb,0x88,0x87,0x90,0x08,0xe0,0x96, + 0x48,0x8c,0xe1,0xe0,0x11,0x00,0x07, + 0x01}}, + {{0xfb,0x63,0x9f,0x9a,0x92,0xe0,0xd4, + 0x9b,0x8f,0x9d,0x9c,0x21,0x00,0x07, + 0x01}}, + {{0xfb,0x7f,0x9f,0xa8,0x80,0xe0,0xd4, + 0xef,0x83,0xff,0xe1,0x21,0x00,0x03, + 0x01}}, + {{0xfb,0x9f,0x9f,0xb8,0x90,0xe0,0x5a, + 0x6f,0x83,0xff,0xe1,0x29,0x00,0x03, + 0x01}}, + {{0xfb,0xae,0x9f,0xbf,0x97,0xe0,0x10, + 0x7c,0x80,0x19,0xe1,0x0f,0x00,0x03, + 0x00}}, + {{0xfb,0xc7,0x9f,0xc9,0x84,0xe0,0x10, + 0xc7,0x8b,0xaf,0xe1,0x0f,0x00,0x07, 0x00}} }; -static const SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11600x1200_2_H[] = /* TW: New */ -{ /* TW: Temporary data - invalid */ - {{0xa6,0x27,0x8a,0x64,0x92,0x28,0x9a, - 0xdb,0x8f,0x8f,0x29,0x21,0x00,0x06, - 0x00}}, - {{0xa6,0x27,0x8a,0x64,0x92,0x28,0x9a, - 0xc2,0x86,0x5d,0x29,0x01,0x00,0x06, - 0x00}}, - {{0xa6,0x27,0x8a,0x64,0x92,0x28,0x9a, - 0xdb,0x8f,0x8f,0x29,0x21,0x00,0x06, - 0x00}}, - {{0xa6,0x27,0x8a,0x64,0x92,0x28,0x9a, - 0xc2,0x86,0x5d,0x29,0x01,0x00,0x06, - 0x00}}, - {{0xa6,0x27,0x8a,0x64,0x92,0x28,0x9e, - 0x03,0x87,0xdf,0x29,0x01,0x00,0x06, - 0x00}}, - {{0x9c,0x31,0x80,0x64,0x92,0x28,0xd4, - 0x3f,0x83,0x57,0x29,0x01,0x00,0x06, +static const SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11600x1200_2_H[] = +{ + {{0xd3,0x60,0x9f,0x68,0x00,0xe0,0x96, + 0x20,0x84,0xb9,0xb8,0x01,0x00,0x02, 0x01}}, - {{0x8e,0x3f,0x92,0x64,0x12,0x28,0xd4, - 0x93,0x87,0xff,0x29,0x21,0x00,0x06, + {{0xd3,0x60,0x9f,0x68,0x00,0xe0,0x96, + 0x07,0x8b,0xa0,0x9f,0x01,0x00,0x02, 0x01}}, - {{0x7e,0x4f,0x82,0x64,0x12,0x28,0x5a, - 0x13,0x87,0xff,0x29,0x29,0x00,0x06, + {{0xd3,0x60,0x9f,0x68,0x00,0xe0,0x96, + 0x20,0x84,0xb9,0xb8,0x01,0x00,0x02, 0x01}}, - {{0x76,0x56,0x9a,0x64,0x92,0x28,0x10, - 0x20,0x84,0x19,0x29,0x0f,0x00,0x05, + {{0xd3,0x60,0x9f,0x68,0x00,0xe0,0x96, + 0x07,0x8b,0xa0,0x9f,0x01,0x00,0x02, + 0x01}}, + {{0xd3,0x60,0x9f,0x68,0x00,0xe0,0x96, + 0x48,0x8c,0xe1,0xe0,0x11,0x00,0x02, + 0x01}}, + {{0xc9,0x31,0x8d,0x68,0x00,0xe0,0xd4, + 0x9b,0x8f,0x9d,0x9c,0x21,0x00,0x03, + 0x01}}, + {{0xbb,0x3f,0x9f,0x68,0x80,0xe0,0xd4, + 0xef,0x83,0xff,0xe1,0x21,0x00,0x02, + 0x01}}, + {{0xab,0x4f,0x8f,0x68,0x80,0xe0,0x5a, + 0x6f,0x83,0xff,0xe1,0x29,0x00,0x02, + 0x01}}, + {{0xa3,0x56,0x87,0x67,0x9f,0xe0,0x10, + 0x7c,0x80,0x19,0xe1,0x0f,0x00,0x06, + 0x00}}, + {{0x97,0x63,0x9b,0x68,0x00,0xe0,0x10, + 0xc7,0x8b,0xaf,0xe1,0x0f,0x00,0x02, 0x00}} }; -static const SiS310_LVDSCRT1DataStruct SiS310_CHTVCRT1UNTSC[] = /* TW: New */ +static const SiS310_LVDSCRT1DataStruct SiS310_CHTVCRT1UNTSC[] = { {{0x64,0x4f,0x88,0x56,0x9f,0x56,0x3e, 0xe8,0x84,0x8f,0x57,0x20,0x00,0x01, @@ -4206,7 +4774,7 @@ 0x01}} }; -static const SiS310_LVDSCRT1DataStruct SiS310_CHTVCRT1ONTSC[] = /* TW: New */ +static const SiS310_LVDSCRT1DataStruct SiS310_CHTVCRT1ONTSC[] = { {{0x63,0x4f,0x87,0x5a,0x9f,0x0b,0x3e, 0xc0,0x84,0x8f,0x0c,0x20,0x00,0x01, @@ -4231,7 +4799,7 @@ 0x01 }} }; -static const SiS310_LVDSCRT1DataStruct SiS310_CHTVCRT1UPAL[] = /* TW: New */ +static const SiS310_LVDSCRT1DataStruct SiS310_CHTVCRT1UPAL[] = { {{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e, 0xf8,0x83,0x8f,0x70,0x20,0x00,0x05, @@ -4256,8 +4824,8 @@ 0x01}} }; -static const SiS310_LVDSCRT1DataStruct SiS310_CHTVCRT1OPAL[] = /* TW: New */ -{ +static const SiS310_LVDSCRT1DataStruct SiS310_CHTVCRT1OPAL[] = +{ {{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e, 0xf0,0x83,0x8f,0x70,0x20,0x00,0x05, 0x00 }}, @@ -4281,13 +4849,39 @@ 0x01 }} }; -/* TW: New data for Chrontel 7019 (From 650/LVDS BIOS 1.10.0) */ +static const SiS310_LVDSCRT1DataStruct SiS310_CHTVCRT1SOPAL[] = +{ + {{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e, + 0xf0,0x83,0x8f,0x70,0x20,0x00,0x05, + 0x00 }}, + {{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e, + 0xde,0x81,0x5d,0x70,0x00,0x00,0x05, + 0x00 }}, + {{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e, + 0xf0,0x83,0x8f,0x70,0x20,0x00,0x05, + 0x00 }}, + {{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e, + 0xde,0x81,0x5d,0x70,0x00,0x00,0x05, + 0x00 }}, + {{0x64,0x4f,0x88,0x58,0x9d,0x6f,0xba, + 0x15,0x83,0xdf,0x70,0x00,0x00,0x01, + 0x00 }}, + {{0x71,0x63,0x95,0x69,0x8c,0x6f,0xf0, + 0x5a,0x8b,0x57,0x70,0x20,0x00,0x05, + 0x01 }}, + {{0xaa,0x7f,0x8e,0x8f,0x96,0x69,0xf5, /* TW: 1024x768 */ + 0x28,0x88,0xff,0x6a,0x10,0x00,0x02, + 0x01 }} +}; + +/* TW: Data for Chrontel 7019 */ typedef struct _SiS310_CHTVRegDataStruct { UCHAR Reg[16]; } SiS310_CHTVRegDataStruct; -static const SiS310_CHTVRegDataStruct SiS310_CHTVReg_UNTSC[] = { +static const SiS310_CHTVRegDataStruct SiS310_CHTVReg_UNTSC[] = +{ {{0x4a,0x77,0xbb,0x94,0x84,0x48,0xfe,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}}, {{0x4a,0x77,0xbb,0x94,0x84,0x48,0xfe,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}}, {{0x4a,0x77,0xbb,0x94,0x84,0x48,0xfe,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}}, @@ -4297,7 +4891,8 @@ {{0xee,0x77,0xbb,0x66,0x87,0x32,0x01,0x5a,0x04,0x00,0x80,0x1b,0xd3,0xf2,0x36,0x00}} }; -static const SiS310_CHTVRegDataStruct SiS310_CHTVReg_ONTSC[] = { +static const SiS310_CHTVRegDataStruct SiS310_CHTVReg_ONTSC[] = +{ {{0x49,0x77,0xbb,0x7b,0x84,0x34,0x00,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}}, {{0x49,0x77,0xbb,0x7b,0x84,0x34,0x00,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}}, {{0x49,0x77,0xbb,0x7b,0x84,0x34,0x00,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}}, @@ -4307,7 +4902,8 @@ {{0xed,0x77,0xbb,0x66,0x8c,0x21,0x02,0x5a,0x04,0x00,0x80,0x1f,0x9f,0xc1,0x0c,0x00}} }; -static const SiS310_CHTVRegDataStruct SiS310_CHTVReg_UPAL[] = { +static const SiS310_CHTVRegDataStruct SiS310_CHTVReg_UPAL[] = +{ {{0x41,0x7f,0xb7,0x34,0xad,0x50,0x34,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}}, {{0x41,0x7f,0xb7,0x80,0x85,0x50,0x00,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}}, {{0x41,0x7f,0xb7,0x34,0xad,0x50,0x34,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}}, @@ -4317,7 +4913,8 @@ {{0xe5,0x7f,0xb7,0x1d,0xa7,0x3e,0x04,0x5a,0x05,0x00,0x80,0x20,0x3e,0xe4,0x22,0x00}} }; -static const SiS310_CHTVRegDataStruct SiS310_CHTVReg_OPAL[] = { +static const SiS310_CHTVRegDataStruct SiS310_CHTVReg_OPAL[] = +{ {{0x41,0x7f,0xb7,0x36,0xad,0x50,0x34,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}}, {{0x41,0x7f,0xb7,0x86,0x85,0x50,0x00,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}}, {{0x41,0x7f,0xb7,0x36,0xad,0x50,0x34,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}}, @@ -4327,6 +4924,61 @@ {{0xe4,0x7f,0xb7,0x1e,0xaf,0x29,0x37,0x5a,0x05,0x00,0x80,0x25,0x8c,0xb2,0x2a,0x00}} }; +static const SiS310_CHTVRegDataStruct SiS310_CHTVReg_SOPAL[] = +{ + {{0x41,0x7f,0xb7,0x36,0xad,0x50,0x34,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}}, + {{0x41,0x7f,0xb7,0x86,0x85,0x50,0x00,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}}, + {{0x41,0x7f,0xb7,0x36,0xad,0x50,0x34,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}}, + {{0x41,0x7f,0xb7,0x86,0x85,0x50,0x00,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}}, + {{0x61,0x7f,0xb7,0x99,0x84,0x35,0x04,0x5a,0x05,0x00,0x80,0x26,0x2a,0x55,0x5d,0x00}}, + {{0xc1,0x7f,0xb7,0x4d,0x8c,0x1e,0x31,0x5a,0x05,0x00,0x80,0x26,0x78,0x19,0x34,0x00}}, + {{0xe4,0x7f,0xb7,0x1e,0xaf,0x29,0x37,0x5a,0x05,0x00,0x80,0x25,0x8c,0xb2,0x2a,0x00}} +}; + +static const SiS310_CHTVRegDataStruct SiS310_CHTVReg_UPALM[] = +{ + {{0x52,0x77,0xbb,0x94,0x84,0x48,0xfe,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}}, + {{0x52,0x77,0xbb,0x94,0x84,0x48,0xfe,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}}, + {{0x52,0x77,0xbb,0x94,0x84,0x48,0xfe,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}}, + {{0x52,0x77,0xbb,0x94,0x84,0x48,0xfe,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}}, + {{0x72,0x77,0xbb,0x6e,0x84,0x2e,0x02,0x5a,0x04,0x00,0x80,0x20,0x76,0xdb,0x6e,0x00}}, + {{0xd7,0x77,0xb7,0xc8,0x84,0x3b,0x02,0x5a,0x04,0x00,0x80,0x19,0x84,0x0a,0xc7,0x00}}, + {{0xf6,0x77,0xbb,0x66,0x87,0x32,0x01,0x5a,0x04,0x00,0x80,0x1b,0xdc,0xb0,0x8d,0x00}} +}; + +static const SiS310_CHTVRegDataStruct SiS310_CHTVReg_OPALM[] = +{ + {{0x51,0x77,0xbb,0x7b,0x84,0x34,0x00,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}}, + {{0x51,0x77,0xbb,0x7b,0x84,0x34,0x00,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}}, + {{0x51,0x77,0xbb,0x7b,0x84,0x34,0x00,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}}, + {{0x51,0x77,0xbb,0x7b,0x84,0x34,0x00,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}}, + {{0x71,0x77,0xbb,0x6e,0x84,0x1e,0x00,0x5a,0x04,0x00,0x80,0x25,0x1a,0x1f,0x59,0x00}}, + {{0xd6,0x77,0xb7,0xb6,0x83,0x2c,0x02,0x5a,0x04,0x00,0x80,0x1b,0xf8,0x1f,0x82,0x00}}, + {{0xf5,0x77,0xbb,0x66,0x8c,0x21,0x02,0x5a,0x04,0x00,0x80,0x1f,0x58,0x46,0x9f,0x00}} +}; + +static const SiS310_CHTVRegDataStruct SiS310_CHTVReg_UPALN[] = +{ + {{0x41,0x7f,0xb7,0x34,0xad,0x50,0x34,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}}, + {{0x41,0x7f,0xb7,0x80,0x85,0x50,0x00,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}}, + {{0x41,0x7f,0xb7,0x34,0xad,0x50,0x34,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}}, + {{0x41,0x7f,0xb7,0x12,0x85,0x50,0x00,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}}, + {{0x61,0x7f,0xb7,0x99,0x84,0x35,0x04,0x5a,0x05,0x00,0x80,0x1f,0x0d,0x54,0x5e,0x00}}, + {{0xc3,0x7f,0xb7,0x7a,0x84,0x40,0x02,0x5a,0x05,0x00,0x80,0x19,0x78,0xef,0x35,0x00}}, + {{0xe5,0x7f,0xb7,0x1d,0xa7,0x3e,0x04,0x5a,0x05,0x00,0x80,0x1a,0x33,0x3f,0x2f,0x00}} +}; + +static const SiS310_CHTVRegDataStruct SiS310_CHTVReg_OPALN[] = +{ + {{0x41,0x7f,0xb7,0x36,0xad,0x50,0x34,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}}, + {{0x41,0x7f,0xb7,0x86,0x85,0x50,0x00,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}}, + {{0x41,0x7f,0xb7,0x36,0xad,0x50,0x34,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}}, + {{0x41,0x7f,0xb7,0x86,0x85,0x50,0x00,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}}, + {{0x61,0x7f,0xb7,0x99,0x84,0x35,0x04,0x5a,0x05,0x00,0x80,0x1f,0x0d,0x54,0x5e,0x00}}, + {{0xc1,0x7f,0xb7,0x4d,0x8c,0x1e,0x31,0x5a,0x05,0x00,0x80,0x1f,0x15,0xc0,0x1e,0x00}}, + {{0xe4,0x7f,0xb7,0x1e,0xaf,0x29,0x37,0x5a,0x05,0x00,0x80,0x1d,0xf1,0x6c,0xcb,0x00}} +}; + static const UCHAR SiS310_CHTVVCLKUNTSC[] = {0x41,0x41,0x41,0x41,0x42,0x46,0x53}; static const UCHAR SiS310_CHTVVCLKONTSC[] = {0x48,0x48,0x48,0x48,0x45,0x43,0x51}; @@ -4334,4 +4986,14 @@ static const UCHAR SiS310_CHTVVCLKUPAL[] = {0x47,0x47,0x47,0x47,0x48,0x4a,0x54}; static const UCHAR SiS310_CHTVVCLKOPAL[] = {0x47,0x47,0x47,0x47,0x48,0x4f,0x52}; -/* TW: New end */ + +static const UCHAR SiS310_CHTVVCLKSOPAL[] = {0x47,0x47,0x47,0x47,0x48,0x4f,0x52}; + +static const UCHAR SiS310_CHTVVCLKUPALM[] = {0x41,0x41,0x41,0x41,0x42,0x46,0x53}; + +static const UCHAR SiS310_CHTVVCLKOPALM[] = {0x48,0x48,0x48,0x48,0x45,0x43,0x51}; + +static const UCHAR SiS310_CHTVVCLKUPALN[] = {0x47,0x47,0x47,0x47,0x48,0x4a,0x54}; + +static const UCHAR SiS310_CHTVVCLKOPALN[] = {0x47,0x47,0x47,0x47,0x48,0x4f,0x52}; + diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/video/sis/init301.c linux.21rc1-ac1/drivers/video/sis/init301.c --- linux.21rc1/drivers/video/sis/init301.c 2003-04-22 16:38:52.000000000 +0100 +++ linux.21rc1-ac1/drivers/video/sis/init301.c 2003-04-22 16:44:38.000000000 +0100 @@ -1,17 +1,27 @@ /* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/init301.c,v 1.3 2002/22/04 01:16:16 dawes Exp $ */ /* - * Mode switching code (CRT2 section) for SiS 300/540/630/730/315/550/650/740 + * Mode switching code (CRT2 section) for SiS 300/540/630/730/315/550/650/740/330 * (Universal module for Linux kernel framebuffer, XFree86 4.x) * * Assembler-To-C translation - * Parts Copyright 2002 by Thomas Winischhofer + * Copyright 2002, 2003 by Thomas Winischhofer + * Minor parts Copyright SiS, Inc. * * Based on BIOS - * 1.10.07, 1.10a for SiS650/LVDS+CH7019 - * 1.07.1b, 1.10.6s for SiS650/301(B/LV), 650/301LVx - * 2.04.50 (I) and 2.04.5c (II) for SiS630/301(B) + * 1.10.07, 1.10a for 650/CH7019 + * 1.11.21a for 740/CH7019 + * 1.11.05 for 650/LVDS (w/o Chrontel) + * 1.07.1b, 1.10.6s, 1.11.6w, 1.11.7w, 1.11.8r for 650/301(B/LV), 650/302LV + * 2.04.50 (I) and 2.04.5c (II) for 630/301(B) * 2.02.3b, 2.03.02, 2.04.2c, 2.04.5c, 2.07a and 2.08.b3 for 630/LVDS/LVDS+CH7005 + * 2.04.5c, 2.04.6c for 730+LVDS+CH7005 * 1.09b for 315/301(B) + * 1.16.51 for 300+301LV (ECS A907) + * 1.01.03 for 330 (Xabre 400) + * + * Known bugs: + * 1024x768 panel, expanding (CR37=1): Mode 640x480 does not work on SOME panels + * therefore, we always do the scaling ourselves for now. * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that @@ -31,7 +41,19 @@ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR * PERFORMANCE OF THIS SOFTWARE. * + * TW says: This code looks awful, I know. But please don't do anything about + * this otherwise debugging will be hell. + * The code is extremely fragile as regards the different chipsets, different + * video bridges and combinations thereof. If anything is changed, extreme + * care has to be taken that that change doesn't break it for other chipsets, + * bridges or combinations thereof. + * All comments in this file are by me, regardless if they are marked TW or not. + * */ + +#if 1 +#define NEWCH701x +#endif #include "init301.h" @@ -39,10 +61,6 @@ #define TWNEWPANEL #endif -#if 1 /* TW: Emulate 650/301LVx BIOS 1.10.6s (should be set) */ -#define SIS650301NEW -#endif - #ifdef SIS300 #include "oem300.h" #endif @@ -52,7 +70,7 @@ #endif #define SiS_I2CDELAY 1000 -#define SiS_I2CDELAYSHORT 333 +#define SiS_I2CDELAYSHORT 150 BOOLEAN SiS_SetCRT2Group301(SiS_Private *SiS_Pr, USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo, @@ -63,7 +81,11 @@ SiS_Pr->SiS_SetFlag |= ProgrammingCRT2; - SiS_SearchModeID(SiS_Pr,ROMAddr,&ModeNo,&ModeIdIndex); + if(!SiS_Pr->UseCustomMode) { + SiS_SearchModeID(SiS_Pr,ROMAddr,&ModeNo,&ModeIdIndex); + } else { + ModeIdIndex = 0; + } /* TW: Used for shifting CR33 */ SiS_Pr->SiS_SelectCRT2Rate = 4; @@ -76,26 +98,43 @@ if(SiS_LowModeStuff(SiS_Pr,ModeNo,HwDeviceExtension)) { SiS_DisableBridge(SiS_Pr,HwDeviceExtension,BaseAddr); + if((SiS_Pr->SiS_IF_DEF_LVDS == 1) && (HwDeviceExtension->jChipType == SIS_730)) { + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x00,0x80); + } SiS_SetCRT2ModeRegs(SiS_Pr,BaseAddr,ModeNo,ModeIdIndex,HwDeviceExtension); } if(SiS_Pr->SiS_VBInfo & DisableCRT2Display) { SiS_LockCRT2(SiS_Pr,HwDeviceExtension, BaseAddr); SiS_DisplayOn(SiS_Pr); - return(FALSE); + return(TRUE); } + if(SiS_Pr->UseCustomMode) return(FALSE); + SiS_GetCRT2Data(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex, HwDeviceExtension); - /* LVDS, 650/301LV(LCDA) and 630/301B BIOS set up Panel Link */ - if((SiS_Pr->SiS_IF_DEF_LVDS == 1) || (SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV)) { + /* Set up Panel Link for LVDS, 301BDH and 650/30xLV(for LCDA) */ + if( (SiS_Pr->SiS_IF_DEF_LVDS == 1) || + ((SiS_Pr->SiS_VBType & VB_NoLCD) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD)) || + ((HwDeviceExtension->jChipType >= SIS_315H) && (SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV)) ) { SiS_GetLVDSDesData(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex, HwDeviceExtension); } else { SiS_Pr->SiS_LCDHDES = SiS_Pr->SiS_LCDVDES = 0; } +#ifdef LINUX_XF86 +#ifdef TWDEBUG + xf86DrvMsg(0, X_INFO, "(init301: LCDHDES 0x%03x LCDVDES 0x%03x)\n", SiS_Pr->SiS_LCDHDES, SiS_Pr->SiS_LCDVDES); + xf86DrvMsg(0, X_INFO, "(init301: HDE 0x%03x VDE 0x%03x)\n", SiS_Pr->SiS_HDE, SiS_Pr->SiS_VDE); + xf86DrvMsg(0, X_INFO, "(init301: VGAHDE 0x%03x VGAVDE 0x%03x)\n", SiS_Pr->SiS_VGAHDE, SiS_Pr->SiS_VGAVDE); + xf86DrvMsg(0, X_INFO, "(init301: HT 0x%03x VT 0x%03x)\n", SiS_Pr->SiS_HT, SiS_Pr->SiS_VT); + xf86DrvMsg(0, X_INFO, "(init301: VGAHT 0x%03x VGAVT 0x%03x)\n", SiS_Pr->SiS_VGAHT, SiS_Pr->SiS_VGAVT); +#endif +#endif + if(SiS_LowModeStuff(SiS_Pr,ModeNo,HwDeviceExtension)) { SiS_SetGroup1(SiS_Pr,BaseAddr,ROMAddr,ModeNo,ModeIdIndex, HwDeviceExtension,RefreshRateTableIndex); @@ -114,91 +153,112 @@ SiS_SetGroup5(SiS_Pr,HwDeviceExtension, BaseAddr,ROMAddr, ModeNo,ModeIdIndex); - /* TW: 630/301B BIOS does all this: */ - if(HwDeviceExtension->jChipType < SIS_315H) { - if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { - if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel640x480) { - if(!((SiS_Pr->SiS_SetFlag & CRT2IsVGA) && ((ModeNo == 0x03) || (ModeNo = 0x10)))) { - if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) { - SiS_ModCRT1CRTC(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex, - RefreshRateTableIndex,HwDeviceExtension); - } - } - } - SiS_SetCRT2ECLK(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex, - RefreshRateTableIndex,HwDeviceExtension); - } + /* TW: For 301BDH (Panel link initialization): */ + if((SiS_Pr->SiS_VBType & VB_NoLCD) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD)) { + if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel640x480) { + if(!((SiS_Pr->SiS_SetFlag & SetDOSMode) && ((ModeNo == 0x03) || (ModeNo = 0x10)))) { + if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) { + SiS_ModCRT1CRTC(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex, + RefreshRateTableIndex,HwDeviceExtension); + } + } + } + SiS_SetCRT2ECLK(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex, + RefreshRateTableIndex,HwDeviceExtension); } - } } else { if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel640x480) { - if (SiS_Pr->SiS_IF_DEF_TRUMPION == 0) { - SiS_ModCRT1CRTC(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex, - RefreshRateTableIndex,HwDeviceExtension); - } + if(SiS_Pr->SiS_IF_DEF_TRUMPION == 0) { + SiS_ModCRT1CRTC(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex, + RefreshRateTableIndex,HwDeviceExtension); + } } if(SiS_Pr->SiS_IF_DEF_FSTN == 0) { - SiS_SetCRT2ECLK(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex, - RefreshRateTableIndex,HwDeviceExtension); + SiS_SetCRT2ECLK(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex, + RefreshRateTableIndex,HwDeviceExtension); } if(SiS_LowModeStuff(SiS_Pr,ModeNo,HwDeviceExtension)) { - if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) { - /* TW: Inserted from 650/LVDS BIOS */ - if (SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) { - if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) { + if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) { + if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) { + if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) { +#ifdef SIS315H SiS_SetCH701xForLCD(SiS_Pr,HwDeviceExtension,BaseAddr); - } - } - if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { - /* TW: Set Chrontel registers only if CRT2 is TV */ - SiS_SetCHTVReg(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex, +#endif + } + } + if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { + SiS_SetCHTVReg(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex, RefreshRateTableIndex); - } - } + } + } } } #ifdef SIS300 - if ( (HwDeviceExtension->jChipType==SIS_540)|| - (HwDeviceExtension->jChipType==SIS_630)|| - (HwDeviceExtension->jChipType==SIS_730)|| - (HwDeviceExtension->jChipType==SIS_300) ) + if ( (HwDeviceExtension->jChipType == SIS_540) || + (HwDeviceExtension->jChipType == SIS_630) || + (HwDeviceExtension->jChipType == SIS_730) || + (HwDeviceExtension->jChipType == SIS_300) ) { if(SiS_LowModeStuff(SiS_Pr,ModeNo,HwDeviceExtension)) { - SiS_OEM300Setting(SiS_Pr,HwDeviceExtension,BaseAddr,ROMAddr,ModeNo); + if(SiS_Pr->SiS_UseOEM) { + if((SiS_Pr->SiS_UseROM) && ROMAddr && (SiS_Pr->SiS_UseOEM == -1)) { + if((ROMAddr[0x233] == 0x12) && (ROMAddr[0x234] == 0x34)) { + SiS_OEM300Setting(SiS_Pr,HwDeviceExtension,BaseAddr,ROMAddr,ModeNo); + } + } else { + SiS_OEM300Setting(SiS_Pr,HwDeviceExtension,BaseAddr,ROMAddr,ModeNo); + } + } } } #endif #ifdef SIS315H - if ( (HwDeviceExtension->jChipType==SIS_315H)|| - (HwDeviceExtension->jChipType==SIS_315PRO)|| - (HwDeviceExtension->jChipType==SIS_550) || - (HwDeviceExtension->jChipType==SIS_640) || - (HwDeviceExtension->jChipType==SIS_740) || - (HwDeviceExtension->jChipType==SIS_650)) + if ( (HwDeviceExtension->jChipType == SIS_315H) || + (HwDeviceExtension->jChipType == SIS_315) || + (HwDeviceExtension->jChipType == SIS_315PRO)|| + (HwDeviceExtension->jChipType == SIS_550) || + (HwDeviceExtension->jChipType == SIS_740) || + (HwDeviceExtension->jChipType == SIS_650) || + (HwDeviceExtension->jChipType == SIS_330) ) { if(SiS_LowModeStuff(SiS_Pr,ModeNo,HwDeviceExtension)) { -#ifdef SIS650301NEW SiS_FinalizeLCD(SiS_Pr,BaseAddr,ROMAddr,ModeNo,ModeIdIndex, HwDeviceExtension); -#else +#if 0 /* Instead of FinalizeLCD(), older BIOSes (A92x) used OEMLCD() */ SiS_OEMLCD(SiS_Pr,HwDeviceExtension,BaseAddr,ROMAddr,ModeNo,ModeIdIndex); #endif - SiS_OEM310Setting(SiS_Pr,HwDeviceExtension,BaseAddr,ROMAddr,ModeNo,ModeIdIndex); + if(SiS_Pr->SiS_UseOEM) { + SiS_OEM310Setting(SiS_Pr,HwDeviceExtension,BaseAddr,ROMAddr,ModeNo,ModeIdIndex); + } SiS_CRT2AutoThreshold(SiS_Pr,BaseAddr); } } #endif + if(HwDeviceExtension->jChipType < SIS_315H) { + if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { + if(HwDeviceExtension->jChipType != SIS_730) { + SiS_DisplayOn(SiS_Pr); + } + } + } + if(SiS_LowModeStuff(SiS_Pr,ModeNo,HwDeviceExtension)) { + if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { + if(HwDeviceExtension->jChipType == SIS_730) { + SiS_DisplayOn(SiS_Pr); + } + } SiS_EnableBridge(SiS_Pr,HwDeviceExtension,BaseAddr); - SiS_DisplayOn(SiS_Pr); } + SiS_DisplayOn(SiS_Pr); + if(SiS_Pr->SiS_IF_DEF_CH70xx == 1) { if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { /* TW: Disable LCD panel when using TV */ @@ -209,8 +269,6 @@ } } - SiS_DisplayOn(SiS_Pr); - if(SiS_LowModeStuff(SiS_Pr,ModeNo,HwDeviceExtension)) { SiS_LockCRT2(SiS_Pr,HwDeviceExtension, BaseAddr); } @@ -218,7 +276,6 @@ return 1; } -/* TW: Checked with 650/LVDS (1.10.07) and 630+301B/LVDS BIOS */ BOOLEAN SiS_LowModeStuff(SiS_Private *SiS_Pr, USHORT ModeNo, PSIS_HW_DEVICE_INFO HwDeviceExtension) @@ -234,7 +291,8 @@ temp2 = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x00); SiS_SetReg1(SiS_Pr->SiS_P3d4,0x00,temp1); SiS_SetReg1(SiS_Pr->SiS_P3d4,0x11,temp); - if(HwDeviceExtension->jChipType >= SIS_315H) { + if((HwDeviceExtension->jChipType >= SIS_315H) || + (HwDeviceExtension->jChipType == SIS_300)) { if(temp2 == 0x55) return(0); else return(1); } else { @@ -247,17 +305,15 @@ } /* TW: Set Part1 registers */ -/* TW: Checked with 650/LVDS (1.10.07), 650/301LV (II) and 630/301B (II) BIOS */ -/* TW: Pass 2: Checked with 650/301LVx 1.10.6s, 630/301B 2.04.5a */ void SiS_SetGroup1(SiS_Private *SiS_Pr,USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo, USHORT ModeIdIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT RefreshRateTableIndex) { - USHORT temp=0, tempax=0, tempbx=0, tempcx=0, tempbl=0; + USHORT temp=0, tempax=0, tempbx=0, tempcx=0; USHORT pushbx=0, CRT1Index=0; #ifdef SIS315H - USHORT pushcx=0; + USHORT pushcx=0, tempbl=0; #endif USHORT modeflag, resinfo=0; @@ -269,18 +325,14 @@ modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag; } - /* TW: Removed 301B301LV.. check here; LCDA exists with LVDS as well */ if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) { - /* TW: From 650/LVDS BIOS; 301(B+LV) version does not set Sync */ - if (SiS_Pr->SiS_IF_DEF_LVDS == 1) { - SiS_SetCRT2Sync(SiS_Pr,BaseAddr,ROMAddr,ModeNo, - RefreshRateTableIndex,HwDeviceExtension); - } - + SiS_SetCRT2Sync(SiS_Pr,BaseAddr,ROMAddr,ModeNo, + RefreshRateTableIndex,HwDeviceExtension); +#ifdef SIS315H SiS_SetGroup1_LCDA(SiS_Pr,BaseAddr,ROMAddr,ModeNo,ModeIdIndex, HwDeviceExtension,RefreshRateTableIndex); - +#endif } else { if( (HwDeviceExtension->jChipType >= SIS_315H) && @@ -293,7 +345,7 @@ } else { SiS_SetCRT2Offset(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex, - RefreshRateTableIndex,HwDeviceExtension); + RefreshRateTableIndex,HwDeviceExtension); if (HwDeviceExtension->jChipType < SIS_315H ) { #ifdef SIS300 @@ -312,8 +364,7 @@ if (HwDeviceExtension->jChipType < SIS_315H ) { -#ifdef SIS300 - /* ------------- 300 series --------------*/ +#ifdef SIS300 /* ------------- 300 series --------------*/ temp = (SiS_Pr->SiS_VGAHT - 1) & 0x0FF; /* BTVGA2HT 0x08,0x09 */ SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x08,temp); /* TW: CRT2 Horizontal Total */ @@ -332,7 +383,7 @@ if(SiS_Pr->SiS_IF_DEF_LVDS == 0) { if(SiS_Pr->SiS_VBInfo & SetCRT2ToRAMDAC){ - CRT1Index &= 0x3F; + /* CRT1Index &= 0x3F; - Not any longer */ tempbx = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[4]; tempbx |= ((SiS_Pr->SiS_CRT1Table[CRT1Index].CR[14] & 0xC0) << 2); tempbx = (tempbx - 1) << 3; @@ -340,7 +391,9 @@ tempcx &= 0x1F; temp = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[15]; temp = (temp & 0x04) << (6-2); - tempcx = ((tempcx | temp) - 1) << 3; + tempcx = (tempcx | temp); + tempcx--; + tempcx <<= 3; } if((SiS_Pr->SiS_VBInfo & SetCRT2ToTV) && (resinfo == 0x08)){ @@ -353,16 +406,29 @@ temp = tempbx & 0x00FF; SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x0B,temp); /* TW: CRT2 Horizontal Retrace Start */ -#endif +#endif /* SIS300 */ } else { -#ifdef SIS315H - /* ---------------------- 310 series ------------------*/ +#ifdef SIS315H /* ----------------- 310/325/330 series ------------- */ tempcx = SiS_Pr->SiS_VGAHT; /* BTVGA2HT 0x08,0x09 */ pushcx = tempcx; - if(modeflag & HalfDCLK) tempcx >>= 1; + if(modeflag & HalfDCLK) { +#ifndef NEWCH701x + if((SiS_Pr->SiS_IF_DEF_LVDS == 1) && (SiS_Pr->SiS_IF_DEF_CH70xx == 0)) { +#endif + tempax = SiS_Pr->SiS_VGAHDE >> 1; + tempcx = SiS_Pr->SiS_HT - SiS_Pr->SiS_HDE + tempax; + if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) { + tempcx = SiS_Pr->SiS_HT - tempax; + } +#ifndef NEWCH701x + } else { + tempcx >>= 1; + } +#endif + } tempcx--; temp = tempcx & 0xff; @@ -398,13 +464,17 @@ tempcx &= 0x1F; temp = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[15]; temp = (temp & 0x04) << (5-2); /* VGAHRE D[5] */ - tempcx = ((tempcx | temp) - 3) << 3; /* (VGAHRE-3)*8 */ + tempcx = (tempcx | temp); /* (VGAHRE-3)*8 */ + tempcx -= 3; + tempcx <<= 3; + tempcx &= 0x00FF; + tempcx |= (tempbx & 0xFF00); tempbx += 16; tempcx += 16; tempax = SiS_Pr->SiS_VGAHT; - if (modeflag & HalfDCLK) tempax >>= 1; + if(modeflag & HalfDCLK) tempax >>= 1; tempax--; - if (tempcx > tempax) tempcx = tempax; + if(tempcx > tempax) tempcx = tempax; } if((SiS_Pr->SiS_VBInfo & SetCRT2ToTV) && (resinfo == 0x08)){ if(!(SiS_Pr->SiS_VBInfo & SetPALTV)){ @@ -412,7 +482,7 @@ tempcx = 1042; } } - /* TW: Makes no sense, but is in 650/301LVx 1.10.6s */ + /* TW: Makes no sense, but is in 650/302LV 1.10.6s */ if((SiS_Pr->SiS_VBInfo & SetCRT2ToTV) && (resinfo == 0x08)){ if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV)) { if(!(SiS_Pr->SiS_VBInfo & SetPALTV)) { @@ -425,102 +495,9 @@ temp = tempbx & 0xff; SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x0B,temp); /* TW: CRT2 Horizontal Retrace Start */ - -#if 0 /* TW: Old code */ - if (modeflag & HalfDCLK) { /* for low resolution modes */ - - temp = ((SiS_Pr->SiS_VGAHT / 2) - 1) & 0xFF; /* BTVGA2HT 0x08,0x09 */ - SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x08,temp); /* TW: CRT2 Horizontal Total */ - - temp = ((((SiS_Pr->SiS_VGAHT / 2) - 1) & 0xFF00) >> 8) << 4; - SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x09,0x0F,temp); /* TW: CRT2 Horizontal Total Overflow [7:4] */ - - temp = ((SiS_Pr->SiS_VGAHDE / 2) + 16) & 0xFF; /* BTVGA2HDEE 0x0A,0x0C */ - SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x0A,temp); /* TW: CRT2 Horizontal Display Enable End */ - - pushbx = (SiS_Pr->SiS_VGAHDE / 2) + 16; - tempcx = ((SiS_Pr->SiS_VGAHT - SiS_Pr->SiS_VGAHDE) / 2) >> 2; /* cx */ - if(SiS_Pr->SiS_IF_DEF_LVDS == 1) - tempcx >>= 1; /* TW: From LVDS 1.10.07; not done on 301(LV) */ - tempbx = pushbx + tempcx; /* bx BTVGA@HRS 0x0B,0x0C */ - tempcx += tempbx; - - if(SiS_Pr->SiS_IF_DEF_LVDS == 0) { - if(SiS_Pr->SiS_VBInfo & SetCRT2ToRAMDAC){ - tempbx = SiS_CRT1Table[CRT1Index].CR[4]; - tempbx |= ((SiS_CRT1Table[CRT1Index].CR[14] & 0xC0) << 2); - tempbx = (tempbx - 3) << 3; /*(VGAHRS-3)*8 */ - tempcx = SiS_CRT1Table[CRT1Index].CR[5]; - tempcx &= 0x1F; - temp = SiS_CRT1Table[CRT1Index].CR[15]; - temp = (temp & 0x04) << (5-2); /* VGAHRE D[5] */ - tempcx =((tempcx | temp) - 3) << 3; /* (VGAHRE-3)*8 */ - } - /* TW: The following is not done in 650/LVDS BIOS */ - tempbx += 4; - tempcx += 4; - - if (tempcx > (SiS_Pr->SiS_VGAHT / 2)) - tempcx = SiS_Pr->SiS_VGAHT / 2; - } - - temp = tempbx & 0x00FF; - SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x0B,temp); /* TW: CRT2 Horizontal Retrace Start */ - - } else { /* for high resolution modes */ - - temp = (SiS_Pr->SiS_VGAHT - 1) & 0xFF; /* BTVGA2HT 0x08,0x09 */ - SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x08,temp); /* TW: CRT2 Horizontal Total */ - - temp = (((SiS_Pr->SiS_VGAHT - 1) & 0xFF00) >> 8 ) << 4; - SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x09,0x0F,temp); /* TW: CRT2 Horizontal Total Overflow [7:4] */ - - temp = (SiS_Pr->SiS_VGAHDE + 16) & 0xFF; /* BTVGA2HDEE 0x0A,0x0C */ - SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x0A,temp); /* TW: CRT2 Horizontal Display Enable End */ - - pushbx = SiS_Pr->SiS_VGAHDE + 16; - tempcx = (SiS_Pr->SiS_VGAHT - SiS_Pr->SiS_VGAHDE) >> 2; /* cx */ - - /* TW: Done in 650/301LVx 1.10.6s */ - /* if(SiS_Pr->SiS_IF_DEF_LVDS == 1) */ - tempcx >>= 1; /* TW: From LVDS 1.10.07; not done on 301(LV), done in 301LVx 1.10.6s */ - - tempbx = pushbx + tempcx; /* bx BTVGA@HRS 0x0B,0x0C */ - tempcx += tempbx; - - if(SiS_Pr->SiS_IF_DEF_LVDS==0) { - if(SiS_Pr->SiS_VBInfo & SetCRT2ToRAMDAC){ - tempbx = SiS_CRT1Table[CRT1Index].CR[4]; - tempbx |= ((SiS_CRT1Table[CRT1Index].CR[14] & 0xC0) << 2); - tempbx = (tempbx - 3) << 3; /*(VGAHRS-3)*8 */ - tempcx = SiS_CRT1Table[CRT1Index].CR[5]; - tempcx &= 0x1F; - temp = SiS_CRT1Table[CRT1Index].CR[15]; - temp = (temp & 0x04) << (5-2); /* VGAHRE D[5] */ - tempcx = ((tempcx | temp) - 3) << 3; /* (VGAHRE-3)*8 */ - tempbx += 16; - tempcx += 16; - } - /* TW: The entire following section is not done in 650/LVDS BIOS */ - if (tempcx > SiS_Pr->SiS_VGAHT) - tempcx = SiS_Pr->SiS_VGAHT; - - if((SiS_Pr->SiS_VBInfo & SetCRT2ToTV) && (resinfo == 0x08)){ - if(!(SiS_Pr->SiS_VBInfo & SetPALTV)){ - tempbx = 1040; - tempcx = 1042; - } - } - } - - temp = tempbx & 0x00FF; - SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x0B,temp); /* TW: CRT2 Horizontal Retrace Start */ - - } /* halfdclk */ -#endif #endif /* SIS315H */ - } /* 310 series */ + } /* 310/325/330 series */ /* TW: The following is done for all bridge/chip types/series */ @@ -539,21 +516,18 @@ tempcx = SiS_Pr->SiS_VGAVT - 1; temp = tempcx & 0x00FF; - /* TW: Matches 650/301LV, 650/LVDS, 630/LVDS(CLEVO), 630/LVDS(no-Ch7005) */ if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { if(HwDeviceExtension->jChipType < SIS_315H) { if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) { - if(SiS_Pr->SiS_VBInfo & (SetCRT2ToSVIDEO|SetCRT2ToAVIDEO)) { + if(SiS_Pr->SiS_VBInfo & (SetCRT2ToSVIDEO | SetCRT2ToAVIDEO)) { temp--; } } } else { - if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) { temp--; - } } } else if(HwDeviceExtension->jChipType >= SIS_315H) { - /* TW: Inserted from 650/301LVx 1.10.6s */ + /* TW: 650/30xLV 1.10.6s */ temp--; } SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x0E,temp); /* TW: CRT2 Vertical Total */ @@ -566,7 +540,7 @@ temp |= ((tempcx & 0xFF00) >> 8); SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x12,temp); /* TW: Overflow (and HWCursor Test Mode) */ - /* TW: For 650/LVDS (1.10.07), 650/301LVx (1.10.6s) */ + /* TW: 650/LVDS (1.10.07), 650/30xLV (1.10.6s) */ if(HwDeviceExtension->jChipType >= SIS_315H) { tempbx++; tempax = tempbx; @@ -579,7 +553,7 @@ tempcx += tempbx; tempcx++; } else { - /* TW: For 630/LVDS/301B: */ + /* TW: 300 series, LVDS/301B: */ tempbx = (SiS_Pr->SiS_VGAVT + SiS_Pr->SiS_VGAVDE) >> 1; /* BTVGA2VRS 0x10,0x11 */ tempcx = ((SiS_Pr->SiS_VGAVT - SiS_Pr->SiS_VGAVDE) >> 4) + tempbx + 1; /* BTVGA2VRE 0x11 */ } @@ -605,22 +579,28 @@ /* 3. Panel compensation delay */ - if (HwDeviceExtension->jChipType < SIS_315H ) { + if(HwDeviceExtension->jChipType < SIS_315H) { - /* ---------- 300 series -------------- */ +#ifdef SIS300 /* ---------- 300 series -------------- */ if(SiS_Pr->SiS_IF_DEF_LVDS == 0) { temp = 0x20; -#if 0 /* TW: Not in 630/301B BIOS */ - if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x960) temp = 0x24; -#endif - if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) temp = 0x08; -#ifdef oldHV /* TW: Not in 630/301B BIOS */ + + if(HwDeviceExtension->jChipType == SIS_300) { + temp = 0x10; + if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) temp = 0x2c; + if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) temp = 0x20; + if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x960) temp = 0x24; + } + if(SiS_Pr->SiS_VBType & VB_SIS301) { + if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) temp = 0x20; + } + if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x960) temp = 0x24; + if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) temp = 0x08; if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) { - if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) temp = 0x2c; - else temp = 0x20; + if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) temp = 0x2c; + else temp = 0x20; } -#endif if((ROMAddr) && (SiS_Pr->SiS_UseROM) && (SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV)) { if(ROMAddr[0x220] & 0x80) { if(SiS_Pr->SiS_VBInfo & (SetCRT2ToTV-SetCRT2ToHiVisionTV)) @@ -634,46 +614,82 @@ temp &= 0x3c; } } - if(HwDeviceExtension->pdc) { + if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { + if(HwDeviceExtension->pdc) { temp = HwDeviceExtension->pdc & 0x3c; + } } } else { temp = 0x20; - if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel640x480) temp = 0x04; + if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToTV)) { + if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel640x480) temp = 0x04; + } if((ROMAddr) && SiS_Pr->SiS_UseROM) { if(ROMAddr[0x220] & 0x80) { temp = ROMAddr[0x220] & 0x3c; } } - if(HwDeviceExtension->pdc) { + if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { + if(HwDeviceExtension->pdc) { temp = HwDeviceExtension->pdc & 0x3c; + } } } SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x13,~0x03C,temp); /* TW: Panel Link Delay Compensation; (Software Command Reset; Power Saving) */ +#endif /* SIS300 */ + } else { - /* ----------- 310/325 series ---------------*/ +#ifdef SIS315H /* ----------- 310/325/330 series ---------------*/ if(SiS_Pr->SiS_IF_DEF_LVDS == 0) { temp = 0x10; if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) temp = 0x2c; if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) temp = 0x20; if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x960) temp = 0x24; - if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) temp = 0x08; - tempbl = 0xF0; + if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { + temp = 0x08; + if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) { + switch(SiS_Pr->SiS_HiVision) { + case 2: + case 1: + case 0: + temp = 0x08; + break; + default: + if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) temp = 0x2c; + else temp = 0x20; + } + } + } + if(SiS_Pr->SiS_VBType & VB_SIS301B302B) { + tempbl = 0x00; + if((ROMAddr) && (SiS_Pr->SiS_UseROM)) { + if(HwDeviceExtension->jChipType < SIS_330) { + if(ROMAddr[0x13c] & 0x80) tempbl = 0xf0; + } else { + if(ROMAddr[0x1bc] & 0x80) tempbl = 0xf0; + } + } + } else { /* LV (550/301LV checks ROM byte, other LV BIOSes do not) */ + tempbl = 0xF0; + } } else { - temp = 0x00; + if(HwDeviceExtension->jChipType == SIS_740) { + temp = 0x03; + } else { + temp = 0x00; + } if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) temp = 0x0a; tempbl = 0xF0; - if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToTV)) tempbl = 0x0F; - } -#if 0 /* TW: Not done in 650/301LVx 1.10.6s */ - if(SiS_Pr->SiS_IF_DEF_LVDS == 0) { - temp >>= 2; + if(HwDeviceExtension->jChipType == SIS_650) { + if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) { + if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToTV)) tempbl = 0x0F; + } + } } -#endif SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x2D,tempbl,temp); /* TW: Panel Link Delay Compensation */ tempax = 0; @@ -681,15 +697,17 @@ if (modeflag & HalfDCLK) tempax |= 0x40; SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x2C,0x3f,tempax); +#endif /* SIS315H */ + } } /* Slavemode */ if(SiS_Pr->SiS_IF_DEF_LVDS == 0) { - /* TW: 630/301B BIOS sets up Panel Link, too! (650/LV does not) */ - if( (HwDeviceExtension->jChipType < SIS_315H) && (SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) - && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) ) { + /* TW: For 301BDH, we set up the Panel Link */ + if( (SiS_Pr->SiS_VBType & VB_NoLCD) && + (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) ) { SiS_SetGroup1_LVDS(SiS_Pr,BaseAddr,ROMAddr,ModeNo,ModeIdIndex, HwDeviceExtension,RefreshRateTableIndex); @@ -703,22 +721,27 @@ } else { if(HwDeviceExtension->jChipType < SIS_315H) { - SiS_SetGroup1_LVDS(SiS_Pr,BaseAddr,ROMAddr,ModeNo,ModeIdIndex, + + SiS_SetGroup1_LVDS(SiS_Pr,BaseAddr,ROMAddr,ModeNo,ModeIdIndex, HwDeviceExtension,RefreshRateTableIndex); } else { - /* TW: For 650/LVDS */ - if((!(SiS_Pr->SiS_VBInfo & SetCRT2ToTV)) || (SiS_Pr->SiS_VBInfo & SetInSlaveMode)) { - SiS_SetGroup1_LVDS(SiS_Pr,BaseAddr,ROMAddr,ModeNo,ModeIdIndex, - HwDeviceExtension,RefreshRateTableIndex); - } + + if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) { + if((!(SiS_Pr->SiS_VBInfo & SetCRT2ToTV)) || (SiS_Pr->SiS_VBInfo & SetInSlaveMode)) { + SiS_SetGroup1_LVDS(SiS_Pr,BaseAddr,ROMAddr,ModeNo,ModeIdIndex, + HwDeviceExtension,RefreshRateTableIndex); + } + } else { + SiS_SetGroup1_LVDS(SiS_Pr,BaseAddr,ROMAddr,ModeNo,ModeIdIndex, + HwDeviceExtension,RefreshRateTableIndex); + } + } } } /* LCDA */ } -/* TW: Checked against 650/301LV and 630/301B (II) BIOS */ -/* TW: Pass 2: Checked with 650/301LVx (1.10.6s) and 630/301B (2.04.5a) */ void SiS_SetGroup1_301(SiS_Private *SiS_Pr, USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT RefreshRateTableIndex) @@ -727,7 +750,7 @@ USHORT tempax,tempbx,tempcx,temp; USHORT resinfo,modeflag; - if(ModeNo<=0x13) { + if(ModeNo <= 0x13) { modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag; resinfo = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ResInfo; } else { @@ -740,21 +763,19 @@ tempax = 0xFFFF; if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToTV)) tempax = SiS_GetVGAHT2(SiS_Pr); - /* TW: 630/301B does not check this flag, assumes it is set */ - /* 650/LV and 650/301LVx BIOS do not check this either; so we set it... */ if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { modeflag |= Charx8Dot; } if(modeflag & Charx8Dot) tempcx = 0x08; - else tempcx = 0x09; + else tempcx = 0x09; if(tempax >= SiS_Pr->SiS_VGAHT) tempax = SiS_Pr->SiS_VGAHT; if(modeflag & HalfDCLK) tempax >>= 1; tempax = (tempax / tempcx) - 5; - tempbx = tempax & 0xFF; + tempbx = tempax & 0x00FF; temp = 0xFF; /* set MAX HT */ SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x03,temp); @@ -763,26 +784,26 @@ if(modeflag & HalfDCLK) tempax >>= 1; tempax = (tempax / tempcx) - 1; tempbx |= ((tempax & 0x00FF) << 8); - temp = tempax & 0xFF; + temp = tempax & 0x00FF; SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x04,temp); temp = (tempbx & 0xFF00) >> 8; - if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV){ + if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { if(!(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV)) { temp += 2; } -#ifdef oldHV - if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) { - if(resinfo == 7) temp -= 2; - } -#endif + } + if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) { + if(SiS_Pr->SiS_HiVision == 3) { + if(resinfo == 7) temp -= 2; + } } SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x05,temp); /* 0x05 Horizontal Display Start */ SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x06,0x03); /* 0x06 Horizontal Blank end */ -#ifdef oldHV - if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) { + if((SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) && + (SiS_Pr->SiS_HiVision == 3)) { temp = (tempbx & 0x00FF) - 1; if(!(modeflag & HalfDCLK)) { temp -= 6; @@ -792,7 +813,6 @@ } } } else { -#endif tempcx = tempbx & 0x00FF; tempbx = (tempbx & 0xFF00) >> 8; tempcx = (tempcx + tempbx) >> 1; @@ -803,46 +823,44 @@ if((modeflag & Charx8Dot)){ temp += 4; if(SiS_Pr->SiS_VGAHDE >= 800) temp -= 6; - /* TW: Inserted from 650/301 BIOS, 630/301B/301 don't do this */ if(HwDeviceExtension->jChipType >= SIS_315H) { - if(SiS_Pr->SiS_VGAHDE == 800) temp += 2; + if(SiS_Pr->SiS_VGAHDE == 800) temp += 2; } } } } else { if(!(modeflag & HalfDCLK)) { - temp -= 4; - if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1280x960) { - if(SiS_Pr->SiS_VGAHDE >= 800){ - temp -= 7; - if(HwDeviceExtension->jChipType < SIS_315H) { - /* 650/301LV(x) does not do this, 630/301B does */ - if(SiS_Pr->SiS_ModeType == ModeEGA){ - if(SiS_Pr->SiS_VGAVDE == 1024){ - temp += 15; - if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1280x1024) temp += 7; - } - } - } - if(SiS_Pr->SiS_VGAHDE >= 1280){ - if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1280x960) { - if(SiS_Pr->SiS_LCDInfo & LCDNonExpanding) temp += 28; - } + temp -= 4; + if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1280x960) { + if(SiS_Pr->SiS_VGAHDE >= 800) { + temp -= 7; + if(HwDeviceExtension->jChipType < SIS_315H) { + /* 650/301LV(x) does not do this, 630/301B, 300/301LV do */ + if(SiS_Pr->SiS_ModeType == ModeEGA) { + if(SiS_Pr->SiS_VGAVDE == 1024) { + temp += 15; + if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1280x1024) + temp += 7; + } + } + } + if(SiS_Pr->SiS_VGAHDE >= 1280) { + if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1280x960) { + if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) temp += 28; + } + } } - } - } + } } } -#ifdef oldHV } -#endif SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x07,temp); /* 0x07 Horizontal Retrace Start */ SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x08,0x00); /* 0x08 Horizontal Retrace End */ if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { if(SiS_Pr->SiS_SetFlag & TVSimuMode) { - if(ModeNo <= 1) { + if(ModeNo <= 0x01) { SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x07,0x2a); if(!(SiS_Pr->SiS_VBInfo & SetPALTV)) { SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x08,0x61); @@ -882,8 +900,16 @@ } } + if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) { + if(SiS_Pr->SiS_HiVision & 0x03) { + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x07,0xb2); + if(SiS_Pr->SiS_HiVision & 0x02) { + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x07,0xab); + } + } + } - SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x18,0x03); /* 0x18 SR08 */ + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x18,0x03); /* 0x18 SR08 (FIFO Threshold?) */ SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x19,0xF0); @@ -919,7 +945,7 @@ tempbx--; temp = tempbx & 0x00FF; #if 0 - /* TW: Missing code from 630/301B 2.04.5a and 650/301LVx 1.10.6s (calles int 2f) */ + /* TW: Missing code from 630/301B 2.04.5a and 650/302LV 1.10.6s (calles int 2f) */ if(xxx()) { if(temp == 0xdf) temp = 0xda; } @@ -961,9 +987,9 @@ push1 = tempax; if(HwDeviceExtension->jChipType >= SIS_315H) { - /* TW: Inserted from 650/301LVx 1.10.6s */ + /* TW: 650/30xLV 1.10.6s */ if(ModeNo > 0x13) { - if(resinfo != 0x09) { + if(resinfo != 0x09) { /* 1280x1024 */ tempax <<= 1; tempbx += tempax; } @@ -977,11 +1003,11 @@ tempax <<= 1; tempbx += tempax; } -#ifdef oldHV - if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) { + + if( (SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) && + (SiS_Pr->SiS_HiVision == 3) ) { tempbx -= 10; } else { -#endif if(SiS_Pr->SiS_SetFlag & TVSimuMode) { if(SiS_Pr->SiS_VBInfo & SetPALTV) { if(!(SiS_Pr->SiS_HiVision & 0x03)) { @@ -992,9 +1018,7 @@ } } } -#ifdef oldHV } -#endif tempax = push1; tempax >>= 2; tempax++; @@ -1016,7 +1040,7 @@ if(tempbx & 0x0100) tempcx |= 0x0008; if(tempbx & 0x0200) { - SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x0B,0x20); + SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x0B,0x20); } tempbx++; @@ -1041,48 +1065,50 @@ if(SiS_Pr->SiS_VGAVDE == 480) temp = 0xa3; } } - SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x0A,temp); /* 0x0A CR07 */ + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x0A,temp); /* 0x0A CR07 */ temp = (tempcx & 0xFF00) >> 8; - SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x17,temp); /* 0x17 SR0A */ + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x17,temp); /* 0x17 SR0A */ tempax = modeflag; temp = (tempax & 0xFF00) >> 8; temp = (temp >> 1) & 0x09; - /* TW: Inserted from 630/301B and 650/301(LV/LVX) BIOS; not in 630/301 BIOS */ if(!(SiS_Pr->SiS_VBType & VB_SIS301)) { + /* Only use 8 dot clock */ temp |= 0x01; } - SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x16,temp); /* 0x16 SR01 */ + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x16,temp); /* 0x16 SR01 */ - SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x0F,0x00); /* 0x0F CR14 */ + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x0F,0x00); /* 0x0F CR14 */ - SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x12,0x00); /* 0x12 CR17 */ + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x12,0x00); /* 0x12 CR17 */ if(SiS_Pr->SiS_LCDInfo & LCDRGB18Bit) { - if(HwDeviceExtension->jChipType >= SIS_315H) { - /* TW: Inserted from 650/301LVx 1.10.6s */ + if(IS_SIS650) { + /* TW: 650/30xLV 1.10.6s */ if(SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x00) & 0x01) { temp = 0x80; } } else temp = 0x80; } else temp = 0x00; - SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1A,temp); /* 0x1A SR0E */ + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1A,temp); /* 0x1A SR0E */ return; } -/* TW: Checked against 650/LVDS 1.10.07, 630/301B (I,II) and 630/LVDS BIOS */ void SiS_SetGroup1_LVDS(SiS_Private *SiS_Pr,USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo, USHORT ModeIdIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT RefreshRateTableIndex) { USHORT modeflag, resinfo; - USHORT push1, push2, tempax, tempbx, tempcx, temp, pushcx; + USHORT push1, push2, tempax, tempbx, tempcx, temp; +#ifdef SIS315H + USHORT pushcx; +#endif ULONG tempeax=0, tempebx, tempecx, tempvcfact=0; - if(ModeNo<=0x13) { + if(ModeNo <= 0x13) { modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag; resinfo = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ResInfo; } else { @@ -1090,23 +1116,14 @@ resinfo = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO; } -#ifdef LINUX_XF86 -#ifdef TWDEBUG - xf86DrvMsg(0, X_INFO, "(init301: LCDHDES 0x%03x LCDVDES 0x%03x)\n", SiS_Pr->SiS_LCDHDES, SiS_Pr->SiS_LCDVDES); - xf86DrvMsg(0, X_INFO, "(init301: HDE 0x%03x VDE 0x%03x)\n", SiS_Pr->SiS_HDE, SiS_Pr->SiS_VDE); - xf86DrvMsg(0, X_INFO, "(init301: VGAHDE 0x%03x VGAVDE 0x%03x)\n", SiS_Pr->SiS_VGAHDE, SiS_Pr->SiS_VGAVDE); - xf86DrvMsg(0, X_INFO, "(init301: HT 0x%03x VT 0x%03x)\n", SiS_Pr->SiS_HT, SiS_Pr->SiS_VT); - xf86DrvMsg(0, X_INFO, "(init301: VGAHT 0x%03x VGAVT 0x%03x)\n", SiS_Pr->SiS_VGAHT, SiS_Pr->SiS_VGAVT); -#endif -#endif - /* TW: Set up Panel Link */ /* 1. Horizontal setup */ tempax = SiS_Pr->SiS_LCDHDES; - if((SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel640x480) && (!(SiS_Pr->SiS_VBInfo & SetInSlaveMode))) { + if( (SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel640x480) && + (!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) ) { tempax -= 8; } @@ -1114,15 +1131,19 @@ tempbx = SiS_Pr->SiS_HDE; /* Horiz. Display End */ - if(SiS_Pr->SiS_LCDInfo & LCDNonExpanding) { - if(!SiS_Pr->SiS_IF_DEF_DSTN) { - if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel800x600) tempbx = 800; - else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) tempbx = 1024; - else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x600) tempbx = 1024; /* TW: not done in BIOS */ - else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1152x768) tempbx = 1152; /* TW: not done in BIOS */ - else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) tempbx = 1280; /* TW */ - else if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel640x480) tempbx = 1400; /* TW */ - } + if(!(SiS_Pr->SiS_LCDInfo & LCDPass11)) { + if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) { + if((!SiS_Pr->SiS_IF_DEF_DSTN) && (SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel640x480)) { + if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel800x600) tempbx = 800; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x600) tempbx = 1024; /* TW */ + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) tempbx = 1024; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1152x768) tempbx = 1152; /* TW */ + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x768) tempbx = 1280; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) tempbx = 1280; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) tempbx = 1400; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200) tempbx = 1600; + } + } } tempcx = (tempcx - tempbx) >> 2; /* HT-HDE / 4 */ @@ -1133,29 +1154,33 @@ if(tempax >= SiS_Pr->SiS_HT) tempax -= SiS_Pr->SiS_HT; push2 = tempax; - - if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { - if(!SiS_Pr->SiS_IF_DEF_DSTN){ - if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel800x600) tempcx = 0x0028; - else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) tempcx = 0x0030; - else if( (SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) || - (SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1152x768) ) { - if(HwDeviceExtension->jChipType < SIS_315H) { - if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { - tempcx = 0x0017; + + if(!(SiS_Pr->SiS_LCDInfo & LCDPass11)) { + if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { + if((!SiS_Pr->SiS_IF_DEF_DSTN) && (SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel640x480)) { + if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel800x600) tempcx = 0x0028; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x600) tempcx = 0x0018; + else if( (SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) || + (SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1152x768) ) { + if(HwDeviceExtension->jChipType < SIS_315H) { + if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { + tempcx = 0x0017; #ifdef TWNEWPANEL - tempcx = 0x0018; + tempcx = 0x0018; #endif - } else { - tempcx = 0x0017; /* A901; other 301B BIOS 0x0018; */ - } - } else { - tempcx = 0x0018; - } - } - else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x600) tempcx = 0x0018; - else if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel640x480) tempcx = 0x0030; - } + } else { + tempcx = 0x0017; /* A901; sometimes 0x0018; */ + } + } else { + tempcx = 0x0018; + } + } + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x768) tempcx = 0x0028; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) tempcx = 0x0030; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) tempcx = 0x0030; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200) tempcx = 0x0040; + } + } } tempcx += tempax; /* lcdhrs */ @@ -1165,23 +1190,31 @@ temp = tempax & 0x00FF; SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x14,temp); /* Part1_14h; TW: Panel Link Horizontal Retrace Start */ - temp = (tempax & 0x00FF) + 10; - - /* TW: Inserted this entire "if"-section from 650/LVDS BIOS */ - if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { - if(!SiS_Pr->SiS_IF_DEF_DSTN){ - if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel640x480) { - temp += 6; - if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel800x600) { - temp++; - if(HwDeviceExtension->jChipType >= SIS_315H) { - if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1024x768) { - temp -= 3; - } - } - } + if(SiS_Pr->SiS_LCDInfo & LCDPass11) { + temp = (tempax & 0x00FF) + 2; + } else { + temp = (tempax & 0x00FF) + 10; + if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { + if(!SiS_Pr->SiS_IF_DEF_DSTN) { + if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel640x480) { + temp += 6; + if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel800x600) { + temp++; + if(HwDeviceExtension->jChipType >= SIS_315H) { + if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1024x768) { + temp += 7; + if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1600x1200) { + temp -= 0x14; + if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1280x768) { + temp -= 10; + } + } + } + } + } + } } - } + } } temp &= 0x1F; @@ -1197,41 +1230,36 @@ tempcx >>= 3; /* BPLHDES */ temp = (tempcx & 0x00FF); - if(ModeNo == 0x5b) temp--; /* fix fstn mode=5b */ + if(ModeNo == 0x5b) temp--; SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x16,temp); /* Part1_16h; TW: Panel Link Horizontal Display Enable Start */ - if(HwDeviceExtension->jChipType < SIS_315H) { /* TW: Not done in LVDS BIOS 1.10.07 */ - if(tempbx & 0x07) tempbx += 8; /* TW: Done in 630/301B and 630/LVDS BIOSes */ + if(HwDeviceExtension->jChipType < SIS_315H) { + if(tempbx & 0x07) tempbx += 8; } tempbx >>= 3; /* BPLHDEE */ temp = tempbx & 0x00FF; - if(ModeNo == 0x5b) temp--; /* fix fstn mode=5b */ + if(ModeNo == 0x5b) temp--; SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x17,temp); /* Part1_17h; TW: Panel Link Horizontal Display Enable End */ /* 2. Vertical setup */ if(HwDeviceExtension->jChipType < SIS_315H) { - - /* TW: This entire section from 630/301B and 630/LVDS/LVDS+CH BIOS */ - tempcx = SiS_Pr->SiS_VGAVT; - tempbx = SiS_Pr->SiS_VGAVDE; - if(SiS_Pr->SiS_LCDInfo & LCDNonExpanding) { - if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel640x480) { - tempbx = 600; - if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel800x600) { - tempbx = 768; - if( (SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1024x768) && - (SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1152x768) ) { - tempbx = 600; - } - } - } - } - tempcx -= tempbx; + tempcx = SiS_Pr->SiS_VGAVT; + tempbx = SiS_Pr->SiS_VGAVDE; + if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) { + if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel640x480) { + if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel800x600) tempbx = 600; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x600) tempbx = 600; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) tempbx = 768; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1152x768) tempbx = 768; + else tempbx = 1024; + } + } + tempcx -= tempbx; } else { - tempcx = SiS_Pr->SiS_VGAVT - SiS_Pr->SiS_VGAVDE; /* VGAVT-VGAVDE */ + tempcx = SiS_Pr->SiS_VGAVT - SiS_Pr->SiS_VGAVDE; /* VGAVT-VGAVDE */ } @@ -1240,19 +1268,19 @@ tempax = SiS_Pr->SiS_VGAVDE; - if((SiS_Pr->SiS_IF_DEF_TRUMPION == 0) && (!(SiS_Pr->SiS_LCDInfo & LCDPass11)) - && (SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel640x480)) { - if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { - if(!SiS_Pr->SiS_IF_DEF_DSTN){ - if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel800x600) tempax = 600; - else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) tempax = 768; - else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x600) tempax = 600; /* TW */ - else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1152x768) tempax = 768; /* TW */ - else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) tempax = 1024; /* TW */ - else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) tempax = 1050; /* TW */ - else tempax = 600; - } - } + if((SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) && (!SiS_Pr->SiS_IF_DEF_DSTN)) { + if( (SiS_Pr->SiS_IF_DEF_TRUMPION == 0) && + (!(SiS_Pr->SiS_LCDInfo & LCDPass11)) && + (SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel640x480) ) { + if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel800x600) tempax = 600; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x600) tempax = 600; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) tempax = 768; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1152x768) tempax = 768; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x768) tempax = 768; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) tempax = 1024; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) tempax = 1050; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200) tempax = 1200; + } } tempbx += tempax; @@ -1262,28 +1290,30 @@ tempcx >>= 1; - if((SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) && (SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel640x480)){ - if(!SiS_Pr->SiS_IF_DEF_DSTN){ - if( (SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel800x600) || - (SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x600) ) { /* TW: @@@ TEST - not in BIOS! */ - tempcx = 0x0001; - } else if( (SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) || - (SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1152x768) ) { - if(HwDeviceExtension->jChipType < SIS_315H) { + if((SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) && (SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel640x480)) { + if(!(SiS_Pr->SiS_LCDInfo & LCDPass11)) { + if(!SiS_Pr->SiS_IF_DEF_DSTN) { + if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel800x600) tempcx = 0x0001; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x600) tempcx = 0x0001; + else if((SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) || + (SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1152x768)) { + if(HwDeviceExtension->jChipType < SIS_315H) { if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { tempcx = 0x0002; #ifdef TWNEWPANEL tempcx = 0x0003; #endif } else { - tempcx = 0x0002; /* TW: A901; other 301B BIOS sets 0x0003; */ + tempcx = 0x0002; /* TW: A901; sometimes 0x0003; */ } - } else tempcx = 0x0003; - } - else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x768) tempcx = 0x0003; - else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) tempcx = 0x0001; - else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) tempcx = 0x0001; - else tempcx = 0x0057; + } else tempcx = 0x0003; + } + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x768) tempcx = 0x0003; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) tempcx = 0x0001; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) tempcx = 0x0001; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200) tempcx = 0x0001; + else tempcx = 0x0057; + } } } @@ -1294,19 +1324,24 @@ } if(tempbx >= SiS_Pr->SiS_VT) tempbx -= SiS_Pr->SiS_VT; + temp = tempbx & 0x00FF; SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x18,temp); /* Part1_18h; TW: Panel Link Vertical Retrace Start */ tempcx >>= 3; - if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { - if( (HwDeviceExtension->jChipType < SIS_315H) && - (SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel640x480) ) tempcx = 0x0001; - else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) tempcx = 0x0002; - else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel800x600) tempcx = 0x0003; - else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x600) tempcx = 0x0005; - else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1152x768) tempcx = 0x0005; - else if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel640x480) { + if(!(SiS_Pr->SiS_LCDInfo & LCDPass11)) { + if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { + if( (HwDeviceExtension->jChipType < SIS_315H) && + (SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel640x480) ) tempcx = 0x0001; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel800x600) tempcx = 0x0003; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x600) tempcx = 0x0005; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1152x768) tempcx = 0x0005; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x768) tempcx = 0x0011; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) tempcx = 0x0005; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) tempcx = 0x0002; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200) tempcx = 0x0011; + else if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel640x480) { if(HwDeviceExtension->jChipType < SIS_315H) { if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { tempcx = 0x0004; @@ -1319,6 +1354,7 @@ } else { tempcx = 0x0005; } + } } } @@ -1329,9 +1365,9 @@ temp = ((tempbx & 0x0700) >> 8) << 3; /* BPLDESKEW =0 */ if(SiS_Pr->SiS_VGAVDE != SiS_Pr->SiS_VDE) temp |= 0x40; if(SiS_Pr->SiS_SetFlag & EnableLVDSDDA) temp |= 0x40; - if(SiS_Pr->SiS_LCDInfo & LCDRGB18Bit) { + if(SiS_Pr->SiS_LCDInfo & LCDRGB18Bit) { if(HwDeviceExtension->jChipType >= SIS_315H) { - if(SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x00) & 0x01) { /* TW: Inserted from 650/LVDS 1.10.07 */ + if(SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x00) & 0x01) { temp |= 0x80; } } else { @@ -1342,12 +1378,12 @@ } } } - } /* TW: in follwing line, 0x87 was 0x07 (modified according to 650/LVDS BIOS) */ + } SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x1A,0x87,temp); /* Part1_1Ah; TW: Panel Link Control Signal (7:3); Vertical Retrace Start (2:0) */ if (HwDeviceExtension->jChipType < SIS_315H) { - /* 300 series */ +#ifdef SIS300 /* 300 series */ tempeax = SiS_Pr->SiS_VGAVDE << 6; temp = (USHORT)(tempeax % (ULONG)SiS_Pr->SiS_VDE); @@ -1356,17 +1392,23 @@ tempebx = tempeax; /* BPLVCFACT */ if(SiS_Pr->SiS_SetFlag & EnableLVDSDDA) { - tempebx = 0x003F; + tempebx = 0x003F; } temp = (USHORT)(tempebx & 0x00FF); SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1E,temp); /* Part1_1Eh; TW: Panel Link Vertical Scaling Factor */ +#endif /* SIS300 */ + } else { - /* 310/325 series */ +#ifdef SIS315H /* 310/325 series */ +#ifdef NEWCH701x + SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x1E,0x03); +#else SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1E,0x23); +#endif tempeax = SiS_Pr->SiS_VGAVDE << 18; temp = (USHORT)(tempeax % (ULONG)SiS_Pr->SiS_VDE); @@ -1382,19 +1424,21 @@ if(SiS_Pr->SiS_VDE == SiS_Pr->SiS_VGAVDE) temp |= 0x04; SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x35,temp); /* Part1_35h; TW: Panel Link Vertical Scaling Factor */ +#endif /* SIS315H */ + } - tempbx = push2; /* p bx temppush1 BPLVDEE */ + tempbx = push2; /* BPLVDEE */ tempcx = push1; - push1 = temp; /* TW: For 630/301B and 630/LVDS */ + push1 = temp; if(!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) { if(!SiS_Pr->SiS_IF_DEF_DSTN){ if(HwDeviceExtension->jChipType < SIS_315H) { if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x600) { if(resinfo == 15) tempcx++; - if(SiS_Pr->SiS_LCDInfo & LCDNonExpanding) { + if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) { if(resinfo == 7) tempcx++; } } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel800x600) { @@ -1445,10 +1489,9 @@ } tempecx = tempeax; - if (HwDeviceExtension->jChipType >= SIS_315H) { + if(HwDeviceExtension->jChipType >= SIS_315H) { tempeax = SiS_Pr->SiS_VGAHDE; - if(modeflag & HalfDCLK) - tempeax >>= 1; + if(modeflag & HalfDCLK) tempeax >>= 1; tempeax <<= 16; tempeax = (tempeax / tempecx) - 1; } else { @@ -1460,7 +1503,7 @@ SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1F,temp); /* Part1_1Fh; TW: Panel Link DDA Operational Number in each horiz. line */ tempbx = SiS_Pr->SiS_VDE; - if (HwDeviceExtension->jChipType >= SIS_315H) { + if(HwDeviceExtension->jChipType >= SIS_315H) { tempeax = (SiS_Pr->SiS_VGAVDE << 18) / tempvcfact; tempbx = (USHORT)(tempeax & 0x0FFFF); } else { @@ -1493,8 +1536,9 @@ /* 630/301B and 630/LVDS do something for 640x480 panels here */ +#ifdef SIS315H /* TW: DSTN/FSTN initialisation - hardcoded for 320x480 panel */ - if(SiS_Pr->SiS_IF_DEF_DSTN){ + if(SiS_Pr->SiS_IF_DEF_DSTN) { SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1E,0x01); SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x25,0x00); SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x26,0x00); @@ -1569,6 +1613,7 @@ SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1e,0x7d); SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x2e,0xe0); } +#endif /* SIS315H */ return; @@ -1583,8 +1628,8 @@ #endif -/* TW: For LVDS / 302b/lv - LCDA (this must only be called on 310/325 series!) */ -/* TW: Double-checked against 650/LVDS and 650/301 BIOS */ +#ifdef SIS315H +/* TW: For LVDS / 302B/30xLV - LCDA (this must only be called on 310/325 series!) */ void SiS_SetGroup1_LCDA(SiS_Private *SiS_Pr, USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT RefreshRateTableIndex) @@ -1593,17 +1638,27 @@ USHORT push1,push2,tempax,tempbx,tempcx,temp; ULONG tempeax=0,tempebx,tempecx,tempvcfact; - if(SiS_Pr->SiS_IF_DEF_LVDS == 1) /* TW: From 650/LVDS BIOS */ - SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x13,0xfb,0x04); /* TW: From 650/LVDS BIOS */ - - if(SiS_Pr->SiS_IF_DEF_LVDS == 1) /* TW: From 650/LVDS 1.10.07 */ - SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2D,0x00); /* TW: From 650/LVDS 1.10.07 */ - else - SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x2D,0x0f); /* TW: From 650/301Lvx 1.10.6s */ - - if(ModeNo<=0x13) { - modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag; - resinfo = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ResInfo; + if(IS_SIS330) { + SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2D,0x10); /* Xabre 1.01.03 */ + } else if(IS_SIS740) { + if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { /* 740/LVDS */ + SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x13,0xfb,0x04); /* 740/LVDS */ + SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2D,0x03); + } else { + SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2D,0x10); /* 740/301LV 1.10.1i */ + } + } else { + if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { /* 650/LVDS */ + SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x13,0xfb,0x04); /* 650/LVDS */ + SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2D,0x00); /* 650/LVDS 1.10.07 */ + } else { + SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x2D,0x0f); /* 650/30xLv 1.10.6s */ + } + } + + if(ModeNo <= 0x13) { + modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag; + resinfo = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ResInfo; } else { modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag; resinfo = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO; @@ -1613,12 +1668,11 @@ tempbx = SiS_Pr->SiS_HDE; tempcx = SiS_Pr->SiS_HT; - if(SiS_Pr->SiS_LCDInfo & LCDNonExpanding) { + if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) { if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) tempbx = 1024; else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) tempbx = 1400; else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200) tempbx = 1600; else tempbx = 1280; - } tempcx -= tempbx; /* HT-HDE */ push1 = tempax; @@ -1630,14 +1684,16 @@ tempcx >>= 2; - /* TW: Inserted from 650/301LVx 1.10.6s */ - if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) { - if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel640x480) { - if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel800x600) tempcx = 0x28; - else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) tempcx = 0x30; - else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) tempcx = 0x18; - else tempcx = 0x30; - } + /* TW: 650/30xLV 1.10.6s, 740/LVDS */ + if( ((SiS_Pr->SiS_IF_DEF_LVDS == 0) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) || + ((SiS_Pr->SiS_IF_DEF_LVDS == 1) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD)) ) { + if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel640x480) { + if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel800x600) tempcx = 0x28; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) tempcx = 0x18; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) tempcx = 0x30; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200) tempcx = 0x40; + else tempcx = 0x30; + } } tempcx += tempax; /* lcdhrs */ @@ -1649,6 +1705,22 @@ SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x14,temp); /* Part1_14h */ temp += 10; + if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { + if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { + if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel640x480) { + temp += 6; + if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel800x600) { + temp++; + if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1024x768) { + temp += 7; + if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1600x1200) { + temp -= 10; + } + } + } + } + } + } temp &= 0x1F; temp |= ((tempcx & 0x07) << 5); SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x15,temp); /* Part1_15h */ @@ -1663,7 +1735,9 @@ temp = tempcx & 0x00FF; SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x16,temp); /* Part1_16h */ - if(tempbx & 0x07) tempbx += 8; + if(SiS_Pr->SiS_IF_DEF_LVDS == 0) { + if(tempbx & 0x07) tempbx += 8; + } tempbx >>= 3; /* BPLHDEE */ temp = tempbx & 0x00FF; SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x17,temp); /* Part1_17h */ @@ -1672,57 +1746,67 @@ tempbx = SiS_Pr->SiS_VGAVDE; tempcx -= tempbx; /* GAVT-VGAVDE */ tempbx = SiS_Pr->SiS_LCDVDES; /* VGAVDES */ - push1 = tempbx; /* push bx temppush1 */ - if(SiS_Pr->SiS_IF_DEF_TRUMPION == 0){ + push1 = tempbx; + if(SiS_Pr->SiS_IF_DEF_TRUMPION == 0) { if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) tempax = 768; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x768) tempax = 768; else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) tempax = 1024; else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) tempax = 1050; else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200) tempax = 1200; else tempax = 960; -#if 0 /* TW: Removed (650/LVDS BIOS) */ - if(SiS_Pr->SiS_IF_DEF_CH70xx == 1) { - if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { - tempax = SiS_Pr->SiS_VGAVDE; - } - } -#endif } else tempax = SiS_Pr->SiS_VGAVDE; /* Trumpion */ tempbx += tempax; tempax = SiS_Pr->SiS_VT; /* VT */ if(tempbx >= tempax) tempbx -= tempax; - push2 = tempbx; /* push bx temppush2 */ - tempcx >>= 2; /* TO CHECK - was 1 */ - - /* TW: Inserted from 650/301LVx 1.10.6s */ - if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) { - if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel640x480) { - if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel800x600) tempcx = 1; - else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) tempcx = 3; - else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x768) tempcx = 3; - else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) tempcx = 1; - else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) tempcx = 1; - else tempcx = 0x0057; - } + push2 = tempbx; + + tempcx >>= 2; + + /* TW: 650/30xLV 1.10.6s, 740/LVDS */ + if( ((SiS_Pr->SiS_IF_DEF_LVDS == 0) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) || + ((SiS_Pr->SiS_IF_DEF_LVDS == 1) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD)) ) { + if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel640x480) { + if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel800x600) tempcx = 1; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) tempcx = 3; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x768) tempcx = 3; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) tempcx = 1; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) tempcx = 1; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200) tempcx = 1; + else tempcx = 0x0057; + } } tempbx += tempcx; - tempbx++; /* BPLVRS */ + if(SiS_Pr->SiS_IF_DEF_LVDS == 0) { + tempbx++; /* BPLVRS */ + } if(tempbx >= tempax) tempbx -= tempax; temp = tempbx & 0x00FF; - SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x18,temp); /* Part1_18h */ + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x18,temp); /* Part1_18h */ tempcx >>= 3; + if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { + if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { + if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel640x480) { + if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel800x600) tempcx = 3; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) tempcx = 5; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x768) tempcx = 5; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) tempcx = 5; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) tempcx = 2; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200) tempcx = 2; + } + } + } tempcx += tempbx; tempcx++; /* BPLVRE */ temp = tempcx & 0x00FF; temp &= 0x0F; if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { - /* TW: Inserted from 650/LVDS BIOS */ - SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x19,0xf0,temp); + SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x19,0xF0,temp); } else { - /* TW: Inserted from 650/301LVx 1.10.6s */ + /* TW: 650/30xLV 1.10.6s, Xabre */ temp |= 0xC0; SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x19,0xF0,temp); /* Part1_19h */ } @@ -1734,31 +1818,34 @@ if(tempbx != SiS_Pr->SiS_VDE) temp |= 0x40; if(SiS_Pr->SiS_SetFlag & EnableLVDSDDA) temp |= 0x40; if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { - /* TW: Inserted from 650/LVDS 1.10.07 */ - if(SiS_Pr->SiS_LCDInfo & LCDRGB18Bit) temp |= 0x80; - SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x1A,0x87,temp); /* Part1_1Ah */ + if(SiS_Pr->SiS_LCDInfo & LCDRGB18Bit) { + if(SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x00) & 0x01) temp |= 0x80; + } } else { - /* TW: Inserted from 650/301LVx 1.10.6s */ - if(SiS_Pr->SiS_LCDInfo & LCDRGB18Bit) { - if(SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x00) & 0x01) temp |= 0x80; - } - SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x1A,0x87,temp); /* Part1_1Ah */ + if(IS_SIS650) { + /* TW: 650/30xLV 1.10.6s */ + if(SiS_Pr->SiS_LCDInfo & LCDRGB18Bit) { + if(SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x00) & 0x01) temp |= 0x80; + } + } else { + if(SiS_Pr->SiS_LCDInfo & LCDRGB18Bit) temp |= 0x80; + } } + SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x1A,0x87,temp); /* Part1_1Ah */ - tempbx = push2; /* p bx temppush2 BPLVDEE */ - tempcx = push1; /* pop cx temppush1 NPLVDES */ + tempbx = push2; /* BPLVDEE */ + tempcx = push1; /* NPLVDES */ push1 = (USHORT)(tempeax & 0xFFFF); if(!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) { if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel800x600) { if(resinfo == 7) tempcx++; } - /* TW: Inserted from 650/301LVx+LVDS BIOSes */ - if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel640x480) { - tempbx = SiS_Pr->SiS_VGAVDE; - tempcx = tempbx; - tempbx--; - } + } + if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel640x480) { + tempbx = SiS_Pr->SiS_VGAVDE; + tempcx = tempbx; + tempbx--; } temp = (tempbx & 0xFF00) >> 8; @@ -1780,7 +1867,7 @@ tempeax <<= 18; temp = (USHORT)(tempeax % tempebx); tempeax = tempeax / tempebx; - if(temp != 0) tempeax++; + if(temp) tempeax++; tempebx = tempeax; /* BPLVCFACT */ tempvcfact = tempeax; temp = (USHORT)(tempebx & 0x00FF); @@ -1794,6 +1881,7 @@ SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x35,temp); tempecx = SiS_Pr->SiS_VGAHDE; + if(modeflag & HalfDCLK) tempecx >>= 1; tempebx = SiS_Pr->SiS_HDE; tempeax = tempecx; tempeax <<= 16; @@ -1803,6 +1891,7 @@ if(tempebx == tempecx) tempeax = 0xFFFF; tempecx = tempeax; tempeax = SiS_Pr->SiS_VGAHDE; + if(modeflag & HalfDCLK) tempeax >>= 1; tempeax <<= 16; tempeax = tempeax / tempecx; tempecx <<= 16; @@ -1836,21 +1925,21 @@ SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x23,temp); #if 0 - /* TW: Missing code (calles int 2f) (650/301LVx 1.10.6s) */ + /* TW: Missing code (calles int 2f) (650/302LV 1.10.6s; 1.10.7w doesn't do this) */ if(xxx()) { SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x0e,0xda); } #endif - /* TW: Only for 650/LVDS and 30xLV/30xLVX */ - if((SiS_Pr->SiS_IF_DEF_LVDS == 1) || (SiS_Pr->SiS_VBInfo & (VB_SIS30xLV|VB_SIS30xNEW))){ + /* TW: Only for LVDS and 301LV/302LV */ + if((SiS_Pr->SiS_IF_DEF_LVDS == 1) || (SiS_Pr->SiS_VBInfo & VB_SIS301LV302LV)){ SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1e,0x20); } return; } +#endif /* SIS 315 */ -/* TW: Double-checked against 650/LVDS (1.10.07) and 650/301 BIOS */ void SiS_SetCRT2Offset(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo, USHORT ModeIdIndex ,USHORT RefreshRateTableIndex, PSIS_HW_DEVICE_INFO HwDeviceExtension) @@ -1862,6 +1951,10 @@ offset = SiS_GetOffset(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex, HwDeviceExtension); +#if 0 + if(SiS_Pr->LCDResInfo == 13) offset >>= 1; + if(SiS_Pr->LCDResInfo == 12) offset >>= 1; +#endif temp = (UCHAR)(offset & 0xFF); SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x07,temp); temp = (UCHAR)((offset & 0xFF00) >> 8); @@ -1870,54 +1963,41 @@ SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x03,temp); } -/* TW: Checked with 650/LVDS and 650/301 BIOS */ USHORT SiS_GetOffset(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex, USHORT RefreshRateTableIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension) { USHORT temp,colordepth; USHORT modeinfo,index,infoflag; -#if 0 - USHORT mode960low, mode960high; - USHORT ColorDepth[] = { 0x01, 0x02, 0x04 }; -#endif - modeinfo = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeInfo; - infoflag = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag; - if (HwDeviceExtension->jChipType < SIS_315H ) { - index = (modeinfo >> 4) & 0xFF; -#if 0 /* TW: Modes 1280x960 changed number, so this is redundant */ - mode960low = 0x7c; - mode960high = 0x7e; -#endif + if(SiS_Pr->UseCustomMode) { + infoflag = SiS_Pr->CInfoFlag; + temp = SiS_Pr->CHDisplay / 16; } else { + infoflag = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag; + modeinfo = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeInfo; + + if(HwDeviceExtension->jChipType < SIS_315H ) { + index = (modeinfo >> 4) & 0xFF; + } else { index = (modeinfo >> 8) & 0xFF; -#if 0 /* TW: In 650 BIOS (LVDS AND 301), 1280x960 modes are 7b-7d! */ - mode960low = 0x7c; /* TW: This is a bug in both BIOS versions ! */ - mode960high = 0x7e; /* TW: Corrected here in LVDS BIOS 1.10.07, but not in tables! */ -#endif - } + } -#if 0 - /* TW: Not doing this strange stuff makes 1280x960 at least work on CRT1 */ - if((ModeNo >= mode960low) && (ModeNo <= mode960high)) { - temp = ModeNo - mode960low; - colordepth = ColorDepth[temp]; - temp = 0x6b; /* TW: Why the heck? */ - } else { -#endif - temp = SiS_Pr->SiS_ScreenOffset[index]; - colordepth = SiS_GetColorDepth(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex); -#if 0 + temp = SiS_Pr->SiS_ScreenOffset[index]; } -#endif + + colordepth = SiS_GetColorDepth(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex); if(infoflag & InterlaceMode) temp <<= 1; temp *= colordepth; - /* TW: For 1400x1050 */ - if((ModeNo >= 0x26) && (ModeNo <= 0x28)) { + /* TW: For 1400x1050 and 856x480 */ + if( ( ((ModeNo >= 0x26) && (ModeNo <= 0x28)) || + ModeNo == 0x3f || + ModeNo == 0x42 || + ModeNo == 0x45 ) || + (SiS_Pr->UseCustomMode && (SiS_Pr->CHDisplay % 16)) ) { colordepth >>= 1; temp += colordepth; } @@ -1925,7 +2005,6 @@ return(temp); } -/* TW: Checked with 650/LVDS BIOS */ USHORT SiS_GetColorDepth(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex) { @@ -1933,17 +2012,20 @@ SHORT index; USHORT modeflag; - if(ModeNo <= 0x13) + if(SiS_Pr->UseCustomMode) { + modeflag = SiS_Pr->CModeFlag; + } else { + if(ModeNo <= 0x13) modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag; - else + else modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag; + } index = (modeflag & ModeInfoFlag) - ModeEGA; if(index < 0) index = 0; return(ColorDepth[index]); } -/* TW: Checked against 630/301/301B/LVDS, 650/301LVx/LVDS */ void SiS_SetCRT2Sync(SiS_Private *SiS_Pr, USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo, USHORT RefreshRateTableIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension) @@ -1957,33 +2039,33 @@ if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { /* LVDS */ - if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { - tempah = SiS_Pr->SiS_LCDInfo; - if(HwDeviceExtension->jChipType >= SIS_315H) { - tempbl = tempah & 0xc0; - } - if(SiS_Pr->SiS_LCDInfo & LCDSync) { - flag = 1; - } - } - if(flag != 1) tempah = infoflag >> 8; + if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { + tempah = 0; + } else if((SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) && (SiS_Pr->SiS_LCDInfo & LCDSync)) { + tempah = SiS_Pr->SiS_LCDInfo; + } else tempah = infoflag >> 8; + tempah &= 0xC0; + tempah |= 0x20; if(!(SiS_Pr->SiS_LCDInfo & LCDRGB18Bit)) tempah |= 0x10; - if (SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel640x480) { - /* TW: BIOS does something here @@@ */ + if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { + if(HwDeviceExtension->jChipType >= SIS_315H) { + tempah >>= 3; + SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x13,0xE7,tempah); + } + } else { + SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x19,0x0F,tempah); } - tempah &= 0x3f; - tempah |= tempbl; - SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x19,0x0F,tempah); - } else { if(HwDeviceExtension->jChipType < SIS_315H) { - if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { /* 630 - 301B */ +#ifdef SIS300 /* ---- 300 series --- */ + + if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { /* 630 - 301B(-DH) */ if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { tempah = SiS_Pr->SiS_LCDInfo; @@ -1993,8 +2075,8 @@ } if(flag != 1) tempah = infoflag >> 8; tempah &= 0xC0; + tempah |= 0x20; - if(!(SiS_Pr->SiS_LCDInfo & LCDRGB18Bit)) tempah |= 0x10; if (SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel640x480) { @@ -2009,7 +2091,7 @@ if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { tempah = SiS_Pr->SiS_LCDInfo; - if(SiS_Pr->SiS_LCDInfo & LCDNonExpandingShift) { /* ! */ + if(SiS_Pr->SiS_LCDInfo & DontExpandLCDShift) { /* ! */ flag = 1; } } @@ -2020,9 +2102,13 @@ } +#endif /* SIS300 */ + } else { - if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { /* 310/325 - 301B et al */ +#ifdef SIS315H /* ----- 310/325 series ---- */ + + if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) { /* 310/325 - 30xLV */ tempah = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x37); tempah &= 0xC0; @@ -2030,38 +2116,47 @@ if(!(SiS_Pr->SiS_LCDInfo & LCDRGB18Bit)) tempah |= 0x10; SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x19,0x0F,tempah); - } else { /* 310/325 - 301 */ + } else { /* 310/325 - 301, 301B */ tempah = infoflag >> 8; tempah &= 0xC0; + if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { + if(SiS_Pr->SiS_LCDInfo & LCDSync) { + tempah = SiS_Pr->SiS_LCDInfo; + tempah &= 0xC0; + } + } + tempah |= 0x20; - if(!(SiS_Pr->SiS_LCDInfo & LCDRGB18Bit)) tempah |= 0x10; - - if (SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel640x480) { +#if 0 + if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel640x480) { /* TW: BIOS does something here @@@ */ } - - tempah &= 0x3f; - tempah |= tempbl; +#endif SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x19,0x0F,tempah); - } + } + +#endif /* SIS315H */ } } } -/* TW: Set FIFO on 630/730 - not to be called on SiS300 */ -/* TW: Checked against 630/301B BIOS; does not set PCI registers */ +/* TW: Set CRT2 FIFO on 300/630/730 */ +#ifdef SIS300 void SiS_SetCRT2FIFO_300(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo, PSIS_HW_DEVICE_INFO HwDeviceExtension) { USHORT temp,index; USHORT modeidindex,refreshratetableindex; - USHORT VCLK,MCLK,colorth=0,data2; + USHORT VCLK=0,MCLK,colorth=0,data2=0; + USHORT tempal, tempah, tempbx, tempcl, tempax; + USHORT CRT1ModeNo,CRT2ModeNo; + USHORT SelectRate_backup; ULONG data,eax; - UCHAR LatencyFactor[] = { + const UCHAR LatencyFactor[] = { 97, 88, 86, 79, 77, 00, /*; 64 bit BQ=2 */ 00, 87, 85, 78, 76, 54, /*; 64 bit BQ=1 */ 97, 88, 86, 79, 77, 00, /*; 128 bit BQ=2 */ @@ -2069,81 +2164,247 @@ 80, 72, 69, 63, 61, 00, /*; 64 bit BQ=2 */ 00, 70, 68, 61, 59, 37, /*; 64 bit BQ=1 */ 86, 77, 75, 68, 66, 00, /*; 128 bit BQ=2 */ - 00, 68, 66, 59, 57, 37}; /*; 128 bit BQ=1 */ + 00, 68, 66, 59, 57, 37 /*; 128 bit BQ=1 */ + }; + const UCHAR LatencyFactor730[] = { + 69, 63, 61, + 86, 79, 77, + 103, 96, 94, + 120,113,111, + 137,130,128, /* <-- last entry, data below */ + 137,130,128, /* to avoid using illegal values */ + 137,130,128, + 137,130,128, + 137,130,128, + 137,130,128, + 137,130,128, + 137,130,128, + 137,130,128, + 137,130,128, + 137,130,128, + 137,130,128, + }; + const UCHAR ThLowB[] = { + 81, 4, 72, 6, 88, 8,120,12, + 55, 4, 54, 6, 66, 8, 90,12, + 42, 4, 45, 6, 55, 8, 75,12 + }; + const UCHAR ThTiming[] = { + 1, 2, 2, 3, 0, 1, 1, 2 + }; + + SelectRate_backup = SiS_Pr->SiS_SelectCRT2Rate; - SiS_SearchModeID(SiS_Pr,ROMAddr,&ModeNo,&modeidindex); - SiS_Pr->SiS_SetFlag &= (~ProgrammingCRT2); - SiS_Pr->SiS_SelectCRT2Rate = 0; - refreshratetableindex = SiS_GetRatePtrCRT2(SiS_Pr,ROMAddr,ModeNo,modeidindex,HwDeviceExtension); - - if(ModeNo >= 0x13) { - index = SiS_Pr->SiS_RefIndex[refreshratetableindex].Ext_CRTVCLK; - index &= 0x3F; - VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK; - index = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x1A); + if(!SiS_Pr->CRT1UsesCustomMode) { + + CRT1ModeNo = SiS_Pr->SiS_CRT1Mode; /* get CRT1 ModeNo */ + SiS_SearchModeID(SiS_Pr,ROMAddr,&CRT1ModeNo,&modeidindex); + SiS_Pr->SiS_SetFlag &= (~ProgrammingCRT2); + SiS_Pr->SiS_SelectCRT2Rate = 0; + refreshratetableindex = SiS_GetRatePtrCRT2(SiS_Pr,ROMAddr,CRT1ModeNo, + modeidindex,HwDeviceExtension); + + if(CRT1ModeNo >= 0x13) { + index = SiS_Pr->SiS_RefIndex[refreshratetableindex].Ext_CRTVCLK; + index &= 0x3F; + VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK; /* Get VCLK */ + data2 = SiS_Pr->SiS_ModeType - 2; + } + + } else { + + CRT1ModeNo = 0xfe; + VCLK = SiS_Pr->CSRClock; /* Get VCLK */ + data2 = (SiS_Pr->CModeFlag & ModeInfoFlag) - 2; + + } + + if(CRT1ModeNo >= 0x13) { + if(HwDeviceExtension->jChipType == SIS_300) { + index = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x3A); + } else { + index = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x1A); + } index &= 0x07; - MCLK = SiS_Pr->SiS_MCLKData_0[index].CLOCK; - data2 = SiS_Pr->SiS_ModeType - 0x02; - switch (data2) { + MCLK = SiS_Pr->SiS_MCLKData_0[index].CLOCK; /* Get MCLK */ + +#ifdef TWDEBUG + xf86DrvMsg(0, X_INFO, "FIFO2: CRT1Mode 0x%x VCLK %d MCLK %d modetype-2 = %d\n", + CRT1ModeNo, VCLK, MCLK, data2); +#endif + + switch(data2) { /* Get color depth */ case 0 : colorth = 1; break; case 1 : colorth = 1; break; case 2 : colorth = 2; break; case 3 : colorth = 2; break; case 4 : colorth = 3; break; case 5 : colorth = 4; break; + default: colorth = 2; break; } data2 = (colorth * VCLK) / MCLK; temp = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x14); - temp = ((temp&0x00FF)>>6)<<1; - if(temp == 0) temp=1; + temp = ((temp & 0x00FF) >> 6) << 1; + if(temp == 0) temp = 1; temp <<= 2; + temp &= 0xff; data2 = temp - data2; + +#ifdef TWDEBUG + xf86DrvMsg(0, X_INFO, "FIFO2: data2 (step1) = %d\n", + data2); +#endif - if((28*16) % data2) { + if((28 * 16) % data2) { data2 = (28 * 16) / data2; data2++; } else { data2 = (28 * 16) / data2; } + +#ifdef TWDEBUG + xf86DrvMsg(0, X_INFO, "FIFO2: data2 (step2) = %d\n", + data2); +#endif - index = 0; - temp = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x14); - if(temp & 0x0080) index += 12; + if(HwDeviceExtension->jChipType == SIS_300) { + tempah = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x18); + tempah &= 0x62; + tempah >>= 1; + tempal = tempah; + tempah >>= 3; + tempal |= tempah; + tempal &= 0x07; + tempcl = ThTiming[tempal]; + tempbx = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x16); + tempbx >>= 6; + tempah = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x14); + tempah >>= 4; + tempah &= 0x0c; + tempbx |= tempah; + tempbx <<= 1; + tempal = ThLowB[tempbx + 1]; + tempal *= tempcl; + tempal += ThLowB[tempbx]; + data = tempal; + + } else if(HwDeviceExtension->jChipType == SIS_730) { + #ifndef LINUX_XF86 - SiS_SetReg4(0xcf8,0x800000A0); - eax=SiS_GetReg3(0xcfc); + SiS_SetReg4(0xcf8,0x80000050); + eax = SiS_GetReg3(0xcfc); #else - /* TW: We use pci functions X offers. We use tag 0, because - * we want to read/write to the host bridge (which is always - * 00:00.0 on 630, 730 and 540), not the VGA device. - */ - eax = pciReadLong(0x00000000, 0xA0); + eax = pciReadLong(0x00000000, 0x50); #endif - temp=(USHORT)(eax>>24); - if(!(temp&0x01)) index += 24; + tempal = (USHORT)(eax >> 8); + tempal &= 0x06; + tempal <<= 5; #ifndef LINUX_XF86 - SiS_SetReg4(0xcf8,0x80000050); - eax=SiS_GetReg3(0xcfc); + SiS_SetReg4(0xcf8,0x800000A0); + eax = SiS_GetReg3(0xcfc); #else - eax = pciReadLong(0x00000000, 0x50); + eax = pciReadLong(0x00000000, 0xA0); #endif - temp=(USHORT)(eax >> 24); - if(temp & 0x01) index += 6; + temp = (USHORT)(eax >> 28); + temp &= 0x0F; + tempal |= temp; - temp = (temp & 0x0F) >> 1; - index += temp; - data = LatencyFactor[index]; - data += 15; - temp = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x14); - if(!(temp & 0x80)) data += 5; +#ifdef TWDEBUG + xf86DrvMsg(0, X_INFO, "FIFO2: Latencyfactorindex = 0x%x\n", tempal); +#endif + + tempbx = tempal; /* BIOS BUG (2.04.5d, 2.04.6a use ah here, which is unset!) */ + tempbx = 0; /* -- do it like the BIOS anyway... */ + tempax = tempbx; + tempbx &= 0xc0; + tempbx >>= 6; + tempax &= 0x0f; + tempax *= 3; + tempbx += tempax; + + data = LatencyFactor730[tempbx]; + data += 15; + temp = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x14); + if(!(temp & 0x80)) data += 5; + + } else { + + index = 0; + temp = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x14); + if(temp & 0x0080) index += 12; + +#ifndef LINUX_XF86 + SiS_SetReg4(0xcf8,0x800000A0); + eax = SiS_GetReg3(0xcfc); +#else + /* TW: We use pci functions X offers. We use tag 0, because + * we want to read/write to the host bridge (which is always + * 00:00.0 on 630, 730 and 540), not the VGA device. + */ + eax = pciReadLong(0x00000000, 0xA0); +#endif + temp = (USHORT)(eax >> 24); + if(!(temp&0x01)) index += 24; + +#ifndef LINUX_XF86 + SiS_SetReg4(0xcf8,0x80000050); + eax = SiS_GetReg3(0xcfc); +#else + eax = pciReadLong(0x00000000, 0x50); +#endif + temp=(USHORT)(eax >> 24); + if(temp & 0x01) index += 6; + + temp = (temp & 0x0F) >> 1; + index += temp; + + data = LatencyFactor[index]; + data += 15; + temp = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x14); + if(!(temp & 0x80)) data += 5; + } + +#ifdef TWDEBUG + xf86DrvMsg(0, X_INFO, "FIFO2: latencyfactor (CRT1) = %d\n", data); +#endif - data += data2; + data += data2; /* CRT1 Request Period */ + +#ifdef TWDEBUG + xf86DrvMsg(0, X_INFO, "FIFO2: CRT1 request period = %d\n", data); +#endif + CRT2ModeNo = ModeNo; SiS_Pr->SiS_SetFlag |= ProgrammingCRT2; + SiS_Pr->SiS_SelectCRT2Rate = SelectRate_backup; + SiS_SearchModeID(SiS_Pr,ROMAddr,&CRT2ModeNo,&modeidindex); + + refreshratetableindex = SiS_GetRatePtrCRT2(SiS_Pr,ROMAddr,CRT2ModeNo, + modeidindex,HwDeviceExtension); + + index = SiS_GetVCLK2Ptr(SiS_Pr,ROMAddr,CRT2ModeNo,modeidindex, + refreshratetableindex,HwDeviceExtension); + VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK; /* Get VCLK */ + + data2 = SiS_Pr->SiS_ModeType - 2; + switch(data2) { /* Get color depth */ + case 0 : colorth = 1; break; + case 1 : colorth = 1; break; + case 2 : colorth = 2; break; + case 3 : colorth = 2; break; + case 4 : colorth = 3; break; + case 5 : colorth = 4; break; + default: colorth = 2; break; + } + +#ifdef TWDEBUG + xf86DrvMsg(0, X_INFO, "FIFO2: CRT2Mode 0x%x VCLK %d MCLK %d modetype-2 = %d, colorth %d\n", + CRT2ModeNo, VCLK, MCLK, data2, colorth); +#endif data = data * VCLK * colorth; if(data % (MCLK << 4)) { @@ -2152,32 +2413,50 @@ } else { data = data / (MCLK << 4); } + +#ifdef TWDEBUG + xf86DrvMsg(0, X_INFO, "FIFO2: data (unclipped) = 0x%x\n", data); +#endif + + if(data <= 6) data = 6; + if(data > 0x14) data = 0x14; - /* TW: Inserted this entire section */ temp = SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x01); - if( ( (HwDeviceExtension->jChipType == SIS_630) || - (HwDeviceExtension->jChipType == SIS_730) ) && - (HwDeviceExtension->jChipRevision >= 0x30) ) /* 630s or 730(s?) */ - { - temp = (temp & (~0x1F)) | 0x1b; + if(HwDeviceExtension->jChipType == SIS_300) { + if(data <= 0x0f) temp = (temp & (~0x1F)) | 0x13; + else temp = (temp & (~0x1F)) | 0x16; + if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) { + temp = (temp & (~0x1F)) | 0x13; + } } else { - temp = (temp & (~0x1F)) | 0x16; + if( ( (HwDeviceExtension->jChipType == SIS_630) || + (HwDeviceExtension->jChipType == SIS_730) ) && + (HwDeviceExtension->jChipRevision >= 0x30) ) /* 630s or 730(s?) */ + { + temp = (temp & (~0x1F)) | 0x1b; + } else { + temp = (temp & (~0x1F)) | 0x16; + } } SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x01,0xe0,temp); - if(data <= 6) data = 6; - if(data > 0x14) data = 0x14; if( (HwDeviceExtension->jChipType == SIS_630) && (HwDeviceExtension->jChipRevision >= 0x30) ) /* 630s, NOT 730 */ { if(data > 0x13) data = 0x13; } - SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x02,~0x01F,data); - /* TW end */ + SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x02,0xe0,data); + + } else { /* If mode <= 0x13, we just restore everything */ + + SiS_Pr->SiS_SetFlag |= ProgrammingCRT2; + SiS_Pr->SiS_SelectCRT2Rate = SelectRate_backup; + } } +#endif -/* TW: Set FIFO on 310 series */ +/* TW: Set FIFO on 310/325/330 series */ #ifdef SIS315H void SiS_SetCRT2FIFO_310(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo, @@ -2195,31 +2474,50 @@ USHORT ModeIdIndex; USHORT RefreshRateTableIndex; USHORT SelectRate_backup; - + + SelectRate_backup = SiS_Pr->SiS_SelectCRT2Rate; + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x01,0x3B); - CRT1ModeNo = SiS_Pr->SiS_CRT1Mode; /* get CRT1 ModeNo */ - SiS_SearchModeID(SiS_Pr,ROMAddr,&CRT1ModeNo,&ModeIdIndex); + if(!SiS_Pr->CRT1UsesCustomMode) { + + CRT1ModeNo = SiS_Pr->SiS_CRT1Mode; /* get CRT1 ModeNo */ + SiS_SearchModeID(SiS_Pr,ROMAddr,&CRT1ModeNo,&ModeIdIndex); - SiS_Pr->SiS_SetFlag &= (~ProgrammingCRT2); - SelectRate_backup = SiS_Pr->SiS_SelectCRT2Rate; - SiS_Pr->SiS_SelectCRT2Rate = 0; + SiS_Pr->SiS_SetFlag &= (~ProgrammingCRT2); + SiS_Pr->SiS_SelectCRT2Rate = 0; - /* Set REFIndex for crt1 refreshrate */ - RefreshRateTableIndex = SiS_GetRatePtrCRT2(SiS_Pr,ROMAddr,CRT1ModeNo, + /* Get REFIndex for crt1 refreshrate */ + RefreshRateTableIndex = SiS_GetRatePtrCRT2(SiS_Pr,ROMAddr,CRT1ModeNo, ModeIdIndex,HwDeviceExtension); - index = SiS_GetVCLK2Ptr(SiS_Pr,ROMAddr,CRT1ModeNo,ModeIdIndex, + index = SiS_GetVCLK2Ptr(SiS_Pr,ROMAddr,CRT1ModeNo,ModeIdIndex, RefreshRateTableIndex,HwDeviceExtension); - tempax = SiS_Pr->SiS_VCLKData[index].CLOCK; /* Get DCLK (VCLK?) */ - - tempbx = SiS_GetColorDepth(SiS_Pr,ROMAddr,CRT1ModeNo,ModeIdIndex); /* Get colordepth */ - tempbx >>= 1; - if(!tempbx) tempbx++; - + tempax = SiS_Pr->SiS_VCLKData[index].CLOCK; /* Get VCLK */ + + tempbx = SiS_GetColorDepth(SiS_Pr,ROMAddr,CRT1ModeNo,ModeIdIndex); /* Get colordepth */ + tempbx >>= 1; + if(!tempbx) tempbx++; + + } else { + + tempax = SiS_Pr->CSRClock; /* Get VCLK */ + tempbx = (SiS_Pr->CModeFlag & ModeInfoFlag) - 2; + switch(tempbx) { /* Get color depth */ + case 0 : tempbx = 1; break; + case 1 : tempbx = 1; break; + case 2 : tempbx = 2; break; + case 3 : tempbx = 2; break; + case 4 : tempbx = 3; break; + case 5 : tempbx = 4; break; + default: tempbx = 2; break; + } + + } + tempax *= tempbx; - tempbx = SiS_GetMCLK(SiS_Pr,ROMAddr, HwDeviceExtension); /* Get MCLK */ + tempbx = SiS_GetMCLK(SiS_Pr,ROMAddr, HwDeviceExtension); /* Get MCLK */ tempax /= tempbx; @@ -2258,20 +2556,24 @@ tempcx += temp3; /* CRT1 Request Period */ - CRT2ModeNo = ModeNo; /* get CRT2 ModeNo */ - SiS_SearchModeID(SiS_Pr,ROMAddr,&CRT2ModeNo,&ModeIdIndex); /* Get ModeID Table */ + CRT2ModeNo = ModeNo; /* get CRT2 ModeNo */ + SiS_SearchModeID(SiS_Pr,ROMAddr,&CRT2ModeNo,&ModeIdIndex); /* Get ModeID Table */ SiS_Pr->SiS_SetFlag |= ProgrammingCRT2; SiS_Pr->SiS_SelectCRT2Rate = SelectRate_backup; - RefreshRateTableIndex=SiS_GetRatePtrCRT2(SiS_Pr,ROMAddr,CRT1ModeNo, + RefreshRateTableIndex = SiS_GetRatePtrCRT2(SiS_Pr,ROMAddr,CRT2ModeNo, ModeIdIndex,HwDeviceExtension); index = SiS_GetVCLK2Ptr(SiS_Pr,ROMAddr,CRT2ModeNo,ModeIdIndex, RefreshRateTableIndex,HwDeviceExtension); - tempax = SiS_Pr->SiS_VCLKData[index].CLOCK; /* Get VCLK */ + if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) { + tempax = SiS_Pr->SiS_VCLKData[index].CLOCK; /* Get VCLK */ + } else { + tempax = SiS_Pr->SiS_VBVCLKData[index].CLOCK; /* Get VCLK */ + } - tempbx = SiS_GetColorDepth(SiS_Pr,ROMAddr,CRT2ModeNo,ModeIdIndex); /* Get colordepth */ + tempbx = SiS_GetColorDepth(SiS_Pr,ROMAddr,CRT2ModeNo,ModeIdIndex); /* Get colordepth */ tempbx >>= 1; if(!tempbx) tempbx++; @@ -2288,11 +2590,11 @@ if (tempax > 0x37) tempax = 0x37; - /* TW: 650/LVDS (1.10.07, 1.10.00), 650/301LV overrule calculated value; 315 does not */ - if(HwDeviceExtension->jChipType == SIS_650) { + /* TW: 650/LVDS (1.10.07, 1.10.00), 650/301LV, 740, 330 overrule calculated value; 315 does not */ + if(HwDeviceExtension->jChipType >= SIS_650) { tempax = 0x04; } - + SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x02,~0x3F,tempax); } @@ -2323,8 +2625,10 @@ if((SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) ) { +#ifdef SIS315H SiS_GetLVDSDesPtrA(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex, &PanelIndex,&ResIndex); + switch (PanelIndex) { case 0: PanelDesPtr = SiS_Pr->LVDS1024x768Des_1; break; /* --- expanding --- */ @@ -2335,7 +2639,9 @@ case 5: PanelDesPtr = SiS_Pr->LVDS1280x1024Des_2; break; case 6: PanelDesPtr = SiS_Pr->LVDS1400x1050Des_2; break; case 7: PanelDesPtr = SiS_Pr->LVDS1600x1200Des_2; break; + default: PanelDesPtr = SiS_Pr->LVDS1024x768Des_1; break; } +#endif } else { @@ -2344,7 +2650,7 @@ switch (PanelIndex) { - case 0: PanelDesPtr = SiS_Pr->SiS_PanelType00_1; break; /* --- expanding --- | Gericom 1st supersonic (310) */ + case 0: PanelDesPtr = SiS_Pr->SiS_PanelType00_1; break; /* --- */ case 1: PanelDesPtr = SiS_Pr->SiS_PanelType01_1; break; case 2: PanelDesPtr = SiS_Pr->SiS_PanelType02_1; break; case 3: PanelDesPtr = SiS_Pr->SiS_PanelType03_1; break; @@ -2356,11 +2662,11 @@ case 9: PanelDesPtr = SiS_Pr->SiS_PanelType09_1; break; case 10: PanelDesPtr = SiS_Pr->SiS_PanelType0a_1; break; case 11: PanelDesPtr = SiS_Pr->SiS_PanelType0b_1; break; - case 12: PanelDesPtr = SiS_Pr->SiS_PanelType0c_1; break; /* TW: Clevo 2202 (300) */ + case 12: PanelDesPtr = SiS_Pr->SiS_PanelType0c_1; break; case 13: PanelDesPtr = SiS_Pr->SiS_PanelType0d_1; break; - case 14: PanelDesPtr = SiS_Pr->SiS_PanelType0e_1; break; /* TW: Uniwill N271S2 (300) */ + case 14: PanelDesPtr = SiS_Pr->SiS_PanelType0e_1; break; case 15: PanelDesPtr = SiS_Pr->SiS_PanelType0f_1; break; - case 16: PanelDesPtr = SiS_Pr->SiS_PanelType00_2; break; /* --- non-expanding --- */ + case 16: PanelDesPtr = SiS_Pr->SiS_PanelType00_2; break; /* --- */ case 17: PanelDesPtr = SiS_Pr->SiS_PanelType01_2; break; case 18: PanelDesPtr = SiS_Pr->SiS_PanelType02_2; break; case 19: PanelDesPtr = SiS_Pr->SiS_PanelType03_2; break; @@ -2372,59 +2678,68 @@ case 25: PanelDesPtr = SiS_Pr->SiS_PanelType09_2; break; case 26: PanelDesPtr = SiS_Pr->SiS_PanelType0a_2; break; case 27: PanelDesPtr = SiS_Pr->SiS_PanelType0b_2; break; - case 28: PanelDesPtr = SiS_Pr->SiS_PanelType0c_2; break; /* TW: Gericom 2200C (300) */ + case 28: PanelDesPtr = SiS_Pr->SiS_PanelType0c_2; break; case 29: PanelDesPtr = SiS_Pr->SiS_PanelType0d_2; break; case 30: PanelDesPtr = SiS_Pr->SiS_PanelType0e_2; break; case 31: PanelDesPtr = SiS_Pr->SiS_PanelType0f_2; break; - case 32: PanelDesPtr = SiS_Pr->SiS_CHTVUNTSCDesData; break; - case 33: PanelDesPtr = SiS_Pr->SiS_CHTVONTSCDesData; break; - case 34: PanelDesPtr = SiS_Pr->SiS_CHTVUPALDesData; break; - case 35: PanelDesPtr = SiS_Pr->SiS_CHTVOPALDesData; break; + case 32: PanelDesPtr = SiS_Pr->SiS_PanelTypeNS_1; break; /* pass 1:1 */ + case 33: PanelDesPtr = SiS_Pr->SiS_PanelTypeNS_2; break; + case 50: PanelDesPtr = SiS_Pr->SiS_CHTVUNTSCDesData; break; /* TV */ + case 51: PanelDesPtr = SiS_Pr->SiS_CHTVONTSCDesData; break; + case 52: PanelDesPtr = SiS_Pr->SiS_CHTVUPALDesData; break; + case 53: PanelDesPtr = SiS_Pr->SiS_CHTVOPALDesData; break; + default: + if(HwDeviceExtension->jChipType < SIS_315H) + PanelDesPtr = SiS_Pr->SiS_PanelType0e_1; + else + PanelDesPtr = SiS_Pr->SiS_PanelType01_1; + break; } } SiS_Pr->SiS_LCDHDES = (PanelDesPtr+ResIndex)->LCDHDES; SiS_Pr->SiS_LCDVDES = (PanelDesPtr+ResIndex)->LCDVDES; - if(SiS_Pr->SiS_LCDInfo & LCDNonExpanding){ - if((SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) { - if(ModeNo <= 0x13) { - modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag; - if(!(modeflag & HalfDCLK)) { - SiS_Pr->SiS_LCDHDES = 632; - } - } - } else { - if(!(SiS_Pr->SiS_SetFlag & CRT2IsVGA)) { - if((HwDeviceExtension->jChipType < SIS_315H) || (SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1280x1024)) { /* TW: New from 650/LVDS 1.10.07 */ - if(SiS_Pr->SiS_LCDResInfo >= SiS_Pr->SiS_Panel1024x768){ - if(ModeNo <= 0x13) { - modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag; - if(HwDeviceExtension->jChipType < SIS_315H) { - if(!(modeflag & HalfDCLK)) { - SiS_Pr->SiS_LCDHDES = 320; - } - } else { - /* TW: New from 650/LVDS 1.10.07 */ - if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) - SiS_Pr->SiS_LCDHDES = 480; - if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) - SiS_Pr->SiS_LCDHDES = 804; - if(!(modeflag & HalfDCLK)) { - SiS_Pr->SiS_LCDHDES = 320; - if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) - SiS_Pr->SiS_LCDHDES = 632; + if(SiS_Pr->SiS_LCDInfo & DontExpandLCD){ + if((SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) { + if(ModeNo <= 0x13) { + modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag; + if(!(modeflag & HalfDCLK)) { + SiS_Pr->SiS_LCDHDES = 632; + } + } + } else { + if(!(SiS_Pr->SiS_SetFlag & SetDOSMode)) { + if( (HwDeviceExtension->jChipType < SIS_315H) || + (SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1280x1024) ) { + if(SiS_Pr->SiS_LCDResInfo >= SiS_Pr->SiS_Panel1024x768){ + if(ModeNo <= 0x13) { + modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag; + if(HwDeviceExtension->jChipType < SIS_315H) { + if(!(modeflag & HalfDCLK)) SiS_Pr->SiS_LCDHDES = 320; + } else { + if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) + SiS_Pr->SiS_LCDHDES = 480; + if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) + SiS_Pr->SiS_LCDHDES = 804; + if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200) + SiS_Pr->SiS_LCDHDES = 704; + if(!(modeflag & HalfDCLK)) { + SiS_Pr->SiS_LCDHDES = 320; + if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) + SiS_Pr->SiS_LCDHDES = 632; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200) + SiS_Pr->SiS_LCDHDES = 542; + } + } } } - } - } + } } - } - } + } } return; } -/* TW: Checked against 630/LVDS (2.04.5c) and 650/LVDS (1.10.07) BIOS */ void SiS_GetLVDSDesPtr(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex, USHORT RefreshRateTableIndex,USHORT *PanelIndex, @@ -2432,7 +2747,7 @@ { USHORT tempbx,tempal,modeflag; - if(ModeNo<=0x13) { + if(ModeNo <= 0x13) { modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag; tempal = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC; } else { @@ -2442,70 +2757,80 @@ tempbx = 0; if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) { - if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD)) { - tempbx = 32; - if(SiS_Pr->SiS_VBInfo & SetPALTV) tempbx += 2; - if(SiS_Pr->SiS_VBInfo & SetCHTVOverScan) tempbx += 1; - } + if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD)) { + tempbx = 50; + if((SiS_Pr->SiS_VBInfo & SetPALTV) && (!SiS_Pr->SiS_CHPALM)) tempbx += 2; + if(SiS_Pr->SiS_VBInfo & SetCHTVOverScan) tempbx += 1; + /* TW: Nothing special needed for SOverscan */ + /* PALM uses NTSC data, PALN uses PAL data */ + } } if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { - tempbx = SiS_Pr->SiS_LCDTypeInfo; - if(SiS_Pr->SiS_LCDInfo & LCDNonExpanding) tempbx += 16; - /* TW: Inserted from 650/LVDS (1.10.07) BIOS */ - if(SiS_Pr->SiS_LCDInfo & LCDPass11) { - if(modeflag & HalfDCLK) tempbx += 16; - } + tempbx = SiS_Pr->SiS_LCDTypeInfo; + if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) tempbx += 16; + if(SiS_Pr->SiS_LCDInfo & LCDPass11) { + tempbx = 32; + if(modeflag & HalfDCLK) tempbx++; + } } - /* TW: Inserted from 630/LVDS and 650/LVDS (1.10.07) BIOS */ - if(SiS_Pr->SiS_SetFlag & CRT2IsVGA) { - if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel640x480) { - tempal = 0x07; - if(HwDeviceExtension->jChipType < SIS_315H) { - if(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x13) & 0x80) tempal++; - } - } + /* TW: 630/LVDS and 650/LVDS (1.10.07) BIOS */ + if(SiS_Pr->SiS_SetFlag & SetDOSMode) { + if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel640x480) { + tempal = 0x07; + if(HwDeviceExtension->jChipType < SIS_315H) { + if(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x13) & 0x80) tempal++; + } + } } *PanelIndex = tempbx; *ResIndex = tempal & 0x1F; } +#ifdef SIS315H void SiS_GetLVDSDesPtrA(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex, - USHORT RefreshRateTableIndex,USHORT *PanelIndex, - USHORT *ResIndex) + USHORT RefreshRateTableIndex,USHORT *PanelIndex,USHORT *ResIndex) { USHORT tempbx=0,tempal; - if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) { - tempbx = 3; - } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200) { - tempbx = 4; - } else tempbx = SiS_Pr->SiS_LCDResInfo - SiS_Pr->SiS_PanelMinLVDS; + if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) tempbx = 2; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200) tempbx = 3; + else tempbx = SiS_Pr->SiS_LCDResInfo - SiS_Pr->SiS_PanelMinLVDS; - if(SiS_Pr->SiS_LCDInfo & LCDNonExpanding) tempbx += 4; + if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) tempbx += 4; - if(ModeNo<=0x13) - tempal = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC; + if(ModeNo <= 0x13) + tempal = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC; else - tempal = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC; + tempal = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC; *PanelIndex = tempbx; *ResIndex = tempal & 0x1F; } +#endif -/* TW: Checked against 650/LVDS (1.10.07), 650/301LV, 650/301LVx (!), 630/301 and 630/301B (II) BIOS */ void SiS_SetCRT2ModeRegs(SiS_Private *SiS_Pr, USHORT BaseAddr, USHORT ModeNo, USHORT ModeIdIndex, PSIS_HW_DEVICE_INFO HwDeviceExtension) { USHORT i,j,modeflag; - USHORT tempcl,tempah,tempbl,temp; + USHORT tempcl,tempah=0; +#ifdef SIS300 + USHORT temp; +#endif +#ifdef SIS315H + USHORT tempbl; +#endif - if(ModeNo<=0x13) { - modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag; + if(ModeNo <= 0x13) { + modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag; } else { + if(SiS_Pr->UseCustomMode) { + modeflag = SiS_Pr->CModeFlag; + } else { modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag; + } } /* TW: BIOS does not do this (neither 301 nor LVDS) */ @@ -2528,14 +2853,14 @@ if(HwDeviceExtension->jChipType < SIS_315H) { - /* ---- 300 series ---- */ +#ifdef SIS300 /* ---- 300 series ---- */ - /* TW: Inserted entire if-section from 630/301B BIOS */ - if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { + /* For 301BDH: */ + if(SiS_Pr->SiS_VBType & VB_NoLCD) { temp = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x32); temp &= 0xef; temp |= 0x02; - if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { + if((SiS_Pr->SiS_VBInfo & SetCRT2ToTV) || (SiS_Pr->SiS_VBInfo & SetCRT2ToRAMDAC)) { temp |= 0x10; temp &= 0xfd; } @@ -2547,18 +2872,20 @@ if((tempcl > 0) || (tempcl == 0)) { /* TW: tempcl is USHORT -> always true! */ tempah = ((0x10 >> tempcl) | 0x80); } - } else tempah = 0x80; + } else tempah = 0x80; if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) tempah ^= 0xA0; +#endif /* SIS300 */ + } else { - /* ---- 310 series ---- */ +#ifdef SIS315H /* ---- 310/325/330 series ---- */ if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { - if(SiS_Pr->SiS_VBInfo & CRT2DisplayFlag) { - SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2e,0x08); - } + if(SiS_Pr->SiS_VBInfo & CRT2DisplayFlag) { + SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2e,0x08); + } } if(ModeNo > 0x13) { @@ -2568,18 +2895,28 @@ if (tempah == 0) tempah = 1; tempah |= 0x40; } - } else tempah = 0x40; + } else tempah = 0x40; if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) tempah ^= 0x50; +#endif /* SIS315H */ + } if(SiS_Pr->SiS_VBInfo & CRT2DisplayFlag) tempah = 0; if(HwDeviceExtension->jChipType < SIS_315H) { - SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x00,tempah); /* FUNCTION CONTROL */ + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x00,tempah); /* FUNCTION CONTROL */ } else { - SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x00,0xa0,tempah); /* FUNCTION CONTROL */ + if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { + SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x00,0xa0,tempah); /* FUNCTION CONTROL */ + } else { + if(IS_SIS740) { + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x00,tempah); /* FUNCTION CONTROL */ + } else { + SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x00,0xa0,tempah); /* FUNCTION CONTROL */ + } + } } if(SiS_Pr->SiS_IF_DEF_LVDS == 0) { @@ -2619,7 +2956,7 @@ tempah |= 0x10; } - /* TW: Inserted from 630/301 BIOS */ + /* TW: 630/301 BIOS */ if((HwDeviceExtension->jChipType < SIS_315H) && (SiS_Pr->SiS_VBType & VB_SIS301)) { if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) { tempah |= 0x80; @@ -2628,9 +2965,11 @@ tempah |= 0x80; } - if(SiS_Pr->SiS_VBInfo & (SetCRT2ToTV - SetCRT2ToHiVisionTV)){ + if(SiS_Pr->SiS_VBInfo & (SetCRT2ToTV - SetCRT2ToHiVisionTV)) { if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) { - tempah |= 0x20; + if(!(SiS_Pr->SiS_HiVision & 0x03)) { + tempah |= 0x20; + } } } @@ -2638,28 +2977,26 @@ tempah = 0; if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { - if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) { - if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { - SiS_Pr->SiS_SetFlag |= RPLLDIV2XO; - tempah |= 0x40; - } else { - if(!(SiS_Pr->SiS_SetFlag & TVSimuMode)) { -#ifdef oldHV - if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV)) { -#endif - SiS_Pr->SiS_SetFlag |= RPLLDIV2XO; - tempah |= 0x40; -#ifdef oldHV - } -#endif - } - } - } else { - SiS_Pr->SiS_SetFlag |= RPLLDIV2XO; - tempah |= 0x40; - } + if(!(SiS_Pr->SiS_HiVision & 0x03)) { + if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) { + if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV)) { + if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { + SiS_Pr->SiS_SetFlag |= RPLLDIV2XO; + tempah |= 0x40; + } else { + if(!(SiS_Pr->SiS_SetFlag & TVSimuMode)) { + SiS_Pr->SiS_SetFlag |= RPLLDIV2XO; + tempah |= 0x40; + } + } + } + } else { + SiS_Pr->SiS_SetFlag |= RPLLDIV2XO; + tempah |= 0x40; + } + } } - /* TW: Inserted from 630/301LVx BIOS 1.10.6s */ + /* TW: For 302LV dual-channel */ if(HwDeviceExtension->jChipType >= SIS_315H) { if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { if(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x39) & 0x04) @@ -2667,8 +3004,8 @@ } } - if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024 || - SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x960) { + if((SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) || + (SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x960)) { tempah |= 0x80; } @@ -2678,7 +3015,6 @@ /* TW: 3. for LVDS */ - /* TW: Inserted if-statement - Part1Port 0x2e not assigned on 300 series */ if(HwDeviceExtension->jChipType >= SIS_315H) { /* TW: Inserted this entire section (BIOS 650/LVDS); added ModeType check @@ -2707,7 +3043,7 @@ } else { - /* TW: Inserted entire section from 630/LVDS BIOS (added ModeType check) */ + /* TW: (added ModeType check) */ tempah = 0; if( (!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) && (SiS_Pr->SiS_ModeType > ModeVGA) ) { tempah |= 0x02; @@ -2730,77 +3066,128 @@ if(HwDeviceExtension->jChipType >= SIS_315H) { -#ifdef SIS650301NEW /* TW: This is done in 650/301LVx 1.10.6s BIOS */ - tempah = 0x04; - tempbl = 0xfb; - if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) { - tempah = 0x00; - if(SiS_IsDualEdge(SiS_Pr, HwDeviceExtension, BaseAddr)) - tempbl = 0xff; - } - SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x13,tempbl,tempah); +#ifdef SIS315H + if(!(IS_SIS740)) { + tempah = 0x04; /* For all bridges */ + tempbl = 0xfb; + if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) { + tempah = 0x00; + if(SiS_IsDualEdge(SiS_Pr, HwDeviceExtension, BaseAddr)) + tempbl = 0xff; + } + SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x13,tempbl,tempah); + } + + if(IS_SIS740) { + tempah = 0x30; + tempbl = 0xcf; + if(SiS_Pr->SiS_VBInfo & DisableCRT2Display) { + tempah = 0x00; + } + SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x2c,tempbl,tempah); + } else { + /* TW: This in order to fix "TV-blue-bug" on 315+301 */ + if(SiS_Pr->SiS_VBType & VB_SIS301) { + SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x2c,0xCF); /* For 301 */ + } else { + if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) { + SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x2c,0xCF,0x30); /* For 30xLV */ + } else { + tempah = 0x30; /* For 301B */ + tempbl = 0xcf; + if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) { + tempah = 0x00; + if(SiS_IsDualEdge(SiS_Pr, HwDeviceExtension, BaseAddr)) { + tempbl = 0xff; + } + } + SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x2c,tempbl,tempah); + } + } + } - /* TW: This in order to fix "TV-blue-bug" on 315+301 */ - if(SiS_Pr->SiS_VBType & VB_SIS301) { - SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x2c,0xCF); /* RIGHT for 315+301 */ + if(IS_SIS740) { + tempah = 0xc0; + tempbl = 0x3f; + if(SiS_Pr->SiS_VBInfo & DisableCRT2Display) { + tempah = 0x00; + } + SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x21,tempbl,tempah); } else { - SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x2c,0xCF,0x30); /* WRONG for 315+301 */ + if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) { /* For 30xLV */ + SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x21,0x3f,0xc0); + } else { /* For 301, 301B */ + tempah = 0xc0; + tempbl = 0x3f; + if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) { + tempah = 0x00; + if(SiS_IsDualEdge(SiS_Pr, HwDeviceExtension, BaseAddr)) { + tempbl = 0xff; + } + } + SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x21,tempbl,tempah); + } } - SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x21,0x3f,0xc0); - - tempah = 0x00; - tempbl = 0x7f; - if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) { - tempbl = 0xff; - if(!(SiS_IsDualEdge(SiS_Pr, HwDeviceExtension, BaseAddr))) - tempah |= 0x80; - } - SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x23,tempbl,tempah); + if(IS_SIS740) { + tempah = 0x80; + tempbl = 0x7f; + if(SiS_Pr->SiS_VBInfo & DisableCRT2Display) { + tempah = 0x00; + } + SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x23,tempbl,tempah); + } else { + tempah = 0x00; /* For all bridges */ + tempbl = 0x7f; + if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) { + tempbl = 0xff; + if(!(SiS_IsDualEdge(SiS_Pr, HwDeviceExtension, BaseAddr))) + tempah |= 0x80; + } + SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x23,tempbl,tempah); + } -#else - /* This is done in 650/301LV BIOS instead: */ - tempah = 0x30; - if(SiS_Pr->SiS_VBInfo & DisableCRT2Display) tempah = 0; - SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x2c,0xcf,tempah); - - tempah = 0xc0; - if(SiS_Pr->SiS_VBInfo & DisableCRT2Display) tempah = 0; - SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x21,0x3f,tempah); - - tempah = 0x80; - if(SiS_Pr->SiS_VBInfo & DisableCRT2Display) tempah = 0; - SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x23,0x7F,tempah); -#endif +#endif /* SIS315H */ } else if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x21,0x3f); - if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | DisableCRT2Display)) + if((SiS_Pr->SiS_VBInfo & DisableCRT2Display) || + ( (SiS_Pr->SiS_VBType & VB_NoLCD) && + (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) ) ) { SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x23,0x7F); - else + } else { SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x23,0x80); + } } } else { /* LVDS */ +#ifdef SIS315H if(HwDeviceExtension->jChipType >= SIS_315H) { - tempah = 0x04; - tempbl = 0xfb; - if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) { - tempah = 0x00; - if(SiS_IsDualEdge(SiS_Pr, HwDeviceExtension, BaseAddr)) - tempbl = 0xff; - } - SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x13,tempbl,tempah); - if(SiS_Pr->SiS_VBInfo & DisableCRT2Display) - SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x13,0xfb,0x00); + if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) { + + tempah = 0x04; + tempbl = 0xfb; + if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) { + tempah = 0x00; + if(SiS_IsDualEdge(SiS_Pr, HwDeviceExtension, BaseAddr)) + tempbl = 0xff; + } + SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x13,tempbl,tempah); + + if(SiS_Pr->SiS_VBInfo & DisableCRT2Display) + SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x13,0xfb,0x00); + + SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x2c,0xcf,0x30); + + } - SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x2c,0xcf,0x30); } +#endif } @@ -2811,27 +3198,40 @@ USHORT RefreshRateTableIndex, PSIS_HW_DEVICE_INFO HwDeviceExtension) { + if(SiS_Pr->SiS_IF_DEF_LVDS == 0) { + if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { + if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) { - SiS_GetCRT2DataLVDS(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex, + + SiS_GetCRT2DataLVDS(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex, HwDeviceExtension); } else { - if((HwDeviceExtension->jChipType < SIS_315H) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD)){ - SiS_GetCRT2Data301(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex, - HwDeviceExtension); - /* TW: Need LVDS Data for LCD on 630/301B! */ + + if( (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) && + (SiS_Pr->SiS_VBType & VB_NoLCD) ) { + + /* TW: Need LVDS Data for LCD on 301BDH */ SiS_GetCRT2DataLVDS(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex, HwDeviceExtension); - } else { + + } else { + SiS_GetCRT2Data301(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex, HwDeviceExtension); - } + } + } - } else + + } else { + SiS_GetCRT2Data301(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex, HwDeviceExtension); + } + } else { + SiS_GetCRT2DataLVDS(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex, HwDeviceExtension); } @@ -2847,9 +3247,21 @@ const SiS_LVDSDataStruct *LVDSData = NULL; SiS_GetCRT2ResInfo(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,HwDeviceExtension); + + if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { + SiS_Pr->SiS_RVBHCMAX = 1; + SiS_Pr->SiS_RVBHCFACT = 1; + SiS_Pr->SiS_NewFlickerMode = 0; + SiS_Pr->SiS_RVBHRS = 50; + SiS_Pr->SiS_RY1COE = 0; + SiS_Pr->SiS_RY2COE = 0; + SiS_Pr->SiS_RY3COE = 0; + SiS_Pr->SiS_RY4COE = 0; + } if((SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) { +#ifdef SIS315H SiS_GetCRT2PtrA(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex, &CRT2Index,&ResIndex); @@ -2864,24 +3276,26 @@ case 7: LVDSData = SiS_Pr->SiS_LVDS1280x960Data_2; break; case 8: LVDSData = SiS_Pr->SiS_LCDA1400x1050Data_2; break; case 9: LVDSData = SiS_Pr->SiS_LCDA1600x1200Data_2; break; + default: LVDSData = SiS_Pr->SiS_LVDS1024x768Data_1; break; } +#endif } else { - /* TW: SiS630/301B needs LVDS Data! */ - if( (HwDeviceExtension->jChipType < SIS_315H) && - (SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) && - (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) ) - SiS_Pr->SiS_IF_DEF_LVDS = 1; + /* TW: 301BDH needs LVDS Data */ + if( (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) && + (SiS_Pr->SiS_VBType & VB_NoLCD) ) { + SiS_Pr->SiS_IF_DEF_LVDS = 1; + } SiS_GetCRT2Ptr(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex, &CRT2Index,&ResIndex,HwDeviceExtension); - /* TW: SiS630/301B needs LVDS Data! */ - if( (HwDeviceExtension->jChipType < SIS_315H) && - (SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) && - (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) ) + /* TW: 301BDH needs LVDS Data */ + if( (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) && + (SiS_Pr->SiS_VBType & VB_NoLCD) ) { SiS_Pr->SiS_IF_DEF_LVDS = 0; + } switch (CRT2Index) { case 0: LVDSData = SiS_Pr->SiS_LVDS800x600Data_1; break; @@ -2891,32 +3305,42 @@ case 4: LVDSData = SiS_Pr->SiS_LVDS1024x768Data_2; break; case 5: LVDSData = SiS_Pr->SiS_LVDS1280x1024Data_2; break; case 6: LVDSData = SiS_Pr->SiS_LVDS640x480Data_1; break; - case 7: LVDSData = SiS_Pr->SiS_LVDSXXXxXXXData_1; break; /* TW: New */ - case 8: LVDSData = SiS_Pr->SiS_LVDS1400x1050Data_1; break; /* TW: New */ - case 9: LVDSData = SiS_Pr->SiS_LVDS1400x1050Data_2; break; /* TW: New */ + case 7: LVDSData = SiS_Pr->SiS_LVDSXXXxXXXData_1; break; + case 8: LVDSData = SiS_Pr->SiS_LVDS1400x1050Data_1; break; + case 9: LVDSData = SiS_Pr->SiS_LVDS1400x1050Data_2; break; case 10: LVDSData = SiS_Pr->SiS_CHTVUNTSCData; break; case 11: LVDSData = SiS_Pr->SiS_CHTVONTSCData; break; case 12: LVDSData = SiS_Pr->SiS_CHTVUPALData; break; case 13: LVDSData = SiS_Pr->SiS_CHTVOPALData; break; case 14: LVDSData = SiS_Pr->SiS_LVDS320x480Data_1; break; - case 15: LVDSData = SiS_Pr->SiS_LVDS1024x600Data_1; break; /* TW: New */ - case 16: LVDSData = SiS_Pr->SiS_LVDS1152x768Data_1; break; /* TW: New */ - case 17: LVDSData = SiS_Pr->SiS_LVDS1024x600Data_2; break; /* TW: New */ - case 18: LVDSData = SiS_Pr->SiS_LVDS1152x768Data_2; break; /* TW: New */ + case 15: LVDSData = SiS_Pr->SiS_LVDS1024x600Data_1; break; + case 16: LVDSData = SiS_Pr->SiS_LVDS1152x768Data_1; break; + case 17: LVDSData = SiS_Pr->SiS_LVDS1024x600Data_2; break; + case 18: LVDSData = SiS_Pr->SiS_LVDS1152x768Data_2; break; + case 19: LVDSData = SiS_Pr->SiS_LVDS1280x768Data_1; break; + case 20: LVDSData = SiS_Pr->SiS_LVDS1280x768Data_2; break; + case 21: LVDSData = SiS_Pr->SiS_LVDS1600x1200Data_1; break; + case 22: LVDSData = SiS_Pr->SiS_LVDS1600x1200Data_2; break; + case 90: LVDSData = SiS_Pr->SiS_CHTVUPALMData; break; + case 91: LVDSData = SiS_Pr->SiS_CHTVOPALMData; break; + case 92: LVDSData = SiS_Pr->SiS_CHTVUPALNData; break; + case 93: LVDSData = SiS_Pr->SiS_CHTVOPALNData; break; + case 99: LVDSData = SiS_Pr->SiS_CHTVSOPALData; break; /* TW: Super Overscan */ + default: LVDSData = SiS_Pr->SiS_LVDS1024x768Data_1; break; } } SiS_Pr->SiS_VGAHT = (LVDSData+ResIndex)->VGAHT; SiS_Pr->SiS_VGAVT = (LVDSData+ResIndex)->VGAVT; - SiS_Pr->SiS_HT = (LVDSData+ResIndex)->LCDHT; - SiS_Pr->SiS_VT = (LVDSData+ResIndex)->LCDVT; + SiS_Pr->SiS_HT = (LVDSData+ResIndex)->LCDHT; + SiS_Pr->SiS_VT = (LVDSData+ResIndex)->LCDVT; - if((SiS_Pr->SiS_IF_DEF_LVDS == 0) && (SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV)) { + if(SiS_Pr->SiS_IF_DEF_LVDS == 0) { - if(!(SiS_Pr->SiS_LCDInfo & LCDNonExpanding)){ + if(!(SiS_Pr->SiS_LCDInfo & DontExpandLCD)){ if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768){ SiS_Pr->SiS_HDE = 1024; - SiS_Pr->SiS_VDE = 768; + SiS_Pr->SiS_VDE = 768; } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024){ SiS_Pr->SiS_HDE = 1280; SiS_Pr->SiS_VDE = 1024; @@ -2928,7 +3352,7 @@ SiS_Pr->SiS_VDE = 1200; } else { SiS_Pr->SiS_HDE = 1280; - SiS_Pr->SiS_VDE = 960; + SiS_Pr->SiS_VDE = 960; } } @@ -2937,31 +3361,31 @@ if(SiS_Pr->SiS_IF_DEF_TRUMPION == 0) { if((SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) && (!(SiS_Pr->SiS_LCDInfo & LCDPass11))) { if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel640x480) { - if((!(SiS_Pr->SiS_LCDInfo & LCDNonExpanding)) || (SiS_Pr->SiS_SetFlag & CRT2IsVGA)) { + if((!(SiS_Pr->SiS_LCDInfo & DontExpandLCD)) || (SiS_Pr->SiS_SetFlag & SetDOSMode)) { if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel800x600) { - SiS_Pr->SiS_HDE = 800; - SiS_Pr->SiS_VDE = 600; + SiS_Pr->SiS_HDE = 800; + SiS_Pr->SiS_VDE = 600; + } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x600) { + SiS_Pr->SiS_HDE = 1024; + SiS_Pr->SiS_VDE = 600; } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) { SiS_Pr->SiS_HDE = 1024; - SiS_Pr->SiS_VDE = 768; + SiS_Pr->SiS_VDE = 768; + } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1152x768) { + SiS_Pr->SiS_HDE = 1152; + SiS_Pr->SiS_VDE = 768; + } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1152x864) { + SiS_Pr->SiS_HDE = 1152; + SiS_Pr->SiS_VDE = 864; + } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x768) { + SiS_Pr->SiS_HDE = 1280; + SiS_Pr->SiS_VDE = 768; } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) { SiS_Pr->SiS_HDE = 1280; SiS_Pr->SiS_VDE = 1024; - } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x600) { - SiS_Pr->SiS_HDE = 1024; - SiS_Pr->SiS_VDE = 600; } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) { SiS_Pr->SiS_HDE = 1400; SiS_Pr->SiS_VDE = 1050; - } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1152x768) { - SiS_Pr->SiS_HDE = 1152; - SiS_Pr->SiS_VDE = 768; - } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1152x864) { - SiS_Pr->SiS_HDE = 1152; - SiS_Pr->SiS_VDE = 864; - } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x768) { - SiS_Pr->SiS_HDE = 1280; - SiS_Pr->SiS_VDE = 768; } else { SiS_Pr->SiS_HDE = 1600; SiS_Pr->SiS_VDE = 1200; @@ -2977,7 +3401,6 @@ } } -/* TW: Checked against 630/301B BIOS; does not check VDE values for LCD */ void SiS_GetCRT2Data301(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex, USHORT RefreshRateTableIndex, @@ -2989,13 +3412,14 @@ const SiS_LCDDataStruct *LCDPtr = NULL; const SiS_TVDataStruct *TVPtr = NULL; - if(ModeNo<=0x13) { + if(ModeNo <= 0x13) { modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag; resinfo = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ResInfo; } else { modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag; resinfo = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO; } + SiS_Pr->SiS_NewFlickerMode = 0; SiS_Pr->SiS_RVBHRS = 50; SiS_Pr->SiS_RY1COE = 0; @@ -3021,11 +3445,9 @@ &CRT2Index,&ResIndex,HwDeviceExtension); switch (CRT2Index) { -#ifdef oldHV case 2: TVPtr = SiS_Pr->SiS_ExtHiTVData; break; - case 7: TVPtr = SiS_Pr->SiS_St1HiTVData; break; +/* case 7: TVPtr = SiS_Pr->SiS_St1HiTVData; break; */ case 12: TVPtr = SiS_Pr->SiS_St2HiTVData; break; -#endif case 3: TVPtr = SiS_Pr->SiS_ExtPALData; break; case 4: TVPtr = SiS_Pr->SiS_ExtNTSCData; break; case 8: TVPtr = SiS_Pr->SiS_StPALData; break; @@ -3041,27 +3463,44 @@ SiS_Pr->SiS_VDE = (TVPtr+ResIndex)->TVVDE; SiS_Pr->SiS_RVBHRS = (TVPtr+ResIndex)->RVBHRS; SiS_Pr->SiS_NewFlickerMode = (TVPtr+ResIndex)->FlickerMode; + if(modeflag & HalfDCLK) { + SiS_Pr->SiS_RVBHRS = (TVPtr+ResIndex)->HALFRVBHRS; + } - if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) { /* TW: NOT oldHV! */ - - if(resinfo == 0x08) SiS_Pr->SiS_NewFlickerMode = 0x40; - if(resinfo == 0x09) SiS_Pr->SiS_NewFlickerMode = 0x40; - if(resinfo == 0x12) SiS_Pr->SiS_NewFlickerMode = 0x40; - - if(SiS_Pr->SiS_VGAVDE == 350) SiS_Pr->SiS_SetFlag |= TVSimuMode; - - SiS_Pr->SiS_HT = ExtHiTVHT; - SiS_Pr->SiS_VT = ExtHiTVVT; - if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) { - if(SiS_Pr->SiS_SetFlag & TVSimuMode) { - SiS_Pr->SiS_HT = StHiTVHT; - SiS_Pr->SiS_VT = StHiTVVT; - if(!(modeflag & Charx8Dot)){ - SiS_Pr->SiS_HT = StHiTextTVHT; - SiS_Pr->SiS_VT = StHiTextTVVT; - } + if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) { + + if(SiS_Pr->SiS_HiVision != 3) { + + if(resinfo == 0x08) SiS_Pr->SiS_NewFlickerMode = 0x40; + if(resinfo == 0x09) SiS_Pr->SiS_NewFlickerMode = 0x40; + if(resinfo == 0x12) SiS_Pr->SiS_NewFlickerMode = 0x40; + + } + + switch(SiS_Pr->SiS_HiVision) { + case 2: + case 1: + case 0: + SiS_Pr->SiS_HT = 0x6b4; + SiS_Pr->SiS_VT = 0x20d; + /* Don't care about TVSimuMode */ + break; + default: + if(SiS_Pr->SiS_VGAVDE == 350) SiS_Pr->SiS_SetFlag |= TVSimuMode; + + SiS_Pr->SiS_HT = ExtHiTVHT; + SiS_Pr->SiS_VT = ExtHiTVVT; + if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) { + if(SiS_Pr->SiS_SetFlag & TVSimuMode) { + SiS_Pr->SiS_HT = StHiTVHT; + SiS_Pr->SiS_VT = StHiTVVT; + if(!(modeflag & Charx8Dot)){ + SiS_Pr->SiS_HT = StHiTextTVHT; + SiS_Pr->SiS_VT = StHiTextTVVT; + } + } } - } + } } else { @@ -3077,11 +3516,11 @@ SiS_Pr->SiS_RY4COE = 0x38; } - if(!(SiS_Pr->SiS_VBInfo & SetPALTV)){ + if(!(SiS_Pr->SiS_VBInfo & SetPALTV)) { SiS_Pr->SiS_HT = NTSCHT; -#if 0 /* TW: Not in 650/301LVx 1.10.6s */ - if((ModeNo == 0x4a) || (ModeNo == 0x38)) SiS_Pr->SiS_HT = NTSC2HT; -#endif + if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { + if((ModeNo == 0x4a) || (ModeNo == 0x38)) SiS_Pr->SiS_HT = NTSC2HT; + } SiS_Pr->SiS_VT = NTSCVT; } else { SiS_Pr->SiS_HT = PALHT; @@ -3094,14 +3533,13 @@ } /* TW: For LCD */ - /* TW: Checked against 650/301LV; CRT2Index different (but does not matter) */ if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { SiS_GetCRT2Ptr(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex, &CRT2Index,&ResIndex,HwDeviceExtension); - switch (CRT2Index) { + switch(CRT2Index) { case 0: LCDPtr = SiS_Pr->SiS_ExtLCD1024x768Data; break; /* VESA Timing */ case 1: LCDPtr = SiS_Pr->SiS_ExtLCD1280x1024Data; break; /* VESA Timing */ case 5: LCDPtr = SiS_Pr->SiS_StLCD1024x768Data; break; /* Obviously unused */ @@ -3112,11 +3550,15 @@ case 14: LCDPtr = SiS_Pr->SiS_NoScaleData1280x1024; break; /* Non-expanding */ case 15: LCDPtr = SiS_Pr->SiS_LCD1280x960Data; break; /* 1280x960 */ case 20: LCDPtr = SiS_Pr->SiS_ExtLCD1400x1050Data; break; /* VESA Timing */ - case 21: LCDPtr = SiS_Pr->SiS_NoScaleData1400x1050; break; /* Non-expanding */ - case 22: LCDPtr = SiS_Pr->SiS_StLCD1400x1050Data; break; /* Non-VESA Timing */ + case 21: LCDPtr = SiS_Pr->SiS_NoScaleData1400x1050; break; /* Non-expanding (let panel scale) */ + case 22: LCDPtr = SiS_Pr->SiS_StLCD1400x1050Data; break; /* Non-VESA Timing (let panel scale) */ case 23: LCDPtr = SiS_Pr->SiS_ExtLCD1600x1200Data; break; /* VESA Timing */ case 24: LCDPtr = SiS_Pr->SiS_NoScaleData1600x1200; break; /* Non-expanding */ case 25: LCDPtr = SiS_Pr->SiS_StLCD1600x1200Data; break; /* Non-VESA Timing */ + case 26: LCDPtr = SiS_Pr->SiS_ExtLCD1280x768Data; break; /* VESA Timing */ + case 27: LCDPtr = SiS_Pr->SiS_NoScaleData1280x768; break; /* Non-expanding */ + case 28: LCDPtr = SiS_Pr->SiS_StLCD1280x768Data; break; /* Non-VESA Timing */ + case 29: LCDPtr = SiS_Pr->SiS_NoScaleData; break; /* Generic no-scale data */ default: LCDPtr = SiS_Pr->SiS_ExtLCD1024x768Data; break; /* Just to avoid a crash */ } @@ -3126,12 +3568,21 @@ SiS_Pr->SiS_VGAVT = (LCDPtr+ResIndex)->VGAVT; SiS_Pr->SiS_HT = (LCDPtr+ResIndex)->LCDHT; SiS_Pr->SiS_VT = (LCDPtr+ResIndex)->LCDVT; + +#ifdef TWDEBUG + xf86DrvMsg(0, X_INFO, + "GetCRT2Data: Index %d ResIndex %d\n", CRT2Index, ResIndex); +#endif tempax = 1024; if(SiS_Pr->SiS_SetFlag & LCDVESATiming) { - if (SiS_Pr->SiS_VGAVDE == 350) tempbx = 560; - else if(SiS_Pr->SiS_VGAVDE == 400) tempbx = 640; - else tempbx = 768; + if(HwDeviceExtension->jChipType < SIS_315H) { + if (SiS_Pr->SiS_VGAVDE == 350) tempbx = 560; + else if(SiS_Pr->SiS_VGAVDE == 400) tempbx = 640; + else tempbx = 768; + } else { + tempbx = 768; + } } else { if (SiS_Pr->SiS_VGAVDE == 357) tempbx = 527; else if(SiS_Pr->SiS_VGAVDE == 420) tempbx = 620; @@ -3141,25 +3592,33 @@ else if(SiS_Pr->SiS_VGAVDE == 400) tempbx = 640; else tempbx = 768; } - if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024){ + if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) { tempax = 1280; if (SiS_Pr->SiS_VGAVDE == 360) tempbx = 768; else if(SiS_Pr->SiS_VGAVDE == 375) tempbx = 800; else if(SiS_Pr->SiS_VGAVDE == 405) tempbx = 864; else tempbx = 1024; } - if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x960){ + if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x960) { tempax = 1280; if (SiS_Pr->SiS_VGAVDE == 350) tempbx = 700; else if(SiS_Pr->SiS_VGAVDE == 400) tempbx = 800; else if(SiS_Pr->SiS_VGAVDE == 1024) tempbx = 960; else tempbx = 960; } - if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050){ + if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) { tempax = 1400; tempbx = 1050; } - if(SiS_Pr->SiS_LCDInfo & LCDNonExpanding) { + if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200) { + tempax = 1600; + tempbx = 1200; + } + if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x768) { /* guessed */ + tempax = 1280; + tempbx = 768; + } + if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) { tempax = SiS_Pr->SiS_VGAHDE; tempbx = SiS_Pr->SiS_VGAVDE; } @@ -3174,7 +3633,7 @@ { USHORT resindex; - if(ModeNo<=0x13) + if(ModeNo <= 0x13) resindex=SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ResInfo; else resindex=SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO; @@ -3182,7 +3641,6 @@ return(resindex); } -/* TW: Checked against 650/301LV, 650/LVDS, 630/LVDS, 630/301 and 630/301B BIOS */ void SiS_GetCRT2ResInfo(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex, PSIS_HW_DEVICE_INFO HwDeviceExtension) @@ -3200,14 +3658,12 @@ modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag; } - /* TW: Inserted entire if-section from 650/LVDS BIOS 1.10.07: */ if((HwDeviceExtension->jChipType >= SIS_315H) && (SiS_Pr->SiS_IF_DEF_LVDS == 1)) { - if((ModeNo != 0x03) && (SiS_Pr->SiS_SetFlag & CRT2IsVGA)) { + if((ModeNo != 0x03) && (SiS_Pr->SiS_SetFlag & SetDOSMode)) { if(yres == 350) yres = 400; } if(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x3a) & 0x01) { - if(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x34) == 0x12) - yres = 400; + if(ModeNo == 0x12) yres = 400; } } @@ -3222,38 +3678,55 @@ } if(SiS_Pr->SiS_IF_DEF_LVDS == 0) { - /* TW: Inserted from 650/301LV BIOS */ if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) { - if(xres == 720) xres = 640; + if(xres == 720) xres = 640; } else { - if(xres == 720) xres = 640; - if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) { - if(yres == 400) yres = 405; - if(yres == 350) yres = 360; - if(SiS_Pr->SiS_SetFlag & LCDVESATiming) { - if(yres == 360) yres = 375; - } - } - if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768){ - if(!(SiS_Pr->SiS_SetFlag & LCDVESATiming)) { - if(!(SiS_Pr->SiS_LCDInfo & LCDNonExpanding)) { - if(yres == 350) yres = 357; - if(yres == 400) yres = 420; - if(yres == 480) yres = 525; - } - } - } - /* TW: Inserted for 630/301B */ - if(HwDeviceExtension->jChipType < SIS_315H) { - if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { - if(xres == 720) xres = 640; + if(SiS_Pr->SiS_VBType & VB_NoLCD) { /* TW: 301BDH */ + if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { + if(xres == 720) xres = 640; + } + if(SiS_Pr->SiS_SetFlag & SetDOSMode) { + yres = 400; + if(HwDeviceExtension->jChipType >= SIS_315H) { + if(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x17) & 0x80) yres = 480; + } else { + if(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x13) & 0x80) yres = 480; + } + } + } else { + if(SiS_Pr->SiS_VBInfo & (SetCRT2ToAVIDEO | /* (Allow 720 for VGA2) */ + SetCRT2ToSVIDEO | + SetCRT2ToSCART | + SetCRT2ToLCD | + SetCRT2ToHiVisionTV)) { + if(xres == 720) xres = 640; + } + if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { + if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) { + if(ModeNo <= 0x13) { + /* TW: This is wrong for 640x400 *graphics* mode */ + if(yres == 400) yres = 405; + } + if(yres == 350) yres = 360; + if(SiS_Pr->SiS_SetFlag & LCDVESATiming) { + if(yres == 360) yres = 375; + } + } + if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768){ + if(!(SiS_Pr->SiS_SetFlag & LCDVESATiming)) { + if(!(SiS_Pr->SiS_LCDInfo & DontExpandLCD)) { + if(yres == 350) yres = 357; + if(yres == 400) yres = 420; + if(yres == 480) yres = 525; + } + } + } } } } } else { if(xres == 720) xres = 640; - /* TW: Inserted from 650/LVDS and 630/LVDS BIOS */ - if(SiS_Pr->SiS_SetFlag & CRT2IsVGA) { + if(SiS_Pr->SiS_SetFlag & SetDOSMode) { yres = 400; if(HwDeviceExtension->jChipType >= SIS_315H) { if(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x17) & 0x80) yres = 480; @@ -3266,8 +3739,6 @@ SiS_Pr->SiS_VGAVDE = SiS_Pr->SiS_VDE = yres; } -/* TW: Checked against 650/301 and 650/LVDS (1.10.07) BIOS; modified for new panel resolutions */ -/* TW: Done differently in 630/301B BIOS; but same effect; checked against 630/301 */ void SiS_GetCRT2Ptr(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex, USHORT RefreshRateTableIndex,USHORT *CRT2Index,USHORT *ResIndex, @@ -3276,21 +3747,49 @@ USHORT tempbx=0,tempal=0; USHORT Flag,resinfo=0; + if(ModeNo <= 0x13) { + tempal = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC; + } else { + tempal = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC; + resinfo = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO; + } + if(SiS_Pr->SiS_IF_DEF_LVDS == 0) { + if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { /* LCD */ + if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x960) { tempbx = 15; } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) { tempbx = 20; - if(SiS_Pr->SiS_LCDInfo & LCDNonExpanding) tempbx = 21; - if(!(SiS_Pr->SiS_SetFlag & LCDVESATiming)) tempbx = 22; + if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) tempbx = 21; + else if(!(SiS_Pr->SiS_SetFlag & LCDVESATiming)) tempbx = 22; } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200) { tempbx = 23; - if(SiS_Pr->SiS_LCDInfo & LCDNonExpanding) tempbx = 24; - if(!(SiS_Pr->SiS_SetFlag & LCDVESATiming)) tempbx = 25; - } else if(SiS_Pr->SiS_LCDInfo & LCDNonExpanding) { - tempbx = 13; - if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) tempbx++; + if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) tempbx = 24; + else if(!(SiS_Pr->SiS_SetFlag & LCDVESATiming)) tempbx = 25; +#if 0 + } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x768) { + tempbx = 26; + if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) tempbx = 27; + else if(!(SiS_Pr->SiS_SetFlag & LCDVESATiming)) tempbx = 28; +#endif + } else if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) { + if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) { + if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) tempbx = 13; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) tempbx = 14; + else tempbx = 29; + } else { + tempbx = 29; + if(ModeNo >= 0x13) { + if(HwDeviceExtension->jChipType >= SIS_315H) { + /* 1280x768 and 1280x960 have same CRT2CRTC, + * so we change it here if 1280x960 is chosen + */ + if(resinfo == 0x0f) tempal = 10; + } + } + } } else { tempbx = SiS_Pr->SiS_LCDResInfo - SiS_Pr->SiS_Panel1024x768; if(!(SiS_Pr->SiS_SetFlag & LCDVESATiming)) { @@ -3300,88 +3799,102 @@ tempbx += 5; } } - } else { -#ifdef oldHV /* TV */ - if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV){ - if(SiS_Pr->SiS_VGAVDE > 480) SiS_Pr->SiS_SetFlag &= (~TVSimuMode); /* TW: Was "(!TVSimuMode)" - WRONG */ + + } else { /* TV */ + + if((SiS_Pr->SiS_VBType & VB_SIS301B302B) && + (SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV)) { + if(SiS_Pr->SiS_VGAVDE > 480) SiS_Pr->SiS_SetFlag &= (~TVSimuMode); tempbx = 2; if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) { - if(!(SiS_Pr->SiS_SetFlag & TVSimuMode)) tempbx = 12; /* TW: Was 10! - WRONG */ + if(!(SiS_Pr->SiS_SetFlag & TVSimuMode)) tempbx = 12; } } else { -#endif if(SiS_Pr->SiS_VBInfo & SetPALTV) tempbx = 3; else tempbx = 4; if(SiS_Pr->SiS_SetFlag & TVSimuMode) tempbx += 5; -#ifdef oldHV } -#endif + } - if(ModeNo <= 0x13) - tempal = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC; - else - tempal = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC; + tempal &= 0x3F; - tempal &= 0x3F; - - if((SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) - && (SiS_Pr->SiS_VBInfo & (SetCRT2ToTV-SetCRT2ToHiVisionTV))) { /* TW: Added -Hivision (BIOS) */ + if((SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) && + (SiS_Pr->SiS_VBInfo & (SetCRT2ToTV-SetCRT2ToHiVisionTV))) { if(tempal == 0x06) tempal = 0x07; } - if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { - if((ModeNo == 0x31) || (ModeNo == 0x32)) tempal = 6; + if((HwDeviceExtension->jChipType == SIS_300) && + (SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV)) { + if(ModeNo > 0x13) { + if((resinfo == 0x0c) || (resinfo == 0x0d)) /* 720 (index diff. on 310/325!) */ + tempal = 6; + } + } + + if(HwDeviceExtension->jChipType != SIS_300) { + if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { + if((ModeNo == 0x31) || (ModeNo == 0x32)) tempal = 6; + } } *CRT2Index = tempbx; *ResIndex = tempal; - } else { /* LVDS */ + } else { /* LVDS, 301B-DH (if running on LCD) */ Flag = 1; tempbx = 0; if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) { + if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD)) { Flag = 0; tempbx = 10; - if(SiS_Pr->SiS_VBInfo & SetPALTV) tempbx += 2; - if(SiS_Pr->SiS_VBInfo & SetCHTVOverScan) tempbx += 1; + if(SiS_Pr->SiS_VBInfo & SetCHTVOverScan) tempbx += 1; + if(SiS_Pr->SiS_VBInfo & SetPALTV) { + tempbx += 2; + if(SiS_Pr->SiS_CHSOverScan) tempbx = 99; + if(SiS_Pr->SiS_CHPALM) { + tempbx = 90; + if(SiS_Pr->SiS_VBInfo & SetCHTVOverScan) tempbx += 1; + } else if(SiS_Pr->SiS_CHPALN) { + tempbx = 92; + if(SiS_Pr->SiS_VBInfo & SetCHTVOverScan) tempbx += 1; + } + + } } + } - if(Flag == 1) { - tempbx = SiS_Pr->SiS_LCDResInfo - SiS_Pr->SiS_PanelMinLVDS; + if(Flag) { + if(SiS_Pr->SiS_LCDResInfo <= SiS_Pr->SiS_Panel1280x1024) { - if(SiS_Pr->SiS_LCDInfo & LCDNonExpanding) tempbx += 3; - } else { - if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) { - tempbx = 8; - if(SiS_Pr->SiS_LCDInfo & LCDNonExpanding) tempbx++; - } - if(SiS_Pr->SiS_LCDInfo & LCDPass11) { - tempbx = 7; - } - - if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel640x480) tempbx = 6; - - /* TW: Inserted from 630/LVDS 2.04.5c BIOS */ - if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x600) { - tempbx = 15; - if(SiS_Pr->SiS_LCDInfo & LCDNonExpanding) tempbx += 2; - } - if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1152x768) { - tempbx = 16; - if(SiS_Pr->SiS_LCDInfo & LCDNonExpanding) tempbx += 2; - } - } - } - - if(ModeNo <= 0x13) - tempal = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC; - else { - tempal = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC; - resinfo = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO; + tempbx = SiS_Pr->SiS_LCDResInfo - SiS_Pr->SiS_PanelMinLVDS; + if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) tempbx += 3; + } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x768) { + tempbx = 18; + if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) tempbx++; + } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel640x480) { + tempbx = 6; + } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x600) { + tempbx = 15; + if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) tempbx += 2; + } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1152x768) { + tempbx = 16; + if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) tempbx += 2; + } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) { + tempbx = 8; + if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) tempbx++; + } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200) { + tempbx = 21; + if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) tempbx++; + } + + if(SiS_Pr->SiS_LCDInfo & LCDPass11) { + tempbx = 7; + } + } if(SiS_Pr->SiS_IF_DEF_FSTN){ @@ -3391,21 +3904,23 @@ } } - /* TW: Inserted from 650/LVDS BIOS */ - if(SiS_Pr->SiS_SetFlag & CRT2IsVGA) { + if(SiS_Pr->SiS_SetFlag & SetDOSMode) { if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel640x480) tempal = 7; if(HwDeviceExtension->jChipType < SIS_315H) { - /* TW: Inserted from 630/LVDS (2.04.5c) and 630/301B (II) BIOS */ if(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x13) & 0x80) tempal++; } } - /* TW: Inserted from 630/301B BIOS */ if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { if(ModeNo > 0x13) { - if((resinfo == 0x0c) || (resinfo == 0x0d)) /* 720 */ - tempal = 6; + if(HwDeviceExtension->jChipType < SIS_315H) { + if((resinfo == 0x0c) || (resinfo == 0x0d)) /* 720 */ + tempal = 6; + } else { + if((resinfo == 0x0d) || (resinfo == 0x0e)) /* 720 */ + tempal = 6; + } } } @@ -3414,6 +3929,7 @@ } } +#ifdef SIS315H void SiS_GetCRT2PtrA(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex, USHORT RefreshRateTableIndex,USHORT *CRT2Index, @@ -3423,15 +3939,12 @@ tempbx = SiS_Pr->SiS_LCDResInfo; - if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200) { - tempbx = 4; - } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) { - tempbx = 3; - } else { - tempbx -= SiS_Pr->SiS_Panel1024x768; - } + if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200) tempbx = 4; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) tempbx = 3; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x960) tempbx = 2; + else tempbx -= SiS_Pr->SiS_Panel1024x768; - if(SiS_Pr->SiS_LCDInfo & LCDNonExpanding) tempbx += 5; + if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) tempbx += 5; if(ModeNo <= 0x13) tempal = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC; @@ -3441,8 +3954,8 @@ *CRT2Index = tempbx; *ResIndex = tempal & 0x1F; } +#endif -/* TW: New from 650/301LVx BIOS */ void SiS_GetCRT2Part2Ptr(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex, USHORT RefreshRateTableIndex,USHORT *CRT2Index, @@ -3457,14 +3970,13 @@ tempbx = SiS_Pr->SiS_LCDResInfo; - if(SiS_Pr->SiS_LCDInfo & LCDNonExpanding) tempbx += 16; + if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) tempbx += 16; else if(SiS_Pr->SiS_SetFlag & LCDVESATiming) tempbx += 32; *CRT2Index = tempbx; *ResIndex = tempal & 0x3F; } -/* TW: Checked against all (incl 650/LVDS (1.10.07), 630/301B, 630/301) BIOSes */ USHORT SiS_GetRatePtrCRT2(SiS_Private *SiS_Pr, UCHAR *ROMAddr, USHORT ModeNo, USHORT ModeIdIndex, PSIS_HW_DEVICE_INFO HwDeviceExtension) @@ -3476,7 +3988,9 @@ USHORT RefreshRateTableIndex,i,backup_i; USHORT modeflag,index,temp,backupindex; - if (ModeNo <= 0x13) + if(SiS_Pr->UseCustomMode) return 0; + + if(ModeNo <= 0x13) modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag; else modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag; @@ -3507,8 +4021,10 @@ if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) index = 0; } else { if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { - if(HwDeviceExtension->jChipType < SIS_315H) index = 0; - else if(SiS_Pr->SiS_LCDInfo & LCDNonExpanding) index = backupindex = 0; + if(SiS_Pr->SiS_VBType & VB_NoLCD) + index = 0; + else if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) + index = backupindex = 0; } } } @@ -3521,9 +4037,10 @@ } if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) { if(SiS_Pr->SiS_IF_DEF_LVDS == 0) { - /* TW: This is not done in 630/301B BIOS */ - temp = LCDRefreshIndex[SiS_Pr->SiS_LCDResInfo]; - if(index > temp) index = temp; + if(!(SiS_Pr->SiS_VBType & VB_NoLCD)) { + temp = LCDRefreshIndex[SiS_Pr->SiS_LCDResInfo]; + if(index > temp) index = temp; + } } else { index = 0; } @@ -3533,15 +4050,14 @@ RefreshRateTableIndex = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].REFindex; ModeNo = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].ModeID; - /* TW: Inserted from 650/LVDS 1.10.07, 650/301LVx 1.10.6s */ + /* TW: 650/LVDS 1.10.07, 650/30xLV 1.10.6s */ if(HwDeviceExtension->jChipType >= SIS_315H) { - if(!(SiS_Pr->SiS_VBInfo & DriverMode)) { - if( (SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_VESAID == 0x105) || - (SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_VESAID == 0x107) ) { - if(backupindex <= 1) - RefreshRateTableIndex++; - } - } + if(!(SiS_Pr->SiS_VBInfo & DriverMode)) { + if( (SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_VESAID == 0x105) || + (SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_VESAID == 0x107) ) { + if(backupindex <= 1) RefreshRateTableIndex++; + } + } } i = 0; @@ -3598,7 +4114,6 @@ tempax = 0; if(SiS_Pr->SiS_IF_DEF_LVDS == 0) { - /* TW: For 301, 301B, 302B, 301LV, 302LV */ if(SiS_Pr->SiS_VBInfo & SetCRT2ToRAMDAC) { tempax |= SupportRAMDAC2; if(HwDeviceExtension->jChipType >= SIS_315H) { @@ -3615,22 +4130,20 @@ if(HwDeviceExtension->jChipType >= SIS_315H) { if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1600x1200) { if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1400x1050) { - if((resinfo == 6) && (SiS_Pr->SiS_LCDInfo & LCDNonExpanding)) { - tempax |= SupportAllCRT2; - (*i) = 0; /* TW: Restore RefreshTableIndex (BIOS 650/301LVx 1.10.6s) */ + if((resinfo == 6) && (SiS_Pr->SiS_LCDInfo & DontExpandLCD)) { + (*i) = 0; return(1); } else { if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1280x1024) { - if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1280x960) { - if((resinfo == 6) && (SiS_Pr->SiS_LCDInfo & LCDNonExpanding)) { - return(0); - } else { - if((resinfo >= 9) && (resinfo != 0x14)) { - tempax = 0; + if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1280x960) { + if((resinfo == 6) && (SiS_Pr->SiS_LCDInfo & DontExpandLCD)) { + return(0); + } else { + if((resinfo >= 9) && (resinfo != 0x14)) { return(0); - } - } - } + } + } + } } } } @@ -3653,19 +4166,29 @@ } } } -#ifdef oldHV - if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) { /* for HiTV */ - tempax |= SupportHiVisionTV; - if(SiS_Pr->SiS_VBInfo & SetInSlaveMode){ - if(resinfo == 4) return(0); - if(resinfo == 3) { - if(SiS_Pr->SiS_SetFlag & TVSimuMode) return(0); - } - if(resinfo > 7) return(0); - } + if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) { + if(SiS_Pr->SiS_HiVision == 3) { + tempax |= SupportHiVisionTV2; + if(SiS_Pr->SiS_VBInfo & SetInSlaveMode){ + if(resinfo == 4) return(0); + if(resinfo == 3) return(0); + if(resinfo == 7) { + if(SiS_Pr->SiS_SetFlag & TVSimuMode) return(0); + } + if(resinfo > 7) return(0); + } + } else { + tempax |= SupportHiVisionTV; + if(SiS_Pr->SiS_VBInfo & SetInSlaveMode){ + if(resinfo == 4) return(0); + if((resinfo == 3) || (resinfo == 7)) { + if(SiS_Pr->SiS_SetFlag & TVSimuMode) return(0); + } + if(resinfo > 7) return(0); + } + } } else { -#endif - if(SiS_Pr->SiS_VBInfo & (SetCRT2ToAVIDEO|SetCRT2ToSVIDEO|SetCRT2ToSCART)) { + if(SiS_Pr->SiS_VBInfo & (SetCRT2ToAVIDEO|SetCRT2ToSVIDEO|SetCRT2ToSCART)) { tempax |= SupportTV; tempax |= SupportTV1024; if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { @@ -3767,10 +4290,9 @@ } else return(0); } } - } -#ifdef oldHV + } } -#endif + } else { /* TW: for LVDS */ if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) { @@ -3821,7 +4343,6 @@ return(1); } -/* Checked against 650/LVDS (1.10.07) and 650/301LV BIOS */ void SiS_SaveCRT2Info(SiS_Private *SiS_Pr, USHORT ModeNo) { @@ -3834,88 +4355,121 @@ SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x31,temp2,temp1); } -/* TW: Checked against 650+301, 650/LVDS (1.10.07) and 650/301LVx (1.10.6s) BIOS */ void SiS_GetVBInfo(SiS_Private *SiS_Pr, USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo, - USHORT ModeIdIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension) + USHORT ModeIdIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension, + int checkcrt2mode) { USHORT tempax,tempbx,temp; USHORT modeflag, resinfo=0; UCHAR OutputSelect = *SiS_Pr->pSiS_OutputSelect; - if (ModeNo<=0x13) + if(SiS_Pr->UseCustomMode) { + modeflag = SiS_Pr->CModeFlag; + } else { + if (ModeNo <= 0x13) modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag; - else { + else { modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag; resinfo = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO; - } + } + } SiS_Pr->SiS_SetFlag = 0; SiS_Pr->SiS_ModeType = modeflag & ModeInfoFlag; tempbx = 0; - if(SiS_BridgeIsOn(SiS_Pr,BaseAddr,HwDeviceExtension) == 0) { /* TW: "== 0" inserted from 630/301B BIOS */ + if(SiS_BridgeIsOn(SiS_Pr,BaseAddr,HwDeviceExtension) == 0) { temp = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x30); - if(SiS_Pr->SiS_HiVision & 0x03) { /* TW: New from 650/301LVx 1.10.6s */ - temp &= (SetCRT2ToHiVisionTV | SwitchToCRT2 | SetSimuScanMode); /* 0x83 */ - temp |= SetCRT2ToHiVisionTV; /* 0x80 */ - } - if(SiS_Pr->SiS_HiVision & 0x04) { /* TW: New from 650/301LVx 1.10.6s */ - temp &= (SetCRT2ToHiVisionTV | SwitchToCRT2 | SetSimuScanMode); /* 0x83 */ - temp |= SetCRT2ToSVIDEO; /* 0x08 */ - } -#if 0 /* TW: Not in 650/301LVx 1.10.6s BIOS */ - if(SiS_Pr->SiS_VBType & VB_SIS30xLV) { - temp &= 0xbf; /* 301lvds disable CRT2RAMDAC */ - } -#endif +#if 0 + /* SiS_HiVision is only used on 310/325/330+30xLV */ + if(SiS_Pr->SiS_VBType & (VB_SIS301LV302LV)) { + if(SiS_Pr->SiS_HiVision & 0x03) { /* TW: New from 650/30xLV 1.10.6s */ + temp &= (SetCRT2ToHiVisionTV | SwitchToCRT2 | SetSimuScanMode); /* 0x83 */ + temp |= SetCRT2ToHiVisionTV; /* 0x80 */ + } + if(SiS_Pr->SiS_HiVision & 0x04) { /* TW: New from 650/30xLV 1.10.6s */ + temp &= (SetCRT2ToHiVisionTV | SwitchToCRT2 | SetSimuScanMode); /* 0x83 */ + temp |= SetCRT2ToSVIDEO; /* 0x08 */ + } + } +#endif if(SiS_Pr->SiS_IF_DEF_FSTN) { /* fstn must set CR30=0x21 */ temp = (SetCRT2ToLCD | SetSimuScanMode); SiS_SetReg1(SiS_Pr->SiS_P3d4,0x30,temp); } tempbx |= temp; - temp = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x31); - tempax = temp << 8; - tempax &= (LoadDACFlag | DriverMode | SetDispDevSwitch | /* TW: Inserted from 650/LVDS+301LV BIOS */ - SetNotSimuMode | SetPALTV); /* TW: Inserted from 650/LVDS+301LV BIOS */ + tempax = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x31) << 8; + tempax &= (LoadDACFlag | DriverMode | SetDispDevSwitch | SetNotSimuMode | SetPALTV); tempbx |= tempax; - temp = SetCHTVOverScan | SetInSlaveMode | DisableCRT2Display; - temp = 0xFFFF ^ temp; - tempbx &= temp; + tempbx &= ~(SetCHTVOverScan | SetInSlaveMode | DisableCRT2Display);; + #ifdef SIS315H + if(HwDeviceExtension->jChipType >= SIS_315H) { - temp = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x38); - if(SiS_Pr->SiS_VBType & (VB_SIS302B | VB_SIS30xLV | VB_SIS30xNEW)) { - if((SiS_GetReg1(SiS_Pr->SiS_P3d4, 0x36) & 0x0f) == SiS_Pr->SiS_Panel1400x1050) { - if(tempbx & SetCRT2ToLCD) { - if(ModeNo <= 0x13) { - if(SiS_CRT2IsLCD(SiS_Pr, BaseAddr)) { - if(!(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x31) & (SetNotSimuMode >> 8))) { - SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x38,0x03); - } - } - } + if(SiS_Pr->SiS_VBType & (VB_SIS302B | VB_SIS301LV | VB_SIS302LV)) { + /* From 1.10.7w, not in 1.10.8r */ + if(ModeNo == 0x03) { + /* Mode 0x03 is never in driver mode */ + SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x31,0xbf); + } + /* From 1.10.7w, not in 1.10.8r */ + if(!(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x31) & (DriverMode >> 8))) { + /* Reset LCDA setting */ + SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x38,0xfc); + } + if(IS_SIS650) { + if(SiS_Pr->SiS_UseLCDA) { + if(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x5f) & 0xF0) { + if((ModeNo <= 0x13) || (!(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x31) & (DriverMode >> 8)))) { + SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x38,(EnableDualEdge | SetToLCDA)); /* 3 */ + } } - } - if((temp & (EnableDualEdge | SetToLCDA)) - == (EnableDualEdge | SetToLCDA)) /* TW: BIOS only tests these bits, added "& ..." */ + } +#if 0 /* We can't detect it this way; there are machines which do not use LCDA despite + * the chip revision + */ + if((tempbx & SetCRT2ToLCD) && (SiS_GetReg1(SiS_Pr->SiS_P3d4,0x30) & SetCRT2ToLCD)) { + if((SiS_GetReg1(SiS_Pr->SiS_P3d4, 0x36) & 0x0f) == SiS_Pr->SiS_Panel1400x1050) { + if((ModeNo <= 0x13) || (!(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x31) & (DriverMode >> 8)))) { + if(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x5f) & 0xF0) { + SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x38,(EnableDualEdge | SetToLCDA)); /* 3 */ + } + } + } else { + if((ModeNo <= 0x13) || (!(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x31) & (DriverMode >> 8)))) { + if(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x5f) & 0xF0) { + SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x38,(EnableDualEdge | SetToLCDA)); /* 3 */ + } + } + } + } +#endif + } + temp = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x38); + if((temp & (EnableDualEdge | SetToLCDA)) == (EnableDualEdge | SetToLCDA)) { tempbx |= SetCRT2ToLCDA; + } } - /* TW: Inserted from 650/LVDS 1.10.07 BIOS: */ + if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { + temp = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x38); if(temp & SetToLCDA) - tempbx |= SetCRT2ToLCDA; - if(temp & EnableLVDSHiVision) - tempbx |= SetCRT2ToHiVisionTV; + tempbx |= SetCRT2ToLCDA; + if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) { + if(temp & EnableLVDSHiVision) + tempbx |= SetCRT2ToHiVisionTV; + } } } -#endif + +#endif /* SIS315H */ + if(SiS_Pr->SiS_IF_DEF_LVDS == 0) { - temp = SetCRT2ToLCDA | SetCRT2ToSCART | SetCRT2ToLCD | - SetCRT2ToRAMDAC | SetCRT2ToSVIDEO | SetCRT2ToAVIDEO; /* = 0x807C; */ - if(SiS_Pr->SiS_IF_DEF_HiVision == 1) - temp |= SetCRT2ToHiVisionTV; /* = 0x80FC; */ + temp = SetCRT2ToLCDA | SetCRT2ToSCART | SetCRT2ToLCD | + SetCRT2ToRAMDAC | SetCRT2ToSVIDEO | SetCRT2ToAVIDEO | /* = 0x807C; */ + SetCRT2ToHiVisionTV; /* = 0x80FC; */ } else { if(HwDeviceExtension->jChipType >= SIS_315H) { if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) @@ -3937,23 +4491,25 @@ tempbx = 0; } - if(SiS_Pr->SiS_IF_DEF_LVDS==0) { + if(SiS_Pr->SiS_IF_DEF_LVDS == 0) { if(tempbx & SetCRT2ToLCDA) { tempbx &= (0xFF00|SwitchToCRT2|SetSimuScanMode); - } else if(tempbx & SetCRT2ToRAMDAC) { + } + if(tempbx & SetCRT2ToRAMDAC) { tempbx &= (0xFF00|SetCRT2ToRAMDAC|SwitchToCRT2|SetSimuScanMode); - } else if((tempbx & SetCRT2ToLCD) && (!(SiS_Pr->SiS_VBType & VB_NoLCD)) ){ + } + if((tempbx & SetCRT2ToLCD) /* && (!(SiS_Pr->SiS_VBType & VB_NoLCD)) */ ) { + /* We initialize the Panel Link of the type of bridge is DH */ tempbx &= (0xFF00|SetCRT2ToLCD|SwitchToCRT2|SetSimuScanMode); - } else if(tempbx & SetCRT2ToSCART){ + } + if(tempbx & SetCRT2ToSCART) { tempbx &= (0xFF00|SetCRT2ToSCART|SwitchToCRT2|SetSimuScanMode); tempbx |= SetPALTV; - } -#if 0 /* TW: Not done in 650/301LVx 1.10.6s BIOS */ - } else if(tempbx & SetCRT2ToHiVisionTV){ + } + if(tempbx & SetCRT2ToHiVisionTV) { tempbx &= (0xFF00|SetCRT2ToHiVisionTV|SwitchToCRT2|SetSimuScanMode); tempbx |= SetPALTV; } -#endif } else { /* LVDS */ if(HwDeviceExtension->jChipType >= SIS_315H) { if(tempbx & SetCRT2ToLCDA) @@ -3971,57 +4527,54 @@ tempbx |= SetCRT2ToLCD; } } + if(tempax & DisableCRT2Display) { if(!(tempbx & (SwitchToCRT2 | SetSimuScanMode))) { tempbx = SetSimuScanMode | DisableCRT2Display; } } + if(!(tempbx & DriverMode)){ tempbx |= SetSimuScanMode; } - /* TW: LVDS (LCD/TV) and 630+301B (LCD) can only be slave in 8bpp modes */ - if( (SiS_Pr->SiS_IF_DEF_LVDS == 1) && (SiS_Pr->SiS_ModeType <= ModeVGA) ) { - modeflag &= (~CRT2Mode); - } - if( (HwDeviceExtension->jChipType < SIS_315H) && (SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV)) { - if(SiS_Pr->SiS_ModeType <= ModeVGA) { - if(tempbx & SetCRT2ToLCD) { - modeflag &= (~CRT2Mode); - } - } + /* TW: LVDS (LCD/TV) and 301BDH (LCD) can only be slave in 8bpp modes */ + if(SiS_Pr->SiS_ModeType <= ModeVGA) { + if( (SiS_Pr->SiS_IF_DEF_LVDS == 1) || + ((tempbx & SetCRT2ToLCD) && (SiS_Pr->SiS_VBType & VB_NoLCD)) ) { + modeflag &= (~CRT2Mode); + } } - /* TW end */ - + if(!(tempbx & SetSimuScanMode)){ - if(tempbx & SwitchToCRT2) { - if(!(modeflag & CRT2Mode)) { - if( (HwDeviceExtension->jChipType >= SIS_315H) && - (SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) ) { - if(resinfo != 0x0a) - tempbx |= SetSimuScanMode; - } else { - tempbx |= SetSimuScanMode; - } - } - } else { - if(!(SiS_BridgeIsEnable(SiS_Pr,BaseAddr,HwDeviceExtension))) { - if(!(tempbx & DriverMode)) { - if(SiS_BridgeInSlave(SiS_Pr)) { - tempbx |= SetSimuScanMode; /* TW: from BIOS 650/301/301LV/LVDS */ - } - } - } - } + if(tempbx & SwitchToCRT2) { + if((!(modeflag & CRT2Mode)) && (checkcrt2mode)) { + if( (HwDeviceExtension->jChipType >= SIS_315H) && + (SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) ) { + if(resinfo != 0x0a) + tempbx |= SetSimuScanMode; + } else { + tempbx |= SetSimuScanMode; + } + } + } else { + if(!(SiS_BridgeIsEnable(SiS_Pr,BaseAddr,HwDeviceExtension))) { + if(!(tempbx & DriverMode)) { + if(SiS_BridgeInSlave(SiS_Pr)) { + tempbx |= SetSimuScanMode; + } + } + } + } } if(!(tempbx & DisableCRT2Display)) { if(tempbx & DriverMode) { if(tempbx & SetSimuScanMode) { - if(!(modeflag & CRT2Mode)) { + if((!(modeflag & CRT2Mode)) && (checkcrt2mode)) { if( (HwDeviceExtension->jChipType >= SIS_315H) && - (SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) ) { - if(resinfo != 0x0a) { /* TW: Inserted from 650/301 BIOS */ + (SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) ) { + if(resinfo != 0x0a) { /* TW: 650/301 BIOS */ tempbx |= SetInSlaveMode; if(SiS_Pr->SiS_IF_DEF_LVDS == 0) { if(tempbx & SetCRT2ToTV) { @@ -4029,7 +4582,7 @@ SiS_Pr->SiS_SetFlag |= TVSimuMode; } } - } /* TW: Inserted from 650/301 BIOS */ + } /* TW: 650/301 BIOS */ } else { tempbx |= SetInSlaveMode; if(SiS_Pr->SiS_IF_DEF_LVDS == 0) { @@ -4066,9 +4619,9 @@ } } - if(SiS_Pr->SiS_IF_DEF_LVDS==0) { + if(SiS_Pr->SiS_IF_DEF_LVDS == 0) { #ifdef SIS300 - if((HwDeviceExtension->jChipType==SIS_630)|| + if((HwDeviceExtension->jChipType==SIS_630) || (HwDeviceExtension->jChipType==SIS_730)) { if(ROMAddr && SiS_Pr->SiS_UseROM) { OutputSelect = ROMAddr[0xfe]; @@ -4078,9 +4631,7 @@ if(tempbx & SetCRT2ToTV) { if(tempbx & SetPALTV) { temp = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x35); - /* temp &= 0xC0; */ /* TW: BIOS only tests 0x40, not 0x80 */ - if(temp & 0x40) - tempbx &= (~SetPALTV); + if(temp & EnablePALM) tempbx &= (~SetPALTV); } } } @@ -4088,29 +4639,49 @@ #ifdef SIS315H if(HwDeviceExtension->jChipType >= SIS_315H) { if(ROMAddr && SiS_Pr->SiS_UseROM) { - OutputSelect = ROMAddr[0xf3]; + OutputSelect = ROMAddr[0xf3]; + if(HwDeviceExtension->jChipType == SIS_330) { + OutputSelect = ROMAddr[0x11b]; + } } if(!(OutputSelect & EnablePALMN)) SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x38,0x3F); if(tempbx & SetCRT2ToTV) { if(tempbx & SetPALTV) { temp = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x38); - if(temp & 0x40) - tempbx &= (~SetPALTV); + if(temp & EnablePALM) tempbx &= (~SetPALTV); } } } #endif } + + /* PALM/PALN on Chrontel 7019 */ + SiS_Pr->SiS_CHPALM = SiS_Pr->SiS_CHPALN = FALSE; + if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) { + if(tempbx & SetCRT2ToTV) { + if(tempbx & SetPALTV) { + temp = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x38); + if(temp & EnablePALM) SiS_Pr->SiS_CHPALM = TRUE; + else if(temp & EnablePALN) SiS_Pr->SiS_CHPALN = TRUE; + } + } + } + + SiS_Pr->SiS_VBInfo = tempbx; - SiS_Pr->SiS_VBInfo=tempbx; + if(HwDeviceExtension->jChipType == SIS_630) { + SiS_WhatIsThis(SiS_Pr, SiS_Pr->SiS_VBInfo); + } #ifdef TWDEBUG #ifdef LINUX_KERNEL - printk(KERN_INFO "sisfb: (VBInfo= 0x%04x, SetFlag=0x%04x)\n", SiS_Pr->SiS_VBInfo, SiS_Pr->SiS_SetFlag); + printk(KERN_DEBUG "sisfb: (VBInfo= 0x%04x, SetFlag=0x%04x)\n", + SiS_Pr->SiS_VBInfo, SiS_Pr->SiS_SetFlag); #endif #ifdef LINUX_XF86 - xf86DrvMsg(0, X_PROBED, "(init301: VBInfo=0x%04x, SetFlag=0x%04x)\n", SiS_Pr->SiS_VBInfo, SiS_Pr->SiS_SetFlag); + xf86DrvMsgVerb(0, X_PROBED, 3, "(init301: VBInfo=0x%04x, SetFlag=0x%04x)\n", + SiS_Pr->SiS_VBInfo, SiS_Pr->SiS_SetFlag); #endif #endif @@ -4128,7 +4699,7 @@ SiS_SetRegAND(SiS_Pr->SiS_P3d4, 0x31, 0xF7); if(ModeNo == 0x13) bp+4 = 0x03; } else { - /* From 650/301LVx BIOS: */ + /* From 650/30xLV BIOS: */ SiS_SetRegAND(SiS_Pr->SiS_P3d4, 0x31, 0xF7); if(ModeNo == 0x13) bp+4 = 0x03; else bp+4 = ModeNo; @@ -4140,14 +4711,48 @@ } void +SiS_WhatIsThis(SiS_Private *SiS_Pr, USHORT myvbinfo) +{ + unsigned long eax, temp; + unsigned short temp1; + + if(!(SiS_Pr->SiS_ChSW)) return; + +#ifndef LINUX_XF86 + SiS_SetReg4(0xcf8,0x80000874); + eax = SiS_GetReg3(0xcfc); +#else + eax = pciReadLong(0x00000800, 0x74); +#endif + eax &= 0xFFFF; + temp = eax; + eax += 0x3c; + temp1 = SiS_GetReg4((USHORT)eax); + temp1 &= 0xFEFF; + SiS_SetReg5((USHORT)eax, temp1); + temp1 = SiS_GetReg4((USHORT)eax); + eax = temp; + eax += 0x3a; + temp1 = SiS_GetReg4((USHORT)eax); + temp1 &= 0xFEFF; + if(!(myvbinfo & SetCRT2ToTV)) { + temp1 |= 0x0100; + } + SiS_SetReg5((USHORT)eax, temp1); + temp1 = SiS_GetReg4((USHORT)eax); +} + +void SiS_GetRAMDAC2DATA(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex, USHORT RefreshRateTableIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension) { - USHORT tempax,tempbx,temp; - USHORT temp1,temp2,modeflag=0,tempcx; + USHORT tempax=0,tempbx=0; + USHORT temp1=0,modeflag=0,tempcx=0; USHORT StandTableIndex,CRT1Index; - USHORT ResInfo,DisplayType; +#ifdef SIS315H + USHORT ResInfo,DisplayType,temp=0; const SiS_LVDSCRT1DataStruct *LVDSCRT1Ptr = NULL; +#endif SiS_Pr->SiS_RVBHCMAX = 1; SiS_Pr->SiS_RVBHCFACT = 1; @@ -4158,12 +4763,13 @@ StandTableIndex = SiS_GetModePtr(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex); tempax = SiS_Pr->SiS_StandTable[StandTableIndex].CRTC[0]; tempbx = SiS_Pr->SiS_StandTable[StandTableIndex].CRTC[6]; - temp1 = SiS_Pr->SiS_StandTable[StandTableIndex].CRTC[7]; + temp1 = SiS_Pr->SiS_StandTable[StandTableIndex].CRTC[7]; } else { if( (SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) ) { +#ifdef SIS315H temp = SiS_GetLVDSCRT1Ptr(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex, RefreshRateTableIndex,&ResInfo,&DisplayType); @@ -4205,33 +4811,36 @@ case 37: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11600x1200_1_H; break; case 38: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11600x1200_2; break; case 39: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11600x1200_2_H; break; + case 99: LVDSCRT1Ptr = SiS_Pr->SiS_CHTVCRT1OPAL; break; + default: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11024x768_1; break; } - temp1 = (LVDSCRT1Ptr+ResInfo)->CR[0]; - temp2 = (LVDSCRT1Ptr+ResInfo)->CR[14]; - tempax = (temp1 & 0xFF) | ((temp2 & 0x03) << 8); + tempax = (LVDSCRT1Ptr+ResInfo)->CR[0]; + tempax |= (LVDSCRT1Ptr+ResInfo)->CR[14] << 8; + tempax &= 0x03FF; tempbx = (LVDSCRT1Ptr+ResInfo)->CR[6]; - tempcx = (LVDSCRT1Ptr+ResInfo)->CR[13]<<8; - tempcx = tempcx & 0x0100; - tempcx = tempcx << 2; - tempbx = tempbx | tempcx; - temp1 = (LVDSCRT1Ptr+ResInfo)->CR[7]; + tempcx = (LVDSCRT1Ptr+ResInfo)->CR[13] << 8; + tempcx &= 0x0100; + tempcx <<= 2; + tempbx |= tempcx; + temp1 = (LVDSCRT1Ptr+ResInfo)->CR[7]; +#endif } else { modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag; CRT1Index = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC; - if(HwDeviceExtension->jChipType < SIS_315H) { - CRT1Index &= 0x3F; - } - temp1 = (USHORT)SiS_Pr->SiS_CRT1Table[CRT1Index].CR[0]; - temp2 = (USHORT)SiS_Pr->SiS_CRT1Table[CRT1Index].CR[14]; - tempax = (temp1 & 0xFF) | ((temp2 & 0x03) << 8); - tempbx = (USHORT)SiS_Pr->SiS_CRT1Table[CRT1Index].CR[6]; - tempcx = (USHORT)SiS_Pr->SiS_CRT1Table[CRT1Index].CR[13]<<8; - tempcx = tempcx & 0x0100; - tempcx = tempcx << 2; - tempbx = tempbx | tempcx; - temp1 = (USHORT)SiS_Pr->SiS_CRT1Table[CRT1Index].CR[7]; +#if 0 /* Not any longer */ + if(HwDeviceExtension->jChipType < SIS_315H) CRT1Index &= 0x3F; +#endif + tempax = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[0]; + tempax |= SiS_Pr->SiS_CRT1Table[CRT1Index].CR[14] << 8; + tempax &= 0x03FF; + tempbx = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[6]; + tempcx = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[13] << 8; + tempcx &= 0x0100; + tempcx <<= 2; + tempbx |= tempcx; + temp1 = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[7]; } @@ -4239,15 +4848,18 @@ if(temp1 & 0x01) tempbx |= 0x0100; if(temp1 & 0x20) tempbx |= 0x0200; + tempax += 5; /* Charx8Dot is no more used (and assumed), so we set it */ - modeflag |= Charx8Dot; + if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { + modeflag |= Charx8Dot; + } if(modeflag & Charx8Dot) tempax *= 8; else tempax *= 9; - /* TW: From 650/301LVx 1.10.6s */ + /* TW: From 650/30xLV 1.10.6s */ if(modeflag & HalfDCLK) tempax <<= 1; SiS_Pr->SiS_VGAHT = SiS_Pr->SiS_HT = tempax; @@ -4283,7 +4895,10 @@ void SiS_DisableBridge(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr) { - USHORT tempah,pushax,temp=0; +#ifdef SIS315H + USHORT tempah,pushax=0,modenum; +#endif + USHORT temp=0; UCHAR *ROMAddr = HwDeviceExtension->pjVirtualRomBase; if (SiS_Pr->SiS_IF_DEF_LVDS == 0) { @@ -4292,168 +4907,315 @@ if(HwDeviceExtension->jChipType < SIS_315H) { - /* 300 series */ - - if(!(SiS_CR36BIOSWord23b(SiS_Pr,HwDeviceExtension))) { - SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x11,0xF7,0x08); - SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 3); - } - if(SiS_Is301B(SiS_Pr,BaseAddr)) { - SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x1f,0x3f); - SiS_ShortDelay(SiS_Pr,1); - } - SiS_SetRegAND(SiS_Pr->SiS_Part2Port,0x00,0xDF); - SiS_DisplayOff(SiS_Pr); - SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x32,0xDF); - SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1E,0xDF); - SiS_UnLockCRT2(SiS_Pr,HwDeviceExtension,BaseAddr); - SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x01,0x80); - SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x02,0x40); - if( (!(SiS_CRT2IsLCD(SiS_Pr,BaseAddr))) || - (!(SiS_CR36BIOSWord23d(SiS_Pr,HwDeviceExtension))) ) { - SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 2); - SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x11,0xFB,0x04); - } - - } else { - - /* 310 series */ +#ifdef SIS300 /* 300 series */ -#ifdef SIS650301NEW /* From 650/301LVx 1.10.6s */ - if(!(SiS_IsM650or651(SiS_Pr,HwDeviceExtension, BaseAddr))) { - tempah = 0xef; - if(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) { - tempah = 0xf7; - } - SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x4c,tempah); - } + if(HwDeviceExtension->jChipType == SIS_300) { /* New for 300+301LV */ - SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x30,0x00); + if(!(SiS_CR36BIOSWord23b(SiS_Pr,HwDeviceExtension))) { + if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) { + SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x26,0xFE,0x00); + SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 3); + } + } + if(SiS_Is301B(SiS_Pr,BaseAddr)) { + SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x1f,0x3f); + SiS_ShortDelay(SiS_Pr,1); + } + SiS_SetRegAND(SiS_Pr->SiS_Part2Port,0x00,0xDF); + SiS_DisplayOff(SiS_Pr); + SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x32,0xDF); + SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1E,0xDF); + if( (!(SiS_CRT2IsLCD(SiS_Pr,BaseAddr,HwDeviceExtension))) || + (!(SiS_CR36BIOSWord23d(SiS_Pr,HwDeviceExtension))) ) { + SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 2); + SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x11,0xFB,0x04); + } - if(!(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr))) { - SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x26,0xFE,0x00); - } else if(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) { - SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x26,0xFE,0x00); - } + } else { - SiS_SetReg3(SiS_Pr->SiS_P3c6,0x00); + if(!(SiS_CR36BIOSWord23b(SiS_Pr,HwDeviceExtension))) { + SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x11,0xF7,0x08); + SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 3); + } + if(SiS_Is301B(SiS_Pr,BaseAddr)) { + SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x1f,0x3f); + SiS_ShortDelay(SiS_Pr,1); + } + SiS_SetRegAND(SiS_Pr->SiS_Part2Port,0x00,0xDF); + SiS_DisplayOff(SiS_Pr); + SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x32,0xDF); + SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1E,0xDF); + SiS_UnLockCRT2(SiS_Pr,HwDeviceExtension,BaseAddr); + SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x01,0x80); + SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x02,0x40); + if( (!(SiS_CRT2IsLCD(SiS_Pr,BaseAddr,HwDeviceExtension))) || + (!(SiS_CR36BIOSWord23d(SiS_Pr,HwDeviceExtension))) ) { + SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 2); + SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x11,0xFB,0x04); + } + } - pushax = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x06); +#endif /* SIS300 */ - SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 3); + } else { - if(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) { +#ifdef SIS315H /* 310/325 series */ - SiS_DisplayOff(SiS_Pr); - SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 2); - SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x32,0xDF); - SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x1E,0xDF); + if(IS_SIS650740) { /* 650, 740 */ - } else { +#if 0 + if(SiS_GetReg1(SiS_Pr->SiS_Part4Port,0x00) != 1) return; /* From 1.10.7w */ +#endif - SiS_DisplayOff(SiS_Pr); - SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x00,0x80); - SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 2); - SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x32,0xDF); - temp = SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x00); - SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x00,0x10); - SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1E,0xDF); - SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x00,temp); + modenum = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x34); - } + if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) { + + SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x30,0x00); + + if( (modenum <= 0x13) || + (!(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr))) || + (SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) ) { + SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x26,0xFE,0x00); + } + SiS_DDC2Delay(SiS_Pr,0xff00); + SiS_DDC2Delay(SiS_Pr,0x6000); + SiS_DDC2Delay(SiS_Pr,0x8000); + + SiS_SetReg3(SiS_Pr->SiS_P3c6,0x00); + + pushax = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x06); + + if(IS_SIS740) { + SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x06,0xE3); + } + + SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 3); + + if(!(SiS_IsNotM650or651(SiS_Pr,HwDeviceExtension, BaseAddr))) { + tempah = 0xef; + if(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) { + tempah = 0xf7; + } + SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x4c,tempah); + } - tempah = 0x3f; - if(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr)) { - tempah = 0x7f; - if(!(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr))) { - tempah = 0xbf; } - } - SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x1F,tempah); - SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x2e,0x7f); + if(SiS_Pr->SiS_VBType & VB_SIS301B302B) { + tempah = 0x3f; + if(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr)) { + tempah = 0x7f; + if(!(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr))) { + tempah = 0xbf; + } + } + SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x1F,tempah); + } - if(!(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr))) { - SiS_SetRegAND(SiS_Pr->SiS_Part2Port,0x00,0xdf); - } + if((SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) || + ((SiS_Pr->SiS_VBType & VB_SIS301LV302LV) && (modenum <= 0x13))) { - if(!(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr))) { - if(!(SiS_CRT2IsLCD(SiS_Pr,BaseAddr))) { - if(!(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr))) { - SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x26,0xFD,0x00); - } - } - } + if(SiS_Pr->SiS_VBType & VB_SIS301B302B) { + SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x1E,0xDF); + SiS_DisplayOff(SiS_Pr); + SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x32,0xDF); + } else { + SiS_DisplayOff(SiS_Pr); + SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 2); + SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x32,0xDF); + SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x1E,0xDF); + if((SiS_Pr->SiS_VBType & VB_SIS301LV302LV) && (modenum <= 0x13)) { + SiS_DisplayOff(SiS_Pr); + SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x00,0x80); + SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 2); + SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x32,0xDF); + temp = SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x00); + SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x00,0x10); + SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1E,0xDF); + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x00,temp); + } + } - SiS_SetReg1(SiS_Pr->SiS_P3c4,0x06,pushax); + } else { + + if(SiS_Pr->SiS_VBType & VB_SIS301B302B) { + if(!(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr))) { + SiS_SetRegAND(SiS_Pr->SiS_Part2Port,0x00,0xdf); + SiS_DisplayOff(SiS_Pr); + } + SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x00,0x80); + SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x32,0xDF); + temp = SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x00); + SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x00,0x10); + SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1E,0xDF); + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x00,temp); + } else { + SiS_DisplayOff(SiS_Pr); + SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x00,0x80); + SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 2); + SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x32,0xDF); + temp = SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x00); + SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x00,0x10); + SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1E,0xDF); + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x00,temp); + } -#else /* TW: From 650/301LV BIOS */ + } - if(!(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr))) { - SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x26,0xFE,0x00); - SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 3); - } else if(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) { - SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x26,0xFE,0x00); - SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 3); - } + if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) { - /* TW: 301B dependent code starts here in 650/301LV BIOS */ - if(SiS_Is301B(SiS_Pr,BaseAddr)) { - tempah = 0x3f; - SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x1F,tempah); - } + SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x1f,~0x10); /* 1.10.8r */ + + tempah = 0x3f; + if(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr)) { + tempah = 0x7f; + if(!(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr))) { + tempah = 0xbf; + } + } + SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x1F,tempah); - SiS_SetRegAND(SiS_Pr->SiS_Part2Port,0x00,0xDF); - SiS_DisplayOff(SiS_Pr); + if(SiS_IsNotM650or651(SiS_Pr,HwDeviceExtension, BaseAddr)) { /* 1.10.8r */ + SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x2e,0x7f); + } /* 1.10.8r */ + if(!(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr))) { + SiS_SetRegAND(SiS_Pr->SiS_Part2Port,0x00,0xdf); + } - SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x00,0x80); + if(!(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr))) { + if(!(SiS_CRT2IsLCD(SiS_Pr,BaseAddr,HwDeviceExtension))) { + if(!(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr))) { + SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x26,0xFD,0x00); + } + } + } - SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x32,0xDF); + SiS_SetReg1(SiS_Pr->SiS_P3c4,0x06,pushax); - temp = SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x00); - SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x00,0x10); - SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1E,0xDF); - SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x00,temp); + } - /* TW: Inserted from 650/301LV BIOS */ - if(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) { - if(!(SiS_WeHaveBacklightCtrl(SiS_Pr,HwDeviceExtension, BaseAddr))) { - if(!(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr))) { - SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 2); - SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x26,0xFD,0x00); - SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 4); - } else if(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) { - SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 2); - SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x26,0xFD,0x00); - SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 4); - } - } - } else if(!(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr))) { - if(!(SiS_CRT2IsLCD(SiS_Pr,BaseAddr))) { - SiS_SetPanelDelay(SiS_Pr, ROMAddr, HwDeviceExtension, 2); - SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x26,0xFD,0x00); - SiS_SetPanelDelay(SiS_Pr, ROMAddr, HwDeviceExtension, 4); - } else if(!(SiS_WeHaveBacklightCtrl(SiS_Pr,HwDeviceExtension, BaseAddr))) { - if(!(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr))) { - SiS_SetPanelDelay(SiS_Pr, ROMAddr, HwDeviceExtension, 2); - SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x26,0xFD,0x00); - SiS_SetPanelDelay(SiS_Pr, ROMAddr, HwDeviceExtension, 4); - } else if(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) { - SiS_SetPanelDelay(SiS_Pr, ROMAddr, HwDeviceExtension, 2); - SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x26,0xFD,0x00); - SiS_SetPanelDelay(SiS_Pr, ROMAddr, HwDeviceExtension, 4); - } - } - } /* TW: 650/301LV end */ -#endif +#if 0 + } else if(IS_SIS740) { /* 740 */ + + if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) { /* 30xLV */ + + if( (!(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr))) || + (SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) ) { + SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x26,0xFE,0x00); + } + + SiS_SetReg3(SiS_Pr->SiS_P3c6,0x00); + + pushax = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x06); + + SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x06,0xE3); + + SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 3); + + if(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) { + SiS_DisplayOff(SiS_Pr); + SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 2); + SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x32,0xDF); + SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x1E,0xDF); + } else { + SiS_DisplayOff(SiS_Pr); + SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x00,0x80); + SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 2); + SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x32,0xDF); + temp = SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x00); + SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x00,0x10); + SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1E,0xDF); + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x00,temp); + } + + SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x1F,0x3F); + SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x1F,0xEF); /* (from 650) */ + + SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x2e,0x7f); + + if(!(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr))) { + SiS_SetRegAND(SiS_Pr->SiS_Part2Port,0x00,0xdf); + } + + if(!(SiS_WeHaveBacklightCtrl(SiS_Pr,HwDeviceExtension, BaseAddr))) { + if(!(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr))) { + if(!(SiS_CRT2IsLCD(SiS_Pr,BaseAddr,HwDeviceExtension))) { + if(!(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr))) { + SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x26,0xFD,0x00); + } + } + } + } + SiS_SetReg1(SiS_Pr->SiS_P3c4,0x06,pushax); + + } else { /* (301,) 301B */ + + if(SiS_Is301B(SiS_Pr,BaseAddr)) { + SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x1F,0x3F); + } + + SiS_SetRegAND(SiS_Pr->SiS_Part2Port,0x00,0xDF); + SiS_DisplayOff(SiS_Pr); + SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x00,0x80); + SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x32,0xDF); + + temp = SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x00); + SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x00,0x10); + SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1E,0xDF); + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x00,temp); + + } +#endif + } else { /* 315, 330 - all bridge types */ + + if(SiS_Is301B(SiS_Pr,BaseAddr)) { + tempah = 0x3f; + if(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr)) { + tempah = 0x7f; + if(!(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr))) { + tempah = 0xbf; + } + } + SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x1F,tempah); + if(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) { + SiS_DisplayOff(SiS_Pr); + SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x32,0xDF); + } + } + if( (!(SiS_Is301B(SiS_Pr,BaseAddr))) || + (!(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr))) ) { + + if( (!(SiS_Is301B(SiS_Pr,BaseAddr))) || + (!(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr))) ) { + + SiS_SetRegAND(SiS_Pr->SiS_Part2Port,0x00,0xDF); + SiS_DisplayOff(SiS_Pr); + + } + + SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x00,0x80); + + SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x32,0xDF); + + temp = SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x00); + SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x00,0x10); + SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1E,0xDF); + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x00,temp); + + } + + } /* 315/330 */ + +#endif /* SIS315H */ } } else { /* ============ TW: For 301 ================ */ if(HwDeviceExtension->jChipType < SIS_315H) { - if(SiS_CRT2IsLCD(SiS_Pr,BaseAddr)) { + if(SiS_CRT2IsLCD(SiS_Pr,BaseAddr,HwDeviceExtension)) { SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x11,0xF0,0x0B); SiS_SetPanelDelay(SiS_Pr, ROMAddr, HwDeviceExtension, 1); } @@ -4483,24 +5245,26 @@ if(HwDeviceExtension->jChipType < SIS_315H) { - /* 300 series */ +#ifdef SIS300 /* 300 series */ if(SiS_Pr->SiS_IF_DEF_CH70xx == 1) { -#if 0 /* TW: Implemented this for power saving, but it's not worth - * the problems - */ - if(SiS_Pr->SiS_Backup70xx == 0xff) { - SiS_Pr->SiS_Backup70xx = SiS_GetCH700x(SiS_Pr,0x0e); - } -#endif SiS_SetCH700x(SiS_Pr,0x090E); } - if(!(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x11) & 0x08)) { - - if(!(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x13) & 0x40)) { + if(HwDeviceExtension->jChipType == SIS_730) { + if(!(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x11) & 0x08)) { + SiS_WaitVBRetrace(SiS_Pr,HwDeviceExtension); + } + if(!(SiS_CR36BIOSWord23b(SiS_Pr,HwDeviceExtension))) { + SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x11,0xF7,0x08); + SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 3); + } + } else { + if(!(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x11) & 0x08)) { - if(!(SiS_CR36BIOSWord23b(SiS_Pr,HwDeviceExtension))) { + if(!(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x13) & 0x40)) { + + if(!(SiS_CR36BIOSWord23b(SiS_Pr,HwDeviceExtension))) { SiS_WaitVBRetrace(SiS_Pr,HwDeviceExtension); @@ -4510,8 +5274,9 @@ SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x11,0xF7,0x08); SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 3); - } - } + } + } + } } SiS_DisplayOff(SiS_Pr); @@ -4523,17 +5288,31 @@ SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x01,0x80); SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x02,0x40); - if( (!(SiS_CRT2IsLCD(SiS_Pr,BaseAddr))) || + if( (!(SiS_CRT2IsLCD(SiS_Pr,BaseAddr,HwDeviceExtension))) || (!(SiS_CR36BIOSWord23d(SiS_Pr,HwDeviceExtension))) ) { SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 2); SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x11,0xFB,0x04); } +#endif /* SIS300 */ + } else { - /* 310 series */ +#ifdef SIS315H /* 310/325 series */ - if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) { + if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) { + temp = SiS_GetCH701x(SiS_Pr,0x61); + if(temp < 1) { + SiS_SetCH701x(SiS_Pr,0xac76); + SiS_SetCH701x(SiS_Pr,0x0066); + } + + if(!(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr))) { + SiS_SetCH701x(SiS_Pr,0x3e49); + } else if(SiS_IsTVOrYPbPrOrScart(SiS_Pr,HwDeviceExtension, BaseAddr)) { + SiS_SetCH701x(SiS_Pr,0x3e49); + } + if(!(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr))) { SiS_Chrontel701xBLOff(SiS_Pr); SiS_Chrontel701xOff(SiS_Pr); @@ -4541,21 +5320,25 @@ SiS_Chrontel701xBLOff(SiS_Pr); SiS_Chrontel701xOff(SiS_Pr); } + + } - if(!(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr))) { - SiS_SetCH701x(SiS_Pr,0x0149); - } else if(SiS_IsTVOrYPbPr(SiS_Pr,HwDeviceExtension, BaseAddr)) { - SiS_SetCH701x(SiS_Pr,0x0149); - } + if(SiS_Pr->SiS_IF_DEF_CH70xx == 0) { + SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x11,0xF7,0x08); + SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 3); } - if(!(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr))) { + if(SiS_Pr->SiS_IF_DEF_CH70xx == 0) { + SiS_DisplayOff(SiS_Pr); + } else if(!(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr))) { SiS_DisplayOff(SiS_Pr); - } else if(!(SiS_IsTVOrYPbPr(SiS_Pr,HwDeviceExtension, BaseAddr))) { + } else if(!(SiS_IsTVOrYPbPrOrScart(SiS_Pr,HwDeviceExtension, BaseAddr))) { SiS_DisplayOff(SiS_Pr); } - if(!(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr))) { + if(SiS_Pr->SiS_IF_DEF_CH70xx == 0) { + SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x00,0x80); + } else if(!(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr))) { SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x00,0x80); } else if(!(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr))) { SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x00,0x80); @@ -4563,25 +5346,35 @@ SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x32,0xDF); - if(!(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr))) { + if(SiS_Pr->SiS_IF_DEF_CH70xx == 0) { + SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1E,0xDF); + } else if(!(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr))) { SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1E,0xDF); } else if(!(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr))) { SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1E,0xDF); } - if(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) { + if(SiS_Pr->SiS_IF_DEF_CH70xx == 0) { + if(SiS_CRT2IsLCD(SiS_Pr, BaseAddr,HwDeviceExtension)) { + SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x1e,0xdf); + } + } else if(SiS_IsLCDOrLCDA(SiS_Pr,HwDeviceExtension, BaseAddr)) { SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x1e,0xdf); } - if(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr)) { - SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x13,0xff); - } else { - SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x13,0xfb); + if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) { + if(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr)) { + SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x13,0xff); + } else { + SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x13,0xfb); + } } SiS_UnLockCRT2(SiS_Pr,HwDeviceExtension, BaseAddr); - if(!(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr))) { + if(SiS_Pr->SiS_IF_DEF_CH70xx == 0) { + SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x2e,0xf7); + } else if(!(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr))) { SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x2e,0xf7); } else if(!(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr))) { SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x2e,0xf7); @@ -4596,6 +5389,16 @@ } } #endif + if(SiS_Pr->SiS_IF_DEF_CH70xx == 0) { + if(SiS_CRT2IsLCD(SiS_Pr, BaseAddr,HwDeviceExtension)) { + if(!(SiS_WeHaveBacklightCtrl(SiS_Pr,HwDeviceExtension, BaseAddr))) { + SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 2); + SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x11,0xFB,0x04); + } + } + } + +#endif /* SIS315H */ } /* 310 series */ @@ -4607,7 +5410,11 @@ void SiS_EnableBridge(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr) { - USHORT temp=0,tempah,pushax,temp1; + USHORT temp=0,tempah; +#ifdef SIS315H + USHORT temp1,pushax=0; + BOOLEAN delaylong = FALSE; +#endif UCHAR *ROMAddr = HwDeviceExtension->pjVirtualRomBase; if(SiS_Pr->SiS_IF_DEF_LVDS == 0) { @@ -4616,216 +5423,388 @@ if(HwDeviceExtension->jChipType < SIS_315H) { - /* 300 series */ +#ifdef SIS300 /* 300 series */ + + if(HwDeviceExtension->jChipType == SIS_300) { - if(SiS_CRT2IsLCD(SiS_Pr,BaseAddr)) { - SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x11,0xFB); - if(!(SiS_CR36BIOSWord23d(SiS_Pr,HwDeviceExtension))) { - SiS_SetPanelDelay(SiS_Pr, ROMAddr, HwDeviceExtension, 0); + if(SiS_CRT2IsLCD(SiS_Pr,BaseAddr,HwDeviceExtension)) { + if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) { + SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x26,0x02); + if(!(SiS_CR36BIOSWord23d(SiS_Pr,HwDeviceExtension))) { + SiS_SetPanelDelay(SiS_Pr, ROMAddr, HwDeviceExtension, 0); + } + } } - SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x20); /* Enable CRT2 */ -/* DoSomeThingPCI_On(SiS_Pr) */ - SiS_DisplayOn(SiS_Pr); - SiS_UnLockCRT2(SiS_Pr,HwDeviceExtension, BaseAddr); - SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x02,0xBF); - if(SiS_BridgeInSlave(SiS_Pr)) { - SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x01,0x1F); - } else { - SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x01,0x1F,0x40); + temp = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x32) & 0xDF; /* lock mode */ + if(SiS_BridgeInSlave(SiS_Pr)) { + tempah = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x30); + if(!(tempah & SetCRT2ToRAMDAC)) temp |= 0x20; } - if(!(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x13) & 0x40)) { - if(!(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x16) & 0x10)) { - if(!(SiS_CR36BIOSWord23b(SiS_Pr,HwDeviceExtension))) { - SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 1); - } - SiS_WaitVBRetrace(SiS_Pr,HwDeviceExtension); - SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x11,0xF7,0x00); - } + SiS_SetReg1(SiS_Pr->SiS_P3c4,0x32,temp); + SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x20); + SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x00,0x1F,0x20); /* enable VB processor */ + if(SiS_Is301B(SiS_Pr,BaseAddr)) { + SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x1F,0xC0); + SiS_DisplayOn(SiS_Pr); + } else { + SiS_VBLongWait(SiS_Pr); + SiS_DisplayOn(SiS_Pr); + SiS_VBLongWait(SiS_Pr); + } + if(SiS_CRT2IsLCD(SiS_Pr,BaseAddr,HwDeviceExtension)) { + if(!(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x13) & 0x40)) { + if(!(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x16) & 0x10)) { + if(!(SiS_CR36BIOSWord23b(SiS_Pr,HwDeviceExtension))) { + SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 1); + } + if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) { + SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x26,0xfe,0x01); + } + } + } } - } else { - temp = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x32) & 0xDF; /* lock mode */ - if(SiS_BridgeInSlave(SiS_Pr)) { - tempah = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x30); - if(!(tempah & SetCRT2ToRAMDAC)) temp |= 0x20; - } - SiS_SetReg1(SiS_Pr->SiS_P3c4,0x32,temp); - SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x20); - SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x00,0x1F,0x20); /* enable VB processor */ - if(SiS_Is301B(SiS_Pr,BaseAddr)) { - SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x1F,0xC0); - SiS_DisplayOn(SiS_Pr); - } else { - SiS_VBLongWait(SiS_Pr); - SiS_DisplayOn(SiS_Pr); - SiS_VBLongWait(SiS_Pr); - } - } - } else { + } else { - /* 310 series */ + if((SiS_Pr->SiS_VBType & VB_NoLCD) && + (SiS_CRT2IsLCD(SiS_Pr,BaseAddr,HwDeviceExtension))) { + /* This is only for LCD output on 301B-DH via LVDS */ + SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x11,0xFB); + if(!(SiS_CR36BIOSWord23d(SiS_Pr,HwDeviceExtension))) { + SiS_SetPanelDelay(SiS_Pr, ROMAddr, HwDeviceExtension, 0); + } + SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x20); /* Enable CRT2 */ +/* DoSomeThingPCI_On(SiS_Pr) */ + SiS_DisplayOn(SiS_Pr); + SiS_UnLockCRT2(SiS_Pr,HwDeviceExtension, BaseAddr); + SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x02,0xBF); + if(SiS_BridgeInSlave(SiS_Pr)) { + SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x01,0x1F); + } else { + SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x01,0x1F,0x40); + } + if(!(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x13) & 0x40)) { + if(!(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x16) & 0x10)) { + if(!(SiS_CR36BIOSWord23b(SiS_Pr,HwDeviceExtension))) { + SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 1); + } + SiS_WaitVBRetrace(SiS_Pr,HwDeviceExtension); + SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x11,0xF7,0x00); + } + } + } else { + temp = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x32) & 0xDF; /* lock mode */ + if(SiS_BridgeInSlave(SiS_Pr)) { + tempah = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x30); + if(!(tempah & SetCRT2ToRAMDAC)) temp |= 0x20; + } + SiS_SetReg1(SiS_Pr->SiS_P3c4,0x32,temp); + SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x20); + SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x00,0x1F,0x20); /* enable VB processor */ + if(SiS_Is301B(SiS_Pr,BaseAddr)) { + SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x1F,0xC0); + SiS_DisplayOn(SiS_Pr); + } else { + SiS_VBLongWait(SiS_Pr); + SiS_DisplayOn(SiS_Pr); + SiS_VBLongWait(SiS_Pr); + } + } -#ifdef SIS650301NEW /* TW: From 650/301LVx 1.10.6s */ + } +#endif /* SIS300 */ - if(!(SiS_IsM650or651(SiS_Pr,HwDeviceExtension, BaseAddr))) { - tempah = 0x10; - if(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) { - tempah = 0x08; - } - SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x4c,tempah); - } + } else { - SiS_SetReg3(SiS_Pr->SiS_P3c6,0x00); +#ifdef SIS315H /* 310/325 series */ - SiS_DisplayOff(SiS_Pr); + if(IS_SIS650740) { /* 650 */ - pushax = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x06); +#if 0 + if(SiS_GetReg1(SiS_Pr->SiS_Part4Port,0x00) != 1) return; /* From 1.10.7w */ +#endif - if( (SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) || - (SiS_CRT2IsLCD(SiS_Pr,BaseAddr)) ) { - if(!(SiS_GetReg1(SiS_Pr->SiS_Part4Port,0x26) & 0x02)) { - SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 3); - SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 3); - SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x26,0x02); - } - } + if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) { + + SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x1f,0xef); /* 1.10.7u */ + SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x30,0x00); /* 1.10.7u */ + + if(!(IS_SIS740)) { + if(!(SiS_IsNotM650or651(SiS_Pr,HwDeviceExtension, BaseAddr))) { + tempah = 0x10; + if(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) { + tempah = 0x08; + } + SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x4c,tempah); + } + } - if(!(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr))) { - temp = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x32) & 0xDF; - if(SiS_BridgeInSlave(SiS_Pr)) { - tempah = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x30); - if(!(tempah & SetCRT2ToRAMDAC)) temp |= 0x20; - } - SiS_SetReg1(SiS_Pr->SiS_P3c4,0x32,temp); + SiS_SetReg3(SiS_Pr->SiS_P3c6,0x00); + SiS_DisplayOff(SiS_Pr); + pushax = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x06); + if(IS_SIS740) { + SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x06,0xE3); + } - SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x20); /* enable CRT2 */ - SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 2); - } + if( (SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) || + (SiS_CRT2IsLCD(SiS_Pr,BaseAddr,HwDeviceExtension)) ) { + if(!(SiS_GetReg1(SiS_Pr->SiS_Part4Port,0x26) & 0x02)) { + SiS_SetPanelDelayLoop(SiS_Pr,ROMAddr, HwDeviceExtension, 3, 2); + SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x26,0x02); + SiS_SetPanelDelayLoop(SiS_Pr,ROMAddr, HwDeviceExtension, 3, 2); + } + } - if(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) { - SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x1e,0x20); - } + if(!(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x31) & 0x40)) { + SiS_SetPanelDelayLoop(SiS_Pr,ROMAddr, HwDeviceExtension, 3, 10); + delaylong = TRUE; + } - SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x00,0x1f,0x20); + } - tempah = 0xc0; - if(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr)) { - tempah = 0x80; - if(!(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr))) { - tempah = 0x40; - } - } - SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x1F,tempah); + if(!(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr))) { + temp = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x32) & 0xDF; + if(SiS_BridgeInSlave(SiS_Pr)) { + tempah = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x30); + if(!(tempah & SetCRT2ToRAMDAC)) temp |= 0x20; + } + SiS_SetReg1(SiS_Pr->SiS_P3c4,0x32,temp); - SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2e,0x80); + SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x20); /* enable CRT2 */ + + if(SiS_Pr->SiS_VBType & VB_SIS301B302B) { + SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x2e,0x7f); + temp = SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x2e); + if(!(temp & 0x80)) { + SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2e,0x80); + } + } else { + SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 2); + } + } - if(!(SiS_WeHaveBacklightCtrl(SiS_Pr,HwDeviceExtension, BaseAddr))) { - if( (SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) || - ((SiS_CRT2IsLCD(SiS_Pr,BaseAddr))) ) { - SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 3); - SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 3); - SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 3); - SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 3); - SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 3); - SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 3); - SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 3); - SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 3); - SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 3); - SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 3); - SiS_WaitVBRetrace(SiS_Pr,HwDeviceExtension); - SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x26,0xfe,0x01); + if(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) { + SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x1e,0x20); } - } - SiS_SetReg1(SiS_Pr->SiS_P3c4,0x06,pushax); - SiS_DisplayOn(SiS_Pr); - SiS_SetReg3(SiS_Pr->SiS_P3c6,0xff); + SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x00,0x1f,0x20); - if(!(SiS_WeHaveBacklightCtrl(SiS_Pr,HwDeviceExtension, BaseAddr))) { - SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x00,0x7f); - } + if(SiS_Pr->SiS_VBType & VB_SIS301B302B) { + temp = SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x2e); + if(!(temp & 0x80)) { + SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2e,0x80); + } + } - SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x30,0x00); - SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x27,0x0c); - SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x30,0x20); - SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x31,0x05); - SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x32,0x60); - SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x33,0x00); - SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x34,0x10); - SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x30,0x40); - -#else /* TW: From 650/301LV BIOS (different PanelDelay!) */ - - if(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) { - SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x26,0xfd,0x02); - SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 0); - } else if(SiS_CRT2IsLCD(SiS_Pr,BaseAddr)) { - SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x26,0xfd,0x02); - SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 0); - } - /* TW: --- end --- */ + tempah = 0xc0; + if(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr)) { + tempah = 0x80; + if(!(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr))) { + tempah = 0x40; + } + } + SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x1F,tempah); - if(!(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr))) { - temp = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x32) & 0xDF; - if(SiS_BridgeInSlave(SiS_Pr)) { - tempah = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x30); - if(!(tempah & SetCRT2ToRAMDAC)) temp |= 0x20; - } - SiS_SetReg1(SiS_Pr->SiS_P3c4,0x32,temp); + if(SiS_Pr->SiS_VBType & VB_SIS301B302B) { + SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x00,0x7f); + } - SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x20); /* enable CRT2 */ + if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) { + + SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x30,0x00); /* All this from 1.10.7u */ + SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x27,0x0c); + SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x30,0x20); + SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x31,0x05); + SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x32,0x60); + SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x33,0x00); + SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x34,0x10); + SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x30,0x40); + + SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 2); + + SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x1f,0x10); /* 1.10.8r */ -/* SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x2E,0x7F); */ /* TW: Not done in 650/301LV BIOS */ - temp=SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x2E); - if (!(temp & 0x80)) - SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2E,0x80); - } + SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2e,0x80); - SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x00,0x1F,0x20); /* enable VB processor */ + if(!(SiS_WeHaveBacklightCtrl(SiS_Pr,HwDeviceExtension, BaseAddr))) { + if( (SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) || + ((SiS_CRT2IsLCD(SiS_Pr,BaseAddr,HwDeviceExtension))) ) { + SiS_SetPanelDelayLoop(SiS_Pr,ROMAddr, HwDeviceExtension, 3, 10); + if(delaylong) { + SiS_SetPanelDelayLoop(SiS_Pr,ROMAddr, HwDeviceExtension, 3, 10); + } + SiS_WaitVBRetrace(SiS_Pr,HwDeviceExtension); + SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x26,0xfe,0x01); + } + } - if(SiS_Is301B(SiS_Pr,BaseAddr)) { + SiS_SetReg1(SiS_Pr->SiS_P3c4,0x06,pushax); + SiS_DisplayOn(SiS_Pr); + SiS_SetReg3(SiS_Pr->SiS_P3c6,0xff); - SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x1F,0xc0); + if(!(SiS_WeHaveBacklightCtrl(SiS_Pr,HwDeviceExtension, BaseAddr))) { + SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x00,0x7f); + } +#if 0 + SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x30,0x00); + SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x27,0x0c); + SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x30,0x20); + SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x31,0x05); /* 1.10.8r: 0x0d */ + SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x32,0x60); /* 1.10.8r: 0x70 */ + SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x33,0x00); /* 1.10.8r: 0x40 */ + SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x34,0x10); + SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x30,0x40); +#endif - if(!(SiS_WeHaveBacklightCtrl(SiS_Pr,HwDeviceExtension, BaseAddr))) /* TW: "if" new from 650/301LV BIOS */ - SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x00,0x7F); + } - } else { +#if 0 + } else if(IS_SIS740) { /* 740 */ + + if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) { /* 30xLV */ + + SiS_SetReg3(SiS_Pr->SiS_P3c6,0x00); + SiS_DisplayOff(SiS_Pr); + pushax = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x06); + SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x06,0xE3); + + if( (SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) || + (SiS_CRT2IsLCD(SiS_Pr,BaseAddr,HwDeviceExtension)) ) { + if(!(SiS_GetReg1(SiS_Pr->SiS_Part4Port,0x26) & 0x02)) { + SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x26,0x02); + SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 3); + } + } + + if(!(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr))) { + temp = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x32) & 0xDF; + if(SiS_BridgeInSlave(SiS_Pr)) { + tempah = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x30); + if(!(tempah & SetCRT2ToRAMDAC)) temp |= 0x20; + } + SiS_SetReg1(SiS_Pr->SiS_P3c4,0x32,temp); - SiS_VBLongWait(SiS_Pr); - SiS_DisplayOn(SiS_Pr); - if(!(SiS_WeHaveBacklightCtrl(SiS_Pr,HwDeviceExtension, BaseAddr))) { /* TW: "if" new from 650/301LV BIOS */ - SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x00,0x7F); - SiS_VBLongWait(SiS_Pr); - } + SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x20); + SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 2); + } + + if(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) { + SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x1E,0x20); + } + + SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x00,0x1f,0x20); + SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x1F,0xC0); + SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x1F,0x10); /* (taken from 650 1.10.8r) */ + SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2E,0x80); + + if(!(SiS_WeHaveBacklightCtrl(SiS_Pr,HwDeviceExtension, BaseAddr))) { + if( (SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) || + (SiS_CRT2IsLCD(SiS_Pr,BaseAddr,HwDeviceExtension)) ) { + SiS_SetPanelDelayLoop(SiS_Pr,ROMAddr, HwDeviceExtension, 3, 10); + if(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x31) & 0x40) { + SiS_WaitVBRetrace(SiS_Pr,HwDeviceExtension); + } + SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x26,0xfe,0x01); + SiS_SetPanelDelayLoop(SiS_Pr,ROMAddr, HwDeviceExtension, 3, 10); + SiS_WaitVBRetrace(SiS_Pr,HwDeviceExtension); + } + } + + SiS_SetReg1(SiS_Pr->SiS_P3c4,0x06,pushax); + SiS_DisplayOn(SiS_Pr); + SiS_SetReg3(SiS_Pr->SiS_P3c6,0xff); + + if(!(SiS_WeHaveBacklightCtrl(SiS_Pr,HwDeviceExtension, BaseAddr))) { + SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x00,0x7f); + } + + } else { /* (301), 301B */ + + if(!(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr))) { + temp = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x32) & 0xDF; + if(SiS_BridgeInSlave(SiS_Pr)) { + tempah = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x30); + if(!(tempah & SetCRT2ToRAMDAC)) temp |= 0x20; + } + SiS_SetReg1(SiS_Pr->SiS_P3c4,0x32,temp); - } + SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x20); /* enable CRT2 */ - /* TW: Entire section from 650/301LV BIOS */ - if(!(SiS_WeHaveBacklightCtrl(SiS_Pr,HwDeviceExtension, BaseAddr))) { - if(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) { -/* if (!(SiS_WeHaveBacklightCtrl(HwDeviceExtension, BaseAddr))) { */ /* TW: BIOS code makes no sense */ - SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 1); - SiS_WaitVBRetrace(SiS_Pr,HwDeviceExtension); - SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x26,0xFE,0x01); -/* } */ - } else if(SiS_CRT2IsLCD(SiS_Pr,BaseAddr)) { -/* if (!(SiS_WeHaveBacklightCtrl(HwDeviceExtension, BaseAddr))) { */ /* TW: BIOS code makes no sense */ - SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 1); - SiS_WaitVBRetrace(SiS_Pr,HwDeviceExtension); - SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x26,0xFE,0x01); -/* } */ - } - } + temp = SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x2E); + if(!(temp & 0x80)) + SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2E,0x80); + } + + SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x00,0x1f,0x20); + if(SiS_Is301B(SiS_Pr,BaseAddr)) { + SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x1F,0xC0); + SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x00,0x7f); + } else { + SiS_VBLongWait(SiS_Pr); + SiS_DisplayOn(SiS_Pr); + SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x00,0x7F); + SiS_VBLongWait(SiS_Pr); + } + + } #endif + + } else { /* 315, 330 */ + + if(!(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr))) { + temp = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x32) & 0xDF; + if(SiS_BridgeInSlave(SiS_Pr)) { + tempah = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x30); + if(!(tempah & SetCRT2ToRAMDAC)) temp |= 0x20; + } + SiS_SetReg1(SiS_Pr->SiS_P3c4,0x32,temp); + + SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x20); /* enable CRT2 */ + + temp = SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x2E); + if(!(temp & 0x80)) + SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2E,0x80); + } + + SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x00,0x1f,0x20); + + if(SiS_Is301B(SiS_Pr,BaseAddr)) { + + temp=SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x2E); + if (!(temp & 0x80)) + SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2E,0x80); + + tempah = 0xc0; + if(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr)) { + tempah = 0x80; + if(!(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr))) { + tempah = 0x40; + } + } + SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x1F,tempah); + + SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x00,0x7f); + + } else { + + SiS_VBLongWait(SiS_Pr); + SiS_DisplayOn(SiS_Pr); + SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x00,0x7F); + SiS_VBLongWait(SiS_Pr); + + } + + } /* 315, 330 */ + +#endif /* SIS315H */ } } else { /* ============ TW: For 301 ================ */ if(HwDeviceExtension->jChipType < SIS_315H) { - if(SiS_CRT2IsLCD(SiS_Pr,BaseAddr)) { + if(SiS_CRT2IsLCD(SiS_Pr,BaseAddr,HwDeviceExtension)) { SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x11,0xF0,0x0B); SiS_SetPanelDelay(SiS_Pr, ROMAddr, HwDeviceExtension, 0); } @@ -4856,7 +5835,7 @@ SiS_VBLongWait(SiS_Pr); if(HwDeviceExtension->jChipType < SIS_315H) { - if(SiS_CRT2IsLCD(SiS_Pr,BaseAddr)) { + if(SiS_CRT2IsLCD(SiS_Pr,BaseAddr,HwDeviceExtension)) { SiS_SetPanelDelay(SiS_Pr, ROMAddr, HwDeviceExtension, 1); SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x11,0xF0,0x03); } @@ -4868,9 +5847,14 @@ if(HwDeviceExtension->jChipType < SIS_315H) { - /* 300 series */ +#ifdef SIS300 /* 300 series */ - if(SiS_CRT2IsLCD(SiS_Pr,BaseAddr)) { + if(SiS_CRT2IsLCD(SiS_Pr,BaseAddr,HwDeviceExtension)) { + if(HwDeviceExtension->jChipType == SIS_730) { + SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 1); + SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 1); + SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 1); + } SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x11,0xFB); if(!(SiS_CR36BIOSWord23d(SiS_Pr,HwDeviceExtension))) { SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 0); @@ -4888,20 +5872,12 @@ } if(SiS_Pr->SiS_IF_DEF_CH70xx == 1) { - if(!(SiS_CRT2IsLCD(SiS_Pr,BaseAddr))) { -#if 0 /* TW: Implemented this for power saving, but it's not worth - * the problems - */ - if(SiS_Pr->SiS_Backup70xx != 0xff) { - SiS_SetCH700x(SiS_Pr,((SiS_Pr->SiS_Backup70xx<<8)|0x0E)); - SiS_Pr->SiS_Backup70xx = 0xff; - } else -#endif + if(!(SiS_CRT2IsLCD(SiS_Pr,BaseAddr,HwDeviceExtension))) { SiS_SetCH700x(SiS_Pr,0x0B0E); } } - if(SiS_CRT2IsLCD(SiS_Pr,BaseAddr)) { + if(SiS_CRT2IsLCD(SiS_Pr,BaseAddr,HwDeviceExtension)) { if(!(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x13) & 0x40)) { if(!(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x16) & 0x10)) { if(!(SiS_CR36BIOSWord23b(SiS_Pr,HwDeviceExtension))) { @@ -4914,9 +5890,11 @@ } } +#endif /* SIS300 */ + } else { - /* 310 series */ +#ifdef SIS315H /* 310/325 series */ #if 0 /* BIOS code makes no sense */ if(SiS_IsVAMode()) { @@ -4925,6 +5903,13 @@ } #endif + if(SiS_Pr->SiS_IF_DEF_CH70xx == 0) { + if(SiS_CRT2IsLCD(SiS_Pr,BaseAddr,HwDeviceExtension)) { + SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x11,0xFB); + SiS_SetPanelDelay(SiS_Pr, ROMAddr, HwDeviceExtension, 0); + } + } + SiS_EnableCRT2(SiS_Pr); SiS_UnLockCRT2(SiS_Pr,HwDeviceExtension, BaseAddr); @@ -4937,6 +5922,14 @@ } SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x2e,0x7f); + +#ifdef NEWCH701x + if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) { + if(SiS_IsLCDOrLCDA(SiS_Pr,HwDeviceExtension,BaseAddr)) { + SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x1E,0x20); + } + } +#endif temp1 = SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x2E); if (!(temp1 & 0x80)) @@ -4948,9 +5941,16 @@ } } - if(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) { + if(SiS_Pr->SiS_IF_DEF_CH70xx == 0) { + if(SiS_CRT2IsLCD(SiS_Pr,BaseAddr,HwDeviceExtension)) { + SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x1E,0x20); + } + } +#ifndef NEWCH701x + else if(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) { SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x1E,0x20); } +#endif if(!(SiS_WeHaveBacklightCtrl(SiS_Pr,HwDeviceExtension, BaseAddr))) { SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x00,0x7f); @@ -4958,7 +5958,7 @@ if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) { - if(SiS_IsTVOrYPbPr(SiS_Pr,HwDeviceExtension, BaseAddr)) { + if(SiS_IsTVOrYPbPrOrScart(SiS_Pr,HwDeviceExtension, BaseAddr)) { SiS_Chrontel701xOn(SiS_Pr,HwDeviceExtension, BaseAddr); } @@ -4976,14 +5976,21 @@ SiS_Chrontel701xBLOn(SiS_Pr); SiS_ChrontelDoSomething4(SiS_Pr,HwDeviceExtension, BaseAddr); } else if(SiS_IsLCDOrLCDA(SiS_Pr,HwDeviceExtension, BaseAddr)) { -/* if(!SiS_WeHaveBacklightCtrl(SiS_Pr,HwDeviceExtension, BaseAddr)) { */ /* TW: makes no sense */ - SiS_Chrontel701xBLOn(SiS_Pr); - SiS_ChrontelDoSomething4(SiS_Pr,HwDeviceExtension, BaseAddr); -/* } */ + SiS_Chrontel701xBLOn(SiS_Pr); + SiS_ChrontelDoSomething4(SiS_Pr,HwDeviceExtension, BaseAddr); } } + } else if(SiS_Pr->SiS_IF_DEF_CH70xx == 0) { + if(!(SiS_WeHaveBacklightCtrl(SiS_Pr,HwDeviceExtension, BaseAddr))) { + if(SiS_CRT2IsLCD(SiS_Pr,BaseAddr,HwDeviceExtension)) { + SiS_SetPanelDelay(SiS_Pr, ROMAddr, HwDeviceExtension, 1); + SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x11,0xF7); + } + } } +#endif /* SIS315H */ + } /* 310 series */ } /* LVDS */ @@ -4995,9 +6002,9 @@ { USHORT BaseAddr = (USHORT)HwDeviceExtension->ulIOAddress; - /* TW: Switch on LCD backlight on SiS30x */ + /* TW: Switch on LCD backlight on SiS30xLV */ if( (SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) || - (SiS_CRT2IsLCD(SiS_Pr,BaseAddr)) ) { + (SiS_CRT2IsLCD(SiS_Pr,BaseAddr,HwDeviceExtension)) ) { if(!(SiS_GetReg1(SiS_Pr->SiS_Part4Port,0x26) & 0x02)) { SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x26,0x02); SiS_WaitVBRetrace(SiS_Pr,HwDeviceExtension); @@ -5013,14 +6020,14 @@ { USHORT BaseAddr = (USHORT)HwDeviceExtension->ulIOAddress; - /* TW: Switch off LCD backlight on SiS30x */ + /* TW: Switch off LCD backlight on SiS30xLV */ if( (!(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr))) || (SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) ) { SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x26,0xFE,0x00); } if(!(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr))) { - if(!(SiS_CRT2IsLCD(SiS_Pr,BaseAddr))) { + if(!(SiS_CRT2IsLCD(SiS_Pr,BaseAddr,HwDeviceExtension))) { if(!(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr))) { SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x26,0xFD,0x00); } @@ -5065,13 +6072,28 @@ } void +SiS_SetPanelDelayLoop(SiS_Private *SiS_Pr, UCHAR *ROMAddr, PSIS_HW_DEVICE_INFO HwDeviceExtension, + USHORT DelayTime, USHORT DelayLoop) +{ + int i; + for(i=0; ijChipType < SIS_315H) { +#ifdef SIS300 + if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { /* 300 series, LVDS */ PanelID = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x36); @@ -5132,11 +6154,41 @@ } +#endif /* SIS300 */ + } else { + if(HwDeviceExtension->jChipType == SIS_330) return; + +#ifdef SIS315H + if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { /* 310/325 series, LVDS */ - /* TW: Not currently used */ + if(SiS_Pr->SiS_IF_DEF_CH70xx == 0) { + PanelID = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x36); + DelayIndex = PanelID >> 4; + if((DelayTime >= 2) && ((PanelID & 0x0f) == 1)) { + Delay = 3; + } else { + if(DelayTime >= 2) DelayTime -= 2; + + if(!(DelayTime & 0x01)) { + Delay = SiS_Pr->SiS_PanelDelayTblLVDS[DelayIndex].timer[0]; + } else { + Delay = SiS_Pr->SiS_PanelDelayTblLVDS[DelayIndex].timer[1]; + } + if((ROMAddr) && (SiS_Pr->SiS_UseROM)) { + if(ROMAddr[0x13c] & 0x40) { + if(!(DelayTime & 0x01)) { + Delay = (USHORT)ROMAddr[0x17e]; + } else { + Delay = (USHORT)ROMAddr[0x17f]; + } + } + } + } + SiS_ShortDelay(SiS_Pr,Delay); + } } else { /* 310/325 series, 301(B) */ @@ -5151,6 +6203,8 @@ } +#endif /* SIS315H */ + } } @@ -5197,10 +6251,14 @@ } BOOLEAN -SiS_CRT2IsLCD(SiS_Private *SiS_Pr, USHORT BaseAddr) +SiS_CRT2IsLCD(SiS_Private *SiS_Pr, USHORT BaseAddr, PSIS_HW_DEVICE_INFO HwDeviceExtension) { USHORT flag; + if(HwDeviceExtension->jChipType == SIS_730) { + flag = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x13); + if(flag & 0x20) return(1); + } flag = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x30); if(flag & 0x20) return(1); else return(0); @@ -5213,9 +6271,11 @@ USHORT flag; if(HwDeviceExtension->jChipType >= SIS_315H) { - flag = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x38); - if(flag & EnableDualEdge) return(1); - else return(0); + if((HwDeviceExtension->jChipType != SIS_650) || (SiS_GetReg1(SiS_Pr->SiS_P3d4,0x5f) & 0xf0)) { + flag = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x38); + if(flag & EnableDualEdge) return(1); + else return(0); + } else return(0); } else #endif return(0); @@ -5230,7 +6290,7 @@ if(HwDeviceExtension->jChipType >= SIS_315H) { flag = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x38); if((flag & EnableDualEdge) && (flag & SetToLCDA)) return(1); -#if 0 /* Not done in 650/301LVx 1.10.6s, but in 650/301LV */ +#if 0 /* Not done in 650/30xLV 1.10.6s, but in 650/301LV */ else if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { if(flag) return(1); else return(0); @@ -5276,12 +6336,12 @@ #endif BOOLEAN -SiS_IsM650or651(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr) +SiS_IsNotM650or651(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr) { #ifdef SIS315H USHORT flag; - if(HwDeviceExtension->jChipType >= SIS_315H) { + if(HwDeviceExtension->jChipType == SIS_650) { flag = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x5f); flag &= 0xF0; if((flag == 0xb0) || (flag == 0x90)) return 0; @@ -5299,25 +6359,41 @@ if(HwDeviceExtension->jChipType >= SIS_315H) { flag = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x38); - if(flag & 0x08) return(1); - else return(0); + if(flag & EnableLVDSHiVision) return(1); /* = YPrPb = 0x08 */ + else return(0); + } else +#endif + return(0); +} + +BOOLEAN +SiS_IsChScart(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr) +{ +#ifdef SIS315H + USHORT flag; + + if(HwDeviceExtension->jChipType >= SIS_315H) { + flag = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x38); + if(flag & EnableLVDSScart) return(1); /* = Scart = 0x04 */ + else return(0); } else #endif return(0); } BOOLEAN -SiS_IsTVOrYPbPr(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr) +SiS_IsTVOrYPbPrOrScart(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr) { USHORT flag; #ifdef SIS315H if(HwDeviceExtension->jChipType >= SIS_315H) { flag = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x30); - if(flag & SetCRT2ToTV) return(1); + if(flag & SetCRT2ToTV) return(1); flag = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x38); - if(flag & 0x08) return(1); - else return(0); + if(flag & EnableLVDSHiVision) return(1); /* = YPrPb = 0x08 */ + if(flag & EnableLVDSScart) return(1); /* = Scart = 0x04- TW inserted */ + else return(0); } else #endif { @@ -5365,17 +6441,11 @@ USHORT flag; if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { - return(0); /* TW: Changed from 1 to 0! */ + return(0); } else { -#if 0 /* TW: Commented for test on bridge-less systems */ - if(HwDeviceExtension->jChipType >= SIS_315H) { /* TW: New (from 630/301B BIOS - not done there) */ -#endif - flag = SiS_GetReg1(SiS_Pr->SiS_Part4Port,0x00); - if((flag == 1) || (flag == 2)) return(0); /* TW: Changed from 1 to 0! */ - else return(1); /* TW: Changed from 0 to 1! */ -#if 0 - } else return(0); /* TW: New (from 630/301B BIOS - always return 0) */ -#endif + flag = SiS_GetReg1(SiS_Pr->SiS_Part4Port,0x00); + if((flag == 1) || (flag == 2)) return(0); + else return(1); } } @@ -5392,7 +6462,7 @@ if((flag == 0x80) || (flag == 0x20)) return 0; else return 1; } else { - /* 310/325 series (650/301LVx 1.10.6s) */ + /* 310/325 series (650/30xLV 1.10.6s) */ flag &= 0x50; if((flag == 0x40) || (flag == 0x10)) return 0; else return 1; @@ -5411,37 +6481,31 @@ else return 0; } -/* TW: New from 650/301LV(x) 1.10.6s BIOS */ void SiS_SetHiVision(SiS_Private *SiS_Pr, USHORT BaseAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension) { +#ifdef SIS315H USHORT temp; +#endif + + /* Note: This variable is only used on 30xLV systems. + CR38 has a different meaning on LVDS/CH7019 systems. + */ SiS_Pr->SiS_HiVision = 0; if(HwDeviceExtension->jChipType >= SIS_315H) { - if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { -#if 0 /* TW: Old */ +#ifdef SIS315H + if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) { if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) { - SiS_Pr->SiS_HiVision = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x38); - SiS_Pr->SiS_HiVision &= 0x38; - SiS_Pr->SiS_HiVision >>= 3; - } -#endif /* TW: New from 650/301LVx BIOS 1.10.6s */ - temp = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x38); - if(temp & 0x40) { - temp &= 0x30; - switch(temp) { - case 0x00: SiS_Pr->SiS_HiVision = 4; break; - case 0x10: SiS_Pr->SiS_HiVision = 1; break; - case 0x20: SiS_Pr->SiS_HiVision = 2; break; - default: SiS_Pr->SiS_HiVision = 3; break; - } + temp = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x38); + temp &= 0x38; + SiS_Pr->SiS_HiVision = (temp >> 3); } } +#endif /* SIS315H */ } } -/* TW: Checked against 630/LVDS 2.08, 650/LVDS and 650/301LV BIOS */ BOOLEAN SiS_GetLCDResInfo(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo, USHORT ModeIdIndex, PSIS_HW_DEVICE_INFO HwDeviceExtension) @@ -5455,11 +6519,15 @@ SiS_Pr->SiS_LCDTypeInfo = 0; SiS_Pr->SiS_LCDInfo = 0; - if (ModeNo<=0x13) { - modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag; + if(SiS_Pr->UseCustomMode) { + modeflag = SiS_Pr->CModeFlag; } else { + if(ModeNo <= 0x13) { + modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag; + } else { modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag; resinfo = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO; + } } if(!(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA))) return 0; @@ -5469,12 +6537,16 @@ temp = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x36); /* FSTN: Fake CR36 (TypeInfo 2, ResInfo SiS_Panel320x480) */ - if(SiS_Pr->SiS_IF_DEF_FSTN){ + if(SiS_Pr->SiS_IF_DEF_FSTN) { temp = 0x20 | SiS_Pr->SiS_Panel320x480; SiS_SetReg1(SiS_Pr->SiS_P3d4,0x36,temp); } - SiS_Pr->SiS_LCDTypeInfo = temp >> 4; + if(HwDeviceExtension->jChipType < SIS_315H) { + SiS_Pr->SiS_LCDTypeInfo = temp >> 4; + } else { + SiS_Pr->SiS_LCDTypeInfo = (temp & 0x0F) - 1; + } temp &= 0x0f; if(HwDeviceExtension->jChipType < SIS_315H) { /* TW: Translate 300 series LCDRes to 310/325 series for unified usage */ @@ -5504,23 +6576,54 @@ SiS_SetReg1(SiS_Pr->SiS_P3d4,0x37,temp); } SiS_Pr->SiS_LCDInfo = temp; + + if(!(SiS_Pr->UsePanelScaler)) SiS_Pr->SiS_LCDInfo &= ~DontExpandLCD; + else if(SiS_Pr->UsePanelScaler == 1) SiS_Pr->SiS_LCDInfo |= DontExpandLCD; - /* TW: Inserted entire 315-block from 650/LVDS/301+LVx BIOSes */ + /* TW: Inserted entire 315-block from 650/LVDS/30xLV BIOSes */ if(HwDeviceExtension->jChipType >= SIS_315H) { +#ifdef SIS315H if(SiS_Pr->SiS_IF_DEF_LVDS == 0) { if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) { if(ModeNo == 0x3a || ModeNo == 0x4d || ModeNo == 0x65) { - SiS_Pr->SiS_LCDInfo |= LCDNonExpanding; + /* Bridge does not scale to 1280x1024 */ + SiS_Pr->SiS_LCDInfo |= DontExpandLCD; } } + if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) { + if(ModeNo == 0x7c || ModeNo == 0x7d || ModeNo == 0x7e) { + /* TW: Bridge does not scale to 1280x960 */ + SiS_Pr->SiS_LCDInfo |= DontExpandLCD; + } + if(ModeNo == 0x2f || ModeNo == 0x5d || ModeNo == 0x5e) { + /* TW: Bridge does not scale to 640x400 */ + SiS_Pr->SiS_LCDInfo |= DontExpandLCD; + } + } + if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) { + if(ModeNo == 0x2f || ModeNo == 0x5d || ModeNo == 0x5e) { + /* TW: Most panels can't scale to 640x400 */ + SiS_Pr->SiS_LCDInfo &= ~DontExpandLCD; + } + } + /* TEMP - no idea about the timing and zoom factors */ + if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x768) { + SiS_Pr->SiS_LCDInfo |= DontExpandLCD; + } + /* TEMP - no idea about the timing and zoom factors */ + if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200) { + SiS_Pr->SiS_LCDInfo |= DontExpandLCD; + } } } if(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x39) & 0x01) { SiS_Pr->SiS_LCDInfo &= 0xFFEF; SiS_Pr->SiS_LCDInfo |= LCDPass11; } +#endif } else { +#ifdef SIS300 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { if((ROMAddr) && SiS_Pr->SiS_UseROM) { if(!(ROMAddr[0x235] & 0x02)) { @@ -5529,47 +6632,41 @@ } } else { if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { - if((SiS_Pr->SiS_SetFlag & CRT2IsVGA) && ((ModeNo == 0x03) || (ModeNo == 0x10))) { + if((SiS_Pr->SiS_SetFlag & SetDOSMode) && ((ModeNo == 0x03) || (ModeNo == 0x10))) { SiS_Pr->SiS_LCDInfo &= 0xEF; } } } - } - -#ifdef LINUX_KERNEL - printk(KERN_INFO "sisfb: (LCDInfo = 0x%x LCDResInfo = 0x%x LCDTypeInfo = 0x%x)\n", - SiS_Pr->SiS_LCDInfo, SiS_Pr->SiS_LCDResInfo, SiS_Pr->SiS_LCDTypeInfo); -#endif -#ifdef LINUX_XF86 - xf86DrvMsg(0, X_PROBED, "(init301: LCDInfo=0x%04x LCDResInfo=0x%02x LCDTypeInfo=0x%02x)\n", - SiS_Pr->SiS_LCDInfo, SiS_Pr->SiS_LCDResInfo, SiS_Pr->SiS_LCDTypeInfo); #endif - + } + /* TW: With Trumpion, always Expanding */ if(SiS_Pr->SiS_IF_DEF_TRUMPION != 0){ - SiS_Pr->SiS_LCDInfo &= (~LCDNonExpanding); + SiS_Pr->SiS_LCDInfo &= (~DontExpandLCD); } - if(!((HwDeviceExtension->jChipType < SIS_315H) && (SiS_Pr->SiS_SetFlag & CRT2IsVGA))) { + if(!((HwDeviceExtension->jChipType < SIS_315H) && (SiS_Pr->SiS_SetFlag & SetDOSMode))) { if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x600) { if(ModeNo > 0x13) { - if(!(SiS_Pr->SiS_LCDInfo & LCDNonExpanding)) { + if(!(SiS_Pr->SiS_LCDInfo & DontExpandLCD)) { if((resinfo == 7) || (resinfo == 3)) { SiS_Pr->SiS_SetFlag |= EnableLVDSDDA; } } } } - if(SiS_Pr->SiS_LCDInfo & LCDPass11) { - SiS_Pr->SiS_SetFlag |= EnableLVDSDDA; + if(ModeNo == 0x12) { + if(SiS_Pr->SiS_LCDInfo & LCDPass11) { + SiS_Pr->SiS_SetFlag |= EnableLVDSDDA; + } } } if(modeflag & HalfDCLK) { if(SiS_Pr->SiS_IF_DEF_TRUMPION == 0) { - if(!(SiS_Pr->SiS_LCDInfo & LCDNonExpanding)) { + if(!(SiS_Pr->SiS_LCDInfo & DontExpandLCD)) { if(!(((SiS_Pr->SiS_IF_DEF_LVDS == 1) || (HwDeviceExtension->jChipType < SIS_315H)) && (SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel640x480))) { if(ModeNo > 0x13) { @@ -5586,7 +6683,6 @@ } - /* TW: wdr: if (VBInfo & LCD) && (VBInfo & (SetSimuScanMode | SwitchToCRT2)) { */ if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) { if(SiS_Pr->SiS_VBInfo & SetNotSimuMode) { SiS_Pr->SiS_SetFlag |= LCDVESATiming; @@ -5595,16 +6691,34 @@ SiS_Pr->SiS_SetFlag |= LCDVESATiming; } - /* TW: Inserted from 650/301LVx BIOS 1.10.6s */ - if(SiS_Pr->SiS_VBType & VB_SIS30xNEW) { +#ifdef SIS315H + /* TW: 650/30xLV 1.10.6s */ + if(HwDeviceExtension->jChipType >= SIS_315H) { + if(SiS_Pr->SiS_VBType & (VB_SIS302B | VB_SIS302LV)) { + /* Enable 302B/302LV dual link mode */ + /* (302B is a theory - not in any BIOS */ temp = 0x00; if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) temp = 0x04; if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) temp = 0x04; if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200) temp = 0x04; SiS_SetReg1(SiS_Pr->SiS_P3d4,0x39,temp); - } else if((HwDeviceExtension->jChipType > SIS_315H) && (SiS_Pr->SiS_IF_DEF_LVDS == 0)) { + } else if(SiS_Pr->SiS_IF_DEF_LVDS == 0) { SiS_SetReg1(SiS_Pr->SiS_P3d4,0x39,0x00); + } } +#endif + +#ifdef LINUX_KERNEL +#ifdef TWDEBUG + printk(KERN_DEBUG "sisfb: (LCDInfo=0x%04x LCDResInfo=0x%02x LCDTypeInfo=0x%02x)\n", + SiS_Pr->SiS_LCDInfo, SiS_Pr->SiS_LCDResInfo, SiS_Pr->SiS_LCDTypeInfo); +#endif +#endif +#ifdef LINUX_XF86 + xf86DrvMsgVerb(0, X_PROBED, 3, + "(init301: LCDInfo=0x%04x LCDResInfo=0x%02x LCDTypeInfo=0x%02x SetFlag=0x%04x)\n", + SiS_Pr->SiS_LCDInfo, SiS_Pr->SiS_LCDResInfo, SiS_Pr->SiS_LCDTypeInfo, SiS_Pr->SiS_SetFlag); +#endif return 1; } @@ -5677,6 +6791,7 @@ SiS_WaitVBRetrace(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension) { if(HwDeviceExtension->jChipType < SIS_315H) { +#ifdef SIS300 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { if(!(SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x00) & 0x20)) return; } @@ -5685,27 +6800,36 @@ } else { SiS_WaitRetrace2(SiS_Pr,HwDeviceExtension); } +#endif } else { +#ifdef SIS315H if(!(SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x00) & 0x40)) { SiS_WaitRetrace1(SiS_Pr,HwDeviceExtension); } else { SiS_WaitRetrace2(SiS_Pr,HwDeviceExtension); } +#endif } } void SiS_WaitRetrace1(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension) { - USHORT i,watchdog; + USHORT watchdog; +#ifdef SIS300 + USHORT i; +#endif if(HwDeviceExtension->jChipType >= SIS_315H) { +#ifdef SIS315H if(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x1f) & 0xc0) return; watchdog = 65535; while( (SiS_GetReg2(SiS_Pr->SiS_P3da) & 0x08) && --watchdog); watchdog = 65535; while( (!(SiS_GetReg2(SiS_Pr->SiS_P3da) & 0x08)) && --watchdog); +#endif } else { +#ifdef SIS300 #if 0 /* TW: Not done in A901 BIOS */ if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { if(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x1f) & 0xc0) return; @@ -5721,6 +6845,7 @@ while( (!(SiS_GetReg2(SiS_Pr->SiS_P3da) & 0x08)) && --watchdog); if(watchdog) break; } +#endif } } @@ -5739,24 +6864,31 @@ void SiS_WaitRetrace2(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension) { - USHORT i,watchdog,temp; + USHORT watchdog; +#ifdef SIS300 + USHORT i; +#endif if(HwDeviceExtension->jChipType >= SIS_315H) { +#ifdef SIS315H watchdog = 65535; while( (SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x30) & 0x02) && --watchdog); watchdog = 65535; while( (!(SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x30) & 0x02)) && --watchdog); +#endif } else { +#ifdef SIS300 for(i=0; i<10; i++) { watchdog = 65535; - while( (temp = SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x25) & 0x02) && --watchdog); + while( (SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x25) & 0x02) && --watchdog); if(watchdog) break; } for(i=0; i<10; i++) { watchdog = 65535; - while( (!(temp = SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x25) & 0x02)) && --watchdog); + while( (!(SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x25) & 0x02)) && --watchdog); if(watchdog) break; } +#endif } } @@ -5767,7 +6899,7 @@ { USHORT temp; - temp = SiS_GetReg1(Port,Index); /* SiS_Pr->SiS_Part1Port index 02 */ + temp = SiS_GetReg1(Port,Index); temp = (temp & (DataAND)) | DataOR; SiS_SetReg1(Port,Index,temp); } @@ -5777,7 +6909,7 @@ { USHORT temp; - temp = SiS_GetReg1(Port,Index); /* SiS_Pr->SiS_Part1Port index 02 */ + temp = SiS_GetReg1(Port,Index); temp &= DataAND; SiS_SetReg1(Port,Index,temp); } @@ -5786,7 +6918,7 @@ { USHORT temp; - temp = SiS_GetReg1(Port,Index); /* SiS_Pr->SiS_Part1Port index 02 */ + temp = SiS_GetReg1(Port,Index); temp |= DataOR; SiS_SetReg1(Port,Index,temp); } @@ -5794,7 +6926,6 @@ /* ========================================================= */ /* TW: Set 301 TV Encoder (and some LCD relevant) registers */ -/* TW: Checked against 650/301LV, 650/301LVx and 630/301B (I+II) */ void SiS_SetGroup2(SiS_Private *SiS_Pr, USHORT BaseAddr,UCHAR *ROMAddr, USHORT ModeNo, USHORT ModeIdIndex,USHORT RefreshRateTableIndex, @@ -5804,26 +6935,29 @@ USHORT push1, push2; const UCHAR *PhasePoint; const UCHAR *TimingPoint; +#ifdef SIS315H const SiS_Part2PortTblStruct *CRT2Part2Ptr = NULL; - USHORT modeflag, resinfo, crt2crtc, resindex, CRT2Index; + USHORT resindex, CRT2Index; +#endif + USHORT modeflag, resinfo, crt2crtc; ULONG longtemp, tempeax, tempebx, temp2, tempecx; const UCHAR atable[] = { 0xc3,0x9e,0xc3,0x9e,0x02,0x02,0x02, 0xab,0x87,0xab,0x9e,0xe7,0x02,0x02 }; - /* TW: Inserted from 650/301LV BIOS */ +#ifdef SIS315H if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) { - /* TW: Inserted from 650/301LVx 1.10.6s: (Is at end of SetGroup2!) */ + /* TW: 650/30xLV 1.10.6s: (Is at end of SetGroup2!) */ if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) { SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x1a,0xfc,0x03); temp = 1; - if(ModeNo<=0x13) temp = 3; + if(ModeNo <= 0x13) temp = 3; SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x0b,temp); } } - if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { /* 650/301LV: (VB_SIS301LV | VB_SIS302LV)) */ + if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { if(!(SiS_Pr->SiS_VBInfo & SetPALTV)) { if((ModeNo == 0x4a) || (ModeNo == 0x38)) { @@ -5855,6 +6989,7 @@ } return; } +#endif if(ModeNo<=0x13) { modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag; /* si+St_ResInfo */ @@ -5876,10 +7011,16 @@ temp |= ((tempbx & 0x00FF) >> 3); temp ^= 0x0C; + /* TW: From 1.10.7w (no vb check there; don't care - this only disables SVIDEO and CVBS signal) */ + if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) { + temp |= 0x0c; + } + PhasePoint = SiS_Pr->SiS_PALPhase; TimingPoint = SiS_Pr->SiS_PALTiming; -#ifdef oldHV - if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) { /* PALPhase */ + + if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) { + temp ^= 0x01; if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) { TimingPoint = SiS_Pr->SiS_HiTVSt2Timing; @@ -5888,14 +7029,17 @@ else TimingPoint = SiS_Pr->SiS_HiTVTextTiming; } } else TimingPoint = SiS_Pr->SiS_HiTVExtTiming; + + if(SiS_Pr->SiS_HiVision & 0x03) temp &= 0xfe; + } else { -#endif + if(SiS_Pr->SiS_VBInfo & SetPALTV){ TimingPoint = SiS_Pr->SiS_PALTiming; PhasePoint = SiS_Pr->SiS_PALPhase; - if( (SiS_Pr->SiS_VBType & (VB_SIS301B | VB_SIS302B)) && + if( (SiS_Pr->SiS_VBType & VB_SIS301B302B) && ( (!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) || (SiS_Pr->SiS_SetFlag & TVSimuMode) ) ) { PhasePoint = SiS_Pr->SiS_PALPhase2; @@ -5907,16 +7051,15 @@ TimingPoint = SiS_Pr->SiS_NTSCTiming; PhasePoint = SiS_Pr->SiS_NTSCPhase; - if( (SiS_Pr->SiS_VBType & (VB_SIS301B | VB_SIS302B)) && + if( (SiS_Pr->SiS_VBType & VB_SIS301B302B) && ( (!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) || (SiS_Pr->SiS_SetFlag & TVSimuMode) ) ) { PhasePoint = SiS_Pr->SiS_NTSCPhase2; } } -#ifdef oldHV + } -#endif SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x00,temp); temp = 0; @@ -5931,17 +7074,17 @@ if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { if(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x31) & 0x01) { temp1 = SiS_GetReg1(SiS_Pr->SiS_P3d4,temp); - if(temp1 & 0x40) { + if(temp1 & EnablePALM) { /* 0x40 */ PhasePoint = SiS_Pr->SiS_PALMPhase; - if( (SiS_Pr->SiS_VBType & (VB_SIS301B | VB_SIS302B)) && + if( (SiS_Pr->SiS_VBType & VB_SIS301B302B) && ( (!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) || (SiS_Pr->SiS_SetFlag & TVSimuMode) ) ) { PhasePoint = SiS_Pr->SiS_PALMPhase2; } } - if(temp1 & 0x80) { + if(temp1 & EnablePALN) { /* 0x80 */ PhasePoint = SiS_Pr->SiS_PALNPhase; - if( (SiS_Pr->SiS_VBType & (VB_SIS301B | VB_SIS302B)) && + if( (SiS_Pr->SiS_VBType & VB_SIS301B302B) && ( (!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) || (SiS_Pr->SiS_SetFlag & TVSimuMode) ) ) { PhasePoint = SiS_Pr->SiS_PALNPhase2; @@ -5952,9 +7095,9 @@ } #ifdef SIS315H - /* TW: Inserted from 650/301LV BIOS */ + /* TW: 650/301LV BIOS */ if(HwDeviceExtension->jChipType >= SIS_315H) { - if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { /* 650/301LV : 301LV | 302LV */ + if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { if(!(SiS_Pr->SiS_VBInfo & SetPALTV)) { if((ModeNo == 0x4a) || (ModeNo == 0x38)) { @@ -5966,14 +7109,14 @@ } #endif - for(i=0x31, j=0; i<=0x34; i++, j++){ + for(i=0x31, j=0; i<=0x34; i++, j++) { SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,PhasePoint[j]); } - for(i=0x01, j=0; i<=0x2D; i++, j++){ + for(i=0x01, j=0; i<=0x2D; i++, j++) { SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,TimingPoint[j]); } - for(i=0x39; i<=0x45; i++, j++){ + for(i=0x39; i<=0x45; i++, j++) { SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,TimingPoint[j]); } @@ -5993,15 +7136,13 @@ SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x37,SiS_Pr->SiS_RY3COE); SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x38,SiS_Pr->SiS_RY4COE); -#ifdef oldHV - if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) tempax = 950; - else { -#endif + if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) { + if(SiS_Pr->SiS_HiVision == 3) tempax = 950; + else tempax = 440; + } else { if(SiS_Pr->SiS_VBInfo & SetPALTV) tempax = 520; else tempax = 440; -#ifdef oldHV } -#endif if( ( ( (!(SiS_Pr->SiS_VBInfo & SetCRT2ToTV)) || (SiS_Pr->SiS_HiVision == 3) ) && (SiS_Pr->SiS_VDE <= tempax) ) || ( (SiS_Pr->SiS_VBInfo & SetCRT2ToTV) && (SiS_Pr->SiS_HiVision != 3) && @@ -6040,7 +7181,7 @@ tempcx = SiS_Pr->SiS_HT; - /* TW: Inserted from 650/301LVx 1.10.6s */ + /* TW: 650/30xLV 1.10.6s */ if(HwDeviceExtension->jChipType >= SIS_315H) { if(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x39) & 0x04) { tempcx >>= 1; @@ -6065,9 +7206,10 @@ push1 = tempcx; tempcx += 7; -#ifdef oldHV - if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) tempcx -= 4; -#endif + if((SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) && + (SiS_Pr->SiS_HiVision == 3)) { + tempcx -= 4; + } temp = (tempcx & 0x00FF) << 4; SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x22,0x0F,temp); @@ -6084,12 +7226,11 @@ tempbx = push2; tempbx += 8; -#ifdef oldHV - if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) { + if((SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) && + (SiS_Pr->SiS_HiVision == 3)) { tempbx -= 4; tempcx = tempbx; } -#endif temp = (tempbx & 0x00FF) << 4; SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x29,0x0F,temp); @@ -6101,10 +7242,11 @@ SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x28,0x0F,temp); tempcx += 8; -#ifdef oldHV - if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) tempcx -= 4; -#endif - temp = (tempcx & 0xFF) << 4; + if((SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) && + (SiS_Pr->SiS_HiVision == 3)) { + tempcx -= 4; + } + temp = (tempcx & 0x00FF) << 4; SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x2A,0x0F,temp); tempcx = push1; @@ -6147,45 +7289,67 @@ } tempbx -= 2; temp = tempbx & 0x00FF; -#ifdef oldHV - if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) { + if((SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) && + (SiS_Pr->SiS_HiVision == 3)) { if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) { if(ModeNo == 0x2f) temp++; } } -#endif + /* TW: From 1.10.7w - doesn't make sense */ + if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { + if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) { + if(!(SiS_Pr->SiS_VBInfo & SetPALTV)) { + if(!(SiS_Pr->SiS_SetFlag & LCDVESATiming)) { /* SetFlag?? */ + if(ModeNo == 0x03) temp++; + } + } + } + } SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x2F,temp); tempax = (tempcx & 0xFF00) | (tempax & 0x00FF); tempbx = ((tempbx & 0xFF00) << 6) | (tempbx & 0x00FF); tempax |= (tempbx & 0xFF00); -#ifdef oldHV - if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV)) { -#endif - if(HwDeviceExtension->jChipType < SIS_315H) { - if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToSCART)) { /* TW: New from 630/301B (II) BIOS */ - tempax |= 0x1000; - if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToSVIDEO)) tempax |= 0x2000; - } - } else { - tempax |= 0x1000; - if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToSVIDEO)) tempax |= 0x2000; - } -#ifdef oldHV + if(HwDeviceExtension->jChipType < SIS_315H) { + if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV)) { + if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToSCART)) { /* TW: New from 630/301B (II) BIOS */ + tempax |= 0x1000; + if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToSVIDEO)) tempax |= 0x2000; + } + } + } else { + /* TODO Check this with other BIOSes */ + if((!(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV)) && + (SiS_Pr->SiS_HiVision == 3)) { + tempax |= 0x1000; + if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToSVIDEO)) tempax |= 0x2000; + } } -#endif temp = (tempax & 0xFF00) >> 8; SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x30,temp); - /* TW: Inserted from 650/301LVx 1.10.6s */ - if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { - if( (SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) || - (SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200) ) { - SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x10,0x60); + /* TW: 650/30xLV 1.10.6s */ + if(HwDeviceExtension->jChipType > SIS_315H) { + if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { + if( (SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) || + (SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200) ) { + SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x10,0x60); + } + } + } + + if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) { + if(SiS_Pr->SiS_HiVision != 3) { + for(i=0, j=0; i<=0x2d; i++, j++) { + SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,SiS_HiVisionTable[SiS_Pr->SiS_HiVision][j]); + } + for(i=0x39; i<=0x45; i++, j++) { + SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,SiS_HiVisionTable[SiS_Pr->SiS_HiVision][j]); + } } } - if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { /* tv gatingno */ + if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { tempbx = SiS_Pr->SiS_VDE; if((SiS_Pr->SiS_VBInfo & SetCRT2ToTV) && (!(SiS_Pr->SiS_HiVision & 0x03))) { tempbx >>= 1; @@ -6196,33 +7360,35 @@ temp |= 0x18; SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x46,temp); temp = tempbx & 0x00FF; - SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x47,temp); - if(HwDeviceExtension->jChipType >= SIS_315H) { /* TW: Inserted from 650/301LVx 1.10.6s */ - tempax = 0; - if(SiS_Pr->SiS_HiVision & 0x07) { - if(SiS_Pr->SiS_HiVision & 0x04) tempax = 0x1000; - else if(SiS_Pr->SiS_HiVision & 0x01) tempax = 0x3000; - else tempax = 0x5000; + SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x47,temp); /* tv gatingno */ + if(HwDeviceExtension->jChipType >= SIS_315H) { /* TW: 650/30xLV 1.10.6s */ + if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) { + tempax = 0; + if(SiS_Pr->SiS_HiVision & 0x03) { + tempax = 0x3000; + if(SiS_Pr->SiS_HiVision & 0x01) tempax = 0x5000; + } + temp = (tempax & 0xFF00) >> 8; + SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x4d,temp); } - temp = (tempax & 0xFF00) >> 8; - SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x4d,temp); } } tempbx &= 0x00FF; if(!(modeflag & HalfDCLK)) { tempcx = SiS_Pr->SiS_VGAHDE; - if(tempcx >= SiS_Pr->SiS_HDE){ + if(tempcx >= SiS_Pr->SiS_HDE) { tempbx |= 0x2000; tempax &= 0x00FF; } } tempcx = 0x0101; - if(SiS_Pr->SiS_VBInfo & (SetPALTV | SetCRT2ToTV)) { /*301b- TW: BIOS BUG? */ +/*if(SiS_Pr->SiS_VBInfo & (SetPALTV | SetCRT2ToTV)) { */ /*301b- TW: BIOS BUG? */ + if(SiS_Pr->SiS_VBInfo & (SetCRT2ToTV - SetCRT2ToHiVisionTV)) { if(!(SiS_Pr->SiS_HiVision & 0x03)) { if(SiS_Pr->SiS_VGAHDE >= 1024) { - if(!(modeflag & HalfDCLK)) { /* TW: This check not in 630/301B */ + if((!(modeflag & HalfDCLK)) || (HwDeviceExtension->jChipType < SIS_315H)) { /* TW: This check not in 630/301B */ tempcx = 0x1920; if(SiS_Pr->SiS_VGAHDE >= 1280) { tempcx = 0x1420; @@ -6233,8 +7399,7 @@ } } - if(!(tempbx & 0x2000)){ - + if(!(tempbx & 0x2000)) { if(modeflag & HalfDCLK) { tempcx = (tempcx & 0xFF00) | (((tempcx & 0x00FF) << 1) & 0xff); } @@ -6270,17 +7435,17 @@ temp |= 0x18; SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x46,0xE0,temp); if(SiS_Pr->SiS_VBInfo & SetPALTV) { - tempbx = 0x0382; /* TW: BIOS; Was 0x0364; */ - tempcx = 0x007e; /* TW: BIOS; Was 0x009c; */ + tempbx = 0x0382; + tempcx = 0x007e; } else { - tempbx = 0x0369; /* TW: BIOS; Was 0x0346; */ - tempcx = 0x0061; /* TW: BIOS; Was 0x0078; */ + tempbx = 0x0369; + tempcx = 0x0061; } temp = (tempbx & 0x00FF) ; SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x4B,temp); temp = (tempcx & 0x00FF) ; SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x4C,temp); - tempbx &= 0x0300; + tempbx &= 0x03FF; temp = (tempcx & 0xFF00) >> 8; temp = (temp & 0x0003) << 2; temp |= (tempbx >> 8); @@ -6295,7 +7460,7 @@ } temp = 0; - if((HwDeviceExtension->jChipType == SIS_630)|| + if((HwDeviceExtension->jChipType == SIS_630) || (HwDeviceExtension->jChipType == SIS_730)) { temp = 0x35; } else if(HwDeviceExtension->jChipType >= SIS_315H) { @@ -6304,7 +7469,7 @@ if(temp) { if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { if(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x31) & 0x01) { - if(SiS_GetReg1(SiS_Pr->SiS_P3d4,temp) & 0x40) { + if(SiS_GetReg1(SiS_Pr->SiS_P3d4,temp) & EnablePALM) { /* 0x40 */ SiS_SetRegAND(SiS_Pr->SiS_Part2Port,0x00,0xEF); temp = SiS_GetReg1(SiS_Pr->SiS_Part2Port,0x01); SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x01,temp - 1); @@ -6313,21 +7478,23 @@ } } - -#ifdef oldHV - if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) { + if( (SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) && + (!(SiS_Pr->SiS_VBType & VB_SIS301LV302LV)) ) { if(!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) { SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x0B,0x00); } } -#endif if(HwDeviceExtension->jChipType < SIS_315H) { - if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) return; + if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { + SiS_Set300Part2Regs(SiS_Pr, HwDeviceExtension, ModeIdIndex, + RefreshRateTableIndex, BaseAddr, ModeNo); + return; + } } else { /* TW: !!! The following is a duplicate, done for LCDA as well (see above) */ if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { - if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { /* 650/301LV: (VB_SIS301LV | VB_SIS302LV)) */ + if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { if(!(SiS_Pr->SiS_VBInfo & SetPALTV)) { if((ModeNo == 0x4a) || (ModeNo == 0x38)) { @@ -6364,11 +7531,11 @@ /* TW: From here: Part2 LCD setup */ tempbx = SiS_Pr->SiS_HDE; - /* TW: Inserted from 650/301LVx 1.10.6s */ if(HwDeviceExtension->jChipType >= SIS_315H) { + /* TW: 650/30xLV 1.10.6s */ if(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x39) & 0x04) tempbx >>= 1; } - tempbx--; /* RHACTE=HDE-1 */ + tempbx--; /* RHACTE=HDE-1 */ temp = tempbx & 0x00FF; SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x2C,temp); temp = (tempbx & 0xFF00) >> 8; @@ -6408,34 +7575,44 @@ temp = (tempcx & 0xFF00) >> 8; temp <<= 5; - if(HwDeviceExtension->jChipType < SIS_315H) { + + /* Enable dithering; newer versions only do this for 32bpp mode */ + if((HwDeviceExtension->jChipType == SIS_300) && (SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV)) { + if(SiS_Pr->SiS_LCDInfo & LCDRGB18Bit) temp |= 0x10; + } else if(HwDeviceExtension->jChipType < SIS_315H) { if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) temp |= 0x10; else { if(SiS_Pr->SiS_LCDInfo & LCDSync) /* TW: 630/301 BIOS checks this */ temp |= 0x10; } } else { - /* TW: Inserted from 630/301LVx 1.10.6s */ - if(SiS_Pr->SiS_LCDInfo & LCDRGB18Bit) { - if(SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x00) & 0x01) { - temp |= 0x10; - } + if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) { + /* TW: 650/30xLV 1.10.6s */ + if(SiS_Pr->SiS_LCDInfo & LCDRGB18Bit) { + if(SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x00) & 0x01) { /* 32bpp mode? */ + temp |= 0x10; + } + } + } else { + temp |= 0x10; } } /* 630/301 does not do all this */ if((SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD)) { - if(HwDeviceExtension->jChipType >= SIS_315H) { - /* TW: Inserted from 650/301LVx 1.10.6s */ + if((HwDeviceExtension->jChipType >= SIS_315H) && (SiS_Pr->SiS_VBType & VB_SIS301LV302LV)) { + /* TW: 650/30xLV 1.10.6s */ temp |= (SiS_GetReg1(SiS_Pr->SiS_P3d4,0x37) >> 6); - } else { + temp |= 0x08; /* From 1.10.7w */ + if(!(SiS_Pr->SiS_LCDInfo & LCDRGB18Bit)) temp |= 0x04; /* From 1.10.7w */ + } else { tempbx = (tempbx & 0xFF00) | (SiS_Pr->SiS_LCDInfo & 0x0FF); if(tempbx & LCDSync) { - tempbx &= (0xFF00 | LCDSyncBit); - tempbx = (tempbx & 0xFF00) | ((tempbx & 0x00FF) >> LCDSyncShift); - temp |= (tempbx & 0x00FF); + tempbx &= 0xFFE0; + tempbx = (tempbx & 0xFF00) | ((tempbx & 0x00FF) >> 6); + temp |= (tempbx & 0x00FF); } - } + } } SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x1A,temp); @@ -6445,9 +7622,22 @@ SiS_SetRegAND(SiS_Pr->SiS_Part2Port,0x17,0xFB); SiS_SetRegAND(SiS_Pr->SiS_Part2Port,0x18,0xDF); - if(HwDeviceExtension->jChipType >= SIS_315H) { /* ------------- 310 series ------------ */ + /* 1280x960, 1280x1024 and 1600x1200 data invalid/missing in tables, use old calculation */ + if((HwDeviceExtension->jChipType >= SIS_315H) && + (SiS_Pr->SiS_VBType & VB_SIS301LV302LV) && + (SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1280x1024) && + (SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1280x768) && + (SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1600x1200) && + (SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1280x960)) { + +#ifdef SIS315H /* ------------- 310/325/330 series ------------ */ /* TW: Inserted this entire section from 650/301LV(x) BIOS */ + + /* Using this on the 301B with an auto-expanding 1024 panel (CR37=1) results + * in a black bar in modes < 1024; if the panel is non-expanding, the bridge + * scales all modes to 1024. All modes in both variants (exp/non-exp) work. + */ SiS_GetCRT2Part2Ptr(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex, &CRT2Index,&resindex); @@ -6457,11 +7647,11 @@ case Panel_1280x1024 : CRT2Part2Ptr = SiS_Pr->SiS_CRT2Part2_1280x1024_1; break; case Panel_1400x1050 : CRT2Part2Ptr = SiS_Pr->SiS_CRT2Part2_1400x1050_1; break; case Panel_1600x1200 : CRT2Part2Ptr = SiS_Pr->SiS_CRT2Part2_1600x1200_1; break; - case Panel_1024x768 + 16 : CRT2Part2Ptr = SiS_Pr->SiS_CRT2Part2_1024x768_2; break; /* Non-Expanding */ + case Panel_1024x768 + 16: CRT2Part2Ptr = SiS_Pr->SiS_CRT2Part2_1024x768_2; break; /* Non-Expanding */ case Panel_1280x1024 + 16: CRT2Part2Ptr = SiS_Pr->SiS_CRT2Part2_1280x1024_2; break; case Panel_1400x1050 + 16: CRT2Part2Ptr = SiS_Pr->SiS_CRT2Part2_1400x1050_2; break; case Panel_1600x1200 + 16: CRT2Part2Ptr = SiS_Pr->SiS_CRT2Part2_1600x1200_2; break; - case Panel_1024x768 + 32 : CRT2Part2Ptr = SiS_Pr->SiS_CRT2Part2_1024x768_3; break; /* VESA Timing */ + case Panel_1024x768 + 32: CRT2Part2Ptr = SiS_Pr->SiS_CRT2Part2_1024x768_3; break; /* VESA Timing */ case Panel_1280x1024 + 32: CRT2Part2Ptr = SiS_Pr->SiS_CRT2Part2_1280x1024_3; break; case Panel_1400x1050 + 32: CRT2Part2Ptr = SiS_Pr->SiS_CRT2Part2_1400x1050_3; break; case Panel_1600x1200 + 32: CRT2Part2Ptr = SiS_Pr->SiS_CRT2Part2_1600x1200_3; break; @@ -6483,7 +7673,7 @@ SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x25,0x0f,(CRT2Part2Ptr+resindex)->CR[11]); if(!(SiS_Pr->SiS_SetFlag & LCDVESATiming)) { - if(SiS_Pr->SiS_VGAVDE == 0x20d) { + if(SiS_Pr->SiS_VGAVDE == 525) { temp = 0xc3; if(SiS_Pr->SiS_ModeType <= ModeVGA) { temp++; @@ -6492,7 +7682,7 @@ SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x2f,temp); SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x30,0xb3); } - if(SiS_Pr->SiS_VGAVDE == 0x1a4) { + if(SiS_Pr->SiS_VGAVDE == 420) { temp = 0x4d; if(SiS_Pr->SiS_ModeType <= ModeVGA) { temp++; @@ -6502,20 +7692,36 @@ } } - /* TW: Inserted from 650/301LVx 1.10.6s: */ + /* TW: 650/30xLV 1.10.6s: */ /* !!! This is a duplicate, done for LCDA as well - see above */ if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) { - SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x1a,0xfc,0x03); + SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x1a,0xfc,0x03); /* Not done in 1.10.7w */ temp = 1; - if(ModeNo<=0x13) temp = 3; + if(ModeNo <= 0x13) temp = 3; SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x0b,temp); } } +#endif - } else { /* ------------- 300 series ----------- */ + } else { /* ------ 300 series and other bridges, other LCD resolutions ------ */ + /* Using this on the 301B with an auto-expanding 1024 panel (CR37=1) makes + * the panel scale at modes < 1024 (no black bars); if the panel is non-expanding, + * the bridge scales all modes to 1024. + * !!! Malfunction at 640x480 and 640x400 when panel is auto-expanding - black screen !!! + */ + tempcx++; + + if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) tempbx = 768; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) tempbx = 1024; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200) tempbx = 1200; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x768) tempbx = 768; + else if(SiS_Pr->SiS_VDE != 1024) tempbx = 960; + else tempbx = 1024; + +#if 0 /* old */ tempbx = 768; if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1024x768) { tempbx = 1024; @@ -6528,14 +7734,18 @@ } } } - if(SiS_Pr->SiS_LCDInfo & LCDNonExpanding) { +#endif + + if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) { tempbx = SiS_Pr->SiS_VDE - 1; tempcx--; } + tempax = 1; - if(!(SiS_Pr->SiS_LCDInfo & LCDNonExpanding)) { - if(tempbx != SiS_Pr->SiS_VDE){ + if(!(SiS_Pr->SiS_LCDInfo & DontExpandLCD)) { + if(tempbx != SiS_Pr->SiS_VDE) { tempax = tempbx; +/* if(SiS_Pr->SiS_VGAVDE == 525) tempax += 60; in 650/301B BIOS */ if(tempax < SiS_Pr->SiS_VDE) { tempax = 0; tempcx = 0; @@ -6551,13 +7761,17 @@ tempcx -= tempax; /* lcdvdes */ tempbx -= tempax; /* lcdvdee */ } + +#ifdef TWDEBUG + xf86DrvMsg(0, X_INFO, "lcdvds 0x%x lcdvde 0x%x\n", tempcx, tempbx); +#endif temp = tempcx & 0x00FF; /* RVEQ1EQ=lcdvdes */ SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x05,temp); temp = tempbx & 0x00FF; /* RVEQ2EQ=lcdvdee */ SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x06,temp); - temp = ((tempbx & 0xFF00) >> 8 ) << 3; + temp = ((tempbx & 0xFF00) >> 8) << 3; temp |= ((tempcx & 0xFF00) >> 8); SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x02,temp); @@ -6568,7 +7782,11 @@ tempcx >>= 4; tempbx += tempax; tempbx >>= 1; - if(SiS_Pr->SiS_LCDInfo & LCDNonExpanding) tempbx -= 10; + if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) tempbx -= 10; + +#ifdef TWDEBUG + xf86DrvMsg(0, X_INFO, "lcdvrs 0x%x\n", tempbx); +#endif temp = tempbx & 0x00FF; /* RTVACTEE=lcdvrs */ SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x04,temp); @@ -6585,7 +7803,7 @@ (HwDeviceExtension->jChipRevision > 2) ) && (SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) && (!(SiS_Pr->SiS_SetFlag & LCDVESATiming)) && - (!(SiS_Pr->SiS_LCDInfo & LCDNonExpanding)) ) { + (!(SiS_Pr->SiS_LCDInfo & DontExpandLCD)) ) { if(ModeNo == 0x13) { SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x04,0xB9); SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x05,0xCC); @@ -6601,7 +7819,11 @@ } } - /* TW: Inserted missing code from 630/301B BIOS: (II: 3258) */ + /* TW: Inserted missing code from 630/301B BIOS; + * Strangely, this is done in all 650 BIOSes as + * well (although LCDTypeInfo is not used there + * in the same way as on 300 series) + */ if(SiS_Pr->SiS_LCDTypeInfo == 0x0c) { crt2crtc &= 0x1f; @@ -6633,6 +7855,9 @@ tempbx += 2; } push1 = tempbx; +#ifdef TWDEBUG + xf86DrvMsg(0, X_INFO, "lcdhde 0x%x\n", tempbx); +#endif temp = tempbx & 0x00FF; /* RHEQPLE=lcdhdee */ SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x23,temp); temp = (tempbx & 0xFF00) >> 8; @@ -6642,17 +7867,19 @@ if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { temp += 2; } - SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x1F,temp); /* RHBLKE=lcdhdes */ - - SiS_SetRegAND(SiS_Pr->SiS_Part2Port,0x20,0x0F); + SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x1F,temp); /* RHBLKE=lcdhdes[7:0] */ + SiS_SetRegAND(SiS_Pr->SiS_Part2Port,0x20,0x0F); /* lcdhdes [11:8] */ tempbx += tempcx; push2 = tempbx; - temp = tempbx & 0xFF; /* RHBURSTS=lcdhrs */ +#ifdef TWDEBUG + xf86DrvMsg(0, X_INFO, "lcdhrs 0x%x\n", tempbx); +#endif + temp = tempbx & 0x00FF; /* RHBURSTS=lcdhrs */ if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) { - if(SiS_Pr->SiS_LCDInfo & LCDNonExpanding) { - if(SiS_Pr->SiS_HDE == 1280) temp = 0x47; - } + if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) { + if(SiS_Pr->SiS_HDE == 1280) temp = 0x47; + } } SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x1C,temp); temp = ((tempbx & 0xFF00) >> 8) << 4; @@ -6661,6 +7888,9 @@ tempbx = push2; tempcx <<= 1; tempbx += tempcx; +#ifdef TWDEBUG + xf86DrvMsg(0, X_INFO, "lcdhre 0x%x\n", tempbx); +#endif temp = tempbx & 0x00FF; /* RHSYEXP2S=lcdhre */ SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x21,temp); @@ -6676,10 +7906,12 @@ if(SiS_Pr->SiS_ModeType <= ModeVGA) temp=0x4F; else - temp=0x4D; /* 650: 4e */ + temp=0x4D; SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x2f,temp); } } + SiS_Set300Part2Regs(SiS_Pr, HwDeviceExtension, ModeIdIndex, + RefreshRateTableIndex, BaseAddr, ModeNo); } /* HwDeviceExtension */ } @@ -6695,20 +7927,60 @@ return((USHORT) tempax); } +/* TW: New from 300/301LV BIOS 1.16.51 for ECS A907. Seems highly preliminary. */ +void +SiS_Set300Part2Regs(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, + USHORT ModeIdIndex, USHORT RefreshRateTableIndex, + USHORT BaseAddr, USHORT ModeNo) +{ + USHORT crt2crtc, resindex; + int i,j; + const SiS_Part2PortTblStruct *CRT2Part2Ptr = NULL; + + if(HwDeviceExtension->jChipType != SIS_300) return; + if(!(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV)) return; + + if(ModeNo<=0x13) { + crt2crtc = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC; + } else { + crt2crtc = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC; + } + + resindex = crt2crtc & 0x3F; + if(SiS_Pr->SiS_SetFlag & LCDVESATiming) CRT2Part2Ptr = SiS_Pr->SiS_CRT2Part2_1024x768_1; + else CRT2Part2Ptr = SiS_Pr->SiS_CRT2Part2_1024x768_2; + + /* TW: The BIOS code (1.16.51) is obviously a fragment! */ + if(ModeNo > 0x13) { + CRT2Part2Ptr = SiS_Pr->SiS_CRT2Part2_1024x768_1; + resindex = 4; + } + + SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x01,0x80,(CRT2Part2Ptr+resindex)->CR[0]); + SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x02,0x80,(CRT2Part2Ptr+resindex)->CR[1]); + for(i = 2, j = 0x04; j <= 0x06; i++, j++ ) { + SiS_SetReg1(SiS_Pr->SiS_Part2Port,j,(CRT2Part2Ptr+resindex)->CR[i]); + } + for(j = 0x1c; j <= 0x1d; i++, j++ ) { + SiS_SetReg1(SiS_Pr->SiS_Part2Port,j,(CRT2Part2Ptr+resindex)->CR[i]); + } + for(j = 0x1f; j <= 0x21; i++, j++ ) { + SiS_SetReg1(SiS_Pr->SiS_Part2Port,j,(CRT2Part2Ptr+resindex)->CR[i]); + } + SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x23,(CRT2Part2Ptr+resindex)->CR[10]); + SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x25,0x0f,(CRT2Part2Ptr+resindex)->CR[11]); +} + /* TW: Set 301 Macrovision(tm) registers */ -/* TW: Double-Checked against 650/301LV, 650/301LVx and 630/301B BIOS */ void SiS_SetGroup3(SiS_Private *SiS_Pr, USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo, USHORT ModeIdIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension) { USHORT temp; -#ifdef oldHV USHORT i; const UCHAR *tempdi; -#endif USHORT modeflag; - /* TW: Inserted from 650/301LVx 1.10.6s */ if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) return; if(ModeNo<=0x13) @@ -6741,7 +8013,7 @@ if(temp) { if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { if(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x31) & 0x01) { - if(SiS_GetReg1(SiS_Pr->SiS_P3d4,temp) & 0x40){ + if(SiS_GetReg1(SiS_Pr->SiS_P3d4,temp) & EnablePALM){ /* 0x40 */ SiS_SetReg1(SiS_Pr->SiS_Part3Port,0x13,0xFA); SiS_SetReg1(SiS_Pr->SiS_Part3Port,0x14,0xC8); SiS_SetReg1(SiS_Pr->SiS_Part3Port,0x3D,0xA8); @@ -6750,7 +8022,6 @@ } } -#ifdef oldHV if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) { tempdi = SiS_Pr->SiS_HiTVGroup3Data; if(SiS_Pr->SiS_SetFlag & TVSimuMode) { @@ -6759,53 +8030,65 @@ tempdi = SiS_Pr->SiS_HiTVGroup3Text; } } + if(SiS_Pr->SiS_HiVision & 0x03) { + tempdi = SiS_HiTVGroup3_1; + if(SiS_Pr->SiS_HiVision & 0x02) tempdi = SiS_HiTVGroup3_2; + } for(i=0; i<=0x3E; i++){ SiS_SetReg1(SiS_Pr->SiS_Part3Port,i,tempdi[i]); } } -#endif return; } /* TW: Set 301 VGA2 registers */ -/* TW: Double-Checked against 650/301LV(x) and 630/301B BIOS */ void SiS_SetGroup4(SiS_Private *SiS_Pr, USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo, USHORT ModeIdIndex,USHORT RefreshRateTableIndex, PSIS_HW_DEVICE_INFO HwDeviceExtension) { - USHORT tempax,tempcx,tempbx,modeflag,temp,temp2; + USHORT tempax,tempcx,tempbx,modeflag,temp,temp2,resinfo; ULONG tempebx,tempeax,templong; - if(ModeNo<=0x13) + + if(ModeNo<=0x13) { modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag; - else + resinfo = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ResInfo; + } else { modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag; + resinfo = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO; + } - /* TW: From 650/301LVx 1.10.6s BIOS */ - if(SiS_Pr->SiS_VBType & (VB_SIS30xLV | VB_SIS30xNEW)) { - if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) { - SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x24,0x0e); - } + if(HwDeviceExtension->jChipType >= SIS_315H) { + /* TW: From 650/302LV 1.10.6s (not for 300/301LV - no LCDA on this combination) */ + if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) { + if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) { + SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x24,0x0e); + } + } } - if(SiS_Pr->SiS_VBType & VB_SIS30xNEW) { + if(SiS_Pr->SiS_VBType & VB_SIS302LV) { if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x10,0x9f); } } - /* TW: From 650/301LV BIOS */ - if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) { - /* TW: This is a duplicate; done at the end, too */ - if(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x39) & 0x04) { + if(HwDeviceExtension->jChipType >= SIS_315H) { + if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) { + if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) { + /* TW: From 650/301LV (any, incl. 1.10.6s, 1.10.7w) */ + /* TW: This is a duplicate; done at the end, too */ + if(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x39) & 0x04) { SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x27,0x2c); + } + SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x2a,0x00); + SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x30,0x00); + SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x34,0x10); } - SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x2a,0x00); - SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x30,0x00); - SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x34,0x10); return; + } } temp = SiS_Pr->SiS_RVBHCFACT; @@ -6833,13 +8116,11 @@ temp = temp2 | ((tempcx & 0xFF00) >> 8); SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x15,temp); - tempcx = SiS_Pr->SiS_VBInfo; tempbx = SiS_Pr->SiS_VGAHDE; if(modeflag & HalfDCLK) tempbx >>= 1; /* TW: New for 650/301LV and 630/301B */ temp = 0xA0; -#ifdef oldHV if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) { temp = 0; if(tempbx > 800) { @@ -6850,18 +8131,17 @@ } } } else -#endif if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { if(tempbx <= 800) { temp = 0x80; - if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD){ + if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { temp = 0; if(tempbx > 800) temp = 0x60; } } } else { temp = 0x80; - if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD){ + if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { temp = 0; if(tempbx > 800) temp = 0x60; } @@ -6883,11 +8163,9 @@ tempebx = SiS_Pr->SiS_VDE; -#ifdef oldHV if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) { if(!(temp & 0xE0)) tempebx >>=1; } -#endif tempcx = SiS_Pr->SiS_RVBHRS; temp = tempcx & 0x00FF; @@ -6932,7 +8210,8 @@ } } - if((SiS_Pr->SiS_VBInfo & (SetCRT2ToTV | SetPALTV)) && (!(SiS_Pr->SiS_HiVision & 0x03))) { +/* if((SiS_Pr->SiS_VBInfo & (SetCRT2ToTV | SetPALTV)) && (!(SiS_Pr->SiS_HiVision & 0x03))) { */ + if((SiS_Pr->SiS_VBInfo & (SetCRT2ToTV - SetCRT2ToHiVisionTV)) && (!(SiS_Pr->SiS_HiVision & 0x03))) { if(tempax > 800) { tempbx = 8; if(tempax == 1024) @@ -6949,12 +8228,25 @@ tempax--; temp = (tempax & 0xFF00) >> 8; temp &= 0x03; + if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { /* From 1.10.7w */ + if(ModeNo > 0x13) { /* From 1.10.7w */ + if(resinfo == 8) tempax = 0x1f; /* From 1.10.7w */ + } /* From 1.10.7w */ + } /* From 1.10.7w */ SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x1D,tempax & 0x00FF); temp <<= 4; temp |= tempbx; SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x1E,temp); - temp = 0x0036; + if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) { + if(IS_SIS650740) { + temp = 0x0026; /* 1.10.7w; 1.10.8r; needs corresponding code in Dis/EnableBridge! */ + } else { + temp = 0x0036; + } + } else { + temp = 0x0036; + } if((SiS_Pr->SiS_VBInfo & (SetCRT2ToTV - SetCRT2ToHiVisionTV)) && (!(SiS_Pr->SiS_HiVision & 0x03))) { temp |= 0x01; @@ -6975,21 +8267,33 @@ SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x21,0xC0,temp); temp = tempbx & 0x00FF; SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x22,temp); - if( (SiS_Pr->SiS_VBType & (VB_SIS30xLV | VB_SIS30xNEW)) && - (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) ) { - SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x24,0x0e); + + if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) { + if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { + SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x24,0x0e); + } } - /* TW: 650 BIOS does this for all bridge types - assumingly wrong */ if(HwDeviceExtension->jChipType >= SIS_315H) { + /* TW: 650/LV BIOS does this for all bridge types - assumingly wrong */ + /* 315, 330, 650+301B BIOS don't do this at all */ /* TW: This is a duplicate; done for LCDA as well (see above) */ - if(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x39) & 0x04) { - SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x27,0x2c); + if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) { + if(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x39) & 0x04) { + SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x27,0x2c); + } + SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x2a,0x00); + SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x30,0x00); + SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x34,0x10); } - SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x2a,0x00); - SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x30,0x00); - SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x34,0x10); - } + } else if(HwDeviceExtension->jChipType == SIS_300) { + /* TW: 300/301LV BIOS does this for all bridge types - assumingly wrong */ + if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) { + SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x2a,0x00); + SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x30,0x00); + SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x34,0x10); + } + } } /* 301B */ @@ -6997,7 +8301,7 @@ RefreshRateTableIndex,HwDeviceExtension); } -/* TW: Double-Checked against 650/301LV(x) and 630/301B BIOS */ + void SiS_SetCRT2VCLK(SiS_Private *SiS_Pr, USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex, USHORT RefreshRateTableIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension) @@ -7009,12 +8313,12 @@ HwDeviceExtension); if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { - tempah = SiS_Pr->SiS_VBVCLKData[vclkindex].Part4_A; - SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x0A,tempah); - tempah = SiS_Pr->SiS_VBVCLKData[vclkindex].Part4_B; - SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x0B,tempah); - /* TW: New from 650/301LV, LVx BIOS */ - if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { /* 650/301LV: (VB_SIS301LV | VB_SIS302LV)) */ + tempah = SiS_Pr->SiS_VBVCLKData[vclkindex].Part4_A; + SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x0A,tempah); + tempah = SiS_Pr->SiS_VBVCLKData[vclkindex].Part4_B; + SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x0B,tempah); + if(HwDeviceExtension->jChipType >= SIS_315H) { + if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { if(!(SiS_Pr->SiS_VBInfo & SetPALTV)) { if((ModeNo == 0x4a) || (ModeNo == 0x38)) { @@ -7025,27 +8329,27 @@ } } } - } else { /* 650/301LVx does not do this anymore, jumps to SetRegs above - BUG? */ - SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x0A,0x01); - tempah = SiS_Pr->SiS_VBVCLKData[vclkindex].Part4_B; - SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x0B,tempah); - tempah = SiS_Pr->SiS_VBVCLKData[vclkindex].Part4_A; - SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x0A,tempah); + } + } else { + SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x0A,0x01); + tempah = SiS_Pr->SiS_VBVCLKData[vclkindex].Part4_B; + SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x0B,tempah); + tempah = SiS_Pr->SiS_VBVCLKData[vclkindex].Part4_A; + SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x0A,tempah); } SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x12,0x00); tempah = 0x08; - if(SiS_Pr->SiS_VBInfo & SetCRT2ToRAMDAC) { - tempah |= 0x20; - } + if(SiS_Pr->SiS_VBInfo & SetCRT2ToRAMDAC) tempah |= 0x20; SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x12,tempah); } -/* TW: Double-checked against 650/LVDS (1.10.07), 630/301B/LVDS/LVDS+CH, 650/301LVx (1.10.6s) BIOS */ USHORT SiS_GetVCLK2Ptr(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex, USHORT RefreshRateTableIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension) { USHORT tempbx; + const USHORT LCDXlat0VCLK[4] = {VCLK40, VCLK40, VCLK40, VCLK40}; + const USHORT LVDSXlat1VCLK[4] = {VCLK40, VCLK40, VCLK40, VCLK40}; #ifdef SIS300 const USHORT LCDXlat1VCLK300[4] = {VCLK65, VCLK65, VCLK65, VCLK65}; const USHORT LCDXlat2VCLK300[4] = {VCLK108_2,VCLK108_2,VCLK108_2,VCLK108_2}; @@ -7057,10 +8361,7 @@ const USHORT LCDXlat2VCLK310[4] = {VCLK108_2+5,VCLK108_2+5,VCLK108_2+5,VCLK108_2+5}; const USHORT LVDSXlat2VCLK310[4]= {VCLK65+2, VCLK65+2, VCLK65+2, VCLK65+2}; const USHORT LVDSXlat3VCLK310[4]= {VCLK108_2+5,VCLK108_2+5,VCLK108_2+5,VCLK108_2+5}; - /* {VCLK65+2, VCLK65+2, VCLK65+2, VCLK65+2}; - 650/LVDS 1.10.07 */ #endif - const USHORT LCDXlat0VCLK[4] = {VCLK40, VCLK40, VCLK40, VCLK40}; - const USHORT LVDSXlat1VCLK[4] = {VCLK40, VCLK40, VCLK40, VCLK40}; USHORT CRT2Index,VCLKIndex=0; USHORT modeflag,resinfo; const UCHAR *CHTVVCLKPtr=NULL; @@ -7069,25 +8370,23 @@ const USHORT *LVDSXlatVCLK2 = NULL; const USHORT *LVDSXlatVCLK3 = NULL; -#ifdef SIS315H if(HwDeviceExtension->jChipType >= SIS_315H) { +#ifdef SIS315H LCDXlatVCLK1 = LCDXlat1VCLK310; LCDXlatVCLK2 = LCDXlat2VCLK310; LVDSXlatVCLK2 = LVDSXlat2VCLK310; LVDSXlatVCLK3 = LVDSXlat3VCLK310; - } else { #endif + } else { #ifdef SIS300 LCDXlatVCLK1 = LCDXlat1VCLK300; LCDXlatVCLK2 = LCDXlat2VCLK300; LVDSXlatVCLK2 = LVDSXlat2VCLK300; LVDSXlatVCLK3 = LVDSXlat3VCLK300; #endif -#ifdef SIS315H } -#endif - if(ModeNo<=0x13) { + if(ModeNo <= 0x13) { modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag; resinfo = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ResInfo; CRT2Index = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC; @@ -7097,35 +8396,39 @@ CRT2Index = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC; } - if(SiS_Pr->SiS_IF_DEF_LVDS == 0) { /* 301 */ + if(SiS_Pr->SiS_IF_DEF_LVDS == 0) { /* 30x/B/LV */ - if (SiS_Pr->SiS_SetFlag & ProgrammingCRT2) { + if(SiS_Pr->SiS_SetFlag & ProgrammingCRT2) { CRT2Index >>= 6; if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)){ /* LCD */ if(HwDeviceExtension->jChipType < SIS_315H) { - /* TW: Inserted from 630/301B BIOS */ if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel800x600) VCLKIndex = LCDXlat0VCLK[CRT2Index]; else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) VCLKIndex = LCDXlatVCLK1[CRT2Index]; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x600) + VCLKIndex = LCDXlatVCLK1[CRT2Index]; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1152x768) + VCLKIndex = LCDXlatVCLK1[CRT2Index]; else VCLKIndex = LCDXlatVCLK2[CRT2Index]; } else { - /* TW: 650/301LV BIOS does not check expanding, 315 does */ - if( (HwDeviceExtension->jChipType > SIS_315PRO) || - (!(SiS_Pr->SiS_LCDInfo & LCDNonExpanding)) ) { + if( (SiS_Pr->SiS_VBType & VB_SIS301LV302LV) || + (!(SiS_Pr->SiS_LCDInfo & DontExpandLCD)) ) { if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) { VCLKIndex = 0x19; + } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x768) { + VCLKIndex = 0x12; /* TEMP - guessed */ } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) { VCLKIndex = 0x19; } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200) { VCLKIndex = 0x21; + } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x960) { + VCLKIndex = 0x45; /* TW: in VBVCLK table */ + if(resinfo == 0x09) VCLKIndex++; } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) { VCLKIndex = LCDXlatVCLK1[CRT2Index]; - } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x960) { - VCLKIndex = 0x45; - if(resinfo == 0x09) VCLKIndex++; } else { VCLKIndex = LCDXlatVCLK2[CRT2Index]; } @@ -7135,16 +8438,23 @@ if(ModeNo > 0x13) { VCLKIndex = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK; } - if(ModeNo <= 0x13) { /* TW: Inserted from 315 BIOS */ - if(SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC == 1) VCLKIndex = 0x42; + if(ModeNo <= 0x13) { + if(HwDeviceExtension->jChipType <= SIS_315PRO) { + if(SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC == 1) VCLKIndex = 0x42; + } else { + if(SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC == 1) VCLKIndex = 0x00; + } + } + if(HwDeviceExtension->jChipType <= SIS_315PRO) { + if(VCLKIndex == 0) VCLKIndex = 0x41; + if(VCLKIndex == 1) VCLKIndex = 0x43; + if(VCLKIndex == 4) VCLKIndex = 0x44; } - if(VCLKIndex == 0) VCLKIndex = 0x41; - if(VCLKIndex == 1) VCLKIndex = 0x43; - if(VCLKIndex == 4) VCLKIndex = 0x44; } } } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { /* TV */ - if((SiS_Pr->SiS_IF_DEF_HiVision == 1) && (SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV)) { + if( (SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) && + (!(SiS_Pr->SiS_VBType & VB_SIS301LV302LV)) ) { if(SiS_Pr->SiS_SetFlag & RPLLDIV2XO) VCLKIndex = HiTVVCLKDIV2; else VCLKIndex = HiTVVCLK; if(SiS_Pr->SiS_SetFlag & TVSimuMode) { @@ -7199,13 +8509,29 @@ VCLKIndex &= 0x1f; tempbx = 0; - if(SiS_Pr->SiS_VBInfo & SetPALTV) tempbx += 2; - if(SiS_Pr->SiS_VBInfo & SetCHTVOverScan) tempbx += 1; + if(SiS_Pr->SiS_VBInfo & SetCHTVOverScan) tempbx += 1; + if(SiS_Pr->SiS_VBInfo & SetPALTV) { + tempbx += 2; + if(SiS_Pr->SiS_CHSOverScan) tempbx = 8; + if(SiS_Pr->SiS_CHPALM) { + tempbx = 4; + if(SiS_Pr->SiS_VBInfo & SetCHTVOverScan) tempbx += 1; + } else if(SiS_Pr->SiS_CHPALN) { + tempbx = 6; + if(SiS_Pr->SiS_VBInfo & SetCHTVOverScan) tempbx += 1; + } + } switch(tempbx) { - case 0: CHTVVCLKPtr = SiS_Pr->SiS_CHTVVCLKUNTSC; break; - case 1: CHTVVCLKPtr = SiS_Pr->SiS_CHTVVCLKONTSC; break; - case 2: CHTVVCLKPtr = SiS_Pr->SiS_CHTVVCLKUPAL; break; - case 3: CHTVVCLKPtr = SiS_Pr->SiS_CHTVVCLKOPAL; break; + case 0: CHTVVCLKPtr = SiS_Pr->SiS_CHTVVCLKUNTSC; break; + case 1: CHTVVCLKPtr = SiS_Pr->SiS_CHTVVCLKONTSC; break; + case 2: CHTVVCLKPtr = SiS_Pr->SiS_CHTVVCLKUPAL; break; + case 3: CHTVVCLKPtr = SiS_Pr->SiS_CHTVVCLKOPAL; break; + case 4: CHTVVCLKPtr = SiS_Pr->SiS_CHTVVCLKUPALM; break; + case 5: CHTVVCLKPtr = SiS_Pr->SiS_CHTVVCLKOPALM; break; + case 6: CHTVVCLKPtr = SiS_Pr->SiS_CHTVVCLKUPALN; break; + case 7: CHTVVCLKPtr = SiS_Pr->SiS_CHTVVCLKOPALN; break; + case 8: CHTVVCLKPtr = SiS_Pr->SiS_CHTVVCLKSOPAL; break; + default: CHTVVCLKPtr = SiS_Pr->SiS_CHTVVCLKOPAL; break; } VCLKIndex = CHTVVCLKPtr[VCLKIndex]; @@ -7213,12 +8539,14 @@ VCLKIndex >>= 6; if((SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel800x600) || - (SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel320x480)) + (SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel320x480)) VCLKIndex = LVDSXlat1VCLK[VCLKIndex]; else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) VCLKIndex = LVDSXlatVCLK2[VCLKIndex]; else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x600) VCLKIndex = LVDSXlatVCLK2[VCLKIndex]; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1152x768) + VCLKIndex = LVDSXlatVCLK2[VCLKIndex]; else VCLKIndex = LVDSXlatVCLK3[VCLKIndex]; } else { @@ -7227,12 +8555,14 @@ VCLKIndex = ((VCLKIndex >> 2) & 0x03); if(ModeNo > 0x13) { VCLKIndex = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK; + if(HwDeviceExtension->jChipType < SIS_315H) { + VCLKIndex &= 0x3F; + } if( (HwDeviceExtension->jChipType == SIS_630) && (HwDeviceExtension->jChipRevision >= 0x30) ) { if(VCLKIndex == 0x14) VCLKIndex = 0x2e; } } - } } else { /* if not programming CRT2 */ @@ -7242,20 +8572,26 @@ if(ModeNo > 0x13) { VCLKIndex = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK; if(HwDeviceExtension->jChipType < SIS_315H) { + VCLKIndex &= 0x3F; if( (HwDeviceExtension->jChipType != SIS_630) && (HwDeviceExtension->jChipType != SIS_300) ) { if(VCLKIndex == 0x1b) VCLKIndex = 0x35; } +#if 0 + if(HwDeviceExtension->jChipType == SIS_730) { + if(VCLKIndex == 0x0b) VCLKIndex = 0x40; /* 1024x768-70 */ + if(VCLKIndex == 0x0d) VCLKIndex = 0x41; /* 1024x768-75 */ + } +#endif } } } } - - if(HwDeviceExtension->jChipType < SIS_315H) { - VCLKIndex &= 0x3F; - } +#ifdef TWDEBUG + xf86DrvMsg(0, X_INFO, "VCLKIndex %d (0x%x)\n", VCLKIndex, VCLKIndex); +#endif return (VCLKIndex); } @@ -7269,15 +8605,13 @@ if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) return; if(SiS_Pr->SiS_ModeType == ModeVGA){ - if(!(SiS_Pr->SiS_VBInfo & (SetInSlaveMode | LoadDACFlag))){ - SiS_EnableCRT2(SiS_Pr); - SiS_LoadDAC(SiS_Pr,HwDeviceExtension,ROMAddr,ModeNo,ModeIdIndex); - } + if(!(SiS_Pr->SiS_VBInfo & (SetInSlaveMode | LoadDACFlag))){ + SiS_EnableCRT2(SiS_Pr); + SiS_LoadDAC(SiS_Pr,HwDeviceExtension,ROMAddr,ModeNo,ModeIdIndex); + } } - return; } -/* TW: Checked against 650/LVDS and 630/301B BIOS */ void SiS_ModCRT1CRTC(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex, USHORT RefreshRateTableIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension) @@ -7297,9 +8631,8 @@ if(temp == 0) return; - /* TW: Inserted from 630/LVDS BIOS */ if(HwDeviceExtension->jChipType < SIS_315H) { - if(SiS_Pr->SiS_SetFlag & CRT2IsVGA) return; + if(SiS_Pr->SiS_SetFlag & SetDOSMode) return; } switch(DisplayType) { @@ -7338,6 +8671,12 @@ case 37: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11600x1200_1_H; break; case 38: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11600x1200_2; break; case 39: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11600x1200_2_H; break; + case 40: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11280x768_1; break; + case 41: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11280x768_1_H; break; + case 42: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11280x768_2; break; + case 43: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11280x768_2_H; break; + case 99: LVDSCRT1Ptr = SiS_Pr->SiS_CHTVCRT1SOPAL; break; + default: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11024x768_1; break; } SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x11,0x7f); /*unlock cr0-7 */ @@ -7368,116 +8707,21 @@ tempah = (LVDSCRT1Ptr+ResInfo)->CR[14]; tempah &= 0xE0; - SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0E,0x1f,tempah); /* TW: Modfied (650/LVDS); Was SetReg(tempah) */ + SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0E,0x1f,tempah); tempah = (LVDSCRT1Ptr+ResInfo)->CR[14]; tempah &= 0x01; tempah <<= 5; - if(modeflag & DoubleScanMode){ - tempah |= 0x080; - } + if(modeflag & DoubleScanMode) tempah |= 0x080; SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x09,~0x020,tempah); - /* TW: Inserted from 650/LVDS BIOS */ + /* TW: 650/LVDS BIOS - doesn't make sense */ if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { if(modeflag & HalfDCLK) SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x11,0x7f); } - - return; -} - -#if 0 /* TW: Unused */ -/*301b*/ -void -SiS_CHACRT1CRTC(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex, - USHORT RefreshRateTableIndex) -{ - USHORT temp,tempah,i,modeflag,j; - USHORT ResInfo,DisplayType; - SiS_LVDSCRT1DataStruct *LVDSCRT1Ptr=NULL; - - if(ModeNo<=0x13) { - modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag; /* si+St_ResInfo */ - } else { - modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag; /* si+Ext_ResInfo */ - } - - temp=SiS_GetLVDSCRT1Ptr(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex, - &ResInfo,&DisplayType); - if(temp==0){ - return; - } - - switch(DisplayType) { - case 0 : LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT1800x600_1; break; - case 1 : LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11024x768_1; break; - case 2 : LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11280x1024_1; break; - case 3 : LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT1800x600_1_H; break; - case 4 : LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11024x768_1_H; break; - case 5 : LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11280x1024_1_H; break; - case 6 : LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT1800x600_2; break; - case 7 : LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11024x768_2; break; - case 8 : LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11280x1024_2; break; - case 9 : LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT1800x600_2_H; break; - case 10: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11024x768_2_H; break; - case 11: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11280x1024_2_H; break; - case 12: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT1XXXxXXX_1; break; - case 13: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT1XXXxXXX_1_H; break; - case 14: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11400x1050_1; break; - case 15: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11400x1050_1_H; break; - case 16: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11400x1050_2; break; - case 17: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11400x1050_2_H; break; - case 18: LVDSCRT1Ptr = SiS_Pr->SiS_CHTVCRT1UNTSC; break; - case 19: LVDSCRT1Ptr = SiS_Pr->SiS_CHTVCRT1ONTSC; break; - case 20: LVDSCRT1Ptr = SiS_Pr->SiS_CHTVCRT1UPAL; break; - case 21: LVDSCRT1Ptr = SiS_Pr->SiS_CHTVCRT1OPAL; break; - case 22: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT1320x480_1; break; /* FSTN */ - } - - tempah=(UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3d4,0x11); /*unlock cr0-7 */ - tempah=tempah&0x7F; - SiS_SetReg1(SiS_Pr->SiS_P3d4,0x11,tempah); - tempah = (LVDSCRT1Ptr+ResInfo)->CR[0]; - SiS_SetReg1(SiS_Pr->SiS_P3d4,0x0,tempah); - for(i=0x02,j=1;i<=0x05;i++,j++){ - tempah = (LVDSCRT1Ptr+ResInfo)->CR[j]; - SiS_SetReg1(SiS_Pr->SiS_P3d4,i,tempah); - } - for(i=0x06,j=5;i<=0x07;i++,j++){ - tempah = (LVDSCRT1Ptr+ResInfo)->CR[j]; - SiS_SetReg1(SiS_Pr->SiS_P3d4,i,tempah); - } - for(i=0x10,j=7;i<=0x11;i++,j++){ - tempah = (LVDSCRT1Ptr+ResInfo)->CR[j]; - SiS_SetReg1(SiS_Pr->SiS_P3d4,i,tempah); - } - for(i=0x15,j=9;i<=0x16;i++,j++){ - tempah = (LVDSCRT1Ptr+ResInfo)->CR[j]; - SiS_SetReg1(SiS_Pr->SiS_P3d4,i,tempah); - } - - for(i=0x0A,j=11;i<=0x0C;i++,j++){ - tempah = (LVDSCRT1Ptr+ResInfo)->CR[j]; - SiS_SetReg1(SiS_Pr->SiS_P3c4,i,tempah); - } - - tempah = (LVDSCRT1Ptr+ResInfo)->CR[14]; - tempah=tempah&0x0E0; - SiS_SetReg1(SiS_Pr->SiS_P3c4,0x0E,tempah); - - tempah = (LVDSCRT1Ptr+ResInfo)->CR[14]; - tempah=tempah&0x01; - tempah=tempah<<5; - if(modeflag&DoubleScanMode){ - tempah=tempah|0x080; - } - SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x09,~0x020,tempah); - return; } -#endif -/* TW: Checked against 650/LVDS BIOS: modified for new panel resolutions */ BOOLEAN SiS_GetLVDSCRT1Ptr(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex, USHORT RefreshRateTableIndex,USHORT *ResInfo, @@ -7487,10 +8731,11 @@ USHORT Flag,CRT2CRTC; if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { - /* TW: Inserted from 650/LVDS BIOS */ - if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) { - if(!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) return 0; - } + if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) { + if(!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) return 0; + } + } else { + if(!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) return 0; } if(ModeNo <= 0x13) { @@ -7504,45 +8749,60 @@ Flag = 1; tempbx = 0; if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) { - if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD)) { - Flag = 0; - tempbx = 18; - if(SiS_Pr->SiS_VBInfo & SetPALTV) tempbx += 2; - if(SiS_Pr->SiS_VBInfo & SetCHTVOverScan) tempbx++; - } + if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD)) { + Flag = 0; + tempbx = 18; + if(SiS_Pr->SiS_VBInfo & SetCHTVOverScan) tempbx++; + if(SiS_Pr->SiS_VBInfo & SetPALTV) { + tempbx += 2; + if(SiS_Pr->SiS_CHSOverScan) tempbx = 99; + if(SiS_Pr->SiS_CHPALM) { + tempbx = 18; /* PALM uses NTSC data */ + if(SiS_Pr->SiS_VBInfo & SetCHTVOverScan) tempbx++; + } else if(SiS_Pr->SiS_CHPALN) { + tempbx = 20; /* PALN uses PAL data */ + if(SiS_Pr->SiS_VBInfo & SetCHTVOverScan) tempbx++; + } + } + } } if(Flag) { - tempbx = SiS_Pr->SiS_LCDResInfo; - tempbx -= SiS_Pr->SiS_PanelMinLVDS; - if(SiS_Pr->SiS_LCDResInfo <= SiS_Pr->SiS_Panel1280x1024) { - if(SiS_Pr->SiS_LCDInfo & LCDNonExpanding) tempbx += 6; - if(modeflag & HalfDCLK) tempbx += 3; - } else { - if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) { + tempbx = SiS_Pr->SiS_LCDResInfo; + tempbx -= SiS_Pr->SiS_PanelMinLVDS; + if(SiS_Pr->SiS_LCDResInfo <= SiS_Pr->SiS_Panel1280x1024) { + if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) tempbx += 6; + if(modeflag & HalfDCLK) tempbx += 3; + } else { + if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) { tempbx = 14; - if(SiS_Pr->SiS_LCDInfo & LCDNonExpanding) tempbx += 2; + if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) tempbx += 2; if(modeflag & HalfDCLK) tempbx++; - } else if(SiS_Pr->SiS_LCDInfo & LCDPass11) { - tempbx = 12; - if(modeflag & HalfDCLK) tempbx++; - } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x600) { + } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x600) { tempbx = 23; - if(SiS_Pr->SiS_LCDInfo & LCDNonExpanding) tempbx += 2; + if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) tempbx += 2; if(modeflag & HalfDCLK) tempbx++; - } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1152x768) { + } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1152x768) { tempbx = 27; - if(SiS_Pr->SiS_LCDInfo & LCDNonExpanding) tempbx += 2; + if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) tempbx += 2; if(modeflag & HalfDCLK) tempbx++; - } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200) { + } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200) { tempbx = 36; - if(SiS_Pr->SiS_LCDInfo & LCDNonExpanding) tempbx += 2; + if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) tempbx += 2; if(modeflag & HalfDCLK) tempbx++; - } - } + } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x768) { + tempbx = 40; + if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) tempbx += 2; + if(modeflag & HalfDCLK) tempbx++; + } + } + if(SiS_Pr->SiS_LCDInfo & LCDPass11) { + tempbx = 12; + if(modeflag & HalfDCLK) tempbx++; + } } if(SiS_Pr->SiS_IF_DEF_FSTN){ - if(SiS_Pr->SiS_LCDResInfo==SiS_Pr->SiS_Panel320x480){ - tempbx=22; + if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel320x480){ + tempbx = 22; } } *ResInfo = CRT2CRTC & 0x3F; @@ -7550,20 +8810,13 @@ return 1; } -/* TW: Checked against 650/LVDS (1.10a, 1.10.07), 630/301B (I/II) and 630/LVDS BIOS */ void SiS_SetCRT2ECLK(SiS_Private *SiS_Pr, UCHAR *ROMAddr, USHORT ModeNo,USHORT ModeIdIndex, USHORT RefreshRateTableIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension) { USHORT tempah,tempal,pushax; USHORT vclkindex=0; - - if(HwDeviceExtension->jChipType < SIS_315H) { - if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { - if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD)) return; - } - } - + if((SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel640x480) || (SiS_Pr->SiS_IF_DEF_TRUMPION == 1)) { SiS_Pr->SiS_SetFlag &= (~ProgrammingCRT2); tempal = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK; @@ -7576,7 +8829,7 @@ vclkindex = SiS_GetVCLK2Ptr(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex, RefreshRateTableIndex,HwDeviceExtension); } - + tempal = 0x02B; if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) { if(!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) { @@ -7644,19 +8897,37 @@ tempcl = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC; TVType = 0; - if(SiS_Pr->SiS_VBInfo & SetPALTV) TVType += 2; if(SiS_Pr->SiS_VBInfo & SetCHTVOverScan) TVType += 1; + if(SiS_Pr->SiS_VBInfo & SetPALTV) { + TVType += 2; + if(SiS_Pr->SiS_CHSOverScan) TVType = 8; + if(SiS_Pr->SiS_CHPALM) { + TVType = 4; + if(SiS_Pr->SiS_VBInfo & SetCHTVOverScan) TVType += 1; + } else if(SiS_Pr->SiS_CHPALN) { + TVType = 6; + if(SiS_Pr->SiS_VBInfo & SetCHTVOverScan) TVType += 1; + } + } switch(TVType) { - case 0: CHTVRegData = SiS_Pr->SiS_CHTVReg_UNTSC; break; - case 1: CHTVRegData = SiS_Pr->SiS_CHTVReg_ONTSC; break; - case 2: CHTVRegData = SiS_Pr->SiS_CHTVReg_UPAL; break; - case 3: CHTVRegData = SiS_Pr->SiS_CHTVReg_OPAL; break; + case 0: CHTVRegData = SiS_Pr->SiS_CHTVReg_UNTSC; break; + case 1: CHTVRegData = SiS_Pr->SiS_CHTVReg_ONTSC; break; + case 2: CHTVRegData = SiS_Pr->SiS_CHTVReg_UPAL; break; + case 3: CHTVRegData = SiS_Pr->SiS_CHTVReg_OPAL; break; + case 4: CHTVRegData = SiS_Pr->SiS_CHTVReg_UPALM; break; + case 5: CHTVRegData = SiS_Pr->SiS_CHTVReg_OPALM; break; + case 6: CHTVRegData = SiS_Pr->SiS_CHTVReg_UPALN; break; + case 7: CHTVRegData = SiS_Pr->SiS_CHTVReg_OPALN; break; + case 8: CHTVRegData = SiS_Pr->SiS_CHTVReg_SOPAL; break; + default: CHTVRegData = SiS_Pr->SiS_CHTVReg_OPAL; break; } resindex = tempcl & 0x3F; if(SiS_Pr->SiS_IF_DEF_CH70xx == 1) { - /* Chrontel 7005 */ +#ifdef SIS300 + + /* Chrontel 7005 - I assume that it does not come with a 310/325 series chip */ /* TW: We don't support modes >800x600 */ if (resindex > 5) return; @@ -7712,7 +8983,7 @@ SiS_SetCH70xxANDOR(SiS_Pr,0x0010,0x1F); /* TW: Register 0x11 only contains 3 writable bits (S0-S2) for - contrast enhancement (set to 010 -> gain 2 Yout = 9/8*(Yin-57) ) + contrast enhancement (set to 010 -> gain 1 Yout = 17/16*(Yin-30) ) */ SiS_SetCH70xxANDOR(SiS_Pr,0x0211,0xF8); @@ -7768,10 +9039,14 @@ SiS_SetCH70xxANDOR(SiS_Pr,0x0121,0xFE); /* ACIV on */ } } + +#endif /* 300 */ } else { - /* Chrontel 7019 */ + /* Chrontel 7019 - assumed that it does not come with a 300 series chip */ + +#ifdef SIS315H /* TW: We don't support modes >1024x768 */ if (resindex > 6) return; @@ -7839,93 +9114,181 @@ temp = CHTVRegData[resindex].Reg[15]; tempbx=((temp & 0x00FF) <<8 ) | 0x10; SiS_SetCH701x(SiS_Pr,tempbx); + +#endif /* 315 */ + + } +} + +/* TW: Chrontel 701x functions ================================= */ + +void +SiS_Chrontel701xBLOn(SiS_Private *SiS_Pr) +{ +#ifndef NEWCH701x + USHORT temp; +#endif + + /* TW: Enable Chrontel 7019 LCD panel backlight */ + if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) { +#ifdef NEWCH701x + SiS_SetCH701x(SiS_Pr,0x6566); +#else + temp = SiS_GetCH701x(SiS_Pr,0x66); + temp |= 0x20; + SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x66); +#endif + } +} + +void +SiS_Chrontel701xBLOff(SiS_Private *SiS_Pr) +{ + USHORT temp; + /* TW: Disable Chrontel 7019 LCD panel backlight */ + if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) { + temp = SiS_GetCH701x(SiS_Pr,0x66); + temp &= 0xDF; + SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x66); } } +#ifdef SIS315H /* -------- 310/325 series only --------- */ + void SiS_SetCH701xForLCD(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr) { +#ifdef NEWCH701x + UCHAR regtable[] = { 0x1c, 0x5f, 0x64, 0x6f, 0x70, 0x71, + 0x72, 0x73, 0x74, 0x76, 0x78, 0x7d, 0x66 }; + UCHAR table1024[] = { 0x60, 0x02, 0x00, 0x07, 0x40, 0xed, + 0xa3, 0xc8, 0xc7, 0xac, 0xe0, 0x02, 0x44 }; + UCHAR table1280[] = { 0x60, 0x03, 0x11, 0x00, 0x40, 0xe3, + 0xad, 0xdb, 0xf6, 0xac, 0xe0, 0x02, 0x44 }; + UCHAR table1400[] = { 0x60, 0x03, 0x11, 0x00, 0x40, 0xe3, + 0xad, 0xdb, 0xf6, 0xac, 0xe0, 0x02, 0x44 }; + UCHAR table1600[] = { 0x60, 0x04, 0x11, 0x00, 0x40, 0xe3, + 0xad, 0xde, 0xf6, 0xac, 0x60, 0x1a, 0x44 }; +#else UCHAR regtable[] = { 0x1c, 0x5f, 0x64, 0x6f, 0x70, 0x71, 0x72, 0x73, 0x74, 0x76, 0x78, 0x7d }; - UCHAR table28b4[] = { 0x60, 0x02, 0x00, 0x07, 0x40, 0xed, - 0xa3, 0xc8, 0xc7, 0xac, 0x60, 0x02 }; - UCHAR table28c0[] = { 0x60, 0x03, 0x11, 0x00, 0x40, 0xef, - 0xad, 0xdb, 0xf6, 0xac, 0x60, 0x02 }; + UCHAR table1024[] = { 0x60, 0x02, 0x00, 0x07, 0x40, 0xed, + 0xa3, 0xc8, 0xc7, 0xac, 0x60, 0x02 }; + UCHAR table1280[] = { 0x60, 0x03, 0x11, 0x00, 0x40, 0xe3, + 0xad, 0xdb, 0xf6, 0xac, 0xe0, 0x02 }; + UCHAR table1400[] = { 0x60, 0x03, 0x11, 0x00, 0x40, 0xef, + 0xad, 0xdb, 0xf6, 0xac, 0x60, 0x02 }; + UCHAR table1600[] = { 0x60, 0x04, 0x11, 0x00, 0x40, 0xe3, + 0xad, 0xde, 0xf6, 0xac, 0x60, 0x1a }; +#endif UCHAR *tableptr = NULL; USHORT tempbh; int i; - if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) { - tableptr = table28c0; - } else { - tableptr = table28b4; - } + if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) { + tableptr = table1024; + } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) { + tableptr = table1280; + } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) { + tableptr = table1400; + } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200) { + tableptr = table1600; + } else return; + tempbh = SiS_GetCH701x(SiS_Pr,0x74); if((tempbh == 0xf6) || (tempbh == 0xc7)) { tempbh = SiS_GetCH701x(SiS_Pr,0x73); if(tempbh == 0xc8) { - if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1400x1050) return; + if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) return; } else if(tempbh == 0xdb) { + if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) return; + if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) return; + } else if(tempbh == 0xde) { if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) return; } } +#ifdef NEWCH701x /* New from 740/LVDS: */ + for(i=0; i<0x0d; i++) { +#else for(i=0; i<0x0c; i++) { +#endif SiS_SetCH701x(SiS_Pr,(tableptr[i] << 8) | regtable[i]); } - SiS_Chrontel19f2(SiS_Pr); + SiS_ChrontelPowerSequencing(SiS_Pr); tempbh = SiS_GetCH701x(SiS_Pr,0x1e); tempbh |= 0xc0; - SiS_SetCH701x(SiS_Pr,(tempbh << 8) | 0x1e); + SiS_SetCH701x(SiS_Pr,(tempbh << 8) | 0x1e); + +#ifdef NEWCH701x /* 740/LVDS: */ + tempbh = SiS_GetCH701x(SiS_Pr,0x1c); + tempbh &= 0xfb; + SiS_SetCH701x(SiS_Pr,(tempbh << 8) | 0x1c); + SiS_SetReg1(SiS_Pr->SiS_Part1Port, 0x2d, 0x03); + tempbh = SiS_GetCH701x(SiS_Pr,0x64); + tempbh |= 0x40; + SiS_SetCH701x(SiS_Pr,(tempbh << 8) | 0x64); + tempbh = SiS_GetCH701x(SiS_Pr,0x03); + tempbh &= 0x3f; + SiS_SetCH701x(SiS_Pr,(tempbh << 8) | 0x03); +#endif /* End 740/LVDS */ } -/* TW: Chrontel 701x functions ================================= */ - void -SiS_Chrontel19f2(SiS_Private *SiS_Pr) +SiS_ChrontelPowerSequencing(SiS_Private *SiS_Pr) { UCHAR regtable[] = { 0x67, 0x68, 0x69, 0x6a, 0x6b }; - UCHAR table19e8[] = { 0x01, 0x02, 0x01, 0x01, 0x02 }; - UCHAR table19ed[] = { 0x01, 0x02, 0x01, 0x01, 0x02 }; +#ifdef NEWCH701x + UCHAR table1024[] = { 0x01, 0x02, 0x01, 0x01, 0x01 }; + UCHAR table1400[] = { 0x01, 0x6e, 0x01, 0x01, 0x01 }; +#else + UCHAR table1024[] = { 0x01, 0x02, 0x01, 0x01, 0x02 }; + UCHAR table1400[] = { 0x01, 0x02, 0x01, 0x01, 0x02 }; +#endif UCHAR *tableptr = NULL; int i; - if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) { - tableptr = table19ed; - } else { - tableptr = table19e8; - } - + /* Set up Power up/down timing */ + if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) { + tableptr = table1024; + } else if((SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) || + (SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) || + (SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200)) { + tableptr = table1400; + } else return; + for(i=0; i<5; i++) { SiS_SetCH701x(SiS_Pr,(tableptr[i] << 8) | regtable[i]); } } void -SiS_Chrontel701xBLOn(SiS_Private *SiS_Pr) -{ - USHORT temp; - - /* TW: Enable Chrontel 7019 LCD panel backlight */ - if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) { - temp = SiS_GetCH701x(SiS_Pr,0x66); - temp |= 0x20; - SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x66); - } -} - -void SiS_Chrontel701xOn(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr) { USHORT temp; if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) { +#ifdef NEWCH701x + temp = SiS_GetCH701x(SiS_Pr,0x1c); + temp |= 0x04; + SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x1c); +#endif if(SiS_IsYPbPr(SiS_Pr,HwDeviceExtension, BaseAddr)) { temp = SiS_GetCH701x(SiS_Pr,0x01); temp &= 0x3f; - temp |= 0x80; + temp |= 0x80; /* TW: Enable YPrPb (HDTV) */ + SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x01); + } + if(SiS_IsChScart(SiS_Pr,HwDeviceExtension, BaseAddr)) { + temp = SiS_GetCH701x(SiS_Pr,0x01); + temp &= 0x3f; + temp |= 0xc0; /* TW: Enable SCART + CVBS */ SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x01); } +#ifdef NEWCH701x + SiS_ChrontelDoSomething5(SiS_Pr); + SiS_SetCH701x(SiS_Pr,0x2049); /* TW: Enable TV path */ +#else SiS_SetCH701x(SiS_Pr,0x2049); /* TW: Enable TV path */ temp = SiS_GetCH701x(SiS_Pr,0x49); if(SiS_IsYPbPr(SiS_Pr,HwDeviceExtension, BaseAddr)) { @@ -7940,19 +9303,7 @@ temp = SiS_GetCH701x(SiS_Pr,0x47); temp |= 0x80; SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x47); - } -} - -void -SiS_Chrontel701xBLOff(SiS_Private *SiS_Pr) -{ - USHORT temp; - - /* TW: Disable Chrontel 7019 LCD panel backlight */ - if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) { - temp = SiS_GetCH701x(SiS_Pr,0x66); - temp &= 0xDF; - SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x66); +#endif } } @@ -7971,40 +9322,118 @@ } } +#ifdef NEWCH701x +void +SiS_ChrontelDoSomething5(SiS_Private *SiS_Pr) +{ + unsigned char temp, temp1; + + temp1 = SiS_GetCH701x(SiS_Pr,0x49); + SiS_SetCH701x(SiS_Pr,0x3e49); + temp = SiS_GetCH701x(SiS_Pr,0x47); + temp &= 0x7f; + SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x47); + SiS_LongDelay(SiS_Pr,3); + temp = SiS_GetCH701x(SiS_Pr,0x47); + temp |= 0x80; + SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x47); + SiS_SetCH701x(SiS_Pr,(temp1 << 8) | 0x49); +} +#endif + void -SiS_ChrontelResetDB(SiS_Private *SiS_Pr) +SiS_ChrontelResetDB(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr) { +#ifdef NEWCH701x + USHORT temp; + + /* 740/LVDS: */ + temp = SiS_GetCH701x(SiS_Pr,0x4a); + temp &= 0x01; + if(!(temp)) { + + if(SiS_WeHaveBacklightCtrl(SiS_Pr,HwDeviceExtension, BaseAddr)) { + temp = SiS_GetCH701x(SiS_Pr,0x49); + SiS_SetCH701x(SiS_Pr,0x3e49); + } + /* TW: Reset Chrontel 7019 datapath */ + SiS_SetCH701x(SiS_Pr,0x1048); + SiS_LongDelay(SiS_Pr,1); + SiS_SetCH701x(SiS_Pr,0x1848); + + if(SiS_WeHaveBacklightCtrl(SiS_Pr,HwDeviceExtension, BaseAddr)) { + SiS_ChrontelDoSomething5(SiS_Pr); + SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x49); + } + } else { + + temp = SiS_GetCH701x(SiS_Pr,0x5c); + temp &= 0xef; + SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x5c); + temp = SiS_GetCH701x(SiS_Pr,0x5c); + temp |= 0x10; + SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x5c); + temp = SiS_GetCH701x(SiS_Pr,0x5c); + temp &= 0xef; + SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x5c); + temp = SiS_GetCH701x(SiS_Pr,0x61); + if(!temp) { + SiS_SetCH701xForLCD(SiS_Pr,HwDeviceExtension,BaseAddr); + } + } +#else /* pre 740/LVDS code */ /* TW: Reset Chrontel 7019 datapath */ SiS_SetCH701x(SiS_Pr,0x1048); SiS_LongDelay(SiS_Pr,1); SiS_SetCH701x(SiS_Pr,0x1848); +#endif } void SiS_ChrontelDoSomething4(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr) { +#ifdef NEWCH701x + if(!(SiS_WeHaveBacklightCtrl(SiS_Pr,HwDeviceExtension, BaseAddr))) { + SiS_ChrontelDoSomething5(SiS_Pr); + } +#else USHORT temp; - SiS_SetCH701x(SiS_Pr,0xaf76); + SiS_SetCH701x(SiS_Pr,0xaf76); /* Power up LVDS block */ temp = SiS_GetCH701x(SiS_Pr,0x49); temp &= 1; - if(temp != 1) { + if(temp != 1) { /* TV block powered? (0 = yes, 1 = no) */ temp = SiS_GetCH701x(SiS_Pr,0x47); temp &= 0x70; - SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x47); + SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x47); /* enable VSYNC */ SiS_LongDelay(SiS_Pr,3); temp = SiS_GetCH701x(SiS_Pr,0x47); temp |= 0x80; - SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x47); + SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x47); /* disable VSYNC */ } +#endif } void -SiS_ChrontelDoSomething3(SiS_Private *SiS_Pr, USHORT ModeNo,PSIS_HW_DEVICE_INFO HwDeviceExtension, +SiS_ChrontelDoSomething3(SiS_Private *SiS_Pr, USHORT ModeNo, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr) { - USHORT temp,temp1; +#ifdef NEWCH701x + USHORT temp; + + temp = SiS_GetCH701x(SiS_Pr,0x61); + if(temp < 1) { + temp++; + SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x61); + } + SiS_SetCH701x(SiS_Pr,0x4566); + SiS_SetCH701x(SiS_Pr,0xaf76); + SiS_LongDelay(SiS_Pr,1); + SiS_GenericDelay(SiS_Pr,0x16ff); +#else + USHORT temp,temp1; + temp1 = 0; temp = SiS_GetCH701x(SiS_Pr,0x61); if(temp < 2) { @@ -8033,6 +9462,7 @@ temp &= 0x7f; SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x66); SiS_LongDelay(SiS_Pr,1); +#endif } void @@ -8048,12 +9478,16 @@ temp = SiS_GetCH701x(SiS_Pr,0x66); temp &= 0x04; if(temp == 0x04) break; + +#ifdef NEWCH701x + SiS_SetCH701x(SiS_Pr,0xac76); /* 740/LVDS */ +#endif - SiS_SetCH701xForLCD(SiS_Pr,HwDeviceExtension, BaseAddr); + SiS_SetCH701xForLCD(SiS_Pr,HwDeviceExtension,BaseAddr); if(tempcl == 0) { if(tempch == 3) break; - SiS_ChrontelResetDB(SiS_Pr); + SiS_ChrontelResetDB(SiS_Pr,HwDeviceExtension,BaseAddr); tempcl = 3; tempch++; } @@ -8065,7 +9499,11 @@ temp = SiS_GetCH701x(SiS_Pr,0x76); temp |= 0x04; SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x76); +#ifdef NEWCH701x + SiS_SetCH701x(SiS_Pr,0xe078); +#else SiS_SetCH701x(SiS_Pr,0x6078); +#endif SiS_LongDelay(SiS_Pr,2); } while(0); @@ -8079,20 +9517,50 @@ USHORT temp; temp = SiS_GetCH701x(SiS_Pr,0x03); - temp |= 0x80; - temp &= 0xbf; + temp |= 0x80; /* Set datapath 1 to TV */ + temp &= 0xbf; /* Set datapath 2 to LVDS */ + SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x03); + +#ifdef NEWCH701x /* 740/LVDS: */ + + temp = SiS_GetCH701x(SiS_Pr,0x1c); + temp &= 0xfb; + SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x1c); + + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x2d,0x03); + + temp = SiS_GetCH701x(SiS_Pr,0x64); + temp |= 0x40; + SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x64); + + temp = SiS_GetCH701x(SiS_Pr,0x03); + temp &= 0x3f; SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x03); + + temp = SiS_GetCH701x(SiS_Pr,0x66); + if(temp != 0x45) { + SiS_ChrontelResetDB(SiS_Pr,HwDeviceExtension,BaseAddr); + SiS_ChrontelDoSomething2(SiS_Pr,HwDeviceExtension,BaseAddr); + temp = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x34); + SiS_ChrontelDoSomething3(SiS_Pr,temp,HwDeviceExtension,BaseAddr); + } + +#else /* pre-740/LVDS: */ SiS_ChrontelResetDB(SiS_Pr); - SiS_ChrontelDoSomething2(SiS_Pr,HwDeviceExtension, BaseAddr); + SiS_ChrontelDoSomething2(SiS_Pr,HwDeviceExtension,BaseAddr); temp = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x34); - SiS_ChrontelDoSomething3(SiS_Pr,temp, HwDeviceExtension, BaseAddr); + SiS_ChrontelDoSomething3(SiS_Pr,temp,HwDeviceExtension,BaseAddr); SiS_SetCH701x(SiS_Pr,0xaf76); + +#endif /* End of pre-740/LVDS */ } +#endif /* 310/325 series --------------------------------- */ + /* TW: End of Chrontel 701x functions ==================================== */ /* TW: Generic Read/write routines for Chrontel ========================== */ @@ -8316,12 +9784,20 @@ #ifdef LINUX_XF86 /* TW: Our own DDC functions */ USHORT -SiS_InitDDCRegs(SiS_Private *SiS_Pr, SISPtr pSiS, USHORT adaptnum, USHORT DDCdatatype) +SiS_InitDDCRegs(SiS_Private *SiS_Pr, SISPtr pSiS, USHORT adaptnum, USHORT DDCdatatype, + BOOLEAN checkcr32) { - unsigned char ddcdtype[] = { 0xa0, 0xa0, 0xa0, 0xa2, 0xa6}; + unsigned char ddcdtype[] = { 0xa0, 0xa0, 0xa0, 0xa2, 0xa6 }; unsigned char flag, cr32; USHORT temp = 0, myadaptnum = adaptnum; + if(adaptnum != 0) { + if(!(pSiS->VBFlags & (VB_301|VB_301B|VB_302B))) return 0xFFFF; + if((pSiS->VBFlags & VB_30xBDH) && (adaptnum == 1)) return 0xFFFF; + } + + /* adapternum for SiS bridges: 0 = CRT1, 1 = LCD, 2 = VGA2 */ + SiS_Pr->SiS_ChrontelInit = 0; /* force re-detection! */ SiS_Pr->SiS_DDC_SecAddr = 0; @@ -8331,23 +9807,23 @@ flag = 0xff; cr32 = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x32); - - if(pSiS->VGAEngine == SIS_300_VGA) { /* 300 series */ - - if(pSiS->VBFlags & VB_SISBRIDGE) { - if(myadaptnum == 0) { - if(!(cr32 & 0x20)) { - myadaptnum = 2; - if(!(cr32 & 0x10)) { - myadaptnum = 1; - if(!(cr32 & 0x08)) { - myadaptnum = 0; - } + + if(pSiS->VBFlags & VB_SISBRIDGE) { + if(myadaptnum == 0) { + if(!(cr32 & 0x20)) { + myadaptnum = 2; + if(!(cr32 & 0x10)) { + myadaptnum = 1; + if(!(cr32 & 0x08)) { + myadaptnum = 0; } - } + } } - } + } + } + if(pSiS->VGAEngine == SIS_300_VGA) { /* 300 series */ + if(myadaptnum != 0) { flag = 0; if(pSiS->VBFlags & VB_SISBRIDGE) { @@ -8356,37 +9832,25 @@ } } - if(cr32 & 0x80) { - if(myadaptnum >= 1) { - if(!(cr32 & 0x08)) { - myadaptnum = 1; - if(!(cr32 & 0x10)) return 0xFFFF; - } + if(!(pSiS->VBFlags & VB_301)) { + if((cr32 & 0x80) && (checkcr32)) { + if(myadaptnum >= 1) { + if(!(cr32 & 0x08)) { + myadaptnum = 1; + if(!(cr32 & 0x10)) return 0xFFFF; + } + } } } temp = 4 - (myadaptnum * 2); if(flag) temp = 0; - SiS_Pr->SiS_DDC_Data = 0x02 << temp; - SiS_Pr->SiS_DDC_Clk = 0x01 << temp; - - } else { /* 310/325 series */ - - if(pSiS->VBFlags & (VB_30xLV|VB_30xLVX)) myadaptnum = 0; + } else { /* 310/325/330 series */ + /* here we simplify: 0 = CRT1, 1 = CRT2 (VGA, LCD) */ + if(pSiS->VBFlags & VB_SISBRIDGE) { - if(myadaptnum == 0) { - if(!(cr32 & 0x20)) { - myadaptnum = 2; - if(!(cr32 & 0x10)) { - myadaptnum = 1; - if(!(cr32 & 0x08)) { - myadaptnum = 0; - } - } - } - } if(myadaptnum == 2) { myadaptnum = 1; } @@ -8400,7 +9864,7 @@ } } - if(cr32 & 0x80) { + if((cr32 & 0x80) && (checkcr32)) { if(myadaptnum >= 1) { if(!(cr32 & 0x08)) { myadaptnum = 1; @@ -8416,28 +9880,48 @@ } if(flag) temp = 0; - - SiS_Pr->SiS_DDC_Data = 0x02 << temp; - SiS_Pr->SiS_DDC_Clk = 0x01 << temp; - } + + SiS_Pr->SiS_DDC_Data = 0x02 << temp; + SiS_Pr->SiS_DDC_Clk = 0x01 << temp; + +#ifdef TWDEBUG + xf86DrvMsg(0, X_INFO, "DDC Port %x Index %x Shift %d\n", + SiS_Pr->SiS_DDC_Port, SiS_Pr->SiS_DDC_Index, temp); +#endif + return 0; } USHORT SiS_WriteDABDDC(SiS_Private *SiS_Pr) { - SiS_SetStart(SiS_Pr); - if(SiS_WriteDDC2Data(SiS_Pr, SiS_Pr->SiS_DDC_DeviceAddr)) return 0xFFFF; - if(SiS_WriteDDC2Data(SiS_Pr, SiS_Pr->SiS_DDC_SecAddr)) return 0xFFFF; + if(SiS_SetStart(SiS_Pr)) return 0xFFFF; + if(SiS_WriteDDC2Data(SiS_Pr, SiS_Pr->SiS_DDC_DeviceAddr)) { +#ifdef TWDEBUG + xf86DrvMsg(0, X_INFO, "WriteDAB 1 failed\n"); +#endif + return 0xFFFF; + } + if(SiS_WriteDDC2Data(SiS_Pr, SiS_Pr->SiS_DDC_SecAddr)) { +#ifdef TWDEBUG + xf86DrvMsg(0, X_INFO, "WriteDAB 2 failed\n"); +#endif + return 0xFFFF; + } return(0); } USHORT SiS_PrepareReadDDC(SiS_Private *SiS_Pr) { - SiS_SetStart(SiS_Pr); - if(SiS_WriteDDC2Data(SiS_Pr, (SiS_Pr->SiS_DDC_DeviceAddr | 0x01))) return 0xFFFF; + if(SiS_SetStart(SiS_Pr)) return 0xFFFF; + if(SiS_WriteDDC2Data(SiS_Pr, (SiS_Pr->SiS_DDC_DeviceAddr | 0x01))) { +#ifdef TWDEBUG + xf86DrvMsg(0, X_INFO, "PrepareReadDDC 1 failed\n"); +#endif + return 0xFFFF; + } return(0); } @@ -8467,11 +9951,15 @@ SiS_DoProbeDDC(SiS_Private *SiS_Pr) { unsigned char mask, value; - USHORT temp, ret; + USHORT temp, ret=0; + BOOLEAN failed = FALSE; SiS_SetSwitchDDC2(SiS_Pr); if(SiS_PrepareDDC(SiS_Pr)) { SiS_SetStop(SiS_Pr); +#ifdef TWDEBUG + xf86DrvMsg(0, X_INFO, "DoProbeDDC 1 failed at PrepareDDC\n"); +#endif return(0xFFFF); } mask = 0xf0; @@ -8482,16 +9970,21 @@ if(temp == 0) { mask = 0xff; value = 0xff; + } else { + failed = TRUE; + ret = 0xFFFF; } } - temp = (unsigned char)SiS_ReadDDC2Data(SiS_Pr, 0); - SiS_SendACK(SiS_Pr, 1); - temp &= mask; - if(temp == value) ret = 0; - else { - ret = 0xFFFF; - if(SiS_Pr->SiS_DDC_DeviceAddr == 0xa0) { - if(value == 0x30) ret = 0; + if(failed == FALSE) { + temp = (unsigned char)SiS_ReadDDC2Data(SiS_Pr, 0); + SiS_SendACK(SiS_Pr, 1); + temp &= mask; + if(temp == value) ret = 0; + else { + ret = 0xFFFF; + if(SiS_Pr->SiS_DDC_DeviceAddr == 0xa0) { + if(temp == 0x30) ret = 0; + } } } SiS_SetStop(SiS_Pr); @@ -8520,7 +10013,7 @@ USHORT flag, length, i; unsigned char chksum,gotcha; - if(DDCdatatype > 3) return 0xFFFF; /* incomplete! */ + if(DDCdatatype > 4) return 0xFFFF; flag = 0; SiS_SetSwitchDDC2(SiS_Pr); @@ -8547,6 +10040,27 @@ return(flag); } +USHORT +SiS_ReadLCDDDC(SiS_Private *SiS_Pr, USHORT length, unsigned char *buffer) +{ + USHORT i=0, flag=0; + + length--; + + SiS_SetSwitchDDC2(SiS_Pr); + if(!(SiS_PrepareDDC(SiS_Pr))) { + for(i=0; i 2) return 0xFFFF; - if(pSiS->VGAEngine == SIS_300_VGA) { - if((adaptnum != 0) && (DDCdatatype != 0)) return 0xFFFF; - } + if(DDCdatatype > 4) return 0xFFFF; if((!(pSiS->VBFlags & VB_VIDEOBRIDGE)) && (adaptnum > 0)) return 0xFFFF; - if(SiS_InitDDCRegs(SiS_Pr, pSiS, adaptnum, DDCdatatype) == 0xFFFF) return 0xFFFF; + if(SiS_InitDDCRegs(SiS_Pr, pSiS, adaptnum, DDCdatatype, TRUE) == 0xFFFF) return 0xFFFF; if(DDCdatatype == 0) { return(SiS_ProbeDDC(SiS_Pr)); } else { - if(DDCdatatype > 4) return 0xFFFF; return(SiS_ReadDDC(SiS_Pr, pSiS, DDCdatatype, buffer)); } } +/* Sense the LCD parameters (CR36, CR37) via DDC */ +/* SiS30x(B) only */ +USHORT +SiS_SenseLCDDDC(SiS_Private *SiS_Pr, SISPtr pSiS) +{ + USHORT DDCdatatype, paneltype, flag, xres, yres; + USHORT index, myindex, lumsize, numcodes; + unsigned char cr37=0, seekcode; + BOOLEAN checkexpand = FALSE; + int retry, i; + unsigned char buffer[256]; + + if(!(pSiS->VBFlags & (VB_301|VB_301B|VB_302B))) return 0; + if(pSiS->VBFlags & VB_30xBDH) return 0; + + if(SiS_InitDDCRegs(SiS_Pr, pSiS, 1, 0, FALSE) == 0xFFFF) return 0; + + SiS_Pr->SiS_DDC_SecAddr = 0x00; + + /* Probe supported DA's */ + flag = SiS_ProbeDDC(SiS_Pr); +#ifdef TWDEBUG + xf86DrvMsg(pSiS->pScrn->scrnIndex, X_INFO, + "CRT2 DDC capabilities 0x%x\n", flag); +#endif + if(flag & 0x10) { + SiS_Pr->SiS_DDC_DeviceAddr = 0xa6; /* EDID V2 (FP) */ + DDCdatatype = 4; + } else if(flag & 0x08) { + SiS_Pr->SiS_DDC_DeviceAddr = 0xa2; /* EDID V2 (P&D-D Monitor) */ + DDCdatatype = 3; + } else if(flag & 0x02) { + SiS_Pr->SiS_DDC_DeviceAddr = 0xa0; /* EDID V1 */ + DDCdatatype = 1; + } else return 0; /* no DDC support (or no device attached) */ + + /* Read the entire EDID */ + retry = 2; + do { + if(SiS_ReadDDC(SiS_Pr, pSiS, DDCdatatype, buffer)) { + xf86DrvMsg(pSiS->pScrn->scrnIndex, X_INFO, + "CRT2: DDC read failed (attempt %d), %s\n", + (3-retry), (retry == 1) ? "giving up" : "retrying"); + retry--; + if(retry == 0) return 0xFFFF; + } else break; + } while(1); + +#ifdef TWDEBUG + for(i=0; i<256; i+=16) { + xf86DrvMsg(pSiS->pScrn->scrnIndex, X_INFO, + "%02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", + buffer[i], buffer[i+1], buffer[i+2], buffer[i+3], + buffer[i+4], buffer[i+5], buffer[i+6], buffer[i+7], + buffer[i+8], buffer[i+9], buffer[i+10], buffer[i+11], + buffer[i+12], buffer[i+13], buffer[i+14], buffer[i+15]); + } +#endif + + /* Analyze EDID and retrieve LCD panel information */ + paneltype = 0; + switch(DDCdatatype) { + case 1: /* Analyze EDID V1 */ + /* Catch a few clear cases: */ + if(!(buffer[0x14] & 0x80)) { + xf86DrvMsg(pSiS->pScrn->scrnIndex, X_PROBED, + "CRT2: Attached display expects analog input (0x%02x)\n", + buffer[0x14]); + return 0; + } + + if((buffer[0x18] & 0x18) != 0x08) { + xf86DrvMsg(pSiS->pScrn->scrnIndex, X_PROBED, + "CRT2: Attached display is not of RGB but of %s type (0x%02x)\n", + ((buffer[0x18] & 0x18) == 0x00) ? "monochrome/greyscale" : + ( ((buffer[0x18] & 0x18) == 0x10) ? "non-RGB multicolor" : + "undefined"), + buffer[0x18]); + return 0; + } + + /* Now analyze the first Detailed Timing Block and hope + * that the preferred timing mode is stored there. + */ + xres = buffer[0x38] | ((buffer[0x3a] & 0xf0) << 4); + yres = buffer[0x3b] | ((buffer[0x3d] & 0xf0) << 4); + checkexpand = FALSE; + switch(xres) { + case 800: + if(yres == 600) { + paneltype = Panel310_800x600; + checkexpand = TRUE; + } + break; + case 1024: + if(yres == 768) { + paneltype = Panel310_1024x768; + checkexpand = FALSE; /* expand causes error at 640x480, should otherwise be TRUE; */ + } + break; + case 1280: + if(yres == 960) { + if(pSiS->VGAEngine == SIS_300_VGA) { + paneltype = Panel300_1280x960; + } else { + paneltype = Panel310_1280x960; + } + } else if(yres == 1024) { + paneltype = Panel310_1280x1024; + checkexpand = TRUE; + } else if(pSiS->VGAEngine == SIS_315_VGA) { + if(yres == 768) { + paneltype = Panel310_1280x768; + checkexpand = FALSE; + cr37 |= 0x10; + } + } + break; + case 1400: + if(pSiS->VGAEngine == SIS_315_VGA) { + if(yres == 1050) { + paneltype = Panel310_1400x1050; + checkexpand = TRUE; + } + } + break; + case 1600: + if(pSiS->VGAEngine == SIS_315_VGA) { + if(yres == 1200) { + paneltype = Panel310_1600x1200; + checkexpand = TRUE; + } + } + break; + } + + if(buffer[0x18] & 0x02) { + /* If the preferred timing mode is stored in the first + * detailed timing block, we now can extract the sync + * polarisation information as well. This only works + * if the Flags indicate a digital separate output. + */ + if((buffer[0x47] & 0x18) == 0x18) { + cr37 |= ((((buffer[0x47] & 0x06) ^ 0x06) << 5) | 0x20); + } else { + /* What now? There is no digital separate output timing... */ + xf86DrvMsg(pSiS->pScrn->scrnIndex, X_WARNING, + "CRT2: Unable to retrieve Sync polarity information\n"); + } + + } else { + /* If the preferred timing mode is *not* stored in the first + * detailed timing block, we need to guess the resolution + * from the supported Established Timings and assume the + * default sync polarity + */ + paneltype = 0; + if(buffer[0x24] & 0x01) { + paneltype = Panel310_1280x1024; + checkexpand = TRUE; + cr37 |= 0x20; + } else if(buffer[0x24] & 0x0e) { + paneltype = Panel310_1024x768; + cr37 |= 0xe0; + checkexpand = FALSE; /* Bug at 640x480 */ + } else if(buffer[0x23] & 0x01) { + paneltype = Panel310_800x600; + cr37 |= 0xe0; + checkexpand = TRUE; + } + } + + if(checkexpand) { + /* If any of the Established low-res modes is supported, the + * panel can scale automatically. For 800x600 panels, we only + * check the even lower ones. + */ + if(paneltype == Panel310_800x600) { + if(buffer[0x23] & 0xfc) cr37 |= 0x10; + } else { + if(buffer[0x23]) cr37 |= 0x10; + } + } + + break; + + case 3: /* Analyze EDID V2 */ + case 4: + index = 0; + if((buffer[0x41] & 0x0f) == 0x03) { + index = 0x42 + 3; + xf86DrvMsg(pSiS->pScrn->scrnIndex, X_PROBED, + "CRT2: Display supports TMDS input on primary interface\n"); + } else if((buffer[0x41] & 0xf0) == 0x30) { + index = 0x46 + 3; + xf86DrvMsg(pSiS->pScrn->scrnIndex, X_PROBED, + "CRT2: Display supports TMDS input on secondary interface\n"); + } else { + xf86DrvMsg(pSiS->pScrn->scrnIndex, X_PROBED, + "CRT2: Display does not support TMDS video interface (0x%02x)\n", + buffer[0x41]); + return 0; + } + + xres = buffer[0x76] | (buffer[0x77] << 8); + yres = buffer[0x78] | (buffer[0x79] << 8); + switch(xres) { + case 800: + if(yres == 600) { + paneltype = Panel310_800x600; + checkexpand = TRUE; + } + break; + case 1024: + if(yres == 768) { + paneltype = Panel310_1024x768; + checkexpand = FALSE; /* Bug at 640x480; we do the scaling ourselves */ + } + break; + case 1280: + if(yres == 960) { + if(pSiS->VGAEngine == SIS_315_VGA) { + paneltype = Panel310_1280x960; + } else { + paneltype = Panel300_1280x960; + } + } else if(yres == 1024) { + paneltype = Panel310_1280x1024; + checkexpand = TRUE; + } else if(pSiS->VGAEngine == SIS_315_VGA) { + if(yres == 768) { + paneltype = Panel310_1280x768; + checkexpand = FALSE; + cr37 |= 0x10; + } + } + break; + case 1400: + if(pSiS->VGAEngine == SIS_315_VGA) { + if(yres == 1050) { + paneltype = Panel310_1400x1050; + checkexpand = TRUE; + } + } + break; + case 1600: + if(pSiS->VGAEngine == SIS_315_VGA) { + if(yres == 1200) { + paneltype = Panel310_1600x1200; + checkexpand = TRUE; + } + } + break; + } + + /* Determine if RGB18 or RGB24 */ + if(index) { + if((buffer[index] == 0x20) || (buffer[index] == 0x34)) { + cr37 |= 0x01; + } + } + + if(checkexpand) { + /* TODO - for now, we let the panel scale */ + cr37 |= 0x10; + } + + /* Now seek 4-Byte Timing codes and extract sync pol info */ + index = 0x80; + if(buffer[0x7e] & 0x20) { /* skip Luminance Table (if provided) */ + lumsize = buffer[0x80] & 0x1f; + if(buffer[0x80] & 0x80) lumsize *= 3; + lumsize++; + index += lumsize; + } + index += (((buffer[0x7e] & 0x1c) >> 2) * 8); /* skip Frequency Ranges */ + index += ((buffer[0x7e] & 0x03) * 27); /* skip Detailed Range Limits */ + numcodes = (buffer[0x7f] & 0xf8) >> 3; + if(numcodes) { + myindex = index; + seekcode = (xres - 256) / 16; + for(i=0; ipScrn->scrnIndex, X_WARNING, + "CRT2: Unable to retrieve Sync polarity information\n"); + } + } else { + xf86DrvMsg(pSiS->pScrn->scrnIndex, X_WARNING, + "CRT2: Unable to retrieve Sync polarity information\n"); + } + + break; + + } + + /* 1280x960 panels are always RGB24, unable to scale and use + * high active sync polarity + */ + if(pSiS->VGAEngine == SIS_315_VGA) { + if(paneltype == Panel310_1280x960) cr37 &= 0x0e; + } else { + if(paneltype == Panel300_1280x960) cr37 &= 0x0e; + } + + if(paneltype) { + cr37 &= 0xf1; + cr37 |= 0x02; /* SiS301 */ + SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x36,0xf0,paneltype); + SiS_SetReg1(SiS_Pr->SiS_P3d4,0x37,cr37); + SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x32,0x08); +#ifdef TWDEBUG + xf86DrvMsgVerb(pSiS->pScrn->scrnIndex, X_PROBED, 3, + "CRT2: [DDC LCD results: 0x%02x, 0x%02x]\n", paneltype, cr37); +#endif + } + return 0; +} + +USHORT +SiS_SenseVGA2DDC(SiS_Private *SiS_Pr, SISPtr pSiS) +{ + USHORT DDCdatatype,flag; + BOOLEAN foundcrt = FALSE; + int retry; + unsigned char buffer[256]; + + if(!(pSiS->VBFlags & (VB_301|VB_301B|VB_302B))) return 0; +/* if(pSiS->VBFlags & VB_30xBDH) return 0; */ + + if(SiS_InitDDCRegs(SiS_Pr, pSiS, 2, 0, FALSE) == 0xFFFF) return 0; + + SiS_Pr->SiS_DDC_SecAddr = 0x00; + + /* Probe supported DA's */ + flag = SiS_ProbeDDC(SiS_Pr); + if(flag & 0x10) { + SiS_Pr->SiS_DDC_DeviceAddr = 0xa6; /* EDID V2 (FP) */ + DDCdatatype = 4; + } else if(flag & 0x08) { + SiS_Pr->SiS_DDC_DeviceAddr = 0xa2; /* EDID V2 (P&D-D Monitor) */ + DDCdatatype = 3; + } else if(flag & 0x02) { + SiS_Pr->SiS_DDC_DeviceAddr = 0xa0; /* EDID V1 */ + DDCdatatype = 1; + } else { + xf86DrvMsg(pSiS->pScrn->scrnIndex, X_INFO, + "Do DDC answer\n"); + return 0; /* no DDC support (or no device attached) */ + } + + /* Read the entire EDID */ + retry = 2; + do { + if(SiS_ReadDDC(SiS_Pr, pSiS, DDCdatatype, buffer)) { + xf86DrvMsg(pSiS->pScrn->scrnIndex, X_INFO, + "CRT2: DDC read failed (attempt %d), %s\n", + (3-retry), (retry == 1) ? "giving up" : "retrying"); + retry--; + if(retry == 0) return 0xFFFF; + } else break; + } while(1); + + /* Analyze EDID. We don't have many chances to + * distinguish a flat panel from a CRT... + */ + switch(DDCdatatype) { + case 1: + if(buffer[0x14] & 0x80) { /* Display uses digital input */ + xf86DrvMsg(pSiS->pScrn->scrnIndex, X_PROBED, + "CRT2: Attached display expects digital input\n"); + return 0; + } + foundcrt = TRUE; + break; + case 3: + case 4: + if( ((buffer[0x41] & 0x0f) != 0x01) && /* Display does not support analog input */ + ((buffer[0x41] & 0x0f) != 0x02) && + ((buffer[0x41] & 0xf0) != 0x10) && + ((buffer[0x41] & 0xf0) != 0x20) ) { + xf86DrvMsg(pSiS->pScrn->scrnIndex, X_PROBED, + "CRT2: Attached display does not support analog input (0x%02x)\n", + buffer[0x41]); + return 0; + } + foundcrt = TRUE; + break; + } + + if(foundcrt) { + SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x32,0x10); + } + return(0); +} + +#if 0 + /* ----- */ +USHORT +SiS_SenseLCDDDC(SiS_Private *SiS_Pr, SISPtr pSiS) +{ + USHORT DDCdatatype, paneltype, flag; + unsigned char cr36=0, cr37=0; + unsigned char tempal, tempah, tempbl, tempbh; + USHORT tempax, tempbx, tempcx, push1, push2, push3; + unsigned char addresstable[] = { 0x00, 0x22, 0x30, 0x40 }; + int i; + unsigned char buffer[256]; + + if(pSiS->VGAEngine != SIS_315_VGA) return 0xFFFF; + if(!(pSiS->VBFlags & (VB_301B|VB_302B))) return 0xFFFF; + + if(SiS_InitDDCRegs(SiS_Pr, pSiS, 1, 0, FALSE) == 0xFFFF) return 0xFFFF; + + flag = SiS_ProbeDDC(SiS_Pr); + if(flag & 0x02) { + SiS_Pr->SiS_DDC_DeviceAddr = 0xa0; /* EDID V1 */ + DDCdatatype = 1; + SiS_Pr->SiS_DDC_SecAddr = 0x3a; + } else if(flag & 0x08) { + SiS_Pr->SiS_DDC_DeviceAddr = 0xa2; /* EDID V2 (P&D-D Monitor) */ + DDCdatatype = 3; + SiS_Pr->SiS_DDC_SecAddr = 0x76; + } else if(flag & 0x10) { + SiS_Pr->SiS_DDC_DeviceAddr = 0xa6; /* EDID V2 (FP) */ + DDCdatatype = 4; + SiS_Pr->SiS_DDC_SecAddr = 0x76; + } else return 0xFFFF; + + + SiS_ReadLCDDDC(SiS_Pr, 4, buffer); + tempbl = buffer[0]; /* 3a - 76 */ + tempbh = buffer[1]; /* 3b - 77 */ + + if(SiS_Pr->SiS_DDC_DeviceAddr == 0xa0) { + + /* Read and analyze EDID V1 (res) */ + + tempah = 0x02; /* 1024x768 by default */ + tempbl &= 0xf0; + if(tempbl != 0x40) { + tempah = 0x03; /* 1280x1024 by default */ + if(tempbl == 0x50) { + if(!tempbh) { + tempbh = buffer[3] & 0xf0; + if(tempbh == 0x30) { + SiS_Pr->SiS_DDC_DeviceAddr = 0xa0; + SiS_Pr->SiS_DDC_SecAddr = 0x23; + SiS_ReadLCDDDC(SiS_Pr, 2, buffer); + tempbl = buffer[0]; /* 0x23 */ + tempbh = buffer[1]; /* 0x24 */ + if(tempbl) cr37 |= 0x10; + tempah = 0x0a; /* 1280x768 */ + } + if(tempbh == 0x40) { + SiS_Pr->SiS_DDC_DeviceAddr = 0xa0; + SiS_Pr->SiS_DDC_SecAddr = 0x23; + SiS_ReadLCDDDC(SiS_Pr, 2, buffer); + tempbl = buffer[0]; /* 0x23 */ + tempbh = buffer[1]; /* 0x24 */ + if(tempbl) cr37 |= 0x10; + tempah = 0x03; /* 1280x1024 */ + } + tempbh = 0x00; + } + } + if(tempbh == 0x00) goto cr36ready; + tempah = 0x07; /* 1280x960 */ + if(tempbh == 0xc0) goto cr36ready; + } + SiS_Pr->SiS_DDC_DeviceAddr = 0xa0; + SiS_Pr->SiS_DDC_SecAddr = 0x18; /* feature support */ + SiS_ReadLCDDDC(SiS_Pr, 2, buffer); + tempbl = buffer[0]; + tempbh = buffer[1]; + if(tempbl & 0x02) goto cr36ready; + SiS_Pr->SiS_DDC_DeviceAddr = 0xa0; + SiS_Pr->SiS_DDC_SecAddr = 0x23; /* Established Timings */ + SiS_ReadLCDDDC(SiS_Pr, 2, buffer); + tempbl = buffer[0]; + tempbh = buffer[1]; + tempah = 0x03; + if(!(tempbh & 0x01)) tempah = 0x02; + if(!tempbl) cr37 |= 0x10; + + } else { + + /* Read and analyze EDID V2 (res) */ + + tempah = 0x02; + tempbx = tempbl | (tempbh << 8); + if(tempbx != 1024) tempah = 0x03; + + } + +cr36ready: + cr36 = tempah; + + if(SiS_Pr->SiS_DDC_DeviceAddr == 0xa0) { + + /* Read and analyze EDID V1 (pol) */ + + SiS_Pr->SiS_DDC_SecAddr = 0x47; + SiS_ReadLCDDDC(SiS_Pr, 2, buffer); + tempah = buffer[0]; + tempah &= 0x06; + tempah ^= 0x06; + tempah <<= 5; + tempah |= 0x20; + cr37 &= 0x1f; + cr37 |= tempah; + if((cr36 & 0x07) == 0x07) cr37 &= 0x0e; + + } else { + + /* Read and analyze EDID V2 (depth, pol) */ + + push1 = tempah; + SiS_Pr->SiS_DDC_SecAddr = 0x45; + SiS_ReadLCDDDC(SiS_Pr, 2, buffer); + tempah = 0x01; + if((buffer[0] != 0x20) && (buffer[0] != 0x34)) { /* RGB18 or 24? */ + tempah = 0x00; + } + cr37 &= 0xfe; + cr37 |= tempah; + + SiS_Pr->SiS_DDC_SecAddr = 0x7e; + SiS_ReadLCDDDC(SiS_Pr, 2, buffer); + tempax = (USHORT)(buffer[0] | (buffer[1] << 8)); + push2 = tempax; + tempax &= 0x0003; + tempax *= 0x1b; + push3 = tempax; + tempax = (USHORT)buffer[0]; + tempax &= 0x001c; + tempax >>= 2; + tempax *= 8; + tempbx = push3; + tempbx += tempax; + if(buffer[0] & 0x20) { /* Luminance table provided? */ + SiS_Pr->SiS_DDC_SecAddr = 0x80; + SiS_ReadLCDDDC(SiS_Pr, 2, buffer); + tempax = buffer[0] | (buffer[1] << 8); + tempax &= 0x1f; + if(buffer[0] & 0x70) tempax <<= 1; + tempax++; + tempbx += tempax; /* yes -> skip it */ + } + tempcx = push2; + tempax = push1 << 8; + tempbx = (tempbx & 0xff00) | (((tempbx & 0x00ff) + 0x80) & 0x00ff); + if(tempcx & 0xf800) { + tempal = addresstable[((tempax & 0xff00) >> 8)]; + tempcx &= 0xf8ff; + tempcx >>= 11; + for(i=0; iSiS_DDC_SecAddr = (tempbx & 0x00ff); + SiS_ReadLCDDDC(SiS_Pr, 2, buffer); + tempbx += 0x04; + if(buffer[0] == tempal) break; + } + tempah = buffer[1]; + tempah &= 0x0c; + tempah ^= 0x0c; + tempah <<= 4; + tempah |= 0x20; + cr37 &= 0x1f; + cr37 |= tempah; + if((cr36 & 0x07) == 0x07) cr37 &= 0x0e; + } + } + xf86DrvMsg(0, X_INFO, "DDC: cr36 = 0x%02x, cr37 = 0x%02x\n", cr36, cr37); + return 0; +} +#endif + /* TW: Generic I2C functions (compliant to i2c library) */ #if 0 @@ -8719,14 +10810,8 @@ USHORT SiS_SetSCLKLow(SiS_Private *SiS_Pr) { - USHORT temp, watchdog=50000; - SiS_SetRegANDOR(SiS_Pr->SiS_DDC_Port,SiS_Pr->SiS_DDC_Index, ~SiS_Pr->SiS_DDC_Clk,0x00); /* SetSCLKLow() */ - do { - temp = SiS_GetReg1(SiS_Pr->SiS_DDC_Port,SiS_Pr->SiS_DDC_Index); - } while((temp & SiS_Pr->SiS_DDC_Clk) && --watchdog); - if (!watchdog) return 0xFFFF; SiS_DDC2Delay(SiS_Pr,SiS_I2CDELAYSHORT); return 0; } @@ -8734,14 +10819,19 @@ USHORT SiS_SetSCLKHigh(SiS_Private *SiS_Pr) { - USHORT temp,watchdog=50000; + USHORT temp,watchdog=1000; SiS_SetRegANDOR(SiS_Pr->SiS_DDC_Port,SiS_Pr->SiS_DDC_Index, ~SiS_Pr->SiS_DDC_Clk,SiS_Pr->SiS_DDC_Clk); /* SetSCLKHigh() */ do { temp = SiS_GetReg1(SiS_Pr->SiS_DDC_Port,SiS_Pr->SiS_DDC_Index); } while((!(temp & SiS_Pr->SiS_DDC_Clk)) && --watchdog); - if (!watchdog) return 0xFFFF; + if (!watchdog) { +#ifdef TWDEBUG + xf86DrvMsg(0, X_INFO, "SetClkHigh failed\n"); +#endif + return 0xFFFF; + } SiS_DDC2Delay(SiS_Pr,SiS_I2CDELAYSHORT); return 0; } @@ -8776,11 +10866,78 @@ /* TW: End of I2C functions ----------------------- */ -/* =============== SiS 310/325 O.E.M. ================= */ +/* =============== SiS 310/325/330 O.E.M. ================= */ #ifdef SIS315H -USHORT +static USHORT +GetRAMDACromptr(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, UCHAR *ROMAddr) +{ + USHORT romptr; + + if(HwDeviceExtension->jChipType < SIS_330) { + romptr = ROMAddr[0x128] | (ROMAddr[0x129] << 8); + if(SiS_Pr->SiS_VBType & VB_SIS301B302B) + romptr = ROMAddr[0x12a] | (ROMAddr[0x12b] << 8); + } else { + romptr = ROMAddr[0x1a8] | (ROMAddr[0x1a9] << 8); + if(SiS_Pr->SiS_VBType & VB_SIS301B302B) + romptr = ROMAddr[0x1aa] | (ROMAddr[0x1ab] << 8); + } + return(romptr); +} + +static USHORT +GetLCDromptr(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, UCHAR *ROMAddr) +{ + USHORT romptr; + + if(HwDeviceExtension->jChipType < SIS_330) { + romptr = ROMAddr[0x120] | (ROMAddr[0x121] << 8); + if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) + romptr = ROMAddr[0x122] | (ROMAddr[0x123] << 8); + } else { + romptr = ROMAddr[0x1a0] | (ROMAddr[0x1a1] << 8); + if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) + romptr = ROMAddr[0x1a2] | (ROMAddr[0x1a3] << 8); + } + return(romptr); +} + +static USHORT +GetTVromptr(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, UCHAR *ROMAddr) +{ + USHORT romptr; + + if(HwDeviceExtension->jChipType < SIS_330) { + romptr = ROMAddr[0x114] | (ROMAddr[0x115] << 8); + if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) + romptr = ROMAddr[0x11a] | (ROMAddr[0x11b] << 8); + } else { + romptr = ROMAddr[0x194] | (ROMAddr[0x195] << 8); + if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) + romptr = ROMAddr[0x19a] | (ROMAddr[0x19b] << 8); + } + return(romptr); +} + +static USHORT +GetLCDPtrIndexBIOS(SiS_Private *SiS_Pr) +{ + USHORT index; + + index = SiS_Pr->SiS_LCDResInfo & 0x0F; + if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) index -= 5; + else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200) index -= 6; + index--; + index *= 3; + if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) index += 2; + else if(!(SiS_Pr->SiS_SetFlag & LCDVESATiming)) index++; + + return index; +} + +static USHORT GetLCDPtrIndex(SiS_Private *SiS_Pr) { USHORT index; @@ -8788,7 +10945,7 @@ index = SiS_Pr->SiS_LCDResInfo & 0x0F; index--; index *= 3; - if(SiS_Pr->SiS_LCDInfo & LCDNonExpanding) index += 2; + if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) index += 2; else if(!(SiS_Pr->SiS_SetFlag & LCDVESATiming)) index++; return index; @@ -8805,7 +10962,7 @@ 5 : HiVision Standard TVSimuMode --------------------------------------------------------- */ -USHORT +static USHORT GetTVPtrIndex(SiS_Private *SiS_Pr) { USHORT index; @@ -8822,90 +10979,231 @@ return index; } -/* TW: Checked against 650/LVDS (1.10.07) and 650/301LVx (1.10.6s) BIOS (including data) */ -void +static void SetDelayComp(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr, - UCHAR *ROMAddr,USHORT ModeNo) + UCHAR *ROMAddr, USHORT ModeNo) { - USHORT delay,index; - - if(SiS_Pr->SiS_VBInfo & SetCRT2ToRAMDAC) { - delay = SiS310_CRT2DelayCompensation1; - if(SiS_Pr->SiS_VBType & (VB_SIS301B | VB_SIS302B)) - delay = SiS310_CRT2DelayCompensation2; - if(SiS_Pr->SiS_IF_DEF_LVDS == 1) - delay = SiS310_CRT2DelayCompensation3; - } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { - index = GetLCDPtrIndex(SiS_Pr); - delay = SiS310_LCDDelayCompensation1[index]; - if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) - delay = SiS310_LCDDelayCompensation2[index]; - if(SiS_Pr->SiS_IF_DEF_LVDS == 1) - delay = SiS310_LCDDelayCompensation3[index]; - } else { + USHORT delay,index,myindex,temp,romptr=0; + + if(SiS_Pr->SiS_VBInfo & SetCRT2ToRAMDAC) { /* VGA */ + + if((ROMAddr) && SiS_Pr->SiS_UseROM) { + romptr = GetRAMDACromptr(SiS_Pr, HwDeviceExtension, ROMAddr); + if(!romptr) return; + delay = ROMAddr[romptr]; + } else { + delay = 0x04; + if(SiS_Pr->SiS_VBType & VB_SIS301B302B) { + if(IS_SIS650) { + delay = 0x0a; + } else if(IS_SIS740) { + delay = 0x00; + } else if(HwDeviceExtension->jChipType < SIS_330) { + delay = 0x0c; + } else { + delay = 0x0c; + } + } + if(SiS_Pr->SiS_IF_DEF_LVDS == 1) + delay = 0x00; + } + + } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { /* LCD */ + + index = GetLCDPtrIndexBIOS(SiS_Pr); + myindex = GetLCDPtrIndex(SiS_Pr); + + if(IS_SIS650 && (SiS_Pr->SiS_VBType & VB_SIS301LV302LV)) { /* 650+30xLV */ + if(SiS_IsNotM650or651(SiS_Pr,HwDeviceExtension, BaseAddr)) { + if((ROMAddr) && SiS_Pr->SiS_UseROM) { +#if 0 /* Always use the second pointer on 650; some BIOSes */ + /* still carry old 301 data at the first location */ + romptr = ROMAddr[0x120] | (ROMAddr[0x121] << 8); + if(SiS_Pr->SiS_VBType & VB_SIS302LV) +#endif + romptr = ROMAddr[0x122] | (ROMAddr[0x123] << 8); + if(!romptr) return; + delay = ROMAddr[(romptr + index)]; + } else { + delay = SiS310_LCDDelayCompensation_650301B[myindex]; +#if 0 + if(SiS_Pr->SiS_VBType & VB_SIS302LV) + delay = SiS310_LCDDelayCompensation_650301B[myindex]; +#endif + } + } else { + delay = SiS310_LCDDelayCompensation_651301LV[myindex]; + if(SiS_Pr->SiS_VBType & VB_SIS302LV) + delay = SiS310_LCDDelayCompensation_651302LV[myindex]; + } + } else { + if((ROMAddr) && SiS_Pr->SiS_UseROM && /* 315, 330, 740, 650+301B */ + (SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1280x1024)) { + romptr = GetLCDromptr(SiS_Pr, HwDeviceExtension, ROMAddr); + if(!romptr) return; + delay = ROMAddr[(romptr + index)]; + } else { + delay = SiS310_LCDDelayCompensation_301[myindex]; + if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { +#if 0 /* This data is (like the one in the BIOS) wrong. */ + if(IS_SIS650740) { /* V */ + delay = SiS310_LCDDelayCompensation_650301B[myindex]; + } else { +#endif + delay = SiS310_LCDDelayCompensation_3xx301B[myindex]; +#if 0 + } +#endif + } + if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { + if(IS_SIS650) { + delay = SiS310_LCDDelayCompensation_LVDS650[myindex]; + } else { + delay = SiS310_LCDDelayCompensation_LVDS740[myindex]; + } + } + } + } + + } else { /* TV */ + index = GetTVPtrIndex(SiS_Pr); - delay = SiS310_TVDelayCompensation1[index]; - if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) - delay = SiS310_TVDelayCompensation2[index]; - if(SiS_Pr->SiS_IF_DEF_LVDS == 1) - delay = SiS310_TVDelayCompensation3[index]; + + if(IS_SIS650 && (SiS_Pr->SiS_VBType & VB_SIS301LV302LV)) { + if(SiS_IsNotM650or651(SiS_Pr,HwDeviceExtension, BaseAddr)) { + if((ROMAddr) && SiS_Pr->SiS_UseROM) { +#if 0 /* Always use the second pointer on 650; some BIOSes */ + /* still carry old 301 data at the first location */ + romptr = ROMAddr[0x114] | (ROMAddr[0x115] << 8); + if(SiS_Pr->SiS_VBType & VB_SIS302LV) +#endif + romptr = ROMAddr[0x11a] | (ROMAddr[0x11b] << 8); + if(!romptr) return; + delay = ROMAddr[romptr + index]; + } else { + delay = SiS310_TVDelayCompensation_301B[index]; +#if 0 + if(SiS_Pr->SiS_VBType & VB_SIS302LV) + delay = SiS310_TVDelayCompensation_301B[index]; +#endif + } + } else { + delay = SiS310_TVDelayCompensation_651301LV[index]; + if(SiS_Pr->SiS_VBType & VB_SIS302LV) + delay = SiS310_TVDelayCompensation_651302LV[index]; + } + } else { + if((ROMAddr) && SiS_Pr->SiS_UseROM) { + romptr = GetTVromptr(SiS_Pr, HwDeviceExtension, ROMAddr); + if(!romptr) return; + delay = ROMAddr[romptr + index]; + } else { + delay = SiS310_TVDelayCompensation_301[index]; + if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { + if(IS_SIS740) + delay = SiS310_TVDelayCompensation_740301B[index]; + else + delay = SiS310_TVDelayCompensation_301B[index]; + } + if(SiS_Pr->SiS_IF_DEF_LVDS == 1) + delay = SiS310_TVDelayCompensation_LVDS[index]; + } + } + } if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { - if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { - SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x2D,0xF0,delay); - } else { - delay <<= 4; - SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x2D,0x0F,delay); - } + if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { + SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x2D,0xF0,delay); + } else { + if(IS_SIS650 && (SiS_Pr->SiS_IF_DEF_CH70xx != 0)) { + delay <<= 4; + SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x2D,0x0F,delay); + } else { + SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x2D,0xF0,delay); + } + } } else { - SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x2D,delay); /* index 2D D[3:0] */ + if(IS_SIS650 && (SiS_Pr->SiS_VBType & VB_SIS301LV302LV)) { + temp = (SiS_GetReg1(SiS_Pr->SiS_P3d4,0x36) & 0xf0) >> 4; + if(temp == 8) { + delay &= 0x0f; + delay |= 0xb0; + } else if(temp == 6) { + delay &= 0x0f; + delay |= 0xc0; + } + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x2D,delay); /* index 2D D[3:0] */ + } else { + SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x2D,0xF0,delay); + } } } -/* TW: Checked against 650/301LVx 1.10.6s BIOS (including data) */ -void +static void SetAntiFlicker(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex) { - USHORT index,temp; + USHORT index,temp,romptr=0; temp = GetTVPtrIndex(SiS_Pr); temp >>= 1; /* 0: NTSC, 1: PAL, 2: HiTV */ - if (ModeNo<=0x13) - index = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].VB_StTVFlickerIndex; + if(ModeNo<=0x13) + index = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].VB_StTVFlickerIndex; else - index = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].VB_ExtTVFlickerIndex; + index = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].VB_ExtTVFlickerIndex; + + if(ROMAddr && SiS_Pr->SiS_UseROM) { + romptr = ROMAddr[0x112] | (ROMAddr[0x113] << 8); + if(HwDeviceExtension->jChipType == SIS_330) { + romptr = ROMAddr[0x192] | (ROMAddr[0x193] << 8); + } + } - temp = SiS310_TVAntiFlick1[temp][index]; + if(romptr) { + temp <<= 1; + temp = ROMAddr[romptr + temp + index]; + } else { + temp = SiS310_TVAntiFlick1[temp][index]; + } temp <<= 4; SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x0A,0x8f,temp); /* index 0A D[6:4] */ } -/* TW: Checked against 650/301LVx 1.10.6s BIOS (including data) */ -void +static void SetEdgeEnhance(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex) { - USHORT index,temp; + USHORT index,temp,romptr=0; temp = GetTVPtrIndex(SiS_Pr); temp >>= 1; /* 0: NTSC, 1: PAL, 2: HiTV */ - if (ModeNo<=0x13) - index = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].VB_StTVEdgeIndex; + if(ModeNo<=0x13) + index = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].VB_StTVEdgeIndex; else - index = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].VB_ExtTVEdgeIndex; + index = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].VB_ExtTVEdgeIndex; + + if(ROMAddr && SiS_Pr->SiS_UseROM) { + romptr = ROMAddr[0x124] | (ROMAddr[0x125] << 8); + if(HwDeviceExtension->jChipType == SIS_330) { + romptr = ROMAddr[0x1a4] | (ROMAddr[0x1a5] << 8); + } + } - temp = SiS310_TVEdge1[temp][index]; + if(romptr) { + temp <<= 1; + temp = ROMAddr[romptr + temp + index]; + } else { + temp = SiS310_TVEdge1[temp][index]; + } temp <<= 5; SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x3A,0x1F,temp); /* index 0A D[7:5] */ } -/* TW: Checked against 650/301LVx 1.10.6s BIOS (incl data) */ -void +static void SetYFilter(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex) { @@ -8921,7 +11219,7 @@ index = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].VB_ExtTVYFilterIndex; } - if(SiS_Pr->SiS_VBInfo&SetCRT2ToHiVisionTV) temp = 1; /* Hivision TV uses PAL */ + if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) temp = 1; /* Hivision TV uses PAL */ if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { for(i=0x35, j=0; i<=0x38; i++, j++) { @@ -8935,25 +11233,28 @@ SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,SiS310_TVYFilter1[temp][index][j]); } } - + if(ROMAddr && SiS_Pr->SiS_UseROM) { OutputSelect = ROMAddr[0xf3]; + if(HwDeviceExtension->jChipType == SIS_330) { + OutputSelect = ROMAddr[0x11b]; + } } if(OutputSelect & EnablePALMN) { if(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x31) & 0x01) { temp = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x38); - temp &= (EnablePALMN | EnablePALN); - if(temp == EnablePALMN) { + temp &= (EnablePALM | EnablePALN); + if(temp == EnablePALM) { if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { - for(i=0x35, j=0; i<=0x38; i++, j++){ + for(i=0x35, j=0; i<=0x38; i++, j++) { SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,SiS310_PALMFilter2[index][j]); } for(i=0x48; i<=0x4A; i++, j++) { - SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,SiS310_PALMFilter2[index][j]); + SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,SiS310_PALMFilter2[index][j]); } } else { for(i=0x35, j=0; i<=0x38; i++, j++) { - SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,SiS310_PALMFilter[index][j]); + SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,SiS310_PALMFilter[index][j]); } } } @@ -8963,31 +11264,30 @@ SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,SiS310_PALNFilter2[index][j]); } for(i=0x48, j=0; i<=0x4A; i++, j++) { - SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,SiS310_PALNFilter2[index][j]); + SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,SiS310_PALNFilter2[index][j]); } } else { - for(i=0x35, j=0; i<=0x38; i++, j++) - SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,SiS310_PALNFilter[index][j]); + for(i=0x35, j=0; i<=0x38; i++, j++) { + SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,SiS310_PALNFilter[index][j]); + } } } } } } -/* TW: Checked against 650/301LVx 1.10.6s BIOS (including data) */ -void +static void SetPhaseIncr(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex) { - USHORT index,temp,temp1,i,j,resinfo; + USHORT index,temp,temp1,i,j,resinfo,romptr=0; if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToTV)) return; temp1 = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x38); /* if PALM/N not set */ - temp1 &= (EnablePALMN | EnablePALN); + temp1 &= (EnablePALM | EnablePALN); if(temp1) return; - if (ModeNo<=0x13) { resinfo = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ResInfo; } else { @@ -8995,22 +11295,47 @@ } temp = GetTVPtrIndex(SiS_Pr); - /* 0: NTSC Graphics, 1: NTSC Text, 2:PAL Graphics, - * 3: PAL Text, 4: HiTV Graphics 5:HiTV Text + /* 0: NTSC Graphics, 1: NTSC Text, 2: PAL Graphics, + * 3: PAL Text, 4: HiTV Graphics 5: HiTV Text */ - index = temp % 2; - temp >>= 1; /* 0:NTSC, 1:PAL, 2:HiTV */ - - for(j=0, i=0x31; i<=0x34; i++, j++) { - if(!(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV)) - SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,SiS310_TVPhaseIncr1[temp][index][j]); - else if((!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) || (SiS_Pr->SiS_SetFlag & TVSimuMode)) - SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,SiS310_TVPhaseIncr2[temp][index][j]); - else - SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,SiS310_TVPhaseIncr1[temp][index][j]); + if((ROMAddr) && SiS_Pr->SiS_UseROM) { + romptr = ROMAddr[0x116] | (ROMAddr[0x117] << 8); + if(HwDeviceExtension->jChipType == SIS_330) { + romptr = ROMAddr[0x196] | (ROMAddr[0x197] << 8); + } + if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { + romptr = ROMAddr[0x11c] | (ROMAddr[0x11d] << 8); + if(HwDeviceExtension->jChipType == SIS_330) { + romptr = ROMAddr[0x19c] | (ROMAddr[0x19d] << 8); + } + if((SiS_Pr->SiS_VBInfo & SetInSlaveMode) && (!(SiS_Pr->SiS_SetFlag & TVSimuMode))) { + romptr = ROMAddr[0x116] | (ROMAddr[0x117] << 8); + if(HwDeviceExtension->jChipType == SIS_330) { + romptr = ROMAddr[0x196] | (ROMAddr[0x197] << 8); + } + } + } + } + if(romptr) { + romptr += (temp << 2); + for(j=0, i=0x31; i<=0x34; i++, j++) { + SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,ROMAddr[romptr + j]); + } + } else { + index = temp % 2; + temp >>= 1; /* 0:NTSC, 1:PAL, 2:HiTV */ + for(j=0, i=0x31; i<=0x34; i++, j++) { + if(!(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV)) + SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,SiS310_TVPhaseIncr1[temp][index][j]); + else if((!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) || (SiS_Pr->SiS_SetFlag & TVSimuMode)) + SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,SiS310_TVPhaseIncr2[temp][index][j]); + else + SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,SiS310_TVPhaseIncr1[temp][index][j]); + } } + if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { /* TW: 650/301LV: (VB_SIS301LV | VB_SIS302LV)) */ - if(!(SiS_Pr->SiS_VBInfo & SetPALTV)) { + if((!(SiS_Pr->SiS_VBInfo & SetPALTV)) && (ModeNo > 0x13)) { if(resinfo == 6) { SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x31,0x21); SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x32,0xf0); @@ -9036,7 +11361,7 @@ UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex) { SetDelayComp(SiS_Pr,HwDeviceExtension,BaseAddr,ROMAddr,ModeNo); - /* TW: The TV funtions are not for LVDS */ + /* TW: The TV functions are not for LVDS */ if( (SiS_Pr->SiS_IF_DEF_LVDS == 0) && (SiS_Pr->SiS_VBInfo & SetCRT2ToTV) ) { SetAntiFlicker(SiS_Pr,HwDeviceExtension,BaseAddr,ROMAddr,ModeNo,ModeIdIndex); SetPhaseIncr(SiS_Pr,HwDeviceExtension,BaseAddr,ROMAddr,ModeNo,ModeIdIndex); @@ -9047,20 +11372,28 @@ } } -/* TW: New from 650/301LVx 1.10.6s - clashes with OEMLCD() */ +/* FinalizeLCD + * This finalizes some Part1 registers for the very panel used. + * If we have a backup if these registers, we use it; otherwise + * we set the register according to most BIOSes. However, this + * function looks quite different in every BIOS, so you better + * pray that we have a backup... + */ void SiS_FinalizeLCD(SiS_Private *SiS_Pr, USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo, USHORT ModeIdIndex, PSIS_HW_DEVICE_INFO HwDeviceExtension) { USHORT tempcl,tempch,tempbl,tempbh,tempbx,tempax,temp; - USHORT resinfo; + USHORT resinfo,modeflag; - if(!(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV)) return; + if(!(SiS_Pr->SiS_VBType & VB_SIS301LV302LV)) return; - if(ModeNo<=0x13) { + if(ModeNo <= 0x13) { resinfo = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ResInfo; + modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag; } else { resinfo = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO; + modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag; } if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) { @@ -9076,6 +11409,76 @@ if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) { SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1f,0x76); } + if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) { + if((SiS_Pr->Backup == TRUE) && (SiS_Pr->Backup_Mode == ModeNo)) { + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x14,SiS_Pr->Backup_14); + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x15,SiS_Pr->Backup_15); + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x16,SiS_Pr->Backup_16); + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x17,SiS_Pr->Backup_17); + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x18,SiS_Pr->Backup_18); + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x19,SiS_Pr->Backup_19); + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1a,SiS_Pr->Backup_1a); + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1b,SiS_Pr->Backup_1b); + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1c,SiS_Pr->Backup_1c); + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1d,SiS_Pr->Backup_1d); + } else if(!(SiS_Pr->SiS_LCDInfo & DontExpandLCD)) { /* From 1.10.8w */ + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x14,0x90); + if(ModeNo <= 0x13) { + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x18,0x11); + if((resinfo == 0) && (resinfo == 2)) return; + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x18,0x18); + if((resinfo == 1) && (resinfo == 3)) return; + } + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x18,0x02); + if((ModeNo > 0x13) && (resinfo == 8)) { + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x18,0x02); /* 1.10.7u */ +#if 0 + tempbx = 806; /* 0x326 */ /* other older BIOSes */ + tempbx--; + temp = tempbx & 0xff; + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1b,temp); + temp = (tempbx >> 8) & 0x03; + SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x1d,0xf8,temp); +#endif + } + } else { + if(ModeNo <= 0x13) { + if(ModeNo <= 1) { + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x18,0x70); + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x19,0xff); + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1b,0x48); + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1d,0x12); + } + if(!(modeflag & HalfDCLK)) { + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x14,0x20); + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x15,0x1a); + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x16,0x28); + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x17,0x00); + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x18,0x4c); + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x19,0xdc); + if(ModeNo == 0x12) { + switch(tempch) { + case 0: + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x18,0x95); + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x19,0xdc); + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1a,0x10); + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1b,0x95); + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1c,0x48); + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1d,0x12); + break; + case 2: + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x18,0x95); + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1b,0x48); + break; + case 3: + SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1b,0x95); + break; + } + } + } + } + } + } } else { tempcl = tempbh = SiS_GetReg1(SiS_Pr->SiS_Part2Port,0x01); tempcl &= 0x0f; @@ -9084,15 +11487,15 @@ tempbl = SiS_GetReg1(SiS_Pr->SiS_Part2Port,0x04); tempbx = (tempbh << 8) | tempbl; if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) { - if((resinfo == 8) || (!(SiS_Pr->SiS_LCDInfo & LCDNonExpanding))) { + if((resinfo == 8) || (!(SiS_Pr->SiS_LCDInfo & DontExpandLCD))) { if(SiS_Pr->SiS_SetFlag & LCDVESATiming) { tempbx = 770; } else { if(tempbx > 770) tempbx = 770; - if(SiS_Pr->SiS_VGAVDE < 600) { /* Shouldn't that be <=? */ + if(SiS_Pr->SiS_VGAVDE < 600) { tempax = 768 - SiS_Pr->SiS_VGAVDE; - tempax >>= 3; - if(SiS_Pr->SiS_VGAVDE < 480) tempax >>= 1; /* Shouldn't that be <=? */ + tempax >>= 4; /* From 1.10.7w; 1.10.6s: 3; */ + if(SiS_Pr->SiS_VGAVDE <= 480) tempax >>= 4; /* From 1.10.7w; 1.10.6s: < 480; >>=1; */ tempbx -= tempax; } } @@ -9112,6 +11515,7 @@ } } +#if 0 /* TW: New and checked from 650/301LV BIOS */ /* This might clash with newer "FinalizeLCD()" function */ void @@ -9166,13 +11570,15 @@ } #endif +#endif + /* ================= SiS 300 O.E.M. ================== */ #ifdef SIS300 #if 0 /* Not used */ -USHORT +static USHORT GetRevisionID(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension) { ULONG temp1; @@ -9199,74 +11605,170 @@ } #endif -/* TW: Checked against 630/301B BIOS (incl data) */ -USHORT -GetOEMLCDPtr(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, int Flag) +static USHORT +GetOEMLCDPtr(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, UCHAR *ROMAddr, int Flag) { - USHORT tempbx=0; - UCHAR customtable[] = { + USHORT tempbx=0,romptr=0; + UCHAR customtable300[] = { + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff + }; + UCHAR customtable630[] = { 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff }; - if(Flag) { - if(customtable[SiS_Pr->SiS_LCDTypeInfo] == 0xFF) return 0xFFFF; - } - if(SiS_Pr->SiS_IF_DEF_LVDS == 0) { - tempbx = SiS_Pr->SiS_LCDTypeInfo << 2; - if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) tempbx += 2; - if(SiS_Pr->SiS_LCDInfo & LCDNonExpanding) tempbx++; + if(HwDeviceExtension->jChipType == SIS_300) { + + tempbx = SiS_Pr->SiS_LCDResInfo - 2; + if(!(SiS_Pr->SiS_SetFlag & LCDVESATiming)) tempbx += 4; + if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) { + if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) tempbx += 3; + } + if((ROMAddr) && SiS_Pr->SiS_UseROM) { + if(ROMAddr[0x235] & 0x80) { + tempbx = SiS_Pr->SiS_LCDTypeInfo; + if(Flag) { + romptr = ROMAddr[0x255] | (ROMAddr[0x256] << 8); + if(romptr) { + tempbx = ROMAddr[romptr + SiS_Pr->SiS_LCDTypeInfo]; + } else { + tempbx = customtable300[SiS_Pr->SiS_LCDTypeInfo]; + } + if(tempbx == 0xFF) return 0xFFFF; + } + tempbx <<= 1; + if(!(SiS_Pr->SiS_SetFlag & LCDVESATiming)) tempbx++; + } + } + } else { - tempbx = SiS_Pr->SiS_LCDTypeInfo; - if(SiS_Pr->SiS_LCDInfo & LCDNonExpanding) tempbx += 16; + + if(Flag) { + if((ROMAddr) && SiS_Pr->SiS_UseROM) { + romptr = ROMAddr[0x255] | (ROMAddr[0x256] << 8); + if(romptr) { + tempbx = ROMAddr[romptr + SiS_Pr->SiS_LCDTypeInfo]; + } else { + tempbx = 0xff; + } + } else { + tempbx = customtable630[SiS_Pr->SiS_LCDTypeInfo]; + } + if(tempbx == 0xFF) return 0xFFFF; + tempbx <<= 2; + if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) tempbx += 2; + if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) tempbx++; + return tempbx; + } + tempbx = SiS_Pr->SiS_LCDTypeInfo << 2; + if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) tempbx += 2; + if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) tempbx++; } return tempbx; } -/* TW: Checked against 630/301B and 630/LVDS BIOS (incl data) */ -void +static void SetOEMLCDDelay(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex) { - USHORT index,temp; + USHORT index,temp,romptr=0; - /* TW: The Panel Compensation Delay should be set according to tables - * here. Unfortunately, the different BIOS versions don't case about - * a uniform way using eg. ROM byte 0x220, but use different - * hard coded delays (0x04, 0x20, 0x18) in SetGroup1(). So we can't - * rely on the other OEM bits in 0x237, 0x238 here either. - * ROMAddr > 0x233 is even used for code (!) in newer BIOSes! - */ -#if 0 if((ROMAddr) && SiS_Pr->SiS_UseROM) { if(!(ROMAddr[0x237] & 0x01)) return; if(!(ROMAddr[0x237] & 0x02)) return; + romptr = ROMAddr[0x24b] | (ROMAddr[0x24c] << 8); } -#endif - /* TW: We just check if a non-standard delay has been set; if not, - * we use our tables. Otherwise don't do anything here. + + /* TW: The Panel Compensation Delay should be set according to tables + * here. Unfortunately, various BIOS versions don't case about + * a uniform way using eg. ROM byte 0x220, but use different + * hard coded delays (0x04, 0x20, 0x18) in SetGroup1(). + * Thus we don't set this if the user select a custom pdc or if + * we otherwise detected a valid pdc. */ - if((ROMAddr) && SiS_Pr->SiS_UseROM) { - if(ROMAddr[0x220] & 0x80) return; - } - /* TW: We don't need to set this if the user select a custom pdc */ if(HwDeviceExtension->pdc) return; - temp = GetOEMLCDPtr(SiS_Pr,HwDeviceExtension, 0); + temp = GetOEMLCDPtr(SiS_Pr,HwDeviceExtension, ROMAddr, 0); index = SiS_Pr->SiS_VBModeIDTable[ModeIdIndex].VB_LCDDelayIndex; - if (SiS_Pr->SiS_IF_DEF_LVDS == 0) { - temp = SiS300_OEMLCDDelay2[temp][index]; + if(HwDeviceExtension->jChipType != SIS_300) { + if(romptr) { + romptr += (temp * 2); + romptr = ROMAddr[romptr] | (ROMAddr[romptr + 1] << 8); + romptr += index; + temp = ROMAddr[romptr]; + } else { + if(SiS_Pr->SiS_IF_DEF_LVDS == 0) { + temp = SiS300_OEMLCDDelay2[temp][index]; + } else { + temp = SiS300_OEMLCDDelay3[temp][index]; + } + } } else { - temp = SiS300_OEMLCDDelay3[temp][index]; + if((ROMAddr) && SiS_Pr->SiS_UseROM && (ROMAddr[0x235] & 0x80)) { + if(romptr) { + romptr += (temp * 2); + romptr = ROMAddr[romptr] | (ROMAddr[romptr + 1] << 8); + romptr += index; + temp = ROMAddr[romptr]; + } else { + temp = SiS300_OEMLCDDelay5[temp][index]; + } + } else { + if((ROMAddr) && SiS_Pr->SiS_UseROM) { + romptr = ROMAddr[0x249] | (ROMAddr[0x24a] << 8); + if(romptr) { + romptr += (temp * 2); + romptr = ROMAddr[romptr] | (ROMAddr[romptr + 1] << 8); + romptr += index; + temp = ROMAddr[romptr]; + } else { + temp = SiS300_OEMLCDDelay4[temp][index]; + } + } else { + temp = SiS300_OEMLCDDelay4[temp][index]; + } + } } temp &= 0x3c; SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x13,~0x3C,temp); /* index 0A D[6:4] */ } -/* TW: Checked against 630/301B 2.04.50 and 630/LVDS BIOS */ -USHORT +static void +SetOEMLCDData(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr, + UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex) +{ +#if 0 /* TW: Unfinished; VData table missing */ + USHORT index,temp; + + if((ROMAddr) && SiS_Pr->SiS_UseROM) { + if(!(ROMAddr[0x237] & 0x01)) return; + if(!(ROMAddr[0x237] & 0x04)) return; + /* No rom pointer in BIOS header! */ + } + + temp = GetOEMLCDPtr(SiS_Pr,HwDeviceExtension, ROMAddr, 1); + if(temp = 0xFFFF) return; + + index = SiS_Pr->SiS_VBModeIDTable[ModeIdIndex]._VB_LCDHIndex; + for(i=0x14, j=0; i<=0x17; i++, j++) { + SiS_SetReg1(SiS_Pr->SiS_Part1Port,i,SiS300_LCDHData[temp][index][j]); + } + SiS_SetRegANDOR(SiS_SiS_Part1Port,0x1a, 0xf8, (SiS300_LCDHData[temp][index][j] & 0x07)); + + index = SiS_Pr->SiS_VBModeIDTable[ModeIdIndex]._VB_LCDVIndex; + SiS_SetReg1(SiS_SiS_Part1Port,0x18, SiS300_LCDVData[temp][index][0]); + SiS_SetRegANDOR(SiS_SiS_Part1Port,0x19, 0xF0, SiS300_LCDVData[temp][index][1]); + SiS_SetRegANDOR(SiS_SiS_Part1Port,0x1A, 0xC7, (SiS300_LCDVData[temp][index][2] & 0x38)); + for(i=0x1b, j=3; i<=0x1d; i++, j++) { + SiS_SetReg1(SiS_Pr->SiS_Part1Port,i,SiS300_LCDVData[temp][index][j]); + } +#endif +} + +static USHORT GetOEMTVPtr(SiS_Private *SiS_Pr) { USHORT index; @@ -9284,58 +11786,81 @@ return index; } -/* TW: Checked against 630/301B 2.04.50 and 630/LVDS BIOS (incl data) */ -void +static void SetOEMTVDelay(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex) { - USHORT index,temp; + USHORT index,temp,romptr=0; -#if 0 /* TW: Not used in newer BIOSes (2.04.5a) */ if((ROMAddr) && SiS_Pr->SiS_UseROM) { if(!(ROMAddr[0x238] & 0x01)) return; if(!(ROMAddr[0x238] & 0x02)) return; + romptr = ROMAddr[0x241] | (ROMAddr[0x242] << 8); } -#endif + temp = GetOEMTVPtr(SiS_Pr); index = SiS_Pr->SiS_VBModeIDTable[ModeIdIndex].VB_TVDelayIndex; - if(SiS_Pr->SiS_IF_DEF_LVDS == 0) { - temp = SiS300_OEMTVDelay301[temp][index]; + if(romptr) { + romptr += (temp * 2); + romptr = ROMAddr[romptr] | (ROMAddr[romptr + 1] << 8); + romptr += index; + temp = ROMAddr[romptr]; } else { - temp = SiS300_OEMTVDelayLVDS[temp][index]; + if(SiS_Pr->SiS_IF_DEF_LVDS == 0) { + temp = SiS300_OEMTVDelay301[temp][index]; + } else { + temp = SiS300_OEMTVDelayLVDS[temp][index]; + } } temp &= 0x3c; SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x13,~0x3C,temp); /* index 0A D[6:4] */ } -/* TW: Checked against 630/301B 2.04.50 BIOS (incl data) */ -void +static void SetOEMAntiFlicker(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo, USHORT ModeIdIndex) { - USHORT index,temp; + USHORT index,temp,romptr=0; + + if((ROMAddr) && SiS_Pr->SiS_UseROM) { + if(!(ROMAddr[0x238] & 0x01)) return; + if(!(ROMAddr[0x238] & 0x04)) return; + romptr = ROMAddr[0x243] | (ROMAddr[0x244] << 8); + } temp = GetOEMTVPtr(SiS_Pr); index = SiS_Pr->SiS_VBModeIDTable[ModeIdIndex].VB_TVFlickerIndex; - temp = SiS300_OEMTVFlicker[temp][index]; + if(romptr) { + romptr += (temp * 2); + romptr = ROMAddr[romptr] | (ROMAddr[romptr + 1] << 8); + romptr += index; + temp = ROMAddr[romptr]; + } else { + temp = SiS300_OEMTVFlicker[temp][index]; + } temp &= 0x70; SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x0A,0x8F,temp); /* index 0A D[6:4] */ } -/* TW: Checked against 630/301B 2.04.50 BIOS (incl data) */ -void +static void SetOEMPhaseIncr(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex) { - USHORT index,i,j,temp; + USHORT index,i,j,temp,romptr=0; if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) return; + if((ROMAddr) && SiS_Pr->SiS_UseROM) { + if(!(ROMAddr[0x238] & 0x01)) return; + if(!(ROMAddr[0x238] & 0x08)) return; + romptr = ROMAddr[0x245] | (ROMAddr[0x246] << 8); + } + temp = GetOEMTVPtr(SiS_Pr); index = SiS_Pr->SiS_VBModeIDTable[ModeIdIndex].VB_TVPhaseIndex; @@ -9345,21 +11870,35 @@ SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,SiS300_Phase2[temp][index][j]); } } else { - for(i=0x31, j=0; i<=0x34; i++, j++) { - SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,SiS300_Phase1[temp][index][j]); + if(romptr) { + romptr += (temp * 2); + romptr = ROMAddr[romptr] | (ROMAddr[romptr + 1] << 8); + romptr += (index * 4); + for(i=0x31, j=0; i<=0x34; i++, j++) { + SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,ROMAddr[romptr + j]); + } + } else { + for(i=0x31, j=0; i<=0x34; i++, j++) { + SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,SiS300_Phase1[temp][index][j]); + } } } } -/* TW: Checked against 630/301B 2.04.50 BIOS (incl data) */ -void +static void SetOEMYFilter(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex) { - USHORT index,temp,temp1,i,j; + USHORT index,temp,temp1,i,j,romptr=0; if(SiS_Pr->SiS_VBInfo & (SetCRT2ToSCART | SetCRT2ToHiVisionTV)) return; + if((ROMAddr) && SiS_Pr->SiS_UseROM) { + if(!(ROMAddr[0x238] & 0x01)) return; + if(!(ROMAddr[0x238] & 0x10)) return; + romptr = ROMAddr[0x247] | (ROMAddr[0x248] << 8); + } + temp = GetOEMTVPtr(SiS_Pr); index = SiS_Pr->SiS_VBModeIDTable[ModeIdIndex].VB_TVYFilterIndex; @@ -9367,9 +11906,9 @@ if(HwDeviceExtension->jChipType > SIS_300) { if(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x31) & 0x01) { temp1 = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x35); - if(temp1 & (EnablePALMN | EnablePALN)) { + if(temp1 & (EnablePALM | EnablePALN)) { temp = 8; - if(temp1 & EnablePALN) temp = 9; + if(!(temp1 & EnablePALM)) temp = 9; } } } @@ -9381,8 +11920,17 @@ SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,SiS300_Filter2[temp][index][j]); } } else { - for(i=0x35, j=0; i<=0x38; i++, j++) { - SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,SiS300_Filter1[temp][index][j]); + if(romptr) { + romptr += (temp * 2); + romptr = ROMAddr[romptr] | (ROMAddr[romptr + 1] << 8); + romptr += (index * 4); + for(i=0x35, j=0; i<=0x38; i++, j++) { + SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,ROMAddr[romptr + j]); + } + } else { + for(i=0x35, j=0; i<=0x38; i++, j++) { + SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,SiS300_Filter1[temp][index][j]); + } } } } @@ -9396,12 +11944,15 @@ ModeIdIndex = SiS_SearchVBModeID(SiS_Pr,ROMAddr,&ModeNo); if(!(ModeIdIndex)) return; - if (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { + if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { SetOEMLCDDelay(SiS_Pr,HwDeviceExtension,BaseAddr,ROMAddr,ModeNo,ModeIdIndex); + if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { + SetOEMLCDData(SiS_Pr,HwDeviceExtension,BaseAddr,ROMAddr,ModeNo,ModeIdIndex); + } } - if (SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { + if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { SetOEMTVDelay(SiS_Pr,HwDeviceExtension,BaseAddr,ROMAddr,ModeNo,ModeIdIndex); - if(SiS_Pr->SiS_IF_DEF_LVDS==0) { + if(SiS_Pr->SiS_IF_DEF_LVDS == 0) { SetOEMAntiFlicker(SiS_Pr,HwDeviceExtension,BaseAddr,ROMAddr,ModeNo,ModeIdIndex); SetOEMPhaseIncr(SiS_Pr,HwDeviceExtension,BaseAddr,ROMAddr,ModeNo,ModeIdIndex); SetOEMYFilter(SiS_Pr,HwDeviceExtension,BaseAddr,ROMAddr,ModeNo,ModeIdIndex); diff --exclude-from /usr/src/exclude -u --new-file --recursive linux.21rc1/drivers/video/sis/init301.h linux.21rc1-ac1/drivers/video/sis/init301.h --- linux.21rc1/drivers/video/sis/init301.h 2003-04-22 16:38:52.000000000 +0100 +++ linux.21rc1-ac1/drivers/video/sis/init301.h 2003-04-22 19:20:12.000000000 +0100 @@ -24,9 +24,15 @@ #endif #ifdef LINUX_KERNEL +#include +#include #include #include +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) #include +#else +#include