diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/i386/boot/compressed/head.S linux.2.5.40-ac2/arch/i386/boot/compressed/head.S --- linux.2.5.40/arch/i386/boot/compressed/head.S 2002-07-20 20:12:21.000000000 +0100 +++ linux.2.5.40-ac2/arch/i386/boot/compressed/head.S 2002-10-02 21:41:29.000000000 +0100 @@ -31,7 +31,7 @@ startup_32: cld cli - movl $(__KERNEL_DS),%eax + movl $(__BOOT_DS),%eax movl %eax,%ds movl %eax,%es movl %eax,%fs @@ -74,7 +74,7 @@ popl %esi # discard address popl %esi # real mode pointer xorl %ebx,%ebx - ljmp $(__KERNEL_CS), $0x100000 + ljmp $(__BOOT_CS), $0x100000 /* * We come here, if we were loaded high. @@ -101,7 +101,7 @@ popl %eax # hcount movl $0x100000,%edi cli # make sure we don't get interrupted - ljmp $(__KERNEL_CS), $0x1000 # and jump to the move routine + ljmp $(__BOOT_CS), $0x1000 # and jump to the move routine /* * Routine (template) for moving the decompressed kernel in place, @@ -124,5 +124,5 @@ movsl movl %ebx,%esi # Restore setup pointer xorl %ebx,%ebx - ljmp $(__KERNEL_CS), $0x100000 + ljmp $(__BOOT_CS), $0x100000 move_routine_end: diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/i386/boot/compressed/misc.c linux.2.5.40-ac2/arch/i386/boot/compressed/misc.c --- linux.2.5.40/arch/i386/boot/compressed/misc.c 2002-10-02 21:34:02.000000000 +0100 +++ linux.2.5.40-ac2/arch/i386/boot/compressed/misc.c 2002-10-03 13:54:01.000000000 +0100 @@ -120,7 +120,7 @@ static int vidport; static int lines, cols; -#ifdef CONFIG_MULTIQUAD +#ifdef CONFIG_X86_NUMAQ static void * xquad_portio = NULL; #endif @@ -299,7 +299,7 @@ struct { long * a; short b; - } stack_start = { & user_stack [STACK_SIZE] , __KERNEL_DS }; + } stack_start = { & user_stack [STACK_SIZE] , __BOOT_DS }; static void setup_normal_output_buffer(void) { diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/i386/boot/setup.S linux.2.5.40-ac2/arch/i386/boot/setup.S --- linux.2.5.40/arch/i386/boot/setup.S 2002-10-02 21:33:29.000000000 +0100 +++ linux.2.5.40-ac2/arch/i386/boot/setup.S 2002-10-02 21:41:29.000000000 +0100 @@ -471,6 +471,24 @@ movsb popw %ds no_mca: +#ifdef CONFIG_VOYAGER + movb $0xff, 0x40 # flag on config found + movb $0xc0, %al + mov $0xff, %ah + int $0x15 # put voyager config info at es:di + jc no_voyager + movw $0x40, %si # place voyager info in apm table + cld + movw $7, %cx +voyager_rep: + movb %es:(%di), %al + movb %al,(%si) + incw %di + incw %si + decw %cx + jnz voyager_rep +no_voyager: +#endif # Check for PS/2 pointing device movw %cs, %ax # aka SETUPSEG subw $DELTA_INITSEG, %ax # aka INITSEG @@ -671,6 +689,7 @@ A20_ENABLE_LOOPS = 255 # Total loops to try +#ifndef CONFIG_VOYAGER a20_try_loop: # First, see if we are on a system with no A20 gate. @@ -689,11 +708,14 @@ jnz a20_done # Try enabling A20 through the keyboard controller +#endif /* CONFIG_VOYAGER */ a20_kbc: call empty_8042 +#ifndef CONFIG_VOYAGER call a20_test # Just in case the BIOS worked jnz a20_done # but had a delayed reaction. +#endif movb $0xD1, %al # command write outb %al, $0x64 @@ -703,6 +725,7 @@ outb %al, $0x60 call empty_8042 +#ifndef CONFIG_VOYAGER # Wait until a20 really *is* enabled; it can take a fair amount of # time on certain systems; Toshiba Tecras are known to have this # problem. @@ -750,6 +773,7 @@ # If we get here, all is good a20_done: +#endif /* CONFIG_VOYAGER */ # set up gdt and idt lidt idt_48 # load idt with 0,0 xorl %eax, %eax # Compute gdt_base @@ -801,7 +825,7 @@ subw $DELTA_INITSEG, %si shll $4, %esi # Convert to 32-bit pointer # NOTE: For high loaded big kernels we need a -# jmpi 0x100000,__KERNEL_CS +# jmpi 0x100000,__BOOT_CS # # but we yet haven't reloaded the CS register, so the default size # of the target offset still is 16 bit. @@ -812,7 +836,7 @@ .byte 0x66, 0xea # prefix + jmpi-opcode code32: .long 0x1000 # will be set to 0x100000 # for big kernels - .word __KERNEL_CS + .word __BOOT_CS # Here's a bunch of information about your current kernel.. kernel_version: .ascii UTS_RELEASE @@ -916,6 +940,7 @@ .string "INT15 refuses to access high mem, giving up." +#ifndef CONFIG_VOYAGER # This routine tests whether or not A20 is enabled. If so, it # exits with zf = 0. # @@ -946,6 +971,8 @@ popw %cx ret +#endif /* CONFIG_VOYAGER */ + # This routine checks that the keyboard command queue is empty # (after emptying the output buffers) # @@ -1006,13 +1033,19 @@ # Descriptor tables # -# NOTE: if you think the GDT is large, you can make it smaller by just -# defining the KERNEL_CS and KERNEL_DS entries and shifting the gdt -# address down by GDT_ENTRY_KERNEL_CS*8. This puts bogus entries into -# the GDT, but those wont be used so it's not a problem. +# NOTE: The intel manual says gdt should be sixteen bytes aligned for +# efficiency reasons. However, there are machines which are known not +# to boot with misaligned GDTs, so alter this at your peril! If you alter +# GDT_ENTRY_BOOT_CS (in asm/segment.h) remember to leave at least two +# empty GDT entries (one for NULL and one reserved). +# +# NOTE: On some CPUs, the GDT must be 8 byte aligned. This is +# true for the Voyager Quad CPU card which will not boot without +# This directive. 16 byte aligment is recommended by intel. # + .align 16 gdt: - .fill GDT_ENTRY_KERNEL_CS,8,0 + .fill GDT_ENTRY_BOOT_CS,8,0 .word 0xFFFF # 4Gb - (0x100000*0x1000 = 4Gb) .word 0 # base address = 0 @@ -1025,12 +1058,17 @@ .word 0x9200 # data read/write .word 0x00CF # granularity = 4096, 386 # (+5th nibble of limit) +gdt_end: + .align 4 + + .word 0 # alignment byte idt_48: .word 0 # idt limit = 0 .word 0, 0 # idt base = 0L -gdt_48: - .word GDT_ENTRY_KERNEL_CS*8 + 16 - 1 # gdt limit + .word 0 # alignment byte +gdt_48: + .word gdt_end - gdt - 1 # gdt limit .word 0, 0 # gdt base (filled in later) # Include video setup & detection code diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/i386/Config.help linux.2.5.40-ac2/arch/i386/Config.help --- linux.2.5.40/arch/i386/Config.help 2002-10-02 21:34:05.000000000 +0100 +++ linux.2.5.40-ac2/arch/i386/Config.help 2002-10-03 13:56:30.000000000 +0100 @@ -57,6 +57,14 @@ You will need a new lynxer.elf file to flash your firmware with - send email to Martin.Bligh@us.ibm.com +CONFIG_X86_CYCLONE + This patch used the Cyclone performance counter on IBM x440, x360, + and other Summit based systems for calculating gettimeofday. This + fixes problems resulting from TSC skew found in multi-CEC system. + + If you are suffering from time skew using a multi-CEC system, say YES. + Otherwise it is safe to say NO. + CONFIG_X86_UP_IOAPIC An IO-APIC (I/O Advanced Programmable Interrupt Controller) is an SMP-capable replacement for PC-style interrupt controllers. Most @@ -246,6 +254,15 @@ (and especially the web page given there) before attempting to build an MCA bus kernel. +CONFIG_VOYAGER + Voyager is a MCA based 32 way capable SMP architecture proprietary + to NCR Corp. Machine classes 345x/35xx/4100/51xx are voyager based. + + *** WARNING *** + + If you do not specifically know you have a Voyager based machine, + say N here otherwise the kernel you build will not be bootable. + CONFIG_EISA The Extended Industry Standard Architecture (EISA) bus was developed as an open alternative to the IBM MicroChannel bus. diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/i386/config.in linux.2.5.40-ac2/arch/i386/config.in --- linux.2.5.40/arch/i386/config.in 2002-10-02 21:34:05.000000000 +0100 +++ linux.2.5.40-ac2/arch/i386/config.in 2002-10-03 13:56:30.000000000 +0100 @@ -72,7 +72,7 @@ define_int CONFIG_X86_L1_CACHE_SHIFT 5 define_bool CONFIG_X86_USE_STRING_486 y define_bool CONFIG_X86_ALIGNMENT_16 y - define_bool CONFIG_X86_TSC y + define_bool CONFIG_X86_HAS_TSC y define_bool CONFIG_X86_PPRO_FENCE y define_bool CONFIG_X86_F00F_BUG y fi @@ -80,39 +80,39 @@ define_int CONFIG_X86_L1_CACHE_SHIFT 5 define_bool CONFIG_X86_USE_STRING_486 y define_bool CONFIG_X86_ALIGNMENT_16 y - define_bool CONFIG_X86_TSC y + define_bool CONFIG_X86_HAS_TSC y define_bool CONFIG_X86_GOOD_APIC y define_bool CONFIG_X86_PPRO_FENCE y define_bool CONFIG_X86_F00F_BUG y fi if [ "$CONFIG_M686" = "y" ]; then define_int CONFIG_X86_L1_CACHE_SHIFT 5 - define_bool CONFIG_X86_TSC y + define_bool CONFIG_X86_HAS_TSC y define_bool CONFIG_X86_GOOD_APIC y define_bool CONFIG_X86_USE_PPRO_CHECKSUM y define_bool CONFIG_X86_PPRO_FENCE y fi if [ "$CONFIG_MPENTIUMIII" = "y" ]; then define_int CONFIG_X86_L1_CACHE_SHIFT 5 - define_bool CONFIG_X86_TSC y + define_bool CONFIG_X86_HAS_TSC y define_bool CONFIG_X86_GOOD_APIC y define_bool CONFIG_X86_USE_PPRO_CHECKSUM y fi if [ "$CONFIG_MPENTIUM4" = "y" ]; then define_int CONFIG_X86_L1_CACHE_SHIFT 7 - define_bool CONFIG_X86_TSC y + define_bool CONFIG_X86_HAS_TSC y define_bool CONFIG_X86_GOOD_APIC y define_bool CONFIG_X86_USE_PPRO_CHECKSUM y fi if [ "$CONFIG_MK6" = "y" ]; then define_int CONFIG_X86_L1_CACHE_SHIFT 5 define_bool CONFIG_X86_ALIGNMENT_16 y - define_bool CONFIG_X86_TSC y + define_bool CONFIG_X86_HAS_TSC y define_bool CONFIG_X86_USE_PPRO_CHECKSUM y fi if [ "$CONFIG_MK7" = "y" ]; then define_int CONFIG_X86_L1_CACHE_SHIFT 6 - define_bool CONFIG_X86_TSC y + define_bool CONFIG_X86_HAS_TSC y define_bool CONFIG_X86_GOOD_APIC y define_bool CONFIG_X86_USE_3DNOW y define_bool CONFIG_X86_USE_PPRO_CHECKSUM y @@ -124,14 +124,14 @@ fi if [ "$CONFIG_MCYRIXIII" = "y" ]; then define_int CONFIG_X86_L1_CACHE_SHIFT 5 - define_bool CONFIG_X86_TSC y + define_bool CONFIG_X86_HAS_TSC y define_bool CONFIG_X86_ALIGNMENT_16 y define_bool CONFIG_X86_USE_3DNOW y define_bool CONFIG_X86_USE_PPRO_CHECKSUM y fi if [ "$CONFIG_MCRUSOE" = "y" ]; then define_int CONFIG_X86_L1_CACHE_SHIFT 5 - define_bool CONFIG_X86_TSC y + define_bool CONFIG_X86_HAS_TSC y fi if [ "$CONFIG_MWINCHIPC6" = "y" ]; then define_int CONFIG_X86_L1_CACHE_SHIFT 5 @@ -142,14 +142,14 @@ if [ "$CONFIG_MWINCHIP2" = "y" ]; then define_int CONFIG_X86_L1_CACHE_SHIFT 5 define_bool CONFIG_X86_ALIGNMENT_16 y - define_bool CONFIG_X86_TSC y + define_bool CONFIG_X86_HAS_TSC y define_bool CONFIG_X86_USE_PPRO_CHECKSUM y define_bool CONFIG_X86_OOSTORE y fi if [ "$CONFIG_MWINCHIP3D" = "y" ]; then define_int CONFIG_X86_L1_CACHE_SHIFT 5 define_bool CONFIG_X86_ALIGNMENT_16 y - define_bool CONFIG_X86_TSC y + define_bool CONFIG_X86_HAS_TSC y define_bool CONFIG_X86_USE_PPRO_CHECKSUM y define_bool CONFIG_X86_OOSTORE y fi @@ -173,7 +173,7 @@ #Platform Choices bool 'Multiquad (IBM/Sequent) NUMAQ support' CONFIG_X86_NUMAQ if [ "$CONFIG_X86_NUMAQ" = "y" ]; then - define_bool CONFIG_MULTIQUAD y + define_bool CONFIG_CLUSTERED_APIC y fi # Common NUMA Features if [ "$CONFIG_X86_NUMAQ" = "y" ]; then @@ -183,6 +183,7 @@ define_bool CONFIG_HAVE_ARCH_BOOTMEM_NODE y fi fi + bool 'Cyclone Counter Support' CONFIG_X86_CYCLONE fi fi @@ -224,6 +225,14 @@ define_bool CONFIG_HIGHMEM y fi +if [ "$CONFIG_X86_HAS_TSC" = "y" ]; then + if [ "$CONFIG_X86_NUMAQ" = "y" ]; then + define_bool CONFIG_X86_TSC n + else + define_bool CONFIG_X86_TSC y + fi +fi + if [ "$CONFIG_HIGHMEM64G" = "y" ]; then define_bool CONFIG_HIGHMEM y define_bool CONFIG_X86_PAE y @@ -269,15 +278,26 @@ # Visual Workstation support is utterly broken. # If you want to see it working mail an VW540 to hch@infradead.org 8) #bool 'SGI Visual Workstation support' CONFIG_VISWS + +if [ "$CONFIG_VISWS" != "y" ]; then + bool 'MCA support' CONFIG_MCA +else + define_bool CONFIG_MCA n +fi + +if [ "$CONFIG_MCA" = "y" ]; then + bool ' Support for the NCR Voyager Architecture' CONFIG_VOYAGER + if [ "$CONFIG_VOYAGER" = "y" ]; then + define_bool CONFIG_X86_TSC n + define_bool CONFIG_X86_EXTRA_IRQS y + fi +fi + if [ "$CONFIG_VISWS" = "y" ]; then define_bool CONFIG_X86_VISWS_APIC y define_bool CONFIG_X86_LOCAL_APIC y define_bool CONFIG_PCI y else - if [ "$CONFIG_SMP" = "y" ]; then - define_bool CONFIG_X86_IO_APIC y - define_bool CONFIG_X86_LOCAL_APIC y - fi bool 'PCI support' CONFIG_PCI if [ "$CONFIG_PCI" = "y" ]; then choice ' PCI access mode' \ @@ -297,12 +317,6 @@ bool 'EISA support' CONFIG_EISA -if [ "$CONFIG_VISWS" != "y" ]; then - bool 'MCA support' CONFIG_MCA -else - define_bool CONFIG_MCA n -fi - bool 'Support for hot-pluggable devices' CONFIG_HOTPLUG if [ "$CONFIG_HOTPLUG" = "y" ] ; then @@ -455,20 +469,29 @@ bool ' Load all symbols for debugging/kksymoops' CONFIG_KALLSYMS fi -if [ "$CONFIG_X86_LOCAL_APIC" = "y" ]; then - define_bool CONFIG_X86_EXTRA_IRQS y - define_bool CONFIG_X86_FIND_SMP_CONFIG y - define_bool CONFIG_X86_MPPARSE y -fi - endmenu source security/Config.in source lib/Config.in -if [ "$CONFIG_SMP" = "y" ]; then - define_bool CONFIG_X86_SMP y - define_bool CONFIG_X86_HT y +if [ "$CONFIG_VOYAGER" = "y" ]; then + define_bool CONFIG_X86_EXTRA_IRQS y + define_bool CONFIG_X86_IO_APIC n + define_bool CONFIG_X86_LOCAL_APIC n + define_bool CONFIG_X86_FIND_SMP_CONFIG y +else + if [ "$CONFIG_SMP" = "y" ]; then + define_bool CONFIG_X86_SMP y + define_bool CONFIG_X86_HT y + define_bool CONFIG_X86_IO_APIC y + define_bool CONFIG_X86_LOCAL_APIC y + define_bool CONFIG_X86_MPPARSE y + fi + define_bool CONFIG_X86_BIOS_REBOOT y fi -define_bool CONFIG_X86_BIOS_REBOOT y +if [ "$CONFIG_X86_LOCAL_APIC" = "y" ]; then + define_bool CONFIG_X86_EXTRA_IRQS y + define_bool CONFIG_X86_FIND_SMP_CONFIG y + define_bool CONFIG_X86_MPPARSE y +fi diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/i386/kernel/cpu/cpufreq/longhaul.c linux.2.5.40-ac2/arch/i386/kernel/cpu/cpufreq/longhaul.c --- linux.2.5.40/arch/i386/kernel/cpu/cpufreq/longhaul.c 2002-10-02 21:34:05.000000000 +0100 +++ linux.2.5.40-ac2/arch/i386/kernel/cpu/cpufreq/longhaul.c 2002-10-03 14:47:45.000000000 +0100 @@ -26,6 +26,7 @@ #include #include #include +#include #include #include diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/i386/kernel/head.S linux.2.5.40-ac2/arch/i386/kernel/head.S --- linux.2.5.40/arch/i386/kernel/head.S 2002-10-02 21:34:02.000000000 +0100 +++ linux.2.5.40-ac2/arch/i386/kernel/head.S 2002-10-02 21:41:29.000000000 +0100 @@ -15,6 +15,7 @@ #include #include #include +#include #define OLD_CL_MAGIC_ADDR 0x90020 #define OLD_CL_MAGIC 0xA33F @@ -46,7 +47,7 @@ * Set segments to known values */ cld - movl $(__KERNEL_DS),%eax + movl $(__BOOT_DS),%eax movl %eax,%ds movl %eax,%es movl %eax,%fs @@ -306,7 +307,7 @@ ENTRY(stack_start) .long init_thread_union+8192 - .long __KERNEL_DS + .long __BOOT_DS /* This is the default interrupt "handler" :-) */ int_msg: @@ -349,12 +350,12 @@ .long idt_table # boot GDT descriptor (later on used by CPU#0): - + .word 0 # 32 bit align gdt_desc.address cpu_gdt_descr: .word GDT_ENTRIES*8-1 .long cpu_gdt_table - .fill NR_CPUS-1,6,0 # space for the other GDT descriptors + .fill NR_CPUS-1,8,0 # space for the other GDT descriptors /* * This is initialized to create an identity-mapping at 0-8M (for bootup @@ -405,10 +406,21 @@ */ .data -ALIGN /* * The Global Descriptor Table contains 28 quadwords, per-CPU. */ +#ifdef CONFIG_SMP +/* + * The boot_gdt_table must mirror the equivalent in setup.S and is + * used only by the trampoline for booting other CPUs + */ + .align L1_CACHE_BYTES +ENTRY(boot_gdt_table) + .fill GDT_ENTRY_BOOT_CS,8,0 + .quad 0x00cf9a000000ffff /* kernel 4GB code at 0x00000000 */ + .quad 0x00cf92000000ffff /* kernel 4GB data at 0x00000000 */ +#endif + .align L1_CACHE_BYTES ENTRY(cpu_gdt_table) .quad 0x0000000000000000 /* NULL descriptor */ .quad 0x0000000000000000 /* 0x0b reserved */ diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/i386/kernel/ioport.c linux.2.5.40-ac2/arch/i386/kernel/ioport.c --- linux.2.5.40/arch/i386/kernel/ioport.c 2002-10-02 21:33:41.000000000 +0100 +++ linux.2.5.40-ac2/arch/i386/kernel/ioport.c 2002-10-03 14:04:07.000000000 +0100 @@ -56,6 +56,7 @@ { struct thread_struct * t = ¤t->thread; struct tss_struct * tss; + unsigned long *bitmap = NULL; int ret = 0; if ((from + num <= from) || (from + num > IO_BITMAP_SIZE*32)) @@ -63,15 +64,12 @@ if (turn_on && !capable(CAP_SYS_RAWIO)) return -EPERM; - tss = init_tss + get_cpu(); - /* * If it's the first ioperm() call in this thread's lifetime, set the * IO bitmap up. ioperm() is much less timing critical than clone(), * this is why we delay this operation until now: */ if (!t->ts_io_bitmap) { - unsigned long *bitmap; bitmap = kmalloc(IO_BITMAP_BYTES, GFP_KERNEL); if (!bitmap) { ret = -ENOMEM; @@ -83,20 +81,19 @@ */ memset(bitmap, 0xff, IO_BITMAP_BYTES); t->ts_io_bitmap = bitmap; - /* - * this activates it in the TSS - */ - tss->bitmap = IO_BITMAP_OFFSET; } + tss = init_tss + get_cpu(); + if (bitmap) + tss->bitmap = IO_BITMAP_OFFSET; /* Activate it in the TSS */ + /* * do it in the per-thread copy and in the TSS ... */ set_bitmap(t->ts_io_bitmap, from, num, !turn_on); set_bitmap(tss->io_bitmap, from, num, !turn_on); - -out: put_cpu(); +out: return ret; } diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/i386/kernel/irq.c linux.2.5.40-ac2/arch/i386/kernel/irq.c --- linux.2.5.40/arch/i386/kernel/irq.c 2002-10-02 21:34:05.000000000 +0100 +++ linux.2.5.40-ac2/arch/i386/kernel/irq.c 2002-10-02 21:41:29.000000000 +0100 @@ -167,7 +167,7 @@ if (cpu_online(j)) p += seq_printf(p, "%10u ", nmi_count(j)); seq_putc(p, '\n'); -#if CONFIG_X86_LOCAL_APIC +#ifdef CONFIG_X86_LOCAL_APIC seq_printf(p, "LOC: "); for (j = 0; j < NR_CPUS; j++) if (cpu_online(j)) diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/i386/kernel/Makefile linux.2.5.40-ac2/arch/i386/kernel/Makefile --- linux.2.5.40/arch/i386/kernel/Makefile 2002-10-02 21:33:55.000000000 +0100 +++ linux.2.5.40-ac2/arch/i386/kernel/Makefile 2002-10-03 13:56:30.000000000 +0100 @@ -9,7 +9,7 @@ obj-y := process.o semaphore.o signal.o entry.o traps.o irq.o vm86.o \ ptrace.o i8259.o ioport.o ldt.o setup.o time.o sys_i386.o \ pci-dma.o i386_ksyms.o i387.o bluesmoke.o dmi_scan.o \ - bootflag.o + bootflag.o timer.o timer_tsc.o timer_pit.o obj-y += cpu/ obj-$(CONFIG_X86_BIOS_REBOOT) += reboot.o @@ -26,7 +26,7 @@ obj-$(CONFIG_X86_IO_APIC) += io_apic.o obj-$(CONFIG_SOFTWARE_SUSPEND) += suspend.o obj-$(CONFIG_X86_NUMAQ) += numaq.o - +obj-$(CONFIG_X86_CYCLONE) += timer_cyclone.o EXTRA_AFLAGS := -traditional include $(TOPDIR)/Rules.make diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/i386/kernel/mca.c linux.2.5.40-ac2/arch/i386/kernel/mca.c --- linux.2.5.40/arch/i386/kernel/mca.c 2002-10-02 21:33:55.000000000 +0100 +++ linux.2.5.40-ac2/arch/i386/kernel/mca.c 2002-10-02 21:37:04.000000000 +0100 @@ -106,6 +106,8 @@ /* * Motherboard register spinlock. Untested on SMP at the moment, but * are there any MCA SMP boxes? + * + * Yes - Alan */ static spinlock_t mca_lock = SPIN_LOCK_UNLOCKED; diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/i386/kernel/time.c linux.2.5.40-ac2/arch/i386/kernel/time.c --- linux.2.5.40/arch/i386/kernel/time.c 2002-10-02 21:34:05.000000000 +0100 +++ linux.2.5.40-ac2/arch/i386/kernel/time.c 2002-10-03 13:55:48.000000000 +0100 @@ -53,6 +53,7 @@ #include #include #include +#include #include #include @@ -73,161 +74,15 @@ unsigned long cpu_khz; /* Detected as we calibrate the TSC */ -/* Number of usecs that the last interrupt was delayed */ -static int delay_at_last_interrupt; - -static unsigned long last_tsc_low; /* lsb 32 bits of Time Stamp Counter */ - -/* Cached *multiplier* to convert TSC counts to microseconds. - * (see the equation below). - * Equal to 2^32 * (1 / (clocks per usec) ). - * Initialized in time_init. - */ -unsigned long fast_gettimeoffset_quotient; - extern rwlock_t xtime_lock; extern unsigned long wall_jiffies; spinlock_t rtc_lock = SPIN_LOCK_UNLOCKED; -static inline unsigned long do_fast_gettimeoffset(void) -{ - register unsigned long eax, edx; - - /* Read the Time Stamp Counter */ - - rdtsc(eax,edx); - - /* .. relative to previous jiffy (32 bits is enough) */ - eax -= last_tsc_low; /* tsc_low delta */ - - /* - * Time offset = (tsc_low delta) * fast_gettimeoffset_quotient - * = (tsc_low delta) * (usecs_per_clock) - * = (tsc_low delta) * (usecs_per_jiffy / clocks_per_jiffy) - * - * Using a mull instead of a divl saves up to 31 clock cycles - * in the critical path. - */ - - __asm__("mull %2" - :"=a" (eax), "=d" (edx) - :"rm" (fast_gettimeoffset_quotient), - "0" (eax)); - - /* our adjusted time offset in microseconds */ - return delay_at_last_interrupt + edx; -} - -#define TICK_SIZE (tick_nsec / 1000) - spinlock_t i8253_lock = SPIN_LOCK_UNLOCKED; EXPORT_SYMBOL(i8253_lock); -#ifndef CONFIG_X86_TSC - -/* This function must be called with interrupts disabled - * It was inspired by Steve McCanne's microtime-i386 for BSD. -- jrs - * - * However, the pc-audio speaker driver changes the divisor so that - * it gets interrupted rather more often - it loads 64 into the - * counter rather than 11932! This has an adverse impact on - * do_gettimeoffset() -- it stops working! What is also not - * good is that the interval that our timer function gets called - * is no longer 10.0002 ms, but 9.9767 ms. To get around this - * would require using a different timing source. Maybe someone - * could use the RTC - I know that this can interrupt at frequencies - * ranging from 8192Hz to 2Hz. If I had the energy, I'd somehow fix - * it so that at startup, the timer code in sched.c would select - * using either the RTC or the 8253 timer. The decision would be - * based on whether there was any other device around that needed - * to trample on the 8253. I'd set up the RTC to interrupt at 1024 Hz, - * and then do some jiggery to have a version of do_timer that - * advanced the clock by 1/1024 s. Every time that reached over 1/100 - * of a second, then do all the old code. If the time was kept correct - * then do_gettimeoffset could just return 0 - there is no low order - * divider that can be accessed. - * - * Ideally, you would be able to use the RTC for the speaker driver, - * but it appears that the speaker driver really needs interrupt more - * often than every 120 us or so. - * - * Anyway, this needs more thought.... pjsg (1993-08-28) - * - * If you are really that interested, you should be reading - * comp.protocols.time.ntp! - */ - -static unsigned long do_slow_gettimeoffset(void) -{ - int count; - - static int count_p = LATCH; /* for the first call after boot */ - static unsigned long jiffies_p = 0; - - /* - * cache volatile jiffies temporarily; we have IRQs turned off. - */ - unsigned long jiffies_t; - - /* gets recalled with irq locally disabled */ - spin_lock(&i8253_lock); - /* timer count may underflow right here */ - outb_p(0x00, 0x43); /* latch the count ASAP */ - - count = inb_p(0x40); /* read the latched count */ - - /* - * We do this guaranteed double memory access instead of a _p - * postfix in the previous port access. Wheee, hackady hack - */ - jiffies_t = jiffies; - - count |= inb_p(0x40) << 8; - - /* VIA686a test code... reset the latch if count > max + 1 */ - if (count > LATCH) { - outb_p(0x34, 0x43); - outb_p(LATCH & 0xff, 0x40); - outb(LATCH >> 8, 0x40); - count = LATCH - 1; - } - - spin_unlock(&i8253_lock); - - /* - * avoiding timer inconsistencies (they are rare, but they happen)... - * there are two kinds of problems that must be avoided here: - * 1. the timer counter underflows - * 2. hardware problem with the timer, not giving us continuous time, - * the counter does small "jumps" upwards on some Pentium systems, - * (see c't 95/10 page 335 for Neptun bug.) - */ - - - if( jiffies_t == jiffies_p ) { - if( count > count_p ) { - /* the nutcase */ - count = do_timer_overflow(count); - } - } else - jiffies_p = jiffies_t; - - count_p = count; - - count = ((LATCH-1) - count) * TICK_SIZE; - count = (count + LATCH/2) / LATCH; - - return count; -} - -static unsigned long (*do_gettimeoffset)(void) = do_slow_gettimeoffset; - -#else - -#define do_gettimeoffset() do_fast_gettimeoffset() - -#endif +struct timer_opts* timer; /* * This version of gettimeofday has microsecond resolution @@ -239,7 +94,7 @@ unsigned long usec, sec; read_lock_irqsave(&xtime_lock, flags); - usec = do_gettimeoffset(); + usec = timer->get_offset(); { unsigned long lost = jiffies - wall_jiffies; if (lost) @@ -267,7 +122,7 @@ * wall time. Discover what correction gettimeofday() would have * made, and then undo it! */ - tv->tv_usec -= do_gettimeoffset(); + tv->tv_usec -= timer->get_offset(); tv->tv_usec -= (jiffies - wall_jiffies) * (1000000 / HZ); while (tv->tv_usec < 0) { @@ -433,34 +288,7 @@ */ write_lock(&xtime_lock); - if (use_tsc) - { - /* - * It is important that these two operations happen almost at - * the same time. We do the RDTSC stuff first, since it's - * faster. To avoid any inconsistencies, we need interrupts - * disabled locally. - */ - - /* - * Interrupts are just disabled locally since the timer irq - * has the SA_INTERRUPT flag set. -arca - */ - - /* read Pentium cycle counter */ - - rdtscl(last_tsc_low); - - spin_lock(&i8253_lock); - outb_p(0x00, 0x43); /* latch the count ASAP */ - - count = inb_p(0x40); /* read the latched count */ - count |= inb(0x40) << 8; - spin_unlock(&i8253_lock); - - count = ((LATCH-1) - count) * TICK_SIZE; - delay_at_last_interrupt = (count + LATCH/2) / LATCH; - } + timer->mark_offset(); do_timer_interrupt(irq, NULL, regs); @@ -510,85 +338,7 @@ return mktime(year, mon, day, hour, min, sec); } -/* ------ Calibrate the TSC ------- - * Return 2^32 * (1 / (TSC clocks per usec)) for do_fast_gettimeoffset(). - * Too much 64-bit arithmetic here to do this cleanly in C, and for - * accuracy's sake we want to keep the overhead on the CTC speaker (channel 2) - * output busy loop as low as possible. We avoid reading the CTC registers - * directly because of the awkward 8-bit access mechanism of the 82C54 - * device. - */ - -#define CALIBRATE_LATCH (5 * LATCH) -#define CALIBRATE_TIME (5 * 1000020/HZ) - -#ifdef CONFIG_X86_TSC -static unsigned long __init calibrate_tsc(void) -{ - /* Set the Gate high, disable speaker */ - outb((inb(0x61) & ~0x02) | 0x01, 0x61); - - /* - * Now let's take care of CTC channel 2 - * - * Set the Gate high, program CTC channel 2 for mode 0, - * (interrupt on terminal count mode), binary count, - * load 5 * LATCH count, (LSB and MSB) to begin countdown. - */ - outb(0xb0, 0x43); /* binary, mode 0, LSB/MSB, Ch 2 */ - outb(CALIBRATE_LATCH & 0xff, 0x42); /* LSB of count */ - outb(CALIBRATE_LATCH >> 8, 0x42); /* MSB of count */ - - { - unsigned long startlow, starthigh; - unsigned long endlow, endhigh; - unsigned long count; - - rdtsc(startlow,starthigh); - count = 0; - do { - count++; - } while ((inb(0x61) & 0x20) == 0); - rdtsc(endlow,endhigh); - - last_tsc_low = endlow; - - /* Error: ECTCNEVERSET */ - if (count <= 1) - goto bad_ctc; - - /* 64-bit subtract - gcc just messes up with long longs */ - __asm__("subl %2,%0\n\t" - "sbbl %3,%1" - :"=a" (endlow), "=d" (endhigh) - :"g" (startlow), "g" (starthigh), - "0" (endlow), "1" (endhigh)); - - /* Error: ECPUTOOFAST */ - if (endhigh) - goto bad_ctc; - - /* Error: ECPUTOOSLOW */ - if (endlow <= CALIBRATE_TIME) - goto bad_ctc; - - __asm__("divl %2" - :"=a" (endlow), "=d" (endhigh) - :"r" (endlow), "0" (0), "1" (CALIBRATE_TIME)); - - return endlow; - } - - /* - * The CTC wasn't reliable: we got a hit on the very first read, - * or the CPU was so fast/slow that the quotient wouldn't fit in - * 32 bits.. - */ -bad_ctc: - return 0; -} -#endif /* CONFIG_X86_TSC */ - +/* XXX this driverfs stuff should probably go elsewhere later -john */ static struct sys_device device_i8253 = { .name = "rtc", .id = 0, @@ -605,119 +355,13 @@ device_initcall(time_init_device); -#ifdef CONFIG_CPU_FREQ - -static int -time_cpufreq_notifier(struct notifier_block *nb, unsigned long val, - void *data) -{ - struct cpufreq_freqs *freq = data; - unsigned int i; - - if (!cpu_has_tsc) - return 0; - - switch (val) { - case CPUFREQ_PRECHANGE: - if ((freq->old < freq->new) && - ((freq->cpu == CPUFREQ_ALL_CPUS) || (freq->cpu == 0))) { - cpu_khz = cpufreq_scale(cpu_khz, freq->old, freq->new); - fast_gettimeoffset_quotient = cpufreq_scale(fast_gettimeoffset_quotient, freq->new, freq->old); - } - for (i=0; icpu == CPUFREQ_ALL_CPUS) || (freq->cpu == i)) - cpu_data[i].loops_per_jiffy = cpufreq_scale(cpu_data[i].loops_per_jiffy, freq->old, freq->new); - break; - - case CPUFREQ_POSTCHANGE: - if ((freq->new < freq->old) && - ((freq->cpu == CPUFREQ_ALL_CPUS) || (freq->cpu == 0))) { - cpu_khz = cpufreq_scale(cpu_khz, freq->old, freq->new); - fast_gettimeoffset_quotient = cpufreq_scale(fast_gettimeoffset_quotient, freq->new, freq->old); - } - for (i=0; icpu == CPUFREQ_ALL_CPUS) || (freq->cpu == i)) - cpu_data[i].loops_per_jiffy = cpufreq_scale(cpu_data[i].loops_per_jiffy, freq->old, freq->new); - break; - } - - return 0; -} - -static struct notifier_block time_cpufreq_notifier_block = { - notifier_call: time_cpufreq_notifier -}; -#endif - - void __init time_init(void) { -#ifdef CONFIG_X86_TSC - extern int x86_udelay_tsc; -#endif xtime.tv_sec = get_cmos_time(); xtime.tv_nsec = 0; -/* - * If we have APM enabled or the CPU clock speed is variable - * (CPU stops clock on HLT or slows clock to save power) - * then the TSC timestamps may diverge by up to 1 jiffy from - * 'real time' but nothing will break. - * The most frequent case is that the CPU is "woken" from a halt - * state by the timer interrupt itself, so we get 0 error. In the - * rare cases where a driver would "wake" the CPU and request a - * timestamp, the maximum error is < 1 jiffy. But timestamps are - * still perfectly ordered. - * Note that the TSC counter will be reset if APM suspends - * to disk; this won't break the kernel, though, 'cuz we're - * smart. See arch/i386/kernel/apm.c. - */ -#ifdef CONFIG_X86_TSC - /* - * Firstly we have to do a CPU check for chips with - * a potentially buggy TSC. At this point we haven't run - * the ident/bugs checks so we must run this hook as it - * may turn off the TSC flag. - * - * NOTE: this doesnt yet handle SMP 486 machines where only - * some CPU's have a TSC. Thats never worked and nobody has - * moaned if you have the only one in the world - you fix it! - */ - - dodgy_tsc(); - - if (cpu_has_tsc) { - unsigned long tsc_quotient = calibrate_tsc(); - if (tsc_quotient) { - fast_gettimeoffset_quotient = tsc_quotient; - use_tsc = 1; - /* - * We could be more selective here I suspect - * and just enable this for the next intel chips ? - */ - x86_udelay_tsc = 1; -#ifndef do_gettimeoffset - do_gettimeoffset = do_fast_gettimeoffset; -#endif - - /* report CPU clock rate in Hz. - * The formula is (10^6 * 2^32) / (2^32 * 1 / (clocks/us)) = - * clock/second. Our precision is about 100 ppm. - */ - { unsigned long eax=0, edx=1000; - __asm__("divl %2" - :"=a" (cpu_khz), "=d" (edx) - :"r" (tsc_quotient), - "0" (eax), "1" (edx)); - printk("Detected %lu.%03lu MHz processor.\n", cpu_khz / 1000, cpu_khz % 1000); - } -#ifdef CONFIG_CPU_FREQ - cpufreq_register_notifier(&time_cpufreq_notifier_block, CPUFREQ_TRANSITION_NOTIFIER); -#endif - } - } -#endif /* CONFIG_X86_TSC */ + timer = select_timer(); time_init_hook(); } diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/i386/kernel/timer.c linux.2.5.40-ac2/arch/i386/kernel/timer.c --- linux.2.5.40/arch/i386/kernel/timer.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/i386/kernel/timer.c 2002-10-03 13:56:30.000000000 +0100 @@ -0,0 +1,38 @@ +#include +#include + +/* list of externed timers */ +#ifdef CONFIG_X86_CYCLONE +extern struct timer_opts timer_cyclone; +#endif +#ifndef CONFIG_X86_TSC +extern struct timer_opts timer_pit; +#endif +extern struct timer_opts timer_tsc; + +/* list of timers, ordered by preference */ +struct timer_opts* timers[] = { +#ifdef CONFIG_X86_CYCLONE + &timer_cyclone, +#endif + &timer_tsc +#ifndef CONFIG_X86_TSC + ,&timer_pit +#endif +}; + +#define NR_TIMERS (sizeof(timers)/sizeof(timers[0])) + +/* iterates through the list of timers, returning the first + * one that initializes successfully. + */ +struct timer_opts* select_timer(void) +{ + int i; + /* find most preferred working timer */ + for(i=0; i < NR_TIMERS; i++) + if(timers[i]->init()) + return timers[i]; + panic("select_timer: Cannot find a suitable timer\n"); + return 0; +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/i386/kernel/timer_cyclone.c linux.2.5.40-ac2/arch/i386/kernel/timer_cyclone.c --- linux.2.5.40/arch/i386/kernel/timer_cyclone.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/i386/kernel/timer_cyclone.c 2002-10-03 13:56:30.000000000 +0100 @@ -0,0 +1,177 @@ +/* Cyclone-timer: + * This code implements timer_ops for the cyclone counter found + * on IBM x440, x360, and other Summit based systems. + * + * Copyright (C) 2002 IBM, John Stultz (johnstul@us.ibm.com) + */ + + +#include +#include +#include + +#include +#include +#include +#include +/* fwd declarations */ +int init_cyclone(void); +void mark_offset_cyclone(void); +unsigned long get_offset_cyclone(void); + +/* cyclone timer_opts struct */ +struct timer_opts timer_cyclone = { + init: init_cyclone, + mark_offset: mark_offset_cyclone, + get_offset: get_offset_cyclone +}; +/************************************************************/ +extern spinlock_t i8253_lock; + +/* Number of usecs that the last interrupt was delayed */ +static int delay_at_last_interrupt; + +#define CYCLONE_CBAR_ADDR 0xFEB00CD0 +#define CYCLONE_PMCC_OFFSET 0x51A0 +#define CYCLONE_MPMC_OFFSET 0x51D0 +#define CYCLONE_MPCS_OFFSET 0x51A8 +#define CYCLONE_TIMER_FREQ 100000000 + +int use_cyclone = 0; + +static u32* volatile cyclone_timer; /* Cyclone MPMC0 register */ +static u32 last_cyclone_timer; + +void mark_offset_cyclone(void) +{ + int count; + spin_lock(&i8253_lock); + /* quickly read the cyclone timer */ + if(cyclone_timer) + last_cyclone_timer = cyclone_timer[0]; + + /* calculate delay_at_last_interrupt */ + outb_p(0x00, 0x43); /* latch the count ASAP */ + + count = inb_p(0x40); /* read the latched count */ + count |= inb(0x40) << 8; + spin_unlock(&i8253_lock); + + count = ((LATCH-1) - count) * TICK_SIZE; + delay_at_last_interrupt = (count + LATCH/2) / LATCH; +} + +unsigned long get_offset_cyclone(void) +{ + u32 offset; + + if(!cyclone_timer) + return delay_at_last_interrupt; + + /* Read the cyclone timer */ + offset = cyclone_timer[0]; + + /* .. relative to previous jiffy */ + offset = offset - last_cyclone_timer; + + /* convert cyclone ticks to microseconds */ + /* XXX slow, can we speed this up? */ + offset = offset/(CYCLONE_TIMER_FREQ/1000000); + + /* our adjusted time offset in microseconds */ + return delay_at_last_interrupt + offset; +} + +int init_cyclone(void) +{ + u32* reg; + u32 base; /* saved cyclone base address */ + u32 pageaddr; /* page that contains cyclone_timer register */ + u32 offset; /* offset from pageaddr to cyclone_timer register */ + int i; + + /*make sure we're on a summit box*/ + /*XXX need to use proper summit hooks! such as xapic -john*/ + if(!use_cyclone) return 0; + + printk(KERN_INFO "Summit chipset: Starting Cyclone Counter.\n"); + + /* find base address */ + pageaddr = (CYCLONE_CBAR_ADDR)&PAGE_MASK; + offset = (CYCLONE_CBAR_ADDR)&(~PAGE_MASK); + set_fixmap_nocache(FIX_CYCLONE_TIMER, pageaddr); + reg = (u32*)(fix_to_virt(FIX_CYCLONE_TIMER) + offset); + if(!reg){ + printk(KERN_ERR "Summit chipset: Could not find valid CBAR register.\n"); + return 0; + } + base = *reg; + if(!base){ + printk(KERN_ERR "Summit chipset: Could not find valid CBAR value.\n"); + return 0; + } + + /* setup PMCC */ + pageaddr = (base + CYCLONE_PMCC_OFFSET)&PAGE_MASK; + offset = (base + CYCLONE_PMCC_OFFSET)&(~PAGE_MASK); + set_fixmap_nocache(FIX_CYCLONE_TIMER, pageaddr); + reg = (u32*)(fix_to_virt(FIX_CYCLONE_TIMER) + offset); + if(!reg){ + printk(KERN_ERR "Summit chipset: Could not find valid PMCC register.\n"); + return 0; + } + reg[0] = 0x00000001; + + /* setup MPCS */ + pageaddr = (base + CYCLONE_MPCS_OFFSET)&PAGE_MASK; + offset = (base + CYCLONE_MPCS_OFFSET)&(~PAGE_MASK); + set_fixmap_nocache(FIX_CYCLONE_TIMER, pageaddr); + reg = (u32*)(fix_to_virt(FIX_CYCLONE_TIMER) + offset); + if(!reg){ + printk(KERN_ERR "Summit chipset: Could not find valid MPCS register.\n"); + return 0; + } + reg[0] = 0x00000001; + + /* map in cyclone_timer */ + pageaddr = (base + CYCLONE_MPMC_OFFSET)&PAGE_MASK; + offset = (base + CYCLONE_MPMC_OFFSET)&(~PAGE_MASK); + set_fixmap_nocache(FIX_CYCLONE_TIMER, pageaddr); + cyclone_timer = (u32*)(fix_to_virt(FIX_CYCLONE_TIMER) + offset); + if(!cyclone_timer){ + printk(KERN_ERR "Summit chipset: Could not find valid MPMC register.\n"); + return 0; + } + + /*quick test to make sure its ticking*/ + for(i=0; i<3; i++){ + u32 old = cyclone_timer[0]; + int stall = 100; + while(stall--) barrier(); + if(cyclone_timer[0] == old){ + printk(KERN_ERR "Summit chipset: Counter not counting! DISABLED\n"); + cyclone_timer = 0; + return 0; + } + } + + /* Everything looks good! */ + return 1; +} + + +#if 0 /* XXX future work */ +void delay_cyclone(unsigned long loops) +{ + unsigned long bclock, now; + if(!cyclone_timer) + return; + bclock = cyclone_timer[0]; + do { + rep_nop(); + now = cyclone_timer[0]; + } while ((now-bclock) < loops); +} +#endif + + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/i386/kernel/timer_pit.c linux.2.5.40-ac2/arch/i386/kernel/timer_pit.c --- linux.2.5.40/arch/i386/kernel/timer_pit.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/i386/kernel/timer_pit.c 2002-10-03 13:55:48.000000000 +0100 @@ -0,0 +1,133 @@ +/* + * This code largely moved from arch/i386/kernel/time.c. + * See comments there for proper credits. + */ + +#include +#include +#include +#include +#include + +/* fwd declarations */ +int init_pit(void); +void mark_offset_pit(void); +unsigned long get_offset_pit(void); + +/* tsc timer_opts struct */ +struct timer_opts timer_pit = { + init: init_pit, + mark_offset: mark_offset_pit, + get_offset: get_offset_pit +}; + + +extern spinlock_t i8259A_lock; +extern spinlock_t i8253_lock; +#include "do_timer.h" + +int init_pit(void) +{ + return 1; +} + +void mark_offset_pit(void) +{ + /* nothing needed */ +} + + +/* This function must be called with interrupts disabled + * It was inspired by Steve McCanne's microtime-i386 for BSD. -- jrs + * + * However, the pc-audio speaker driver changes the divisor so that + * it gets interrupted rather more often - it loads 64 into the + * counter rather than 11932! This has an adverse impact on + * do_gettimeoffset() -- it stops working! What is also not + * good is that the interval that our timer function gets called + * is no longer 10.0002 ms, but 9.9767 ms. To get around this + * would require using a different timing source. Maybe someone + * could use the RTC - I know that this can interrupt at frequencies + * ranging from 8192Hz to 2Hz. If I had the energy, I'd somehow fix + * it so that at startup, the timer code in sched.c would select + * using either the RTC or the 8253 timer. The decision would be + * based on whether there was any other device around that needed + * to trample on the 8253. I'd set up the RTC to interrupt at 1024 Hz, + * and then do some jiggery to have a version of do_timer that + * advanced the clock by 1/1024 s. Every time that reached over 1/100 + * of a second, then do all the old code. If the time was kept correct + * then do_gettimeoffset could just return 0 - there is no low order + * divider that can be accessed. + * + * Ideally, you would be able to use the RTC for the speaker driver, + * but it appears that the speaker driver really needs interrupt more + * often than every 120 us or so. + * + * Anyway, this needs more thought.... pjsg (1993-08-28) + * + * If you are really that interested, you should be reading + * comp.protocols.time.ntp! + */ + +unsigned long get_offset_pit(void) +{ + int count; + + static int count_p = LATCH; /* for the first call after boot */ + static unsigned long jiffies_p = 0; + + /* + * cache volatile jiffies temporarily; we have IRQs turned off. + */ + unsigned long jiffies_t; + + /* gets recalled with irq locally disabled */ + spin_lock(&i8253_lock); + /* timer count may underflow right here */ + outb_p(0x00, 0x43); /* latch the count ASAP */ + + count = inb_p(0x40); /* read the latched count */ + + /* + * We do this guaranteed double memory access instead of a _p + * postfix in the previous port access. Wheee, hackady hack + */ + jiffies_t = jiffies; + + count |= inb_p(0x40) << 8; + + /* VIA686a test code... reset the latch if count > max + 1 */ + if (count > LATCH) { + outb_p(0x34, 0x43); + outb_p(LATCH & 0xff, 0x40); + outb(LATCH >> 8, 0x40); + count = LATCH - 1; + } + + spin_unlock(&i8253_lock); + + /* + * avoiding timer inconsistencies (they are rare, but they happen)... + * there are two kinds of problems that must be avoided here: + * 1. the timer counter underflows + * 2. hardware problem with the timer, not giving us continuous time, + * the counter does small "jumps" upwards on some Pentium systems, + * (see c't 95/10 page 335 for Neptun bug.) + */ + + + if( jiffies_t == jiffies_p ) { + if( count > count_p ) { + /* the nutcase */ + count = do_timer_overflow(count); + } + } else + jiffies_p = jiffies_t; + + count_p = count; + + count = ((LATCH-1) - count) * TICK_SIZE; + count = (count + LATCH/2) / LATCH; + + return count; +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/i386/kernel/timer_tsc.c linux.2.5.40-ac2/arch/i386/kernel/timer_tsc.c --- linux.2.5.40/arch/i386/kernel/timer_tsc.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/i386/kernel/timer_tsc.c 2002-10-03 14:26:14.000000000 +0100 @@ -0,0 +1,285 @@ +/* + * This code largely moved from arch/i386/kernel/time.c. + * See comments there for proper credits. + */ + +#include +#include +#include +#include + +#include +#include + +/* fwd declarations */ +int init_tsc(void); +void mark_offset_tsc(void); +unsigned long get_offset_tsc(void); + +/* tsc timer_opts struct */ +struct timer_opts timer_tsc = { + init: init_tsc, + mark_offset: mark_offset_tsc, + get_offset: get_offset_tsc +}; + + +/************************************************************/ +extern int x86_udelay_tsc; +extern spinlock_t i8253_lock; + +static int use_tsc; +/* Number of usecs that the last interrupt was delayed */ +static int delay_at_last_interrupt; + +static unsigned long last_tsc_low; /* lsb 32 bits of Time Stamp Counter */ + +/* Cached *multiplier* to convert TSC counts to microseconds. + * (see the equation below). + * Equal to 2^32 * (1 / (clocks per usec) ). + * Initialized in time_init. + */ +unsigned long fast_gettimeoffset_quotient; + +unsigned long get_offset_tsc(void) +{ + register unsigned long eax, edx; + + /* Read the Time Stamp Counter */ + + rdtsc(eax,edx); + + /* .. relative to previous jiffy (32 bits is enough) */ + eax -= last_tsc_low; /* tsc_low delta */ + + /* + * Time offset = (tsc_low delta) * fast_gettimeoffset_quotient + * = (tsc_low delta) * (usecs_per_clock) + * = (tsc_low delta) * (usecs_per_jiffy / clocks_per_jiffy) + * + * Using a mull instead of a divl saves up to 31 clock cycles + * in the critical path. + */ + + __asm__("mull %2" + :"=a" (eax), "=d" (edx) + :"rm" (fast_gettimeoffset_quotient), + "0" (eax)); + + /* our adjusted time offset in microseconds */ + return delay_at_last_interrupt + edx; +} + +void mark_offset_tsc(void) +{ + int count; + /* + * It is important that these two operations happen almost at + * the same time. We do the RDTSC stuff first, since it's + * faster. To avoid any inconsistencies, we need interrupts + * disabled locally. + */ + + /* + * Interrupts are just disabled locally since the timer irq + * has the SA_INTERRUPT flag set. -arca + */ + + /* read Pentium cycle counter */ + + rdtscl(last_tsc_low); + + spin_lock(&i8253_lock); + outb_p(0x00, 0x43); /* latch the count ASAP */ + + count = inb_p(0x40); /* read the latched count */ + count |= inb(0x40) << 8; + spin_unlock(&i8253_lock); + + count = ((LATCH-1) - count) * TICK_SIZE; + delay_at_last_interrupt = (count + LATCH/2) / LATCH; +} + + +/* ------ Calibrate the TSC ------- + * Return 2^32 * (1 / (TSC clocks per usec)) for do_fast_gettimeoffset(). + * Too much 64-bit arithmetic here to do this cleanly in C, and for + * accuracy's sake we want to keep the overhead on the CTC speaker (channel 2) + * output busy loop as low as possible. We avoid reading the CTC registers + * directly because of the awkward 8-bit access mechanism of the 82C54 + * device. + */ + +#define CALIBRATE_LATCH (5 * LATCH) +#define CALIBRATE_TIME (5 * 1000020/HZ) + +static unsigned long __init calibrate_tsc(void) +{ + /* Set the Gate high, disable speaker */ + outb((inb(0x61) & ~0x02) | 0x01, 0x61); + + /* + * Now let's take care of CTC channel 2 + * + * Set the Gate high, program CTC channel 2 for mode 0, + * (interrupt on terminal count mode), binary count, + * load 5 * LATCH count, (LSB and MSB) to begin countdown. + */ + outb(0xb0, 0x43); /* binary, mode 0, LSB/MSB, Ch 2 */ + outb(CALIBRATE_LATCH & 0xff, 0x42); /* LSB of count */ + outb(CALIBRATE_LATCH >> 8, 0x42); /* MSB of count */ + + { + unsigned long startlow, starthigh; + unsigned long endlow, endhigh; + unsigned long count; + + rdtsc(startlow,starthigh); + count = 0; + do { + count++; + } while ((inb(0x61) & 0x20) == 0); + rdtsc(endlow,endhigh); + + last_tsc_low = endlow; + + /* Error: ECTCNEVERSET */ + if (count <= 1) + goto bad_ctc; + + /* 64-bit subtract - gcc just messes up with long longs */ + __asm__("subl %2,%0\n\t" + "sbbl %3,%1" + :"=a" (endlow), "=d" (endhigh) + :"g" (startlow), "g" (starthigh), + "0" (endlow), "1" (endhigh)); + + /* Error: ECPUTOOFAST */ + if (endhigh) + goto bad_ctc; + + /* Error: ECPUTOOSLOW */ + if (endlow <= CALIBRATE_TIME) + goto bad_ctc; + + __asm__("divl %2" + :"=a" (endlow), "=d" (endhigh) + :"r" (endlow), "0" (0), "1" (CALIBRATE_TIME)); + + return endlow; + } + + /* + * The CTC wasn't reliable: we got a hit on the very first read, + * or the CPU was so fast/slow that the quotient wouldn't fit in + * 32 bits.. + */ +bad_ctc: + return 0; +} + + +#ifdef CONFIG_CPU_FREQ + +static int +time_cpufreq_notifier(struct notifier_block *nb, unsigned long val, + void *data) +{ + struct cpufreq_freqs *freq = data; + unsigned int i; + + if (!cpu_has_tsc) + return 0; + + switch (val) { + case CPUFREQ_PRECHANGE: + if ((freq->old < freq->new) && + ((freq->cpu == CPUFREQ_ALL_CPUS) || (freq->cpu == 0))) { + cpu_khz = cpufreq_scale(cpu_khz, freq->old, freq->new); + fast_gettimeoffset_quotient = cpufreq_scale(fast_gettimeoffset_quotient, freq->new, freq->old); + } + for (i=0; icpu == CPUFREQ_ALL_CPUS) || (freq->cpu == i)) + cpu_data[i].loops_per_jiffy = cpufreq_scale(cpu_data[i].loops_per_jiffy, freq->old, freq->new); + break; + + case CPUFREQ_POSTCHANGE: + if ((freq->new < freq->old) && + ((freq->cpu == CPUFREQ_ALL_CPUS) || (freq->cpu == 0))) { + cpu_khz = cpufreq_scale(cpu_khz, freq->old, freq->new); + fast_gettimeoffset_quotient = cpufreq_scale(fast_gettimeoffset_quotient, freq->new, freq->old); + } + for (i=0; icpu == CPUFREQ_ALL_CPUS) || (freq->cpu == i)) + cpu_data[i].loops_per_jiffy = cpufreq_scale(cpu_data[i].loops_per_jiffy, freq->old, freq->new); + break; + } + + return 0; +} + +static struct notifier_block time_cpufreq_notifier_block = { + notifier_call: time_cpufreq_notifier +}; +#endif + + +int init_tsc(void) +{ + /* + * If we have APM enabled or the CPU clock speed is variable + * (CPU stops clock on HLT or slows clock to save power) + * then the TSC timestamps may diverge by up to 1 jiffy from + * 'real time' but nothing will break. + * The most frequent case is that the CPU is "woken" from a halt + * state by the timer interrupt itself, so we get 0 error. In the + * rare cases where a driver would "wake" the CPU and request a + * timestamp, the maximum error is < 1 jiffy. But timestamps are + * still perfectly ordered. + * Note that the TSC counter will be reset if APM suspends + * to disk; this won't break the kernel, though, 'cuz we're + * smart. See arch/i386/kernel/apm.c. + */ + /* + * Firstly we have to do a CPU check for chips with + * a potentially buggy TSC. At this point we haven't run + * the ident/bugs checks so we must run this hook as it + * may turn off the TSC flag. + * + * NOTE: this doesnt yet handle SMP 486 machines where only + * some CPU's have a TSC. Thats never worked and nobody has + * moaned if you have the only one in the world - you fix it! + */ + + dodgy_tsc(); + + if (cpu_has_tsc) { + unsigned long tsc_quotient = calibrate_tsc(); + if (tsc_quotient) { + fast_gettimeoffset_quotient = tsc_quotient; + use_tsc = 1; + /* + * We could be more selective here I suspect + * and just enable this for the next intel chips ? + */ + x86_udelay_tsc = 1; + + /* report CPU clock rate in Hz. + * The formula is (10^6 * 2^32) / (2^32 * 1 / (clocks/us)) = + * clock/second. Our precision is about 100 ppm. + */ + { unsigned long eax=0, edx=1000; + __asm__("divl %2" + :"=a" (cpu_khz), "=d" (edx) + :"r" (tsc_quotient), + "0" (eax), "1" (edx)); + printk("Detected %lu.%03lu MHz processor.\n", cpu_khz / 1000, cpu_khz % 1000); + } +#ifdef CONFIG_CPU_FREQ + cpufreq_register_notifier(&time_cpufreq_notifier_block, CPUFREQ_TRANSITION_NOTIFIER); +#endif + return 1; + } + } + return 0; +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/i386/kernel/trampoline.S linux.2.5.40-ac2/arch/i386/kernel/trampoline.S --- linux.2.5.40/arch/i386/kernel/trampoline.S 2002-10-02 21:33:16.000000000 +0100 +++ linux.2.5.40-ac2/arch/i386/kernel/trampoline.S 2002-10-03 13:54:01.000000000 +0100 @@ -36,9 +36,7 @@ ENTRY(trampoline_data) r_base = . -#ifdef CONFIG_MULTIQUAD wbinvd -#endif /* CONFIG_MULTIQUAD */ mov %cs, %ax # Code and data in the same place mov %ax, %ds @@ -56,7 +54,7 @@ lmsw %ax # into protected mode jmp flush_instr flush_instr: - ljmpl $__KERNEL_CS, $0x00100000 + ljmpl $__BOOT_CS, $0x00100000 # jump to startup_32 in arch/i386/kernel/head.S idt_48: @@ -69,8 +67,8 @@ # gdt_48: - .word 0x0800 # gdt limit = 2048, 256 GDT entries - .long cpu_gdt_table-__PAGE_OFFSET # gdt base = gdt (first SMP CPU) + .word __BOOT_DS + 7 # gdt limit + .long boot_gdt_table-__PAGE_OFFSET # gdt base = gdt (first SMP CPU) .globl trampoline_end trampoline_end: diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/i386/mach-voyager/do_timer.h linux.2.5.40-ac2/arch/i386/mach-voyager/do_timer.h --- linux.2.5.40/arch/i386/mach-voyager/do_timer.h 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/i386/mach-voyager/do_timer.h 2002-10-02 21:41:29.000000000 +0100 @@ -0,0 +1,22 @@ +/* defines for inline arch setup functions */ +#include + +static inline void do_timer_interrupt_hook(struct pt_regs *regs) +{ + do_timer(regs); + + voyager_timer_interrupt(regs); +} + +static inline int do_timer_overflow(int count) +{ + /* can't read the ISR, just assume 1 tick + overflow */ + if(count > LATCH || count < 0) { + printk(KERN_ERR "VOYAGER PROBLEM: count is %d, latch is %d\n", count, LATCH); + count = LATCH; + } + count -= LATCH; + + return count; +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/i386/mach-voyager/entry_arch.h linux.2.5.40-ac2/arch/i386/mach-voyager/entry_arch.h --- linux.2.5.40/arch/i386/mach-voyager/entry_arch.h 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/i386/mach-voyager/entry_arch.h 2002-10-02 21:41:29.000000000 +0100 @@ -0,0 +1,26 @@ +/* -*- mode: c; c-basic-offset: 8 -*- */ + +/* Copyright (C) 2002 + * + * Author: James.Bottomley@HansenPartnership.com + * + * linux/arch/i386/voyager/entry_arch.h + * + * This file builds the VIC and QIC CPI gates + */ + +/* initialise the voyager interrupt gates + * + * This uses the macros in irq.h to set up assembly jump gates. The + * calls are then redirected to the same routine with smp_ prefixed */ +BUILD_INTERRUPT(vic_sys_interrupt, VIC_SYS_INT) +BUILD_INTERRUPT(vic_cmn_interrupt, VIC_CMN_INT) +BUILD_INTERRUPT(vic_cpi_interrupt, VIC_CPI_LEVEL0); + +/* do all the QIC interrupts */ +BUILD_INTERRUPT(qic_timer_interrupt, QIC_TIMER_CPI); +BUILD_INTERRUPT(qic_invalidate_interrupt, QIC_INVALIDATE_CPI); +BUILD_INTERRUPT(qic_reschedule_interrupt, QIC_RESCHEDULE_CPI); +BUILD_INTERRUPT(qic_enable_irq_interrupt, QIC_ENABLE_IRQ_CPI); +BUILD_INTERRUPT(qic_call_function_interrupt, QIC_CALL_FUNCTION_CPI); + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/i386/mach-voyager/irq_vectors.h linux.2.5.40-ac2/arch/i386/mach-voyager/irq_vectors.h --- linux.2.5.40/arch/i386/mach-voyager/irq_vectors.h 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/i386/mach-voyager/irq_vectors.h 2002-10-02 21:41:29.000000000 +0100 @@ -0,0 +1,71 @@ +/* -*- mode: c; c-basic-offset: 8 -*- */ + +/* Copyright (C) 2002 + * + * Author: James.Bottomley@HansenPartnership.com + * + * linux/arch/i386/voyager/irq_vectors.h + * + * This file provides definitions for the VIC and QIC CPIs + */ + +#ifndef _ASM_IRQ_VECTORS_H +#define _ASM_IRQ_VECTORS_H + +/* + * IDT vectors usable for external interrupt sources start + * at 0x20: + */ +#define FIRST_EXTERNAL_VECTOR 0x20 + +#define SYSCALL_VECTOR 0x80 + +/* + * Vectors 0x20-0x2f are used for ISA interrupts. + */ + +/* These define the CPIs we use in linux */ +#define VIC_CPI_LEVEL0 0 +#define VIC_CPI_LEVEL1 1 +/* now the fake CPIs */ +#define VIC_TIMER_CPI 2 +#define VIC_INVALIDATE_CPI 3 +#define VIC_RESCHEDULE_CPI 4 +#define VIC_ENABLE_IRQ_CPI 5 +#define VIC_CALL_FUNCTION_CPI 6 + +/* Now the QIC CPIs: Since we don't need the two initial levels, + * these are 2 less than the VIC CPIs */ +#define QIC_CPI_OFFSET 1 +#define QIC_TIMER_CPI (VIC_TIMER_CPI - QIC_CPI_OFFSET) +#define QIC_INVALIDATE_CPI (VIC_INVALIDATE_CPI - QIC_CPI_OFFSET) +#define QIC_RESCHEDULE_CPI (VIC_RESCHEDULE_CPI - QIC_CPI_OFFSET) +#define QIC_ENABLE_IRQ_CPI (VIC_ENABLE_IRQ_CPI - QIC_CPI_OFFSET) +#define QIC_CALL_FUNCTION_CPI (VIC_CALL_FUNCTION_CPI - QIC_CPI_OFFSET) + +#define VIC_START_FAKE_CPI VIC_TIMER_CPI +#define VIC_END_FAKE_CPI VIC_CALL_FUNCTION_CPI + +/* this is the SYS_INT CPI. */ +#define VIC_SYS_INT 8 +#define VIC_CMN_INT 15 + +/* This is the boot CPI for alternate processors. It gets overwritten + * by the above once the system has activated all available processors */ +#define VIC_CPU_BOOT_CPI VIC_CPI_LEVEL0 +#define VIC_CPU_BOOT_ERRATA_CPI (VIC_CPI_LEVEL0 + 8) + +#define NR_IRQS 224 + +#ifndef __ASSEMBLY__ +extern asmlinkage void vic_cpi_interrupt(void); +extern asmlinkage void vic_sys_interrupt(void); +extern asmlinkage void vic_cmn_interrupt(void); +extern asmlinkage void qic_timer_interrupt(void); +extern asmlinkage void qic_invalidate_interrupt(void); +extern asmlinkage void qic_reschedule_interrupt(void); +extern asmlinkage void qic_enable_irq_interrupt(void); +extern asmlinkage void qic_call_function_interrupt(void); +#endif /* !__ASSEMBLY__ */ + +#endif /* _ASM_IRQ_VECTORS_H */ diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/i386/mach-voyager/Makefile linux.2.5.40-ac2/arch/i386/mach-voyager/Makefile --- linux.2.5.40/arch/i386/mach-voyager/Makefile 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/i386/mach-voyager/Makefile 2002-10-02 21:41:29.000000000 +0100 @@ -0,0 +1,20 @@ +# +# Makefile for the linux kernel. +# +# Note! Dependencies are done automagically by 'make dep', which also +# removes any old dependencies. DON'T put your own dependencies here +# unless it's something special (ie not a .c file). +# +# Note 2! The CFLAGS definitions are now in the main makefile... + +EXTRA_CFLAGS += -I../kernel +export-objs := + +# VPATH is needed for trampoline.o +VPATH := ../kernel + +obj-y := setup.o voyager_basic.o voyager_thread.o + +obj-$(CONFIG_SMP) += voyager_smp.o voyager_cat.o trampoline.o + +include $(TOPDIR)/Rules.make diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/i386/mach-voyager/setup_arch_post.h linux.2.5.40-ac2/arch/i386/mach-voyager/setup_arch_post.h --- linux.2.5.40/arch/i386/mach-voyager/setup_arch_post.h 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/i386/mach-voyager/setup_arch_post.h 2002-10-02 21:41:29.000000000 +0100 @@ -0,0 +1,73 @@ +/* Hook for machine specific memory setup. + * + * This is included late in kernel/setup.c so that it can make use of all of + * the static functions. */ + +static inline char * __init machine_specific_memory_setup(void) +{ + char *who; + + who = "NOT VOYAGER"; + + if(voyager_level == 5) { + __u32 addr, length; + int i; + + who = "Voyager-SUS"; + + e820.nr_map = 0; + for(i=0; voyager_memory_detect(i, &addr, &length); i++) { + add_memory_region(addr, length, E820_RAM); + } + return who; + } else if(voyager_level == 4) { + __u32 tom; + __u16 catbase = inb(VOYAGER_SSPB_RELOCATION_PORT)<<8; + /* select the DINO config space */ + outb(VOYAGER_DINO, VOYAGER_CAT_CONFIG_PORT); + /* Read DINO top of memory register */ + tom = ((inb(catbase + 0x4) & 0xf0) << 16) + + ((inb(catbase + 0x5) & 0x7f) << 24); + + if(inb(catbase) != VOYAGER_DINO) { + printk(KERN_ERR "Voyager: Failed to get DINO for L4, setting tom to EXT_MEM_K\n"); + tom = (EXT_MEM_K)<<10; + } + who = "Voyager-TOM"; + add_memory_region(0, 0x9f000, E820_RAM); + /* map from 1M to top of memory */ + add_memory_region(1*1024*1024, tom - 1*1024*1024, E820_RAM); + /* FIXME: Should check the ASICs to see if I need to + * take out the 8M window. Just do it at the moment + * */ + add_memory_region(8*1024*1024, 8*1024*1024, E820_RESERVED); + return who; + } + + who = "BIOS-e820"; + + /* + * Try to copy the BIOS-supplied E820-map. + * + * Otherwise fake a memory map; one section from 0k->640k, + * the next section from 1mb->appropriate_mem_k + */ + sanitize_e820_map(E820_MAP, &E820_MAP_NR); + if (copy_e820_map(E820_MAP, E820_MAP_NR) < 0) { + unsigned long mem_size; + + /* compare results from other methods and take the greater */ + if (ALT_MEM_K < EXT_MEM_K) { + mem_size = EXT_MEM_K; + who = "BIOS-88"; + } else { + mem_size = ALT_MEM_K; + who = "BIOS-e801"; + } + + e820.nr_map = 0; + add_memory_region(0, LOWMEMSIZE(), E820_RAM); + add_memory_region(HIGH_MEMORY, mem_size << 10, E820_RAM); + } + return who; +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/i386/mach-voyager/setup_arch_pre.h linux.2.5.40-ac2/arch/i386/mach-voyager/setup_arch_pre.h --- linux.2.5.40/arch/i386/mach-voyager/setup_arch_pre.h 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/i386/mach-voyager/setup_arch_pre.h 2002-10-02 21:41:29.000000000 +0100 @@ -0,0 +1,10 @@ +#include +#define VOYAGER_BIOS_INFO ((struct voyager_bios_info *)(PARAM+0x40)) + +/* Hook to call BIOS initialisation function */ + +/* for voyager, pass the voyager BIOS/SUS info area to the detection + * routines */ + +#define ARCH_SETUP voyager_detect(VOYAGER_BIOS_INFO); + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/i386/mach-voyager/setup.c linux.2.5.40-ac2/arch/i386/mach-voyager/setup.c --- linux.2.5.40/arch/i386/mach-voyager/setup.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/i386/mach-voyager/setup.c 2002-10-02 21:41:29.000000000 +0100 @@ -0,0 +1,43 @@ +/* + * Machine specific setup for generic + */ + +#include +#include +#include +#include +#include + +void __init pre_intr_init_hook(void) +{ + init_ISA_irqs(); +} + +/* + * IRQ2 is cascade interrupt to second interrupt controller + */ +static struct irqaction irq2 = { no_action, 0, 0, "cascade", NULL, NULL}; + +void __init intr_init_hook(void) +{ +#ifdef CONFIG_SMP + smp_intr_init(); +#endif + + setup_irq(2, &irq2); +} + +void __init pre_setup_arch_hook(void) +{ +} + +void __init trap_init_hook(void) +{ +} + +static struct irqaction irq0 = { timer_interrupt, SA_INTERRUPT, 0, "timer", NULL, NULL}; + +void __init time_init_hook(void) +{ + setup_irq(0, &irq0); +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/i386/mach-voyager/voyager_basic.c linux.2.5.40-ac2/arch/i386/mach-voyager/voyager_basic.c --- linux.2.5.40/arch/i386/mach-voyager/voyager_basic.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/i386/mach-voyager/voyager_basic.c 2002-10-02 21:41:29.000000000 +0100 @@ -0,0 +1,312 @@ +/* Copyright (C) 1999,2001 + * + * Author: J.E.J.Bottomley@HansenPartnership.com + * + * linux/arch/i386/kernel/voyager.c + * + * This file contains all the voyager specific routines for getting + * initialisation of the architecture to function. For additional + * features see: + * + * voyager_cat.c - Voyager CAT bus interface + * voyager_smp.c - Voyager SMP hal (emulates linux smp.c) + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * Power off function, if any + */ +void (*pm_power_off)(void); + +int reboot_thru_bios; + +int voyager_level = 0; + +struct voyager_SUS *voyager_SUS = NULL; + +void +voyager_detect(struct voyager_bios_info *bios) +{ + if(bios->len != 0xff) { + int class = (bios->class_1 << 8) + | (bios->class_2 & 0xff); + + printk("Voyager System detected.\n" + " Class %x, Revision %d.%d\n", + class, bios->major, bios->minor); + if(class == VOYAGER_LEVEL4) + voyager_level = 4; + else if(class < VOYAGER_LEVEL5_AND_ABOVE) + voyager_level = 3; + else + voyager_level = 5; + printk(" Architecture Level %d\n", voyager_level); + if(voyager_level < 4) + printk("\n**WARNING**: Voyager HAL only supports Levels 4 and 5 Architectures at the moment\n\n"); + /* install the power off handler */ + pm_power_off = voyager_power_off; + } else { + printk("\n\n**WARNING**: No Voyager Subsystem Found\n"); + } +} + +void +voyager_system_interrupt(int cpl, void *dev_id, struct pt_regs *regs) +{ + printk("Voyager: detected system interrupt\n"); +} + +/* Routine to read information from the extended CMOS area */ +__u8 +voyager_extended_cmos_read(__u16 addr) +{ + outb(addr & 0xff, 0x74); + outb((addr >> 8) & 0xff, 0x75); + return inb(0x76); +} + +/* internal definitions for the SUS Click Map of memory */ + +#define CLICK_ENTRIES 16 +#define CLICK_SIZE 4096 /* click to byte conversion for Length */ + +typedef struct ClickMap { + struct Entry { + __u32 Address; + __u32 Length; + } Entry[CLICK_ENTRIES]; +} ClickMap_t; + + +/* This routine is pretty much an awful hack to read the bios clickmap by + * mapping it into page 0. There are usually three regions in the map: + * Base Memory + * Extended Memory + * zero length marker for end of map + * + * Returns are 0 for failure and 1 for success on extracting region. + */ +int __init +voyager_memory_detect(int region, __u32 *start, __u32 *length) +{ + int i; + int retval = 0; + __u8 cmos[4]; + ClickMap_t *map; + unsigned long map_addr; + unsigned long old; + + if(region >= CLICK_ENTRIES) { + printk("Voyager: Illegal ClickMap region %d\n", region); + return 0; + } + + for(i = 0; i < sizeof(cmos); i++) + cmos[i] = voyager_extended_cmos_read(VOYAGER_MEMORY_CLICKMAP + i); + + map_addr = *(unsigned long *)cmos; + + /* steal page 0 for this */ + old = pg0[0]; + pg0[0] = ((map_addr & PAGE_MASK) | _PAGE_RW | _PAGE_PRESENT); + local_flush_tlb(); + /* now clear everything out but page 0 */ + map = (ClickMap_t *)(map_addr & (~PAGE_MASK)); + + /* zero length is the end of the clickmap */ + if(map->Entry[region].Length != 0) { + *length = map->Entry[region].Length * CLICK_SIZE; + *start = map->Entry[region].Address; + retval = 1; + } + + /* replace the mapping */ + pg0[0] = old; + local_flush_tlb(); + return retval; +} + +void +voyager_dump() +{ + /* get here via a sysrq */ +#ifdef CONFIG_SMP + voyager_smp_dump(); +#endif +} + +/* voyager specific handling code for timer interrupts. Used to hand + * off the timer tick to the SMP code, since the VIC doesn't have an + * internal timer (The QIC does, but that's another story). */ +void +voyager_timer_interrupt(struct pt_regs *regs) +{ + if((jiffies & 0x3ff) == 0) { + + /* There seems to be something flaky in either + * hardware or software that is resetting the timer 0 + * count to something much higher than it should be + * This seems to occur in the boot sequence, just + * before root is mounted. Therefore, every 10 + * seconds or so, we sanity check the timer zero count + * and kick it back to where it should be. + * + * FIXME: This is the most awful hack yet seen. I + * should work out exactly what is interfering with + * the timer count settings early in the boot sequence + * and swiftly introduce it to something sharp and + * pointy. */ + __u16 val; + extern spinlock_t i8253_lock; + + spin_lock(&i8253_lock); + + outb_p(0x00, 0x43); + val = inb_p(0x40); + val |= inb(0x40) << 8; + spin_unlock(&i8253_lock); + + if(val > LATCH) { + printk("\nVOYAGER: countdown timer value too high (%d), resetting\n\n", val); + spin_lock(&i8253_lock); + outb(0x34,0x43); + outb_p(LATCH & 0xff , 0x40); /* LSB */ + outb(LATCH >> 8 , 0x40); /* MSB */ + spin_unlock(&i8253_lock); + } + } +#ifdef CONFIG_SMP + smp_vic_timer_interrupt(regs); +#endif +} + +void +voyager_power_off(void) +{ + printk("VOYAGER Power Off\n"); + + if(voyager_level == 5) { + voyager_cat_power_off(); + } else if(voyager_level == 4) { + /* This doesn't apparently work on most L4 machines, + * but the specs say to do this to get automatic power + * off. Unfortunately, if it doesn't power off the + * machine, it ends up doing a cold restart, which + * isn't really intended, so comment out the code */ +#if 0 + int port; + + + /* enable the voyager Configuration Space */ + outb((inb(VOYAGER_MC_SETUP) & 0xf0) | 0x8, + VOYAGER_MC_SETUP); + /* the port for the power off flag is an offset from the + floating base */ + port = (inb(VOYAGER_SSPB_RELOCATION_PORT) << 8) + 0x21; + /* set the power off flag */ + outb(inb(port) | 0x1, port); +#endif + } + /* and wait for it to happen */ + for(;;) { + __asm("cli"); + __asm("hlt"); + } +} + +/* copied from process.c */ +static inline void +kb_wait(void) +{ + int i; + + for (i=0; i<0x10000; i++) + if ((inb_p(0x64) & 0x02) == 0) + break; +} + +void +machine_restart(char *cmd) +{ + printk("Voyager Warm Restart\n"); + kb_wait(); + + if(voyager_level == 5) { + /* write magic values to the RTC to inform system that + * shutdown is beginning */ + outb(0x8f, 0x70); + outb(0x5 , 0x71); + + udelay(50); + outb(0xfe,0x64); /* pull reset low */ + } else if(voyager_level == 4) { + __u16 catbase = inb(VOYAGER_SSPB_RELOCATION_PORT)<<8; + __u8 basebd = inb(VOYAGER_MC_SETUP); + + outb(basebd | 0x08, VOYAGER_MC_SETUP); + outb(0x02, catbase + 0x21); + } + for(;;) { + asm("cli"); + asm("hlt"); + } +} + +void +mca_nmi_hook(void) +{ + __u8 dumpval __attribute__((unused)) = inb(0xf823); + __u8 swnmi __attribute__((unused)) = inb(0xf813); + extern void show_stack(unsigned long *); + + /* FIXME: assume dump switch pressed */ + /* check to see if the dump switch was pressed */ + VDEBUG(("VOYAGER: dumpval = 0x%x, swnmi = 0x%x\n", dumpval, swnmi)); + /* clear swnmi */ + outb(0xff, 0xf813); + /* tell SUS to ignore dump */ + if(voyager_level == 5 && voyager_SUS != NULL) { + if(voyager_SUS->SUS_mbox == VOYAGER_DUMP_BUTTON_NMI) { + voyager_SUS->kernel_mbox = VOYAGER_NO_COMMAND; + voyager_SUS->kernel_flags |= VOYAGER_OS_IN_PROGRESS; + udelay(1000); + voyager_SUS->kernel_mbox = VOYAGER_IGNORE_DUMP; + voyager_SUS->kernel_flags &= ~VOYAGER_OS_IN_PROGRESS; + } + } + printk(KERN_ERR "VOYAGER: Dump switch pressed, printing CPU%d tracebacks\n", smp_processor_id()); + show_stack(NULL); + show_state(); +} + + + +void +machine_halt(void) +{ + /* treat a halt like a power off */ + machine_power_off(); +} + +void machine_power_off(void) +{ + if (pm_power_off) + pm_power_off(); +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/i386/mach-voyager/voyager_cat.c linux.2.5.40-ac2/arch/i386/mach-voyager/voyager_cat.c --- linux.2.5.40/arch/i386/mach-voyager/voyager_cat.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/i386/mach-voyager/voyager_cat.c 2002-10-02 21:41:29.000000000 +0100 @@ -0,0 +1,1178 @@ +/* -*- mode: c; c-basic-offset: 8 -*- */ + +/* Copyright (C) 1999,2001 + * + * Author: J.E.J.Bottomley@HansenPartnership.com + * + * linux/arch/i386/kernel/voyager_cat.c + * + * This file contains all the logic for manipulating the CAT bus + * in a level 5 machine. + * + * The CAT bus is a serial configuration and test bus. Its primary + * uses are to probe the initial configuration of the system and to + * diagnose error conditions when a system interrupt occurs. The low + * level interface is fairly primitive, so most of this file consists + * of bit shift manipulations to send and receive packets on the + * serial bus */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#ifdef VOYAGER_CAT_DEBUG +#define CDEBUG(x) printk x +#else +#define CDEBUG(x) +#endif + +/* the CAT command port */ +#define CAT_CMD (sspb + 0xe) +/* the CAT data port */ +#define CAT_DATA (sspb + 0xd) + +/* the internal cat functions */ +static void cat_pack(__u8 *msg, __u16 start_bit, __u8 *data, + __u16 num_bits); +static void cat_unpack(__u8 *msg, __u16 start_bit, __u8 *data, + __u16 num_bits); +static void cat_build_header(__u8 *header, const __u16 len, + const __u16 smallest_reg_bits, + const __u16 longest_reg_bits); +static int cat_sendinst(voyager_module_t *modp, voyager_asic_t *asicp, + __u8 reg, __u8 op); +static int cat_getdata(voyager_module_t *modp, voyager_asic_t *asicp, + __u8 reg, __u8 *value); +static int cat_shiftout(__u8 *data, __u16 data_bytes, __u16 header_bytes, + __u8 pad_bits); +static int cat_write(voyager_module_t *modp, voyager_asic_t *asicp, __u8 reg, + __u8 value); +static int cat_read(voyager_module_t *modp, voyager_asic_t *asicp, __u8 reg, + __u8 *value); +static int cat_subread(voyager_module_t *modp, voyager_asic_t *asicp, + __u16 offset, __u16 len, void *buf); +static int cat_senddata(voyager_module_t *modp, voyager_asic_t *asicp, + __u8 reg, __u8 value); +static int cat_disconnect(voyager_module_t *modp, voyager_asic_t *asicp); +static int cat_connect(voyager_module_t *modp, voyager_asic_t *asicp); + +static inline const char * +cat_module_name(int module_id) +{ + switch(module_id) { + case 0x10: + return "Processor Slot 0"; + case 0x11: + return "Processor Slot 1"; + case 0x12: + return "Processor Slot 2"; + case 0x13: + return "Processor Slot 4"; + case 0x14: + return "Memory Slot 0"; + case 0x15: + return "Memory Slot 1"; + case 0x18: + return "Primary Microchannel"; + case 0x19: + return "Secondary Microchannel"; + case 0x1a: + return "Power Supply Interface"; + case 0x1c: + return "Processor Slot 5"; + case 0x1d: + return "Processor Slot 6"; + case 0x1e: + return "Processor Slot 7"; + case 0x1f: + return "Processor Slot 8"; + default: + return "Unknown Module"; + } +} + +static int sspb = 0; /* stores the super port location */ +int voyager_8slot = 0; /* set to true if a 51xx monster */ + +voyager_module_t *voyager_cat_list; + +/* the I/O port assignments for the VIC and QIC */ +static struct resource vic_res = { + "Voyager Interrupt Controller", 0xFC00, 0xFC6F }; +static struct resource qic_res = { + "Quad Interrupt Controller", 0xFC70, 0xFCFF }; + +/* This function is used to pack a data bit stream inside a message. + * It writes num_bits of the data buffer in msg starting at start_bit. + * Note: This function assumes that any unused bit in the data stream + * is set to zero so that the ors will work correctly */ +#define BITS_PER_BYTE 8 +static void +cat_pack(__u8 *msg, const __u16 start_bit, __u8 *data, const __u16 num_bits) +{ + /* compute initial shift needed */ + const __u16 offset = start_bit % BITS_PER_BYTE; + __u16 len = num_bits / BITS_PER_BYTE; + __u16 byte = start_bit / BITS_PER_BYTE; + __u16 residue = (num_bits % BITS_PER_BYTE) + offset; + int i; + + /* adjust if we have more than a byte of residue */ + if(residue >= BITS_PER_BYTE) { + residue -= BITS_PER_BYTE; + len++; + } + + /* clear out the bits. We assume here that if len==0 then + * residue >= offset. This is always true for the catbus + * operations */ + msg[byte] &= 0xff << (BITS_PER_BYTE - offset); + msg[byte++] |= data[0] >> offset; + if(len == 0) + return; + for(i = 1; i < len; i++) + msg[byte++] = (data[i-1] << (BITS_PER_BYTE - offset)) + | (data[i] >> offset); + if(residue != 0) { + __u8 mask = 0xff >> residue; + __u8 last_byte = data[i-1] << (BITS_PER_BYTE - offset) + | (data[i] >> offset); + + last_byte &= ~mask; + msg[byte] &= mask; + msg[byte] |= last_byte; + } + return; +} +/* unpack the data again (same arguments as cat_pack()). data buffer + * must be zero populated. + * + * Function: given a message string move to start_bit and copy num_bits into + * data (starting at bit 0 in data). + */ +static void +cat_unpack(__u8 *msg, const __u16 start_bit, __u8 *data, const __u16 num_bits) +{ + /* compute initial shift needed */ + const __u16 offset = start_bit % BITS_PER_BYTE; + __u16 len = num_bits / BITS_PER_BYTE; + const __u8 last_bits = num_bits % BITS_PER_BYTE; + __u16 byte = start_bit / BITS_PER_BYTE; + int i; + + if(last_bits != 0) + len++; + + /* special case: want < 8 bits from msg and we can get it from + * a single byte of the msg */ + if(len == 0 && BITS_PER_BYTE - offset >= num_bits) { + data[0] = msg[byte] << offset; + data[0] &= 0xff >> (BITS_PER_BYTE - num_bits); + return; + } + for(i = 0; i < len; i++) { + /* this annoying if has to be done just in case a read of + * msg one beyond the array causes a panic */ + if(offset != 0) { + data[i] = msg[byte++] << offset; + data[i] |= msg[byte] >> (BITS_PER_BYTE - offset); + } + else { + data[i] = msg[byte++]; + } + } + /* do we need to truncate the final byte */ + if(last_bits != 0) { + data[i-1] &= 0xff << (BITS_PER_BYTE - last_bits); + } + return; +} + +static void +cat_build_header(__u8 *header, const __u16 len, const __u16 smallest_reg_bits, + const __u16 longest_reg_bits) +{ + int i; + __u16 start_bit = (smallest_reg_bits - 1) % BITS_PER_BYTE; + __u8 *last_byte = &header[len - 1]; + + if(start_bit == 0) + start_bit = 1; /* must have at least one bit in the hdr */ + + for(i=0; i < len; i++) + header[i] = 0; + + for(i = start_bit; i > 0; i--) + *last_byte = ((*last_byte) << 1) + 1; + +} + +static int +cat_sendinst(voyager_module_t *modp, voyager_asic_t *asicp, __u8 reg, __u8 op) +{ + __u8 parity, inst, inst_buf[4] = { 0 }; + __u8 iseq[VOYAGER_MAX_SCAN_PATH], hseq[VOYAGER_MAX_REG_SIZE]; + __u16 ibytes, hbytes, padbits; + int i; + + /* + * Parity is the parity of the register number + 1 (READ_REGISTER + * and WRITE_REGISTER always add '1' to the number of bits == 1) + */ + parity = (__u8)(1 + (reg & 0x01) + + ((__u8)(reg & 0x02) >> 1) + + ((__u8)(reg & 0x04) >> 2) + + ((__u8)(reg & 0x08) >> 3)) % 2; + + inst = ((parity << 7) | (reg << 2) | op); + + outb(VOYAGER_CAT_IRCYC, CAT_CMD); + if(!modp->scan_path_connected) { + if(asicp->asic_id != VOYAGER_CAT_ID) { + printk("**WARNING***: cat_sendinst has disconnected scan path not to CAT asic\n"); + return 1; + } + outb(VOYAGER_CAT_HEADER, CAT_DATA); + outb(inst, CAT_DATA); + if(inb(CAT_DATA) != VOYAGER_CAT_HEADER) { + CDEBUG(("VOYAGER CAT: cat_sendinst failed to get CAT_HEADER\n")); + return 1; + } + return 0; + } + ibytes = modp->inst_bits / BITS_PER_BYTE; + if((padbits = modp->inst_bits % BITS_PER_BYTE) != 0) { + padbits = BITS_PER_BYTE - padbits; + ibytes++; + } + hbytes = modp->largest_reg / BITS_PER_BYTE; + if(modp->largest_reg % BITS_PER_BYTE) + hbytes++; + CDEBUG(("cat_sendinst: ibytes=%d, hbytes=%d\n", ibytes, hbytes)); + /* initialise the instruction sequence to 0xff */ + for(i=0; i < ibytes + hbytes; i++) + iseq[i] = 0xff; + cat_build_header(hseq, hbytes, modp->smallest_reg, modp->largest_reg); + cat_pack(iseq, modp->inst_bits, hseq, hbytes * BITS_PER_BYTE); + inst_buf[0] = inst; + inst_buf[1] = 0xFF >> (modp->largest_reg % BITS_PER_BYTE); + cat_pack(iseq, asicp->bit_location, inst_buf, asicp->ireg_length); +#ifdef VOYAGER_CAT_DEBUG + printk("ins = 0x%x, iseq: ", inst); + for(i=0; i< ibytes + hbytes; i++) + printk("0x%x ", iseq[i]); + printk("\n"); +#endif + if(cat_shiftout(iseq, ibytes, hbytes, padbits)) { + CDEBUG(("VOYAGER CAT: cat_sendinst: cat_shiftout failed\n")); + return 1; + } + CDEBUG(("CAT SHIFTOUT DONE\n")); + return 0; +} + +static int +cat_getdata(voyager_module_t *modp, voyager_asic_t *asicp, __u8 reg, + __u8 *value) +{ + if(!modp->scan_path_connected) { + if(asicp->asic_id != VOYAGER_CAT_ID) { + CDEBUG(("VOYAGER CAT: ERROR: cat_getdata to CAT asic with scan path connected\n")); + return 1; + } + if(reg > VOYAGER_SUBADDRHI) + outb(VOYAGER_CAT_RUN, CAT_CMD); + outb(VOYAGER_CAT_DRCYC, CAT_CMD); + outb(VOYAGER_CAT_HEADER, CAT_DATA); + *value = inb(CAT_DATA); + outb(0xAA, CAT_DATA); + if(inb(CAT_DATA) != VOYAGER_CAT_HEADER) { + CDEBUG(("cat_getdata: failed to get VOYAGER_CAT_HEADER\n")); + return 1; + } + return 0; + } + else { + __u16 sbits = modp->num_asics -1 + asicp->ireg_length; + __u16 sbytes = sbits / BITS_PER_BYTE; + __u16 tbytes; + __u8 string[VOYAGER_MAX_SCAN_PATH], trailer[VOYAGER_MAX_REG_SIZE]; + __u8 padbits; + int i; + + outb(VOYAGER_CAT_DRCYC, CAT_CMD); + + if((padbits = sbits % BITS_PER_BYTE) != 0) { + padbits = BITS_PER_BYTE - padbits; + sbytes++; + } + tbytes = asicp->ireg_length / BITS_PER_BYTE; + if(asicp->ireg_length % BITS_PER_BYTE) + tbytes++; + CDEBUG(("cat_getdata: tbytes = %d, sbytes = %d, padbits = %d\n", + tbytes, sbytes, padbits)); + cat_build_header(trailer, tbytes, 1, asicp->ireg_length); + + + for(i = tbytes - 1; i >= 0; i--) { + outb(trailer[i], CAT_DATA); + string[sbytes + i] = inb(CAT_DATA); + } + + for(i = sbytes - 1; i >= 0; i--) { + outb(0xaa, CAT_DATA); + string[i] = inb(CAT_DATA); + } + *value = 0; + cat_unpack(string, padbits + (tbytes * BITS_PER_BYTE) + asicp->asic_location, value, asicp->ireg_length); +#ifdef VOYAGER_CAT_DEBUG + printk("value=0x%x, string: ", *value); + for(i=0; i< tbytes+sbytes; i++) + printk("0x%x ", string[i]); + printk("\n"); +#endif + + /* sanity check the rest of the return */ + for(i=0; i < tbytes; i++) { + __u8 input = 0; + + cat_unpack(string, padbits + (i * BITS_PER_BYTE), &input, BITS_PER_BYTE); + if(trailer[i] != input) { + CDEBUG(("cat_getdata: failed to sanity check rest of ret(%d) 0x%x != 0x%x\n", i, input, trailer[i])); + return 1; + } + } + CDEBUG(("cat_getdata DONE\n")); + return 0; + } +} + +static int +cat_shiftout(__u8 *data, __u16 data_bytes, __u16 header_bytes, __u8 pad_bits) +{ + int i; + + for(i = data_bytes + header_bytes - 1; i >= header_bytes; i--) + outb(data[i], CAT_DATA); + + for(i = header_bytes - 1; i >= 0; i--) { + __u8 header = 0; + __u8 input; + + outb(data[i], CAT_DATA); + input = inb(CAT_DATA); + CDEBUG(("cat_shiftout: returned 0x%x\n", input)); + cat_unpack(data, ((data_bytes + i) * BITS_PER_BYTE) - pad_bits, + &header, BITS_PER_BYTE); + if(input != header) { + CDEBUG(("VOYAGER CAT: cat_shiftout failed to return header 0x%x != 0x%x\n", input, header)); + return 1; + } + } + return 0; +} + +static int +cat_senddata(voyager_module_t *modp, voyager_asic_t *asicp, + __u8 reg, __u8 value) +{ + outb(VOYAGER_CAT_DRCYC, CAT_CMD); + if(!modp->scan_path_connected) { + if(asicp->asic_id != VOYAGER_CAT_ID) { + CDEBUG(("VOYAGER CAT: ERROR: scan path disconnected when asic != CAT\n")); + return 1; + } + outb(VOYAGER_CAT_HEADER, CAT_DATA); + outb(value, CAT_DATA); + if(inb(CAT_DATA) != VOYAGER_CAT_HEADER) { + CDEBUG(("cat_senddata: failed to get correct header response to sent data\n")); + return 1; + } + if(reg > VOYAGER_SUBADDRHI) { + outb(VOYAGER_CAT_RUN, CAT_CMD); + outb(VOYAGER_CAT_END, CAT_CMD); + outb(VOYAGER_CAT_RUN, CAT_CMD); + } + + return 0; + } + else { + __u16 hbytes = asicp->ireg_length / BITS_PER_BYTE; + __u16 dbytes = (modp->num_asics - 1 + asicp->ireg_length)/BITS_PER_BYTE; + __u8 padbits, dseq[VOYAGER_MAX_SCAN_PATH], + hseq[VOYAGER_MAX_REG_SIZE]; + int i; + + if((padbits = (modp->num_asics - 1 + + asicp->ireg_length) % BITS_PER_BYTE) != 0) { + padbits = BITS_PER_BYTE - padbits; + dbytes++; + } + if(asicp->ireg_length % BITS_PER_BYTE) + hbytes++; + + cat_build_header(hseq, hbytes, 1, asicp->ireg_length); + + for(i = 0; i < dbytes + hbytes; i++) + dseq[i] = 0xff; + CDEBUG(("cat_senddata: dbytes=%d, hbytes=%d, padbits=%d\n", + dbytes, hbytes, padbits)); + cat_pack(dseq, modp->num_asics - 1 + asicp->ireg_length, + hseq, hbytes * BITS_PER_BYTE); + cat_pack(dseq, asicp->asic_location, &value, + asicp->ireg_length); +#ifdef VOYAGER_CAT_DEBUG + printk("dseq "); + for(i=0; i 1) { + /* set auto increment */ + __u8 newval; + + if(cat_read(modp, asicp, VOYAGER_AUTO_INC_REG, &val)) { + CDEBUG(("cat_subaddrsetup: read of VOYAGER_AUTO_INC_REG failed\n")); + return 1; + } + CDEBUG(("cat_subaddrsetup: VOYAGER_AUTO_INC_REG = 0x%x\n", val)); + newval = val | VOYAGER_AUTO_INC; + if(newval != val) { + if(cat_write(modp, asicp, VOYAGER_AUTO_INC_REG, val)) { + CDEBUG(("cat_subaddrsetup: write to VOYAGER_AUTO_INC_REG failed\n")); + return 1; + } + } + } + if(cat_write(modp, asicp, VOYAGER_SUBADDRLO, (__u8)(offset &0xff))) { + CDEBUG(("cat_subaddrsetup: write to SUBADDRLO failed\n")); + return 1; + } + if(asicp->subaddr > VOYAGER_SUBADDR_LO) { + if(cat_write(modp, asicp, VOYAGER_SUBADDRHI, (__u8)(offset >> 8))) { + CDEBUG(("cat_subaddrsetup: write to SUBADDRHI failed\n")); + return 1; + } + cat_read(modp, asicp, VOYAGER_SUBADDRHI, &val); + CDEBUG(("cat_subaddrsetup: offset = %d, hi = %d\n", offset, val)); + } + cat_read(modp, asicp, VOYAGER_SUBADDRLO, &val); + CDEBUG(("cat_subaddrsetup: offset = %d, lo = %d\n", offset, val)); + return 0; +} + +static int +cat_subwrite(voyager_module_t *modp, voyager_asic_t *asicp, __u16 offset, + __u16 len, void *buf) +{ + int i, retval; + + /* FIXME: need special actions for VOYAGER_CAT_ID here */ + if(asicp->asic_id == VOYAGER_CAT_ID) { + CDEBUG(("cat_subwrite: ATTEMPT TO WRITE TO CAT ASIC\n")); + /* FIXME -- This is supposed to be handled better + * There is a problem writing to the cat asic in the + * PSI. The 30us delay seems to work, though */ + udelay(30); + } + + if((retval = cat_subaddrsetup(modp, asicp, offset, len)) != 0) { + printk("cat_subwrite: cat_subaddrsetup FAILED\n"); + return retval; + } + + if(cat_sendinst(modp, asicp, VOYAGER_SUBADDRDATA, VOYAGER_WRITE_CONFIG)) { + printk("cat_subwrite: cat_sendinst FAILED\n"); + return 1; + } + for(i = 0; i < len; i++) { + if(cat_senddata(modp, asicp, 0xFF, ((__u8 *)buf)[i])) { + printk("cat_subwrite: cat_sendata element at %d FAILED\n", i); + return 1; + } + } + return 0; +} +static int +cat_subread(voyager_module_t *modp, voyager_asic_t *asicp, __u16 offset, + __u16 len, void *buf) +{ + int i, retval; + + if((retval = cat_subaddrsetup(modp, asicp, offset, len)) != 0) { + CDEBUG(("cat_subread: cat_subaddrsetup FAILED\n")); + return retval; + } + + if(cat_sendinst(modp, asicp, VOYAGER_SUBADDRDATA, VOYAGER_READ_CONFIG)) { + CDEBUG(("cat_subread: cat_sendinst failed\n")); + return 1; + } + for(i = 0; i < len; i++) { + if(cat_getdata(modp, asicp, 0xFF, + &((__u8 *)buf)[i])) { + CDEBUG(("cat_subread: cat_getdata element %d failed\n", i)); + return 1; + } + } + return 0; +} + + +/* buffer for storing EPROM data read in during initialisation */ +static __initdata __u8 eprom_buf[0xFFFF]; +static voyager_module_t *voyager_initial_module; + +/* Initialise the cat bus components. We assume this is called by the + * boot cpu *after* all memory initialisation has been done (so we can + * use kmalloc) but before smp initialisation, so we can probe the SMP + * configuration and pick up necessary information. */ +void +voyager_cat_init(void) +{ + voyager_module_t **modpp = &voyager_initial_module; + voyager_asic_t **asicpp; + voyager_asic_t *qabc_asic = NULL; + int i, j; + unsigned long qic_addr = 0; + __u8 qabc_data[0x20]; + __u8 num_submodules, val; + voyager_eprom_hdr_t *eprom_hdr = (voyager_eprom_hdr_t *)&eprom_buf[0]; + + __u8 cmos[4]; + unsigned long addr; + + /* initiallise the SUS mailbox */ + for(i=0; iSUS_version); + voyager_SUS->kernel_version = VOYAGER_MAILBOX_VERSION; + voyager_SUS->kernel_flags = VOYAGER_OS_HAS_SYSINT; + } + + /* clear the processor counts */ + voyager_extended_vic_processors = 0; + voyager_quad_processors = 0; + + + + printk("VOYAGER: beginning CAT bus probe\n"); + /* set up the SuperSet Port Block which tells us where the + * CAT communication port is */ + sspb = inb(VOYAGER_SSPB_RELOCATION_PORT) * 0x100; + VDEBUG(("VOYAGER DEBUG: sspb = 0x%x\n", sspb)); + + /* now find out if were 8 slot or normal */ + if((inb(VIC_PROC_WHO_AM_I) & EIGHT_SLOT_IDENTIFIER) + == EIGHT_SLOT_IDENTIFIER) { + voyager_8slot = 1; + printk(KERN_NOTICE "Voyager: Eight slot 51xx configuration detected\n"); + } + + for(i = VOYAGER_MIN_MODULE; + i <= VOYAGER_MAX_MODULE; i++) { + __u8 input; + int asic; + __u16 eprom_size; + __u16 sp_offset; + + outb(VOYAGER_CAT_DESELECT, VOYAGER_CAT_CONFIG_PORT); + outb(i, VOYAGER_CAT_CONFIG_PORT); + + /* check the presence of the module */ + outb(VOYAGER_CAT_RUN, CAT_CMD); + outb(VOYAGER_CAT_IRCYC, CAT_CMD); + outb(VOYAGER_CAT_HEADER, CAT_DATA); + /* stream series of alternating 1's and 0's to stimulate + * response */ + outb(0xAA, CAT_DATA); + input = inb(CAT_DATA); + outb(VOYAGER_CAT_END, CAT_CMD); + if(input != VOYAGER_CAT_HEADER) { + continue; + } + CDEBUG(("VOYAGER DEBUG: found module id 0x%x, %s\n", i, + cat_module_name(i))); + *modpp = kmalloc(sizeof(voyager_module_t), GFP_KERNEL); /*&voyager_module_storage[cat_count++];*/ + if(*modpp == NULL) { + printk("**WARNING** kmalloc failure in cat_init\n"); + continue; + } + memset(*modpp, 0, sizeof(voyager_module_t)); + /* need temporary asic for cat_subread. It will be + * filled in correctly later */ + (*modpp)->asic = kmalloc(sizeof(voyager_asic_t), GFP_KERNEL); /*&voyager_asic_storage[asic_count];*/ + if((*modpp)->asic == NULL) { + printk("**WARNING** kmalloc failure in cat_init\n"); + continue; + } + memset((*modpp)->asic, 0, sizeof(voyager_asic_t)); + (*modpp)->asic->asic_id = VOYAGER_CAT_ID; + (*modpp)->asic->subaddr = VOYAGER_SUBADDR_HI; + (*modpp)->module_addr = i; + (*modpp)->scan_path_connected = 0; + if(i == VOYAGER_PSI) { + /* Exception leg for modules with no EEPROM */ + printk("Module \"%s\"\n", cat_module_name(i)); + continue; + } + + CDEBUG(("cat_init: Reading eeprom for module 0x%x at offset %d\n", i, VOYAGER_XSUM_END_OFFSET)); + outb(VOYAGER_CAT_RUN, CAT_CMD); + cat_disconnect(*modpp, (*modpp)->asic); + if(cat_subread(*modpp, (*modpp)->asic, + VOYAGER_XSUM_END_OFFSET, sizeof(eprom_size), + &eprom_size)) { + printk("**WARNING**: Voyager couldn't read EPROM size for module 0x%x\n", i); + outb(VOYAGER_CAT_END, CAT_CMD); + continue; + } + if(eprom_size > sizeof(eprom_buf)) { + printk("**WARNING**: Voyager insufficient size to read EPROM data, module 0x%x. Need %d\n", i, eprom_size); + outb(VOYAGER_CAT_END, CAT_CMD); + continue; + } + outb(VOYAGER_CAT_END, CAT_CMD); + outb(VOYAGER_CAT_RUN, CAT_CMD); + CDEBUG(("cat_init: module 0x%x, eeprom_size %d\n", i, eprom_size)); + if(cat_subread(*modpp, (*modpp)->asic, 0, + eprom_size, eprom_buf)) { + outb(VOYAGER_CAT_END, CAT_CMD); + continue; + } + outb(VOYAGER_CAT_END, CAT_CMD); + printk("Module \"%s\", version 0x%x, tracer 0x%x, asics %d\n", + cat_module_name(i), eprom_hdr->version_id, + *((__u32 *)eprom_hdr->tracer), eprom_hdr->num_asics); + (*modpp)->ee_size = eprom_hdr->ee_size; + (*modpp)->num_asics = eprom_hdr->num_asics; + asicpp = &((*modpp)->asic); + sp_offset = eprom_hdr->scan_path_offset; + /* All we really care about are the Quad cards. We + * identify them because they are in a processor slot + * and have only four asics */ + if((i < 0x10 || (i>=0x14 && i < 0x1c) || i>0x1f)) { + modpp = &((*modpp)->next); + continue; + } + /* Now we know it's in a processor slot, does it have + * a quad baseboard submodule */ + outb(VOYAGER_CAT_RUN, CAT_CMD); + cat_read(*modpp, (*modpp)->asic, VOYAGER_SUBMODPRESENT, + &num_submodules); + /* lowest two bits, active low */ + num_submodules = ~(0xfc | num_submodules); + CDEBUG(("VOYAGER CAT: %d submodules present\n", num_submodules)); + if(num_submodules == 0) { + /* fill in the dyadic extended processors */ + __u8 cpu = i & 0x07; + + printk("Module \"%s\": Dyadic Processor Card\n", + cat_module_name(i)); + voyager_extended_vic_processors |= (1<asic, VOYAGER_SUBMODSELECT, &val); + CDEBUG(("cat_init: SUBMODSELECT value = 0x%x\n", val)); + val = (val & 0x7c) | VOYAGER_QUAD_BASEBOARD; + cat_write(*modpp, (*modpp)->asic, VOYAGER_SUBMODSELECT, val); + + outb(VOYAGER_CAT_END, CAT_CMD); + + + CDEBUG(("cat_init: Reading eeprom for module 0x%x at offset %d\n", i, VOYAGER_XSUM_END_OFFSET)); + outb(VOYAGER_CAT_RUN, CAT_CMD); + cat_disconnect(*modpp, (*modpp)->asic); + if(cat_subread(*modpp, (*modpp)->asic, + VOYAGER_XSUM_END_OFFSET, sizeof(eprom_size), + &eprom_size)) { + printk("**WARNING**: Voyager couldn't read EPROM size for module 0x%x\n", i); + outb(VOYAGER_CAT_END, CAT_CMD); + continue; + } + if(eprom_size > sizeof(eprom_buf)) { + printk("**WARNING**: Voyager insufficient size to read EPROM data, module 0x%x. Need %d\n", i, eprom_size); + outb(VOYAGER_CAT_END, CAT_CMD); + continue; + } + outb(VOYAGER_CAT_END, CAT_CMD); + outb(VOYAGER_CAT_RUN, CAT_CMD); + CDEBUG(("cat_init: module 0x%x, eeprom_size %d\n", i, eprom_size)); + if(cat_subread(*modpp, (*modpp)->asic, 0, + eprom_size, eprom_buf)) { + outb(VOYAGER_CAT_END, CAT_CMD); + continue; + } + outb(VOYAGER_CAT_END, CAT_CMD); + /* Now do everything for the QBB submodule 1 */ + (*modpp)->ee_size = eprom_hdr->ee_size; + (*modpp)->num_asics = eprom_hdr->num_asics; + asicpp = &((*modpp)->asic); + sp_offset = eprom_hdr->scan_path_offset; + /* get rid of the dummy CAT asic and read the real one */ + kfree((*modpp)->asic); + for(asic=0; asic < (*modpp)->num_asics; asic++) { + int j; + voyager_asic_t *asicp = *asicpp + = kmalloc(sizeof(voyager_asic_t), GFP_KERNEL); /*&voyager_asic_storage[asic_count++];*/ + voyager_sp_table_t *sp_table; + voyager_at_t *asic_table; + voyager_jtt_t *jtag_table; + + if(asicp == NULL) { + printk("**WARNING** kmalloc failure in cat_init\n"); + continue; + } + memset(asicp, 0, sizeof(voyager_asic_t)); + asicpp = &(asicp->next); + asicp->asic_location = asic; + sp_table = (voyager_sp_table_t *)(eprom_buf + sp_offset); + asicp->asic_id = sp_table->asic_id; + asic_table = (voyager_at_t *)(eprom_buf + sp_table->asic_data_offset); + for(j=0; j<4; j++) + asicp->jtag_id[j] = asic_table->jtag_id[j]; + jtag_table = (voyager_jtt_t *)(eprom_buf + asic_table->jtag_offset); + asicp->ireg_length = jtag_table->ireg_len; + asicp->bit_location = (*modpp)->inst_bits; + (*modpp)->inst_bits += asicp->ireg_length; + if(asicp->ireg_length > (*modpp)->largest_reg) + (*modpp)->largest_reg = asicp->ireg_length; + if (asicp->ireg_length < (*modpp)->smallest_reg || + (*modpp)->smallest_reg == 0) + (*modpp)->smallest_reg = asicp->ireg_length; + CDEBUG(("asic 0x%x, ireg_length=%d, bit_location=%d\n", + asicp->asic_id, asicp->ireg_length, + asicp->bit_location)); + if(asicp->asic_id == VOYAGER_QUAD_QABC) { + CDEBUG(("VOYAGER CAT: QABC ASIC found\n")); + qabc_asic = asicp; + } + sp_offset += sizeof(voyager_sp_table_t); + } + CDEBUG(("Module inst_bits = %d, largest_reg = %d, smallest_reg=%d\n", + (*modpp)->inst_bits, (*modpp)->largest_reg, + (*modpp)->smallest_reg)); + /* OK, now we have the QUAD ASICs set up, use them. + * we need to: + * + * 1. Find the Memory area for the Quad CPIs. + * 2. Find the Extended VIC processor + * 3. Configure a second extended VIC processor (This + * cannot be done for the 51xx. + * */ + outb(VOYAGER_CAT_RUN, CAT_CMD); + cat_connect(*modpp, (*modpp)->asic); + CDEBUG(("CAT CONNECTED!!\n")); + cat_subread(*modpp, qabc_asic, 0, sizeof(qabc_data), qabc_data); + qic_addr = qabc_data[5] << 8; + qic_addr = (qic_addr | qabc_data[6]) << 8; + qic_addr = (qic_addr | qabc_data[7]) << 8; + printk("Module \"%s\": Quad Processor Card; CPI 0x%lx, SET=0x%x\n", + cat_module_name(i), qic_addr, qabc_data[8]); +#if 0 /* plumbing fails---FIXME */ + if((qabc_data[8] & 0xf0) == 0) { + /* FIXME: 32 way 8 CPU slot monster cannot be + * plumbed this way---need to check for it */ + + printk("Plumbing second Extended Quad Processor\n"); + /* second VIC line hardwired to Quad CPU 1 */ + qabc_data[8] |= 0x20; + cat_subwrite(*modpp, qabc_asic, 8, 1, &qabc_data[8]); +#ifdef VOYAGER_CAT_DEBUG + /* verify plumbing */ + cat_subread(*modpp, qabc_asic, 8, 1, &qabc_data[8]); + if((qabc_data[8] & 0xf0) == 0) { + CDEBUG(("PLUMBING FAILED: 0x%x\n", qabc_data[8])); + } +#endif + } +#endif + + { + struct resource *res = kmalloc(sizeof(struct resource),GFP_KERNEL); + memset(res, 0, sizeof(struct resource)); + res->name = kmalloc(128, GFP_KERNEL); + sprintf((char *)res->name, "Voyager %s Quad CPI", cat_module_name(i)); + res->start = qic_addr; + res->end = qic_addr + 0x3ff; + request_resource(&iomem_resource, res); + } + + qic_addr = (unsigned long)ioremap(qic_addr, 0x400); + + for(j = 0; j < 4; j++) { + __u8 cpu; + + if(voyager_8slot) { + /* 8 slot has a different mapping, + * each slot has only one vic line, so + * 1 cpu in each slot must be < 8 */ + cpu = (i & 0x07) + j*8; + } else { + cpu = (i & 0x03) + j*4; + } + if( (qabc_data[8] & (1<next); + } + *modpp = NULL; + printk("CAT Bus Initialisation finished: extended procs 0x%x, quad procs 0x%x, allowed vic boot = 0x%x\n", voyager_extended_vic_processors, voyager_quad_processors, voyager_allowed_boot_processors); + request_resource(&ioport_resource, &vic_res); + if(voyager_quad_processors) + request_resource(&ioport_resource, &qic_res); + /* set up the front power switch */ +} + +int +voyager_cat_readb(__u8 module, __u8 asic, int reg) +{ + return 0; +} + +static int +cat_disconnect(voyager_module_t *modp, voyager_asic_t *asicp) +{ + __u8 val; + int err = 0; + + if(!modp->scan_path_connected) + return 0; + if(asicp->asic_id != VOYAGER_CAT_ID) { + CDEBUG(("cat_disconnect: ASIC is not CAT\n")); + return 1; + } + err = cat_read(modp, asicp, VOYAGER_SCANPATH, &val); + if(err) { + CDEBUG(("cat_disconnect: failed to read SCANPATH\n")); + return err; + } + val &= VOYAGER_DISCONNECT_ASIC; + err = cat_write(modp, asicp, VOYAGER_SCANPATH, val); + if(err) { + CDEBUG(("cat_disconnect: failed to write SCANPATH\n")); + return err; + } + outb(VOYAGER_CAT_END, CAT_CMD); + outb(VOYAGER_CAT_RUN, CAT_CMD); + modp->scan_path_connected = 0; + + return 0; +} + +static int +cat_connect(voyager_module_t *modp, voyager_asic_t *asicp) +{ + __u8 val; + int err = 0; + + if(modp->scan_path_connected) + return 0; + if(asicp->asic_id != VOYAGER_CAT_ID) { + CDEBUG(("cat_connect: ASIC is not CAT\n")); + return 1; + } + + err = cat_read(modp, asicp, VOYAGER_SCANPATH, &val); + if(err) { + CDEBUG(("cat_connect: failed to read SCANPATH\n")); + return err; + } + val |= VOYAGER_CONNECT_ASIC; + err = cat_write(modp, asicp, VOYAGER_SCANPATH, val); + if(err) { + CDEBUG(("cat_connect: failed to write SCANPATH\n")); + return err; + } + outb(VOYAGER_CAT_END, CAT_CMD); + outb(VOYAGER_CAT_RUN, CAT_CMD); + modp->scan_path_connected = 1; + + return 0; +} + +void +voyager_cat_power_off(void) +{ + /* Power the machine off by writing to the PSI over the CAT + * bus */ + __u8 data; + voyager_module_t psi = { 0 }; + voyager_asic_t psi_asic = { 0 }; + + psi.asic = &psi_asic; + psi.asic->asic_id = VOYAGER_CAT_ID; + psi.asic->subaddr = VOYAGER_SUBADDR_HI; + psi.module_addr = VOYAGER_PSI; + psi.scan_path_connected = 0; + + outb(VOYAGER_CAT_END, CAT_CMD); + /* Connect the PSI to the CAT Bus */ + outb(VOYAGER_CAT_DESELECT, VOYAGER_CAT_CONFIG_PORT); + outb(VOYAGER_PSI, VOYAGER_CAT_CONFIG_PORT); + outb(VOYAGER_CAT_RUN, CAT_CMD); + cat_disconnect(&psi, &psi_asic); + /* Read the status */ + cat_subread(&psi, &psi_asic, VOYAGER_PSI_GENERAL_REG, 1, &data); + outb(VOYAGER_CAT_END, CAT_CMD); + CDEBUG(("PSI STATUS 0x%x\n", data)); + /* These two writes are power off prep and perform */ + data = PSI_CLEAR; + outb(VOYAGER_CAT_RUN, CAT_CMD); + cat_subwrite(&psi, &psi_asic, VOYAGER_PSI_GENERAL_REG, 1, &data); + outb(VOYAGER_CAT_END, CAT_CMD); + data = PSI_POWER_DOWN; + outb(VOYAGER_CAT_RUN, CAT_CMD); + cat_subwrite(&psi, &psi_asic, VOYAGER_PSI_GENERAL_REG, 1, &data); + outb(VOYAGER_CAT_END, CAT_CMD); +} + +struct voyager_status voyager_status = { 0 }; + +void +voyager_cat_psi(__u8 cmd, __u16 reg, __u8 *data) +{ + voyager_module_t psi = { 0 }; + voyager_asic_t psi_asic = { 0 }; + + psi.asic = &psi_asic; + psi.asic->asic_id = VOYAGER_CAT_ID; + psi.asic->subaddr = VOYAGER_SUBADDR_HI; + psi.module_addr = VOYAGER_PSI; + psi.scan_path_connected = 0; + + outb(VOYAGER_CAT_END, CAT_CMD); + /* Connect the PSI to the CAT Bus */ + outb(VOYAGER_CAT_DESELECT, VOYAGER_CAT_CONFIG_PORT); + outb(VOYAGER_PSI, VOYAGER_CAT_CONFIG_PORT); + outb(VOYAGER_CAT_RUN, CAT_CMD); + cat_disconnect(&psi, &psi_asic); + switch(cmd) { + case VOYAGER_PSI_READ: + cat_read(&psi, &psi_asic, reg, data); + break; + case VOYAGER_PSI_WRITE: + cat_write(&psi, &psi_asic, reg, *data); + break; + case VOYAGER_PSI_SUBREAD: + cat_subread(&psi, &psi_asic, reg, 1, data); + break; + case VOYAGER_PSI_SUBWRITE: + cat_subwrite(&psi, &psi_asic, reg, 1, data); + break; + default: + printk(KERN_ERR "Voyager PSI, unrecognised command %d\n", cmd); + break; + } + outb(VOYAGER_CAT_END, CAT_CMD); +} + +void +voyager_cat_do_common_interrupt(void) +{ + /* This is caused either by a memory parity error or something + * in the PSI */ + __u8 data; + voyager_module_t psi = { 0 }; + voyager_asic_t psi_asic = { 0 }; + struct voyager_psi psi_reg; + int i; + re_read: + psi.asic = &psi_asic; + psi.asic->asic_id = VOYAGER_CAT_ID; + psi.asic->subaddr = VOYAGER_SUBADDR_HI; + psi.module_addr = VOYAGER_PSI; + psi.scan_path_connected = 0; + + outb(VOYAGER_CAT_END, CAT_CMD); + /* Connect the PSI to the CAT Bus */ + outb(VOYAGER_CAT_DESELECT, VOYAGER_CAT_CONFIG_PORT); + outb(VOYAGER_PSI, VOYAGER_CAT_CONFIG_PORT); + outb(VOYAGER_CAT_RUN, CAT_CMD); + cat_disconnect(&psi, &psi_asic); + /* Read the status. NOTE: Need to read *all* the PSI regs here + * otherwise the cmn int will be reasserted */ + for(i = 0; i < sizeof(psi_reg.regs); i++) { + cat_read(&psi, &psi_asic, i, &((__u8 *)&psi_reg.regs)[i]); + } + outb(VOYAGER_CAT_END, CAT_CMD); + if((psi_reg.regs.checkbit & 0x02) == 0) { + psi_reg.regs.checkbit |= 0x02; + cat_write(&psi, &psi_asic, 5, psi_reg.regs.checkbit); + printk("VOYAGER RE-READ PSI\n"); + goto re_read; + } + outb(VOYAGER_CAT_RUN, CAT_CMD); + for(i = 0; i < sizeof(psi_reg.subregs); i++) { + /* This looks strange, but the PSI doesn't do auto increment + * correctly */ + cat_subread(&psi, &psi_asic, VOYAGER_PSI_SUPPLY_REG + i, + 1, &((__u8 *)&psi_reg.subregs)[i]); + } + outb(VOYAGER_CAT_END, CAT_CMD); +#ifdef VOYAGER_CAT_DEBUG + printk("VOYAGER PSI: "); + for(i=0; i +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +int reboot_smp = 0; + +/* TLB state -- visible externally, indexed physically */ +struct tlb_state cpu_tlbstate[NR_CPUS] __cacheline_aligned = {[0 ... NR_CPUS-1] = { &init_mm, 0 }}; + +/* CPU IRQ affinity -- set to all ones initially */ +static unsigned long cpu_irq_affinity[NR_CPUS] __cacheline_aligned = { [0 ... NR_CPUS-1] = ~0UL }; + +/* Set when the idlers are all forked - Set in main.c but not actually + * used by any other parts of the kernel */ +int smp_threads_ready = 0; + +/* per CPU data structure (for /proc/cpuinfo et al), visible externally + * indexed physically */ +struct cpuinfo_x86 cpu_data[NR_CPUS] __cacheline_aligned; + +/* physical ID of the CPU used to boot the system */ +unsigned char boot_cpu_id; + +/* The memory line addresses for the Quad CPIs */ +struct voyager_qic_cpi *voyager_quad_cpi_addr[NR_CPUS] __cacheline_aligned; + +/* The masks for the Extended VIC processors, filled in by cat_init */ +__u32 voyager_extended_vic_processors = 0; + +/* Masks for the extended Quad processors which cannot be VIC booted */ +__u32 voyager_allowed_boot_processors = 0; + +/* The mask for the Quad Processors (both extended and non-extended) */ +__u32 voyager_quad_processors = 0; + +/* Total count of live CPUs, used in process.c to display + * the CPU information and in irq.c for the per CPU irq + * activity count. Finally exported by i386_ksyms.c */ +static int voyager_extended_cpus = 1; + +/* Have we found an SMP box - used by time.c to do the profiling + interrupt for timeslicing; do not set to 1 until the per CPU timer + interrupt is active */ +int smp_found_config = 0; + +/* Used for the invalidate map that's also checked in the spinlock */ +volatile unsigned long smp_invalidate_needed; + +/* Bitmask of currently online CPUs - used by setup.c for + /proc/cpuinfo, visible externally but still physical */ +unsigned long cpu_online_map = 0; + +/* Bitmask of CPUs present in the system - exported by i386_syms.c, used + * by scheduler but indexed physically */ +unsigned long phys_cpu_present_map = 0; + +/* estimate of time used to flush the SMP-local cache - used in + * processor affinity calculations */ +cycles_t cacheflush_time = 0; + +/* cache decay ticks for scheduler---a fairly useless quantity for the + voyager system with its odd affinity and huge L3 cache */ +unsigned long cache_decay_ticks = 20; + + +/* The internal functions */ +static void send_CPI(__u32 cpuset, __u8 cpi); +static void ack_CPI(__u8 cpi); +static int ack_QIC_CPI(__u8 cpi); +static void ack_special_QIC_CPI(__u8 cpi); +static void ack_VIC_CPI(__u8 cpi); +static void send_CPI_allbutself(__u8 cpi); +static void enable_vic_irq(unsigned int irq); +static void disable_vic_irq(unsigned int irq); +static unsigned int startup_vic_irq(unsigned int irq); +static void enable_local_vic_irq(unsigned int irq); +static void disable_local_vic_irq(unsigned int irq); +static void before_handle_vic_irq(unsigned int irq); +static void after_handle_vic_irq(unsigned int irq); +static void set_vic_irq_affinity(unsigned int irq, unsigned long mask); +static void ack_vic_irq(unsigned int irq); +static void vic_enable_cpi(void); +static void do_boot_cpu(__u8 cpuid); +static void do_quad_bootstrap(void); +static inline void wrapper_smp_local_timer_interrupt(struct pt_regs *); + +int hard_smp_processor_id(void); + +/* Inline functions */ +static inline void +send_one_QIC_CPI(__u8 cpu, __u8 cpi) +{ + voyager_quad_cpi_addr[cpu]->qic_cpi[cpi].cpi = + (smp_processor_id() << 16) + cpi; +} + +static inline void +send_QIC_CPI(__u32 cpuset, __u8 cpi) +{ + int mask; + __u8 cpu; + + for_each_cpu(cpu, mask) { + if(cpuset & (1<>3 &0x7 on the 32 way */ + if(((cpuid >> 2) & 0x03) == i) + /* don't lower our own mask! */ + continue; + + /* masquerade as local Quad CPU */ + outb(QIC_CPUID_ENABLE | i, QIC_PROCESSOR_ID); + /* enable the startup CPI */ + outb(QIC_BOOT_CPI_MASK, QIC_MASK_REGISTER1); + /* restore cpu id */ + outb(0, QIC_PROCESSOR_ID); + } + local_irq_restore(flags); + } +} + + +/* Set up all the basic stuff: read the SMP config and make all the + * SMP information reflect only the boot cpu. All others will be + * brought on-line later. */ +void __init +find_smp_config(void) +{ + int i; + + boot_cpu_id = hard_smp_processor_id(); + + printk("VOYAGER SMP: Boot cpu is %d\n", boot_cpu_id); + + /* initialize the CPU structures (moved from smp_boot_cpus) */ + for(i=0; icpu = boot_cpu_id; +} + +/* + * The bootstrap kernel entry code has set these up. Save them + * for a given CPU, id is physical */ +void __init +smp_store_cpu_info(int id) +{ + struct cpuinfo_x86 *c=&cpu_data[id]; + + *c = boot_cpu_data; + identify_cpu(c); +} + +/* set up the trampoline and return the physical address of the code */ +static __u32 __init +setup_trampoline(void) +{ + /* these two are global symbols in trampoline.S */ + extern __u8 trampoline_end[]; + extern __u8 trampoline_data[]; + + memcpy((__u8 *)trampoline_base, trampoline_data, + trampoline_end - trampoline_data); + return virt_to_phys((__u8 *)trampoline_base); +} + +/* Routine initially called when a non-boot CPU is brought online */ +int __init +start_secondary(void *unused) +{ + __u8 cpuid = hard_smp_processor_id(); + /* external functions not defined in the headers */ + extern void calibrate_delay(void); + extern int cpu_idle(void); + + cpu_init(); + + /* OK, we're in the routine */ + ack_CPI(VIC_CPU_BOOT_CPI); + + /* setup the 8259 master slave pair belonging to this CPU --- + * we won't actually receive any until the boot CPU + * relinquishes it's static routing mask */ + vic_setup_pic(); + + qic_setup(); + + if(is_cpu_quad() && !is_cpu_vic_boot()) { + /* clear the boot CPI */ + __u8 dummy; + + dummy = voyager_quad_cpi_addr[cpuid]->qic_cpi[VIC_CPU_BOOT_CPI].cpi; + printk("read dummy %d\n", dummy); + } + + /* lower the mask to receive CPIs */ + vic_enable_cpi(); + + VDEBUG(("VOYAGER SMP: CPU%d, stack at about %p\n", cpuid, &cpuid)); + + /* enable interrupts */ + local_irq_enable(); + + /* get our bogomips */ + calibrate_delay(); + + /* save our processor parameters */ + smp_store_cpu_info(cpuid); + + /* if we're a quad, we may need to bootstrap other CPUs */ + do_quad_bootstrap(); + + set_bit(cpuid, &cpu_callin_map); + + /* signal that we're done */ + cpu_booted_map = 1; + + while (!test_bit(cpuid, &smp_commenced_mask)) + rep_nop(); + + local_flush_tlb(); + + set_bit(cpuid, &cpu_online_map); + wmb(); + return cpu_idle(); +} + +static struct task_struct * __init +fork_by_hand(void) +{ + struct pt_regs regs; + /* don't care about the eip and regs settings since we'll + * never reschedule the forked task. */ + return do_fork(CLONE_VM|CLONE_IDLETASK, 0, ®s, 0, NULL); +} + + +/* Routine to kick start the given CPU and wait for it to report ready + * (or timeout in startup). When this routine returns, the requested + * CPU is either fully running and configured or known to be dead. + * + * We call this routine sequentially 1 CPU at a time, so no need for + * locking */ + +static void __init +do_boot_cpu(__u8 cpu) +{ + struct task_struct *idle; + int timeout; + unsigned long flags; + int quad_boot = (1<> 4) & 0xFFFF; + + cpucount++; + idle = fork_by_hand(); + if(IS_ERR(idle)) + panic("failed fork for CPU%d", cpu); + + init_idle(idle, cpu); + + idle->thread.eip = (unsigned long) start_secondary; + unhash_process(idle); + /* init_tasks (in sched.c) is indexed logically */ +#if 0 + // for AC kernels + stack_start.esp = (THREAD_SIZE + (__u8 *)TSK_TO_KSTACK(idle)); +#else + stack_start.esp = (void *) (1024 + PAGE_SIZE + (char *)idle->thread_info); +#endif + /* Note: Don't modify initial ss override */ + VDEBUG(("VOYAGER SMP: Booting CPU%d at 0x%lx[%x:%x], stack %p\n", cpu, + (unsigned long)hijack_source.val, hijack_source.idt.Segment, + hijack_source.idt.Offset, stack_start.esp)); + /* set the original swapper_pg_dir[0] to map 0 to 4Mb transparently + * (so that the booting CPU can find start_32 */ + orig_swapper_pg_dir0 = swapper_pg_dir[0]; +#ifdef CONFIG_M486 + if(page_table_copies == NULL) + panic("No free memory for 486 page tables\n"); + for(i = 0; i < PAGE_SIZE/sizeof(unsigned long); i++) + page_table_copies[i] = (i * PAGE_SIZE) + | _PAGE_RW | _PAGE_USER | _PAGE_PRESENT; + + ((unsigned long *)swapper_pg_dir)[0] = + ((virt_to_phys(page_table_copies)) & PAGE_MASK) + | _PAGE_RW | _PAGE_USER | _PAGE_PRESENT; +#else + ((unsigned long *)swapper_pg_dir)[0] = 0x102007; +#endif + + if(quad_boot) { + printk("CPU %d: non extended Quad boot\n", cpu); + hijack_vector = (__u32 *)phys_to_virt((VIC_CPU_BOOT_CPI + QIC_DEFAULT_CPI_BASE)*4); + *hijack_vector = hijack_source.val; + } else { + printk("CPU%d: extended VIC boot\n", cpu); + hijack_vector = (__u32 *)phys_to_virt((VIC_CPU_BOOT_CPI + VIC_DEFAULT_CPI_BASE)*4); + *hijack_vector = hijack_source.val; + /* VIC errata, may also receive interrupt at this address */ + hijack_vector = (__u32 *)phys_to_virt((VIC_CPU_BOOT_ERRATA_CPI + VIC_DEFAULT_CPI_BASE)*4); + *hijack_vector = hijack_source.val; + } + /* All non-boot CPUs start with interrupts fully masked. Need + * to lower the mask of the CPI we're about to send. We do + * this in the VIC by masquerading as the processor we're + * about to boot and lowering its interrupt mask */ + local_irq_save(flags); + if(quad_boot) { + send_one_QIC_CPI(cpu, VIC_CPU_BOOT_CPI); + } else { + outb(VIC_CPU_MASQUERADE_ENABLE | cpu, VIC_PROCESSOR_ID); + /* here we're altering registers belonging to `cpu' */ + + outb(VIC_BOOT_INTERRUPT_MASK, 0x21); + /* now go back to our original identity */ + outb(boot_cpu_id, VIC_PROCESSOR_ID); + + /* and boot the CPU */ + + send_CPI((1<thread.esp),"r" (current->thread.eip)); +} + +/* handle a Voyager SYS_INT -- If we don't, the base board will + * panic the system. + * + * System interrupts occur because some problem was detected on the + * various busses. To find out what you have to probe all the + * hardware via the CAT bus. FIXME: At the moment we do nothing. */ +asmlinkage void +smp_vic_sys_interrupt(void) +{ + ack_CPI(VIC_SYS_INT); + printk("Voyager SYSTEM INTERRUPT\n"); +} + +/* Handle a voyager CMN_INT; These interrupts occur either because of + * a system status change or because a single bit memory error + * occurred. FIXME: At the moment, ignore all this. */ +asmlinkage void +smp_vic_cmn_interrupt(void) +{ + static __u8 in_cmn_int = 0; + static spinlock_t cmn_int_lock = SPIN_LOCK_UNLOCKED; + + /* common ints are broadcast, so make sure we only do this once */ + _raw_spin_lock(&cmn_int_lock); + if(in_cmn_int) + goto unlock_end; + + in_cmn_int++; + _raw_spin_unlock(&cmn_int_lock); + + VDEBUG(("Voyager COMMON INTERRUPT\n")); + + if(voyager_level == 5) + voyager_cat_do_common_interrupt(); + + _raw_spin_lock(&cmn_int_lock); + in_cmn_int = 0; + unlock_end: + _raw_spin_unlock(&cmn_int_lock); + ack_CPI(VIC_CMN_INT); +} + +/* + * Reschedule call back. Nothing to do, all the work is done + * automatically when we return from the interrupt. */ +asmlinkage void +smp_reschedule_interrupt(void) +{ + /* do nothing */ +} + +static struct mm_struct * flush_mm; +static unsigned long flush_va; +static spinlock_t tlbstate_lock = SPIN_LOCK_UNLOCKED; +#define FLUSH_ALL 0xffffffff + +/* + * We cannot call mmdrop() because we are in interrupt context, + * instead update mm->cpu_vm_mask. + * + * We need to reload %cr3 since the page tables may be going + * away from under us.. + */ +static void inline +leave_mm (unsigned long cpu) +{ + if (cpu_tlbstate[cpu].state == TLBSTATE_OK) + BUG(); + clear_bit(cpu, &cpu_tlbstate[cpu].active_mm->cpu_vm_mask); + load_cr3(swapper_pg_dir); +} + + +/* + * Invalidate call-back + */ +asmlinkage void +smp_invalidate_interrupt(void) +{ + __u8 cpu = get_cpu(); + + if(!test_bit(cpu, &smp_invalidate_needed)) + goto out; + /* This will flood messages. Don't uncomment unless you see + * Problems with cross cpu invalidation + VDEBUG(("VOYAGER SMP: CPU%d received INVALIDATE_CPI\n", + smp_processor_id())); + */ + + if (flush_mm == cpu_tlbstate[cpu].active_mm) { + if (cpu_tlbstate[cpu].state == TLBSTATE_OK) { + if (flush_va == FLUSH_ALL) + local_flush_tlb(); + else + __flush_tlb_one(flush_va); + } else + leave_mm(cpu); + } + clear_bit(cpu, &smp_invalidate_needed); + out: + put_cpu_no_resched(); +} + +/* All the new flush operations for 2.4 */ + + +/* This routine is called with a physical cpu mask */ +static void +flush_tlb_others (unsigned long cpumask, struct mm_struct *mm, + unsigned long va) +{ + int stuck = 50000; + + if (!cpumask) + BUG(); + if ((cpumask & cpu_online_map) != cpumask) + BUG(); + if (cpumask & (1 << smp_processor_id())) + BUG(); + if (!mm) + BUG(); + + spin_lock(&tlbstate_lock); + + flush_mm = mm; + flush_va = va; + atomic_set_mask(cpumask, &smp_invalidate_needed); + /* + * We have to send the CPI only to + * CPUs affected. + */ + send_CPI(cpumask, VIC_INVALIDATE_CPI); + + while (smp_invalidate_needed) { + if(--stuck == 0) { + printk("***WARNING*** Stuck doing invalidate CPI (CPU%d)\n", smp_processor_id()); + break; + } + } + + /* Uncomment only to debug invalidation problems + VDEBUG(("VOYAGER SMP: Completed invalidate CPI (CPU%d)\n", cpu)); + */ + + flush_mm = NULL; + flush_va = 0; + spin_unlock(&tlbstate_lock); +} + +void +flush_tlb_current_task(void) +{ + struct mm_struct *mm = current->mm; + unsigned long cpu_mask; + + preempt_disable(); + + cpu_mask = mm->cpu_vm_mask & ~(1 << smp_processor_id()); + local_flush_tlb(); + if (cpu_mask) + flush_tlb_others(cpu_mask, mm, FLUSH_ALL); + + preempt_enable(); +} + + +void +flush_tlb_mm (struct mm_struct * mm) +{ + unsigned long cpu_mask; + + preempt_disable(); + + cpu_mask = mm->cpu_vm_mask & ~(1 << smp_processor_id()); + + if (current->active_mm == mm) { + if (current->mm) + local_flush_tlb(); + else + leave_mm(smp_processor_id()); + } + if (cpu_mask) + flush_tlb_others(cpu_mask, mm, FLUSH_ALL); + + preempt_enable(); +} + +void flush_tlb_page(struct vm_area_struct * vma, unsigned long va) +{ + struct mm_struct *mm = vma->vm_mm; + unsigned long cpu_mask; + + preempt_disable(); + + cpu_mask = mm->cpu_vm_mask & ~(1 << smp_processor_id()); + if (current->active_mm == mm) { + if(current->mm) + __flush_tlb_one(va); + else + leave_mm(smp_processor_id()); + } + + if (cpu_mask) + flush_tlb_others(cpu_mask, mm, va); + + preempt_enable(); +} + +/* enable the requested IRQs */ +asmlinkage void +smp_enable_irq_interrupt(void) +{ + __u8 irq; + __u8 cpu = get_cpu(); + + VDEBUG(("VOYAGER SMP: CPU%d enabling irq mask 0x%x\n", cpu, + vic_irq_enable_mask[cpu])); + + spin_lock(&vic_irq_lock); + for(irq = 0; irq < 16; irq++) { + if(vic_irq_enable_mask[cpu] & (1<func; + void *info = call_data->info; + /* must take copy of wait because call_data may be replaced + * unless the function is waiting for us to finish */ + int wait = call_data->wait; + __u8 cpu = smp_processor_id(); + + /* + * Notify initiating CPU that I've grabbed the data and am + * about to execute the function + */ + mb(); + if(!test_and_clear_bit(cpu, &call_data->started)) { + /* If the bit wasn't set, this could be a replay */ + printk(KERN_WARNING "VOYAGER SMP: CPU %d received call funtion with no call pending\n", cpu); + return; + } + /* + * At this point the info structure may be out of scope unless wait==1 + */ + irq_enter(); + (*func)(info); + irq_exit(); + if (wait) { + mb(); + clear_bit(cpu, &call_data->finished); + } +} + +/* Call this function on all CPUs using the function_interrupt above + The function to run. This must be fast and non-blocking. + An arbitrary pointer to pass to the function. + If true, keep retrying until ready. + If true, wait until function has completed on other CPUs. + [RETURNS] 0 on success, else a negative status code. Does not return until + remote CPUs are nearly ready to execute <> or are or have executed. +*/ +int +smp_call_function (void (*func) (void *info), void *info, int retry, + int wait) +{ + struct call_data_struct data; + __u32 mask = cpu_online_map; + + mask &= ~(1<= 0x93000) + BUG(); +} + +/* send a reschedule CPI to one CPU by physical CPU number*/ +void +smp_send_reschedule(int cpu) +{ + send_one_CPI(cpu, VIC_RESCHEDULE_CPI); +} + + +int +hard_smp_processor_id(void) +{ + __u8 i; + __u8 cpumask = inb(VIC_PROC_WHO_AM_I); + if((cpumask & QUAD_IDENTIFIER) == QUAD_IDENTIFIER) + return cpumask & 0x1F; + + for(i = 0; i < 8; i++) { + if(cpumask & (1<eip); + + if (--prof_counter[cpu] <= 0) { + /* + * The multiplier may have changed since the last time we got + * to this point as a result of the user writing to + * /proc/profile. In this case we need to adjust the APIC + * timer accordingly. + * + * Interrupts are already masked off at this point. + */ + prof_counter[cpu] = prof_multiplier[cpu]; + if (prof_counter[cpu] != prof_old_multiplier[cpu]) { + /* FIXME: need to update the vic timer tick here */ + prof_old_multiplier[cpu] = prof_counter[cpu]; + } + + update_process_times(user); + } + + if( ((1<1 eligible CPUs are equal lowest, the + * lowest processor number gets it. + * + * The priority of a CPU is controlled by a special per-CPU + * VIC priority register which is 3 bits wide 0 being lowest + * and 7 highest priority.. + * + * Therefore we subtract the average number of interrupts from + * the number we've fielded. If this number is negative, we + * lower the activity count and if it is positive, we raise + * it. + * + * I'm afraid this still leads to odd looking interrupt counts: + * the totals are all roughly equal, but the individual ones + * look rather skewed. + * + * FIXME: This algorithm is total crap when mixed with SMP + * affinity code since we now try to even up the interrupt + * counts when an affinity binding is keeping them on a + * particular CPU*/ + weight = (vic_intr_count[cpu]*voyager_extended_cpus + - vic_intr_total) >> 4; + weight += 4; + if(weight > 7) + weight = 7; + if(weight < 0) + weight = 0; + + outb((__u8)weight, VIC_PRIORITY_REGISTER); + +#ifdef VOYAGER_DEBUG + if((vic_tick[cpu] & 0xFFF) == 0) { + /* print this message roughly every 25 secs */ + printk("VOYAGER SMP: vic_tick[%d] = %lu, weight = %ld\n", + cpu, vic_tick[cpu], weight); + } +#endif +} + +/* setup the profiling timer */ +int +setup_profiling_timer(unsigned int multiplier) +{ + int i; + + if ( (!multiplier)) + return -EINVAL; + + /* + * Set the new multiplier for each CPU. CPUs don't start using the + * new values until the next timer interrupt in which they do process + * accounting. + */ + for (i = 0; i < NR_CPUS; ++i) + prof_multiplier[i] = multiplier; + + return 0; +} + + +/* The CPIs are handled in the per cpu 8259s, so they must be + * enabled to be received: FIX: enabling the CPIs in the early + * boot sequence interferes with bug checking; enable them later + * on in smp_init */ +#define VIC_SET_GATE(cpi, vector) \ + set_intr_gate((cpi) + VIC_DEFAULT_CPI_BASE, (vector)) +#define QIC_SET_GATE(cpi, vector) \ + set_intr_gate((cpi) + QIC_DEFAULT_CPI_BASE, (vector)) + +void __init +smp_intr_init(void) +{ + int i; + + /* initialize the per cpu irq mask to all disabled */ + for(i = 0; i < NR_CPUS; i++) + vic_irq_mask[i] = 0xFFFF; + + VIC_SET_GATE(VIC_CPI_LEVEL0, vic_cpi_interrupt); + + VIC_SET_GATE(VIC_SYS_INT, vic_sys_interrupt); + VIC_SET_GATE(VIC_CMN_INT, vic_cmn_interrupt); + + QIC_SET_GATE(QIC_TIMER_CPI, qic_timer_interrupt); + QIC_SET_GATE(QIC_INVALIDATE_CPI, qic_invalidate_interrupt); + QIC_SET_GATE(QIC_RESCHEDULE_CPI, qic_reschedule_interrupt); + QIC_SET_GATE(QIC_ENABLE_IRQ_CPI, qic_enable_irq_interrupt); + QIC_SET_GATE(QIC_CALL_FUNCTION_CPI, qic_call_function_interrupt); + + + /* now put the VIC descriptor into the first 48 IRQs + * + * This is for later: first 16 correspond to PC IRQs; next 16 + * are Primary MC IRQs and final 16 are Secondary MC IRQs */ + for(i = 0; i < 48; i++) + irq_desc[i].handler = &vic_irq_type; +} + +/* send a CPI at level cpi to a set of cpus in cpuset (set 1 bit per + * processor to recieve CPI */ +static void +send_CPI(__u32 cpuset, __u8 cpi) +{ + int mask; + __u8 cpu; + __u32 quad_cpuset = (cpuset & voyager_quad_processors); + + if(cpi < VIC_START_FAKE_CPI) { + /* fake CPI are only used for booting, so send to the + * extended quads as well---Quads must be VIC booted */ + outb((__u8)(cpuset), VIC_CPI_Registers[cpi]); + return; + } + if(quad_cpuset) + send_QIC_CPI(quad_cpuset, cpi); + cpuset &= ~quad_cpuset; + cpuset &= 0xff; /* only first 8 CPUs vaild for VIC CPI */ + if(cpuset == 0) + return; + for_each_cpu(cpu, mask) { + if(cpuset & (1<qic_cpi[cpi].cpi; +} + +static void +ack_special_QIC_CPI(__u8 cpi) +{ + switch(cpi) { + case VIC_CMN_INT: + outb(QIC_CMN_INT, QIC_INTERRUPT_CLEAR0); + break; + case VIC_SYS_INT: + outb(QIC_SYS_INT, QIC_INTERRUPT_CLEAR0); + break; + } + /* also clear at the VIC, just in case (nop for non-extended proc) */ + ack_VIC_CPI(cpi); +} + +/* Acknowledge receipt of CPI in the VIC (essentially an EOI) */ +static void +ack_VIC_CPI(__u8 cpi) +{ +#ifdef VOYAGER_DEBUG + unsigned long flags; + __u16 isr; + __u8 cpu = smp_processor_id(); + + local_irq_save(flags); + isr = vic_read_isr(); + if((isr & (1<<(cpi &7))) == 0) { + printk("VOYAGER SMP: CPU%d lost CPI%d\n", cpu, cpi); + } +#endif + /* send specific EOI; the two system interrupts have + * bit 4 set for a separate vector but behave as the + * corresponding 3 bit intr */ + outb_p(0x60|(cpi & 7),0x20); + +#ifdef VOYAGER_DEBUG + if((vic_read_isr() & (1<<(cpi &7))) != 0) { + printk("VOYAGER SMP: CPU%d still asserting CPI%d\n", cpu, cpi); + } + local_irq_restore(flags); +#endif +} + +/* cribbed with thanks from irq.c */ +#define __byte(x,y) (((unsigned char *)&(y))[x]) +#define cached_21(cpu) (__byte(0,vic_irq_mask[cpu])) +#define cached_A1(cpu) (__byte(1,vic_irq_mask[cpu])) + +static unsigned int +startup_vic_irq(unsigned int irq) +{ + enable_vic_irq(irq); + + return 0; +} + +/* The enable and disable routines. This is where we run into + * conflicting architectural philosophy. Fundamentally, the voyager + * architecture does not expect to have to disable interrupts globally + * (the IRQ controllers belong to each CPU). The processor masquerade + * which is used to start the system shouldn't be used in a running OS + * since it will cause great confusion if two separate CPUs drive to + * the same IRQ controller (I know, I've tried it). + * + * The solution is a variant on the NCR lazy SPL design: + * + * 1) To disable an interrupt, do nothing (other than set the + * IRQ_DISABLED flag). This dares the interrupt actually to arrive. + * + * 2) If the interrupt dares to come in, raise the local mask against + * it (this will result in all the CPU masks being raised + * eventually). + * + * 3) To enable the interrupt, lower the mask on the local CPU and + * broadcast an Interrupt enable CPI which causes all other CPUs to + * adjust their masks accordingly. */ + +static void +enable_vic_irq(unsigned int irq) +{ + int tmpmask; + /* linux doesn't to processor-irq affinity, so enable on + * all CPUs we know about */ + __u8 cpu = smp_processor_id(), real_cpu; + __u16 mask = (1<status |= IRQ_REPLAY | IRQ_INPROGRESS; + } else if(desc->status & IRQ_DISABLED) { + /* Damn, the interrupt actually arrived, do the lazy + * disable thing. The interrupt routine in irq.c will + * not handle a IRQ_DISABLED interrupt, so nothing more + * need be done here */ + VDEBUG(("VOYAGER DEBUG: lazy disable of irq %d on CPU %d\n", + irq, cpu)); + disable_local_vic_irq(irq); + desc->status |= IRQ_REPLAY; + } else { + desc->status &= ~IRQ_REPLAY; + } + + _raw_spin_unlock(&vic_irq_lock); +} + +/* Finish the VIC interrupt: basically mask */ +static void +after_handle_vic_irq(unsigned int irq) +{ + irq_desc_t *desc = irq_desc + irq; + + _raw_spin_lock(&vic_irq_lock); + { + unsigned int status = desc->status & ~IRQ_INPROGRESS; +#ifdef VOYAGER_DEBUG + __u16 isr; +#endif + + desc->status = status; + if ((status & IRQ_DISABLED)) + disable_local_vic_irq(irq); +#ifdef VOYAGER_DEBUG + /* DEBUG: before we ack, check what's in progress */ + isr = vic_read_isr(); + if((isr & (1<status &= ~(IRQ_REPLAY | IRQ_INPROGRESS); + } +#ifdef VOYAGER_DEBUG + isr = vic_read_isr(); + if((isr & (1<= 32) + /* You can only have 32 interrupts in a voyager system + * (and 32 only if you have a secondary microchannel + * bus) */ + return; + + for_each_cpu(cpu, tmpmask) { + unsigned long cpu_mask = (1< +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#define THREAD_NAME "kvoyagerd" + +/* external variables */ +int kvoyagerd_running = 0; +DECLARE_MUTEX_LOCKED(kvoyagerd_sem); + +static int thread(void *); + +static __u8 set_timeout = 0; + +/* Start the machine monitor thread. Return 1 if OK, 0 if fail */ +static int __init +voyager_thread_start(void) +{ + if(kernel_thread(thread, NULL, CLONE_KERNEL) < 0) { + /* This is serious, but not fatal */ + printk(KERN_ERR "Voyager: Failed to create system monitor thread!!!\n"); + return 1; + } + return 0; +} + +static int +execute_helper(void *string) +{ + int ret; + + char *envp[] = { + "HOME=/", + "TERM=linux", + "PATH=/sbin:/usr/sbin:/bin:/usr/bin", + NULL, + }; + char *argv[] = { + "/bin/bash", + "-c", + (char *)string, + NULL, + }; + + if((ret = exec_usermodehelper(argv[0], argv, envp)) < 0) { + printk(KERN_ERR "Voyager failed to execute \"%s\"\n", + (char *)string); + } + return ret; +} + +static void +execute(char *string) +{ + if(kernel_thread(execute_helper, (void *)string, CLONE_VFORK | SIGCHLD) < 0) { + printk(KERN_ERR "Voyager failed to fork before exec of \"%s\"\n", + string); + } +} + +static void +check_from_kernel(void) +{ + if(voyager_status.switch_off) { + + /* FIXME: This should be configureable via proc */ + execute("umask 600; echo 0 > /etc/initrunlvl; kill -HUP 1"); + } else if(voyager_status.power_fail) { + VDEBUG(("Voyager daemon detected AC power failure\n")); + + /* FIXME: This should be configureable via proc */ + execute("umask 600; echo F > /etc/powerstatus; kill -PWR 1"); + set_timeout = 1; + } +} + +static void +check_continuing_condition(void) +{ + if(voyager_status.power_fail) { + __u8 data; + voyager_cat_psi(VOYAGER_PSI_SUBREAD, + VOYAGER_PSI_AC_FAIL_REG, &data); + if((data & 0x1f) == 0) { + /* all power restored */ + printk(KERN_NOTICE "VOYAGER AC power restored, cancelling shutdown\n"); + /* FIXME: should be user configureable */ + execute("umask 600; echo O > /etc/powerstatus; kill -PWR 1"); + set_timeout = 0; + } + } +} + +static void +wakeup(unsigned long unused) +{ + up(&kvoyagerd_sem); +} + +static int +thread(void *unused) +{ + struct timer_list wakeup_timer; + + kvoyagerd_running = 1; + + reparent_to_init(); + daemonize(); + + set_timeout = 0; + + init_timer(&wakeup_timer); + + strcpy(current->comm, THREAD_NAME); + sigfillset(¤t->blocked); + current->tty = NULL; /* get rid of controlling tty */ + + printk(KERN_NOTICE "Voyager starting monitor thread\n"); + + for(;;) { + down_interruptible(&kvoyagerd_sem); + VDEBUG(("Voyager Daemon awoken\n")); + if(voyager_status.request_from_kernel == 0) { + /* probably awoken from timeout */ + check_continuing_condition(); + } else { + check_from_kernel(); + voyager_status.request_from_kernel = 0; + } + if(set_timeout) { + del_timer(&wakeup_timer); + wakeup_timer.expires = HZ + jiffies; + wakeup_timer.function = wakeup; + add_timer(&wakeup_timer); + } + } +} + +static void __exit +voyager_thread_stop(void) +{ + /* FIXME: do nothing at the moment */ +} + +module_init(voyager_thread_start); +//module_exit(voyager_thread_stop); diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/i386/Makefile linux.2.5.40-ac2/arch/i386/Makefile --- linux.2.5.40/arch/i386/Makefile 2002-10-02 21:33:55.000000000 +0100 +++ linux.2.5.40-ac2/arch/i386/Makefile 2002-10-02 21:41:29.000000000 +0100 @@ -88,8 +88,12 @@ ifdef CONFIG_VISWS MACHINE := mach-visws else +ifdef CONFIG_VOYAGER +MACHINE := mach-voyager +else MACHINE := mach-generic endif +endif HEAD := arch/i386/kernel/head.o arch/i386/kernel/init_task.o diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/Boards.mk linux.2.5.40-ac2/arch/m68knommu/Boards.mk --- linux.2.5.40/arch/m68knommu/Boards.mk 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/Boards.mk 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,140 @@ +# Put definitions for platforms and boards in here. + +ifdef CONFIG_M68328 +PLATFORM := 68328 +ifdef CONFIG_PILOT +BOARD := pilot +endif +endif + +ifdef CONFIG_M68EZ328 +PLATFORM := 68EZ328 +ifdef CONFIG_PILOT +BOARD := PalmV +endif +ifdef CONFIG_UCSIMM +BOARD := ucsimm +endif +ifdef CONFIG_ALMA_ANS +BOARD := alma_ans +endif +ifdef CONFIG_M68EZ328ADS +BOARD := ads +endif +endif + +#(es) +ifdef CONFIG_M68VZ328 +PLATFORM := 68VZ328 +ifdef CONFIG_UCDIMM +BOARD := ucdimm +endif +ifdef CONFIG_DRAGEN2 +BOARD := de2 +endif +endif +#(/es) + +ifdef CONFIG_M68332 +PLATFORM := 68332 +endif + +ifdef CONFIG_M68EN302 +PLATFORM := 68EN302 +endif + +ifdef CONFIG_M68360 +PLATFORM := 68360 +BOARD :=uCquicc +endif + +ifdef CONFIG_M5204 +PLATFORM := 5204 +BOARD := SBC5204 +endif + +ifdef CONFIG_M5206 +PLATFORM := 5206 +BOARD := ARNEWSH +endif + +ifdef CONFIG_M5206e +PLATFORM := 5206e +ifdef CONFIG_MOTOROLA +BOARD := MOTOROLA +endif +ifdef CONFIG_ELITE +BOARD := eLITE +endif +ifdef CONFIG_NETtel +BOARD := NETtel +endif +ifdef CONFIG_TELOS +BOARD := toolvox +endif +ifdef CONFIG_CFV240 +BOARD := CFV240 +endif +endif + +ifdef CONFIG_M5249 +PLATFORM := 5249 +ifdef CONFIG_MOTOROLA +BOARD := MOTOROLA +endif +endif + +ifdef CONFIG_M5272 +PLATFORM := 5272 +ifdef CONFIG_MOTOROLA +BOARD := MOTOROLA +endif +ifdef CONFIG_NETtel +BOARD := NETtel +endif +ifdef CONFIG_MARCONINAP +BOARD := NAP +endif +ifdef CONFIG_senTec +BOARD := senTec +endif +endif + +ifdef CONFIG_M5307 +PLATFORM := 5307 +ifdef CONFIG_ARNEWSH +BOARD := ARNEWSH +endif +ifdef CONFIG_NETtel +BOARD := NETtel +endif +ifdef CONFIG_eLIA +BOARD := eLIA +endif +ifdef CONFIG_DISKtel +BOARD := DISKtel +endif +ifdef CONFIG_SECUREEDGEMP3 +BOARD := MP3 +endif +ifdef CONFIG_MOTOROLA +BOARD := MOTOROLA +endif +ifdef CONFIG_CLEOPATRA +BOARD := CLEOPATRA +endif +endif + +ifdef CONFIG_M5407 +PLATFORM := 5407 +ifdef CONFIG_MOTOROLA +BOARD := MOTOROLA +endif +ifdef CONFIG_CLEOPATRA +BOARD := CLEOPATRA +endif +endif + +export BOARD +export PLATFORM + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/boot/Makefile linux.2.5.40-ac2/arch/m68knommu/boot/Makefile --- linux.2.5.40/arch/m68knommu/boot/Makefile 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/boot/Makefile 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,5 @@ +clean: + rm -f *.[oa] + +dep depend: + : diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/Config.help linux.2.5.40-ac2/arch/m68knommu/Config.help --- linux.2.5.40/arch/m68knommu/Config.help 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/Config.help 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,310 @@ +CONFIG_UCLINUX + Build a kernel to support processors without Memory Management Units. + +CONFIG_EXPERIMENTAL + Some of the various things that Linux supports (such as network + drivers, file systems, network protocols, etc.) can be in a state + of development where the functionality, stability, or the level of + testing is not yet high enough for general use. This is usually + known as the "alpha-test" phase among developers. If a feature is + currently in alpha-test, then the developers usually discourage + uninformed widespread use of this feature by the general public to + avoid "Why doesn't this work?" type mail messages. However, active + testing and use of these systems is welcomed. Just be aware that it + may not meet the normal level of reliability or it may fail to work + in some special cases. Detailed bug reports from people familiar + with the kernel internals are usually welcomed by the developers + (before submitting bug reports, please read the documents + , , , + , and + in the kernel source). + + This option will also make obsoleted drivers available. These are + drivers that have been replaced by something else, and/or are + scheduled to be removed in a future kernel release. + + Unless you intend to help test and develop a feature or driver that + falls into this category, or you have a situation that requires + using these features, you should probably say N here, which will + cause the configurator to present you with fewer choices. If + you say Y here, you will be offered the choice of using features or + drivers that are currently considered to be in the alpha-test phase. + +CONFIG_MODULES + Kernel modules are small pieces of compiled code which can be + inserted in or removed from the running kernel, using the programs + insmod and rmmod. This is described in the file + , including the fact that you have + to say "make modules" in order to compile the modules that you chose + during kernel configuration. Modules can be device drivers, file + systems, binary executable formats, and so on. If you think that you + may want to make use of modules with this kernel in the future, then + say Y here. If unsure, say Y. + +CONFIG_MODVERSIONS + Usually, modules have to be recompiled whenever you switch to a new + kernel. Saying Y here makes it possible, and safe, to use the + same modules even after compiling a new kernel; this requires the + program modprobe. All the software needed for module support is in + the modutils package (check the file + for location and latest version). NOTE: if you say Y here but don't + have the program genksyms (which is also contained in the above + mentioned modutils package), then the building of your kernel will + fail. If you are going to use modules that are generated from + non-kernel sources, you would benefit from this option. Otherwise + it's not that important. So, N ought to be a safe bet. + +CONFIG_KMOD + Normally when you have selected some drivers and/or file systems to + be created as loadable modules, you also have the responsibility to + load the corresponding modules (using the programs insmod or + modprobe) before you can use them. If you say Y here however, the + kernel will be able to load modules for itself: when a part of the + kernel needs a module, it runs modprobe with the appropriate + arguments, thereby loading the module if it is available. (This is a + replacement for kerneld.) Say Y here and read about configuring it + in . + +CONFIG_M68000 + Choose support for the specific processor your board is based on. + This list includes many of the Motorola embeded CPU's, including + a large variety of ColdFire family members. + +CONFIG_M68EN302 + Support for the Motorola 68EN302 processor. + +CONFIG_M68328 + Support for the Motorola 68328 processor. + +CONFIG_M68EZ328 + Support for the Motorola 68EZ328 processor. + +CONFIG_M68VZ328 + Support for the Motorola 68VZ328 processor. + +CONFIG_M68332 + Support for the Motorola 68332 processor. + +CONFIG_M68360 + Support for the Motorola 68360 processor. + +CONFIG_M5204 + Support for the Motorola ColdFire 5204 processor. + +CONFIG_M5206 + Support for the Motorola ColdFire 5206 processor. + +CONFIG_M5206e + Support for the Motorola ColdFire 5206e processor. + +CONFIG_M5249 + Support for the Motorola ColdFire 5249 processor. + +CONFIG_M5272 + Support for the Motorola ColdFire 5272 processor. + +CONFIG_M5307 + Support for the Motorola ColdFire 5307 processor. + +CONFIG_M5407 + Support for the Motorola ColdFire 5407 processor. + +CONFIG_CLOCK_AUTO + Define the CPU clock frequency in use. On many boards you don't really + need to know, so you can select the AUTO option. On some boards you need + to know the real clock frequency to determine other system timing (for + example baud rate dividors, etc). Some processors have an internal PLL + and you can seletc a frequency to set that too. You need to know a little + about the internals of your processor to set this. + +CONFIG_CLOCK_11MHz + Select a CPU clock frequency of 11MHz. + +CONFIG_CLOCK_16MHz + Select a CPU clock frequency of 16MHz. + +CONFIG_CLOCK_20MHz + Select a CPU clock frequency of 20MHz. + +CONFIG_CLOCK_24MHz + Select a CPU clock frequency of 24MHz. + +CONFIG_CLOCK_25MHz + Select a CPU clock frequency of 25MHz. + +CONFIG_CLOCK_33MHz + Select a CPU clock frequency of 33MHz. + +CONFIG_CLOCK_40MHz + Select a CPU clock frequency of 40MHz. + +CONFIG_CLOCK_45MHz + Select a CPU clock frequency of 45MHz. + +CONFIG_CLOCK_48MHz + Select a CPU clock frequency of 48MHz. + +CONFIG_CLOCK_50MHz + Select a CPU clock frequency of 50MHz. + +CONFIG_CLOCK_54MHz + Select a CPU clock frequency of 54MHz. + +CONFIG_CLOCK_60MHz + Select a CPU clock frequency of 60MHz. + +CONFIG_CLOCK_66MHz + Select a CPU clock frequency of 66MHz. + +CONFIG_CLOCK_70MHz + Select a CPU clock frequency of 70MHz. + +CONFIG_CLOCK_140MHz + Select a CPU clock frequency of 140MHz. + +CONFIG_OLDMASK + Build support for the older revision ColdFire 5307 silicon. + Specifically this is the 1H55J mask revision. + +CONFIG_PILOT3 + Support for the Palm Pilot 1000/5000, Personal/Pro and PalmIII. + +CONFIG_XCOPILOT_BUGS + Support the bugs of Xcopilot. + +CONFIG_PILOT_MEMORY_DISPLAY + Dispplay the memory usage on the Pilot screen. + +CONFIG_PILOT_CONSOLE + Support for the Palm Pilot console. + +CONFIG_M68EZ328ADS + Support for the Motorola M68EZ328 ADS board. + +CONFIG_ALMA_ANS + Support for the ALMA Electronics board. + +CONFIG_UCSIMM + Support for the Arcturus Networks uCsimm module. + +CONFIG_PILOT5 + Support for the PalmV Pilot. + +CONFIG_UCDIMM + Support for the Arcturus Networks uCdimm module. + +CONFIG_DRAGEN2 + Surpport for the Dragen Engine II board. + +CONFIG_INIT_LCD + Initialize the LCD screen. + +CONFIG_MEMORY_RESERVE + Reserve certain amounts of memory on 328 based boards. + +CONFIG_APLIO_PRO + Support for the Aplio Pro board. + +CONFIG_APLIO_ENTRECOTE + Support for the Aplio Entrecote board. + +CONFIG_UCQUICC + Support for the Lineo uCquicc board. + +CONFIG_ARN5206 + Support for the Arnewsh 5206 board. + +CONFIG_M5206eC3 + Support for the Motorola M5206eC3 board. + +CONFIG_ELITE + Support for the Motorala M5206eLITE board. + +CONFIG_TELOS + Support for the Telos Omnia ToolVox board. + +CONFIG_CFV240 + Support for the Netburner CFV2-40 board. + +CONFIG_M5249C3 + Support for the Motorola M5249C3 board. + +CONFIG_M5272C3 + Support for the Motorola M5272C3 board. + +CONFIG_ARN5307 + Support for the Arnewsh 5307 board. + +CONFIG_M5307C3 + Support for the Motorola M5307C3 board. + +CONFIG_eLIA + Support for the Moreton Bay eLIA board. + +CONFIG_DISKtel + Support for the Moreton Bay DISKtel board. + +CONFIG_SECUREEDGEMP3 + Support for the SnapGear SecureEdge/MP3 platform. + +CONFIG_M5407C3 + Support for the Motorola M5407C3 board. + +CONFIG_CLEOPATRA + Support for the Feith Cleopatra boards. + +CONFIG_NETtel + Support for the SnapGear NETtel/SecureEdge/SnapGear boards. + +CONFIG_SNAPGEAR + Special additional support for SnapGear router boards. + +CONFIG_ROMFS_FROM_ROM + The ROMfs filesystem will stay resident in the FLASH/ROM, not be moved + into RAM. + +CONFIG_RAMAUTO + Configure the RAM size on your platform. Many platforms can auto detect + this, on those choose the AUTO option. Otherwise set the RAM size you + intend using. + +CONFIG_RAM4MB + Set RAM size on the board to 4MB. + +CONFIG_RAM8MB + Set RAM size on the board to 8MB. + +CONFIG_RAM16MB + Set RAM size on the board to 16MB. + +CONFIG_RAM32MB + Set RAM size on the board to 32MB. + +CONFIG_AUTOBIT + Select the physical RAM data bus size. Not needed on most platforms, + so you can generally choose AUTO. + +CONFIG_RAM8BIT + Configure RAM to be in 8bit mode. + +CONFIG_RAM16BIT + Configure RAM to be in 16bit mode. + +CONFIG_RAM32BIT + Configure RAM to be in 32bit mode. + +CONFIG_RAMKERNEL + Choose the memory type that the kernel will be running in. + +CONFIG_ROMKERNEL + The kernel will be resident in FLASH/ROM when running. + +CONFIG_HIMEMKERNEL + The kernel will be resident in high memory when running. + +CONFIG_BINFMT_FLAT + Support uClinux FLAT format binaries. + +CONFIG_BINFMT_ZFLAT + Supoprt FLAT format compressed binaries. + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/config.in linux.2.5.40-ac2/arch/m68knommu/config.in --- linux.2.5.40/arch/m68knommu/config.in 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/config.in 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,434 @@ +############################################################################# +# +# For a description of the syntax of this configuration file, +# see Documentation/kbuild/config-language.txt. +# +# based mainly on the arch/i386/config.in and bit of the 2.0, m68knommu +# config.in +# +############################################################################# + +mainmenu_name 'uClinux/68k (w/o MMU) Kernel Configuration' + +define_bool CONFIG_UCLINUX y +define_bool CONFIG_UID16 y +define_bool CONFIG_RWSEM_GENERIC_SPINLOCK y +define_bool CONFIG_RWSEM_XCHGADD_ALGORITHM n + +############################################################################# + +mainmenu_option next_comment +comment 'Code maturity level options' +bool 'Prompt for development and/or incomplete code/drivers' CONFIG_EXPERIMENTAL +endmenu + +############################################################################# + +mainmenu_option next_comment +comment 'Loadable module support' +bool 'Enable loadable module support' CONFIG_MODULES +if [ "$CONFIG_MODULES" = "y" ]; then + bool ' Set version information on all module symbols' CONFIG_MODVERSIONS + bool ' Kernel module loader' CONFIG_KMOD +fi +endmenu + +############################################################################# + +mainmenu_option next_comment +comment 'Processor type and features' + +choice 'CPU' \ + "MC68000 CONFIG_M68000 \ + MC68EN302 CONFIG_M68EN302 \ + MC68328 CONFIG_M68328 \ + MC68EZ328 CONFIG_M68EZ328 \ + MC68VZ328 CONFIG_M68VZ328 \ + MC68332 CONFIG_M68332 \ + MC68360 CONFIG_M68360 \ + MCF5204 CONFIG_M5204 \ + MCF5206 CONFIG_M5206 \ + MCF5206e CONFIG_M5206e \ + MCF5249 CONFIG_M5249 \ + MCF5272 CONFIG_M5272 \ + MCF5307 CONFIG_M5307 \ + MCF5407 CONFIG_M5407" MC68EZ328 + +if [ "$CONFIG_M5204" = "y" -o \ + "$CONFIG_M5206" = "y" -o \ + "$CONFIG_M5206e" = "y" -o \ + "$CONFIG_M5249" = "y" -o \ + "$CONFIG_M5272" = "y" -o \ + "$CONFIG_M5307" = "y" -o \ + "$CONFIG_M5407" = "y" ]; then + define_bool CONFIG_COLDFIRE y +fi +if [ "$CONFIG_M68360" = "y" ]; then + define_bool CONFIG_360QUICC y +fi + +choice 'CPU CLOCK Frequency' \ + " AUTO CONFIG_CLOCK_AUTO \ + 11MHz CONFIG_CLOCK_11MHz \ + 16MHz CONFIG_CLOCK_16MHz \ + 20MHz CONFIG_CLOCK_20MHz \ + 24MHz CONFIG_CLOCK_24MHz \ + 25MHz CONFIG_CLOCK_25MHz \ + 33MHz CONFIG_CLOCK_33MHz \ + 40MHz CONFIG_CLOCK_40MHz \ + 45MHz CONFIG_CLOCK_45MHz \ + 48MHz CONFIG_CLOCK_48MHz \ + 50MHz CONFIG_CLOCK_50MHz \ + 54MHz CONFIG_CLOCK_54MHz \ + 60MHz CONFIG_CLOCK_60MHz \ + 66MHz CONFIG_CLOCK_66MHz \ + 70MHz CONFIG_CLOCK_70MHz \ + 140MHz CONFIG_CLOCK_140MHz" AUTO + +if [ "$CONFIG_M5307" = "y" ]; then + bool 'Old mask 5307 (1H55J) silicon' CONFIG_OLDMASK +fi + +comment 'Platform' + +if [ "$CONFIG_M68328" = "y" ]; then + bool 'Pilot 1000/5000, PalmPilot Personal/Pro, or PalmIII support' CONFIG_PILOT3 + if [ "$CONFIG_PILOT3" = "y" ]; then + bool ' (X)Copilot support' CONFIG_XCOPILOT_BUGS + bool ' Display memory usage on Pilot screen' CONFIG_PILOT_MEMORY_DISPLAY + bool ' Pilot console' CONFIG_PILOT_CONSOLE + fi +fi + +if [ "$CONFIG_M68EZ328" = "y" ]; then + bool 'Motorola M68EZ328ADS board support' CONFIG_M68EZ328ADS + bool 'ALMA Electronics board support' CONFIG_ALMA_ANS + bool 'uCsimm module support' CONFIG_UCSIMM + bool 'PalmV support' CONFIG_PILOT5 +fi + +if [ "$CONFIG_M68VZ328" = "y" ]; then + bool 'uCdimm module support' CONFIG_UCDIMM + bool 'Dragon Engine II board support' CONFIG_DRAGEN2 + if [ "$CONFIG_DRAGEN2" = "y" ]; then + bool ' Read ETH address from EEPROM' CONFIG_HWADDR_FROMEEPROM + if [ "$CONFIG_HWADDR_FROMEEPROM" = "y" ]; then + int ' Offset from start of EEPROM' CONFIG_HWADDR_OFFSET 2 + fi + fi +fi + +if [ "$CONFIG_UCSIMM" = "y" -o "$CONFIG_UCDIMM" = "y" -o "$CONFIG_DRAGEN2" = "y" ]; then + bool ' Initialize LCD' CONFIG_INIT_LCD + int ' Memory reservation (MB)' CONFIG_MEMORY_RESERVE 0 +fi + +if [ "$CONFIG_M68EN302" = "y" ]; then + bool 'Aplio Pro' CONFIG_APLIO_PRO + bool 'Aplio Entrecote' CONFIG_APLIO_ENTRECOTE +fi + +if [ "$CONFIG_M68332" = "y" ]; then + bool 'SHGLCore support' CONFIG_SHGLCORE + if [ "$CONFIG_SHGLCORE" = "y" ]; then + bool ' 2Meg SHGLCore' CONFIG_SHGLCORE_2MEG + fi +fi + +if [ "$CONFIG_M68360" = "y" ]; then + bool 'Lineo uCquicc board support' CONFIG_UCQUICC +fi + +if [ "$CONFIG_M5206" = "y" ]; then + bool 'Arnewsh 5206 board support' CONFIG_ARN5206 +fi + +if [ "$CONFIG_M5206e" = "y" ]; then + bool 'Motorola M5206eC3 board support' CONFIG_M5206eC3 + bool 'Motorola eLITE-5206e board support' CONFIG_ELITE + if [ "$CONFIG_ELITE" = "y" ]; then + bool ' SRAM only eLITE-5206e support' CONFIG_SMALL + fi + bool 'Telos Omnia ToolVox board support' CONFIG_TELOS + bool 'Netburner CFV2-40 board support' CONFIG_CFV240 +fi + +if [ "$CONFIG_M5249" = "y" ]; then + bool 'Motorola M5249C3 board support' CONFIG_M5249C3 +fi + +if [ "$CONFIG_M5272" = "y" ]; then + bool 'Motorola M5272C3 board support' CONFIG_M5272C3 + bool 'Gilbarco/NAP board support' CONFIG_GILBARCONAP +fi + +if [ "$CONFIG_M5307" = "y" ]; then + bool 'Arnewsh 5307 board support' CONFIG_ARN5307 + bool 'Motorola M5307C3 board support' CONFIG_M5307C3 + bool 'eLIA board support' CONFIG_eLIA + bool 'DISKtel board support' CONFIG_DISKtel + bool 'SecureEdge MP3 board support' CONFIG_SECUREEDGEMP3 +fi + +if [ "$CONFIG_M5407" = "y" ]; then + bool 'Motorola M5407C3 board support' CONFIG_M5407C3 +fi + +if [ "$CONFIG_M5307" = "y" -o \ + "$CONFIG_M5407" = "y" ]; then + bool 'Feith CLEOPATRA board support' CONFIG_CLEOPATRA +fi + +if [ "$CONFIG_M5206e" = "y" -o \ + "$CONFIG_M5272" = "y" -o \ + "$CONFIG_M5307" = "y" ]; then + bool 'SecureEdge/NETtel board support' CONFIG_NETtel + bool 'SnapGear router board support' CONFIG_SNAPGEAR + bool ' ROMFS image not RAM resident' CONFIG_ROMFS_FROM_ROM +fi + +if [ "$CONFIG_PILOT3" = "y" -o \ + "$CONFIG_PILOT5" = "y" ]; then + define_bool CONFIG_PILOT y +fi +if [ "$CONFIG_APLIO_PRO" = "y" -o "$CONFIG_APLIO_ENTRECOTE" = "y" ]; then + define_bool CONFIG_APLIO y +fi +if [ "$CONFIG_ARN5206" = "y" -o \ + "$CONFIG_ARN5307" = "y" ]; then + define_bool CONFIG_ARNEWSH y +fi +if [ "$CONFIG_M5206eC3" = "y" -o \ + "$CONFIG_M5249C3" = "y" -o \ + "$CONFIG_M5272C3" = "y" -o \ + "$CONFIG_M5307C3" = "y" -o \ + "$CONFIG_M5407C3" = "y" ]; then + define_bool CONFIG_MOTOROLA y +fi + +choice 'RAM size' \ + "AUTO CONFIG_RAMAUTO \ + 4MB CONFIG_RAM4MB \ + 8MB CONFIG_RAM8MB \ + 16MB CONFIG_RAM16MB \ + 32MB CONFIG_RAM32MB" AUTO +choice 'RAM bit width' \ + " AUTO CONFIG_AUTOBIT \ + 8bit CONFIG_RAM8BIT \ + 16bit CONFIG_RAM16BIT \ + 32bit CONFIG_RAM32bit" AUTO + +choice 'Kernel executes from' \ + "RAM CONFIG_RAMKERNEL \ + ROM CONFIG_ROMKERNEL \ + HIMEM CONFIG_HIMEMKERNEL" ROM + +endmenu + +############################################################################# + +mainmenu_option next_comment +comment 'General setup' + +bool 'Networking support' CONFIG_NET +bool 'PCI support' CONFIG_PCI +if [ "$CONFIG_PCI" = "y" ]; then + choice ' PCI access mode' \ + "BIOS CONFIG_PCI_GOBIOS \ + Direct CONFIG_PCI_GODIRECT \ + Any CONFIG_PCI_GOANY" Any + if [ "$CONFIG_PCI_GOBIOS" = "y" -o "$CONFIG_PCI_GOANY" = "y" ]; then + define_bool CONFIG_PCI_BIOS y + fi + if [ "$CONFIG_PCI_GODIRECT" = "y" -o "$CONFIG_PCI_GOANY" = "y" ]; then + define_bool CONFIG_PCI_DIRECT y + fi +fi + +source drivers/pci/Config.in + +bool 'Support for hot-pluggable devices' CONFIG_HOTPLUG + +if [ "$CONFIG_HOTPLUG" = "y" ] ; then + source drivers/pcmcia/Config.in +else + define_bool CONFIG_PCMCIA n +fi + +bool 'System V IPC' CONFIG_SYSVIPC +bool 'BSD Process Accounting' CONFIG_BSD_PROCESS_ACCT +bool 'Sysctl support' CONFIG_SYSCTL +if [ "$CONFIG_PROC_FS" = "y" ]; then + choice 'Kernel core (/proc/kcore) format' \ + "ELF CONFIG_KCORE_ELF \ + A.OUT CONFIG_KCORE_AOUT" ELF +fi +tristate 'Kernel support for flat binaries' CONFIG_BINFMT_FLAT +if [ "$CONFIG_BINFMT_FLAT" != "n" ]; then + bool ' Enable ZFLAT support' CONFIG_BINFMT_ZFLAT +fi +tristate 'Kernel support for a.out binaries' CONFIG_BINFMT_AOUT +tristate 'Kernel support for ELF binaries' CONFIG_BINFMT_ELF +tristate 'Kernel support for MISC binaries' CONFIG_BINFMT_MISC + +bool 'Power Management support' CONFIG_PM + +endmenu + +############################################################################# + +source drivers/mtd/Config.in + +source drivers/parport/Config.in + +source drivers/pnp/Config.in + +source drivers/block/Config.in + +if [ "$CONFIG_NET" = "y" ]; then + source net/Config.in +fi + +source drivers/telephony/Config.in + +############################################################################# + +mainmenu_option next_comment +comment 'ATA/IDE/MFM/RLL support' + +tristate 'ATA/IDE/MFM/RLL support' CONFIG_IDE + +if [ "$CONFIG_IDE" != "n" ]; then + source drivers/ide/Config.in +else + define_bool CONFIG_BLK_DEV_IDE_MODES n + define_bool CONFIG_BLK_DEV_HD n +fi +endmenu + +############################################################################# + +mainmenu_option next_comment +comment 'SCSI support' + +tristate 'SCSI support' CONFIG_SCSI + +if [ "$CONFIG_SCSI" != "n" ]; then + source drivers/scsi/Config.in +fi +endmenu + +############################################################################# + +source drivers/ieee1394/Config.in + +source drivers/message/i2o/Config.in + +if [ "$CONFIG_NET" = "y" ]; then + mainmenu_option next_comment + comment 'Network device support' + + bool 'Network device support' CONFIG_NETDEVICES + if [ "$CONFIG_NETDEVICES" = "y" ]; then + source drivers/net/Config.in + if [ "$CONFIG_ATM" = "y" ]; then + source drivers/atm/Config.in + fi + fi + endmenu +fi + +source net/ax25/Config.in + +source net/irda/Config.in + +############################################################################# + +source drivers/isdn/Config.in + +############################################################################# + +mainmenu_option next_comment +comment 'Old CD-ROM drivers (not SCSI, not IDE)' + +bool 'Support non-SCSI/IDE/ATAPI CDROM drives' CONFIG_CD_NO_IDESCSI +if [ "$CONFIG_CD_NO_IDESCSI" != "n" ]; then + source drivers/cdrom/Config.in +fi +endmenu + +############################################################################# + +source drivers/char/Config.in + + +#source drivers/misc/Config.in + +source fs/Config.in + +if [ "$CONFIG_VT" = "y" ]; then + mainmenu_option next_comment + comment 'Console drivers' + bool 'VGA text console' CONFIG_VGA_CONSOLE + bool 'Video mode selection support' CONFIG_VIDEO_SELECT + if [ "$CONFIG_EXPERIMENTAL" = "y" ]; then + tristate 'MDA text console (dual-headed) (EXPERIMENTAL)' CONFIG_MDA_CONSOLE + source drivers/video/Config.in + fi + endmenu +fi + +############################################################################# + +mainmenu_option next_comment +comment 'Sound' + +tristate 'Sound card support' CONFIG_SOUND +if [ "$CONFIG_SOUND" != "n" ]; then + source sound/Config.in +fi +endmenu + +############################################################################# + +source drivers/usb/Config.in + +############################################################################# + +mainmenu_option next_comment +comment 'Kernel hacking' + +bool 'Full Symbolic/Source Debugging support' CONFIG_FULLDEBUG +#bool 'Debug kmalloc/kfree' CONFIG_DEBUG_MALLOC +bool 'Magic SysRq key' CONFIG_MAGIC_SYSRQ +if [ "$CONFIG_EXPERIMENTAL" = "y" ]; then + bool 'Non power-of-2 kernel allocator (EXPERIMENTAL)' CONFIG_CONTIGUOUS_PAGE_ALLOC + dep_bool ' include /proc/mem_map' CONFIG_MEM_MAP $CONFIG_CONTIGUOUS_PAGE_ALLOC +fi + +bool 'Kernel profiling support' CONFIG_PROFILE +if [ "$CONFIG_PROFILE" = "y" ]; then + int ' Profile shift count' CONFIG_PROFILE_SHIFT 2 + bool 'Use fast second timer for profiling' CONFIG_HIGHPROFILE +fi + +if [ "$CONFIG_COLDFIRE" = "y" ]; then + bool 'Panic/Dump to FLASH' CONFIG_DUMPTOFLASH +fi + +bool 'Suppress Kernel BUG Messages' CONFIG_NO_KERNEL_MSG + +bool 'Reduce kernel task size to 1 page' CONFIG_SMALL_TASKS + +if [ "$CONFIG_EXPERIMENTAL" = "y" -a "$CONFIG_COLDFIRE" = "y" ]; then + bool 'Disable BDM signals' CONFIG_BDM_DISABLE +fi + +endmenu + +############################################################################# + +source security/Config.in +source lib/Config.in + +############################################################################# diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/defconfig linux.2.5.40-ac2/arch/m68knommu/defconfig --- linux.2.5.40/arch/m68knommu/defconfig 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/defconfig 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,455 @@ +# +# Automatically generated make config: don't edit +# +CONFIG_UCLINUX=y +CONFIG_UID16=y + +# +# Code maturity level options +# +CONFIG_EXPERIMENTAL=y + +# +# Loadable module support +# +# CONFIG_MODULES is not set + +# +# Processor type and features +# +# CONFIG_M68000 is not set +# CONFIG_M68EN302 is not set +# CONFIG_M68328 is not set +# CONFIG_M68EZ328 is not set +# CONFIG_M68332 is not set +# CONFIG_M68360 is not set +# CONFIG_M5204 is not set +# CONFIG_M5206 is not set +# CONFIG_M5206e is not set +CONFIG_M5307=y +# CONFIG_M5407 is not set + +# +# Platform +# +CONFIG_COLDFIRE=y +# CONFIG_ARNEWSH is not set +CONFIG_NETtel=y +# CONFIG_eLIA is not set +# CONFIG_DISKtel is not set +# CONFIG_CADRE3 is not set +# CONFIG_OLDMASK is not set +CONFIG_FLASH1MB=y +# CONFIG_FLASH2MB is not set +# CONFIG_FLASH4MB is not set +# CONFIG_EXTRA_FLASH1MB is not set +CONFIG_RAM4MB=y +# CONFIG_RAM8MB is not set +# CONFIG_RAM16MB is not set +# CONFIG_RAM32MB is not set +CONFIG_RAMKERNEL=y +# CONFIG_ROMKERNEL is not set +# CONFIG_HIMEMKERNEL is not set + +# +# General setup +# +CONFIG_NET=y +# CONFIG_VISWS is not set +# CONFIG_PCI is not set +# CONFIG_MCA is not set +# CONFIG_HOTPLUG is not set +# CONFIG_PCMCIA is not set +# CONFIG_SYSVIPC is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_SYSCTL is not set +# CONFIG_KCORE_ELF is not set +CONFIG_KCORE_AOUT=y +CONFIG_BINFMT_FLAT=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_ELF is not set +# CONFIG_BINFMT_MISC is not set +# CONFIG_PM is not set +# CONFIG_ACPI is not set +# CONFIG_APM is not set + +# +# Memory Technology Devices (MTD) +# +# CONFIG_MTD is not set + +# +# Parallel port support +# +# CONFIG_PARPORT is not set + +# +# Plug and Play configuration +# +# CONFIG_PNP is not set +# CONFIG_ISAPNP is not set + +# +# Block devices +# +# CONFIG_BLK_DEV_FD is not set +# CONFIG_BLK_DEV_XD is not set +# CONFIG_PARIDE is not set +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_LOOP is not set +# CONFIG_BLK_DEV_NBD is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_SIZE=4096 +# CONFIG_BLK_DEV_INITRD is not set +CONFIG_BLK_DEV_BLKMEM=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_NETLINK=y +CONFIG_RTNETLINK=y +# CONFIG_NETLINK_DEV is not set +# CONFIG_NETFILTER is not set +# CONFIG_FILTER is not set +CONFIG_UNIX=y +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +# CONFIG_IP_PNP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_INET_ECN is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_IPV6 is not set +# CONFIG_KHTTPD is not set +# CONFIG_ATM is not set + +# +# +# +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_DECNET is not set +# CONFIG_BRIDGE is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_LLC is not set +# CONFIG_NET_DIVERT is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_FASTROUTE is not set +# CONFIG_NET_HW_FLOWCONTROL is not set + +# +# QoS and/or fair queueing +# +# CONFIG_NET_SCHED is not set + +# +# Telephony Support +# +# CONFIG_PHONE is not set +# CONFIG_PHONE_IXJ is not set + +# +# ATA/IDE/MFM/RLL support +# +# CONFIG_IDE is not set +# CONFIG_BLK_DEV_IDE_MODES is not set +# CONFIG_BLK_DEV_HD is not set + +# +# SCSI support +# +# CONFIG_SCSI is not set + +# +# I2O device support +# +# CONFIG_I2O is not set +# CONFIG_I2O_BLOCK is not set +# CONFIG_I2O_LAN is not set +# CONFIG_I2O_SCSI is not set +# CONFIG_I2O_PROC is not set + +# +# Network device support +# +CONFIG_NETDEVICES=y + +# +# ARCnet devices +# +# CONFIG_ARCNET is not set +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_ETHERTAP is not set +# CONFIG_NET_SB1000 is not set + +# +# Ethernet (10 or 100Mbit) +# +CONFIG_NET_ETHERNET=y +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_LANCE is not set +CONFIG_NET_VENDOR_SMC=y +# CONFIG_WD80x3 is not set +# CONFIG_ULTRA is not set +# CONFIG_ULTRA32 is not set +CONFIG_SMC9194=y +# CONFIG_NET_VENDOR_RACAL is not set +# CONFIG_AT1700 is not set +# CONFIG_DEPCA is not set +# CONFIG_NET_ISA is not set +# CONFIG_NET_PCI is not set +# CONFIG_NET_POCKET is not set + +# +# Ethernet (1000 Mbit) +# +# CONFIG_ACENIC is not set +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +# CONFIG_SK98LIN is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +CONFIG_PPP=y +# CONFIG_PPP_MULTILINK is not set +# CONFIG_PPP_ASYNC is not set +# CONFIG_PPP_SYNC_TTY is not set +# CONFIG_PPP_DEFLATE is not set +# CONFIG_PPP_BSDCOMP is not set +# CONFIG_PPPOE is not set +# CONFIG_SLIP is not set + +# +# Wireless LAN (non-hamradio) +# +# CONFIG_NET_RADIO is not set + +# +# Token Ring devices +# +# CONFIG_TR is not set +# CONFIG_NET_FC is not set +# CONFIG_RCPCI is not set +# CONFIG_SHAPER is not set + +# +# Wan interfaces +# +# CONFIG_WAN is not set + +# +# Amateur Radio support +# +# CONFIG_HAMRADIO is not set + +# +# IrDA (infrared) support +# +# CONFIG_IRDA is not set + +# +# ISDN subsystem +# +# CONFIG_ISDN is not set + +# +# Old CD-ROM drivers (not SCSI, not IDE) +# +# CONFIG_CD_NO_IDESCSI is not set + +# +# Character devices +# +CONFIG_SERIAL_COLDFIRE=y +# CONFIG_SERIAL is not set +# CONFIG_MCF_MBUS is not set +# CONFIG_LCDTXT is not set +# CONFIG_LCDDMA is not set +# CONFIG_DAC0800 is not set +# CONFIG_DACI2S is not set +# CONFIG_T6963 is not set +# CONFIG_HIFN7901 is not set +CONFIG_LEDMAN=y +# CONFIG_VT is not set +# CONFIG_SERIAL is not set +# CONFIG_SERIAL_EXTENDED is not set +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_UNIX98_PTYS is not set + +# +# I2C support +# +# CONFIG_I2C is not set + +# +# Mice +# +# CONFIG_BUSMOUSE is not set +# CONFIG_MOUSE is not set + +# +# Joysticks +# +# CONFIG_JOYSTICK is not set + +# +# Input core support is needed for joysticks +# +# CONFIG_QIC02_TAPE is not set + +# +# Watchdog Cards +# +# CONFIG_WATCHDOG is not set +# CONFIG_INTEL_RNG is not set +# CONFIG_NVRAM is not set +# CONFIG_RTC is not set +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set + +# +# Ftape, the floppy tape device driver +# +# CONFIG_FTAPE is not set +# CONFIG_AGP is not set +# CONFIG_DRM is not set + +# +# File systems +# +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_ADFS_FS is not set +# CONFIG_ADFS_FS_RW is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_BFS_FS is not set +CONFIG_FAT_FS=y +# CONFIG_MSDOS_FS is not set +# CONFIG_UMSDOS_FS is not set +# CONFIG_VFAT_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_JFFS_FS is not set +# CONFIG_CRAMFS is not set +# CONFIG_RAMFS is not set +# CONFIG_ISO9660_FS is not set +# CONFIG_JOLIET is not set +# CONFIG_MINIX_FS is not set +# CONFIG_NTFS_FS is not set +# CONFIG_NTFS_RW is not set +# CONFIG_HPFS_FS is not set +CONFIG_PROC_FS=y +# CONFIG_DEVFS_FS is not set +# CONFIG_DEVFS_MOUNT is not set +# CONFIG_DEVFS_DEBUG is not set +# CONFIG_DEVPTS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_QNX4FS_RW is not set +CONFIG_ROMFS_FS=y +CONFIG_EXT2_FS=y +# CONFIG_SYSV_FS is not set +# CONFIG_SYSV_FS_WRITE is not set +# CONFIG_UDF_FS is not set +# CONFIG_UDF_RW is not set +# CONFIG_UFS_FS is not set +# CONFIG_UFS_FS_WRITE is not set + +# +# Network File Systems +# +# CONFIG_CODA_FS is not set +# CONFIG_NFS_FS is not set +# CONFIG_NFS_V3 is not set +# CONFIG_ROOT_NFS is not set +# CONFIG_NFSD is not set +# CONFIG_NFSD_V3 is not set +# CONFIG_SUNRPC is not set +# CONFIG_LOCKD is not set +# CONFIG_SMB_FS is not set +# CONFIG_NCP_FS is not set +# CONFIG_NCPFS_PACKET_SIGNING is not set +# CONFIG_NCPFS_IOCTL_LOCKING is not set +# CONFIG_NCPFS_STRONG is not set +# CONFIG_NCPFS_NFS_NS is not set +# CONFIG_NCPFS_OS2_NS is not set +# CONFIG_NCPFS_SMALLDOS is not set +# CONFIG_NCPFS_NLS is not set +# CONFIG_NCPFS_EXTRAS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_SMB_NLS is not set +CONFIG_NLS=y + +# +# Native Language Support +# +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_ISO8859_1 is not set +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_UTF8 is not set + +# +# Sound +# +# CONFIG_SOUND is not set + +# +# USB support +# +# CONFIG_USB is not set + +# +# Kernel hacking +# +CONFIG_FULLDEBUG=y +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_PROFILE is not set +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_DUMPTOFLASH is not set +CONFIG_NO_KERNEL_MSG=y diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/kernel/init_task.c linux.2.5.40-ac2/arch/m68knommu/kernel/init_task.c --- linux.2.5.40/arch/m68knommu/kernel/init_task.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/kernel/init_task.c 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,37 @@ +/* + * linux/arch/m68knommu/kernel/init_task.c + */ +#include +#include +#include +#include +#include + +#include +#include + +static struct fs_struct init_fs = INIT_FS; +static struct files_struct init_files = INIT_FILES; +static struct signal_struct init_signals = INIT_SIGNALS(init_signals); +struct mm_struct init_mm = INIT_MM(init_mm); + +/* + * Initial task structure. + * + * All other task structs will be allocated on slabs in fork.c + */ +__asm__(".align 4"); +struct task_struct init_task = INIT_TASK(init_task); + + +/* + * Initial thread structure. + * + * We need to make sure that this is 8192-byte aligned due to the + * way process stacks are handled. This is done by having a special + * "init_task" linker map entry.. + */ +union thread_union init_thread_union + __attribute__((__section__(".data.init_task"))) = + { INIT_THREAD_INFO(init_task) }; + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/kernel/m68k_defs.c linux.2.5.40-ac2/arch/m68knommu/kernel/m68k_defs.c --- linux.2.5.40/arch/m68knommu/kernel/m68k_defs.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/kernel/m68k_defs.c 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,83 @@ +/* + * This program is used to generate definitions needed by + * assembly language modules. + * + * We use the technique used in the OSF Mach kernel code: + * generate asm statements containing #defines, + * compile this file to assembler, and then extract the + * #defines from the assembly-language output. + */ + +#include +#include +#include +#include +#include +#include + +#define DEFINE(sym, val) \ + asm volatile("\n#define " #sym " %c0" : : "i" (val)) + +int main(void) +{ + /* offsets into the task struct */ + DEFINE(TASK_STATE, offsetof(struct task_struct, state)); + DEFINE(TASK_FLAGS, offsetof(struct task_struct, flags)); + DEFINE(TASK_PTRACE, offsetof(struct task_struct, ptrace)); + DEFINE(TASK_BLOCKED, offsetof(struct task_struct, blocked)); + DEFINE(TASK_THREAD, offsetof(struct task_struct, thread)); + DEFINE(TASK_THREAD_INFO, offsetof(struct task_struct, thread_info)); + DEFINE(TASK_MM, offsetof(struct task_struct, mm)); + DEFINE(TASK_ACTIVE_MM, offsetof(struct task_struct, active_mm)); + + /* offsets into the irq_cpustat_t struct */ + DEFINE(CPUSTAT_SOFTIRQ_PENDING, offsetof(irq_cpustat_t, __softirq_pending)); + + /* offsets into the thread struct */ + DEFINE(THREAD_KSP, offsetof(struct thread_struct, ksp)); + DEFINE(THREAD_USP, offsetof(struct thread_struct, usp)); + DEFINE(THREAD_SR, offsetof(struct thread_struct, sr)); + DEFINE(THREAD_FS, offsetof(struct thread_struct, fs)); + DEFINE(THREAD_CRP, offsetof(struct thread_struct, crp)); + DEFINE(THREAD_ESP0, offsetof(struct thread_struct, esp0)); + DEFINE(THREAD_FPREG, offsetof(struct thread_struct, fp)); + DEFINE(THREAD_FPCNTL, offsetof(struct thread_struct, fpcntl)); + DEFINE(THREAD_FPSTATE, offsetof(struct thread_struct, fpstate)); + + /* offsets into the pt_regs */ + DEFINE(PT_D0, offsetof(struct pt_regs, d0)); + DEFINE(PT_ORIG_D0, offsetof(struct pt_regs, orig_d0)); + DEFINE(PT_D1, offsetof(struct pt_regs, d1)); + DEFINE(PT_D2, offsetof(struct pt_regs, d2)); + DEFINE(PT_D3, offsetof(struct pt_regs, d3)); + DEFINE(PT_D4, offsetof(struct pt_regs, d4)); + DEFINE(PT_D5, offsetof(struct pt_regs, d5)); + DEFINE(PT_A0, offsetof(struct pt_regs, a0)); + DEFINE(PT_A1, offsetof(struct pt_regs, a1)); + DEFINE(PT_A2, offsetof(struct pt_regs, a2)); + DEFINE(PT_PC, offsetof(struct pt_regs, pc)); + DEFINE(PT_SR, offsetof(struct pt_regs, sr)); + /* bitfields are a bit difficult */ + DEFINE(PT_VECTOR, offsetof(struct pt_regs, pc) + 4); + +#ifndef CONFIG_COLDFIRE + /* offsets into the irq_handler struct */ + DEFINE(IRQ_HANDLER, offsetof(struct irq_node, handler)); + DEFINE(IRQ_DEVID, offsetof(struct irq_node, dev_id)); + DEFINE(IRQ_NEXT, offsetof(struct irq_node, next)); +#endif + + /* offsets into the kernel_stat struct */ + DEFINE(STAT_IRQ, offsetof(struct kernel_stat, irqs)); + + /* signal defines */ + DEFINE(SIGSEGV, SIGSEGV); + DEFINE(SEGV_MAPERR, SEGV_MAPERR); + DEFINE(SIGTRAP, SIGTRAP); + DEFINE(TRAP_TRACE, TRAP_TRACE); + + DEFINE(PT_PTRACED, PT_PTRACED); + DEFINE(PT_DTRACE, PT_DTRACE); + + return 0; +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/kernel/m68k_defs.head linux.2.5.40-ac2/arch/m68knommu/kernel/m68k_defs.head --- linux.2.5.40/arch/m68knommu/kernel/m68k_defs.head 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/kernel/m68k_defs.head 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,5 @@ +/* + * WARNING! This file is automatically generated - DO NOT EDIT! + */ + +#define TS_MAGICKEY 0x5a5a5a5a diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/kernel/m68k_ksyms.c linux.2.5.40-ac2/arch/m68knommu/kernel/m68k_ksyms.c --- linux.2.5.40/arch/m68knommu/kernel/m68k_ksyms.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/kernel/m68k_ksyms.c 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,124 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +extern void dump_thread(struct pt_regs *, struct user *); +extern int dump_fpu(elf_fpregset_t *); + +/* platform dependent support */ + +EXPORT_SYMBOL(__ioremap); +EXPORT_SYMBOL(iounmap); +EXPORT_SYMBOL(dump_fpu); +EXPORT_SYMBOL(dump_thread); +EXPORT_SYMBOL(strnlen); +EXPORT_SYMBOL(strrchr); +EXPORT_SYMBOL(strstr); +EXPORT_SYMBOL(strchr); +EXPORT_SYMBOL(strcat); +EXPORT_SYMBOL(strlen); +EXPORT_SYMBOL(strcmp); +EXPORT_SYMBOL(strncmp); + +EXPORT_SYMBOL(ip_fast_csum); + +EXPORT_SYMBOL(mach_enable_irq); +EXPORT_SYMBOL(mach_disable_irq); +EXPORT_SYMBOL(kernel_thread); + +/* Networking helper routines. */ +EXPORT_SYMBOL(csum_partial_copy); + +/* The following are special because they're not called + explicitly (the C compiler generates them). Fortunately, + their interface isn't gonna change any time soon now, so + it's OK to leave it out of version control. */ +EXPORT_SYMBOL_NOVERS(memcpy); +EXPORT_SYMBOL_NOVERS(memset); +EXPORT_SYMBOL_NOVERS(memcmp); +EXPORT_SYMBOL_NOVERS(memscan); +EXPORT_SYMBOL_NOVERS(memmove); + +EXPORT_SYMBOL_NOVERS(__down_failed); +EXPORT_SYMBOL_NOVERS(__down_failed_interruptible); +EXPORT_SYMBOL_NOVERS(__down_failed_trylock); +EXPORT_SYMBOL_NOVERS(__up_wakeup); + +EXPORT_SYMBOL(get_wchan); + +/* + * libgcc functions - functions that are used internally by the + * compiler... (prototypes are not correct though, but that + * doesn't really matter since they're not versioned). + */ +extern void __gcc_bcmp(void); +extern void __ashldi3(void); +extern void __ashrdi3(void); +extern void __cmpdi2(void); +extern void __divdi3(void); +extern void __divsi3(void); +extern void __lshrdi3(void); +extern void __moddi3(void); +extern void __modsi3(void); +extern void __muldi3(void); +extern void __mulsi3(void); +extern void __negdi2(void); +extern void __ucmpdi2(void); +extern void __udivdi3(void); +extern void __udivmoddi4(void); +extern void __udivsi3(void); +extern void __umoddi3(void); +extern void __umodsi3(void); + + /* gcc lib functions */ +EXPORT_SYMBOL_NOVERS(__gcc_bcmp); +EXPORT_SYMBOL_NOVERS(__ashldi3); +EXPORT_SYMBOL_NOVERS(__ashrdi3); +EXPORT_SYMBOL_NOVERS(__cmpdi2); +EXPORT_SYMBOL_NOVERS(__divdi3); +EXPORT_SYMBOL_NOVERS(__divsi3); +EXPORT_SYMBOL_NOVERS(__lshrdi3); +EXPORT_SYMBOL_NOVERS(__moddi3); +EXPORT_SYMBOL_NOVERS(__modsi3); +EXPORT_SYMBOL_NOVERS(__muldi3); +EXPORT_SYMBOL_NOVERS(__mulsi3); +EXPORT_SYMBOL_NOVERS(__negdi2); +EXPORT_SYMBOL_NOVERS(__ucmpdi2); +EXPORT_SYMBOL_NOVERS(__udivdi3); +EXPORT_SYMBOL_NOVERS(__udivmoddi4); +EXPORT_SYMBOL_NOVERS(__udivsi3); +EXPORT_SYMBOL_NOVERS(__umoddi3); +EXPORT_SYMBOL_NOVERS(__umodsi3); + +EXPORT_SYMBOL_NOVERS(is_in_rom); + +#ifdef CONFIG_COLDFIRE +extern unsigned int *dma_device_address; +extern unsigned long dma_base_addr, _ramend; +EXPORT_SYMBOL_NOVERS(dma_base_addr); +EXPORT_SYMBOL_NOVERS(dma_device_address); +EXPORT_SYMBOL_NOVERS(_ramend); + +extern asmlinkage void trap(void); +extern void *_ramvec; +EXPORT_SYMBOL_NOVERS(trap); +EXPORT_SYMBOL_NOVERS(_ramvec); +#endif /* CONFIG_COLDFIRE */ diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/kernel/Makefile linux.2.5.40-ac2/arch/m68knommu/kernel/Makefile --- linux.2.5.40/arch/m68knommu/kernel/Makefile 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/kernel/Makefile 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,32 @@ +# +# Makefile for the linux kernel. +# +# Note! Dependencies are done automagically by 'make dep', which also +# removes any old dependencies. DON'T put your own dependencies here +# unless it's something special (ie not a .c file). +# +# Note 2! The CFLAGS definitions are now in the main makefile... + +all: kernel.o + +O_TARGET := kernel.o +obj-y := process.o traps.o ptrace.o sys_m68k.o time.o semaphore.o +obj-y += setup.o m68k_ksyms.o init_task.o + +export-objs := m68k_ksyms.o + +head.o: head.S m68k_defs.h + +entry.o: entry.S m68k_defs.h + +m68k_defs.h: m68k_defs.c m68k_defs.head + rm -f m68k_defs.d + SUNPRO_DEPENDENCIES="m68k_defs.d m68k_defs.h" \ + $(CC) $(filter-out -MD,$(CFLAGS)) -S m68k_defs.c + cp m68k_defs.head m68k_defs.h + grep '^#define' m68k_defs.s >> m68k_defs.h + rm m68k_defs.s +-include m68k_defs.d + +include $(TOPDIR)/Rules.make + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/kernel/process.c linux.2.5.40-ac2/arch/m68knommu/kernel/process.c --- linux.2.5.40/arch/m68knommu/kernel/process.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/kernel/process.c 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,401 @@ +/* + * linux/arch/m68knommu/kernel/process.c + * + * Copyright (C) 1995 Hamish Macdonald + * + * 68060 fixes by Jesper Skov + * + * uClinux changes + * Copyright (C) 2000-2002, David McCullough + */ + +/* + * This file handles the architecture-dependent parts of process handling.. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +asmlinkage void ret_from_fork(void); + + +/* + * The idle loop on an m68k.. + */ +void default_idle(void) +{ + while(1) { + if (need_resched()) +#if defined(MACH_ATARI_ONLY) && !defined(CONFIG_HADES) + /* block out HSYNC on the atari (falcon) */ + __asm__("stop #0x2200" : : : "cc"); +#else + __asm__("stop #0x2000" : : : "cc"); +#endif + schedule(); +#ifndef CONFIG_NO_MMU + check_pgt_cache(); +#endif + } +} + +void (*idle)(void) = default_idle; + +/* + * The idle thread. There's no useful work to be + * done, so just try to conserve power and have a + * low exit latency (ie sit in a loop waiting for + * somebody to say that they'd like to reschedule) + */ +void cpu_idle(void) +{ + /* endless idle loop with no priority at all */ + idle(); +} + +void machine_restart(char * __unused) +{ + if (mach_reset) + mach_reset(); + for (;;); +} + +void machine_halt(void) +{ + if (mach_halt) + mach_halt(); + for (;;); +} + +void machine_power_off(void) +{ + if (mach_power_off) + mach_power_off(); + for (;;); +} + +void show_regs(struct pt_regs * regs) +{ + printk("\n"); + printk("Format %02x Vector: %04x PC: %08lx Status: %04x %s\n", + regs->format, regs->vector, regs->pc, regs->sr, print_tainted()); + printk("ORIG_D0: %08lx D0: %08lx A2: %08lx A1: %08lx\n", + regs->orig_d0, regs->d0, regs->a2, regs->a1); + printk("A0: %08lx D5: %08lx D4: %08lx\n", + regs->a0, regs->d5, regs->d4); + printk("D3: %08lx D2: %08lx D1: %08lx\n", + regs->d3, regs->d2, regs->d1); + if (!(regs->sr & PS_S)) + printk("USP: %08lx\n", rdusp()); +} + +/* + * Create a kernel thread + */ +int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags) +{ + long retval; + long clone_arg = flags | CLONE_VM; + mm_segment_t fs; + + fs = get_fs(); + set_fs (KERNEL_DS); + + __asm__ __volatile__ ( + "movel %%sp, %%d2\n\t" + "movel %5, %%d1\n\t" + "movel %1, %%d0\n\t" + "trap #0\n\t" + "cmpl %%sp, %%d2\n\t" + "jeq 1f\n\t" + "movel %3, %%sp@-\n\t" + "jsr %4@\n\t" + "movel %2, %%d0\n\t" + "trap #0\n" + "1:" + : "=d" (retval) + : "i" (__NR_clone), + "i" (__NR_exit), + "a" (arg), + "a" (fn), + "a" (clone_arg) + : "cc", "%d0", "%d1", "%d2"); + + set_fs (fs); + return retval; +} + +void flush_thread(void) +{ +#ifndef NO_FPU + unsigned long zero = 0; +#endif + set_fs(USER_DS); + current->thread.fs = __USER_DS; +#ifndef NO_FPU + if (!FPU_IS_EMU) + asm volatile (".chip 68k/68881\n\t" + "frestore %0@\n\t" + ".chip 68k" : : "a" (&zero)); +#endif +} + +/* + * "m68k_fork()".. By the time we get here, the + * non-volatile registers have also been saved on the + * stack. We do some ugly pointer stuff here.. (see + * also copy_thread) + */ + +asmlinkage int m68k_fork(struct pt_regs *regs) +{ +#ifdef CONFIG_NO_MMU + /* fork almost works, enough to trick you into looking elsewhere :-( */ + return(-EINVAL); +#else + struct task_struct *p; + p = do_fork(SIGCHLD, rdusp(), regs, 0, NULL); + return IS_ERR(p) ? PTR_ERR(p) : p->pid; +#endif +} + +asmlinkage int m68k_vfork(struct pt_regs *regs) +{ + struct task_struct *p; + p = do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, rdusp(), regs, 0, NULL); + return IS_ERR(p) ? PTR_ERR(p) : p->pid; +} + +asmlinkage int m68k_clone(struct pt_regs *regs) +{ + unsigned long clone_flags; + unsigned long newsp; + struct task_struct *p; + + /* syscall2 puts clone_flags in d1 and usp in d2 */ + clone_flags = regs->d1; + newsp = regs->d2; + if (!newsp) + newsp = rdusp(); + p = do_fork(clone_flags & ~CLONE_IDLETASK, newsp, regs, 0, NULL); + return IS_ERR(p) ? PTR_ERR(p) : p->pid; +} + +int copy_thread(int nr, unsigned long clone_flags, + unsigned long usp, unsigned long topstk, + struct task_struct * p, struct pt_regs * regs) +{ + struct pt_regs * childregs; + struct switch_stack * childstack, *stack; + unsigned long stack_offset, *retp; + + stack_offset = KTHREAD_SIZE - sizeof(struct pt_regs); + childregs = (struct pt_regs *) ((unsigned long) p->thread_info + stack_offset); + + *childregs = *regs; + childregs->d0 = 0; + + retp = ((unsigned long *) regs); + stack = ((struct switch_stack *) retp) - 1; + + childstack = ((struct switch_stack *) childregs) - 1; + *childstack = *stack; + childstack->retpc = (unsigned long)ret_from_fork; + + p->thread.usp = usp; + p->thread.ksp = (unsigned long)childstack; + /* + * Must save the current SFC/DFC value, NOT the value when + * the parent was last descheduled - RGH 10-08-96 + */ + p->thread.fs = get_fs().seg; + +#ifndef NO_FPU + if (!FPU_IS_EMU) { + /* Copy the current fpu state */ + asm volatile ("fsave %0" : : "m" (p->thread.fpstate[0]) : "memory"); + + if (!CPU_IS_060 ? p->thread.fpstate[0] : p->thread.fpstate[2]) + asm volatile ("fmovemx %/fp0-%/fp7,%0\n\t" + "fmoveml %/fpiar/%/fpcr/%/fpsr,%1" + : : "m" (p->thread.fp[0]), "m" (p->thread.fpcntl[0]) + : "memory"); + /* Restore the state in case the fpu was busy */ + asm volatile ("frestore %0" : : "m" (p->thread.fpstate[0])); + } +#endif + + return 0; +} + +/* Fill in the fpu structure for a core dump. */ + +int dump_fpu (struct pt_regs *regs, struct user_m68kfp_struct *fpu) +{ +#ifndef NO_FPU + char fpustate[216]; + + if (FPU_IS_EMU) { + int i; + + memcpy(fpu->fpcntl, current->thread.fpcntl, 12); + memcpy(fpu->fpregs, current->thread.fp, 96); + /* Convert internal fpu reg representation + * into long double format + */ + for (i = 0; i < 24; i += 3) + fpu->fpregs[i] = ((fpu->fpregs[i] & 0xffff0000) << 15) | + ((fpu->fpregs[i] & 0x0000ffff) << 16); + return 1; + } + + /* First dump the fpu context to avoid protocol violation. */ + asm volatile ("fsave %0" :: "m" (fpustate[0]) : "memory"); + if (!CPU_IS_060 ? !fpustate[0] : !fpustate[2]) + return 0; + + asm volatile ("fmovem %/fpiar/%/fpcr/%/fpsr,%0" + :: "m" (fpu->fpcntl[0]) + : "memory"); + asm volatile ("fmovemx %/fp0-%/fp7,%0" + :: "m" (fpu->fpregs[0]) + : "memory"); +#endif + return 1; +} + +/* + * fill in the user structure for a core dump.. + */ +void dump_thread(struct pt_regs * regs, struct user * dump) +{ + struct switch_stack *sw; + +/* changed the size calculations - should hopefully work better. lbt */ + dump->magic = CMAGIC; + dump->start_code = 0; + dump->start_stack = rdusp() & ~(PAGE_SIZE - 1); + dump->u_tsize = ((unsigned long) current->mm->end_code) >> PAGE_SHIFT; + dump->u_dsize = ((unsigned long) (current->mm->brk + + (PAGE_SIZE-1))) >> PAGE_SHIFT; + dump->u_dsize -= dump->u_tsize; + dump->u_ssize = 0; + + if (dump->start_stack < TASK_SIZE) + dump->u_ssize = ((unsigned long) (TASK_SIZE - dump->start_stack)) >> PAGE_SHIFT; + + dump->u_ar0 = (struct user_regs_struct *)((int)&dump->regs - (int)dump); + sw = ((struct switch_stack *)regs) - 1; + dump->regs.d1 = regs->d1; + dump->regs.d2 = regs->d2; + dump->regs.d3 = regs->d3; + dump->regs.d4 = regs->d4; + dump->regs.d5 = regs->d5; + dump->regs.d6 = sw->d6; + dump->regs.d7 = sw->d7; + dump->regs.a0 = regs->a0; + dump->regs.a1 = regs->a1; + dump->regs.a2 = regs->a2; + dump->regs.a3 = sw->a3; + dump->regs.a4 = sw->a4; + dump->regs.a5 = sw->a5; + dump->regs.a6 = sw->a6; + dump->regs.d0 = regs->d0; + dump->regs.orig_d0 = regs->orig_d0; + dump->regs.stkadj = regs->stkadj; + dump->regs.sr = regs->sr; + dump->regs.pc = regs->pc; + dump->regs.fmtvec = (regs->format << 12) | regs->vector; + /* dump floating point stuff */ + dump->u_fpvalid = dump_fpu (regs, &dump->m68kfp); +} + +/* + * sys_execve() executes a new program. + */ +asmlinkage int sys_execve(char *name, char **argv, char **envp) +{ + int error; + char * filename; + struct pt_regs *regs = (struct pt_regs *) &name; + + lock_kernel(); + filename = getname(name); + error = PTR_ERR(filename); + if (IS_ERR(filename)) + goto out; + error = do_execve(filename, argv, envp, regs); + putname(filename); +out: + unlock_kernel(); + return error; +} + +/* + * These bracket the sleeping functions.. + */ +extern void scheduling_functions_start_here(void); +extern void scheduling_functions_end_here(void); +#define first_sched ((unsigned long) scheduling_functions_start_here) +#define last_sched ((unsigned long) scheduling_functions_end_here) + +unsigned long get_wchan(struct task_struct *p) +{ + unsigned long fp, pc; + unsigned long stack_page; + int count = 0; + if (!p || p == current || p->state == TASK_RUNNING) + return 0; + + stack_page = (unsigned long)p; + fp = ((struct switch_stack *)p->thread.ksp)->a6; + do { + if (fp < stack_page+sizeof(struct task_struct) || + fp >= 8184+stack_page) + return 0; + pc = ((unsigned long *)fp)[1]; + /* FIXME: This depends on the order of these functions. */ + if (pc < first_sched || pc >= last_sched) + return pc; + fp = *(unsigned long *) fp; + } while (count++ < 16); + return 0; +} + +/* + * Return saved PC of a blocked thread. + */ +unsigned long thread_saved_pc(struct task_struct *tsk) +{ + extern void scheduling_functions_start_here(void); + extern void scheduling_functions_end_here(void); + struct switch_stack *sw = (struct switch_stack *)tsk->thread.ksp; + + /* Check whether the thread is blocked in resume() */ + if (sw->retpc > (unsigned long)scheduling_functions_start_here && + sw->retpc < (unsigned long)scheduling_functions_end_here) + return ((unsigned long *)sw->a6)[1]; + else + return sw->retpc; +} + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/kernel/ptrace.c linux.2.5.40-ac2/arch/m68knommu/kernel/ptrace.c --- linux.2.5.40/arch/m68knommu/kernel/ptrace.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/kernel/ptrace.c 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,392 @@ +/* + * linux/arch/m68knommu/kernel/ptrace.c + * + * Copyright (C) 1994 by Hamish Macdonald + * Taken from linux/kernel/ptrace.c and modified for M680x0. + * linux/kernel/ptrace.c is by Ross Biro 1/23/92, edited by Linus Torvalds + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file COPYING in the main directory of + * this archive for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +/* + * does not yet catch signals sent when the child dies. + * in exit.c or in signal.c. + */ + +/* determines which bits in the SR the user has access to. */ +/* 1 = access 0 = no access */ +#define SR_MASK 0x001f + +/* sets the trace bits. */ +#define TRACE_BITS 0x8000 + +/* Find the stack offset for a register, relative to thread.esp0. */ +#define PT_REG(reg) ((long)&((struct pt_regs *)0)->reg) +#define SW_REG(reg) ((long)&((struct switch_stack *)0)->reg \ + - sizeof(struct switch_stack)) +/* Mapping from PT_xxx to the stack offset at which the register is + saved. Notice that usp has no stack-slot and needs to be treated + specially (see get_reg/put_reg below). */ +static int regoff[] = { + PT_REG(d1), PT_REG(d2), PT_REG(d3), PT_REG(d4), + PT_REG(d5), SW_REG(d6), SW_REG(d7), PT_REG(a0), + PT_REG(a1), PT_REG(a2), SW_REG(a3), SW_REG(a4), + SW_REG(a5), SW_REG(a6), PT_REG(d0), -1, + PT_REG(orig_d0), PT_REG(sr), PT_REG(pc), +}; + +/* + * Get contents of register REGNO in task TASK. + */ +static inline long get_reg(struct task_struct *task, int regno) +{ + unsigned long *addr; + + if (regno == PT_USP) + addr = &task->thread.usp; + else if (regno < sizeof(regoff)/sizeof(regoff[0])) + addr = (unsigned long *)(task->thread.esp0 + regoff[regno]); + else + return 0; + return *addr; +} + +/* + * Write contents of register REGNO in task TASK. + */ +static inline int put_reg(struct task_struct *task, int regno, + unsigned long data) +{ + unsigned long *addr; + + if (regno == PT_USP) + addr = &task->thread.usp; + else if (regno < sizeof(regoff)/sizeof(regoff[0])) + addr = (unsigned long *) (task->thread.esp0 + regoff[regno]); + else + return -1; + *addr = data; + return 0; +} + +/* + * Called by kernel/ptrace.c when detaching.. + * + * Make sure the single step bit is not set. + */ +void ptrace_disable(struct task_struct *child) +{ + unsigned long tmp; + /* make sure the single step bit is not set. */ + tmp = get_reg(child, PT_SR) & ~(TRACE_BITS << 16); + put_reg(child, PT_SR, tmp); +} + +asmlinkage int sys_ptrace(long request, long pid, long addr, long data) +{ + struct task_struct *child; + int ret; + + lock_kernel(); + ret = -EPERM; + if (request == PTRACE_TRACEME) { + /* are we already being traced? */ + if (current->ptrace & PT_PTRACED) + goto out; + /* set the ptrace bit in the process flags. */ + current->ptrace |= PT_PTRACED; + ret = 0; + goto out; + } + ret = -ESRCH; + read_lock(&tasklist_lock); + child = find_task_by_pid(pid); + if (child) + get_task_struct(child); + read_unlock(&tasklist_lock); + if (!child) + goto out; + + ret = -EPERM; + if (pid == 1) /* you may not mess with init */ + goto out_tsk; + + if (request == PTRACE_ATTACH) { + ret = ptrace_attach(child); + goto out_tsk; + } + ret = -ESRCH; + if (!(child->ptrace & PT_PTRACED)) + goto out_tsk; + if (child->state != TASK_STOPPED) { + if (request != PTRACE_KILL) + goto out_tsk; + } + ret = ptrace_check_attach(child, request == PTRACE_KILL); + if (ret < 0) + goto out_tsk; + + switch (request) { + /* when I and D space are separate, these will need to be fixed. */ + case PTRACE_PEEKTEXT: /* read word at location addr. */ + case PTRACE_PEEKDATA: { + unsigned long tmp; + int copied; + + copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0); + ret = -EIO; + if (copied != sizeof(tmp)) + break; + ret = put_user(tmp,(unsigned long *) data); + break; + } + + /* read the word at location addr in the USER area. */ + case PTRACE_PEEKUSR: { + unsigned long tmp; + + ret = -EIO; + if ((addr & 3) || addr < 0 || + addr > sizeof(struct user) - 3) + break; + + tmp = 0; /* Default return condition */ + addr = addr >> 2; /* temporary hack. */ + ret = -EIO; + if (addr < 19) { + tmp = get_reg(child, addr); + if (addr == PT_SR) + tmp >>= 16; + } else if (addr >= 21 && addr < 49) { + tmp = child->thread.fp[addr - 21]; +#ifdef CONFIG_M68KFPU_EMU + /* Convert internal fpu reg representation + * into long double format + */ + if (FPU_IS_EMU && (addr < 45) && !(addr % 3)) + tmp = ((tmp & 0xffff0000) << 15) | + ((tmp & 0x0000ffff) << 16); +#endif + } else if (addr == 49) { + tmp = child->mm->start_code; + } else if (addr == 50) { + tmp = child->mm->start_data; + } else if (addr == 51) { + tmp = child->mm->end_code; + } else + break; + ret = put_user(tmp,(unsigned long *) data); + break; + } + + /* when I and D space are separate, this will have to be fixed. */ + case PTRACE_POKETEXT: /* write the word at location addr. */ + case PTRACE_POKEDATA: + ret = 0; + if (access_process_vm(child, addr, &data, sizeof(data), 1) == sizeof(data)) + break; + ret = -EIO; + break; + + case PTRACE_POKEUSR: /* write the word at location addr in the USER area */ + ret = -EIO; + if ((addr & 3) || addr < 0 || + addr > sizeof(struct user) - 3) + break; + + addr = addr >> 2; /* temporary hack. */ + + if (addr == PT_SR) { + data &= SR_MASK; + data <<= 16; + data |= get_reg(child, PT_SR) & ~(SR_MASK << 16); + } + if (addr < 19) { + if (put_reg(child, addr, data)) + break; + ret = 0; + break; + } + if (addr >= 21 && addr < 48) + { +#ifdef CONFIG_M68KFPU_EMU + /* Convert long double format + * into internal fpu reg representation + */ + if (FPU_IS_EMU && (addr < 45) && !(addr % 3)) { + data = (unsigned long)data << 15; + data = (data & 0xffff0000) | + ((data & 0x0000ffff) >> 1); + } +#endif + child->thread.fp[addr - 21] = data; + ret = 0; + } + break; + + case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */ + case PTRACE_CONT: { /* restart after signal. */ + long tmp; + + ret = -EIO; + if ((unsigned long) data > _NSIG) + break; + if (request == PTRACE_SYSCALL) + set_tsk_thread_flag(child, TIF_SYSCALL_TRACE); + else + clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE); + child->exit_code = data; + /* make sure the single step bit is not set. */ + tmp = get_reg(child, PT_SR) & ~(TRACE_BITS << 16); + put_reg(child, PT_SR, tmp); + wake_up_process(child); + ret = 0; + break; + } + +/* + * make the child exit. Best I can do is send it a sigkill. + * perhaps it should be put in the status that it wants to + * exit. + */ + case PTRACE_KILL: { + long tmp; + + ret = 0; + if (child->state == TASK_ZOMBIE) /* already dead */ + break; + child->exit_code = SIGKILL; + /* make sure the single step bit is not set. */ + tmp = get_reg(child, PT_SR) & ~(TRACE_BITS << 16); + put_reg(child, PT_SR, tmp); + wake_up_process(child); + break; + } + + case PTRACE_SINGLESTEP: { /* set the trap flag. */ + long tmp; + + ret = -EIO; + if ((unsigned long) data > _NSIG) + break; + clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE); + tmp = get_reg(child, PT_SR) | (TRACE_BITS << 16); + put_reg(child, PT_SR, tmp); + + child->exit_code = data; + /* give it a chance to run. */ + wake_up_process(child); + ret = 0; + break; + } + + case PTRACE_DETACH: /* detach a process that was attached. */ + ret = ptrace_detach(child, data); + break; + + case PTRACE_GETREGS: { /* Get all gp regs from the child. */ + int i; + unsigned long tmp; + for (i = 0; i < 19; i++) { + tmp = get_reg(child, i); + if (i == PT_SR) + tmp >>= 16; + if (put_user(tmp, (unsigned long *) data)) { + ret = -EFAULT; + break; + } + data += sizeof(long); + } + ret = 0; + break; + } + + case PTRACE_SETREGS: { /* Set all gp regs in the child. */ + int i; + unsigned long tmp; + for (i = 0; i < 19; i++) { + if (get_user(tmp, (unsigned long *) data)) { + ret = -EFAULT; + break; + } + if (i == PT_SR) { + tmp &= SR_MASK; + tmp <<= 16; + tmp |= get_reg(child, PT_SR) & ~(SR_MASK << 16); + } + put_reg(child, i, tmp); + data += sizeof(long); + } + ret = 0; + break; + } + +#ifdef PTRACE_GETFPREGS + case PTRACE_GETFPREGS: { /* Get the child FPU state. */ + ret = 0; + if (copy_to_user((void *)data, &child->thread.fp, + sizeof(struct user_m68kfp_struct))) + ret = -EFAULT; + break; + } +#endif + +#ifdef PTRACE_SETFPREGS + case PTRACE_SETFPREGS: { /* Set the child FPU state. */ + ret = 0; + if (copy_from_user(&child->thread.fp, (void *)data, + sizeof(struct user_m68kfp_struct))) + ret = -EFAULT; + break; + } +#endif + + default: + ret = -EIO; + break; + } +out_tsk: + put_task_struct(child); +out: + unlock_kernel(); + return ret; +} + +asmlinkage void syscall_trace(void) +{ + if (!test_thread_flag(TIF_SYSCALL_TRACE)) + return; + if (!(current->ptrace & PT_PTRACED)) + return; + current->exit_code = SIGTRAP; + current->state = TASK_STOPPED; + notify_parent(current, SIGCHLD); + schedule(); + /* + * this isn't the same as continuing with a signal, but it will do + * for normal use. strace only continues with a signal if the + * stopping signal is not SIGTRAP. -brl + */ + if (current->exit_code) { + send_sig(current->exit_code, current, 1); + current->exit_code = 0; + } +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/kernel/semaphore.c linux.2.5.40-ac2/arch/m68knommu/kernel/semaphore.c --- linux.2.5.40/arch/m68knommu/kernel/semaphore.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/kernel/semaphore.c 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,133 @@ +/* + * Generic semaphore code. Buyer beware. Do your own + * specific changes in + */ + +#include +#include +#include +#include + +#ifndef CONFIG_RMW_INSNS +spinlock_t semaphore_wake_lock; +#endif + +/* + * Semaphores are implemented using a two-way counter: + * The "count" variable is decremented for each process + * that tries to sleep, while the "waking" variable is + * incremented when the "up()" code goes to wake up waiting + * processes. + * + * Notably, the inline "up()" and "down()" functions can + * efficiently test if they need to do any extra work (up + * needs to do something only if count was negative before + * the increment operation. + * + * waking_non_zero() (from asm/semaphore.h) must execute + * atomically. + * + * When __up() is called, the count was negative before + * incrementing it, and we need to wake up somebody. + * + * This routine adds one to the count of processes that need to + * wake up and exit. ALL waiting processes actually wake up but + * only the one that gets to the "waking" field first will gate + * through and acquire the semaphore. The others will go back + * to sleep. + * + * Note that these functions are only called when there is + * contention on the lock, and as such all this is the + * "non-critical" part of the whole semaphore business. The + * critical part is the inline stuff in + * where we want to avoid any extra jumps and calls. + */ +void __up(struct semaphore *sem) +{ + wake_one_more(sem); + wake_up(&sem->wait); +} + +/* + * Perform the "down" function. Return zero for semaphore acquired, + * return negative for signalled out of the function. + * + * If called from __down, the return is ignored and the wait loop is + * not interruptible. This means that a task waiting on a semaphore + * using "down()" cannot be killed until someone does an "up()" on + * the semaphore. + * + * If called from __down_interruptible, the return value gets checked + * upon return. If the return value is negative then the task continues + * with the negative value in the return register (it can be tested by + * the caller). + * + * Either form may be used in conjunction with "up()". + * + */ + + +#define DOWN_HEAD(task_state) \ + \ + \ + current->state = (task_state); \ + add_wait_queue(&sem->wait, &wait); \ + \ + /* \ + * Ok, we're set up. sem->count is known to be less than zero \ + * so we must wait. \ + * \ + * We can let go the lock for purposes of waiting. \ + * We re-acquire it after awaking so as to protect \ + * all semaphore operations. \ + * \ + * If "up()" is called before we call waking_non_zero() then \ + * we will catch it right away. If it is called later then \ + * we will have to go through a wakeup cycle to catch it. \ + * \ + * Multiple waiters contend for the semaphore lock to see \ + * who gets to gate through and who has to wait some more. \ + */ \ + for (;;) { + +#define DOWN_TAIL(task_state) \ + current->state = (task_state); \ + } \ + current->state = TASK_RUNNING; \ + remove_wait_queue(&sem->wait, &wait); + +void __down(struct semaphore * sem) +{ + DECLARE_WAITQUEUE(wait, current); + + DOWN_HEAD(TASK_UNINTERRUPTIBLE) + if (waking_non_zero(sem)) + break; + schedule(); + DOWN_TAIL(TASK_UNINTERRUPTIBLE) +} + +int __down_interruptible(struct semaphore * sem) +{ + DECLARE_WAITQUEUE(wait, current); + int ret = 0; + + DOWN_HEAD(TASK_INTERRUPTIBLE) + + ret = waking_non_zero_interruptible(sem, current); + if (ret) + { + if (ret == 1) + /* ret != 0 only if we get interrupted -arca */ + ret = 0; + break; + } + schedule(); + DOWN_TAIL(TASK_INTERRUPTIBLE) + return ret; +} + +int __down_trylock(struct semaphore * sem) +{ + return waking_non_zero_trylock(sem); +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/kernel/setup.c linux.2.5.40-ac2/arch/m68knommu/kernel/setup.c --- linux.2.5.40/arch/m68knommu/kernel/setup.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/kernel/setup.c 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,416 @@ +/* + * linux/arch/m68knommu/kernel/setup.c + * + * Copyright (C) 1999,2002 Greg Ungerer (gerg@snapgear.com) + * Copyright (C) 1998,1999 D. Jeff Dionne + * Copyleft ()) 2000 James D. Schettine {james@telos-systems.com} + * Copyright (C) 1998 Kenneth Albanowski + * Copyright (C) 1995 Hamish Macdonald + * Copyright (C) 2000 Lineo Inc. (www.lineo.com) + * Copyright (C) 2001 Lineo, Inc. + * + * 68VZ328 Fixes/support Evan Stawnyczy + */ + +/* + * This file handles the architecture-dependent parts of system setup + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#ifdef CONFIG_BLK_DEV_INITRD +#include +#include +#endif + +#ifdef CONFIG_CONSOLE +extern struct consw *conswitchp; +#ifdef CONFIG_FRAMEBUFFER +extern struct consw fb_con; +#endif +#endif + +#if defined (CONFIG_M68360) +#include //Get the definition of QUICC type +extern void m360_cpm_reset(void); +extern QUICC *pquicc; +extern struct console sercons; + +// Mask to select if the PLL prescaler is enabled. +#define MCU_PREEN ((unsigned short)(0x0001 << 13)) + +#if defined(CONFIG_UCQUICC) +#define OSCILLATOR (unsigned long int)33000000 +#endif + +unsigned long int system_clock; +#endif + + +unsigned long rom_length; +unsigned long memory_start; +unsigned long memory_end; + +char command_line[512]; +char saved_command_line[512]; + +/* setup some dummy routines */ +static void dummy_waitbut(void) +{ +} + +void (*mach_sched_init) (void (*handler)(int, void *, struct pt_regs *)) = NULL; +void (*mach_tick)( void ) = NULL; +/* machine dependent keyboard functions */ +int (*mach_keyb_init) (void) = NULL; +int (*mach_kbdrate) (struct kbd_repeat *) = NULL; +void (*mach_kbd_leds) (unsigned int) = NULL; +/* machine dependent irq functions */ +void (*mach_init_IRQ) (void) = NULL; +void (*(*mach_default_handler)[]) (int, void *, struct pt_regs *) = NULL; +int (*mach_request_irq) (unsigned int, void (*)(int, void *, struct pt_regs *), + unsigned long, const char *, void *); +void (*mach_free_irq) (unsigned int irq, void *dev_id) = NULL; +void (*mach_enable_irq) (unsigned int) = NULL; +void (*mach_disable_irq) (unsigned int) = NULL; +int (*mach_get_irq_list) (struct seq_file *, void *v) = NULL; +void (*mach_process_int) (int irq, struct pt_regs *fp) = NULL; +void (*mach_trap_init) (void); +/* machine dependent timer functions */ +unsigned long (*mach_gettimeoffset) (void) = NULL; +void (*mach_gettod) (int*, int*, int*, int*, int*, int*) = NULL; +int (*mach_hwclk) (int, struct hwclk_time*) = NULL; +int (*mach_set_clock_mmss) (unsigned long) = NULL; +void (*mach_mksound)( unsigned int count, unsigned int ticks ) = NULL; +void (*mach_reset)( void ) = NULL; +void (*waitbut)(void) = dummy_waitbut; +void (*mach_debug_init)(void) = NULL; +void (*mach_halt)( void ) = NULL; +void (*mach_power_off)( void ) = NULL; + + +#ifdef CONFIG_M68000 + #define CPU "MC68000" +#endif +#ifdef CONFIG_M68328 + #define CPU "MC68328" +#endif +#ifdef CONFIG_M68EZ328 + #define CPU "MC68EZ328" +#endif +/* (es) */ +#ifdef CONFIG_M68VZ328 + #define CPU "MC68VZ328" +#endif +/* (/es) */ +#ifdef CONFIG_M68332 + #define CPU "MC68332" +#endif +#ifdef CONFIG_M68360 + #define CPU "MC68360" +#endif +#if defined(CONFIG_M5206) + #define CPU "COLDFIRE(m5206)" +#endif +#if defined(CONFIG_M5206e) + #define CPU "COLDFIRE(m5206e)" +#endif +#if defined(CONFIG_M5249) + #define CPU "COLDFIRE(m5249)" +#endif +#if defined(CONFIG_M5272) + #define CPU "COLDFIRE(m5272)" +#endif +#if defined(CONFIG_M5307) + #define CPU "COLDFIRE(m5307)" +#endif +#if defined(CONFIG_M5407) + #define CPU "COLDFIRE(m5407)" +#endif +#ifndef CPU + #define CPU "UNKOWN" +#endif + +/* (es) */ +/* note: why is this defined here? the must be a better place to put this */ +#if defined( CONFIG_TELOS) || defined( CONFIG_UCDIMM ) || defined( CONFIG_UCSIMM ) || defined(CONFIG_DRAGEN2) || (defined( CONFIG_PILOT ) && defined( CONFIG_M68328 )) +#define CAT_ROMARRAY +#endif +/* (/es) */ + +extern int _stext, _etext, _sdata, _edata, _sbss, _ebss, _end; +extern int _ramstart, _ramend; + +void setup_arch(char **cmdline_p) +{ + int bootmap_size; + +#if defined(CAT_ROMARRAY) && defined(DEBUG) + extern int __data_rom_start; + extern int __data_start; + int *romarray = (int *)((int) &__data_rom_start + + (int)&_edata - (int)&__data_start); +#endif + +#if defined(CONFIG_CHR_DEV_FLASH) || defined(CONFIG_BLK_DEV_FLASH) + /* we need to initialize the Flashrom device here since we might + * do things with flash early on in the boot + */ + flash_probe(); +#endif + + memory_start = PAGE_ALIGN(_ramstart); + memory_end = _ramend; /* by now the stack is part of the init task */ + + init_mm.start_code = (unsigned long) &_stext; + init_mm.end_code = (unsigned long) &_etext; + init_mm.end_data = (unsigned long) &_edata; + init_mm.brk = (unsigned long) 0; + + +#if defined (CONFIG_M68360) + m360_cpm_reset(); + + /* Calculate the real system clock value. */ + { + unsigned int local_pllcr = (unsigned int)(pquicc->sim_pllcr); + if( local_pllcr & MCU_PREEN ) // If the prescaler is dividing by 128 + { + int mf = (int)(pquicc->sim_pllcr & 0x0fff); + system_clock = (OSCILLATOR / 128) * (mf + 1); + } + else + { + int mf = (int)(pquicc->sim_pllcr & 0x0fff); + system_clock = (OSCILLATOR) * (mf + 1); + } + } + + /* Setup SMC 2 as a serial console */ + serial_console_setup(&sercons, NULL); + console_360_init(0, 0); +#endif + + config_BSP(&command_line[0], sizeof(command_line)); + + printk("\x0F\r\n\nuClinux/" CPU "\n"); + +/* (es) */ +#ifdef CONFIG_UCDIMM + printk("uCdimm by Lineo, Inc. \n"); +#endif +#ifdef CONFIG_M68VZ328 + printk("M68VZ328 support by Evan Stawnyczy \n"); +#endif +/* (/es) */ +#ifdef CONFIG_COLDFIRE + printk("COLDFIRE port done by Greg Ungerer, gerg@snapgear.com\n"); +#ifdef CONFIG_M5307 + printk("Modified for M5307 by Dave Miller, dmiller@intellistor.com\n"); +#endif +#ifdef CONFIG_ELITE + printk("Modified for M5206eLITE by Rob Scott, rscott@mtrob.fdns.net\n"); +#endif +#ifdef CONFIG_TELOS + printk("Modified for Omnia ToolVox by James D. Schettine, james@telos-systems.com\n"); +#endif +#endif + printk("Flat model support (C) 1998,1999 Kenneth Albanowski, D. Jeff Dionne\n"); + +#if defined( CONFIG_PILOT ) && defined( CONFIG_M68328 ) + printk("TRG SuperPilot FLASH card support \n"); +#endif + +#if defined( CONFIG_PILOT ) && defined( CONFIG_M68EZ328 ) + printk("PalmV support by Lineo Inc. \n"); +#endif + +#ifdef CONFIG_M68EZ328ADS + printk("M68EZ328ADS board support (C) 1999 Vladimir Gurevich \n"); +#endif + +#ifdef CONFIG_ALMA_ANS + printk("Alma Electronics board support (C) 1999 Vladimir Gurevich \n"); +#endif +#if defined (CONFIG_M68360) + printk("QUICC port done by SED Systems ,\n"); + printk("based on 2.0.38 port by Lineo Inc. .\n"); +#endif +#ifdef CONFIG_DRAGEN2 + printk("Dragon Engine II board support by Georges Menie\n"); +#endif + +#ifdef DEBUG + printk("KERNEL -> TEXT=0x%06x-0x%06x DATA=0x%06x-0x%06x " + "BSS=0x%06x-0x%06x\n", (int) &_stext, (int) &_etext, + (int) &_sdata, (int) &_edata, + (int) &_sbss, (int) &_ebss); + printk("KERNEL -> ROMFS=0x%06x-0x%06x MEM=0x%06x-0x%06x " + "STACK=0x%06x-0x%06x\n", +#ifdef CAT_ROMARRAY + (int) romarray, ((int) romarray) + romarray[2], +#else + (int) &_ebss, (int) memory_start, +#endif + (int) memory_start, (int) memory_end, + (int) memory_end, (int) _ramend); +#endif + +#ifdef CONFIG_BLK_DEV_BLKMEM + ROOT_DEV = MKDEV(BLKMEM_MAJOR, 0); +#endif + + /* Keep a copy of command line */ + *cmdline_p = &command_line[0]; + memcpy(saved_command_line, command_line, sizeof(saved_command_line)); + saved_command_line[sizeof(saved_command_line)-1] = 0; + +#ifdef DEBUG + if (strlen(*cmdline_p)) + printk("Command line: '%s'\n", *cmdline_p); +#endif + +#ifdef CONFIG_CONSOLE +#ifdef CONFIG_FRAMEBUFFER + conswitchp = &fb_con; +#else + conswitchp = 0; +#endif +#endif + + /* + * give all the memory to the bootmap allocator, tell it to put the + * boot mem_map at the start of memory + */ + bootmap_size = init_bootmem_node( + NODE_DATA(0), + memory_start >> PAGE_SHIFT, /* map goes here */ + PAGE_OFFSET >> PAGE_SHIFT, /* 0 on coldfire */ + memory_end >> PAGE_SHIFT); + /* + * free the usable memory, we have to make sure we do not free + * the bootmem bitmap so we then reserve it after freeing it :-) + */ + free_bootmem(memory_start, memory_end - memory_start); + reserve_bootmem(memory_start, bootmap_size); + /* + * get kmalloc into gear + */ + paging_init(); +#ifdef DEBUG + printk("Done setup_arch\n"); +#endif + +} + +int get_cpuinfo(char * buffer) +{ + char *cpu, *mmu, *fpu; + u_long clockfreq; + + cpu = CPU; + mmu = "none"; + fpu = "none"; + +#ifdef CONFIG_COLDFIRE + clockfreq = (loops_per_jiffy*HZ)*3; +#else + clockfreq = (loops_per_jiffy*HZ)*16; +#endif + + return(sprintf(buffer, "CPU:\t\t%s\n" + "MMU:\t\t%s\n" + "FPU:\t\t%s\n" + "Clocking:\t%lu.%1luMHz\n" + "BogoMips:\t%lu.%02lu\n" + "Calibration:\t%lu loops\n", + cpu, mmu, fpu, + clockfreq/1000000,(clockfreq/100000)%10, + (loops_per_jiffy*HZ)/500000,((loops_per_jiffy*HZ)/5000)%100, + (loops_per_jiffy*HZ))); + +} + +/* + * Get CPU information for use by the procfs. + */ + +static int show_cpuinfo(struct seq_file *m, void *v) +{ + char *cpu, *mmu, *fpu; + u_long clockfreq; + + cpu = CPU; + mmu = "none"; + fpu = "none"; + +#ifdef CONFIG_COLDFIRE + clockfreq = (loops_per_jiffy*HZ)*3; +#else + clockfreq = (loops_per_jiffy*HZ)*16; +#endif + + seq_printf(m, "CPU:\t\t%s\n" + "MMU:\t\t%s\n" + "FPU:\t\t%s\n" + "Clocking:\t%lu.%1luMHz\n" + "BogoMips:\t%lu.%02lu\n" + "Calibration:\t%lu loops\n", + cpu, mmu, fpu, + clockfreq/1000000,(clockfreq/100000)%10, + (loops_per_jiffy*HZ)/500000,((loops_per_jiffy*HZ)/5000)%100, + (loops_per_jiffy*HZ)); + + return 0; +} + +static void *c_start(struct seq_file *m, loff_t *pos) +{ + return *pos < NR_CPUS ? ((void *) 0x12345678) : NULL; +} + +static void *c_next(struct seq_file *m, void *v, loff_t *pos) +{ + ++*pos; + return c_start(m, pos); +} + +static void c_stop(struct seq_file *m, void *v) +{ +} + +struct seq_operations cpuinfo_op = { + start: c_start, + next: c_next, + stop: c_stop, + show: show_cpuinfo, +}; + +void arch_gettod(int *year, int *mon, int *day, int *hour, + int *min, int *sec) +{ + if (mach_gettod) + mach_gettod(year, mon, day, hour, min, sec); + else + *year = *mon = *day = *hour = *min = *sec = 0; +} + + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/kernel/sys_m68k.c linux.2.5.40-ac2/arch/m68knommu/kernel/sys_m68k.c --- linux.2.5.40/arch/m68knommu/kernel/sys_m68k.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/kernel/sys_m68k.c 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,215 @@ +/* + * linux/arch/m68knommu/kernel/sys_m68k.c + * + * This file contains various random system calls that + * have a non-standard calling sequence on the Linux/m68k + * platform. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +/* + * sys_pipe() is the normal C calling standard for creating + * a pipe. It's not the way unix traditionally does this, though. + */ +asmlinkage int sys_pipe(unsigned long * fildes) +{ + int fd[2]; + int error; + + error = do_pipe(fd); + if (!error) { + if (copy_to_user(fildes, fd, 2*sizeof(int))) + error = -EFAULT; + } + return error; +} + +/* common code for old and new mmaps */ +static inline long do_mmap2( + unsigned long addr, unsigned long len, + unsigned long prot, unsigned long flags, + unsigned long fd, unsigned long pgoff) +{ + int error = -EBADF; + struct file * file = NULL; + + flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE); + if (!(flags & MAP_ANONYMOUS)) { + file = fget(fd); + if (!file) + goto out; + } + + down_write(¤t->mm->mmap_sem); + error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff); + up_write(¤t->mm->mmap_sem); + + if (file) + fput(file); +out: + return error; +} + +asmlinkage long sys_mmap2(unsigned long addr, unsigned long len, + unsigned long prot, unsigned long flags, + unsigned long fd, unsigned long pgoff) +{ + return do_mmap2(addr, len, prot, flags, fd, pgoff); +} + +/* + * Perform the select(nd, in, out, ex, tv) and mmap() system + * calls. Linux/m68k cloned Linux/i386, which didn't use to be able to + * handle more than 4 system call parameters, so these system calls + * used a memory block for parameter passing.. + */ + +struct mmap_arg_struct { + unsigned long addr; + unsigned long len; + unsigned long prot; + unsigned long flags; + unsigned long fd; + unsigned long offset; +}; + +asmlinkage int old_mmap(struct mmap_arg_struct *arg) +{ + struct mmap_arg_struct a; + int error = -EFAULT; + + if (copy_from_user(&a, arg, sizeof(a))) + goto out; + + error = -EINVAL; + if (a.offset & ~PAGE_MASK) + goto out; + + a.flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE); + + error = do_mmap2(a.addr, a.len, a.prot, a.flags, a.fd, a.offset >> PAGE_SHIFT); +out: + return error; +} + +extern asmlinkage int sys_select(int, fd_set *, fd_set *, fd_set *, struct timeval *); + +struct sel_arg_struct { + unsigned long n; + fd_set *inp, *outp, *exp; + struct timeval *tvp; +}; + +asmlinkage int old_select(struct sel_arg_struct *arg) +{ + struct sel_arg_struct a; + + if (copy_from_user(&a, arg, sizeof(a))) + return -EFAULT; + /* sys_select() does the appropriate kernel locking */ + return sys_select(a.n, a.inp, a.outp, a.exp, a.tvp); +} + +/* + * sys_ipc() is the de-multiplexer for the SysV IPC calls.. + * + * This is really horribly ugly. + */ +asmlinkage int sys_ipc (uint call, int first, int second, + int third, void *ptr, long fifth) +{ + int version; + + version = call >> 16; /* hack for backward compatibility */ + call &= 0xffff; + + if (call <= SEMCTL) + switch (call) { + case SEMOP: + return sys_semop (first, (struct sembuf *)ptr, second); + case SEMGET: + return sys_semget (first, second, third); + case SEMCTL: { + union semun fourth; + if (!ptr) + return -EINVAL; + if (get_user(fourth.__pad, (void **) ptr)) + return -EFAULT; + return sys_semctl (first, second, third, fourth); + } + default: + return -EINVAL; + } + if (call <= MSGCTL) + switch (call) { + case MSGSND: + return sys_msgsnd (first, (struct msgbuf *) ptr, + second, third); + case MSGRCV: + switch (version) { + case 0: { + struct ipc_kludge tmp; + if (!ptr) + return -EINVAL; + if (copy_from_user (&tmp, + (struct ipc_kludge *)ptr, + sizeof (tmp))) + return -EFAULT; + return sys_msgrcv (first, tmp.msgp, second, + tmp.msgtyp, third); + } + default: + return sys_msgrcv (first, + (struct msgbuf *) ptr, + second, fifth, third); + } + case MSGGET: + return sys_msgget ((key_t) first, second); + case MSGCTL: + return sys_msgctl (first, second, + (struct msqid_ds *) ptr); + default: + return -EINVAL; + } + + return -EINVAL; +} + +asmlinkage int sys_ioperm(unsigned long from, unsigned long num, int on) +{ + return -ENOSYS; +} + + +/* sys_cacheflush -- flush (part of) the processor cache. */ +asmlinkage int +sys_cacheflush (unsigned long addr, int scope, int cache, unsigned long len) +{ + flush_cache_all(); + return(0); +} + +asmlinkage int sys_getpagesize(void) +{ + return PAGE_SIZE; +} + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/kernel/time.c linux.2.5.40-ac2/arch/m68knommu/kernel/time.c --- linux.2.5.40/arch/m68knommu/kernel/time.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/kernel/time.c 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,178 @@ +/* + * linux/arch/m68knommu/kernel/time.c + * + * Copyright (C) 1991, 1992, 1995 Linus Torvalds + * + * This file contains the m68k-specific time handling details. + * Most of the stuff is located in the machine specific files. + * + * 1997-09-10 Updated NTP code according to technical memorandum Jan '96 + * "A Kernel Model for Precision Timekeeping" by Dave Mills + */ + +#include /* CONFIG_HEARTBEAT */ +#include +#include +#include +#include +#include +#include + +#include +#include + +#include + +#define TICK_SIZE (tick_nsec / 1000) + +u64 jiffies_64; + +static inline int set_rtc_mmss(unsigned long nowtime) +{ + if (mach_set_clock_mmss) + return mach_set_clock_mmss (nowtime); + return -1; +} + +static inline void do_profile (unsigned long pc) +{ + if (prof_buffer && current->pid) { + extern int _stext; + pc -= (unsigned long) &_stext; + pc >>= prof_shift; + if (pc < prof_len) + ++prof_buffer[pc]; + else + /* + * Don't ignore out-of-bounds PC values silently, + * put them into the last histogram slot, so if + * present, they will show up as a sharp peak. + */ + ++prof_buffer[prof_len-1]; + } +} + +/* + * timer_interrupt() needs to keep up the real-time clock, + * as well as call the "do_timer()" routine every clocktick + */ +static void timer_interrupt(int irq, void *dummy, struct pt_regs * regs) +{ + /* last time the cmos clock got updated */ + static long last_rtc_update=0; + + /* may need to kick the hardware timer */ + if (mach_tick) + mach_tick(); + + do_timer(regs); + + if (!user_mode(regs)) + do_profile(regs->pc); + + /* + * If we have an externally synchronized Linux clock, then update + * CMOS clock accordingly every ~11 minutes. Set_rtc_mmss() has to be + * called as close as possible to 500 ms before the new second starts. + */ + if ((time_status & STA_UNSYNC) == 0 && + xtime.tv_sec > last_rtc_update + 660 && + (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 && + (xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) { + if (set_rtc_mmss(xtime.tv_sec) == 0) + last_rtc_update = xtime.tv_sec; + else + last_rtc_update = xtime.tv_sec - 600; /* do it again in 60 s */ + } +#ifdef CONFIG_HEARTBEAT + /* use power LED as a heartbeat instead -- much more useful + for debugging -- based on the version for PReP by Cort */ + /* acts like an actual heart beat -- ie thump-thump-pause... */ + if (mach_heartbeat) { + static unsigned cnt = 0, period = 0, dist = 0; + + if (cnt == 0 || cnt == dist) + mach_heartbeat( 1 ); + else if (cnt == 7 || cnt == dist+7) + mach_heartbeat( 0 ); + + if (++cnt > period) { + cnt = 0; + /* The hyperbolic function below modifies the heartbeat period + * length in dependency of the current (5min) load. It goes + * through the points f(0)=126, f(1)=86, f(5)=51, + * f(inf)->30. */ + period = ((672<= 1000000) { + usec -= 1000000; + sec++; + } + + tv->tv_sec = sec; + tv->tv_usec = usec; +} + +void do_settimeofday(struct timeval *tv) +{ + write_lock_irq(&xtime_lock); + /* This is revolting. We need to set the xtime.tv_usec + * correctly. However, the value in this location is + * is value at the last tick. + * Discover what correction gettimeofday + * would have done, and then undo it! + */ + if (mach_gettimeoffset) + tv->tv_usec -= mach_gettimeoffset(); + + while (tv->tv_usec < 0) { + tv->tv_usec += 1000000; + tv->tv_sec--; + } + + xtime.tv_sec = tv->tv_sec; + xtime.tv_nsec = (tv->tv_sec * 1000); + time_adjust = 0; /* stop active adjtime() */ + time_status |= STA_UNSYNC; + time_maxerror = NTP_PHASE_LIMIT; + time_esterror = NTP_PHASE_LIMIT; + write_unlock_irq(&xtime_lock); +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/kernel/traps.c linux.2.5.40-ac2/arch/m68knommu/kernel/traps.c --- linux.2.5.40/arch/m68knommu/kernel/traps.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/kernel/traps.c 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,377 @@ +/* + * linux/arch/m68k/nommukernel/traps.c + * + * Copyright (C) 1993, 1994 by Hamish Macdonald + * + * 68040 fixes by Michael Rausch + * 68040 fixes by Martin Apel + * 68060 fixes by Roman Hodek + * 68060 fixes by Jesper Skov + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive + * for more details. + */ + +/* + * Sets up all exception vectors + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include + +/* assembler routines */ +asmlinkage void system_call(void); +asmlinkage void buserr(void); +asmlinkage void trap(void); +asmlinkage void inthandler(void); +asmlinkage void nmihandler(void); +#ifdef CONFIG_M68KFPU_EMU +asmlinkage void fpu_emu(void); +#endif + +e_vector vectors[256] = { + 0, 0, buserr, trap, trap, trap, trap, trap, + trap, trap, trap, trap, trap, trap, trap, trap, + trap, trap, trap, trap, trap, trap, trap, trap, +#ifdef CONFIG_COLDFIRE + inthandler, inthandler, inthandler, inthandler, + inthandler, inthandler, inthandler, inthandler, +#else + trap, trap, trap, trap, trap, trap, trap, trap, +#endif + /* TRAP #0-15 */ + system_call, trap, trap, trap, trap, trap, trap, trap, + trap, trap, trap, trap, trap, trap, trap, trap, + 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, +}; + +/* nmi handler for the Amiga */ +asm(".text\n" + __ALIGN_STR "\n" + "nmihandler: rte"); + +/* + * this must be called very early as the kernel might + * use some instruction that are emulated on the 060 + */ +void __init base_trap_init(void) +{ +#ifdef CONFIG_COLDFIRE + /* setup the exception vector table */ + __asm__ volatile ("movec %0,%%vbr" : : "r" ((void*)vectors)); +#endif +} + +void __init trap_init(void) +{ + if (mach_trap_init) + mach_trap_init(); +} + + + +static char *vec_names[] = { + "RESET SP", "RESET PC", "BUS ERROR", "ADDRESS ERROR", + "ILLEGAL INSTRUCTION", "ZERO DIVIDE", "CHK", "TRAPcc", + "PRIVILEGE VIOLATION", "TRACE", "LINE 1010", "LINE 1111", + "UNASSIGNED RESERVED 12", "COPROCESSOR PROTOCOL VIOLATION", + "FORMAT ERROR", "UNINITIALIZED INTERRUPT", + "UNASSIGNED RESERVED 16", "UNASSIGNED RESERVED 17", + "UNASSIGNED RESERVED 18", "UNASSIGNED RESERVED 19", + "UNASSIGNED RESERVED 20", "UNASSIGNED RESERVED 21", + "UNASSIGNED RESERVED 22", "UNASSIGNED RESERVED 23", + "SPURIOUS INTERRUPT", "LEVEL 1 INT", "LEVEL 2 INT", "LEVEL 3 INT", + "LEVEL 4 INT", "LEVEL 5 INT", "LEVEL 6 INT", "LEVEL 7 INT", + "SYSCALL", "TRAP #1", "TRAP #2", "TRAP #3", + "TRAP #4", "TRAP #5", "TRAP #6", "TRAP #7", + "TRAP #8", "TRAP #9", "TRAP #10", "TRAP #11", + "TRAP #12", "TRAP #13", "TRAP #14", "TRAP #15", + "FPCP BSUN", "FPCP INEXACT", "FPCP DIV BY 0", "FPCP UNDERFLOW", + "FPCP OPERAND ERROR", "FPCP OVERFLOW", "FPCP SNAN", + "FPCP UNSUPPORTED OPERATION", + "MMU CONFIGURATION ERROR" + }; + +void die_if_kernel(char *,struct pt_regs *,int); +asmlinkage int do_page_fault(struct pt_regs *regs, unsigned long address, + unsigned long error_code); +asmlinkage void trap_c(struct frame *fp); + +asmlinkage void buserr_c(struct frame *fp) +{ + /* Only set esp0 if coming from user mode */ + if (user_mode(&fp->ptregs)) + current->thread.esp0 = (unsigned long) fp; + +#if DEBUG + printk ("*** Bus Error *** Format is %x\n", fp->ptregs.format); +#endif + + die_if_kernel("bad frame format",&fp->ptregs,0); +#if DEBUG + printk("Unknown SIGSEGV - 4\n"); +#endif + force_sig(SIGSEGV, current); +} + + +int kstack_depth_to_print = 48; + +/* MODULE_RANGE is a guess of how much space is likely to be + vmalloced. */ +#define MODULE_RANGE (8*1024*1024) + +void show_stack(unsigned long *esp) +{ + unsigned long *stack, *endstack, addr; + extern char _start, _etext; + int i; + + if (esp == NULL) + esp = (unsigned long *) &esp; + + stack = esp; + endstack = (unsigned long *) PAGE_ALIGN(addr); + + printk("Stack from %08lx:", (unsigned long)stack); + for (i = 0; i < kstack_depth_to_print; i++) { + if (stack + 1 > endstack) + break; + if (i % 8 == 0) + printk("\n "); + printk(" %08lx", *stack++); + } + + printk("\nCall Trace:"); + stack = (unsigned long *) addr; + i = 0; + while (stack + 1 <= endstack) { + addr = *stack++; + /* + * If the address is either in the text segment of the + * kernel, or in the region which contains vmalloc'ed + * memory, it *may* be the address of a calling + * routine; if so, print it so that someone tracing + * down the cause of the crash will be able to figure + * out the call path that was taken. + */ + if (((addr >= (unsigned long) &_start) && + (addr <= (unsigned long) &_etext))) { + if (i % 4 == 0) + printk("\n "); + printk(" [<%08lx>]", addr); + i++; + } + } + printk("\n"); +} + +void bad_super_trap(struct frame *fp) +{ + console_verbose(); + if (fp->ptregs.vector < 4*sizeof(vec_names)/sizeof(vec_names[0])) + printk ("*** %s *** FORMAT=%X\n", + vec_names[(fp->ptregs.vector) >> 2], + fp->ptregs.format); + else + printk ("*** Exception %d *** FORMAT=%X\n", + (fp->ptregs.vector) >> 2, + fp->ptregs.format); + printk ("Current process id is %d\n", current->pid); + die_if_kernel("BAD KERNEL TRAP", &fp->ptregs, 0); +} + +asmlinkage void trap_c(struct frame *fp) +{ + int sig; + siginfo_t info; + + if (fp->ptregs.sr & PS_S) { + if ((fp->ptregs.vector >> 2) == VEC_TRACE) { + /* traced a trapping instruction */ + current->ptrace |= PT_DTRACE; + } else + bad_super_trap(fp); + return; + } + + /* send the appropriate signal to the user program */ + switch ((fp->ptregs.vector) >> 2) { + case VEC_ADDRERR: + info.si_code = BUS_ADRALN; + sig = SIGBUS; + break; + case VEC_ILLEGAL: + case VEC_LINE10: + case VEC_LINE11: + info.si_code = ILL_ILLOPC; + sig = SIGILL; + break; + case VEC_PRIV: + info.si_code = ILL_PRVOPC; + sig = SIGILL; + break; + case VEC_COPROC: + info.si_code = ILL_COPROC; + sig = SIGILL; + break; + case VEC_TRAP1: /* gdbserver breakpoint */ + fp->ptregs.pc -= 2; + info.si_code = TRAP_TRACE; + sig = SIGTRAP; + break; + case VEC_TRAP2: + case VEC_TRAP3: + case VEC_TRAP4: + case VEC_TRAP5: + case VEC_TRAP6: + case VEC_TRAP7: + case VEC_TRAP8: + case VEC_TRAP9: + case VEC_TRAP10: + case VEC_TRAP11: + case VEC_TRAP12: + case VEC_TRAP13: + case VEC_TRAP14: + info.si_code = ILL_ILLTRP; + sig = SIGILL; + break; + case VEC_FPBRUC: + case VEC_FPOE: + case VEC_FPNAN: + info.si_code = FPE_FLTINV; + sig = SIGFPE; + break; + case VEC_FPIR: + info.si_code = FPE_FLTRES; + sig = SIGFPE; + break; + case VEC_FPDIVZ: + info.si_code = FPE_FLTDIV; + sig = SIGFPE; + break; + case VEC_FPUNDER: + info.si_code = FPE_FLTUND; + sig = SIGFPE; + break; + case VEC_FPOVER: + info.si_code = FPE_FLTOVF; + sig = SIGFPE; + break; + case VEC_ZERODIV: + info.si_code = FPE_INTDIV; + sig = SIGFPE; + break; + case VEC_CHK: + case VEC_TRAP: + info.si_code = FPE_INTOVF; + sig = SIGFPE; + break; + case VEC_TRACE: /* ptrace single step */ + info.si_code = TRAP_TRACE; + sig = SIGTRAP; + break; + case VEC_TRAP15: /* breakpoint */ + info.si_code = TRAP_BRKPT; + sig = SIGTRAP; + break; + default: + info.si_code = ILL_ILLOPC; + sig = SIGILL; + break; + } + info.si_signo = sig; + info.si_errno = 0; + switch (fp->ptregs.format) { + default: + info.si_addr = (void *) fp->ptregs.pc; + break; + case 2: + info.si_addr = (void *) fp->un.fmt2.iaddr; + break; + case 7: + info.si_addr = (void *) fp->un.fmt7.effaddr; + break; + case 9: + info.si_addr = (void *) fp->un.fmt9.iaddr; + break; + case 10: + info.si_addr = (void *) fp->un.fmta.daddr; + break; + case 11: + info.si_addr = (void *) fp->un.fmtb.daddr; + break; + } + force_sig_info (sig, &info, current); +} + +asmlinkage void set_esp0(unsigned long ssp) +{ + current->thread.esp0 = ssp; +} + +void show_trace_task(struct task_struct *tsk) +{ + printk("STACK ksp=0x%lx, usp=0x%lx\n", tsk->thread.ksp, tsk->thread.usp); +} + +void die_if_kernel(char *str, struct pt_regs *fp, int nr) +{ + if (!(fp->sr & PS_S)) + return; + + console_verbose(); + printk("%s: %08x\n",str,nr); + printk("PC: [<%08lx>]\nSR: %04x SP: %p a2: %08lx\n", + fp->pc, fp->sr, fp, fp->a2); + printk("d0: %08lx d1: %08lx d2: %08lx d3: %08lx\n", + fp->d0, fp->d1, fp->d2, fp->d3); + printk("d4: %08lx d5: %08lx a0: %08lx a1: %08lx\n", + fp->d4, fp->d5, fp->a0, fp->a1); + + printk("Process %s (pid: %d, stackpage=%08lx)\n", + current->comm, current->pid, PAGE_SIZE+(unsigned long)current); + show_stack((struct frame *)fp); + do_exit(SIGSEGV); +} + +/* + * This function is called if an error occur while accessing + * user-space from the fpsp040 code. + */ +asmlinkage void fpsp040_die(void) +{ + do_exit(SIGSEGV); +} + +#ifdef CONFIG_M68KFPU_EMU +asmlinkage void fpemu_signal(int signal, int code, void *addr) +{ + siginfo_t info; + + info.si_signo = signal; + info.si_errno = 0; + info.si_code = code; + info.si_addr = addr; + force_sig_info(signal, &info, current); +} +#endif diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/lib/ashrdi3.c linux.2.5.40-ac2/arch/m68knommu/lib/ashrdi3.c --- linux.2.5.40/arch/m68knommu/lib/ashrdi3.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/lib/ashrdi3.c 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,63 @@ +/* ashrdi3.c extracted from gcc-2.7.2/libgcc2.c which is: */ +/* Copyright (C) 1989, 1992, 1993, 1994, 1995 Free Software Foundation, Inc. + +This file is part of GNU CC. + +GNU CC is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2, or (at your option) +any later version. + +GNU CC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with GNU CC; see the file COPYING. If not, write to +the Free Software Foundation, 59 Temple Place - Suite 330, +Boston, MA 02111-1307, USA. */ + +#define BITS_PER_UNIT 8 + +typedef int SItype __attribute__ ((mode (SI))); +typedef unsigned int USItype __attribute__ ((mode (SI))); +typedef int DItype __attribute__ ((mode (DI))); +typedef int word_type __attribute__ ((mode (__word__))); + +struct DIstruct {SItype high, low;}; + +typedef union +{ + struct DIstruct s; + DItype ll; +} DIunion; + +DItype +__ashrdi3 (DItype u, word_type b) +{ + DIunion w; + word_type bm; + DIunion uu; + + if (b == 0) + return u; + + uu.ll = u; + + bm = (sizeof (SItype) * BITS_PER_UNIT) - b; + if (bm <= 0) + { + /* w.s.high = 1..1 or 0..0 */ + w.s.high = uu.s.high >> (sizeof (SItype) * BITS_PER_UNIT - 1); + w.s.low = uu.s.high >> -bm; + } + else + { + USItype carries = (USItype)uu.s.high << bm; + w.s.high = uu.s.high >> b; + w.s.low = ((USItype)uu.s.low >> b) | carries; + } + + return w.ll; +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/lib/checksum.c linux.2.5.40-ac2/arch/m68knommu/lib/checksum.c --- linux.2.5.40/arch/m68knommu/lib/checksum.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/lib/checksum.c 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,156 @@ +/* + * INET An implementation of the TCP/IP protocol suite for the LINUX + * operating system. INET is implemented using the BSD Socket + * interface as the means of communication with the user level. + * + * IP/TCP/UDP checksumming routines + * + * Authors: Jorge Cwik, + * Arnt Gulbrandsen, + * Tom May, + * Andreas Schwab, + * Lots of code moved from tcp.c and ip.c; see those files + * for more names. + * + * 03/02/96 Jes Sorensen, Andreas Schwab, Roman Hodek: + * Fixed some nasty bugs, causing some horrible crashes. + * A: At some points, the sum (%0) was used as + * length-counter instead of the length counter + * (%1). Thanks to Roman Hodek for pointing this out. + * B: GCC seems to mess up if one uses too many + * data-registers to hold input values and one tries to + * specify d0 and d1 as scratch registers. Letting gcc choose these + * registers itself solves the problem. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +/* Revised by Kenneth Albanowski for m68knommu. Basic problem: unaligned access kills, so most + of the assembly has to go. */ + +#include + +static inline unsigned short from32to16(unsigned long x) +{ + /* add up 16-bit and 16-bit for 16+c bit */ + x = (x & 0xffff) + (x >> 16); + /* add up carry.. */ + x = (x & 0xffff) + (x >> 16); + return x; +} + +static unsigned long do_csum(const unsigned char * buff, int len) +{ + int odd, count; + unsigned long result = 0; + + if (len <= 0) + goto out; + odd = 1 & (unsigned long) buff; + if (odd) { + result = *buff; + len--; + buff++; + } + count = len >> 1; /* nr of 16-bit words.. */ + if (count) { + if (2 & (unsigned long) buff) { + result += *(unsigned short *) buff; + count--; + len -= 2; + buff += 2; + } + count >>= 1; /* nr of 32-bit words.. */ + if (count) { + unsigned long carry = 0; + do { + unsigned long w = *(unsigned long *) buff; + count--; + buff += 4; + result += carry; + result += w; + carry = (w > result); + } while (count); + result += carry; + result = (result & 0xffff) + (result >> 16); + } + if (len & 2) { + result += *(unsigned short *) buff; + buff += 2; + } + } + if (len & 1) + result += (*buff << 8); + result = from32to16(result); + if (odd) + result = ((result >> 8) & 0xff) | ((result & 0xff) << 8); +out: + return result; +} + +/* + * This is a version of ip_compute_csum() optimized for IP headers, + * which always checksum on 4 octet boundaries. + */ +unsigned short ip_fast_csum(unsigned char * iph, unsigned int ihl) +{ + return ~do_csum(iph,ihl*4); +} + +/* + * computes the checksum of a memory block at buff, length len, + * and adds in "sum" (32-bit) + * + * returns a 32-bit number suitable for feeding into itself + * or csum_tcpudp_magic + * + * this function must be called with even lengths, except + * for the last fragment, which may be odd + * + * it's best to have buff aligned on a 32-bit boundary + */ +unsigned int csum_partial(const unsigned char * buff, int len, unsigned int sum) +{ + unsigned int result = do_csum(buff, len); + + /* add in old sum, and carry.. */ + result += sum; + if (sum > result) + result += 1; + return result; +} + +/* + * this routine is used for miscellaneous IP-like checksums, mainly + * in icmp.c + */ +unsigned short ip_compute_csum(const unsigned char * buff, int len) +{ + return ~do_csum(buff,len); +} + +/* + * copy from fs while checksumming, otherwise like csum_partial + */ + +unsigned int +csum_partial_copy_from_user(const char *src, char *dst, int len, int sum, int *csum_err) +{ + if (csum_err) *csum_err = 0; + memcpy(dst, src, len); + return csum_partial(dst, len, sum); +} + +/* + * copy from ds while checksumming, otherwise like csum_partial + */ + +unsigned int +csum_partial_copy(const char *src, char *dst, int len, int sum) +{ + memcpy(dst, src, len); + return csum_partial(dst, len, sum); +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/lib/Makefile linux.2.5.40-ac2/arch/m68knommu/lib/Makefile --- linux.2.5.40/arch/m68knommu/lib/Makefile 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/lib/Makefile 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,10 @@ +# +# Makefile for m68k-specific library files.. +# + +AFLAGS += -D__ASSEMBLY__ -traditional + +L_TARGET = lib.a +obj-y = ashrdi3.o checksum.o semaphore.o memcpy.o memset.o + +include $(TOPDIR)/Rules.make diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/lib/memcpy.c linux.2.5.40-ac2/arch/m68knommu/lib/memcpy.c --- linux.2.5.40/arch/m68knommu/lib/memcpy.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/lib/memcpy.c 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,63 @@ + +#include +#include + +void * memcpy(void * to, const void * from, size_t n) +{ +#ifdef CONFIG_COLDFIRE + void *xto = to; + size_t temp; + + if (!n) + return xto; + if ((long) to & 1) + { + char *cto = to; + const char *cfrom = from; + *cto++ = *cfrom++; + to = cto; + from = cfrom; + n--; + } + if (n > 2 && (long) to & 2) + { + short *sto = to; + const short *sfrom = from; + *sto++ = *sfrom++; + to = sto; + from = sfrom; + n -= 2; + } + temp = n >> 2; + if (temp) + { + long *lto = to; + const long *lfrom = from; + for (; temp; temp--) + *lto++ = *lfrom++; + to = lto; + from = lfrom; + } + if (n & 2) + { + short *sto = to; + const short *sfrom = from; + *sto++ = *sfrom++; + to = sto; + from = sfrom; + } + if (n & 1) + { + char *cto = to; + const char *cfrom = from; + *cto = *cfrom; + } + return xto; +#else + const char *c_from = from; + char *c_to = to; + while (n-- > 0) + *c_to++ = *c_from++; + return((void *) to); +#endif +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/lib/memset.c linux.2.5.40-ac2/arch/m68knommu/lib/memset.c --- linux.2.5.40/arch/m68knommu/lib/memset.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/lib/memset.c 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,47 @@ +#include + +void * memset(void * s, int c, size_t count) +{ + void *xs = s; + size_t temp; + + if (!count) + return xs; + c &= 0xff; + c |= c << 8; + c |= c << 16; + if ((long) s & 1) + { + char *cs = s; + *cs++ = c; + s = cs; + count--; + } + if (count > 2 && (long) s & 2) + { + short *ss = s; + *ss++ = c; + s = ss; + count -= 2; + } + temp = count >> 2; + if (temp) + { + long *ls = s; + for (; temp; temp--) + *ls++ = c; + s = ls; + } + if (count & 2) + { + short *ss = s; + *ss++ = c; + s = ss; + } + if (count & 1) + { + char *cs = s; + *cs = c; + } + return xs; +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/lib/semaphore.S linux.2.5.40-ac2/arch/m68knommu/lib/semaphore.S --- linux.2.5.40/arch/m68knommu/lib/semaphore.S 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/lib/semaphore.S 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,67 @@ +/* + * linux/arch/m68k/lib/semaphore.S + * + * Copyright (C) 1996 Linus Torvalds + * + * m68k version by Andreas Schwab + * + * MAR/1999 -- modified to support ColdFire (gerg@snapgear.com) + */ + +#include +#include +#include + +/* + * "down_failed" is called with the eventual return address + * in %a0, and the address of the semaphore in %a1. We need + * to increment the number of waiters on the semaphore, + * call "__down()", and then eventually return to try again. + */ +ENTRY(__down_failed) +#ifdef CONFIG_COLDFIRE + subl #12,%sp + moveml %a0/%d0/%d1,(%sp) +#else + moveml %a0/%d0/%d1,-(%sp) +#endif + movel %a1,-(%sp) + jbsr __down + movel (%sp)+,%a1 + movel (%sp)+,%d0 + movel (%sp)+,%d1 + rts + +ENTRY(__down_failed_interruptible) + movel %a0,-(%sp) + movel %d1,-(%sp) + movel %a1,-(%sp) + jbsr __down_interruptible + movel (%sp)+,%a1 + movel (%sp)+,%d1 + rts + +ENTRY(__up_wakeup) +#ifdef CONFIG_COLDFIRE + subl #12,%sp + moveml %a0/%d0/%d1,(%sp) +#else + moveml %a0/%d0/%d1,-(%sp) +#endif + movel %a1,-(%sp) + jbsr __up + movel (%sp)+,%a1 + movel (%sp)+,%d0 + movel (%sp)+,%d1 + rts + +ENTRY(__down_failed_trylock) + movel %a0,-(%sp) + movel %d1,-(%sp) + movel %a1,-(%sp) + jbsr __down_trylock + movel (%sp)+,%a1 + movel (%sp)+,%d1 + movel (%sp)+,%a0 + rts + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/Makefile linux.2.5.40-ac2/arch/m68knommu/Makefile --- linux.2.5.40/arch/m68knommu/Makefile 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/Makefile 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,69 @@ +# +# m68knommu/Makefile +# +# This file is included by the global makefile so that you can add your own +# architecture-specific flags and dependencies. Remember to do have actions +# for "archclean" and "archdep" for cleaning up and making dependencies for +# this architecture +# +# This file is subject to the terms and conditions of the GNU General Public +# License. See the file "COPYING" in the main directory of this archive +# for more details. +# +# Copyright (c) 1999,2001 D. Jeff Dionne , +# Rt-Control Inc. / Lineo, Inc. +# +# Copyright (C) 1998,1999 D. Jeff Dionne , +# Kenneth Albanowski , +# +# Based on arch/m68k/Makefile: +# Copyright (C) 1994 by Hamish Macdonald +# + +# test for cross compiling +COMPILE_ARCH = $(shell uname -m) + +ifdef CONFIG_FULLDEBUG +CFLAGS += -O1 -g +endif + +# +# If you want the kernel build to build modules outside of the tree +# then define this and pass it to the main linux makefile +# +ifdef EXTRA_MODULE_DIRS +SUBDIRS += $(EXTRA_MODULE_DIRS) +endif + +UTS_SYSNAME = -DUTS_SYSNAME=\"uClinux\" + +# Find out which board we are compiling for +include arch/$(ARCH)/Boards.mk + +# Set up the memory model. RAM or ROM. +ifdef CONFIG_RAMKERNEL +MODEL = ram +endif +ifdef CONFIG_ROMKERNEL +MODEL = rom +endif +ifdef CONFIG_HIMEMKERNEL +MODEL = himem +endif +export MODEL + +# get the compiler, flags and targets from the platform +ifdef PLATFORM +include arch/$(ARCH)/platform/$(PLATFORM)/Rules.make +endif + +.PHONY: archdep clean archclean archmrproper + +arch/$(ARCH)/empty.o: + $(CROSS_COMPILE)gcc -o arch/$(ARCH)/empty.o -c arch/$(ARCH)/empty.c + +archmrproper: + +archclean: + @find arch/$(ARCH)/platform/ -name m68k_defs.h -print | xargs rm -f + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/mm/fault.c linux.2.5.40-ac2/arch/m68knommu/mm/fault.c --- linux.2.5.40/arch/m68knommu/mm/fault.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/mm/fault.c 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,57 @@ +/* + * linux/arch/m68knommu/mm/fault.c + * + * Copyright (C) 1998 D. Jeff Dionne , + * Copyright (C) 2000 Lineo, Inc. (www.lineo.com) + * + * Based on: + * + * linux/arch/m68k/mm/fault.c + * + * Copyright (C) 1995 Hamish Macdonald + */ + +#include +#include +#include +#include + +#include +#include + +extern void die_if_kernel(char *, struct pt_regs *, long); + +/* + * This routine handles page faults. It determines the problem, and + * then passes it off to one of the appropriate routines. + * + * error_code: + * bit 0 == 0 means no page found, 1 means protection fault + * bit 1 == 0 means read, 1 means write + * + * If this routine detects a bad access, it returns 1, otherwise it + * returns 0. + */ +asmlinkage int do_page_fault(struct pt_regs *regs, unsigned long address, + unsigned long error_code) +{ +#ifdef DEBUG + printk ("regs->sr=%#x, regs->pc=%#lx, address=%#lx, %ld\n", + regs->sr, regs->pc, address, error_code); +#endif + +/* + * Oops. The kernel tried to access some bad page. We'll have to + * terminate things with extreme prejudice. + */ + if ((unsigned long) address < PAGE_SIZE) { + printk(KERN_ALERT "Unable to handle kernel NULL pointer dereference"); + } else + printk(KERN_ALERT "Unable to handle kernel access"); + printk(" at virtual address %08lx\n",address); + die_if_kernel("Oops", regs, error_code); + do_exit(SIGKILL); + + return 1; +} + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/mm/init.c linux.2.5.40-ac2/arch/m68knommu/mm/init.c --- linux.2.5.40/arch/m68knommu/mm/init.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/mm/init.c 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,272 @@ +/* + * linux/arch/m68knommu/mm/init.c + * + * Copyright (C) 1998 D. Jeff Dionne , + * Kenneth Albanowski , + * Copyright (C) 2000 Lineo, Inc. (www.lineo.com) + * + * Based on: + * + * linux/arch/m68k/mm/init.c + * + * Copyright (C) 1995 Hamish Macdonald + * + * JAN/1999 -- hacked to support ColdFire (gerg@snapgear.com) + * DEC/2000 -- linux 2.4 support + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#ifdef CONFIG_BLK_DEV_RAM +#include +#endif +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +#undef DEBUG + +extern void die_if_kernel(char *,struct pt_regs *,long); +extern void free_initmem(void); + +/* + * BAD_PAGE is the page that is used for page faults when linux + * is out-of-memory. Older versions of linux just did a + * do_exit(), but using this instead means there is less risk + * for a process dying in kernel mode, possibly leaving a inode + * unused etc.. + * + * BAD_PAGETABLE is the accompanying page-table: it is initialized + * to point to BAD_PAGE entries. + * + * ZERO_PAGE is a special page that is used for zero-initialized + * data and COW. + */ +static unsigned long empty_bad_page_table; + +static unsigned long empty_bad_page; + +unsigned long empty_zero_page; + +extern unsigned long rom_length; + +void show_mem(void) +{ + unsigned long i; + int free = 0, total = 0, reserved = 0, shared = 0; + int cached = 0; + + printk("\nMem-info:\n"); + show_free_areas(); +#if 0 + printk("Free swap: %6dkB\n",nr_swap_pages<<(PAGE_SHIFT-10)); +#endif + i = max_mapnr; + while (i-- > 0) { + total++; + if (PageReserved(mem_map+i)) + reserved++; + else if (PageSwapCache(mem_map+i)) + cached++; + else if (!page_count(mem_map+i)) + free++; + else + shared += page_count(mem_map+i) - 1; + } + printk("%d pages of RAM\n",total); + printk("%d free pages\n",free); + printk("%d reserved pages\n",reserved); + printk("%d pages shared\n",shared); + printk("%d pages swap cached\n",cached); +#if 0 + printk("%ld pages in page table cache\n",pgtable_cache_size); +#endif +} + +extern unsigned long memory_start; +extern unsigned long memory_end; + +/* + * paging_init() continues the virtual memory environment setup which + * was begun by the code in arch/head.S. + * The parameters are pointers to where to stick the starting and ending + * addresses of available kernel virtual memory. + */ +void paging_init(void) +{ + /* + * make sure start_mem is page aligned, otherwise bootmem and + * page_alloc get different views og the world + */ +#ifdef DEBUG + unsigned long start_mem = PAGE_ALIGN(memory_start); +#endif + unsigned long end_mem = memory_end & PAGE_MASK; + +#ifdef DEBUG + printk ("start_mem is %#lx\nvirtual_end is %#lx\n", + start_mem, end_mem); +#endif + + /* + * initialize the bad page table and bad page to point + * to a couple of allocated pages + */ + empty_bad_page_table = (unsigned long)alloc_bootmem_pages(PAGE_SIZE); + empty_bad_page = (unsigned long)alloc_bootmem_pages(PAGE_SIZE); + empty_zero_page = (unsigned long)alloc_bootmem_pages(PAGE_SIZE); + memset((void *)empty_zero_page, 0, PAGE_SIZE); + + /* + * Set up SFC/DFC registers (user data space) + */ + set_fs (USER_DS); + +#ifdef DEBUG + printk ("before free_area_init\n"); + + printk ("free_area_init -> start_mem is %#lx\nvirtual_end is %#lx\n", + start_mem, end_mem); +#endif + + { + unsigned long zones_size[MAX_NR_ZONES] = {0, 0, 0}; + + zones_size[ZONE_DMA] = 0 >> PAGE_SHIFT; + zones_size[ZONE_NORMAL] = (end_mem - PAGE_OFFSET) >> PAGE_SHIFT; +#ifdef CONFIG_HIGHMEM + zones_size[ZONE_HIGHMEM] = 0; +#endif + free_area_init_node(0, NULL, NULL, zones_size, PAGE_OFFSET, NULL); + } +} + +void mem_init(void) +{ + int codek = 0, datak = 0, initk = 0; + /* DAVIDM look at setup memory map generically with reserved area */ + unsigned long tmp; +#ifdef CONFIG_UCLINUX + extern char _etext, _stext, _sdata, _ebss, __init_begin, __init_end; + extern unsigned int _ramend, _rambase; + unsigned long len = _ramend - _rambase; +#else + extern char _etext, _romvec, __data_start; + unsigned long len = end_mem-(unsigned long)&__data_start; + int datapages = 0; +#endif + unsigned long start_mem = memory_start; /* DAVIDM - these must start at end of kernel */ + unsigned long end_mem = memory_end; /* DAVIDM - this must not include kernel stack at top */ + + /* Bloody watchdog... */ +#ifdef CONFIG_SHGLCORE + (*((volatile unsigned char*)0xFFFA21)) = 128 | 64/* | 32 | 16*/; + (*((volatile unsigned short*)0xFFFA24)) &= ~512; + (*((volatile unsigned char*)0xFFFA27)) = 0x55; + (*((volatile unsigned char*)0xFFFA27)) = 0xAA; + + /*printk("Initiated watchdog, SYPCR = %x\n", *(volatile char*)0xFFFA21);*/ +#endif + +#ifdef DEBUG + printk("Mem_init: start=%lx, end=%lx\n", start_mem, end_mem); +#endif + + end_mem &= PAGE_MASK; + high_memory = (void *) end_mem; + + start_mem = PAGE_ALIGN(start_mem); + max_mapnr = num_physpages = MAP_NR(high_memory); + + /* this will put all memory onto the freelists */ + totalram_pages = free_all_bootmem(); + +#ifdef CONFIG_UCLINUX + codek = (&_etext - &_stext) >> 10; + datak = (&_ebss - &_sdata) >> 10; + initk = (&__init_begin - &__init_end) >> 10; +#else + for (tmp = PAGE_OFFSET ; tmp < end_mem ; tmp += PAGE_SIZE) { + if (PageReserved(mem_map+MAP_NR(tmp))) { + datapages++; + continue; + } + } + + codek = (&_etext - &_romvec) >> 10; + datak = datapages << (PAGE_SHIFT-10); + initk = 0; +#endif + + tmp = nr_free_pages() << PAGE_SHIFT; + printk("Memory available: %luk/%luk RAM, %luk/%luk ROM (%dk kernel code, %dk data)\n", + tmp >> 10, + len >> 10, + (rom_length > 0) ? ((rom_length >> 10) - codek) : 0, + rom_length >> 10, + codek, + datak + ); +} + + +#ifdef CONFIG_BLK_DEV_INITRD +void free_initrd_mem(unsigned long start, unsigned long end) +{ + int pages = 0; + for (; start < end; start += PAGE_SIZE) { + ClearPageReserved(virt_to_page(start)); + set_page_count(virt_to_page(start), 1); + free_page(start); + totalram_pages++; + pages++; + } + printk ("Freeing initrd memory: %dk freed\n", pages); +} +#endif + + +void +free_initmem() +{ +#ifdef CONFIG_RAMKERNEL + unsigned long addr; + extern char __init_begin, __init_end; +/* + * the following code should be cool even if these sections + * are not page aligned. + */ + addr = PAGE_ALIGN((unsigned long)(&__init_begin)); + /* next to check that the page we free is not a partial page */ + for (; addr + PAGE_SIZE < (unsigned long)(&__init_end); addr +=PAGE_SIZE) { + ClearPageReserved(virt_to_page(addr)); + set_page_count(virt_to_page(addr), 1); + free_page(addr); + totalram_pages++; + } + printk("Freeing unused kernel memory: %ldk freed (0x%x - 0x%x)\n", + (addr - PAGE_ALIGN((long) &__init_begin)) >> 10, + (int)(PAGE_ALIGN((unsigned long)(&__init_begin))), + (int)(addr - PAGE_SIZE)); +#endif +} + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/mm/kmap.c linux.2.5.40-ac2/arch/m68knommu/mm/kmap.c --- linux.2.5.40/arch/m68knommu/mm/kmap.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/mm/kmap.c 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,57 @@ +/* + * linux/arch/m68knommu/mm/kmap.c + * + * Copyright (C) 2000 Lineo, + * Copyright (C) 2000-2002 David McCullough + */ + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#undef DEBUG + +/* + * Map some physical address range into the kernel address space. + */ + +void *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag) +{ + return (void *)physaddr; +} + +/* + * Unmap a ioremap()ed region again + */ +void iounmap(void *addr) +{ +} + +/* + * __iounmap unmaps nearly everything, so be careful + * it doesn't free currently pointer/page tables anymore but it + * wans't used anyway and might be added later. + */ +void __iounmap(void *addr, unsigned long size) +{ +} + +/* + * Set new cache mode for some kernel address space. + * The caller must push data for that range itself, if such data may already + * be in the cache. + */ +void kernel_set_cachemode(void *addr, unsigned long size, int cmode) +{ +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/mm/Makefile linux.2.5.40-ac2/arch/m68knommu/mm/Makefile --- linux.2.5.40/arch/m68knommu/mm/Makefile 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/mm/Makefile 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,13 @@ +# +# Makefile for the linux m68k-specific parts of the memory manager. +# +# Note! Dependencies are done automagically by 'make dep', which also +# removes any old dependencies. DON'T put your own dependencies here +# unless it's something special (ie not a .c file). +# +# Note 2! The CFLAGS definition is now in the main makefile... + +O_TARGET := mm.o +obj-y := init.o fault.o memory.o kmap.o + +include $(TOPDIR)/Rules.make diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/mm/memory.c linux.2.5.40-ac2/arch/m68knommu/mm/memory.c --- linux.2.5.40/arch/m68knommu/mm/memory.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/mm/memory.c 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,1088 @@ +/* + * linux/arch/m68knommu/mm/memory.c + * + * Copyright (C) 1998 Kenneth Albanowski , + * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com) + * + * Based on: + * + * linux/arch/m68k/mm/memory.c + * + * Copyright (C) 1995 Hamish Macdonald + */ + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include + +#ifndef CONFIG_NO_MMU + +extern pte_t *kernel_page_table (unsigned long *memavailp); + +/* Strings for `extern inline' functions in . If put + directly into these functions, they are output for every file that + includes pgtable.h */ + +const char PgtabStr_bad_pmd[] = "Bad pmd in pte_alloc: %08lx\n"; +const char PgtabStr_bad_pgd[] = "Bad pgd in pmd_alloc: %08lx\n"; +const char PgtabStr_bad_pmdk[] = "Bad pmd in pte_alloc_kernel: %08lx\n"; +const char PgtabStr_bad_pgdk[] = "Bad pgd in pmd_alloc_kernel: %08lx\n"; + +static struct ptable_desc { + struct ptable_desc *prev; + struct ptable_desc *next; + unsigned long page; + unsigned char alloced; +} ptable_list = { &ptable_list, &ptable_list, 0, 0xff }; + +#define PD_NONEFREE(dp) ((dp)->alloced == 0xff) +#define PD_ALLFREE(dp) ((dp)->alloced == 0) +#define PD_TABLEFREE(dp,i) (!((dp)->alloced & (1<<(i)))) +#define PD_MARKUSED(dp,i) ((dp)->alloced |= (1<<(i))) +#define PD_MARKFREE(dp,i) ((dp)->alloced &= ~(1<<(i))) + +#define PTABLE_SIZE (PTRS_PER_PMD * sizeof(pmd_t)) + +pmd_t *get_pointer_table (void) +{ + pmd_t *pmdp = NULL; + unsigned long flags; + struct ptable_desc *dp = ptable_list.next; + int i; + + /* + * For a pointer table for a user process address space, a + * table is taken from a page allocated for the purpose. Each + * page can hold 8 pointer tables. The page is remapped in + * virtual address space to be noncacheable. + */ + if (PD_NONEFREE (dp)) { + + if (!(dp = kmalloc (sizeof(struct ptable_desc),GFP_KERNEL))) { + return 0; + } + + if (!(dp->page = __get_free_page (GFP_KERNEL))) { + kfree (dp); + return 0; + } + + nocache_page (dp->page); + + dp->alloced = 0; + /* put at head of list */ + save_flags(flags); + cli(); + dp->next = ptable_list.next; + dp->prev = ptable_list.next->prev; + ptable_list.next->prev = dp; + ptable_list.next = dp; + restore_flags(flags); + } + + for (i = 0; i < 8; i++) + if (PD_TABLEFREE (dp, i)) { + PD_MARKUSED (dp, i); + pmdp = (pmd_t *)(dp->page + PTABLE_SIZE*i); + break; + } + + if (PD_NONEFREE (dp)) { + /* move to end of list */ + save_flags(flags); + cli(); + dp->prev->next = dp->next; + dp->next->prev = dp->prev; + + dp->next = ptable_list.next->prev; + dp->prev = ptable_list.prev; + ptable_list.prev->next = dp; + ptable_list.prev = dp; + restore_flags(flags); + } + + memset (pmdp, 0, PTABLE_SIZE); + + return pmdp; +} + +void free_pointer_table (pmd_t *ptable) +{ + struct ptable_desc *dp; + unsigned long page = (unsigned long)ptable & PAGE_MASK; + int index = ((unsigned long)ptable - page)/PTABLE_SIZE; + unsigned long flags; + + for (dp = ptable_list.next; dp->page && dp->page != page; dp = dp->next) + ; + + if (!dp->page) + panic ("unable to find desc for ptable %p on list!", ptable); + + if (PD_TABLEFREE (dp, index)) + panic ("table already free!"); + + PD_MARKFREE (dp, index); + + if (PD_ALLFREE (dp)) { + /* all tables in page are free, free page */ + save_flags(flags); + cli(); + dp->prev->next = dp->next; + dp->next->prev = dp->prev; + restore_flags(flags); + cache_page (dp->page); + free_page (dp->page); + kfree (dp); + return; + } else { + /* + * move this descriptor the the front of the list, since + * it has one or more free tables. + */ + save_flags(flags); + cli(); + dp->prev->next = dp->next; + dp->next->prev = dp->prev; + + dp->next = ptable_list.next; + dp->prev = ptable_list.next->prev; + ptable_list.next->prev = dp; + ptable_list.next = dp; + restore_flags(flags); + } +} + +/* maximum pages used for kpointer tables */ +#define KPTR_PAGES 4 +/* # of reserved slots */ +#define RESERVED_KPTR 4 +extern pmd_tablepage kernel_pmd_table; /* reserved in head.S */ + +static struct kpointer_pages { + pmd_tablepage *page[KPTR_PAGES]; + u_char alloced[KPTR_PAGES]; +} kptr_pages; + +void init_kpointer_table(void) { + short i = KPTR_PAGES-1; + + /* first page is reserved in head.S */ + kptr_pages.page[i] = &kernel_pmd_table; + kptr_pages.alloced[i] = ~(0xff>>RESERVED_KPTR); + for (i--; i>=0; i--) { + kptr_pages.page[i] = NULL; + kptr_pages.alloced[i] = 0; + } +} + +pmd_t *get_kpointer_table (void) +{ + /* For pointer tables for the kernel virtual address space, + * use the page that is reserved in head.S that can hold up to + * 8 pointer tables. 3 of these tables are always reserved + * (kernel_pg_dir, swapper_pg_dir and kernel pointer table for + * the first 16 MB of RAM). In addition, the 4th pointer table + * in this page is reserved. On Amiga and Atari, it is used to + * map in the hardware registers. It may be used for other + * purposes on other 68k machines. This leaves 4 pointer tables + * available for use by the kernel. 1 of them are usually used + * for the vmalloc tables. This allows mapping of 3 * 32 = 96 MB + * of physical memory. But these pointer tables are also used + * for other purposes, like kernel_map(), so further pages can + * now be allocated. + */ + pmd_tablepage *page; + pmd_table *table; + long nr, offset = -8; + short i; + + for (i=KPTR_PAGES-1; i>=0; i--) { + asm volatile("bfffo %1{%2,#8},%0" + : "=d" (nr) + : "d" ((u_char)~kptr_pages.alloced[i]), "d" (offset)); + if (nr) + break; + } + if (i < 0) { + printk("No space for kernel pointer table!\n"); + return NULL; + } + if (!(page = kptr_pages.page[i])) { + if (!(page = (pmd_tablepage *)__get_free_page(GFP_KERNEL))) { + printk("No space for kernel pointer table!\n"); + return NULL; + } + nocache_page((u_long)(kptr_pages.page[i] = page)); + } + asm volatile("bfset %0@{%1,#1}" + : /* no output */ + : "a" (&kptr_pages.alloced[i]), "d" (nr-offset)); + table = &(*page)[nr-offset]; + memset(table, 0, sizeof(pmd_table)); + return ((pmd_t *)table); +} + +void free_kpointer_table (pmd_t *pmdp) +{ + pmd_table *table = (pmd_table *)pmdp; + pmd_tablepage *page = (pmd_tablepage *)((u_long)table & PAGE_MASK); + long nr; + short i; + + for (i=KPTR_PAGES-1; i>=0; i--) { + if (kptr_pages.page[i] == page) + break; + } + nr = ((u_long)table - (u_long)page) / sizeof(pmd_table); + if (!table || i < 0 || (i == KPTR_PAGES-1 && nr < RESERVED_KPTR)) { + printk("Attempt to free invalid kernel pointer table: %p\n", table); + return; + } + asm volatile("bfclr %0@{%1,#1}" + : /* no output */ + : "a" (&kptr_pages.alloced[i]), "d" (nr)); + if (!kptr_pages.alloced[i]) { + kptr_pages.page[i] = 0; + cache_page ((u_long)page); + free_page ((u_long)page); + } +} + +static unsigned long transp_transl_matches( unsigned long regval, + unsigned long vaddr ) +{ + unsigned long base, mask; + + /* enabled? */ + if (!(regval & 0x8000)) + return( 0 ); + + if (CPU_IS_030) { + /* function code match? */ + base = (regval >> 4) & 7; + mask = ~(regval & 7); + if ((SUPER_DATA & mask) != (base & mask)) + return( 0 ); + } + else { + /* must not be user-only */ + if ((regval & 0x6000) == 0) + return( 0 ); + } + + /* address match? */ + base = regval & 0xff000000; + mask = ~((regval << 8) & 0xff000000); + return( (vaddr & mask) == (base & mask) ); +} + +/* + * The following two routines map from a physical address to a kernel + * virtual address and vice versa. + */ +unsigned long mm_vtop (unsigned long vaddr) +{ + int i; + unsigned long voff = vaddr; + unsigned long offset = 0; + + for (i = 0; i < boot_info.num_memory; i++) + { + if (voff < offset + boot_info.memory[i].size) { +#ifdef DEBUGPV + printk ("virt_to_phys(%lx)=%lx\n", vaddr, + boot_info.memory[i].addr + voff - offset); +#endif + return boot_info.memory[i].addr + voff - offset; + } else + offset += boot_info.memory[i].size; + } + + /* not in one of the memory chunks; test for applying transparent + * translation */ + + if (CPU_IS_030) { + unsigned long ttreg; + + asm volatile( "movel %1, %%a2\n\t" + ".long 0xf0120a00;" /* pmove %/tt0,%a0@ */ + : "=g" (ttreg) : "g" (&ttreg) : "cc", "%a2" ); + if (transp_transl_matches( ttreg, vaddr )) + return vaddr; + + asm volatile( "movel %1, %%a2\n\t" + ".long 0xf0120a00" /* pmove %/tt1,%a0@ */ + : "=g" (ttreg) : "g" (&ttreg) : "cc", "%a2" ); + if (transp_transl_matches( ttreg, vaddr )) + return vaddr; + } + else if (CPU_IS_040_OR_060) { + unsigned long ttreg; + + asm volatile( ".long 0x4e7a0006\n\t" /* movec %dtt0,%d0 */ + "movel %%d0, %0\n" + : "=g" (ttreg) ); + if (transp_transl_matches( ttreg, vaddr )) + return vaddr; + asm volatile( ".long 0x4e7a0007" /* movec %dtt1,%d0 */ + "movel %%d0, %0\n" + : "=g" (ttreg) ); + if (transp_transl_matches( ttreg, vaddr )) + return vaddr; + } + + /* no match, too, so get the actual physical address from the MMU. */ + + if (CPU_IS_060) { + unsigned long fs = get_fs(); + unsigned long paddr; + + set_fs (SUPER_DATA); + + /* The PLPAR instruction causes an access error if the translation + * is not possible. We don't catch that here, so a bad kernel trap + * will be reported in this case. */ + asm volatile ("movel %1,%/a0\n\t" + ".word 0xf5c8\n\t" /* plpar (a0) */ + "movel %/a0,%0" + : "=g" (paddr) + : "g" (vaddr) + : "a0" ); + set_fs (fs); + + return paddr; + + } else if (CPU_IS_040) { + unsigned long mmusr; + unsigned long fs = get_fs(); + + set_fs (SUPER_DATA); + + asm volatile ("movel %1,%/a0\n\t" + ".word 0xf568\n\t" /* ptestr (a0) */ + ".long 0x4e7a8805\n\t" /* movec mmusr, a0 */ + "movel %/a0,%0" + : "=g" (mmusr) + : "g" (vaddr) + : "a0", "d0"); + set_fs (fs); + + if (mmusr & MMU_R_040) + return (mmusr & PAGE_MASK) | (vaddr & (PAGE_SIZE-1)); + + panic ("virt_to_phys040: bad virtual address %08lx (%lx)", vaddr, mmusr); + } else { + volatile unsigned short temp; + unsigned short mmusr; + unsigned long *descaddr; + + asm volatile ("ptestr #5,%2@,#7,%0\n\t" + "pmove %/psr,%1@" + : "=a&" (descaddr) + : "a" (&temp), "a" (vaddr)); + mmusr = temp; + + if (mmusr & (MMU_I|MMU_B|MMU_L)) + panic ("virt_to_phys030: bad virtual address %08lx (%x)", vaddr, mmusr); + + descaddr = (unsigned long *)phys_to_virt(descaddr); + + switch (mmusr & MMU_NUM) { + case 1: + return (*descaddr & 0xfe000000) | (vaddr & 0x01ffffff); + case 2: + return (*descaddr & 0xfffc0000) | (vaddr & 0x0003ffff); + case 3: + return (*descaddr & PAGE_MASK) | (vaddr & (PAGE_SIZE-1)); + default: + panic ("virt_to_phys: bad levels (%u) for virtual address %08lx", + mmusr & MMU_NUM, vaddr); + } + } + + panic ("virt_to_phys: bad virtual address %08lx", vaddr); +} + +unsigned long mm_ptov (unsigned long paddr) +{ + int i; + unsigned long offset = 0; + + for (i = 0; i < boot_info.num_memory; i++) + { + if (paddr >= boot_info.memory[i].addr && + paddr < (boot_info.memory[i].addr + + boot_info.memory[i].size)) { +#ifdef DEBUGPV + printk ("phys_to_virt(%lx)=%lx\n", paddr, + (paddr - boot_info.memory[i].addr) + offset); +#endif + return (paddr - boot_info.memory[i].addr) + offset; + } else + offset += boot_info.memory[i].size; + } + + /* + * assume that the kernel virtual address is the same as the + * physical address. + * + * This should be reasonable in most situations: + * 1) They shouldn't be dereferencing the virtual address + * unless they are sure that it is valid from kernel space. + * 2) The only usage I see so far is converting a page table + * reference to some non-FASTMEM address space when freeing + * mmaped "/dev/mem" pages. These addresses are just passed + * to "free_page", which ignores addresses that aren't in + * the memory list anyway. + * + */ + + /* + * if on an amiga and address is in first 16M, move it + * to the ZTWO_ADDR range + */ + if (MACH_IS_AMIGA && paddr < 16*1024*1024) + return ZTWO_VADDR(paddr); + return paddr; +} + +/* invalidate page in both caches */ +#define clear040(paddr) __asm__ __volatile__ ("movel %0,%/a0\n\t"\ + "nop\n\t"\ + ".word 0xf4d0"\ + /* CINVP I/D (a0) */\ + : : "g" ((paddr))\ + : "a0") + +/* invalidate page in i-cache */ +#define cleari040(paddr) __asm__ __volatile__ ("movel %0,%/a0\n\t"\ + /* CINVP I (a0) */\ + "nop\n\t"\ + ".word 0xf490"\ + : : "g" ((paddr))\ + : "a0") + +/* push page in both caches */ +#define push040(paddr) __asm__ __volatile__ ("movel %0,%/a0\n\t"\ + "nop\n\t"\ + ".word 0xf4f0"\ + /* CPUSHP I/D (a0) */\ + : : "g" ((paddr))\ + : "a0") + +/* push and invalidate page in both caches */ +#define pushcl040(paddr) do { push040((paddr));\ + if (CPU_IS_060) clear040((paddr));\ + } while(0) + +/* push page in both caches, invalidate in i-cache */ +#define pushcli040(paddr) do { push040((paddr));\ + if (CPU_IS_060) cleari040((paddr));\ + } while(0) + +/* push page defined by virtual address in both caches */ +#define pushv040(vaddr) __asm__ __volatile__ ("movel %0,%/a0\n\t"\ + /* ptestr (a0) */\ + "nop\n\t"\ + ".word 0xf568\n\t"\ + /* movec mmusr,d0 */\ + ".long 0x4e7a0805\n\t"\ + "andw #0xf000,%/d0\n\t"\ + "movel %/d0,%/a0\n\t"\ + /* CPUSHP I/D (a0) */\ + "nop\n\t"\ + ".word 0xf4f0"\ + : : "g" ((vaddr))\ + : "a0", "d0") + +/* push page defined by virtual address in both caches */ +#define pushv060(vaddr) __asm__ __volatile__ ("movel %0,%/a0\n\t"\ + /* plpar (a0) */\ + ".word 0xf5c8\n\t"\ + /* CPUSHP I/D (a0) */\ + ".word 0xf4f0"\ + : : "g" ((vaddr))\ + : "a0") + + +/* + * 040: Hit every page containing an address in the range paddr..paddr+len-1. + * (Low order bits of the ea of a CINVP/CPUSHP are "don't care"s). + * Hit every page until there is a page or less to go. Hit the next page, + * and the one after that if the range hits it. + */ +/* ++roman: A little bit more care is required here: The CINVP instruction + * invalidates cache entries WITHOUT WRITING DIRTY DATA BACK! So the beginning + * and the end of the region must be treated differently if they are not + * exactly at the beginning or end of a page boundary. Else, maybe too much + * data becomes invalidated and thus lost forever. CPUSHP does what we need: + * it invalidates the page after pushing dirty data to memory. (Thanks to Jes + * for discovering the problem!) + */ +/* ... but on the '060, CPUSH doesn't invalidate (for us, since we have set + * the DPI bit in the CACR; would it cause problems with temporarily changing + * this?). So we have to push first and then additionally to invalidate. + */ + +/* + * cache_clear() semantics: Clear any cache entries for the area in question, + * without writing back dirty entries first. This is useful if the data will + * be overwritten anyway, e.g. by DMA to memory. The range is defined by a + * _physical_ address. + */ + +void cache_clear (unsigned long paddr, int len) +{ + if (CPU_IS_040_OR_060) { + /* + * cwe need special treatment for the first page, in case it + * is not page-aligned. + */ + if (paddr & (PAGE_SIZE - 1)){ + pushcl040(paddr); + if (len <= PAGE_SIZE){ + if (((paddr + len - 1) ^ paddr) & PAGE_MASK) { + pushcl040(paddr + len - 1); + } + return; + }else{ + len -=PAGE_SIZE; + paddr += PAGE_SIZE; + } + } + + while (len > PAGE_SIZE) { +#if 0 + pushcl040(paddr); +#else + clear040(paddr); +#endif + len -= PAGE_SIZE; + paddr += PAGE_SIZE; + } + if (len > 0) { + pushcl040(paddr); + if (((paddr + len - 1) ^ paddr) & PAGE_MASK) { + /* a page boundary gets crossed at the end */ + pushcl040(paddr + len - 1); + } + } + } + else /* 68030 or 68020 */ + asm volatile ("movec %/cacr,%/d0\n\t" + "oriw %0,%/d0\n\t" + "movec %/d0,%/cacr" + : : "i" (FLUSH_I_AND_D) + : "d0"); +} + + +/* + * cache_push() semantics: Write back any dirty cache data in the given area, + * and invalidate the range in the instruction cache. It needs not (but may) + * invalidate those entries also in the data cache. The range is defined by a + * _physical_ address. + */ + +void cache_push (unsigned long paddr, int len) +{ + if (CPU_IS_040_OR_060) { + /* + * on 68040 or 68060, push cache lines for pages in the range; + * on the '040 this also invalidates the pushed lines, but not on + * the '060! + */ + while (len > PAGE_SIZE) { + pushcli040(paddr); + len -= PAGE_SIZE; + paddr += PAGE_SIZE; + } + if (len > 0) { + pushcli040(paddr); + if (((paddr + len - 1) ^ paddr) & PAGE_MASK) { + /* a page boundary gets crossed at the end */ + pushcli040(paddr + len - 1); + } + } + } + + + /* + * 68030/68020 have no writeback cache. On the other hand, + * cache_push is actually a superset of cache_clear (the lines + * get written back and invalidated), so we should make sure + * to perform the corresponding actions. After all, this is getting + * called in places where we've just loaded code, or whatever, so + * flushing the icache is appropriate; flushing the dcache shouldn't + * be required. + */ + else /* 68030 or 68020 */ + asm volatile ("movec %/cacr,%/d0\n\t" + "oriw %0,%/d0\n\t" + "movec %/d0,%/cacr" + : : "i" (FLUSH_I) + : "d0"); +} + + +/* + * cache_push_v() semantics: Write back any dirty cache data in the given + * area, and invalidate those entries at least in the instruction cache. This + * is intended to be used after data has been written that can be executed as + * code later. The range is defined by a _user_mode_ _virtual_ address (or, + * more exactly, the space is defined by the %sfc/%dfc register.) + */ + +void cache_push_v (unsigned long vaddr, int len) +{ + if (CPU_IS_040) { + /* on 68040, push cache lines for pages in the range */ + while (len > PAGE_SIZE) { + pushv040(vaddr); + len -= PAGE_SIZE; + vaddr += PAGE_SIZE; + } + if (len > 0) { + pushv040(vaddr); + if (((vaddr + len - 1) ^ vaddr) & PAGE_MASK) { + /* a page boundary gets crossed at the end */ + pushv040(vaddr + len - 1); + } + } + } + else if (CPU_IS_060) { + /* on 68040, push cache lines for pages in the range */ + while (len > PAGE_SIZE) { + pushv060(vaddr); + len -= PAGE_SIZE; + vaddr += PAGE_SIZE; + } + if (len > 0) { + pushv060(vaddr); + if (((vaddr + len - 1) ^ vaddr) & PAGE_MASK) { + /* a page boundary gets crossed at the end */ + pushv060(vaddr + len - 1); + } + } + } + /* 68030/68020 have no writeback cache; still need to clear icache. */ + else /* 68030 or 68020 */ + asm volatile ("movec %/cacr,%/d0\n\t" + "oriw %0,%/d0\n\t" + "movec %/d0,%/cacr" + : : "i" (FLUSH_I) + : "d0"); +} + +#undef clear040 +#undef cleari040 +#undef push040 +#undef pushcl040 +#undef pushcli040 +#undef pushv040 +#undef pushv060 + +int mm_end_of_chunk (unsigned long addr, int len) +{ + int i; + + for (i = 0; i < boot_info.num_memory; i++) + if (boot_info.memory[i].addr + boot_info.memory[i].size + == addr + len) + return 1; + return 0; +} + +/* Map some physical address range into the kernel address space. The + * code is copied and adapted from map_chunk(). + */ + +unsigned long kernel_map(unsigned long paddr, unsigned long size, + int nocacheflag, unsigned long *memavailp ) +{ +#define STEP_SIZE (256*1024) + + static unsigned long vaddr = 0xe0000000; /* safe place */ + unsigned long physaddr, retaddr; + pte_t *ktablep = NULL; + pmd_t *kpointerp; + pgd_t *page_dir; + int pindex; /* index into pointer table */ + int prot; + + /* Round down 'paddr' to 256 KB and adjust size */ + physaddr = paddr & ~(STEP_SIZE-1); + size += paddr - physaddr; + retaddr = vaddr + (paddr - physaddr); + paddr = physaddr; + /* Round up the size to 256 KB. It doesn't hurt if too much is + * mapped... */ + size = (size + STEP_SIZE - 1) & ~(STEP_SIZE-1); + + if (CPU_IS_040_OR_060) { + prot = _PAGE_PRESENT | _PAGE_GLOBAL040; + switch( nocacheflag ) { + case KERNELMAP_FULL_CACHING: + prot |= _PAGE_CACHE040; + break; + case KERNELMAP_NOCACHE_SER: + default: + prot |= _PAGE_NOCACHE_S; + break; + case KERNELMAP_NOCACHE_NONSER: + prot |= _PAGE_NOCACHE; + break; + case KERNELMAP_NO_COPYBACK: + prot |= _PAGE_CACHE040W; + /* prot |= 0; */ + break; + } + } else + prot = _PAGE_PRESENT | + ((nocacheflag == KERNELMAP_FULL_CACHING || + nocacheflag == KERNELMAP_NO_COPYBACK) ? 0 : _PAGE_NOCACHE030); + + page_dir = pgd_offset_k(vaddr); + if (pgd_present(*page_dir)) { + kpointerp = (pmd_t *)pgd_page(*page_dir); + pindex = (vaddr >> 18) & 0x7f; + if (pindex != 0 && CPU_IS_040_OR_060) { + if (pmd_present(*kpointerp)) + ktablep = (pte_t *)pmd_page(*kpointerp); + else { + ktablep = kernel_page_table (memavailp); + /* Make entries invalid */ + memset( ktablep, 0, sizeof(long)*PTRS_PER_PTE); + pmd_set(kpointerp,ktablep); + } + ktablep += (pindex & 15)*64; + } + } + else { + /* we need a new pointer table */ + kpointerp = get_kpointer_table (); + pgd_set(page_dir, (pmd_t *)kpointerp); + memset( kpointerp, 0, PTRS_PER_PMD*sizeof(pmd_t)); + pindex = 0; + } + + for (physaddr = paddr; physaddr < paddr + size; vaddr += STEP_SIZE) { + + if (pindex > 127) { + /* we need a new pointer table */ + kpointerp = get_kpointer_table (); + pgd_set(pgd_offset_k(vaddr), (pmd_t *)kpointerp); + memset( kpointerp, 0, PTRS_PER_PMD*sizeof(pmd_t)); + pindex = 0; + } + + if (CPU_IS_040_OR_060) { + int i; + unsigned long ktable; + + /* + * 68040, use page tables pointed to by the + * kernel pointer table. + */ + + if ((pindex & 15) == 0) { + /* Need new page table every 4M on the '040 */ + ktablep = kernel_page_table (memavailp); + /* Make entries invalid */ + memset( ktablep, 0, sizeof(long)*PTRS_PER_PTE); + } + + ktable = virt_to_phys(ktablep); + + /* + * initialize section of the page table mapping + * this 1M portion. + */ + for (i = 0; i < 64; i++) { + pte_val(*ktablep++) = physaddr | prot; + physaddr += PAGE_SIZE; + } + + /* + * make the kernel pointer table point to the + * kernel page table. + */ + + ((unsigned long *)kpointerp)[pindex++] = ktable | _PAGE_TABLE; + + } else { + /* + * 68030, use early termination page descriptors. + * Each one points to 64 pages (256K). + */ + ((unsigned long *)kpointerp)[pindex++] = physaddr | prot; + physaddr += 64 * PAGE_SIZE; + } + } + + return( retaddr ); +} + + +static inline void set_cmode_pte( pmd_t *pmd, unsigned long address, + unsigned long size, unsigned cmode ) +{ pte_t *pte; + unsigned long end; + + if (pmd_none(*pmd)) + return; + + pte = pte_offset( pmd, address ); + address &= ~PMD_MASK; + end = address + size; + if (end >= PMD_SIZE) + end = PMD_SIZE; + + for( ; address < end; pte++ ) { + pte_val(*pte) = (pte_val(*pte) & ~_PAGE_NOCACHE) | cmode; + address += PAGE_SIZE; + } +} + + +static inline void set_cmode_pmd( pgd_t *dir, unsigned long address, + unsigned long size, unsigned cmode ) +{ + pmd_t *pmd; + unsigned long end; + + if (pgd_none(*dir)) + return; + + pmd = pmd_offset( dir, address ); + address &= ~PGDIR_MASK; + end = address + size; + if (end > PGDIR_SIZE) + end = PGDIR_SIZE; + + if ((pmd_val(*pmd) & _DESCTYPE_MASK) == _PAGE_PRESENT) { + /* 68030 early termination descriptor */ + pmd_val(*pmd) = (pmd_val(*pmd) & ~_PAGE_NOCACHE) | cmode; + return; + } + else { + /* "normal" tables */ + for( ; address < end; pmd++ ) { + set_cmode_pte( pmd, address, end - address, cmode ); + address = (address + PMD_SIZE) & PMD_MASK; + } + } +} + + +/* + * Set new cache mode for some kernel address space. + * The caller must push data for that range itself, if such data may already + * be in the cache. + */ + +void kernel_set_cachemode( unsigned long address, unsigned long size, + unsigned cmode ) +{ + pgd_t *dir = pgd_offset_k( address ); + unsigned long end = address + size; + + if (CPU_IS_040_OR_060) { + switch( cmode ) { + case KERNELMAP_FULL_CACHING: + cmode = _PAGE_CACHE040; + break; + case KERNELMAP_NOCACHE_SER: + default: + cmode = _PAGE_NOCACHE_S; + break; + case KERNELMAP_NOCACHE_NONSER: + cmode = _PAGE_NOCACHE; + break; + case KERNELMAP_NO_COPYBACK: + cmode = _PAGE_CACHE040W; + break; + } + } else + cmode = ((cmode == KERNELMAP_FULL_CACHING || + cmode == KERNELMAP_NO_COPYBACK) ? + 0 : _PAGE_NOCACHE030); + + for( ; address < end; dir++ ) { + set_cmode_pmd( dir, address, end - address, cmode ); + address = (address + PGDIR_SIZE) & PGDIR_MASK; + } + flush_tlb_all(); +} + +#else /* !CONFIG_NO_MMU */ + +/* + * 040: Hit every page containing an address in the range paddr..paddr+len-1. + * (Low order bits of the ea of a CINVP/CPUSHP are "don't care"s). + * Hit every page until there is a page or less to go. Hit the next page, + * and the one after that if the range hits it. + */ +/* ++roman: A little bit more care is required here: The CINVP instruction + * invalidates cache entries WITHOUT WRITING DIRTY DATA BACK! So the beginning + * and the end of the region must be treated differently if they are not + * exactly at the beginning or end of a page boundary. Else, maybe too much + * data becomes invalidated and thus lost forever. CPUSHP does what we need: + * it invalidates the page after pushing dirty data to memory. (Thanks to Jes + * for discovering the problem!) + */ +/* ... but on the '060, CPUSH doesn't invalidate (for us, since we have set + * the DPI bit in the CACR; would it cause problems with temporarily changing + * this?). So we have to push first and then additionally to invalidate. + */ + +/* + * cache_clear() semantics: Clear any cache entries for the area in question, + * without writing back dirty entries first. This is useful if the data will + * be overwritten anyway, e.g. by DMA to memory. The range is defined by a + * _physical_ address. + */ + +void cache_clear (unsigned long paddr, int len) +{ +} + + +/* + * Define cache invalidate functions. The ColdFire 5407 is really + * the only processor that needs to do some work here. Anything + * that has separate data and instruction caches will be a problem. + */ +#ifdef CONFIG_M5407 + +static __inline__ void cache_invalidate_lines(unsigned long paddr, int len) +{ + unsigned long sset, eset; + + sset = (paddr & 0x00000ff0); + eset = ((paddr + len) & 0x0000ff0) + 0x10; + + __asm__ __volatile__ ( + "nop\n\t" + "clrl %%d0\n\t" + "1:\n\t" + "movel %0,%%a0\n\t" + "addl %%d0,%%a0\n\t" + "2:\n\t" + ".word 0xf4e8\n\t" + "addl #0x10,%%a0\n\t" + "cmpl %1,%%a0\n\t" + "blt 2b\n\t" + "addql #1,%%d0\n\t" + "cmpil #4,%%d0\n\t" + "bne 1b" + : : "a" (sset), "a" (eset) : "d0", "a0" ); +} + +#else +#define cache_invalidate_lines(a,b) +#endif + + +/* + * cache_push() semantics: Write back any dirty cache data in the given area, + * and invalidate the range in the instruction cache. It needs not (but may) + * invalidate those entries also in the data cache. The range is defined by a + * _physical_ address. + */ + +void cache_push (unsigned long paddr, int len) +{ + cache_invalidate_lines(paddr, len); +} + + +/* + * cache_push_v() semantics: Write back any dirty cache data in the given + * area, and invalidate those entries at least in the instruction cache. This + * is intended to be used after data has been written that can be executed as + * code later. The range is defined by a _user_mode_ _virtual_ address (or, + * more exactly, the space is defined by the %sfc/%dfc register.) + */ + +void cache_push_v (unsigned long vaddr, int len) +{ + cache_invalidate_lines(vaddr, len); +} + +/* Map some physical address range into the kernel address space. The + * code is copied and adapted from map_chunk(). + */ + +unsigned long kernel_map(unsigned long paddr, unsigned long size, + int nocacheflag, unsigned long *memavailp ) +{ + return paddr; +} + + +int is_in_rom(unsigned long addr) +{ + +#ifdef CONFIG_COLDFIRE + { + extern unsigned long _ramstart, _ramend; + + /* Anything not in operational RAM is returned as in rom! */ + if (addr < _ramstart || addr >= _ramend) + return(1); + } +#endif + +#if defined(CONFIG_PILOT) || defined(CONFIG_UCSIMM) + if (addr >= 0x10c00000) + return 1; +#endif + +#ifdef CONFIG_M68EZ328ADS + if ( 0x00200000 <= addr && addr < 0x00400000) + return 1; +#endif + +#ifdef CONFIG_M68332 + extern char _etext; + + #ifdef SHGLCORE_ROM_BANK_0_ADDR + if ((addr >= SHGLCORE_ROM_BANK_0_ADDR) && + (addr < (SHGLCORE_ROM_BANK_0_ADDR+SHGLCORE_ROM_BANK_0_LENGTH))) + return 1; + #endif + #ifdef SHGLCORE_ROM_BANK_1_ADDR + else if ((addr >= SHGLCORE_ROM_BANK_1_ADDR) && + (addr < (SHGLCORE_ROM_BANK_1_ADDR+SHGLCORE_ROM_BANK_1_LENGTH))) + return 1; + #endif + #ifdef SHGLCORE_FLASH_BANK_0_ADDR + else if ((addr >= SHGLCORE_FLASH_BANK_0_ADDR) && + (addr < (SHGLCORE_FLASH_BANK_0_ADDR+SHGLCORE_FLASH_BANK_0_LENGTH))) + return 1; + #endif + #ifdef SHGLCORE_FLASH_BANK_1_ADDR + else if ((addr >= SHGLCORE_FLASH_BANK_1_ADDR) && + (addr < (SHGLCORE_FLASH_BANK_1_ADDR+SHGLCORE_FLASH_BANK_1_LENGTH))) + return 1; + #endif +#endif + + return(0); /* default case, not in ROM */ +} + +#endif /* CONFIG_NO_MMU */ diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/5206/ARNEWSH/crt0_ram.S linux.2.5.40-ac2/arch/m68knommu/platform/5206/ARNEWSH/crt0_ram.S --- linux.2.5.40/arch/m68knommu/platform/5206/ARNEWSH/crt0_ram.S 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/5206/ARNEWSH/crt0_ram.S 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,206 @@ +/*****************************************************************************/ + +/* + * crt0_ram.S -- startup code for MCF5206 ColdFire Arnewsh board. + * + * (C) Copyright 1999-2002, Greg Ungerer (gerg@snapgear.com). + * + * 1999/02/24 Modified for the 5307 processor David W. Miller + */ + +/*****************************************************************************/ + +#include "linux/autoconf.h" +#include "asm/coldfire.h" +#include "asm/mcfsim.h" + +/*****************************************************************************/ + +/* + * Arnewsh m5206 ColdFire eval board, chip select and memory setup. + */ + +#define MEM_BASE 0x00000000 /* Memory base at address 0 */ +#define VBR_BASE MEM_BASE /* Vector address */ + +/* + * The following define the limits within which to search for + * available RAM. + */ +#define MEM_MIN 0x00100000 /* Search from 1Mb */ +#define MEM_MAX 0x02000000 /* Max DRAM 32Mb! */ +#define MEM_LUMP 0x00010000 /* 64 Kb chunks */ + +#define MEM_TMPSTACK 0x00010000 /* At 64k - for exceptions */ + +/* + * Chip Select setup. + */ +#define CS0_ADDR 0x0000f000 /* CS0 connected to Flash ROM */ +#define CS0_MASK 0xf0000000 /* is 1Mbyte */ +#define CS0_CTRL 0x00000000 /* read-only */ +#define CS1_ADDR 0x00000000 /* CS1 not connected */ +#define CS1_MASK 0x00000000 +#define CS1_CTRL 0x00000000 +#define CS2_ADDR 0x00003000 /* CS2 connected to SRAM */ +#define CS2_MASK 0x0000f000 /* is 1Mbyte */ +#define CS2_CTRL 0x00001903 /* read-write */ +#define CS3_ADDR 0x00004000 /* CS3 connected to LED, par port */ +#define CS3_MASK 0x0000f000 /* is 1Mbyte */ +#define CS3_CTRL 0x00000083 /* read-write */ +#define CS4_ADDR 0x00000000 /* CS4 not connected */ +#define CS4_MASK 0x00000000 +#define CS4_CTRL 0x00000123 +#define CS5_ADDR 0x00000000 /* CS5 not connected */ +#define CS5_MASK 0x00000000 +#define CS5_CTRL 0x00000000 +#define CS6_ADDR 0x00000000 /* CS6 not connected */ +#define CS6_MASK 0x00000000 +#define CS6_CTRL 0x00000000 +#define CS7_ADDR 0x00000000 /* CS7 not connected */ +#define CS7_MASK 0x00000000 +#define CS7_CTRL 0x00000000 +#define DMC_CTRL 0x00000000 /* default memory control */ + +/*****************************************************************************/ + +.global _start +.global _rambase +.global _ramvec +.global _ramstart +.global _ramend + +/*****************************************************************************/ + +.data + +/* + * Set up the usable of RAM stuff. Size of RAM is determined then + * an initial stack set up at the end. + */ +_rambase: +.long 0 +_ramvec: +.long 0 +_ramstart: +.long 0 +_ramend: +.long 0 + +/*****************************************************************************/ + +.text + +/* + * This is the codes first entry point. This is where it all + * begins... + */ + +_start: + nop /* Filler */ + move.w #0x2700, %sr /* No interrupts */ + + + /* + * Setup VBR here, otherwise buserror remap will not work. + * if dBug was active before (on my SBC with dBug 1.1 of Dec 16 1996) + * + * bkr@cut.de 19990306 + * + * Note: this is because dBUG points VBR to ROM, making vectors read + * only, so the bus trap can't be changed. (RS) + */ + move.l #VBR_BASE, %a7 /* Note VBR can't be read */ + movec %a7, %VBR + move.l %a7, _ramvec /* Set up vector addr */ + move.l %a7, _rambase /* Set up base RAM addr */ + + + /* + * Determine size of RAM, then set up initial stack. + * + * On the Arnewsh 5206 board we can probe for the amount + * of DRAM present... + */ + move.l #MEM_MIN, %a0 /* Start at bottom */ + move.l #MEM_MAX, %a1 /* Set stop point */ + lea.l MEM_TMPSTACK, %sp /* Set up tmp stack ptr */ + + move.l #VBR_BASE+8, %a2 /* Address of bus trap */ + lea.l _ram_buserr, %a3 /* Get RAM trap address */ + move.l %a3, (%a2) /* Set trap to local ptr */ + +_find_ram: + move.l (%a0), %d0 /* Attempt read */ + add.l #MEM_LUMP, %a0 /* Try next bank */ + cmp.l %a1, %a0 /* Check more? */ + bne _find_ram + + /* + * BUS error trap handler - used for RAM probing. + */ +_ram_buserr: + bra _found_ram + +_found_ram: /* Vectored here on bus err */ + move.l %a0, %d0 /* Mem end addr is in a0 */ + move.l %d0, %sp /* Set up initial stack ptr */ + move.l %d0, _ramend /* Set end ram addr */ + + + /* + * Enable CPU internal cache. + */ + move.l #0x01000000, %d0 /* Invalidate cache cmd */ + movec %d0, %CACR /* Invalidate cache */ + move.l #0x80000100, %d0 /* Setup cache mask */ + movec %d0, %CACR /* Enable cache */ + + + /* + * Move ROM filesystem above bss :-) + */ + lea.l _sbss, %a0 /* Get start of bss */ + lea.l _ebss, %a1 /* Set up destination */ + move.l %a0, %a2 /* Copy of bss start */ + + move.l 8(%a0), %d0 /* Get size of ROMFS */ + addq.l #8, %d0 /* Allow for rounding */ + and.l #0xfffffffc, %d0 /* Whole words */ + + add.l %d0, %a0 /* Copy from end */ + add.l %d0, %a1 /* Copy from end */ + move.l %a1, _ramstart /* Set start of ram */ + +_copy_romfs: + move.l -(%a0), %d0 /* Copy dword */ + move.l %d0, -(%a1) + cmp.l %a0, %a2 /* Check if at end */ + bne _copy_romfs + + /* + * Zero out the bss region. + */ + lea.l _sbss, %a0 /* Get start of bss */ + lea.l _ebss, %a1 /* Get end of bss */ + clr.l %d0 /* Set value */ +_clear_bss: + move.l %d0, (%a0)+ /* Clear each word */ + cmp.l %a0, %a1 /* Check if at end */ + bne _clear_bss + + /* + * Load the current task pointer and stack. + */ + lea init_thread_union, %a0 + lea 0x2000(%a0), %sp + + /* + * Assember start up done, start code proper. + */ + jsr start_kernel /* Start Linux kernel */ + +_exit: + jmp _exit /* Should never get here */ + +/*****************************************************************************/ diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/5206/ARNEWSH/ram.ld linux.2.5.40-ac2/arch/m68knommu/platform/5206/ARNEWSH/ram.ld --- linux.2.5.40/arch/m68knommu/platform/5206/ARNEWSH/ram.ld 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/5206/ARNEWSH/ram.ld 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,72 @@ + +MEMORY { + ram : ORIGIN = 0x10000, LENGTH = 0xf0000 +} + +jiffies = jiffies_64 + 4; + +SECTIONS { + + .text : { + _stext = . ; + *(.text) + *(.text.exit) + *(.text.lock) + *(.exitcall.exit) + *(.rodata) + . = ALIGN(0x4) ; + *(.kstrtab) + . = ALIGN(16); /* Exception table */ + __start___ex_table = .; + *(__ex_table) + __stop___ex_table = .; + + __start___ksymtab = .; /* Kernel symbol table */ + *(__ksymtab) + __stop___ksymtab = .; + . = ALIGN(4) ; + _etext = . ; + } > ram + + .data BLOCK(0x4) : { + _sdata = . ; + __data_start = . ; + *(.data) + *(.data.exit) + . = ALIGN(0x2000) ; + *(.data.init_task) + . = ALIGN(0x2000) ; + _edata = . ; + } > ram + + .init BLOCK(4096) : { + __init_begin = .; + *(.text.init) + *(.data.init) + . = ALIGN(16); + __setup_start = .; + *(.setup.init) + __setup_end = .; + __initcall_start = .; + *(.initcall1.init) + *(.initcall2.init) + *(.initcall3.init) + *(.initcall4.init) + *(.initcall5.init) + *(.initcall6.init) + *(.initcall7.init) + __initcall_end = .; + . = ALIGN(4) ; + __init_end = .; + } > ram + + .bss BLOCK(0x4) : { + _sbss = . ; + *(.bss) + *(COMMON) + . = ALIGN(4) ; + _ebss = . ; + _end = . ; + } > ram +} + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/5206/config.c linux.2.5.40-ac2/arch/m68knommu/platform/5206/config.c --- linux.2.5.40/arch/m68knommu/platform/5206/config.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/5206/config.c 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,223 @@ +/***************************************************************************/ + +/* + * linux/arch/m68knommu/platform/5206/config.c + * + * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com) + * Copyright (C) 2000-2001, Lineo Inc. (www.lineo.com) + */ + +/***************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/***************************************************************************/ + +/* + * DMA channel base address table. + */ +unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = { + MCF_MBAR + MCFDMA_BASE0, + MCF_MBAR + MCFDMA_BASE1, +}; + +unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS]; + +/***************************************************************************/ + +void coldfire_tick(void) +{ + volatile unsigned char *timerp; + + /* Reset the ColdFire timer */ + timerp = (volatile unsigned char *) (MCF_MBAR + MCFTIMER_BASE1); + timerp[MCFTIMER_TER] = MCFTIMER_TER_CAP | MCFTIMER_TER_REF; +} + +/***************************************************************************/ + +void coldfire_timer_init(void (*handler)(int, void *, struct pt_regs *)) +{ + volatile unsigned short *timerp; + volatile unsigned char *icrp; + + /* Set up TIMER 1 as poll clock */ + timerp = (volatile unsigned short *) (MCF_MBAR + MCFTIMER_BASE1); + timerp[MCFTIMER_TMR] = MCFTIMER_TMR_DISABLE; + + timerp[MCFTIMER_TRR] = (unsigned short) ((MCF_CLK / 16) / HZ); + timerp[MCFTIMER_TMR] = MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 | + MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE; + + icrp = (volatile unsigned char *) (MCF_MBAR + MCFSIM_TIMER1ICR); + + *icrp = MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL5 | MCFSIM_ICR_PRI3; + request_irq(29, handler, SA_INTERRUPT, "ColdFire Timer", NULL); + mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_TIMER1); +} + +/***************************************************************************/ + +/* + * Program the vector to be an auto-vectored. + */ + +void mcf_autovector(unsigned int vec) +{ + volatile unsigned char *mbar; + unsigned char icr; + + if ((vec >= 25) && (vec <= 31)) { + vec -= 25; + mbar = (volatile unsigned char *) MCF_MBAR; + icr = MCFSIM_ICR_AUTOVEC | (vec << 3); + *(mbar + MCFSIM_ICR1 + vec) = icr; + vec = 0x1 << (vec + 1); + mcf_setimr(mcf_getimr() & ~vec); + } +} + +/***************************************************************************/ + +extern e_vector *_ramvec; + +void set_evector(int vecnum, void (*handler)(void)) +{ + if (vecnum >= 0 && vecnum <= 255) + _ramvec[vecnum] = handler; +} + +/***************************************************************************/ + +/* assembler routines */ +asmlinkage void buserr(void); +asmlinkage void trap(void); +asmlinkage void system_call(void); +asmlinkage void inthandler(void); + +void coldfire_trap_init(void) +{ + int i; + +#ifndef ENABLE_dBUG + mcf_setimr(MCFSIM_IMR_MASKALL); +#endif + + /* + * There is a common trap handler and common interrupt + * handler that handle almost every vector. We treat + * the system call and bus error special, they get their + * own first level handlers. + */ +#ifndef ENABLE_dBUG + for (i = 3; (i <= 23); i++) + _ramvec[i] = trap; + for (i = 33; (i <= 63); i++) + _ramvec[i] = trap; +#endif + + for (i = 24; (i <= 30); i++) + _ramvec[i] = inthandler; +#ifndef ENABLE_dBUG + _ramvec[31] = inthandler; // Disables the IRQ7 button +#endif + + for (i = 64; (i < 255); i++) + _ramvec[i] = inthandler; + _ramvec[255] = 0; + + _ramvec[2] = buserr; + _ramvec[32] = system_call; +} + +/***************************************************************************/ + +/* + * Generic dumping code. Used for panic and debug. + */ + +void dump(struct pt_regs *fp) +{ + extern unsigned int sw_usp, sw_ksp; + unsigned long *sp; + unsigned char *tp; + int i; + + printk("\nCURRENT PROCESS:\n\n"); + printk("COMM=%s PID=%d\n", current->comm, current->pid); + + if (current->mm) { + printk("TEXT=%08x-%08x DATA=%08x-%08x BSS=%08x-%08x\n", + (int) current->mm->start_code, + (int) current->mm->end_code, + (int) current->mm->start_data, + (int) current->mm->end_data, + (int) current->mm->end_data, + (int) current->mm->brk); + printk("USER-STACK=%08x KERNEL-STACK=%08x\n\n", + (int) current->mm->start_stack, + (int) (((unsigned long) current) + 2 * PAGE_SIZE)); + } + + printk("PC: %08lx\n", fp->pc); + printk("SR: %08lx SP: %08lx\n", (long) fp->sr, (long) fp); + printk("d0: %08lx d1: %08lx d2: %08lx d3: %08lx\n", + fp->d0, fp->d1, fp->d2, fp->d3); + printk("d4: %08lx d5: %08lx a0: %08lx a1: %08lx\n", + fp->d4, fp->d5, fp->a0, fp->a1); + printk("\nUSP: %08x KSP: %08x TRAPFRAME: %08x\n", + sw_usp, sw_ksp, (unsigned int) fp); + + printk("\nCODE:"); + tp = ((unsigned char *) fp->pc) - 0x20; + for (sp = (unsigned long *) tp, i = 0; (i < 0x40); i += 4) { + if ((i % 0x10) == 0) + printk("\n%08x: ", (int) (tp + i)); + printk("%08x ", (int) *sp++); + } + printk("\n"); + + printk("\nKERNEL STACK:"); + tp = ((unsigned char *) fp) - 0x40; + for (sp = (unsigned long *) tp, i = 0; (i < 0xc0); i += 4) { + if ((i % 0x10) == 0) + printk("\n%08x: ", (int) (tp + i)); + printk("%08x ", (int) *sp++); + } + printk("\n"); + +#if 1 + printk("\nUSER STACK:"); + tp = (unsigned char *) sw_usp; + for (sp = (unsigned long *) tp, i = 0; (i < 0x80); i += 4) { + if ((i % 0x10) == 0) + printk("\n%08x: ", (int) (tp + i)); + printk("%08x ", (int) *sp++); + } + printk("\n\n"); +#endif +} + +/***************************************************************************/ + +void config_BSP(char *commandp, int size) +{ + memset(commandp, 0, size); + mach_sched_init = coldfire_timer_init; + mach_tick = coldfire_tick; + mach_trap_init = coldfire_trap_init; +} + +/***************************************************************************/ diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/5206/Makefile linux.2.5.40-ac2/arch/m68knommu/platform/5206/Makefile --- linux.2.5.40/arch/m68knommu/platform/5206/Makefile 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/5206/Makefile 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,49 @@ +# +# Makefile for the linux kernel. +# +# Note! Dependencies are done automagically by 'make dep', which also +# removes any old dependencies. DON'T put your own dependencies here +# unless it's something special (ie not a .c file). +# + +# +# re-use any 5307/coldfire files that we can. Perhaps we should create +# a coldfire directory for shared files ? +# + +VPATH := $(VPATH):../5307 + +ifdef CONFIG_FULLDEBUG + AFLAGS += -DDEBUGGER_COMPATIBLE_CACHE=1 +endif + +# +# +# If you want to play with the HW breakpoints then you will +# need to add define this, which will give you a stack backtrace +# on the console port whenever a DBG interrupt occurs. You have to +# set up you HW breakpoints to trigger a DBG interrupt: +# +# AFLAGS += -DTRAP_DBG_INTERRUPT +# EXTRA_CFLAGS += -DTRAP_DBG_INTERRUPT +# + +AFLAGS += -D__ASSEMBLY__ -I. + +all: $(BOARD)/crt0_$(MODEL).o entry.o platform.o +O_TARGET := platform.o +obj-y := entry.o config.o signal.o ints.o + +$(BOARD)/crt0_$(MODEL).o: $(BOARD)/crt0_$(MODEL).S + +entry.o: entry.S m68k_defs.h + +m68k_defs.h: ../../kernel/m68k_defs.c ../../kernel/m68k_defs.head + rm -f m68k_defs.d + $(CC) $(filter-out -MD,$(CFLAGS)) -S ../../kernel/m68k_defs.c + cp ../../kernel/m68k_defs.head m68k_defs.h + grep '^#define' m68k_defs.s >> m68k_defs.h + rm m68k_defs.s +-include m68k_defs.d + +include $(TOPDIR)/Rules.make diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/5206/Rules.make linux.2.5.40-ac2/arch/m68knommu/platform/5206/Rules.make --- linux.2.5.40/arch/m68knommu/platform/5206/Rules.make 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/5206/Rules.make 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,34 @@ +# +# 5407/Makefile +# +# This file is included by the global makefile so that you can add your own +# platform-specific flags and dependencies. +# +# This file is subject to the terms and conditions of the GNU General Public +# License. See the file "COPYING" in the main directory of this archive +# for more details. +# +# Copyright (C) 1999,2001 Greg Ungerer (gerg@snapgear.com) +# Copyright (C) 1998,1999 D. Jeff Dionne +# Copyright (C) 1998 Kenneth Albanowski +# Copyright (C) 1994 by Hamish Macdonald +# Copyright (C) 2000 Lineo Inc. (www.lineo.com) + +GCC_DIR = $(shell $(CC) -v 2>&1 | grep specs | sed -e 's/.* \(.*\)specs/\1\./') + +INCGCC = $(GCC_DIR)/include +LIBGCC = $(GCC_DIR)/m5200/libgcc.a + +CFLAGS := -fno-builtin -nostdinc $(CFLAGS) -I$(INCGCC) -pipe -DCONFIG_NO_MMU -DNO_FPU -m5200 -Wa,-S -Wa,-m5200 -D__ELF__ -DUTS_SYSNAME=\"uClinux\" -D__linux__ +AFLAGS := $(CFLAGS) + +LDFLAGS_vmlinux = -T arch/$(ARCH)/platform/$(PLATFORM)/$(BOARD)/$(MODEL).ld + +HEAD := arch/$(ARCH)/platform/$(PLATFORM)/$(BOARD)/crt0_$(MODEL).o + +SUBDIRS := arch/$(ARCH)/kernel arch/$(ARCH)/mm arch/$(ARCH)/lib \ + arch/$(ARCH)/platform/$(PLATFORM) $(SUBDIRS) +CORE_FILES := arch/$(ARCH)/kernel/kernel.o arch/$(ARCH)/mm/mm.o \ + arch/$(ARCH)/platform/$(PLATFORM)/platform.o $(CORE_FILES) +LIBS += arch/$(ARCH)/lib/lib.a $(LIBGCC) + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/5206e/CADRE3/crt0_ram.S linux.2.5.40-ac2/arch/m68knommu/platform/5206e/CADRE3/crt0_ram.S --- linux.2.5.40/arch/m68knommu/platform/5206e/CADRE3/crt0_ram.S 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/5206e/CADRE3/crt0_ram.S 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,145 @@ +/*****************************************************************************/ + +/* + * crt0_ram.S -- startup code for MCF5206e ColdFire based CADRE3 boards. + * + * (C) Copyright 1999-2002, Greg Ungerer (gerg@snapgear.com) + * + * 1999/02/24 Modified for the 5307 processor David W. Miller + */ + +/*****************************************************************************/ + +#include "linux/autoconf.h" +#include "asm/coldfire.h" +#include "asm/mcfsim.h" + +/*****************************************************************************/ + +/* + * Cadre-III M5206e ColdFire eval board, chip select and memory setup. + */ + +#define MEM_BASE 0x00000000 /* Memory base at address 0 */ +#define MEM_SIZE 0x00400000 /* Memory size 4Mb */ +#define VBR_BASE MEM_BASE /* Vector address */ + +/*****************************************************************************/ + +.global _start +.global _rambase +.global _ramvec +.global _ramstart +.global _ramend + +/*****************************************************************************/ + +.data + +/* + * Set up the usable of RAM stuff. Size of RAM is determined then + * an initial stack set up at the end. + */ +_rambase: +.long 0 +_ramvec: +.long 0 +_ramstart: +.long 0 +_ramend: +.long 0 + +/*****************************************************************************/ + +.text + +/* + * This is the codes first entry point. This is where it all + * begins... + */ + +_start: + nop /* Filler */ + move.w #0x2700, %sr /* No interrupts */ + + /* + * Setup VBR here, otherwise buserror remap will not work. + * if dBug was active before (on my SBC with dBug 1.1 of Dec 16 1996) + * + * bkr@cut.de 19990306 + * + * Note: this is because dBUG points VBR to ROM, making vectors read + * only, so the bus trap can't be changed. (RS) + */ + move.l #VBR_BASE, %a7 /* Note VBR can't be read */ + movec %a7, %VBR + move.l %a7, _ramvec /* Set up vector addr */ + move.l %a7, _rambase /* Set up base RAM addr */ + + + /* + * Set to 4 meg for the Cadre III board (m5206e). + */ + move.l #MEM_SIZE, %a0 + + move.l %a0, %d0 /* Mem end addr is in a0 */ + move.l %d0, %sp /* Set up initial stack ptr */ + move.l %d0, _ramend /* Set end ram addr */ + + + /* + * Enable CPU internal cache. + */ + move.l #0x01000000, %d0 /* Invalidate cache cmd */ + movec %d0, %CACR /* Invalidate cache */ + move.l #0x80000100, %d0 /* Setup cache mask */ + movec %d0, %CACR /* Enable cache */ + + + /* + * Move ROM filesystem above bss :-) + */ + lea.l _sbss, %a0 /* Get start of bss */ + lea.l _ebss, %a1 /* Set up destination */ + move.l %a0, %a2 /* Copy of bss start */ + + move.l 8(%a0), %d0 /* Get size of ROMFS */ + addq.l #8, %d0 /* Allow for rounding */ + and.l #0xfffffffc, %d0 /* Whole words */ + + add.l %d0, %a0 /* Copy from end */ + add.l %d0, %a1 /* Copy from end */ + move.l %a1, _ramstart /* Set start of ram */ + +_copy_romfs: + move.l -(%a0), %d0 /* Copy dword */ + move.l %d0, -(%a1) + cmp.l %a0, %a2 /* Check if at end */ + bne _copy_romfs + + /* + * Zero out the bss region. + */ + lea.l _sbss, %a0 /* Get start of bss */ + lea.l _ebss, %a1 /* Get end of bss */ + clr.l %d0 /* Set value */ +_clear_bss: + move.l %d0, (%a0)+ /* Clear each word */ + cmp.l %a0, %a1 /* Check if at end */ + bne _clear_bss + + /* + * Load the current task pointer and stack. + */ + lea init_thread_union, %a0 + lea 0x2000(%a0), %sp + + /* + * Assember start up done, start code proper. + */ + jsr start_kernel /* Start Linux kernel */ + +_exit: + jmp _exit /* Should never get here */ + +/*****************************************************************************/ diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/5206e/CADRE3/ram.ld linux.2.5.40-ac2/arch/m68knommu/platform/5206e/CADRE3/ram.ld --- linux.2.5.40/arch/m68knommu/platform/5206e/CADRE3/ram.ld 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/5206e/CADRE3/ram.ld 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,72 @@ + +MEMORY { + ram : ORIGIN = 0x20000, LENGTH = 0x007E0000 +} + +jiffies = jiffies_64 + 4; + +SECTIONS { + + .text : { + _stext = . ; + *(.text) + *(.text.exit) + *(.text.lock) + *(.exitcall.exit) + *(.rodata) + . = ALIGN(0x4) ; + *(.kstrtab) + . = ALIGN(16); /* Exception table */ + __start___ex_table = .; + *(__ex_table) + __stop___ex_table = .; + + __start___ksymtab = .; /* Kernel symbol table */ + *(__ksymtab) + __stop___ksymtab = .; + . = ALIGN(4) ; + _etext = . ; + } > ram + + .data BLOCK(0x4) : { + _sdata = . ; + __data_start = . ; + *(.data) + *(.data.exit) + . = ALIGN(0x2000) ; + *(.data.init_task) + . = ALIGN(0x2000) ; + _edata = . ; + } > ram + + .init BLOCK(4096) : { + __init_begin = .; + *(.text.init) + *(.data.init) + . = ALIGN(16); + __setup_start = .; + *(.setup.init) + __setup_end = .; + __initcall_start = .; + *(.initcall1.init) + *(.initcall2.init) + *(.initcall3.init) + *(.initcall4.init) + *(.initcall5.init) + *(.initcall6.init) + *(.initcall7.init) + __initcall_end = .; + . = ALIGN(4) ; + __init_end = .; + } > ram + + .bss BLOCK(0x4) : { + _sbss = . ; + *(.bss) + *(COMMON) + . = ALIGN(4) ; + _ebss = . ; + _end = . ; + } > ram +} + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/5206e/config.c linux.2.5.40-ac2/arch/m68knommu/platform/5206e/config.c --- linux.2.5.40/arch/m68knommu/platform/5206e/config.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/5206e/config.c 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,301 @@ +/***************************************************************************/ + +/* + * linux/arch/m68knommu/platform/5206e/config.c + * + * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com) + */ + +/***************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#ifdef CONFIG_NETtel +#include +#include +#endif + +/***************************************************************************/ + +#ifdef CONFIG_NETtel +void reset_setupbutton(void); +#endif + +/***************************************************************************/ + +/* + * DMA channel base address table. + */ +unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = { + MCF_MBAR + MCFDMA_BASE0, + MCF_MBAR + MCFDMA_BASE1, +}; + +unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS]; + +/***************************************************************************/ + +void coldfire_tick(void) +{ + volatile unsigned char *timerp; + + /* Reset the ColdFire timer */ + timerp = (volatile unsigned char *) (MCF_MBAR + MCFTIMER_BASE1); + timerp[MCFTIMER_TER] = MCFTIMER_TER_CAP | MCFTIMER_TER_REF; +} + +/***************************************************************************/ + +void coldfire_timer_init(void (*handler)(int, void *, struct pt_regs *)) +{ + volatile unsigned short *timerp; + volatile unsigned char *icrp; + + /* Set up TIMER 1 as poll clock */ + timerp = (volatile unsigned short *) (MCF_MBAR + MCFTIMER_BASE1); + timerp[MCFTIMER_TMR] = MCFTIMER_TMR_DISABLE; + + timerp[MCFTIMER_TRR] = (unsigned short) ((MCF_CLK / 16) / HZ); + timerp[MCFTIMER_TMR] = MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 | + MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE; + + icrp = (volatile unsigned char *) (MCF_MBAR + MCFSIM_TIMER1ICR); + +#ifdef CONFIG_NETtel + *icrp = MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3; + request_irq(30, handler, SA_INTERRUPT, "ColdFire Timer", NULL); + reset_setupbutton(); +#else + *icrp = MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL5 | MCFSIM_ICR_PRI3; + request_irq(29, handler, SA_INTERRUPT, "ColdFire Timer", NULL); +#endif + mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_TIMER1); +} + +/***************************************************************************/ + +/* + * Program the vector to be an auto-vectored. + */ + +void mcf_autovector(unsigned int vec) +{ + volatile unsigned char *mbar; + unsigned char icr; + + if ((vec >= 25) && (vec <= 31)) { + vec -= 25; + mbar = (volatile unsigned char *) MCF_MBAR; + icr = MCFSIM_ICR_AUTOVEC | (vec << 3); + *(mbar + MCFSIM_ICR1 + vec) = icr; + vec = 0x1 << (vec + 1); + mcf_setimr(mcf_getimr() & ~vec); + } +} + +/***************************************************************************/ + +extern e_vector *_ramvec; + +void set_evector(int vecnum, void (*handler)(void)) +{ + if (vecnum >= 0 && vecnum <= 255) + _ramvec[vecnum] = handler; +} + +/***************************************************************************/ + +/* assembler routines */ +asmlinkage void buserr(void); +asmlinkage void trap(void); +asmlinkage void system_call(void); +asmlinkage void inthandler(void); + +void coldfire_trap_init(void) +{ + int i; +#ifdef MCF_MEMORY_PROTECT + extern unsigned long _end; + extern unsigned long memory_end; +#endif + +#ifndef ENABLE_dBUG + mcf_setimr(MCFSIM_IMR_MASKALL); +#endif + + /* + * There is a common trap handler and common interrupt + * handler that handle almost every vector. We treat + * the system call and bus error special, they get their + * own first level handlers. + */ +#ifndef ENABLE_dBUG + for (i = 3; (i <= 23); i++) + _ramvec[i] = trap; + for (i = 33; (i <= 63); i++) + _ramvec[i] = trap; +#endif + + for (i = 24; (i <= 30); i++) + _ramvec[i] = inthandler; +#ifndef ENABLE_dBUG + _ramvec[31] = inthandler; // Disables the IRQ7 button +#endif + + for (i = 64; (i < 255); i++) + _ramvec[i] = inthandler; + _ramvec[255] = 0; + + _ramvec[2] = buserr; + _ramvec[32] = system_call; +} + +/***************************************************************************/ + +/* + * Generic dumping code. Used for panic and debug. + */ + +void dump(struct pt_regs *fp) +{ + extern unsigned int sw_usp, sw_ksp; + unsigned long *sp; + unsigned char *tp; + int i; + + printk("\nCURRENT PROCESS:\n\n"); + printk("COMM=%s PID=%d\n", current->comm, current->pid); + + if (current->mm) { + printk("TEXT=%08x-%08x DATA=%08x-%08x BSS=%08x-%08x\n", + (int) current->mm->start_code, + (int) current->mm->end_code, + (int) current->mm->start_data, + (int) current->mm->end_data, + (int) current->mm->end_data, + (int) current->mm->brk); + printk("USER-STACK=%08x KERNEL-STACK=%08x\n\n", + (int) current->mm->start_stack, + (int) (((unsigned long) current) + 2 * PAGE_SIZE)); + } + + printk("PC: %08lx\n", fp->pc); + printk("SR: %08lx SP: %08lx\n", (long) fp->sr, (long) fp); + printk("d0: %08lx d1: %08lx d2: %08lx d3: %08lx\n", + fp->d0, fp->d1, fp->d2, fp->d3); + printk("d4: %08lx d5: %08lx a0: %08lx a1: %08lx\n", + fp->d4, fp->d5, fp->a0, fp->a1); + printk("\nUSP: %08x KSP: %08x TRAPFRAME: %08x\n", + sw_usp, sw_ksp, (unsigned int) fp); + + printk("\nCODE:"); + tp = ((unsigned char *) fp->pc) - 0x20; + for (sp = (unsigned long *) tp, i = 0; (i < 0x40); i += 4) { + if ((i % 0x10) == 0) + printk("\n%08x: ", (int) (tp + i)); + printk("%08x ", (int) *sp++); + } + printk("\n"); + + printk("\nKERNEL STACK:"); + tp = ((unsigned char *) fp) - 0x40; + for (sp = (unsigned long *) tp, i = 0; (i < 0xc0); i += 4) { + if ((i % 0x10) == 0) + printk("\n%08x: ", (int) (tp + i)); + printk("%08x ", (int) *sp++); + } + printk("\n"); + +#if 1 + printk("\nUSER STACK:"); + tp = (unsigned char *) sw_usp; + for (sp = (unsigned long *) tp, i = 0; (i < 0x80); i += 4) { + if ((i % 0x10) == 0) + printk("\n%08x: ", (int) (tp + i)); + printk("%08x ", (int) *sp++); + } + printk("\n\n"); +#endif +} + +/***************************************************************************/ + +#ifdef CONFIG_NETtel + +/* + * Routines to support the NETtel software reset button. + */ +void reset_button(int irq, void *dev_id, struct pt_regs *regs) +{ + extern void flash_eraseconfig(void); + static int inbutton = 0; + + /* + * IRQ7 is not maskable by the CPU core. It is possible + * that switch bounce may get us back here before we have + * really serviced the interrupt. + */ + if (inbutton) + return; + inbutton = 1; + /* Disable interrupt at SIM - best we can do... */ + mcf_setimr(mcf_getimr() | MCFSIM_IMR_EINT7); + /* Try and de-bounce the switch a little... */ + udelay(10000); + + flash_eraseconfig(); + + /* Don't leave here 'till button is no longer pushed! */ + for (;;) { + if ((mcf_getipr() & MCFSIM_IMR_EINT7) == 0) + break; + } + + HARD_RESET_NOW(); + /* Should never get here... */ + + inbutton = 0; + /* Interrupt service done, enable it again */ + mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_EINT7); +} + +/***************************************************************************/ + +void reset_setupbutton(void) +{ + mcf_autovector(31); + request_irq(31, reset_button, (SA_INTERRUPT | IRQ_FLG_FAST), + "Reset Button", NULL); +} + +#endif /* CONFIG_NETtel */ + +/***************************************************************************/ + +void config_BSP(char *commandp, int size) +{ +#ifdef CONFIG_NETtel + /* Copy command line from FLASH to local buffer... */ + memcpy(commandp, (char *) 0xf0004000, size); + commandp[size-1] = 0; +#else + memset(commandp, 0, size); +#endif /* CONFIG_NETtel */ + + mach_sched_init = coldfire_timer_init; + mach_tick = coldfire_tick; + mach_trap_init = coldfire_trap_init; +} + +/***************************************************************************/ diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/5206e/eLITE/crt0_ram.S linux.2.5.40-ac2/arch/m68knommu/platform/5206e/eLITE/crt0_ram.S --- linux.2.5.40/arch/m68knommu/platform/5206e/eLITE/crt0_ram.S 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/5206e/eLITE/crt0_ram.S 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,339 @@ +/*****************************************************************************/ + +/* + * crt0_ram.S -- startup code for MCF5206e ColdFire based eLITE boards. + * + * (C) Copyright 1999-2002, Greg Ungerer (gerg@snapgear.com). + * Copyright (C) 1999 Rob Scott (rscott@mtrob.fdns.net) + * + * 1999/02/24 Modified for the 5307 processor David W. Miller + */ + +/*****************************************************************************/ + +#include "linux/autoconf.h" +#include "asm/coldfire.h" +#include "asm/mcfsim.h" + +/*****************************************************************************/ + +/* + * M5206eLITE ColdFire eval board, chip select and memory setup. + */ + +#ifdef CONFIG_SMALL +#define MEM_BASE 0x30000000 /* Base memory for M5206eLITE */ +#define MEM_RESERVED 0x00020000 /* Don't use memory reserved by dBUG */ +#define MEM_SIZE 0x00100000 /* 1 MB of SRAM on M5206eLITE */ +#else +#define MEM_BASE 0x00000000 /* Base memory for M5206eLITE */ +#define MEM_RESERVED 0x00010000 /* Skip first MEM_LUMP for colilo */ +#define MEM_SIZE 0x02000000 /* Max DRAM 32Mb */ +#endif +#define MEM_MIN MEM_BASE+MEM_RESERVED +/* Define end of probeable memory space */ +#define MEM_MAX MEM_BASE+MEM_SIZE +#define MEM_BUILTIN 0x20000000 /* Put built in SRAM at dBUG loc */ +#define MEM_TMPSTACK MEM_BUILTIN+0x800 /* Use built in SRAM for tmp stack */ +#define MEM_LUMP 0x00010000 /* 64 Kb chunks */ +#define VBR_BASE MEM_BUILTIN /* Use built in SRAM for vectors */ + +#define CS0_ADDR 0x0000ffe0 /* CS0 connected to Flash ROM */ +#define CS0_MASK 0x000f0000 /* is 1Mbyte */ +#define CS0_CTRL 0x00001da3 /* read-write (for flash) */ +#define CS1_ADDR 0x00000000 /* CS1 not connected */ +#define CS1_MASK 0x00000000 +#define CS1_CTRL 0x00000000 +#define CS2_ADDR 0x00003000 /* CS2 connected to SRAM */ +#define CS2_MASK 0x000f0000 /* is 1Mbyte */ +#define CS2_CTRL 0x00001903 /* read-write */ +#define CS3_ADDR 0x00004000 /* CS3 connected to LED, par port */ +#define CS3_MASK 0x000f0000 /* is 1Mbyte */ +#define CS3_CTRL 0x00000183 /* read-write */ +#define CS4_ADDR 0x00000000 /* CS4 not connected */ +#define CS4_MASK 0x00000000 +#define CS4_CTRL 0x00000000 +#define CS5_ADDR 0x00000000 /* CS5 not connected */ +#define CS5_MASK 0x00000000 +#define CS5_CTRL 0x00000000 +#define CS6_ADDR 0x00000000 /* CS6 not connected */ +#define CS6_MASK 0x00000000 +#define CS6_CTRL 0x00000000 +#define CS7_ADDR 0x00000000 /* CS7 not connected */ +#define CS7_MASK 0x00000000 +#define CS7_CTRL 0x00000000 +#define DMC_CTRL 0x00000000 /* default memory control */ + +#define DCRR 0x00000034 /* Refresh period */ +/* DCTR definition: + <15>: DAEM, 1 = Drive Multiplexed Address During External Master DRAM xfer + <14>: EDO, 1 = EDO, 0 = Normal + <12>: RCD, 1 = 2 clk RAS-to-CAS, 0 = 1.0 clk RAS-to-CAS + <10:09>: RSH, 10 = 3.5 clk RAS low, 01 = 2.5 clk, 00 = 1.5 clk + <06:05>: RP, 10 = 3.5 clk RAS Precharge, 01 = 2.5 clk, 00 = 1.5 clk + <03>: CAS, 1 = 2.5 clk CAS assertion, 0 = 1.5 clk + <01>: CP, 1 = 1.5 CAS clk precharge, 0 = .5 clk + <00>: CSR, 1 = 2.0 clk CAS before RAS setup, 0 = 1.0 clk +*/ +#define DCTR 0x0000144B /* Slow DRAM */ +#define DCAR0 0x00000000 /* DRAM0 address, 0 base addr */ +#define DCMR0 0x003e0000 /* DRAM0 mask, 4Mb DRAM */ +#define DCCR0 0x00000007 /* DRAM0 control, R/W, burst pg mde */ +#define DCAR1 0x00000000 /* DRAM1 address, 0 base addr */ +#define DCMR1 0x00000000 /* DRAM1 mask, no DRAM */ +#define DCCR1 0x00000000 /* DRAM1 control, off */ + +/*****************************************************************************/ + +.global _start +.global _rambase +.global _ramvec +.global _ramstart +.global _ramend + +/*****************************************************************************/ + +.data + +/* + * Set up the usable of RAM stuff. Size of RAM is determined then + * an initial stack set up at the end. + */ +_rambase: +.long 0 +_ramvec: +.long 0 +_ramstart: +.long 0 +_ramend: +.long 0 + +/*****************************************************************************/ + +.text + +/* + * This is the codes first entry point. This is where it all + * begins... + */ + +_start: + nop /* Filler */ + move.w #0x2700, %sr /* No interrupts */ + + move.l #MCF_MBAR+1, %a0 /* Set I/O base addr */ + movec %a0, %MBAR /* Note: bit 0 is Validate */ + move.l #MEM_BUILTIN+1,%a0 /* Set SRAM base addr */ + movec %a0, %RAMBAR0 /* Note: bit 0 is Validate */ + + move.l #MCF_MBAR, %a0 /* Get I/O base addr */ + + /* ----------------------- CS1 ----------------------- */ + move.w #CS1_ADDR, %d0 /* CS1 address */ + move.w %d0, MCFSIM_CSAR1(%a0) /* CS1 address */ + move.l #CS1_MASK, %d0 /* CS1 mask */ + move.l %d0, MCFSIM_CSMR1(%a0) /* CS1 mask */ + move.w #CS1_CTRL, %d0 /* CS1 control */ + move.w %d0, MCFSIM_CSCR1(%a0) /* CS1 control */ + + /* ----------------------- CS2 ----------------------- */ + move.w #CS2_ADDR, %d0 /* CS2 address */ + move.w %d0, MCFSIM_CSAR2(%a0) /* CS2 address */ + move.l #CS2_MASK, %d0 /* CS2 mask */ + move.l %d0, MCFSIM_CSMR2(%a0) /* CS2 mask */ + move.w #CS2_CTRL, %d0 /* CS2 control */ + move.w %d0, MCFSIM_CSCR2(%a0) /* CS2 control */ + + /* ----------------------- CS3 ----------------------- */ + move.w #CS3_ADDR, %d0 /* CS3 address */ + move.w %d0, MCFSIM_CSAR3(%a0) /* CS3 address */ + move.l #CS3_MASK, %d0 /* CS3 mask */ + move.l %d0, MCFSIM_CSMR3(%a0) /* CS3 mask */ + move.w #CS3_CTRL, %d0 /* CS3 control */ + move.w %d0, MCFSIM_CSCR3(%a0) /* CS3 control */ + + /* ----------------------- CS4 ----------------------- */ + move.w #CS4_ADDR, %d0 /* CS4 address */ + move.w %d0, MCFSIM_CSAR4(%a0) /* CS4 address */ + move.l #CS4_MASK, %d0 /* CS4 mask */ + move.l %d0, MCFSIM_CSMR4(%a0) /* CS4 mask */ + move.w #CS4_CTRL, %d0 /* CS4 control */ + move.w %d0, MCFSIM_CSCR4(%a0) /* CS4 control */ + + /* ----------------------- CS5 ----------------------- */ + move.w #CS5_ADDR, %d0 /* CS5 address */ + move.w %d0, MCFSIM_CSAR5(%a0) /* CS5 address */ + move.l #CS5_MASK, %d0 /* CS5 mask */ + move.l %d0, MCFSIM_CSMR5(%a0) /* CS5 mask */ + move.w #CS5_CTRL, %d0 /* CS5 control */ + move.w %d0, MCFSIM_CSCR5(%a0) /* CS5 control */ + + /* ----------------------- CS6 ----------------------- */ + move.w #CS6_ADDR, %d0 /* CS6 address */ + move.w %d0, MCFSIM_CSAR6(%a0) /* CS6 address */ + move.l #CS6_MASK, %d0 /* CS6 mask */ + move.l %d0, MCFSIM_CSMR6(%a0) /* CS6 mask */ + move.w #CS6_CTRL, %d0 /* CS6 control */ + move.w %d0, MCFSIM_CSCR6(%a0) /* CS6 control */ + + /* ----------------------- CS7 ----------------------- */ + move.w #CS7_ADDR, %d0 /* CS7 address */ + move.w %d0, MCFSIM_CSAR7(%a0) /* CS7 address */ + move.l #CS7_MASK, %d0 /* CS7 mask */ + move.l %d0, MCFSIM_CSMR7(%a0) /* CS7 mask */ + move.w #CS7_CTRL, %d0 /* CS7 control */ + move.w %d0, MCFSIM_CSCR7(%a0) /* CS7 control */ + + /* --------------------- Default --------------------- */ + move.w #DMC_CTRL, %d0 /* Default control */ + move.w %d0, MCFSIM_DMCR(%a0) /* Default control */ + + /* ----------------------- DRAM ------------------------ */ + move.w #DCRR, %d0 /* Refresh period */ + move.w %d0, MCFSIM_DCRR(%a0) /* Refresh period */ + move.w #DCTR, %d0 /* Timing address */ + move.w %d0, MCFSIM_DCTR(%a0) /* Timing address */ + move.w #DCAR0, %d0 /* DRAM0 base address */ + move.w %d0, MCFSIM_DCAR0(%a0) /* DRAM0 base address */ + move.l #DCMR0, %d0 /* DRAM0 mask */ + move.l %d0, MCFSIM_DCMR0(%a0) /* DRAM0 mask */ + move.b #DCCR0, %d0 /* DRAM0 control */ + move.b %d0, MCFSIM_DCCR0(%a0) /* DRAM0 control */ + move.w #DCAR1, %d0 /* DRAM1 base address */ + move.w %d0, MCFSIM_DCAR1(%a0) /* DRAM1 base address */ + move.l #DCMR1, %d0 /* DRAM1 mask */ + move.l %d0, MCFSIM_DCMR1(%a0) /* DRAM1 mask */ + move.b #DCCR1, %d0 /* DRAM1 control */ + move.b %d0, MCFSIM_DCCR1(%a0) /* DRAM1 control */ + + /* + * ChipSelect 0 - ROM cs + * + * ChipSelect 0 is the global chip select coming out of system reset. + * CS0 is asserted for every access until CSMR0 is written. Therefore, + * the entire ChipSelect must be properly set prior to asserting + * CSCR0_V. + */ + move.w #CS0_ADDR, %d0 /* CS0 address */ + move.w %d0, MCFSIM_CSAR0(%a0) /* CS0 address */ + move.l #CS0_MASK, %d0 /* CS0 mask */ + move.l %d0, MCFSIM_CSMR0(%a0) /* CS0 mask */ + move.w #CS0_CTRL, %d0 /* CS0 control */ + move.w %d0, MCFSIM_CSCR0(%a0) /* CS0 control */ + + + /* + * Setup VBR here, otherwise buserror remap will not work. + * if dBug was active before (on my SBC with dBug 1.1 of Dec 16 1996) + * + * bkr@cut.de 19990306 + * + * Note: this is because dBUG points VBR to ROM, making vectors read + * only, so the bus trap can't be changed. (RS) + */ + move.l #VBR_BASE, %a7 /* Note VBR can't be read */ + movec %a7, %VBR + move.l %a7, _ramvec /* Set up vector addr */ + move.l %a7, _rambase /* Set up base RAM addr */ + + + /* + * Determine size of RAM, then set up initial stack + * Done differently for different eval boards and cpus. + */ + +#if defined(CONFIG_SMALL) + /* + * Set to SRAM size when configuring a minimal system + */ + move.l #MEM_MAX, %a0 + +#else + /* + * On the Arnewsh 5206 board and the Motorola m5206eLITE board + * we can probe for the amount of DRAM present... + */ + move.l #MEM_MIN, %a0 /* Start at bottom */ + move.l #MEM_MAX, %a1 /* Set stop point */ + lea.l MEM_TMPSTACK, %sp /* Set up tmp stack ptr */ + + move.l #VBR_BASE+8, %a2 /* Address of bus trap */ + lea.l _ram_buserr, %a3 /* Get RAM trap address */ + move.l %a3, (%a2) /* Set trap to local ptr */ + +_find_ram: + move.l (%a0), %d0 /* Attempt read */ + add.l #MEM_LUMP, %a0 /* Try next bank */ + cmp.l %a1, %a0 /* Check more? */ + bne _find_ram + + /* + * BUS error trap handler - used for RAM probing. + */ +_ram_buserr: + bra _found_ram + +_found_ram: /* Vectored here on bus err */ +#endif + + move.l %a0, %d0 /* Mem end addr is in a0 */ + move.l %d0, %sp /* Set up initial stack ptr */ + move.l %d0, _ramend /* Set end ram addr */ + + + /* + * Enable CPU internal cache. + */ + move.l #0x01000000, %d0 /* Invalidate cache cmd */ + movec %d0, %CACR /* Invalidate cache */ + move.l #0x80000100, %d0 /* Setup cache mask */ + movec %d0, %CACR /* Enable cache */ + + + /* + * Move ROM filesystem above bss :-) + */ + lea.l _sbss, %a0 /* Get start of bss */ + lea.l _ebss, %a1 /* Set up destination */ + move.l %a0, %a2 /* Copy of bss start */ + + move.l 8(%a0), %d0 /* Get size of ROMFS */ + addq.l #8, %d0 /* Allow for rounding */ + and.l #0xfffffffc, %d0 /* Whole words */ + + add.l %d0, %a0 /* Copy from end */ + add.l %d0, %a1 /* Copy from end */ + move.l %a1, _ramstart /* Set start of ram */ + +_copy_romfs: + move.l -(%a0), %d0 /* Copy dword */ + move.l %d0, -(%a1) + cmp.l %a0, %a2 /* Check if at end */ + bne _copy_romfs + + /* + * Zero out the bss region. + */ + lea.l _sbss, %a0 /* Get start of bss */ + lea.l _ebss, %a1 /* Get end of bss */ + clr.l %d0 /* Set value */ +_clear_bss: + move.l %d0, (%a0)+ /* Clear each word */ + cmp.l %a0, %a1 /* Check if at end */ + bne _clear_bss + + /* + * Load the current task pointer and stack. + */ + lea init_thread_union, %a0 + lea 0x2000(%a0), %sp + + /* + * Assember start up done, start code proper. + */ + jsr start_kernel /* Start Linux kernel */ + +_exit: + jmp _exit /* Should never get here */ + +/*****************************************************************************/ diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/5206e/eLITE/ram.ld linux.2.5.40-ac2/arch/m68knommu/platform/5206e/eLITE/ram.ld --- linux.2.5.40/arch/m68knommu/platform/5206e/eLITE/ram.ld 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/5206e/eLITE/ram.ld 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,72 @@ + +MEMORY { + ram : ORIGIN = 0x30020000, LENGTH = 0xe0000 +} + +jiffies = jiffies_64 + 4; + +SECTIONS { + + .text 0x30020000 : { + _stext = . ; + *(.text) + *(.text.exit) + *(.text.lock) + *(.exitcall.exit) + *(.rodata) + . = ALIGN(0x4) ; + *(.kstrtab) + . = ALIGN(16); /* Exception table */ + __start___ex_table = .; + *(__ex_table) + __stop___ex_table = .; + + __start___ksymtab = .; /* Kernel symbol table */ + *(__ksymtab) + __stop___ksymtab = .; + . = ALIGN(4) ; + _etext = . ; + } > ram + + .data BLOCK(0x4) : { + _sdata = . ; + __data_start = . ; + *(.data) + *(.data.exit) + . = ALIGN(0x2000) ; + *(.data.init_task) + . = ALIGN(0x2000) ; + _edata = . ; + } > ram + + .init BLOCK(4096) : { + __init_begin = .; + *(.text.init) + *(.data.init) + . = ALIGN(16); + __setup_start = .; + *(.setup.init) + __setup_end = .; + __initcall_start = .; + *(.initcall1.init) + *(.initcall2.init) + *(.initcall3.init) + *(.initcall4.init) + *(.initcall5.init) + *(.initcall6.init) + *(.initcall7.init) + __initcall_end = .; + . = ALIGN(4) ; + __init_end = .; + } > ram + + .bss BLOCK(0x4) : { + _sbss = . ; + *(.bss) + *(COMMON) + . = ALIGN(4) ; + _ebss = . ; + _end = . ; + } > ram +} + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/5206e/Makefile linux.2.5.40-ac2/arch/m68knommu/platform/5206e/Makefile --- linux.2.5.40/arch/m68knommu/platform/5206e/Makefile 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/5206e/Makefile 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,49 @@ +# +# Makefile for the linux kernel. +# +# Note! Dependencies are done automagically by 'make dep', which also +# removes any old dependencies. DON'T put your own dependencies here +# unless it's something special (ie not a .c file). +# + +# +# re-use any 5307/coldfire files that we can. Perhaps we should create +# a coldfire directory for shared files ? +# + +VPATH := $(VPATH):../5307 + +ifdef CONFIG_FULLDEBUG + AFLAGS += -DDEBUGGER_COMPATIBLE_CACHE=1 +endif + +# +# +# If you want to play with the HW breakpoints then you will +# need to add define this, which will give you a stack backtrace +# on the console port whenever a DBG interrupt occurs. You have to +# set up you HW breakpoints to trigger a DBG interrupt: +# +# AFLAGS += -DTRAP_DBG_INTERRUPT +# EXTRA_CFLAGS += -DTRAP_DBG_INTERRUPT +# + +AFLAGS += -D__ASSEMBLY__ -I. + +all: $(BOARD)/crt0_$(MODEL).o entry.o platform.o +O_TARGET := platform.o +obj-y := entry.o config.o signal.o ints.o + +$(BOARD)/crt0_$(MODEL).o: $(BOARD)/crt0_$(MODEL).S + +entry.o: entry.S m68k_defs.h + +m68k_defs.h: ../../kernel/m68k_defs.c ../../kernel/m68k_defs.head + rm -f m68k_defs.d + $(CC) $(filter-out -MD,$(CFLAGS)) -S ../../kernel/m68k_defs.c + cp ../../kernel/m68k_defs.head m68k_defs.h + grep '^#define' m68k_defs.s >> m68k_defs.h + rm m68k_defs.s +-include m68k_defs.d + +include $(TOPDIR)/Rules.make diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/5206e/Rules.make linux.2.5.40-ac2/arch/m68knommu/platform/5206e/Rules.make --- linux.2.5.40/arch/m68knommu/platform/5206e/Rules.make 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/5206e/Rules.make 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,34 @@ +# +# 5407/Makefile +# +# This file is included by the global makefile so that you can add your own +# platform-specific flags and dependencies. +# +# This file is subject to the terms and conditions of the GNU General Public +# License. See the file "COPYING" in the main directory of this archive +# for more details. +# +# Copyright (C) 1999,2001 Greg Ungerer (gerg@snapgear.com) +# Copyright (C) 1998,1999 D. Jeff Dionne +# Copyright (C) 1998 Kenneth Albanowski +# Copyright (C) 1994 by Hamish Macdonald +# Copyright (C) 2000 Lineo Inc. (www.lineo.com) + +GCC_DIR = $(shell $(CC) -v 2>&1 | grep specs | sed -e 's/.* \(.*\)specs/\1\./') + +INCGCC = $(GCC_DIR)/include +LIBGCC = $(GCC_DIR)/m5200/libgcc.a + +CFLAGS := -fno-builtin -nostdinc $(CFLAGS) -I$(INCGCC) -pipe -DCONFIG_NO_MMU -DNO_FPU -m5200 -Wa,-S -Wa,-m5200 -D__ELF__ -DUTS_SYSNAME=\"uClinux\" -D__linux__ +AFLAGS := $(CFLAGS) + +LDFLAGS_vmlinux = -T arch/$(ARCH)/platform/$(PLATFORM)/$(BOARD)/$(MODEL).ld + +HEAD := arch/$(ARCH)/platform/$(PLATFORM)/$(BOARD)/crt0_$(MODEL).o + +SUBDIRS := arch/$(ARCH)/kernel arch/$(ARCH)/mm arch/$(ARCH)/lib \ + arch/$(ARCH)/platform/$(PLATFORM) $(SUBDIRS) +CORE_FILES := arch/$(ARCH)/kernel/kernel.o arch/$(ARCH)/mm/mm.o \ + arch/$(ARCH)/platform/$(PLATFORM)/platform.o $(CORE_FILES) +LIBS += arch/$(ARCH)/lib/lib.a $(LIBGCC) + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/5249/config.c linux.2.5.40-ac2/arch/m68knommu/platform/5249/config.c --- linux.2.5.40/arch/m68knommu/platform/5249/config.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/5249/config.c 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,295 @@ +/***************************************************************************/ + +/* + * linux/arch/m68knommu/platform/5249/config.c + * + * Copyright (C) 2002, Greg Ungerer (gerg@snapgear.com) + */ + +/***************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/***************************************************************************/ + +void coldfire_profile_init(void); + +/***************************************************************************/ + +/* + * DMA channel base address table. + */ +unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = { + MCF_MBAR + MCFDMA_BASE0, + MCF_MBAR + MCFDMA_BASE1, + MCF_MBAR + MCFDMA_BASE2, + MCF_MBAR + MCFDMA_BASE3, +}; + +unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS]; + +/***************************************************************************/ + +void coldfire_tick(void) +{ + volatile unsigned char *timerp; + + /* Reset the ColdFire timer */ + timerp = (volatile unsigned char *) (MCF_MBAR + MCFTIMER_BASE1); + timerp[MCFTIMER_TER] = MCFTIMER_TER_CAP | MCFTIMER_TER_REF; +} + +/***************************************************************************/ + +void coldfire_timer_init(void (*handler)(int, void *, struct pt_regs *)) +{ + volatile unsigned short *timerp; + volatile unsigned char *icrp; + + /* Set up TIMER 1 as poll clock */ + timerp = (volatile unsigned short *) (MCF_MBAR + MCFTIMER_BASE1); + timerp[MCFTIMER_TMR] = MCFTIMER_TMR_DISABLE; + + timerp[MCFTIMER_TRR] = (unsigned short) ((MCF_CLK / 16) / HZ); + timerp[MCFTIMER_TMR] = MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 | + MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE; + + icrp = (volatile unsigned char *) (MCF_MBAR + MCFSIM_TIMER1ICR); + *icrp = MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL5 | MCFSIM_ICR_PRI3; + request_irq(29, handler, SA_INTERRUPT, "ColdFire Timer", NULL); + +#ifdef CONFIG_HIGHPROFILE + coldfire_profile_init(); +#endif + mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_TIMER1); +} + +/***************************************************************************/ +#ifdef CONFIG_HIGHPROFILE +/***************************************************************************/ + +#define PROFILEHZ 1013 + +/* + * Use the other timer to provide high accuracy profiling info. + */ + +void coldfire_profile_tick(int irq, void *dummy, struct pt_regs *regs) +{ + volatile unsigned char *timerp; + + /* Reset the ColdFire timer2 */ + timerp = (volatile unsigned char *) (MCF_MBAR + MCFTIMER_BASE2); + timerp[MCFTIMER_TER] = MCFTIMER_TER_CAP | MCFTIMER_TER_REF; + + if (!user_mode(regs)) { + if (prof_buffer && current->pid) { + extern int _stext; + unsigned long ip = instruction_pointer(regs); + ip -= (unsigned long) &_stext; + ip >>= prof_shift; + if (ip < prof_len) + prof_buffer[ip]++; + } + } +} + +void coldfire_profile_init(void) +{ + volatile unsigned short *timerp; + volatile unsigned char *icrp; + + printk("PROFILE: lodging timer2=%d as profile timer\n", PROFILEHZ); + + /* Set up TIMER 2 as poll clock */ + timerp = (volatile unsigned short *) (MCF_MBAR + MCFTIMER_BASE2); + timerp[MCFTIMER_TMR] = MCFTIMER_TMR_DISABLE; + + timerp[MCFTIMER_TRR] = (unsigned short) ((MCF_CLK / 16) / PROFILEHZ); + timerp[MCFTIMER_TMR] = MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 | + MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE; + + icrp = (volatile unsigned char *) (MCF_MBAR + MCFSIM_TIMER2ICR); + + *icrp = MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3; + request_irq(31, coldfire_profile_tick, (SA_INTERRUPT | IRQ_FLG_FAST), + "Profile Timer", NULL); + mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_TIMER2); +} + +/***************************************************************************/ +#endif /* CONFIG_HIGHPROFILE */ +/***************************************************************************/ + +/* + * Program the vector to be an auto-vectored. + */ + +void mcf_autovector(unsigned int vec) +{ + volatile unsigned char *mbar; + + if ((vec >= 25) && (vec <= 31)) { + mbar = (volatile unsigned char *) MCF_MBAR; + vec = 0x1 << (vec - 24); + *(mbar + MCFSIM_AVR) |= vec; + mcf_setimr(mcf_getimr() & ~vec); + } +} + +/***************************************************************************/ + +extern e_vector *_ramvec; + +void set_evector(int vecnum, void (*handler)(void)) +{ + if (vecnum >= 0 && vecnum <= 255) + _ramvec[vecnum] = handler; +} + +/***************************************************************************/ + +/* assembler routines */ +asmlinkage void buserr(void); +asmlinkage void trap(void); +asmlinkage void system_call(void); +asmlinkage void inthandler(void); + +void __init coldfire_trap_init(void) +{ + int i; + +#ifndef ENABLE_dBUG + mcf_setimr(MCFSIM_IMR_MASKALL); +#endif + + /* + * There is a common trap handler and common interrupt + * handler that handle almost every vector. We treat + * the system call and bus error special, they get their + * own first level handlers. + */ +#ifndef ENABLE_dBUG + for (i = 3; (i <= 23); i++) + _ramvec[i] = trap; + for (i = 33; (i <= 63); i++) + _ramvec[i] = trap; +#endif + + for (i = 24; (i <= 30); i++) + _ramvec[i] = inthandler; +#ifndef ENABLE_dBUG + _ramvec[31] = inthandler; // Disables the IRQ7 button +#endif + + for (i = 64; (i < 255); i++) + _ramvec[i] = inthandler; + _ramvec[255] = 0; + + _ramvec[2] = buserr; + _ramvec[32] = system_call; +} + +/***************************************************************************/ + +/* + * Generic dumping code. Used for panic and debug. + */ + +void dump(struct pt_regs *fp) +{ + extern unsigned int sw_usp, sw_ksp; + unsigned long *sp; + unsigned char *tp; + int i; + + printk("\nCURRENT PROCESS:\n\n"); + printk("COMM=%s PID=%d\n", current->comm, current->pid); + + if (current->mm) { + printk("TEXT=%08x-%08x DATA=%08x-%08x BSS=%08x-%08x\n", + (int) current->mm->start_code, + (int) current->mm->end_code, + (int) current->mm->start_data, + (int) current->mm->end_data, + (int) current->mm->end_data, + (int) current->mm->brk); + printk("USER-STACK=%08x KERNEL-STACK=%08x\n\n", + (int) current->mm->start_stack, + (int) (((unsigned long) current) + 2 * PAGE_SIZE)); + } + + printk("PC: %08lx\n", fp->pc); + printk("SR: %08lx SP: %08lx\n", (long) fp->sr, (long) fp); + printk("d0: %08lx d1: %08lx d2: %08lx d3: %08lx\n", + fp->d0, fp->d1, fp->d2, fp->d3); + printk("d4: %08lx d5: %08lx a0: %08lx a1: %08lx\n", + fp->d4, fp->d5, fp->a0, fp->a1); + printk("\nUSP: %08x KSP: %08x TRAPFRAME: %08x\n", + sw_usp, sw_ksp, (unsigned int) fp); + + printk("\nCODE:"); + tp = ((unsigned char *) fp->pc) - 0x20; + for (sp = (unsigned long *) tp, i = 0; (i < 0x40); i += 4) { + if ((i % 0x10) == 0) + printk("\n%08x: ", (int) (tp + i)); + printk("%08x ", (int) *sp++); + } + printk("\n"); + + printk("\nKERNEL STACK:"); + tp = ((unsigned char *) fp) - 0x40; + for (sp = (unsigned long *) tp, i = 0; (i < 0xc0); i += 4) { + if ((i % 0x10) == 0) + printk("\n%08x: ", (int) (tp + i)); + printk("%08x ", (int) *sp++); + } + printk("\n"); + + printk("\nUSER STACK:"); + tp = (unsigned char *) (sw_usp - 0x10); + for (sp = (unsigned long *) tp, i = 0; (i < 0x80); i += 4) { + if ((i % 0x10) == 0) + printk("\n%08x: ", (int) (tp + i)); + printk("%08x ", (int) *sp++); + } + printk("\n\n"); +} + +/***************************************************************************/ + +void config_BSP(char *commandp, int size) +{ + memset(commandp, 0, size); + + mach_sched_init = coldfire_timer_init; + mach_tick = coldfire_tick; + mach_trap_init = coldfire_trap_init; +} + +/***************************************************************************/ +#ifdef TRAP_DBG_INTERRUPT + +asmlinkage void dbginterrupt_c(struct frame *fp) +{ + extern void dump(struct pt_regs *fp); + printk("%s(%d): BUS ERROR TRAP\n", __FILE__, __LINE__); + dump((struct pt_regs *) fp); + asm("halt"); +} + +#endif +/***************************************************************************/ diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/5249/Makefile linux.2.5.40-ac2/arch/m68knommu/platform/5249/Makefile --- linux.2.5.40/arch/m68knommu/platform/5249/Makefile 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/5249/Makefile 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,49 @@ +# +# Makefile for the linux kernel. +# +# Note! Dependencies are done automagically by 'make dep', which also +# removes any old dependencies. DON'T put your own dependencies here +# unless it's something special (ie not a .c file). +# + +# +# re-use any 5307/coldfire files that we can. Perhaps we should create +# a coldfire directory for shared files ? +# + +VPATH := $(VPATH):../5307 + +ifdef CONFIG_FULLDEBUG + AFLAGS += -DDEBUGGER_COMPATIBLE_CACHE=1 +endif + +# +# +# If you want to play with the HW breakpoints then you will +# need to add define this, which will give you a stack backtrace +# on the console port whenever a DBG interrupt occurs. You have to +# set up you HW breakpoints to trigger a DBG interrupt: +# +# AFLAGS += -DTRAP_DBG_INTERRUPT +# EXTRA_CFLAGS += -DTRAP_DBG_INTERRUPT +# + +AFLAGS += -D__ASSEMBLY__ -I. + +all: $(BOARD)/crt0_$(MODEL).o entry.o platform.o +O_TARGET := platform.o +obj-y := entry.o config.o signal.o ints.o + +$(BOARD)/crt0_$(MODEL).o: $(BOARD)/crt0_$(MODEL).S + +entry.o: entry.S m68k_defs.h + +m68k_defs.h: ../../kernel/m68k_defs.c ../../kernel/m68k_defs.head + rm -f m68k_defs.d + $(CC) $(filter-out -MD,$(CFLAGS)) -S ../../kernel/m68k_defs.c + cp ../../kernel/m68k_defs.head m68k_defs.h + grep '^#define' m68k_defs.s >> m68k_defs.h + rm m68k_defs.s +-include m68k_defs.d + +include $(TOPDIR)/Rules.make diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/5249/MOTOROLA/crt0_ram.S linux.2.5.40-ac2/arch/m68knommu/platform/5249/MOTOROLA/crt0_ram.S --- linux.2.5.40/arch/m68knommu/platform/5249/MOTOROLA/crt0_ram.S 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/5249/MOTOROLA/crt0_ram.S 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,223 @@ +/*****************************************************************************/ + +/* + * crt0_ram.S -- startup code for Motorola M5249C3 eval board. + * + * (C) Copyright 1999-2002, Greg Ungerer (gerg@snapgear.com). + */ + +/*****************************************************************************/ + +#include "linux/autoconf.h" +#include "asm/coldfire.h" +#include "asm/mcfsim.h" + +/*****************************************************************************/ + +/* + * Motorola M5249C3 ColdFire eval board, chip select and memory setup. + */ +#define MEM_BASE 0x00000000 /* Memory base at address 0 */ +#define MEM_SIZE 0x00800000 /* Memory size 8MB */ +#define VBR_BASE MEM_BASE /* Vector address */ + +/*****************************************************************************/ + +.global _start +.global _rambase +.global _ramvec +.global _ramstart +.global _ramend + +/*****************************************************************************/ + +.data + +/* + * Set up the usable of RAM stuff. Size of RAM is determined then + * an initial stack set up at the end. + */ +_rambase: +.long 0 +_ramvec: +.long 0 +_ramstart: +.long 0 +_ramend: +.long 0 + +/*****************************************************************************/ + +.text + +/* + * This is the codes first entry point. This is where it all + * begins... + */ + +_start: + nop /* Filler */ + move.w #0x2700, %sr /* No interrupts */ + + /* + * Set MBAR1 and MBAR2, just incase they are not set. + */ + move.l #0x10000001, %a0 + movec %a0, %MBAR /* Map MBAR region */ + subq.l #1, %a0 /* Get MBAR address in a0 */ + + move.l #0x80000001, %a1 + movec %a1, #3086 /* Map MBAR2 region */ + subq.l #1, %a1 /* Get MBAR2 address in a1 */ + + /* + * Move secondary interrupts to base at 128. + */ + move.b #0x80, %d0 + move.b %d0, 0x16b(%a1) /* Interrupt base register */ + +#if 1 + /* + * Work around broken CSMR0/DRAM vector problem. + */ + move.l #0x001F0021, %d0 /* Disable C/I bit */ + move.l %d0, 0x84(%a0) /* Set CSMR0 */ +#endif + + /* + * Disable the PLL firstly. (Who knows what state it is + * in here!). + */ + move.l 0x180(%a1), %d0 /* Get current PLL value */ + and.l #0xfffffffe, %d0 /* PLL bypass first */ + move.l %d0, 0x180(%a1) /* Set PLL register */ + nop + +#if CONFIG_CLOCK_140MHz + /* + * Set initial clock frequency. This assumes M5249C3 board + * is fitted with 11.2896MHz crystal. It will program the + * PLL for 140MHz. Lets go fast :-) + */ + move.l #0x125a40f0, %d0 /* Set for 140MHz */ + move.l %d0, 0x180(%a1) /* Set PLL register */ + or.l #0x1, %d0 + move.l %d0, 0x180(%a1) /* Set PLL register */ +#endif + + /* + * Setup CS1 for ethernet controller. + * (Setup as per M5249C3 doco). + */ + move.l #0xe0000000, %d0 /* CS1 mapped at 0xe0000000 */ + move.l %d0, 0x8c(%a0) + move.l #0x001f0021, %d0 /* CS1 size of 1Mb */ + move.l %d0, 0x90(%a0) + move.w #0x0080, %d0 /* CS1 = 16bit port, AA */ + move.w %d0, 0x96(%a0) + + /* + * Setup CS2 for IDE interface. + */ + move.l #0x50000000, %d0 /* CS2 mapped at 0x50000000 */ + move.l %d0, 0x98(%a0) + move.l #0x001f0001, %d0 /* CS2 size of 1MB */ + move.l %d0, 0x9c(%a0) + move.w #0x0080, %d0 /* CS2 = 16bit, TA */ + move.w %d0, 0xa2(%a0) + + move.l #0x00107000, %d0 /* IDEconfig1 */ + move.l %d0, 0x18c(%a1) + move.l #0x000c0400, %d0 /* IDEconfig2 */ + move.l %d0, 0x190(%a1) + + move.l #0x00080000, %d0 /* GPIO19, IDE reset bit */ + or.l %d0, 0xc(%a1) /* Function GPIO19 */ + or.l %d0, 0x8(%a1) /* Enable GPIO19 as output */ + or.l %d0, 0x4(%a1) /* De-assert IDE reset */ + + + /* + * Setup VBR as per eval board (really dBUG does this). + * These settings must match it. + */ + move.l #VBR_BASE, %a0 /* Note VBR can't be read */ + movec %a0, %VBR + move.l %a0, _ramvec /* Set up vector addr */ + move.l %a0, _rambase /* Set up base RAM addr */ + + + /* + * Set the memory size, and then set a temporary stack. + */ + move.l #MEM_SIZE, %a0 + + move.l %a0, %d0 /* Mem end addr is in a0 */ + move.l %d0, %sp /* Set up initial stack ptr */ + move.l %d0, _ramend /* Set end ram addr */ + + + /* + * Enable CPU internal cache. + */ + move.l #0x01000000, %d0 /* Invalidate whole cache */ + movec %d0, %CACR + nop + + move.l #0x0000c000, %d0 /* Set SDRAM cached only */ + movec %d0, %ACR0 + move.l #0x00000000, %d0 /* No other regions cached */ + movec %d0, %ACR1 + + move.l #0xa0000200, %d0 /* Enable cache... */ + movec %d0, %CACR + nop + + + /* + * Move ROM filesystem above bss :-) + */ + lea.l _sbss, %a0 /* Get start of bss */ + lea.l _ebss, %a1 /* Set up destination */ + move.l %a0, %a2 /* Copy of bss start */ + + move.l 8(%a0), %d0 /* Get size of ROMFS */ + addq.l #8, %d0 /* Allow for rounding */ + and.l #0xfffffffc, %d0 /* Whole words */ + + add.l %d0, %a0 /* Copy from end */ + add.l %d0, %a1 /* Copy from end */ + move.l %a1, _ramstart /* Set start of ram */ + +_copy_romfs: + move.l -(%a0), %d0 /* Copy dword */ + move.l %d0, -(%a1) + cmp.l %a0, %a2 /* Check if at end */ + bne _copy_romfs + + /* + * Zero out the bss region. + */ + lea.l _sbss, %a0 /* Get start of bss */ + lea.l _ebss, %a1 /* Get end of bss */ + clr.l %d0 /* Set value */ +_clear_bss: + move.l %d0, (%a0)+ /* Clear each word */ + cmp.l %a0, %a1 /* Check if at end */ + bne _clear_bss + + /* + * Load the current thread pointer and stack. + */ + lea init_thread_union, %a0 + lea 0x2000(%a0), %sp + + /* + * Assember start up done, start code proper. + */ + jsr start_kernel /* Start Linux kernel */ + +_exit: + jmp _exit /* Should never get here */ + +/*****************************************************************************/ diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/5249/MOTOROLA/ram.ld linux.2.5.40-ac2/arch/m68knommu/platform/5249/MOTOROLA/ram.ld --- linux.2.5.40/arch/m68knommu/platform/5249/MOTOROLA/ram.ld 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/5249/MOTOROLA/ram.ld 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,76 @@ + +MEMORY { + ram : ORIGIN = 0x20000, LENGTH = 0x3e0000 +} + +jiffies = jiffies_64 + 4; + +SECTIONS { + + .text : { + _stext = . ; + *(.text) + *(.text.exit) + *(.text.lock) + *(.exitcall.exit) + *(.rodata) + *(.modinfo) + . = ALIGN(0x4) ; + *(.kstrtab) + . = ALIGN(16); /* Exception table */ + __start___ex_table = .; + *(__ex_table) + __stop___ex_table = .; + + __start___ksymtab = .; /* Kernel symbol table */ + *(__ksymtab) + __stop___ksymtab = .; + . = ALIGN(4) ; + _etext = . ; + } > ram + + .data BLOCK(0x4) : { + . = ALIGN(4); + _sdata = . ; + __data_start = . ; + *(.data) + *(.data.exit) + . = ALIGN(8192) ; + *(.data.init_task) + . = ALIGN(8192) ; + _edata = . ; + } > ram + + .init BLOCK(4096) : { + . = ALIGN(4096); + __init_begin = .; + *(.text.init) + *(.data.init) + . = ALIGN(16); + __setup_start = .; + *(.setup.init) + __setup_end = .; + __initcall_start = .; + *(.initcall1.init) + *(.initcall2.init) + *(.initcall3.init) + *(.initcall4.init) + *(.initcall5.init) + *(.initcall6.init) + *(.initcall7.init) + __initcall_end = .; + . = ALIGN(4); + __init_end = .; + } > ram + + .bss BLOCK(0x4) : { + . = ALIGN(4); + _sbss = . ; + *(.bss) + *(COMMON) + . = ALIGN(4) ; + _ebss = . ; + _end = . ; + } > ram +} + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/5249/Rules.make linux.2.5.40-ac2/arch/m68knommu/platform/5249/Rules.make --- linux.2.5.40/arch/m68knommu/platform/5249/Rules.make 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/5249/Rules.make 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,36 @@ +# +# 5249/Makefile +# +# This file is included by the global makefile so that you can add your own +# platform-specific flags and dependencies. +# +# This file is subject to the terms and conditions of the GNU General Public +# License. See the file "COPYING" in the main directory of this archive +# for more details. +# +# Copyright (C) 1999-2002 Greg Ungerer (gerg@snapgear.com) +# Copyright (C) 1998,1999 D. Jeff Dionne +# Copyright (C) 1998 Kenneth Albanowski +# Copyright (C) 1994 by Hamish Macdonald +# Copyright (C) 2000 Lineo Inc. (www.lineo.com) + +GCC_DIR = $(shell $(CC) -v 2>&1 | grep specs | sed -e 's/.* \(.*\)specs/\1\./') + +INCGCC = $(GCC_DIR)/include +LIBGCC = $(GCC_DIR)/m5200/libgcc.a + +CFLAGS := -fno-builtin -nostdinc $(CFLAGS) -I$(INCGCC) -pipe -DCONFIG_NO_MMU -DNO_FPU -m5200 -Wa,-S -Wa,-m5200 -D__ELF__ -DUTS_SYSNAME=\"uClinux\" -D__linux__ +AFLAGS := $(CFLAGS) + +LDFLAGS_vmlinux = -T arch/$(ARCH)/platform/$(PLATFORM)/$(BOARD)/$(MODEL).ld + +HEAD := arch/$(ARCH)/platform/$(PLATFORM)/$(BOARD)/crt0_$(MODEL).o + +SUBDIRS := arch/$(ARCH)/kernel arch/$(ARCH)/mm arch/$(ARCH)/lib \ + arch/$(ARCH)/platform/$(PLATFORM) $(SUBDIRS) +CORE_FILES := arch/$(ARCH)/kernel/kernel.o arch/$(ARCH)/mm/mm.o \ + arch/$(ARCH)/platform/$(PLATFORM)/platform.o $(CORE_FILES) +LIBS += arch/$(ARCH)/lib/lib.a $(LIBGCC) + +MAKEBOOT = $(MAKE) -C arch/$(ARCH)/boot + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/5272/config.c linux.2.5.40-ac2/arch/m68knommu/platform/5272/config.c --- linux.2.5.40/arch/m68knommu/platform/5272/config.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/5272/config.c 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,314 @@ +/***************************************************************************/ + +/* + * linux/arch/m68knommu/platform/5272/config.c + * + * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com) + * Copyright (C) 2001-2002, SnapGear Inc. (www.snapgear.com) + */ + +/***************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/***************************************************************************/ + +void reset_setupbutton(void); + +/***************************************************************************/ + +/* + * DMA channel base address table. + */ +unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = { + MCF_MBAR + MCFDMA_BASE0, +}; + +unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS]; + +/***************************************************************************/ + +void coldfire_tick(void) +{ + volatile unsigned char *timerp; + + /* Reset the ColdFire timer */ + timerp = (volatile unsigned char *) (MCF_MBAR + MCFTIMER_BASE4); + timerp[MCFTIMER_TER] = MCFTIMER_TER_CAP | MCFTIMER_TER_REF; +} + +/***************************************************************************/ + +void coldfire_timer_init(void (*handler)(int, void *, struct pt_regs *)) +{ + volatile unsigned short *timerp; + volatile unsigned long *icrp; + + /* Set up TIMER 4 as poll clock */ + timerp = (volatile unsigned short *) (MCF_MBAR + MCFTIMER_BASE4); + timerp[MCFTIMER_TMR] = MCFTIMER_TMR_DISABLE; + + timerp[MCFTIMER_TRR] = (unsigned short) ((MCF_CLK / 16) / HZ); + timerp[MCFTIMER_TMR] = MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 | + MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE; + + icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR1); + *icrp = 0x0000000d; /* TMR4 with priority 5 */ + request_irq(72, handler, SA_INTERRUPT, "ColdFire Timer", NULL); + +#ifdef CONFIG_RESETSWITCH + /* This is not really the right place to do this... */ + reset_setupbutton(); +#endif +} + +/***************************************************************************/ + +/* + * Program the vector to be an auto-vectored. + */ + +void mcf_autovector(unsigned int vec) +{ + /* Everything is auto-vectored on the 5272 */ +} + +/***************************************************************************/ + +extern e_vector *_ramvec; + +void set_evector(int vecnum, void (*handler)(void)) +{ + if (vecnum >= 0 && vecnum <= 255) + _ramvec[vecnum] = handler; +} + +/***************************************************************************/ + +/* assembler routines */ +asmlinkage void buserr(void); +asmlinkage void trap(void); +asmlinkage void system_call(void); +asmlinkage void inthandler(void); + +void coldfire_trap_init(void) +{ + int i; + +#ifndef ENABLE_dBUG + volatile unsigned long *icrp; + + icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR1); + icrp[0] = 0x88888888; + icrp[1] = 0x88888888; + icrp[2] = 0x88888888; + icrp[3] = 0x88888888; +#endif + + /* + * There is a common trap handler and common interrupt + * handler that handle almost every vector. We treat + * the system call and bus error special, they get their + * own first level handlers. + */ +#ifndef ENABLE_dBUG + for (i = 3; (i <= 23); i++) + _ramvec[i] = trap; + for (i = 33; (i <= 63); i++) + _ramvec[i] = trap; +#endif + + for (i = 24; (i <= 30); i++) + _ramvec[i] = inthandler; +#ifndef ENABLE_dBUG + _ramvec[31] = inthandler; // Disables the IRQ7 button +#endif + + for (i = 64; (i < 255); i++) + _ramvec[i] = inthandler; + _ramvec[255] = 0; + + _ramvec[2] = buserr; + _ramvec[32] = system_call; +} + +/***************************************************************************/ + +/* + * Generic dumping code. Used for panic and debug. + */ + +void dump(struct pt_regs *fp) +{ + extern unsigned int sw_usp, sw_ksp; + unsigned long *sp; + unsigned char *tp; + int i; + + printk("\nCURRENT PROCESS:\n\n"); + printk("COMM=%s PID=%d\n", current->comm, current->pid); + + if (current->mm) { + printk("TEXT=%08x-%08x DATA=%08x-%08x BSS=%08x-%08x\n", + (int) current->mm->start_code, + (int) current->mm->end_code, + (int) current->mm->start_data, + (int) current->mm->end_data, + (int) current->mm->end_data, + (int) current->mm->brk); + printk("USER-STACK=%08x KERNEL-STACK=%08x\n\n", + (int) current->mm->start_stack, + (int)(((unsigned long) current) + KTHREAD_SIZE)); + } + + printk("PC: %08lx\n", fp->pc); + printk("SR: %08lx SP: %08lx\n", (long) fp->sr, (long) fp); + printk("d0: %08lx d1: %08lx d2: %08lx d3: %08lx\n", + fp->d0, fp->d1, fp->d2, fp->d3); + printk("d4: %08lx d5: %08lx a0: %08lx a1: %08lx\n", + fp->d4, fp->d5, fp->a0, fp->a1); + printk("\nUSP: %08x KSP: %08x TRAPFRAME: %08x\n", + sw_usp, sw_ksp, (unsigned int) fp); + + printk("\nCODE:"); + tp = ((unsigned char *) fp->pc) - 0x20; + for (sp = (unsigned long *) tp, i = 0; (i < 0x40); i += 4) { + if ((i % 0x10) == 0) + printk("\n%08x: ", (int) (tp + i)); + printk("%08x ", (int) *sp++); + } + printk("\n"); + + printk("\nKERNEL STACK:"); + tp = ((unsigned char *) fp) - 0x40; + for (sp = (unsigned long *) tp, i = 0; (i < 0xc0); i += 4) { + if ((i % 0x10) == 0) + printk("\n%08x: ", (int) (tp + i)); + printk("%08x ", (int) *sp++); + } + printk("\n"); + printk("\n"); + + printk("\nUSER STACK:"); + tp = (unsigned char *) (sw_usp - 0x10); + for (sp = (unsigned long *) tp, i = 0; (i < 0x80); i += 4) { + if ((i % 0x10) == 0) + printk("\n%08x: ", (int) (tp + i)); + printk("%08x ", (int) *sp++); + } + printk("\n\n"); +} + +/***************************************************************************/ + +void coldfire_reset(void) +{ + HARD_RESET_NOW(); +} + +/***************************************************************************/ + +void config_BSP(char *commandp, int size) +{ +#if 0 + volatile unsigned long *pivrp; + + /* Set base of device vectors to be 64 */ + pivrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_PIVR); + *pivrp = 0x40; +#endif + +#if defined(CONFIG_NETtel) || defined(CONFIG_eLIA) || \ + defined(CONFIG_DISKtel) || defined(CONFIG_SECUREEDGEMP3) + /* Copy command line from FLASH to local buffer... */ + memcpy(commandp, (char *) 0xf0004000, size); + commandp[size-1] = 0; +#elif defined(CONFIG_MTD_KeyTechnology) + /* Copy command line from FLASH to local buffer... */ + memcpy(commandp, (char *) 0xffe06000, size); + commandp[size-1] = 0; +#else + memset(commandp, 0, size); +#endif + + mach_sched_init = coldfire_timer_init; + mach_tick = coldfire_tick; + mach_trap_init = coldfire_trap_init; + mach_reset = coldfire_reset; +} + +/***************************************************************************/ +#ifdef CONFIG_RESETSWITCH +/***************************************************************************/ + +/* + * Routines to support the NETtel software reset button. + */ +void reset_button(int irq, void *dev_id, struct pt_regs *regs) +{ + volatile unsigned long *icrp, *isrp; + extern void flash_eraseconfig(void); + static int inbutton = 0; + + /* + * IRQ7 is not maskable by the CPU core. It is possible + * that switch bounce mey get us back here before we have + * really serviced the interrupt. + */ + if (inbutton) + return; + inbutton = 1; + + /* Disable interrupt at SIM - best we can do... */ + icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR1); + *icrp = (*icrp & 0x07777777) | 0x80000000; + + /* Try and de-bounce the switch a little... */ + udelay(10000); + + flash_eraseconfig(); + + /* Don't leave here 'till button is no longer pushed! */ + isrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ISR); + for (;;) { + if (*isrp & 0x80000000) + break; + } + + HARD_RESET_NOW(); + /* Should never get here... */ + + inbutton = 0; + /* Interrupt service done, acknowledge it */ + icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR1); + *icrp = (*icrp & 0x07777777) | 0xf0000000; +} + +/***************************************************************************/ + +void reset_setupbutton(void) +{ + volatile unsigned long *icrp; + + icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR1); + *icrp = (*icrp & 0x07777777) | 0xf0000000; + request_irq(65, reset_button, (SA_INTERRUPT | IRQ_FLG_FAST), + "Reset Button", NULL); +} + +/***************************************************************************/ +#endif /* CONFIG_RESETSWITCH */ +/***************************************************************************/ diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/5272/Makefile linux.2.5.40-ac2/arch/m68knommu/platform/5272/Makefile --- linux.2.5.40/arch/m68knommu/platform/5272/Makefile 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/5272/Makefile 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,49 @@ +# +# Makefile for the linux kernel. +# +# Note! Dependencies are done automagically by 'make dep', which also +# removes any old dependencies. DON'T put your own dependencies here +# unless it's something special (ie not a .c file). +# + +# +# re-use any 5307/coldfire files that we can. Perhaps we should create +# a coldfire directory for shared files ? +# + +VPATH := $(VPATH):../5307 + +ifdef CONFIG_FULLDEBUG + AFLAGS += -DDEBUGGER_COMPATIBLE_CACHE=1 +endif + +# +# +# If you want to play with the HW breakpoints then you will +# need to add define this, which will give you a stack backtrace +# on the console port whenever a DBG interrupt occurs. You have to +# set up you HW breakpoints to trigger a DBG interrupt: +# +# AFLAGS += -DTRAP_DBG_INTERRUPT +# EXTRA_CFLAGS += -DTRAP_DBG_INTERRUPT +# + +AFLAGS += -D__ASSEMBLY__ -I. + +all: $(BOARD)/crt0_$(MODEL).o entry.o platform.o +O_TARGET := platform.o +obj-y := entry.o config.o signal.o ints.o + +$(BOARD)/crt0_$(MODEL).o: $(BOARD)/crt0_$(MODEL).S + +entry.o: entry.S m68k_defs.h + +m68k_defs.h: ../../kernel/m68k_defs.c ../../kernel/m68k_defs.head + rm -f m68k_defs.d + $(CC) $(filter-out -MD,$(CFLAGS)) -S ../../kernel/m68k_defs.c + cp ../../kernel/m68k_defs.head m68k_defs.h + grep '^#define' m68k_defs.s >> m68k_defs.h + rm m68k_defs.s +-include m68k_defs.d + +include $(TOPDIR)/Rules.make diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/5272/MOTOROLA/crt0_ram.S linux.2.5.40-ac2/arch/m68knommu/platform/5272/MOTOROLA/crt0_ram.S --- linux.2.5.40/arch/m68knommu/platform/5272/MOTOROLA/crt0_ram.S 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/5272/MOTOROLA/crt0_ram.S 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,152 @@ +/*****************************************************************************/ + +/* + * crt0_ram.S -- startup code for MCF5272 ColdFire based MOTOROLA boards. + * + * (C) Copyright 1999-2002, Greg Ungerer (gerg@snapgear.com). + * (C) Copyright 2000, Lineo (www.lineo.com). + */ + +/*****************************************************************************/ + +#include +#include +#include +#include +#include +#include + +/*****************************************************************************/ + +/* + * Motorola M5272C3 ColdFire eval board, chip select and memory setup. + */ + +#define MEM_BASE 0x00000000 /* Memory base at address 0 */ +#define VBR_BASE MEM_BASE /* Vector address */ + +#if defined(CONFIG_RAM16MB) +#define MEM_SIZE 0x01000000 /* Memory size 16Mb */ +#elif defined(CONFIG_RAM8MB) +#define MEM_SIZE 0x00800000 /* Memory size 8Mb */ +#else +#define MEM_SIZE 0x00400000 /* Memory size 4Mb */ +#endif + +/*****************************************************************************/ + +.global _start +.global _rambase +.global _ramvec +.global _ramstart +.global _ramend + +/*****************************************************************************/ + +.data + +/* + * Set up the usable of RAM stuff. Size of RAM is determined then + * an initial stack set up at the end. + */ +_rambase: +.long 0 +_ramvec: +.long 0 +_ramstart: +.long 0 +_ramend: +.long 0 + +/*****************************************************************************/ + +.text + +/* + * This is the codes first entry point. This is where it all + * begins... + */ + +_start: + nop /* Filler */ + move.w #0x2700, %sr /* No interrupts */ + + /* + * Setup VBR here, otherwise buserror remap will not work. + * if dBug was active before (on my SBC with dBug 1.1 of Dec 16 1996) + * + * bkr@cut.de 19990306 + * + * Note: this is because dBUG points VBR to ROM, making vectors read + * only, so the bus trap can't be changed. (RS) + */ + move.l #VBR_BASE, %a7 /* Note VBR can't be read */ + movec %a7, %VBR + move.l %a7, _ramvec /* Set up vector addr */ + move.l %a7, _rambase /* Set up base RAM addr */ + + + /* + * Set memory size. + */ + move.l #MEM_SIZE, %a0 + + move.l %a0, %d0 /* Mem end addr is in a0 */ + move.l %d0, %sp /* Set up initial stack ptr */ + move.l %d0, _ramend /* Set end ram addr */ + + /* + * Enable CPU internal cache. + */ + move.l #0x01000000, %d0 /* Invalidate cache cmd */ + movec %d0, %CACR /* Invalidate cache */ + move.l #0x80000100, %d0 /* Setup cache mask */ + movec %d0, %CACR /* Enable cache */ + + /* + * Move ROM filesystem above bss :-) + */ + lea.l _sbss, %a0 /* Get start of bss */ + lea.l _ebss, %a1 /* Set up destination */ + move.l %a0, %a2 /* Copy of bss start */ + + move.l 8(%a0), %d0 /* Get size of ROMFS */ + addq.l #8, %d0 /* Allow for rounding */ + and.l #0xfffffffc, %d0 /* Whole words */ + + add.l %d0, %a0 /* Copy from end */ + add.l %d0, %a1 /* Copy from end */ + move.l %a1, _ramstart /* Set start of ram */ + +_copy_romfs: + move.l -(%a0), %d0 /* Copy dword */ + move.l %d0, -(%a1) + cmp.l %a0, %a2 /* Check if at end */ + bne _copy_romfs + + /* + * Zero out the bss region. + */ + lea.l _sbss, %a0 /* Get start of bss */ + lea.l _ebss, %a1 /* Get end of bss */ + clr.l %d0 /* Set value */ +_clear_bss: + move.l %d0, (%a0)+ /* Clear each word */ + cmp.l %a0, %a1 /* Check if at end */ + bne _clear_bss + + /* + * Load the current thread pointer and stack. + */ + lea init_thread_union, %a0 + lea 0x2000(%a0), %sp + + /* + * Assember start up done, start code proper. + */ + jsr start_kernel /* Start Linux kernel */ + +_exit: + jmp _exit /* Should never get here */ + +/*****************************************************************************/ diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/5272/MOTOROLA/ram.ld linux.2.5.40-ac2/arch/m68knommu/platform/5272/MOTOROLA/ram.ld --- linux.2.5.40/arch/m68knommu/platform/5272/MOTOROLA/ram.ld 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/5272/MOTOROLA/ram.ld 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,76 @@ + +MEMORY { + ram : ORIGIN = 0x20000, LENGTH = 0x3e0000 +} + +jiffies = jiffies_64 + 4; + +SECTIONS { + + .text : { + _stext = . ; + *(.text) + *(.text.exit) + *(.text.lock) + *(.exitcall.exit) + *(.rodata) + *(.modinfo) + . = ALIGN(0x4) ; + *(.kstrtab) + . = ALIGN(16); /* Exception table */ + __start___ex_table = .; + *(__ex_table) + __stop___ex_table = .; + + __start___ksymtab = .; /* Kernel symbol table */ + *(__ksymtab) + __stop___ksymtab = .; + . = ALIGN(4) ; + _etext = . ; + } > ram + + .data BLOCK(0x4) : { + . = ALIGN(4); + _sdata = . ; + __data_start = . ; + *(.data) + *(.data.exit) + . = ALIGN(8192) ; + *(.data.init_task) + . = ALIGN(8192) ; + _edata = . ; + } > ram + + .init BLOCK(4096) : { + . = ALIGN(4096); + __init_begin = .; + *(.text.init) + *(.data.init) + . = ALIGN(16); + __setup_start = .; + *(.setup.init) + __setup_end = .; + __initcall_start = .; + *(.initcall1.init) + *(.initcall2.init) + *(.initcall3.init) + *(.initcall4.init) + *(.initcall5.init) + *(.initcall6.init) + *(.initcall7.init) + __initcall_end = .; + . = ALIGN(4); + __init_end = .; + } > ram + + .bss BLOCK(0x4) : { + . = ALIGN(4); + _sbss = . ; + *(.bss) + *(COMMON) + . = ALIGN(4) ; + _ebss = . ; + _end = . ; + } > ram +} + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/5272/NETtel/crt0_ram.S linux.2.5.40-ac2/arch/m68knommu/platform/5272/NETtel/crt0_ram.S --- linux.2.5.40/arch/m68knommu/platform/5272/NETtel/crt0_ram.S 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/5272/NETtel/crt0_ram.S 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,188 @@ +/*****************************************************************************/ + +/* + * crt0_ram.S -- startup code for MCF5307 ColdFire based NETtel. + * + * (C) Copyright 1999-2002, Greg Ungerer (gerg@snapgear.com). + * Copyright (C) 2000 Lineo Inc. (www.lineo.com) + * + * 1999/02/24 Modified for the 5307 processor David W. Miller + */ + +/*****************************************************************************/ + +#include "linux/autoconf.h" +#include "asm/coldfire.h" +#include "asm/mcfsim.h" +#include "asm/nettel.h" + +/*****************************************************************************/ + +/* + * Lineo NETtel board memory setup. + */ +#define MEM_BASE 0x00000000 /* Memory base at address 0 */ +#define VBR_BASE MEM_BASE /* Vector address */ + +#if defined(CONFIG_RAM16MB) +#define MEM_SIZE 0x01000000 /* Memory size 16Mb */ +#elif defined(CONFIG_RAM8MB) +#define MEM_SIZE 0x00800000 /* Memory size 8Mb */ +#else +#define MEM_SIZE 0x00400000 /* Memory size 4Mb */ +#endif + +/*****************************************************************************/ + +.global _start +.global _rambase +.global _ramvec +.global _ramstart +.global _ramend + +/*****************************************************************************/ + +.data + +/* + * Set up the usable of RAM stuff. Size of RAM is determined then + * an initial stack set up at the end. + */ +_rambase: +.long 0 +_ramvec: +.long 0 +_ramstart: +.long 0 +_ramend: +.long 0 + +/*****************************************************************************/ + +/* + * The NETtel platform has some funky LEDs! + */ +.global ppdata +ppdata: +.short 0x0000 + +.global ledbank +ledbank: +.byte 0xff + +/*****************************************************************************/ + +.text + +/* + * This is the codes first entry point. This is where it all + * begins... + */ + +_start: + nop /* Filler */ + move.w #0x2700, %sr /* No interrupts */ + + /* + * Setup VBR here, otherwise buserror remap will not work. + * if dBug was active before (on my SBC with dBug 1.1 of Dec 16 1996) + * + * bkr@cut.de 19990306 + * + * Note: this is because dBUG points VBR to ROM, making vectors read + * only, so the bus trap can't be changed. (RS) + */ + move.l #VBR_BASE, %a7 /* Note VBR can't be read */ + movec %a7, %VBR + move.l %a7, _ramvec /* Set up vector addr */ + move.l %a7, _rambase /* Set up base RAM addr */ + + + /* + * Determine size of RAM, then set up initial stack. + */ + move.l #MEM_SIZE, %a0 + + move.l %a0, %d0 /* Mem end addr is in a0 */ + move.l %d0, %sp /* Set up initial stack ptr */ + move.l %d0, _ramend /* Set end ram addr */ + + /* + * Enable CPU internal cache. + */ + move.l #0x01000000, %d0 /* Invalidate cache cmd */ + movec %d0, %CACR /* Invalidate cache */ + move.l #0x80000100, %d0 /* Setup cache mask */ + movec %d0, %CACR /* Enable cache */ + nop + +#ifdef CONFIG_ROMFS_FROM_ROM + /* + * check for an in RAM romfs + */ + lea.l _sbss, %a0 /* Get start of bss */ + mov.l (%a0), %d0 + cmp.l #0x2d726f6d, %d0 /* check for "-rom" */ + bne use_xip_romfs + add.l #4, %a0 + mov.l (%a0), %d0 + cmp.l #0x3166732d, %d0 /* check for "1fs-" */ + bne use_xip_romfs +#endif + + /* + * Move ROM filesystem above bss :-) + */ + lea.l _sbss, %a0 /* Get start of bss */ + lea.l _ebss, %a1 /* Set up destination */ + move.l %a0, %a2 /* Copy of bss start */ + + move.l 8(%a0), %d0 /* Get size of ROMFS */ + addq.l #8, %d0 /* Allow for rounding */ + and.l #0xfffffffc, %d0 /* Whole words */ + + add.l %d0, %a0 /* Copy from end */ + add.l %d0, %a1 /* Copy from end */ + move.l %a1, _ramstart /* Set start of ram */ + +_copy_romfs: + move.l -(%a0), %d0 /* Copy dword */ + move.l %d0, -(%a1) + cmp.l %a0, %a2 /* Check if at end */ + bne _copy_romfs + +#ifdef CONFIG_ROMFS_FROM_ROM + bra done_romfs + use_xip_romfs: + lea.l _ebss, %a1 /* Set up destination */ + mov.l #0, (%a1) /* make sure we don't use an old RAM version */ + move.l %a1, _ramstart /* Set start of ram */ + done_romfs: +#endif + + /* + * Zero out the bss region. + */ + lea.l _sbss, %a0 /* Get start of bss */ + lea.l _ebss, %a1 /* Get end of bss */ + clr.l %d0 /* Set value */ +_clear_bss: + move.l %d0, (%a0)+ /* Clear each word */ + cmp.l %a0, %a1 /* Check if at end */ + bne _clear_bss + + /* + * load the current task pointer and stack + */ + lea init_thread_union, %a0 + lea 0x2000(%a0), %sp + + /* + * Assember start up done, start code proper. + */ + jsr start_kernel /* Start Linux kernel */ + +_exit: + jmp _exit /* Should never get here */ + +/*****************************************************************************/ diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/5272/NETtel/ram.ld linux.2.5.40-ac2/arch/m68knommu/platform/5272/NETtel/ram.ld --- linux.2.5.40/arch/m68knommu/platform/5272/NETtel/ram.ld 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/5272/NETtel/ram.ld 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,76 @@ + +MEMORY { + ram : ORIGIN = 0x400, LENGTH = 0x400000 +} + +jiffies = jiffies_64 + 4; + +SECTIONS { + + .text : { + _stext = . ; + *(.text) + *(.text.exit) + *(.text.lock) + *(.exitcall.exit) + *(.rodata) + *(.modinfo) + . = ALIGN(0x4) ; + *(.kstrtab) + . = ALIGN(16); /* Exception table */ + __start___ex_table = .; + *(__ex_table) + __stop___ex_table = .; + + __start___ksymtab = .; /* Kernel symbol table */ + *(__ksymtab) + __stop___ksymtab = .; + . = ALIGN(4) ; + _etext = . ; + } > ram + + .data BLOCK(0x4) : { + . = ALIGN(4); + _sdata = . ; + __data_start = . ; + *(.data) + *(.data.exit) + . = ALIGN(8192) ; + *(.data.init_task) + . = ALIGN(8192) ; + _edata = . ; + } > ram + + .init BLOCK(4096) : { + . = ALIGN(4096); + __init_begin = .; + *(.text.init) + *(.data.init) + . = ALIGN(16); + __setup_start = .; + *(.setup.init) + __setup_end = .; + __initcall_start = .; + *(.initcall1.init) + *(.initcall2.init) + *(.initcall3.init) + *(.initcall4.init) + *(.initcall5.init) + *(.initcall6.init) + *(.initcall7.init) + __initcall_end = .; + . = ALIGN(4); + __init_end = .; + } > ram + + .bss BLOCK(0x4) : { + . = ALIGN(4); + _sbss = . ; + *(.bss) + *(COMMON) + . = ALIGN(4) ; + _ebss = . ; + _end = . ; + } > ram +} + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/5272/Rules.make linux.2.5.40-ac2/arch/m68knommu/platform/5272/Rules.make --- linux.2.5.40/arch/m68knommu/platform/5272/Rules.make 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/5272/Rules.make 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,40 @@ +# +# 5272/Makefile +# +# This file is included by the global makefile so that you can add your own +# platform-specific flags and dependencies. +# +# This file is subject to the terms and conditions of the GNU General Public +# License. See the file "COPYING" in the main directory of this archive +# for more details. +# +# Copyright (C) 1999,2001 Greg Ungerer (gerg@snapgear.com) +# Copyright (C) 1998,1999 D. Jeff Dionne +# Copyright (C) 1998 Kenneth Albanowski +# Copyright (C) 1994 by Hamish Macdonald +# Copyright (C) 2000 Lineo Inc. (www.lineo.com) + +GCC_DIR = $(shell $(CC) -v 2>&1 | grep specs | sed -e 's/.* \(.*\)specs/\1\./') + +# Even though we're building for a 5272, we specify 5307 as our processor type. +# The 5307 instruction set is the same as the 5272 (divide unit & MAC) plus +# the 5272 instruction timings are closer to the 5307 than the other 5200 +# series processors (specifically the multiply and divide instructions which +# are all this option really alters). + +INCGCC = $(GCC_DIR)/include +LIBGCC = $(GCC_DIR)/m5307/libgcc.a + +CFLAGS := -fno-builtin -nostdinc $(CFLAGS) -I$(INCGCC) -pipe -DCONFIG_NO_MMU -DNO_FPU -m5307 -Wa,-S -Wa,-m5307 -D__ELF__ -DUTS_SYSNAME=\"uClinux\" -D__linux__ -O1 +AFLAGS := $(CFLAGS) + +LDFLAGS_vmlinux = -T arch/$(ARCH)/platform/$(PLATFORM)/$(BOARD)/$(MODEL).ld + +HEAD := arch/$(ARCH)/platform/$(PLATFORM)/$(BOARD)/crt0_$(MODEL).o + +SUBDIRS := arch/$(ARCH)/kernel arch/$(ARCH)/mm arch/$(ARCH)/lib \ + arch/$(ARCH)/platform/$(PLATFORM) $(SUBDIRS) +CORE_FILES := arch/$(ARCH)/kernel/kernel.o arch/$(ARCH)/mm/mm.o \ + arch/$(ARCH)/platform/$(PLATFORM)/platform.o $(CORE_FILES) +LIBS += arch/$(ARCH)/lib/lib.a $(LIBGCC) + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/5307/ARNEWSH/crt0_ram.S linux.2.5.40-ac2/arch/m68knommu/platform/5307/ARNEWSH/crt0_ram.S --- linux.2.5.40/arch/m68knommu/platform/5307/ARNEWSH/crt0_ram.S 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/5307/ARNEWSH/crt0_ram.S 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,159 @@ +/*****************************************************************************/ + +/* + * crt0_ram.S -- startup code for MCF5307 ColdFire Arnewsh board. + * + * (C) Copyright 1999-2002, Greg Ungerer (gerg@snapgear.com). + * Copyright (C) 2000 Lineo Inc. (www.lineo.com) + * + * 1999/02/24 Modified for the 5307 processor David W. Miller + */ + +/*****************************************************************************/ + +#include "linux/autoconf.h" +#include "asm/coldfire.h" +#include "asm/mcfsim.h" +#include "asm/nettel.h" + +/*****************************************************************************/ + +/* + * SnapGear/NETtel board memory setup. + */ +#define MEM_BASE 0x00000000 /* Memory base at address 0 */ +#define MEM_SIZE 0x00800000 /* Memory size 8Mb */ +#define VBR_BASE MEM_BASE /* Vector address */ + +/*****************************************************************************/ + +.global _start +.global _rambase +.global _ramvec +.global _ramstart +.global _ramend + +/*****************************************************************************/ + +.data + +/* + * Set up the usable of RAM stuff. Size of RAM is determined then + * an initial stack set up at the end. + */ +_rambase: +.long 0 +_ramvec: +.long 0 +_ramstart: +.long 0 +_ramend: +.long 0 + +/*****************************************************************************/ + +.text + +/* + * This is the codes first entry point. This is where it all + * begins... + */ + +_start: + nop /* Filler */ + move.w #0x2700, %sr /* No interrupts */ + + /* + * Setup VBR here, otherwise buserror remap will not work. + * if dBug was active before (on my SBC with dBug 1.1 of Dec 16 1996) + * + * bkr@cut.de 19990306 + * + * Note: this is because dBUG points VBR to ROM, making vectors read + * only, so the bus trap can't be changed. (RS) + */ + move.l #VBR_BASE, %a7 /* Note VBR can't be read */ + movec %a7, %VBR + move.l %a7, _ramvec /* Set up vector addr */ + move.l %a7, _rambase /* Set up base RAM addr */ + + + /* + * Determine size of RAM, then set up initial stack. + */ + move.l #MEM_SIZE, %a0 + + move.l %a0, %d0 /* Mem end addr is in a0 */ + move.l %d0, %sp /* Set up initial stack ptr */ + move.l %d0, _ramend /* Set end ram addr */ + + /* make region ROM cachable (turn off for flash programming?) */ + /* 0xff000000 - 0xffffffff */ +#ifdef DEBUGGER_COMPATIBLE_CACHE + movl #(0xff< ram + + .data BLOCK(0x4) : { + _sdata = . ; + __data_start = . ; + *(.data) + *(.data.exit) + . = ALIGN(0x2000) ; + *(.data.init_task) + . = ALIGN(0x2000) ; + _edata = . ; + } > ram + + .init BLOCK(4096) : { + __init_begin = .; + *(.text.init) + *(.data.init) + . = ALIGN(16); + __setup_start = .; + *(.setup.init) + __setup_end = .; + __initcall_start = .; + *(.initcall1.init) + *(.initcall2.init) + *(.initcall3.init) + *(.initcall4.init) + *(.initcall5.init) + *(.initcall6.init) + *(.initcall7.init) + __initcall_end = .; + . = ALIGN(4) ; + __init_end = .; + } > ram + + .bss BLOCK(0x4) : { + _sbss = . ; + *(.bss) + *(COMMON) + . = ALIGN(4) ; + _ebss = . ; + _end = . ; + } > ram +} + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/5307/bios32.c linux.2.5.40-ac2/arch/m68knommu/platform/5307/bios32.c --- linux.2.5.40/arch/m68knommu/platform/5307/bios32.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/5307/bios32.c 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,1174 @@ +/*****************************************************************************/ + +/* + * bios32.c -- PCI access code for embedded CO-MEM Lite PCI controller. + * + * (C) Copyright 1999-2002, Greg Ungerer (gerg@snapgear.com). + * (C) Copyright 2000, Lineo (www.lineo.com) + */ + +/*****************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#ifdef CONFIG_eLIA +#include +#endif + +/*****************************************************************************/ +#ifdef CONFIG_PCI +/*****************************************************************************/ + +/* + * Debug configuration defines. DEBUGRES sets debugging output for + * the resource allocation phase. DEBUGPCI traces on pcibios_ function + * calls, and DEBUGIO traces all accesses to devices on the PCI bus. + */ +/*#define DEBUGRES 1*/ +/*#define DEBUGPCI 1*/ +/*#define DEBUGIO 1*/ + +/*****************************************************************************/ + +/* + * PCI markers for bus present and active slots. + */ +int pci_bus_is_present = 0; +unsigned long pci_slotmask = 0; + +/* + * We may or may not need to swap the bytes of PCI bus tranfers. + * The endianess is re-roder automatically by the CO-MEM, but it + * will get the wrong byte order for a pure data stream. + */ +#define pci_byteswap 0 + + +/* + * Resource tracking. The CO-MEM part creates a virtual address + * space that all the PCI devices live in - it is not in any way + * directly mapped into the ColdFire address space. So we can + * really assign any resources we like to devices, as long as + * they do not clash with other PCI devices. + */ +unsigned int pci_iobase = 0x100; /* Arbitary start address */ +unsigned int pci_membase = 0x00010000; /* Arbitary start address */ + +#define PCI_MINIO 0x100 /* 256 byte minimum I/O */ +#define PCI_MINMEM 0x00010000 /* 64k minimum chunk */ + +/* + * The CO-MEM's shared memory segment is visible inside the PCI + * memory address space. We need to keep track of the address that + * this is mapped at, to setup the bus masters pointers. + */ +unsigned int pci_shmemaddr; + +/*****************************************************************************/ + +void pci_interrupt(int irq, void *id, struct pt_regs *fp); + +/*****************************************************************************/ + +/* + * Some platforms have custom ways of reseting the PCI bus. + */ + +void pci_resetbus(void) +{ +#ifdef CONFIG_eLIA + int i; + +#ifdef DEBUGPCI + printk("pci_resetbus()\n"); +#endif + + *((volatile unsigned short *) (MCF_MBAR+MCFSIM_PADDR)) |= eLIA_PCIRESET; + for (i = 0; (i < 1000); i++) { + *((volatile unsigned short *) (MCF_MBAR + MCFSIM_PADAT)) = + (ppdata | eLIA_PCIRESET); + } + + + *((volatile unsigned short *) (MCF_MBAR + MCFSIM_PADAT)) = ppdata; +#endif +} + +/*****************************************************************************/ + +int pcibios_assignres(int slot) +{ + volatile unsigned long *rp; + volatile unsigned char *ip; + unsigned int idsel, addr, val, align, i; + int bar; + +#ifdef DEBUGPCI + printk("pcibios_assignres(slot=%x)\n", slot); +#endif + + rp = (volatile unsigned long *) COMEM_BASE; + idsel = COMEM_DA_ADDR(0x1 << (slot + 16)); + + /* Try to assign resource to each BAR */ + for (bar = 0; (bar < 6); bar++) { + addr = COMEM_PCIBUS + PCI_BASE_ADDRESS_0 + (bar * 4); + rp[LREG(COMEM_DAHBASE)] = COMEM_DA_CFGRD | idsel; + val = rp[LREG(addr)]; +#ifdef DEBUGRES + printk("-----------------------------------" + "-------------------------------------\n"); + printk("BAR[%d]: read=%08x ", bar, val); +#endif + + rp[LREG(COMEM_DAHBASE)] = COMEM_DA_CFGWR | idsel; + rp[LREG(addr)] = 0xffffffff; + + rp[LREG(COMEM_DAHBASE)] = COMEM_DA_CFGRD | idsel; + val = rp[LREG(addr)]; +#ifdef DEBUGRES + printk("write=%08x ", val); +#endif + if (val == 0) { +#ifdef DEBUGRES + printk("\n"); +#endif + continue; + } + + /* Determine space required by BAR */ + /* FIXME: this should go backwords from 0x80000000... */ + for (i = 0; (i < 32); i++) { + if ((0x1 << i) & (val & 0xfffffffc)) + break; + } + +#ifdef DEBUGRES + printk("size=%08x(%d)\n", (0x1 << i), i); +#endif + i = 0x1 << i; + + /* Assign a resource */ + if (val & PCI_BASE_ADDRESS_SPACE_IO) { + if (i < PCI_MINIO) + i = PCI_MINIO; +#ifdef DEBUGRES + printk("BAR[%d]: IO size=%08x iobase=%08x\n", + bar, i, pci_iobase); +#endif + if (i > 0xffff) { + /* Invalid size?? */ + val = 0 | PCI_BASE_ADDRESS_SPACE_IO; +#ifdef DEBUGRES + printk("BAR[%d]: too big for IO??\n", bar); +#endif + } else { + /* Check for un-alignment */ + if ((align = pci_iobase % i)) + pci_iobase += (i - align); + val = pci_iobase | PCI_BASE_ADDRESS_SPACE_IO; + pci_iobase += i; + } + } else { + if (i < PCI_MINMEM) + i = PCI_MINMEM; +#ifdef DEBUGRES + printk("BAR[%d]: MEMORY size=%08x membase=%08x\n", + bar, i, pci_membase); +#endif + /* Check for un-alignment */ + if ((align = pci_membase % i)) + pci_membase += (i - align); + val = pci_membase | PCI_BASE_ADDRESS_SPACE_MEMORY; + pci_membase += i; + } + + /* Write resource back into BAR register */ + rp[LREG(COMEM_DAHBASE)] = COMEM_DA_CFGWR | idsel; + rp[LREG(addr)] = val; +#ifdef DEBUGRES + printk("BAR[%d]: assigned bar=%08x\n", bar, val); +#endif + } + +#ifdef DEBUGRES + printk("-----------------------------------" + "-------------------------------------\n"); +#endif + + /* Assign IRQ if one is wanted... */ + ip = (volatile unsigned char *) (COMEM_BASE + COMEM_PCIBUS); + rp[LREG(COMEM_DAHBASE)] = COMEM_DA_CFGRD | idsel; + + addr = (PCI_INTERRUPT_PIN & 0xfc) + (~PCI_INTERRUPT_PIN & 0x03); + if (ip[addr]) { + rp[LREG(COMEM_DAHBASE)] = COMEM_DA_CFGWR | idsel; + addr = (PCI_INTERRUPT_LINE & 0xfc)+(~PCI_INTERRUPT_LINE & 0x03); + ip[addr] = 25; +#ifdef DEBUGRES + printk("IRQ LINE=25\n"); +#endif + } + + return(0); +} + +/*****************************************************************************/ + +int pcibios_enable(int slot) +{ + volatile unsigned long *rp; + volatile unsigned short *wp; + unsigned int idsel, addr; + unsigned short cmd; + +#ifdef DEBUGPCI + printk("pcibios_enbale(slot=%x)\n", slot); +#endif + + rp = (volatile unsigned long *) COMEM_BASE; + wp = (volatile unsigned short *) COMEM_BASE; + idsel = COMEM_DA_ADDR(0x1 << (slot + 16)); + + /* Get current command settings */ + addr = COMEM_PCIBUS + PCI_COMMAND; + addr = (addr & ~0x3) + (~addr & 0x02); + rp[LREG(COMEM_DAHBASE)] = COMEM_DA_CFGRD | idsel; + cmd = wp[WREG(addr)]; + /*val = ((val & 0xff) << 8) | ((val >> 8) & 0xff);*/ + + /* Enable I/O and memory accesses to this device */ + rp[LREG(COMEM_DAHBASE)] = COMEM_DA_CFGWR | idsel; + cmd |= PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER; + wp[WREG(addr)] = cmd; + + return(0); +} + +/*****************************************************************************/ + +unsigned long pcibios_init(unsigned long mem_start, unsigned long mem_end) +{ + volatile unsigned long *rp; + unsigned long sel, id; + int slot; + +#ifdef DEBUGPCI + printk("pcibios_init()\n"); +#endif + + pci_resetbus(); + + /* + * Do some sort of basic check to see if the CO-MEM part + * is present... This works ok, but I think we really need + * something better... + */ + rp = (volatile unsigned long *) COMEM_BASE; + if ((rp[LREG(COMEM_LBUSCFG)] & 0xff) != 0x50) { + printk("PCI: no PCI bus present\n"); + return(mem_start); + } + +#ifdef COMEM_BRIDGEDEV + /* + * Setup the PCI bridge device first. It needs resources too, + * so that bus masters can get to its shared memory. + */ + slot = COMEM_BRIDGEDEV; + sel = COMEM_DA_CFGRD | COMEM_DA_ADDR(0x1 << (slot + 16)); + rp[LREG(COMEM_DAHBASE)] = sel; + rp[LREG(COMEM_PCIBUS)] = 0; /* Clear bus */ + id = rp[LREG(COMEM_PCIBUS)]; + if ((id == 0) || ((id & 0xffff0000) == (sel & 0xffff0000))) { + printk("PCI: no PCI bus bridge present\n"); + return(mem_start); + } + + printk("PCI: bridge device at slot=%d id=%08x\n", slot, (int) id); + pci_slotmask |= 0x1 << slot; + pci_shmemaddr = pci_membase; + pcibios_assignres(slot); + pcibios_enable(slot); +#endif + + pci_bus_is_present = 1; + + /* + * Do a quick scan of the PCI bus and see what is here. + */ + for (slot = COMEM_MINDEV; (slot <= COMEM_MAXDEV); slot++) { + sel = COMEM_DA_CFGRD | COMEM_DA_ADDR(0x1 << (slot + 16)); + rp[LREG(COMEM_DAHBASE)] = sel; + rp[LREG(COMEM_PCIBUS)] = 0; /* Clear bus */ + id = rp[LREG(COMEM_PCIBUS)]; + if ((id != 0) && ((id & 0xffff0000) != (sel & 0xffff0000))) { + printk("PCI: slot=%d id=%08x\n", slot, (int) id); + pci_slotmask |= 0x1 << slot; + pcibios_assignres(slot); + pcibios_enable(slot); + } + } + + /* Get PCI irq for local vectoring */ + if (request_irq(COMEM_IRQ, pci_interrupt, 0, "PCI bridge", NULL)) { + printk("PCI: failed to acquire interrupt %d\n", COMEM_IRQ); + } else { + mcf_autovector(COMEM_IRQ); + } + + return(mem_start); +} + +/*****************************************************************************/ + +unsigned long pcibios_fixup(unsigned long mem_start, unsigned long mem_end) +{ + return(mem_start); +} + +/*****************************************************************************/ + +int pcibios_present(void) +{ + return(pci_bus_is_present); +} + +/*****************************************************************************/ + +int pcibios_read_config_dword(unsigned char bus, unsigned char dev, + unsigned char offset, unsigned int *val) +{ + volatile unsigned long *rp; + unsigned long idsel, fnsel; + +#ifdef DEBUGPCI + printk("pcibios_read_config_dword(bus=%x,dev=%x,offset=%x,val=%x)\n", + bus, dev, offset, val); +#endif + + if (bus || ((pci_slotmask & (0x1 << PCI_SLOT(dev))) == 0)) { + *val = 0xffffffff; + return(PCIBIOS_SUCCESSFUL); + } + + rp = (volatile unsigned long *) COMEM_BASE; + idsel = COMEM_DA_CFGRD | COMEM_DA_ADDR(0x1 << ((dev >> 3) + 16)); + fnsel = (dev & 0x7) << 8; + + rp[LREG(COMEM_DAHBASE)] = idsel; + *val = rp[LREG(COMEM_PCIBUS + (offset & 0xfc) + fnsel)]; + +#if 1 + /* If we get back what we wrote, then nothing there */ + /* This is pretty dodgy, but, hey, what else do we do?? */ + if (!offset && (*val == ((idsel & 0xfffff000) | (offset & 0x00000fff)))) + *val = 0xffffffff; +#endif + + return(PCIBIOS_SUCCESSFUL); +} + +/*****************************************************************************/ + +int pcibios_read_config_word(unsigned char bus, unsigned char dev, + unsigned char offset, unsigned short *val) +{ + volatile unsigned long *rp; + volatile unsigned short *bp; + unsigned long idsel, fnsel; + unsigned char swapoffset; + +#ifdef DEBUGPCI + printk("pcibios_read_config_word(bus=%x,dev=%x,offset=%x)\n", + bus, dev, offset); +#endif + + if (bus || ((pci_slotmask & (0x1 << PCI_SLOT(dev))) == 0)) { + *val = 0xffff; + return(PCIBIOS_SUCCESSFUL); + } + + rp = (volatile unsigned long *) COMEM_BASE; + bp = (volatile unsigned short *) COMEM_BASE; + idsel = COMEM_DA_CFGRD | COMEM_DA_ADDR(0x1 << ((dev >> 3) + 16)); + fnsel = (dev & 0x7) << 8; + swapoffset = (offset & 0xfc) + (~offset & 0x02); + + rp[LREG(COMEM_DAHBASE)] = idsel; + *val = bp[WREG(COMEM_PCIBUS + swapoffset + fnsel)]; + + return(PCIBIOS_SUCCESSFUL); +} + +/*****************************************************************************/ + +int pcibios_read_config_byte(unsigned char bus, unsigned char dev, + unsigned char offset, unsigned char *val) +{ + volatile unsigned long *rp; + volatile unsigned char *bp; + unsigned long idsel, fnsel; + unsigned char swapoffset; + +#ifdef DEBUGPCI + printk("pcibios_read_config_byte(bus=%x,dev=%x,offset=%x)\n", + bus, dev, offset); +#endif + + if (bus || ((pci_slotmask & (0x1 << PCI_SLOT(dev))) == 0)) { + *val = 0xff; + return(PCIBIOS_SUCCESSFUL); + } + + rp = (volatile unsigned long *) COMEM_BASE; + bp = (volatile unsigned char *) COMEM_BASE; + idsel = COMEM_DA_CFGRD | COMEM_DA_ADDR(0x1 << ((dev >> 3) + 16)); + fnsel = (dev & 0x7) << 8; + swapoffset = (offset & 0xfc) + (~offset & 0x03); + + rp[LREG(COMEM_DAHBASE)] = idsel; + *val = bp[(COMEM_PCIBUS + swapoffset + fnsel)]; + + return(PCIBIOS_SUCCESSFUL); +} + +/*****************************************************************************/ + +int pcibios_write_config_dword(unsigned char bus, unsigned char dev, + unsigned char offset, unsigned int val) +{ + volatile unsigned long *rp; + unsigned long idsel, fnsel; + +#ifdef DEBUGPCI + printk("pcibios_write_config_dword(bus=%x,dev=%x,offset=%x,val=%x)\n", + bus, dev, offset, val); +#endif + + if (bus || ((pci_slotmask & (0x1 << PCI_SLOT(dev))) == 0)) + return(PCIBIOS_SUCCESSFUL); + + rp = (volatile unsigned long *) COMEM_BASE; + idsel = COMEM_DA_CFGRD | COMEM_DA_ADDR(0x1 << ((dev >> 3) + 16)); + fnsel = (dev & 0x7) << 8; + + rp[LREG(COMEM_DAHBASE)] = idsel; + rp[LREG(COMEM_PCIBUS + (offset & 0xfc) + fnsel)] = val; + return(PCIBIOS_SUCCESSFUL); +} + +/*****************************************************************************/ + +int pcibios_write_config_word(unsigned char bus, unsigned char dev, + unsigned char offset, unsigned short val) +{ + + volatile unsigned long *rp; + volatile unsigned short *bp; + unsigned long idsel, fnsel; + unsigned char swapoffset; + +#ifdef DEBUGPCI + printk("pcibios_write_config_word(bus=%x,dev=%x,offset=%x,val=%x)\n", + bus, dev, offset, val); +#endif + + if (bus || ((pci_slotmask & (0x1 << PCI_SLOT(dev))) == 0)) + return(PCIBIOS_SUCCESSFUL); + + rp = (volatile unsigned long *) COMEM_BASE; + bp = (volatile unsigned short *) COMEM_BASE; + idsel = COMEM_DA_CFGRD | COMEM_DA_ADDR(0x1 << ((dev >> 3) + 16)); + fnsel = (dev & 0x7) << 8; + swapoffset = (offset & 0xfc) + (~offset & 0x02); + + rp[LREG(COMEM_DAHBASE)] = idsel; + bp[WREG(COMEM_PCIBUS + swapoffset + fnsel)] = val; + return(PCIBIOS_SUCCESSFUL); +} + +/*****************************************************************************/ + +int pcibios_write_config_byte(unsigned char bus, unsigned char dev, + unsigned char offset, unsigned char val) +{ + volatile unsigned long *rp; + volatile unsigned char *bp; + unsigned long idsel, fnsel; + unsigned char swapoffset; + +#ifdef DEBUGPCI + printk("pcibios_write_config_byte(bus=%x,dev=%x,offset=%x,val=%x)\n", + bus, dev, offset, val); +#endif + + if (bus || ((pci_slotmask & (0x1 << PCI_SLOT(dev))) == 0)) + return(PCIBIOS_SUCCESSFUL); + + rp = (volatile unsigned long *) COMEM_BASE; + bp = (volatile unsigned char *) COMEM_BASE; + idsel = COMEM_DA_CFGRD | COMEM_DA_ADDR(0x1 << ((dev >> 3) + 16)); + fnsel = (dev & 0x7) << 8; + swapoffset = (offset & 0xfc) + (~offset & 0x03); + + rp[LREG(COMEM_DAHBASE)] = idsel; + bp[(COMEM_PCIBUS + swapoffset + fnsel)] = val; + return(PCIBIOS_SUCCESSFUL); +} + +/*****************************************************************************/ + +int pcibios_find_device(unsigned short vendor, unsigned short devid, + unsigned short index, unsigned char *bus, unsigned char *dev) +{ + unsigned int vendev, val; + unsigned char devnr; + +#ifdef DEBUGPCI + printk("pcibios_find_device(vendor=%04x,devid=%04x,index=%d)\n", + vendor, devid, index); +#endif + + if (vendor == 0xffff) + return(PCIBIOS_BAD_VENDOR_ID); + + vendev = (devid << 16) | vendor; + for (devnr = 0; (devnr < 32); devnr++) { + pcibios_read_config_dword(0, devnr, PCI_VENDOR_ID, &val); + if (vendev == val) { + if (index-- == 0) { + *bus = 0; + *dev = devnr; + return(PCIBIOS_SUCCESSFUL); + } + } + } + + return(PCIBIOS_DEVICE_NOT_FOUND); +} + +/*****************************************************************************/ + +int pcibios_find_class(unsigned int class, unsigned short index, + unsigned char *bus, unsigned char *dev) +{ + unsigned int val; + unsigned char devnr; + +#ifdef DEBUGPCI + printk("pcibios_find_class(class=%04x,index=%d)\n", class, index); +#endif + + /* FIXME: this ignores multi-function devices... */ + for (devnr = 0; (devnr < 128); devnr += 8) { + pcibios_read_config_dword(0, devnr, PCI_CLASS_REVISION, &val); + if ((val >> 8) == class) { + if (index-- == 0) { + *bus = 0; + *dev = devnr; + return(PCIBIOS_SUCCESSFUL); + } + } + } + + return(PCIBIOS_DEVICE_NOT_FOUND); +} + +/*****************************************************************************/ + +/* + * Local routines to interrcept the standard I/O and vector handling + * code. Don't include this 'till now - initialization code above needs + * access to the real code too. + */ +#include + +/*****************************************************************************/ + +void pci_outb(unsigned char val, unsigned int addr) +{ + volatile unsigned long *rp; + volatile unsigned char *bp; + +#ifdef DEBUGIO + printk("pci_outb(val=%02x,addr=%x)\n", val, addr); +#endif + + rp = (volatile unsigned long *) COMEM_BASE; + bp = (volatile unsigned char *) COMEM_BASE; + rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IOWR | COMEM_DA_ADDR(addr); + addr = (addr & ~0x3) + (~addr & 0x03); + bp[(COMEM_PCIBUS + COMEM_DA_OFFSET(addr))] = val; +} + +/*****************************************************************************/ + +void pci_outw(unsigned short val, unsigned int addr) +{ + volatile unsigned long *rp; + volatile unsigned short *sp; + +#ifdef DEBUGIO + printk("pci_outw(val=%04x,addr=%x)", val, addr); +#endif + + rp = (volatile unsigned long *) COMEM_BASE; + sp = (volatile unsigned short *) COMEM_BASE; + rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IOWR | COMEM_DA_ADDR(addr); + addr = (addr & ~0x3) + (~addr & 0x02); + if (pci_byteswap) + val = ((val & 0xff) << 8) | ((val >> 8) & 0xff); + sp[WREG(COMEM_PCIBUS + COMEM_DA_OFFSET(addr))] = val; +} + +/*****************************************************************************/ + +void pci_outl(unsigned int val, unsigned int addr) +{ + volatile unsigned long *rp; + volatile unsigned int *lp; + +#ifdef DEBUGIO + printk("pci_outl(val=%08x,addr=%x)\n", val, addr); +#endif + + rp = (volatile unsigned long *) COMEM_BASE; + lp = (volatile unsigned int *) COMEM_BASE; + rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IOWR | COMEM_DA_ADDR(addr); + + if (pci_byteswap) + val = (val << 24) | ((val & 0x0000ff00) << 8) | + ((val & 0x00ff0000) >> 8) | (val >> 24); + + lp[LREG(COMEM_PCIBUS + COMEM_DA_OFFSET(addr))] = val; +} + +/*****************************************************************************/ + +unsigned long pci_blmask[] = { + 0x000000e0, + 0x000000d0, + 0x000000b0, + 0x00000070 +}; + +unsigned char pci_inb(unsigned int addr) +{ + volatile unsigned long *rp; + volatile unsigned char *bp; + unsigned long r; + unsigned char val; + +#ifdef DEBUGIO + printk("pci_inb(addr=%x)", addr); +#endif + + rp = (volatile unsigned long *) COMEM_BASE; + bp = (volatile unsigned char *) COMEM_BASE; + + r = COMEM_DA_IORD | COMEM_DA_ADDR(addr) | pci_blmask[(addr & 0x3)]; + rp[LREG(COMEM_DAHBASE)] = r; + + addr = (addr & ~0x3) + (~addr & 0x3); + val = bp[(COMEM_PCIBUS + COMEM_DA_OFFSET(addr))]; + return(val); +} + +/*****************************************************************************/ + +unsigned long pci_bwmask[] = { + 0x000000c0, + 0x000000c0, + 0x00000030, + 0x00000030 +}; + +unsigned short pci_inw(unsigned int addr) +{ + volatile unsigned long *rp; + volatile unsigned short *sp; + unsigned long r; + unsigned short val; + +#ifdef DEBUGIO + printk("pci_inw(addr=%x)", addr); +#endif + + rp = (volatile unsigned long *) COMEM_BASE; + r = COMEM_DA_IORD | COMEM_DA_ADDR(addr) | pci_bwmask[(addr & 0x3)]; + rp[LREG(COMEM_DAHBASE)] = r; + + sp = (volatile unsigned short *) COMEM_BASE; + addr = (addr & ~0x3) + (~addr & 0x02); + val = sp[WREG(COMEM_PCIBUS + COMEM_DA_OFFSET(addr))]; + if (pci_byteswap) + val = ((val & 0xff) << 8) | ((val >> 8) & 0xff); +#ifdef DEBUGIO + printk("=%04x\n", val); +#endif + return(val); +} + +/*****************************************************************************/ + +unsigned int pci_inl(unsigned int addr) +{ + volatile unsigned long *rp; + volatile unsigned int *lp; + unsigned int val; + +#ifdef DEBUGIO + printk("pci_inl(addr=%x)", addr); +#endif + + rp = (volatile unsigned long *) COMEM_BASE; + lp = (volatile unsigned int *) COMEM_BASE; + rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IORD | COMEM_DA_ADDR(addr); + val = lp[LREG(COMEM_PCIBUS + COMEM_DA_OFFSET(addr))]; + + if (pci_byteswap) + val = (val << 24) | ((val & 0x0000ff00) << 8) | + ((val & 0x00ff0000) >> 8) | (val >> 24); + +#ifdef DEBUGIO + printk("=%08x\n", val); +#endif + return(val); +} + +/*****************************************************************************/ + +void pci_outsb(void *addr, void *buf, int len) +{ + volatile unsigned long *rp; + volatile unsigned char *bp; + unsigned char *dp = (unsigned char *) buf; + unsigned int a = (unsigned int) addr; + +#ifdef DEBUGIO + printk("pci_outsb(addr=%x,buf=%x,len=%d)\n", (int)addr, (int)buf, len); +#endif + + rp = (volatile unsigned long *) COMEM_BASE; + rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IOWR | COMEM_DA_ADDR(a); + + a = (a & ~0x3) + (~a & 0x03); + bp = (volatile unsigned char *) + (COMEM_BASE + COMEM_PCIBUS + COMEM_DA_OFFSET(a)); + + while (len--) + *bp = *dp++; +} + +/*****************************************************************************/ + +void pci_outsw(void *addr, void *buf, int len) +{ + volatile unsigned long *rp; + volatile unsigned short *wp; + unsigned short w, *dp = (unsigned short *) buf; + unsigned int a = (unsigned int) addr; + +#ifdef DEBUGIO + printk("pci_outsw(addr=%x,buf=%x,len=%d)\n", (int)addr, (int)buf, len); +#endif + + rp = (volatile unsigned long *) COMEM_BASE; + rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IOWR | COMEM_DA_ADDR(a); + + a = (a & ~0x3) + (~a & 0x2); + wp = (volatile unsigned short *) + (COMEM_BASE + COMEM_PCIBUS + COMEM_DA_OFFSET(a)); + + while (len--) { + w = *dp++; + if (pci_byteswap) + w = ((w & 0xff) << 8) | ((w >> 8) & 0xff); + *wp = w; + } +} + +/*****************************************************************************/ + +void pci_outsl(void *addr, void *buf, int len) +{ + volatile unsigned long *rp; + volatile unsigned long *lp; + unsigned long l, *dp = (unsigned long *) buf; + unsigned int a = (unsigned int) addr; + +#ifdef DEBUGIO + printk("pci_outsl(addr=%x,buf=%x,len=%d)\n", (int)addr, (int)buf, len); +#endif + + rp = (volatile unsigned long *) COMEM_BASE; + rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IOWR | COMEM_DA_ADDR(a); + + lp = (volatile unsigned long *) + (COMEM_BASE + COMEM_PCIBUS + COMEM_DA_OFFSET(a)); + + while (len--) { + l = *dp++; + if (pci_byteswap) + l = (l << 24) | ((l & 0x0000ff00) << 8) | + ((l & 0x00ff0000) >> 8) | (l >> 24); + *lp = l; + } +} + +/*****************************************************************************/ + +void pci_insb(void *addr, void *buf, int len) +{ + volatile unsigned long *rp; + volatile unsigned char *bp; + unsigned char *dp = (unsigned char *) buf; + unsigned int a = (unsigned int) addr; + +#ifdef DEBUGIO + printk("pci_insb(addr=%x,buf=%x,len=%d)\n", (int)addr, (int)buf, len); +#endif + + rp = (volatile unsigned long *) COMEM_BASE; + rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IORD | COMEM_DA_ADDR(a); + + a = (a & ~0x3) + (~a & 0x03); + bp = (volatile unsigned char *) + (COMEM_BASE + COMEM_PCIBUS + COMEM_DA_OFFSET(a)); + + while (len--) + *dp++ = *bp; +} + +/*****************************************************************************/ + +void pci_insw(void *addr, void *buf, int len) +{ + volatile unsigned long *rp; + volatile unsigned short *wp; + unsigned short w, *dp = (unsigned short *) buf; + unsigned int a = (unsigned int) addr; + +#ifdef DEBUGIO + printk("pci_insw(addr=%x,buf=%x,len=%d)\n", (int)addr, (int)buf, len); +#endif + + rp = (volatile unsigned long *) COMEM_BASE; + rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IORD | COMEM_DA_ADDR(a); + + a = (a & ~0x3) + (~a & 0x2); + wp = (volatile unsigned short *) + (COMEM_BASE + COMEM_PCIBUS + COMEM_DA_OFFSET(a)); + + while (len--) { + w = *wp; + if (pci_byteswap) + w = ((w & 0xff) << 8) | ((w >> 8) & 0xff); + *dp++ = w; + } +} + +/*****************************************************************************/ + +void pci_insl(void *addr, void *buf, int len) +{ + volatile unsigned long *rp; + volatile unsigned long *lp; + unsigned long l, *dp = (unsigned long *) buf; + unsigned int a = (unsigned int) addr; + +#ifdef DEBUGIO + printk("pci_insl(addr=%x,buf=%x,len=%d)\n", (int)addr, (int)buf, len); +#endif + + rp = (volatile unsigned long *) COMEM_BASE; + rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IORD | COMEM_DA_ADDR(a); + + lp = (volatile unsigned long *) + (COMEM_BASE + COMEM_PCIBUS + COMEM_DA_OFFSET(a)); + + while (len--) { + l = *lp; + if (pci_byteswap) + l = (l << 24) | ((l & 0x0000ff00) << 8) | + ((l & 0x00ff0000) >> 8) | (l >> 24); + *dp++ = l; + } +} + +/*****************************************************************************/ + +struct pci_localirqlist { + void (*handler)(int, void *, struct pt_regs *); + const char *device; + void *dev_id; +}; + +struct pci_localirqlist pci_irqlist[COMEM_MAXPCI]; + +/*****************************************************************************/ + +int pci_request_irq(unsigned int irq, + void (*handler)(int, void *, struct pt_regs *), + unsigned long flags, const char *device, void *dev_id) +{ + int i; + +#ifdef DEBUGIO + printk("pci_request_irq(irq=%d,handler=%x,flags=%x,device=%s," + "dev_id=%x)\n", irq, (int) handler, (int) flags, device, + (int) dev_id); +#endif + + /* Check if this interrupt handler is already lodged */ + for (i = 0; (i < COMEM_MAXPCI); i++) { + if (pci_irqlist[i].handler == handler) + return(0); + } + + /* Find a free spot to put this handler */ + for (i = 0; (i < COMEM_MAXPCI); i++) { + if (pci_irqlist[i].handler == 0) { + pci_irqlist[i].handler = handler; + pci_irqlist[i].device = device; + pci_irqlist[i].dev_id = dev_id; + return(0); + } + } + + /* Couldn't fit?? */ + return(1); +} + +/*****************************************************************************/ + +void pci_free_irq(unsigned int irq, void *dev_id) +{ + int i; + +#ifdef DEBUGIO + printk("pci_free_irq(irq=%d,dev_id=%x)\n", irq, (int) dev_id); +#endif + + if (dev_id == (void *) NULL) + return; + + /* Check if this interrupt handler is lodged */ + for (i = 0; (i < COMEM_MAXPCI); i++) { + if (pci_irqlist[i].dev_id == dev_id) { + pci_irqlist[i].handler = NULL; + pci_irqlist[i].device = NULL; + pci_irqlist[i].dev_id = NULL; + break; + } + } +} + +/*****************************************************************************/ + +void pci_interrupt(int irq, void *id, struct pt_regs *fp) +{ + int i; + +#ifdef DEBUGIO + printk("pci_interrupt(irq=%d,id=%x,fp=%x)\n", irq, (int) id, (int) fp); +#endif + + for (i = 0; (i < COMEM_MAXPCI); i++) { + if (pci_irqlist[i].handler) + (*pci_irqlist[i].handler)(irq,pci_irqlist[i].dev_id,fp); + } +} + +/*****************************************************************************/ + +/* + * The shared memory region is broken up into contiguous 512 byte + * regions for easy allocation... This is not an optimal solution + * but it makes allocation and freeing regions really easy. + */ + +#define PCI_MEMSLOTSIZE 512 +#define PCI_MEMSLOTS (COMEM_SHMEMSIZE / PCI_MEMSLOTSIZE) + +char pci_shmemmap[PCI_MEMSLOTS]; + + +void *pci_bmalloc(int size) +{ + int i, j, nrslots; + +#ifdef DEBUGIO + printk("pci_bmalloc(size=%d)\n", size); +#endif + + if (size <= 0) + return((void *) NULL); + + nrslots = (size - 1) / PCI_MEMSLOTSIZE; + + for (i = 0; (i < (PCI_MEMSLOTS-nrslots)); i++) { + if (pci_shmemmap[i] == 0) { + for (j = i+1; (j < (i+nrslots)); j++) { + if (pci_shmemmap[j]) + goto restart; + } + + for (j = i; (j <= i+nrslots); j++) + pci_shmemmap[j] = 1; + break; + } +restart: + } + + return((void *) (COMEM_BASE + COMEM_SHMEM + (i * PCI_MEMSLOTSIZE))); +} + +/*****************************************************************************/ + +void pci_bmfree(void *mp, int size) +{ + int i, j, nrslots; + +#ifdef DEBUGIO + printk("pci_bmfree(mp=%x,size=%d)\n", (int) mp, size); +#endif + + nrslots = size / PCI_MEMSLOTSIZE; + i = (((unsigned long) mp) - (COMEM_BASE + COMEM_SHMEM)) / + PCI_MEMSLOTSIZE; + + for (j = i; (j < (i+nrslots)); j++) + pci_shmemmap[j] = 0; +} + +/*****************************************************************************/ + +unsigned long pci_virt_to_bus(volatile void *address) +{ + unsigned long l; + +#ifdef DEBUGIO + printk("pci_virt_to_bus(address=%x)", (int) address); +#endif + + l = ((unsigned long) address) - COMEM_BASE; +#ifdef DEBUGIO + printk("=%x\n", (int) (l+pci_shmemaddr)); +#endif + return(l + pci_shmemaddr); +} + +/*****************************************************************************/ + +void *pci_bus_to_virt(unsigned long address) +{ + unsigned long l; + +#ifdef DEBUGIO + printk("pci_bus_to_virt(address=%x)", (int) address); +#endif + + l = address - pci_shmemaddr; +#ifdef DEBUGIO + printk("=%x\n", (int) (address + COMEM_BASE)); +#endif + return((void *) (address + COMEM_BASE)); +} + +/*****************************************************************************/ + +void pci_bmcpyto(void *dst, void *src, int len) +{ + unsigned long *dp, *sp, val; + unsigned char *dcp, *scp; + int i, j; + +#ifdef DEBUGIO + printk("pci_bmcpyto(dst=%x,src=%x,len=%d)\n", (int)dst, (int)src, len); +#endif + + dp = (unsigned long *) dst; + sp = (unsigned long *) src; + i = len >> 2; + +#if 0 + printk("DATA:"); + scp = (unsigned char *) sp; + for (i = 0; (i < len); i++) { + if ((i % 16) == 0) printk("\n%04x: ", i); + printk("%02x ", *scp++); + } + printk("\n"); +#endif + + for (j = 0; (i >= 0); i--, j++) { + val = *sp++; + val = (val << 24) | ((val & 0x0000ff00) << 8) | + ((val & 0x00ff0000) >> 8) | (val >> 24); + *dp++ = val; + } + + if (len & 0x3) { + dcp = (unsigned char *) dp; + scp = ((unsigned char *) sp) + 3; + for (i = 0; (i < (len & 0x3)); i++) + *dcp++ = *scp--; + } +} + +/*****************************************************************************/ + +void pci_bmcpyfrom(void *dst, void *src, int len) +{ + unsigned long *dp, *sp, val; + unsigned char *dcp, *scp; + int i; + +#ifdef DEBUGIO + printk("pci_bmcpyfrom(dst=%x,src=%x,len=%d)\n",(int)dst,(int)src,len); +#endif + + dp = (unsigned long *) dst; + sp = (unsigned long *) src; + i = len >> 2; + + for (; (i >= 0); i--) { + val = *sp++; + val = (val << 24) | ((val & 0x0000ff00) << 8) | + ((val & 0x00ff0000) >> 8) | (val >> 24); + *dp++ = val; + } + + if (len & 0x3) { + dcp = ((unsigned char *) dp) + 3; + scp = (unsigned char *) sp; + for (i = 0; (i < (len & 0x3)); i++) + *dcp++ = *scp--; + } + +#if 0 + printk("DATA:"); + dcp = (unsigned char *) dst; + for (i = 0; (i < len); i++) { + if ((i % 16) == 0) printk("\n%04x: ", i); + printk("%02x ", *dcp++); + } + printk("\n"); +#endif +} + +/*****************************************************************************/ +#endif /* CONFIG_PCI */ diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/5307/CADRE3/crt0_ram.S linux.2.5.40-ac2/arch/m68knommu/platform/5307/CADRE3/crt0_ram.S --- linux.2.5.40/arch/m68knommu/platform/5307/CADRE3/crt0_ram.S 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/5307/CADRE3/crt0_ram.S 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,159 @@ +/*****************************************************************************/ + +/* + * crt0_ram.S -- startup code for MCF5307C3 Cadre-III ColdFire board. + * + * (C) Copyright 1999-2002, Greg Ungerer (gerg@snapgear.com). + * Copyright (C) 2000 Lineo Inc. (www.lineo.com) + * + * 1999/02/24 Modified for the 5307 processor David W. Miller + */ + +/*****************************************************************************/ + +#include "linux/autoconf.h" +#include "asm/coldfire.h" +#include "asm/mcfsim.h" +#include "asm/nettel.h" + +/*****************************************************************************/ + +/* + * SnapGear/NETtel board memory setup. + */ +#define MEM_BASE 0x00000000 /* Memory base at address 0 */ +#define MEM_SIZE 0x00800000 /* Memory size 8Mb */ +#define VBR_BASE MEM_BASE /* Vector address */ + +/*****************************************************************************/ + +.global _start +.global _rambase +.global _ramvec +.global _ramstart +.global _ramend + +/*****************************************************************************/ + +.data + +/* + * Set up the usable of RAM stuff. Size of RAM is determined then + * an initial stack set up at the end. + */ +_rambase: +.long 0 +_ramvec: +.long 0 +_ramstart: +.long 0 +_ramend: +.long 0 + +/*****************************************************************************/ + +.text + +/* + * This is the codes first entry point. This is where it all + * begins... + */ + +_start: + nop /* Filler */ + move.w #0x2700, %sr /* No interrupts */ + + /* + * Setup VBR here, otherwise buserror remap will not work. + * if dBug was active before (on my SBC with dBug 1.1 of Dec 16 1996) + * + * bkr@cut.de 19990306 + * + * Note: this is because dBUG points VBR to ROM, making vectors read + * only, so the bus trap can't be changed. (RS) + */ + move.l #VBR_BASE, %a7 /* Note VBR can't be read */ + movec %a7, %VBR + move.l %a7, _ramvec /* Set up vector addr */ + move.l %a7, _rambase /* Set up base RAM addr */ + + + /* + * Determine size of RAM, then set up initial stack. + */ + move.l #MEM_SIZE, %a0 + + move.l %a0, %d0 /* Mem end addr is in a0 */ + move.l %d0, %sp /* Set up initial stack ptr */ + move.l %d0, _ramend /* Set end ram addr */ + + /* make region ROM cachable (turn off for flash programming?) */ + /* 0xff000000 - 0xffffffff */ +#ifdef DEBUGGER_COMPATIBLE_CACHE + movl #(0xff< ram + + .data BLOCK(0x4) : { + _sdata = . ; + __data_start = . ; + *(.data) + *(.data.exit) + . = ALIGN(0x2000) ; + *(.data.init_task) + . = ALIGN(0x2000) ; + _edata = . ; + } > ram + + .init BLOCK(4096) : { + __init_begin = .; + *(.text.init) + *(.data.init) + . = ALIGN(16); + __setup_start = .; + *(.setup.init) + __setup_end = .; + __initcall_start = .; + *(.initcall1.init) + *(.initcall2.init) + *(.initcall3.init) + *(.initcall4.init) + *(.initcall5.init) + *(.initcall6.init) + *(.initcall7.init) + __initcall_end = .; + . = ALIGN(4) ; + __init_end = .; + } > ram + + .bss BLOCK(0x4) : { + _sbss = . ; + *(.bss) + *(COMMON) + . = ALIGN(4) ; + _ebss = . ; + _end = . ; + } > ram +} + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/5307/CLEOPATRA/crt0_ram.S linux.2.5.40-ac2/arch/m68knommu/platform/5307/CLEOPATRA/crt0_ram.S --- linux.2.5.40/arch/m68knommu/platform/5307/CLEOPATRA/crt0_ram.S 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/5307/CLEOPATRA/crt0_ram.S 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,176 @@ +/*****************************************************************************/ + +/* + * crt0_ram.S -- startup code for Feith CLEOPATRA board. + * + * (C) Copyright 2001, Roman Wagner. + * + * 1999/02/24 Modified for the 5307 processor David W. Miller + */ + +/*****************************************************************************/ + +#include "linux/autoconf.h" +#include "asm/coldfire.h" +#include "asm/mcfsim.h" + +/*****************************************************************************/ + +/* + * Feith CLEOPATRA board, chip select and memory setup. +*/ + +#define MEM_BASE 0x00000000 /* Memory base at address 0 */ +#define VBR_BASE MEM_BASE /* Vector address */ + +#if defined(CONFIG_RAM16MB) +#define MEM_SIZE 0x01000000 /* Memory size 16Mb */ +#else +#define MEM_SIZE 0x00800000 /* Memory size 8Mb */ +#endif + +/*****************************************************************************/ + +.global _start +.global _rambase +.global _ramvec +.global _ramstart +.global _ramend + +/*****************************************************************************/ + +.data + +/* + * Set up the usable of RAM stuff. Size of RAM is determined then + * an initial stack set up at the end. + */ +_rambase: +.long 0 +_ramvec: +.long 0 +_ramstart: +.long 0 +_ramend: +.long 0 + +/*****************************************************************************/ + +.text + +/* + * This is the codes first entry point. This is where it all + * begins... + */ + +_start: + nop /* Filler */ + move.w #0x2700, %sr /* No interrupts */ + + + /* + * Setup VBR here, otherwise buserror remap will not work. + * if dBug was active before (on my SBC with dBug 1.1 of Dec 16 1996) + * + * bkr@cut.de 19990306 + * + * Note: this is because dBUG points VBR to ROM, making vectors read + * only, so the bus trap can't be changed. (RS) + */ + move.l #VBR_BASE, %a7 /* Note VBR can't be read */ + movec %a7, %VBR + move.l %a7, _ramvec /* Set up vector addr */ + move.l %a7, _rambase /* Set up base RAM addr */ + + + /* + * Determine size of RAM, then set up initial stack. + */ +/* + * The current version of the 5307 processor + * SWT does not work. Probing invalid addresses + * will hang the system. + * + * For now, set the memory size to 8 meg + */ + move.l #MEM_SIZE, %a0 + + move.l %a0, %d0 /* Mem end addr is in a0 */ + move.l %d0, %sp /* Set up initial stack ptr */ + move.l %d0, _ramend /* Set end ram addr */ + + + /* now fire off the cache, remember to invalidate it first */ + movl #0,%d0 + movc %d0,%CACR + nop + movc %d0,%CACR /* cache is off */ + + movl #CACR_CINVA,%d0 /* invalidate whole cache */ + movc %d0,%CACR + nop + movc %d0,%CACR + nop + + /* make region ROM cachable (turn off for flash programming?) */ + /* 0xff000000 - 0xffffffff */ + movl #(0xff< ram + + .data BLOCK(0x4) : { + _sdata = . ; + __data_start = . ; + *(.data) + *(.data.exit) + . = ALIGN(0x2000) ; + *(.data.init_task) + . = ALIGN(0x2000) ; + _edata = . ; + } > ram + + .init BLOCK(4096) : { + __init_begin = .; + *(.text.init) + *(.data.init) + . = ALIGN(16); + __setup_start = .; + *(.setup.init) + __setup_end = .; + __initcall_start = .; + *(.initcall1.init) + *(.initcall2.init) + *(.initcall3.init) + *(.initcall4.init) + *(.initcall5.init) + *(.initcall6.init) + *(.initcall7.init) + __initcall_end = . ; + . = ALIGN(4); + __init_end = .; + } > ram + + .bss BLOCK(0x4) : { + _sbss = . ; + *(.bss) + *(COMMON) + . = ALIGN(4) ; + _ebss = . ; + _end = . ; + } > ram +} + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/5307/config.c linux.2.5.40-ac2/arch/m68knommu/platform/5307/config.c --- linux.2.5.40/arch/m68knommu/platform/5307/config.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/5307/config.c 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,429 @@ +/***************************************************************************/ + +/* + * linux/arch/m68knommu/platform/5307/config.c + * + * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com) + * Copyright (C) 2000, Lineo (www.lineo.com) + */ + +/***************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#if defined(CONFIG_eLIA) +#include +#endif + +#include + +/***************************************************************************/ + +void reset_setupbutton(void); +void coldfire_profile_init(void); + +/***************************************************************************/ + +/* + * DMA channel base address table. + */ +unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = { + MCF_MBAR + MCFDMA_BASE0, + MCF_MBAR + MCFDMA_BASE1, + MCF_MBAR + MCFDMA_BASE2, + MCF_MBAR + MCFDMA_BASE3, +}; + +unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS]; + +/***************************************************************************/ + +void coldfire_tick(void) +{ + volatile unsigned char *timerp; + + /* Reset the ColdFire timer */ + timerp = (volatile unsigned char *) (MCF_MBAR + MCFTIMER_BASE1); + timerp[MCFTIMER_TER] = MCFTIMER_TER_CAP | MCFTIMER_TER_REF; +} + +/***************************************************************************/ + +void coldfire_timer_init(void (*handler)(int, void *, struct pt_regs *)) +{ + volatile unsigned short *timerp; + volatile unsigned char *icrp; + + /* Set up TIMER 1 as poll clock */ + timerp = (volatile unsigned short *) (MCF_MBAR + MCFTIMER_BASE1); + timerp[MCFTIMER_TMR] = MCFTIMER_TMR_DISABLE; + + timerp[MCFTIMER_TRR] = (unsigned short) ((MCF_CLK / 16) / HZ); + timerp[MCFTIMER_TMR] = MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 | + MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE; + + icrp = (volatile unsigned char *) (MCF_MBAR + MCFSIM_TIMER1ICR); + +#if defined(CONFIG_NETtel) || defined(CONFIG_eLIA) || \ + defined(CONFIG_DISKtel) || defined(CONFIG_SECUREEDGEMP3) || \ + defined(CONFIG_CLEOPATRA) + *icrp = MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3; + request_irq(30, handler, SA_INTERRUPT, "ColdFire Timer", NULL); +#else + *icrp = MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL5 | MCFSIM_ICR_PRI3; + request_irq(29, handler, SA_INTERRUPT, "ColdFire Timer", NULL); +#endif + +#if defined(CONFIG_NETtel) || defined(CONFIG_eLIA) || \ + defined(CONFIG_DISKtel) || defined(CONFIG_SECUREEDGEMP3) + /* This is not really the right place to do this... */ + reset_setupbutton(); +#endif +#ifdef CONFIG_HIGHPROFILE + coldfire_profile_init(); +#endif + mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_TIMER1); +} + +/***************************************************************************/ +#ifdef CONFIG_HIGHPROFILE +/***************************************************************************/ + +#define PROFILEHZ 1013 + +/* + * Use the other timer to provide high accuracy profiling info. + */ + +void coldfire_profile_tick(int irq, void *dummy, struct pt_regs *regs) +{ + volatile unsigned char *timerp; + + /* Reset the ColdFire timer2 */ + timerp = (volatile unsigned char *) (MCF_MBAR + MCFTIMER_BASE2); + timerp[MCFTIMER_TER] = MCFTIMER_TER_CAP | MCFTIMER_TER_REF; + + if (!user_mode(regs)) { + if (prof_buffer && current->pid) { + extern int _stext; + unsigned long ip = instruction_pointer(regs); + ip -= (unsigned long) &_stext; + ip >>= prof_shift; + if (ip < prof_len) + prof_buffer[ip]++; + } + } +} + +void coldfire_profile_init(void) +{ + volatile unsigned short *timerp; + volatile unsigned char *icrp; + + printk("PROFILE: lodging timer2=%d as profile timer\n", PROFILEHZ); + + /* Set up TIMER 2 as poll clock */ + timerp = (volatile unsigned short *) (MCF_MBAR + MCFTIMER_BASE2); + timerp[MCFTIMER_TMR] = MCFTIMER_TMR_DISABLE; + + timerp[MCFTIMER_TRR] = (unsigned short) ((MCF_CLK / 16) / PROFILEHZ); + timerp[MCFTIMER_TMR] = MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 | + MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE; + + icrp = (volatile unsigned char *) (MCF_MBAR + MCFSIM_TIMER2ICR); + + *icrp = MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3; + request_irq(31, coldfire_profile_tick, (SA_INTERRUPT | IRQ_FLG_FAST), + "Profile Timer", NULL); + mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_TIMER2); +} + +/***************************************************************************/ +#endif /* CONFIG_HIGHPROFILE */ +/***************************************************************************/ + +/* + * Program the vector to be an auto-vectored. + */ + +void mcf_autovector(unsigned int vec) +{ + volatile unsigned char *mbar; + + if ((vec >= 25) && (vec <= 31)) { + mbar = (volatile unsigned char *) MCF_MBAR; + vec = 0x1 << (vec - 24); + *(mbar + MCFSIM_AVR) |= vec; + mcf_setimr(mcf_getimr() & ~vec); + } +} + +/***************************************************************************/ + +extern e_vector *_ramvec; + +void set_evector(int vecnum, void (*handler)(void)) +{ + if (vecnum >= 0 && vecnum <= 255) + _ramvec[vecnum] = handler; +} + +/***************************************************************************/ + +/* assembler routines */ +asmlinkage void buserr(void); +asmlinkage void trap(void); +asmlinkage void system_call(void); +asmlinkage void inthandler(void); + +#ifdef TRAP_DBG_INTERRUPT +asmlinkage void dbginterrupt(void); +#endif + +void __init coldfire_trap_init(void) +{ + int i; + +#ifndef ENABLE_dBUG + mcf_setimr(MCFSIM_IMR_MASKALL); +#endif + + /* + * There is a common trap handler and common interrupt + * handler that handle almost every vector. We treat + * the system call and bus error special, they get their + * own first level handlers. + */ +#ifndef ENABLE_dBUG + for (i = 3; (i <= 23); i++) + _ramvec[i] = trap; + for (i = 33; (i <= 63); i++) + _ramvec[i] = trap; +#endif +#ifdef TRAP_DBG_INTERRUPT + _ramvec[12] = dbginterrupt; +#endif + + for (i = 24; (i <= 30); i++) + _ramvec[i] = inthandler; +#ifndef ENABLE_dBUG + _ramvec[31] = inthandler; // Disables the IRQ7 button +#endif + + for (i = 64; (i < 255); i++) + _ramvec[i] = inthandler; + _ramvec[255] = 0; + + _ramvec[2] = buserr; + _ramvec[32] = system_call; +#ifdef MCF_BDM_DISABLE + /* Disable the BDM clocking. This also turns off most of the rest of + * the BDM device. This is good for EMC reasons. This option is not + * incompatible with the memory protection option. + */ + wdebug(MCFDEBUG_CSR, MCFDEBUG_CSR_PSTCLK); +#endif + +} + +/***************************************************************************/ + +/* + * Generic dumping code. Used for panic and debug. + */ + +void dump(struct pt_regs *fp) +{ + extern unsigned int sw_usp, sw_ksp; + unsigned long *sp; + unsigned char *tp; + int i; + +#ifdef CONFIG_DUMPTOFLASH + extern unsigned long sys_getlog(char **bp); + extern void sys_resetlog(void); + extern void flash_erasedump(void); + extern void flash_writedump(char *buf, int len); + flash_erasedump(); + sys_resetlog(); +#endif + + printk("\nCURRENT PROCESS:\n\n"); + printk("COMM=%s PID=%d\n", current->comm, current->pid); + +#if defined(CONFIG_WATCHDOG) && defined(CONFIG_OLDMASK) +{ + extern int swt_inwatchdog; + if (swt_inwatchdog) { + extern int swt_lastjiffies, swt_reference; + printk("WATCHDOG: ref=%d diff=%d jiffies=%d lastjiffies=%d\n\n", + swt_reference, ((int) (jiffies - swt_lastjiffies)), + ((int) jiffies), swt_lastjiffies); + } +} +#endif + + if (current->mm) { + printk("TEXT=%08x-%08x DATA=%08x-%08x BSS=%08x-%08x\n", + (int) current->mm->start_code, + (int) current->mm->end_code, + (int) current->mm->start_data, + (int) current->mm->end_data, + (int) current->mm->end_data, + (int) current->mm->brk); + printk("USER-STACK=%08x KERNEL-STACK=%08x\n\n", + (int) current->mm->start_stack, + (int) (((unsigned long) current) + 2 * PAGE_SIZE)); + } + + printk("PC: %08lx\n", fp->pc); + printk("SR: %08lx SP: %08lx\n", (long) fp->sr, (long) fp); + printk("d0: %08lx d1: %08lx d2: %08lx d3: %08lx\n", + fp->d0, fp->d1, fp->d2, fp->d3); + printk("d4: %08lx d5: %08lx a0: %08lx a1: %08lx\n", + fp->d4, fp->d5, fp->a0, fp->a1); + printk("\nUSP: %08x KSP: %08x TRAPFRAME: %08x\n", + sw_usp, sw_ksp, (unsigned int) fp); + + printk("\nCODE:"); + tp = ((unsigned char *) fp->pc) - 0x20; + for (sp = (unsigned long *) tp, i = 0; (i < 0x40); i += 4) { + if ((i % 0x10) == 0) + printk("\n%08x: ", (int) (tp + i)); + printk("%08x ", (int) *sp++); + } + printk("\n"); + + printk("\nKERNEL STACK:"); + tp = ((unsigned char *) fp) - 0x40; + for (sp = (unsigned long *) tp, i = 0; (i < 0xc0); i += 4) { + if ((i % 0x10) == 0) + printk("\n%08x: ", (int) (tp + i)); + printk("%08x ", (int) *sp++); + } + printk("\n"); + + printk("\nUSER STACK:"); + tp = (unsigned char *) (sw_usp - 0x10); + for (sp = (unsigned long *) tp, i = 0; (i < 0x80); i += 4) { + if ((i % 0x10) == 0) + printk("\n%08x: ", (int) (tp + i)); + printk("%08x ", (int) *sp++); + } + printk("\n\n"); + +#ifdef CONFIG_DUMPTOFLASH + i = sys_getlog((char **) &tp); + flash_writedump(tp, i); +#endif +} + +/***************************************************************************/ + +#if defined(CONFIG_NETtel) || defined(CONFIG_eLIA) || \ + defined(CONFIG_DISKtel) || defined(CONFIG_SECUREEDGEMP3) + +/* + * Routines to support the NETtel software reset button. + */ +void reset_button(int irq, void *dev_id, struct pt_regs *regs) +{ + extern void flash_eraseconfig(void); + static int inbutton = 0; + + /* + * IRQ7 is not maskable by the CPU core. It is possible + * that switch bounce mey get us back here before we have + * really serviced the interrupt. + */ + if (inbutton) + return; + inbutton = 1; + /* Disable interrupt at SIM - best we can do... */ + mcf_setimr(mcf_getimr() | MCFSIM_IMR_EINT7); + /* Try and de-bounce the switch a little... */ + udelay(10000); + + flash_eraseconfig(); + + /* Don't leave here 'till button is no longer pushed! */ + for (;;) { + if ((mcf_getipr() & MCFSIM_IMR_EINT7) == 0) + break; + } + + HARD_RESET_NOW(); + /* Should never get here... */ + + inbutton = 0; + /* Interrupt service done, enable it again */ + mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_EINT7); +} + +/***************************************************************************/ + +void reset_setupbutton(void) +{ + volatile unsigned char *mbar; + + mbar = (volatile unsigned char *) MCF_MBAR; + *(mbar + MCFSIM_AVR) |= MCFSIM_IMR_EINT7; + mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_EINT7); + request_irq(31, reset_button, (SA_INTERRUPT | IRQ_FLG_FAST), + "Reset Button", NULL); +} + +#endif /* CONFIG_NETtel || CONFIG_eLIA || CONFIG_DISKtel || CONFIG_SECUREEDGEMP3 */ + +/***************************************************************************/ + +void coldfire_reset(void) +{ + HARD_RESET_NOW(); +} + +/***************************************************************************/ + +void config_BSP(char *commandp, int size) +{ +#if defined(CONFIG_NETtel) || defined(CONFIG_eLIA) || \ + defined(CONFIG_DISKtel) || defined(CONFIG_SECUREEDGEMP3) + /* Copy command line from FLASH to local buffer... */ + memcpy(commandp, (char *) 0xf0004000, size); + commandp[size-1] = 0; +#else + memset(commandp, 0, size); +#endif /* CONFIG_NETtel || CONFIG_eLIA || CONFIG_DISKtel || CONFIG_SECUREEDGEMP3 */ + + mach_sched_init = coldfire_timer_init; + mach_tick = coldfire_tick; + mach_trap_init = coldfire_trap_init; + mach_reset = coldfire_reset; +} + +/***************************************************************************/ +#ifdef TRAP_DBG_INTERRUPT + +asmlinkage void dbginterrupt_c(struct frame *fp) +{ + extern void dump(struct pt_regs *fp); + printk("%s(%d): BUS ERROR TRAP\n", __FILE__, __LINE__); + dump((struct pt_regs *) fp); + asm("halt"); +} + +#endif +/***************************************************************************/ diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/5307/entry.S linux.2.5.40-ac2/arch/m68knommu/platform/5307/entry.S --- linux.2.5.40/arch/m68knommu/platform/5307/entry.S 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/5307/entry.S 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,789 @@ +/* -*- mode: asm -*- + * + * linux/arch/m68knommu/platform/5307/entry.S + * + * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com) + * Copyright (C) 1998 D. Jeff Dionne , + * Kenneth Albanowski , + * Copyright (C) 2000 Lineo Inc. (www.lineo.com) + * + * Based on: + * + * linux/arch/m68k/kernel/entry.S + * + * Copyright (C) 1991, 1992 Linus Torvalds + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file README.legal in the main directory of this archive + * for more details. + * + * Linux/m68k support by Hamish Macdonald + * + * 68060 fixes by Jesper Skov + * ColdFire support by Greg Ungerer (gerg@snapgear.com) + * 5307 fixes by David W. Miller + * linux 2.4 support David McCullough + */ + +/* + * entry.S contains the system-call and fault low-level handling routines. + * This also contains the timer-interrupt handler, as well as all interrupts + * and faults that can result in a task-switch. + * + * NOTE: This code handles signal-recognition, which happens every time + * after a timer-interrupt and after each system call. + * + * Stack layout in 'ret_from_exception': + * + * This allows access to the syscall arguments in registers d1-d5 + * + * 0(sp) - d1 + * 4(sp) - d2 + * 8(sp) - d3 + * C(sp) - d4 + * 10(sp) - d5 + * 14(sp) - a0 + * 18(sp) - a1 + * 1C(sp) - a2 + * 20(sp) - d0 + * 24(sp) - orig_d0 + * 28(sp) - stack adjustment + * 2C(sp) - format & vector } + * 2E(sp) - sr } different to m68k + * 30(sp) - pc } + */ + +#include +#include +#include +#include +#include +#include +#include + +#include "m68k_defs.h" + +LENOSYS = 38 + +/* the following macro is used when enabling interrupts */ +#define ALLOWINT 0xf8ff +#define MAX_NOINT_IPL 0 + + +LD0 = 0x20 +LORIG_D0 = 0x24 +LFORMATVEC = 0x2c +LSR = 0x2e +LPC = 0x30 + +/* + * This defines the normal kernel pt-regs layout. + * + * regs are a2-a6 and d6-d7 preserved by C code + * the kernel doesn't mess with usp unless it needs to + * + * This is made a little more tricky on the ColdFire. There is no + * separate kernel and user stack pointers. Need to artificially + * construct a usp in software... When doing this we need to disable + * interrupts, otherwise bad things could happen. + */ +#define SAVE_ALL \ + move #0x2700,%sr; /* disable intrs */ \ + btst #5,%sp@(2); /* from user? */ \ + bnes 6f; /* no, skip */ \ + movel %sp,sw_usp; /* save user sp */ \ + addql #8,sw_usp; /* remove exception */ \ + movel sw_ksp,%sp; /* kernel sp */ \ + subql #8,%sp; /* room for exception */\ + clrl %sp@-; /* stk_adj */ \ + movel %d0,%sp@-; /* orig d0 */ \ + movel %d0,%sp@-; /* d0 */ \ + subl #32,%sp; /* space for 8 regs */ \ + moveml %d1-%d5/%a0-%a2,%sp@; \ + movel sw_usp,%a0; /* get usp */ \ + moveml %a0@(-8),%d1-%d2; /* get exception */ \ + moveml %d1-%d2,%sp@(LFORMATVEC); /* copy exception */ \ + bra 7f; \ + 6: \ + clrl %sp@-; /* stk_adj */ \ + movel %d0,%sp@-; /* orig d0 */ \ + movel %d0,%sp@-; /* d0 */ \ + subl #32,%sp; /* space for 7 regs */ \ + moveml %d1-%d5/%a0-%a2,%sp@; \ + 7: + +#define RESTORE_ALL \ + btst #5,%sp@(LSR); /* going user? */ \ + bnes 8f; /* no, skip */ \ + move #0x2700,%sr; /* disable intrs */ \ + movel sw_usp,%a0; /* get usp */ \ + moveml %sp@(LFORMATVEC),%d1-%d2; /* copy exception */ \ + moveml %d1-%d2,%a0@(-8); \ + moveml %sp@,%d1-%d5/%a0-%a2; \ + addl #32,%sp; /* space for 8 regs */ \ + movel %sp@+,%d0; \ + addql #4,%sp; /* orig d0 */ \ + addl %sp@+,%sp; /* stk adj */ \ + addql #8,%sp; /* remove exception */ \ + movel %sp,sw_ksp; /* save ksp */ \ + subql #8,sw_usp; /* set exception */ \ + movel sw_usp,%sp; /* restore usp */ \ + rte; \ + 8: \ + moveml %sp@,%d1-%d5/%a0-%a2; \ + addl #32,%sp; /* space for 8 regs */ \ + movel %sp@+,%d0; \ + addql #4,%sp; /* orig d0 */ \ + addl %sp@+,%sp; /* stk adj */ \ + rte + +/* + * Quick exception save, use current stack only. + */ +#define SAVE_LOCAL \ + move #0x2700,%sr; /* disable intrs */ \ + clrl %sp@-; /* stk_adj */ \ + movel %d0,%sp@-; /* orig d0 */ \ + movel %d0,%sp@-; /* d0 */ \ + subl #32,%sp; /* space for 8 regs */ \ + moveml %d1-%d5/%a0-%a2,%sp@; + +#define RESTORE_LOCAL \ + moveml %sp@,%d1-%d5/%a0-%a2; \ + addl #32,%sp; /* space for 8 regs */ \ + movel %sp@+,%d0; \ + addql #4,%sp; /* orig d0 */ \ + addl %sp@+,%sp; /* stk adj */ \ + rte + + +#define SWITCH_STACK_SIZE (6*4+4) /* includes return address */ + +#define SAVE_SWITCH_STACK \ + subl #24,%sp; /* 6 regs */ \ + moveml %a3-%a6/%d6-%d7,%sp@ + +#define RESTORE_SWITCH_STACK \ + moveml %sp@,%a3-%a6/%d6-%d7; \ + addl #24,%sp /* 6 regs */ + +/* + * Software copy of the user and kernel stack pointers... Ugh... + * Need these to get around ColdFire not having separate kernel + * and user stack pointers. + */ +.globl sw_usp +.globl sw_ksp + +.data + +sw_ksp: +.long 0 + +sw_usp: +.long 0 + +.text + + +.globl buserr +.globl trap +.globl system_call +.globl resume, ret_from_exception +.globl ret_from_signal +.globl sys_call_table +.globl sys_fork, sys_clone, sys_vfork +.globl ret_from_interrupt +.globl inthandler +.globl fasthandler + +#ifdef TRAP_DBG_INTERRUPT +.globl dbginterrupt +#endif + +/*--------------------------------------------------------------------------*/ + +.text + +ENTRY(buserr) + SAVE_ALL + moveq #-1,%d0 + movel %d0,%sp@(LORIG_D0) | a -1 in the ORIG_D0 field + | signifies that the stack frame + | is NOT for syscall + + movel %sp,%sp@- | stack frame pointer argument + jsr buserr_c + addql #4,%sp + jra ret_from_exception + + +#ifdef TRAP_DBG_INTERRUPT +ENTRY(dbginterrupt) + SAVE_ALL + moveq #-1,%d0 + movel %d0,%sp@(LORIG_D0) | a -1 in the ORIG_D0 field + | signifies that the stack frame + | is NOT for syscall + + movel %sp,%sp@- | stack frame pointer argument + jsr dbginterrupt_c + addql #4,%sp + jra ret_from_exception +#endif + + +ENTRY(reschedule) + | save top of frame + pea %sp@ + jbsr set_esp0 + addql #4,%sp + + pea ret_from_exception + jmp schedule + + | After a fork we jump here directly from resume, + | so that %d1 contains the previous task + | Theoretically only needed on SMP, but lets watch + | what happens in schedule_tail() in future... +ENTRY(ret_from_fork) +#ifdef CONFIG_SMP + movel %d1,%sp@- + jsr schedule_tail + addql #4,%sp +#endif + jra ret_from_exception + +ENTRY(system_call) + SAVE_ALL + move #0x2000,%sr; | enable intrs again + + movel #-LENOSYS,%d2 + movel %d2,LD0(%sp) | default return value in d0 + | original D0 is in orig_d0 + movel %d0,%d2 + + | save top of frame + pea %sp@ + jbsr set_esp0 + addql #4,%sp + + cmpl #NR_syscalls,%d2 + jcc ret_from_exception + lea sys_call_table,%a0 + lsll #2,%d2 | movel %a0@(%d2:l:4),%d3 + movel %a0@(%d2),%d3 + jeq ret_from_exception + lsrl #2,%d2 + + movel %sp,%d2 | get thread_info pointer + andl #0xffffe000,%d2 | at start of 8k kernel stack + movel %d2,%a0 + btst #TIF_SYSCALL_TRACE,%a0@(TI_FLAGS) + bnes 1f + + movel %d3,%a0 + jbsr %a0@ + movel %d0,%sp@(LD0) | save the return value + jra ret_from_exception +1: + subql #4,%sp + SAVE_SWITCH_STACK + jbsr syscall_trace + RESTORE_SWITCH_STACK + addql #4,%sp + movel %d3,%a0 + jbsr %a0@ + movel %d0,%sp@(LD0) | save the return value + subql #4,%sp | dummy return address + SAVE_SWITCH_STACK + jbsr syscall_trace + +ret_from_signal: + RESTORE_SWITCH_STACK + addql #4,%sp + +ret_from_exception: + btst #5,%sp@(LSR) | check if returning to kernel + jeq Luser_return | if so, skip resched, signals + +Lkernel_return: + moveml %sp@,%d1-%d5/%a0-%a2 + addl #32,%sp | space for 8 regs + movel %sp@+,%d0 + addql #4,%sp | orig d0 + addl %sp@+,%sp | stk adj + rte + +Luser_return: + movel %sp,%d1 | get thread_info pointer + andl #0xffffe000,%d1 | at base of 8k kernel stack + movel %d1,%a0 + movel %a0@(TI_FLAGS),%d1 | get thread_info->flags + andl #_TIF_WORK_MASK,%d1 + jne Lwork_to_do | still work to do + +Lreturn: + move #0x2700,%sr | disable intrs + movel sw_usp,%a0 | get usp + moveml %sp@(LFORMATVEC),%d1-%d2 | copy exception + moveml %d1-%d2,%a0@(-8) + bclr #5,%a0@(-8) | clear format byte, bit 5 to make + | stack appear modulo 4 which it WILL + | be when we do the rte because it was + | generated in setup_frame + bclr #4,%a0@(-8) | clear format byte, bit 4 to make + | stack appear modulo 4 which it WILL + | be when we do the rte because it was + | generated in setup_frame + moveml %sp@,%d1-%d5/%a0-%a2 + addl #32,%sp | space for 8 regs + movel %sp@+,%d0 + addql #4,%sp | orig d0 + addl %sp@+,%sp | stk adj + addql #8,%sp | remove exception + movel %sp,sw_ksp | save ksp + movel sw_usp,%sp | restore usp + subql #8,%sp | set exception + rte + +Lwork_to_do: + movel %a0@(TI_FLAGS),%d1 | get thread_info->flags + btst #TIF_NEED_RESCHED,%d1 + jne reschedule + + /* GERG: do we need something here for TRACEing?? */ + +Lsignal_return: + subql #4,%sp | dummy return address + SAVE_SWITCH_STACK + pea %sp@(SWITCH_STACK_SIZE) + clr %d1 + movel %d1,%sp@- + jsr do_signal + addql #8,%sp + RESTORE_SWITCH_STACK + addql #4,%sp + jmp Lreturn + +/*--------------------------------------------------------------------------*/ + +/* + * Common ColdFire trap handler. Most traps come through here first. + */ +ENTRY(trap) + SAVE_ALL + moveq #-1,%d0 + movel %d0,%sp@(LORIG_D0) | a -1 in the ORIG_D0 field + | signifies that the stack frame + | is NOT for syscall + movel %sp,%sp@- | stack frame pointer argument + jsr trap_c + addql #4,%sp + jra ret_from_exception + +/* + * This is the generic interrupt handler (for all hardware interrupt + * sources). It figures out the vector number and calls the appropriate + * interrupt service routine directly. + */ +ENTRY(inthandler) + SAVE_ALL + moveq #-1,%d0 + movel %d0,%sp@(LORIG_D0) | a -1 in the ORIG_D0 field + | signifies that the stack frame + | is NOT for syscall + addql #1,local_irq_count + | put exception # in d0 + movew %sp@(LFORMATVEC),%d0 + andl #0x03fc,%d0 | mask out vector only + + movel mach_kstat_irqs,%a0 + | get addr of kstat struct + addql #1,%a0@(%d0) | incr irq intr count + + lsrl #2,%d0 | calculate real vector # + movel %d0,%d1 | calculate array offset + lsll #4,%d1 + lea irq_list,%a0 + addl %d1,%a0 | pointer to array struct + + movel %sp,%sp@- | push regs arg onto stack + movel %a0@(8),%sp@- | push devid arg + movel %d0,%sp@- | push vector # on stack + + movel %a0@,%a0 | get function to call + jbsr %a0@ | call vector handler + addl #12,%sp | pop parameters off stack + + bra ret_from_interrupt | this was fallthrough + + +/* + * This is the fast interrupt handler (for certain hardware interrupt + * sources). Unlike the normal interrupt handler it just uses the + * current stack (doesn't care if it is user or kernel). It also + * doesn't bother doing the bottom half handlers. + */ +ENTRY(fasthandler) + SAVE_LOCAL + + movew %sp@(LFORMATVEC),%d0 + andl #0x03fc,%d0 | mask out vector only + + movel mach_kstat_irqs,%a0 + | get addr of kstat struct + addql #1,%a0@(%d0) | incr irq intr count + + movel %sp,%sp@- | push regs arg onto stack + clrl %d1 + movel %d1,%sp@- | push devid arg + lsrl #2,%d0 | calculate real vector # + movel %d0,%sp@- | push vector # on stack + + lsll #4,%d0 | adjust for array offset + lea irq_list,%a0 + movel %a0@(%d0),%a0 | get function to call + jbsr %a0@ | call vector handler + addl #12,%sp | pop parameters off stack + + RESTORE_LOCAL + +/*--------------------------------------------------------------------------*/ + +ENTRY(ret_from_interrupt) + subql #1,local_irq_count + jeq 2f +1: + RESTORE_ALL +2: + moveb %sp@(LSR),%d0 + andl #0x7,%d0 +#if MAX_NOINT_IPL > 0 + cmpiw #MAX_NOINT_IPL,%d0 +#endif + jhi 1b + + /* check if we need to do software interrupts */ + movel irq_stat+CPUSTAT_SOFTIRQ_PENDING,%d0 + jeq ret_from_exception + + pea ret_from_exception + jmp do_softirq + +/* Handler for uninitialized and spurious interrupts */ + +ENTRY(bad_interrupt) + addql #1,num_spurious + rte + +ENTRY(sys_fork) + SAVE_SWITCH_STACK + pea %sp@(SWITCH_STACK_SIZE) + jbsr m68k_fork + addql #4,%sp + RESTORE_SWITCH_STACK + rts + +ENTRY(sys_vfork) + SAVE_SWITCH_STACK + pea %sp@(SWITCH_STACK_SIZE) + jbsr m68k_vfork + addql #4,%sp + RESTORE_SWITCH_STACK + rts + +ENTRY(sys_clone) + SAVE_SWITCH_STACK + pea %sp@(SWITCH_STACK_SIZE) + jbsr m68k_clone + addql #4,%sp + RESTORE_SWITCH_STACK + rts + +ENTRY(sys_sigsuspend) + SAVE_SWITCH_STACK + pea %sp@(SWITCH_STACK_SIZE) + jbsr do_sigsuspend + addql #4,%sp + RESTORE_SWITCH_STACK + rts + +ENTRY(sys_rt_sigsuspend) + SAVE_SWITCH_STACK + pea %sp@(SWITCH_STACK_SIZE) + jbsr do_rt_sigsuspend + addql #4,%sp + RESTORE_SWITCH_STACK + rts + +ENTRY(sys_sigreturn) + SAVE_SWITCH_STACK + jbsr do_sigreturn + RESTORE_SWITCH_STACK + rts + +ENTRY(sys_rt_sigreturn) + SAVE_SWITCH_STACK + jbsr do_rt_sigreturn + RESTORE_SWITCH_STACK + rts + +/*--------------------------------------------------------------------------*/ + +/* + * Beware - when entering resume, prev (the current task) is + * in a0, next (the new task) is in a1,so don't change these + * registers until their contents are no longer needed. + */ +ENTRY(resume) + + movel %a0, %d1 | get prev thread in d1 + + movew %sr,%d0 | save thread status reg + movew %d0,%a0@(TASK_THREAD+THREAD_SR) + + oril #0x700,%d0 | disable interrupts + move %d0,%sr + + movel sw_usp,%d0 | save usp + movel %d0,%a0@(TASK_THREAD+THREAD_USP) + + SAVE_SWITCH_STACK + movel %sp,%a0@(TASK_THREAD+THREAD_KSP) | save kernel stack pointer + movel %a1@(TASK_THREAD+THREAD_KSP),%sp | restore new thread stack + RESTORE_SWITCH_STACK + + movel %a1@(TASK_THREAD+THREAD_USP),%a0 | restore thread user stack + movel %a0, sw_usp + + movew %a1@(TASK_THREAD+THREAD_SR),%d0 | restore thread status reg + movew %d0, %sr + rts + +/*--------------------------------------------------------------------------*/ + +.text +ALIGN +ENTRY(sys_call_table) + .long sys_ni_syscall /* 0 - old "setup()" system call*/ + .long sys_exit + .long sys_fork + .long sys_read + .long sys_write + .long sys_open /* 5 */ + .long sys_close + .long sys_waitpid + .long sys_creat + .long sys_link + .long sys_unlink /* 10 */ + .long sys_execve + .long sys_chdir + .long sys_time + .long sys_mknod + .long sys_chmod /* 15 */ + .long sys_chown16 + .long sys_ni_syscall /* old break syscall holder */ + .long sys_stat + .long sys_lseek + .long sys_getpid /* 20 */ + .long sys_mount + .long sys_oldumount + .long sys_setuid16 + .long sys_getuid16 + .long sys_stime /* 25 */ + .long sys_ptrace + .long sys_alarm + .long sys_fstat + .long sys_pause + .long sys_utime /* 30 */ + .long sys_ni_syscall /* old stty syscall holder */ + .long sys_ni_syscall /* old gtty syscall holder */ + .long sys_access + .long sys_nice + .long sys_ni_syscall /* 35 */ /* old ftime syscall holder */ + .long sys_sync + .long sys_kill + .long sys_rename + .long sys_mkdir + .long sys_rmdir /* 40 */ + .long sys_dup + .long sys_pipe + .long sys_times + .long sys_ni_syscall /* old prof syscall holder */ + .long sys_brk /* 45 */ + .long sys_setgid16 + .long sys_getgid16 + .long sys_signal + .long sys_geteuid16 + .long sys_getegid16 /* 50 */ + .long sys_acct + .long sys_umount /* recycled never used phys() */ + .long sys_ni_syscall /* old lock syscall holder */ + .long sys_ioctl + .long sys_fcntl /* 55 */ + .long sys_ni_syscall /* old mpx syscall holder */ + .long sys_setpgid + .long sys_ni_syscall /* old ulimit syscall holder */ + .long sys_ni_syscall + .long sys_umask /* 60 */ + .long sys_chroot + .long sys_ustat + .long sys_dup2 + .long sys_getppid + .long sys_getpgrp /* 65 */ + .long sys_setsid + .long sys_sigaction + .long sys_sgetmask + .long sys_ssetmask + .long sys_setreuid16 /* 70 */ + .long sys_setregid16 + .long sys_sigsuspend + .long sys_sigpending + .long sys_sethostname + .long sys_setrlimit /* 75 */ + .long sys_old_getrlimit + .long sys_getrusage + .long sys_gettimeofday + .long sys_settimeofday + .long sys_getgroups16 /* 80 */ + .long sys_setgroups16 + .long old_select + .long sys_symlink + .long sys_lstat + .long sys_readlink /* 85 */ + .long sys_uselib + .long sys_swapon + .long sys_reboot + .long old_readdir + .long old_mmap /* 90 */ + .long sys_munmap + .long sys_truncate + .long sys_ftruncate + .long sys_fchmod + .long sys_fchown16 /* 95 */ + .long sys_getpriority + .long sys_setpriority + .long sys_ni_syscall /* old profil syscall holder */ + .long sys_statfs + .long sys_fstatfs /* 100 */ + .long sys_ioperm + .long sys_socketcall + .long sys_syslog + .long sys_setitimer + .long sys_getitimer /* 105 */ + .long sys_newstat + .long sys_newlstat + .long sys_newfstat + .long sys_ni_syscall + .long sys_ni_syscall /* iopl for i386 */ /* 110 */ + .long sys_vhangup + .long sys_ni_syscall /* obsolete idle() syscall */ + .long sys_ni_syscall /* vm86old for i386 */ + .long sys_wait4 + .long sys_swapoff /* 115 */ + .long sys_sysinfo + .long sys_ipc + .long sys_fsync + .long sys_sigreturn + .long sys_clone /* 120 */ + .long sys_setdomainname + .long sys_newuname + .long sys_cacheflush /* modify_ldt for i386 */ + .long sys_adjtimex + .long sys_mprotect /* 125 */ + .long sys_sigprocmask + .long sys_create_module + .long sys_init_module + .long sys_delete_module + .long sys_get_kernel_syms /* 130 */ + .long sys_quotactl + .long sys_getpgid + .long sys_fchdir + .long sys_bdflush + .long sys_sysfs /* 135 */ + .long sys_personality + .long sys_ni_syscall /* for afs_syscall */ + .long sys_setfsuid16 + .long sys_setfsgid16 + .long sys_llseek /* 140 */ + .long sys_getdents + .long sys_select + .long sys_flock + .long sys_msync + .long sys_readv /* 145 */ + .long sys_writev + .long sys_getsid + .long sys_fdatasync + .long sys_sysctl + .long sys_mlock /* 150 */ + .long sys_munlock + .long sys_mlockall + .long sys_munlockall + .long sys_sched_setparam + .long sys_sched_getparam /* 155 */ + .long sys_sched_setscheduler + .long sys_sched_getscheduler + .long sys_sched_yield + .long sys_sched_get_priority_max + .long sys_sched_get_priority_min /* 160 */ + .long sys_sched_rr_get_interval + .long sys_nanosleep + .long sys_mremap + .long sys_setresuid16 + .long sys_getresuid16 /* 165 */ + .long sys_ni_syscall /* for vm86 */ + .long sys_query_module + .long sys_poll + .long sys_ni_syscall /*sys_nfsservctl*/ + .long sys_setresgid16 /* 170 */ + .long sys_getresgid16 + .long sys_prctl + .long sys_rt_sigreturn + .long sys_rt_sigaction + .long sys_rt_sigprocmask /* 175 */ + .long sys_rt_sigpending + .long sys_rt_sigtimedwait + .long sys_rt_sigqueueinfo + .long sys_rt_sigsuspend + .long sys_pread64 /* 180 */ + .long sys_pwrite64 + .long sys_lchown16 + .long sys_getcwd + .long sys_capget + .long sys_capset /* 185 */ + .long sys_sigaltstack + .long sys_sendfile + .long sys_ni_syscall /* streams1 */ + .long sys_ni_syscall /* streams2 */ + .long sys_vfork /* 190 */ + .long sys_getrlimit + .long sys_mmap2 + .long sys_truncate64 + .long sys_ftruncate64 + .long sys_stat64 /* 195 */ + .long sys_lstat64 + .long sys_fstat64 + .long sys_chown + .long sys_getuid + .long sys_getgid /* 200 */ + .long sys_geteuid + .long sys_getegid + .long sys_setreuid + .long sys_setregid + .long sys_getgroups /* 205 */ + .long sys_setgroups + .long sys_fchown + .long sys_setresuid + .long sys_getresuid + .long sys_setresgid /* 210 */ + .long sys_getresgid + .long sys_lchown + .long sys_setuid + .long sys_setgid + .long sys_setfsuid /* 215 */ + .long sys_setfsgid + + .space (NR_syscalls-216)*4 + +/*--------------------------------------------------------------------------*/ diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/5307/ints.c linux.2.5.40-ac2/arch/m68knommu/platform/5307/ints.c --- linux.2.5.40/arch/m68knommu/platform/5307/ints.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/5307/ints.c 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,251 @@ +/* + * linux/arch/m68knommu/platform/5307/ints.c -- General interrupt handling code + * + * Copyright (C) 1999-2002 Greg Ungerer (gerg@snapgear.com) + * Copyright (C) 1998 D. Jeff Dionne , + * Kenneth Albanowski , + * Copyright (C) 2000 Lineo Inc. (www.lineo.com) + * + * Based on: + * + * linux/arch/m68k/kernel/ints.c -- Linux/m68k general interrupt handling code + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive + * for more details. + */ + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +/* + * This table stores the address info for each vector handler. + */ +irq_handler_t irq_list[SYS_IRQS]; + +unsigned int *mach_kstat_irqs; + +/* The number of spurious interrupts */ +volatile unsigned int num_spurious; + +unsigned int local_bh_count[NR_CPUS]; +unsigned int local_irq_count[NR_CPUS]; + +static void default_irq_handler(int irq, void *ptr, struct pt_regs *regs) +{ +#if 1 + printk("%s(%d): default irq handler vec=%d [0x%x]\n", + __FILE__, __LINE__, irq, irq); +#endif +} + +/* + * void init_IRQ(void) + * + * Parameters: None + * + * Returns: Nothing + * + * This function should be called during kernel startup to initialize + * the IRQ handling routines. + */ + +void init_IRQ(void) +{ + int i; + + + for (i = 0; i < SYS_IRQS; i++) { + if (mach_default_handler) + irq_list[i].handler = (*mach_default_handler)[i]; + else + irq_list[i].handler = default_irq_handler; + irq_list[i].flags = IRQ_FLG_STD; + irq_list[i].dev_id = NULL; + irq_list[i].devname = NULL; + } + + if (mach_init_IRQ) + mach_init_IRQ (); + mach_kstat_irqs = &kstat.irqs[0][0]; +} + +int request_irq(unsigned int irq, void (*handler)(int, void *, struct pt_regs *), + unsigned long flags, const char *devname, void *dev_id) +{ + if (irq < 0 || irq >= NR_IRQS) { + printk("%s: Incorrect IRQ %d from %s\n", __FUNCTION__, + irq, devname); + return -ENXIO; + } + + if (!(irq_list[irq].flags & IRQ_FLG_STD)) { + if (irq_list[irq].flags & IRQ_FLG_LOCK) { + printk("%s: IRQ %d from %s is not replaceable\n", + __FUNCTION__, irq, irq_list[irq].devname); + return -EBUSY; + } + if (flags & IRQ_FLG_REPLACE) { + printk("%s: %s can't replace IRQ %d from %s\n", + __FUNCTION__, devname, irq, irq_list[irq].devname); + return -EBUSY; + } + } + + if (flags & IRQ_FLG_FAST) { + extern asmlinkage void fasthandler(void); + extern void set_evector(int vecnum, void (*handler)(void)); + set_evector(irq, fasthandler); + } + + irq_list[irq].handler = handler; + irq_list[irq].flags = flags; + irq_list[irq].dev_id = dev_id; + irq_list[irq].devname = devname; + return 0; +} + +void free_irq(unsigned int irq, void *dev_id) +{ + if (irq < 0 || irq >= NR_IRQS) { + printk("%s: Incorrect IRQ %d\n", __FUNCTION__, irq); + return; + } + + if (irq_list[irq].dev_id != dev_id) + printk("%s: Removing probably wrong IRQ %d from %s\n", + __FUNCTION__, irq, irq_list[irq].devname); + + if (irq_list[irq].flags & IRQ_FLG_FAST) { + extern asmlinkage void inthandler(void); + extern void set_evector(int vecnum, void (*handler)(void)); + set_evector(irq, inthandler); + } + + if (mach_default_handler) + irq_list[irq].handler = (*mach_default_handler)[irq]; + else + irq_list[irq].handler = default_irq_handler; + irq_list[irq].flags = IRQ_FLG_STD; + irq_list[irq].dev_id = NULL; + irq_list[irq].devname = NULL; +} + + +int sys_request_irq(unsigned int irq, + void (*handler)(int, void *, struct pt_regs *), + unsigned long flags, const char *devname, void *dev_id) +{ + if (irq < IRQ1 || irq > IRQ7) { + printk("%s: Incorrect IRQ %d from %s\n", + __FUNCTION__, irq, devname); + return -ENXIO; + } + +#if 0 + if (!(irq_list[irq].flags & IRQ_FLG_STD)) { + if (irq_list[irq].flags & IRQ_FLG_LOCK) { + printk("%s: IRQ %d from %s is not replaceable\n", + __FUNCTION__, irq, irq_list[irq].devname); + return -EBUSY; + } + if (!(flags & IRQ_FLG_REPLACE)) { + printk("%s: %s can't replace IRQ %d from %s\n", + __FUNCTION__, devname, irq, irq_list[irq].devname); + return -EBUSY; + } + } +#endif + + irq_list[irq].handler = handler; + irq_list[irq].flags = flags; + irq_list[irq].dev_id = dev_id; + irq_list[irq].devname = devname; + return 0; +} + +void sys_free_irq(unsigned int irq, void *dev_id) +{ + if (irq < IRQ1 || irq > IRQ7) { + printk("%s: Incorrect IRQ %d\n", __FUNCTION__, irq); + return; + } + + if (irq_list[irq].dev_id != dev_id) + printk("%s: Removing probably wrong IRQ %d from %s\n", + __FUNCTION__, irq, irq_list[irq].devname); + + irq_list[irq].handler = (*mach_default_handler)[irq]; + irq_list[irq].flags = 0; + irq_list[irq].dev_id = NULL; + // irq_list[irq].devname = default_names[irq]; +} + +/* + * Do we need these probe functions on the m68k? + * + * ... may be usefull with ISA devices + */ +unsigned long probe_irq_on (void) +{ + return 0; +} + +int probe_irq_off (unsigned long irqs) +{ + return 0; +} + +asmlinkage void process_int(unsigned long vec, struct pt_regs *fp) +{ + if (vec >= VEC_INT1 && vec <= VEC_INT7) { + vec -= VEC_SPUR; + kstat.irqs[0][vec]++; + irq_list[vec].handler(vec, irq_list[vec].dev_id, fp); + } else { + if (mach_process_int) + mach_process_int(vec, fp); + else + panic("Can't process interrupt vector %ld\n", vec); + return; + } +} + + +int show_interrupts(struct seq_file *p, void *v) +{ + int i; + + for (i = 0; i < NR_IRQS; i++) { + if (irq_list[i].flags & IRQ_FLG_STD) + continue; + + seq_printf(p, "%3d: %10u ", i, + (i ? kstat.irqs[0][i] : num_spurious)); + if (irq_list[i].flags & IRQ_FLG_LOCK) + seq_printf(p, "L "); + else + seq_printf(p, " "); + seq_printf(p, "%s\n", irq_list[i].devname); + } + + if (mach_get_irq_list) + mach_get_irq_list(p, v); + return(0); +} + +void init_irq_proc(void) +{ + /* Insert /proc/irq driver here */ +} + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/5307/Makefile linux.2.5.40-ac2/arch/m68knommu/platform/5307/Makefile --- linux.2.5.40/arch/m68knommu/platform/5307/Makefile 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/5307/Makefile 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,42 @@ +# +# Makefile for the linux kernel. +# +# Note! Dependencies are done automagically by 'make dep', which also +# removes any old dependencies. DON'T put your own dependencies here +# unless it's something special (ie not a .c file). +# + +ifdef CONFIG_FULLDEBUG + AFLAGS += -DDEBUGGER_COMPATIBLE_CACHE=1 +endif + +# +# +# If you want to play with the HW breakpoints then you will +# need to add define this, which will give you a stack backtrace +# on the console port whenever a DBG interrupt occurs. You have to +# set up you HW breakpoints to trigger a DBG interrupt: +# +# AFLAGS += -DTRAP_DBG_INTERRUPT +# EXTRA_CFLAGS += -DTRAP_DBG_INTERRUPT +# + +AFLAGS += -D__ASSEMBLY__ -I. + +all: $(BOARD)/crt0_$(MODEL).o entry.o platform.o +O_TARGET := platform.o +obj-y := entry.o config.o signal.o ints.o bios32.o + +$(BOARD)/crt0_$(MODEL).o: $(BOARD)/crt0_$(MODEL).S + +entry.o: entry.S m68k_defs.h + +m68k_defs.h: ../../kernel/m68k_defs.c ../../kernel/m68k_defs.head + rm -f m68k_defs.d + $(CC) $(filter-out -MD,$(CFLAGS)) -S ../../kernel/m68k_defs.c + cp ../../kernel/m68k_defs.head m68k_defs.h + grep '^#define' m68k_defs.s >> m68k_defs.h + rm m68k_defs.s +-include m68k_defs.d + +include $(TOPDIR)/Rules.make diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/5307/MP3/crt0_ram.S linux.2.5.40-ac2/arch/m68knommu/platform/5307/MP3/crt0_ram.S --- linux.2.5.40/arch/m68knommu/platform/5307/MP3/crt0_ram.S 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/5307/MP3/crt0_ram.S 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,173 @@ +/*****************************************************************************/ + +/* + * crt0_ram.S -- startup code for MCF5307 ColdFire based MP3. + * + * (C) Copyright 1999-2002, Greg Ungerer (gerg@snapgear.com). + * Copyright (C) 2000-2001 Lineo Inc. (www.lineo.com) + * + * 1999/02/24 Modified for the 5307 processor David W. Miller + */ + +/*****************************************************************************/ + +#include "linux/autoconf.h" +#include "asm/coldfire.h" +#include "asm/mcfsim.h" +#include "asm/nettel.h" + +/*****************************************************************************/ + +/* + * SnapGear/NETtel board memory setup. + */ +#define MEM_BASE 0x00000000 /* Memory base at address 0 */ +#define VBR_BASE MEM_BASE /* Vector address */ + +#if defined(CONFIG_RAM16MB) +#define MEM_SIZE 0x01000000 /* Memory size 16Mb */ +#else +#define MEM_SIZE 0x00800000 /* Memory size 8Mb */ +#endif + +/*****************************************************************************/ + +.global _start +.global _rambase +.global _ramvec +.global _ramstart +.global _ramend + +/*****************************************************************************/ + +.data + +/* + * Set up the usable of RAM stuff. Size of RAM is determined then + * an initial stack set up at the end. + */ +_rambase: +.long 0 +_ramvec: +.long 0 +_ramstart: +.long 0 +_ramend: +.long 0 + +/*****************************************************************************/ + +.text + +/* + * This is the codes first entry point. This is where it all + * begins... + */ + +_start: + nop /* Filler */ + move.w #0x2700, %sr /* No interrupts */ + + /* + * Disable watchdog timer. + */ + move.l #MCF_MBAR, %a0 /* Get MBAR address */ + clr.l %d0 /* Disable SWT */ + move.b %d0, MCFSIM_SYPCR(%a0) + move.b #0x55, %d0 /* Clear SWT as well */ + move.b %d0, MCFSIM_SWSR(%a0) + move.b #0xaa, %d0 + move.b %d0, MCFSIM_SWSR(%a0) + move.l #0xffffffff, %d0 /* Mask out all interrupts */ + move.l %d0, MCFSIM_IMR(%a0) + + /* + * Setup VBR here, otherwise buserror remap will not work. + * if dBug was active before (on my SBC with dBug 1.1 of Dec 16 1996) + * + * bkr@cut.de 19990306 + * + * Note: this is because dBUG points VBR to ROM, making vectors read + * only, so the bus trap can't be changed. (RS) + */ + move.l #VBR_BASE, %a7 /* Note VBR can't be read */ + movec %a7, %VBR + move.l %a7, _ramvec /* Set up vector addr */ + move.l %a7, _rambase /* Set up base RAM addr */ + + + /* + * Determine size of RAM, then set up initial stack. + */ + move.l #MEM_SIZE, %a0 + + move.l %a0, %d0 /* Mem end addr is in a0 */ + move.l %d0, %sp /* Set up initial stack ptr */ + move.l %d0, _ramend /* Set end ram addr */ + + /* + * Enable CPU internal cache. + */ + move.l #0x01000000, %d0 /* invalidate whole cache */ + movec %d0,%CACR + nop + + /* MUST be write-through for DMA to work... */ + /* This also makes this debugger safe */ + move.l #0x0000c000, %d0 /* Set SDRAM cached only */ + movec %d0, %ACR0 + move.l #0x00000000, %d0 /* No other regions cached */ + movec %d0, %ACR1 + + /* Enable cache */ + move.l #0xa0000200, %d0 + movec %d0,%CACR + nop + + /* + * Move ROM filesystem above bss :-) + */ + lea.l _sbss, %a0 /* Get start of bss */ + lea.l _ebss, %a1 /* Set up destination */ + move.l %a0, %a2 /* Copy of bss start */ + + move.l 8(%a0), %d0 /* Get size of ROMFS */ + addq.l #8, %d0 /* Allow for rounding */ + and.l #0xfffffffc, %d0 /* Whole words */ + + add.l %d0, %a0 /* Copy from end */ + add.l %d0, %a1 /* Copy from end */ + move.l %a1, _ramstart /* Set start of ram */ + +_copy_romfs: + move.l -(%a0), %d0 /* Copy dword */ + move.l %d0, -(%a1) + cmp.l %a0, %a2 /* Check if at end */ + bne _copy_romfs + + /* + * Zero out the bss region. + */ + lea.l _sbss, %a0 /* Get start of bss */ + lea.l _ebss, %a1 /* Get end of bss */ + clr.l %d0 /* Set value */ +_clear_bss: + move.l %d0, (%a0)+ /* Clear each word */ + cmp.l %a0, %a1 /* Check if at end */ + bne _clear_bss + + /* + * load the current task pointer and stack + */ + lea init_thread_union, %a0 + lea 0x2000(%a0), %sp + + /* + * Assember start up done, start code proper. + */ + jsr start_kernel /* Start Linux kernel */ + +_exit: + jmp _exit /* Should never get here */ + +/*****************************************************************************/ diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/5307/MP3/ram.ld linux.2.5.40-ac2/arch/m68knommu/platform/5307/MP3/ram.ld --- linux.2.5.40/arch/m68knommu/platform/5307/MP3/ram.ld 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/5307/MP3/ram.ld 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,72 @@ + +MEMORY { + ram : ORIGIN = 0x400, LENGTH = 0x1000000 +} + +jiffies = jiffies_64 + 4; + +SECTIONS { + + .text : { + _stext = . ; + *(.text) + *(.text.exit) + *(.text.lock) + *(.exitcall.exit) + *(.rodata) + . = ALIGN(0x4) ; + *(.kstrtab) + . = ALIGN(16); /* Exception table */ + __start___ex_table = .; + *(__ex_table) + __stop___ex_table = .; + + __start___ksymtab = .; /* Kernel symbol table */ + *(__ksymtab) + __stop___ksymtab = .; + . = ALIGN(4) ; + _etext = . ; + } > ram + + .data BLOCK(0x4) : { + _sdata = . ; + __data_start = . ; + *(.data) + *(.data.exit) + . = ALIGN(0x2000) ; + *(.data.init_task) + . = ALIGN(0x2000) ; + _edata = . ; + } > ram + + .init BLOCK(4096) : { + __init_begin = .; + *(.text.init) + *(.data.init) + . = ALIGN(16); + __setup_start = .; + *(.setup.init) + __setup_end = .; + __initcall_start = .; + *(.initcall1.init) + *(.initcall2.init) + *(.initcall3.init) + *(.initcall4.init) + *(.initcall5.init) + *(.initcall6.init) + *(.initcall7.init) + __initcall_end = . ; + . = ALIGN(4); + __init_end = .; + } > ram + + .bss BLOCK(0x4) : { + _sbss = . ; + *(.bss) + *(COMMON) + . = ALIGN(4) ; + _ebss = . ; + _end = . ; + } > ram +} + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/5307/NETtel/crt0_ram.S linux.2.5.40-ac2/arch/m68knommu/platform/5307/NETtel/crt0_ram.S --- linux.2.5.40/arch/m68knommu/platform/5307/NETtel/crt0_ram.S 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/5307/NETtel/crt0_ram.S 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,196 @@ +/*****************************************************************************/ + +/* + * crt0_ram.S -- startup code for MCF5307 ColdFire based NETtel. + * + * (C) Copyright 1999-2002, Greg Ungerer (gerg@snapgear.com). + * Copyright (C) 2000 Lineo Inc. (www.lineo.com) + * + * 1999/02/24 Modified for the 5307 processor David W. Miller + */ + +/*****************************************************************************/ + +#include "linux/autoconf.h" +#include "asm/coldfire.h" +#include "asm/mcfsim.h" +#include "asm/nettel.h" + +/*****************************************************************************/ + +/* + * SnapGear/NETtel board memory setup. + */ +#define MEM_BASE 0x00000000 /* Memory base at address 0 */ +#define VBR_BASE MEM_BASE /* Vector address */ + +#if defined(CONFIG_RAM16MB) +#define MEM_SIZE 0x01000000 /* Memory size 16Mb */ +#elif defined(CONFIG_RAM8MB) +#define MEM_SIZE 0x00800000 /* Memory size 8Mb */ +#else +#define MEM_SIZE 0x00400000 /* Memory size 4Mb */ +#endif + +/*****************************************************************************/ + +.global _start +.global _rambase +.global _ramvec +.global _ramstart +.global _ramend + +/*****************************************************************************/ + +.data + +/* + * Set up the usable of RAM stuff. Size of RAM is determined then + * an initial stack set up at the end. + */ +_rambase: +.long 0 +_ramvec: +.long 0 +_ramstart: +.long 0 +_ramend: +.long 0 + +/*****************************************************************************/ + +/* + * The NETtel platform has some funky LEDs! + */ +.global ppdata +ppdata: +.short 0x0000 + +.global ledbank +ledbank: +.byte 0xff + +/*****************************************************************************/ + +.text + +/* + * This is the codes first entry point. This is where it all + * begins... + */ + +_start: + nop /* Filler */ + move.w #0x2700, %sr /* No interrupts */ + + /* + * Set LEDs to known startup state. + */ + move.l #NETtel_LEDADDR, %a5 /* Addr of LED bank */ + move.b #0xff, (%a5) /* Turn them all off */ + + + /* + * Disable watchdog timer. + */ + move.l #MCF_MBAR, %a0 /* Get MBAR address */ + clr.l %d0 /* Disable SWT */ + move.b %d0, MCFSIM_SYPCR(%a0) + move.b #0x55, %d0 /* Clear SWT as well */ + move.b %d0, MCFSIM_SWSR(%a0) + move.b #0xaa, %d0 + move.b %d0, MCFSIM_SWSR(%a0) + move.l #0xffffffff, %d0 /* Mask out all interrupts */ + move.l %d0, MCFSIM_IMR(%a0) + + /* + * Setup VBR here, otherwise buserror remap will not work. + * if dBug was active before (on my SBC with dBug 1.1 of Dec 16 1996) + * + * bkr@cut.de 19990306 + * + * Note: this is because dBUG points VBR to ROM, making vectors read + * only, so the bus trap can't be changed. (RS) + */ + move.l #VBR_BASE, %a7 /* Note VBR can't be read */ + movec %a7, %VBR + move.l %a7, _ramvec /* Set up vector addr */ + move.l %a7, _rambase /* Set up base RAM addr */ + + + /* + * Determine size of RAM, then set up initial stack. + */ + move.l #MEM_SIZE, %a0 + + move.l %a0, %d0 /* Mem end addr is in a0 */ + move.l %d0, %sp /* Set up initial stack ptr */ + move.l %d0, _ramend /* Set end ram addr */ + + /* + * Enable CPU internal cache. + */ + move.l #0x01000000, %d0 /* invalidate whole cache */ + movec %d0,%CACR + nop +#ifdef DEBUGGER_COMPATIBLE_CACHE + move.l #0x0000c000, %d0 /* Set SDRAM cached only */ +#else + move.l #0x0000c020, %d0 /* Set SDRAM cached only (copyback) */ +#endif + movec %d0, %ACR0 + move.l #0x00000000, %d0 /* No other regions cached */ + movec %d0, %ACR1 + + /* Enable cache */ + move.l #0xa0000200, %d0 + movec %d0,%CACR + nop + + /* + * Move ROM filesystem above bss :-) + */ + lea.l _sbss, %a0 /* Get start of bss */ + lea.l _ebss, %a1 /* Set up destination */ + move.l %a0, %a2 /* Copy of bss start */ + + move.l 8(%a0), %d0 /* Get size of ROMFS */ + addq.l #8, %d0 /* Allow for rounding */ + and.l #0xfffffffc, %d0 /* Whole words */ + + add.l %d0, %a0 /* Copy from end */ + add.l %d0, %a1 /* Copy from end */ + move.l %a1, _ramstart /* Set start of ram */ + +_copy_romfs: + move.l -(%a0), %d0 /* Copy dword */ + move.l %d0, -(%a1) + cmp.l %a0, %a2 /* Check if at end */ + bne _copy_romfs + + /* + * Zero out the bss region. + */ + lea.l _sbss, %a0 /* Get start of bss */ + lea.l _ebss, %a1 /* Get end of bss */ + clr.l %d0 /* Set value */ +_clear_bss: + move.l %d0, (%a0)+ /* Clear each word */ + cmp.l %a0, %a1 /* Check if at end */ + bne _clear_bss + + /* + * load the current task pointer and stack + */ + lea init_thread_union, %a0 + lea 0x2000(%a0), %sp + + /* + * Assember start up done, start code proper. + */ + jsr start_kernel /* Start Linux kernel */ + +_exit: + jmp _exit /* Should never get here */ + +/*****************************************************************************/ diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/5307/NETtel/ram.ld linux.2.5.40-ac2/arch/m68knommu/platform/5307/NETtel/ram.ld --- linux.2.5.40/arch/m68knommu/platform/5307/NETtel/ram.ld 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/5307/NETtel/ram.ld 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,72 @@ + +MEMORY { + ram : ORIGIN = 0x400, LENGTH = 0x400000 +} + +jiffies = jiffies_64 + 4; + +SECTIONS { + + .text : { + _stext = . ; + *(.text) + *(.text.exit) + *(.text.lock) + *(.exitcall.exit) + *(.rodata) + . = ALIGN(0x4) ; + *(.kstrtab) + . = ALIGN(16); /* Exception table */ + __start___ex_table = .; + *(__ex_table) + __stop___ex_table = .; + + __start___ksymtab = .; /* Kernel symbol table */ + *(__ksymtab) + __stop___ksymtab = .; + . = ALIGN(4) ; + _etext = . ; + } > ram + + .data BLOCK(0x4) : { + _sdata = . ; + __data_start = . ; + *(.data) + *(.data.exit) + . = ALIGN(0x2000) ; + *(.data.init_task) + . = ALIGN(0x2000) ; + _edata = . ; + } > ram + + .init BLOCK(4096) : { + __init_begin = .; + *(.text.init) + *(.data.init) + . = ALIGN(16); + __setup_start = .; + *(.setup.init) + __setup_end = .; + __initcall_start = .; + *(.initcall1.init) + *(.initcall2.init) + *(.initcall3.init) + *(.initcall4.init) + *(.initcall5.init) + *(.initcall6.init) + *(.initcall7.init) + __initcall_end = .; + . = ALIGN(4) ; + __init_end = .; + } > ram + + .bss BLOCK(0x4) : { + _sbss = . ; + *(.bss) + *(COMMON) + . = ALIGN(4) ; + _ebss = . ; + _end = . ; + } > ram +} + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/5307/Rules.make linux.2.5.40-ac2/arch/m68knommu/platform/5307/Rules.make --- linux.2.5.40/arch/m68knommu/platform/5307/Rules.make 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/5307/Rules.make 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,38 @@ +# +# 5307/Makefile +# +# This file is included by the global makefile so that you can add your own +# platform-specific flags and dependencies. +# +# This file is subject to the terms and conditions of the GNU General Public +# License. See the file "COPYING" in the main directory of this archive +# for more details. +# +# Copyright (C) 1999 by Greg Ungerer (gerg@snapgear.com) +# Copyright (C) 1998,1999 D. Jeff Dionne +# Copyright (C) 1998 Kenneth Albanowski +# Copyright (C) 1994 by Hamish Macdonald +# Copyright (C) 2000 Lineo Inc. (www.lineo.com) + +GCC_DIR = $(shell $(CC) -v 2>&1 | grep specs | sed -e 's/.* \(.*\)specs/\1\./') + +INCGCC = $(GCC_DIR)/include +LIBGCC = $(GCC_DIR)/m5307/libgcc.a + +CFLAGS := -fno-builtin -nostdinc $(CFLAGS) -I$(INCGCC) -pipe -DCONFIG_NO_MMU -DNO_FPU -m5307 -Wa,-S -Wa,-m5307 -D__ELF__ -DUTS_SYSNAME=\"uClinux\" -D__linux__ +AFLAGS := $(CFLAGS) + +ifdef CONFIG_BDM_DISABLE + CFLAGS += -DMCF_BDM_DISABLE +endif + +LDFLAGS_vmlinux = -T arch/$(ARCH)/platform/$(PLATFORM)/$(BOARD)/$(MODEL).ld + +HEAD := arch/$(ARCH)/platform/$(PLATFORM)/$(BOARD)/crt0_$(MODEL).o + +SUBDIRS := arch/$(ARCH)/kernel arch/$(ARCH)/mm arch/$(ARCH)/lib \ + arch/$(ARCH)/platform/$(PLATFORM) $(SUBDIRS) +CORE_FILES := arch/$(ARCH)/kernel/kernel.o arch/$(ARCH)/mm/mm.o \ + arch/$(ARCH)/platform/$(PLATFORM)/platform.o $(CORE_FILES) +LIBS += arch/$(ARCH)/lib/lib.a $(LIBGCC) + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/5307/signal.c linux.2.5.40-ac2/arch/m68knommu/platform/5307/signal.c --- linux.2.5.40/arch/m68knommu/platform/5307/signal.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/5307/signal.c 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,1079 @@ +/* + * linux/arch/m68k/kernel/signal.c + * + * Copyright (C) 1991, 1992 Linus Torvalds + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive + * for more details. + */ + +/* + * Linux/m68k support by Hamish Macdonald + * + * 68060 fixes by Jesper Skov + * + * 1997-12-01 Modified for POSIX.1b signals by Andreas Schwab + * + * mathemu support by Roman Zippel + * (Note: fpstate in the signal context is completly ignored for the emulator + * and the internal floating point format is put on stack) + */ + +/* + * ++roman (07/09/96): implemented signal stacks (specially for tosemu on + * Atari :-) Current limitation: Only one sigstack can be active at one time. + * If a second signal with SA_ONSTACK set arrives while working on a sigstack, + * SA_ONSTACK is ignored. This behaviour avoids lots of trouble with nested + * signal handlers! + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP))) + +asmlinkage long sys_wait4(pid_t pid, unsigned int * stat_addr, int options, + struct rusage * ru); + +asmlinkage int do_signal(sigset_t *oldset, struct pt_regs *regs); + +#ifndef CONFIG_COLDFIRE +const int frame_extra_sizes[16] = { + 0, + -1, /* sizeof(((struct frame *)0)->un.fmt1), */ + sizeof(((struct frame *)0)->un.fmt2), + sizeof(((struct frame *)0)->un.fmt3), + sizeof(((struct frame *)0)->un.fmt4), + -1, /* sizeof(((struct frame *)0)->un.fmt5), */ + -1, /* sizeof(((struct frame *)0)->un.fmt6), */ + sizeof(((struct frame *)0)->un.fmt7), + -1, /* sizeof(((struct frame *)0)->un.fmt8), */ + sizeof(((struct frame *)0)->un.fmt9), + sizeof(((struct frame *)0)->un.fmta), + sizeof(((struct frame *)0)->un.fmtb), + -1, /* sizeof(((struct frame *)0)->un.fmtc), */ + -1, /* sizeof(((struct frame *)0)->un.fmtd), */ + -1, /* sizeof(((struct frame *)0)->un.fmte), */ + -1, /* sizeof(((struct frame *)0)->un.fmtf), */ +}; +#endif + +/* + * Atomically swap in the new signal mask, and wait for a signal. + */ +asmlinkage int do_sigsuspend(struct pt_regs *regs) +{ + old_sigset_t mask = regs->d3; + sigset_t saveset; + + mask &= _BLOCKABLE; + saveset = current->blocked; + siginitset(¤t->blocked, mask); + recalc_sigpending(); + + regs->d0 = -EINTR; + while (1) { + current->state = TASK_INTERRUPTIBLE; + schedule(); + if (do_signal(&saveset, regs)) + return -EINTR; + } +} + +asmlinkage int +do_rt_sigsuspend(struct pt_regs *regs) +{ + sigset_t *unewset = (sigset_t *)regs->d1; + size_t sigsetsize = (size_t)regs->d2; + sigset_t saveset, newset; + + /* XXX: Don't preclude handling different sized sigset_t's. */ + if (sigsetsize != sizeof(sigset_t)) + return -EINVAL; + + if (copy_from_user(&newset, unewset, sizeof(newset))) + return -EFAULT; + sigdelsetmask(&newset, ~_BLOCKABLE); + + saveset = current->blocked; + current->blocked = newset; + recalc_sigpending(); + + regs->d0 = -EINTR; + while (1) { + current->state = TASK_INTERRUPTIBLE; + schedule(); + if (do_signal(&saveset, regs)) + return -EINTR; + } +} + +asmlinkage int +sys_sigaction(int sig, const struct old_sigaction *act, + struct old_sigaction *oact) +{ + struct k_sigaction new_ka, old_ka; + int ret; + + if (act) { + old_sigset_t mask; + if (verify_area(VERIFY_READ, act, sizeof(*act)) || + __get_user(new_ka.sa.sa_handler, &act->sa_handler) || + __get_user(new_ka.sa.sa_restorer, &act->sa_restorer)) + return -EFAULT; + __get_user(new_ka.sa.sa_flags, &act->sa_flags); + __get_user(mask, &act->sa_mask); + siginitset(&new_ka.sa.sa_mask, mask); + } + + ret = do_sigaction(sig, act ? &new_ka : NULL, oact ? &old_ka : NULL); + + if (!ret && oact) { + if (verify_area(VERIFY_WRITE, oact, sizeof(*oact)) || + __put_user(old_ka.sa.sa_handler, &oact->sa_handler) || + __put_user(old_ka.sa.sa_restorer, &oact->sa_restorer)) + return -EFAULT; + __put_user(old_ka.sa.sa_flags, &oact->sa_flags); + __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask); + } + + return ret; +} + +asmlinkage int +sys_sigaltstack(const stack_t *uss, stack_t *uoss) +{ + return do_sigaltstack(uss, uoss, rdusp()); +} + + +/* + * Do a signal return; undo the signal stack. + * + * Keep the return code on the stack quadword aligned! + * That makes the cache flush below easier. + */ + +struct sigframe +{ + char *pretcode; + int sig; + int code; + struct sigcontext *psc; + char retcode[8]; + unsigned long extramask[_NSIG_WORDS-1]; + struct sigcontext sc; +}; + +struct rt_sigframe +{ + char *pretcode; + int sig; + struct siginfo *pinfo; + void *puc; + char retcode[8]; + struct siginfo info; + struct ucontext uc; +}; + +#ifndef NO_FPU + +static unsigned char fpu_version = 0; /* version number of fpu, set by setup_frame */ + +static inline int restore_fpu_state(struct sigcontext *sc) +{ + int err = 1; + + if (FPU_IS_EMU) { + /* restore registers */ + memcpy(current->thread.fpcntl, sc->sc_fpcntl, 12); + memcpy(current->thread.fp, sc->sc_fpregs, 24); + return 0; + } + + if (sc->sc_fpstate[0]) { + /* Verify the frame format. */ + if (sc->sc_fpstate[0] != fpu_version) + goto out; + + __asm__ volatile (".chip 68k/68881\n\t" + "fmovemx %0,%/fp0-%/fp1\n\t" + "fmoveml %1,%/fpcr/%/fpsr/%/fpiar\n\t" + ".chip 68k" + : /* no outputs */ + : "m" (*sc->sc_fpregs), "m" (*sc->sc_fpcntl)); + } + __asm__ volatile (".chip 68k/68881\n\t" + "frestore %0\n\t" + ".chip 68k" : : "m" (*sc->sc_fpstate)); + err = 0; + +out: + return err; +} + +#define FPCONTEXT_SIZE 216 +#define uc_fpstate uc_filler[0] +#define uc_formatvec uc_filler[FPCONTEXT_SIZE/4] +#define uc_extra uc_filler[FPCONTEXT_SIZE/4+1] + +static inline int rt_restore_fpu_state(struct ucontext *uc) +{ + unsigned char fpstate[FPCONTEXT_SIZE]; + int context_size = CPU_IS_060 ? 8 : 0; + fpregset_t fpregs; + int err = 1; + + if (FPU_IS_EMU) { + /* restore fpu control register */ + if (__copy_from_user(current->thread.fpcntl, + &uc->uc_mcontext.fpregs.f_pcr, 12)) + goto out; + /* restore all other fpu register */ + if (__copy_from_user(current->thread.fp, + uc->uc_mcontext.fpregs.f_fpregs, 96)) + goto out; + return 0; + } + + if (__get_user(*(long *)fpstate, (long *)&uc->uc_fpstate)) + goto out; + if (fpstate[0]) { + context_size = fpstate[1]; + + /* Verify the frame format. */ + if (fpstate[0] != fpu_version) + goto out; + if (__copy_from_user(&fpregs, &uc->uc_mcontext.fpregs, + sizeof(fpregs))) + goto out; + __asm__ volatile (".chip 68k/68881\n\t" + "fmovemx %0,%/fp0-%/fp7\n\t" + "fmoveml %1,%/fpcr/%/fpsr/%/fpiar\n\t" + ".chip 68k" + : /* no outputs */ + : "m" (*fpregs.f_fpregs), + "m" (fpregs.f_pcr)); + } + if (context_size && + __copy_from_user(fpstate + 4, (long *)&uc->uc_fpstate + 1, + context_size)) + goto out; + __asm__ volatile (".chip 68k/68881\n\t" + "frestore %0\n\t" + ".chip 68k" : : "m" (*fpstate)); + err = 0; + +out: + return err; +} + +#endif + +static inline int +restore_sigcontext(struct pt_regs *regs, struct sigcontext *usc, void *fp, + int *pd0) +{ +#ifndef CONFIG_COLDFIRE + int fsize; +#endif + int formatvec; + struct sigcontext context; + int err = 0; + + /* get previous context */ + if (copy_from_user(&context, usc, sizeof(context))) + goto badframe; + + /* restore passed registers */ + regs->d1 = context.sc_d1; + regs->a0 = context.sc_a0; + regs->a1 = context.sc_a1; + regs->sr = (regs->sr & 0xff00) | (context.sc_sr & 0xff); + regs->pc = context.sc_pc; + regs->orig_d0 = -1; /* disable syscall checks */ + wrusp(context.sc_usp); + formatvec = context.sc_formatvec; + regs->format = formatvec >> 12; + regs->vector = formatvec & 0xfff; + +#ifndef NO_FPU + err = restore_fpu_state(&context); +#endif + +#ifndef CONFIG_COLDFIRE /* has no extra crap */ + fsize = frame_extra_sizes[regs->format]; + if (fsize < 0) { + /* + * user process trying to return with weird frame format + */ +#if DEBUG + printk("user process returning with weird frame format\n"); +#endif + goto badframe; + } + + /* OK. Make room on the supervisor stack for the extra junk, + * if necessary. + */ + + if (fsize) { + struct switch_stack *sw = (struct switch_stack *)regs - 1; + regs->d0 = context.sc_d0; +#define frame_offset (sizeof(struct pt_regs)+sizeof(struct switch_stack)) + __asm__ __volatile__ + (" movel %0,%/a0\n\t" + " subl %1,%/a0\n\t" /* make room on stack */ + " movel %/a0,%/sp\n\t" /* set stack pointer */ + /* move switch_stack and pt_regs */ + "1: movel %0@+,%/a0@+\n\t" + " dbra %2,1b\n\t" + " lea %/sp@(%c3),%/a0\n\t" /* add offset of fmt */ + " lsrl #2,%1\n\t" + " subql #1,%1\n\t" + "2: movesl %4@+,%2\n\t" + "3: movel %2,%/a0@+\n\t" + " dbra %1,2b\n\t" + " bral " SYMBOL_NAME_STR(ret_from_signal) "\n" + "4:\n" + ".section __ex_table,\"a\"\n" + " .align 4\n" + " .long 2b,4b\n" + " .long 3b,4b\n" + ".previous" + : /* no outputs, it doesn't ever return */ + : "a" (sw), "d" (fsize), "d" (frame_offset/4-1), + "n" (frame_offset), "a" (fp) + : "a0"); +#undef frame_offset + /* + * If we ever get here an exception occurred while + * building the above stack-frame. + */ + goto badframe; + } +#endif /* CONFIG_COLDFIRE */ + + *pd0 = context.sc_d0; + return err; + +badframe: + return 1; +} + +static inline int +rt_restore_ucontext(struct pt_regs *regs, struct switch_stack *sw, + struct ucontext *uc, int *pd0) +{ +#ifndef CONFIG_COLDFIRE + int fsize; +#endif + int temp; + greg_t *gregs = uc->uc_mcontext.gregs; + unsigned long usp; + int err; + + err = __get_user(temp, &uc->uc_mcontext.version); + if (temp != MCONTEXT_VERSION) + goto badframe; + /* restore passed registers */ + err |= __get_user(regs->d0, &gregs[0]); + err |= __get_user(regs->d1, &gregs[1]); + err |= __get_user(regs->d2, &gregs[2]); + err |= __get_user(regs->d3, &gregs[3]); + err |= __get_user(regs->d4, &gregs[4]); + err |= __get_user(regs->d5, &gregs[5]); + err |= __get_user(sw->d6, &gregs[6]); + err |= __get_user(sw->d7, &gregs[7]); + err |= __get_user(regs->a0, &gregs[8]); + err |= __get_user(regs->a1, &gregs[9]); + err |= __get_user(regs->a2, &gregs[10]); + err |= __get_user(sw->a3, &gregs[11]); + err |= __get_user(sw->a4, &gregs[12]); + err |= __get_user(sw->a5, &gregs[13]); + err |= __get_user(sw->a6, &gregs[14]); + err |= __get_user(usp, &gregs[15]); + wrusp(usp); + err |= __get_user(regs->pc, &gregs[16]); + err |= __get_user(temp, &gregs[17]); + regs->sr = (regs->sr & 0xff00) | (temp & 0xff); + regs->orig_d0 = -1; /* disable syscall checks */ + regs->format = temp >> 12; + regs->vector = temp & 0xfff; + + if (do_sigaltstack(&uc->uc_stack, NULL, usp) == -EFAULT) + goto badframe; + +#ifndef CONFIG_COLDFIRE + fsize = frame_extra_sizes[regs->format]; + if (fsize < 0) { + /* + * user process trying to return with weird frame format + */ +#if DEBUG + printk("user process returning with weird frame format\n"); +#endif + goto badframe; + } + + /* OK. Make room on the supervisor stack for the extra junk, + * if necessary. + */ + + if (fsize) { +#define frame_offset (sizeof(struct pt_regs)+sizeof(struct switch_stack)) + __asm__ __volatile__ + (" movel %0,%/a0\n\t" + " subl %1,%/a0\n\t" /* make room on stack */ + " movel %/a0,%/sp\n\t" /* set stack pointer */ + /* move switch_stack and pt_regs */ + "1: movel %0@+,%/a0@+\n\t" + " dbra %2,1b\n\t" + " lea %/sp@(%c3),%/a0\n\t" /* add offset of fmt */ + " lsrl #2,%1\n\t" + " subql #1,%1\n\t" + "2: movesl %4@+,%2\n\t" + "3: movel %2,%/a0@+\n\t" + " dbra %1,2b\n\t" + " bral " SYMBOL_NAME_STR(ret_from_signal) "\n" + "4:\n" + ".section __ex_table,\"a\"\n" + " .align 4\n" + " .long 2b,4b\n" + " .long 3b,4b\n" + ".previous" + : /* no outputs, it doesn't ever return */ + : "a" (sw), "d" (fsize), "d" (frame_offset/4-1), + "n" (frame_offset), "a" (&uc->uc_extra) + : "a0"); +#undef frame_offset + /* + * If we ever get here an exception occurred while + * building the above stack-frame. + */ + goto badframe; + } +#endif /* CONFIG_COLDFIRE */ + + *pd0 = regs->d0; + return err; + +badframe: + return 1; +} + +asmlinkage int do_sigreturn(unsigned long __unused) +{ + struct switch_stack *sw = (struct switch_stack *) &__unused; + struct pt_regs *regs = (struct pt_regs *) (sw + 1); + unsigned long usp = rdusp(); + struct sigframe *frame = (struct sigframe *)(usp - 4); + sigset_t set; + int d0; + + if (verify_area(VERIFY_READ, frame, sizeof(*frame))) + goto badframe; + if (__get_user(set.sig[0], &frame->sc.sc_mask) || + (_NSIG_WORDS > 1 && + __copy_from_user(&set.sig[1], &frame->extramask, + sizeof(frame->extramask)))) + goto badframe; + + sigdelsetmask(&set, ~_BLOCKABLE); + current->blocked = set; + recalc_sigpending(); + + if (restore_sigcontext(regs, &frame->sc, frame + 1, &d0)) + goto badframe; + return d0; + +badframe: + force_sig(SIGSEGV, current); + return 0; +} + +asmlinkage int do_rt_sigreturn(unsigned long __unused) +{ + struct switch_stack *sw = (struct switch_stack *) &__unused; + struct pt_regs *regs = (struct pt_regs *) (sw + 1); + unsigned long usp = rdusp(); + struct rt_sigframe *frame = (struct rt_sigframe *)(usp - 4); + sigset_t set; + int d0; + + if (verify_area(VERIFY_READ, frame, sizeof(*frame))) + goto badframe; + if (__copy_from_user(&set, &frame->uc.uc_sigmask, sizeof(set))) + goto badframe; + + sigdelsetmask(&set, ~_BLOCKABLE); + current->blocked = set; + recalc_sigpending(); + + if (rt_restore_ucontext(regs, sw, &frame->uc, &d0)) + goto badframe; + return d0; + +badframe: + force_sig(SIGSEGV, current); + return 0; +} + +#ifndef NO_FPU +/* + * Set up a signal frame. + */ + +static inline void save_fpu_state(struct sigcontext *sc, struct pt_regs *regs) +{ + if (FPU_IS_EMU) { + /* save registers */ + memcpy(sc->sc_fpcntl, current->thread.fpcntl, 12); + memcpy(sc->sc_fpregs, current->thread.fp, 24); + return; + } + + __asm__ volatile (".chip 68k/68881\n\t" + "fsave %0\n\t" + ".chip 68k" + : : "m" (*sc->sc_fpstate) : "memory"); + + if (CPU_IS_060 ? sc->sc_fpstate[2] : sc->sc_fpstate[0]) { + fpu_version = sc->sc_fpstate[0]; + if (CPU_IS_020_OR_030 && + regs->vector >= (VEC_FPBRUC * 4) && + regs->vector <= (VEC_FPNAN * 4)) { + /* Clear pending exception in 68882 idle frame */ + if (*(unsigned short *) sc->sc_fpstate == 0x1f38) + sc->sc_fpstate[0x38] |= 1 << 3; + } + __asm__ volatile (".chip 68k/68881\n\t" + "fmovemx %/fp0-%/fp1,%0\n\t" + "fmoveml %/fpcr/%/fpsr/%/fpiar,%1\n\t" + ".chip 68k" + : /* no outputs */ + : "m" (*sc->sc_fpregs), + "m" (*sc->sc_fpcntl) + : "memory"); + } +} + +static inline int rt_save_fpu_state(struct ucontext *uc, struct pt_regs *regs) +{ + unsigned char fpstate[FPCONTEXT_SIZE]; + int context_size = CPU_IS_060 ? 8 : 0; + int err = 0; + + if (FPU_IS_EMU) { + /* save fpu control register */ + err |= copy_to_user(&uc->uc_mcontext.fpregs.f_pcr, + current->thread.fpcntl, 12); + /* save all other fpu register */ + err |= copy_to_user(uc->uc_mcontext.fpregs.f_fpregs, + current->thread.fp, 96); + return err; + } + + __asm__ volatile (".chip 68k/68881\n\t" + "fsave %0\n\t" + ".chip 68k" + : : "m" (*fpstate) : "memory"); + + err |= __put_user(*(long *)fpstate, (long *)&uc->uc_fpstate); + if (CPU_IS_060 ? fpstate[2] : fpstate[0]) { + fpregset_t fpregs; + if (!CPU_IS_060) + context_size = fpstate[1]; + fpu_version = fpstate[0]; + if (CPU_IS_020_OR_030 && + regs->vector >= (VEC_FPBRUC * 4) && + regs->vector <= (VEC_FPNAN * 4)) { + /* Clear pending exception in 68882 idle frame */ + if (*(unsigned short *) fpstate == 0x1f38) + fpstate[0x38] |= 1 << 3; + } + __asm__ volatile (".chip 68k/68881\n\t" + "fmovemx %/fp0-%/fp7,%0\n\t" + "fmoveml %/fpcr/%/fpsr/%/fpiar,%1\n\t" + ".chip 68k" + : /* no outputs */ + : "m" (*fpregs.f_fpregs), + "m" (fpregs.f_pcr) + : "memory"); + err |= copy_to_user(&uc->uc_mcontext.fpregs, &fpregs, + sizeof(fpregs)); + } + if (context_size) + err |= copy_to_user((long *)&uc->uc_fpstate + 1, fpstate + 4, + context_size); + return err; +} + +#endif + +static void setup_sigcontext(struct sigcontext *sc, struct pt_regs *regs, + unsigned long mask) +{ + sc->sc_mask = mask; + sc->sc_usp = rdusp(); + sc->sc_d0 = regs->d0; + sc->sc_d1 = regs->d1; + sc->sc_a0 = regs->a0; + sc->sc_a1 = regs->a1; + sc->sc_sr = regs->sr; + sc->sc_pc = regs->pc; + sc->sc_formatvec = regs->format << 12 | regs->vector; +#ifndef NO_FPU + save_fpu_state(sc, regs); +#endif +} + +static inline int rt_setup_ucontext(struct ucontext *uc, struct pt_regs *regs) +{ + struct switch_stack *sw = (struct switch_stack *)regs - 1; + greg_t *gregs = uc->uc_mcontext.gregs; + int err = 0; + + err |= __put_user(MCONTEXT_VERSION, &uc->uc_mcontext.version); + err |= __put_user(regs->d0, &gregs[0]); + err |= __put_user(regs->d1, &gregs[1]); + err |= __put_user(regs->d2, &gregs[2]); + err |= __put_user(regs->d3, &gregs[3]); + err |= __put_user(regs->d4, &gregs[4]); + err |= __put_user(regs->d5, &gregs[5]); + err |= __put_user(sw->d6, &gregs[6]); + err |= __put_user(sw->d7, &gregs[7]); + err |= __put_user(regs->a0, &gregs[8]); + err |= __put_user(regs->a1, &gregs[9]); + err |= __put_user(regs->a2, &gregs[10]); + err |= __put_user(sw->a3, &gregs[11]); + err |= __put_user(sw->a4, &gregs[12]); + err |= __put_user(sw->a5, &gregs[13]); + err |= __put_user(sw->a6, &gregs[14]); + err |= __put_user(rdusp(), &gregs[15]); + err |= __put_user(regs->pc, &gregs[16]); + err |= __put_user(regs->sr, &gregs[17]); +#ifndef NO_FPU + err |= rt_save_fpu_state(uc, regs); +#endif + return err; +} + +static inline void push_cache (unsigned long vaddr) +{ +} + +static inline void * +get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size) +{ + unsigned long usp; + + /* Default to using normal stack. */ + usp = rdusp(); + + /* This is the X/Open sanctioned signal stack switching. */ + if (ka->sa.sa_flags & SA_ONSTACK) { + if (!on_sig_stack(usp)) + usp = current->sas_ss_sp + current->sas_ss_size; + } + return (void *)((usp - frame_size) & -8UL); +} + +static void setup_frame (int sig, struct k_sigaction *ka, + sigset_t *set, struct pt_regs *regs) +{ + struct sigframe *frame; +#ifndef CONFIG_COLDFIRE + int fsize = frame_extra_sizes[regs->format]; +#endif + struct sigcontext context; + int err = 0; + +#ifndef CONFIG_COLDFIRE + if (fsize < 0) { +#ifdef DEBUG + printk ("setup_frame: Unknown frame format %#x\n", + regs->format); +#endif + goto give_sigsegv; + } + + frame = get_sigframe(ka, regs, sizeof(*frame) + fsize); + + if (fsize) { + err |= copy_to_user (frame + 1, regs + 1, fsize); + regs->stkadj = fsize; + } +#else /* ! CONFIG_COLDFIRE */ + frame = get_sigframe(ka, regs, sizeof(*frame)); +#endif /* ! CONFIG_COLDFIRE */ + + err |= __put_user((current_thread_info()->exec_domain + && current_thread_info()->exec_domain->signal_invmap + && sig < 32 + ? current_thread_info()->exec_domain->signal_invmap[sig] + : sig), + &frame->sig); + + err |= __put_user(regs->vector, &frame->code); + err |= __put_user(&frame->sc, &frame->psc); + + if (_NSIG_WORDS > 1) + err |= copy_to_user(frame->extramask, &set->sig[1], + sizeof(frame->extramask)); + + setup_sigcontext(&context, regs, set->sig[0]); + err |= copy_to_user (&frame->sc, &context, sizeof(context)); + + /* Set up to return from userspace. */ + err |= __put_user(frame->retcode, &frame->pretcode); + /* moveq #,d0; trap #0 */ + err |= __put_user(0x70004e40 + (__NR_sigreturn << 16), + (long *)(frame->retcode)); + + if (err) + goto give_sigsegv; + + push_cache ((unsigned long) &frame->retcode); + + /* Set up registers for signal handler */ + wrusp ((unsigned long) frame); + regs->pc = (unsigned long) ka->sa.sa_handler; + +adjust_stack: + /* Prepare to skip over the extra stuff in the exception frame. */ + if (regs->stkadj) { + struct pt_regs *tregs = + (struct pt_regs *)((ulong)regs + regs->stkadj); +#if DEBUG + printk("Performing stackadjust=%04x\n", regs->stkadj); +#endif + /* This must be copied with decreasing addresses to + handle overlaps. */ + tregs->vector = 0; + tregs->format = 0; + tregs->pc = regs->pc; + tregs->sr = regs->sr; + } + return; + +give_sigsegv: + if (sig == SIGSEGV) + ka->sa.sa_handler = SIG_DFL; + force_sig(SIGSEGV, current); + goto adjust_stack; +} + +static void setup_rt_frame (int sig, struct k_sigaction *ka, siginfo_t *info, + sigset_t *set, struct pt_regs *regs) +{ + struct rt_sigframe *frame; +#ifndef CONFIG_COLDFIRE + int fsize = frame_extra_sizes[regs->format]; +#endif + int err = 0; + +#ifndef CONFIG_COLDFIRE + if (fsize < 0) { +#ifdef DEBUG + printk ("setup_frame: Unknown frame format %#x\n", + regs->format); +#endif + goto give_sigsegv; + } +#endif + + frame = get_sigframe(ka, regs, sizeof(*frame)); + +#ifndef CONFIG_COLDFIRE + if (fsize) { + err |= copy_to_user (&frame->uc.uc_extra, regs + 1, fsize); + regs->stkadj = fsize; + } +#endif + + err |= __put_user((current_thread_info()->exec_domain + && current_thread_info()->exec_domain->signal_invmap + && sig < 32 + ? current_thread_info()->exec_domain->signal_invmap[sig] + : sig), + &frame->sig); + err |= __put_user(&frame->info, &frame->pinfo); + err |= __put_user(&frame->uc, &frame->puc); + err |= copy_siginfo_to_user(&frame->info, info); + + /* Create the ucontext. */ + err |= __put_user(0, &frame->uc.uc_flags); + err |= __put_user(0, &frame->uc.uc_link); + err |= __put_user((void *)current->sas_ss_sp, + &frame->uc.uc_stack.ss_sp); + err |= __put_user(sas_ss_flags(rdusp()), + &frame->uc.uc_stack.ss_flags); + err |= __put_user(current->sas_ss_size, &frame->uc.uc_stack.ss_size); + err |= rt_setup_ucontext(&frame->uc, regs); + err |= copy_to_user (&frame->uc.uc_sigmask, set, sizeof(*set)); + + /* Set up to return from userspace. */ + err |= __put_user(frame->retcode, &frame->pretcode); + /* moveq #,d0; notb d0; trap #0 */ + err |= __put_user(0x70004600 + ((__NR_rt_sigreturn ^ 0xff) << 16), + (long *)(frame->retcode + 0)); + err |= __put_user(0x4e40, (short *)(frame->retcode + 4)); + + if (err) + goto give_sigsegv; + + push_cache ((unsigned long) &frame->retcode); + + /* Set up registers for signal handler */ + wrusp ((unsigned long) frame); + regs->pc = (unsigned long) ka->sa.sa_handler; + +adjust_stack: + /* Prepare to skip over the extra stuff in the exception frame. */ + if (regs->stkadj) { + struct pt_regs *tregs = + (struct pt_regs *)((ulong)regs + regs->stkadj); +#if DEBUG + printk("Performing stackadjust=%04x\n", regs->stkadj); +#endif + /* This must be copied with decreasing addresses to + handle overlaps. */ + tregs->vector = 0; + tregs->format = 0; + tregs->pc = regs->pc; + tregs->sr = regs->sr; + } + return; + +give_sigsegv: + if (sig == SIGSEGV) + ka->sa.sa_handler = SIG_DFL; + force_sig(SIGSEGV, current); + goto adjust_stack; +} + +static inline void +handle_restart(struct pt_regs *regs, struct k_sigaction *ka, int has_handler) +{ + switch (regs->d0) { + case -ERESTARTNOHAND: + if (!has_handler) + goto do_restart; + regs->d0 = -EINTR; + break; + + case -ERESTARTSYS: + if (has_handler && !(ka->sa.sa_flags & SA_RESTART)) { + regs->d0 = -EINTR; + break; + } + /* fallthrough */ + case -ERESTARTNOINTR: + do_restart: + regs->d0 = regs->orig_d0; + regs->pc -= 2; + break; + } +} + +/* + * OK, we're invoking a handler + */ +static void +handle_signal(int sig, struct k_sigaction *ka, siginfo_t *info, + sigset_t *oldset, struct pt_regs *regs) +{ + /* are we from a system call? */ + if (regs->orig_d0 >= 0) + /* If so, check system call restarting.. */ + handle_restart(regs, ka, 1); + + /* set up the stack frame */ + if (ka->sa.sa_flags & SA_SIGINFO) + setup_rt_frame(sig, ka, info, oldset, regs); + else + setup_frame(sig, ka, oldset, regs); + + if (ka->sa.sa_flags & SA_ONESHOT) + ka->sa.sa_handler = SIG_DFL; + + sigorsets(¤t->blocked,¤t->blocked,&ka->sa.sa_mask); + if (!(ka->sa.sa_flags & SA_NODEFER)) + sigaddset(¤t->blocked,sig); + recalc_sigpending(); +} + +/* + * Note that 'init' is a special process: it doesn't get signals it doesn't + * want to handle. Thus you cannot kill init even with a SIGKILL even by + * mistake. + * + * Note that we go through the signals twice: once to check the signals + * that the kernel can handle, and then we build all the user-level signal + * handling stack-frames in one go after that. + */ +asmlinkage int do_signal(sigset_t *oldset, struct pt_regs *regs) +{ + siginfo_t info; + struct k_sigaction *ka; + + current->thread.esp0 = (unsigned long) regs; + + if (!oldset) + oldset = ¤t->blocked; + + for (;;) { + int signr; + + signr = dequeue_signal(¤t->pending, ¤t->blocked, &info); + + if (!signr) + break; + + if ((current->ptrace & PT_PTRACED) && signr != SIGKILL) { + current->exit_code = signr; + current->state = TASK_STOPPED; + regs->sr &= ~PS_T; + + /* Did we come from a system call? */ + if (regs->orig_d0 >= 0) { + /* Restart the system call the same way as + if the process were not traced. */ + struct k_sigaction *ka = + ¤t->sig->action[signr-1]; + int has_handler = + (ka->sa.sa_handler != SIG_IGN && + ka->sa.sa_handler != SIG_DFL); + handle_restart(regs, ka, has_handler); + } + notify_parent(current, SIGCHLD); + schedule(); + + /* We're back. Did the debugger cancel the sig? */ + if (!(signr = current->exit_code)) { + discard_frame: +#ifndef CONFIG_COLDFIRE + /* Make sure that a faulted bus cycle isn't + restarted (only needed on the 680[23]0). */ + if (regs->format == 10 || regs->format == 11) + regs->stkadj = frame_extra_sizes[regs->format]; +#endif + continue; + } + current->exit_code = 0; + + /* The debugger continued. Ignore SIGSTOP. */ + if (signr == SIGSTOP) + goto discard_frame; + + /* Update the siginfo structure. Is this good? */ + if (signr != info.si_signo) { + info.si_signo = signr; + info.si_errno = 0; + info.si_code = SI_USER; + info.si_pid = current->parent->pid; + info.si_uid = current->parent->uid; + } + + /* If the (new) signal is now blocked, requeue it. */ + if (sigismember(¤t->blocked, signr)) { + send_sig_info(signr, &info, current); + continue; + } + } + + ka = ¤t->sig->action[signr-1]; + if (ka->sa.sa_handler == SIG_IGN) { + if (signr != SIGCHLD) + continue; + /* Check for SIGCHLD: it's special. */ + while (sys_wait4(-1, NULL, WNOHANG, NULL) > 0) + /* nothing */; + continue; + } + + if (ka->sa.sa_handler == SIG_DFL) { + int exit_code = signr; + + if (current->pid == 1) + continue; + + switch (signr) { + case SIGCONT: case SIGCHLD: + case SIGWINCH: case SIGURG: + continue; + + case SIGTSTP: case SIGTTIN: case SIGTTOU: + if (is_orphaned_pgrp(current->pgrp)) + continue; + /* FALLTHRU */ + + case SIGSTOP: + current->state = TASK_STOPPED; + current->exit_code = signr; + if (!(current->parent->sig->action[SIGCHLD-1] + .sa.sa_flags & SA_NOCLDSTOP)) + notify_parent(current, SIGCHLD); + schedule(); + continue; + + case SIGQUIT: case SIGILL: case SIGTRAP: + case SIGIOT: case SIGFPE: case SIGSEGV: + case SIGBUS: case SIGSYS: case SIGXCPU: case SIGXFSZ: + if (do_coredump(signr, regs)) + exit_code |= 0x80; + /* FALLTHRU */ + + default: + sigaddset(¤t->pending.signal, signr); + recalc_sigpending(); + current->flags |= PF_SIGNALED; + do_exit(exit_code); + /* NOTREACHED */ + } + } + + /* Whee! Actually deliver the signal. */ + handle_signal(signr, ka, &info, oldset, regs); + return 1; + } + + /* Did we come from a system call? */ + if (regs->orig_d0 >= 0) + /* Restart the system call - no handlers present */ + handle_restart(regs, NULL, 0); + + /* If we are about to discard some frame stuff we must copy + over the remaining frame. */ + if (regs->stkadj) { + struct pt_regs *tregs = + (struct pt_regs *) ((ulong) regs + regs->stkadj); + + /* This must be copied with decreasing addresses to + handle overlaps. */ + tregs->vector = 0; + tregs->format = 0; + tregs->pc = regs->pc; + tregs->sr = regs->sr; + } + return 0; +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/5407/CLEOPATRA/crt0_ram.S linux.2.5.40-ac2/arch/m68knommu/platform/5407/CLEOPATRA/crt0_ram.S --- linux.2.5.40/arch/m68knommu/platform/5407/CLEOPATRA/crt0_ram.S 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/5407/CLEOPATRA/crt0_ram.S 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,173 @@ +/*****************************************************************************/ + +/* + * crt0_ram.S -- startup code for Feith Cleopatra 2 board. + * + * (C) Copyright 2001, Roman Wagner. + * + * 1999/02/24 Modified for the 5307 processor David W. Miller + */ + +/*****************************************************************************/ + +#include "linux/autoconf.h" +#include "asm/coldfire.h" +#include "asm/mcfsim.h" + +/*****************************************************************************/ + +/* + * Feith CLEOPATRA board, chip select and memory setup. +*/ + +#define MEM_BASE 0x00000000 /* Memory base at address 0 */ +#define VBR_BASE MEM_BASE /* Vector address */ + +#define MEM_SIZE 0x01000000 /* Memory size 16Mb */ + +/*****************************************************************************/ + +.global _start +.global _rambase +.global _ramvec +.global _ramstart +.global _ramend + +/*****************************************************************************/ + +.data + +/* + * Set up the usable of RAM stuff. Size of RAM is determined then + * an initial stack set up at the end. + */ +_rambase: +.long 0 +_ramvec: +.long 0 +_ramstart: +.long 0 +_ramend: +.long 0 + +/*****************************************************************************/ + +.text + +/* + * This is the codes first entry point. This is where it all + * begins... + */ + +_start: + nop /* Filler */ + move.w #0x2700, %sr /* No interrupts */ + + + /* + * Setup VBR here, otherwise buserror remap will not work. + * if dBug was active before (on my SBC with dBug 1.1 of Dec 16 1996) + * + * bkr@cut.de 19990306 + * + * Note: this is because dBUG points VBR to ROM, making vectors read + * only, so the bus trap can't be changed. (RS) + */ + move.l #VBR_BASE, %a7 /* Note VBR can't be read */ + movec %a7, %VBR + move.l %a7, _ramvec /* Set up vector addr */ + move.l %a7, _rambase /* Set up base RAM addr */ + + /* + * Determine size of RAM, then set up initial stack. + */ +/* + * The current version of the 5307 processor + * SWT does not work. Probing invalid addresses + * will hang the system. + * + * For now, set the memory size to 8 meg + */ + move.l #MEM_SIZE, %a0 + + move.l %a0, %d0 /* Mem end addr is in a0 */ + move.l %d0, %sp /* Set up initial stack ptr */ + move.l %d0, _ramend /* Set end ram addr */ + + + /* + * Enable CPU internal cache. + */ + move.l #0x01040100, %d0 /* Invalidate whole cache */ + movec %d0,%CACR + nop + + /* make region ROM cachable (turn off for flash programming?) */ + /* 0xff000000 - 0xffffffff */ + move.l #(0xff< ram + + .data BLOCK(0x4) : { + _sdata = . ; + __data_start = . ; + *(.data) + *(.data.exit) + . = ALIGN(0x2000) ; + *(.data.init_task) + . = ALIGN(0x2000) ; + _edata = . ; + } > ram + + .init BLOCK(4096) : { + __init_begin = .; + *(.text.init) + *(.data.init) + . = ALIGN(16); + __setup_start = .; + *(.setup.init) + __setup_end = .; + __initcall_start = .; + *(.initcall1.init) + *(.initcall2.init) + *(.initcall3.init) + *(.initcall4.init) + *(.initcall5.init) + *(.initcall6.init) + *(.initcall7.init) + __initcall_end = . ; + . = ALIGN(4); + __init_end = .; + } > ram + + .bss BLOCK(0x4) : { + _sbss = . ; + *(.bss) + *(COMMON) + . = ALIGN(4) ; + _ebss = . ; + _end = . ; + } > ram +} + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/5407/config.c linux.2.5.40-ac2/arch/m68knommu/platform/5407/config.c --- linux.2.5.40/arch/m68knommu/platform/5407/config.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/5407/config.c 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,302 @@ +/***************************************************************************/ + +/* + * linux/arch/m68knommu/platform/5407/config.c + * + * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com) + * Copyright (C) 2000, Lineo (www.lineo.com) + */ + +/***************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/***************************************************************************/ + +void coldfire_profile_init(void); + +/***************************************************************************/ + +/* + * DMA channel base address table. + */ +unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = { + MCF_MBAR + MCFDMA_BASE0, + MCF_MBAR + MCFDMA_BASE1, + MCF_MBAR + MCFDMA_BASE2, + MCF_MBAR + MCFDMA_BASE3, +}; + +unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS]; + +/***************************************************************************/ + +void coldfire_tick(void) +{ + volatile unsigned char *timerp; + + /* Reset the ColdFire timer */ + timerp = (volatile unsigned char *) (MCF_MBAR + MCFTIMER_BASE1); + timerp[MCFTIMER_TER] = MCFTIMER_TER_CAP | MCFTIMER_TER_REF; +} + +/***************************************************************************/ + +void coldfire_timer_init(void (*handler)(int, void *, struct pt_regs *)) +{ + volatile unsigned short *timerp; + volatile unsigned char *icrp; + + /* Set up TIMER 1 as poll clock */ + timerp = (volatile unsigned short *) (MCF_MBAR + MCFTIMER_BASE1); + timerp[MCFTIMER_TMR] = MCFTIMER_TMR_DISABLE; + + timerp[MCFTIMER_TRR] = (unsigned short) ((MCF_CLK / 16) / HZ); + timerp[MCFTIMER_TMR] = MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 | + MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE; + + icrp = (volatile unsigned char *) (MCF_MBAR + MCFSIM_TIMER1ICR); + +#if defined(CONFIG_CLEOPATRA) + *icrp = MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3; + request_irq(30, handler, SA_INTERRUPT, "ColdFire Timer", NULL); +#else + *icrp = MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL5 | MCFSIM_ICR_PRI3; + request_irq(29, handler, SA_INTERRUPT, "ColdFire Timer", NULL); +#endif + +#ifdef CONFIG_HIGHPROFILE + coldfire_profile_init(); +#endif + mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_TIMER1); +} + +/***************************************************************************/ +#ifdef CONFIG_HIGHPROFILE +/***************************************************************************/ + +#define PROFILEHZ 1013 + +/* + * Use the other timer to provide high accuracy profiling info. + */ + +void coldfire_profile_tick(int irq, void *dummy, struct pt_regs *regs) +{ + volatile unsigned char *timerp; + + /* Reset the ColdFire timer2 */ + timerp = (volatile unsigned char *) (MCF_MBAR + MCFTIMER_BASE2); + timerp[MCFTIMER_TER] = MCFTIMER_TER_CAP | MCFTIMER_TER_REF; + + if (!user_mode(regs)) { + if (prof_buffer && current->pid) { + extern int _stext; + unsigned long ip = instruction_pointer(regs); + ip -= (unsigned long) &_stext; + ip >>= prof_shift; + if (ip < prof_len) + prof_buffer[ip]++; + } + } +} + +void coldfire_profile_init(void) +{ + volatile unsigned short *timerp; + volatile unsigned char *icrp; + + printk("PROFILE: lodging timer2=%d as profile timer\n", PROFILEHZ); + + /* Set up TIMER 2 as poll clock */ + timerp = (volatile unsigned short *) (MCF_MBAR + MCFTIMER_BASE2); + timerp[MCFTIMER_TMR] = MCFTIMER_TMR_DISABLE; + + timerp[MCFTIMER_TRR] = (unsigned short) ((MCF_CLK / 16) / PROFILEHZ); + timerp[MCFTIMER_TMR] = MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 | + MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE; + + icrp = (volatile unsigned char *) (MCF_MBAR + MCFSIM_TIMER2ICR); + + *icrp = MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3; + request_irq(31, coldfire_profile_tick, (SA_INTERRUPT | IRQ_FLG_FAST), + "Profile Timer", NULL); + mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_TIMER2); +} + +/***************************************************************************/ +#endif /* CONFIG_HIGHPROFILE */ +/***************************************************************************/ + +/* + * Program the vector to be an auto-vectored. + */ + +void mcf_autovector(unsigned int vec) +{ + volatile unsigned char *mbar; + + if ((vec >= 25) && (vec <= 31)) { + mbar = (volatile unsigned char *) MCF_MBAR; + vec = 0x1 << (vec - 24); + *(mbar + MCFSIM_AVR) |= vec; + mcf_setimr(mcf_getimr() & ~vec); + } +} + +/***************************************************************************/ + +extern e_vector *_ramvec; + +void set_evector(int vecnum, void (*handler)(void)) +{ + if (vecnum >= 0 && vecnum <= 255) + _ramvec[vecnum] = handler; +} + +/***************************************************************************/ + +/* assembler routines */ +asmlinkage void buserr(void); +asmlinkage void trap(void); +asmlinkage void system_call(void); +asmlinkage void inthandler(void); + +void __init coldfire_trap_init(void) +{ + int i; + +#ifndef ENABLE_dBUG + mcf_setimr(MCFSIM_IMR_MASKALL); +#endif + + /* + * There is a common trap handler and common interrupt + * handler that handle almost every vector. We treat + * the system call and bus error special, they get their + * own first level handlers. + */ +#ifndef ENABLE_dBUG + for (i = 3; (i <= 23); i++) + _ramvec[i] = trap; + for (i = 33; (i <= 63); i++) + _ramvec[i] = trap; +#endif + + for (i = 24; (i <= 30); i++) + _ramvec[i] = inthandler; +#ifndef ENABLE_dBUG + _ramvec[31] = inthandler; // Disables the IRQ7 button +#endif + + for (i = 64; (i < 255); i++) + _ramvec[i] = inthandler; + _ramvec[255] = 0; + + _ramvec[2] = buserr; + _ramvec[32] = system_call; +} + +/***************************************************************************/ + +/* + * Generic dumping code. Used for panic and debug. + */ + +void dump(struct pt_regs *fp) +{ + extern unsigned int sw_usp, sw_ksp; + unsigned long *sp; + unsigned char *tp; + int i; + + printk("\nCURRENT PROCESS:\n\n"); + printk("COMM=%s PID=%d\n", current->comm, current->pid); + + if (current->mm) { + printk("TEXT=%08x-%08x DATA=%08x-%08x BSS=%08x-%08x\n", + (int) current->mm->start_code, + (int) current->mm->end_code, + (int) current->mm->start_data, + (int) current->mm->end_data, + (int) current->mm->end_data, + (int) current->mm->brk); + printk("USER-STACK=%08x KERNEL-STACK=%08x\n\n", + (int) current->mm->start_stack, + (int) (((unsigned long) current) + 2 * PAGE_SIZE)); + } + + printk("PC: %08lx\n", fp->pc); + printk("SR: %08lx SP: %08lx\n", (long) fp->sr, (long) fp); + printk("d0: %08lx d1: %08lx d2: %08lx d3: %08lx\n", + fp->d0, fp->d1, fp->d2, fp->d3); + printk("d4: %08lx d5: %08lx a0: %08lx a1: %08lx\n", + fp->d4, fp->d5, fp->a0, fp->a1); + printk("\nUSP: %08x KSP: %08x TRAPFRAME: %08x\n", + sw_usp, sw_ksp, (unsigned int) fp); + + printk("\nCODE:"); + tp = ((unsigned char *) fp->pc) - 0x20; + for (sp = (unsigned long *) tp, i = 0; (i < 0x40); i += 4) { + if ((i % 0x10) == 0) + printk("\n%08x: ", (int) (tp + i)); + printk("%08x ", (int) *sp++); + } + printk("\n"); + + printk("\nKERNEL STACK:"); + tp = ((unsigned char *) fp) - 0x40; + for (sp = (unsigned long *) tp, i = 0; (i < 0xc0); i += 4) { + if ((i % 0x10) == 0) + printk("\n%08x: ", (int) (tp + i)); + printk("%08x ", (int) *sp++); + } + printk("\n"); + + printk("\nUSER STACK:"); + tp = (unsigned char *) (sw_usp - 0x10); + for (sp = (unsigned long *) tp, i = 0; (i < 0x80); i += 4) { + if ((i % 0x10) == 0) + printk("\n%08x: ", (int) (tp + i)); + printk("%08x ", (int) *sp++); + } + printk("\n\n"); +} + +/***************************************************************************/ + +void config_BSP(char *commandp, int size) +{ + memset(commandp, 0, size); + + mach_sched_init = coldfire_timer_init; + mach_tick = coldfire_tick; + mach_trap_init = coldfire_trap_init; +} + +/***************************************************************************/ +#ifdef TRAP_DBG_INTERRUPT + +asmlinkage void dbginterrupt_c(struct frame *fp) +{ + extern void dump(struct pt_regs *fp); + printk("%s(%d): BUS ERROR TRAP\n", __FILE__, __LINE__); + dump((struct pt_regs *) fp); + asm("halt"); +} + +#endif +/***************************************************************************/ diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/5407/Makefile linux.2.5.40-ac2/arch/m68knommu/platform/5407/Makefile --- linux.2.5.40/arch/m68knommu/platform/5407/Makefile 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/5407/Makefile 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,49 @@ +# +# Makefile for the linux kernel. +# +# Note! Dependencies are done automagically by 'make dep', which also +# removes any old dependencies. DON'T put your own dependencies here +# unless it's something special (ie not a .c file). +# + +# +# re-use any 5307/coldfire files that we can. Perhaps we should create +# a coldfire directory for shared files ? +# + +VPATH := $(VPATH):../5307 + +ifdef CONFIG_FULLDEBUG + AFLAGS += -DDEBUGGER_COMPATIBLE_CACHE=1 +endif + +# +# +# If you want to play with the HW breakpoints then you will +# need to add define this, which will give you a stack backtrace +# on the console port whenever a DBG interrupt occurs. You have to +# set up you HW breakpoints to trigger a DBG interrupt: +# +# AFLAGS += -DTRAP_DBG_INTERRUPT +# EXTRA_CFLAGS += -DTRAP_DBG_INTERRUPT +# + +AFLAGS += -D__ASSEMBLY__ -I. + +all: $(BOARD)/crt0_$(MODEL).o entry.o platform.o +O_TARGET := platform.o +obj-y := entry.o config.o signal.o ints.o + +$(BOARD)/crt0_$(MODEL).o: $(BOARD)/crt0_$(MODEL).S + +entry.o: entry.S m68k_defs.h + +m68k_defs.h: ../../kernel/m68k_defs.c ../../kernel/m68k_defs.head + rm -f m68k_defs.d + $(CC) $(filter-out -MD,$(CFLAGS)) -S ../../kernel/m68k_defs.c + cp ../../kernel/m68k_defs.head m68k_defs.h + grep '^#define' m68k_defs.s >> m68k_defs.h + rm m68k_defs.s +-include m68k_defs.d + +include $(TOPDIR)/Rules.make diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/5407/MOTOROLA/crt0_ram.S linux.2.5.40-ac2/arch/m68knommu/platform/5407/MOTOROLA/crt0_ram.S --- linux.2.5.40/arch/m68knommu/platform/5407/MOTOROLA/crt0_ram.S 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/5407/MOTOROLA/crt0_ram.S 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,152 @@ +/*****************************************************************************/ + +/* + * crt0_ram.S -- startup code for Motorola 5407 eval board. + * + * (C) Copyright 1999-2002, Greg Ungerer (gerg@snapgear.com). + * (C) Copyright 2000, Lineo (www.lineo.com). + * + * 1999/02/24 Modified for the 5307 processor David W. Miller + */ + +/*****************************************************************************/ + +#include "linux/autoconf.h" +#include "asm/coldfire.h" +#include "asm/mcfsim.h" + +/*****************************************************************************/ + +/* + * Board setup info. + */ +#define MEM_BASE 0x00000000 /* Memory base at address 0 */ +#define VBR_BASE MEM_BASE /* Vector address */ + +#define MEM_SIZE 0x02000000 /* Memory size 32 */ + +/*****************************************************************************/ + +.global _start +.global _rambase +.global _ramvec +.global _ramstart +.global _ramend + +/*****************************************************************************/ + +.data + +/* + * Set up the usable of RAM stuff. Size of RAM is determined then + * an initial stack set up at the end. + */ +_rambase: +.long 0 +_ramvec: +.long 0 +_ramstart: +.long 0 +_ramend: +.long 0 + +/*****************************************************************************/ + +.text + +/* + * This is the codes first entry point. This is where it all + * begins... + */ + +_start: + nop /* Filler */ + move.w #0x2700, %sr /* No interrupts */ + + /* + * Setup VBR as per eval board (really dBUG does this). + * These settings must match it. + */ + move.l #VBR_BASE, %a0 /* Note VBR can't be read */ + movec %a0, %VBR + move.l %a0, _ramvec /* Set up vector addr */ + move.l %a0, _rambase /* Set up base RAM addr */ + + + /* + * Determine size of RAM, then set up initial stack. + */ + move.l #MEM_SIZE, %a0 + + move.l %a0, %d0 /* Mem end addr is in a0 */ + move.l %d0, %sp /* Set up initial stack ptr */ + move.l %d0, _ramend /* Set end ram addr */ + + + /* + * Enable CPU internal cache. + */ + move.l #0x01040100, %d0 /* Invalidate whole cache */ + movec %d0,%CACR + nop + move.l #0x000fc000, %d0 /* Set SDRAM cached only */ + movec %d0, %ACR0 + move.l #0x00000000, %d0 /* No other regions cached */ + movec %d0, %ACR1 + move.l #0x000fc000, %d0 /* Set SDRAM cached only */ + movec %d0, %ACR2 + move.l #0x00000000, %d0 /* No other regions cached */ + movec %d0, %ACR3 + + /* Enable cache */ + move.l #0x86088400, %d0 + movec %d0,%CACR + nop + + /* + * Move ROM filesystem above bss :-) + */ + lea.l _sbss, %a0 /* Get start of bss */ + lea.l _ebss, %a1 /* Set up destination */ + move.l %a0, %a2 /* Copy of bss start */ + + move.l 8(%a0), %d0 /* Get size of ROMFS */ + addq.l #8, %d0 /* Allow for rounding */ + and.l #0xfffffffc, %d0 /* Whole words */ + + add.l %d0, %a0 /* Copy from end */ + add.l %d0, %a1 /* Copy from end */ + move.l %a1, _ramstart /* Set start of ram */ + +_copy_romfs: + move.l -(%a0), %d0 /* Copy dword */ + move.l %d0, -(%a1) + cmp.l %a0, %a2 /* Check if at end */ + bne _copy_romfs + + /* + * Zero out the bss region. + */ + lea.l _sbss, %a0 /* Get start of bss */ + lea.l _ebss, %a1 /* Get end of bss */ + clr.l %d0 /* Set value */ +_clear_bss: + move.l %d0, (%a0)+ /* Clear each word */ + cmp.l %a0, %a1 /* Check if at end */ + bne _clear_bss + + /* + * Load the current task pointer and stack. + */ + lea init_thread_union, %a0 + lea 0x2000(%a0), %sp + + /* + * Assember start up done, start code proper. + */ + jsr start_kernel /* Start Linux kernel */ + +_exit: + jmp _exit /* Should never get here */ + +/*****************************************************************************/ diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/5407/MOTOROLA/ram.ld linux.2.5.40-ac2/arch/m68knommu/platform/5407/MOTOROLA/ram.ld --- linux.2.5.40/arch/m68knommu/platform/5407/MOTOROLA/ram.ld 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/5407/MOTOROLA/ram.ld 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,72 @@ + +MEMORY { + ram : ORIGIN = 0x20000, LENGTH = 0x007E0000 +} + +jiffies = jiffies_64 + 4; + +SECTIONS { + + .text : { + _stext = . ; + *(.text) + *(.text.exit) + *(.text.lock) + *(.exitcall.exit) + *(.rodata) + . = ALIGN(0x4) ; + *(.kstrtab) + . = ALIGN(16); /* Exception table */ + __start___ex_table = .; + *(__ex_table) + __stop___ex_table = .; + + __start___ksymtab = .; /* Kernel symbol table */ + *(__ksymtab) + __stop___ksymtab = .; + . = ALIGN(4) ; + _etext = . ; + } > ram + + .data BLOCK(0x4) : { + _sdata = . ; + __data_start = . ; + *(.data) + *(.data.exit) + . = ALIGN(0x2000) ; + *(.data.init_task) + . = ALIGN(0x2000) ; + _edata = . ; + } > ram + + .init BLOCK(4096) : { + __init_begin = .; + *(.text.init) + *(.data.init) + . = ALIGN(16); + __setup_start = .; + *(.setup.init) + __setup_end = .; + __initcall_start = .; + *(.initcall1.init) + *(.initcall2.init) + *(.initcall3.init) + *(.initcall4.init) + *(.initcall5.init) + *(.initcall6.init) + *(.initcall7.init) + __initcall_end = .; + . = ALIGN(4) ; + __init_end = .; + } > ram + + .bss BLOCK(0x4) : { + _sbss = . ; + *(.bss) + *(COMMON) + . = ALIGN(4) ; + _ebss = . ; + _end = . ; + } > ram +} + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/5407/Rules.make linux.2.5.40-ac2/arch/m68knommu/platform/5407/Rules.make --- linux.2.5.40/arch/m68knommu/platform/5407/Rules.make 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/5407/Rules.make 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,34 @@ +# +# 5407/Makefile +# +# This file is included by the global makefile so that you can add your own +# platform-specific flags and dependencies. +# +# This file is subject to the terms and conditions of the GNU General Public +# License. See the file "COPYING" in the main directory of this archive +# for more details. +# +# Copyright (C) 1999,2001 Greg Ungerer (gerg@snapgear.com) +# Copyright (C) 1998,1999 D. Jeff Dionne +# Copyright (C) 1998 Kenneth Albanowski +# Copyright (C) 1994 by Hamish Macdonald +# Copyright (C) 2000 Lineo Inc. (www.lineo.com) + +GCC_DIR = $(shell $(CC) -v 2>&1 | grep specs | sed -e 's/.* \(.*\)specs/\1\./') + +INCGCC = $(GCC_DIR)/include +LIBGCC = $(GCC_DIR)/m5200/libgcc.a + +CFLAGS := -fno-builtin -nostdinc $(CFLAGS) -I$(INCGCC) -pipe -DCONFIG_NO_MMU -DNO_FPU -m5200 -Wa,-S -Wa,-m5200 -D__ELF__ -DUTS_SYSNAME=\"uClinux\" -D__linux__ +AFLAGS := $(CFLAGS) + +LDFLAGS_vmlinux = -T arch/$(ARCH)/platform/$(PLATFORM)/$(BOARD)/$(MODEL).ld + +HEAD := arch/$(ARCH)/platform/$(PLATFORM)/$(BOARD)/crt0_$(MODEL).o + +SUBDIRS := arch/$(ARCH)/kernel arch/$(ARCH)/mm arch/$(ARCH)/lib \ + arch/$(ARCH)/platform/$(PLATFORM) $(SUBDIRS) +CORE_FILES := arch/$(ARCH)/kernel/kernel.o arch/$(ARCH)/mm/mm.o \ + arch/$(ARCH)/platform/$(PLATFORM)/platform.o $(CORE_FILES) +LIBS += arch/$(ARCH)/lib/lib.a $(LIBGCC) + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68328/config.c linux.2.5.40-ac2/arch/m68knommu/platform/68328/config.c --- linux.2.5.40/arch/m68knommu/platform/68328/config.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68328/config.c 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,129 @@ +/* + * linux/arch/$(ARCH)/platform/$(PLATFORM)/config.c + * + * Copyright (C) 1993 Hamish Macdonald + * Copyright (C) 1999 D. Jeff Dionne + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive + * for more details. + * + * VZ Support/Fixes Evan Stawnyczy + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + + +void BSP_sched_init(void (*timer_routine)(int, void *, struct pt_regs *)) +{ + +#ifdef CONFIG_XCOPILOT_BUGS + /* + * The only thing I know is that CLK32 is not available on Xcopilot + * I have little idea about what frequency SYSCLK has on Xcopilot. + * The values for prescaler and compare registers were simply + * taken from the original source + */ + + /* Restart mode, Enable int, SYSCLK, Enable timer */ + TCTL2 = TCTL_OM | TCTL_IRQEN | TCTL_CLKSOURCE_SYSCLK | TCTL_TEN; + /* Set prescaler */ + TPRER2 = 2; + /* Set compare register */ + TCMP2 = 0xd7e4; +#else + /* Restart mode, Enable int, 32KHz, Enable timer */ + TCTL2 = TCTL_OM | TCTL_IRQEN | TCTL_CLKSOURCE_32KHZ | TCTL_TEN; + /* Set prescaler (Divide 32KHz by 32)*/ + TPRER2 = 31; + /* Set compare register 32Khz / 32 / 10 = 100 */ + TCMP2 = 10; +#endif + + request_irq(TMR2_IRQ_NUM, timer_routine, IRQ_FLG_LOCK, "timer", NULL); +} + +void BSP_tick(void) +{ + /* Reset Timer2 */ + TSTAT2 &= 0; +} + +unsigned long BSP_gettimeoffset (void) +{ + return 0; +} + +void BSP_gettod (int *yearp, int *monp, int *dayp, + int *hourp, int *minp, int *secp) +{ +} + +int BSP_hwclk(int op, struct hwclk_time *t) +{ + if (!op) { + /* read */ + } else { + /* write */ + } + return 0; +} + +int BSP_set_clock_mmss (unsigned long nowtime) +{ +#if 0 + short real_seconds = nowtime % 60, real_minutes = (nowtime / 60) % 60; + + tod->second1 = real_seconds / 10; + tod->second2 = real_seconds % 10; + tod->minute1 = real_minutes / 10; + tod->minute2 = real_minutes % 10; +#endif + return 0; +} + +void BSP_reset (void) +{ + cli(); + asm volatile (" + moveal #0x10c00000, %a0; + moveb #0, 0xFFFFF300; + moveal 0(%a0), %sp; + moveal 4(%a0), %a0; + jmp (%a0); + "); +} + +void config_BSP(char *command, int len) +{ + printk("\n68328 support D. Jeff Dionne \n"); + printk("68328 support Kenneth Albanowski \n"); + printk("68328/Pilot support Bernhard Kuhn \n"); + + mach_sched_init = BSP_sched_init; + mach_tick = BSP_tick; + mach_gettimeoffset = BSP_gettimeoffset; + mach_gettod = BSP_gettod; + mach_hwclk = NULL; + mach_set_clock_mmss = NULL; +// mach_mksound = NULL; + mach_reset = BSP_reset; +// mach_debug_init = NULL; + + config_M68328_irq(); +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68328/entry.S linux.2.5.40-ac2/arch/m68knommu/platform/68328/entry.S --- linux.2.5.40/arch/m68knommu/platform/68328/entry.S 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68328/entry.S 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,723 @@ +/* -*- mode: asm -*- + * + * linux/arch/m68k/kernel/entry.S + * + * Copyright (C) 1991, 1992 Linus Torvalds + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file README.legal in the main directory of this archive + * for more details. + * + * Linux/m68k support by Hamish Macdonald + * + */ + +/* + * entry.S contains the system-call and fault low-level handling routines. + * This also contains the timer-interrupt handler, as well as all interrupts + * and faults that can result in a task-switch. + * + * NOTE: This code handles signal-recognition, which happens every time + * after a timer-interrupt and after each system call. + * + */ + +/* + * 12/03/96 Jes: Currently we only support m68k single-cpu systems, so + * all pointers that used to be 'current' are now entry + * number 0 in the 'current_set' list. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "m68k_defs.h" + +#define IMMED # +#define DBG_PUTC(x) moveb IMMED x,0xfffff907; \ + moveb IMMED '\r',0xfffff907; \ + moveb IMMED '\n',0xfffff907 + +.globl system_call, buserr, trap +.globl resume, ret_from_exception +.globl ret_from_signal +.globl sys_call_table +.globl sys_fork, sys_clone, sys_vfork +.globl ret_from_interrupt, bad_interrupt +.globl inthandler1, inthandler2, inthandler3, inthandler4 +.globl inthandler5, inthandler6, inthandler7 + +.text +ENTRY(buserr) + SAVE_ALL_INT + GET_CURRENT(%d0) + movel %sp,%sp@- /* stack frame pointer argument*/ + bsrw buserr_c + addql #4,%sp + jra ret_from_exception + +ENTRY(trap) + SAVE_ALL_INT + GET_CURRENT(%d0) + movel %sp,%sp@- /* stack frame pointer argument*/ + bsrw trap_c + addql #4,%sp + jra ret_from_exception + +ENTRY(reschedule) + /* save top of frame*/ + pea %sp@ + jbsr set_esp0 + addql #4,%sp + + pea ret_from_exception + jmp schedule + + /* After a fork we jump here directly from resume,*/ + /* so that %d1 contains the previous task*/ + /* Theoretically only needed on SMP, but let's watch*/ + /* what happens in schedule_tail() in future...*/ +ENTRY(ret_from_fork) +#ifdef CONFIG_SMP + movel %d1,%sp@- + jsr schedule_tail + addql #4,%sp +#endif + jra ret_from_exception + +badsys: + movel #-ENOSYS,%sp@(PT_D0) + jra ret_from_exception + +do_trace: + movel #-ENOSYS,%sp@(PT_D0) /* needed for strace*/ + subql #4,%sp + SAVE_SWITCH_STACK + jbsr syscall_trace + RESTORE_SWITCH_STACK + addql #4,%sp + movel %sp@(PT_ORIG_D0),%d1 + movel #-ENOSYS,%d0 + cmpl #NR_syscalls,%d1 + jcc 1f +/* jbsr @(sys_call_table,%d1:l:4)@(0) */ + lsl #2,%d1 +#if 1 + lea sys_call_table, %a0 + jbsr %a0@(%d1) +#else + bsrw sys_call_table@(%d1) +#endif + +1: movel %d0,%sp@(PT_D0) /* save the return value*/ + subql #4,%sp /* dummy return address*/ + SAVE_SWITCH_STACK + jbsr syscall_trace + +ret_from_signal: + RESTORE_SWITCH_STACK + addql #4,%sp + jra ret_from_exception + +ENTRY(system_call) + SAVE_ALL_SYS + + GET_CURRENT(%d1) + /* save top of frame*/ + pea %sp@ + jbsr set_esp0 + addql #4,%sp + + btst #PF_TRACESYS_BIT,%a2@(TASK_FLAGS+PF_TRACESYS_OFF) + jne do_trace + cmpl #NR_syscalls,%d0 + jcc badsys +/* jbsr @(sys_call_table,%d0:l:4)@(0) */ + lsl #2,%d0 +#if 1 + lea sys_call_table,%a0 + movel %a0@(%d0), %a0 + jbsr %a0@ +#else + jbsr sys_call_table@(%d0) +#endif + movel %d0,%sp@(PT_D0) /* save the return value*/ + +ret_from_exception: + btst #5,%sp@(PT_SR) /* check if returning to kernel*/ + jeq Luser_return /* if so, skip resched, signals*/ + +Lkernel_return: + RESTORE_ALL + +Luser_return: + /* only allow interrupts when we are really the last one on the*/ + /* kernel stack, otherwise stack overflow can occur during*/ + /* heavy interupt load*/ + andw #ALLOWINT,%sr + + movel %sp,%d1 /* get thread_info pointer */ + andl #0xffffe000,%d1 + movel %d1,%a2 + move %a2@(TI_FLAGS),%d1 /* thread_info->flags */ + andl #_TIF_WORK_MASK,%d1 + jne Lwork_to_do + RESTORE_ALL + +Lwork_to_do: + movel %a2@(TI_FLAGS),%d1 /* thread_info->flags */ + btst #TIF_NEED_RESCHED,%d1 + jne reschedule + +Lsignal_return: + subql #4,%sp /* dummy return address*/ + SAVE_SWITCH_STACK + pea %sp@(SWITCH_STACK_SIZE) + clrl %sp@- + bsrw do_signal + addql #8,%sp + RESTORE_SWITCH_STACK + addql #4,%sp +Lreturn: + RESTORE_ALL + +/* +** This is the main interrupt handler, responsible for calling process_int() +*/ +inthandler1: + SAVE_ALL_INT + GET_CURRENT(%d0) + addql #1,local_irq_count /* put exception # in d0*/ +/* bfextu %sp@(PT_VECTOR){#4,#10},%d0 */ + movew %sp@(PT_VECTOR), %d0 + and #0x3ff, %d0 + + movel %sp,%sp@- + movel #65,%sp@- /* put vector # on stack*/ + jbsr process_int /* process the IRQ*/ +3: addql #8,%sp /* pop parameters off stack*/ + bra ret_from_interrupt + +inthandler2: + SAVE_ALL_INT + GET_CURRENT(%d0) + addql #1,local_irq_count /* put exception # in d0*/ +/* bfextu %sp@(PT_VECTOR){#4,#10},%d0 */ + movew %sp@(PT_VECTOR), %d0 + and #0x3ff, %d0 + + movel %sp,%sp@- + movel #66,%sp@- /* put vector # on stack*/ + jbsr process_int /* process the IRQ*/ +3: addql #8,%sp /* pop parameters off stack*/ + bra ret_from_interrupt + +inthandler3: + SAVE_ALL_INT + GET_CURRENT(%d0) + addql #1,local_irq_count /* put exception # in d0*/ +/* bfextu %sp@(PT_VECTOR){#4,#10},%d0 */ + movew %sp@(PT_VECTOR), %d0 + and #0x3ff, %d0 + + movel %sp,%sp@- + movel #67,%sp@- /* put vector # on stack*/ + jbsr process_int /* process the IRQ*/ +3: addql #8,%sp /* pop parameters off stack*/ + bra ret_from_interrupt + +inthandler4: + SAVE_ALL_INT + GET_CURRENT(%d0) + addql #1,local_irq_count /* put exception # in d0*/ +/* bfextu %sp@(PT_VECTOR){#4,#10},%d0 */ + movew %sp@(PT_VECTOR), %d0 + and #0x3ff, %d0 + + movel %sp,%sp@- + movel #68,%sp@- /* put vector # on stack*/ + jbsr process_int /* process the IRQ*/ +3: addql #8,%sp /* pop parameters off stack*/ + bra ret_from_interrupt + +inthandler5: + SAVE_ALL_INT + GET_CURRENT(%d0) + addql #1,local_irq_count /* put exception # in d0*/ +/* bfextu %sp@(PT_VECTOR){#4,#10},%d0 */ + movew %sp@(PT_VECTOR), %d0 + and #0x3ff, %d0 + + movel %sp,%sp@- + movel #69,%sp@- /* put vector # on stack*/ + jbsr process_int /* process the IRQ*/ +3: addql #8,%sp /* pop parameters off stack*/ + bra ret_from_interrupt + +inthandler6: + SAVE_ALL_INT + GET_CURRENT(%d0) + addql #1,local_irq_count /* put exception # in d0*/ +/* bfextu %sp@(PT_VECTOR){#4,#10},%d0 */ + movew %sp@(PT_VECTOR), %d0 + and #0x3ff, %d0 + + movel %sp,%sp@- + movel #70,%sp@- /* put vector # on stack*/ + jbsr process_int /* process the IRQ*/ +3: addql #8,%sp /* pop parameters off stack*/ + bra ret_from_interrupt + +inthandler7: + SAVE_ALL_INT + GET_CURRENT(%d0) + addql #1,local_irq_count /* put exception # in d0*/ +/* bfextu %sp@(PT_VECTOR){#4,#10},%d0 */ + movew %sp@(PT_VECTOR), %d0 + and #0x3ff, %d0 + + movel %sp,%sp@- + movel #71,%sp@- /* put vector # on stack*/ + jbsr process_int /* process the IRQ*/ +3: addql #8,%sp /* pop parameters off stack*/ + bra ret_from_interrupt + +inthandler8: + SAVE_ALL_INT + GET_CURRENT(%d0) + addql #1,local_irq_count /* put exception # in d0*/ +/* bfextu %sp@(PT_VECTOR){#4,#10},%d0 */ + movew %sp@(PT_VECTOR), %d0 + and #0x3ff, %d0 + + movel %sp,%sp@- + movel #72,%sp@- /* put vector # on stack*/ + jbsr process_int /* process the IRQ*/ +3: addql #8,%sp /* pop parameters off stack*/ + bra ret_from_interrupt + +timerhandler: + SAVE_ALL_INT + GET_CURRENT(%d0) + addql #1,local_irq_count /* put exception # in d0*/ +/* bfextu %sp@(PT_VECTOR){#4,#10},%d0 */ + movew %sp@(PT_VECTOR), %d0 + and #0x3ff, %d0 + + movel %sp,%sp@- + movel #0x40,%sp@- /* put vector # on stack*/ + jbsr process_int /* process the IRQ*/ +3: addql #8,%sp /* pop parameters off stack*/ + bra ret_from_interrupt + +serialhandler: + SAVE_ALL_INT + GET_CURRENT(%d0) + addql #1,local_irq_count /* put exception # in d0*/ +/* bfextu %sp@(PT_VECTOR){#4,#10},%d0 */ + movew %sp@(PT_VECTOR), %d0 + and #0x3ff, %d0 + + movel %sp,%sp@- + movel #0x42,%sp@- /* put vector # on stack*/ + jbsr process_int /* process the IRQ*/ +3: addql #8,%sp /* pop parameters off stack*/ + bra ret_from_interrupt + +inthandler_wrap: + SAVE_ALL_INT + GET_CURRENT(%d0) + addql #1,local_irq_count /* put exception # in d0*/ +/* bfextu %sp@(PT_VECTOR){#4,#10},%d0 */ + movew %sp@(PT_VECTOR), %d0 + and #0x3ff, %d0 + + movel %sp,%sp@- + movel %d0,%sp@- /* put vector # on stack*/ + jbsr process_int /* process the IRQ*/ +3: addql #8,%sp /* pop parameters off stack*/ + bra ret_from_interrupt + +inthandler: + SAVE_ALL_INT + GET_CURRENT(%d0) + addql #1,local_irq_count /* put exception # in d0*/ +/* bfextu %sp@(PT_VECTOR){#4,#10},%d0 */ + movew %sp@(PT_VECTOR), %d0 + and #0x3ff, %d0 + + movel %sp,%sp@- + movel %d0,%sp@- /* put vector # on stack*/ + jbsr process_int /* process the IRQ*/ +3: addql #8,%sp /* pop parameters off stack*/ + bra ret_from_interrupt + +ret_from_interrupt: + subql #1,local_irq_count + jeq 1f +2: + RESTORE_ALL +1: +#if 1 +/* bfextu %sp@(PT_SR){#5,#3},%d0 */ /* Check for nested interrupt.*/ + moveb %sp@(PT_SR), %d0 + and #7, %d0 + +#if MAX_NOINT_IPL > 0 + cmpiw #MAX_NOINT_IPL,%d0 +#endif + jhi 2b +#endif + /* check if we need to do software interrupts */ + + movel local_irq_count,%d0 + jeq ret_from_exception + + pea ret_from_exception + jra do_softirq + + +/* Handler for uninitialized and spurious interrupts */ + +bad_interrupt: + addql #1,num_spurious + rte + +ENTRY(sys_fork) + SAVE_SWITCH_STACK + pea %sp@(SWITCH_STACK_SIZE) + jbsr m68k_fork + addql #4,%sp + RESTORE_SWITCH_STACK + rts + +ENTRY(sys_clone) + SAVE_SWITCH_STACK + pea %sp@(SWITCH_STACK_SIZE) + jbsr m68k_clone + addql #4,%sp + RESTORE_SWITCH_STACK + rts + +ENTRY(sys_vfork) + SAVE_SWITCH_STACK + pea %sp@(SWITCH_STACK_SIZE) + jbsr m68k_vfork + addql #4,%sp + RESTORE_SWITCH_STACK + rts + +ENTRY(sys_sigsuspend) + SAVE_SWITCH_STACK + pea %sp@(SWITCH_STACK_SIZE) + jbsr do_sigsuspend + addql #4,%sp + RESTORE_SWITCH_STACK + rts + +ENTRY(sys_rt_sigsuspend) + SAVE_SWITCH_STACK + pea %sp@(SWITCH_STACK_SIZE) + jbsr do_rt_sigsuspend + addql #4,%sp + RESTORE_SWITCH_STACK + rts + +ENTRY(sys_sigreturn) + SAVE_SWITCH_STACK + jbsr do_sigreturn + RESTORE_SWITCH_STACK + rts + +ENTRY(sys_rt_sigreturn) + SAVE_SWITCH_STACK + jbsr do_rt_sigreturn + RESTORE_SWITCH_STACK + rts + +resume: + /* + * Beware - when entering resume, prev (the current task) is + * in a0, next (the new task) is in a1,so don't change these + * registers until their contents are no longer needed. + */ + + /* save prev thread in d1 */ + movel %a0,%d1 + + /* save sr */ + movew %sr,%a0@(TASK_THREAD+THREAD_SR) +#ifdef USE_SFC_DFC + /* save fs (sfc,%dfc) (may be pointing to kernel memory) */ + movec %sfc,%d0 + movew %d0,%a0@(TASK_THREAD+THREAD_FS) +#endif + + /* save non-scratch registers on stack */ + SAVE_SWITCH_STACK + + /* save usp */ + /* it is better to use a movel here instead of a movew 8*) */ + movel %usp,%a2 + movel %a2,%a0@(TASK_THREAD+THREAD_USP) + + /* save current kernel stack pointer */ + movel %sp,%a0@(TASK_THREAD+THREAD_KSP) + + /* restore the kernel stack pointer */ + movel %a1@(TASK_THREAD+THREAD_KSP),%sp + + /* restore non-scratch registers */ + RESTORE_SWITCH_STACK + + /* restore user stack pointer */ + movel %a1@(TASK_THREAD+THREAD_USP),%a0 + movel %a0,%usp + +#ifdef USE_SFC_DFC + /* restore fs (sfc,%dfc) */ + movew %a1@(TASK_THREAD+THREAD_FS),%a0 + movec %a0,%sfc + movec %a0,%dfc +#endif + /* restore status register */ + movew %a1@(TASK_THREAD+THREAD_SR),%sr + + rts + + +.data +ALIGN +sys_call_table: + .long sys_ni_syscall /* 0 - old "setup()" system call*/ + .long sys_exit + .long sys_fork + .long sys_read + .long sys_write + .long sys_open /* 5 */ + .long sys_close + .long sys_waitpid + .long sys_creat + .long sys_link + .long sys_unlink /* 10 */ + .long sys_execve + .long sys_chdir + .long sys_time + .long sys_mknod + .long sys_chmod /* 15 */ + .long sys_chown16 + .long sys_ni_syscall /* old break syscall holder */ + .long sys_stat + .long sys_lseek + .long sys_getpid /* 20 */ + .long sys_mount + .long sys_oldumount + .long sys_setuid16 + .long sys_getuid16 + .long sys_stime /* 25 */ + .long sys_ptrace + .long sys_alarm + .long sys_fstat + .long sys_pause + .long sys_utime /* 30 */ + .long sys_ni_syscall /* old stty syscall holder */ + .long sys_ni_syscall /* old gtty syscall holder */ + .long sys_access + .long sys_nice + .long sys_ni_syscall /* 35 *//* old ftime syscall holder */ + .long sys_sync + .long sys_kill + .long sys_rename + .long sys_mkdir + .long sys_rmdir /* 40 */ + .long sys_dup + .long sys_pipe + .long sys_times + .long sys_ni_syscall /* old prof syscall holder */ + .long sys_brk /* 45 */ + .long sys_setgid16 + .long sys_getgid16 + .long sys_signal + .long sys_geteuid16 + .long sys_getegid16 /* 50 */ + .long sys_acct + .long sys_umount /* recycled never used phys() */ + .long sys_ni_syscall /* old lock syscall holder */ + .long sys_ioctl + .long sys_fcntl /* 55 */ + .long sys_ni_syscall /* old mpx syscall holder */ + .long sys_setpgid + .long sys_ni_syscall /* old ulimit syscall holder */ + .long sys_ni_syscall + .long sys_umask /* 60 */ + .long sys_chroot + .long sys_ustat + .long sys_dup2 + .long sys_getppid + .long sys_getpgrp /* 65 */ + .long sys_setsid + .long sys_sigaction + .long sys_sgetmask + .long sys_ssetmask + .long sys_setreuid16 /* 70 */ + .long sys_setregid16 + .long sys_sigsuspend + .long sys_sigpending + .long sys_sethostname + .long sys_setrlimit /* 75 */ + .long sys_old_getrlimit + .long sys_getrusage + .long sys_gettimeofday + .long sys_settimeofday + .long sys_getgroups16 /* 80 */ + .long sys_setgroups16 + .long old_select + .long sys_symlink + .long sys_lstat + .long sys_readlink /* 85 */ + .long sys_uselib + .long sys_swapon + .long sys_reboot + .long old_readdir + .long old_mmap /* 90 */ + .long sys_munmap + .long sys_truncate + .long sys_ftruncate + .long sys_fchmod + .long sys_fchown16 /* 95 */ + .long sys_getpriority + .long sys_setpriority + .long sys_ni_syscall /* old profil syscall holder */ + .long sys_statfs + .long sys_fstatfs /* 100 */ + .long sys_ioperm + .long sys_socketcall + .long sys_syslog + .long sys_setitimer + .long sys_getitimer /* 105 */ + .long sys_newstat + .long sys_newlstat + .long sys_newfstat + .long sys_ni_syscall + .long sys_ni_syscall /* iopl for i386 */ /* 110 */ + .long sys_vhangup + .long sys_ni_syscall /* obsolete idle() syscall */ + .long sys_ni_syscall /* vm86old for i386 */ + .long sys_wait4 + .long sys_swapoff /* 115 */ + .long sys_sysinfo + .long sys_ipc + .long sys_fsync + .long sys_sigreturn + .long sys_clone /* 120 */ + .long sys_setdomainname + .long sys_newuname + .long sys_cacheflush /* modify_ldt for i386 */ + .long sys_adjtimex + .long sys_mprotect /* 125 */ + .long sys_sigprocmask + .long sys_create_module + .long sys_init_module + .long sys_delete_module + .long sys_get_kernel_syms /* 130 */ + .long sys_quotactl + .long sys_getpgid + .long sys_fchdir + .long sys_bdflush + .long sys_sysfs /* 135 */ + .long sys_personality + .long sys_ni_syscall /* for afs_syscall */ + .long sys_setfsuid16 + .long sys_setfsgid16 + .long sys_llseek /* 140 */ + .long sys_getdents + .long sys_select + .long sys_flock + .long sys_msync + .long sys_readv /* 145 */ + .long sys_writev + .long sys_getsid + .long sys_fdatasync + .long sys_sysctl + .long sys_mlock /* 150 */ + .long sys_munlock + .long sys_mlockall + .long sys_munlockall + .long sys_sched_setparam + .long sys_sched_getparam /* 155 */ + .long sys_sched_setscheduler + .long sys_sched_getscheduler + .long sys_sched_yield + .long sys_sched_get_priority_max + .long sys_sched_get_priority_min /* 160 */ + .long sys_sched_rr_get_interval + .long sys_nanosleep + .long sys_mremap + .long sys_setresuid16 + .long sys_getresuid16 /* 165 */ + .long sys_ni_syscall /* for vm86 */ + .long sys_query_module + .long sys_poll + .long sys_nfsservctl + .long sys_setresgid16 /* 170 */ + .long sys_getresgid16 + .long sys_prctl + .long sys_rt_sigreturn + .long sys_rt_sigaction + .long sys_rt_sigprocmask /* 175 */ + .long sys_rt_sigpending + .long sys_rt_sigtimedwait + .long sys_rt_sigqueueinfo + .long sys_rt_sigsuspend + .long sys_pread64 /* 180 */ + .long sys_pwrite64 + .long sys_lchown16 + .long sys_getcwd + .long sys_capget + .long sys_capset /* 185 */ + .long sys_sigaltstack + .long sys_sendfile + .long sys_ni_syscall /* streams1 */ + .long sys_ni_syscall /* streams2 */ + .long sys_vfork /* 190 */ + .long sys_getrlimit + .long sys_mmap2 + .long sys_truncate64 + .long sys_ftruncate64 + .long sys_stat64 /* 195 */ + .long sys_lstat64 + .long sys_fstat64 + .long sys_chown + .long sys_getuid + .long sys_getgid /* 200 */ + .long sys_geteuid + .long sys_getegid + .long sys_setreuid + .long sys_setregid + .long sys_getgroups /* 205 */ + .long sys_setgroups + .long sys_fchown + .long sys_setresuid + .long sys_getresuid + .long sys_setresgid /* 210 */ + .long sys_getresgid + .long sys_lchown + .long sys_setuid + .long sys_setgid + .long sys_setfsuid /* 215 */ + .long sys_setfsgid + .long sys_ni_syscall + .long sys_ni_syscall + .long sys_ni_syscall + .long sys_getdents64 /* 220 */ + + .rept NR_syscalls-(.-sys_call_table)/4 + .long sys_ni_syscall + .endr diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68328/fixup.pl linux.2.5.40-ac2/arch/m68knommu/platform/68328/fixup.pl --- linux.2.5.40/arch/m68knommu/platform/68328/fixup.pl 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68328/fixup.pl 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,91 @@ +#!/usr/bin/perl + +# +# Nasty piece of work, designed to translated linux.bin binary image +# in to several different formats. +# +# Copyright (C) 1998 Kenneth Albanowski , +# The Silver Hammer Group, Ltd. +# + +@CRC = ( + 0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50A5, 0x60C6, 0x70E7, + 0x8108, 0x9129, 0xA14A, 0xB16B, 0xC18C, 0xD1AD, 0xE1CE, 0xF1EF, + 0x1231, 0x0210, 0x3273, 0x2252, 0x52B5, 0x4294, 0x72F7, 0x62D6, + 0x9339, 0x8318, 0xB37B, 0xA35A, 0xD3BD, 0xC39C, 0xF3FF, 0xE3DE, + 0x2462, 0x3443, 0x0420, 0x1401, 0x64E6, 0x74C7, 0x44A4, 0x5485, + 0xA56A, 0xB54B, 0x8528, 0x9509, 0xE5EE, 0xF5CF, 0xC5AC, 0xD58D, + 0x3653, 0x2672, 0x1611, 0x0630, 0x76D7, 0x66F6, 0x5695, 0x46B4, + 0xB75B, 0xA77A, 0x9719, 0x8738, 0xF7DF, 0xE7FE, 0xD79D, 0xC7BC, + 0x48C4, 0x58E5, 0x6886, 0x78A7, 0x0840, 0x1861, 0x2802, 0x3823, + 0xC9CC, 0xD9ED, 0xE98E, 0xF9AF, 0x8948, 0x9969, 0xA90A, 0xB92B, + 0x5AF5, 0x4AD4, 0x7AB7, 0x6A96, 0x1A71, 0x0A50, 0x3A33, 0x2A12, + 0xDBFD, 0xCBDC, 0xFBBF, 0xEB9E, 0x9B79, 0x8B58, 0xBB3B, 0xAB1A, + 0x6CA6, 0x7C87, 0x4CE4, 0x5CC5, 0x2C22, 0x3C03, 0x0C60, 0x1C41, + 0xEDAE, 0xFD8F, 0xCDEC, 0xDDCD, 0xAD2A, 0xBD0B, 0x8D68, 0x9D49, + 0x7E97, 0x6EB6, 0x5ED5, 0x4EF4, 0x3E13, 0x2E32, 0x1E51, 0x0E70, + 0xFF9F, 0xEFBE, 0xDFDD, 0xCFFC, 0xBF1B, 0xAF3A, 0x9F59, 0x8F78, + 0x9188, 0x81A9, 0xB1CA, 0xA1EB, 0xD10C, 0xC12D, 0xF14E, 0xE16F, + 0x1080, 0x00A1, 0x30C2, 0x20E3, 0x5004, 0x4025, 0x7046, 0x6067, + 0x83B9, 0x9398, 0xA3FB, 0xB3DA, 0xC33D, 0xD31C, 0xE37F, 0xF35E, + 0x02B1, 0x1290, 0x22F3, 0x32D2, 0x4235, 0x5214, 0x6277, 0x7256, + 0xB5EA, 0xA5CB, 0x95A8, 0x8589, 0xF56E, 0xE54F, 0xD52C, 0xC50D, + 0x34E2, 0x24C3, 0x14A0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405, + 0xA7DB, 0xB7FA, 0x8799, 0x97B8, 0xE75F, 0xF77E, 0xC71D, 0xD73C, + 0x26D3, 0x36F2, 0x0691, 0x16B0, 0x6657, 0x7676, 0x4615, 0x5634, + 0xD94C, 0xC96D, 0xF90E, 0xE92F, 0x99C8, 0x89E9, 0xB98A, 0xA9AB, + 0x5844, 0x4865, 0x7806, 0x6827, 0x18C0, 0x08E1, 0x3882, 0x28A3, + 0xCB7D, 0xDB5C, 0xEB3F, 0xFB1E, 0x8BF9, 0x9BD8, 0xABBB, 0xBB9A, + 0x4A75, 0x5A54, 0x6A37, 0x7A16, 0x0AF1, 0x1AD0, 0x2AB3, 0x3A92, + 0xFD2E, 0xED0F, 0xDD6C, 0xCD4D, 0xBDAA, 0xAD8B, 0x9DE8, 0x8DC9, + 0x7C26, 0x6C07, 0x5C64, 0x4C45, 0x3CA2, 0x2C83, 0x1CE0, 0x0CC1, + 0xEF1F, 0xFF3E, 0xCF5D, 0xDF7C, 0xAF9B, 0xBFBA, 0x8FD9, 0x9FF8, + 0x6E17, 0x7E36, 0x4E55, 0x5E74, 0x2E93, 0x3EB2, 0x0ED1, 0x1EF0 +); + +sub CrcBlock { + my($data,$crc) = @_; + my($i); + printf "Crc of %d bytes\n", length($data); + for ($i=0;$i>8) ^ +# ord(substr($data,$i,1)), +#$CRC[ ($crc>>8) ^ +# ord(substr($data,$i,1)) & +#0xff]; +# + + $crc = ($crc << 8) ^ $CRC[ + ((($crc>>8) & 0xff) ^ + ord(substr($data,$i,1))) & + 0xff + ]; + $crc &= 0xffff; + } + return $crc & 0xffff; +} + +open(T,"); +close(T); + +$realLength = length($image); +$image .= "\0" x (0x100000 - $realLength); + +$posOfCardLength = 108; +$posOfChecksum = 112; +#$crc = CrcBlock(substr($image, 0, $posOfChecksum), 0); +#$crc = CrcBlock(substr($image, $posOfChecksum+2), $crc); + +#substr($image, $posOfCardLength, 4) = pack("N", length($image)); +#substr($image, $posOfChecksum, 2) = pack("n", $crc); + +open(O,">linux.trg"); +print O substr($image, 0x10000, (($realLength - 0x10000) + 0xffff) & ~0xffff); +close(O); + +open(O, ">linux.rom"); +print O $image; +close(O); diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68328/ints.c linux.2.5.40-ac2/arch/m68knommu/platform/68328/ints.c --- linux.2.5.40/arch/m68knommu/platform/68328/ints.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68328/ints.c 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,378 @@ +/* + * linux/arch/$(ARCH)/platform/$(PLATFORM)/ints.c + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive + * for more details. + * + * Copyright 1996 Roman Zippel + * Copyright 1999 D. Jeff Dionne + * Copyright 2000-2001 Lineo, Inc. D. Jefff Dionne + */ + +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include + +#define INTERNAL_IRQS (32) + +/* assembler routines */ +asmlinkage void system_call(void); +asmlinkage void buserr(void); +asmlinkage void trap(void); +asmlinkage void trap3(void); +asmlinkage void trap4(void); +asmlinkage void trap5(void); +asmlinkage void trap6(void); +asmlinkage void trap7(void); +asmlinkage void trap8(void); +asmlinkage void trap9(void); +asmlinkage void trap10(void); +asmlinkage void trap11(void); +asmlinkage void trap12(void); +asmlinkage void trap13(void); +asmlinkage void trap14(void); +asmlinkage void trap15(void); +asmlinkage void trap33(void); +asmlinkage void trap34(void); +asmlinkage void trap35(void); +asmlinkage void trap36(void); +asmlinkage void trap37(void); +asmlinkage void trap38(void); +asmlinkage void trap39(void); +asmlinkage void trap40(void); +asmlinkage void trap41(void); +asmlinkage void trap42(void); +asmlinkage void trap43(void); +asmlinkage void trap44(void); +asmlinkage void trap45(void); +asmlinkage void trap46(void); +asmlinkage void trap47(void); +asmlinkage void bad_interrupt(void); +asmlinkage void inthandler(void); +asmlinkage void inthandler1(void); +asmlinkage void inthandler2(void); +asmlinkage void inthandler3(void); +asmlinkage void inthandler4(void); +asmlinkage void inthandler5(void); +asmlinkage void inthandler6(void); +asmlinkage void inthandler7(void); + +extern e_vector *_ramvec; + +/* irq node variables for the 32 (potential) on chip sources */ +static irq_node_t *int_irq_list[INTERNAL_IRQS]; + +static int int_irq_count[INTERNAL_IRQS]; +static short int_irq_ablecount[INTERNAL_IRQS]; +unsigned int local_irq_count[NR_CPUS]; + +static void int_badint(int irq, void *dev_id, struct pt_regs *fp) +{ + num_spurious += 1; +} + +/* + * This function should be called during kernel startup to initialize + * the amiga IRQ handling routines. + */ + +void M68328_init_IRQ(void) +{ + int i; + + /* set up the vectors */ +#if 0 + _ramvec[2] = buserr; + _ramvec[3] = trap3; + _ramvec[4] = trap4; + _ramvec[5] = trap5; + _ramvec[6] = trap6; + _ramvec[7] = trap7; + _ramvec[8] = trap8; + _ramvec[9] = trap9; + _ramvec[10] = trap10; + _ramvec[11] = trap11; + _ramvec[12] = trap12; + _ramvec[13] = trap13; + _ramvec[14] = trap14; + _ramvec[15] = trap15; +#endif + _ramvec[32] = system_call; + + _ramvec[64] = bad_interrupt; + _ramvec[65] = inthandler1; + _ramvec[66] = inthandler2; + _ramvec[67] = inthandler3; + _ramvec[68] = inthandler4; + _ramvec[69] = inthandler5; + _ramvec[70] = inthandler6; + _ramvec[71] = inthandler7; + + IVR = 0x40; /* Set DragonBall IVR (interrupt base) to 64 */ + + /* initialize handlers */ + for (i = 0; i < INTERNAL_IRQS; i++) { + int_irq_list[i] = NULL; + + int_irq_ablecount[i] = 0; + int_irq_count[i] = 0; + } + /* turn off all interrupts */ + *(unsigned volatile long *)0xfffff304 = 0xffffffff; +} + +void M68328_insert_irq(irq_node_t **list, irq_node_t *node) +{ + unsigned long flags; + irq_node_t *cur; + + if (!node->dev_id) + printk("%s: Warning: dev_id of %s is zero\n", + __FUNCTION__, node->devname); + + save_flags(flags); + cli(); + + cur = *list; + + while (cur) { + list = &cur->next; + cur = cur->next; + } + + node->next = cur; + *list = node; + + restore_flags(flags); +} + +void M68328_delete_irq(irq_node_t **list, void *dev_id) +{ + unsigned long flags; + irq_node_t *node; + + save_flags(flags); + cli(); + + for (node = *list; node; list = &node->next, node = *list) { + if (node->dev_id == dev_id) { + *list = node->next; + /* Mark it as free. */ + node->handler = NULL; + restore_flags(flags); + return; + } + } + restore_flags(flags); + printk ("%s: tried to remove invalid irq\n", __FUNCTION__); +} + +int M68328_request_irq(unsigned int irq, void (*handler)(int, void *, struct pt_regs *), + unsigned long flags, const char *devname, void *dev_id) +{ + if (irq >= INTERNAL_IRQS) { + printk ("%s: Unknown IRQ %d from %s\n", __FUNCTION__, irq, devname); + return -ENXIO; + } + + if (!int_irq_list[irq]) { + int_irq_list[irq] = new_irq_node(); + int_irq_list[irq]->flags = IRQ_FLG_STD; + } + + if (!(int_irq_list[irq]->flags & IRQ_FLG_STD)) { + if (int_irq_list[irq]->flags & IRQ_FLG_LOCK) { + printk("%s: IRQ %d from %s is not replaceable\n", + __FUNCTION__, irq, int_irq_list[irq]->devname); + return -EBUSY; + } + if (flags & IRQ_FLG_REPLACE) { + printk("%s: %s can't replace IRQ %d from %s\n", + __FUNCTION__, devname, irq, int_irq_list[irq]->devname); + return -EBUSY; + } + } + int_irq_list[irq]->handler = handler; + int_irq_list[irq]->flags = flags; + int_irq_list[irq]->dev_id = dev_id; + int_irq_list[irq]->devname = devname; + + /* enable in the IMR */ + if (!int_irq_ablecount[irq]) + *(volatile unsigned long *)0xfffff304 &= ~(1<= INTERNAL_IRQS) { + printk ("%s: Unknown IRQ %d\n", __FUNCTION__, irq); + return; + } + + if (int_irq_list[irq]->dev_id != dev_id) + printk("%s: removing probably wrong IRQ %d from %s\n", + __FUNCTION__, irq, int_irq_list[irq]->devname); + int_irq_list[irq]->handler = int_badint; + int_irq_list[irq]->flags = IRQ_FLG_STD; + int_irq_list[irq]->dev_id = NULL; + int_irq_list[irq]->devname = NULL; + + *(volatile unsigned long *)0xfffff304 |= 1<= INTERNAL_IRQS) { + printk("%s: Unknown IRQ %d\n", __FUNCTION__, irq); + return; + } + + if (--int_irq_ablecount[irq]) + return; + + /* enable the interrupt */ + *(volatile unsigned long *)0xfffff304 &= ~(1<= INTERNAL_IRQS) { + printk("%s: Unknown IRQ %d\n", __FUNCTION__, irq); + return; + } + + if (int_irq_ablecount[irq]++) + return; + + /* disable the interrupt */ + *(volatile unsigned long *)0xfffff304 |= 1<handler) { + int_irq_list[irq]->handler(irq, int_irq_list[irq]->dev_id, fp); + int_irq_count[irq]++; + } else { + printk("unregistered interrupt %d!\nTurning it off in the IMR...\n", irq); + *(volatile unsigned long *)0xfffff304 |= mask; + } + pend &= ~mask; + } + return 0; +} + +int M68328_get_irq_list(struct seq_file *p, void *v) +{ + int i; + irq_node_t *node; + + seq_printf(p, "Internal 68328 interrupts\n"); + + for (i = 0; i < INTERNAL_IRQS; i++) { + if (!(node = int_irq_list[i])) + continue; + if (!(node->handler)) + continue; + + seq_printf(p, " %2d: %10u %s\n", i, + int_irq_count[i], int_irq_list[i]->devname); + } + return(0); +} + +void config_M68328_irq(void) +{ + mach_default_handler = NULL; + mach_init_IRQ = M68328_init_IRQ; + mach_request_irq = M68328_request_irq; + mach_free_irq = M68328_free_irq; + mach_enable_irq = M68328_enable_irq; + mach_disable_irq = M68328_disable_irq; + mach_get_irq_list = M68328_get_irq_list; + mach_process_int = M68328_do_irq; +} + + +void init_irq_proc(void); +void init_irq_proc(void) +{ + /* Insert /proc/irq driver here */ +} + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68328/Makefile linux.2.5.40-ac2/arch/m68knommu/platform/68328/Makefile --- linux.2.5.40/arch/m68knommu/platform/68328/Makefile 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68328/Makefile 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,30 @@ +# +# Makefile for the linux kernel. +# +# Note! Dependencies are done automagically by 'make dep', which also +# removes any old dependencies. DON'T put your own dependencies here +# unless it's something special (ie not a .c file). +# + +AFLAGS += -D__ASSEMBLY__ + +all: $(BOARD)/crt0_$(MODEL).o entry.o platform.o +O_TARGET := platform.o +obj-y := entry.o config.o signal.o traps.o ints.o + +$(BOARD)/crt0_$(MODEL).o: $(BOARD)/crt0_$(MODEL).S $(BOARD)/bootlogo.rh + +entry.o: entry.S m68k_defs.h + +m68k_defs.h: ../../kernel/m68k_defs.c ../../kernel/m68k_defs.head + rm -f m68k_defs.d + $(CC) $(filter-out -MD,$(CFLAGS)) -S ../../kernel/m68k_defs.c + cp ../../kernel/m68k_defs.head m68k_defs.h + grep '^#define' m68k_defs.s >> m68k_defs.h + rm m68k_defs.s +-include m68k_defs.d + +$(BOARD)/bootlogo.rh: $(BOARD)/bootlogo.h + perl tools/bootlogo.pl < $(BOARD)/bootlogo.h > $(BOARD)/bootlogo.rh + +include $(TOPDIR)/Rules.make diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68328/peng.pl linux.2.5.40-ac2/arch/m68knommu/platform/68328/peng.pl --- linux.2.5.40/arch/m68knommu/platform/68328/peng.pl 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68328/peng.pl 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,10 @@ + +$_ = join("", <>); + +s/(0x[0-9a-f]{2})/sprintf("0x%.2x",ord(pack("b8",unpack("B8",chr(hex($1))))))/gei; + +s/^ / .byte /gm; +s/[,};]+$//gm; +s/^static.*//gm; + +print $_; diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68328/pilot/bootlogo.h linux.2.5.40-ac2/arch/m68knommu/platform/68328/pilot/bootlogo.h --- linux.2.5.40/arch/m68knommu/platform/68328/pilot/bootlogo.h 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68328/pilot/bootlogo.h 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,270 @@ +#define bootlogo_width 160 +#define bootlogo_height 160 +static unsigned char bootlogo_bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x01, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x40, 0x55, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x55, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xac, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0xa0, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x10, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x01, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 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2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,228 @@ +/* linux/arch/m68knommu/kernel/head.S: A startup file for the MC68332 + * + * Copyright (C) 1998 D. Jeff Dionne , + * Kenneth Albanowski , + * The Silver Hammer Group, Ltd. + * + * (c) 1995, Dionne & Associates + * (c) 1995, DKG Display Tech. + */ + +#define ASSEMBLY + +#define IMMED # +#define DBG_PUTC(x) moveb IMMED x, 0xfffff907 + +#include + +.global _stext +.global __bss_start + +.global _start + +.global _rambase +.global __ramvec +.global _ramvec +.global _ramstart +.global _ramend + +.global penguin_bits + +#ifdef CONFIG_PILOT + +#define IMR 0xFFFFF304 + + .data + .align 16 + +penguin_bits: +#include "bootlogo.rh" + +#endif + +/*****************************************************************************/ + +.data + +/* + * Set up the usable of RAM stuff. Size of RAM is determined then + * an initial stack set up at the end. + */ +.align 4 +_ramvec: +.long 0 +_rambase: +.long 0 +_ramstart: +.long 0 +_ramend: +.long 0 + +.text + +_start: +_stext: + + +#ifdef CONFIG_M68328 + +#ifdef CONFIG_PILOT + .byte 0x4e, 0xfa, 0x00, 0x0a /* Jmp +X bytes */ + .byte 'b', 'o', 'o', 't' + .word 10000 + + nop +#endif + + moveq #0, %d0 + movew %d0, 0xfffff618 /* Watchdog off */ + movel #0x00011f07, 0xfffff114 /* CS A1 Mask */ + + movew #0x0800, 0xfffff906 /* Ignore CTS */ + movew #0x010b, 0xfffff902 /* BAUD to 9600 */ + + movew #0x2410, 0xfffff200 /* PLLCR */ + movew #0x123, 0xfffff202 /* PLLFSR */ + +#ifdef CONFIG_PILOT + moveb #0, 0xfffffA27 /* LCKCON */ + movel #_start, 0xfffffA00 /* LSSA */ + moveb #0xa, 0xfffffA05 /* LVPW */ + movew #0x9f, 0xFFFFFa08 /* LXMAX */ + movew #0x9f, 0xFFFFFa0a /* LYMAX */ + moveb #9, 0xfffffa29 /* LBAR */ + moveb #0, 0xfffffa25 /* LPXCD */ + moveb #0x04, 0xFFFFFa20 /* LPICF */ + moveb #0x58, 0xfffffA27 /* LCKCON */ + moveb #0x85, 0xfffff429 /* PFDATA */ + moveb #0xd8, 0xfffffA27 /* LCKCON */ + moveb #0xc5, 0xfffff429 /* PFDATA */ + moveb #0xd5, 0xfffff429 /* PFDATA */ + + moveal #0x00100000, %a3 + moveal #0x100ffc00, %a4 + +#endif /* CONFIG_PILOT */ + + +#endif /* CONFIG_M68328 */ + + movew #0x2700, %sr + lea %a4@(-4), %sp + + DBG_PUTC('\r') + DBG_PUTC('\n') + DBG_PUTC('A') + + moveq #0,%d0 + movew #16384, %d0 /* PLL settle wait loop */ +L0: + subw #1, %d0 + bne L0 + + DBG_PUTC('B') + + /* Copy command line from beginning of RAM (+16) to end of bss */ + movel #__ramvec, %d7 + addl #16, %d7 + moveal %d7, %a0 + moveal #end, %a1 + lea %a1@(512), %a2 + + DBG_PUTC('C') + + /* Copy %a0 to %a1 until %a1 == %a2 */ +L2: + movel %a0@+, %d0 + movel %d0, %a1@+ + cmpal %a1, %a2 + bhi L2 + + /* Copy data segment from ROM to RAM */ + moveal #__data_rom_start, %a0 + moveal #__data_start, %a1 + moveal #__data_end, %a2 + + DBG_PUTC('D') + + /* Copy %a0 to %a1 until %a1 == %a2 */ +LD1: + movel %a0@+, %d0 + movel %d0, %a1@+ + cmpal %a1, %a2 + bhi LD1 + + DBG_PUTC('E') + + moveal #__bss_start, %a0 + moveal #end, %a1 + + /* Copy 0 to %a0 until %a0 == %a1 */ +L1: + movel #0, %a0@+ + cmpal %a0, %a1 + bhi L1 + + DBG_PUTC('F') + + /* Copy command line from end of bss to command line */ + moveal #end, %a0 + moveal #command_line, %a1 + lea %a1@(512), %a2 + + DBG_PUTC('G') + + /* Copy %a0 to %a1 until %a1 == %a2 */ +L3: + movel %a0@+, %d0 + movel %d0, %a1@+ + cmpal %a1, %a2 + bhi L3 + + movel #_sdata, %d0 + movel %d0, _rambase + movel #end, %d0 + movel %d0, _ramstart + + movel %a4, %d0 + subl #4096, %d0 /* Reserve 4K of stack */ + moveq #79, %d7 + movel %d0, _ramend + + movel %a3, %d0 + movel %d0, rom_length + + pea 0 + pea env + pea %sp@(4) + pea 0 + + DBG_PUTC('H') + +#ifdef CONFIG_PILOT + + movel #penguin_bits, 0xFFFFFA00 + moveb #10, 0xFFFFFA05 + movew #160, 0xFFFFFA08 + movew #160, 0xFFFFFA0A + +#endif /* CONFIG_PILOT */ + + DBG_PUTC('I') + + lea init_thread_union, %a0 + lea 0x2000(%a0), %sp + + DBG_PUTC('J') + DBG_PUTC('\r') + DBG_PUTC('\n') + + jsr start_kernel +_exit: + + jmp _exit + + + .data +env: + .long 0 diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68328/pilot/rom.ld linux.2.5.40-ac2/arch/m68knommu/platform/68328/pilot/rom.ld --- linux.2.5.40/arch/m68knommu/platform/68328/pilot/rom.ld 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68328/pilot/rom.ld 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,105 @@ +OUTPUT_ARCH(m68k) +ENTRY(_start) +MEMORY { + romvec : ORIGIN = 0x10c00000, LENGTH = 0x10400 + flash : ORIGIN = 0x10c10400, LENGTH = 0xfec00 + eflash : ORIGIN = 0x10d00000, LENGTH = 4 + ramvec : ORIGIN = 0x00000000, LENGTH = 0x400 + ram : ORIGIN = 0x10000400, LENGTH = 0x100000-0x400 + eram : ORIGIN = 0x10100000, LENGTH = 4 +} + +jiffies = jiffies_64 + 4; + +SECTIONS { + . = 0x10c00000 ; + .romvec : { + _flashstart = . ; + _romvec = . ; + } > romvec + + . = 0x10c10400 ; + .text : { + _text = .; /* Text and read-only data */ + text_start = . ; + *(.text) + *(.text.*) + *(.rodata) + *(.fixup) + *(__ex_table) + . = ALIGN(4) ; + _etext = . ; + __data_rom_start = . ; + } > flash + + . = 0x10d00000 ; + .eflash : + { + _flashend = . ; + } > eflash + + . = 0 ; + .ramvec : + { + __ramvec = . ; + } > ramvec + + /* . = 0x10000400 ; */ + .data 0x10000400 : + { + _sdata = . ; + __data_start = . ; + + . = ALIGN(0x2000) ; + *(.data.init_task) + . = ALIGN(0x2000) ; + + *(.data) + *(.data.*) + *(.setup.init) + *(.exitcall.exit) + + . = ALIGN(4096) ; + __init_begin = .; + *(.text.init) + *(.data.init) + . = ALIGN(16); + __setup_start = .; + *(.setup.init) + __setup_end = .; + __initcall_start = .; + *(.initcall1.init) + *(.initcall2.init) + *(.initcall3.init) + *(.initcall4.init) + *(.initcall5.init) + *(.initcall6.init) + *(.initcall7.init) + __initcall_end = .; + . = ALIGN(4) ; + __init_end = .; + + _edata = . ; + edata = . ; + } > ram + + .bss : + { + . = ALIGN(16) ; + _sbss = . ; + __bss_start = . ; + __data_end = . ; + *(.bss) + *(COMMON) + . = ALIGN(16) ; + end = . ; + _ebss = . ; + _end = . ; + } > ram + + . = 0x10100000 ; + .eram : + { + __ramend = . ; + } > eram +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68328/Rules.make linux.2.5.40-ac2/arch/m68knommu/platform/68328/Rules.make --- linux.2.5.40/arch/m68knommu/platform/68328/Rules.make 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68328/Rules.make 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,36 @@ +# +# 68EZ328/Makefile +# +# This file is included by the global makefile so that you can add your own +# platform-specific flags and dependencies. +# +# This file is subject to the terms and conditions of the GNU General Public +# License. See the file "COPYING" in the main directory of this archive +# for more details. +# +# Copyright (c) 2000,2001 Lineo, Inc. +# Copyright (c) 1998,1999 D. Jeff Dionne +# Copyright (C) 1998 Kenneth Albanowski +# Copyright (C) 1994 by Hamish Macdonald +# + +GCC_DIR = $(shell $(CC) -v 2>&1 | grep specs | sed -e 's/.* \(.*\)specs/\1\./') + +INCGCC = $(GCC_DIR)/include +LIBGCC = $(GCC_DIR)/m68000/libgcc.a + +CFLAGS := -fno-builtin -DNO_CACHE $(CFLAGS) -pipe -DCONFIG_NO_MMU -DNO_FPU -DNO_CACHE -m68000 -D__ELF__ -DNO_FORGET -DUTS_SYSNAME='"uClinux"' -D__linux__ +AFLAGS := $(AFLAGS) -pipe -DCONFIG_NO_MMU -DNO_FPU -DNO_CACHE -m68000 -D__ELF__ -DUTS_SYSNAME='"uClinux"' -Wa,--bitwise-or + +LDFLAGS_vmlinux = -T arch/$(ARCH)/platform/$(PLATFORM)/$(BOARD)/$(MODEL).ld + +HEAD := arch/$(ARCH)/platform/$(PLATFORM)/$(BOARD)/crt0_$(MODEL).o + +SUBDIRS := arch/$(ARCH)/kernel arch/$(ARCH)/mm arch/$(ARCH)/lib \ + arch/$(ARCH)/platform/$(PLATFORM) $(SUBDIRS) + +CORE_FILES := arch/$(ARCH)/kernel/kernel.o arch/$(ARCH)/mm/mm.o \ + arch/$(ARCH)/platform/$(PLATFORM)/platform.o $(CORE_FILES) + +LIBS += arch/$(ARCH)/lib/lib.a $(LIBGCC) + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68328/signal.c linux.2.5.40-ac2/arch/m68knommu/platform/68328/signal.c --- linux.2.5.40/arch/m68knommu/platform/68328/signal.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68328/signal.c 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,1186 @@ +/* + * linux/arch/m68k/kernel/signal.c + * + * Copyright (C) 1991, 1992 Linus Torvalds + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive + * for more details. + */ + +/* + * Linux/m68k support by Hamish Macdonald + * + * 68060 fixes by Jesper Skov + * + * 1997-12-01 Modified for POSIX.1b signals by Andreas Schwab + * + * mathemu support by Roman Zippel + * (Note: fpstate in the signal context is completly ignored for the emulator + * and the internal floating point format is put on stack) + */ + +/* + * ++roman (07/09/96): implemented signal stacks (specially for tosemu on + * Atari :-) Current limitation: Only one sigstack can be active at one time. + * If a second signal with SA_ONSTACK set arrives while working on a sigstack, + * SA_ONSTACK is ignored. This behaviour avoids lots of trouble with nested + * signal handlers! + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP))) + +asmlinkage long sys_wait4(pid_t pid, unsigned int * stat_addr, int options, + struct rusage * ru); +asmlinkage int do_signal(sigset_t *oldset, struct pt_regs *regs); + +#ifndef CONFIG_UCLINUX +const int frame_extra_sizes[16] = { + 0, + -1, /* sizeof(((struct frame *)0)->un.fmt1), */ + sizeof(((struct frame *)0)->un.fmt2), + sizeof(((struct frame *)0)->un.fmt3), + sizeof(((struct frame *)0)->un.fmt4), + -1, /* sizeof(((struct frame *)0)->un.fmt5), */ + -1, /* sizeof(((struct frame *)0)->un.fmt6), */ + sizeof(((struct frame *)0)->un.fmt7), + -1, /* sizeof(((struct frame *)0)->un.fmt8), */ + sizeof(((struct frame *)0)->un.fmt9), + sizeof(((struct frame *)0)->un.fmta), + sizeof(((struct frame *)0)->un.fmtb), + -1, /* sizeof(((struct frame *)0)->un.fmtc), */ + -1, /* sizeof(((struct frame *)0)->un.fmtd), */ + -1, /* sizeof(((struct frame *)0)->un.fmte), */ + -1, /* sizeof(((struct frame *)0)->un.fmtf), */ +}; +#endif + +/* + * Atomically swap in the new signal mask, and wait for a signal. + */ +asmlinkage int do_sigsuspend(struct pt_regs *regs) +{ + old_sigset_t mask = regs->d3; + sigset_t saveset; + + mask &= _BLOCKABLE; + saveset = current->blocked; + siginitset(¤t->blocked, mask); + recalc_sigpending(); + + regs->d0 = -EINTR; + while (1) { + current->state = TASK_INTERRUPTIBLE; + schedule(); + if (do_signal(&saveset, regs)) + return -EINTR; + } +} + +asmlinkage int +do_rt_sigsuspend(struct pt_regs *regs) +{ + sigset_t *unewset = (sigset_t *)regs->d1; + size_t sigsetsize = (size_t)regs->d2; + sigset_t saveset, newset; + + /* XXX: Don't preclude handling different sized sigset_t's. */ + if (sigsetsize != sizeof(sigset_t)) + return -EINVAL; + + if (copy_from_user(&newset, unewset, sizeof(newset))) + return -EFAULT; + sigdelsetmask(&newset, ~_BLOCKABLE); + + saveset = current->blocked; + current->blocked = newset; + recalc_sigpending(); + + regs->d0 = -EINTR; + while (1) { + current->state = TASK_INTERRUPTIBLE; + schedule(); + if (do_signal(&saveset, regs)) + return -EINTR; + } +} + +asmlinkage int +sys_sigaction(int sig, const struct old_sigaction *act, + struct old_sigaction *oact) +{ + struct k_sigaction new_ka, old_ka; + int ret; + + if (act) { + old_sigset_t mask; + if (verify_area(VERIFY_READ, act, sizeof(*act)) || + __get_user(new_ka.sa.sa_handler, &act->sa_handler) || + __get_user(new_ka.sa.sa_restorer, &act->sa_restorer)) + return -EFAULT; + __get_user(new_ka.sa.sa_flags, &act->sa_flags); + __get_user(mask, &act->sa_mask); + siginitset(&new_ka.sa.sa_mask, mask); + } + + ret = do_sigaction(sig, act ? &new_ka : NULL, oact ? &old_ka : NULL); + + if (!ret && oact) { + if (verify_area(VERIFY_WRITE, oact, sizeof(*oact)) || + __put_user(old_ka.sa.sa_handler, &oact->sa_handler) || + __put_user(old_ka.sa.sa_restorer, &oact->sa_restorer)) + return -EFAULT; + __put_user(old_ka.sa.sa_flags, &oact->sa_flags); + __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask); + } + + return ret; +} + +asmlinkage int +sys_sigaltstack(const stack_t *uss, stack_t *uoss) +{ + return do_sigaltstack(uss, uoss, rdusp()); +} + + +/* + * Do a signal return; undo the signal stack. + * + * Keep the return code on the stack quadword aligned! + * That makes the cache flush below easier. + */ + +struct sigframe +{ + char *pretcode; + int sig; + int code; + struct sigcontext *psc; + char retcode[8]; + unsigned long extramask[_NSIG_WORDS-1]; + struct sigcontext sc; +}; + +struct rt_sigframe +{ + char *pretcode; + int sig; + struct siginfo *pinfo; + void *puc; + char retcode[8]; + struct siginfo info; + struct ucontext uc; +}; + + +#ifndef NO_FPU + +static unsigned char fpu_version = 0; /* version number of fpu, set by setup_frame */ + +static inline int restore_fpu_state(struct sigcontext *sc) +{ + int err = 1; + + if (FPU_IS_EMU) { + /* restore registers */ + memcpy(current->thread.fpcntl, sc->sc_fpcntl, 12); + memcpy(current->thread.fp, sc->sc_fpregs, 24); + return 0; + } + + if (CPU_IS_060 ? sc->sc_fpstate[2] : sc->sc_fpstate[0]) { + /* Verify the frame format. */ + if (!CPU_IS_060 && (sc->sc_fpstate[0] != fpu_version)) + goto out; + if (CPU_IS_020_OR_030) { + if (m68k_fputype & FPU_68881 && + !(sc->sc_fpstate[1] == 0x18 || sc->sc_fpstate[1] == 0xb4)) + goto out; + if (m68k_fputype & FPU_68882 && + !(sc->sc_fpstate[1] == 0x38 || sc->sc_fpstate[1] == 0xd4)) + goto out; + } else if (CPU_IS_040) { + if (!(sc->sc_fpstate[1] == 0x00 || + sc->sc_fpstate[1] == 0x28 || + sc->sc_fpstate[1] == 0x60)) + goto out; + } else if (CPU_IS_060) { + if (!(sc->sc_fpstate[3] == 0x00 || + sc->sc_fpstate[3] == 0x60 || + sc->sc_fpstate[3] == 0xe0)) + goto out; + } else + goto out; + + __asm__ volatile (".chip 68k/68881\n\t" + "fmovemx %0,%/fp0-%/fp1\n\t" + "fmoveml %1,%/fpcr/%/fpsr/%/fpiar\n\t" + ".chip 68k" + : /* no outputs */ + : "m" (*sc->sc_fpregs), "m" (*sc->sc_fpcntl)); + } + __asm__ volatile (".chip 68k/68881\n\t" + "frestore %0\n\t" + ".chip 68k" : : "m" (*sc->sc_fpstate)); + err = 0; + +out: + return err; +} + +#define FPCONTEXT_SIZE 216 +#define uc_fpstate uc_filler[0] +#define uc_formatvec uc_filler[FPCONTEXT_SIZE/4] +#define uc_extra uc_filler[FPCONTEXT_SIZE/4+1] + +static inline int rt_restore_fpu_state(struct ucontext *uc) +{ + unsigned char fpstate[FPCONTEXT_SIZE]; + int context_size = CPU_IS_060 ? 8 : 0; + fpregset_t fpregs; + int err = 1; + + if (FPU_IS_EMU) { + /* restore fpu control register */ + if (__copy_from_user(current->thread.fpcntl, + &uc->uc_mcontext.fpregs.f_pcr, 12)) + goto out; + /* restore all other fpu register */ + if (__copy_from_user(current->thread.fp, + uc->uc_mcontext.fpregs.f_fpregs, 96)) + goto out; + return 0; + } + + if (__get_user(*(long *)fpstate, (long *)&uc->uc_fpstate)) + goto out; + if (CPU_IS_060 ? fpstate[2] : fpstate[0]) { + if (!CPU_IS_060) + context_size = fpstate[1]; + /* Verify the frame format. */ + if (!CPU_IS_060 && (fpstate[0] != fpu_version)) + goto out; + if (CPU_IS_020_OR_030) { + if (m68k_fputype & FPU_68881 && + !(context_size == 0x18 || context_size == 0xb4)) + goto out; + if (m68k_fputype & FPU_68882 && + !(context_size == 0x38 || context_size == 0xd4)) + goto out; + } else if (CPU_IS_040) { + if (!(context_size == 0x00 || + context_size == 0x28 || + context_size == 0x60)) + goto out; + } else if (CPU_IS_060) { + if (!(fpstate[3] == 0x00 || + fpstate[3] == 0x60 || + fpstate[3] == 0xe0)) + goto out; + } else + goto out; + if (__copy_from_user(&fpregs, &uc->uc_mcontext.fpregs, + sizeof(fpregs))) + goto out; + __asm__ volatile (".chip 68k/68881\n\t" + "fmovemx %0,%/fp0-%/fp7\n\t" + "fmoveml %1,%/fpcr/%/fpsr/%/fpiar\n\t" + ".chip 68k" + : /* no outputs */ + : "m" (*fpregs.f_fpregs), + "m" (fpregs.f_pcr)); + } + if (context_size && + __copy_from_user(fpstate + 4, (long *)&uc->uc_fpstate + 1, + context_size)) + goto out; + __asm__ volatile (".chip 68k/68881\n\t" + "frestore %0\n\t" + ".chip 68k" : : "m" (*fpstate)); + err = 0; + +out: + return err; +} + +#endif + +static inline int +restore_sigcontext(struct pt_regs *regs, struct sigcontext *usc, void *fp, + int *pd0) +{ +#ifndef CONFIG_UCLINUX + int fsize; +#endif + int formatvec; + struct sigcontext context; + int err = 0; + + /* get previous context */ + if (copy_from_user(&context, usc, sizeof(context))) + goto badframe; + + /* restore passed registers */ + regs->d1 = context.sc_d1; + regs->a0 = context.sc_a0; + regs->a1 = context.sc_a1; + regs->sr = (regs->sr & 0xff00) | (context.sc_sr & 0xff); + regs->pc = context.sc_pc; + regs->orig_d0 = -1; /* disable syscall checks */ + wrusp(context.sc_usp); + formatvec = context.sc_formatvec; + regs->format = formatvec >> 12; + regs->vector = formatvec & 0xfff; + +#ifndef NO_FPU + err = restore_fpu_state(&context); +#endif + +#ifndef CONFIG_UCLINUX /* has no extra crap */ + fsize = frame_extra_sizes[regs->format]; + if (fsize < 0) { + /* + * user process trying to return with weird frame format + */ +#if DEBUG + printk("user process returning with weird frame format\n"); +#endif + goto badframe; + } + + /* OK. Make room on the supervisor stack for the extra junk, + * if necessary. + */ + + if (fsize) { + struct switch_stack *sw = (struct switch_stack *)regs - 1; + regs->d0 = context.sc_d0; +#define frame_offset (sizeof(struct pt_regs)+sizeof(struct switch_stack)) + __asm__ __volatile__ + (" movel %0,%/a0\n\t" + " subl %1,%/a0\n\t" /* make room on stack */ + " movel %/a0,%/sp\n\t" /* set stack pointer */ + /* move switch_stack and pt_regs */ + "1: movel %0@+,%/a0@+\n\t" + " dbra %2,1b\n\t" + " lea %/sp@(%c3),%/a0\n\t" /* add offset of fmt */ + " lsrl #2,%1\n\t" + " subql #1,%1\n\t" + "2: movesl %4@+,%2\n\t" + "3: movel %2,%/a0@+\n\t" + " dbra %1,2b\n\t" + " bral " SYMBOL_NAME_STR(ret_from_signal) "\n" + "4:\n" + ".section __ex_table,\"a\"\n" + " .align 4\n" + " .long 2b,4b\n" + " .long 3b,4b\n" + ".previous" + : /* no outputs, it doesn't ever return */ + : "a" (sw), "d" (fsize), "d" (frame_offset/4-1), + "n" (frame_offset), "a" (fp) + : "a0"); +#undef frame_offset + /* + * If we ever get here an exception occurred while + * building the above stack-frame. + */ + goto badframe; + } +#endif /* CONFIG_UCLINUX */ + + *pd0 = context.sc_d0; + return err; + +badframe: + return 1; +} + +static inline int +rt_restore_ucontext(struct pt_regs *regs, struct switch_stack *sw, + struct ucontext *uc, int *pd0) +{ +#ifndef CONFIG_UCLINUX + int fsize; +#endif + int temp; + greg_t *gregs = uc->uc_mcontext.gregs; + unsigned long usp; + int err; + + err = __get_user(temp, &uc->uc_mcontext.version); + if (temp != MCONTEXT_VERSION) + goto badframe; + /* restore passed registers */ + err |= __get_user(regs->d0, &gregs[0]); + err |= __get_user(regs->d1, &gregs[1]); + err |= __get_user(regs->d2, &gregs[2]); + err |= __get_user(regs->d3, &gregs[3]); + err |= __get_user(regs->d4, &gregs[4]); + err |= __get_user(regs->d5, &gregs[5]); + err |= __get_user(sw->d6, &gregs[6]); + err |= __get_user(sw->d7, &gregs[7]); + err |= __get_user(regs->a0, &gregs[8]); + err |= __get_user(regs->a1, &gregs[9]); + err |= __get_user(regs->a2, &gregs[10]); + err |= __get_user(sw->a3, &gregs[11]); + err |= __get_user(sw->a4, &gregs[12]); + err |= __get_user(sw->a5, &gregs[13]); + err |= __get_user(sw->a6, &gregs[14]); + err |= __get_user(usp, &gregs[15]); + wrusp(usp); + err |= __get_user(regs->pc, &gregs[16]); + err |= __get_user(temp, &gregs[17]); + regs->sr = (regs->sr & 0xff00) | (temp & 0xff); + regs->orig_d0 = -1; /* disable syscall checks */ +#if DAVIDM /* ifdef uc_formatvec */ + err |= __get_user(temp, &uc->uc_formatvec); +#endif + regs->format = temp >> 12; + regs->vector = temp & 0xfff; + +#if DAVIDM /* NO_FPU */ + err |= rt_restore_fpu_state(uc); +#endif + + if (do_sigaltstack(&uc->uc_stack, NULL, usp) == -EFAULT) + goto badframe; + +#ifndef CONFIG_UCLINUX + fsize = frame_extra_sizes[regs->format]; + if (fsize < 0) { + /* + * user process trying to return with weird frame format + */ +#if DEBUG + printk("user process returning with weird frame format\n"); +#endif + goto badframe; + } + + /* OK. Make room on the supervisor stack for the extra junk, + * if necessary. + */ + + if (fsize) { +#define frame_offset (sizeof(struct pt_regs)+sizeof(struct switch_stack)) + __asm__ __volatile__ + (" movel %0,%/a0\n\t" + " subl %1,%/a0\n\t" /* make room on stack */ + " movel %/a0,%/sp\n\t" /* set stack pointer */ + /* move switch_stack and pt_regs */ + "1: movel %0@+,%/a0@+\n\t" + " dbra %2,1b\n\t" + " lea %/sp@(%c3),%/a0\n\t" /* add offset of fmt */ + " lsrl #2,%1\n\t" + " subql #1,%1\n\t" + "2: movesl %4@+,%2\n\t" + "3: movel %2,%/a0@+\n\t" + " dbra %1,2b\n\t" + " bral " SYMBOL_NAME_STR(ret_from_signal) "\n" + "4:\n" + ".section __ex_table,\"a\"\n" + " .align 4\n" + " .long 2b,4b\n" + " .long 3b,4b\n" + ".previous" + : /* no outputs, it doesn't ever return */ + : "a" (sw), "d" (fsize), "d" (frame_offset/4-1), + "n" (frame_offset), "a" (&uc->uc_extra) + : "a0"); +#undef frame_offset + /* + * If we ever get here an exception occurred while + * building the above stack-frame. + */ + goto badframe; + } +#endif /* CONFIG_UCLINUX */ + + *pd0 = regs->d0; + return err; + +badframe: + return 1; +} + +asmlinkage int do_sigreturn(unsigned long __unused) +{ + struct switch_stack *sw = (struct switch_stack *) &__unused; + struct pt_regs *regs = (struct pt_regs *) (sw + 1); + unsigned long usp = rdusp(); + struct sigframe *frame = (struct sigframe *)(usp - 4); + sigset_t set; + int d0; + + if (verify_area(VERIFY_READ, frame, sizeof(*frame))) + goto badframe; + if (__get_user(set.sig[0], &frame->sc.sc_mask) || + (_NSIG_WORDS > 1 && + __copy_from_user(&set.sig[1], &frame->extramask, + sizeof(frame->extramask)))) + goto badframe; + + sigdelsetmask(&set, ~_BLOCKABLE); + current->blocked = set; + recalc_sigpending(); + + if (restore_sigcontext(regs, &frame->sc, frame + 1, &d0)) + goto badframe; + return d0; + +badframe: + force_sig(SIGSEGV, current); + return 0; +} + +asmlinkage int do_rt_sigreturn(unsigned long __unused) +{ + struct switch_stack *sw = (struct switch_stack *) &__unused; + struct pt_regs *regs = (struct pt_regs *) (sw + 1); + unsigned long usp = rdusp(); + struct rt_sigframe *frame = (struct rt_sigframe *)(usp - 4); + sigset_t set; + int d0; + + if (verify_area(VERIFY_READ, frame, sizeof(*frame))) + goto badframe; + if (__copy_from_user(&set, &frame->uc.uc_sigmask, sizeof(set))) + goto badframe; + + sigdelsetmask(&set, ~_BLOCKABLE); + current->blocked = set; + recalc_sigpending(); + + if (rt_restore_ucontext(regs, sw, &frame->uc, &d0)) + goto badframe; + return d0; + +badframe: + force_sig(SIGSEGV, current); + return 0; +} + +#ifndef NO_FPU +/* + * Set up a signal frame. + */ + +static inline void save_fpu_state(struct sigcontext *sc, struct pt_regs *regs) +{ + if (FPU_IS_EMU) { + /* save registers */ + memcpy(sc->sc_fpcntl, current->thread.fpcntl, 12); + memcpy(sc->sc_fpregs, current->thread.fp, 24); + return; + } + + __asm__ volatile (".chip 68k/68881\n\t" + "fsave %0\n\t" + ".chip 68k" + : : "m" (*sc->sc_fpstate) : "memory"); + + if (CPU_IS_060 ? sc->sc_fpstate[2] : sc->sc_fpstate[0]) { + fpu_version = sc->sc_fpstate[0]; + if (CPU_IS_020_OR_030 && + regs->vector >= (VEC_FPBRUC * 4) && + regs->vector <= (VEC_FPNAN * 4)) { + /* Clear pending exception in 68882 idle frame */ + if (*(unsigned short *) sc->sc_fpstate == 0x1f38) + sc->sc_fpstate[0x38] |= 1 << 3; + } + __asm__ volatile (".chip 68k/68881\n\t" + "fmovemx %/fp0-%/fp1,%0\n\t" + "fmoveml %/fpcr/%/fpsr/%/fpiar,%1\n\t" + ".chip 68k" + : /* no outputs */ + : "m" (*sc->sc_fpregs), + "m" (*sc->sc_fpcntl) + : "memory"); + } +} + +static inline int rt_save_fpu_state(struct ucontext *uc, struct pt_regs *regs) +{ + unsigned char fpstate[FPCONTEXT_SIZE]; + int context_size = CPU_IS_060 ? 8 : 0; + int err = 0; + + if (FPU_IS_EMU) { + /* save fpu control register */ + err |= copy_to_user(&uc->uc_mcontext.fpregs.f_pcr, + current->thread.fpcntl, 12); + /* save all other fpu register */ + err |= copy_to_user(uc->uc_mcontext.fpregs.f_fpregs, + current->thread.fp, 96); + return err; + } + + __asm__ volatile (".chip 68k/68881\n\t" + "fsave %0\n\t" + ".chip 68k" + : : "m" (*fpstate) : "memory"); + + err |= __put_user(*(long *)fpstate, (long *)&uc->uc_fpstate); + if (CPU_IS_060 ? fpstate[2] : fpstate[0]) { + fpregset_t fpregs; + if (!CPU_IS_060) + context_size = fpstate[1]; + fpu_version = fpstate[0]; + if (CPU_IS_020_OR_030 && + regs->vector >= (VEC_FPBRUC * 4) && + regs->vector <= (VEC_FPNAN * 4)) { + /* Clear pending exception in 68882 idle frame */ + if (*(unsigned short *) fpstate == 0x1f38) + fpstate[0x38] |= 1 << 3; + } + __asm__ volatile (".chip 68k/68881\n\t" + "fmovemx %/fp0-%/fp7,%0\n\t" + "fmoveml %/fpcr/%/fpsr/%/fpiar,%1\n\t" + ".chip 68k" + : /* no outputs */ + : "m" (*fpregs.f_fpregs), + "m" (fpregs.f_pcr) + : "memory"); + err |= copy_to_user(&uc->uc_mcontext.fpregs, &fpregs, + sizeof(fpregs)); + } + if (context_size) + err |= copy_to_user((long *)&uc->uc_fpstate + 1, fpstate + 4, + context_size); + return err; +} + +#endif + +static void setup_sigcontext(struct sigcontext *sc, struct pt_regs *regs, + unsigned long mask) +{ + sc->sc_mask = mask; + sc->sc_usp = rdusp(); + sc->sc_d0 = regs->d0; + sc->sc_d1 = regs->d1; + sc->sc_a0 = regs->a0; + sc->sc_a1 = regs->a1; + sc->sc_sr = regs->sr; + sc->sc_pc = regs->pc; + sc->sc_formatvec = regs->format << 12 | regs->vector; +#ifndef NO_FPU + save_fpu_state(sc, regs); +#endif +} + +static inline int rt_setup_ucontext(struct ucontext *uc, struct pt_regs *regs) +{ + struct switch_stack *sw = (struct switch_stack *)regs - 1; + greg_t *gregs = uc->uc_mcontext.gregs; + int err = 0; + + err |= __put_user(MCONTEXT_VERSION, &uc->uc_mcontext.version); + err |= __put_user(regs->d0, &gregs[0]); + err |= __put_user(regs->d1, &gregs[1]); + err |= __put_user(regs->d2, &gregs[2]); + err |= __put_user(regs->d3, &gregs[3]); + err |= __put_user(regs->d4, &gregs[4]); + err |= __put_user(regs->d5, &gregs[5]); + err |= __put_user(sw->d6, &gregs[6]); + err |= __put_user(sw->d7, &gregs[7]); + err |= __put_user(regs->a0, &gregs[8]); + err |= __put_user(regs->a1, &gregs[9]); + err |= __put_user(regs->a2, &gregs[10]); + err |= __put_user(sw->a3, &gregs[11]); + err |= __put_user(sw->a4, &gregs[12]); + err |= __put_user(sw->a5, &gregs[13]); + err |= __put_user(sw->a6, &gregs[14]); + err |= __put_user(rdusp(), &gregs[15]); + err |= __put_user(regs->pc, &gregs[16]); + err |= __put_user(regs->sr, &gregs[17]); +#if DAVIDM /* ifdef uc_formatvec */ + err |= __put_user((regs->format << 12) | regs->vector, &uc->uc_formatvec); +#endif +#ifndef NO_FPU + err |= rt_save_fpu_state(uc, regs); +#endif + return err; +} + +static inline void push_cache (unsigned long vaddr) +{ +#if 0 /* DAVIDM - implement this for 5407, maybe */ + /* + * Using the old cache_push_v() was really a big waste. + * + * What we are trying to do is to flush 8 bytes to ram. + * Flushing 2 cache lines of 16 bytes is much cheaper than + * flushing 1 or 2 pages, as previously done in + * cache_push_v(). + * Jes + */ + if (CPU_IS_040) { + unsigned long temp; + + __asm__ __volatile__ (".chip 68040\n\t" + "nop\n\t" + "ptestr (%1)\n\t" + "movec %%mmusr,%0\n\t" + ".chip 68k" + : "=r" (temp) + : "a" (vaddr)); + + temp &= PAGE_MASK; + temp |= vaddr & ~PAGE_MASK; + + __asm__ __volatile__ (".chip 68040\n\t" + "nop\n\t" + "cpushl %%bc,(%0)\n\t" + ".chip 68k" + : : "a" (temp)); + } + else if (CPU_IS_060) { + unsigned long temp; + __asm__ __volatile__ (".chip 68060\n\t" + "plpar (%0)\n\t" + ".chip 68k" + : "=a" (temp) + : "0" (vaddr)); + __asm__ __volatile__ (".chip 68060\n\t" + "cpushl %%bc,(%0)\n\t" + ".chip 68k" + : : "a" (temp)); + } + else { + /* + * 68030/68020 have no writeback cache; + * still need to clear icache. + * Note that vaddr is guaranteed to be long word aligned. + */ + unsigned long temp; + asm volatile ("movec %%cacr,%0" : "=r" (temp)); + temp += 4; + asm volatile ("movec %0,%%caar\n\t" + "movec %1,%%cacr" + : : "r" (vaddr), "r" (temp)); + asm volatile ("movec %0,%%caar\n\t" + "movec %1,%%cacr" + : : "r" (vaddr + 4), "r" (temp)); + } +#endif +} + +static inline void * +get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size) +{ + unsigned long usp; + + /* Default to using normal stack. */ + usp = rdusp(); + + /* This is the X/Open sanctioned signal stack switching. */ + if (ka->sa.sa_flags & SA_ONSTACK) { + if (!on_sig_stack(usp)) + usp = current->sas_ss_sp + current->sas_ss_size; + } + return (void *)((usp - frame_size) & -8UL); +} + +static void setup_frame (int sig, struct k_sigaction *ka, + sigset_t *set, struct pt_regs *regs) +{ + struct sigframe *frame; +#ifndef CONFIG_UCLINUX + int fsize = frame_extra_sizes[regs->format]; +#endif + struct sigcontext context; + int err = 0; + +#ifndef CONFIG_UCLINUX + if (fsize < 0) { +#ifdef DEBUG + printk ("setup_frame: Unknown frame format %#x\n", + regs->format); +#endif + goto give_sigsegv; + } + + frame = get_sigframe(ka, regs, sizeof(*frame) + fsize); + + if (fsize) { + err |= copy_to_user (frame + 1, regs + 1, fsize); + regs->stkadj = fsize; + } +#else /* ! CONFIG_UCLINUX */ + frame = get_sigframe(ka, regs, sizeof(*frame)); +#endif /* ! CONFIG_UCLINUX */ + + err |= __put_user((current_thread_info()->exec_domain + && current_thread_info()->exec_domain->signal_invmap + && sig < 32 + ? current_thread_info()->exec_domain->signal_invmap[sig] + : sig), + &frame->sig); + + err |= __put_user(regs->vector, &frame->code); + err |= __put_user(&frame->sc, &frame->psc); + + if (_NSIG_WORDS > 1) + err |= copy_to_user(frame->extramask, &set->sig[1], + sizeof(frame->extramask)); + + setup_sigcontext(&context, regs, set->sig[0]); + err |= copy_to_user (&frame->sc, &context, sizeof(context)); + + /* Set up to return from userspace. */ + err |= __put_user(frame->retcode, &frame->pretcode); + /* moveq #,d0; trap #0 */ + err |= __put_user(0x70004e40 + (__NR_sigreturn << 16), + (long *)(frame->retcode)); + + if (err) + goto give_sigsegv; + + push_cache ((unsigned long) &frame->retcode); + + /* Set up registers for signal handler */ + wrusp ((unsigned long) frame); + regs->pc = (unsigned long) ka->sa.sa_handler; + +adjust_stack: + /* Prepare to skip over the extra stuff in the exception frame. */ + if (regs->stkadj) { + struct pt_regs *tregs = + (struct pt_regs *)((ulong)regs + regs->stkadj); +#if DEBUG + printk("Performing stackadjust=%04x\n", regs->stkadj); +#endif + /* This must be copied with decreasing addresses to + handle overlaps. */ + tregs->vector = 0; + tregs->format = 0; + tregs->pc = regs->pc; + tregs->sr = regs->sr; + } + return; + +give_sigsegv: + if (sig == SIGSEGV) + ka->sa.sa_handler = SIG_DFL; + force_sig(SIGSEGV, current); + goto adjust_stack; +} + +static void setup_rt_frame (int sig, struct k_sigaction *ka, siginfo_t *info, + sigset_t *set, struct pt_regs *regs) +{ + struct rt_sigframe *frame; +#ifndef CONFIG_UCLINUX + int fsize = frame_extra_sizes[regs->format]; +#endif + int err = 0; + +#ifndef CONFIG_UCLINUX + if (fsize < 0) { +#ifdef DEBUG + printk ("setup_frame: Unknown frame format %#x\n", + regs->format); +#endif + goto give_sigsegv; + } +#endif + + frame = get_sigframe(ka, regs, sizeof(*frame)); + +#ifndef CONFIG_UCLINUX + if (fsize) { + err |= copy_to_user (&frame->uc.uc_extra, regs + 1, fsize); + regs->stkadj = fsize; + } +#endif + + err |= __put_user((current_thread_info()->exec_domain + && current_thread_info()->exec_domain->signal_invmap + && sig < 32 + ? current_thread_info()->exec_domain->signal_invmap[sig] + : sig), + &frame->sig); + err |= __put_user(&frame->info, &frame->pinfo); + err |= __put_user(&frame->uc, &frame->puc); + err |= copy_siginfo_to_user(&frame->info, info); + + /* Create the ucontext. */ + err |= __put_user(0, &frame->uc.uc_flags); + err |= __put_user(0, &frame->uc.uc_link); + err |= __put_user((void *)current->sas_ss_sp, + &frame->uc.uc_stack.ss_sp); + err |= __put_user(sas_ss_flags(rdusp()), + &frame->uc.uc_stack.ss_flags); + err |= __put_user(current->sas_ss_size, &frame->uc.uc_stack.ss_size); + err |= rt_setup_ucontext(&frame->uc, regs); + err |= copy_to_user (&frame->uc.uc_sigmask, set, sizeof(*set)); + + /* Set up to return from userspace. */ + err |= __put_user(frame->retcode, &frame->pretcode); + /* moveq #,d0; notb d0; trap #0 */ + err |= __put_user(0x70004600 + ((__NR_rt_sigreturn ^ 0xff) << 16), + (long *)(frame->retcode + 0)); + err |= __put_user(0x4e40, (short *)(frame->retcode + 4)); + + if (err) + goto give_sigsegv; + + push_cache ((unsigned long) &frame->retcode); + + /* Set up registers for signal handler */ + wrusp ((unsigned long) frame); + regs->pc = (unsigned long) ka->sa.sa_handler; + +adjust_stack: + /* Prepare to skip over the extra stuff in the exception frame. */ + if (regs->stkadj) { + struct pt_regs *tregs = + (struct pt_regs *)((ulong)regs + regs->stkadj); +#if DEBUG + printk("Performing stackadjust=%04x\n", regs->stkadj); +#endif + /* This must be copied with decreasing addresses to + handle overlaps. */ + tregs->vector = 0; + tregs->format = 0; + tregs->pc = regs->pc; + tregs->sr = regs->sr; + } + return; + +give_sigsegv: + if (sig == SIGSEGV) + ka->sa.sa_handler = SIG_DFL; + force_sig(SIGSEGV, current); + goto adjust_stack; +} + +static inline void +handle_restart(struct pt_regs *regs, struct k_sigaction *ka, int has_handler) +{ + switch (regs->d0) { + case -ERESTARTNOHAND: + if (!has_handler) + goto do_restart; + regs->d0 = -EINTR; + break; + + case -ERESTARTSYS: + if (has_handler && !(ka->sa.sa_flags & SA_RESTART)) { + regs->d0 = -EINTR; + break; + } + /* fallthrough */ + case -ERESTARTNOINTR: + do_restart: + regs->d0 = regs->orig_d0; + regs->pc -= 2; + break; + } +} + +/* + * OK, we're invoking a handler + */ +static void +handle_signal(int sig, struct k_sigaction *ka, siginfo_t *info, + sigset_t *oldset, struct pt_regs *regs) +{ + /* are we from a system call? */ + if (regs->orig_d0 >= 0) + /* If so, check system call restarting.. */ + handle_restart(regs, ka, 1); + + /* set up the stack frame */ + if (ka->sa.sa_flags & SA_SIGINFO) + setup_rt_frame(sig, ka, info, oldset, regs); + else + setup_frame(sig, ka, oldset, regs); + + if (ka->sa.sa_flags & SA_ONESHOT) + ka->sa.sa_handler = SIG_DFL; + + sigorsets(¤t->blocked,¤t->blocked,&ka->sa.sa_mask); + if (!(ka->sa.sa_flags & SA_NODEFER)) + sigaddset(¤t->blocked,sig); + recalc_sigpending(); +} + +/* + * Note that 'init' is a special process: it doesn't get signals it doesn't + * want to handle. Thus you cannot kill init even with a SIGKILL even by + * mistake. + * + * Note that we go through the signals twice: once to check the signals + * that the kernel can handle, and then we build all the user-level signal + * handling stack-frames in one go after that. + */ +asmlinkage int do_signal(sigset_t *oldset, struct pt_regs *regs) +{ + siginfo_t info; + struct k_sigaction *ka; + + current->thread.esp0 = (unsigned long) regs; + + if (!oldset) + oldset = ¤t->blocked; + + for (;;) { + int signr; + + signr = dequeue_signal(¤t->pending, ¤t->blocked, &info); + + if (!signr) + break; + + if ((current->ptrace & PT_PTRACED) && signr != SIGKILL) { + current->exit_code = signr; + current->state = TASK_STOPPED; + regs->sr &= ~PS_T; + + /* Did we come from a system call? */ + if (regs->orig_d0 >= 0) { + /* Restart the system call the same way as + if the process were not traced. */ + struct k_sigaction *ka = + ¤t->sig->action[signr-1]; + int has_handler = + (ka->sa.sa_handler != SIG_IGN && + ka->sa.sa_handler != SIG_DFL); + handle_restart(regs, ka, has_handler); + } + notify_parent(current, SIGCHLD); + schedule(); + + /* We're back. Did the debugger cancel the sig? */ + if (!(signr = current->exit_code)) { + discard_frame: +#ifndef CONFIG_UCLINUX + /* Make sure that a faulted bus cycle isn't + restarted (only needed on the 680[23]0). */ + if (regs->format == 10 || regs->format == 11) + regs->stkadj = frame_extra_sizes[regs->format]; +#endif + continue; + } + current->exit_code = 0; + + /* The debugger continued. Ignore SIGSTOP. */ + if (signr == SIGSTOP) + goto discard_frame; + + /* Update the siginfo structure. Is this good? */ + if (signr != info.si_signo) { + info.si_signo = signr; + info.si_errno = 0; + info.si_code = SI_USER; + info.si_pid = current->parent->pid; + info.si_uid = current->parent->uid; + } + + /* If the (new) signal is now blocked, requeue it. */ + if (sigismember(¤t->blocked, signr)) { + send_sig_info(signr, &info, current); + continue; + } + } + + ka = ¤t->sig->action[signr-1]; + if (ka->sa.sa_handler == SIG_IGN) { + if (signr != SIGCHLD) + continue; + /* Check for SIGCHLD: it's special. */ + while (sys_wait4(-1, NULL, WNOHANG, NULL) > 0) + /* nothing */; + continue; + } + + if (ka->sa.sa_handler == SIG_DFL) { + int exit_code = signr; + + if (current->pid == 1) + continue; + + switch (signr) { + case SIGCONT: case SIGCHLD: + case SIGWINCH: case SIGURG: + continue; + + case SIGTSTP: case SIGTTIN: case SIGTTOU: + if (is_orphaned_pgrp(current->pgrp)) + continue; + /* FALLTHRU */ + + case SIGSTOP: + current->state = TASK_STOPPED; + current->exit_code = signr; + if (!(current->parent->sig->action[SIGCHLD-1] + .sa.sa_flags & SA_NOCLDSTOP)) + notify_parent(current, SIGCHLD); + schedule(); + continue; + + case SIGQUIT: case SIGILL: case SIGTRAP: + case SIGIOT: case SIGFPE: case SIGSEGV: + case SIGBUS: case SIGSYS: case SIGXCPU: case SIGXFSZ: + if (do_coredump(signr, regs)) + exit_code |= 0x80; + /* FALLTHRU */ + + default: + sigaddset(¤t->pending.signal, signr); + recalc_sigpending(); + current->flags |= PF_SIGNALED; + do_exit(exit_code); + /* NOTREACHED */ + } + } + + /* Whee! Actually deliver the signal. */ + handle_signal(signr, ka, &info, oldset, regs); + return 1; + } + + /* Did we come from a system call? */ + if (regs->orig_d0 >= 0) + /* Restart the system call - no handlers present */ + handle_restart(regs, NULL, 0); + + /* If we are about to discard some frame stuff we must copy + over the remaining frame. */ + if (regs->stkadj) { + struct pt_regs *tregs = + (struct pt_regs *) ((ulong) regs + regs->stkadj); + + /* This must be copied with decreasing addresses to + handle overlaps. */ + tregs->vector = 0; + tregs->format = 0; + tregs->pc = regs->pc; + tregs->sr = regs->sr; + } + return 0; +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68328/tools/bootlogo.pl linux.2.5.40-ac2/arch/m68knommu/platform/68328/tools/bootlogo.pl --- linux.2.5.40/arch/m68knommu/platform/68328/tools/bootlogo.pl 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68328/tools/bootlogo.pl 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,10 @@ + +$_ = join("", <>); + +s/(0x[0-9a-f]{2})/sprintf("0x%.2x",ord(pack("b8",unpack("B8",chr(hex($1))))))/gei; + +s/^ / .byte /gm; +s/[,};]+$//gm; +s/^static.*//gm; + +print $_; diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68328/tools/fixup.pl linux.2.5.40-ac2/arch/m68knommu/platform/68328/tools/fixup.pl --- linux.2.5.40/arch/m68knommu/platform/68328/tools/fixup.pl 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68328/tools/fixup.pl 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,91 @@ +#!/usr/bin/perl + +# +# Nasty piece of work, designed to translated linux.bin binary image +# in to several different formats. +# +# Copyright (C) 1998 Kenneth Albanowski , +# The Silver Hammer Group, Ltd. +# + +@CRC = ( + 0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50A5, 0x60C6, 0x70E7, + 0x8108, 0x9129, 0xA14A, 0xB16B, 0xC18C, 0xD1AD, 0xE1CE, 0xF1EF, + 0x1231, 0x0210, 0x3273, 0x2252, 0x52B5, 0x4294, 0x72F7, 0x62D6, + 0x9339, 0x8318, 0xB37B, 0xA35A, 0xD3BD, 0xC39C, 0xF3FF, 0xE3DE, + 0x2462, 0x3443, 0x0420, 0x1401, 0x64E6, 0x74C7, 0x44A4, 0x5485, + 0xA56A, 0xB54B, 0x8528, 0x9509, 0xE5EE, 0xF5CF, 0xC5AC, 0xD58D, + 0x3653, 0x2672, 0x1611, 0x0630, 0x76D7, 0x66F6, 0x5695, 0x46B4, + 0xB75B, 0xA77A, 0x9719, 0x8738, 0xF7DF, 0xE7FE, 0xD79D, 0xC7BC, + 0x48C4, 0x58E5, 0x6886, 0x78A7, 0x0840, 0x1861, 0x2802, 0x3823, + 0xC9CC, 0xD9ED, 0xE98E, 0xF9AF, 0x8948, 0x9969, 0xA90A, 0xB92B, + 0x5AF5, 0x4AD4, 0x7AB7, 0x6A96, 0x1A71, 0x0A50, 0x3A33, 0x2A12, + 0xDBFD, 0xCBDC, 0xFBBF, 0xEB9E, 0x9B79, 0x8B58, 0xBB3B, 0xAB1A, + 0x6CA6, 0x7C87, 0x4CE4, 0x5CC5, 0x2C22, 0x3C03, 0x0C60, 0x1C41, + 0xEDAE, 0xFD8F, 0xCDEC, 0xDDCD, 0xAD2A, 0xBD0B, 0x8D68, 0x9D49, + 0x7E97, 0x6EB6, 0x5ED5, 0x4EF4, 0x3E13, 0x2E32, 0x1E51, 0x0E70, + 0xFF9F, 0xEFBE, 0xDFDD, 0xCFFC, 0xBF1B, 0xAF3A, 0x9F59, 0x8F78, + 0x9188, 0x81A9, 0xB1CA, 0xA1EB, 0xD10C, 0xC12D, 0xF14E, 0xE16F, + 0x1080, 0x00A1, 0x30C2, 0x20E3, 0x5004, 0x4025, 0x7046, 0x6067, + 0x83B9, 0x9398, 0xA3FB, 0xB3DA, 0xC33D, 0xD31C, 0xE37F, 0xF35E, + 0x02B1, 0x1290, 0x22F3, 0x32D2, 0x4235, 0x5214, 0x6277, 0x7256, + 0xB5EA, 0xA5CB, 0x95A8, 0x8589, 0xF56E, 0xE54F, 0xD52C, 0xC50D, + 0x34E2, 0x24C3, 0x14A0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405, + 0xA7DB, 0xB7FA, 0x8799, 0x97B8, 0xE75F, 0xF77E, 0xC71D, 0xD73C, + 0x26D3, 0x36F2, 0x0691, 0x16B0, 0x6657, 0x7676, 0x4615, 0x5634, + 0xD94C, 0xC96D, 0xF90E, 0xE92F, 0x99C8, 0x89E9, 0xB98A, 0xA9AB, + 0x5844, 0x4865, 0x7806, 0x6827, 0x18C0, 0x08E1, 0x3882, 0x28A3, + 0xCB7D, 0xDB5C, 0xEB3F, 0xFB1E, 0x8BF9, 0x9BD8, 0xABBB, 0xBB9A, + 0x4A75, 0x5A54, 0x6A37, 0x7A16, 0x0AF1, 0x1AD0, 0x2AB3, 0x3A92, + 0xFD2E, 0xED0F, 0xDD6C, 0xCD4D, 0xBDAA, 0xAD8B, 0x9DE8, 0x8DC9, + 0x7C26, 0x6C07, 0x5C64, 0x4C45, 0x3CA2, 0x2C83, 0x1CE0, 0x0CC1, + 0xEF1F, 0xFF3E, 0xCF5D, 0xDF7C, 0xAF9B, 0xBFBA, 0x8FD9, 0x9FF8, + 0x6E17, 0x7E36, 0x4E55, 0x5E74, 0x2E93, 0x3EB2, 0x0ED1, 0x1EF0 +); + +sub CrcBlock { + my($data,$crc) = @_; + my($i); + printf "Crc of %d bytes\n", length($data); + for ($i=0;$i>8) ^ +# ord(substr($data,$i,1)), +#$CRC[ ($crc>>8) ^ +# ord(substr($data,$i,1)) & +#0xff]; +# + + $crc = ($crc << 8) ^ $CRC[ + ((($crc>>8) & 0xff) ^ + ord(substr($data,$i,1))) & + 0xff + ]; + $crc &= 0xffff; + } + return $crc & 0xffff; +} + +open(T,"); +close(T); + +$realLength = length($image); +$image .= "\0" x (0x100000 - $realLength); + +$posOfCardLength = 108; +$posOfChecksum = 112; +#$crc = CrcBlock(substr($image, 0, $posOfChecksum), 0); +#$crc = CrcBlock(substr($image, $posOfChecksum+2), $crc); + +#substr($image, $posOfCardLength, 4) = pack("N", length($image)); +#substr($image, $posOfChecksum, 2) = pack("n", $crc); + +open(O,">linux.trg"); +print O substr($image, 0x10000, (($realLength - 0x10000) + 0xffff) & ~0xffff); +close(O); + +open(O, ">linux.rom"); +print O $image; +close(O); diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68328/traps.c linux.2.5.40-ac2/arch/m68knommu/platform/68328/traps.c --- linux.2.5.40/arch/m68knommu/platform/68328/traps.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68328/traps.c 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,288 @@ +/* + * linux/arch/$(ARCH)/platform/$(PLATFORM)/traps.c -- general exception handling code + * + * Cloned from Linux/m68k. + * + * No original Copyright holder listed, + * Probabily original (C) Roman Zippel (assigned DJD, 1999) + * + * Copyright 2000-2001 Lineo, Inc. D. Jeff Dionne + * Copyright 1999-2000 D. Jeff Dionne, + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive + * for more details. + * + * VZ Support/Fixes Evan Stawnyczy + */ + +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +/* table for system interrupt handlers */ +static irq_handler_t irq_list[SYS_IRQS]; + +static const char *default_names[SYS_IRQS] = { + "spurious int", "int1 handler", "int2 handler", "int3 handler", + "int4 handler", "int5 handler", "int6 handler", "int7 handler" +}; + +/* The number of spurious interrupts */ +volatile unsigned int num_spurious; + +#define NUM_IRQ_NODES 16 +static irq_node_t nodes[NUM_IRQ_NODES]; + +/* (es) */ +/* note: maybe EZ and VZ should just also define CONFIG_M68328? */ +#if defined( CONFIG_M68328 ) || defined ( CONFIG_M68EZ328 ) || defined ( CONFIG_M68VZ328 ) + +asm (" + .global _start, __ramend + .section .romvec + +e_vectors: + .long __ramend-4, _start, buserr, trap, trap, trap, trap, trap + .long trap, trap, trap, trap, trap, trap, trap, trap + .long trap, trap, trap, trap, trap, trap, trap, trap + .long trap, trap, trap, trap + .long trap, trap, trap, trap + /*.long inthandler, inthandler, inthandler, inthandler + .long inthandler4, inthandler, inthandler, inthandler */ + /* TRAP #0-15 */ + .long system_call, trap, trap, trap, trap, trap, trap, trap + .long trap, trap, trap, trap, trap, trap, trap, trap + .long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 + .text + +ignore: rte + +"); +#endif /* CONFIG_M68328 || CONFIG_M68EZ328 || CONFIG_M68VZ328 */ +/* (/es) */ + +/* + * void init_IRQ(void) + * + * Parameters: None + * + * Returns: Nothing + * + * This function should be called during kernel startup to initialize + * the IRQ handling routines. + */ + +void init_IRQ(void) +{ + int i; + + for (i = 0; i < SYS_IRQS; i++) { + if (mach_default_handler) + irq_list[i].handler = (*mach_default_handler)[i]; + else + irq_list[i].handler = NULL; + irq_list[i].flags = IRQ_FLG_STD; + irq_list[i].dev_id = NULL; + irq_list[i].devname = default_names[i]; + } + + for (i = 0; i < NUM_IRQ_NODES; i++) + nodes[i].handler = NULL; + + mach_init_IRQ (); +} + +irq_node_t *new_irq_node(void) +{ + irq_node_t *node; + short i; + + for (node = nodes, i = NUM_IRQ_NODES-1; i >= 0; node++, i--) + if (!node->handler) + return node; + + printk ("new_irq_node: out of nodes\n"); + return NULL; +} + +int request_irq(unsigned int irq, void (*handler)(int, void *, struct pt_regs *), + unsigned long flags, const char *devname, void *dev_id) +{ + if (irq) + return mach_request_irq(irq, handler, flags, devname, dev_id); + + if (irq < IRQ1 || irq > IRQ7) { + printk("%s: Incorrect IRQ %d from %s\n", __FUNCTION__, irq, devname); + return -ENXIO; + } + + if (!(irq_list[irq].flags & IRQ_FLG_STD)) { + if (irq_list[irq].flags & IRQ_FLG_LOCK) { + printk("%s: IRQ %d from %s is not replaceable\n", + __FUNCTION__, irq, irq_list[irq].devname); + return -EBUSY; + } + if (flags & IRQ_FLG_REPLACE) { + printk("%s: %s can't replace IRQ %d from %s\n", + __FUNCTION__, devname, irq, irq_list[irq].devname); + return -EBUSY; + } + } + irq_list[irq].handler = handler; + irq_list[irq].flags = flags; + irq_list[irq].dev_id = dev_id; + irq_list[irq].devname = devname; + return 0; +} + +void free_irq(unsigned int irq, void *dev_id) +{ + if (irq) { + mach_free_irq(irq, dev_id); + return; + } + + if (irq < IRQ1 || irq > IRQ7) { + printk("%s: Incorrect IRQ %d\n", __FUNCTION__, irq); + return; + } + + if (irq_list[irq].dev_id != dev_id) + printk("%s: Removing probably wrong IRQ %d from %s\n", + __FUNCTION__, irq, irq_list[irq].devname); + + if (mach_default_handler) + irq_list[irq].handler = (*mach_default_handler)[irq]; + else + irq_list[irq].handler = NULL; + irq_list[irq].flags = IRQ_FLG_STD; + irq_list[irq].dev_id = NULL; + irq_list[irq].devname = default_names[irq]; +} + +/* + * Do we need these probe functions on the m68k? + */ +unsigned long probe_irq_on (void) +{ + return 0; +} + +int probe_irq_off (unsigned long irqs) +{ + return 0; +} + +asmlinkage void process_int(unsigned long vec, struct pt_regs *fp) +{ + if (vec >= VEC_INT1 && vec <= VEC_INT7 && !MACH_IS_BVME6000) { + vec -= VEC_SPUR; + kstat.irqs[0][vec]++; + irq_list[vec].handler(vec, irq_list[vec].dev_id, fp); + } else { + if (mach_process_int) + mach_process_int(vec, fp); + else + panic("Can't process interrupt vector %ld\n", vec); + return; + } +} + +int show_interrupts(struct seq_file *p, void *v) +{ + int i; + + /* autovector interrupts */ + if (mach_default_handler) { + for (i = 0; i < SYS_IRQS; i++) { + seq_printf(p, "auto %2d: %10u ", i, + i ? kstat.irqs[0][i] : num_spurious); + seq_printf(p, " "); + seq_printf(p, "%s\n", irq_list[i].devname); + + } + } + mach_get_irq_list(p, v); + return(0); +} + +/* + * Generic dumping code. Used for panic and debug. + */ + +void dump(struct pt_regs *fp) +{ + unsigned long *sp; + unsigned char *tp; + int i; + + printk("\nCURRENT PROCESS:\n\n"); +#if 0 +{ + extern int swt_lastjiffies, swt_reference; + printk("WATCHDOG: jiffies=%d lastjiffies=%d [%d] reference=%d\n", + jiffies, swt_lastjiffies, (swt_lastjiffies - jiffies), + swt_reference); +} +#endif + printk("COMM=%s PID=%d\n", current->comm, current->pid); + if (current->mm) { + printk("TEXT=%08x-%08x DATA=%08x-%08x BSS=%08x-%08x\n", + (int) current->mm->start_code, + (int) current->mm->end_code, + (int) current->mm->start_data, + (int) current->mm->end_data, + (int) current->mm->end_data, + (int) current->mm->brk); + printk("USER-STACK=%08x\n\n", + (int) current->mm->start_stack); + } + + printk("PC: %08lx\n", fp->pc); + printk("SR: %08lx SP: %08lx\n", (long) fp->sr, (long) fp); + printk("d0: %08lx d1: %08lx d2: %08lx d3: %08lx\n", + fp->d0, fp->d1, fp->d2, fp->d3); + printk("d4: %08lx d5: %08lx a0: %08lx a1: %08lx\n", + fp->d4, fp->d5, fp->a0, fp->a1); + printk("\nUSP: %08x TRAPFRAME: %08x\n", + rdusp(), (unsigned int) fp); + + printk("\nCODE:"); + tp = ((unsigned char *) fp->pc) - 0x20; + for (sp = (unsigned long *) tp, i = 0; (i < 0x40); i += 4) { + if ((i % 0x10) == 0) + printk("\n%08x: ", (int) (tp + i)); + printk("%08x ", (int) *sp++); + } + printk("\n"); + + printk("\nKERNEL STACK:"); + tp = ((unsigned char *) fp) - 0x40; + for (sp = (unsigned long *) tp, i = 0; (i < 0xc0); i += 4) { + if ((i % 0x10) == 0) + printk("\n%08x: ", (int) (tp + i)); + printk("%08x ", (int) *sp++); + } + printk("\n"); +/* + if (STACK_MAGIC != *(unsigned long *)current->kernel_stack_page) + printk("(Possibly corrupted stack page??)\n"); + printk("\n"); +*/ + printk("\nUSER STACK:"); + tp = (unsigned char *) (rdusp() - 0x10); + for (sp = (unsigned long *) tp, i = 0; (i < 0x80); i += 4) { + if ((i % 0x10) == 0) + printk("\n%08x: ", (int) (tp + i)); + printk("%08x ", (int) *sp++); + } + printk("\n\n"); +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68360/config.c linux.2.5.40-ac2/arch/m68knommu/platform/68360/config.c --- linux.2.5.40/arch/m68knommu/platform/68360/config.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68360/config.c 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,208 @@ +/* + * linux/arch/$(ARCH)/platform/$(PLATFORM)/config.c + * + * Copyright (c) 2000 Michael Leslie + * Copyright (C) 1993 Hamish Macdonald + * Copyright (C) 1999 D. Jeff Dionne + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive + * for more details. + */ + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#ifdef CONFIG_UCQUICC +#include "uCquicc/bootstd.h" +#endif + +#ifdef CONFIG_PILOT +#include "PalmV/romfs.h" +#endif + +#include +void M68360_init_IRQ(void); + +extern QUICC *pquicc; + +/* TODO DON"T Hard Code this */ +/* calculate properly using the right PLL and prescaller */ +// unsigned int system_clock = 33000000l; +extern unsigned long int system_clock; //In kernel setup.c + + +//extern void register_console(void (*proc)(const char *)); + +extern void config_M68360_irq(void); + + +void BSP_sched_init(void (*timer_routine)(int, void *, struct pt_regs *)) +{ + unsigned char prescaler; + unsigned short tgcr_save; + int return_value; + +#if 0 + /* Restart mode, Enable int, 32KHz, Enable timer */ + TCTL = TCTL_OM | TCTL_IRQEN | TCTL_CLKSOURCE_32KHZ | TCTL_TEN; + /* Set prescaler (Divide 32KHz by 32)*/ + TPRER = 31; + /* Set compare register 32Khz / 32 / 10 = 100 */ + TCMP = 10; + + request_irq(IRQ_MACHSPEC | 1, timer_routine, IRQ_FLG_LOCK, "timer", NULL); +#endif + + /* General purpose quicc timers: MC68360UM p7-20 */ + + /* Set up timer 1 (in [1..4]) to do 100Hz */ + tgcr_save = pquicc->timer_tgcr & 0xfff0; + pquicc->timer_tgcr = tgcr_save; /* stop and reset timer 1 */ + /* pquicc->timer_tgcr |= 0x4444; */ /* halt timers when FREEZE (ie bdm freeze) */ + + prescaler = 8; + pquicc->timer_tmr1 = 0x001a | /* or=1, frr=1, iclk=01b */ + (unsigned short)((prescaler - 1) << 8); + + pquicc->timer_tcn1 = 0x0000; /* initial count */ + /* calculate interval for 100Hz based on the _system_clock: */ + pquicc->timer_trr1 = (system_clock/ prescaler) / HZ; /* reference count */ + + pquicc->timer_ter1 = 0x0003; /* clear timer events */ + + /* enable timer 1 interrupt in CIMR */ +// request_irq(IRQ_MACHSPEC | CPMVEC_TIMER1, timer_routine, IRQ_FLG_LOCK, "timer", NULL); + //return_value = request_irq( CPMVEC_TIMER1, timer_routine, IRQ_FLG_LOCK, "timer", NULL); + return_value = request_irq(CPMVEC_TIMER1 , timer_routine, IRQ_FLG_LOCK, + "Timer", NULL); + + /* Start timer 1: */ + tgcr_save = (pquicc->timer_tgcr & 0xfff0) | 0x0001; + pquicc->timer_tgcr = tgcr_save; +} + + +void BSP_tick(void) +{ + /* Reset Timer1 */ + /* TSTAT &= 0; */ + + pquicc->timer_ter1 = 0x0002; /* clear timer event */ +} + +unsigned long BSP_gettimeoffset (void) +{ + return 0; +} + +void BSP_gettod (int *yearp, int *monp, int *dayp, + int *hourp, int *minp, int *secp) +{ +} + +int BSP_hwclk(int op, struct hwclk_time *t) +{ + if (!op) { + /* read */ + } else { + /* write */ + } + return 0; +} + +int BSP_set_clock_mmss (unsigned long nowtime) +{ +#if 0 + short real_seconds = nowtime % 60, real_minutes = (nowtime / 60) % 60; + + tod->second1 = real_seconds / 10; + tod->second2 = real_seconds % 10; + tod->minute1 = real_minutes / 10; + tod->minute2 = real_minutes % 10; +#endif + return 0; +} + +void BSP_reset (void) +{ + cli(); +/* asm volatile (" */ +/* moveal #0x10c00000, %a0; */ +/* moveb #0, 0xFFFFF300; */ +/* moveal 0(%a0), %sp; */ +/* moveal 4(%a0), %a0; */ +/* jmp (%a0); */ +/* "); */ + + asm volatile (" + moveal #_start, %a0; + moveb #0, 0xFFFFF300; + moveal 0(%a0), %sp; + moveal 4(%a0), %a0; + jmp (%a0); + "); + + +} + +unsigned char *scc1_hwaddr; +static int errno; + +#if defined (CONFIG_UCQUICC) +_bsc0(char *, getserialnum) +_bsc1(unsigned char *, gethwaddr, int, a) +_bsc1(char *, getbenv, char *, a) +#endif + + +void config_BSP(char *command, int len) +{ + unsigned char *p; +/* #if defined (CONFIG_M68360_SMC_UART) */ +/* extern void console_print_68360(const char * b); */ +/* register_console(console_print_68360); */ +/* #endif */ + + printk("\n68360 QUICC support (C) 2000 Lineo Inc.\n"); + +#if defined(CONFIG_UCQUICC) && 0 + printk("uCquicc serial string [%s]\n",getserialnum()); + p = scc1_hwaddr = gethwaddr(0); + printk("uCquicc hwaddr %.2x:%.2x:%.2x:%.2x:%.2x:%.2x\n", + p[0], p[1], p[2], p[3], p[4], p[5]); + + p = getbenv("APPEND"); + if (p) + strcpy(p,command); + else + command[0] = 0; +#else + scc1_hwaddr = "\00\01\02\03\04\05"; +#endif + + mach_sched_init = BSP_sched_init; + mach_tick = BSP_tick; + mach_gettimeoffset = BSP_gettimeoffset; + mach_gettod = BSP_gettod; + mach_hwclk = NULL; + mach_set_clock_mmss = NULL; +// mach_mksound = NULL; + mach_reset = BSP_reset; + //Kendrick's Change + mach_trap_init = M68360_init_IRQ; + // mach_debug_init = NULL; + + config_M68360_irq(); +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68360/entry.S linux.2.5.40-ac2/arch/m68knommu/platform/68360/entry.S --- linux.2.5.40/arch/m68knommu/platform/68360/entry.S 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68360/entry.S 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,592 @@ +/* -*- mode: asm -*- + * + * linux/arch/m68knommu/platform/68360/entry.S + * + * Copyright (C) 1991, 1992 Linus Torvalds + * Copyright (C) 2001 SED Systems, a Division of Calian Ltd. + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file README.legal in the main directory of this archive + * for more details. + * + * Linux/m68k support by Hamish Macdonald + * M68360 Port by SED Systems, and Lineo. + * + */ + +/* + * entry.S contains the system-call and fault low-level handling routines. + * This also contains the timer-interrupt handler, as well as all interrupts + * and faults that can result in a task-switch. + * + * NOTE: This code handles signal-recognition, which happens every time + * after a timer-interrupt and after each system call. + * + */ + +/* + * 12/03/96 Jes: Currently we only support m68k single-cpu systems, so + * all pointers that used to be 'current' are now entry + * number 0 in the 'current_set' list. + */ + +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "m68k_defs.h" + +#define IMMED # +#define DBG_PUTC(x) moveb IMMED x,0xfffff907; \ + moveb IMMED '\r',0xfffff907; \ + moveb IMMED '\n',0xfffff907 +LD0 = 0x20 +LORIG_D0 = 0x24 + +.globl SYMBOL_NAME(system_call) +.globl SYMBOL_NAME(buserr) +.globl SYMBOL_NAME(trap) +.globl SYMBOL_NAME(resume) +.globl SYMBOL_NAME(ret_from_exception) +.globl SYMBOL_NAME(ret_from_signal) +.globl SYMBOL_NAME(sys_call_table) +.globl SYMBOL_NAME(sys_fork) +.globl SYMBOL_NAME(sys_clone) +.globl SYMBOL_NAME(sys_vfork) +.globl SYMBOL_NAME(ret_from_interrupt) +.globl SYMBOL_NAME(bad_interrupt) +.globl SYMBOL_NAME(inthandler) + +.text +ENTRY(buserr) + SAVE_ALL_INT + /* GET_CURRENT(%d0) */ + movel %sp,%sp@- /* stack frame pointer argument*/ + bsrw SYMBOL_NAME(buserr_c) + addql #4,%sp + jra SYMBOL_NAME(ret_from_exception) + +ENTRY(trap) + SAVE_ALL_INT + GET_CURRENT(%d0) + moveq.l #-1,%d0 + move.l %d0,%sp@(LORIG_D0) +/* may have to test for LFORMATVEC here as was done in teh 2.0 module */ + movel %sp,%sp@- /* stack frame pointer argument*/ + bsrw SYMBOL_NAME(trap_c) + addql #4,%sp + jra SYMBOL_NAME(ret_from_exception) + + +ENTRY(reschedule) + + /* save top of frame*/ + movel SYMBOL_NAME(_current_task),%a2 + movel %sp,%a2@(TASK_THREAD+THREAD_ESP0) + + pea SYMBOL_NAME(ret_from_exception) + jmp SYMBOL_NAME(schedule) + + /* After a fork we jump here directly from resume,*/ + /* so that %d1 contains the previous task*/ + /* Theoretically only needed on SMP, but let's watch*/ + /* what happens in schedule_tail() in future...*/ +ENTRY(ret_from_fork) + movel %d1,%sp@- + jsr SYMBOL_NAME(schedule_tail) + addql #4,%sp + jra SYMBOL_NAME(ret_from_exception) + +badsys: + movel #-ENOSYS,%sp@(PT_D0) + jra SYMBOL_NAME(ret_from_exception) + +do_trace: + movel #-ENOSYS,%sp@(PT_D0) /* needed for strace*/ + subql #4,%sp + SAVE_SWITCH_STACK + jbsr SYMBOL_NAME(syscall_trace) + RESTORE_SWITCH_STACK + addql #4,%sp + movel %sp@(PT_ORIG_D0),%d1 + movel #-ENOSYS,%d0 + cmpl #NR_syscalls,%d1 + jcc 1f +/* jbsr @(SYMBOL_NAME(sys_call_table),%d1:l:4)@(0) */ + lsl #2,%d1 +#if 1 + lea SYMBOL_NAME(sys_call_table), %a0 + jbsr %a0@(%d1) +#else + bsrw SYMBOL_NAME(sys_call_table)@(%d1) +#endif + +1: movel %d0,%sp@(PT_D0) /* save the return value*/ + subql #4,%sp /* dummy return address*/ + SAVE_SWITCH_STACK + jbsr SYMBOL_NAME(syscall_trace) + +SYMBOL_NAME_LABEL(ret_from_signal) + RESTORE_SWITCH_STACK + addql #4,%sp + jra SYMBOL_NAME(ret_from_exception) + +ENTRY(system_call) + SAVE_ALL_SYS + + GET_CURRENT(%d1) + /* save top of frame*/ + movel SYMBOL_NAME(_current_task),%a2 + movel %sp,%a2@(TASK_THREAD+THREAD_ESP0) + + btst #PF_TRACESYS_BIT,%a2@(TASK_FLAGS+PF_TRACESYS_OFF) + jne do_trace + cmpl #NR_syscalls,%d0 + jcc badsys +/* jbsr @(SYMBOL_NAME(sys_call_table),%d0:l:4)@(0) */ + lsl #2,%d0 +#if 1 + lea SYMBOL_NAME(sys_call_table),%a0 + movel %a0@(%d0), %a0 + jbsr %a0@ +#else + jbsr SYMBOL_NAME(sys_call_table)@(%d0) +#endif + movel %d0,%sp@(PT_D0) /* save the return value*/ + +SYMBOL_NAME_LABEL(ret_from_exception) + btst #5,%sp@(PT_SR) /* check if returning to kernel*/ + bnes 2f /* if so, skip resched, signals*/ + /* only allow interrupts when we are really the last one on the*/ + /* kernel stack, otherwise stack overflow can occur during*/ + /* heavy interupt load*/ + andw #ALLOWINT,%sr + movel SYMBOL_NAME(_current_task),%a2 + tstl %a2@(TASK_NEEDRESCHED) + jne SYMBOL_NAME(reschedule) +#if 0 + cmpl #SYMBOL_NAME(task),%a2 /* task[0] cannot have signals*/ + jeq 2f +#endif + /* check for delayed trace*/ + bclr #PF_DTRACE_BIT,%a2@(TASK_FLAGS+PF_DTRACE_OFF) + jne do_delayed_trace +5: + tstl %a2@(TASK_STATE) /* state*/ + jne SYMBOL_NAME(reschedule) + + tstl %a2@(TASK_SIGPENDING) + jne Lsignal_return +2: RESTORE_ALL + +Lsignal_return: + subql #4,%sp /* dummy return address*/ + SAVE_SWITCH_STACK + pea %sp@(SWITCH_STACK_SIZE) + clrl %sp@- + bsrw SYMBOL_NAME(do_signal) + addql #8,%sp + RESTORE_SWITCH_STACK + addql #4,%sp + RESTORE_ALL + +do_delayed_trace: + bclr #7,%sp@(PT_SR) /* clear trace bit in SR*/ + pea 1 /* send SIGTRAP*/ + movel %a2,%sp@- + pea LSIGTRAP + jbsr SYMBOL_NAME(send_sig) + addql #8,%sp + addql #4,%sp + jra 5b +/* +** This is the main interrupt handler, responsible for calling process_int() +*/ + +SYMBOL_NAME_LABEL(inthandler) + SAVE_ALL_INT + GET_CURRENT(%d0) + addql #1,SYMBOL_NAME(irq_stat)+CPUSTAT_LOCAL_IRQ_COUNT + /* put exception # in d0*/ +/* bfextu %sp@(PT_VECTOR){#4,#10},%d0 */ + movew %sp@(PT_VECTOR), %d0 + and.l #0x3ff, %d0 + lsr.l #0x02, %d0 + + movel %sp,%sp@- + movel %d0,%sp@- /* put vector # on stack*/ + jbsr SYMBOL_NAME(process_int)/* process the IRQ*/ +3: addql #8,%sp /* pop parameters off stack*/ + bra ret_from_interrupt + +SYMBOL_NAME_LABEL(ret_from_interrupt) + subql #1,SYMBOL_NAME(irq_stat)+CPUSTAT_LOCAL_IRQ_COUNT + jeq 1f +2: + RESTORE_ALL +1: +#if 1 +/* bfextu %sp@(PT_SR){#5,#3},%d0 */ /* Check for nested interrupt.*/ + moveb %sp@(PT_SR), %d0 + and #7, %d0 + +#if MAX_NOINT_IPL > 0 + cmpiw #MAX_NOINT_IPL,%d0 +#endif + jhi 2b +#endif + /* check if we need to do software interrupts */ + + movel SYMBOL_NAME(irq_stat)+CPUSTAT_SOFTIRQ_PENDING,%d0 + jeq SYMBOL_NAME(ret_from_exception) + + pea SYMBOL_NAME(ret_from_exception) + jra SYMBOL_NAME(do_softirq) + + +/* Handler for uninitialized and spurious interrupts */ + +SYMBOL_NAME_LABEL(bad_interrupt) + addql #1,SYMBOL_NAME(num_spurious) + rte + +ENTRY(sys_fork) + SAVE_SWITCH_STACK + pea %sp@(SWITCH_STACK_SIZE) + jbsr SYMBOL_NAME(m68k_fork) + addql #4,%sp + RESTORE_SWITCH_STACK + rts + +ENTRY(sys_clone) + SAVE_SWITCH_STACK + pea %sp@(SWITCH_STACK_SIZE) + jbsr SYMBOL_NAME(m68k_clone) + addql #4,%sp + RESTORE_SWITCH_STACK + rts + +ENTRY(sys_vfork) + SAVE_SWITCH_STACK + pea %sp@(SWITCH_STACK_SIZE) + jbsr SYMBOL_NAME(m68k_vfork) + addql #4,%sp + RESTORE_SWITCH_STACK + rts + +ENTRY(sys_sigsuspend) + SAVE_SWITCH_STACK + pea %sp@(SWITCH_STACK_SIZE) + jbsr SYMBOL_NAME(do_sigsuspend) + addql #4,%sp + RESTORE_SWITCH_STACK + rts + +ENTRY(sys_rt_sigsuspend) + SAVE_SWITCH_STACK + pea %sp@(SWITCH_STACK_SIZE) + jbsr SYMBOL_NAME(do_rt_sigsuspend) + addql #4,%sp + RESTORE_SWITCH_STACK + rts + +ENTRY(sys_sigreturn) + SAVE_SWITCH_STACK + jbsr SYMBOL_NAME(do_sigreturn) + RESTORE_SWITCH_STACK + rts + +ENTRY(sys_rt_sigreturn) + SAVE_SWITCH_STACK + jbsr SYMBOL_NAME(do_rt_sigreturn) + RESTORE_SWITCH_STACK + rts + +SYMBOL_NAME_LABEL(resume) + /* + * Beware - when entering resume, prev (the current task) is + * in a0, next (the new task) is in a1,so don't change these + * registers until their contents are no longer needed. + */ + + /* save sr */ + movew %sr,%a0@(TASK_THREAD+THREAD_SR) +#ifdef USE_SFC_DFC + /* save fs (sfc,%dfc) (may be pointing to kernel memory) */ + movec %sfc,%d0 + movew %d0,%a0@(TASK_THREAD+THREAD_FS) +#endif + + /* save non-scratch registers on stack */ + SAVE_SWITCH_STACK + + /* save usp */ + /* it is better to use a movel here instead of a movew 8*) */ + movel %usp,%a2 + movel %a2,%a0@(TASK_THREAD+THREAD_USP) + + /* save current kernel stack pointer */ + movel %sp,%a0@(TASK_THREAD+THREAD_KSP) + + /* Return previous task in %d1 */ + movel SYMBOL_NAME(_current_task),%d1 + + /* switch to new task (a1 contains new task) */ + movel %a1, SYMBOL_NAME(_current_task) + + /* restore the kernel stack pointer */ + movel %a1@(TASK_THREAD+THREAD_KSP),%sp + + /* restore non-scratch registers */ + RESTORE_SWITCH_STACK + + /* restore user stack pointer */ + movel %a1@(TASK_THREAD+THREAD_USP),%a0 + movel %a0,%usp + +#ifdef USE_SFC_DFC + /* restore fs (sfc,%dfc) */ + movew %a1@(TASK_THREAD+THREAD_FS),%a0 + movec %a0,%sfc + movec %a0,%dfc +#endif + /* restore status register */ + movew %a1@(TASK_THREAD+THREAD_SR),%sr + + rts + + +.data +ALIGN +SYMBOL_NAME_LABEL(sys_call_table) + .long SYMBOL_NAME(sys_ni_syscall) /* 0 - old "setup()" system call*/ + .long SYMBOL_NAME(sys_exit) + .long SYMBOL_NAME(sys_fork) + .long SYMBOL_NAME(sys_read) + .long SYMBOL_NAME(sys_write) + .long SYMBOL_NAME(sys_open) /* 5 */ + .long SYMBOL_NAME(sys_close) + .long SYMBOL_NAME(sys_waitpid) + .long SYMBOL_NAME(sys_creat) + .long SYMBOL_NAME(sys_link) + .long SYMBOL_NAME(sys_unlink) /* 10 */ + .long SYMBOL_NAME(sys_execve) + .long SYMBOL_NAME(sys_chdir) + .long SYMBOL_NAME(sys_time) + .long SYMBOL_NAME(sys_mknod) + .long SYMBOL_NAME(sys_chmod) /* 15 */ + .long SYMBOL_NAME(sys_chown16) + .long SYMBOL_NAME(sys_ni_syscall) /* old break syscall holder */ + .long SYMBOL_NAME(sys_stat) + .long SYMBOL_NAME(sys_lseek) + .long SYMBOL_NAME(sys_getpid) /* 20 */ + .long SYMBOL_NAME(sys_mount) + .long SYMBOL_NAME(sys_oldumount) + .long SYMBOL_NAME(sys_setuid16) + .long SYMBOL_NAME(sys_getuid16) + .long SYMBOL_NAME(sys_stime) /* 25 */ + .long SYMBOL_NAME(sys_ptrace) + .long SYMBOL_NAME(sys_alarm) + .long SYMBOL_NAME(sys_fstat) + .long SYMBOL_NAME(sys_pause) + .long SYMBOL_NAME(sys_utime) /* 30 */ + .long SYMBOL_NAME(sys_ni_syscall) /* old stty syscall holder */ + .long SYMBOL_NAME(sys_ni_syscall) /* old gtty syscall holder */ + .long SYMBOL_NAME(sys_access) + .long SYMBOL_NAME(sys_nice) + .long SYMBOL_NAME(sys_ni_syscall) /* 35 */ /* old ftime syscall holder */ + .long SYMBOL_NAME(sys_sync) + .long SYMBOL_NAME(sys_kill) + .long SYMBOL_NAME(sys_rename) + .long SYMBOL_NAME(sys_mkdir) + .long SYMBOL_NAME(sys_rmdir) /* 40 */ + .long SYMBOL_NAME(sys_dup) + .long SYMBOL_NAME(sys_pipe) + .long SYMBOL_NAME(sys_times) + .long SYMBOL_NAME(sys_ni_syscall) /* old prof syscall holder */ + .long SYMBOL_NAME(sys_brk) /* 45 */ + .long SYMBOL_NAME(sys_setgid16) + .long SYMBOL_NAME(sys_getgid16) + .long SYMBOL_NAME(sys_signal) + .long SYMBOL_NAME(sys_geteuid16) + .long SYMBOL_NAME(sys_getegid16) /* 50 */ + .long SYMBOL_NAME(sys_acct) + .long SYMBOL_NAME(sys_umount) /* recycled never used phys() */ + .long SYMBOL_NAME(sys_ni_syscall) /* old lock syscall holder */ + .long SYMBOL_NAME(sys_ioctl) + .long SYMBOL_NAME(sys_fcntl) /* 55 */ + .long SYMBOL_NAME(sys_ni_syscall) /* old mpx syscall holder */ + .long SYMBOL_NAME(sys_setpgid) + .long SYMBOL_NAME(sys_ni_syscall) /* old ulimit syscall holder */ + .long SYMBOL_NAME(sys_ni_syscall) + .long SYMBOL_NAME(sys_umask) /* 60 */ + .long SYMBOL_NAME(sys_chroot) + .long SYMBOL_NAME(sys_ustat) + .long SYMBOL_NAME(sys_dup2) + .long SYMBOL_NAME(sys_getppid) + .long SYMBOL_NAME(sys_getpgrp) /* 65 */ + .long SYMBOL_NAME(sys_setsid) + .long SYMBOL_NAME(sys_sigaction) + .long SYMBOL_NAME(sys_sgetmask) + .long SYMBOL_NAME(sys_ssetmask) + .long SYMBOL_NAME(sys_setreuid16) /* 70 */ + .long SYMBOL_NAME(sys_setregid16) + .long SYMBOL_NAME(sys_sigsuspend) + .long SYMBOL_NAME(sys_sigpending) + .long SYMBOL_NAME(sys_sethostname) + .long SYMBOL_NAME(sys_setrlimit) /* 75 */ + .long SYMBOL_NAME(sys_old_getrlimit) + .long SYMBOL_NAME(sys_getrusage) + .long SYMBOL_NAME(sys_gettimeofday) + .long SYMBOL_NAME(sys_settimeofday) + .long SYMBOL_NAME(sys_getgroups16) /* 80 */ + .long SYMBOL_NAME(sys_setgroups16) + .long SYMBOL_NAME(old_select) + .long SYMBOL_NAME(sys_symlink) + .long SYMBOL_NAME(sys_lstat) + .long SYMBOL_NAME(sys_readlink) /* 85 */ + .long SYMBOL_NAME(sys_uselib) + .long SYMBOL_NAME(sys_swapon) + .long SYMBOL_NAME(sys_reboot) + .long SYMBOL_NAME(old_readdir) + .long SYMBOL_NAME(old_mmap) /* 90 */ + .long SYMBOL_NAME(sys_munmap) + .long SYMBOL_NAME(sys_truncate) + .long SYMBOL_NAME(sys_ftruncate) + .long SYMBOL_NAME(sys_fchmod) + .long SYMBOL_NAME(sys_fchown16) /* 95 */ + .long SYMBOL_NAME(sys_getpriority) + .long SYMBOL_NAME(sys_setpriority) + .long SYMBOL_NAME(sys_ni_syscall) /* old profil syscall holder */ + .long SYMBOL_NAME(sys_statfs) + .long SYMBOL_NAME(sys_fstatfs) /* 100 */ + .long SYMBOL_NAME(sys_ioperm) + .long SYMBOL_NAME(sys_socketcall) + .long SYMBOL_NAME(sys_syslog) + .long SYMBOL_NAME(sys_setitimer) + .long SYMBOL_NAME(sys_getitimer) /* 105 */ + .long SYMBOL_NAME(sys_newstat) + .long SYMBOL_NAME(sys_newlstat) + .long SYMBOL_NAME(sys_newfstat) + .long SYMBOL_NAME(sys_ni_syscall) + .long SYMBOL_NAME(sys_ni_syscall) /* iopl for i386 */ /* 110 */ + .long SYMBOL_NAME(sys_vhangup) + .long SYMBOL_NAME(sys_ni_syscall) /* obsolete idle() syscall */ + .long SYMBOL_NAME(sys_ni_syscall) /* vm86old for i386 */ + .long SYMBOL_NAME(sys_wait4) + .long SYMBOL_NAME(sys_swapoff) /* 115 */ + .long SYMBOL_NAME(sys_sysinfo) + .long SYMBOL_NAME(sys_ipc) + .long SYMBOL_NAME(sys_fsync) + .long SYMBOL_NAME(sys_sigreturn) + .long SYMBOL_NAME(sys_clone) /* 120 */ + .long SYMBOL_NAME(sys_setdomainname) + .long SYMBOL_NAME(sys_newuname) + .long SYMBOL_NAME(sys_cacheflush) /* modify_ldt for i386 */ + .long SYMBOL_NAME(sys_adjtimex) + .long SYMBOL_NAME(sys_mprotect) /* 125 */ + .long SYMBOL_NAME(sys_sigprocmask) + .long SYMBOL_NAME(sys_create_module) + .long SYMBOL_NAME(sys_init_module) + .long SYMBOL_NAME(sys_delete_module) + .long SYMBOL_NAME(sys_get_kernel_syms) /* 130 */ + .long SYMBOL_NAME(sys_quotactl) + .long SYMBOL_NAME(sys_getpgid) + .long SYMBOL_NAME(sys_fchdir) + .long SYMBOL_NAME(sys_bdflush) + .long SYMBOL_NAME(sys_sysfs) /* 135 */ + .long SYMBOL_NAME(sys_personality) + .long SYMBOL_NAME(sys_ni_syscall) /* for afs_syscall */ + .long SYMBOL_NAME(sys_setfsuid16) + .long SYMBOL_NAME(sys_setfsgid16) + .long SYMBOL_NAME(sys_llseek) /* 140 */ + .long SYMBOL_NAME(sys_getdents) + .long SYMBOL_NAME(sys_select) + .long SYMBOL_NAME(sys_flock) + .long SYMBOL_NAME(sys_msync) + .long SYMBOL_NAME(sys_readv) /* 145 */ + .long SYMBOL_NAME(sys_writev) + .long SYMBOL_NAME(sys_getsid) + .long SYMBOL_NAME(sys_fdatasync) + .long SYMBOL_NAME(sys_sysctl) + .long SYMBOL_NAME(sys_mlock) /* 150 */ + .long SYMBOL_NAME(sys_munlock) + .long SYMBOL_NAME(sys_mlockall) + .long SYMBOL_NAME(sys_munlockall) + .long SYMBOL_NAME(sys_sched_setparam) + .long SYMBOL_NAME(sys_sched_getparam) /* 155 */ + .long SYMBOL_NAME(sys_sched_setscheduler) + .long SYMBOL_NAME(sys_sched_getscheduler) + .long SYMBOL_NAME(sys_sched_yield) + .long SYMBOL_NAME(sys_sched_get_priority_max) + .long SYMBOL_NAME(sys_sched_get_priority_min) /* 160 */ + .long SYMBOL_NAME(sys_sched_rr_get_interval) + .long SYMBOL_NAME(sys_nanosleep) + .long SYMBOL_NAME(sys_mremap) + .long SYMBOL_NAME(sys_setresuid16) + .long SYMBOL_NAME(sys_getresuid16) /* 165 */ + .long SYMBOL_NAME(sys_ni_syscall) /* for vm86 */ + .long SYMBOL_NAME(sys_query_module) + .long SYMBOL_NAME(sys_poll) + .long SYMBOL_NAME(sys_nfsservctl) + .long SYMBOL_NAME(sys_setresgid16) /* 170 */ + .long SYMBOL_NAME(sys_getresgid16) + .long SYMBOL_NAME(sys_prctl) + .long SYMBOL_NAME(sys_rt_sigreturn) + .long SYMBOL_NAME(sys_rt_sigaction) + .long SYMBOL_NAME(sys_rt_sigprocmask) /* 175 */ + .long SYMBOL_NAME(sys_rt_sigpending) + .long SYMBOL_NAME(sys_rt_sigtimedwait) + .long SYMBOL_NAME(sys_rt_sigqueueinfo) + .long SYMBOL_NAME(sys_rt_sigsuspend) + .long SYMBOL_NAME(sys_pread) /* 180 */ + .long SYMBOL_NAME(sys_pwrite) + .long SYMBOL_NAME(sys_lchown16); + .long SYMBOL_NAME(sys_getcwd) + .long SYMBOL_NAME(sys_capget) + .long SYMBOL_NAME(sys_capset) /* 185 */ + .long SYMBOL_NAME(sys_sigaltstack) + .long SYMBOL_NAME(sys_sendfile) + .long SYMBOL_NAME(sys_ni_syscall) /* streams1 */ + .long SYMBOL_NAME(sys_ni_syscall) /* streams2 */ + .long SYMBOL_NAME(sys_vfork) /* 190 */ + .long SYMBOL_NAME(sys_getrlimit) + .long SYMBOL_NAME(sys_mmap2) + .long SYMBOL_NAME(sys_truncate64) + .long SYMBOL_NAME(sys_ftruncate64) + .long SYMBOL_NAME(sys_stat64) /* 195 */ + .long SYMBOL_NAME(sys_lstat64) + .long SYMBOL_NAME(sys_fstat64) + .long SYMBOL_NAME(sys_chown) + .long SYMBOL_NAME(sys_getuid) + .long SYMBOL_NAME(sys_getgid) /* 200 */ + .long SYMBOL_NAME(sys_geteuid) + .long SYMBOL_NAME(sys_getegid) + .long SYMBOL_NAME(sys_setreuid) + .long SYMBOL_NAME(sys_setregid) + .long SYMBOL_NAME(sys_getgroups) /* 205 */ + .long SYMBOL_NAME(sys_setgroups) + .long SYMBOL_NAME(sys_fchown) + .long SYMBOL_NAME(sys_setresuid) + .long SYMBOL_NAME(sys_getresuid) + .long SYMBOL_NAME(sys_setresgid) /* 210 */ + .long SYMBOL_NAME(sys_getresgid) + .long SYMBOL_NAME(sys_lchown) + .long SYMBOL_NAME(sys_setuid) + .long SYMBOL_NAME(sys_setgid) + .long SYMBOL_NAME(sys_setfsuid) /* 215 */ + .long SYMBOL_NAME(sys_setfsgid) + .long SYMBOL_NAME(sys_ni_syscall) + .long SYMBOL_NAME(sys_ni_syscall) + .long SYMBOL_NAME(sys_ni_syscall) + .long SYMBOL_NAME(sys_getdents64) /* 220 */ + + .rept NR_syscalls-(.-SYMBOL_NAME(sys_call_table))/4 + .long SYMBOL_NAME(sys_ni_syscall) + .endr diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68360/ints.c linux.2.5.40-ac2/arch/m68knommu/platform/68360/ints.c --- linux.2.5.40/arch/m68knommu/platform/68360/ints.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68360/ints.c 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,414 @@ +/* + * linux/arch/$(ARCH)/platform/$(PLATFORM)/ints.c + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive + * for more details. + * + * Copyright (c) 2000 Michael Leslie + * Copyright (c) 1996 Roman Zippel + * Copyright (c) 1999 D. Jeff Dionne + */ + +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include + + +/* from quicc/commproc.c: */ +extern QUICC *pquicc; +extern void cpm_interrupt_init(void); + + + +#define INTERNAL_IRQS (96) + +/* assembler routines */ +asmlinkage void system_call(void); +asmlinkage void buserr(void); +asmlinkage void trap(void); +asmlinkage void bad_interrupt(void); +asmlinkage void inthandler(void); + +extern void *_ramvec[]; + +/* irq node variables for the 32 (potential) on chip sources */ +static irq_node_t *int_irq_list[INTERNAL_IRQS]; + +static int int_irq_count[INTERNAL_IRQS]; +static short int_irq_ablecount[INTERNAL_IRQS]; + +static void int_badint(int irq, void *dev_id, struct pt_regs *fp) +{ + num_spurious += 1; +} + +/* + * This function should be called during kernel startup to initialize + * IRQ handling routines. + */ + +void M68360_init_IRQ(void) +{ + int i; + int vba = (CPM_VECTOR_BASE<<4); + + /* set up the vectors */ +#if 1 + _ramvec[2] = buserr; + _ramvec[3] = trap; + _ramvec[4] = trap; + _ramvec[5] = trap; + _ramvec[6] = trap; + _ramvec[7] = trap; + _ramvec[8] = trap; + _ramvec[9] = trap; + _ramvec[10] = trap; + _ramvec[11] = trap; + _ramvec[12] = trap; + _ramvec[13] = trap; + _ramvec[14] = trap; + _ramvec[15] = trap; +#endif + + _ramvec[32] = system_call; + _ramvec[33] = trap; + + + cpm_interrupt_init(); + +#if 1 + /* set up CICR for vector base address and irq level */ + /* irl = 4, hp = 1f - see MC68360UM p 7-377 */ + pquicc->intr_cicr = 0x00e49f00 | vba; + + /* CPM interrupt vectors: (p 7-376) */ + _ramvec[vba+CPMVEC_ERROR] = bad_interrupt; /* Error */ + _ramvec[vba+CPMVEC_PIO_PC11] = inthandler; /* pio - pc11 */ + _ramvec[vba+CPMVEC_PIO_PC10] = inthandler; /* pio - pc10 */ + _ramvec[vba+CPMVEC_SMC2] = inthandler; /* smc2/pip */ + _ramvec[vba+CPMVEC_SMC1] = inthandler; /* smc1 */ + _ramvec[vba+CPMVEC_SPI] = inthandler; /* spi */ + _ramvec[vba+CPMVEC_PIO_PC9] = inthandler; /* pio - pc9 */ + _ramvec[vba+CPMVEC_TIMER4] = inthandler; /* timer 4 */ + _ramvec[vba+CPMVEC_RESERVED1] = inthandler; /* reserved */ + _ramvec[vba+CPMVEC_PIO_PC8] = inthandler; /* pio - pc8 */ + _ramvec[vba+CPMVEC_PIO_PC7] = inthandler; /* pio - pc7 */ + _ramvec[vba+CPMVEC_PIO_PC6] = inthandler; /* pio - pc6 */ + _ramvec[vba+CPMVEC_TIMER3] = inthandler; /* timer 3 */ + _ramvec[vba+CPMVEC_RISCTIMER] = inthandler; /* reserved */ + _ramvec[vba+CPMVEC_PIO_PC5] = inthandler; /* pio - pc5 */ + _ramvec[vba+CPMVEC_PIO_PC4] = inthandler; /* pio - pc4 */ + _ramvec[vba+CPMVEC_RESERVED2] = inthandler; /* reserved */ + _ramvec[vba+CPMVEC_RISCTIMER] = inthandler; /* timer table */ + _ramvec[vba+CPMVEC_TIMER2] = inthandler; /* timer 2 */ + _ramvec[vba+CPMVEC_RESERVED3] = inthandler; /* reserved */ + _ramvec[vba+CPMVEC_IDMA2] = inthandler; /* idma 2 */ + _ramvec[vba+CPMVEC_IDMA1] = inthandler; /* idma 1 */ + _ramvec[vba+CPMVEC_SDMA_CB_ERR] = inthandler; /* sdma channel bus error */ + _ramvec[vba+CPMVEC_PIO_PC3] = inthandler; /* pio - pc3 */ + _ramvec[vba+CPMVEC_PIO_PC2] = inthandler; /* pio - pc2 */ + /* _ramvec[vba+CPMVEC_TIMER1] = cpm_isr_timer1; */ /* timer 1 */ + _ramvec[vba+CPMVEC_TIMER1] = inthandler; /* timer 1 */ + _ramvec[vba+CPMVEC_PIO_PC1] = inthandler; /* pio - pc1 */ + _ramvec[vba+CPMVEC_SCC4] = inthandler; /* scc 4 */ + _ramvec[vba+CPMVEC_SCC3] = inthandler; /* scc 3 */ + _ramvec[vba+CPMVEC_SCC2] = inthandler; /* scc 2 */ + _ramvec[vba+CPMVEC_SCC1] = inthandler; /* scc 1 */ + _ramvec[vba+CPMVEC_PIO_PC0] = inthandler; /* pio - pc0 */ + + + /* turn off all CPM interrupts */ + pquicc->intr_cimr = 0x00000000; + +#endif + /* initialize handlers */ + for (i = 0; i < INTERNAL_IRQS; i++) { + int_irq_list[i] = NULL; + + int_irq_ablecount[i] = 0; + int_irq_count[i] = 0; + } + +} + + +void M68360_insert_irq(irq_node_t **list, irq_node_t *node) +{ + unsigned long flags; + irq_node_t *cur; + + if (!node->dev_id) + printk("%s: Warning: dev_id of %s is zero\n", + __FUNCTION__, node->devname); + + save_flags(flags); + cli(); + + cur = *list; + + while (cur) { + list = &cur->next; + cur = cur->next; + } + + node->next = cur; + *list = node; + + restore_flags(flags); +} + +void M68360_delete_irq(irq_node_t **list, void *dev_id) +{ + unsigned long flags; + irq_node_t *node; + + save_flags(flags); + cli(); + + for (node = *list; node; list = &node->next, node = *list) { + if (node->dev_id == dev_id) { + *list = node->next; + /* Mark it as free. */ + node->handler = NULL; + restore_flags(flags); + return; + } + } + restore_flags(flags); + printk ("%s: tried to remove invalid irq\n", __FUNCTION__); +} + + +int M68360_request_irq(unsigned int irq, void (*handler)(int, void *, struct pt_regs *), + unsigned long flags, const char *devname, void *dev_id) +{ + int mask = (1<= INTERNAL_IRQS) { + printk ("%s: Unknown IRQ %d from %s\n", __FUNCTION__, irq, devname); + return -ENXIO; + } + + if (!int_irq_list[irq]) { + int_irq_list[irq] = new_irq_node(); + int_irq_list[irq]->flags = IRQ_FLG_STD; + } + + if (!(int_irq_list[irq]->flags & IRQ_FLG_STD)) { + if (int_irq_list[irq]->flags & IRQ_FLG_LOCK) { + printk("%s: IRQ %d from %s is not replaceable\n", + __FUNCTION__, irq, int_irq_list[irq]->devname); + return -EBUSY; + } + if (flags & IRQ_FLG_REPLACE) { + printk("%s: %s can't replace IRQ %d from %s\n", + __FUNCTION__, devname, irq, int_irq_list[irq]->devname); + return -EBUSY; + } + } + int_irq_list[irq]->handler = handler; + int_irq_list[irq]->flags = flags; + int_irq_list[irq]->dev_id = dev_id; + int_irq_list[irq]->devname = devname; + + /* enable in the CIMR */ + if (!int_irq_ablecount[irq]) + pquicc->intr_cimr |= mask; + /* *(volatile unsigned long *)0xfffff304 &= ~(1<= INTERNAL_IRQS) { + printk ("%s: Unknown IRQ %d\n", __FUNCTION__, irq); + return; + } + + if (int_irq_list[irq]->dev_id != dev_id) + printk("%s: removing probably wrong IRQ %d from %s\n", + __FUNCTION__, irq, int_irq_list[irq]->devname); + int_irq_list[irq]->handler = int_badint; + int_irq_list[irq]->flags = IRQ_FLG_STD; + int_irq_list[irq]->dev_id = NULL; + int_irq_list[irq]->devname = NULL; + + *(volatile unsigned long *)0xfffff304 |= 1<= INTERNAL_IRQS) { + printk("%s: Unknown IRQ %d\n", __FUNCTION__, irq); + return; + } + + if (--int_irq_ablecount[irq]) + return; + + /* enable the interrupt */ + *(volatile unsigned long *)0xfffff304 &= ~(1<= INTERNAL_IRQS) { + printk("%s: Unknown IRQ %d\n", __FUNCTION__, irq); + return; + } + + if (int_irq_ablecount[irq]++) + return; + + /* disable the interrupt */ + *(volatile unsigned long *)0xfffff304 |= 1<intr_cipr; */ + + /* Bugger all that wierdness. For the moment, I seem to know where I came from; + * vec is passed from a specific ISR, so I'll use it. */ + + if (int_irq_list[irq] && int_irq_list[irq]->handler) { + int_irq_list[irq]->handler(irq , int_irq_list[irq]->dev_id, fp); + int_irq_count[irq]++; + pquicc->intr_cisr = (1 << vec); /* indicate that irq has been serviced */ + } else { + printk("unregistered interrupt %d!\nTurning it off in the CIMR...\n", irq); + /* *(volatile unsigned long *)0xfffff304 |= mask; */ + pquicc->intr_cimr &= ~(1 << vec); + } + + +/* while (pend) { */ +/* if (pend & 0x0000ffff) { */ +/* if (pend & 0x000000ff) { */ +/* if (pend & 0x0000000f) { */ +/* mask = 0x00000001; */ +/* irq = 0; */ +/* } else { */ +/* mask = 0x00000010; */ +/* irq = 4; */ +/* } */ +/* } else { */ +/* if (pend & 0x00000f00) { */ +/* mask = 0x00000100; */ +/* irq = 8; */ +/* } else { */ +/* mask = 0x00001000; */ +/* irq = 12; */ +/* } */ +/* } */ +/* } else { */ +/* if (pend & 0x00ff0000) { */ +/* if (pend & 0x000f0000) { */ +/* mask = 0x00010000; */ +/* irq = 16; */ +/* } else { */ +/* mask = 0x00100000; */ +/* irq = 20; */ +/* } */ +/* } else { */ +/* if (pend & 0x0f000000) { */ +/* mask = 0x01000000; */ +/* irq = 24; */ +/* } else { */ +/* mask = 0x10000000; */ +/* irq = 28; */ +/* } */ +/* } */ +/* } */ + +/* while (! (mask & pend)) { */ +/* mask <<=1; */ +/* irq++; */ +/* } */ + +/* if (int_irq_list[irq] && int_irq_list[irq]->handler) { */ +/* int_irq_list[irq]->handler(irq | IRQ_MACHSPEC, int_irq_list[irq]->dev_id, fp); */ +/* int_irq_count[irq]++; */ +/* } else { */ +/* printk("unregistered interrupt %d!\nTurning it off in the CIMR...\n", irq); */ +/* *(volatile unsigned long *)0xfffff304 |= mask; */ +/* } */ +/* pend &= ~mask; */ +/* } */ + + return 0; +} + +int M68360_get_irq_list(struct seq_file *p, void *v) +{ + int i; + irq_node_t *node; + + seq_printf(p, "Internal 68360 interrupts\n"); + + for (i = 0; i < INTERNAL_IRQS; i++) { + if (!(node = int_irq_list[i])) + continue; + if (!(node->handler)) + continue; + + seq_printf(p, " %2d: %10u %s\n", i, + int_irq_count[i], int_irq_list[i]->devname); + } + return(0); +} + +void config_M68360_irq(void) +{ + mach_default_handler = NULL; + mach_init_IRQ = M68360_init_IRQ; + mach_request_irq = M68360_request_irq; + mach_free_irq = M68360_free_irq; + mach_enable_irq = M68360_enable_irq; + mach_disable_irq = M68360_disable_irq; + mach_get_irq_list = M68360_get_irq_list; + mach_process_int = M68360_do_irq; +} + +void init_irq_proc(void); +void init_irq_proc(void) +{ + /* Insert /proc/irq driver here */ +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68360/Makefile linux.2.5.40-ac2/arch/m68knommu/platform/68360/Makefile --- linux.2.5.40/arch/m68knommu/platform/68360/Makefile 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68360/Makefile 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,46 @@ +# +# Makefile for the linux kernel. +# +# Reuse any files we can from the 68328 base +# + +VPATH := $(VPATH):../68328 + +# Note! Dependencies are done automagically by 'make dep', which also +# removes any old dependencies. DON'T put your own dependencies here +# unless it's something special (ie not a .c file). +# +AFLAGS += -D__ASSEMBLY__ + +all: $(BOARD)/crt0_$(MODEL).o entry.o platform.o quicc + +QUICC_OBJS := quicc/commproc.o + +ifeq ($(CONFIG_M68360_SMC_UART),y) +QUICC_OBJS += quicc/uart.o +endif + +ifeq ($(CONFIG_M68EN360_ETHERNET),y) +QUICC_OBJS += quicc/enet.o +endif + +quicc = $(QUICC_OBJS) + + +$(BOARD)/crt0_$(MODEL).o: $(BOARD)/crt0_$(MODEL).S + +O_TARGET := platform.o +obj-y := entry.o config.o signal.o traps.o ints.o $(QUICC_OBJS) + +entry.o: entry.S m68k_defs.h + +m68k_defs.h: ../../kernel/m68k_defs.c ../../kernel/m68k_defs.head + rm -f m68k_defs.d + $(CC) $(filter-out -MD,$(CFLAGS)) -S ../../kernel/m68k_defs.c + cp ../../kernel/m68k_defs.head m68k_defs.h + grep '^#define' m68k_defs.s >> m68k_defs.h + rm m68k_defs.s +-include m68k_defs.d + + +include $(TOPDIR)/Rules.make diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68360/quicc/commproc.c linux.2.5.40-ac2/arch/m68knommu/platform/68360/quicc/commproc.c --- linux.2.5.40/arch/m68knommu/platform/68360/quicc/commproc.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68360/quicc/commproc.c 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,308 @@ +/* + * General Purpose functions for the global management of the + * Communication Processor Module. + * + * Copyright (c) 2000 Michael Leslie + * Copyright (c) 1997 Dan Malek (dmalek@jlc.net) + * + * In addition to the individual control of the communication + * channels, there are a few functions that globally affect the + * communication processor. + * + * Buffer descriptors must be allocated from the dual ported memory + * space. The allocator for that is here. When the communication + * process is reset, we reclaim the memory available. There is + * currently no deallocator for this memory. + * The amount of space available is platform dependent. On the + * MBX, the EPPC software loads additional microcode into the + * communication processor, and uses some of the DP ram for this + * purpose. Current, the first 512 bytes and the last 256 bytes of + * memory are used. Right now I am conservative and only use the + * memory that can never be used for microcode. If there are + * applications that require more DP ram, we can expand the boundaries + * but then we have to be careful of any downloaded microcode. + * + */ + +/* + * Michael Leslie + * adapted Dan Malek's ppc8xx drivers to M68360 + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "commproc.h" +/* #include */ +/* #include */ +extern void *_quicc_base; +extern unsigned int system_clock; + + +static uint dp_alloc_base; /* Starting offset in DP ram */ +static uint dp_alloc_top; /* Max offset + 1 */ + +#if 0 +static void *host_buffer; /* One page of host buffer */ +static void *host_end; /* end + 1 */ +#endif + +/* struct cpm360_t *cpmp; */ /* Pointer to comm processor space */ + +QUICC *pquicc; +/* QUICC *quicc_dpram; */ /* mleslie - temporary; use extern pquicc elsewhere instead */ + + +/* CPM interrupt vector functions. */ +struct cpm_action { + void (*handler)(void *); + void *dev_id; +}; +static struct cpm_action cpm_vecs[CPMVEC_NR]; +static void cpm_interrupt(int irq, void * dev, struct pt_regs * regs); +static void cpm_error_interrupt(void *); + +/* prototypes: */ +void cpm_install_handler(int vec, void (*handler)(void *), void *dev_id); +void m360_cpm_reset(void); + + + + +void m360_cpm_reset() +{ +/* pte_t *pte; */ + + pquicc = (struct quicc *)(_quicc_base); /* initialized in crt0_rXm.S */ + + /* Perform a CPM reset. */ + pquicc->cp_cr = (SOFTWARE_RESET | CMD_FLAG); + + /* Wait for CPM to become ready (should be 2 clocks). */ + while (pquicc->cp_cr & CMD_FLAG); + + /* On the recommendation of the 68360 manual, p. 7-60 + * - Set sdma interupt service mask to 7 + * - Set sdma arbitration ID to 4 + */ + pquicc->sdma_sdcr = 0x0740; + + + /* Claim the DP memory for our use. + */ + dp_alloc_base = CPM_DATAONLY_BASE; + dp_alloc_top = dp_alloc_base + CPM_DATAONLY_SIZE; + + + /* Set the host page for allocation. + */ + /* host_buffer = host_page_addr; */ + /* host_end = host_page_addr + PAGE_SIZE; */ + + /* pte = find_pte(&init_mm, host_page_addr); */ + /* pte_val(*pte) |= _PAGE_NO_CACHE; */ + /* flush_tlb_page(current->mm->mmap, host_buffer); */ + + /* Tell everyone where the comm processor resides. + */ +/* cpmp = (cpm360_t *)commproc; */ +} + + +/* This is called during init_IRQ. We used to do it above, but this + * was too early since init_IRQ was not yet called. + */ +void +cpm_interrupt_init(void) +{ + /* Initialize the CPM interrupt controller. + * NOTE THAT pquicc had better have been initialized! + * reference: MC68360UM p. 7-377 + */ + pquicc->intr_cicr = + (CICR_SCD_SCC4 | CICR_SCC_SCC3 | CICR_SCB_SCC2 | CICR_SCA_SCC1) | + (CPM_INTERRUPT << 13) | + CICR_HP_MASK | + (CPM_VECTOR_BASE << 5) | + CICR_SPS; + + /* mask all CPM interrupts from reaching the cpu32 core: */ + pquicc->intr_cimr = 0; + + + /* mles - If I understand correctly, the 360 just pops over to the CPM + * specific vector, obviating the necessity to vector through the IRQ + * whose priority the CPM is set to. This needs a closer look, though. + */ + + /* Set our interrupt handler with the core CPU. */ +/* if (request_irq(CPM_INTERRUPT, cpm_interrupt, 0, "cpm", NULL) != 0) */ +/* panic("Could not allocate CPM IRQ!"); */ + + /* Install our own error handler. + */ + /* I think we want to hold off on this one for the moment - mles */ + /* cpm_install_handler(CPMVEC_ERROR, cpm_error_interrupt, NULL); */ + + /* master CPM interrupt enable */ + /* pquicc->intr_cicr |= CICR_IEN; */ /* no such animal for 360 */ +} + + + +/* CPM interrupt controller interrupt. +*/ +static void +cpm_interrupt(int irq, void * dev, struct pt_regs * regs) +{ + /* uint vec; */ + + /* mles: Note that this stuff is currently being performed by + * M68360_do_irq(int vec, struct pt_regs *fp), in ../ints.c */ + + /* figure out the vector */ + /* call that vector's handler */ + /* clear the irq's bit in the service register */ + +#if 0 /* old 860 stuff: */ + /* Get the vector by setting the ACK bit and then reading + * the register. + */ + ((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_civr = 1; + vec = ((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_civr; + vec >>= 11; + + + if (cpm_vecs[vec].handler != 0) + (*cpm_vecs[vec].handler)(cpm_vecs[vec].dev_id); + else + ((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr &= ~(1 << vec); + + /* After servicing the interrupt, we have to remove the status + * indicator. + */ + ((immap_t *)IMAP_ADDR)->im_cpic.cpic_cisr |= (1 << vec); +#endif + +} + +/* The CPM can generate the error interrupt when there is a race condition + * between generating and masking interrupts. All we have to do is ACK it + * and return. This is a no-op function so we don't need any special + * tests in the interrupt handler. + */ +static void +cpm_error_interrupt(void *dev) +{ +} + +/* Install a CPM interrupt handler. +*/ +void +cpm_install_handler(int vec, void (*handler)(void *), void *dev_id) +{ + + request_irq(vec, handler, IRQ_FLG_LOCK, "timer", dev_id); + +/* if (cpm_vecs[vec].handler != 0) */ +/* printk("CPM interrupt %x replacing %x\n", */ +/* (uint)handler, (uint)cpm_vecs[vec].handler); */ +/* cpm_vecs[vec].handler = handler; */ +/* cpm_vecs[vec].dev_id = dev_id; */ + + /* ((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr |= (1 << vec); */ +/* pquicc->intr_cimr |= (1 << vec); */ + +} + +/* Free a CPM interrupt handler. +*/ +void +cpm_free_handler(int vec) +{ + cpm_vecs[vec].handler = NULL; + cpm_vecs[vec].dev_id = NULL; + /* ((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr &= ~(1 << vec); */ + pquicc->intr_cimr &= ~(1 << vec); +} + + + + +/* Allocate some memory from the dual ported ram. We may want to + * enforce alignment restrictions, but right now everyone is a good + * citizen. + */ +uint +m360_cpm_dpalloc(uint size) +{ + uint retloc; + + if ((dp_alloc_base + size) >= dp_alloc_top) + return(CPM_DP_NOSPACE); + + retloc = dp_alloc_base; + dp_alloc_base += size; + + return(retloc); +} + + +#if 0 /* mleslie - for now these are simply kmalloc'd */ +/* We also own one page of host buffer space for the allocation of + * UART "fifos" and the like. + */ +uint +m360_cpm_hostalloc(uint size) +{ + uint retloc; + + if ((host_buffer + size) >= host_end) + return(0); + + retloc = host_buffer; + host_buffer += size; + + return(retloc); +} +#endif + + +/* Set a baud rate generator. This needs lots of work. There are + * four BRGs, any of which can be wired to any channel. + * The internal baud rate clock is the system clock divided by 16. + * This assumes the baudrate is 16x oversampled by the uart. + */ +/* #define BRG_INT_CLK (((bd_t *)__res)->bi_intfreq * 1000000) */ +#define BRG_INT_CLK system_clock +#define BRG_UART_CLK (BRG_INT_CLK/16) + +void +m360_cpm_setbrg(uint brg, uint rate) +{ + volatile uint *bp; + + /* This is good enough to get SMCs running..... + */ + /* bp = (uint *)&cpmp->cp_brgc1; */ + bp = (volatile uint *)(&pquicc->brgc[0].l); + bp += brg; + *bp = ((BRG_UART_CLK / rate - 1) << 1) | CPM_BRG_EN; +} + + +/* + * Local variables: + * c-indent-level: 4 + * c-basic-offset: 4 + * tab-width: 4 + * End: + */ diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68360/quicc/commproc.h linux.2.5.40-ac2/arch/m68knommu/platform/68360/quicc/commproc.h --- linux.2.5.40/arch/m68knommu/platform/68360/quicc/commproc.h 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68360/quicc/commproc.h 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,724 @@ + +/* + * 68360 Communication Processor Module. + * Copyright (c) 2000 Michael Leslie (mc68360) after: + * Copyright (c) 1997 Dan Malek (mpc8xx) + * + * This file contains structures and information for the communication + * processor channels. Some CPM control and status is available + * through the 68360 internal memory map. See include/asm/360_immap.h for details. + * This file is not a complete map of all of the 360 QUICC's capabilities + * + * On the MBX board, EPPC-Bug loads CPM microcode into the first 512 + * bytes of the DP RAM and relocates the I2C parameter area to the + * IDMA1 space. The remaining DP RAM is available for buffer descriptors + * or other use. + */ +#ifndef __CPM_360__ +#define __CPM_360__ + +#include +/* #include */ + +/* CPM Command register masks: */ +#define CPM_CR_RST ((ushort)0x8000) +#define CPM_CR_OPCODE ((ushort)0x0f00) +#define CPM_CR_CHAN ((ushort)0x00f0) +#define CPM_CR_FLG ((ushort)0x0001) + +/* CPM Command set (opcodes): */ +#define CPM_CR_INIT_TRX ((ushort)0x0000) +#define CPM_CR_INIT_RX ((ushort)0x0001) +#define CPM_CR_INIT_TX ((ushort)0x0002) +#define CPM_CR_HUNT_MODE ((ushort)0x0003) +#define CPM_CR_STOP_TX ((ushort)0x0004) +#define CPM_CR_GRSTOP_TX ((ushort)0x0005) +#define CPM_CR_RESTART_TX ((ushort)0x0006) +#define CPM_CR_CLOSE_RXBD ((ushort)0x0007) +#define CPM_CR_SET_GADDR ((ushort)0x0008) +#define CPM_CR_GCI_TIMEOUT ((ushort)0x0009) +#define CPM_CR_GCI_ABORT ((ushort)0x000a) +#define CPM_CR_RESET_BCS ((ushort)0x000a) + +/* CPM Channel numbers. */ +#define CPM_CR_CH_SCC1 ((ushort)0x0000) +#define CPM_CR_CH_SCC2 ((ushort)0x0004) +#define CPM_CR_CH_SPI ((ushort)0x0005) /* SPI / Timers */ +#define CPM_CR_CH_TMR ((ushort)0x0005) +#define CPM_CR_CH_SCC3 ((ushort)0x0008) +#define CPM_CR_CH_SMC1 ((ushort)0x0009) /* SMC1 / IDMA1 */ +#define CPM_CR_CH_IDMA1 ((ushort)0x0009) +#define CPM_CR_CH_SCC4 ((ushort)0x000c) +#define CPM_CR_CH_SMC2 ((ushort)0x000d) /* SMC2 / IDMA2 */ +#define CPM_CR_CH_IDMA2 ((ushort)0x000d) + + +#define mk_cr_cmd(CH, CMD) ((CMD << 8) | (CH << 4)) + +#if 1 /* mleslie: I dinna think we have any such restrictions on + * DP RAM aboard the 360 board - see the MC68360UM p.3-3 */ + +/* The dual ported RAM is multi-functional. Some areas can be (and are + * being) used for microcode. There is an area that can only be used + * as data ram for buffer descriptors, which is all we use right now. + * Currently the first 512 and last 256 bytes are used for microcode. + */ +/* mleslie: The uCquicc board is using no extra microcode in DPRAM */ +#define CPM_DATAONLY_BASE ((uint)0x0000) +#define CPM_DATAONLY_SIZE ((uint)0x0800) +#define CPM_DP_NOSPACE ((uint)0x7fffffff) + +#endif + + +/* Export the base address of the communication processor registers + * and dual port ram. */ +/* extern cpm360_t *cpmp; */ /* Pointer to comm processor */ +extern QUICC *pquicc; +uint m360_cpm_dpalloc(uint size); +/* void *m360_cpm_hostalloc(uint size); */ +void m360_cpm_setbrg(uint brg, uint rate); + +#if 0 /* use QUICC_BD declared in include/asm/m68360_quicc.h */ +/* Buffer descriptors used by many of the CPM protocols. */ +typedef struct cpm_buf_desc { + ushort cbd_sc; /* Status and Control */ + ushort cbd_datlen; /* Data length in buffer */ + uint cbd_bufaddr; /* Buffer address in host memory */ +} cbd_t; +#endif + + +/* rx bd status/control bits */ +#define BD_SC_EMPTY ((ushort)0x8000) /* Recieve is empty */ +#define BD_SC_WRAP ((ushort)0x2000) /* Last buffer descriptor in table */ +#define BD_SC_INTRPT ((ushort)0x1000) /* Interrupt on change */ +#define BD_SC_LAST ((ushort)0x0800) /* Last buffer in frame OR control char */ + +#define BD_SC_FIRST ((ushort)0x0400) /* 1st buffer in an HDLC frame */ +#define BD_SC_ADDR ((ushort)0x0400) /* 1st byte is a multidrop address */ + +#define BD_SC_CM ((ushort)0x0200) /* Continous mode */ +#define BD_SC_ID ((ushort)0x0100) /* Received too many idles */ + +#define BD_SC_AM ((ushort)0x0080) /* Multidrop address match */ +#define BD_SC_DE ((ushort)0x0080) /* DPLL Error (HDLC) */ + +#define BD_SC_BR ((ushort)0x0020) /* Break received */ +#define BD_SC_LG ((ushort)0x0020) /* Frame length violation (HDLC) */ + +#define BD_SC_FR ((ushort)0x0010) /* Framing error */ +#define BD_SC_NO ((ushort)0x0010) /* Nonoctet aligned frame (HDLC) */ + +#define BD_SC_PR ((ushort)0x0008) /* Parity error */ +#define BD_SC_AB ((ushort)0x0008) /* Received abort Sequence (HDLC) */ + +#define BD_SC_OV ((ushort)0x0002) /* Overrun */ +#define BD_SC_CD ((ushort)0x0001) /* Carrier Detect lost */ + +/* tx bd status/control bits (as differ from rx bd) */ +#define BD_SC_READY ((ushort)0x8000) /* Transmit is ready */ +#define BD_SC_TC ((ushort)0x0400) /* Transmit CRC */ +#define BD_SC_P ((ushort)0x0100) /* xmt preamble */ +#define BD_SC_UN ((ushort)0x0002) /* Underrun */ + + + + +/* Parameter RAM offsets. */ + + + +/* In 2.4 ppc, the PROFF_S?C? are used as byte offsets into DPRAM. + * In 2.0, we use a more structured C struct map of DPRAM, and so + * instead, we need only a parameter ram `slot' */ + +#define PRSLOT_SCC1 0 +#define PRSLOT_SCC2 1 +#define PRSLOT_SCC3 2 +#define PRSLOT_SMC1 2 +#define PRSLOT_SCC4 3 +#define PRSLOT_SMC2 3 + + +/* #define PROFF_SCC1 ((uint)0x0000) */ +/* #define PROFF_SCC2 ((uint)0x0100) */ +/* #define PROFF_SCC3 ((uint)0x0200) */ +/* #define PROFF_SMC1 ((uint)0x0280) */ +/* #define PROFF_SCC4 ((uint)0x0300) */ +/* #define PROFF_SMC2 ((uint)0x0380) */ + + +/* Define enough so I can at least use the serial port as a UART. + * The MBX uses SMC1 as the host serial port. + */ +typedef struct smc_uart { + ushort smc_rbase; /* Rx Buffer descriptor base address */ + ushort smc_tbase; /* Tx Buffer descriptor base address */ + u_char smc_rfcr; /* Rx function code */ + u_char smc_tfcr; /* Tx function code */ + ushort smc_mrblr; /* Max receive buffer length */ + uint smc_rstate; /* Internal */ + uint smc_idp; /* Internal */ + ushort smc_rbptr; /* Internal */ + ushort smc_ibc; /* Internal */ + uint smc_rxtmp; /* Internal */ + uint smc_tstate; /* Internal */ + uint smc_tdp; /* Internal */ + ushort smc_tbptr; /* Internal */ + ushort smc_tbc; /* Internal */ + uint smc_txtmp; /* Internal */ + ushort smc_maxidl; /* Maximum idle characters */ + ushort smc_tmpidl; /* Temporary idle counter */ + ushort smc_brklen; /* Last received break length */ + ushort smc_brkec; /* rcv'd break condition counter */ + ushort smc_brkcr; /* xmt break count register */ + ushort smc_rmask; /* Temporary bit mask */ +} smc_uart_t; + +/* Function code bits. +*/ +#define SMC_EB ((u_char)0x10) /* Set big endian byte order */ + +/* SMC uart mode register. +*/ +#define SMCMR_REN ((ushort)0x0001) +#define SMCMR_TEN ((ushort)0x0002) +#define SMCMR_DM ((ushort)0x000c) +#define SMCMR_SM_GCI ((ushort)0x0000) +#define SMCMR_SM_UART ((ushort)0x0020) +#define SMCMR_SM_TRANS ((ushort)0x0030) +#define SMCMR_SM_MASK ((ushort)0x0030) +#define SMCMR_PM_EVEN ((ushort)0x0100) /* Even parity, else odd */ +#define SMCMR_REVD SMCMR_PM_EVEN +#define SMCMR_PEN ((ushort)0x0200) /* Parity enable */ +#define SMCMR_BS SMCMR_PEN +#define SMCMR_SL ((ushort)0x0400) /* Two stops, else one */ +#define SMCR_CLEN_MASK ((ushort)0x7800) /* Character length */ +#define smcr_mk_clen(C) (((C) << 11) & SMCR_CLEN_MASK) + +/* SMC2 as Centronics parallel printer. It is half duplex, in that + * it can only receive or transmit. The parameter ram values for + * each direction are either unique or properly overlap, so we can + * include them in one structure. + */ +typedef struct smc_centronics { + ushort scent_rbase; + ushort scent_tbase; + u_char scent_cfcr; + u_char scent_smask; + ushort scent_mrblr; + uint scent_rstate; + uint scent_r_ptr; + ushort scent_rbptr; + ushort scent_r_cnt; + uint scent_rtemp; + uint scent_tstate; + uint scent_t_ptr; + ushort scent_tbptr; + ushort scent_t_cnt; + uint scent_ttemp; + ushort scent_max_sl; + ushort scent_sl_cnt; + ushort scent_character1; + ushort scent_character2; + ushort scent_character3; + ushort scent_character4; + ushort scent_character5; + ushort scent_character6; + ushort scent_character7; + ushort scent_character8; + ushort scent_rccm; + ushort scent_rccr; +} smc_cent_t; + +/* Centronics Status Mask Register. +*/ +#define SMC_CENT_F ((u_char)0x08) +#define SMC_CENT_PE ((u_char)0x04) +#define SMC_CENT_S ((u_char)0x02) + +/* SMC Event and Mask register. +*/ +#define SMCM_BRKE ((unsigned char)0x40) /* When in UART Mode */ +#define SMCM_BRK ((unsigned char)0x10) /* When in UART Mode */ +#define SMCM_TXE ((unsigned char)0x10) /* When in Transparent Mode */ +#define SMCM_BSY ((unsigned char)0x04) +#define SMCM_TX ((unsigned char)0x02) +#define SMCM_RX ((unsigned char)0x01) + +/* Baud rate generators. +*/ +#define CPM_BRG_RST ((uint)0x00020000) +#define CPM_BRG_EN ((uint)0x00010000) +#define CPM_BRG_EXTC_INT ((uint)0x00000000) +#define CPM_BRG_EXTC_CLK2 ((uint)0x00004000) +#define CPM_BRG_EXTC_CLK6 ((uint)0x00008000) +#define CPM_BRG_ATB ((uint)0x00002000) +#define CPM_BRG_CD_MASK ((uint)0x00001ffe) +#define CPM_BRG_DIV16 ((uint)0x00000001) + +/* SCCs. +*/ +#define SCC_GSMRH_IRP ((uint)0x00040000) +#define SCC_GSMRH_GDE ((uint)0x00010000) +#define SCC_GSMRH_TCRC_CCITT ((uint)0x00008000) +#define SCC_GSMRH_TCRC_BISYNC ((uint)0x00004000) +#define SCC_GSMRH_TCRC_HDLC ((uint)0x00000000) +#define SCC_GSMRH_REVD ((uint)0x00002000) +#define SCC_GSMRH_TRX ((uint)0x00001000) +#define SCC_GSMRH_TTX ((uint)0x00000800) +#define SCC_GSMRH_CDP ((uint)0x00000400) +#define SCC_GSMRH_CTSP ((uint)0x00000200) +#define SCC_GSMRH_CDS ((uint)0x00000100) +#define SCC_GSMRH_CTSS ((uint)0x00000080) +#define SCC_GSMRH_TFL ((uint)0x00000040) +#define SCC_GSMRH_RFW ((uint)0x00000020) +#define SCC_GSMRH_TXSY ((uint)0x00000010) +#define SCC_GSMRH_SYNL16 ((uint)0x0000000c) +#define SCC_GSMRH_SYNL8 ((uint)0x00000008) +#define SCC_GSMRH_SYNL4 ((uint)0x00000004) +#define SCC_GSMRH_RTSM ((uint)0x00000002) +#define SCC_GSMRH_RSYN ((uint)0x00000001) + +#define SCC_GSMRL_SIR ((uint)0x80000000) /* SCC2 only */ +#define SCC_GSMRL_EDGE_NONE ((uint)0x60000000) +#define SCC_GSMRL_EDGE_NEG ((uint)0x40000000) +#define SCC_GSMRL_EDGE_POS ((uint)0x20000000) +#define SCC_GSMRL_EDGE_BOTH ((uint)0x00000000) +#define SCC_GSMRL_TCI ((uint)0x10000000) +#define SCC_GSMRL_TSNC_3 ((uint)0x0c000000) +#define SCC_GSMRL_TSNC_4 ((uint)0x08000000) +#define SCC_GSMRL_TSNC_14 ((uint)0x04000000) +#define SCC_GSMRL_TSNC_INF ((uint)0x00000000) +#define SCC_GSMRL_RINV ((uint)0x02000000) +#define SCC_GSMRL_TINV ((uint)0x01000000) +#define SCC_GSMRL_TPL_128 ((uint)0x00c00000) +#define SCC_GSMRL_TPL_64 ((uint)0x00a00000) +#define SCC_GSMRL_TPL_48 ((uint)0x00800000) +#define SCC_GSMRL_TPL_32 ((uint)0x00600000) +#define SCC_GSMRL_TPL_16 ((uint)0x00400000) +#define SCC_GSMRL_TPL_8 ((uint)0x00200000) +#define SCC_GSMRL_TPL_NONE ((uint)0x00000000) +#define SCC_GSMRL_TPP_ALL1 ((uint)0x00180000) +#define SCC_GSMRL_TPP_01 ((uint)0x00100000) +#define SCC_GSMRL_TPP_10 ((uint)0x00080000) +#define SCC_GSMRL_TPP_ZEROS ((uint)0x00000000) +#define SCC_GSMRL_TEND ((uint)0x00040000) +#define SCC_GSMRL_TDCR_32 ((uint)0x00030000) +#define SCC_GSMRL_TDCR_16 ((uint)0x00020000) +#define SCC_GSMRL_TDCR_8 ((uint)0x00010000) +#define SCC_GSMRL_TDCR_1 ((uint)0x00000000) +#define SCC_GSMRL_RDCR_32 ((uint)0x0000c000) +#define SCC_GSMRL_RDCR_16 ((uint)0x00008000) +#define SCC_GSMRL_RDCR_8 ((uint)0x00004000) +#define SCC_GSMRL_RDCR_1 ((uint)0x00000000) +#define SCC_GSMRL_RENC_DFMAN ((uint)0x00003000) +#define SCC_GSMRL_RENC_MANCH ((uint)0x00002000) +#define SCC_GSMRL_RENC_FM0 ((uint)0x00001000) +#define SCC_GSMRL_RENC_NRZI ((uint)0x00000800) +#define SCC_GSMRL_RENC_NRZ ((uint)0x00000000) +#define SCC_GSMRL_TENC_DFMAN ((uint)0x00000600) +#define SCC_GSMRL_TENC_MANCH ((uint)0x00000400) +#define SCC_GSMRL_TENC_FM0 ((uint)0x00000200) +#define SCC_GSMRL_TENC_NRZI ((uint)0x00000100) +#define SCC_GSMRL_TENC_NRZ ((uint)0x00000000) +#define SCC_GSMRL_DIAG_LE ((uint)0x000000c0) /* Loop and echo */ +#define SCC_GSMRL_DIAG_ECHO ((uint)0x00000080) +#define SCC_GSMRL_DIAG_LOOP ((uint)0x00000040) +#define SCC_GSMRL_DIAG_NORM ((uint)0x00000000) +#define SCC_GSMRL_ENR ((uint)0x00000020) +#define SCC_GSMRL_ENT ((uint)0x00000010) +#define SCC_GSMRL_MODE_ENET ((uint)0x0000000c) +#define SCC_GSMRL_MODE_DDCMP ((uint)0x00000009) +#define SCC_GSMRL_MODE_BISYNC ((uint)0x00000008) +#define SCC_GSMRL_MODE_V14 ((uint)0x00000007) +#define SCC_GSMRL_MODE_AHDLC ((uint)0x00000006) +#define SCC_GSMRL_MODE_PROFIBUS ((uint)0x00000005) +#define SCC_GSMRL_MODE_UART ((uint)0x00000004) +#define SCC_GSMRL_MODE_SS7 ((uint)0x00000003) +#define SCC_GSMRL_MODE_ATALK ((uint)0x00000002) +#define SCC_GSMRL_MODE_HDLC ((uint)0x00000000) + +#define SCC_TODR_TOD ((ushort)0x8000) + +/* SCC Event and Mask register. +*/ +#define SCCM_TXE ((unsigned char)0x10) +#define SCCM_BSY ((unsigned char)0x04) +#define SCCM_TX ((unsigned char)0x02) +#define SCCM_RX ((unsigned char)0x01) + +typedef struct scc_param { + ushort scc_rbase; /* Rx Buffer descriptor base address */ + ushort scc_tbase; /* Tx Buffer descriptor base address */ + u_char scc_rfcr; /* Rx function code */ + u_char scc_tfcr; /* Tx function code */ + ushort scc_mrblr; /* Max receive buffer length */ + uint scc_rstate; /* Internal */ + uint scc_idp; /* Internal */ + ushort scc_rbptr; /* Internal */ + ushort scc_ibc; /* Internal */ + uint scc_rxtmp; /* Internal */ + uint scc_tstate; /* Internal */ + uint scc_tdp; /* Internal */ + ushort scc_tbptr; /* Internal */ + ushort scc_tbc; /* Internal */ + uint scc_txtmp; /* Internal */ + uint scc_rcrc; /* Internal */ + uint scc_tcrc; /* Internal */ +} sccp_t; + + +/* Function code bits. + */ +#define SCC_EB ((u_char)0x10) /* Set big endian byte order */ +#define SCC_FC_DMA ((u_char)0x08) /* Set SDMA */ + +/* CPM Ethernet through SCC1. + */ +typedef struct scc_enet { + sccp_t sen_genscc; + uint sen_cpres; /* Preset CRC */ + uint sen_cmask; /* Constant mask for CRC */ + uint sen_crcec; /* CRC Error counter */ + uint sen_alec; /* alignment error counter */ + uint sen_disfc; /* discard frame counter */ + ushort sen_pads; /* Tx short frame pad character */ + ushort sen_retlim; /* Retry limit threshold */ + ushort sen_retcnt; /* Retry limit counter */ + ushort sen_maxflr; /* maximum frame length register */ + ushort sen_minflr; /* minimum frame length register */ + ushort sen_maxd1; /* maximum DMA1 length */ + ushort sen_maxd2; /* maximum DMA2 length */ + ushort sen_maxd; /* Rx max DMA */ + ushort sen_dmacnt; /* Rx DMA counter */ + ushort sen_maxb; /* Max BD byte count */ + ushort sen_gaddr1; /* Group address filter */ + ushort sen_gaddr2; + ushort sen_gaddr3; + ushort sen_gaddr4; + uint sen_tbuf0data0; /* Save area 0 - current frame */ + uint sen_tbuf0data1; /* Save area 1 - current frame */ + uint sen_tbuf0rba; /* Internal */ + uint sen_tbuf0crc; /* Internal */ + ushort sen_tbuf0bcnt; /* Internal */ + ushort sen_paddrh; /* physical address (MSB) */ + ushort sen_paddrm; + ushort sen_paddrl; /* physical address (LSB) */ + ushort sen_pper; /* persistence */ + ushort sen_rfbdptr; /* Rx first BD pointer */ + ushort sen_tfbdptr; /* Tx first BD pointer */ + ushort sen_tlbdptr; /* Tx last BD pointer */ + uint sen_tbuf1data0; /* Save area 0 - current frame */ + uint sen_tbuf1data1; /* Save area 1 - current frame */ + uint sen_tbuf1rba; /* Internal */ + uint sen_tbuf1crc; /* Internal */ + ushort sen_tbuf1bcnt; /* Internal */ + ushort sen_txlen; /* Tx Frame length counter */ + ushort sen_iaddr1; /* Individual address filter */ + ushort sen_iaddr2; + ushort sen_iaddr3; + ushort sen_iaddr4; + ushort sen_boffcnt; /* Backoff counter */ + + /* NOTE: Some versions of the manual have the following items + * incorrectly documented. Below is the proper order. + */ + ushort sen_taddrh; /* temp address (MSB) */ + ushort sen_taddrm; + ushort sen_taddrl; /* temp address (LSB) */ +} scc_enet_t; + + + +#if defined (CONFIG_UCQUICC) +/* uCquicc has the following signals connected to Ethernet: + * 68360 - lxt905 + * PA0/RXD1 - rxd + * PA1/TXD1 - txd + * PA8/CLK1 - tclk + * PA9/CLK2 - rclk + * PC0/!RTS1 - t_en + * PC1/!CTS1 - col + * PC5/!CD1 - cd + */ +#define PA_ENET_RXD PA_RXD1 +#define PA_ENET_TXD PA_TXD1 +#define PA_ENET_TCLK PA_CLK1 +#define PA_ENET_RCLK PA_CLK2 +#define PC_ENET_TENA PC_RTS1 +#define PC_ENET_CLSN PC_CTS1 +#define PC_ENET_RENA PC_CD1 + +/* Control bits in the SICR to route TCLK (CLK1) and RCLK (CLK2) to + * SCC1. + */ +#define SICR_ENET_MASK ((uint)0x000000ff) +#define SICR_ENET_CLKRT ((uint)0x0000002c) + +#endif /* config_ucquicc */ + + +#ifdef MBX +/* Bits in parallel I/O port registers that have to be set/cleared + * to configure the pins for SCC1 use. The TCLK and RCLK seem unique + * to the MBX860 board. Any two of the four available clocks could be + * used, and the MPC860 cookbook manual has an example using different + * clock pins. + */ +#define PA_ENET_RXD ((ushort)0x0001) +#define PA_ENET_TXD ((ushort)0x0002) +#define PA_ENET_TCLK ((ushort)0x0200) +#define PA_ENET_RCLK ((ushort)0x0800) +#define PC_ENET_TENA ((ushort)0x0001) +#define PC_ENET_CLSN ((ushort)0x0010) +#define PC_ENET_RENA ((ushort)0x0020) + +/* Control bits in the SICR to route TCLK (CLK2) and RCLK (CLK4) to + * SCC1. Also, make sure GR1 (bit 24) and SC1 (bit 25) are zero. + */ +#define SICR_ENET_MASK ((uint)0x000000ff) +#define SICR_ENET_CLKRT ((uint)0x0000003d) +#endif + +#ifdef CONFIG_RPXLITE +/* This ENET stuff is for the MPC850 with ethernet on SCC2. Some of + * this may be unique to the RPX-Lite configuration. + * Note TENA is on Port B. + */ +#define PA_ENET_RXD ((ushort)0x0004) +#define PA_ENET_TXD ((ushort)0x0008) +#define PA_ENET_TCLK ((ushort)0x0200) +#define PA_ENET_RCLK ((ushort)0x0800) +#define PB_ENET_TENA ((uint)0x00002000) +#define PC_ENET_CLSN ((ushort)0x0040) +#define PC_ENET_RENA ((ushort)0x0080) + +#define SICR_ENET_MASK ((uint)0x0000ff00) +#define SICR_ENET_CLKRT ((uint)0x00003d00) +#endif + +#ifdef CONFIG_BSEIP +/* This ENET stuff is for the MPC823 with ethernet on SCC2. + * This is unique to the BSE ip-Engine board. + */ +#define PA_ENET_RXD ((ushort)0x0004) +#define PA_ENET_TXD ((ushort)0x0008) +#define PA_ENET_TCLK ((ushort)0x0100) +#define PA_ENET_RCLK ((ushort)0x0200) +#define PB_ENET_TENA ((uint)0x00002000) +#define PC_ENET_CLSN ((ushort)0x0040) +#define PC_ENET_RENA ((ushort)0x0080) + +/* BSE uses port B and C bits for PHY control also. +*/ +#define PB_BSE_POWERUP ((uint)0x00000004) +#define PB_BSE_FDXDIS ((uint)0x00008000) +#define PC_BSE_LOOPBACK ((ushort)0x0800) + +#define SICR_ENET_MASK ((uint)0x0000ff00) +#define SICR_ENET_CLKRT ((uint)0x00002c00) +#endif + +#ifdef CONFIG_RPXCLASSIC +/* Bits in parallel I/O port registers that have to be set/cleared + * to configure the pins for SCC1 use. + */ +#define PA_ENET_RXD ((ushort)0x0001) +#define PA_ENET_TXD ((ushort)0x0002) +#define PA_ENET_TCLK ((ushort)0x0200) +#define PA_ENET_RCLK ((ushort)0x0800) +#define PB_ENET_TENA ((uint)0x00001000) +#define PC_ENET_CLSN ((ushort)0x0010) +#define PC_ENET_RENA ((ushort)0x0020) + +/* Control bits in the SICR to route TCLK (CLK2) and RCLK (CLK4) to + * SCC1. Also, make sure GR1 (bit 24) and SC1 (bit 25) are zero. + */ +#define SICR_ENET_MASK ((uint)0x000000ff) +#define SICR_ENET_CLKRT ((uint)0x0000003d) +#endif + +/* SCC Event register as used by Ethernet. +*/ +#define SCCE_ENET_GRA ((ushort)0x0080) /* Graceful stop complete */ +#define SCCE_ENET_TXE ((ushort)0x0010) /* Transmit Error */ +#define SCCE_ENET_RXF ((ushort)0x0008) /* Full frame received */ +#define SCCE_ENET_BSY ((ushort)0x0004) /* All incoming buffers full */ +#define SCCE_ENET_TXB ((ushort)0x0002) /* A buffer was transmitted */ +#define SCCE_ENET_RXB ((ushort)0x0001) /* A buffer was received */ + +/* SCC Mode Register (PMSR) as used by Ethernet. +*/ +#define SCC_PMSR_HBC ((ushort)0x8000) /* Enable heartbeat */ +#define SCC_PMSR_FC ((ushort)0x4000) /* Force collision */ +#define SCC_PMSR_RSH ((ushort)0x2000) /* Receive short frames */ +#define SCC_PMSR_IAM ((ushort)0x1000) /* Check individual hash */ +#define SCC_PMSR_ENCRC ((ushort)0x0800) /* Ethernet CRC mode */ +#define SCC_PMSR_PRO ((ushort)0x0200) /* Promiscuous mode */ +#define SCC_PMSR_BRO ((ushort)0x0100) /* Catch broadcast pkts */ +#define SCC_PMSR_SBT ((ushort)0x0080) /* Special backoff timer */ +#define SCC_PMSR_LPB ((ushort)0x0040) /* Set Loopback mode */ +#define SCC_PMSR_SIP ((ushort)0x0020) /* Sample Input Pins */ +#define SCC_PMSR_LCW ((ushort)0x0010) /* Late collision window */ +#define SCC_PMSR_NIB22 ((ushort)0x000a) /* Start frame search */ +#define SCC_PMSR_FDE ((ushort)0x0001) /* Full duplex enable */ + +/* Buffer descriptor control/status used by Ethernet receive. +*/ +#define BD_ENET_RX_EMPTY ((ushort)0x8000) +#define BD_ENET_RX_WRAP ((ushort)0x2000) +#define BD_ENET_RX_INTR ((ushort)0x1000) +#define BD_ENET_RX_LAST ((ushort)0x0800) +#define BD_ENET_RX_FIRST ((ushort)0x0400) +#define BD_ENET_RX_MISS ((ushort)0x0100) +#define BD_ENET_RX_LG ((ushort)0x0020) +#define BD_ENET_RX_NO ((ushort)0x0010) +#define BD_ENET_RX_SH ((ushort)0x0008) +#define BD_ENET_RX_CR ((ushort)0x0004) +#define BD_ENET_RX_OV ((ushort)0x0002) +#define BD_ENET_RX_CL ((ushort)0x0001) +#define BD_ENET_RX_STATS ((ushort)0x013f) /* All status bits */ + +/* Buffer descriptor control/status used by Ethernet transmit. +*/ +#define BD_ENET_TX_READY ((ushort)0x8000) +#define BD_ENET_TX_PAD ((ushort)0x4000) +#define BD_ENET_TX_WRAP ((ushort)0x2000) +#define BD_ENET_TX_INTR ((ushort)0x1000) +#define BD_ENET_TX_LAST ((ushort)0x0800) +#define BD_ENET_TX_TC ((ushort)0x0400) +#define BD_ENET_TX_DEF ((ushort)0x0200) +#define BD_ENET_TX_HB ((ushort)0x0100) +#define BD_ENET_TX_LC ((ushort)0x0080) +#define BD_ENET_TX_RL ((ushort)0x0040) +#define BD_ENET_TX_RCMASK ((ushort)0x003c) +#define BD_ENET_TX_UN ((ushort)0x0002) +#define BD_ENET_TX_CSL ((ushort)0x0001) +#define BD_ENET_TX_STATS ((ushort)0x03ff) /* All status bits */ + +/* SCC as UART +*/ +typedef struct scc_uart { + sccp_t scc_genscc; + uint scc_res1; /* Reserved */ + uint scc_res2; /* Reserved */ + ushort scc_maxidl; /* Maximum idle chars */ + ushort scc_idlc; /* temp idle counter */ + ushort scc_brkcr; /* Break count register */ + ushort scc_parec; /* receive parity error counter */ + ushort scc_frmec; /* receive framing error counter */ + ushort scc_nosec; /* receive noise counter */ + ushort scc_brkec; /* receive break condition counter */ + ushort scc_brkln; /* last received break length */ + ushort scc_uaddr1; /* UART address character 1 */ + ushort scc_uaddr2; /* UART address character 2 */ + ushort scc_rtemp; /* Temp storage */ + ushort scc_toseq; /* Transmit out of sequence char */ + ushort scc_char1; /* control character 1 */ + ushort scc_char2; /* control character 2 */ + ushort scc_char3; /* control character 3 */ + ushort scc_char4; /* control character 4 */ + ushort scc_char5; /* control character 5 */ + ushort scc_char6; /* control character 6 */ + ushort scc_char7; /* control character 7 */ + ushort scc_char8; /* control character 8 */ + ushort scc_rccm; /* receive control character mask */ + ushort scc_rccr; /* receive control character register */ + ushort scc_rlbc; /* receive last break character */ +} scc_uart_t; + +/* SCC Event and Mask registers when it is used as a UART. +*/ +#define UART_SCCM_GLR ((ushort)0x1000) +#define UART_SCCM_GLT ((ushort)0x0800) +#define UART_SCCM_AB ((ushort)0x0200) +#define UART_SCCM_IDL ((ushort)0x0100) +#define UART_SCCM_GRA ((ushort)0x0080) +#define UART_SCCM_BRKE ((ushort)0x0040) +#define UART_SCCM_BRKS ((ushort)0x0020) +#define UART_SCCM_CCR ((ushort)0x0008) +#define UART_SCCM_BSY ((ushort)0x0004) +#define UART_SCCM_TX ((ushort)0x0002) +#define UART_SCCM_RX ((ushort)0x0001) + +/* The SCC PMSR when used as a UART. +*/ +#define SCU_PMSR_FLC ((ushort)0x8000) +#define SCU_PMSR_SL ((ushort)0x4000) +#define SCU_PMSR_CL ((ushort)0x3000) +#define SCU_PMSR_UM ((ushort)0x0c00) +#define SCU_PMSR_FRZ ((ushort)0x0200) +#define SCU_PMSR_RZS ((ushort)0x0100) +#define SCU_PMSR_SYN ((ushort)0x0080) +#define SCU_PMSR_DRT ((ushort)0x0040) +#define SCU_PMSR_PEN ((ushort)0x0010) +#define SCU_PMSR_RPM ((ushort)0x000c) +#define SCU_PMSR_REVP ((ushort)0x0008) +#define SCU_PMSR_TPM ((ushort)0x0003) +#define SCU_PMSR_TEVP ((ushort)0x0003) + +/* CPM Transparent mode SCC. + */ +typedef struct scc_trans { + sccp_t st_genscc; + uint st_cpres; /* Preset CRC */ + uint st_cmask; /* Constant mask for CRC */ +} scc_trans_t; + +#define BD_SCC_TX_LAST ((ushort)0x0800) + + + +/* CPM interrupts. There are nearly 32 interrupts generated by CPM + * channels or devices. All of these are presented to the PPC core + * as a single interrupt. The CPM interrupt handler dispatches its + * own handlers, in a similar fashion to the PPC core handler. We + * use the table as defined in the manuals (i.e. no special high + * priority and SCC1 == SCCa, etc...). + */ +/* #define CPMVEC_NR 32 */ +/* #define CPMVEC_PIO_PC15 ((ushort)0x1f) */ +/* #define CPMVEC_SCC1 ((ushort)0x1e) */ +/* #define CPMVEC_SCC2 ((ushort)0x1d) */ +/* #define CPMVEC_SCC3 ((ushort)0x1c) */ +/* #define CPMVEC_SCC4 ((ushort)0x1b) */ +/* #define CPMVEC_PIO_PC14 ((ushort)0x1a) */ +/* #define CPMVEC_TIMER1 ((ushort)0x19) */ +/* #define CPMVEC_PIO_PC13 ((ushort)0x18) */ +/* #define CPMVEC_PIO_PC12 ((ushort)0x17) */ +/* #define CPMVEC_SDMA_CB_ERR ((ushort)0x16) */ +/* #define CPMVEC_IDMA1 ((ushort)0x15) */ +/* #define CPMVEC_IDMA2 ((ushort)0x14) */ +/* #define CPMVEC_TIMER2 ((ushort)0x12) */ +/* #define CPMVEC_RISCTIMER ((ushort)0x11) */ +/* #define CPMVEC_I2C ((ushort)0x10) */ +/* #define CPMVEC_PIO_PC11 ((ushort)0x0f) */ +/* #define CPMVEC_PIO_PC10 ((ushort)0x0e) */ +/* #define CPMVEC_TIMER3 ((ushort)0x0c) */ +/* #define CPMVEC_PIO_PC9 ((ushort)0x0b) */ +/* #define CPMVEC_PIO_PC8 ((ushort)0x0a) */ +/* #define CPMVEC_PIO_PC7 ((ushort)0x09) */ +/* #define CPMVEC_TIMER4 ((ushort)0x07) */ +/* #define CPMVEC_PIO_PC6 ((ushort)0x06) */ +/* #define CPMVEC_SPI ((ushort)0x05) */ +/* #define CPMVEC_SMC1 ((ushort)0x04) */ +/* #define CPMVEC_SMC2 ((ushort)0x03) */ +/* #define CPMVEC_PIO_PC5 ((ushort)0x02) */ +/* #define CPMVEC_PIO_PC4 ((ushort)0x01) */ +/* #define CPMVEC_ERROR ((ushort)0x00) */ + +extern void cpm_install_handler(int vec, void (*handler)(void *), void *dev_id); + +/* CPM interrupt configuration vector. +*/ +#define CICR_SCD_SCC4 ((uint)0x00c00000) /* SCC4 @ SCCd */ +#define CICR_SCC_SCC3 ((uint)0x00200000) /* SCC3 @ SCCc */ +#define CICR_SCB_SCC2 ((uint)0x00040000) /* SCC2 @ SCCb */ +#define CICR_SCA_SCC1 ((uint)0x00000000) /* SCC1 @ SCCa */ +#define CICR_IRL_MASK ((uint)0x0000e000) /* Core interrrupt */ +#define CICR_HP_MASK ((uint)0x00001f00) /* Hi-pri int. */ +#define CICR_IEN ((uint)0x00000080) /* Int. enable */ +#define CICR_SPS ((uint)0x00000001) /* SCC Spread */ +#endif /* __CPM_360__ */ diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68360/quicc/enet.c linux.2.5.40-ac2/arch/m68knommu/platform/68360/quicc/enet.c --- linux.2.5.40/arch/m68knommu/platform/68360/quicc/enet.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68360/quicc/enet.c 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,958 @@ +/* + * Ethernet driver for Motorola MPC8xx. + * Copyright (c) 2000 Michael Leslie + * Copyright (c) 1997 Dan Malek (dmalek@jlc.net) + * + * I copied the basic skeleton from the lance driver, because I did not + * know how to write the Linux driver, but I did know how the LANCE worked. + * + * This version of the driver is somewhat selectable for the different + * processor/board combinations. It works for the boards I know about + * now, and should be easily modified to include others. Some of the + * configuration information is contained in "commproc.h" and the + * remainder is here. + * + * Buffer descriptors are kept in the CPM dual port RAM, and the frame + * buffers are in the host memory. + * + * Right now, I am very watseful with the buffers. I allocate memory + * pages and then divide them into 2K frame buffers. This way I know I + * have buffers large enough to hold one frame within one buffer descriptor. + * Once I get this working, I will use 64 or 128 byte CPM buffers, which + * will be much more memory efficient and will easily handle lots of + * small packets. + * + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +/* #include */ +#include +#include +#include +#include +/* #include */ + +#include + +/* for 2.0 compatibility: */ +#include +#define net_device device + +#include +/* #include */ +/* #include */ +/* #include */ +#include +/* #include */ +#include "commproc.h" + + +/* + * Theory of Operation + * + * The MPC8xx CPM performs the Ethernet processing on SCC1. It can use + * an aribtrary number of buffers on byte boundaries, but must have at + * least two receive buffers to prevent constant overrun conditions. + * + * The buffer descriptors are allocated from the CPM dual port memory + * with the data buffers allocated from host memory, just like all other + * serial communication protocols. The host memory buffers are allocated + * from the free page pool, and then divided into smaller receive and + * transmit buffers. The size of the buffers should be a power of two, + * since that nicely divides the page. This creates a ring buffer + * structure similar to the LANCE and other controllers. + * + * Like the LANCE driver: + * The driver runs as two independent, single-threaded flows of control. One + * is the send-packet routine, which enforces single-threaded use by the + * cep->tx_busy flag. The other thread is the interrupt handler, which is + * single threaded by the hardware and other software. + * + * The send packet thread has partial control over the Tx ring and the + * 'cep->tx_busy' flag. It sets the tx_busy flag whenever it's queuing a Tx + * packet. If the next queue slot is empty, it clears the tx_busy flag when + * finished otherwise it sets the 'lp->tx_full' flag. + * + * The MBX has a control register external to the MPC8xx that has some + * control of the Ethernet interface. Information is in the manual for + * your board. + * + * The RPX boards have an external control/status register. Consult the + * programming documents for details unique to your board. + * + * For the TQM8xx(L) modules, there is no control register interface. + * All functions are directly controlled using I/O pins. See commproc.h. + */ + + +/* The transmitter timeout + */ +#define TX_TIMEOUT (2*HZ) + +/* The number of Tx and Rx buffers. These are allocated statically here. + * We don't need to allocate pages for the transmitter. We just use + * the skbuffer directly. + */ +#ifdef CONFIG_ENET_BIG_BUFFERS +#define RX_RING_SIZE 64 +#define TX_RING_SIZE 64 /* Must be power of two */ +#define TX_RING_MOD_MASK 63 /* for this to work */ +#else +#define RX_RING_SIZE 8 +#define TX_RING_SIZE 8 /* Must be power of two */ +#define TX_RING_MOD_MASK 7 /* for this to work */ +#endif + +#define CPM_ENET_RX_FRSIZE 2048 /* overkill left over from ppc page-based allocation */ +static char rx_buf_pool[RX_RING_SIZE * CPM_ENET_RX_FRSIZE]; + + +/* The CPM stores dest/src/type, data, and checksum for receive packets. + */ +#define PKT_MAXBUF_SIZE 1518 +#define PKT_MINBUF_SIZE 64 +#define PKT_MAXBLR_SIZE 1520 + +/* The CPM buffer descriptors track the ring buffers. The rx_bd_base and + * tx_bd_base always point to the base of the buffer descriptors. The + * cur_rx and cur_tx point to the currently available buffer. + * The dirty_tx tracks the current buffer that is being sent by the + * controller. The cur_tx and dirty_tx are equal under both completely + * empty and completely full conditions. The empty/ready indicator in + * the buffer descriptor determines the actual condition. + */ +struct scc_enet_private { + /* The saved address of a sent-in-place packet/buffer, for skfree(). */ + struct sk_buff* tx_skbuff[TX_RING_SIZE]; + ushort skb_cur; + ushort skb_dirty; + + /* CPM dual port RAM relative addresses. + */ + QUICC_BD *rx_bd_base; /* Address of Rx and Tx buffers. */ + QUICC_BD *tx_bd_base; + QUICC_BD *cur_rx, *cur_tx; /* The next free ring entry */ + QUICC_BD *dirty_tx; /* The ring entries to be free()ed. */ + volatile struct scc_regs *sccp; + /* struct net_device_stats stats; */ + struct enet_statistics stats; + uint tx_full; + /* spinlock_t lock; */ + volatile unsigned int lock; +}; + + + +static int scc_enet_open(struct net_device *dev); +static int scc_enet_start_xmit(struct sk_buff *skb, struct net_device *dev); +static int scc_enet_rx(struct net_device *dev); +/* static void scc_enet_interrupt(void *dev_id); */ +static void scc_enet_interrupt(int vec, void *dev_id, struct pt_regs *fp); +static int scc_enet_close(struct net_device *dev); +/* static struct net_device_stats *scc_enet_get_stats(struct net_device *dev); */ +static struct enet_statistics *scc_enet_get_stats(struct net_device *dev); +static void set_multicast_list(struct net_device *dev); + +/* Get this from various configuration locations (depends on board). +*/ +/*static ushort my_enet_addr[] = { 0x0800, 0x3e26, 0x1559 };*/ + +/* Typically, 860(T) boards use SCC1 for Ethernet, and other 8xx boards + * use SCC2. This is easily extended if necessary. + */ + +#define CONFIG_SCC1_ENET /* by default */ + +#ifdef CONFIG_SCC1_ENET +#define CPM_CR_ENET CPM_CR_CH_SCC1 +#define PROFF_ENET PROFF_SCC1 +#define SCC_ENET 0 +#define CPMVEC_ENET CPMVEC_SCC1 +#endif + +#ifdef CONFIG_SCC2_ENET +#define CPM_CR_ENET CPM_CR_CH_SCC2 +#define PROFF_ENET PROFF_SCC2 +#define SCC_ENET 1 /* Index, not number! */ +#define CPMVEC_ENET CPMVEC_SCC2 +#endif + +static int +scc_enet_open(struct net_device *dev) +{ + + /* I should reset the ring buffers here, but I don't yet know + * a simple way to do that. + * mleslie: That's no biggie. Worth doing, too. + */ + + /* netif_start_queue(dev); */ + return 0; /* Always succeed */ +} + + +static int +scc_enet_start_xmit(struct sk_buff *skb, struct net_device *dev) +{ + struct scc_enet_private *cep = (struct scc_enet_private *)dev->priv; + volatile QUICC_BD *bdp; + + /* Fill in a Tx ring entry */ + bdp = cep->cur_tx; + +#ifndef final_version + if (bdp->status & BD_ENET_TX_READY) { + /* Ooops. All transmit buffers are full. Bail out. + * This should not happen, since cep->tx_busy should be set. + */ + printk("%s: tx queue full!.\n", dev->name); + return 1; + } +#endif + + /* Clear all of the status flags. + */ + bdp->status &= ~BD_ENET_TX_STATS; + + /* If the frame is short, tell CPM to pad it. + */ + if (skb->len <= ETH_ZLEN) + bdp->status |= BD_ENET_TX_PAD; + else + bdp->status &= ~BD_ENET_TX_PAD; + + /* Set buffer length and buffer pointer. + */ + bdp->length = skb->len; + /* bdp->buf = __pa(skb->data); */ + bdp->buf = skb->data; + + /* Save skb pointer. + */ + cep->tx_skbuff[cep->skb_cur] = skb; + + /* cep->stats.tx_bytes += skb->len; */ /* TODO: It would really be nice... */ + + cep->skb_cur = (cep->skb_cur+1) & TX_RING_MOD_MASK; + + + /* Push the data cache so the CPM does not get stale memory + * data. + */ +/* flush_dcache_range((unsigned long)(skb->data), */ +/* (unsigned long)(skb->data + skb->len)); */ + + /* spin_lock_irq(&cep->lock); */ /* TODO: SPINLOCK */ + cli(); + if (cep->lock > 0) { + printk ("scc_enet_start_xmit() lock == %d\n", cep->lock); + } else { + cep->lock++; + } + + /* Send it on its way. Tell CPM its ready, interrupt when done, + * its the last BD of the frame, and to put the CRC on the end. + */ + bdp->status |= (BD_ENET_TX_READY | BD_ENET_TX_INTR | BD_ENET_TX_LAST | BD_ENET_TX_TC); + + dev->trans_start = jiffies; + + /* If this was the last BD in the ring, start at the beginning again. + */ + if (bdp->status & BD_ENET_TX_WRAP) + bdp = cep->tx_bd_base; + else + bdp++; + + if (bdp->status & BD_ENET_TX_READY) { + /* netif_stop_queue(dev); */ + cep->tx_full = 1; + } + + cep->cur_tx = (QUICC_BD *)bdp; + + /* spin_unlock_irq(&cep->lock); */ /* TODO: SPINLOCK */ + cep->lock--; + sti(); + + return 0; +} + +static void +scc_enet_timeout(struct net_device *dev) +{ + struct scc_enet_private *cep = (struct scc_enet_private *)dev->priv; + + printk("%s: transmit timed out.\n", dev->name); + cep->stats.tx_errors++; +#ifndef final_version + { + int i; + QUICC_BD *bdp; + printk(" Ring data dump: cur_tx %p%s cur_rx %p.\n", + cep->cur_tx, cep->tx_full ? " (full)" : "", + cep->cur_rx); + bdp = cep->tx_bd_base; + for (i = 0 ; i < TX_RING_SIZE; i++, bdp++) + printk("%04x %04x %08x\n", + bdp->status, + bdp->length, + (int)(bdp->buf)); + bdp = cep->rx_bd_base; + for (i = 0 ; i < RX_RING_SIZE; i++, bdp++) + printk("%04x %04x %08x\n", + bdp->status, + bdp->length, + (int)(bdp->buf)); + } +#endif +/* if (!cep->tx_full) */ +/* netif_wake_queue(dev); */ +} + +/* The interrupt handler. + * This is called from the CPM handler, not the MPC core interrupt. + */ +/* static void scc_enet_interrupt(void *dev_id) */ +static void scc_enet_interrupt(int vec, void *dev_id, struct pt_regs *fp) +{ + struct net_device *dev = (struct net_device *)dev_id; + volatile struct scc_enet_private *cep; + volatile QUICC_BD *bdp; + ushort int_events; + int must_restart; + + cep = (struct scc_enet_private *)dev->priv; + + /* Get the interrupt events that caused us to be here. + */ + int_events = cep->sccp->scc_scce; + cep->sccp->scc_scce = int_events; + must_restart = 0; + + /* Handle receive event in its own function. + */ + if (int_events & SCCE_ENET_RXF) + scc_enet_rx(dev_id); + + /* Check for a transmit error. The manual is a little unclear + * about this, so the debug code until I get it figured out. It + * appears that if TXE is set, then TXB is not set. However, + * if carrier sense is lost during frame transmission, the TXE + * bit is set, "and continues the buffer transmission normally." + * I don't know if "normally" implies TXB is set when the buffer + * descriptor is closed.....trial and error :-). + */ + + /* Transmit OK, or non-fatal error. Update the buffer descriptors. + */ + if (int_events & (SCCE_ENET_TXE | SCCE_ENET_TXB)) { + /* spin_lock(&cep->lock); */ /* TODO: SPINLOCK */ + /* cli(); */ + if (cep->lock > 0) { + printk ("scc_enet_interrupt() lock == %d\n", cep->lock); + } else { + cep->lock++; + } + + bdp = cep->dirty_tx; + while ((bdp->status&BD_ENET_TX_READY)==0) { + if ((bdp==cep->cur_tx) && (cep->tx_full == 0)) + break; + + if (bdp->status & BD_ENET_TX_HB) /* No heartbeat */ + cep->stats.tx_heartbeat_errors++; + if (bdp->status & BD_ENET_TX_LC) /* Late collision */ + cep->stats.tx_window_errors++; + if (bdp->status & BD_ENET_TX_RL) /* Retrans limit */ + cep->stats.tx_aborted_errors++; + if (bdp->status & BD_ENET_TX_UN) /* Underrun */ + cep->stats.tx_fifo_errors++; + if (bdp->status & BD_ENET_TX_CSL) /* Carrier lost */ + cep->stats.tx_carrier_errors++; + + + /* No heartbeat or Lost carrier are not really bad errors. + * The others require a restart transmit command. + */ + if (bdp->status & + (BD_ENET_TX_LC | BD_ENET_TX_RL | BD_ENET_TX_UN)) { + must_restart = 1; + cep->stats.tx_errors++; + } + + cep->stats.tx_packets++; + + /* Deferred means some collisions occurred during transmit, + * but we eventually sent the packet OK. + */ + if (bdp->status & BD_ENET_TX_DEF) + cep->stats.collisions++; + + /* Free the sk buffer associated with this last transmit. + */ + /* dev_kfree_skb_irq(cep->tx_skbuff[cep->skb_dirty]); */ + dev_kfree_skb (cep->tx_skbuff[cep->skb_dirty], FREE_WRITE); + cep->skb_dirty = (cep->skb_dirty + 1) & TX_RING_MOD_MASK; + + /* Update pointer to next buffer descriptor to be transmitted. + */ + if (bdp->status & BD_ENET_TX_WRAP) + bdp = cep->tx_bd_base; + else + bdp++; + + /* I don't know if we can be held off from processing these + * interrupts for more than one frame time. I really hope + * not. In such a case, we would now want to check the + * currently available BD (cur_tx) and determine if any + * buffers between the dirty_tx and cur_tx have also been + * sent. We would want to process anything in between that + * does not have BD_ENET_TX_READY set. + */ + + /* Since we have freed up a buffer, the ring is no longer + * full. + */ + if (cep->tx_full) { + cep->tx_full = 0; +/* if (netif_queue_stopped(dev)) */ +/* netif_wake_queue(dev); */ + } + + cep->dirty_tx = (QUICC_BD *)bdp; + } + + if (must_restart) { + volatile QUICC *cp; + + /* Some transmit errors cause the transmitter to shut + * down. We now issue a restart transmit. Since the + * errors close the BD and update the pointers, the restart + * _should_ pick up without having to reset any of our + * pointers either. + */ + cp = pquicc; + cp->cp_cr = + mk_cr_cmd(CPM_CR_ENET, CPM_CR_RESTART_TX) | CPM_CR_FLG; + while (cp->cp_cr & CPM_CR_FLG); + } + /* spin_unlock(&cep->lock); */ /* TODO: SPINLOCK */ + /* sti(); */ + cep->lock--; + } + + /* Check for receive busy, i.e. packets coming but no place to + * put them. This "can't happen" because the receive interrupt + * is tossing previous frames. + */ + if (int_events & SCCE_ENET_BSY) { + cep->stats.rx_dropped++; + printk("CPM ENET: BSY can't happen.\n"); + } + + return; +} + +/* During a receive, the cur_rx points to the current incoming buffer. + * When we update through the ring, if the next incoming buffer has + * not been given to the system, we just set the empty indicator, + * effectively tossing the packet. + */ +static int +scc_enet_rx(struct net_device *dev) +{ + struct scc_enet_private *cep; + volatile QUICC_BD *bdp; + struct sk_buff *skb; + ushort pkt_len; + + cep = (struct scc_enet_private *)dev->priv; + + /* First, grab all of the stats for the incoming packet. + * These get messed up if we get called due to a busy condition. + */ + bdp = cep->cur_rx; + + for (;;) { + if (bdp->status & BD_ENET_RX_EMPTY) + break; + +#ifndef final_version + /* Since we have allocated space to hold a complete frame, both + * the first and last indicators should be set. + */ + if ((bdp->status & (BD_ENET_RX_FIRST | BD_ENET_RX_LAST)) != + (BD_ENET_RX_FIRST | BD_ENET_RX_LAST)) + printk("CPM ENET: rcv is not first+last\n"); +#endif + + /* Frame too long or too short. + */ + if (bdp->status & (BD_ENET_RX_LG | BD_ENET_RX_SH)) + cep->stats.rx_length_errors++; + if (bdp->status & BD_ENET_RX_NO) /* Frame alignment */ + cep->stats.rx_frame_errors++; + if (bdp->status & BD_ENET_RX_CR) /* CRC Error */ + cep->stats.rx_crc_errors++; + if (bdp->status & BD_ENET_RX_OV) /* FIFO overrun */ + cep->stats.rx_crc_errors++; + + /* Report late collisions as a frame error. + * On this error, the BD is closed, but we don't know what we + * have in the buffer. So, just drop this frame on the floor. + */ + if (bdp->status & BD_ENET_RX_CL) { + cep->stats.rx_frame_errors++; + } + else { + + /* Process the incoming frame. + */ + cep->stats.rx_packets++; + pkt_len = bdp->length; + /* cep->stats.rx_bytes += pkt_len; */ /* TODO: It would really be nice... */ + + /* This does 16 byte alignment, much more than we need. + * The packet length includes FCS, but we don't want to + * include that when passing upstream as it messes up + * bridging applications. + */ + skb = dev_alloc_skb(pkt_len-4); + + if (skb == NULL) { + printk("%s: Memory squeeze, dropping packet.\n", dev->name); + cep->stats.rx_dropped++; + } + else { + skb->dev = dev; + skb_put(skb,pkt_len-4); /* Make room */ + eth_copy_and_sum(skb, (unsigned char *)bdp->buf, pkt_len-4, 0); + skb->protocol=eth_type_trans(skb,dev); + netif_rx(skb); + } + } + + /* Clear the status flags for this buffer. + */ + bdp->status &= ~BD_ENET_RX_STATS; + + /* Mark the buffer empty. + */ + bdp->status |= BD_ENET_RX_EMPTY; + + /* Update BD pointer to next entry. + */ + if (bdp->status & BD_ENET_RX_WRAP) + bdp = cep->rx_bd_base; + else + bdp++; + + } + cep->cur_rx = (QUICC_BD *)bdp; + + return 0; +} + +static int +scc_enet_close(struct net_device *dev) +{ + /* Don't know what to do yet. + */ + /* netif_stop_queue(dev); */ + + return 0; +} + +/* static struct net_device_stats *scc_enet_get_stats(struct net_device *dev) */ +static struct enet_statistics *scc_enet_get_stats(struct net_device *dev) +{ + struct scc_enet_private *cep = (struct scc_enet_private *)dev->priv; + + return &cep->stats; +} + +/* Set or clear the multicast filter for this adaptor. + * Skeleton taken from sunlance driver. + * The CPM Ethernet implementation allows Multicast as well as individual + * MAC address filtering. Some of the drivers check to make sure it is + * a group multicast address, and discard those that are not. I guess I + * will do the same for now, but just remove the test if you want + * individual filtering as well (do the upper net layers want or support + * this kind of feature?). + */ + +static void set_multicast_list(struct net_device *dev) +{ + struct scc_enet_private *cep; + struct dev_mc_list *dmi; + u_char *mcptr, *tdptr; + volatile scc_enet_t *ep; + int i, j; + volatile QUICC *cp = pquicc; + + cep = (struct scc_enet_private *)dev->priv; + + /* Get pointer to SCC area in parameter RAM. + */ + ep = (scc_enet_t *)dev->base_addr; + + if (dev->flags&IFF_PROMISC) { + + /* Log any net taps. */ + printk("%s: Promiscuous mode enabled.\n", dev->name); + cep->sccp->scc_psmr |= ETHER_PRO; + } else { + + cep->sccp->scc_psmr &= ~ETHER_PRO; + + if (dev->flags & IFF_ALLMULTI) { + /* Catch all multicast addresses, so set the + * filter to all 1's. + */ + ep->sen_gaddr1 = 0xffff; + ep->sen_gaddr2 = 0xffff; + ep->sen_gaddr3 = 0xffff; + ep->sen_gaddr4 = 0xffff; + } + else { + /* Clear filter and add the addresses in the list. + */ + ep->sen_gaddr1 = 0; + ep->sen_gaddr2 = 0; + ep->sen_gaddr3 = 0; + ep->sen_gaddr4 = 0; + + dmi = dev->mc_list; + + for (i=0; imc_count; i++) { + + /* Only support group multicast for now. + */ + if (!(dmi->dmi_addr[0] & 1)) + continue; + + /* The address in dmi_addr is LSB first, + * and taddr is MSB first. We have to + * copy bytes MSB first from dmi_addr. + */ + mcptr = (u_char *)dmi->dmi_addr + 5; + tdptr = (u_char *)&ep->sen_taddrh; + for (j=0; j<6; j++) + *tdptr++ = *mcptr--; + + /* Ask CPM to run CRC and set bit in + * filter mask. + */ + cp->cp_cr = mk_cr_cmd(CPM_CR_ENET, CPM_CR_SET_GADDR) | CPM_CR_FLG; + /* this delay is necessary here -- Cort */ + udelay(10); + while (cp->cp_cr & CPM_CR_FLG); + } + } + } +} + + +/* Initialize the CPM Ethernet on SCC. + */ +int scc_enet_init(void) +{ + struct net_device *dev; + struct scc_enet_private *cep; + int i, j; + unsigned char *eap; + /* unsigned long mem_addr; */ + /* pte_t *pte; */ + /* bd_t *bd; */ /* `board tag' used by ppc - TODO: integrate uC bootloader vars */ + volatile QUICC_BD *bdp; + volatile QUICC *cp; + volatile struct scc_regs *sccp; + volatile struct ethernet_pram *ep; + /* volatile immap_t *immap; */ + + cp = pquicc; /* Get pointer to Communication Processor */ + + /* immap = (immap_t *)IMAP_ADDR; */ /* and to internal registers */ + + /* bd = (bd_t *)__res; */ + + /* Allocate some private information. + */ + cep = (struct scc_enet_private *)kmalloc(sizeof(*cep), GFP_KERNEL); + memset(cep, 0, sizeof(*cep)); + /* __clear_user(cep,sizeof(*cep)); */ + /* spin_lock_init(&cep->lock); */ /* TODO: SPINLOCK */ + + /* Create an Ethernet device instance. + */ + dev = init_etherdev(0, 0); + + /* Get pointer to SCC area in parameter RAM. + */ + /* ep = (ethernet_pram *)(&cp->cp_dparam[PROFF_ENET]); */ + ep = &pquicc->pram[SCC_ENET].enet_scc; + + /* And another to the SCC register area. + */ + sccp = &pquicc->scc_regs[SCC_ENET]; + cep->sccp = sccp; /* Keep the pointer handy */ + + /* Disable receive and transmit in case EPPC-Bug started it. + */ + sccp->scc_gsmr.w.low &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); + + /* Set up 360 pins for SCC interface to ethernet transceiver. + * Pin mappings (PA_xx and PC_xx) are defined in commproc.h + */ + + /* Configure port A pins for Txd and Rxd. + */ + pquicc->pio_papar |= (PA_ENET_RXD | PA_ENET_TXD); + pquicc->pio_padir &= ~(PA_ENET_RXD | PA_ENET_TXD); + pquicc->pio_paodr &= ~PA_ENET_TXD; + + /* Configure port C pins to enable CLSN and RENA. + */ + pquicc->pio_pcpar &= ~(PC_ENET_CLSN | PC_ENET_RENA); + pquicc->pio_pcdir &= ~(PC_ENET_CLSN | PC_ENET_RENA); + pquicc->pio_pcso |= (PC_ENET_CLSN | PC_ENET_RENA); + + /* Configure port A for TCLK and RCLK. + */ + pquicc->pio_papar |= (PA_ENET_TCLK | PA_ENET_RCLK); + pquicc->pio_padir &= ~(PA_ENET_TCLK | PA_ENET_RCLK); + + /* Configure Serial Interface clock routing. + * First, clear all SCC bits to zero, then set the ones we want. + */ + pquicc->si_sicr &= ~SICR_ENET_MASK; + pquicc->si_sicr |= SICR_ENET_CLKRT; + + + /* Allocate space for the buffer descriptors in the DP ram. + * These are relative offsets in the DP ram address space. + * Initialize base addresses for the buffer descriptors. + */ + i = m360_cpm_dpalloc(sizeof(QUICC_BD) * RX_RING_SIZE); + ep->rbase = i; + cep->rx_bd_base = (QUICC_BD *)((uint)pquicc + i); + + i = m360_cpm_dpalloc(sizeof(QUICC_BD) * TX_RING_SIZE); + ep->tbase = i; + cep->tx_bd_base = (QUICC_BD *)((uint)pquicc + i); + + cep->dirty_tx = cep->cur_tx = cep->tx_bd_base; + cep->cur_rx = cep->rx_bd_base; + + /* Issue init Rx BD command for SCC. + * Manual says to perform an Init Rx parameters here. We have + * to perform both Rx and Tx because the SCC may have been + * already running. [In uCquicc's case, I don't think that is so - mles] + * In addition, we have to do it later because we don't yet have + * all of the BD control/status set properly. + cp->cp_cpcr = mk_cr_cmd(CPM_CR_ENET, CPM_CR_INIT_RX) | CPM_CR_FLG; + while (cp->cp_cpcr & CPM_CR_FLG); + */ + + /* Initialize function code registers for big-endian. + */ + ep->rfcr = (SCC_EB | SCC_FC_DMA); + ep->tfcr = (SCC_EB | SCC_FC_DMA); + + /* Set maximum bytes per receive buffer. + * This appears to be an Ethernet frame size, not the buffer + * fragment size. It must be a multiple of four. + */ + ep->mrblr = PKT_MAXBLR_SIZE; + + /* Set CRC preset and mask. + */ + ep->c_pres = 0xffffffff; + ep->c_mask = 0xdebb20e3; /* see 360UM p. 7-247 */ + + ep->crcec = 0; /* CRC Error counter */ + ep->alec = 0; /* alignment error counter */ + ep->disfc = 0; /* discard frame counter */ + + ep->pads = 0x8888; /* Tx short frame pad character */ + ep->ret_lim = 0x000f; /* Retry limit threshold */ + + ep->mflr = PKT_MAXBUF_SIZE; /* maximum frame length register */ + ep->minflr = PKT_MINBUF_SIZE; /* minimum frame length register */ + + ep->maxd1 = PKT_MAXBLR_SIZE; /* maximum DMA1 length */ + ep->maxd2 = PKT_MAXBLR_SIZE; /* maximum DMA2 length */ + + /* Clear hash tables, group and individual. + */ + ep->gaddr1 = ep->gaddr2 = ep->gaddr3 = ep->gaddr4 = 0; + ep->iaddr1 = ep->iaddr2 = ep->iaddr3 = ep->iaddr4 = 0; + + /* Set Ethernet station address. + * + * The uCbootloader provides a hook to the kernel to retrieve + * stuff like the MAC address. This is retrieved in config_BSP() + */ +#if defined (CONFIG_UCQUICC) + { + extern unsigned char *scc1_hwaddr; + + eap = (char *)ep->paddr.b; + for (i=5; i>=0; i--) + *eap++ = dev->dev_addr[i] = scc1_hwaddr[i]; + } +#endif + + +/* #ifndef CONFIG_MBX */ +/* eap = (unsigned char *)&(ep->paddrh); */ + +/* for (i=5; i>=0; i--) */ +/* *eap++ = dev->dev_addr[i] = bd->bi_enetaddr[i]; */ +/* #else */ +/* for (i=5; i>=0; i--) */ +/* dev->dev_addr[i] = *eap++; */ +/* #endif */ + + ep->p_per = 0; /* 'cause the book says so */ + ep->taddr_l = 0; /* temp address (LSB) */ + ep->taddr_m = 0; + ep->taddr_h = 0; /* temp address (MSB) */ + + /* Now allocate the host memory pages and initialize the + * buffer descriptors. + */ + /* initialize rx buffer descriptors */ + bdp = cep->tx_bd_base; + for (j=0; j<(TX_RING_SIZE-1); j++) { + bdp->buf = 0; + bdp->status = 0; + bdp++; + } + bdp->buf = 0; + bdp->status = BD_SC_WRAP; + + + /* initialize rx buffer descriptors */ + bdp = cep->rx_bd_base; + for (j=0; j<(RX_RING_SIZE-1); j++) { + bdp->buf = &rx_buf_pool[j * CPM_ENET_RX_FRSIZE]; + bdp->status = BD_SC_EMPTY | BD_SC_INTRPT; + bdp++; + } + bdp->buf = &rx_buf_pool[j * CPM_ENET_RX_FRSIZE]; + bdp->status = BD_SC_WRAP | BD_SC_EMPTY | BD_SC_INTRPT; + + + + /* Let's re-initialize the channel now. We have to do it later + * than the manual describes because we have just now finished + * the BD initialization. + */ + cp->cp_cr = mk_cr_cmd(CPM_CR_ENET, CPM_CR_INIT_TRX) | CPM_CR_FLG; + while (cp->cp_cr & CPM_CR_FLG); + + cep->skb_cur = cep->skb_dirty = 0; + + sccp->scc_scce = 0xffff; /* Clear any pending events */ + + /* Enable interrupts for transmit error, complete frame + * received, and any transmit buffer we have also set the + * interrupt flag. + */ + sccp->scc_sccm = (SCCE_ENET_TXE | SCCE_ENET_RXF | SCCE_ENET_TXB); + + /* Install our interrupt handler. + */ + /* cpm_install_handler(CPMVEC_ENET, scc_enet_interrupt, dev); */ + request_irq(IRQ_MACHSPEC | CPMVEC_ENET, scc_enet_interrupt, + IRQ_FLG_LOCK, dev->name, (void *)dev); + + /* Set GSMR_H to enable all normal operating modes. + * Set GSMR_L to enable Ethernet to MC68160. + */ + sccp->scc_gsmr.w.high = 0; + sccp->scc_gsmr.w.low = (SCC_GSMRL_TCI | SCC_GSMRL_TPL_48 | + SCC_GSMRL_TPP_10 | SCC_GSMRL_MODE_ENET); + + /* Set sync/delimiters. + */ + sccp->scc_dsr = 0xd555; + + /* Set processing mode. Use Ethernet CRC, catch broadcast, and + * start frame search 22 bit times after RENA. + */ + sccp->scc_psmr = (SCC_PMSR_ENCRC /* Ethernet CRC mode */ + /* | SCC_PSMR_HBC */ /* Enable heartbeat */ + /* | SCC_PMSR_PRO */ /* Promiscuous mode */ + /* | SCC_PMSR_FDE */ /* Full duplex enable */ + | ETHER_NIB_22); + /* sccp->scc_psmr = (SCC_PMSR_PRO | ETHER_CRC_32 | ETHER_NIB_22); */ + + + /* It is now OK to enable the Ethernet transmitter. + * Unfortunately, there are board implementation differences here. + */ +#if defined(CONFIG_UCQUICC) +/* immap->im_ioport.iop_pcpar |= PC_ENET_TENA; */ +/* immap->im_ioport.iop_pcdir &= ~PC_ENET_TENA; */ + cp->pio_pcpar |= PC_ENET_TENA; /* t_en */ + cp->pio_pcdir &= ~PC_ENET_TENA; + + cp->pip_pbpar &= ~(0x00000200); /* power up ethernet transceiver */ + cp->pip_pbdir |= (0x00000200); + cp->pip_pbdat |= (0x00000200); +#endif + + + dev->base_addr = (unsigned long)ep; + dev->priv = cep; +#if 0 + dev->name = "CPM_ENET"; +#endif + + /* The CPM Ethernet specific entries in the device structure. */ + dev->open = scc_enet_open; + dev->hard_start_xmit = scc_enet_start_xmit; + /* dev->tx_timeout = scc_enet_timeout; */ + /* dev->watchdog_timeo = TX_TIMEOUT; */ + dev->stop = scc_enet_close; + dev->get_stats = scc_enet_get_stats; + dev->set_multicast_list = set_multicast_list; + + /* And last, enable the transmit and receive processing. + */ + sccp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT); + + printk("%s: CPM ENET Version 0.3, ", dev->name); + for (i=0; i<5; i++) + printk("%02x:", dev->dev_addr[i]); + printk("%02x\n", dev->dev_addr[5]); + + return 0; +} + + + +int m68360_enet_probe(struct device *dev) +{ + scc_enet_init (); +} + + +/* + * Local variables: + * c-indent-level: 4 + * c-basic-offset: 4 + * tab-width: 4 + * End: + */ diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68360/quicc/Makefile linux.2.5.40-ac2/arch/m68knommu/platform/68360/quicc/Makefile --- linux.2.5.40/arch/m68knommu/platform/68360/quicc/Makefile 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68360/quicc/Makefile 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,25 @@ +# +# Makefile for the linux MC68360 CPM access routines +# +# Note! Dependencies are done automagically by 'make dep', which also +# removes any old dependencies. DON'T put your own dependencies here +# unless it's something special (ie not a .c file). +# +# Note 2! The CFLAGS definition is now in the main makefile... + +O_TARGET := quicc360.a +O_OBJS = commproc.o + +ifdef CONFIG_M68360_UART +O_OBJS += uart.o +endif + +ifdef CONFIG_M68EN360_ETHERNET +O_OBJS += enet.o +endif + +ifdef CONFIG_M68EN360_HDLC +O_OBJS += hdlc.o +endif + +include $(TOPDIR)/Rules.make diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68360/quicc/uart.c linux.2.5.40-ac2/arch/m68knommu/platform/68360/quicc/uart.c --- linux.2.5.40/arch/m68knommu/platform/68360/quicc/uart.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68360/quicc/uart.c 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,3205 @@ +/* + * UART driver for 68360 CPM SCC or SMC + * Copyright (c) 2000 D. Jeff Dionne , + * Copyright (c) 2000 Michael Leslie + * Copyright (c) 1997 Dan Malek + * + * I used the serial.c driver as the framework for this driver. + * Give credit to those guys. + * The original code was written for the MBX860 board. I tried to make + * it generic, but there may be some assumptions in the structures that + * have to be fixed later. + * To save porting time, I did not bother to change any object names + * that are not accessed outside of this file. + * It still needs lots of work........When it was easy, I included code + * to support the SCCs, but this has never been tested, nor is it complete. + * Only the SCCs support modem control, so that is not complete either. + * + * This module exports the following rs232 io functions: + * + * int rs_360_init(void); + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +/* #include */ +#include +/* #include */ +#include + +#include + +#include +/* #include */ /* more hierarchical than m68360_quicc.h */ +#include "commproc.h" + + +#ifdef CONFIG_KGDB +extern void breakpoint(void); +extern void set_debug_traps(void); +extern int kgdb_output_string (const char* s, unsigned int count); +#endif + + +/* #ifdef CONFIG_SERIAL_CONSOLE */ /* This seems to be a post 2.0 thing - mles */ +#include + +/* this defines the index into rs_table for the port to use + */ +#ifndef CONFIG_SERIAL_CONSOLE_PORT +#define CONFIG_SERIAL_CONSOLE_PORT 1 /* ie SMC2 - note USE_SMC2 must be defined */ +#endif +/* #endif */ + +#if 0 +/* SCC2 for console + */ +#undef CONFIG_SERIAL_CONSOLE_PORT +#define CONFIG_SERIAL_CONSOLE_PORT 2 +#endif + + +#define TX_WAKEUP ASYNC_SHARE_IRQ + +static char *serial_name = "CPM UART driver"; +static char *serial_version = "0.03"; + +static DECLARE_TASK_QUEUE(tq_serial); + +static struct tty_driver serial_driver, callout_driver; +static int serial_refcount; +int serial_console_setup(struct console *co, char *options); + +/* + * Serial driver configuration section. Here are the various options: + */ +#define SERIAL_PARANOIA_CHECK +#define CONFIG_SERIAL_NOPAUSE_IO +#define SERIAL_DO_RESTART + +/* Set of debugging defines */ + +#undef SERIAL_DEBUG_INTR +#undef SERIAL_DEBUG_OPEN +#undef SERIAL_DEBUG_FLOW +#undef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT + +#define _INLINE_ inline + +#define DBG_CNT(s) + +/* We overload some of the items in the data structure to meet our + * needs. For example, the port address is the CPM parameter ram + * offset for the SCC or SMC. The maximum number of ports is 4 SCCs and + * 2 SMCs. The "hub6" field is used to indicate the channel number, with + * a flag indicating SCC or SMC, and the number is used as an index into + * the CPM parameter area for this device. + * The "type" field is currently set to 0, for PORT_UNKNOWN. It is + * not currently used. I should probably use it to indicate the port + * type of SMC or SCC. + * The SMCs do not support any modem control signals. + */ +#define smc_scc_num hub6 +#define NUM_IS_SCC ((int)0x00010000) +#define PORT_NUM(P) ((P) & 0x0000ffff) + + +#if defined (CONFIG_UCQUICC) + +volatile extern void *_periph_base; +/* sipex transceiver + * mode bits for are on pins + * + * SCC2 d16..19 + * SCC3 d20..23 + * SCC4 d24..27 + */ +#define SIPEX_MODE(n,m) ((m & 0x0f)<<(16+4*(n-1))) + +static uint sipex_mode_bits = 0x00000000; + +#endif + +/* There is no `serial_state' defined back here in 2.0. + * Try to get by with serial_struct + */ +/* #define serial_state serial_struct */ + +/* 2.4 -> 2.0 portability problem: async_icount in 2.4 has a few + * extras: */ + +#if 0 +struct async_icount_24 { + __u32 cts, dsr, rng, dcd, tx, rx; + __u32 frame, parity, overrun, brk; + __u32 buf_overrun; +} icount; +#endif + +#if 0 + +struct serial_state { + int magic; + int baud_base; + unsigned long port; + int irq; + int flags; + int hub6; + int type; + int line; + int revision; /* Chip revision (950) */ + int xmit_fifo_size; + int custom_divisor; + int count; + u8 *iomem_base; + u16 iomem_reg_shift; + unsigned short close_delay; + unsigned short closing_wait; /* time to wait before closing */ + struct async_icount_24 icount; + struct termios normal_termios; + struct termios callout_termios; + int io_type; + struct async_struct *info; +}; +#endif + +#define SSTATE_MAGIC 0x5302 + + + +/* SMC2 is sometimes used for low performance TDM interfaces. Define + * this as 1 if you want SMC2 as a serial port UART managed by this driver. + * Define this as 0 if you wish to use SMC2 for something else. + */ +#define USE_SMC2 1 + +#if 0 +/* Define SCC to ttySx mapping. */ +#define SCC_NUM_BASE (USE_SMC2 + 1) /* SCC base tty "number" */ + +/* Define which SCC is the first one to use for a serial port. These + * are 0-based numbers, i.e. this assumes the first SCC (SCC1) is used + * for Ethernet, and the first available SCC for serial UART is SCC2. + * NOTE: IF YOU CHANGE THIS, you have to change the PROFF_xxx and + * interrupt vectors in the table below to match. + */ +#define SCC_IDX_BASE 1 /* table index */ +#endif + + +/* Processors other than the 860 only get SMCs configured by default. + * Either they don't have SCCs or they are allocated somewhere else. + * Of course, there are now 860s without some SCCs, so we will need to + * address that someday. + * The Embedded Planet Multimedia I/O cards use TDM interfaces to the + * stereo codec parts, and we use SMC2 to help support that. + */ +static struct serial_state rs_table[] = { +/* type line PORT IRQ FLAGS smc_scc_num (F.K.A. hub6) */ + { 0, 0, PRSLOT_SMC1, CPMVEC_SMC1, 0, 0 } /* SMC1 ttyS0 */ +#if USE_SMC2 + ,{ 0, 0, PRSLOT_SMC2, CPMVEC_SMC2, 0, 1 } /* SMC2 ttyS1 */ +#endif + +#if defined(CONFIG_M68360_SCC_UART) + ,{ 0, 0, PRSLOT_SCC2, CPMVEC_SCC2, 0, (NUM_IS_SCC | 1) } /* SCC2 ttyS2 */ + ,{ 0, 0, PRSLOT_SCC3, CPMVEC_SCC3, 0, (NUM_IS_SCC | 2) } /* SCC3 ttyS3 */ + ,{ 0, 0, PRSLOT_SCC4, CPMVEC_SCC4, 0, (NUM_IS_SCC | 3) } /* SCC4 ttyS4 */ +#endif +}; + +#define NR_PORTS (sizeof(rs_table)/sizeof(struct serial_state)) + +static struct tty_struct *serial_table[NR_PORTS]; +static struct termios *serial_termios[NR_PORTS]; +static struct termios *serial_termios_locked[NR_PORTS]; + +/* The number of buffer descriptors and their sizes. + */ +#define RX_NUM_FIFO 4 +#define RX_BUF_SIZE 32 +#define TX_NUM_FIFO 4 +#define TX_BUF_SIZE 32 + +#define CONSOLE_NUM_FIFO 2 +#define CONSOLE_BUF_SIZE 4 + +char *console_fifos[CONSOLE_NUM_FIFO * CONSOLE_BUF_SIZE]; + +#ifndef MIN +#define MIN(a,b) ((a) < (b) ? (a) : (b)) +#endif + +/* The async_struct in serial.h does not really give us what we + * need, so define our own here. + */ +typedef struct serial_info { + int magic; + int flags; + + struct serial_state *state; + /* struct serial_struct *state; */ + /* struct async_struct *state; */ + + struct tty_struct *tty; + int read_status_mask; + int ignore_status_mask; + int timeout; + int line; + int x_char; /* xon/xoff character */ + int close_delay; + unsigned short closing_wait; + unsigned short closing_wait2; + unsigned long event; + unsigned long last_active; + int blocked_open; /* # of blocked opens */ + long session; /* Session of opening process */ + long pgrp; /* pgrp of opening process */ + struct tq_struct tqueue; + struct tq_struct tqueue_hangup; + wait_queue_head_t open_wait; + wait_queue_head_t close_wait; +/* struct wait_queue *open_wait; */ +/* struct wait_queue *close_wait;i */ + + +/* CPM Buffer Descriptor pointers. + */ + QUICC_BD *rx_bd_base; + QUICC_BD *rx_cur; + QUICC_BD *tx_bd_base; + QUICC_BD *tx_cur; +} ser_info_t; + + +/* since kmalloc_init() does not get called until much after this initialization: */ +static ser_info_t quicc_ser_info[NR_PORTS]; +static char rx_buf_pool[NR_PORTS * RX_NUM_FIFO * RX_BUF_SIZE]; +static char tx_buf_pool[NR_PORTS * TX_NUM_FIFO * TX_BUF_SIZE]; + +static void change_speed(ser_info_t *info); +static void rs_360_wait_until_sent(struct tty_struct *tty, int timeout); + +static inline int serial_paranoia_check(ser_info_t *info, + kdev_t device, const char *routine) +{ +#ifdef SERIAL_PARANOIA_CHECK + static const char *badmagic = + "Warning: bad magic number for serial struct (%s) in %s\n"; + static const char *badinfo = + "Warning: null async_struct for (%s) in %s\n"; + + if (!info) { + printk(badinfo, kdevname(device), routine); + return 1; + } + if (info->magic != SERIAL_MAGIC) { + printk(badmagic, kdevname(device), routine); + return 1; + } +#endif + return 0; +} + +/* + * This is used to figure out the divisor speeds and the timeouts, + * indexed by the termio value. The generic CPM functions are responsible + * for setting and assigning baud rate generators for us. + */ +static int baud_table[] = { + 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800, + 9600, 19200, 38400, 57600, 115200, 230400, 460800, 0 }; + +/* This sucks. There is a better way: */ +#if defined(CONFIG_CONSOLE_9600) + #define CONSOLE_BAUDRATE 9600 +#elif defined(CONFIG_CONSOLE_19200) + #define CONSOLE_BAUDRATE 19200 +#elif defined(CONFIG_CONSOLE_115200) + #define CONSOLE_BAUDRATE 115200 +#else +#error "console baud rate undefined" +#endif + +/* + * ------------------------------------------------------------ + * rs_stop() and rs_start() + * + * This routines are called before setting or resetting tty->stopped. + * They enable or disable transmitter interrupts, as necessary. + * ------------------------------------------------------------ + */ +static void rs_360_stop(struct tty_struct *tty) +{ + ser_info_t *info = (ser_info_t *)tty->driver_data; + int idx; + unsigned long flags; + volatile struct scc_regs *sccp; + volatile struct smc_regs *smcp; + + if (serial_paranoia_check(info, tty->device, "rs_stop")) + return; + + save_flags(flags); cli(); + idx = PORT_NUM(info->state->smc_scc_num); + if (info->state->smc_scc_num & NUM_IS_SCC) { + sccp = &pquicc->scc_regs[idx]; + sccp->scc_sccm &= ~UART_SCCM_TX; + } else { + /* smcp = &cpmp->cp_smc[idx]; */ + smcp = &pquicc->smc_regs[idx]; + smcp->smc_smcm &= ~SMCM_TX; + } + restore_flags(flags); +} + + +static void rs_360_start(struct tty_struct *tty) +{ + ser_info_t *info = (ser_info_t *)tty->driver_data; + int idx; + unsigned long flags; + volatile struct scc_regs *sccp; + volatile struct smc_regs *smcp; + + if (serial_paranoia_check(info, tty->device, "rs_stop")) + return; + + save_flags(flags); cli(); + idx = PORT_NUM(info->state->smc_scc_num); + if (info->state->smc_scc_num & NUM_IS_SCC) { + sccp = &pquicc->scc_regs[idx]; + sccp->scc_sccm |= UART_SCCM_TX; + } else { + smcp = &pquicc->smc_regs[idx]; + smcp->smc_smcm |= SMCM_TX; + } + restore_flags(flags); +} + +/* + * ---------------------------------------------------------------------- + * + * Here starts the interrupt handling routines. All of the following + * subroutines are declared as inline and are folded into + * rs_interrupt(). They were separated out for readability's sake. + * + * Note: rs_interrupt() is a "fast" interrupt, which means that it + * runs with interrupts turned off. People who may want to modify + * rs_interrupt() should try to keep the interrupt handler as fast as + * possible. After you are done making modifications, it is not a bad + * idea to do: + * + * gcc -S -DKERNEL -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer serial.c + * + * and look at the resulting assemble code in serial.s. + * + * - Ted Ts'o (tytso@mit.edu), 7-Mar-93 + * ----------------------------------------------------------------------- + */ + +/* + * This routine is used by the interrupt handler to schedule + * processing in the software interrupt portion of the driver. + */ +static _INLINE_ void rs_sched_event(ser_info_t *info, + int event) +{ + info->event |= 1 << event; + queue_task(&info->tqueue, &tq_serial); + mark_bh(SERIAL_BH); +} + +static _INLINE_ void receive_chars(ser_info_t *info) +{ + struct tty_struct *tty = info->tty; + unsigned char ch, *cp; + /*int ignored = 0;*/ + int i; + ushort status; + struct async_icount *icount; + /* struct async_icount_24 *icount; */ + volatile QUICC_BD *bdp; + + icount = &info->state->icount; + + /* Just loop through the closed BDs and copy the characters into + * the buffer. + */ + bdp = info->rx_cur; + for (;;) { + if (bdp->status & BD_SC_EMPTY) /* If this one is empty */ + break; /* we are all done */ + + /* The read status mask tell us what we should do with + * incoming characters, especially if errors occur. + * One special case is the use of BD_SC_EMPTY. If + * this is not set, we are supposed to be ignoring + * inputs. In this case, just mark the buffer empty and + * continue. + */ + if (!(info->read_status_mask & BD_SC_EMPTY)) { + bdp->status |= BD_SC_EMPTY; + bdp->status &= + ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV); + + if (bdp->status & BD_SC_WRAP) + bdp = info->rx_bd_base; + else + bdp++; + continue; + } + + /* Get the number of characters and the buffer pointer. + */ + i = bdp->length; + /* cp = (unsigned char *)__va(bdp->buf); */ + cp = (char *)bdp->buf; + status = bdp->status; + + /* Check to see if there is room in the tty buffer for + * the characters in our BD buffer. If not, we exit + * now, leaving the BD with the characters. We'll pick + * them up again on the next receive interrupt (which could + * be a timeout). + */ + if ((tty->flip.count + i) >= TTY_FLIPBUF_SIZE) + break; + + while (i-- > 0) { + ch = *cp++; + *tty->flip.char_buf_ptr = ch; + icount->rx++; + +#ifdef SERIAL_DEBUG_INTR + printk("DR%02x:%02x...", ch, status); +#endif + *tty->flip.flag_buf_ptr = 0; + if (status & (BD_SC_BR | BD_SC_FR | + BD_SC_PR | BD_SC_OV)) { + /* + * For statistics only + */ + if (status & BD_SC_BR) + icount->brk++; + else if (status & BD_SC_PR) + icount->parity++; + else if (status & BD_SC_FR) + icount->frame++; + if (status & BD_SC_OV) + icount->overrun++; + + /* + * Now check to see if character should be + * ignored, and mask off conditions which + * should be ignored. + if (status & info->ignore_status_mask) { + if (++ignored > 100) + break; + continue; + } + */ + status &= info->read_status_mask; + + if (status & (BD_SC_BR)) { +#ifdef SERIAL_DEBUG_INTR + printk("handling break...."); +#endif + *tty->flip.flag_buf_ptr = TTY_BREAK; + if (info->flags & ASYNC_SAK) + do_SAK(tty); + } else if (status & BD_SC_PR) + *tty->flip.flag_buf_ptr = TTY_PARITY; + else if (status & BD_SC_FR) + *tty->flip.flag_buf_ptr = TTY_FRAME; + if (status & BD_SC_OV) { + /* + * Overrun is special, since it's + * reported immediately, and doesn't + * affect the current character + */ + if (tty->flip.count < TTY_FLIPBUF_SIZE) { + tty->flip.count++; + tty->flip.flag_buf_ptr++; + tty->flip.char_buf_ptr++; + *tty->flip.flag_buf_ptr = + TTY_OVERRUN; + } + } + } + if (tty->flip.count >= TTY_FLIPBUF_SIZE) + break; + + tty->flip.flag_buf_ptr++; + tty->flip.char_buf_ptr++; + tty->flip.count++; + } + + /* This BD is ready to be used again. Clear status. + * Get next BD. + */ + bdp->status |= BD_SC_EMPTY; + bdp->status &= ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV); + + if (bdp->status & BD_SC_WRAP) + bdp = info->rx_bd_base; + else + bdp++; + } + + info->rx_cur = (QUICC_BD *)bdp; + + queue_task(&tty->flip.tqueue, &tq_timer); +} + +static _INLINE_ void receive_break(ser_info_t *info) +{ + struct tty_struct *tty = info->tty; + + info->state->icount.brk++; + /* Check to see if there is room in the tty buffer for + * the break. If not, we exit now, losing the break. FIXME + */ + if ((tty->flip.count + 1) >= TTY_FLIPBUF_SIZE) + return; + *(tty->flip.flag_buf_ptr++) = TTY_BREAK; + *(tty->flip.char_buf_ptr++) = 0; + tty->flip.count++; + + queue_task(&tty->flip.tqueue, &tq_timer); +} + +static _INLINE_ void transmit_chars(ser_info_t *info) +{ + + if ((info->flags & TX_WAKEUP) || + (info->tty->flags & (1 << TTY_DO_WRITE_WAKEUP))) { + rs_sched_event(info, RS_EVENT_WRITE_WAKEUP); + } + +#ifdef SERIAL_DEBUG_INTR + printk("THRE..."); +#endif +} + +#ifdef notdef + /* I need to do this for the SCCs, so it is left as a reminder. + */ +static _INLINE_ void check_modem_status(struct async_struct *info) +{ + int status; + /* struct async_icount *icount; */ + struct async_icount_24 *icount; + + status = serial_in(info, UART_MSR); + + if (status & UART_MSR_ANY_DELTA) { + icount = &info->state->icount; + /* update input line counters */ + if (status & UART_MSR_TERI) + icount->rng++; + if (status & UART_MSR_DDSR) + icount->dsr++; + if (status & UART_MSR_DDCD) { + icount->dcd++; +#ifdef CONFIG_HARD_PPS + if ((info->flags & ASYNC_HARDPPS_CD) && + (status & UART_MSR_DCD)) + hardpps(); +#endif + } + if (status & UART_MSR_DCTS) + icount->cts++; + wake_up_interruptible(&info->delta_msr_wait); + } + + if ((info->flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) { +#if (defined(SERIAL_DEBUG_OPEN) || defined(SERIAL_DEBUG_INTR)) + printk("ttys%d CD now %s...", info->line, + (status & UART_MSR_DCD) ? "on" : "off"); +#endif + if (status & UART_MSR_DCD) + wake_up_interruptible(&info->open_wait); + else if (!((info->flags & ASYNC_CALLOUT_ACTIVE) && + (info->flags & ASYNC_CALLOUT_NOHUP))) { +#ifdef SERIAL_DEBUG_OPEN + printk("scheduling hangup..."); +#endif + queue_task(&info->tqueue_hangup, + &tq_scheduler); + } + } + if (info->flags & ASYNC_CTS_FLOW) { + if (info->tty->hw_stopped) { + if (status & UART_MSR_CTS) { +#if (defined(SERIAL_DEBUG_INTR) || defined(SERIAL_DEBUG_FLOW)) + printk("CTS tx start..."); +#endif + info->tty->hw_stopped = 0; + info->IER |= UART_IER_THRI; + serial_out(info, UART_IER, info->IER); + rs_sched_event(info, RS_EVENT_WRITE_WAKEUP); + return; + } + } else { + if (!(status & UART_MSR_CTS)) { +#if (defined(SERIAL_DEBUG_INTR) || defined(SERIAL_DEBUG_FLOW)) + printk("CTS tx stop..."); +#endif + info->tty->hw_stopped = 1; + info->IER &= ~UART_IER_THRI; + serial_out(info, UART_IER, info->IER); + } + } + } +} +#endif + +/* + * This is the serial driver's interrupt routine for a single port + */ +/* static void rs_360_interrupt(void *dev_id) */ /* until and if we start servicing irqs here */ +static void rs_360_interrupt(int vec, void *dev_id, struct pt_regs *fp) +{ + u_char events; + int idx; + ser_info_t *info; + volatile struct smc_regs *smcp; + volatile struct scc_regs *sccp; + + info = (ser_info_t *)dev_id; + + idx = PORT_NUM(info->state->smc_scc_num); + if (info->state->smc_scc_num & NUM_IS_SCC) { + sccp = &pquicc->scc_regs[idx]; + events = sccp->scc_scce; + if (events & SCCM_RX) + receive_chars(info); + if (events & SCCM_TX) + transmit_chars(info); + sccp->scc_scce = events; + } else { + smcp = &pquicc->smc_regs[idx]; + events = smcp->smc_smce; + if (events & SMCM_BRKE) + receive_break(info); + if (events & SMCM_RX) + receive_chars(info); + if (events & SMCM_TX) + transmit_chars(info); + smcp->smc_smce = events; + } + +#ifdef SERIAL_DEBUG_INTR + printk("rs_interrupt_single(%d, %x)...", + info->state->smc_scc_num, events); +#endif +#ifdef modem_control + check_modem_status(info); +#endif + info->last_active = jiffies; +#ifdef SERIAL_DEBUG_INTR + printk("end.\n"); +#endif +} + + +/* + * ------------------------------------------------------------------- + * Here ends the serial interrupt routines. + * ------------------------------------------------------------------- + */ + +/* + * This routine is used to handle the "bottom half" processing for the + * serial driver, known also the "software interrupt" processing. + * This processing is done at the kernel interrupt level, after the + * rs_interrupt() has returned, BUT WITH INTERRUPTS TURNED ON. This + * is where time-consuming activities which can not be done in the + * interrupt driver proper are done; the interrupt driver schedules + * them using rs_sched_event(), and they get done here. + */ +static void do_serial_bh(void) +{ + run_task_queue(&tq_serial); +} + +static void do_softint(void *private_) +{ + ser_info_t *info = (ser_info_t *) private_; + struct tty_struct *tty; + + tty = info->tty; + if (!tty) + return; + + if (test_and_clear_bit(RS_EVENT_WRITE_WAKEUP, &info->event)) { + if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) && + tty->ldisc.write_wakeup) + (tty->ldisc.write_wakeup)(tty); + wake_up_interruptible(&tty->write_wait); + } +} + + + + +/* + * This routine is called from the scheduler tqueue when the interrupt + * routine has signalled that a hangup has occurred. The path of + * hangup processing is: + * + * serial interrupt routine -> (scheduler tqueue) -> + * do_serial_hangup() -> tty->hangup() -> rs_hangup() + * + */ +static void do_serial_hangup(void *private_) +{ + struct async_struct *info = (struct async_struct *) private_; + struct tty_struct *tty; + + tty = info->tty; + if (!tty) + return; + + tty_hangup(tty); +} + +/*static void rs_360_timer(void) +{ + printk("rs_360_timer\n"); +}*/ + + +static int startup(ser_info_t *info) +{ + unsigned long flags; + int retval=0; + int idx; + /*struct serial_state *state = info->state;*/ + volatile struct smc_regs *smcp; + volatile struct scc_regs *sccp; + volatile struct smc_uart_pram *up; + volatile struct uart_pram *scup; + + + save_flags(flags); cli(); + + if (info->flags & ASYNC_INITIALIZED) { + goto errout; + } + +#ifdef maybe + if (!state->port || !state->type) { + if (info->tty) + set_bit(TTY_IO_ERROR, &info->tty->flags); + goto errout; + } +#endif + +#ifdef SERIAL_DEBUG_OPEN + printk("starting up ttys%d (irq %d)...", info->line, state->irq); +#endif + + +#ifdef modem_control + info->MCR = 0; + if (info->tty->termios->c_cflag & CBAUD) + info->MCR = UART_MCR_DTR | UART_MCR_RTS; +#endif + + if (info->tty) + clear_bit(TTY_IO_ERROR, &info->tty->flags); + + /* + * and set the speed of the serial port + */ + change_speed(info); + + idx = PORT_NUM(info->state->smc_scc_num); + if (info->state->smc_scc_num & NUM_IS_SCC) { + sccp = &pquicc->scc_regs[idx]; + scup = &pquicc->pram[info->state->port].scc.pscc.u; + + scup->mrblr = RX_BUF_SIZE; + scup->max_idl = RX_BUF_SIZE; + + sccp->scc_sccm |= (UART_SCCM_TX | UART_SCCM_RX); + sccp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT); + + } else { + smcp = &pquicc->smc_regs[idx]; + + /* Enable interrupts and I/O. + */ + smcp->smc_smcm |= (SMCM_RX | SMCM_TX); + smcp->smc_smcmr |= (SMCMR_REN | SMCMR_TEN); + + /* We can tune the buffer length and idle characters + * to take advantage of the entire incoming buffer size. + * If mrblr is something other than 1, maxidl has to be + * non-zero or we never get an interrupt. The maxidl + * is the number of character times we wait after reception + * of the last character before we decide no more characters + * are coming. + */ + /* up = (smc_uart_t *)&pquicc->cp_dparam[state->port]; */ + /* holy unionized structures, Batman: */ + up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u; + + up->mrblr = RX_BUF_SIZE; + up->max_idl = RX_BUF_SIZE; + + up->brkcr = 1; /* number of break chars */ + } + + info->flags |= ASYNC_INITIALIZED; + restore_flags(flags); + return 0; + +errout: + restore_flags(flags); + return retval; +} + +/* + * This routine will shutdown a serial port; interrupts are disabled, and + * DTR is dropped if the hangup on close termio flag is on. + */ +static void shutdown(ser_info_t *info) +{ + unsigned long flags; + struct serial_state *state; + int idx; + volatile struct smc_regs *smcp; + volatile struct scc_regs *sccp; + + if (!(info->flags & ASYNC_INITIALIZED)) + return; + + state = info->state; + +#ifdef SERIAL_DEBUG_OPEN + printk("Shutting down serial port %d (irq %d)....", info->line, + state->irq); +#endif + + save_flags(flags); cli(); /* Disable interrupts */ + + idx = PORT_NUM(state->smc_scc_num); + if (state->smc_scc_num & NUM_IS_SCC) { + sccp = &pquicc->scc_regs[idx]; + sccp->scc_gsmr.w.low &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); +#ifdef CONFIG_SERIAL_CONSOLE + /* We can't disable the transmitter if this is the + * system console. + */ + if ((state - rs_table) != CONFIG_SERIAL_CONSOLE_PORT) +#endif + sccp->scc_sccm &= ~(UART_SCCM_TX | UART_SCCM_RX); + } else { + smcp = &pquicc->smc_regs[idx]; + + /* Disable interrupts and I/O. + */ + smcp->smc_smcm &= ~(SMCM_RX | SMCM_TX); +#ifdef CONFIG_SERIAL_CONSOLE + /* We can't disable the transmitter if this is the + * system console. + */ + if ((state - rs_table) != CONFIG_SERIAL_CONSOLE_PORT) +#endif + smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN); + } + + if (info->tty) + set_bit(TTY_IO_ERROR, &info->tty->flags); + + info->flags &= ~ASYNC_INITIALIZED; + restore_flags(flags); +} + +/* + * This routine is called to set the UART divisor registers to match + * the specified baud rate for a serial port. + */ +static void change_speed(ser_info_t *info) +{ + int baud_rate; + unsigned cflag, cval, scval, prev_mode; + int i, bits, sbits, idx; + unsigned long flags; + struct serial_state *state; + volatile struct smc_regs *smcp; + volatile struct scc_regs *sccp; + + if (!info->tty || !info->tty->termios) + return; + cflag = info->tty->termios->c_cflag; + + state = info->state; + + /* Character length programmed into the mode register is the + * sum of: 1 start bit, number of data bits, 0 or 1 parity bit, + * 1 or 2 stop bits, minus 1. + * The value 'bits' counts this for us. + */ + cval = 0; + scval = 0; + + /* byte size and parity */ + switch (cflag & CSIZE) { + case CS5: bits = 5; break; + case CS6: bits = 6; break; + case CS7: bits = 7; break; + case CS8: bits = 8; break; + /* Never happens, but GCC is too dumb to figure it out */ + default: bits = 8; break; + } + sbits = bits - 5; + + if (cflag & CSTOPB) { + cval |= SMCMR_SL; /* Two stops */ + scval |= SCU_PMSR_SL; + bits++; + } + if (cflag & PARENB) { + cval |= SMCMR_PEN; + scval |= SCU_PMSR_PEN; + bits++; + } + if (!(cflag & PARODD)) { + cval |= SMCMR_PM_EVEN; + scval |= (SCU_PMSR_REVP | SCU_PMSR_TEVP); + } + + /* Determine divisor based on baud rate */ + i = cflag & CBAUD; + if (i >= (sizeof(baud_table)/sizeof(int))) + baud_rate = 9600; + else + baud_rate = baud_table[i]; + + info->timeout = (TX_BUF_SIZE*HZ*bits); + info->timeout += HZ/50; /* Add .02 seconds of slop */ + +#ifdef modem_control + /* CTS flow control flag and modem status interrupts */ + info->IER &= ~UART_IER_MSI; + if (info->flags & ASYNC_HARDPPS_CD) + info->IER |= UART_IER_MSI; + if (cflag & CRTSCTS) { + info->flags |= ASYNC_CTS_FLOW; + info->IER |= UART_IER_MSI; + } else + info->flags &= ~ASYNC_CTS_FLOW; + if (cflag & CLOCAL) + info->flags &= ~ASYNC_CHECK_CD; + else { + info->flags |= ASYNC_CHECK_CD; + info->IER |= UART_IER_MSI; + } + serial_out(info, UART_IER, info->IER); +#endif + + /* + * Set up parity check flag + */ +#define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK)) + + info->read_status_mask = (BD_SC_EMPTY | BD_SC_OV); + if (I_INPCK(info->tty)) + info->read_status_mask |= BD_SC_FR | BD_SC_PR; + if (I_BRKINT(info->tty) || I_PARMRK(info->tty)) + info->read_status_mask |= BD_SC_BR; + + /* + * Characters to ignore + */ + info->ignore_status_mask = 0; + if (I_IGNPAR(info->tty)) + info->ignore_status_mask |= BD_SC_PR | BD_SC_FR; + if (I_IGNBRK(info->tty)) { + info->ignore_status_mask |= BD_SC_BR; + /* + * If we're ignore parity and break indicators, ignore + * overruns too. (For real raw support). + */ + if (I_IGNPAR(info->tty)) + info->ignore_status_mask |= BD_SC_OV; + } + /* + * !!! ignore all characters if CREAD is not set + */ + if ((cflag & CREAD) == 0) + info->read_status_mask &= ~BD_SC_EMPTY; + save_flags(flags); cli(); + + /* Start bit has not been added (so don't, because we would just + * subtract it later), and we need to add one for the number of + * stops bits (there is always at least one). + */ + bits++; + idx = PORT_NUM(state->smc_scc_num); + if (state->smc_scc_num & NUM_IS_SCC) { + sccp = &pquicc->scc_regs[idx]; + sccp->scc_psmr = (sbits << 12) | scval; + } else { + smcp = &pquicc->smc_regs[idx]; + + /* Set the mode register. We want to keep a copy of the + * enables, because we want to put them back if they were + * present. + */ + prev_mode = smcp->smc_smcmr; + smcp->smc_smcmr = smcr_mk_clen(bits) | cval | SMCMR_SM_UART; + smcp->smc_smcmr |= (prev_mode & (SMCMR_REN | SMCMR_TEN)); + } + + m360_cpm_setbrg((state - rs_table), baud_rate); + + restore_flags(flags); +} + +static void rs_360_put_char(struct tty_struct *tty, unsigned char ch) +{ + ser_info_t *info = (ser_info_t *)tty->driver_data; + volatile QUICC_BD *bdp; + + if (serial_paranoia_check(info, tty->device, "rs_put_char")) + return; + + if (!tty) + return; + + bdp = info->tx_cur; + while (bdp->status & BD_SC_READY); + + /* *((char *)__va(bdp->buf)) = ch; */ + *((char *)bdp->buf) = ch; + bdp->length = 1; + bdp->status |= BD_SC_READY; + + /* Get next BD. + */ + if (bdp->status & BD_SC_WRAP) + bdp = info->tx_bd_base; + else + bdp++; + + info->tx_cur = (QUICC_BD *)bdp; + +} + +static int rs_360_write(struct tty_struct * tty, int from_user, + const unsigned char *buf, int count) +{ + int c, ret = 0; + ser_info_t *info = (ser_info_t *)tty->driver_data; + volatile QUICC_BD *bdp; + +#ifdef CONFIG_KGDB + /* Try to let stub handle output. Returns true if it did. */ + if (kgdb_output_string(buf, count)) + return ret; +#endif + + if (serial_paranoia_check(info, tty->device, "rs_write")) + return 0; + + if (!tty) + return 0; + + bdp = info->tx_cur; + + while (1) { + c = MIN(count, TX_BUF_SIZE); + + if (c <= 0) + break; + + if (bdp->status & BD_SC_READY) { + info->flags |= TX_WAKEUP; + break; + } + + if (from_user) { + if (copy_from_user((void *)bdp->buf, buf, c)) { + if (!ret) + ret = -EFAULT; + break; + } + } else { + /* memcpy(__va(bdp->buf), buf, c); */ + memcpy((void *)bdp->buf, buf, c); + } + + bdp->length = c; + bdp->status |= BD_SC_READY; + + buf += c; + count -= c; + ret += c; + + /* Get next BD. + */ + if (bdp->status & BD_SC_WRAP) + bdp = info->tx_bd_base; + else + bdp++; + info->tx_cur = (QUICC_BD *)bdp; + } + return ret; +} + +static int rs_360_write_room(struct tty_struct *tty) +{ + ser_info_t *info = (ser_info_t *)tty->driver_data; + int ret; + + if (serial_paranoia_check(info, tty->device, "rs_write_room")) + return 0; + + if ((info->tx_cur->status & BD_SC_READY) == 0) { + info->flags &= ~TX_WAKEUP; + ret = TX_BUF_SIZE; + } + else { + info->flags |= TX_WAKEUP; + ret = 0; + } + return ret; +} + +/* I could track this with transmit counters....maybe later. +*/ +static int rs_360_chars_in_buffer(struct tty_struct *tty) +{ + ser_info_t *info = (ser_info_t *)tty->driver_data; + + if (serial_paranoia_check(info, tty->device, "rs_chars_in_buffer")) + return 0; + return 0; +} + +static void rs_360_flush_buffer(struct tty_struct *tty) +{ + ser_info_t *info = (ser_info_t *)tty->driver_data; + + if (serial_paranoia_check(info, tty->device, "rs_flush_buffer")) + return; + + /* There is nothing to "flush", whatever we gave the CPM + * is on its way out. + */ + wake_up_interruptible(&tty->write_wait); + if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) && + tty->ldisc.write_wakeup) + (tty->ldisc.write_wakeup)(tty); + info->flags &= ~TX_WAKEUP; +} + +/* + * This function is used to send a high-priority XON/XOFF character to + * the device + */ +static void rs_360_send_xchar(struct tty_struct *tty, char ch) +{ + volatile QUICC_BD *bdp; + + ser_info_t *info = (ser_info_t *)tty->driver_data; + + if (serial_paranoia_check(info, tty->device, "rs_send_char")) + return; + + bdp = info->tx_cur; + while (bdp->status & BD_SC_READY); + + /* *((char *)__va(bdp->buf)) = ch; */ + *((char *)bdp->buf) = ch; + bdp->length = 1; + bdp->status |= BD_SC_READY; + + /* Get next BD. + */ + if (bdp->status & BD_SC_WRAP) + bdp = info->tx_bd_base; + else + bdp++; + + info->tx_cur = (QUICC_BD *)bdp; +} + +/* + * ------------------------------------------------------------ + * rs_throttle() + * + * This routine is called by the upper-layer tty layer to signal that + * incoming characters should be throttled. + * ------------------------------------------------------------ + */ +static void rs_360_throttle(struct tty_struct * tty) +{ + ser_info_t *info = (ser_info_t *)tty->driver_data; +#ifdef SERIAL_DEBUG_THROTTLE + char buf[64]; + + printk("throttle %s: %d....\n", _tty_name(tty, buf), + tty->ldisc.chars_in_buffer(tty)); +#endif + + if (serial_paranoia_check(info, tty->device, "rs_throttle")) + return; + + if (I_IXOFF(tty)) + rs_360_send_xchar(tty, STOP_CHAR(tty)); + +#ifdef modem_control + if (tty->termios->c_cflag & CRTSCTS) + info->MCR &= ~UART_MCR_RTS; + + cli(); + serial_out(info, UART_MCR, info->MCR); + sti(); +#endif +} + +static void rs_360_unthrottle(struct tty_struct * tty) +{ + ser_info_t *info = (ser_info_t *)tty->driver_data; +#ifdef SERIAL_DEBUG_THROTTLE + char buf[64]; + + printk("unthrottle %s: %d....\n", _tty_name(tty, buf), + tty->ldisc.chars_in_buffer(tty)); +#endif + + if (serial_paranoia_check(info, tty->device, "rs_unthrottle")) + return; + + if (I_IXOFF(tty)) { + if (info->x_char) + info->x_char = 0; + else + rs_360_send_xchar(tty, START_CHAR(tty)); + } +#ifdef modem_control + if (tty->termios->c_cflag & CRTSCTS) + info->MCR |= UART_MCR_RTS; + cli(); + serial_out(info, UART_MCR, info->MCR); + sti(); +#endif +} + +/* + * ------------------------------------------------------------ + * rs_ioctl() and friends + * ------------------------------------------------------------ + */ + +#ifdef maybe +/* + * get_lsr_info - get line status register info + * + * Purpose: Let user call ioctl() to get info when the UART physically + * is emptied. On bus types like RS485, the transmitter must + * release the bus after transmitting. This must be done when + * the transmit shift register is empty, not be done when the + * transmit holding register is empty. This functionality + * allows an RS485 driver to be written in user space. + */ +static int get_lsr_info(struct async_struct * info, unsigned int *value) +{ + unsigned char status; + unsigned int result; + + cli(); + status = serial_in(info, UART_LSR); + sti(); + result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0); + return put_user(result,value); +} +#endif + +static int get_modem_info(ser_info_t *info, unsigned int *value) +{ + unsigned int result = 0; +#ifdef modem_control + unsigned char control, status; + + control = info->MCR; + cli(); + status = serial_in(info, UART_MSR); + sti(); + result = ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) + | ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) +#ifdef TIOCM_OUT1 + | ((control & UART_MCR_OUT1) ? TIOCM_OUT1 : 0) + | ((control & UART_MCR_OUT2) ? TIOCM_OUT2 : 0) +#endif + | ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) + | ((status & UART_MSR_RI) ? TIOCM_RNG : 0) + | ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) + | ((status & UART_MSR_CTS) ? TIOCM_CTS : 0); +#endif + /* return put_user(result,value); */ + put_user(result,value); + return (0); +} + +static int set_modem_info(ser_info_t *info, unsigned int cmd, + unsigned int *value) +{ + int error; + unsigned int arg; + + error = get_user(arg,value); + if (error) + return error; +#ifdef modem_control + switch (cmd) { + case TIOCMBIS: + if (arg & TIOCM_RTS) + info->MCR |= UART_MCR_RTS; + if (arg & TIOCM_DTR) + info->MCR |= UART_MCR_DTR; +#ifdef TIOCM_OUT1 + if (arg & TIOCM_OUT1) + info->MCR |= UART_MCR_OUT1; + if (arg & TIOCM_OUT2) + info->MCR |= UART_MCR_OUT2; +#endif + break; + case TIOCMBIC: + if (arg & TIOCM_RTS) + info->MCR &= ~UART_MCR_RTS; + if (arg & TIOCM_DTR) + info->MCR &= ~UART_MCR_DTR; +#ifdef TIOCM_OUT1 + if (arg & TIOCM_OUT1) + info->MCR &= ~UART_MCR_OUT1; + if (arg & TIOCM_OUT2) + info->MCR &= ~UART_MCR_OUT2; +#endif + break; + case TIOCMSET: + info->MCR = ((info->MCR & ~(UART_MCR_RTS | +#ifdef TIOCM_OUT1 + UART_MCR_OUT1 | + UART_MCR_OUT2 | +#endif + UART_MCR_DTR)) + | ((arg & TIOCM_RTS) ? UART_MCR_RTS : 0) +#ifdef TIOCM_OUT1 + | ((arg & TIOCM_OUT1) ? UART_MCR_OUT1 : 0) + | ((arg & TIOCM_OUT2) ? UART_MCR_OUT2 : 0) +#endif + | ((arg & TIOCM_DTR) ? UART_MCR_DTR : 0)); + break; + default: + return -EINVAL; + } + cli(); + serial_out(info, UART_MCR, info->MCR); + sti(); +#endif + return 0; +} + +/* Sending a break is a two step process on the SMC/SCC. It is accomplished + * by sending a STOP TRANSMIT command followed by a RESTART TRANSMIT + * command. We take advantage of the begin/end functions to make this + * happen. + */ +static ushort smc_chan_map[] = { + CPM_CR_CH_SMC1, + CPM_CR_CH_SMC2 +}; + +static ushort scc_chan_map[] = { + CPM_CR_CH_SCC1, + CPM_CR_CH_SCC2, + CPM_CR_CH_SCC3, + CPM_CR_CH_SCC4 +}; + +static void begin_break(ser_info_t *info) +{ + volatile QUICC *cp; + ushort chan; + int idx; + + cp = pquicc; + + idx = PORT_NUM(info->state->smc_scc_num); + if (info->state->smc_scc_num & NUM_IS_SCC) + chan = scc_chan_map[idx]; + else + chan = smc_chan_map[idx]; + + cp->cp_cr = mk_cr_cmd(chan, CPM_CR_STOP_TX) | CPM_CR_FLG; + while (cp->cp_cr & CPM_CR_FLG); +} + +static void end_break(ser_info_t *info) +{ + volatile QUICC *cp; + ushort chan; + int idx; + + cp = pquicc; + + idx = PORT_NUM(info->state->smc_scc_num); + if (info->state->smc_scc_num & NUM_IS_SCC) + chan = scc_chan_map[idx]; + else + chan = smc_chan_map[idx]; + + cp->cp_cr = mk_cr_cmd(chan, CPM_CR_RESTART_TX) | CPM_CR_FLG; + while (cp->cp_cr & CPM_CR_FLG); +} + +/* + * This routine sends a break character out the serial port. + */ +static void send_break(ser_info_t *info, int duration) +{ + current->state = TASK_INTERRUPTIBLE; +#ifdef SERIAL_DEBUG_SEND_BREAK + printk("rs_send_break(%d) jiff=%lu...", duration, jiffies); +#endif + begin_break(info); + schedule_timeout(duration); + end_break(info); +#ifdef SERIAL_DEBUG_SEND_BREAK + printk("done jiffies=%lu\n", jiffies); +#endif +} + + +static int rs_360_ioctl(struct tty_struct *tty, struct file * file, + unsigned int cmd, unsigned long arg) +{ + int error; + ser_info_t *info = (ser_info_t *)tty->driver_data; + int retval; + struct async_icount cnow; + /* struct async_icount_24 cnow;*/ /* kernel counter temps */ + struct serial_icounter_struct *p_cuser; /* user space */ + + if (serial_paranoia_check(info, tty->device, "rs_ioctl")) + return -ENODEV; + + if ((cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) { + if (tty->flags & (1 << TTY_IO_ERROR)) + return -EIO; + } + + switch (cmd) { + case TCSBRK: /* SVID version: non-zero arg --> no break */ + retval = tty_check_change(tty); + if (retval) + return retval; + tty_wait_until_sent(tty, 0); + if (signal_pending(current)) + return -EINTR; + if (!arg) { + send_break(info, HZ/4); /* 1/4 second */ + if (signal_pending(current)) + return -EINTR; + } + return 0; + case TCSBRKP: /* support for POSIX tcsendbreak() */ + retval = tty_check_change(tty); + if (retval) + return retval; + tty_wait_until_sent(tty, 0); + if (signal_pending(current)) + return -EINTR; + send_break(info, arg ? arg*(HZ/10) : HZ/4); + if (signal_pending(current)) + return -EINTR; + return 0; + case TIOCSBRK: + retval = tty_check_change(tty); + if (retval) + return retval; + tty_wait_until_sent(tty, 0); + begin_break(info); + return 0; + case TIOCCBRK: + retval = tty_check_change(tty); + if (retval) + return retval; + end_break(info); + return 0; + case TIOCGSOFTCAR: + /* return put_user(C_CLOCAL(tty) ? 1 : 0, (int *) arg); */ + put_user(C_CLOCAL(tty) ? 1 : 0, (int *) arg); + return 0; + case TIOCSSOFTCAR: + error = get_user(arg, (unsigned int *) arg); + if (error) + return error; + tty->termios->c_cflag = + ((tty->termios->c_cflag & ~CLOCAL) | + (arg ? CLOCAL : 0)); + return 0; + case TIOCMGET: + return get_modem_info(info, (unsigned int *) arg); + case TIOCMBIS: + case TIOCMBIC: + case TIOCMSET: + return set_modem_info(info, cmd, (unsigned int *) arg); +#ifdef maybe + case TIOCSERGETLSR: /* Get line status register */ + return get_lsr_info(info, (unsigned int *) arg); +#endif + /* + * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change + * - mask passed in arg for lines of interest + * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking) + * Caller should use TIOCGICOUNT to see which one it was + */ + case TIOCMIWAIT: +#ifdef modem_control + cli(); + /* note the counters on entry */ + cprev = info->state->icount; + sti(); + while (1) { + interruptible_sleep_on(&info->delta_msr_wait); + /* see if a signal did it */ + if (signal_pending(current)) + return -ERESTARTSYS; + cli(); + cnow = info->state->icount; /* atomic copy */ + sti(); + if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr && + cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) + return -EIO; /* no change => error */ + if ( ((arg & TIOCM_RNG) && (cnow.rng != cprev.rng)) || + ((arg & TIOCM_DSR) && (cnow.dsr != cprev.dsr)) || + ((arg & TIOCM_CD) && (cnow.dcd != cprev.dcd)) || + ((arg & TIOCM_CTS) && (cnow.cts != cprev.cts)) ) { + return 0; + } + cprev = cnow; + } + /* NOTREACHED */ +#else + return 0; +#endif + + /* + * Get counter of input serial line interrupts (DCD,RI,DSR,CTS) + * Return: write counters to the user passed counter struct + * NB: both 1->0 and 0->1 transitions are counted except for + * RI where only 0->1 is counted. + */ + case TIOCGICOUNT: + cli(); + cnow = info->state->icount; + sti(); + p_cuser = (struct serial_icounter_struct *) arg; +/* error = put_user(cnow.cts, &p_cuser->cts); */ +/* if (error) return error; */ +/* error = put_user(cnow.dsr, &p_cuser->dsr); */ +/* if (error) return error; */ +/* error = put_user(cnow.rng, &p_cuser->rng); */ +/* if (error) return error; */ +/* error = put_user(cnow.dcd, &p_cuser->dcd); */ +/* if (error) return error; */ + + put_user(cnow.cts, &p_cuser->cts); + put_user(cnow.dsr, &p_cuser->dsr); + put_user(cnow.rng, &p_cuser->rng); + put_user(cnow.dcd, &p_cuser->dcd); + return 0; + + default: + return -ENOIOCTLCMD; + } + return 0; +} + +/* FIX UP modem control here someday...... +*/ +static void rs_360_set_termios(struct tty_struct *tty, struct termios *old_termios) +{ + ser_info_t *info = (ser_info_t *)tty->driver_data; + + if ( (tty->termios->c_cflag == old_termios->c_cflag) + && ( RELEVANT_IFLAG(tty->termios->c_iflag) + == RELEVANT_IFLAG(old_termios->c_iflag))) + return; + + change_speed(info); + +#ifdef modem_control + /* Handle transition to B0 status */ + if ((old_termios->c_cflag & CBAUD) && + !(tty->termios->c_cflag & CBAUD)) { + info->MCR &= ~(UART_MCR_DTR|UART_MCR_RTS); + cli(); + serial_out(info, UART_MCR, info->MCR); + sti(); + } + + /* Handle transition away from B0 status */ + if (!(old_termios->c_cflag & CBAUD) && + (tty->termios->c_cflag & CBAUD)) { + info->MCR |= UART_MCR_DTR; + if (!tty->hw_stopped || + !(tty->termios->c_cflag & CRTSCTS)) { + info->MCR |= UART_MCR_RTS; + } + cli(); + serial_out(info, UART_MCR, info->MCR); + sti(); + } + + /* Handle turning off CRTSCTS */ + if ((old_termios->c_cflag & CRTSCTS) && + !(tty->termios->c_cflag & CRTSCTS)) { + tty->hw_stopped = 0; + rs_360_start(tty); + } +#endif + +#if 0 + /* + * No need to wake up processes in open wait, since they + * sample the CLOCAL flag once, and don't recheck it. + * XXX It's not clear whether the current behavior is correct + * or not. Hence, this may change..... + */ + if (!(old_termios->c_cflag & CLOCAL) && + (tty->termios->c_cflag & CLOCAL)) + wake_up_interruptible(&info->open_wait); +#endif +} + +/* + * ------------------------------------------------------------ + * rs_close() + * + * This routine is called when the serial port gets closed. First, we + * wait for the last remaining data to be sent. Then, we unlink its + * async structure from the interrupt chain if necessary, and we free + * that IRQ if nothing is left in the chain. + * ------------------------------------------------------------ + */ +static void rs_360_close(struct tty_struct *tty, struct file * filp) +{ + ser_info_t *info = (ser_info_t *)tty->driver_data; + /* struct async_state *state; */ + struct serial_state *state; + unsigned long flags; + int idx; + volatile struct smc_regs *smcp; + volatile struct scc_regs *sccp; + + if (!info || serial_paranoia_check(info, tty->device, "rs_close")) + return; + + state = info->state; + + save_flags(flags); cli(); + + if (tty_hung_up_p(filp)) { + DBG_CNT("before DEC-hung"); + MOD_DEC_USE_COUNT; + restore_flags(flags); + return; + } + +#ifdef SERIAL_DEBUG_OPEN + printk("rs_close ttys%d, count = %d\n", info->line, state->count); +#endif + if ((tty->count == 1) && (state->count != 1)) { + /* + * Uh, oh. tty->count is 1, which means that the tty + * structure will be freed. state->count should always + * be one in these conditions. If it's greater than + * one, we've got real problems, since it means the + * serial port won't be shutdown. + */ + printk("rs_close: bad serial port count; tty->count is 1, " + "state->count is %d\n", state->count); + state->count = 1; + } + if (--state->count < 0) { + printk("rs_close: bad serial port count for ttys%d: %d\n", + info->line, state->count); + state->count = 0; + } + if (state->count) { + DBG_CNT("before DEC-2"); + MOD_DEC_USE_COUNT; + restore_flags(flags); + return; + } + info->flags |= ASYNC_CLOSING; + /* + * Save the termios structure, since this port may have + * separate termios for callout and dialin. + */ + if (info->flags & ASYNC_NORMAL_ACTIVE) + info->state->normal_termios = *tty->termios; + if (info->flags & ASYNC_CALLOUT_ACTIVE) + info->state->callout_termios = *tty->termios; + /* + * Now we wait for the transmit buffer to clear; and we notify + * the line discipline to only process XON/XOFF characters. + */ + tty->closing = 1; + if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE) + tty_wait_until_sent(tty, info->closing_wait); + /* + * At this point we stop accepting input. To do this, we + * disable the receive line status interrupts, and tell the + * interrupt driver to stop checking the data ready bit in the + * line status register. + */ + info->read_status_mask &= ~BD_SC_EMPTY; + if (info->flags & ASYNC_INITIALIZED) { + + idx = PORT_NUM(info->state->smc_scc_num); + if (info->state->smc_scc_num & NUM_IS_SCC) { + sccp = &pquicc->scc_regs[idx]; + sccp->scc_sccm &= ~UART_SCCM_RX; + sccp->scc_gsmr.w.low &= ~SCC_GSMRL_ENR; + } else { + smcp = &pquicc->smc_regs[idx]; + smcp->smc_smcm &= ~SMCM_RX; + smcp->smc_smcmr &= ~SMCMR_REN; + } + /* + * Before we drop DTR, make sure the UART transmitter + * has completely drained; this is especially + * important if there is a transmit FIFO! + */ + rs_360_wait_until_sent(tty, info->timeout); + } + shutdown(info); + if (tty->driver.flush_buffer) + tty->driver.flush_buffer(tty); + if (tty->ldisc.flush_buffer) + tty->ldisc.flush_buffer(tty); + tty->closing = 0; + info->event = 0; + info->tty = 0; + if (info->blocked_open) { + if (info->close_delay) { + current->state = TASK_INTERRUPTIBLE; + schedule_timeout(info->close_delay); + } + wake_up_interruptible(&info->open_wait); + } + info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CALLOUT_ACTIVE| + ASYNC_CLOSING); + wake_up_interruptible(&info->close_wait); + MOD_DEC_USE_COUNT; + restore_flags(flags); +} + +/* + * rs_wait_until_sent() --- wait until the transmitter is empty + */ +static void rs_360_wait_until_sent(struct tty_struct *tty, int timeout) +{ + ser_info_t *info = (ser_info_t *)tty->driver_data; + unsigned long orig_jiffies, char_time; + /*int lsr;*/ + volatile QUICC_BD *bdp; + + if (serial_paranoia_check(info, tty->device, "rs_wait_until_sent")) + return; + +#ifdef maybe + if (info->state->type == PORT_UNKNOWN) + return; +#endif + + orig_jiffies = jiffies; + /* + * Set the check interval to be 1/5 of the estimated time to + * send a single character, and make it at least 1. The check + * interval should also be less than the timeout. + * + * Note: we have to use pretty tight timings here to satisfy + * the NIST-PCTS. + */ + char_time = 1; + if (timeout) + char_time = MIN(char_time, timeout); +#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT + printk("In rs_wait_until_sent(%d) check=%lu...", timeout, char_time); + printk("jiff=%lu...", jiffies); +#endif + + /* We go through the loop at least once because we can't tell + * exactly when the last character exits the shifter. There can + * be at least two characters waiting to be sent after the buffers + * are empty. + */ + do { +#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT + printk("lsr = %d (jiff=%lu)...", lsr, jiffies); +#endif + current->state = TASK_INTERRUPTIBLE; +/* current->counter = 0; make us low-priority */ + schedule_timeout(char_time); + if (signal_pending(current)) + break; + if (timeout && ((orig_jiffies + timeout) < jiffies)) + break; + /* The 'tx_cur' is really the next buffer to send. We + * have to back up to the previous BD and wait for it + * to go. This isn't perfect, because all this indicates + * is the buffer is available. There are still characters + * in the CPM FIFO. + */ + bdp = info->tx_cur; + if (bdp == info->tx_bd_base) + bdp += (TX_NUM_FIFO-1); + else + bdp--; + } while (bdp->status & BD_SC_READY); + current->state = TASK_RUNNING; +#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT + printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies); +#endif +} + +/* + * rs_hangup() --- called by tty_hangup() when a hangup is signaled. + */ +static void rs_360_hangup(struct tty_struct *tty) +{ + ser_info_t *info = (ser_info_t *)tty->driver_data; + struct serial_state *state = info->state; + + if (serial_paranoia_check(info, tty->device, "rs_hangup")) + return; + + state = info->state; + + rs_360_flush_buffer(tty); + shutdown(info); + info->event = 0; + state->count = 0; + info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CALLOUT_ACTIVE); + info->tty = 0; + wake_up_interruptible(&info->open_wait); +} + +/* + * ------------------------------------------------------------ + * rs_open() and friends + * ------------------------------------------------------------ + */ +static int block_til_ready(struct tty_struct *tty, struct file * filp, + ser_info_t *info) +{ +#ifdef DO_THIS_LATER + DECLARE_WAITQUEUE(wait, current); +#endif + struct serial_state *state = info->state; + int retval; + int do_clocal = 0; + + /* + * If the device is in the middle of being closed, then block + * until it's done, and then try again. + */ + if (tty_hung_up_p(filp) || + (info->flags & ASYNC_CLOSING)) { + if (info->flags & ASYNC_CLOSING) + interruptible_sleep_on(&info->close_wait); +#ifdef SERIAL_DO_RESTART + if (info->flags & ASYNC_HUP_NOTIFY) + return -EAGAIN; + else + return -ERESTARTSYS; +#else + return -EAGAIN; +#endif + } + + +#if 0 /* FIXME */ + /* + * If this is a callout device, then just make sure the normal + * device isn't being used. + */ + if (tty->driver.subtype == SERIAL_TYPE_CALLOUT) { + if (info->flags & ASYNC_NORMAL_ACTIVE) + return -EBUSY; + if ((info->flags & ASYNC_CALLOUT_ACTIVE) && + (info->flags & ASYNC_SESSION_LOCKOUT) && + (info->session != current->session)) + return -EBUSY; + if ((info->flags & ASYNC_CALLOUT_ACTIVE) && + (info->flags & ASYNC_PGRP_LOCKOUT) && + (info->pgrp != current->pgrp)) + return -EBUSY; + info->flags |= ASYNC_CALLOUT_ACTIVE; + return 0; + } +#endif + + /* + * If non-blocking mode is set, or the port is not enabled, + * then make the check up front and then exit. + * If this is an SMC port, we don't have modem control to wait + * for, so just get out here. + */ + if ((filp->f_flags & O_NONBLOCK) || + (tty->flags & (1 << TTY_IO_ERROR)) || + !(info->state->smc_scc_num & NUM_IS_SCC)) { + if (info->flags & ASYNC_CALLOUT_ACTIVE) + return -EBUSY; + info->flags |= ASYNC_NORMAL_ACTIVE; + return 0; + } + + if (info->flags & ASYNC_CALLOUT_ACTIVE) { + if (state->normal_termios.c_cflag & CLOCAL) + do_clocal = 1; + } else { + if (tty->termios->c_cflag & CLOCAL) + do_clocal = 1; + } + + /* + * Block waiting for the carrier detect and the line to become + * free (i.e., not in use by the callout). While we are in + * this loop, state->count is dropped by one, so that + * rs_close() knows when to free things. We restore it upon + * exit, either normal or abnormal. + */ + retval = 0; +#ifdef DO_THIS_LATER + add_wait_queue(&info->open_wait, &wait); +#ifdef SERIAL_DEBUG_OPEN + printk("block_til_ready before block: ttys%d, count = %d\n", + state->line, state->count); +#endif + cli(); + if (!tty_hung_up_p(filp)) + state->count--; + sti(); + info->blocked_open++; + while (1) { + cli(); + if (!(info->flags & ASYNC_CALLOUT_ACTIVE) && + (tty->termios->c_cflag & CBAUD)) + serial_out(info, UART_MCR, + serial_inp(info, UART_MCR) | + (UART_MCR_DTR | UART_MCR_RTS)); + sti(); + set_current_state(TASK_INTERRUPTIBLE); + if (tty_hung_up_p(filp) || + !(info->flags & ASYNC_INITIALIZED)) { +#ifdef SERIAL_DO_RESTART + if (info->flags & ASYNC_HUP_NOTIFY) + retval = -EAGAIN; + else + retval = -ERESTARTSYS; +#else + retval = -EAGAIN; +#endif + break; + } + if (!(info->flags & ASYNC_CALLOUT_ACTIVE) && + !(info->flags & ASYNC_CLOSING) && + (do_clocal || (serial_in(info, UART_MSR) & + UART_MSR_DCD))) + break; + if (signal_pending(current)) { + retval = -ERESTARTSYS; + break; + } +#ifdef SERIAL_DEBUG_OPEN + printk("block_til_ready blocking: ttys%d, count = %d\n", + info->line, state->count); +#endif + schedule(); + } + current->state = TASK_RUNNING; + remove_wait_queue(&info->open_wait, &wait); + if (!tty_hung_up_p(filp)) + state->count++; + info->blocked_open--; +#ifdef SERIAL_DEBUG_OPEN + printk("block_til_ready after blocking: ttys%d, count = %d\n", + info->line, state->count); +#endif +#endif /* DO_THIS_LATER */ + if (retval) + return retval; + info->flags |= ASYNC_NORMAL_ACTIVE; + return 0; +} + +static int get_async_struct(int line, ser_info_t **ret_info) +{ + struct serial_state *sstate; + + sstate = rs_table + line; + if (sstate->info) { + sstate->count++; + *ret_info = (ser_info_t *)sstate->info; + return 0; + } + else { + return -ENOMEM; + } +} + +/* + * This routine is called whenever a serial port is opened. It + * enables interrupts for a serial port, linking in its async structure into + * the IRQ chain. It also performs the serial-specific + * initialization for the tty structure. + */ +static int rs_360_open(struct tty_struct *tty, struct file * filp) +{ + ser_info_t *info; + int retval, line; + + line = MINOR(tty->device) - tty->driver.minor_start; + if ((line < 0) || (line >= NR_PORTS)) + return -ENODEV; + retval = get_async_struct(line, &info); + if (retval) + return retval; + if (serial_paranoia_check(info, tty->device, "rs_open")) + return -ENODEV; + +#ifdef SERIAL_DEBUG_OPEN + printk("rs_open %s%d, count = %d\n", tty->driver.name, info->line, + info->state->count); +#endif + tty->driver_data = info; + info->tty = tty; + + /* + * Start up serial port + */ + retval = startup(info); + if (retval) + return retval; + + MOD_INC_USE_COUNT; + retval = block_til_ready(tty, filp, info); + if (retval) { +#ifdef SERIAL_DEBUG_OPEN + printk("rs_open returning after block_til_ready with %d\n", + retval); +#endif + MOD_DEC_USE_COUNT; + return retval; + } + + if ((info->state->count == 1) && + (info->flags & ASYNC_SPLIT_TERMIOS)) { + if (tty->driver.subtype == SERIAL_TYPE_NORMAL) + *tty->termios = info->state->normal_termios; + else + *tty->termios = info->state->callout_termios; + change_speed(info); + } + + info->session = current->session; + info->pgrp = current->pgrp; + +#ifdef SERIAL_DEBUG_OPEN + printk("rs_open ttys%d successful...", info->line); +#endif + return 0; +} + +/* + * /proc fs routines.... + */ + +static int inline line_info(char *buf, struct serial_state *state) +{ +#ifdef notdef + struct async_struct *info = state->info, scr_info; + char stat_buf[30], control, status; +#endif + int ret; + + ret = sprintf(buf, "%d: uart:%s port:%X irq:%d", + state->line, + (state->smc_scc_num & NUM_IS_SCC) ? "SCC" : "SMC", + (unsigned int)(state->port), state->irq); + + if (!state->port || (state->type == PORT_UNKNOWN)) { + ret += sprintf(buf+ret, "\n"); + return ret; + } + +#ifdef notdef + /* + * Figure out the current RS-232 lines + */ + if (!info) { + info = &scr_info; /* This is just for serial_{in,out} */ + + info->magic = SERIAL_MAGIC; + info->port = state->port; + info->flags = state->flags; + info->quot = 0; + info->tty = 0; + } + cli(); + status = serial_in(info, UART_MSR); + control = info ? info->MCR : serial_in(info, UART_MCR); + sti(); + + stat_buf[0] = 0; + stat_buf[1] = 0; + if (control & UART_MCR_RTS) + strcat(stat_buf, "|RTS"); + if (status & UART_MSR_CTS) + strcat(stat_buf, "|CTS"); + if (control & UART_MCR_DTR) + strcat(stat_buf, "|DTR"); + if (status & UART_MSR_DSR) + strcat(stat_buf, "|DSR"); + if (status & UART_MSR_DCD) + strcat(stat_buf, "|CD"); + if (status & UART_MSR_RI) + strcat(stat_buf, "|RI"); + + if (info->quot) { + ret += sprintf(buf+ret, " baud:%d", + state->baud_base / info->quot); + } + + ret += sprintf(buf+ret, " tx:%d rx:%d", + state->icount.tx, state->icount.rx); + + if (state->icount.frame) + ret += sprintf(buf+ret, " fe:%d", state->icount.frame); + + if (state->icount.parity) + ret += sprintf(buf+ret, " pe:%d", state->icount.parity); + + if (state->icount.brk) + ret += sprintf(buf+ret, " brk:%d", state->icount.brk); + + if (state->icount.overrun) + ret += sprintf(buf+ret, " oe:%d", state->icount.overrun); + + /* + * Last thing is the RS-232 status lines + */ + ret += sprintf(buf+ret, " %s\n", stat_buf+1); +#endif + return ret; +} + +int rs_360_read_proc(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + int i, len = 0; + off_t begin = 0; + + len += sprintf(page, "serinfo:1.0 driver:%s\n", serial_version); + for (i = 0; i < NR_PORTS && len < 4000; i++) { + len += line_info(page + len, &rs_table[i]); + if (len+begin > off+count) + goto done; + if (len+begin < off) { + begin += len; + len = 0; + } + } + *eof = 1; +done: + if (off >= len+begin) + return 0; + *start = page + (begin-off); + return ((count < begin+len-off) ? count : begin+len-off); +} + +/* + * --------------------------------------------------------------------- + * rs_init() and friends + * + * rs_init() is called at boot-time to initialize the serial driver. + * --------------------------------------------------------------------- + */ + +/* + * This routine prints out the appropriate serial driver version + * number, and identifies which options were configured into this + * driver. + */ +static _INLINE_ void show_serial_version(void) +{ + printk(KERN_INFO "%s version %s\n", serial_name, serial_version); +} + + +/* + * The serial console driver used during boot. Note that these names + * clash with those found in "serial.c", so we currently can't support + * the 16xxx uarts and these at the same time. I will fix this to become + * an indirect function call from tty_io.c (or something). + */ + +#ifdef CONFIG_SERIAL_CONSOLE + +/* + * Print a string to the serial port trying not to disturb any possible + * real use of the port... + */ +static void my_console_write(int idx, const char *s, + unsigned count) +{ + struct serial_state *ser; + ser_info_t *info; + unsigned i; + QUICC_BD *bdp, *bdbase; + volatile struct smc_uart_pram *up; + volatile u_char *cp; + + ser = rs_table + idx; + + + /* If the port has been initialized for general use, we have + * to use the buffer descriptors allocated there. Otherwise, + * we simply use the single buffer allocated. + */ + if ((info = (ser_info_t *)ser->info) != NULL) { + bdp = info->tx_cur; + bdbase = info->tx_bd_base; + } + else { + /* Pointer to UART in parameter ram. + */ + /* up = (smc_uart_t *)&cpmp->cp_dparam[ser->port]; */ + up = &pquicc->pram[ser->port].scc.pothers.idma_smc.psmc.u; + + /* Get the address of the host memory buffer. + */ + bdp = bdbase = (QUICC_BD *)((uint)pquicc + (uint)up->tbase); + } + + /* + * We need to gracefully shut down the transmitter, disable + * interrupts, then send our bytes out. + */ + + /* + * Now, do each character. This is not as bad as it looks + * since this is a holding FIFO and not a transmitting FIFO. + * We could add the complexity of filling the entire transmit + * buffer, but we would just wait longer between accesses...... + */ + for (i = 0; i < count; i++, s++) { + /* Wait for transmitter fifo to empty. + * Ready indicates output is ready, and xmt is doing + * that, not that it is ready for us to send. + */ + while (bdp->status & BD_SC_READY); + + /* Send the character out. + */ + cp = bdp->buf; + *cp = *s; + + bdp->length = 1; + bdp->status |= BD_SC_READY; + + if (bdp->status & BD_SC_WRAP) + bdp = bdbase; + else + bdp++; + + /* if a LF, also do CR... */ + if (*s == 10) { + while (bdp->status & BD_SC_READY); + /* cp = __va(bdp->buf); */ + cp = bdp->buf; + *cp = 13; + bdp->length = 1; + bdp->status |= BD_SC_READY; + + if (bdp->status & BD_SC_WRAP) { + bdp = bdbase; + } + else { + bdp++; + } + } + } + + /* + * Finally, Wait for transmitter & holding register to empty + * and restore the IER + */ + while (bdp->status & BD_SC_READY); + + if (info) + info->tx_cur = (QUICC_BD *)bdp; +} + +static void serial_console_write(struct console *c, const char *s, + unsigned count) +{ +#ifdef CONFIG_KGDB + /* Try to let stub handle output. Returns true if it did. */ + if (kgdb_output_string(s, count)) + return; +#endif + my_console_write(c->index, s, count); +} + + + +/*void console_print_68360(const char *p) +{ + const char *cp = p; + int i; + + for (i=0;cp[i]!=0;i++); + + serial_console_write (p, i); + + //Comment this if you want to have a strict interrupt-driven output + //rs_fair_output(); + + return; +}*/ + + + + + + +#ifdef CONFIG_XMON +int +xmon_360_write(const char *s, unsigned count) +{ + my_console_write(0, s, count); + return(count); +} +#endif + +#ifdef CONFIG_KGDB +void +putDebugChar(char ch) +{ + my_console_write(0, &ch, 1); +} +#endif + +/* + * Receive character from the serial port. This only works well + * before the port is initialized for real use. + */ +static int my_console_wait_key(int idx, int xmon, char *obuf) +{ + struct serial_state *ser; + u_char c, *cp; + ser_info_t *info; + QUICC_BD *bdp; + volatile struct smc_uart_pram *up; + int i; + + ser = rs_table + idx; + + /* Get the address of the host memory buffer. + * If the port has been initialized for general use, we must + * use information from the port structure. + */ + if ((info = (ser_info_t *)ser->info)) + bdp = info->rx_cur; + else + /* bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_rbase]; */ + bdp = (QUICC_BD *)((uint)pquicc + (uint)up->tbase); + + /* Pointer to UART in parameter ram. + */ + /* up = (smc_uart_t *)&cpmp->cp_dparam[ser->port]; */ + up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u; + + /* + * We need to gracefully shut down the receiver, disable + * interrupts, then read the input. + * XMON just wants a poll. If no character, return -1, else + * return the character. + */ + if (!xmon) { + while (bdp->status & BD_SC_EMPTY); + } + else { + if (bdp->status & BD_SC_EMPTY) + return -1; + } + + cp = (char *)bdp->buf; + + if (obuf) { + i = c = bdp->length; + while (i-- > 0) + *obuf++ = *cp++; + } + else { + c = *cp; + } + bdp->status |= BD_SC_EMPTY; + + if (info) { + if (bdp->status & BD_SC_WRAP) { + bdp = info->rx_bd_base; + } + else { + bdp++; + } + info->rx_cur = (QUICC_BD *)bdp; + } + + return((int)c); +} + +static int serial_console_wait_key(struct console *co) +{ + return(my_console_wait_key(co->index, 0, NULL)); +} + +#ifdef CONFIG_XMON +int +xmon_360_read_poll(void) +{ + return(my_console_wait_key(0, 1, NULL)); +} + +int +xmon_360_read_char(void) +{ + return(my_console_wait_key(0, 0, NULL)); +} +#endif + +#ifdef CONFIG_KGDB +static char kgdb_buf[RX_BUF_SIZE], *kgdp; +static int kgdb_chars; + +unsigned char +getDebugChar(void) +{ + if (kgdb_chars <= 0) { + kgdb_chars = my_console_wait_key(0, 0, kgdb_buf); + kgdp = kgdb_buf; + } + kgdb_chars--; + + return(*kgdp++); +} + +void kgdb_interruptible(int state) +{ +} +void kgdb_map_scc(void) +{ + struct serial_state *ser; + uint mem_addr; + volatile QUICC_BD *bdp; + volatile smc_uart_t *up; + + cpmp = (cpm360_t *)&(((immap_t *)IMAP_ADDR)->im_cpm); + + /* To avoid data cache CPM DMA coherency problems, allocate a + * buffer in the CPM DPRAM. This will work until the CPM and + * serial ports are initialized. At that time a memory buffer + * will be allocated. + * The port is already initialized from the boot procedure, all + * we do here is give it a different buffer and make it a FIFO. + */ + + ser = rs_table; + + /* Right now, assume we are using SMCs. + */ + up = (smc_uart_t *)&cpmp->cp_dparam[ser->port]; + + /* Allocate space for an input FIFO, plus a few bytes for output. + * Allocate bytes to maintain word alignment. + */ + mem_addr = (uint)(&cpmp->cp_dpmem[0x1000]); + + /* Set the physical address of the host memory buffers in + * the buffer descriptors. + */ + bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_rbase]; + bdp->buf = mem_addr; + + bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_tbase]; + bdp->buf = mem_addr+RX_BUF_SIZE; + + up->smc_mrblr = RX_BUF_SIZE; /* receive buffer length */ + up->smc_maxidl = RX_BUF_SIZE; +} +#endif + +static kdev_t serial_console_device(struct console *c) +{ + return MKDEV(TTY_MAJOR, 64 + c->index); +} + + +struct console sercons = { + name: "ttyS", + write: serial_console_write, + device: serial_console_device, + wait_key: serial_console_wait_key, + setup: serial_console_setup, + flags: CON_PRINTBUFFER, + index: CONFIG_SERIAL_CONSOLE_PORT, +}; + + + +/* + * Register console. + */ +long console_360_init(long kmem_start, long kmem_end) +{ + register_console(&sercons); + /*register_console (console_print_68360); - 2.0.38 only required a write + function pointer. */ + return kmem_start; +} + +#endif + +/* Index in baud rate table of the default console baud rate. +*/ +static int baud_idx; + + +/* int __init rs_360_init(void) */ +int rs_360_init(void) +{ + struct serial_state * state; + ser_info_t *info; + void *mem_addr; + uint dp_addr, iobits; + int i, j, idx; + ushort chan; + QUICC_BD *bdp; + volatile QUICC *cp; + volatile struct smc_regs *sp; + volatile struct smc_uart_pram *up; + volatile struct scc_regs *scp; + volatile struct uart_pram *sup; + /* volatile immap_t *immap; */ + + init_bh(SERIAL_BH, do_serial_bh); + + show_serial_version(); + + /* Initialize the tty_driver structure */ + + /* __clear_user(&serial_driver,sizeof(struct tty_driver)); */ + memset(&serial_driver, 0, sizeof(struct tty_driver)); + + serial_driver.magic = TTY_DRIVER_MAGIC; + /* serial_driver.driver_name = "serial"; */ + serial_driver.name = "ttyS"; + serial_driver.major = TTY_MAJOR; + serial_driver.minor_start = 64; + serial_driver.num = NR_PORTS; + serial_driver.type = TTY_DRIVER_TYPE_SERIAL; + serial_driver.subtype = SERIAL_TYPE_NORMAL; + serial_driver.init_termios = tty_std_termios; + serial_driver.init_termios.c_cflag = + baud_idx | CS8 | CREAD | HUPCL | CLOCAL; + serial_driver.flags = TTY_DRIVER_REAL_RAW; + serial_driver.refcount = &serial_refcount; + serial_driver.table = serial_table; + serial_driver.termios = serial_termios; + serial_driver.termios_locked = serial_termios_locked; + + serial_driver.open = rs_360_open; + serial_driver.close = rs_360_close; + serial_driver.write = rs_360_write; + serial_driver.put_char = rs_360_put_char; + serial_driver.write_room = rs_360_write_room; + serial_driver.chars_in_buffer = rs_360_chars_in_buffer; + serial_driver.flush_buffer = rs_360_flush_buffer; + serial_driver.ioctl = rs_360_ioctl; + serial_driver.throttle = rs_360_throttle; + serial_driver.unthrottle = rs_360_unthrottle; + /* serial_driver.send_xchar = rs_360_send_xchar; */ + serial_driver.set_termios = rs_360_set_termios; + serial_driver.stop = rs_360_stop; + serial_driver.start = rs_360_start; + serial_driver.hangup = rs_360_hangup; + /* serial_driver.wait_until_sent = rs_360_wait_until_sent; */ + /* serial_driver.read_proc = rs_360_read_proc; */ + + /* + * The callout device is just like normal device except for + * major number and the subtype code. + */ + callout_driver = serial_driver; + callout_driver.name = "cua"; + callout_driver.major = TTYAUX_MAJOR; + callout_driver.subtype = SERIAL_TYPE_CALLOUT; + /* callout_driver.read_proc = 0; */ + /* callout_driver.proc_entry = 0; */ + + if (tty_register_driver(&serial_driver)) + panic("Couldn't register serial driver\n"); + if (tty_register_driver(&callout_driver)) + panic("Couldn't register callout driver\n"); + + cp = pquicc; /* Get pointer to Communication Processor */ + /* immap = (immap_t *)IMAP_ADDR; */ /* and to internal registers */ + + + /* Configure SCC2, SCC3, and SCC4 instead of port A parallel I/O. + */ + /* The "standard" configuration through the 860. + */ +/* immap->im_ioport.iop_papar |= 0x00fc; */ +/* immap->im_ioport.iop_padir &= ~0x00fc; */ +/* immap->im_ioport.iop_paodr &= ~0x00fc; */ + cp->pio_papar |= 0x00fc; + cp->pio_padir &= ~0x00fc; + /* cp->pio_paodr &= ~0x00fc; */ + + + /* Since we don't yet do modem control, connect the port C pins + * as general purpose I/O. This will assert CTS and CD for the + * SCC ports. + */ + /* FIXME: see 360um p.7-365 and 860um p.34-12 + * I can't make sense of these bits - mleslie*/ +/* immap->im_ioport.iop_pcdir |= 0x03c6; */ +/* immap->im_ioport.iop_pcpar &= ~0x03c6; */ + +/* cp->pio_pcdir |= 0x03c6; */ +/* cp->pio_pcpar &= ~0x03c6; */ + + + + /* Connect SCC2 and SCC3 to NMSI. Connect BRG3 to SCC2 and + * BRG4 to SCC3. + */ + cp->si_sicr &= ~0x00ffff00; + cp->si_sicr |= 0x001b1200; + +#ifdef CONFIG_PP04 + /* Frequentis PP04 forced to RS-232 until we know better. + * Port C 12 and 13 low enables RS-232 on SCC3 and SCC4. + */ + immap->im_ioport.iop_pcdir |= 0x000c; + immap->im_ioport.iop_pcpar &= ~0x000c; + immap->im_ioport.iop_pcdat &= ~0x000c; + + /* This enables the TX driver. + */ + cp->cp_pbpar &= ~0x6000; + cp->cp_pbdat &= ~0x6000; +#endif + + for (i = 0, state = rs_table; i < NR_PORTS; i++,state++) { + state->magic = SSTATE_MAGIC; + state->line = i; + state->type = PORT_UNKNOWN; + state->custom_divisor = 0; + state->close_delay = 5*HZ/10; + state->closing_wait = 30*HZ; + state->callout_termios = callout_driver.init_termios; + state->normal_termios = serial_driver.init_termios; + state->icount.cts = state->icount.dsr = + state->icount.rng = state->icount.dcd = 0; + state->icount.rx = state->icount.tx = 0; + state->icount.frame = state->icount.parity = 0; + state->icount.overrun = state->icount.brk = 0; + printk(KERN_INFO "ttyS%02d at irq 0x%02x is an %s\n", + i, (unsigned int)(state->irq), + (state->smc_scc_num & NUM_IS_SCC) ? "SCC" : "SMC"); + +#ifdef CONFIG_SERIAL_CONSOLE + /* If we just printed the message on the console port, and + * we are about to initialize it for general use, we have + * to wait a couple of character times for the CR/NL to + * make it out of the transmit buffer. + */ + if (i == CONFIG_SERIAL_CONSOLE_PORT) + mdelay(8); + + +/* idx = PORT_NUM(info->state->smc_scc_num); */ +/* if (info->state->smc_scc_num & NUM_IS_SCC) */ +/* chan = scc_chan_map[idx]; */ +/* else */ +/* chan = smc_chan_map[idx]; */ + +/* cp->cp_cr = mk_cr_cmd(chan, CPM_CR_STOP_TX) | CPM_CR_FLG; */ +/* while (cp->cp_cr & CPM_CR_FLG); */ + +#endif + /* info = kmalloc(sizeof(ser_info_t), GFP_KERNEL); */ + info = &quicc_ser_info[i]; + if (info) { + /* __clear_user(info,sizeof(ser_info_t)); */ + memset (info, 0, sizeof(ser_info_t)); + init_waitqueue_head(&info->open_wait); + init_waitqueue_head(&info->close_wait); + info->magic = SERIAL_MAGIC; + info->flags = state->flags; + info->tqueue.routine = do_softint; + info->tqueue.data = info; + info->tqueue_hangup.routine = do_serial_hangup; + info->tqueue_hangup.data = info; + info->line = i; + info->state = state; + state->info = (struct async_struct *)info; + + /* We need to allocate a transmit and receive buffer + * descriptors from dual port ram, and a character + * buffer area from host mem. + */ + dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * RX_NUM_FIFO); + + /* Allocate space for FIFOs in the host memory. + * (for now this is from a static array of buffers :( + */ + /* mem_addr = m360_cpm_hostalloc(RX_NUM_FIFO * RX_BUF_SIZE); */ + /* mem_addr = kmalloc (RX_NUM_FIFO * RX_BUF_SIZE, GFP_BUFFER); */ + mem_addr = &rx_buf_pool[i * RX_NUM_FIFO * RX_BUF_SIZE]; + + /* Set the physical address of the host memory + * buffers in the buffer descriptors, and the + * virtual address for us to work with. + */ + bdp = (QUICC_BD *)((uint)pquicc + dp_addr); + info->rx_cur = info->rx_bd_base = bdp; + + /* initialize rx buffer descriptors */ + for (j=0; j<(RX_NUM_FIFO-1); j++) { + bdp->buf = &rx_buf_pool[(i * RX_NUM_FIFO + j ) * RX_BUF_SIZE]; + bdp->status = BD_SC_EMPTY | BD_SC_INTRPT; + mem_addr += RX_BUF_SIZE; + bdp++; + } + bdp->buf = &rx_buf_pool[(i * RX_NUM_FIFO + j ) * RX_BUF_SIZE]; + bdp->status = BD_SC_WRAP | BD_SC_EMPTY | BD_SC_INTRPT; + + + idx = PORT_NUM(info->state->smc_scc_num); + if (info->state->smc_scc_num & NUM_IS_SCC) { + +#if defined (CONFIG_UCQUICC) && 1 + /* set the transceiver mode to RS232 */ + sipex_mode_bits &= ~(uint)SIPEX_MODE(idx,0x0f); /* clear current mode */ + sipex_mode_bits |= (uint)SIPEX_MODE(idx,0x02); + *(uint *)_periph_base = sipex_mode_bits; + /* printk ("sipex bits = 0x%08x\n", sipex_mode_bits); */ +#endif + + scp = &pquicc->scc_regs[idx]; + sup = &pquicc->pram[info->state->port].scc.pscc.u; + sup->rbase = dp_addr; + } + else { + sp = &cp->smc_regs[idx]; + up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u; + up->rbase = dp_addr; + } + + dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * TX_NUM_FIFO); + + /* Allocate space for FIFOs in the host memory. + */ + /* mem_addr = m360_cpm_hostalloc(TX_NUM_FIFO * TX_BUF_SIZE); */ + /* mem_addr = kmalloc (TX_NUM_FIFO * TX_BUF_SIZE, GFP_BUFFER); */ + mem_addr = &tx_buf_pool[i * TX_NUM_FIFO * TX_BUF_SIZE]; + + /* Set the physical address of the host memory + * buffers in the buffer descriptors, and the + * virtual address for us to work with. + */ + /* bdp = (QUICC_BD *)&cp->cp_dpmem[dp_addr]; */ + bdp = (QUICC_BD *)((uint)pquicc + dp_addr); + info->tx_cur = info->tx_bd_base = (QUICC_BD *)bdp; + + /* initialize tx buffer descriptors */ + for (j=0; j<(TX_NUM_FIFO-1); j++) { + bdp->buf = &tx_buf_pool[(i * TX_NUM_FIFO + j ) * TX_BUF_SIZE]; + bdp->status = BD_SC_INTRPT; + mem_addr += TX_BUF_SIZE; + bdp++; + } + bdp->buf = &tx_buf_pool[(i * TX_NUM_FIFO + j ) * TX_BUF_SIZE]; + bdp->status = (BD_SC_WRAP | BD_SC_INTRPT); + + if (info->state->smc_scc_num & NUM_IS_SCC) { + sup->tbase = dp_addr; + + /* Set up the uart parameters in the + * parameter ram. + */ + sup->rfcr = SMC_EB; + sup->tfcr = SMC_EB; + + /* Set this to 1 for now, so we get single + * character interrupts. Using idle charater + * time requires some additional tuning. + */ + sup->mrblr = 1; + sup->max_idl = 0; + sup->brkcr = 1; + sup->parec = 0; + sup->frmer = 0; + sup->nosec = 0; + sup->brkec = 0; + sup->uaddr1 = 0; + sup->uaddr2 = 0; + sup->toseq = 0; + { + int i; + for (i=0;i<8;i++) + sup->cc[i] = 0x8000; + } + sup->rccm = 0xc0ff; + + /* Send the CPM an initialize command. + */ + chan = scc_chan_map[idx]; + + /* execute the INIT RX & TX PARAMS command for this channel. */ + cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG; + while (cp->cp_cr & CPM_CR_FLG); + + /* Set UART mode, 8 bit, no parity, one stop. + * Enable receive and transmit. + */ + scp->scc_gsmr.w.high = 0; + scp->scc_gsmr.w.low = + (SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16); + + /* Disable all interrupts and clear all pending + * events. + */ + scp->scc_sccm = 0; + scp->scc_scce = 0xffff; + scp->scc_dsr = 0x7e7e; + scp->scc_psmr = 0x3000; + + /* If the port is the console, enable Rx and Tx. + */ +#ifdef CONFIG_SERIAL_CONSOLE + if (i == CONFIG_SERIAL_CONSOLE_PORT) + scp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT); +#endif + } + else { + /* Configure SMCs Tx/Rx instead of port B + * parallel I/O. + */ + + iobits = 0xc0 << (idx * 4); + cp->pip_pbpar |= iobits; + cp->pip_pbdir &= ~iobits; + cp->pip_pbodr &= ~iobits; + + + /* Connect the baud rate generator to the + * SMC based upon index in rs_table. Also + * make sure it is connected to NMSI. + */ + cp->si_simode &= ~(0xffff << (idx * 16)); + cp->si_simode |= (i << ((idx * 16) + 12)); + + up->tbase = dp_addr; + + /* Set up the uart parameters in the + * parameter ram. + */ + up->rfcr = SMC_EB; + up->tfcr = SMC_EB; + + /* Set this to 1 for now, so we get single + * character interrupts. Using idle charater + * time requires some additional tuning. + */ + up->mrblr = 1; + up->max_idl = 0; + up->brkcr = 1; + + /* Send the CPM an initialize command. + */ + chan = smc_chan_map[idx]; + + cp->cp_cr = mk_cr_cmd(chan, + CPM_CR_INIT_TRX) | CPM_CR_FLG; +#ifdef CONFIG_SERIAL_CONSOLE + if (i == CONFIG_SERIAL_CONSOLE_PORT) + printk(""); +#endif + while (cp->cp_cr & CPM_CR_FLG); + + /* Set UART mode, 8 bit, no parity, one stop. + * Enable receive and transmit. + */ + sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART; + + /* Disable all interrupts and clear all pending + * events. + */ + sp->smc_smcm = 0; + sp->smc_smce = 0xff; + + /* If the port is the console, enable Rx and Tx. + */ +#ifdef CONFIG_SERIAL_CONSOLE + if (i == CONFIG_SERIAL_CONSOLE_PORT) + sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN; +#endif + } + + /* Install interrupt handler. + */ + /* cpm_install_handler(IRQ_MACHSPEC | state->irq, rs_360_interrupt, info); */ + /*request_irq(IRQ_MACHSPEC | state->irq, rs_360_interrupt, */ + request_irq(state->irq, rs_360_interrupt, + IRQ_FLG_LOCK, serial_driver.name, (void *)info); + + /* Set up the baud rate generator. + */ + m360_cpm_setbrg(i, baud_table[baud_idx]); + + } + } + + return 0; +} + + + + + +/* This must always be called before the rs_360_init() function, otherwise + * it blows away the port control information. + */ +//static int __init serial_console_setup( struct console *co, char *options) +int serial_console_setup( struct console *co, char *options) +{ + struct serial_state *ser; + uint mem_addr, dp_addr, bidx, idx, iobits; + int i; + ushort chan; + QUICC_BD *bdp; + volatile QUICC *cp; + volatile struct smc_regs *sp; + volatile struct scc_regs *scp; + volatile struct smc_uart_pram *up; + volatile struct uart_pram *sup; + +/* mleslie TODO: + * add something to the 68k bootloader to store a desired initial console baud rate */ + +/* bd_t *bd; */ /* a board info struct used by EPPC-bug */ +/* bd = (bd_t *)__res; */ + + for (bidx = 0; bidx < (sizeof(baud_table) / sizeof(int)); bidx++) + /* if (bd->bi_baudrate == baud_table[bidx]) */ + if (CONSOLE_BAUDRATE == baud_table[bidx]) + break; + + /* co->cflag = CREAD|CLOCAL|bidx|CS8; */ + baud_idx = bidx; + + ser = rs_table + CONFIG_SERIAL_CONSOLE_PORT; + + cp = pquicc; /* Get pointer to Communication Processor */ + + idx = PORT_NUM(ser->smc_scc_num); + if (ser->smc_scc_num & NUM_IS_SCC) { + scp = &cp->scc_regs[idx]; + /* sup = (scc_uart_t *)&cp->cp_dparam[ser->port]; */ + sup = &pquicc->pram[ser->port].scc.pscc.u; + + /* TODO: need to set up SCC pin assignment etc. here */ + + } + else { + sp = &cp->smc_regs[idx]; + /* up = (smc_uart_t *)&cp->cp_dparam[ser->port]; */ + up = &pquicc->pram[ser->port].scc.pothers.idma_smc.psmc.u; + + iobits = 0xc0 << (idx * 4); + cp->pip_pbpar |= iobits; + cp->pip_pbdir &= ~iobits; + cp->pip_pbodr &= ~iobits; + + /* Connect the baud rate generator to the + * SMC based upon index in rs_table. Also + * make sure it is connected to NMSI. + */ + cp->si_simode &= ~(0xffff << (idx * 16)); + cp->si_simode |= (idx << ((idx * 16) + 12)); + } + + /* When we get here, the CPM has been reset, so we need + * to configure the port. + * We need to allocate a transmit and receive buffer descriptor + * from dual port ram, and a character buffer area from host mem. + */ + + /* Allocate space for two buffer descriptors in the DP ram. + */ + dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * CONSOLE_NUM_FIFO); + + /* Allocate space for two 2 byte FIFOs in the host memory. + */ + /* mem_addr = m360_cpm_hostalloc(8); */ + mem_addr = (uint)console_fifos; + + + /* Set the physical address of the host memory buffers in + * the buffer descriptors. + */ + /* bdp = (QUICC_BD *)&cp->cp_dpmem[dp_addr]; */ + bdp = (QUICC_BD *)((uint)pquicc + dp_addr); + bdp->buf = (char *)mem_addr; + (bdp+1)->buf = (char *)(mem_addr+4); + + /* For the receive, set empty and wrap. + * For transmit, set wrap. + */ + bdp->status = BD_SC_EMPTY | BD_SC_WRAP; + (bdp+1)->status = BD_SC_WRAP; + + /* Set up the uart parameters in the parameter ram. + */ + if (ser->smc_scc_num & NUM_IS_SCC) { + + sup->rbase = dp_addr; + sup->tbase = dp_addr + sizeof(QUICC_BD); + + /* Set up the uart parameters in the + * parameter ram. + */ + sup->rfcr = SMC_EB; + sup->tfcr = SMC_EB; + + /* Set this to 1 for now, so we get single + * character interrupts. Using idle charater + * time requires some additional tuning. + */ + sup->mrblr = 1; + sup->max_idl = 0; + sup->brkcr = 1; + sup->parec = 0; + sup->frmer = 0; + sup->nosec = 0; + sup->brkec = 0; + sup->uaddr1 = 0; + sup->uaddr2 = 0; + sup->toseq = 0; + { + int i; + for (i=0;i<8;i++) + sup->cc[i] = 0x8000; + } + sup->rccm = 0xc0ff; + + /* Send the CPM an initialize command. + */ + chan = scc_chan_map[idx]; + + cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG; + while (cp->cp_cr & CPM_CR_FLG); + + /* Set UART mode, 8 bit, no parity, one stop. + * Enable receive and transmit. + */ + scp->scc_gsmr.w.high = 0; + scp->scc_gsmr.w.low = + (SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16); + + /* Disable all interrupts and clear all pending + * events. + */ + scp->scc_sccm = 0; + scp->scc_scce = 0xffff; + scp->scc_dsr = 0x7e7e; + scp->scc_psmr = 0x3000; + + scp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT); + + } + else { + up->rbase = dp_addr; /* Base of receive buffer desc. */ + up->tbase = dp_addr+sizeof(QUICC_BD); /* Base of xmt buffer desc. */ + up->rfcr = SMC_EB; + up->tfcr = SMC_EB; + + /* Set this to 1 for now, so we get single character interrupts. + */ + up->mrblr = 1; /* receive buffer length */ + up->max_idl = 0; /* wait forever for next char */ + + /* Send the CPM an initialize command. + */ + chan = smc_chan_map[idx]; + cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG; + printk(""); + while (cp->cp_cr & CPM_CR_FLG); + + /* Set UART mode, 8 bit, no parity, one stop. + * Enable receive and transmit. + */ + sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART; + + /* And finally, enable Rx and Tx. + */ + sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN; + } + + /* Set up the baud rate generator. + */ + /* m360_cpm_setbrg((ser - rs_table), bd->bi_baudrate); */ + m360_cpm_setbrg((ser - rs_table), CONSOLE_BAUDRATE); + + return 0; +} + +/* + * Local variables: + * c-indent-level: 4 + * c-basic-offset: 4 + * tab-width: 4 + * End: + */ diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68360/Readme.txt linux.2.5.40-ac2/arch/m68knommu/platform/68360/Readme.txt --- linux.2.5.40/arch/m68knommu/platform/68360/Readme.txt 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68360/Readme.txt 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,11 @@ +M68360 port of uClinux: + May 29, 2001. + This port was done by SED Systems, a division of Calian Ltd. for use + on the SIOS hardware. This port is based on the 68328 port and uClinux + 2.0.38.pre7 M68360 support. The devices we have tested are: + -Timer 1 as system clock (this should be changed to the PIT) + -Console on SMC 2. + Included is serial port support for the SCCs. We have had problems with + these devices (When both SCCs and SMCs are select, the kernel hangs during + boot, I have not tried SCCs only). + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68360/Rules.make linux.2.5.40-ac2/arch/m68knommu/platform/68360/Rules.make --- linux.2.5.40/arch/m68knommu/platform/68360/Rules.make 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68360/Rules.make 2002-10-02 21:54:22.000000000 +0100 @@ -0,0 +1,38 @@ +# +# 68360/Makefile +# +# This file is included by the global makefile so that you can add your own +# platform-specific flags and dependencies. +# +# This file is subject to the terms and conditions of the GNU General Public +# License. See the file "COPYING" in the main directory of this archive +# for more details. +# +# Copyright (C) 2000 Michael Leslie , +# Copyright (C) 1998,1999 D. Jeff Dionne , +# Copyright (C) 1998 Kenneth Albanowski +# Copyright (C) 1994 by Hamish Macdonald +# + +GCC_DIR = $(shell $(CC) -v 2>&1 | grep specs | sed -e 's/.* \(.*\)specs/\1\./') + +INCGCC = $(GCC_DIR)/include +LIBGCC = $(GCC_DIR)/m68000/libgcc.a + +CFLAGS := -fno-builtin -DNO_CACHE $(CFLAGS) -pipe -DCONFIG_NO_MMU -DNO_FPU -DNO_CACHE -m68332 -D__ELF__ -DNO_FORGET -DUTS_SYSNAME='"uClinux"' -D__linux__ +AFLAGS := $(AFLAGS) -pipe -DCONFIG_NO_MMU -DNO_FPU -DNO_CACHE -m68332 -D__ELF__ -DUTS_SYSNAME='"uClinux"' -Wa,--bitwise-or + +LDFLAGS_vmlinux = -T arch/$(ARCH)/platform/$(PLATFORM)/$(BOARD)/$(MODEL).ld + + + +HEAD := arch/$(ARCH)/platform/$(PLATFORM)/$(BOARD)/crt0_$(MODEL).o + +SUBDIRS := arch/$(ARCH)/kernel arch/$(ARCH)/mm arch/$(ARCH)/lib \ + arch/$(ARCH)/platform/$(PLATFORM) $(SUBDIRS) + +CORE_FILES := arch/$(ARCH)/kernel/kernel.o arch/$(ARCH)/mm/mm.o \ + arch/$(ARCH)/platform/$(PLATFORM)/platform.o $(CORE_FILES) + +LIBS += arch/$(ARCH)/lib/lib.a $(LIBGCC) + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68360/traps.c linux.2.5.40-ac2/arch/m68knommu/platform/68360/traps.c --- linux.2.5.40/arch/m68knommu/platform/68360/traps.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68360/traps.c 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,274 @@ +/* + * linux/arch/$(ARCH)/platform/$(PLATFORM)/traps.c -- general exception handling code + * + * Cloned from Linux/m68k. + * + * No original Copyright holder listed, + * Probabily original (C) Roman Zippel (assigned DJD, 1999) + * + * Copyright (c) 2000 Michael Leslie + * Copyright 1999-2000 D. Jeff Dionne, + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive + * for more details. + */ + +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +/* table for system interrupt handlers */ +static irq_handler_t irq_list[SYS_IRQS]; + +static const char *default_names[SYS_IRQS] = { + "spurious int", "int1 handler", "int2 handler", "int3 handler", + "int4 handler", "int5 handler", "int6 handler", "int7 handler" +}; + +/* The number of spurious interrupts */ +volatile unsigned int num_spurious; + +#define NUM_IRQ_NODES 96 +static irq_node_t nodes[NUM_IRQ_NODES]; + +/* + * The flash interrupt vector table is in crt0_rom.S. If you are running from + * RAM, this may not suite your purposes :-). + */ + +/* + * void init_IRQ(void) + * + * Parameters: None + * + * Returns: Nothing + * + * This function should be called during kernel startup to initialize + * the IRQ handling routines. + */ + +void init_IRQ(void) +{ + int i; + + for (i = 0; i < SYS_IRQS; i++) { + if (mach_default_handler) + irq_list[i].handler = (*mach_default_handler)[i]; + else + irq_list[i].handler = NULL; + irq_list[i].flags = IRQ_FLG_STD; + irq_list[i].dev_id = NULL; + irq_list[i].devname = default_names[i]; + } + + for (i = 0; i < NUM_IRQ_NODES; i++) + nodes[i].handler = NULL; + + //mach_init_IRQ (); +} + +irq_node_t *new_irq_node(void) +{ + irq_node_t *node; + short i; + + for (node = nodes, i = NUM_IRQ_NODES-1; i >= 0; node++, i--) + if (!node->handler) + return node; + + printk ("new_irq_node: out of nodes\n"); + return NULL; +} + +int request_irq(unsigned int irq, void (*handler)(int, void *, struct pt_regs *), + unsigned long flags, const char *devname, void *dev_id) +{ + if (irq) + return mach_request_irq(irq, handler, flags, devname, dev_id); + + if (irq < IRQ1 || irq > IRQ7) { + printk("%s: Incorrect IRQ %d from %s\n", __FUNCTION__, irq, devname); + return -ENXIO; + } + + if (!(irq_list[irq].flags & IRQ_FLG_STD)) { + if (irq_list[irq].flags & IRQ_FLG_LOCK) { + printk("%s: IRQ %d from %s is not replaceable\n", + __FUNCTION__, irq, irq_list[irq].devname); + return -EBUSY; + } + if (flags & IRQ_FLG_REPLACE) { + printk("%s: %s can't replace IRQ %d from %s\n", + __FUNCTION__, devname, irq, irq_list[irq].devname); + return -EBUSY; + } + } + irq_list[irq].handler = handler; + irq_list[irq].flags = flags; + irq_list[irq].dev_id = dev_id; + irq_list[irq].devname = devname; + return 0; +} + +void free_irq(unsigned int irq, void *dev_id) +{ + if (irq) { + mach_free_irq(irq, dev_id); + return; + } + + if (irq < IRQ1 || irq > IRQ7) { + printk("%s: Incorrect IRQ %d\n", __FUNCTION__, irq); + return; + } + + if (irq_list[irq].dev_id != dev_id) + printk("%s: Removing probably wrong IRQ %d from %s\n", + __FUNCTION__, irq, irq_list[irq].devname); + + if (mach_default_handler) + irq_list[irq].handler = (*mach_default_handler)[irq]; + else + irq_list[irq].handler = NULL; + irq_list[irq].flags = IRQ_FLG_STD; + irq_list[irq].dev_id = NULL; + irq_list[irq].devname = default_names[irq]; +} + +/* + * Do we need these probe functions on the m68k? + */ +unsigned long probe_irq_on (void) +{ + return 0; +} + +int probe_irq_off (unsigned long irqs) +{ + return 0; +} + +asmlinkage void process_int(unsigned long vec, struct pt_regs *fp) +{ + if ((vec >= VEC_INT1) && (vec <= VEC_INT7)) + { + vec -= VEC_SPUR; + kstat.irqs[0][vec]++; + irq_list[vec].handler(vec, irq_list[vec].dev_id, fp); + } + else + { + if(vec > 255) + { + panic("Intterrupt vector %ld\n", vec); + } + else + { + if (mach_process_int) + mach_process_int(vec, fp); + else + panic("Can't process interrupt vector %ld\n", vec); + } + } + return; +} + +int show_interrupts(struct seq_file *p, void *v) +{ + int i; + + /* autovector interrupts */ + if (mach_default_handler) { + for (i = 0; i < SYS_IRQS; i++) { + seq_printf(p, "auto %2d: %10u ", i, + i ? kstat.irqs[0][i] : num_spurious); + seq_printf(p, " "); + seq_printf(p, "%s\n", irq_list[i].devname); + + } + } + mach_get_irq_list(p, v); + return(0); +} + +/* + * Generic dumping code. Used for panic and debug. + */ + +void dump(struct pt_regs *fp) +{ + unsigned long *sp; + unsigned char *tp; + int i; + + printk("\nCURRENT PROCESS:\n\n"); +#if 0 +{ + extern int swt_lastjiffies, swt_reference; + printk("WATCHDOG: jiffies=%d lastjiffies=%d [%d] reference=%d\n", + jiffies, swt_lastjiffies, (swt_lastjiffies - jiffies), + swt_reference); +} +#endif + printk("COMM=%s PID=%d\n", current->comm, current->pid); + if (current->mm) { + printk("TEXT=%08x-%08x DATA=%08x-%08x BSS=%08x-%08x\n", + (int) current->mm->start_code, + (int) current->mm->end_code, + (int) current->mm->start_data, + (int) current->mm->end_data, + (int) current->mm->end_data, + (int) current->mm->brk); +// printk("USER-STACK=%08x KERNEL-STACK=%08x\n\n", + printk("USER-STACK=%08x \n\n", + (int) current->mm->start_stack); + } + + printk("PC: %08lx\n", fp->pc); + printk("SR: %08lx SP: %08lx\n", (long) fp->sr, (long) fp); + printk("d0: %08lx d1: %08lx d2: %08lx d3: %08lx\n", + fp->d0, fp->d1, fp->d2, fp->d3); + printk("d4: %08lx d5: %08lx a0: %08lx a1: %08lx\n", + fp->d4, fp->d5, fp->a0, fp->a1); + printk("\nUSP: %08x TRAPFRAME: %08x\n", + rdusp(), (unsigned int) fp); + + printk("\nCODE:"); + tp = ((unsigned char *) fp->pc) - 0x20; + for (sp = (unsigned long *) tp, i = 0; (i < 0x40); i += 4) { + if ((i % 0x10) == 0) + printk("\n%08x: ", (int) (tp + i)); + printk("%08x ", (int) *sp++); + } + printk("\n"); + + printk("\nKERNEL STACK:"); + tp = ((unsigned char *) fp) - 0x40; + for (sp = (unsigned long *) tp, i = 0; (i < 0xc0); i += 4) { + if ((i % 0x10) == 0) + printk("\n%08x: ", (int) (tp + i)); + printk("%08x ", (int) *sp++); + } + printk("\n"); + /* + if (STACK_MAGIC != *(unsigned long *)current->kernel_stack_page) + printk("(Possibly corrupted stack page??)\n");*/ + printk("\n"); + + printk("\nUSER STACK:"); + tp = (unsigned char *) (rdusp() - 0x10); + for (sp = (unsigned long *) tp, i = 0; (i < 0x80); i += 4) { + if ((i % 0x10) == 0) + printk("\n%08x: ", (int) (tp + i)); + printk("%08x ", (int) *sp++); + } + printk("\n\n"); +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68360/uCquicc/bootstd.h linux.2.5.40-ac2/arch/m68knommu/platform/68360/uCquicc/bootstd.h --- linux.2.5.40/arch/m68knommu/platform/68360/uCquicc/bootstd.h 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68360/uCquicc/bootstd.h 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,132 @@ +/* bootstd.h: Bootloader system call interface + * + * (c) 1999, Rt-Control, Inc. + */ + +#ifndef __BOOTSTD_H__ +#define __BOOTSTD_H__ + +#define NR_BSC 21 /* last used bootloader system call */ + +#define __BN_reset 0 /* reset and start the bootloader */ +#define __BN_test 1 /* tests the system call interface */ +#define __BN_exec 2 /* executes a bootloader image */ +#define __BN_exit 3 /* terminates a bootloader image */ +#define __BN_program 4 /* program FLASH from a chain */ +#define __BN_erase 5 /* erase sector(s) of FLASH */ +#define __BN_open 6 +#define __BN_write 7 +#define __BN_read 8 +#define __BN_close 9 +#define __BN_mmap 10 /* map a file descriptor into memory */ +#define __BN_munmap 11 /* remove a file to memory mapping */ +#define __BN_gethwaddr 12 /* get the hardware address of my interfaces */ +#define __BN_getserialnum 13 /* get the serial number of this board */ +#define __BN_getbenv 14 /* get a bootloader envvar */ +#define __BN_setbenv 15 /* get a bootloader envvar */ +#define __BN_setpmask 16 /* set the protection mask */ +#define __BN_readenv 17 /* read environment variables */ +#define __BN_flash_chattr_range 18 +#define __BN_flash_erase_range 19 +#define __BN_flash_write_range 20 + +/* Calling conventions compatible to (uC)linux/68k + * We use simmilar macros to call into the bootloader as for uClinux + */ + +#define __bsc_return(type, res) \ +do { \ + if ((unsigned long)(res) >= (unsigned long)(-64)) { \ + /* let errno be a function, preserve res in %d0 */ \ + int __err = -(res); \ + errno = __err; \ + res = -1; \ + } \ + return (type)(res); \ +} while (0) + +#define _bsc0(type,name) \ +type name(void) \ +{ \ + register long __res __asm__ ("%d0") = __BN_##name; \ + __asm__ __volatile__ ("trap #2" \ + : "=g" (__res) \ + : "0" (__res) \ + : "%d0"); \ + __bsc_return(type,__res); \ +} + +#define _bsc1(type,name,atype,a) \ +type name(atype a) \ +{ \ + register long __res __asm__ ("%d0") = __BN_##name; \ + register long __a __asm__ ("%d1") = (long)a; \ + __asm__ __volatile__ ("trap #2" \ + : "=g" (__res) \ + : "0" (__res), "d" (__a) \ + : "%d0"); \ + __bsc_return(type,__res); \ +} + +#define _bsc2(type,name,atype,a,btype,b) \ +type name(atype a, btype b) \ +{ \ + register long __res __asm__ ("%d0") = __BN_##name; \ + register long __a __asm__ ("%d1") = (long)a; \ + register long __b __asm__ ("%d2") = (long)b; \ + __asm__ __volatile__ ("trap #2" \ + : "=g" (__res) \ + : "0" (__res), "d" (__a), "d" (__b) \ + : "%d0"); \ + __bsc_return(type,__res); \ +} + +#define _bsc3(type,name,atype,a,btype,b,ctype,c) \ +type name(atype a, btype b, ctype c) \ +{ \ + register long __res __asm__ ("%d0") = __BN_##name; \ + register long __a __asm__ ("%d1") = (long)a; \ + register long __b __asm__ ("%d2") = (long)b; \ + register long __c __asm__ ("%d3") = (long)c; \ + __asm__ __volatile__ ("trap #2" \ + : "=g" (__res) \ + : "0" (__res), "d" (__a), "d" (__b), \ + "d" (__c) \ + : "%d0"); \ + __bsc_return(type,__res); \ +} + +#define _bsc4(type,name,atype,a,btype,b,ctype,c,dtype,d) \ +type name(atype a, btype b, ctype c, dtype d) \ +{ \ + register long __res __asm__ ("%d0") = __BN_##name; \ + register long __a __asm__ ("%d1") = (long)a; \ + register long __b __asm__ ("%d2") = (long)b; \ + register long __c __asm__ ("%d3") = (long)c; \ + register long __d __asm__ ("%d4") = (long)d; \ + __asm__ __volatile__ ("trap #2" \ + : "=g" (__res) \ + : "0" (__res), "d" (__a), "d" (__b), \ + "d" (__c), "d" (__d) \ + : "%d0"); \ + __bsc_return(type,__res); \ +} + +#define _bsc5(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e) \ +type name(atype a, btype b, ctype c, dtype d, etype e) \ +{ \ + register long __res __asm__ ("%d0") = __BN_##name; \ + register long __a __asm__ ("%d1") = (long)a; \ + register long __b __asm__ ("%d2") = (long)b; \ + register long __c __asm__ ("%d3") = (long)c; \ + register long __d __asm__ ("%d4") = (long)d; \ + register long __e __asm__ ("%d5") = (long)e; \ + __asm__ __volatile__ ("trap #2" \ + : "=g" (__res) \ + : "0" (__res), "d" (__a), "d" (__b), \ + "d" (__c), "d" (__d), "d" (__e) \ + : "%d0"); \ + __bsc_return(type,__res); \ +} + +#endif /* __BOOTSTD_H__ */ diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68360/uCquicc/crt0_ram.S linux.2.5.40-ac2/arch/m68knommu/platform/68360/uCquicc/crt0_ram.S --- linux.2.5.40/arch/m68knommu/platform/68360/uCquicc/crt0_ram.S 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68360/uCquicc/crt0_ram.S 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,415 @@ +/* arch/m68knommu/platform/68360/uCquicc/crt0_rom.S + * + * Startup code for Motorola 68360 + * + * Copyright 2001 (C) SED Systems, a Division of Calian Ltd. + * Based on: arch/m68knommu/platform/68328/pilot/crt0_rom.S + * Based on: arch/m68knommu/platform/68360/uCquicc/crt0_rom.S, 2.0.38.1.pre7 + * uClinux Kernel + * Copyright (C) Michael Leslie + * Based on: arch/m68knommu/platform/68EZ328/ucsimm/crt0_rom.S + * Copyright (C) 1998 D. Jeff Dionne , + * + */ +#define ASSEMBLY +#include + +.global _stext +.global __bss_start +.global _start + +.global _rambase +.global __ramvec +.global _ramvec +.global _ramstart +.global _ramend + +.global _quicc_base +.global _periph_base +.global _dprbase + +#define REGB 0x1000 +#define PEPAR (_dprbase + REGB + 0x0016) +#define GMR (_dprbase + REGB + 0x0040) +#define OR0 (_dprbase + REGB + 0x0054) +#define BR0 (_dprbase + REGB + 0x0050) +#define OR1 (_dprbase + REGB + 0x0064) +#define BR1 (_dprbase + REGB + 0x0060) +#define OR4 (_dprbase + REGB + 0x0094) +#define BR4 (_dprbase + REGB + 0x0090) +#define OR6 (_dprbase + REGB + 0x00b4) +#define BR6 (_dprbase + REGB + 0x00b0) +#define OR7 (_dprbase + REGB + 0x00c4) +#define BR7 (_dprbase + REGB + 0x00c0) + +#define MCR (_dprbase + REGB + 0x0000) +#define AVR (_dprbase + REGB + 0x0008) + +#define SYPCR (_dprbase + REGB + 0x0022) + +#define PLLCR (_dprbase + REGB + 0x0010) +#define CLKOCR (_dprbase + REGB + 0x000C) +#define CDVCR (_dprbase + REGB + 0x0014) + +#define BKAR (_dprbase + REGB + 0x0030) +#define BKCR (_dprbase + REGB + 0x0034) +#define SWIV (_dprbase + REGB + 0x0023) +#define PICR (_dprbase + REGB + 0x0026) +#define PITR (_dprbase + REGB + 0x002A) + +/* Define for all memory configuration */ +#define MCU_SIM_GMR 0x00000000 +#define SIM_OR_MASK 0x0fffffff + +/* Defines for chip select zero - the flash */ +#define SIM_OR0_MASK 0x20000002 +#define SIM_BR0_MASK 0x00000001 + + +/* Defines for chip select one - the RAM */ +#define SIM_OR1_MASK 0x10000000 +#define SIM_BR1_MASK 0x00000001 + +#define MCU_SIM_MBAR_ADRS 0x0003ff00 +#define MCU_SIM_MBAR_BA_MASK 0xfffff000 +#define MCU_SIM_MBAR_AS_MASK 0x00000001 + +#define MCU_SIM_PEPAR 0x00B4 + +#define MCU_DISABLE_INTRPTS 0x2700 +#define MCU_SIM_AVR 0x00 + +#define MCU_SIM_MCR 0x00005cff + +#define MCU_SIM_CLKOCR 0x00 +#define MCU_SIM_PLLCR 0x8000 +#define MCU_SIM_CDVCR 0x0000 + +#define MCU_SIM_SYPCR 0x0000 +#define MCU_SIM_SWIV 0x00 +#define MCU_SIM_PICR 0x0000 +#define MCU_SIM_PITR 0x0000 + + +#include + + +/* By the time this RAM specific code begins to execute, DPRAM + * and DRAM should already be mapped and accessible. */ + + .text +_start: +_stext: + nop + ori.w #MCU_DISABLE_INTRPTS, %sr /* disable interrupts: */ + /* We should not need to setup the boot stack the reset should do it. */ + movea.l #_boot_stack, %sp /*set up stack at the end of DRAM:*/ + + +set_mbar_register: + moveq.l #0x07, %d1 /* Setup MBAR */ + movec %d1, %dfc + + lea.l MCU_SIM_MBAR_ADRS, %a0 + move.l #_dprbase, %d0 + andi.l #MCU_SIM_MBAR_BA_MASK, %d0 + ori.l #MCU_SIM_MBAR_AS_MASK, %d0 + moves.l %d0, %a0@ + + moveq.l #0x05, %d1 + movec.l %d1, %dfc + +/* Now we can begin to access registers in DPRAM */ + +set_sim_mcr: + /* Set Module Configuration Register */ + move.l #MCU_SIM_MCR, MCR + +/* to do: Determine cause of reset */ + + + /* + * configure system clock MC68360 p. 6-40 + * (value +1)*osc/128 = system clock + */ +set_sim_clock: + move.w #MCU_SIM_PLLCR, PLLCR + move.b #MCU_SIM_CLKOCR, CLKOCR + move.w #MCU_SIM_CDVCR, CDVCR + + // Wait for the PLL to settle + move.w #16384, %d0 +pll_settle_wait: + subi.w #1, %d0 + bne pll_settle_wait + + /* Setup the system protection register, and watchdog timer register */ + + move.b #MCU_SIM_SWIV, SWIV + move.w #MCU_SIM_PICR, PICR + move.w #MCU_SIM_PITR, PITR + move.w #MCU_SIM_SYPCR, SYPCR + +/* Clear DPRAM - system + parameter */ + movea.l #_dprbase, %a0 + movea.l #_dprbase+0x2000, %a1 + + /* Copy 0 to %a0 until %a0 == %a1 */ +clear_dpram: + movel #0, %a0@+ + cmpal %a0, %a1 + bhi clear_dpram + +configure_memory_controller: + /* + * Set up Global Memory Register (GMR) + */ + move.l #MCU_SIM_GMR, %d0 + move.l %d0, GMR + +configure_chip_select_0: + move.l #__ramend, %d0 + subi.l #__ramstart, %d0 + subq.l #0x01, %d0 + eori.l #SIM_OR_MASK, %d0 + ori.l #SIM_OR0_MASK, %d0 + move.l %d0, OR0 + + move.l #__ramstart, %d0 + ori.l #SIM_BR0_MASK, %d0 + move.l %d0, BR0 + + +configure_chip_select_1: + move.l #__flashend, %d0 + subi.l #__flashstart, %d0 + subq.l #0x01, %d0 + eori.l #SIM_OR_MASK, %d0 + ori.l #SIM_OR1_MASK, %d0 + move.l %d0, OR1 + + move.l #__flashstart, %d0 + ori.l #SIM_BR1_MASK, %d0 + move.l %d0, BR1 + + + move.w #MCU_SIM_PEPAR, PEPAR + +/* point to vector table: */ + move.l #_romvec, %a0 + move.l #_ramvec, %a1 +copy_vectors: + move.l %a0@, %d0 + move.l %d0, %a1@ + move.l %a0@, %a1@ + addq.l #0x04, %a0 + addq.l #0x04, %a1 + cmp.l #_start, %a0 + blt copy_vectors + + move.l #_ramvec, %a1 + movec %a1, %vbr + + + /* Copy data segment from ROM to RAM */ + moveal #__data_rom_start, %a0 + moveal #__data_start, %a1 + moveal #__data_end, %a2 + + /* Copy %a0 to %a1 until %a1 == %a2 */ +LD1: + move.l %a0@, %d0 + addq.l #0x04, %a0 + move.l %d0, %a1@ + addq.l #0x04, %a1 + cmp.l #__data_end, %a1 + blt LD1 + + moveal #__bss_start, %a0 + moveal #end, %a1 + + /* Copy 0 to %a0 until %a0 == %a1 */ +L1: + movel #0, %a0@+ + cmpal %a0, %a1 + bhi L1 + +load_quicc: + move.l #_dprbase, _quicc_base + +store_ram_size: + /* Set ram size information */ + move.l #_sdata, _rambase + move.l #end, _ramstart + move.l #__ramend, %d0 + sub.l #0x1000, %d0 /* Reserve 4K for stack space.*/ + move.l %d0, _ramend /* Different from __ramend.*/ + +store_flash_size: + /* Set rom size information */ + move.l #__flashend, %d0 + sub.l #__flashstart, %d0 + move.l %d0, rom_length + + pea 0 + pea env + pea %sp@(4) + pea 0 + + lea init_thread_union, %a2 + lea 0x2000(%a2), %sp + +lp: + jsr start_kernel + /* jmp lp */ + +_exit: + + jmp _exit + + + + .data + .align 4 +env: + .long 0 +_quicc_base: + .long 0 +_periph_base: + .long 0 +_ramvec: + .long 0 +_rambase: + .long 0 +_ramstart: + .long 0 +_ramend: + .long 0 + .text + + /* + * These are the exception vectors at boot up, they are copied into RAM + * and then overwritten as needed. + */ + +.section ".data.initvect","awx" + .long _boot_stack /* Reset: Initial Stack Pointer - 0. */ + .long _start /* Reset: Initial Program Counter - 1. */ + .long buserr /* Bus Error - 2. */ + .long trap /* Address Error - 3. */ + .long trap /* Illegal Instruction - 4. */ + .long trap /* Divide by zero - 5. */ + .long trap /* CHK, CHK2 Instructions - 6. */ + .long trap /* TRAPcc, TRAPV Instructions - 7. */ + .long trap /* Privilege Violation - 8. */ + .long trap /* Trace - 9. */ + .long trap /* Line 1010 Emulator - 10. */ + .long trap /* Line 1111 Emualtor - 11. */ + .long trap /* Harware Breakpoint - 12. */ + .long trap /* (Reserved for Coprocessor Protocol Violation)- 13. */ + .long trap /* Format Error - 14. */ + .long trap /* Uninitialized Interrupt - 15. */ + .long trap /* (Unassigned, Reserver) - 16. */ + .long trap /* (Unassigned, Reserver) - 17. */ + .long trap /* (Unassigned, Reserver) - 18. */ + .long trap /* (Unassigned, Reserver) - 19. */ + .long trap /* (Unassigned, Reserver) - 20. */ + .long trap /* (Unassigned, Reserver) - 21. */ + .long trap /* (Unassigned, Reserver) - 22. */ + .long trap /* (Unassigned, Reserver) - 23. */ + .long trap /* Spurious Interrupt - 24. */ + .long trap /* Level 1 Interrupt Autovector - 25. */ + .long trap /* Level 2 Interrupt Autovector - 26. */ + .long trap /* Level 3 Interrupt Autovector - 27. */ + .long trap /* Level 4 Interrupt Autovector - 28. */ + .long trap /* Level 5 Interrupt Autovector - 29. */ + .long trap /* Level 6 Interrupt Autovector - 30. */ + .long trap /* Level 7 Interrupt Autovector - 31. */ + .long system_call /* Trap Instruction Vectors 0 - 32. */ + .long trap /* Trap Instruction Vectors 1 - 33. */ + .long trap /* Trap Instruction Vectors 2 - 34. */ + .long trap /* Trap Instruction Vectors 3 - 35. */ + .long trap /* Trap Instruction Vectors 4 - 36. */ + .long trap /* Trap Instruction Vectors 5 - 37. */ + .long trap /* Trap Instruction Vectors 6 - 38. */ + .long trap /* Trap Instruction Vectors 7 - 39. */ + .long trap /* Trap Instruction Vectors 8 - 40. */ + .long trap /* Trap Instruction Vectors 9 - 41. */ + .long trap /* Trap Instruction Vectors 10 - 42. */ + .long trap /* Trap Instruction Vectors 11 - 43. */ + .long trap /* Trap Instruction Vectors 12 - 44. */ + .long trap /* Trap Instruction Vectors 13 - 45. */ + .long trap /* Trap Instruction Vectors 14 - 46. */ + .long trap /* Trap Instruction Vectors 15 - 47. */ + .long 0 /* (Reserved for Coprocessor) - 48. */ + .long 0 /* (Reserved for Coprocessor) - 49. */ + .long 0 /* (Reserved for Coprocessor) - 50. */ + .long 0 /* (Reserved for Coprocessor) - 51. */ + .long 0 /* (Reserved for Coprocessor) - 52. */ + .long 0 /* (Reserved for Coprocessor) - 53. */ + .long 0 /* (Reserved for Coprocessor) - 54. */ + .long 0 /* (Reserved for Coprocessor) - 55. */ + .long 0 /* (Reserved for Coprocessor) - 56. */ + .long 0 /* (Reserved for Coprocessor) - 57. */ + .long 0 /* (Reserved for Coprocessor) - 58. */ + .long 0 /* (Unassigned, Reserved) - 59. */ + .long 0 /* (Unassigned, Reserved) - 60. */ + .long 0 /* (Unassigned, Reserved) - 61. */ + .long 0 /* (Unassigned, Reserved) - 62. */ + .long 0 /* (Unassigned, Reserved) - 63. */ + /* The assignment of these vectors to the CPM is */ + /* dependant on the configuration of the CPM vba */ + /* fields. */ + .long 0 /* (User-Defined Vectors 1) CPM Error - 64. */ + .long 0 /* (User-Defined Vectors 2) CPM Parallel IO PC11- 65. */ + .long 0 /* (User-Defined Vectors 3) CPM Parallel IO PC10- 66. */ + .long 0 /* (User-Defined Vectors 4) CPM SMC2 / PIP - 67. */ + .long 0 /* (User-Defined Vectors 5) CPM SMC1 - 68. */ + .long 0 /* (User-Defined Vectors 6) CPM SPI - 69. */ + .long 0 /* (User-Defined Vectors 7) CPM Parallel IO PC9 - 70. */ + .long 0 /* (User-Defined Vectors 8) CPM Timer 4 - 71. */ + .long 0 /* (User-Defined Vectors 9) CPM Reserved - 72. */ + .long 0 /* (User-Defined Vectors 10) CPM Parallel IO PC8- 73. */ + .long 0 /* (User-Defined Vectors 11) CPM Parallel IO PC7- 74. */ + .long 0 /* (User-Defined Vectors 12) CPM Parallel IO PC6- 75. */ + .long 0 /* (User-Defined Vectors 13) CPM Timer 3 - 76. */ + .long 0 /* (User-Defined Vectors 14) CPM Reserved - 77. */ + .long 0 /* (User-Defined Vectors 15) CPM Parallel IO PC5- 78. */ + .long 0 /* (User-Defined Vectors 16) CPM Parallel IO PC4- 79. */ + .long 0 /* (User-Defined Vectors 17) CPM Reserved - 80. */ + .long 0 /* (User-Defined Vectors 18) CPM RISC Timer Tbl - 81. */ + .long 0 /* (User-Defined Vectors 19) CPM Timer 2 - 82. */ + .long 0 /* (User-Defined Vectors 21) CPM Reserved - 83. */ + .long 0 /* (User-Defined Vectors 22) CPM IDMA2 - 84. */ + .long 0 /* (User-Defined Vectors 23) CPM IDMA1 - 85. */ + .long 0 /* (User-Defined Vectors 24) CPM SDMA Bus Err - 86. */ + .long 0 /* (User-Defined Vectors 25) CPM Parallel IO PC3- 87. */ + .long 0 /* (User-Defined Vectors 26) CPM Parallel IO PC2- 88. */ + .long 0 /* (User-Defined Vectors 27) CPM Timer 1 - 89. */ + .long 0 /* (User-Defined Vectors 28) CPM Parallel IO PC1- 90. */ + .long 0 /* (User-Defined Vectors 29) CPM SCC 4 - 91. */ + .long 0 /* (User-Defined Vectors 30) CPM SCC 3 - 92. */ + .long 0 /* (User-Defined Vectors 31) CPM SCC 2 - 93. */ + .long 0 /* (User-Defined Vectors 32) CPM SCC 1 - 94. */ + .long 0 /* (User-Defined Vectors 33) CPM Parallel IO PC0- 95. */ + /* I don't think anything uses the vectors after here. */ + .long 0 /* (User-Defined Vectors 34) - 96. */ + .long 0,0,0,0,0 /* (User-Defined Vectors 35 - 39). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 40 - 49). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 50 - 59). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 60 - 69). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 70 - 79). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 80 - 89). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 90 - 99). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 100 - 109). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 110 - 119). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 120 - 129). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 130 - 139). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 140 - 149). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 150 - 159). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 160 - 169). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 170 - 179). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 180 - 189). */ + .long 0,0,0 /* (User-Defined Vectors 190 - 192). */ +.text +ignore: rte diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68360/uCquicc/crt0_rom.S linux.2.5.40-ac2/arch/m68knommu/platform/68360/uCquicc/crt0_rom.S --- linux.2.5.40/arch/m68knommu/platform/68360/uCquicc/crt0_rom.S 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68360/uCquicc/crt0_rom.S 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,424 @@ +/* arch/m68knommu/platform/68360/uCquicc/crt0_rom.S + * + * Startup code for Motorola 68360 + * + * Copyright (C) SED Systems, a Division of Calian Ltd. + * Based on: arch/m68knommu/platform/68328/pilot/crt0_rom.S + * Based on: arch/m68knommu/platform/68360/uCquicc/crt0_rom.S, 2.0.38.1.pre7 + * uClinux Kernel + * Copyright (C) Michael Leslie + * Based on: arch/m68knommu/platform/68EZ328/ucsimm/crt0_rom.S + * Copyright (C) 1998 D. Jeff Dionne , + * + */ +#define ASSEMBLY +#include + +.global _stext +.global __bss_start +.global _start + +.global _rambase +.global __ramvec +.global _ramvec +.global _ramstart +.global _ramend + +.global _quicc_base +.global _periph_base +.global _dprbase + +#define REGB 0x1000 +#define PEPAR (_dprbase + REGB + 0x0016) +#define GMR (_dprbase + REGB + 0x0040) +#define OR0 (_dprbase + REGB + 0x0054) +#define BR0 (_dprbase + REGB + 0x0050) + +#define OR1 (_dprbase + REGB + 0x0064) +#define BR1 (_dprbase + REGB + 0x0060) + +#define OR2 (_dprbase + REGB + 0x0074) +#define BR2 (_dprbase + REGB + 0x0070) + +#define OR3 (_dprbase + REGB + 0x0084) +#define BR3 (_dprbase + REGB + 0x0080) + +#define OR4 (_dprbase + REGB + 0x0094) +#define BR4 (_dprbase + REGB + 0x0090) + +#define OR5 (_dprbase + REGB + 0x00A4) +#define BR5 (_dprbase + REGB + 0x00A0) + +#define OR6 (_dprbase + REGB + 0x00b4) +#define BR6 (_dprbase + REGB + 0x00b0) + +#define OR7 (_dprbase + REGB + 0x00c4) +#define BR7 (_dprbase + REGB + 0x00c0) + +#define MCR (_dprbase + REGB + 0x0000) +#define AVR (_dprbase + REGB + 0x0008) + +#define SYPCR (_dprbase + REGB + 0x0022) + +#define PLLCR (_dprbase + REGB + 0x0010) +#define CLKOCR (_dprbase + REGB + 0x000C) +#define CDVCR (_dprbase + REGB + 0x0014) + +#define BKAR (_dprbase + REGB + 0x0030) +#define BKCR (_dprbase + REGB + 0x0034) +#define SWIV (_dprbase + REGB + 0x0023) +#define PICR (_dprbase + REGB + 0x0026) +#define PITR (_dprbase + REGB + 0x002A) + +/* Define for all memory configuration */ +#define MCU_SIM_GMR 0x00000000 +#define SIM_OR_MASK 0x0fffffff + +/* Defines for chip select zero - the flash */ +#define SIM_OR0_MASK 0x20000000 +#define SIM_BR0_MASK 0x00000001 + + +/* Defines for chip select one - the RAM */ +#define SIM_OR1_MASK 0x10000000 +#define SIM_BR1_MASK 0x00000001 + +#define MCU_SIM_MBAR_ADRS 0x0003ff00 +#define MCU_SIM_MBAR_BA_MASK 0xfffff000 +#define MCU_SIM_MBAR_AS_MASK 0x00000001 + +#define MCU_SIM_PEPAR 0x00B4 + +#define MCU_DISABLE_INTRPTS 0x2700 +#define MCU_SIM_AVR 0x00 + +#define MCU_SIM_MCR 0x00005cff + +#define MCU_SIM_CLKOCR 0x00 +#define MCU_SIM_PLLCR 0x8000 +#define MCU_SIM_CDVCR 0x0000 + +#define MCU_SIM_SYPCR 0x0000 +#define MCU_SIM_SWIV 0x00 +#define MCU_SIM_PICR 0x0000 +#define MCU_SIM_PITR 0x0000 + + +#include + + +/* By the time this RAM specific code begins to execute, DPRAM + * and DRAM should already be mapped and accessible. */ + + .text +_start: +_stext: + nop + ori.w #MCU_DISABLE_INTRPTS, %sr /* disable interrupts: */ + /* We should not need to setup the boot stack the reset should do it. */ + movea.l #_boot_stack, %sp /*set up stack at the end of DRAM:*/ + + +set_mbar_register: + moveq.l #0x07, %d1 /* Setup MBAR */ + movec %d1, %dfc + + lea.l MCU_SIM_MBAR_ADRS, %a0 + move.l #_dprbase, %d0 + andi.l #MCU_SIM_MBAR_BA_MASK, %d0 + ori.l #MCU_SIM_MBAR_AS_MASK, %d0 + moves.l %d0, %a0@ + + moveq.l #0x05, %d1 + movec.l %d1, %dfc + +/* Now we can begin to access registers in DPRAM */ + +set_sim_mcr: + /* Set Module Configuration Register */ + move.l #MCU_SIM_MCR, MCR + +/* to do: Determine cause of reset */ + + + /* + * configure system clock MC68360 p. 6-40 + * (value +1)*osc/128 = system clock + * or + * (value + 1)*osc = system clock + * You do not need to divide the oscillator by 128 unless you want to. + */ +set_sim_clock: + move.w #MCU_SIM_PLLCR, PLLCR + move.b #MCU_SIM_CLKOCR, CLKOCR + move.w #MCU_SIM_CDVCR, CDVCR + + // Wait for the PLL to settle + move.w #16384, %d0 +pll_settle_wait: + subi.w #1, %d0 + bne pll_settle_wait + + /* Setup the system protection register, and watchdog timer register */ + + move.b #MCU_SIM_SWIV, SWIV + move.w #MCU_SIM_PICR, PICR + move.w #MCU_SIM_PITR, PITR + move.w #MCU_SIM_SYPCR, SYPCR + +/* Clear DPRAM - system + parameter */ + movea.l #_dprbase, %a0 + movea.l #_dprbase+0x2000, %a1 + + /* Copy 0 to %a0 until %a0 == %a1 */ +clear_dpram: + movel #0, %a0@+ + cmpal %a0, %a1 + bhi clear_dpram + +configure_memory_controller: + /* + * Set up Global Memory Register (GMR) + */ + move.l #MCU_SIM_GMR, %d0 + move.l %d0, GMR + +configure_chip_select_0: + move.l #0x00400000, %d0 + subq.l #0x01, %d0 + eori.l #SIM_OR_MASK, %d0 + ori.l #SIM_OR0_MASK, %d0 + move.l %d0, OR0 + + move.l #__flashstart, %d0 + ori.l #SIM_BR0_MASK, %d0 + move.l %d0, BR0 + + move.l #0x0, BR1 + move.l #0x0, BR2 + move.l #0x0, BR3 + move.l #0x0, BR4 + move.l #0x0, BR5 + move.l #0x0, BR6 + move.l #0x0, BR7 + + move.w #MCU_SIM_PEPAR, PEPAR + +/* point to vector table: */ + move.l #_romvec, %a0 + move.l #_ramvec, %a1 +copy_vectors: + move.l %a0@, %d0 + move.l %d0, %a1@ + move.l %a0@, %a1@ + addq.l #0x04, %a0 + addq.l #0x04, %a1 + cmp.l #_start, %a0 + blt copy_vectors + + move.l #_ramvec, %a1 + movec %a1, %vbr + + + /* Copy data segment from ROM to RAM */ + moveal #__data_rom_start, %a0 + moveal #__data_start, %a1 + moveal #__data_end, %a2 + + /* Copy %a0 to %a1 until %a1 == %a2 */ +LD1: + move.l %a0@, %d0 + addq.l #0x04, %a0 + move.l %d0, %a1@ + addq.l #0x04, %a1 + cmp.l #__data_end, %a1 + blt LD1 + + moveal #__bss_start, %a0 + moveal #end, %a1 + + /* Copy 0 to %a0 until %a0 == %a1 */ +L1: + movel #0, %a0@+ + cmpal %a0, %a1 + bhi L1 + +load_quicc: + move.l #_dprbase, _quicc_base + +store_ram_size: + /* Set ram size information */ + move.l #_sdata, _rambase + move.l #end, _ramstart + move.l #__ramend, %d0 + sub.l #0x1000, %d0 /* Reserve 4K for stack space.*/ + move.l %d0, _ramend /* Different from __ramend.*/ + +store_flash_size: + /* Set rom size information */ + move.l #__flashend, %d0 + sub.l #__flashstart, %d0 + move.l %d0, rom_length + + pea 0 + pea env + pea %sp@(4) + pea 0 + + lea init_thread_union, %a2 + lea 0x2000(%a2), %sp + +lp: + jsr start_kernel + /* jmp lp */ + +_exit: + + jmp _exit + + + + .data + .align 4 +env: + .long 0 +_quicc_base: + .long 0 +_periph_base: + .long 0 +_ramvec: + .long 0 +_rambase: + .long 0 +_ramstart: + .long 0 +_ramend: + .long 0 + .text + + /* + * These are the exception vectors at boot up, they are copied into RAM + * and then overwritten as needed. + */ + +.section ".data.initvect","awx" + .long _boot_stack /* Reset: Initial Stack Pointer - 0. */ + .long _start /* Reset: Initial Program Counter - 1. */ + .long buserr /* Bus Error - 2. */ + .long trap /* Address Error - 3. */ + .long trap /* Illegal Instruction - 4. */ + .long trap /* Divide by zero - 5. */ + .long trap /* CHK, CHK2 Instructions - 6. */ + .long trap /* TRAPcc, TRAPV Instructions - 7. */ + .long trap /* Privilege Violation - 8. */ + .long trap /* Trace - 9. */ + .long trap /* Line 1010 Emulator - 10. */ + .long trap /* Line 1111 Emualtor - 11. */ + .long trap /* Harware Breakpoint - 12. */ + .long trap /* (Reserved for Coprocessor Protocol Violation)- 13. */ + .long trap /* Format Error - 14. */ + .long trap /* Uninitialized Interrupt - 15. */ + .long trap /* (Unassigned, Reserver) - 16. */ + .long trap /* (Unassigned, Reserver) - 17. */ + .long trap /* (Unassigned, Reserver) - 18. */ + .long trap /* (Unassigned, Reserver) - 19. */ + .long trap /* (Unassigned, Reserver) - 20. */ + .long trap /* (Unassigned, Reserver) - 21. */ + .long trap /* (Unassigned, Reserver) - 22. */ + .long trap /* (Unassigned, Reserver) - 23. */ + .long trap /* Spurious Interrupt - 24. */ + .long trap /* Level 1 Interrupt Autovector - 25. */ + .long trap /* Level 2 Interrupt Autovector - 26. */ + .long trap /* Level 3 Interrupt Autovector - 27. */ + .long trap /* Level 4 Interrupt Autovector - 28. */ + .long trap /* Level 5 Interrupt Autovector - 29. */ + .long trap /* Level 6 Interrupt Autovector - 30. */ + .long trap /* Level 7 Interrupt Autovector - 31. */ + .long system_call /* Trap Instruction Vectors 0 - 32. */ + .long trap /* Trap Instruction Vectors 1 - 33. */ + .long trap /* Trap Instruction Vectors 2 - 34. */ + .long trap /* Trap Instruction Vectors 3 - 35. */ + .long trap /* Trap Instruction Vectors 4 - 36. */ + .long trap /* Trap Instruction Vectors 5 - 37. */ + .long trap /* Trap Instruction Vectors 6 - 38. */ + .long trap /* Trap Instruction Vectors 7 - 39. */ + .long trap /* Trap Instruction Vectors 8 - 40. */ + .long trap /* Trap Instruction Vectors 9 - 41. */ + .long trap /* Trap Instruction Vectors 10 - 42. */ + .long trap /* Trap Instruction Vectors 11 - 43. */ + .long trap /* Trap Instruction Vectors 12 - 44. */ + .long trap /* Trap Instruction Vectors 13 - 45. */ + .long trap /* Trap Instruction Vectors 14 - 46. */ + .long trap /* Trap Instruction Vectors 15 - 47. */ + .long 0 /* (Reserved for Coprocessor) - 48. */ + .long 0 /* (Reserved for Coprocessor) - 49. */ + .long 0 /* (Reserved for Coprocessor) - 50. */ + .long 0 /* (Reserved for Coprocessor) - 51. */ + .long 0 /* (Reserved for Coprocessor) - 52. */ + .long 0 /* (Reserved for Coprocessor) - 53. */ + .long 0 /* (Reserved for Coprocessor) - 54. */ + .long 0 /* (Reserved for Coprocessor) - 55. */ + .long 0 /* (Reserved for Coprocessor) - 56. */ + .long 0 /* (Reserved for Coprocessor) - 57. */ + .long 0 /* (Reserved for Coprocessor) - 58. */ + .long 0 /* (Unassigned, Reserved) - 59. */ + .long 0 /* (Unassigned, Reserved) - 60. */ + .long 0 /* (Unassigned, Reserved) - 61. */ + .long 0 /* (Unassigned, Reserved) - 62. */ + .long 0 /* (Unassigned, Reserved) - 63. */ + /* The assignment of these vectors to the CPM is */ + /* dependant on the configuration of the CPM vba */ + /* fields. */ + .long 0 /* (User-Defined Vectors 1) CPM Error - 64. */ + .long 0 /* (User-Defined Vectors 2) CPM Parallel IO PC11- 65. */ + .long 0 /* (User-Defined Vectors 3) CPM Parallel IO PC10- 66. */ + .long 0 /* (User-Defined Vectors 4) CPM SMC2 / PIP - 67. */ + .long 0 /* (User-Defined Vectors 5) CPM SMC1 - 68. */ + .long 0 /* (User-Defined Vectors 6) CPM SPI - 69. */ + .long 0 /* (User-Defined Vectors 7) CPM Parallel IO PC9 - 70. */ + .long 0 /* (User-Defined Vectors 8) CPM Timer 4 - 71. */ + .long 0 /* (User-Defined Vectors 9) CPM Reserved - 72. */ + .long 0 /* (User-Defined Vectors 10) CPM Parallel IO PC8- 73. */ + .long 0 /* (User-Defined Vectors 11) CPM Parallel IO PC7- 74. */ + .long 0 /* (User-Defined Vectors 12) CPM Parallel IO PC6- 75. */ + .long 0 /* (User-Defined Vectors 13) CPM Timer 3 - 76. */ + .long 0 /* (User-Defined Vectors 14) CPM Reserved - 77. */ + .long 0 /* (User-Defined Vectors 15) CPM Parallel IO PC5- 78. */ + .long 0 /* (User-Defined Vectors 16) CPM Parallel IO PC4- 79. */ + .long 0 /* (User-Defined Vectors 17) CPM Reserved - 80. */ + .long 0 /* (User-Defined Vectors 18) CPM RISC Timer Tbl - 81. */ + .long 0 /* (User-Defined Vectors 19) CPM Timer 2 - 82. */ + .long 0 /* (User-Defined Vectors 21) CPM Reserved - 83. */ + .long 0 /* (User-Defined Vectors 22) CPM IDMA2 - 84. */ + .long 0 /* (User-Defined Vectors 23) CPM IDMA1 - 85. */ + .long 0 /* (User-Defined Vectors 24) CPM SDMA Bus Err - 86. */ + .long 0 /* (User-Defined Vectors 25) CPM Parallel IO PC3- 87. */ + .long 0 /* (User-Defined Vectors 26) CPM Parallel IO PC2- 88. */ + .long 0 /* (User-Defined Vectors 27) CPM Timer 1 - 89. */ + .long 0 /* (User-Defined Vectors 28) CPM Parallel IO PC1- 90. */ + .long 0 /* (User-Defined Vectors 29) CPM SCC 4 - 91. */ + .long 0 /* (User-Defined Vectors 30) CPM SCC 3 - 92. */ + .long 0 /* (User-Defined Vectors 31) CPM SCC 2 - 93. */ + .long 0 /* (User-Defined Vectors 32) CPM SCC 1 - 94. */ + .long 0 /* (User-Defined Vectors 33) CPM Parallel IO PC0- 95. */ + /* I don't think anything uses the vectors after here. */ + .long 0 /* (User-Defined Vectors 34) - 96. */ + .long 0,0,0,0,0 /* (User-Defined Vectors 35 - 39). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 40 - 49). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 50 - 59). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 60 - 69). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 70 - 79). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 80 - 89). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 90 - 99). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 100 - 109). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 110 - 119). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 120 - 129). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 130 - 139). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 140 - 149). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 150 - 159). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 160 - 169). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 170 - 179). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 180 - 189). */ + .long 0,0,0 /* (User-Defined Vectors 190 - 192). */ +.text +ignore: rte diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68360/uCquicc/ram.ld linux.2.5.40-ac2/arch/m68knommu/platform/68360/uCquicc/ram.ld --- linux.2.5.40/arch/m68knommu/platform/68360/uCquicc/ram.ld 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68360/uCquicc/ram.ld 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,112 @@ +MEMORY +{ + romvec : ORIGIN = 0x00000000, LENGTH = 1028 + flash : ORIGIN = 1028, LENGTH = 0x00080000 - 1028 + eflash : ORIGIN = 0x00000000 + 0x00100000, LENGTH = 1 + ramvec : ORIGIN = 0x00200000, LENGTH = 1028 + ram : ORIGIN = 0x00200000 + 1028, LENGTH = 0x00080000 - 1028 + eram : ORIGIN = 0x00200000 + 0x00080000, LENGTH = 1 + dpram : ORIGIN = 0xffffe000, LENGTH = 0x00002000 +} + +jiffies = jiffies_64 + 4; + +SECTIONS +{ + .dpram : + { + _dprbase = . ; + } > dpram + + .romvec : + { + _romvec = . ; + __flashstart = . ; + *(.data.initvect) + . = ALIGN(4); + } > romvec + + .text : + { + text_start = . ; + *(.text) + *(.text.*) + *(.rodata) + *(.fixup) + *(.kstrtab) + __start___ksymtab = . ; + *(__ksymtab) + __stop___ksymtab = . ; + __start___ex_table = . ; + *(___ex_table) + __stop___ex_table = . ; + . = ALIGN(4) ;_etext = . ; + __data_rom_start = ALIGN ( 4 ) ; + } > flash + + .eflash : + { + __flashend = . ; + } > eflash + + + .ramvec : + { + __ramstart = . ; + _ramvec = . ; + } > ramvec + + .data : + { + _sdata = . ; + __data_start = . ; + . = ALIGN(0x2000) ; + *(.data.init_task) + . = ALIGN(0x2000) ; + *(.data) + *(.data.*) + *(.setup.init) + *(.exitcall.exit) + . = ALIGN(4096) ; + __init_begin = .; + *(.text.init) + *(.data.init) + . = ALIGN(16); + __setup_start = .; + *(.setup.init) + __setup_end = .; + __initcall_start = .; + *(.initcall1.init) + *(.initcall2.init) + *(.initcall3.init) + *(.initcall4.init) + *(.initcall5.init) + *(.initcall6.init) + *(.initcall7.init) + __initcall_end = .; + . = ALIGN(4) ; + __init_end = .; + _edata = . ; + edata = .; + } > ram + + .bss : + { + _sbss = ALIGN( 0x10 ) ; + __bss_start = ALIGN( 0x10 ) ; + __data_end = ALIGN( 0x10 ) ; + *(.bss) + *(COMMON) + _ebss = . ; + __bss_end = . ; + end = ALIGN( 0x10 ) ; + _end = ALIGN( 0x10 ) ; + } > ram + + .eram : + { + _boot_stack = . - 4; + __ramend = . ; + + } > eram +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68360/uCquicc/rom.ld linux.2.5.40-ac2/arch/m68knommu/platform/68360/uCquicc/rom.ld --- linux.2.5.40/arch/m68knommu/platform/68360/uCquicc/rom.ld 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68360/uCquicc/rom.ld 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,112 @@ +MEMORY +{ + romvec : ORIGIN = 0x00000000, LENGTH = 1028 + flash : ORIGIN = 1028, LENGTH = 0x00200000 - 1028 + eflash : ORIGIN = 0x00000000 + 0x00200000, LENGTH = 1 + ramvec : ORIGIN = 0x00200000, LENGTH = 1028 + ram : ORIGIN = 0x00200000 + 1028, LENGTH = 0x00200000 - 1028 + eram : ORIGIN = 0x00200000 + 0x00200000, LENGTH = 1 + dpram : ORIGIN = 0xffffe000, LENGTH = 0x00002000 +} + +jiffies = jiffies_64 + 4; + +SECTIONS +{ + .dpram : + { + _dprbase = . ; + } > dpram + + .romvec : + { + _romvec = . ; + __flashstart = . ; + *(.data.initvect) + . = ALIGN(4); + } > romvec + + .text : + { + text_start = . ; + *(.text) + *(.text.*) + *(.rodata) + *(.fixup) + *(.kstrtab) + __start___ksymtab = . ; + *(__ksymtab) + __stop___ksymtab = . ; + __start___ex_table = . ; + *(___ex_table) + __stop___ex_table = . ; + . = ALIGN(4) ;_etext = . ; + __data_rom_start = ALIGN ( 4 ) ; + } > flash + + .eflash : + { + __flashend = . ; + } > eflash + + + .ramvec : + { + __ramstart = . ; + _ramvec = . ; + } > ramvec + + .data : + { + _sdata = . ; + __data_start = . ; + . = ALIGN(0x2000) ; + *(.data.init_task) + . = ALIGN(0x2000) ; + *(.data) + *(.data.*) + *(.setup.init) + *(.exitcall.exit) + . = ALIGN(4096) ; + __init_begin = .; + *(.text.init) + *(.data.init) + . = ALIGN(16); + __setup_start = .; + *(.setup.init) + __setup_end = .; + __initcall_start = .; + *(.initcall1.init) + *(.initcall2.init) + *(.initcall3.init) + *(.initcall4.init) + *(.initcall5.init) + *(.initcall6.init) + *(.initcall7.init) + __initcall_end = .; + . = ALIGN(4) ; + __init_end = .; + _edata = . ; + edata = .; + } > ram + + .bss : + { + _sbss = ALIGN( 0x10 ) ; + __bss_start = ALIGN( 0x10 ) ; + __data_end = ALIGN( 0x10 ) ; + *(.bss) + *(COMMON) + _ebss = . ; + __bss_end = . ; + end = ALIGN( 0x10 ) ; + _end = ALIGN( 0x10 ) ; + } > ram + + .eram : + { + _boot_stack = . - 4; + __ramend = . ; + + } > eram +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68EZ328/config.c linux.2.5.40-ac2/arch/m68knommu/platform/68EZ328/config.c --- linux.2.5.40/arch/m68knommu/platform/68EZ328/config.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68EZ328/config.c 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,138 @@ +/* + * linux/arch/$(ARCH)/platform/$(PLATFORM)/config.c + * + * Copyright (C) 1993 Hamish Macdonald + * Copyright (C) 1999 D. Jeff Dionne + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive + * for more details. + */ + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#ifdef CONFIG_UCSIMM +#include "ucsimm/bootstd.h" +#endif +#ifdef CONFIG_PILOT +#include "PalmV/romfs.h" +#endif +#include + +void BSP_sched_init(void (*timer_routine)(int, void *, struct pt_regs *)) +{ + /* Restart mode, Enable int, 32KHz, Enable timer */ + TCTL = TCTL_OM | TCTL_IRQEN | TCTL_CLKSOURCE_32KHZ | TCTL_TEN; + /* Set prescaler (Divide 32KHz by 32)*/ + TPRER = 31; + /* Set compare register 32Khz / 32 / 10 = 100 */ + TCMP = 10; + + request_irq(TMR_IRQ_NUM, timer_routine, IRQ_FLG_LOCK, "timer", NULL); +} + +void BSP_tick(void) +{ + /* Reset Timer1 */ + TSTAT &= 0; +} + +unsigned long BSP_gettimeoffset (void) +{ + return 0; +} + +void BSP_gettod (int *yearp, int *monp, int *dayp, + int *hourp, int *minp, int *secp) +{ +} + +int BSP_hwclk(int op, struct hwclk_time *t) +{ + if (!op) { + /* read */ + } else { + /* write */ + } + return 0; +} + +int BSP_set_clock_mmss (unsigned long nowtime) +{ +#if 0 + short real_seconds = nowtime % 60, real_minutes = (nowtime / 60) % 60; + + tod->second1 = real_seconds / 10; + tod->second2 = real_seconds % 10; + tod->minute1 = real_minutes / 10; + tod->minute2 = real_minutes % 10; +#endif + return 0; +} + +void BSP_reset (void) +{ + cli(); + asm volatile (" + moveal #0x10c00000, %a0; + moveb #0, 0xFFFFF300; + moveal 0(%a0), %sp; + moveal 4(%a0), %a0; + jmp (%a0); + "); +} + +unsigned char *cs8900a_hwaddr; +static int errno; + +#ifdef CONFIG_UCSIMM +_bsc0(char *, getserialnum) +_bsc1(unsigned char *, gethwaddr, int, a) +_bsc1(char *, getbenv, char *, a) +#endif + +void config_BSP(char *command, int len) +{ + unsigned char *p; + + printk("\n68EZ328 DragonBallEZ support (C) 1999 Rt-Control, Inc\n"); + +#ifdef CONFIG_UCSIMM + printk("uCsimm serial string [%s]\n",getserialnum()); + p = cs8900a_hwaddr = gethwaddr(0); + printk("uCsimm hwaddr %.2x:%.2x:%.2x:%.2x:%.2x:%.2x\n", + p[0], + p[1], + p[2], + p[3], + p[4], + p[5]); + + p = getbenv("APPEND"); + if (p) strcpy(p,command); + else command[0] = 0; +#endif + + mach_sched_init = BSP_sched_init; + mach_tick = BSP_tick; + mach_gettimeoffset = BSP_gettimeoffset; + mach_gettod = BSP_gettod; + mach_hwclk = NULL; + mach_set_clock_mmss = NULL; + // mach_mksound = NULL; + mach_reset = BSP_reset; + // mach_debug_init = NULL; + + config_M68EZ328_irq(); +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68EZ328/ints.c linux.2.5.40-ac2/arch/m68knommu/platform/68EZ328/ints.c --- linux.2.5.40/arch/m68knommu/platform/68EZ328/ints.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68EZ328/ints.c 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,376 @@ +/* + * linux/arch/$(ARCH)/platform/$(PLATFORM)/ints.c + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive + * for more details. + * + * Copyright 1996 Roman Zippel + * Copyright 1999 D. Jeff Dionne + */ + +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include + +#define INTERNAL_IRQS (32) + +/* assembler routines */ +asmlinkage void system_call(void); +asmlinkage void buserr(void); +asmlinkage void trap(void); +asmlinkage void trap3(void); +asmlinkage void trap4(void); +asmlinkage void trap5(void); +asmlinkage void trap6(void); +asmlinkage void trap7(void); +asmlinkage void trap8(void); +asmlinkage void trap9(void); +asmlinkage void trap10(void); +asmlinkage void trap11(void); +asmlinkage void trap12(void); +asmlinkage void trap13(void); +asmlinkage void trap14(void); +asmlinkage void trap15(void); +asmlinkage void trap33(void); +asmlinkage void trap34(void); +asmlinkage void trap35(void); +asmlinkage void trap36(void); +asmlinkage void trap37(void); +asmlinkage void trap38(void); +asmlinkage void trap39(void); +asmlinkage void trap40(void); +asmlinkage void trap41(void); +asmlinkage void trap42(void); +asmlinkage void trap43(void); +asmlinkage void trap44(void); +asmlinkage void trap45(void); +asmlinkage void trap46(void); +asmlinkage void trap47(void); +asmlinkage void bad_interrupt(void); +asmlinkage void inthandler(void); +asmlinkage void inthandler1(void); +asmlinkage void inthandler2(void); +asmlinkage void inthandler3(void); +asmlinkage void inthandler4(void); +asmlinkage void inthandler5(void); +asmlinkage void inthandler6(void); +asmlinkage void inthandler7(void); + +// extern void *_ramvec[]; +extern e_vector *_ramvec; + +/* irq node variables for the 32 (potential) on chip sources */ +static irq_node_t *int_irq_list[INTERNAL_IRQS]; + +static int int_irq_count[INTERNAL_IRQS]; +static short int_irq_ablecount[INTERNAL_IRQS]; + +static void int_badint(int irq, void *dev_id, struct pt_regs *fp) +{ + num_spurious += 1; +} + +/* + * This function should be called during kernel startup to initialize + * the amiga IRQ handling routines. + */ + +void M68EZ328_init_IRQ(void) +{ + int i; + + /* set up the vectors */ +#if 0 + _ramvec[2] = buserr; + _ramvec[3] = trap3; + _ramvec[4] = trap4; + _ramvec[5] = trap5; + _ramvec[6] = trap6; + _ramvec[7] = trap7; + _ramvec[8] = trap8; + _ramvec[9] = trap9; + _ramvec[10] = trap10; + _ramvec[11] = trap11; + _ramvec[12] = trap12; + _ramvec[13] = trap13; + _ramvec[14] = trap14; + _ramvec[15] = trap15; +#endif + _ramvec[32] = system_call; + + _ramvec[64] = bad_interrupt; + _ramvec[65] = inthandler1; + _ramvec[66] = inthandler2; + _ramvec[67] = inthandler3; + _ramvec[68] = inthandler4; + _ramvec[69] = inthandler5; + _ramvec[70] = inthandler6; + _ramvec[71] = inthandler7; + + IVR = 0x40; /* Set DragonBall IVR (interrupt base) to 64 */ + + /* initialize handlers */ + for (i = 0; i < INTERNAL_IRQS; i++) { + int_irq_list[i] = NULL; + + int_irq_ablecount[i] = 0; + int_irq_count[i] = 0; + } + /* turn off all interrupts */ + IMR = ~0; +} + +void M68EZ328_insert_irq(irq_node_t **list, irq_node_t *node) +{ + unsigned long flags; + irq_node_t *cur; + + if (!node->dev_id) + printk("%s: Warning: dev_id of %s is zero\n", + __FUNCTION__, node->devname); + + save_flags(flags); + cli(); + + cur = *list; + + while (cur) { + list = &cur->next; + cur = cur->next; + } + + node->next = cur; + *list = node; + + restore_flags(flags); +} + +void M68EZ328_delete_irq(irq_node_t **list, void *dev_id) +{ + unsigned long flags; + irq_node_t *node; + + save_flags(flags); + cli(); + + for (node = *list; node; list = &node->next, node = *list) { + if (node->dev_id == dev_id) { + *list = node->next; + /* Mark it as free. */ + node->handler = NULL; + restore_flags(flags); + return; + } + } + restore_flags(flags); + printk ("%s: tried to remove invalid irq\n", __FUNCTION__); +} + +int M68EZ328_request_irq(unsigned int irq, void (*handler)(int, void *, struct pt_regs *), + unsigned long flags, const char *devname, void *dev_id) +{ + if (irq >= INTERNAL_IRQS) { + printk ("%s: Unknown IRQ %d from %s\n", __FUNCTION__, irq, devname); + return -ENXIO; + } + + if (!int_irq_list[irq]) { + int_irq_list[irq] = new_irq_node(); + int_irq_list[irq]->flags = IRQ_FLG_STD; + } + + if (!(int_irq_list[irq]->flags & IRQ_FLG_STD)) { + if (int_irq_list[irq]->flags & IRQ_FLG_LOCK) { + printk("%s: IRQ %d from %s is not replaceable\n", + __FUNCTION__, irq, int_irq_list[irq]->devname); + return -EBUSY; + } + if (flags & IRQ_FLG_REPLACE) { + printk("%s: %s can't replace IRQ %d from %s\n", + __FUNCTION__, devname, irq, int_irq_list[irq]->devname); + return -EBUSY; + } + } + int_irq_list[irq]->handler = handler; + int_irq_list[irq]->flags = flags; + int_irq_list[irq]->dev_id = dev_id; + int_irq_list[irq]->devname = devname; + + /* enable in the IMR */ + if (!int_irq_ablecount[irq]) + *(volatile unsigned long *)0xfffff304 &= ~(1<= INTERNAL_IRQS) { + printk ("%s: Unknown IRQ %d\n", __FUNCTION__, irq); + return; + } + + if (int_irq_list[irq]->dev_id != dev_id) + printk("%s: removing probably wrong IRQ %d from %s\n", + __FUNCTION__, irq, int_irq_list[irq]->devname); + int_irq_list[irq]->handler = int_badint; + int_irq_list[irq]->flags = IRQ_FLG_STD; + int_irq_list[irq]->dev_id = NULL; + int_irq_list[irq]->devname = NULL; + + *(volatile unsigned long *)0xfffff304 |= 1<= INTERNAL_IRQS) { + printk("%s: Unknown IRQ %d\n", __FUNCTION__, irq); + return; + } + + if (--int_irq_ablecount[irq]) + return; + + /* enable the interrupt */ + *(volatile unsigned long *)0xfffff304 &= ~(1<= INTERNAL_IRQS) { + printk("%s: Unknown IRQ %d\n", __FUNCTION__, irq); + return; + } + + if (int_irq_ablecount[irq]++) + return; + + /* disable the interrupt */ + *(volatile unsigned long *)0xfffff304 |= 1<handler) { + int_irq_list[irq]->handler(irq, int_irq_list[irq]->dev_id, fp); + int_irq_count[irq]++; + } else { + printk("unregistered interrupt %d!\nTurning it off in the IMR...\n", irq); + *(volatile unsigned long *)0xfffff304 |= mask; + } + pend &= ~mask; + } + return 0; +} + +int M68EZ328_get_irq_list(struct seq_file *p, void *v) +{ + int i; + irq_node_t *node; + + seq_printf(p, "Internal 68EZ328 interrupts\n"); + + for (i = 0; i < INTERNAL_IRQS; i++) { + if (!(node = int_irq_list[i])) + continue; + if (!(node->handler)) + continue; + + seq_printf(p, " %2d: %10u %s\n", i, + int_irq_count[i], int_irq_list[i]->devname); + } + return(0); +} + +void config_M68EZ328_irq(void) +{ + mach_default_handler = NULL; + mach_init_IRQ = M68EZ328_init_IRQ; + mach_request_irq = M68EZ328_request_irq; + mach_free_irq = M68EZ328_free_irq; + mach_enable_irq = M68EZ328_enable_irq; + mach_disable_irq = M68EZ328_disable_irq; + mach_get_irq_list = M68EZ328_get_irq_list; + mach_process_int = M68EZ328_do_irq; +} + +void init_irq_proc(void); +void init_irq_proc(void) +{ + /* Insert /proc/irq driver here */ +} + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68EZ328/Makefile linux.2.5.40-ac2/arch/m68knommu/platform/68EZ328/Makefile --- linux.2.5.40/arch/m68knommu/platform/68EZ328/Makefile 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68EZ328/Makefile 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,34 @@ +# +# Makefile for the linux kernel. +# +# Reuse any files we can from the 68328 base +# + +VPATH := $(VPATH):../68328 + +# Note! Dependencies are done automagically by 'make dep', which also +# removes any old dependencies. DON'T put your own dependencies here +# unless it's something special (ie not a .c file). +# +AFLAGS += -D__ASSEMBLY__ + +all: $(BOARD)/crt0_$(MODEL).o entry.o platform.o +O_TARGET := platform.o +obj-y := entry.o config.o signal.o traps.o ints.o + +$(BOARD)/crt0_$(MODEL).o: $(BOARD)/crt0_$(MODEL).S $(BOARD)/bootlogo.rh + +entry.o: entry.S m68k_defs.h + +m68k_defs.h: ../../kernel/m68k_defs.c ../../kernel/m68k_defs.head + rm -f m68k_defs.d + $(CC) $(filter-out -MD,$(CFLAGS)) -S ../../kernel/m68k_defs.c + cp ../../kernel/m68k_defs.head m68k_defs.h + grep '^#define' m68k_defs.s >> m68k_defs.h + rm m68k_defs.s +-include m68k_defs.d + +$(BOARD)/bootlogo.rh: $(BOARD)/bootlogo.h + perl ../68328/tools/bootlogo.pl < $(BOARD)/bootlogo.h > $(BOARD)/bootlogo.rh + +include $(TOPDIR)/Rules.make diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68EZ328/Rules.make linux.2.5.40-ac2/arch/m68knommu/platform/68EZ328/Rules.make --- linux.2.5.40/arch/m68knommu/platform/68EZ328/Rules.make 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68EZ328/Rules.make 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,36 @@ +# +# 68EZ328/Makefile +# +# This file is included by the global makefile so that you can add your own +# platform-specific flags and dependencies. +# +# This file is subject to the terms and conditions of the GNU General Public +# License. See the file "COPYING" in the main directory of this archive +# for more details. +# +# Copyright (c) 2000,2001 Lineo, Inc. +# Copyright (c) 1998,1999 D. Jeff Dionne +# Copyright (C) 1998 Kenneth Albanowski +# Copyright (C) 1994 by Hamish Macdonald +# + +GCC_DIR = $(shell $(CC) -v 2>&1 | grep specs | sed -e 's/.* \(.*\)specs/\1\./') + +INCGCC = $(GCC_DIR)/include +LIBGCC = $(GCC_DIR)/m68000/libgcc.a + +CFLAGS := -fno-builtin -DNO_CACHE $(CFLAGS) -pipe -DCONFIG_NO_MMU -DNO_FPU -DNO_CACHE -m68000 -D__ELF__ -DNO_FORGET -DUTS_SYSNAME='"uClinux"' -D__linux__ +AFLAGS := $(AFLAGS) -pipe -DCONFIG_NO_MMU -DNO_FPU -DNO_CACHE -m68000 -D__ELF__ -DUTS_SYSNAME='"uClinux"' -Wa,--bitwise-or + +LDFLAGS_vmlinux = -T arch/$(ARCH)/platform/$(PLATFORM)/$(BOARD)/$(MODEL).ld + +HEAD := arch/$(ARCH)/platform/$(PLATFORM)/$(BOARD)/crt0_$(MODEL).o + +SUBDIRS := arch/$(ARCH)/kernel arch/$(ARCH)/mm arch/$(ARCH)/lib \ + arch/$(ARCH)/platform/$(PLATFORM) $(SUBDIRS) + +CORE_FILES := arch/$(ARCH)/kernel/kernel.o arch/$(ARCH)/mm/mm.o \ + arch/$(ARCH)/platform/$(PLATFORM)/platform.o $(CORE_FILES) + +LIBS += arch/$(ARCH)/lib/lib.a $(LIBGCC) + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68EZ328/ucsimm/bootlogo.h linux.2.5.40-ac2/arch/m68knommu/platform/68EZ328/ucsimm/bootlogo.h --- linux.2.5.40/arch/m68knommu/platform/68EZ328/ucsimm/bootlogo.h 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68EZ328/ucsimm/bootlogo.h 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,3204 @@ +#define splash_width 640 +#define splash_height 480 +static unsigned char splash_bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 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interface + * + * (c) 1999, Rt-Control, Inc. + */ + +#ifndef __BOOTSTD_H__ +#define __BOOTSTD_H__ + +#define NR_BSC 21 /* last used bootloader system call */ + +#define __BN_reset 0 /* reset and start the bootloader */ +#define __BN_test 1 /* tests the system call interface */ +#define __BN_exec 2 /* executes a bootloader image */ +#define __BN_exit 3 /* terminates a bootloader image */ +#define __BN_program 4 /* program FLASH from a chain */ +#define __BN_erase 5 /* erase sector(s) of FLASH */ +#define __BN_open 6 +#define __BN_write 7 +#define __BN_read 8 +#define __BN_close 9 +#define __BN_mmap 10 /* map a file descriptor into memory */ +#define __BN_munmap 11 /* remove a file to memory mapping */ +#define __BN_gethwaddr 12 /* get the hardware address of my interfaces */ +#define __BN_getserialnum 13 /* get the serial number of this board */ +#define __BN_getbenv 14 /* get a bootloader envvar */ +#define __BN_setbenv 15 /* get a bootloader envvar */ +#define __BN_setpmask 16 /* set the protection mask */ +#define __BN_readenv 17 /* read environment variables */ +#define __BN_flash_chattr_range 18 +#define __BN_flash_erase_range 19 +#define __BN_flash_write_range 20 + +/* Calling conventions compatible to (uC)linux/68k + * We use simmilar macros to call into the bootloader as for uClinux + */ + +#define __bsc_return(type, res) \ +do { \ + if ((unsigned long)(res) >= (unsigned long)(-64)) { \ + /* let errno be a function, preserve res in %d0 */ \ + int __err = -(res); \ + errno = __err; \ + res = -1; \ + } \ + return (type)(res); \ +} while (0) + +#define _bsc0(type,name) \ +type name(void) \ +{ \ + register long __res __asm__ ("%d0") = __BN_##name; \ + __asm__ __volatile__ ("trap #2" \ + : "=g" (__res) \ + : "0" (__res) \ + : "%d0"); \ + __bsc_return(type,__res); \ +} + +#define _bsc1(type,name,atype,a) \ +type name(atype a) \ +{ \ + register long __res __asm__ ("%d0") = __BN_##name; \ + register long __a __asm__ ("%d1") = (long)a; \ + __asm__ __volatile__ ("trap #2" \ + : "=g" (__res) \ + : "0" (__res), "d" (__a) \ + : "%d0"); \ + __bsc_return(type,__res); \ +} + +#define _bsc2(type,name,atype,a,btype,b) \ +type name(atype a, btype b) \ +{ \ + register long __res __asm__ ("%d0") = __BN_##name; \ + register long __a __asm__ ("%d1") = (long)a; \ + register long __b __asm__ ("%d2") = (long)b; \ + __asm__ __volatile__ ("trap #2" \ + : "=g" (__res) \ + : "0" (__res), "d" (__a), "d" (__b) \ + : "%d0"); \ + __bsc_return(type,__res); \ +} + +#define _bsc3(type,name,atype,a,btype,b,ctype,c) \ +type name(atype a, btype b, ctype c) \ +{ \ + register long __res __asm__ ("%d0") = __BN_##name; \ + register long __a __asm__ ("%d1") = (long)a; \ + register long __b __asm__ ("%d2") = (long)b; \ + register long __c __asm__ ("%d3") = (long)c; \ + __asm__ __volatile__ ("trap #2" \ + : "=g" (__res) \ + : "0" (__res), "d" (__a), "d" (__b), \ + "d" (__c) \ + : "%d0"); \ + __bsc_return(type,__res); \ +} + +#define _bsc4(type,name,atype,a,btype,b,ctype,c,dtype,d) \ +type name(atype a, btype b, ctype c, dtype d) \ +{ \ + register long __res __asm__ ("%d0") = __BN_##name; \ + register long __a __asm__ ("%d1") = (long)a; \ + register long __b __asm__ ("%d2") = (long)b; \ + register long __c __asm__ ("%d3") = (long)c; \ + register long __d __asm__ ("%d4") = (long)d; \ + __asm__ __volatile__ ("trap #2" \ + : "=g" (__res) \ + : "0" (__res), "d" (__a), "d" (__b), \ + "d" (__c), "d" (__d) \ + : "%d0"); \ + __bsc_return(type,__res); \ +} + +#define _bsc5(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e) \ +type name(atype a, btype b, ctype c, dtype d, etype e) \ +{ \ + register long __res __asm__ ("%d0") = __BN_##name; \ + register long __a __asm__ ("%d1") = (long)a; \ + register long __b __asm__ ("%d2") = (long)b; \ + register long __c __asm__ ("%d3") = (long)c; \ + register long __d __asm__ ("%d4") = (long)d; \ + register long __e __asm__ ("%d5") = (long)e; \ + __asm__ __volatile__ ("trap #2" \ + : "=g" (__res) \ + : "0" (__res), "d" (__a), "d" (__b), \ + "d" (__c), "d" (__d), "d" (__e) \ + : "%d0"); \ + __bsc_return(type,__res); \ +} + +#endif /* __BOOTSTD_H__ */ diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68EZ328/ucsimm/crt0_fixed.S linux.2.5.40-ac2/arch/m68knommu/platform/68EZ328/ucsimm/crt0_fixed.S --- linux.2.5.40/arch/m68knommu/platform/68EZ328/ucsimm/crt0_fixed.S 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68EZ328/ucsimm/crt0_fixed.S 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,109 @@ +#include + + .global _start + .global _stext + + .global _rambase + .global _ramvec + .global _ramstart + .global _ramend + +#ifdef CONFIG_INIT_LCD + .global splash_bits +#endif + + .data + +/* + * Set up the usable of RAM stuff. Size of RAM is determined then + * an initial stack set up at the end. + */ +.align 4 +_ramvec: +.long 0 +_rambase: +.long 0 +_ramstart: +.long 0 +_ramend: +.long 0 + +#ifdef CONFIG_INIT_LCD +splash_bits: +#include "bootlogo.rh" +#endif + + .text +_start: +_stext: movew #0x2700,%sr +#ifdef CONFIG_INIT_LCD + movel #splash_bits, 0xfffffA00 /* LSSA */ + moveb #0x28, 0xfffffA05 /* LVPW */ + movew #0x280, 0xFFFFFa08 /* LXMAX */ + movew #0x1df, 0xFFFFFa0a /* LYMAX */ + moveb #0, 0xfffffa29 /* LBAR */ + moveb #0, 0xfffffa25 /* LPXCD */ + moveb #0x08, 0xFFFFFa20 /* LPICF */ + moveb #0x01, 0xFFFFFA21 /* -ve pol */ + moveb #0x81, 0xfffffA27 /* LCKCON */ + movew #0xff00, 0xfffff412 /* LCD pins */ +#endif + moveal #__ramend-CONFIG_MEMORY_RESERVE*0x100000 - 0x10, %sp + movew #32767, %d0 /* PLL settle wait loop */ +1: subq #1, %d0 + bne 1b + + /* Copy data segment from ROM to RAM */ + moveal #__data_rom_start, %a0 + moveal #_sdata, %a1 + moveal #_edata, %a2 + + /* Copy %a0 to %a1 until %a1 == %a2 */ +1: movel %a0@+, %a1@+ + cmpal %a1, %a2 + bhi 1b + + moveal #_sbss, %a0 + moveal #_ebss, %a1 + /* Copy 0 to %a0 until %a0 == %a1 */ + +1: + clrl %a0@+ + cmpal %a0, %a1 + bhi 1b + + movel #_sdata, %d0 + movel %d0, _rambase + movel #_ebss, %d0 + movel %d0, _ramstart + movel #__ramend-CONFIG_MEMORY_RESERVE*0x100000, %d0 + movel %d0, _ramend + movel #__ramvec, %d0 + movel %d0, _ramvec + +/* + * load the current task pointer and stack + */ + lea init_thread_union, %a0 + lea 0x2000(%a0), %sp + +1: jsr start_kernel + bra 1b +_exit: + + jmp _exit + + +putc: + moveb %d7,0xfffff907 +1: + movew 0xfffff906, %d7 + andw #0x2000, %d7 + beq 1b + rts + + .data +env: + .long 0 + .text + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68EZ328/ucsimm/crt0_himem.S linux.2.5.40-ac2/arch/m68knommu/platform/68EZ328/ucsimm/crt0_himem.S --- linux.2.5.40/arch/m68knommu/platform/68EZ328/ucsimm/crt0_himem.S 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68EZ328/ucsimm/crt0_himem.S 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1 @@ +#include "crt0_fixed.S" diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68EZ328/ucsimm/crt0_ram.S linux.2.5.40-ac2/arch/m68knommu/platform/68EZ328/ucsimm/crt0_ram.S --- linux.2.5.40/arch/m68knommu/platform/68EZ328/ucsimm/crt0_ram.S 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68EZ328/ucsimm/crt0_ram.S 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,172 @@ + .global __text_start + .global __main + .global __bss_start + .global __bss_end + .global __ram_start + .global __ram_end + .global __rom_start + .global __rom_end + .global __data_start + .global __data_end + + .global _rambase + .global _ramstart + + .global splash_bits + .global _start + .global _stext + +#define DEBUG +#define ROM_OFFSET 0x10C00000 +#define STACK_GAURD 0x10 + + .text + +_start: +_stext: + movew #0x2700, %sr /* Exceptions off! */ + + /* Init chip registers. uCsimm specific */ + moveb #0x00, 0xfffffb0b /* Watchdog off */ + moveb #0x10, 0xfffff000 /* SCR */ + + movew #0x2400, 0xfffff200 /* PLLCR */ + movew #0x0123, 0xfffff202 /* PLLFSR */ + + moveb #0x00, 0xfffff40b /* enable chip select */ + moveb #0x00, 0xfffff423 /* enable /DWE */ + moveb #0x08, 0xfffffd0d /* disable hardmap */ + moveb #0x07, 0xfffffd0e /* level 7 interrupt clear */ + + movew #0x8600, 0xfffff100 /* FLASH at 0x10c00000 */ + movew #0x018b, 0xfffff110 /* 2Meg, enable, 0ws */ + + movew #0x8f00, 0xfffffc00 /* DRAM configuration */ + movew #0x9667, 0xfffffc02 /* DRAM control */ + movew #0x0000, 0xfffff106 /* DRAM at 0x00000000 */ + movew #0x068f, 0xfffff116 /* 8Meg, enable, 0ws */ + + moveb #0x40, 0xfffff300 /* IVR */ + movel #0x007FFFFF, %d0 /* IMR */ + movel %d0, 0xfffff304 + + moveb 0xfffff42b, %d0 + andb #0xe0, %d0 + moveb %d0, 0xfffff42b + + moveb #0x08, 0xfffff907 /* Ignore CTS */ + movew #0x010b, 0xfffff902 /* BAUD to 9600 */ + movew #0xe100, 0xfffff900 /* enable */ + + movew #16384, %d0 /* PLL settle wait loop */ +L0: + subw #1, %d0 + bne L0 +#ifdef DEBUG + moveq #70, %d7 /* 'F' */ + moveb %d7,0xfffff907 /* No absolute addresses */ +pclp1: + movew 0xfffff906, %d7 + andw #0x2000, %d7 + beq pclp1 +#endif /* DEBUG */ + +#ifdef CONFIG_RELOCATE + /* Copy me to RAM */ + moveal #__rom_start, %a0 + moveal #__ram_start, %a1 + moveal #__data_end, %a2 + + /* Copy %a0 to %a1 until %a1 == %a2 */ +LD1: + movel %a0@+, %d0 + movel %d0, %a1@+ + cmpal %a1, %a2 + bhi LD1 + +#ifdef DEBUG + moveq #74, %d7 /* 'J' */ + moveb %d7,0xfffff907 /* No absolute addresses */ +pclp2: + movew 0xfffff906, %d7 + andw #0x2000, %d7 + beq pclp2 +#endif /* DEBUG */ + /* jump into the RAM copy */ + jmp ram_jump +ram_jump: + +#endif /* CONFIG_RELOCATE */ + +#ifdef DEBUG + moveq #82, %d7 /* 'R' */ + moveb %d7,0xfffff907 /* No absolute addresses */ +pclp3: + movew 0xfffff906, %d7 + andw #0x2000, %d7 + beq pclp3 +#endif /* DEBUG */ + moveal #0x007ffff0, %ssp + moveal #__bss_start, %a0 + moveal #__bss_end, %a1 + + /* Copy 0 to %a0 until %a0 >= %a1 */ +L1: + movel #0, %a0@+ + cmpal %a0, %a1 + bhi L1 + +#ifdef DEBUG + moveq #67, %d7 /* 'C' */ + jsr putc +#endif /* DEBUG */ + + pea 0 + pea env + pea %sp@(4) + pea 0 + +#ifdef DEBUG + moveq #70, %d7 /* 'F' */ + jsr putc +#endif /* DEBUG */ + +lp: + jsr start_kernel + jmp lp +_exit: + + jmp _exit + +__main: + /* nothing */ + rts + +#ifdef DEBUG +putc: + moveb %d7,0xfffff907 +pclp: + movew 0xfffff906, %d7 + andw #0x2000, %d7 + beq pclp + rts +#endif /* DEBUG */ + + .data + +/* + * Set up the usable of RAM stuff. Size of RAM is determined then + * an initial stack set up at the end. + */ +.align 4 +_ramvec: +.long 0 +_rambase: +.long 0 +_ramstart: +.long 0 +_ramend: +.long 0 + +env: + .long 0 diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68EZ328/ucsimm/crt0_rom.S linux.2.5.40-ac2/arch/m68knommu/platform/68EZ328/ucsimm/crt0_rom.S --- linux.2.5.40/arch/m68knommu/platform/68EZ328/ucsimm/crt0_rom.S 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68EZ328/ucsimm/crt0_rom.S 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1 @@ +#include "crt0_fixed.S" diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68EZ328/ucsimm/fixed.ld linux.2.5.40-ac2/arch/m68knommu/platform/68EZ328/ucsimm/fixed.ld --- linux.2.5.40/arch/m68knommu/platform/68EZ328/ucsimm/fixed.ld 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68EZ328/ucsimm/fixed.ld 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,102 @@ + +jiffies = jiffies_64 + 4; + +SECTIONS +{ + .romvec : + { + _flashstart = . ; + _romvec = . ; + __rom_start = . ; + } > romvec + + .text : + { + _stext = . ; + *(.text) + . = ALIGN(0x4) ; + *(.text.*) + . = ALIGN(0x4) ; + *(.exitcall.exit) + . = ALIGN(0x4) ; + *(.kstrtab) + . = ALIGN(16); /* Exception table */ + __start___ex_table = .; + *(__ex_table) + __stop___ex_table = .; + + __start___ksymtab = .; /* Kernel symbol table */ + *(__ksymtab) + __stop___ksymtab = .; + + . = ALIGN(0x4) ; + _etext = . ; + __data_rom_start = . ; + } > flash + + .eflash : + { + _flashend = . ; + } > eflash + + .ramvec : + { + __ram_start = . ; + __ramvec = . ; + } > ramvec + + .data : + { + . = ALIGN(0x4) ; + _sdata = . ; + __data_start = . ; + + . = ALIGN(0x4) ; + *(.rodata) + . = ALIGN(0x4) ; + *(.data) + . = ALIGN(0x4) ; + *(.data.*) + + . = ALIGN(0x4) ; + __setup_start = .; + *(.setup.init) + . = ALIGN(0x4) ; + __setup_end = .; + + . = ALIGN(0x4) ; + __initcall_start = .; + *(.initcall1.init) + *(.initcall2.init) + *(.initcall3.init) + *(.initcall4.init) + *(.initcall5.init) + *(.initcall6.init) + *(.initcall7.init) + __initcall_end = .; + . = ALIGN(0x4) ; + + . = ALIGN(0x2000) ; + *(.data.init_task) + . = ALIGN(0x2000) ; + + _edata = . ; + } > ram + + .bss : + { + . = ALIGN(0x4) ; + _sbss = . ; + *(.bss) + . = ALIGN(0x4) ; + *(COMMON) + . = ALIGN(0x4) ; + _ebss = . ; + _end = . ; + } > ram + + .eram : + { + __ramend = . ; + } > eram +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68EZ328/ucsimm/himem.ld linux.2.5.40-ac2/arch/m68knommu/platform/68EZ328/ucsimm/himem.ld --- linux.2.5.40/arch/m68knommu/platform/68EZ328/ucsimm/himem.ld 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68EZ328/ucsimm/himem.ld 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,11 @@ +MEMORY + { + romvec : ORIGIN = 0x00600000, LENGTH = 0x00000400 + flash : ORIGIN = 0x00600400, LENGTH = 0x00200000 - 0x00010400 + eflash : ORIGIN = 0x007f0000, LENGTH = 0 + ramvec : ORIGIN = 0x00000000, LENGTH = 0x00000400 + ram : ORIGIN = 0x00020000, LENGTH = 0x00600000 - 0x00020000 + eram : ORIGIN = 0x00600000, LENGTH = 0 + } + +INCLUDE arch/m68knommu/platform/68EZ328/ucsimm/fixed.ld diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68EZ328/ucsimm/ram.ld linux.2.5.40-ac2/arch/m68knommu/platform/68EZ328/ucsimm/ram.ld --- linux.2.5.40/arch/m68knommu/platform/68EZ328/ucsimm/ram.ld 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68EZ328/ucsimm/ram.ld 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,110 @@ +MEMORY + { + romvec : ORIGIN = 0x10c10000, LENGTH = 0x00000400 + flash : ORIGIN = 0x10c10400, LENGTH = 0x00200000 - 0x00010400 + eflash : ORIGIN = 0x10e00000, LENGTH = 0 + ramvec : ORIGIN = 0x00000000, LENGTH = 0x00000400 + bvec : ORIGIN = 0x00020000, LENGTH = 0x00000400 + ram : ORIGIN = 0x00020400, LENGTH = 0x00800000 - 0x00020400 + eram : ORIGIN = 0x00800000, LENGTH = 0 + } + +jiffies = jiffies_64 + 4; + +SECTIONS +{ + .fakevec : + { + } > romvec + .rom : + { + __rom_start = . ; + } > flash + .eflash : + { + _flashend = . ; + } > eflash + .realvec : + { + _ramvec = . ; + } > ramvec + .romvec : + { + _romvec = . ; + } > bvec + .text : + { + __ram_start = . ; + text_start = . ; + *(.text) + *(.text.*) + *(.rodata) + . = ALIGN(0x4) ; + *(.kstrtab) + . = ALIGN(16); /* Exception table */ + __start___ex_table = .; + *(__ex_table) + __stop___ex_table = .; + + __start___ksymtab = .; /* Kernel symbol table */ + *(__ksymtab) + __stop___ksymtab = .; + + _etext = . ; + __data_rom_start = ALIGN ( 4 ) ; + } > ram + .data : + { + _sdata = . ; + __data_start = . ; + + . = ALIGN(0x2000) ; + *(.data.init_task) + . = ALIGN(0x2000) ; + + *(.data) + *(.data.*) + *(.setup.init) + *(.exitcall.exit) + + . = ALIGN(4096) ; + __init_begin = .; + *(.text.init) + *(.data.init) + . = ALIGN(16); + __setup_start = .; + *(.setup.init) + __setup_end = .; + __initcall_start = .; + *(.initcall1.init) + *(.initcall2.init) + *(.initcall3.init) + *(.initcall4.init) + *(.initcall5.init) + *(.initcall6.init) + *(.initcall7.init) + __initcall_end = .; + . = ALIGN(4) ; + __init_end = .; + + _edata = . ; + edata = ALIGN( 0x10 ) ; + } > ram + .bss : + { + _sbss = ALIGN( 0x10 ) ; + __bss_start = ALIGN( 0x10 ) ; + __data_end = ALIGN( 0x10 ) ; + *(.bss) + *(COMMON) + _ebss = . ; + __bss_end = . ; + end = ALIGN( 0x10 ) ; + _end = ALIGN( 0x10 ) ; + } > ram + .eram : + { + __ramend = . ; + _ramend = . ; + } > eram +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68EZ328/ucsimm/rom.ld linux.2.5.40-ac2/arch/m68knommu/platform/68EZ328/ucsimm/rom.ld --- linux.2.5.40/arch/m68knommu/platform/68EZ328/ucsimm/rom.ld 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68EZ328/ucsimm/rom.ld 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,11 @@ +MEMORY + { + romvec : ORIGIN = 0x10c10000, LENGTH = 0x00000400 + flash : ORIGIN = 0x10c10400, LENGTH = 0x001fec00 + eflash : ORIGIN = 0x10d00000, LENGTH = 0 + ramvec : ORIGIN = 0x00000000, LENGTH = 1024 + ram : ORIGIN = 0x00020000, LENGTH = 0x00800000 - 0x00020000 + eram : ORIGIN = 0x00800000, LENGTH = 0 + } + +INCLUDE arch/m68knommu/platform/68EZ328/ucsimm/fixed.ld diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68VZ328/de2/bootlogo.h linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/de2/bootlogo.h --- linux.2.5.40/arch/m68knommu/platform/68VZ328/de2/bootlogo.h 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/de2/bootlogo.h 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,3204 @@ +#define splash_width 640 +#define splash_height 480 +static unsigned char splash_bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 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linux.2.5.40/arch/m68knommu/platform/68VZ328/de2/config.c linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/de2/config.c --- linux.2.5.40/arch/m68knommu/platform/68VZ328/de2/config.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/de2/config.c 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,152 @@ +/* + * linux/arch/m68knommu/platform/MC68VZ328/de2/config.c + * + * Copyright (C) 1993 Hamish Macdonald + * Copyright (C) 1999 D. Jeff Dionne + * Copyright (C) 2001 Georges Menie, Ken Desmet + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive + * for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#define CLOCK_COMPARE (32768/HZ) + +static void dragen2_sched_init(void (*timer_routine)(int, void *, struct pt_regs *)) +{ + /* disable timer 1 */ + TCTL = 0; + + /* set ISR */ + request_irq(TMR_IRQ_NUM, timer_routine, IRQ_FLG_LOCK, "timer", NULL); + + /* Restart mode, Enable int, 32KHz */ + TCTL = TCTL_OM | TCTL_IRQEN | TCTL_CLKSOURCE_32KHZ; + TPRER = 0; + TCMP = CLOCK_COMPARE-1; + + /* Enable timer 1 */ + TCTL |= TCTL_TEN; +} + +static void dragen2_tick(void) +{ + /* Reset Timer1 */ + TSTAT &= 0; +} + +static unsigned long dragen2_gettimeoffset(void) +{ + unsigned long ticks, offset = 0; + + ticks = TCN; + + if (ticks > (CLOCK_COMPARE>>1)) { + /* check for pending interrupt */ + if (ISR & (1<>24)%24; + *min = (now>>16)%60; + *sec = now%60; +} + +static void dragen2_reset(void) +{ + cli(); + asm volatile (" + movel #-1, 0xFFFFF304; + moveb #0, 0xFFFFF300; + moveal #0x04000000, %a0; + moveal 0(%a0), %sp; + moveal 4(%a0), %a0; + jmp (%a0); + "); +} + +int dragen2_cs8900_setup(struct net_device *dev) +{ + /* Set the ETH hardware address from its flash monitor location */ + memcpy(dev->dev_addr, (void *)0x400fffa, 6); + dev->irq = INT1_IRQ_NUM; + return dev->base_addr = 0x08000041; +} + +static void init_hardware(void) +{ + /* CSGB Init */ + CSGBB = 0x4000; + CSB = 0x1a1; + + /* CS8900 init */ + /* PK3: hardware sleep function pin, active low */ + PKSEL |= PK(3); /* select pin as I/O */ + PKDIR |= PK(3); /* select pin as output */ + PKDATA |= PK(3); /* set pin high */ + + /* PF5: hardware reset function pin, active high */ + PFSEL |= PF(5); /* select pin as I/O */ + PFDIR |= PF(5); /* select pin as output */ + PFDATA &= ~PF(5); /* set pin low */ + + /* cs8900 hardware reset */ + PFDATA |= PF(5); + { volatile int i; for (i = 0; i < 32000; ++i); } + PFDATA &= ~PF(5); + + /* INT1 enable (cs8900 IRQ) */ + PDPOL &= ~PD(1); /* active high signal */ + PDIQEG &= ~PD(1); + PDIRQEN |= PD(1); /* IRQ enabled */ + +#ifdef CONFIG_68328_SERIAL_UART2 + /* Enable RXD TXD port bits to enable UART2 */ + PJSEL &= ~(PJ(5)|PJ(4)); +#endif +} + +void config_BSP(char *command, int len) +{ + void dragen2_trap_init(void); + + printk("68VZ328 DragonBallVZ support (c) 2001 Lineo, Inc.\n"); + command[0] = '\0'; /* no specific boot option */ + + init_hardware(); + + mach_sched_init = dragen2_sched_init; + mach_tick = dragen2_tick; + mach_gettimeoffset = dragen2_gettimeoffset; + mach_reset = dragen2_reset; + mach_trap_init = dragen2_trap_init; + mach_gettod = dragen2_gettod; +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68VZ328/de2/crt0_fixed.S linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/de2/crt0_fixed.S --- linux.2.5.40/arch/m68knommu/platform/68VZ328/de2/crt0_fixed.S 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/de2/crt0_fixed.S 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,159 @@ +#include + + .global _start + .global _stext + + .global _rambase + .global _ramvec + .global _ramstart + .global _ramend + +#ifdef CONFIG_INIT_LCD + .global splash_bits +#endif + + .data + +/* + * Set up the usable of RAM stuff. Size of RAM is determined then + * an initial stack set up at the end. + */ +.align 4 +_ramvec: +.long 0 +_rambase: +.long 0 +_ramstart: +.long 0 +_ramend: +.long 0 + +#ifdef CONFIG_INIT_LCD +splash_bits: +#include "bootlogo.rh" +#endif + + .text +_start: +_stext: + movew #0x2700,%sr + moveal #__ramend-CONFIG_MEMORY_RESERVE*0x100000 - 0x10, %sp + movel #0xffffffff, 0xfffff304 /* disable all interrupts */ + +#ifdef CONFIG_RAMKERNEL + /* Copy me from ROM to RAM */ + moveal #__rom_start, %a0 + moveal #__ram_start, %a1 + moveal #__data_end, %a2 + + /* Copy %a0 to %a1 until %a1 == %a2 */ +2: cmpal %a1, %a2 + beq 1f + movel %a0@+, %a1@+ + bra 2b +1: + /* jump into the RAM copy */ + jmp ram_jump +ram_jump: +#endif + +#ifdef CONFIG_INIT_LCD + movel #splash_bits, 0xfffffA00 /* LSSA */ + moveb #0x28, 0xfffffA05 /* LVPW */ + movew #0x280, 0xFFFFFa08 /* LXMAX */ + movew #0x1df, 0xFFFFFa0a /* LYMAX */ + moveb #0, 0xfffffa29 /* LBAR */ + moveb #0, 0xfffffa25 /* LPXCD */ + moveb #0x08, 0xFFFFFa20 /* LPICF */ + moveb #0x01, 0xFFFFFA21 /* -ve pol */ + moveb #0x81, 0xfffffA27 /* LCKCON */ + movew #0xff00, 0xfffff412 /* LCD pins */ +#endif + + moveq #13, %d7 /* '\r' */ + jsr putc + moveq #10, %d7 /* '\n' */ + jsr putc + moveq #65, %d7 /* 'A' */ + jsr putc + + movew #32767, %d0 /* PLL settle wait loop */ +1: subq #1, %d0 + bne 1b + + moveq #66, %d7 /* 'B' */ + jsr putc + +#ifndef CONFIG_RAMKERNEL + /* Copy data segment from ROM to RAM */ + moveal #__data_rom_start, %a0 + moveal #_sdata, %a1 + moveal #_edata, %a2 + + /* Copy %a0 to %a1 until %a1 == %a2 */ +2: cmpal %a1, %a2 + beq 1f + movel %a0@+, %a1@+ + bra 2b +1: +#endif + moveq #67, %d7 /* 'C' */ + jsr putc + + /* Initialize BSS segment to 0 */ + moveal #_sbss, %a0 + moveal #_ebss, %a1 + + /* Copy 0 to %a0 until %a0 == %a1 */ +2: cmpal %a0, %a1 + beq 1f + clrl %a0@+ + bra 2b +1: + moveq #68, %d7 /* 'D' */ + jsr putc + + movel #_sdata, %d0 + movel %d0, _rambase + movel #_ebss, %d0 + movel %d0, _ramstart + movel #__ramend-CONFIG_MEMORY_RESERVE*0x100000, %d0 + movel %d0, _ramend + movel #__ramvec, %d0 + movel %d0, _ramvec + + moveq #69, %d7 /* 'E' */ + jsr putc + +/* + * load the current task pointer and stack + */ + lea init_thread_union, %a0 + lea 0x2000(%a0), %sp + + moveq #70, %d7 /* 'F' */ + jsr putc + moveq #13, %d7 /* '\r' */ + jsr putc + moveq #10, %d7 /* '\n' */ + jsr putc + +1: jsr start_kernel + bra 1b + +_exit: + bra _exit + +putc: + moveb %d7,0xfffff907 +1: + movew 0xfffff906, %d7 + andw #0x2000, %d7 + beq 1b + rts + + .data +env: + .long 0 + .text + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68VZ328/de2/crt0_himem.S linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/de2/crt0_himem.S --- linux.2.5.40/arch/m68knommu/platform/68VZ328/de2/crt0_himem.S 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/de2/crt0_himem.S 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1 @@ +#include "crt0_fixed.S" diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68VZ328/de2/crt0_ram.S linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/de2/crt0_ram.S --- linux.2.5.40/arch/m68knommu/platform/68VZ328/de2/crt0_ram.S 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/de2/crt0_ram.S 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1 @@ +#include "crt0_fixed.S" diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68VZ328/de2/crt0_rom.S linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/de2/crt0_rom.S --- linux.2.5.40/arch/m68knommu/platform/68VZ328/de2/crt0_rom.S 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/de2/crt0_rom.S 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1 @@ +#include "crt0_fixed.S" diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68VZ328/de2/fixed.ld linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/de2/fixed.ld --- linux.2.5.40/arch/m68knommu/platform/68VZ328/de2/fixed.ld 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/de2/fixed.ld 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,102 @@ + +jiffies = jiffies_64 + 4; + +SECTIONS +{ + .romvec : + { + _flashstart = . ; + _romvec = . ; + __rom_start = . ; + } > romvec + + .text : + { + _stext = . ; + *(.text) + . = ALIGN(0x4) ; + *(.text.*) + . = ALIGN(0x4) ; + *(.exitcall.exit) + . = ALIGN(0x4) ; + *(.kstrtab) + . = ALIGN(16); /* Exception table */ + __start___ex_table = .; + *(__ex_table) + __stop___ex_table = .; + + __start___ksymtab = .; /* Kernel symbol table */ + *(__ksymtab) + __stop___ksymtab = .; + + . = ALIGN(0x4) ; + _etext = . ; + __data_rom_start = . ; + } > flash + + .eflash : + { + _flashend = . ; + } > eflash + + .ramvec : + { + __ram_start = . ; + __ramvec = . ; + } > ramvec + + .data : + { + . = ALIGN(0x4) ; + _sdata = . ; + __data_start = . ; + + . = ALIGN(0x4) ; + *(.rodata) + . = ALIGN(0x4) ; + *(.data) + . = ALIGN(0x4) ; + *(.data.*) + + . = ALIGN(0x4) ; + __setup_start = .; + *(.setup.init) + . = ALIGN(0x4) ; + __setup_end = .; + + . = ALIGN(0x4) ; + __initcall_start = .; + *(.initcall1.init) + *(.initcall2.init) + *(.initcall3.init) + *(.initcall4.init) + *(.initcall5.init) + *(.initcall6.init) + *(.initcall7.init) + __initcall_end = .; + . = ALIGN(0x4) ; + + . = ALIGN(0x2000) ; + *(.data.init_task) + . = ALIGN(0x2000) ; + + _edata = . ; + } > ram + + .bss : + { + . = ALIGN(0x4) ; + _sbss = . ; + *(.bss) + . = ALIGN(0x4) ; + *(COMMON) + . = ALIGN(0x4) ; + _ebss = . ; + _end = . ; + } > ram + + .eram : + { + __ramend = . ; + } > eram +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68VZ328/de2/himem.ld linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/de2/himem.ld --- linux.2.5.40/arch/m68knommu/platform/68VZ328/de2/himem.ld 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/de2/himem.ld 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,11 @@ +MEMORY + { + romvec : ORIGIN = 0x01e00000, LENGTH = 1k + flash : ORIGIN = 0x01e00400, LENGTH = 2M - 1k + eflash : ORIGIN = 0x02000000, LENGTH = 0 + ramvec : ORIGIN = 0x00000000, LENGTH = 1k + ram : ORIGIN = 0x00010000, LENGTH = 30M - 64k + eram : ORIGIN = 0x01e00000, LENGTH = 0 + } + +INCLUDE arch/m68knommu/platform/68VZ328/de2/fixed.ld diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68VZ328/de2/ints.c linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/de2/ints.c --- linux.2.5.40/arch/m68knommu/platform/68VZ328/de2/ints.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/de2/ints.c 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,226 @@ +/* + * linux/arch/m68knommu/platform/MC68VZ328/de2/ints.c + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive + * for more details. + * + * Copyright 1996 Roman Zippel + * Copyright 1999 D. Jeff Dionne + * Copyright 2002 Georges Menie + * + */ + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +#include "traps_proto.h" + +/* irq node variables for the 32 (potential) on chip sources */ +#define INTERNAL_IRQS 32 +static irq_node_t int_irq_list[INTERNAL_IRQS]; +static int int_irq_count[INTERNAL_IRQS]; +unsigned int local_irq_count[NR_CPUS]; + +/* The number of spurious interrupts */ +volatile unsigned int num_spurious; + +/* + * This function should be called during kernel startup to initialize + * the IRQ handling routines. + */ + +void init_IRQ(void) +{ + int i; + + for (i = 0; i < INTERNAL_IRQS; i++) { + int_irq_list[i].handler = NULL; + int_irq_count[i] = 0; + } + + /* turn off all interrupts */ + IMR = ~0; +} + +int request_irq(unsigned int irq, void (*handler)(int, void *, struct pt_regs *), + unsigned long flags, const char *devname, void *dev_id) +{ + if (irq >= INTERNAL_IRQS) { + printk ("%s: Unknown IRQ %d from %s\n", __FUNCTION__, irq, devname); + return -ENXIO; + } + + if (!(int_irq_list[irq].flags & IRQ_FLG_STD)) { + if (int_irq_list[irq].flags & IRQ_FLG_LOCK) { + printk("%s: IRQ %d from %s is not replaceable\n", + __FUNCTION__, irq, int_irq_list[irq].devname); + return -EBUSY; + } + if (flags & IRQ_FLG_REPLACE) { + printk("%s: %s can't replace IRQ %d from %s\n", + __FUNCTION__, devname, irq, int_irq_list[irq].devname); + return -EBUSY; + } + } + + int_irq_list[irq].handler = handler; + int_irq_list[irq].flags = flags; + int_irq_list[irq].dev_id = dev_id; + int_irq_list[irq].devname = devname; + + IMR &= ~(1<= INTERNAL_IRQS) { + printk ("%s: Unknown IRQ %d\n", __FUNCTION__, irq); + return; + } + + if (int_irq_list[irq].dev_id != dev_id) + printk("%s: removing probably wrong IRQ %d from %s\n", + __FUNCTION__, irq, int_irq_list[irq].devname); + + int_irq_list[irq].handler = bad_interrupt; + int_irq_list[irq].flags = IRQ_FLG_STD; + int_irq_list[irq].dev_id = NULL; + int_irq_list[irq].devname = NULL; + + IMR |= 1<= INTERNAL_IRQS + ++kstat.irqs[0][irq]; +#endif + if (int_irq_list[irq].handler) { + int_irq_list[irq].handler(irq, int_irq_list[irq].dev_id, &fp->ptregs); + int_irq_count[irq]++; + } else { + ++num_spurious; + printk("unregistered interrupt %d!\nTurning it off in the IMR...\n", irq); + IMR |= mask; + } + pend &= ~mask; + } +} + +int show_interrupts(struct seq_file *p, void *v) +{ + int i; + + for (i = 0; i < NR_IRQS; i++) { + if (int_irq_list[i].flags & IRQ_FLG_STD) + continue; + + seq_printf(p, "%3d: %10u ", i, + (i ? kstat.irqs[0][i] : num_spurious)); + if (int_irq_list[i].flags & IRQ_FLG_LOCK) + seq_printf(p, "L "); + else + seq_printf(p, " "); + seq_printf(p, "%s\n", int_irq_list[i].devname); + } + + if (mach_get_irq_list) + mach_get_irq_list(p, v); + return(0); +} + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68VZ328/de2/ram.ld linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/de2/ram.ld --- linux.2.5.40/arch/m68knommu/platform/68VZ328/de2/ram.ld 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/de2/ram.ld 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,110 @@ +MEMORY + { + romvec : ORIGIN = 0x04030000, LENGTH = 1k + flash : ORIGIN = 0x04030400, LENGTH = 2M - 197k + eflash : ORIGIN = 0x04200000, LENGTH = 0 + ramvec : ORIGIN = 0x00000000, LENGTH = 1k + bvec : ORIGIN = 0x00010000, LENGTH = 1k + ram : ORIGIN = 0x00010400, LENGTH = 32M - 65k + eram : ORIGIN = 0x02000000, LENGTH = 0 + } + +jiffies = jiffies_64 + 4; + +SECTIONS +{ + .fakevec : + { + } > romvec + .rom : + { + __rom_start = . ; + } > flash + .eflash : + { + _flashend = . ; + } > eflash + .realvec : + { + __ramvec = . ; + } > ramvec + .romvec : + { + _romvec = . ; + } > bvec + .text : + { + __ram_start = . ; + text_start = . ; + *(.text) + *(.text.*) + *(.rodata) + . = ALIGN(0x4) ; + *(.kstrtab) + . = ALIGN(16); /* Exception table */ + __start___ex_table = .; + *(__ex_table) + __stop___ex_table = .; + + __start___ksymtab = .; /* Kernel symbol table */ + *(__ksymtab) + __stop___ksymtab = .; + + _etext = . ; + __data_rom_start = ALIGN ( 4 ) ; + } > ram + .data : + { + _sdata = . ; + __data_start = . ; + + . = ALIGN(0x2000) ; + *(.data.init_task) + . = ALIGN(0x2000) ; + + *(.data) + *(.data.*) + *(.setup.init) + *(.exitcall.exit) + + . = ALIGN(4096) ; + __init_begin = .; + *(.text.init) + *(.data.init) + . = ALIGN(16); + __setup_start = .; + *(.setup.init) + __setup_end = .; + __initcall_start = .; + *(.initcall1.init) + *(.initcall2.init) + *(.initcall3.init) + *(.initcall4.init) + *(.initcall5.init) + *(.initcall6.init) + *(.initcall7.init) + __initcall_end = .; + . = ALIGN(4) ; + __init_end = .; + + _edata = . ; + edata = ALIGN( 0x10 ) ; + } > ram + .bss : + { + _sbss = ALIGN( 0x10 ) ; + __bss_start = ALIGN( 0x10 ) ; + __data_end = ALIGN( 0x10 ) ; + *(.bss) + *(COMMON) + _ebss = . ; + __bss_end = . ; + end = ALIGN( 0x10 ) ; + _end = ALIGN( 0x10 ) ; + } > ram + .eram : + { + __ramend = . ; + _ramend = . ; + } > eram +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68VZ328/de2/rom.ld linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/de2/rom.ld --- linux.2.5.40/arch/m68knommu/platform/68VZ328/de2/rom.ld 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/de2/rom.ld 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,11 @@ +MEMORY + { + romvec : ORIGIN = 0x04030000, LENGTH = 1k + flash : ORIGIN = 0x04030400, LENGTH = 2M - 197k + eflash : ORIGIN = 0x04200000, LENGTH = 0 + ramvec : ORIGIN = 0x00000000, LENGTH = 1k + ram : ORIGIN = 0x00010000, LENGTH = 32M - 64k + eram : ORIGIN = 0x02000000, LENGTH = 0 + } + +INCLUDE arch/m68knommu/platform/68VZ328/de2/fixed.ld diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68VZ328/de2/traps.c linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/de2/traps.c --- linux.2.5.40/arch/m68knommu/platform/68VZ328/de2/traps.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/de2/traps.c 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,72 @@ +/* + * linux/arch/m68knommu/platform/MC68VZ328/de2/traps.c -- general exception handling code + * + * Cloned from Linux/m68k. + * + * No original Copyright holder listed, + * Probabily original (C) Roman Zippel (assigned DJD, 1999) + * + * Copyright 1999-2000 D. Jeff Dionne, + * Copyright 2000-2001 Lineo, Inc. D. Jeff Dionne + * Copyright 2002 Georges Menie + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive + * for more details. + * + */ + +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include "traps_proto.h" + +extern e_vector *_ramvec; + +void dragen2_trap_init(void) +{ + int i; + + /* set up the vectors */ + for (i=2; i < 32; ++i) + _ramvec[i] = bad_interrupt; + + _ramvec[2] = buserr; + _ramvec[3] = exception3; + _ramvec[4] = exception4; + _ramvec[5] = exception5; + _ramvec[6] = exception6; + _ramvec[7] = exception7; + _ramvec[8] = exception8; + _ramvec[9] = exception9; + _ramvec[10] = exception10; + _ramvec[11] = exception11; + + _ramvec[14] = exception14; + _ramvec[15] = exception15; + + _ramvec[32] = system_call; + _ramvec[33] = trap1; + + _ramvec[47] = trap15; + + _ramvec[64] = bad_interrupt; + _ramvec[65] = inthandler1; + _ramvec[66] = inthandler2; + _ramvec[67] = inthandler3; + _ramvec[68] = inthandler4; + _ramvec[69] = inthandler5; + _ramvec[70] = inthandler6; + _ramvec[71] = inthandler7; + + IVR = 0x40; /* Set interrupt base to 64 */ +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68VZ328/de2/traps_proto.h linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/de2/traps_proto.h --- linux.2.5.40/arch/m68knommu/platform/68VZ328/de2/traps_proto.h 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/de2/traps_proto.h 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,23 @@ +asmlinkage void buserr(void); +asmlinkage void exception3(void); +asmlinkage void exception4(void); +asmlinkage void exception5(void); +asmlinkage void exception6(void); +asmlinkage void exception7(void); +asmlinkage void exception8(void); +asmlinkage void exception9(void); +asmlinkage void exception10(void); +asmlinkage void exception11(void); +asmlinkage void exception14(void); +asmlinkage void exception15(void); +asmlinkage void bad_interrupt(void); +asmlinkage void inthandler1(void); +asmlinkage void inthandler2(void); +asmlinkage void inthandler3(void); +asmlinkage void inthandler4(void); +asmlinkage void inthandler5(void); +asmlinkage void inthandler6(void); +asmlinkage void inthandler7(void); +asmlinkage void system_call(void); +asmlinkage void trap1(void); +asmlinkage void trap15(void); diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68VZ328/Makefile linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/Makefile --- linux.2.5.40/arch/m68knommu/platform/68VZ328/Makefile 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/Makefile 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,34 @@ +# +# Makefile for the linux kernel. +# +# Reuse any files we can from the 68328 base +# + +VPATH := $(VPATH):$(BOARD):../68328 + +# Note! Dependencies are done automagically by 'make dep', which also +# removes any old dependencies. DON'T put your own dependencies here +# unless it's something special (ie not a .c file). +# +AFLAGS += -D__ASSEMBLY__ + +all: $(BOARD)/crt0_$(MODEL).o entry.o platform.o +O_TARGET := platform.o +obj-y := entry.o config.o signal.o traps.o ints.o + +$(BOARD)/crt0_$(MODEL).o: $(BOARD)/crt0_$(MODEL).S $(BOARD)/crt0_fixed.S $(BOARD)/bootlogo.rh + +entry.o: entry.S m68k_defs.h + +m68k_defs.h: ../../kernel/m68k_defs.c ../../kernel/m68k_defs.head + rm -f m68k_defs.d + $(CC) $(filter-out -MD,$(CFLAGS)) -S ../../kernel/m68k_defs.c + cp ../../kernel/m68k_defs.head m68k_defs.h + grep '^#define' m68k_defs.s >> m68k_defs.h + rm m68k_defs.s +-include m68k_defs.d + +$(BOARD)/bootlogo.rh: $(BOARD)/bootlogo.h + perl ../68328/tools/bootlogo.pl < $(BOARD)/bootlogo.h > $(BOARD)/bootlogo.rh + +include $(TOPDIR)/Rules.make diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68VZ328/Rules.make linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/Rules.make --- linux.2.5.40/arch/m68knommu/platform/68VZ328/Rules.make 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/Rules.make 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,39 @@ +# +# 68VZ328/Makefile +# +# This file is included by the global makefile so that you can add your own +# platform-specific flags and dependencies. +# +# This file is subject to the terms and conditions of the GNU General Public +# License. See the file "COPYING" in the main directory of this archive +# for more details. +# +# Copyright (c) 2001 Lineo, Inc, +# Copyright (c) 2000,2001 D. Jeff Dionne +# Copyright (c) 1998,1999 D. Jeff Dionne +# Copyright (C) 1998 Kenneth Albanowski +# Copyright (C) 1994 Hamish Macdonald +# +# 68VZ328 Fixes By Evan Stawnyczy +# + +GCC_DIR = $(shell $(CC) -v 2>&1 | grep specs | sed -e 's/.* \(.*\)specs/\1\./') + +INCGCC = $(GCC_DIR)/include +LIBGCC = $(GCC_DIR)/m68000/libgcc.a + +CFLAGS := -fno-builtin -DNO_CACHE $(CFLAGS) -pipe -DCONFIG_NO_MMU -DNO_FPU -DNO_CACHE -m68000 -D__ELF__ -DNO_FORGET -DUTS_SYSNAME='"uClinux"' -D__linux__ +AFLAGS := $(AFLAGS) -pipe -DCONFIG_NO_MMU -DNO_FPU -DNO_CACHE -m68000 -D__ELF__ -DUTS_SYSNAME='"uClinux"' -Wa,--bitwise-or -I. + +LDFLAGS_vmlinux = -T arch/$(ARCH)/platform/$(PLATFORM)/$(BOARD)/$(MODEL).ld + +HEAD := arch/$(ARCH)/platform/$(PLATFORM)/$(BOARD)/crt0_$(MODEL).o + +SUBDIRS := arch/$(ARCH)/kernel arch/$(ARCH)/mm arch/$(ARCH)/lib \ + arch/$(ARCH)/platform/$(PLATFORM) $(SUBDIRS) + +CORE_FILES := arch/$(ARCH)/kernel/kernel.o arch/$(ARCH)/mm/mm.o \ + arch/$(ARCH)/platform/$(PLATFORM)/platform.o $(CORE_FILES) + +LIBS += arch/$(ARCH)/lib/lib.a $(LIBGCC) + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68VZ328/ucdimm/bootlogo.h linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/ucdimm/bootlogo.h --- linux.2.5.40/arch/m68knommu/platform/68VZ328/ucdimm/bootlogo.h 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/ucdimm/bootlogo.h 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,3204 @@ +#define splash_width 640 +#define splash_height 480 +static unsigned char splash_bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 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0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + }; diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68VZ328/ucdimm/bootstd.h linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/ucdimm/bootstd.h --- linux.2.5.40/arch/m68knommu/platform/68VZ328/ucdimm/bootstd.h 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/ucdimm/bootstd.h 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,132 @@ +/* bootstd.h: Bootloader system call interface + * + * (c) 1999, Rt-Control, Inc. + */ + +#ifndef __BOOTSTD_H__ +#define __BOOTSTD_H__ + +#define NR_BSC 21 /* last used bootloader system call */ + +#define __BN_reset 0 /* reset and start the bootloader */ +#define __BN_test 1 /* tests the system call interface */ +#define __BN_exec 2 /* executes a bootloader image */ +#define __BN_exit 3 /* terminates a bootloader image */ +#define __BN_program 4 /* program FLASH from a chain */ +#define __BN_erase 5 /* erase sector(s) of FLASH */ +#define __BN_open 6 +#define __BN_write 7 +#define __BN_read 8 +#define __BN_close 9 +#define __BN_mmap 10 /* map a file descriptor into memory */ +#define __BN_munmap 11 /* remove a file to memory mapping */ +#define __BN_gethwaddr 12 /* get the hardware address of my interfaces */ +#define __BN_getserialnum 13 /* get the serial number of this board */ +#define __BN_getbenv 14 /* get a bootloader envvar */ +#define __BN_setbenv 15 /* get a bootloader envvar */ +#define __BN_setpmask 16 /* set the protection mask */ +#define __BN_readenv 17 /* read environment variables */ +#define __BN_flash_chattr_range 18 +#define __BN_flash_erase_range 19 +#define __BN_flash_write_range 20 + +/* Calling conventions compatible to (uC)linux/68k + * We use simmilar macros to call into the bootloader as for uClinux + */ + +#define __bsc_return(type, res) \ +do { \ + if ((unsigned long)(res) >= (unsigned long)(-64)) { \ + /* let errno be a function, preserve res in %d0 */ \ + int __err = -(res); \ + errno = __err; \ + res = -1; \ + } \ + return (type)(res); \ +} while (0) + +#define _bsc0(type,name) \ +type name(void) \ +{ \ + register long __res __asm__ ("%d0") = __BN_##name; \ + __asm__ __volatile__ ("trap #2" \ + : "=g" (__res) \ + : "0" (__res) \ + : "%d0"); \ + __bsc_return(type,__res); \ +} + +#define _bsc1(type,name,atype,a) \ +type name(atype a) \ +{ \ + register long __res __asm__ ("%d0") = __BN_##name; \ + register long __a __asm__ ("%d1") = (long)a; \ + __asm__ __volatile__ ("trap #2" \ + : "=g" (__res) \ + : "0" (__res), "d" (__a) \ + : "%d0"); \ + __bsc_return(type,__res); \ +} + +#define _bsc2(type,name,atype,a,btype,b) \ +type name(atype a, btype b) \ +{ \ + register long __res __asm__ ("%d0") = __BN_##name; \ + register long __a __asm__ ("%d1") = (long)a; \ + register long __b __asm__ ("%d2") = (long)b; \ + __asm__ __volatile__ ("trap #2" \ + : "=g" (__res) \ + : "0" (__res), "d" (__a), "d" (__b) \ + : "%d0"); \ + __bsc_return(type,__res); \ +} + +#define _bsc3(type,name,atype,a,btype,b,ctype,c) \ +type name(atype a, btype b, ctype c) \ +{ \ + register long __res __asm__ ("%d0") = __BN_##name; \ + register long __a __asm__ ("%d1") = (long)a; \ + register long __b __asm__ ("%d2") = (long)b; \ + register long __c __asm__ ("%d3") = (long)c; \ + __asm__ __volatile__ ("trap #2" \ + : "=g" (__res) \ + : "0" (__res), "d" (__a), "d" (__b), \ + "d" (__c) \ + : "%d0"); \ + __bsc_return(type,__res); \ +} + +#define _bsc4(type,name,atype,a,btype,b,ctype,c,dtype,d) \ +type name(atype a, btype b, ctype c, dtype d) \ +{ \ + register long __res __asm__ ("%d0") = __BN_##name; \ + register long __a __asm__ ("%d1") = (long)a; \ + register long __b __asm__ ("%d2") = (long)b; \ + register long __c __asm__ ("%d3") = (long)c; \ + register long __d __asm__ ("%d4") = (long)d; \ + __asm__ __volatile__ ("trap #2" \ + : "=g" (__res) \ + : "0" (__res), "d" (__a), "d" (__b), \ + "d" (__c), "d" (__d) \ + : "%d0"); \ + __bsc_return(type,__res); \ +} + +#define _bsc5(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e) \ +type name(atype a, btype b, ctype c, dtype d, etype e) \ +{ \ + register long __res __asm__ ("%d0") = __BN_##name; \ + register long __a __asm__ ("%d1") = (long)a; \ + register long __b __asm__ ("%d2") = (long)b; \ + register long __c __asm__ ("%d3") = (long)c; \ + register long __d __asm__ ("%d4") = (long)d; \ + register long __e __asm__ ("%d5") = (long)e; \ + __asm__ __volatile__ ("trap #2" \ + : "=g" (__res) \ + : "0" (__res), "d" (__a), "d" (__b), \ + "d" (__c), "d" (__d), "d" (__e) \ + : "%d0"); \ + __bsc_return(type,__res); \ +} + +#endif /* __BOOTSTD_H__ */ diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68VZ328/ucdimm/config.c linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/ucdimm/config.c --- linux.2.5.40/arch/m68knommu/platform/68VZ328/ucdimm/config.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/ucdimm/config.c 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,123 @@ +/* + * linux/arch/$(ARCH)/platform/$(PLATFORM)/config.c + * + * Copyright (C) 1993 Hamish Macdonald + * Copyright (C) 1999 D. Jeff Dionne + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive + * for more details. + */ + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include "bootstd.h" +#include + +void BSP_sched_init(void (*timer_routine)(int, void *, struct pt_regs *)) +{ + /* Restart mode, Enable int, 32KHz, Enable timer */ + TCTL = TCTL_OM | TCTL_IRQEN | TCTL_CLKSOURCE_32KHZ | TCTL_TEN; + /* Set prescaler (Divide 32KHz by 32)*/ + TPRER = 31; + /* Set compare register 32Khz / 32 / 10 = 100 */ + TCMP = 10; + + request_irq(TMR_IRQ_NUM, timer_routine, IRQ_FLG_LOCK, "timer", NULL); +} + +void BSP_tick(void) +{ + /* Reset Timer1 */ + TSTAT &= 0; +} + +unsigned long BSP_gettimeoffset (void) +{ + return 0; +} + +void BSP_gettod (int *yearp, int *monp, int *dayp, + int *hourp, int *minp, int *secp) +{ +} + +int BSP_hwclk(int op, struct hwclk_time *t) +{ + if (!op) { + /* read */ + } else { + /* write */ + } + return 0; +} + +int BSP_set_clock_mmss (unsigned long nowtime) +{ +#if 0 + short real_seconds = nowtime % 60, real_minutes = (nowtime / 60) % 60; + + tod->second1 = real_seconds / 10; + tod->second2 = real_seconds % 10; + tod->minute1 = real_minutes / 10; + tod->minute2 = real_minutes % 10; +#endif + return 0; +} + +void BSP_reset (void) +{ + cli(); + asm volatile (" + moveal #0x10c00000, %a0; + moveb #0, 0xFFFFF300; + moveal 0(%a0), %sp; + moveal 4(%a0), %a0; + jmp (%a0); + "); +} + +unsigned char *cs8900a_hwaddr; +static int errno; + +_bsc0(char *, getserialnum) +_bsc1(unsigned char *, gethwaddr, int, a) +_bsc1(char *, getbenv, char *, a) + +void config_BSP(char *command, int len) +{ + unsigned char *p; + + printk("\n68VZ328 DragonBallVZ support (c) 2001 Lineo, Inc.\n"); + + printk("uCdimm serial string [%s]\n",getserialnum()); + p = cs8900a_hwaddr = gethwaddr(0); + printk("uCdimm hwaddr %.2x:%.2x:%.2x:%.2x:%.2x:%.2x\n", + p[0], p[1], p[2], p[3], p[4], p[5]); + p = getbenv("APPEND"); + if (p) strcpy(p,command); + else command[0] = 0; + + mach_sched_init = BSP_sched_init; + mach_tick = BSP_tick; + mach_gettimeoffset = BSP_gettimeoffset; + mach_gettod = BSP_gettod; + mach_hwclk = NULL; + mach_set_clock_mmss = NULL; + // mach_mksound = NULL; + mach_reset = BSP_reset; + // mach_debug_init = NULL; + + config_M68VZ328_irq(); +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68VZ328/ucdimm/crt0_fixed.S linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/ucdimm/crt0_fixed.S --- linux.2.5.40/arch/m68knommu/platform/68VZ328/ucdimm/crt0_fixed.S 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/ucdimm/crt0_fixed.S 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,109 @@ +#include + + .global _start + .global _stext + + .global _rambase + .global _ramvec + .global _ramstart + .global _ramend + +#ifdef CONFIG_INIT_LCD + .global splash_bits +#endif + + .data + +/* + * Set up the usable of RAM stuff. Size of RAM is determined then + * an initial stack set up at the end. + */ +.align 4 +_ramvec: +.long 0 +_rambase: +.long 0 +_ramstart: +.long 0 +_ramend: +.long 0 + +#ifdef CONFIG_INIT_LCD +splash_bits: +#include "bootlogo.rh" +#endif + + .text +_start: +_stext: movew #0x2700,%sr +#ifdef CONFIG_INIT_LCD + movel #splash_bits, 0xfffffA00 /* LSSA */ + moveb #0x28, 0xfffffA05 /* LVPW */ + movew #0x280, 0xFFFFFa08 /* LXMAX */ + movew #0x1df, 0xFFFFFa0a /* LYMAX */ + moveb #0, 0xfffffa29 /* LBAR */ + moveb #0, 0xfffffa25 /* LPXCD */ + moveb #0x08, 0xFFFFFa20 /* LPICF */ + moveb #0x01, 0xFFFFFA21 /* -ve pol */ + moveb #0x81, 0xfffffA27 /* LCKCON */ + movew #0xff00, 0xfffff412 /* LCD pins */ +#endif + moveal #__ramend-CONFIG_MEMORY_RESERVE*0x100000 - 0x10, %sp + movew #32767, %d0 /* PLL settle wait loop */ +1: subq #1, %d0 + bne 1b + + /* Copy data segment from ROM to RAM */ + moveal #__data_rom_start, %a0 + moveal #_sdata, %a1 + moveal #_edata, %a2 + + /* Copy %a0 to %a1 until %a1 == %a2 */ +1: movel %a0@+, %a1@+ + cmpal %a1, %a2 + bhi 1b + + moveal #_sbss, %a0 + moveal #_ebss, %a1 + /* Copy 0 to %a0 until %a0 == %a1 */ + +1: + clrl %a0@+ + cmpal %a0, %a1 + bhi 1b + + movel #_sdata, %d0 + movel %d0, _rambase + movel #_ebss, %d0 + movel %d0, _ramstart + movel #__ramend-CONFIG_MEMORY_RESERVE*0x100000, %d0 + movel %d0, _ramend + movel #__ramvec, %d0 + movel %d0, _ramvec + +/* + * load the current task pointer and stack + */ + lea init_thread_union, %a0 + lea 0x2000(%a0), %sp + +1: jsr start_kernel + bra 1b +_exit: + + jmp _exit + + +putc: + moveb %d7,0xfffff907 +1: + movew 0xfffff906, %d7 + andw #0x2000, %d7 + beq 1b + rts + + .data +env: + .long 0 + .text + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68VZ328/ucdimm/crt0_himem.S linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/ucdimm/crt0_himem.S --- linux.2.5.40/arch/m68knommu/platform/68VZ328/ucdimm/crt0_himem.S 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/ucdimm/crt0_himem.S 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1 @@ +#include "crt0_fixed.S" diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68VZ328/ucdimm/crt0_ram.S linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/ucdimm/crt0_ram.S --- linux.2.5.40/arch/m68knommu/platform/68VZ328/ucdimm/crt0_ram.S 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/ucdimm/crt0_ram.S 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,176 @@ +#include + + .global __text_start + .global __main + .global __bss_start + .global __bss_end + .global __ram_start + .global __ram_end + .global __rom_start + .global __rom_end + .global __data_start + .global __data_end + + .global _rambase + .global _ramstart + + .global splash_bits + .global _start + .global _stext + +#define DEBUG +#define ROM_OFFSET 0x10C00000 +#define STACK_GAURD 0x10 + + .text + +_start: +_stext: + movew #0x2700, %sr /* Exceptions off! */ + +#if 0 + /* Init chip registers. uCsimm specific */ + moveb #0x00, 0xfffffb0b /* Watchdog off */ + moveb #0x10, 0xfffff000 /* SCR */ + + movew #0x2400, 0xfffff200 /* PLLCR */ + movew #0x0123, 0xfffff202 /* PLLFSR */ + + moveb #0x00, 0xfffff40b /* enable chip select */ + moveb #0x00, 0xfffff423 /* enable /DWE */ + moveb #0x08, 0xfffffd0d /* disable hardmap */ + moveb #0x07, 0xfffffd0e /* level 7 interrupt clear */ + + movew #0x8600, 0xfffff100 /* FLASH at 0x10c00000 */ + movew #0x018b, 0xfffff110 /* 2Meg, enable, 0ws */ + + movew #0x8f00, 0xfffffc00 /* DRAM configuration */ + movew #0x9667, 0xfffffc02 /* DRAM control */ + movew #0x0000, 0xfffff106 /* DRAM at 0x00000000 */ + movew #0x068f, 0xfffff116 /* 8Meg, enable, 0ws */ + + moveb #0x40, 0xfffff300 /* IVR */ + movel #0x007FFFFF, %d0 /* IMR */ + movel %d0, 0xfffff304 + + moveb 0xfffff42b, %d0 + andb #0xe0, %d0 + moveb %d0, 0xfffff42b + + moveb #0x08, 0xfffff907 /* Ignore CTS */ + movew #0x010b, 0xfffff902 /* BAUD to 9600 */ + movew #0xe100, 0xfffff900 /* enable */ +#endif + + movew #16384, %d0 /* PLL settle wait loop */ +L0: + subw #1, %d0 + bne L0 +#ifdef DEBUG + moveq #70, %d7 /* 'F' */ + moveb %d7,0xfffff907 /* No absolute addresses */ +pclp1: + movew 0xfffff906, %d7 + andw #0x2000, %d7 + beq pclp1 +#endif /* DEBUG */ + +#ifdef CONFIG_RELOCATE + /* Copy me to RAM */ + moveal #__rom_start, %a0 + moveal #__ram_start, %a1 + moveal #__data_end, %a2 + + /* Copy %a0 to %a1 until %a1 == %a2 */ +LD1: + movel %a0@+, %d0 + movel %d0, %a1@+ + cmpal %a1, %a2 + bhi LD1 + +#ifdef DEBUG + moveq #74, %d7 /* 'J' */ + moveb %d7,0xfffff907 /* No absolute addresses */ +pclp2: + movew 0xfffff906, %d7 + andw #0x2000, %d7 + beq pclp2 +#endif /* DEBUG */ + /* jump into the RAM copy */ + jmp ram_jump +ram_jump: + +#endif /* CONFIG_RELOCATE */ + +#ifdef DEBUG + moveq #82, %d7 /* 'R' */ + moveb %d7,0xfffff907 /* No absolute addresses */ +pclp3: + movew 0xfffff906, %d7 + andw #0x2000, %d7 + beq pclp3 +#endif /* DEBUG */ + moveal #0x007ffff0, %ssp + moveal #__bss_start, %a0 + moveal #__bss_end, %a1 + + /* Copy 0 to %a0 until %a0 >= %a1 */ +L1: + movel #0, %a0@+ + cmpal %a0, %a1 + bhi L1 + +#ifdef DEBUG + moveq #67, %d7 /* 'C' */ + jsr putc +#endif /* DEBUG */ + + pea 0 + pea env + pea %sp@(4) + pea 0 + +#ifdef DEBUG + moveq #70, %d7 /* 'F' */ + jsr putc +#endif /* DEBUG */ + +lp: + jsr start_kernel + jmp lp +_exit: + + jmp _exit + +__main: + /* nothing */ + rts + +#ifdef DEBUG +putc: + moveb %d7,0xfffff907 +pclp: + movew 0xfffff906, %d7 + andw #0x2000, %d7 + beq pclp + rts +#endif /* DEBUG */ + + .data + +/* + * Set up the usable of RAM stuff. Size of RAM is determined then + * an initial stack set up at the end. + */ +.align 4 +_ramvec: +.long 0 +_rambase: +.long 0 +_ramstart: +.long 0 +_ramend: +.long 0 + +env: + .long 0 diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68VZ328/ucdimm/crt0_rom.S linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/ucdimm/crt0_rom.S --- linux.2.5.40/arch/m68knommu/platform/68VZ328/ucdimm/crt0_rom.S 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/ucdimm/crt0_rom.S 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1 @@ +#include "crt0_fixed.S" diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68VZ328/ucdimm/fixed.ld linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/ucdimm/fixed.ld --- linux.2.5.40/arch/m68knommu/platform/68VZ328/ucdimm/fixed.ld 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/ucdimm/fixed.ld 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,102 @@ + +jiffies = jiffies_64 + 4; + +SECTIONS +{ + .romvec : + { + _flashstart = . ; + _romvec = . ; + __rom_start = . ; + } > romvec + + .text : + { + _stext = . ; + *(.text) + . = ALIGN(0x4) ; + *(.text.*) + . = ALIGN(0x4) ; + *(.exitcall.exit) + . = ALIGN(0x4) ; + *(.kstrtab) + . = ALIGN(16); /* Exception table */ + __start___ex_table = .; + *(__ex_table) + __stop___ex_table = .; + + __start___ksymtab = .; /* Kernel symbol table */ + *(__ksymtab) + __stop___ksymtab = .; + + . = ALIGN(0x4) ; + _etext = . ; + __data_rom_start = . ; + } > flash + + .eflash : + { + _flashend = . ; + } > eflash + + .ramvec : + { + __ram_start = . ; + __ramvec = . ; + } > ramvec + + .data : + { + . = ALIGN(0x4) ; + _sdata = . ; + __data_start = . ; + + . = ALIGN(0x4) ; + *(.rodata) + . = ALIGN(0x4) ; + *(.data) + . = ALIGN(0x4) ; + *(.data.*) + + . = ALIGN(0x4) ; + __setup_start = .; + *(.setup.init) + . = ALIGN(0x4) ; + __setup_end = .; + + . = ALIGN(0x4) ; + __initcall_start = .; + *(.initcall1.init) + *(.initcall2.init) + *(.initcall3.init) + *(.initcall4.init) + *(.initcall5.init) + *(.initcall6.init) + *(.initcall7.init) + __initcall_end = .; + . = ALIGN(0x4) ; + + . = ALIGN(0x2000) ; + *(.data.init_task) + . = ALIGN(0x2000) ; + + _edata = . ; + } > ram + + .bss : + { + . = ALIGN(0x4) ; + _sbss = . ; + *(.bss) + . = ALIGN(0x4) ; + *(COMMON) + . = ALIGN(0x4) ; + _ebss = . ; + _end = . ; + } > ram + + .eram : + { + __ramend = . ; + } > eram +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68VZ328/ucdimm/himem.ld linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/ucdimm/himem.ld --- linux.2.5.40/arch/m68knommu/platform/68VZ328/ucdimm/himem.ld 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/ucdimm/himem.ld 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,11 @@ +MEMORY + { + romvec : ORIGIN = 0x00600000, LENGTH = 0x00000400 + flash : ORIGIN = 0x00600400, LENGTH = 0x00200000 - 0x00010400 + eflash : ORIGIN = 0x007f0000, LENGTH = 0 + ramvec : ORIGIN = 0x00000000, LENGTH = 0x00000400 + ram : ORIGIN = 0x00020000, LENGTH = 0x00600000 - 0x00020000 + eram : ORIGIN = 0x00600000, LENGTH = 0 + } + +INCLUDE arch/m68knommu/platform/68VZ328/ucdimm/fixed.ld diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68VZ328/ucdimm/ints.c linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/ucdimm/ints.c --- linux.2.5.40/arch/m68knommu/platform/68VZ328/ucdimm/ints.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/ucdimm/ints.c 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,370 @@ +/* + * linux/arch/$(ARCH)/platform/$(PLATFORM)/ints.c + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive + * for more details. + * + * Copyright 1996 Roman Zippel + * Copyright 1999 D. Jeff Dionne + */ + +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include + +#define INTERNAL_IRQS (32) + +/* assembler routines */ +asmlinkage void system_call(void); +asmlinkage void buserr(void); +asmlinkage void trap(void); +asmlinkage void trap3(void); +asmlinkage void trap4(void); +asmlinkage void trap5(void); +asmlinkage void trap6(void); +asmlinkage void trap7(void); +asmlinkage void trap8(void); +asmlinkage void trap9(void); +asmlinkage void trap10(void); +asmlinkage void trap11(void); +asmlinkage void trap12(void); +asmlinkage void trap13(void); +asmlinkage void trap14(void); +asmlinkage void trap15(void); +asmlinkage void trap33(void); +asmlinkage void trap34(void); +asmlinkage void trap35(void); +asmlinkage void trap36(void); +asmlinkage void trap37(void); +asmlinkage void trap38(void); +asmlinkage void trap39(void); +asmlinkage void trap40(void); +asmlinkage void trap41(void); +asmlinkage void trap42(void); +asmlinkage void trap43(void); +asmlinkage void trap44(void); +asmlinkage void trap45(void); +asmlinkage void trap46(void); +asmlinkage void trap47(void); +asmlinkage void bad_interrupt(void); +asmlinkage void inthandler(void); +asmlinkage void inthandler1(void); +asmlinkage void inthandler2(void); +asmlinkage void inthandler3(void); +asmlinkage void inthandler4(void); +asmlinkage void inthandler5(void); +asmlinkage void inthandler6(void); +asmlinkage void inthandler7(void); + +// extern void *_ramvec[]; +extern e_vector *_ramvec; + +/* irq node variables for the 32 (potential) on chip sources */ +static irq_node_t *int_irq_list[INTERNAL_IRQS]; + +static int int_irq_count[INTERNAL_IRQS]; +static short int_irq_ablecount[INTERNAL_IRQS]; +unsigned int local_irq_count[NR_CPUS]; + +static void int_badint(int irq, void *dev_id, struct pt_regs *fp) +{ + num_spurious += 1; +} + +/* + * This function should be called during kernel startup to initialize + * the amiga IRQ handling routines. + */ + +void M68VZ328_init_IRQ(void) +{ + int i; + + /* set up the vectors */ +#if 0 + _ramvec[2] = buserr; + _ramvec[3] = trap3; + _ramvec[4] = trap4; + _ramvec[5] = trap5; + _ramvec[6] = trap6; + _ramvec[7] = trap7; + _ramvec[8] = trap8; + _ramvec[9] = trap9; + _ramvec[10] = trap10; + _ramvec[11] = trap11; + _ramvec[12] = trap12; + _ramvec[13] = trap13; + _ramvec[14] = trap14; + _ramvec[15] = trap15; +#endif + _ramvec[32] = system_call; + + _ramvec[64] = bad_interrupt; + _ramvec[65] = inthandler1; + _ramvec[66] = inthandler2; + _ramvec[67] = inthandler3; + _ramvec[68] = inthandler4; + _ramvec[69] = inthandler5; + _ramvec[70] = inthandler6; + _ramvec[71] = inthandler7; + + IVR = 0x40; /* Set DragonBall IVR (interrupt base) to 64 */ + + /* initialize handlers */ + for (i = 0; i < INTERNAL_IRQS; i++) { + int_irq_list[i] = NULL; + + int_irq_ablecount[i] = 0; + int_irq_count[i] = 0; + } + /* turn off all interrupts */ + IMR = ~0; +} + +void M68VZ328_insert_irq(irq_node_t **list, irq_node_t *node) +{ + unsigned long flags; + irq_node_t *cur; + + if (!node->dev_id) + printk("%s: Warning: dev_id of %s is zero\n", + __FUNCTION__, node->devname); + + save_flags(flags); + cli(); + + cur = *list; + + while (cur) { + list = &cur->next; + cur = cur->next; + } + + node->next = cur; + *list = node; + + restore_flags(flags); +} + +void M68VZ328_delete_irq(irq_node_t **list, void *dev_id) +{ + unsigned long flags; + irq_node_t *node; + + save_flags(flags); + cli(); + + for (node = *list; node; list = &node->next, node = *list) { + if (node->dev_id == dev_id) { + *list = node->next; + /* Mark it as free. */ + node->handler = NULL; + restore_flags(flags); + return; + } + } + restore_flags(flags); + printk ("%s: tried to remove invalid irq\n", __FUNCTION__); +} + +int M68VZ328_request_irq(unsigned int irq, void (*handler)(int, void *, struct pt_regs *), + unsigned long flags, const char *devname, void *dev_id) +{ + if (irq >= INTERNAL_IRQS) { + printk ("%s: Unknown IRQ %d from %s\n", __FUNCTION__, irq, devname); + return -ENXIO; + } + + if (!int_irq_list[irq]) { + int_irq_list[irq] = new_irq_node(); + int_irq_list[irq]->flags = IRQ_FLG_STD; + } + + if (!(int_irq_list[irq]->flags & IRQ_FLG_STD)) { + if (int_irq_list[irq]->flags & IRQ_FLG_LOCK) { + printk("%s: IRQ %d from %s is not replaceable\n", + __FUNCTION__, irq, int_irq_list[irq]->devname); + return -EBUSY; + } + if (flags & IRQ_FLG_REPLACE) { + printk("%s: %s can't replace IRQ %d from %s\n", + __FUNCTION__, devname, irq, int_irq_list[irq]->devname); + return -EBUSY; + } + } + int_irq_list[irq]->handler = handler; + int_irq_list[irq]->flags = flags; + int_irq_list[irq]->dev_id = dev_id; + int_irq_list[irq]->devname = devname; + + /* enable in the IMR */ + if (!int_irq_ablecount[irq]) + *(volatile unsigned long *)0xfffff304 &= ~(1<= INTERNAL_IRQS) { + printk ("%s: Unknown IRQ %d\n", __FUNCTION__, irq); + return; + } + + if (int_irq_list[irq]->dev_id != dev_id) + printk("%s: removing probably wrong IRQ %d from %s\n", + __FUNCTION__, irq, int_irq_list[irq]->devname); + int_irq_list[irq]->handler = int_badint; + int_irq_list[irq]->flags = IRQ_FLG_STD; + int_irq_list[irq]->dev_id = NULL; + int_irq_list[irq]->devname = NULL; + + *(volatile unsigned long *)0xfffff304 |= 1<= INTERNAL_IRQS) { + printk("%s: Unknown IRQ %d\n", __FUNCTION__, irq); + return; + } + + if (--int_irq_ablecount[irq]) + return; + + /* enable the interrupt */ + *(volatile unsigned long *)0xfffff304 &= ~(1<= INTERNAL_IRQS) { + printk("%s: Unknown IRQ %d\n", __FUNCTION__, irq); + return; + } + + if (int_irq_ablecount[irq]++) + return; + + /* disable the interrupt */ + *(volatile unsigned long *)0xfffff304 |= 1<handler) { + int_irq_list[irq]->handler(irq, int_irq_list[irq]->dev_id, fp); + int_irq_count[irq]++; + } else { + printk("unregistered interrupt %d!\nTurning it off in the IMR...\n", irq); + *(volatile unsigned long *)0xfffff304 |= mask; + } + pend &= ~mask; + } + return 0; +} + +int M68VZ328_get_irq_list(struct seq_file *p, void *v) +{ + int i; + irq_node_t *node; + + seq_printf(p, "Internal 68VZ328 interrupts\n"); + + for (i = 0; i < INTERNAL_IRQS; i++) { + if (!(node = int_irq_list[i])) + continue; + if (!(node->handler)) + continue; + + seq_printf(p, " %2d: %10u %s\n", i, + int_irq_count[i], int_irq_list[i]->devname); + } + return(0); +} + +void config_M68VZ328_irq(void) +{ + mach_default_handler = NULL; + mach_init_IRQ = M68VZ328_init_IRQ; + mach_request_irq = M68VZ328_request_irq; + mach_free_irq = M68VZ328_free_irq; + mach_enable_irq = M68VZ328_enable_irq; + mach_disable_irq = M68VZ328_disable_irq; + mach_get_irq_list = M68VZ328_get_irq_list; + mach_process_int = M68VZ328_do_irq; +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68VZ328/ucdimm/ram.ld linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/ucdimm/ram.ld --- linux.2.5.40/arch/m68knommu/platform/68VZ328/ucdimm/ram.ld 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/ucdimm/ram.ld 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,110 @@ +MEMORY + { + romvec : ORIGIN = 0x10c10000, LENGTH = 0x00000400 + flash : ORIGIN = 0x10c10400, LENGTH = 0x00200000 - 0x00010400 + eflash : ORIGIN = 0x10e00000, LENGTH = 0 + ramvec : ORIGIN = 0x00000000, LENGTH = 0x00000400 + bvec : ORIGIN = 0x00020000, LENGTH = 0x00000400 + ram : ORIGIN = 0x00020400, LENGTH = 0x00800000 - 0x00020400 + eram : ORIGIN = 0x00800000, LENGTH = 0 + } + +jiffies = jiffies_64 + 4; + +SECTIONS +{ + .fakevec : + { + } > romvec + .rom : + { + __rom_start = . ; + } > flash + .eflash : + { + _flashend = . ; + } > eflash + .realvec : + { + _ramvec = . ; + } > ramvec + .romvec : + { + _romvec = . ; + } > bvec + .text : + { + __ram_start = . ; + text_start = . ; + *(.text) + *(.text.*) + *(.rodata) + . = ALIGN(0x4) ; + *(.kstrtab) + . = ALIGN(16); /* Exception table */ + __start___ex_table = .; + *(__ex_table) + __stop___ex_table = .; + + __start___ksymtab = .; /* Kernel symbol table */ + *(__ksymtab) + __stop___ksymtab = .; + + _etext = . ; + __data_rom_start = ALIGN ( 4 ) ; + } > ram + .data : + { + _sdata = . ; + __data_start = . ; + + . = ALIGN(0x2000) ; + *(.data.init_task) + . = ALIGN(0x2000) ; + + *(.data) + *(.data.*) + *(.setup.init) + *(.exitcall.exit) + + . = ALIGN(4096) ; + __init_begin = .; + *(.text.init) + *(.data.init) + . = ALIGN(16); + __setup_start = .; + *(.setup.init) + __setup_end = .; + __initcall_start = .; + *(.initcall1.init) + *(.initcall2.init) + *(.initcall3.init) + *(.initcall4.init) + *(.initcall5.init) + *(.initcall6.init) + *(.initcall7.init) + __initcall_end = .; + . = ALIGN(4) ; + __init_end = .; + + _edata = . ; + edata = ALIGN( 0x10 ) ; + } > ram + .bss : + { + _sbss = ALIGN( 0x10 ) ; + __bss_start = ALIGN( 0x10 ) ; + __data_end = ALIGN( 0x10 ) ; + *(.bss) + *(COMMON) + _ebss = . ; + __bss_end = . ; + end = ALIGN( 0x10 ) ; + _end = ALIGN( 0x10 ) ; + } > ram + .eram : + { + __ramend = . ; + _ramend = . ; + } > eram +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/m68knommu/platform/68VZ328/ucdimm/rom.ld linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/ucdimm/rom.ld --- linux.2.5.40/arch/m68knommu/platform/68VZ328/ucdimm/rom.ld 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/m68knommu/platform/68VZ328/ucdimm/rom.ld 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,11 @@ +MEMORY + { + romvec : ORIGIN = 0x10c10000, LENGTH = 0x00000400 + flash : ORIGIN = 0x10c10400, LENGTH = 0x001fec00 + eflash : ORIGIN = 0x10d00000, LENGTH = 0 + ramvec : ORIGIN = 0x00000000, LENGTH = 1024 + ram : ORIGIN = 0x00020000, LENGTH = 0x00800000 - 0x00020000 + eram : ORIGIN = 0x00800000, LENGTH = 0 + } + +INCLUDE arch/m68knommu/platform/68VZ328/ucdimm/fixed.ld diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/config.in linux.2.5.40-ac2/arch/v850/config.in --- linux.2.5.40/arch/v850/config.in 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/config.in 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,374 @@ +############################################################################# +# +# For a description of the syntax of this configuration file, +# see Documentation/kbuild/config-language.txt. +# +# based mainly on the arch/i386/config.in and bit of the 2.0, m68knommu +# config.in +# +############################################################################# + +mainmenu_name 'uClinux/v850 (w/o MMU) Kernel Configuration' + +define_bool CONFIG_UCLINUX y +define_bool CONFIG_NO_MMU y +define_bool CONFIG_UID16 n +define_bool CONFIG_RWSEM_GENERIC_SPINLOCK y +define_bool CONFIG_RWSEM_XCHGADD_ALGORITHM n + +# Turn off some random 386 crap that can affect device config +define_bool CONFIG_ISA n +define_bool CONFIG_ISAPNP n +define_bool CONFIG_EISA n +define_bool CONFIG_MCA n + + +############################################################################# +#### v850-specific config + +# Define the architecture +define_bool CONFIG_V850 y + +mainmenu_option next_comment + comment 'Processor type and features' + + choice 'Platform' \ + "RTE-V850E/MA1-CB CONFIG_RTE_CB_MA1 \ + RTE-V850E/NB85E-CB CONFIG_RTE_CB_NB85E \ + GDB CONFIG_V850E_SIM \ + sim85e2c CONFIG_V850E2_SIM85E2C \ + NA85E2C-FPGA CONFIG_V850E2_FPGA85E2C" \ + GDB + + + #### V850E processor-specific config + + # All CPUs currently supported use the v850e architecture + define_bool CONFIG_V850E y + + # The RTE-V850E/MA1-CB is the only type of V850E/MA1 platform we + # currently support + define_bool CONFIG_V850E_MA1 $CONFIG_RTE_CB_MA1 + # Similarly for the RTE-V850E/MA1-CB - V850E/TEG + define_bool CONFIG_V850E_TEG $CONFIG_RTE_CB_NB85E + + if [ "$CONFIG_V850E_MA1" = "y" -o "$CONFIG_V850E_TEG" = "y" ]; then + define_bool CONFIG_V850E_NB85E y + else + define_bool CONFIG_V850E_NB85E n + fi + + dep_bool 'High resolution timer support' CONFIG_V850E_MA1_HIGHRES_TIMER \ + $CONFIG_V850E_MA1 + + + #### V850E2 processor-specific config + + if [ "$CONFIG_V850E2_SIM85E2C" = "y" -o "$CONFIG_V850E2_FPGA85E2C" = "y" ] + then + # Processors based on the V850E2/NA85E2C core + define_bool CONFIG_V850E2 y + define_bool CONFIG_V850E2_NA85E2C y + else + define_bool CONFIG_V850E2 n + define_bool CONFIG_V850E2_NA85E2C n + fi + + + #### sim85e2c platform-specific config + + if [ "$CONFIG_V850E2_SIM85E2C" = "y" ]; then + # The sim85e2c simulator uses the v850e2 architecture (superset of v850e) + define_bool CONFIG_ZERO_BSS n + + # The crappy-ass zone allocator requires that the start of allocatable + # memory be aligned to the largest possible allocation. + define_int CONFIG_FORCE_MAX_ZONEORDER 8 + fi + + + #### fpga85e2c platform-specific config + + if [ "$CONFIG_V850E2_FPGA85E2C" = "y" ]; then + # The crappy-ass zone allocator requires that the start of allocatable + # memory be aligned to the largest possible allocation. + define_int CONFIG_FORCE_MAX_ZONEORDER 8 + fi + + + #### RTE-CB platform-specific config + + if [ "$CONFIG_RTE_CB_MA1" = "y" -o "$CONFIG_RTE_CB_NB85E" = "y" ]; then + # Boards in the RTE-x-CB series + define_bool CONFIG_RTE_CB y + else + define_bool CONFIG_RTE_CB n + fi + + # Currently, we only support RTE-CB boards using the Multi debugger + #dep_bool 'Multi debugger support' CONFIG_RTE_CB_MULTI $CONFIG_RTE_CB + define_bool CONFIG_RTE_CB_MULTI $CONFIG_RTE_CB + + dep_bool 'Kernel in SRAM (limits size of kernel)' CONFIG_RTE_CB_MA1_KSRAM \ + $CONFIG_RTE_CB_MA1 $CONFIG_RTE_CB_MULTI + + dep_bool 'Mother-A PCI support' CONFIG_RTE_MB_A_PCI $CONFIG_RTE_CB + + # The GBUS is used to talk to the RTE-MOTHER-A board + define_bool CONFIG_RTE_GBUS_INT $CONFIG_RTE_MB_A_PCI + + # The only PCI bus we support is on the RTE-MOTHER-A board + define_bool CONFIG_PCI $CONFIG_RTE_MB_A_PCI + + + #### Misc config + + # Doesn't do anything yet + #if [ "$CONFIG_RTE_CB_MULTI" = "n" ]; then + # bool 'Kernel in ROM' CONFIG_ROM_KERNEL + #fi + + dep_bool 'Time bootup' CONFIG_TIME_BOOTUP $CONFIG_V850E_MA1_HIGHRES_TIMER + + bool 'Reset Guard' CONFIG_RESET_GUARD + + # Default some stuff + if [ "$CONFIG_ZERO_BSS" != "n" ]; then + define_bool CONFIG_ZERO_BSS y + fi + +endmenu + + +############################################################################# + +mainmenu_option next_comment + comment 'Code maturity level options' + bool 'Prompt for development and/or incomplete code/drivers' CONFIG_EXPERIMENTAL +endmenu + +mainmenu_option next_comment + comment 'Loadable module support' + bool 'Enable loadable module support' CONFIG_MODULES + if [ "$CONFIG_MODULES" = "y" ]; then + bool ' Set version information on all module symbols' CONFIG_MODVERSIONS + bool ' Kernel module loader' CONFIG_KMOD + fi +endmenu + +mainmenu_option next_comment + comment 'General setup' + + bool 'Networking support' CONFIG_NET + bool 'System V IPC' CONFIG_SYSVIPC + bool 'BSD Process Accounting' CONFIG_BSD_PROCESS_ACCT + bool 'Sysctl support' CONFIG_SYSCTL + + # Embedded systems often won't need any hardware disk support, so only + # clutter up the menus with it if really necessary + bool 'Disk hardware support' CONFIG_DISK + + source drivers/pci/Config.in + + # if [ "$CONFIG_VISWS" != "y" ]; then + # bool 'MCA support' CONFIG_MCA + # fi + + bool 'Support for hot-pluggable devices' CONFIG_HOTPLUG + + if [ "$CONFIG_HOTPLUG" = "y" ] ; then + source drivers/pcmcia/Config.in + else + define_bool CONFIG_PCMCIA n + fi + + if [ "$CONFIG_PROC_FS" = "y" ]; then + choice 'Kernel core (/proc/kcore) format' \ + "ELF CONFIG_KCORE_ELF \ + A.OUT CONFIG_KCORE_AOUT" ELF + fi + tristate 'Kernel support for flat binaries' CONFIG_BINFMT_FLAT + dep_bool ' Enable ZFLAT support' CONFIG_BINFMT_ZFLAT $CONFIG_BINFMT_FLAT + #tristate 'Kernel support for a.out binaries' CONFIG_BINFMT_AOUT + #tristate 'Kernel support for ELF binaries' CONFIG_BINFMT_ELF + tristate 'Kernel support for MISC binaries' CONFIG_BINFMT_MISC + + # bool 'Power Management support' CONFIG_PM + # + # dep_bool ' ACPI support' CONFIG_ACPI $CONFIG_PM + # if [ "$CONFIG_ACPI" != "n" ]; then + # if [ "$CONFIG_EXPERIMENTAL" = "y" ]; then + # bool ' ACPI interpreter (EXPERIMENTAL)' CONFIG_ACPI_INTERPRETER + # bool ' Enter S1 for sleep (EXPERIMENTAL)' CONFIG_ACPI_S1_SLEEP + # fi + # fi + + if [ "$CONFIG_EXPERIMENTAL" = "y" ]; then + bool 'Non power-of-2 kernel allocator (EXPERIMENTAL)' CONFIG_CONTIGUOUS_PAGE_ALLOC + dep_bool ' include /proc/mem_map' CONFIG_MEM_MAP $CONFIG_CONTIGUOUS_PAGE_ALLOC + fi + + if [ "$CONFIG_CONTIGUOUS_PAGE_ALLOC" != "y" ]; then + bool 'Allow allocating large blocks (> 1MB) of memory' CONFIG_NO_MMU_LARGE_ALLOCS + fi + +endmenu + +############################################################################# + +source drivers/mtd/Config.in + +if [ "$CONFIG_PCI" != "n" ]; then + source drivers/parport/Config.in +fi + +#source drivers/pnp/Config.in + +source drivers/block/Config.in + +#source drivers/telephony/Config.in + +############################################################################# + +if [ "$CONFIG_DISK" = "y" ]; then + mainmenu_option next_comment + comment 'ATA/IDE/MFM/RLL support' + + tristate 'ATA/IDE/MFM/RLL support' CONFIG_IDE + + if [ "$CONFIG_IDE" != "n" ]; then + source drivers/ide/Config.in + else + define_bool CONFIG_BLK_DEV_IDE_MODES n + define_bool CONFIG_BLK_DEV_HD n + fi + endmenu +fi + +############################################################################# + +if [ "$CONFIG_DISK" = "y" ]; then + mainmenu_option next_comment + comment 'SCSI support' + + tristate 'SCSI support' CONFIG_SCSI + + if [ "$CONFIG_SCSI" != "n" ]; then + source drivers/scsi/Config.in + fi + endmenu +fi + +############################################################################# + +if [ "$CONFIG_PCI" = "y" ]; then + source drivers/ieee1394/Config.in +fi + +if [ "$CONFIG_NET" = "y" ]; then + source net/Config.in + + mainmenu_option next_comment + comment 'Network device support' + + bool 'Network device support' CONFIG_NETDEVICES + if [ "$CONFIG_NETDEVICES" = "y" ]; then + source drivers/net/Config.in + if [ "$CONFIG_ATM" = "y" ]; then + source drivers/atm/Config.in + fi + fi + endmenu +fi + +if [ "$CONFIG_NET" = "y" ]; then + source net/ax25/Config.in +fi + +source net/irda/Config.in + +############################################################################# + +if [ "$CONFIG_NET" = "y" ]; then + mainmenu_option next_comment + comment 'ISDN subsystem' + + tristate 'ISDN support' CONFIG_ISDN + if [ "$CONFIG_ISDN" != "n" ]; then + source drivers/isdn/Config.in + fi + endmenu +fi + +############################################################################# + +# mainmenu_option next_comment +# comment 'Old CD-ROM drivers (not SCSI, not IDE)' +# +# bool 'Support non-SCSI/IDE/ATAPI CDROM drives' CONFIG_CD_NO_IDESCSI +# if [ "$CONFIG_CD_NO_IDESCSI" != "n" ]; then +# source drivers/cdrom/Config.in +# fi +# endmenu + +############################################################################# + +source drivers/char/Config.in + +#source drivers/misc/Config.in + +source fs/Config.in + +if [ "$CONFIG_VT" = "y" ]; then + mainmenu_option next_comment + comment 'Console drivers' + bool 'VGA text console' CONFIG_VGA_CONSOLE + bool 'Video mode selection support' CONFIG_VIDEO_SELECT + if [ "$CONFIG_EXPERIMENTAL" = "y" ]; then + tristate 'MDA text console (dual-headed) (EXPERIMENTAL)' CONFIG_MDA_CONSOLE + source drivers/video/Config.in + fi + endmenu +fi + +############################################################################# + +mainmenu_option next_comment + comment 'Sound' + + tristate 'Sound card support' CONFIG_SOUND + if [ "$CONFIG_SOUND" != "n" ]; then + source sound/Config.in + fi +endmenu + +############################################################################# + +source drivers/input/Config.in +source drivers/usb/Config.in + +############################################################################# + +mainmenu_option next_comment + comment 'Kernel hacking' + + bool 'Full Symbolic/Source Debugging support' CONFIG_FULLDEBUG + #bool 'Debug kmalloc/kfree' CONFIG_DEBUG_MALLOC + bool 'Magic SysRq key' CONFIG_MAGIC_SYSRQ + + bool 'Kernel profiling support' CONFIG_PROFILE + if [ "$CONFIG_PROFILE" = "y" ]; then + int ' Profile shift count' CONFIG_PROFILE_SHIFT 2 + bool 'Use fast second timer for profiling' CONFIG_HIGHPROFILE + fi + + bool 'Suppress Kernel BUG Messages' CONFIG_NO_KERNEL_MSG + +endmenu + +############################################################################# + +source security/Config.in +source lib/Config.in + +############################################################################# diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/fpga85e2c.ld linux.2.5.40-ac2/arch/v850/fpga85e2c.ld --- linux.2.5.40/arch/v850/fpga85e2c.ld 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/fpga85e2c.ld 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,136 @@ +/* Linker script for the FPGA implementation of the V850E2 NA85E2C cpu core + (CONFIG_V850E2_FPGA85E2C). */ + +/* Note, all symbols are prefixed with an extra `_' for compatibility with + the existing linux sources. */ + +_jiffies = _jiffies_64 ; + +MEMORY { + /* Reset vector. */ + RESET : ORIGIN = 0, LENGTH = 0x10 + /* Interrupt vectors. */ + INTV : ORIGIN = 0x10, LENGTH = 0x470 + /* The `window' in RAM were we're allowed to load stuff. */ + RAM_LOW : ORIGIN = 0x480, LENGTH = 0x0005FB80 + /* Some more ram above the window were we can put bss &c. */ + RAM_HIGH : ORIGIN = 0x00060000, LENGTH = 0x000A0000 + /* This is the area visible from the outside world (we can use + this only for uninitialized data). */ + VISIBLE : ORIGIN = 0x00200000, LENGTH = 0x00060000 +} + +SECTIONS { + .reset : { + __kram_start = . ; + __intv_start = . ; + *(.intv.reset) /* Reset vector */ + } > RESET + + .r0_ram : { + __r0_ram = . ; + . = . + 32 ; + } > RAM_LOW + + .text : { + __stext = . ; + *(.text) + *(.text.exit) + *(.text.lock) + *(.exitcall.exit) + __real_etext = . ; /* There may be data after here. */ + *(.rodata) + . = ALIGN (0x4) ; + *(.kstrtab) + + . = ALIGN (4) ; + *(.call_table_data) + *(.call_table_text) + + . = ALIGN (16) ; /* Exception table. */ + ___start___ex_table = . ; + *(__ex_table) + ___stop___ex_table = . ; + + ___start___ksymtab = . ;/* Kernel symbol table. */ + *(__ksymtab) + ___stop___ksymtab = . ; + . = ALIGN (4) ; + __etext = . ; + } > RAM_LOW + + .data : { + __sdata = . ; + *(.data) + *(.data.exit) + . = ALIGN (16) ; + *(.data.cacheline_aligned) + . = ALIGN (0x2000) ; + *(.data.init_task) + . = ALIGN (0x2000) ; + __edata = . ; + } > RAM_LOW + + /* Device contents for the root filesystem. */ + .root : { + . = ALIGN (4096) ; + __root_fs_image_start = . ; + *(.root) + __root_fs_image_end = . ; + } > RAM_LOW + + .init ALIGN (4096) : { + __init_start = . ; + *(.text.init) + *(.data.init) + . = ALIGN (16) ; + ___setup_start = . ; + *(.setup.init) + ___setup_end = . ; + ___initcall_start = . ; + *(.initcall1.init) + *(.initcall2.init) + *(.initcall3.init) + *(.initcall4.init) + *(.initcall5.init) + *(.initcall6.init) + *(.initcall7.init) + . = ALIGN (4) ; + ___initcall_end = . ; + } > RAM_LOW + + /* Where the interrupt vectors are initially loaded. */ + __intv_load_start = . ; + + .intv : { + *(.intv.common) /* Vectors common to all v850e proc. */ + *(.intv.mach) /* Machine-specific int. vectors. */ + __intv_end = . ; + } > INTV AT> RAM_LOW + + .bss : { + /* This is here so that when we free init memory the + load-time copy of the interrupt vectors and any empty + space at the end of the `RAM_LOW' area is freed too. */ + __init_end = . ; + + __sbss = . ; + *(.bss) + *(COMMON) + . = ALIGN (4) ; + __ebss = . ; + + __kram_end = . ; + } > RAM_HIGH + + .bootmap ALIGN (4096) : { + __bootmap = . ; + . = . + 4096 ; /* enough for 128MB. */ + } > RAM_HIGH + + .visible : { + _memcons_output = . ; + . = . + 0x8000 ; + _memcons_output_end = . ; + } > VISIBLE +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/kernel/bug.c linux.2.5.40-ac2/arch/v850/kernel/bug.c --- linux.2.5.40/arch/v850/kernel/bug.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/kernel/bug.c 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,57 @@ +/* + * arch/v850/kernel/bug.c -- Bug reporting functions + * + * Copyright (C) 2001,02 NEC Corporation + * Copyright (C) 2001,02 Miles Bader + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file COPYING in the main directory of this + * archive for more details. + * + * Written by Miles Bader + */ + +#include +#include +#include + +#include +#include +#include + +void __bug () +{ + register unsigned long lp asm ("lp"); + register unsigned long sp asm ("sp"); + printk (KERN_CRIT "kernel BUG at PC 0x%lx (SP ~0x%lx)!\n", lp, sp); + machine_halt (); +} + +int bad_trap (int trap_num, struct pt_regs *regs) +{ + printk (KERN_CRIT + "unimplemented trap %d called at 0x%08lx, pid %d!\n", + trap_num, regs->pc, current->pid); + return -ENOSYS; +} + +int debug_trap (struct pt_regs *regs) +{ + printk (KERN_CRIT "debug trap at 0x%08lx!\n", regs->pc); + return -ENOSYS; +} + +#ifdef CONFIG_RESET_GUARD +void unexpected_reset (unsigned long ret_addr, unsigned long kmode, + struct task_struct *task, unsigned long sp) +{ + printk (KERN_CRIT + "unexpected reset in %s mode, pid %d" + " (ret_addr = 0x%lx, sp = 0x%lx)\n", + kmode ? "kernel" : "user", + task ? task->pid : -1, + ret_addr, sp); + + machine_halt (); +} +#endif /* CONFIG_RESET_GUARD */ diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/kernel/entry.S linux.2.5.40-ac2/arch/v850/kernel/entry.S --- linux.2.5.40/arch/v850/kernel/entry.S 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/kernel/entry.S 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,1004 @@ +/* + * arch/v850/kernel/entry.S -- Low-level system-call handling, trap handlers, + * and context-switching + * + * Copyright (C) 2001,02 NEC Corporation + * Copyright (C) 2001,02 Miles Bader + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file COPYING in the main directory of this + * archive for more details. + * + * Written by Miles Bader + */ + +#include + +#include +#include +#include +#include +#include +#include + +#include "v850_defs.h" + + +/* Make a slightly more convenient alias for C_SYMBOL_NAME. */ +#define CSYM C_SYMBOL_NAME + + +/* The offset of the struct pt_regs in a `state save frame' on the stack. */ +#define PTO STATE_SAVE_PT_OFFSET + + +/* Save argument registers to the struct pt_regs pointed to by EP. */ +#define SAVE_ARG_REGS \ + sst.w r6, PTO+PT_GPR(6)[ep]; \ + sst.w r7, PTO+PT_GPR(7)[ep]; \ + sst.w r8, PTO+PT_GPR(8)[ep]; \ + sst.w r9, PTO+PT_GPR(9)[ep]; +/* Restore argument registers from the struct pt_regs pointed to by EP. */ +#define RESTORE_ARG_REGS \ + sld.w PTO+PT_GPR(6)[ep], r6; \ + sld.w PTO+PT_GPR(7)[ep], r7; \ + sld.w PTO+PT_GPR(8)[ep], r8; \ + sld.w PTO+PT_GPR(9)[ep], r9; + +/* Save value return registers to the struct pt_regs pointed to by EP. */ +#define SAVE_RVAL_REGS \ + sst.w r10, PTO+PT_GPR(10)[ep]; \ + sst.w r11, PTO+PT_GPR(11)[ep]; +/* Restore value return registers from the struct pt_regs pointed to by EP. */ +#define RESTORE_RVAL_REGS \ + sld.w PTO+PT_GPR(10)[ep], r10; \ + sld.w PTO+PT_GPR(11)[ep], r11; + + +#define SAVE_CALL_CLOBBERED_REGS_BEFORE_ARGS \ + sst.w r1, PTO+PT_GPR(1)[ep]; \ + sst.w r5, PTO+PT_GPR(5)[ep]; +#define SAVE_CALL_CLOBBERED_REGS_AFTER_RVAL \ + sst.w r12, PTO+PT_GPR(12)[ep]; \ + sst.w r13, PTO+PT_GPR(13)[ep]; \ + sst.w r14, PTO+PT_GPR(14)[ep]; \ + sst.w r15, PTO+PT_GPR(15)[ep]; \ + sst.w r16, PTO+PT_GPR(16)[ep]; \ + sst.w r17, PTO+PT_GPR(17)[ep]; \ + sst.w r18, PTO+PT_GPR(18)[ep]; \ + sst.w r19, PTO+PT_GPR(19)[ep]; +#define RESTORE_CALL_CLOBBERED_REGS_BEFORE_ARGS \ + sld.w PTO+PT_GPR(1)[ep], r1; \ + sld.w PTO+PT_GPR(5)[ep], r5; +#define RESTORE_CALL_CLOBBERED_REGS_AFTER_RVAL \ + sld.w PTO+PT_GPR(12)[ep], r12; \ + sld.w PTO+PT_GPR(13)[ep], r13; \ + sld.w PTO+PT_GPR(14)[ep], r14; \ + sld.w PTO+PT_GPR(15)[ep], r15; \ + sld.w PTO+PT_GPR(16)[ep], r16; \ + sld.w PTO+PT_GPR(17)[ep], r17; \ + sld.w PTO+PT_GPR(18)[ep], r18; \ + sld.w PTO+PT_GPR(19)[ep], r19; + +/* Save `call clobbered' registers to the struct pt_regs pointed to by EP. */ +#define SAVE_CALL_CLOBBERED_REGS \ + SAVE_CALL_CLOBBERED_REGS_BEFORE_ARGS; \ + SAVE_ARG_REGS; \ + SAVE_RVAL_REGS; \ + SAVE_CALL_CLOBBERED_REGS_AFTER_RVAL; +/* Restore `call clobbered' registers from the struct pt_regs pointed to + by EP. */ +#define RESTORE_CALL_CLOBBERED_REGS \ + RESTORE_CALL_CLOBBERED_REGS_BEFORE_ARGS; \ + RESTORE_ARG_REGS; \ + RESTORE_RVAL_REGS; \ + RESTORE_CALL_CLOBBERED_REGS_AFTER_RVAL; + +/* Save `call clobbered' registers except for the return-value registers + to the struct pt_regs pointed to by EP. */ +#define SAVE_CALL_CLOBBERED_REGS_NO_RVAL \ + SAVE_CALL_CLOBBERED_REGS_BEFORE_ARGS; \ + SAVE_ARG_REGS; \ + SAVE_CALL_CLOBBERED_REGS_AFTER_RVAL; +/* Restore `call clobbered' registers except for the return-value registers + from the struct pt_regs pointed to by EP. */ +#define RESTORE_CALL_CLOBBERED_REGS_NO_RVAL \ + RESTORE_CALL_CLOBBERED_REGS_BEFORE_ARGS; \ + RESTORE_ARG_REGS; \ + RESTORE_CALL_CLOBBERED_REGS_AFTER_RVAL; + +/* Zero `call clobbered' registers except for the return-value registers. */ +#define ZERO_CALL_CLOBBERED_REGS_NO_RVAL \ + mov r0, r1; mov r0, r5; \ + mov r0, r12; mov r0, r13; mov r0, r14; mov r0, r15; \ + mov r0, r16; mov r0, r17; mov r0, r18; mov r0, r19; + +/* Save `call saved' registers to the struct pt_regs pointed to by EP. */ +#define SAVE_CALL_SAVED_REGS \ + sst.w r2, PTO+PT_GPR(2)[ep]; \ + sst.w r20, PTO+PT_GPR(20)[ep]; \ + sst.w r21, PTO+PT_GPR(21)[ep]; \ + sst.w r22, PTO+PT_GPR(22)[ep]; \ + sst.w r23, PTO+PT_GPR(23)[ep]; \ + sst.w r24, PTO+PT_GPR(24)[ep]; \ + sst.w r25, PTO+PT_GPR(25)[ep]; \ + sst.w r26, PTO+PT_GPR(26)[ep]; \ + sst.w r27, PTO+PT_GPR(27)[ep]; \ + sst.w r28, PTO+PT_GPR(28)[ep]; \ + sst.w r29, PTO+PT_GPR(29)[ep]; +/* Restore `call saved' registers from the struct pt_regs pointed to by EP. */ +#define RESTORE_CALL_SAVED_REGS \ + sld.w PTO+PT_GPR(2)[ep], r2; \ + sld.w PTO+PT_GPR(20)[ep], r20; \ + sld.w PTO+PT_GPR(21)[ep], r21; \ + sld.w PTO+PT_GPR(22)[ep], r22; \ + sld.w PTO+PT_GPR(23)[ep], r23; \ + sld.w PTO+PT_GPR(24)[ep], r24; \ + sld.w PTO+PT_GPR(25)[ep], r25; \ + sld.w PTO+PT_GPR(26)[ep], r26; \ + sld.w PTO+PT_GPR(27)[ep], r27; \ + sld.w PTO+PT_GPR(28)[ep], r28; \ + sld.w PTO+PT_GPR(29)[ep], r29; + + +/* Save system registers to the struct pt_regs pointed to by REG. + r19 is clobbered. */ +#define SAVE_SYS_REGS \ + stsr SR_EIPC, r19; /* user's PC, before interrupt */ \ + sst.w r19, PTO+PT_PC[ep]; \ + stsr SR_EIPSW, r19; /* & PSW (XXX save this?) */ \ + sst.w r19, PTO+PT_PSW[ep]; \ + stsr SR_CTPC, r19; /* (XXX maybe not used in kernel?) */ \ + sst.w r19, PTO+PT_CTPC[ep]; \ + stsr SR_CTPSW, r19; /* " */ \ + sst.w r19, PTO+PT_CTPSW[ep]; \ + stsr SR_CTBP, r19; /* " */ \ + sst.w r19, PTO+PT_CTBP[ep]; +/* Restore system registers from the struct pt_regs pointed to by EP. + LP is clobbered (it is used as a scratch register because the POP_STATE + macro restores it, and this macro is usually used inside POP_STATE). */ +#define RESTORE_SYS_REGS \ + sld.w PTO+PT_PC[ep], lp; \ + ldsr lp, SR_EIPC; /* user's PC, before interrupt */ \ + sld.w PTO+PT_PSW[ep], lp; \ + ldsr lp, SR_EIPSW; /* & PSW (XXX save this?) */ \ + sld.w PTO+PT_CTPC[ep], lp; \ + ldsr lp, SR_CTPC; /* (XXX maybe not used in kernel?) */ \ + sld.w PTO+PT_CTPSW[ep], lp; \ + ldsr lp, SR_CTPSW; /* " */ \ + sld.w PTO+PT_CTBP[ep], lp; \ + ldsr lp, SR_CTBP; /* " */ + + +/* Save system registers to the struct pt_regs pointed to by REG. This is a + NMI-specific version, because NMIs save the PC/PSW in a different place + than other interrupt requests. r19 is clobbered. */ +#define SAVE_SYS_REGS_FOR_NMI \ + stsr SR_FEPC, r19; /* user's PC, before NMI */ \ + sst.w r19, PTO+PT_PC[ep]; \ + stsr SR_FEPSW, r19; /* & PSW (XXX save this?) */ \ + sst.w r19, PTO+PT_PSW[ep]; \ + stsr SR_CTPC, r19; /* (XXX maybe not used in kernel?) */ \ + sst.w r19, PTO+PT_CTPC[ep]; \ + stsr SR_CTPSW, r19; /* " */ \ + sst.w r19, PTO+PT_CTPSW[ep]; \ + stsr SR_CTBP, r19; /* " */ \ + sst.w r19, PTO+PT_CTBP[ep]; +/* Restore system registers from the struct pt_regs pointed to by EP. This is + a NMI-specific version, because NMIs save the PC/PSW in a different place + than other interrupt requests. LP is clobbered (it is used as a scratch + register because the POP_STATE macro restores it, and this macro is usually + used inside POP_STATE). */ +#define RESTORE_SYS_REGS_FOR_NMI \ + ldsr lp, SR_FEPC; /* user's PC, before NMI */ \ + sld.w PTO+PT_PC[ep], lp; \ + ldsr lp, SR_FEPSW; /* & PSW (XXX save this?) */ \ + sld.w PTO+PT_PSW[ep], lp; \ + ldsr lp, SR_CTPC; /* (XXX maybe not used in kernel?) */ \ + sld.w PTO+PT_CTPC[ep], lp; \ + ldsr lp, SR_CTPSW; /* " */ \ + sld.w PTO+PT_CTPSW[ep], lp; \ + ldsr lp, SR_CTBP; /* " */ \ + sld.w PTO+PT_CTBP[ep], lp; + + +/* Push register state, except for the stack pointer, on the stack in the form + of a struct pt_regs, in preparation for a system call. This macro makes + sure that `special' registers, system registers; TYPE identifies the set of + extra registers to be saved as well. EP is clobbered. */ +#define PUSH_STATE(type) \ + addi -STATE_SAVE_SIZE, sp, sp; /* Make room on the stack. */ \ + st.w ep, PTO+PT_GPR(GPR_EP)[sp]; \ + mov sp, ep; \ + sst.w gp, PTO+PT_GPR(GPR_GP)[ep]; \ + sst.w lp, PTO+PT_GPR(GPR_LP)[ep]; \ + type ## _STATE_SAVER; +/* Pop a register state, except for the stack pointer, from the struct pt_regs + on the stack. */ +#define POP_STATE(type) \ + mov sp, ep; \ + type ## _STATE_RESTORER; \ + sld.w PTO+PT_GPR(GPR_GP)[ep], gp; \ + sld.w PTO+PT_GPR(GPR_LP)[ep], lp; \ + sld.w PTO+PT_GPR(GPR_EP)[ep], ep; \ + addi STATE_SAVE_SIZE, sp, sp; /* Clean up our stack space. */ + + +/* Switch to the kernel stack if necessary, and push register state on + the stack in the form of a struct pt_regs. Also load the current + task pointer if switching from user mode. The stack-pointer (r3) + should have already been saved to the memory location SP_SAVE_LOC + (the reason for this is that the interrupt vectors may be beyond a + 22-bit signed offset jump from the actual interrupt handler, and this + allows them to save the stack-pointer and use that register to do an + indirect jump). This macro makes sure that `special' registers, + system registers, and the stack pointer are saved; TYPE identifies + the set of extra registers to be saved as well. SYSCALL_NUM is the + register in which the system-call number this state is for is stored + (r0 if this isn't a system call). Interrupts should already be + disabled when calling this. */ +#define SAVE_STATE(type, syscall_num, sp_save_loc) \ + tst1 0, KM; /* See if already in kernel mode. */ \ + bz 1f; \ + /* Kernel-mode state save. */ \ + ld.w sp_save_loc, sp; /* Reload kernel stack-pointer. */ \ + st.w sp, (PT_GPR(GPR_SP)-PT_SIZE)[sp]; /* Save original SP. */ \ + PUSH_STATE(type); \ + mov 1, r19; /* Was in kernel-mode. */ \ + sst.w r19, PTO+PT_KERNEL_MODE[ep]; /* [ep is set by PUSH_STATE] */ \ + br 2f; \ +1: /* User-mode state save. */ \ + ld.w KSP, sp; /* Switch to kernel stack. */ \ + PUSH_STATE(type); \ + sst.w r0, PTO+PT_KERNEL_MODE[ep]; /* Was in user-mode. */ \ + ld.w sp_save_loc, r19; \ + sst.w r19, PTO+PT_GPR(GPR_SP)[ep]; /* Store user SP. */ \ + mov 1, r19; \ + st.b r19, KM; /* Now we're in kernel-mode. */ \ + GET_CURRENT_TASK(CURRENT_TASK); /* Fetch the current task pointer. */ \ +2: /* Save away the syscall number. */ \ + sst.w syscall_num, PTO+PT_SYSCALL[ep] + + +/* Save register state not normally saved by PUSH_STATE for TYPE. */ +#define SAVE_EXTRA_STATE(type) \ + mov sp, ep; \ + type ## _EXTRA_STATE_SAVER; +/* Restore register state not normally restored by POP_STATE for TYPE. */ +#define RESTORE_EXTRA_STATE(type) \ + mov sp, ep; \ + type ## _EXTRA_STATE_RESTORER; + +/* Save any call-clobbered registers not normally saved by PUSH_STATE + for TYPE. */ +#define SAVE_EXTRA_STATE_FOR_FUNCALL(type) \ + mov sp, ep; \ + type ## _FUNCALL_EXTRA_STATE_SAVER; +/* Restore any call-clobbered registers not normally restored by POP_STATE for + TYPE. */ +#define RESTORE_EXTRA_STATE_FOR_FUNCALL(type) \ + mov sp, ep; \ + type ## _FUNCALL_EXTRA_STATE_RESTORER; + + +/* These are extra_state_saver/restorer values for a user trap. Note that we + save the argument registers so that restarted syscalls will function + properly (otherwise it wouldn't be necessary), and we must _not_ restore + the return-value registers (so that traps can return a value!), but there + are various options for what happens to other call-clobbered registers, + selected by preprocessor conditionals. */ + +#if TRAPS_PRESERVE_CALL_CLOBBERED_REGS + +/* Traps save/restore all call-clobbered registers (except for rval regs). */ +#define TRAP_STATE_SAVER \ + SAVE_CALL_CLOBBERED_REGS_NO_RVAL; \ + SAVE_SYS_REGS +#define TRAP_STATE_RESTORER \ + RESTORE_CALL_CLOBBERED_REGS_NO_RVAL; \ + RESTORE_SYS_REGS + +#else /* !TRAPS_PRESERVE_CALL_CLOBBERED_REGS */ + +/* Traps don't save call-clobbered registers (but do still save arg regs). */ +#define TRAP_STATE_SAVER \ + SAVE_ARG_REGS; \ + SAVE_SYS_REGS + +#if TRAPS_ZERO_CALL_CLOBBERED_REGS + +/* Traps zero call-clobbered registers (except for arg/rval regs) before + returning from a system call, to avoid any internal values from leaking out + of the kernel. */ +#define TRAP_STATE_RESTORER \ + ZERO_CALL_CLOBBERED_REGS_NO_ARGS_NO_RVAL; \ + RESTORE_ARG_REGS; \ + RESTORE_SYS_REGS + +#else /* !TRAPS_ZERO_CALL_CLOBBERED_REGS */ + +/* When traps return, they just leave call-clobbered registers (except for arg + regs) with whatever value they have from the kernel. */ +#define TRAP_STATE_RESTORER \ + RESTORE_ARG_REGS; \ + RESTORE_SYS_REGS + +#endif /* TRAPS_ZERO_CALL_CLOBBERED_REGS */ +#endif /* TRAPS_PRESERVE_CALL_CLOBBERED_REGS */ + +/* Save registers not normally saved by traps. */ +#define TRAP_EXTRA_STATE_SAVER \ + SAVE_RVAL_REGS; \ + SAVE_CALL_SAVED_REGS +#define TRAP_EXTRA_STATE_RESTORER \ + RESTORE_RVAL_REGS; \ + RESTORE_CALL_SAVED_REGS +#define TRAP_FUNCALL_EXTRA_STATE_SAVER \ + SAVE_RVAL_REGS +#define TRAP_FUNCALL_EXTRA_STATE_RESTORER \ + RESTORE_RVAL_REGS + + +/* Register saving/restoring for maskable interrupts. */ +#define IRQ_STATE_SAVER \ + SAVE_CALL_CLOBBERED_REGS; \ + SAVE_SYS_REGS +#define IRQ_STATE_RESTORER \ + RESTORE_CALL_CLOBBERED_REGS; \ + RESTORE_SYS_REGS +#define IRQ_EXTRA_STATE_SAVER \ + SAVE_CALL_SAVED_REGS +#define IRQ_EXTRA_STATE_RESTORER \ + RESTORE_CALL_SAVED_REGS +#define IRQ_FUNCALL_EXTRA_STATE_SAVER /* nothing */ +#define IRQ_FUNCALL_EXTRA_STATE_RESTORER /* nothing */ + +/* Register saving/restoring for non-maskable interrupts. */ +#define NMI_STATE_SAVER \ + SAVE_CALL_CLOBBERED_REGS; \ + SAVE_SYS_REGS_FOR_NMI +#define NMI_STATE_RESTORER \ + RESTORE_CALL_CLOBBERED_REGS; \ + RESTORE_SYS_REGS_FOR_NMI +#define NMI_EXTRA_STATE_SAVER \ + SAVE_CALL_SAVED_REGS +#define NMI_EXTRA_STATE_RESTORER \ + RESTORE_CALL_SAVED_REGS +#define NMI_FUNCALL_EXTRA_STATE_SAVER /* nothing */ +#define NMI_FUNCALL_EXTRA_STATE_RESTORER /* nothing */ + +/* Register saving/restoring for a context switch. We don't need to save too + many registers, because context-switching looks like a function call (via + the function `switch_thread'), so callers will save any call-clobbered + registers themselves. The stack pointer and return value are handled by + switch_thread itself. */ +#define SWITCH_STATE_SAVER \ + SAVE_CALL_SAVED_REGS +#define SWITCH_STATE_RESTORER \ + RESTORE_CALL_SAVED_REGS + + +/* Restore register state from the struct pt_regs on the stack, switch back + to the user stack if necessary, and return from the trap/interrupt. + EXTRA_STATE_RESTORER is a sequence of assembly language statements to + restore anything not restored by this macro. Only registers not saved by + the C compiler are restored (that is, R3(sp), R4(gp), R31(lp), and + anything restored by EXTRA_STATE_RESTORER). */ +#define RETURN(type) \ + ld.b PTO+PT_KERNEL_MODE[sp], r19; \ + di; /* Disable interrupts */ \ + cmp r19, r0; /* See if returning to kernel mode, */\ + bne 2f; /* ... if so, skip resched &c. */ \ + \ + /* We're returning to user mode, so check for various conditions that \ + trigger rescheduling. */ \ + GET_CURRENT_THREAD(r18); \ + ld.w TI_FLAGS[r18], r19; \ + andi _TIF_NEED_RESCHED, r19, r0; \ + bnz 3f; /* Call the scheduler. */ \ + andi _TIF_SIGPENDING, r19, r0; \ + bnz 4f; /* Signals to handle, handle them */ \ + \ +/* Finally, return to user state. */ \ +1: st.b r0, KM; /* Now officially in user state. */ \ + POP_STATE(type); \ + st.w sp, KSP; /* Save the kernel stack pointer. */ \ + ld.w PT_GPR(GPR_SP)-PT_SIZE[sp], sp; \ + /* Restore user stack pointer. */ \ + reti; \ + \ +/* Return to kernel state. */ \ +2: POP_STATE(type); \ + reti; \ + \ +/* Call the scheduler before returning from a syscall/trap. */ \ +3: SAVE_EXTRA_STATE_FOR_FUNCALL(type); /* Prepare for funcall. */ \ + jarl CSYM(schedule), lp; /* Call scheduler */ \ + di; /* The scheduler enables interrupts */\ + RESTORE_EXTRA_STATE_FOR_FUNCALL(type); \ + br 1b; \ + \ +/* Handle a signal return. */ \ +4: /* Not all registers are saved by the normal trap/interrupt entry \ + points (for instance, call-saved registers (because the normal \ + C-compiler calling sequence in the kernel makes sure they're \ + preserved), and call-clobbered registers in the case of \ + traps), but signal handlers may want to examine or change the \ + complete register state. Here we save anything not saved by \ + the normal entry sequence, so that it may be safely restored \ + (in a possibly modified form) after do_signal returns. */ \ + SAVE_EXTRA_STATE(type) /* Save state not saved by entry. */ \ + movea PTO, sp, r6; /* Arg 1: struct pt_regs *regs */ \ + mov r0, r7; /* Arg 2: sigset_t *oldset */ \ + jarl CSYM(do_signal), lp; /* Handle any signals */ \ + di; /* sig handling enables interrupts */ \ + RESTORE_EXTRA_STATE(type); /* Restore extra regs. */ \ + br 1b; + + +/* Jump to the appropriate function for the system call number in r12 + (r12 is not preserved), or return an error if r12 is not valid. The + LP register should point to the location where the called function + should return. [note that MAKE_SYS_CALL uses label 1] */ +#define MAKE_SYS_CALL \ + /* See if the system call number is valid. */ \ + addi -NR_syscalls, r12, r0; \ + bnh 1f; \ + /* Figure out which function to use for this system call. */ \ + shl 2, r12; \ + mov hilo(CSYM(sys_call_table)), r19; \ + add r19, r12; \ + ld.w 0[r12], r12; \ + /* Make the system call. */ \ + jmp [r12]; \ + /* The syscall number is invalid, return an error. */ \ +1: addi -ENOSYS, r0, r10; \ + jmp [lp]; + + + .text + +/* + * User trap. + * + * Trap 0 system calls are also handled here. + * + * The stack-pointer (r3) should have already been saved to the memory + * location ENTRY_SP (the reason for this is that the interrupt vectors may be + * beyond a 22-bit signed offset jump from the actual interrupt handler, and + * this allows them to save the stack-pointer and use that register to do an + * indirect jump). + * + * Syscall protocol: + * Syscall number in r12, args in r6-r9 + * Return value in r10 + */ +G_ENTRY(trap): + SAVE_STATE (TRAP, r12, ENTRY_SP) // Save registers. + stsr SR_ECR, r19 // Find out which trap it was. + ei // Enable interrupts. + mov hilo(ret_from_trap), lp // where the trap should return + + // The following two shifts (1) clear out extraneous NMI data in the + // upper 16-bits, (2) convert the 0x40 - 0x5f range of trap ECR + // numbers into the (0-31) << 2 range we want, (3) set the flags. + shl 27, r19 // chop off all high bits + shr 25, r19 // scale back down and then << 2 + bnz 2f // See if not trap 0. + + // Trap 0 is a `short' system call, skip general trap table. + MAKE_SYS_CALL // Jump to the syscall function. + +2: // For other traps, use a table lookup. + mov hilo(CSYM(trap_table)), r18 + add r19, r18 + ld.w 0[r18], r18 + jmp [r18] // Jump to the trap handler. +END(trap) + +/* This is just like ret_from_trap, but first restores extra registers + saved by some wrappers. */ +L_ENTRY(restore_extra_regs_and_ret_from_trap): + RESTORE_EXTRA_STATE(TRAP) + // fall through +END(restore_extra_regs_and_ret_from_trap) + +/* Entry point used to return from a syscall/trap. */ +L_ENTRY(ret_from_trap): + RETURN(TRAP) +END(ret_from_trap) + +/* This the initial entry point for a new child thread, with an appropriate + stack in place that makes it look the the child is in the middle of an + syscall. This function is actually `returned to' from switch_thread + (copy_thread makes ret_from_fork the return address in each new thread's + saved context). */ +C_ENTRY(ret_from_fork): +#if defined(CONFIG_SMP) || defined(CONFIG_PREEMPT) + mov r10, r6 // switch_thread returns the prev task. + jarl CSYM(schedule_tail), lp // ...which is schedule_tail's arg +#endif + mov r0, r10 // Child's fork call should return 0. + br ret_from_trap // Do normal trap return. +C_END(ret_from_fork) + + +/* + * Trap 1: `long' system calls + * `Long' syscall protocol: + * Syscall number in r12, args in r6-r9, r13-r14 + * Return value in r10 + */ +L_ENTRY(syscall_long): + // Push extra arguments on the stack. Note that by default, the trap + // handler reserves enough stack space for 6 arguments, so we don't + // have to make any additional room. + st.w r13, 16[sp] // arg 5 + st.w r14, 20[sp] // arg 6 + +#if !TRAPS_PRESERVE_CALL_CLOBBERED_REGS + // Make sure r13 and r14 are preserved, in case we have to restart a + // system call because of a signal (ep has already been set by caller). + st.w r13, PTO+PT_GPR(13)[sp] + st.w r14, PTO+PT_GPR(13)[sp] + mov hilo(ret_from_long_syscall), lp +#endif /* !TRAPS_PRESERVE_CALL_CLOBBERED_REGS */ + + MAKE_SYS_CALL // Jump to the syscall function. +END(syscall_long) + +#if !TRAPS_PRESERVE_CALL_CLOBBERED_REGS +/* Entry point used to return from a long syscall. Only needed to restore + r13/r14 if the general trap mechanism doesnt' do so. */ +L_ENTRY(ret_from_long_syscall): + ld.w PTO+PT_GPR(13)[sp], r13 // Restore the extra registers + ld.w PTO+PT_GPR(13)[sp], r14 + br ret_from_trap // The rest is the same as other traps +END(ret_from_long_syscall) +#endif /* !TRAPS_PRESERVE_CALL_CLOBBERED_REGS */ + + +/* These syscalls need access to the struct pt_regs on the stack, so we + implement them in assembly (they're basically all wrappers anyway). */ + +L_ENTRY(sys_fork_wrapper): +#ifdef CONFIG_NO_MMU + // fork almost works, enough to trick you into looking elsewhere :-( + addi -EINVAL, r0, r10 + jmp [lp] +#else + // Save state not saved by entry. This is actually slight overkill; + // it's actually only necessary to save any state restored by + // switch_thread that's not saved by the trap entry. + SAVE_EXTRA_STATE(TRAP) // Save state not saved by entry. + addi SIGCHLD, r0, r6 // Arg 0: flags + ld.w PTO+PT_GPR(GPR_SP)[sp], r7 // Arg 1: child SP (use parent's) + movea PTO, sp, r8 // Arg 2: parent context + jr CSYM(fork_common) // Do real work (tail-call). +#endif +END(sys_fork_wrapper) + +L_ENTRY(sys_vfork_wrapper): + // Save state not saved by entry. This is actually slight overkill; + // it's actually only necessary to save any state restored by + // switch_thread that's not saved by the trap entry. + SAVE_EXTRA_STATE(TRAP) // Save state not saved by entry. + addi CLONE_VFORK | CLONE_VM | SIGCHLD, r0, r6 // Arg 0: flags + ld.w PTO+PT_GPR(GPR_SP)[sp], r7 // Arg 1: child SP (use parent's) + movea PTO, sp, r8 // Arg 2: parent context + jr CSYM(fork_common) // Do real work (tail-call). +END(sys_vfork_wrapper) + +L_ENTRY(sys_clone_wrapper): + // Save state not saved by entry. This is actually slight overkill; + // it's actually only necessary to save any state restored by + // switch_thread that's not saved by the trap entry. + SAVE_EXTRA_STATE(TRAP) // Save state not saved by entry. + ld.w PTO+PT_GPR(GPR_SP)[sp], r19 // parent's stack pointer + cmp r7, r0 // See if child SP arg (arg 1) is 0. + cmov z, r19, r7, r7 // ... and use the parent's if so. + movea PTO, sp, r8 // Arg 2: parent context + jr CSYM(fork_common) // Do real work (tail-call). +END(sys_clone_wrapper) + +L_ENTRY(sys_execve_wrapper): + movea PTO, sp, r9 // add user context as 4th arg + jr CSYM(sys_execve) // Do real work (tail-call). +END(sys_execve_wrapper) + +L_ENTRY(sys_sigsuspend_wrapper): + SAVE_EXTRA_STATE(TRAP) // Save state not saved by entry. + movea PTO, sp, r7 // add user context as 2nd arg + jarl CSYM(sys_sigsuspend), lp// Do real work. + br restore_extra_regs_and_ret_from_trap +END(sys_sigsuspend_wrapper) +L_ENTRY(sys_rt_sigsuspend_wrapper): + SAVE_EXTRA_STATE(TRAP) // Save state not saved by entry. + movea PTO, sp, r8 // add user context as 3rd arg + jarl CSYM(sys_rt_sigsuspend), lp // Do real work. + br restore_extra_regs_and_ret_from_trap +END(sys_rt_sigsuspend_wrapper) + +L_ENTRY(sys_sigreturn_wrapper): + SAVE_EXTRA_STATE(TRAP) // Save state not saved by entry. + movea PTO, sp, r6 // add user context as 1st arg + jarl CSYM(sys_sigreturn), lp // Do real work. + br restore_extra_regs_and_ret_from_trap +END(sys_sigreturn_wrapper) +L_ENTRY(sys_rt_sigreturn_wrapper): + SAVE_EXTRA_STATE(TRAP) // Save state not saved by entry. + movea PTO, sp, r6 // add user context as 1st arg + jarl CSYM(sys_rt_sigreturn), lp // Do real work. + br restore_extra_regs_and_ret_from_trap +END(sys_rt_sigreturn_wrapper) + + +/* + * Hardware maskable interrupts. + * + * The stack-pointer (r3) should have already been saved to the memory + * location ENTRY_SP (the reason for this is that the interrupt vectors may be + * beyond a 22-bit signed offset jump from the actual interrupt handler, and + * this allows them to save the stack-pointer and use that register to do an + * indirect jump). + */ +G_ENTRY(irq): + SAVE_STATE (IRQ, r0, ENTRY_SP) // Save registers. + + stsr SR_ECR, r6 // Find out which interrupt it was. + movea PTO, sp, r7 // User regs are arg2 + + // All v850 implementations I know about encode their interrupts as + // multiples of 0x10, starting at 0x80 (after NMIs and software + // interrupts). Convert this number into a simple IRQ index for the + // rest of the kernel. We also clear the upper 16 bits, which hold + // NMI info, and don't appear to be cleared when a NMI returns. + shl 16, r6 // clear upper 16 bits + shr 20, r6 // shift back, and remove lower nibble + add -8, r6 // remove bias for irqs + // Call the high-level interrupt handling code. + jarl CSYM(handle_irq), lp + // fall through + +/* Entry point used to return from an interrupt (also used by exception + handlers, below). */ +ret_from_irq: + RETURN(IRQ) +END(irq) + + +/* + * Hardware non-maskable interrupts. + * + * The stack-pointer (r3) should have already been saved to the memory + * location ENTRY_SP (the reason for this is that the interrupt vectors may be + * beyond a 22-bit signed offset jump from the actual interrupt handler, and + * this allows them to save the stack-pointer and use that register to do an + * indirect jump). + */ +G_ENTRY(nmi): + SAVE_STATE (NMI, r0, NMI_ENTRY_SP); /* Save registers. */ + + stsr SR_ECR, r6; /* Find out which nmi it was. */ + shr 20, r6; /* Extract NMI code in bits 20-24. */ + movea PTO, sp, r7; /* User regs are arg2. */ + + /* Non-maskable interrupts always lie right after maskable interrupts. + Call the generic IRQ handler, with two arguments, the IRQ number, + and a pointer to the user registers, to handle the specifics. + (we subtract one because the first NMI has code 1). */ + addi FIRST_NMI - 1, r6, r6; + jarl CSYM(handle_irq), lp + + RETURN(NMI) +END(nmi0) + + +/* + * Illegal instruction trap. + * + * The stack-pointer (r3) should have already been saved to the memory + * location ENTRY_SP (the reason for this is that the interrupt vectors may be + * beyond a 22-bit signed offset jump from the actual interrupt handler, and + * this allows them to save the stack-pointer and use that register to do an + * indirect jump). + */ +G_ENTRY(illegal_instruction): + SAVE_STATE (IRQ, r0, ENTRY_SP) // Save registers. + ei + addi SIGILL, r0, r6 // Arg 0: signal number + mov CURRENT_TASK, r7 // Arg 1: task + mov hilo(ret_from_irq), lp // where the handler should return + jr CSYM(force_sig) +END(illegal_instruction) + + +/* + * `Debug' trap + * + * The stack-pointer (r3) should have already been saved to the memory + * location ENTRY_SP (the reason for this is that the interrupt vectors may be + * beyond a 22-bit signed offset jump from the actual interrupt handler, and + * this allows them to save the stack-pointer and use that register to do an + * indirect jump). + */ +G_ENTRY(dbtrap): + SAVE_STATE (IRQ, r0, ENTRY_SP) // Save registers. + ei + movea PTO, sp, r6 // Arg 0: user regs + mov hilo(ret_from_irq), lp // where the handler should return + jr CSYM(debug_trap) +END(dbtrap) + + +/* + * Trap with no handler + */ +L_ENTRY(bad_trap_wrapper): + mov r19, r6 // Arg 0: trap number + movea PTO, sp, r7 // Arg 1: user regs + jr CSYM(bad_trap) // tail call handler +END(bad_trap_wrapper) + + +/* + * This is where we switch between two threads. The arguments are: + * r6 -- pointer to the struct thread for the `current' process + * r7 -- pointer to the struct thread for the `new' process. + * when this function returns, it will return to the new thread. + */ +C_ENTRY(switch_thread): + // Return the previous task (r10 is not clobbered by restore below) + mov CURRENT_TASK, r10 + // First, push the current processor state on the stack + PUSH_STATE(SWITCH) + // Now save the location of the kernel stack pointer for this thread; + // since we've pushed all other state on the stack, this is enough to + // restore it all later. + st.w sp, THREAD_KSP[r6] + // Now restore the stack pointer from the new process + ld.w THREAD_KSP[r7], sp + // ... and restore all state from that + POP_STATE(SWITCH) + // Update the current task pointer + GET_CURRENT_TASK(CURRENT_TASK) + // Now return into the new thread + jmp [lp] +C_END(switch_thread) + + + .data + + .align 4 + .globl CSYM(trap_table) +CSYM(trap_table): + .long bad_trap_wrapper // trap 0, doesn't use trap table. + .long syscall_long // trap 1, `long' syscall. + .long bad_trap_wrapper + .long bad_trap_wrapper + .long bad_trap_wrapper + .long bad_trap_wrapper + .long bad_trap_wrapper + .long bad_trap_wrapper + .long bad_trap_wrapper + .long bad_trap_wrapper + .long bad_trap_wrapper + .long bad_trap_wrapper + .long bad_trap_wrapper + .long bad_trap_wrapper + .long bad_trap_wrapper + .long bad_trap_wrapper + + + .section .rodata + + .align 4 + .globl CSYM(sys_call_table) +CSYM(sys_call_table): + .long CSYM(sys_ni_syscall) // 0 - old "setup()" system call + .long CSYM(sys_exit) + .long sys_fork_wrapper + .long CSYM(sys_read) + .long CSYM(sys_write) + .long CSYM(sys_open) // 5 + .long CSYM(sys_close) + .long CSYM(sys_waitpid) + .long CSYM(sys_creat) + .long CSYM(sys_link) + .long CSYM(sys_unlink) // 10 + .long sys_execve_wrapper + .long CSYM(sys_chdir) + .long CSYM(sys_time) + .long CSYM(sys_mknod) + .long CSYM(sys_chmod) // 15 + .long CSYM(sys_chown) + .long CSYM(sys_ni_syscall) // was: break + .long CSYM(sys_ni_syscall) // was: oldstat (aka stat) + .long CSYM(sys_lseek) + .long CSYM(sys_getpid) // 20 + .long CSYM(sys_mount) + .long CSYM(sys_oldumount) + .long CSYM(sys_setuid) + .long CSYM(sys_getuid) + .long CSYM(sys_stime) // 25 + .long CSYM(sys_ptrace) + .long CSYM(sys_alarm) + .long CSYM(sys_ni_syscall) // was: oldfstat (aka fstat) + .long CSYM(sys_pause) + .long CSYM(sys_utime) // 30 + .long CSYM(sys_ni_syscall) // was: stty + .long CSYM(sys_ni_syscall) // was: gtty + .long CSYM(sys_access) + .long CSYM(sys_nice) + .long CSYM(sys_ni_syscall) // 35, was: ftime + .long CSYM(sys_sync) + .long CSYM(sys_kill) + .long CSYM(sys_rename) + .long CSYM(sys_mkdir) + .long CSYM(sys_rmdir) // 40 + .long CSYM(sys_dup) + .long CSYM(sys_pipe) + .long CSYM(sys_times) + .long CSYM(sys_ni_syscall) // was: prof + .long CSYM(sys_brk) // 45 + .long CSYM(sys_setgid) + .long CSYM(sys_getgid) + .long CSYM(sys_signal) + .long CSYM(sys_geteuid) + .long CSYM(sys_getegid) // 50 + .long CSYM(sys_acct) + .long CSYM(sys_umount) // recycled never used phys() + .long CSYM(sys_ni_syscall) // was: lock + .long CSYM(sys_ioctl) + .long CSYM(sys_fcntl) // 55 + .long CSYM(sys_ni_syscall) // was: mpx + .long CSYM(sys_setpgid) + .long CSYM(sys_ni_syscall) // was: ulimit + .long CSYM(sys_ni_syscall) + .long CSYM(sys_umask) // 60 + .long CSYM(sys_chroot) + .long CSYM(sys_ustat) + .long CSYM(sys_dup2) + .long CSYM(sys_getppid) + .long CSYM(sys_getpgrp) // 65 + .long CSYM(sys_setsid) + .long CSYM(sys_sigaction) + .long CSYM(sys_sgetmask) + .long CSYM(sys_ssetmask) + .long CSYM(sys_setreuid) // 70 + .long CSYM(sys_setregid) + .long sys_sigsuspend_wrapper + .long CSYM(sys_sigpending) + .long CSYM(sys_sethostname) + .long CSYM(sys_setrlimit) // 75 + .long CSYM(sys_getrlimit) + .long CSYM(sys_getrusage) + .long CSYM(sys_gettimeofday) + .long CSYM(sys_settimeofday) + .long CSYM(sys_getgroups) // 80 + .long CSYM(sys_setgroups) + .long CSYM(sys_select) + .long CSYM(sys_symlink) + .long CSYM(sys_ni_syscall) // was: oldlstat (aka lstat) + .long CSYM(sys_readlink) // 85 + .long CSYM(sys_uselib) + .long CSYM(sys_swapon) + .long CSYM(sys_reboot) + .long CSYM(old_readdir) + .long CSYM(sys_mmap) // 90 + .long CSYM(sys_munmap) + .long CSYM(sys_truncate) + .long CSYM(sys_ftruncate) + .long CSYM(sys_fchmod) + .long CSYM(sys_fchown) // 95 + .long CSYM(sys_getpriority) + .long CSYM(sys_setpriority) + .long CSYM(sys_ni_syscall) // was: profil + .long CSYM(sys_statfs) + .long CSYM(sys_fstatfs) // 100 + .long CSYM(sys_ni_syscall) // i386: ioperm + .long CSYM(sys_socketcall) + .long CSYM(sys_syslog) + .long CSYM(sys_setitimer) + .long CSYM(sys_getitimer) // 105 + .long CSYM(sys_newstat) + .long CSYM(sys_newlstat) + .long CSYM(sys_newfstat) + .long CSYM(sys_ni_syscall) // was: olduname (aka uname) + .long CSYM(sys_ni_syscall) // 110, i386: iopl + .long CSYM(sys_vhangup) + .long CSYM(sys_ni_syscall) // was: idle + .long CSYM(sys_ni_syscall) // i386: vm86old + .long CSYM(sys_wait4) + .long CSYM(sys_swapoff) // 115 + .long CSYM(sys_sysinfo) + .long CSYM(sys_ipc) + .long CSYM(sys_fsync) + .long sys_sigreturn_wrapper + .long sys_clone_wrapper // 120 + .long CSYM(sys_setdomainname) + .long CSYM(sys_newuname) + .long CSYM(sys_ni_syscall) // i386: modify_ldt, m68k: cacheflush + .long CSYM(sys_adjtimex) + .long CSYM(sys_mprotect) // 125 + .long CSYM(sys_sigprocmask) + .long CSYM(sys_create_module) + .long CSYM(sys_init_module) + .long CSYM(sys_delete_module) + .long CSYM(sys_get_kernel_syms) // 130 + .long CSYM(sys_quotactl) + .long CSYM(sys_getpgid) + .long CSYM(sys_fchdir) + .long CSYM(sys_bdflush) + .long CSYM(sys_sysfs) // 135 + .long CSYM(sys_personality) + .long CSYM(sys_ni_syscall) // for afs_syscall + .long CSYM(sys_setfsuid) + .long CSYM(sys_setfsgid) + .long CSYM(sys_llseek) // 140 + .long CSYM(sys_getdents) + .long CSYM(sys_select) // for backward compat; remove someday + .long CSYM(sys_flock) + .long CSYM(sys_msync) + .long CSYM(sys_readv) // 145 + .long CSYM(sys_writev) + .long CSYM(sys_getsid) + .long CSYM(sys_fdatasync) + .long CSYM(sys_sysctl) + .long CSYM(sys_mlock) // 150 + .long CSYM(sys_munlock) + .long CSYM(sys_mlockall) + .long CSYM(sys_munlockall) + .long CSYM(sys_sched_setparam) + .long CSYM(sys_sched_getparam) // 155 + .long CSYM(sys_sched_setscheduler) + .long CSYM(sys_sched_getscheduler) + .long CSYM(sys_sched_yield) + .long CSYM(sys_sched_get_priority_max) + .long CSYM(sys_sched_get_priority_min) // 160 + .long CSYM(sys_sched_rr_get_interval) + .long CSYM(sys_nanosleep) + .long CSYM(sys_mremap) + .long CSYM(sys_setresuid) + .long CSYM(sys_getresuid) // 165 + .long CSYM(sys_ni_syscall) // for vm86 + .long CSYM(sys_query_module) + .long CSYM(sys_poll) + .long CSYM(sys_nfsservctl) + .long CSYM(sys_setresgid) // 170 + .long CSYM(sys_getresgid) + .long CSYM(sys_prctl) + .long sys_rt_sigreturn_wrapper + .long CSYM(sys_rt_sigaction) + .long CSYM(sys_rt_sigprocmask) // 175 + .long CSYM(sys_rt_sigpending) + .long CSYM(sys_rt_sigtimedwait) + .long CSYM(sys_rt_sigqueueinfo) + .long sys_rt_sigsuspend_wrapper + .long CSYM(sys_pread64) // 180 + .long CSYM(sys_pwrite64) + .long CSYM(sys_lchown) + .long CSYM(sys_getcwd) + .long CSYM(sys_capget) + .long CSYM(sys_capset) // 185 + .long CSYM(sys_sigaltstack) + .long CSYM(sys_sendfile) + .long CSYM(sys_ni_syscall) // streams1 + .long CSYM(sys_ni_syscall) // streams2 + .long sys_vfork_wrapper // 190 + .long CSYM(sys_ni_syscall) + .long CSYM(sys_mmap2) + .long CSYM(sys_truncate64) + .long CSYM(sys_ftruncate64) + .long CSYM(sys_stat64) // 195 + .long CSYM(sys_lstat64) + .long CSYM(sys_fstat64) + .long CSYM(sys_fcntl64) + .long CSYM(sys_getdents64) + .long CSYM(sys_pivot_root) // 200 + .long CSYM(sys_gettid) + .long CSYM(sys_tkill) + .long CSYM(sys_mincore) // just returns ENOSYS without MMU + .long CSYM(sys_madvise) // just returns ENOSYS without MMU + + .space (NR_syscalls-205)*4 diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/kernel/fpga85e2c.c linux.2.5.40-ac2/arch/v850/kernel/fpga85e2c.c --- linux.2.5.40/arch/v850/kernel/fpga85e2c.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/kernel/fpga85e2c.c 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,167 @@ +/* + * arch/v850/kernel/fpga85e2c.h -- Machine-dependent defs for + * FPGA implementation of V850E2/NA85E2C + * + * Copyright (C) 2002 NEC Corporation + * Copyright (C) 2002 Miles Bader + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file COPYING in the main directory of this + * archive for more details. + * + * Written by Miles Bader + */ + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "mach.h" + +extern void memcons_setup (void); + + +#define REG_DUMP_ADDR 0x220000 + + +extern struct irqaction reg_snap_action; /* fwd decl */ + + +void __init mach_early_init (void) +{ + int i; + const u32 *src; + register u32 *dst asm ("ep"); + extern int panic_timeout; + extern u32 _intv_end, _intv_load_start; + + /* Set bus sizes: CS0 32-bit, CS1 16-bit, CS7 8-bit, + everything else 32-bit. */ + BSC = 0x2AA6; + for (i = 2; i <= 6; i++) + CSDEV(i) = 0; /* 32 bit */ + + /* Ensure that the simulator halts on a panic, instead of going + into an infinite loop inside the panic function. */ + panic_timeout = -1; + + /* Move the interrupt vectors into their real location. Note that + any relocations there are relative to the real location, so we + don't have to fix anything up. We use a loop instead of calling + memcpy to keep this a leaf function (to avoid a function + prologue being generated). */ + dst = 0x10; /* &_intv_start + 0x10. */ + src = &_intv_load_start; + do { + u32 t0 = src[0], t1 = src[1], t2 = src[2], t3 = src[3]; + u32 t4 = src[4], t5 = src[5], t6 = src[6], t7 = src[7]; + dst[0] = t0; dst[1] = t1; dst[2] = t2; dst[3] = t3; + dst[4] = t4; dst[5] = t5; dst[6] = t6; dst[7] = t7; + dst += 8; + src += 8; + } while (dst < &_intv_end); +} + +void __init mach_setup (char **cmdline) +{ + printk (KERN_INFO "CPU: NEC V850E2 (NA85E2C FPGA implementation)\n"); + + memcons_setup (); + + /* Setup up NMI0 to copy the registers to a known memory location. + The FGPA board has a button that produces NMI0 when pressed, so + this allows us to push the button, and then look at memory to see + what's in the registers (there's no other way to easily do so). + We have to use `setup_irq' instead of `request_irq' because it's + still too early to do memory allocation. */ + setup_irq (IRQ_NMI (0), ®_snap_action); +} + +void mach_get_physical_ram (unsigned long *ram_start, unsigned long *ram_len) +{ + *ram_start = ERAM_ADDR; + *ram_len = ERAM_SIZE; +} + +void __init mach_sched_init (struct irqaction *timer_action) +{ + /* Setup up the timer interrupt. The FPGA peripheral control + registers _only_ work with single-bit writes (set1/clr1)! */ + __clear_bit (RPU_GTMC_CE_BIT, &RPU_GTMC); + __clear_bit (RPU_GTMC_CLK_BIT, &RPU_GTMC); + __set_bit (RPU_GTMC_CE_BIT, &RPU_GTMC); + + /* We use the first RPU interrupt, which occurs every 8.192ms. */ + setup_irq (IRQ_RPU (0), timer_action); +} + + +void mach_gettimeofday (struct timeval *tv) +{ + tv->tv_sec = 0; + tv->tv_usec = 0; +} + +void machine_halt (void) __attribute__ ((noreturn)); +void machine_halt (void) +{ + for (;;) { + DWC(0) = 0x7777; + DWC(1) = 0x7777; + ASC = 0xffff; + FLGREG(0) = 1; /* Halt immediately. */ + asm ("di; halt; nop; nop; nop; nop; nop"); + } +} + +void machine_restart (char *__unused) +{ + machine_halt (); +} + +void machine_power_off (void) +{ + machine_halt (); +} + + +/* Interrupts */ + +struct nb85e_intc_irq_init irq_inits[] = { + { "IRQ", 0, NUM_MACH_IRQS, 7 }, + { "RPU", IRQ_RPU(0), IRQ_RPU_NUM, 6 }, + { 0 } +}; +#define NUM_IRQ_INITS ((sizeof irq_inits / sizeof irq_inits[0]) - 1) + +struct hw_interrupt_type hw_itypes[NUM_IRQ_INITS]; + +/* Initialize interrupts. */ +void __init mach_init_irqs (void) +{ + nb85e_intc_init_irq_types (irq_inits, hw_itypes); +} + + +/* An interrupt handler that copies the registers to a known memory location, + for debugging purposes. */ + +static void make_reg_snap (int irq, void *dummy, struct pt_regs *regs) +{ + (*(unsigned *)REG_DUMP_ADDR)++; + (*(struct pt_regs *)(REG_DUMP_ADDR + sizeof (unsigned))) = *regs; +} + +static int reg_snap_dev_id; +static struct irqaction reg_snap_action = { + make_reg_snap, 0, 0, "reg_snap", ®_snap_dev_id, 0 +}; diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/kernel/gbus_int.c linux.2.5.40-ac2/arch/v850/kernel/gbus_int.c --- linux.2.5.40/arch/v850/kernel/gbus_int.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/kernel/gbus_int.c 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,274 @@ +/* + * arch/v850/kernel/gbus_int.c -- Midas labs GBUS interrupt support + * + * Copyright (C) 2001,02 NEC Corporation + * Copyright (C) 2001,02 Miles Bader + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file COPYING in the main directory of this + * archive for more details. + * + * Written by Miles Bader + */ + +#include +#include +#include +#include /* For some unfathomable reason, + request_irq/free_irq are declared here. */ + +#include +#include + + +/* The number of shared GINT interrupts. */ +#define NUM_GINTS 4 + +/* For each GINT interrupt, how many GBUS interrupts are using it. */ +static unsigned gint_num_active_irqs[NUM_GINTS] = { 0 }; + +/* A table of GINTn interrupts we actually use. */ +struct used_gint { + unsigned gint; + unsigned priority; +} used_gint[] = { + { 1, GBUS_INT_PRIORITY_HIGH }, + { 3, GBUS_INT_PRIORITY_LOW } +}; +#define NUM_USED_GINTS (sizeof used_gint / sizeof used_gint[0]) + +/* A table of which GINT is used by each GBUS interrupts (they are + assigned based on priority). */ +static unsigned char gbus_int_gint[IRQ_GBUS_INT_NUM]; + + +/* Interrupt enabling/disabling. */ + +/* Enable interrupt handling for interrupt IRQ. */ +void gbus_int_enable_irq (unsigned irq) +{ + unsigned gint = gbus_int_gint[irq - GBUS_INT_BASE_IRQ]; + GBUS_INT_ENABLE (GBUS_INT_IRQ_WORD(irq), gint) + |= GBUS_INT_IRQ_MASK (irq); +} + +/* Disable interrupt handling for interrupt IRQ. Note that any + interrupts received while disabled will be delivered once the + interrupt is enabled again, unless they are explicitly cleared using + `gbus_int_clear_pending_irq'. */ +void gbus_int_disable_irq (unsigned irq) +{ + unsigned gint = gbus_int_gint[irq - GBUS_INT_BASE_IRQ]; + GBUS_INT_ENABLE (GBUS_INT_IRQ_WORD(irq), gint) + &= ~GBUS_INT_IRQ_MASK (irq); +} + +/* Return true if interrupt handling for interrupt IRQ is enabled. */ +int gbus_int_irq_enabled (unsigned irq) +{ + unsigned gint = gbus_int_gint[irq - GBUS_INT_BASE_IRQ]; + return (GBUS_INT_ENABLE (GBUS_INT_IRQ_WORD(irq), gint) + & GBUS_INT_IRQ_MASK(irq)); +} + +/* Disable all GBUS irqs. */ +int gbus_int_disable_irqs () +{ + unsigned w, n; + for (w = 0; w < GBUS_INT_NUM_WORDS; w++) + for (n = 0; n < IRQ_GINT_NUM; n++) + GBUS_INT_ENABLE (w, n) = 0; +} + +/* Clear any pending interrupts for IRQ. */ +void gbus_int_clear_pending_irq (unsigned irq) +{ + GBUS_INT_CLEAR (GBUS_INT_IRQ_WORD(irq)) = GBUS_INT_IRQ_MASK (irq); +} + +/* Return true if interrupt IRQ is pending (but disabled). */ +int gbus_int_irq_pending (unsigned irq) +{ + return (GBUS_INT_STATUS (GBUS_INT_IRQ_WORD(irq)) + & GBUS_INT_IRQ_MASK(irq)); +} + + +/* Delegating interrupts. */ + +/* Handle a shared GINT interrupt by passing to the appropriate GBUS + interrupt handler. */ +static void gbus_int_handle_irq (int irq, void *dev_id, struct pt_regs *regs) +{ + unsigned w; + unsigned gint = irq - IRQ_GINT (0); + + for (w = 0; w < GBUS_INT_NUM_WORDS; w++) { + unsigned status = GBUS_INT_STATUS (w); + unsigned enable = GBUS_INT_ENABLE (w, gint); + + /* Only pay attention to enabled interrupts. */ + status &= enable; + if (status) { + unsigned base_irq + = IRQ_GBUS_INT (w * GBUS_INT_BITS_PER_WORD); + irq = base_irq; + do { + /* There's an active interrupt in word + W, find out which one, and call its + handler. */ + + while (! (status & 0x1)) { + irq++; + status >>= 1; + } + status &= ~0x1; + + /* Recursively call handle_irq to handle it. */ + handle_irq (irq, regs); + } while (status); + } + } + + /* Toggle the `all enable' bit back and forth, which should cause + another edge transition if there are any other interrupts + still pending, and so result in another CPU interrupt. */ + GBUS_INT_ENABLE (0, gint) &= ~0x1; + GBUS_INT_ENABLE (0, gint) |= 0x1; +} + + +/* Initialize GBUS interrupt sources. */ + +static void irq_nop (unsigned irq) { } + +static unsigned gbus_int_startup_irq (unsigned irq) +{ + unsigned gint = gbus_int_gint[irq - GBUS_INT_BASE_IRQ]; + + if (gint_num_active_irqs[gint] == 0) { + /* First enable the CPU interrupt. */ + int rval = + request_irq (IRQ_GINT(gint), gbus_int_handle_irq, + SA_INTERRUPT, + "gbus_int_handler", + &gint_num_active_irqs[gint]); + if (rval != 0) + return rval; + } + + gint_num_active_irqs[gint]++; + + gbus_int_clear_pending_irq (irq); + gbus_int_enable_irq (irq); + + return 0; +} + +static void gbus_int_shutdown_irq (unsigned irq) +{ + unsigned gint = gbus_int_gint[irq - GBUS_INT_BASE_IRQ]; + + gbus_int_disable_irq (irq); + + if (--gint_num_active_irqs[gint] == 0) + /* Disable the CPU interrupt. */ + free_irq (IRQ_GINT(gint), &gint_num_active_irqs[gint]); +} + +/* Initialize HW_IRQ_TYPES for INTC-controlled irqs described in array + INITS (which is terminated by an entry with the name field == 0). */ +void __init gbus_int_init_irq_types (struct gbus_int_irq_init *inits, + struct hw_interrupt_type *hw_irq_types) +{ + struct gbus_int_irq_init *init; + for (init = inits; init->name; init++) { + int i; + struct hw_interrupt_type *hwit = hw_irq_types++; + + hwit->typename = init->name; + + hwit->startup = gbus_int_startup_irq; + hwit->shutdown = gbus_int_shutdown_irq; + hwit->enable = gbus_int_enable_irq; + hwit->disable = gbus_int_disable_irq; + hwit->ack = irq_nop; + hwit->end = irq_nop; + + /* Initialize kernel IRQ infrastructure for this interrupt. */ + init_irq_handlers (init->base, init->num, hwit); + + /* Set the interrupt priorities. */ + for (i = 0; i < init->num; i++) { + int j; + for (j = 0; j < NUM_USED_GINTS; j++) + if (used_gint[j].priority > init->priority) + break; + /* Wherever we stopped looking is one past the + GINT we want. */ + gbus_int_gint[init->base + i - GBUS_INT_BASE_IRQ] + = used_gint[j > 0 ? j - 1 : 0].gint; + } + } +} + + +/* Initialize IRQS. */ + +/* Chip interrupts (GINTn) shared among GBUS interrupts. */ + +static char gint_names[NUM_USED_GINTS][6]; +static struct hw_interrupt_type gint_hw_itypes[NUM_USED_GINTS]; + + +/* GBUS interrupts themselves. */ + +__init struct gbus_int_irq_init gbus_irq_inits[] = { + /* First set defaults. */ + { "GBUS_INT", IRQ_GBUS_INT(0), IRQ_GBUS_INT_NUM, 6}, + { 0 } +}; +#define NUM_GBUS_IRQ_INITS \ + ((sizeof gbus_irq_inits / sizeof gbus_irq_inits[0]) - 1) + +static struct hw_interrupt_type gbus_hw_itypes[NUM_GBUS_IRQ_INITS]; + + +/* Initialize GBUS interrupts. */ +void __init gbus_int_init_irqs (void) +{ + int i; + + /* First initialize the shared gint interrupts. */ + for (i = 0; i < NUM_USED_GINTS; i++) { + unsigned gint = used_gint[i].gint; + struct nb85e_intc_irq_init gint_irq_init[2]; + + gint_names[i][0] = 'G'; + gint_names[i][1] = 'I'; + gint_names[i][2] = 'N'; + gint_names[i][3] = 'T'; + gint_names[i][4] = '0' + gint; + gint_names[i][5] = '\0'; + + /* We initialize one GINT interrupt at a time. */ + gint_irq_init[0].name = gint_names[i]; + gint_irq_init[0].base = IRQ_GINT (gint); + gint_irq_init[0].num = 1; + gint_irq_init[0].priority = used_gint[i].priority; + + gint_irq_init[1].name = 0; /* Terminate the vector. */ + + nb85e_intc_init_irq_types (gint_irq_init, gint_hw_itypes); + } + + /* Then the GBUS interrupts. */ + gbus_int_disable_irqs (); + gbus_int_init_irq_types (gbus_irq_inits, gbus_hw_itypes); + /* Turn on the `all enable' bits, which are ANDed with + individual interrupt enable bits; we only want to bother with + the latter. They are the first bit in the first word of each + interrupt-enable area. */ + for (i = 0; i < NUM_USED_GINTS; i++) + GBUS_INT_ENABLE (0, used_gint[i].gint) = 0x1; +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/kernel/head.S linux.2.5.40-ac2/arch/v850/kernel/head.S --- linux.2.5.40/arch/v850/kernel/head.S 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/kernel/head.S 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,103 @@ +/* + * arch/v850/kernel/head.S -- Lowest-level startup code + * + * Copyright (C) 2001,02 NEC Corporation + * Copyright (C) 2001,02 Miles Bader + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file COPYING in the main directory of this + * archive for more details. + * + * Written by Miles Bader + */ + +#include +#include +#include +#include +#include + + +/* Make a slightly more convenient alias for C_SYMBOL_NAME. */ +#define CSYM C_SYMBOL_NAME + + + .text + + // Define `mach_early_init' as a weak symbol + .global CSYM(mach_early_init) + .weak CSYM(mach_early_init) + +C_ENTRY(start): + // Make sure interrupts are turned off, just in case + di + +#ifdef CONFIG_RESET_GUARD + // See if we got here via an unexpected reset + ld.w RESET_GUARD, r19 // Check current value of reset guard + mov RESET_GUARD_ACTIVE, r20 + cmp r19, r20 + bne 1f // Guard was not active + + // If we get here, the reset guard was active. Load up some + // interesting values as arguments, and jump to the handler. + st.w r0, RESET_GUARD // Allow further resets to succeed + mov lp, r6 // Arg 0: return address + ld.b KM, r7 // Arg 1: kernel mode + mov sp, r9 // Arg 3: stack pointer + ld.w KSP, r19 // maybe switch to kernel stack + cmp r7, r0 // see if already in kernel mode + cmov z, r19, sp, sp // and switch to kernel stack if not + GET_CURRENT_TASK(r8) // Arg 2: task pointer + jr CSYM(unexpected_reset) + +1: st.w r20, RESET_GUARD // Turn on reset guard +#endif /* CONFIG_RESET_GUARD */ + + // Load the initial thread's stack, and current task pointer (in r16) + mov hilo(CSYM(init_thread_union)), r19 + movea THREAD_SIZE, r19, sp + ld.w TI_TASK[r19], CURRENT_TASK + + // See if there's a platform-specific early-initialization routine + // defined; it's a weak symbol, so it will have an address of zero if + // there's not. + mov hilo(CSYM(mach_early_init)), r6 + cmp r6, r0 + bz 3f + + // There is one, so call it. If this function is written in C, it + // should be very careful -- the stack pointer is valid, but very + // little else is (e.g., bss is not zeroed yet). + jarl 2f, lp // first figure out return address +2: add 3f - ., lp + jmp [r6] // do call +3: + +#ifdef CONFIG_TIME_BOOTUP + /* This stuff must come after mach_early_init, because interrupts may + not work until after its been called. */ + jarl CSYM(highres_timer_reset), lp + jarl CSYM(highres_timer_start), lp +#endif + + // Kernel stack pointer save location + st.w sp, KSP + + // Assert that we're in `kernel mode' + mov 1, r19 + st.w r19, KM + +#ifdef CONFIG_ZERO_BSS + // Zero bss area, since we can't rely upon any loader to do so + mov hilo(CSYM(_sbss)), r6 + mov r0, r7 + mov hilo(CSYM(_ebss)), r8 + sub r6, r8 + jarl CSYM(memset), lp +#endif + + // Start Linux kernel. + mov hilo(CSYM(machine_halt)), lp + jr CSYM(start_kernel) +END(start) diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/kernel/highres_timer.c linux.2.5.40-ac2/arch/v850/kernel/highres_timer.c --- linux.2.5.40/arch/v850/kernel/highres_timer.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/kernel/highres_timer.c 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,132 @@ +/* + * arch/v850/kernel/highres_timer.c -- High resolution timing routines + * + * Copyright (C) 2001,02 NEC Corporation + * Copyright (C) 2001,02 Miles Bader + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file COPYING in the main directory of this + * archive for more details. + * + * Written by Miles Bader + */ + +#include +#include +#include + +#define HIGHRES_TIMER_USEC_SHIFT 12 + +/* Pre-calculated constant used for converting ticks to real time + units. We initialize it to prevent it being put into BSS. */ +static u32 highres_timer_usec_prescale = 1; + +void highres_timer_slow_tick_irq (void) __attribute__ ((noreturn)); +void highres_timer_slow_tick_irq (void) +{ + /* This is an interrupt handler, so it must be very careful to + not to trash any registers. At this point, the stack-pointer + (r3) has been saved in the chip ram location ENTRY_SP by the + interrupt vector, so we can use it as a scratch register; we + must also restore it before returning. */ + asm ("ld.w %0[r0], sp;" + "add 1, sp;" + "st.w sp, %0[r0];" + "ld.w %1[r0], sp;" /* restore pre-irq stack-pointer */ + "reti" + :: + "i" (HIGHRES_TIMER_SLOW_TICKS_ADDR), + "i" (ENTRY_SP_ADDR) + : "memory"); +} + +void highres_timer_reset (void) +{ + NB85E_TIMER_D_TMD (HIGHRES_TIMER_TIMER_D_UNIT) = 0; + HIGHRES_TIMER_SLOW_TICKS = 0; +} + +void highres_timer_start (void) +{ + u32 fast_tick_rate; + + /* Start hardware timer. */ + nb85e_timer_d_configure (HIGHRES_TIMER_TIMER_D_UNIT, + HIGHRES_TIMER_SLOW_TICK_RATE); + + fast_tick_rate = + (cpu_clock_freq + >> NB85E_TIMER_D_DIVLOG2 (HIGHRES_TIMER_TIMER_D_UNIT)); + + /* The obvious way of calculating microseconds from fast ticks + is to do: + + usec = fast_ticks * 10^6 / fast_tick_rate + + However, divisions are much slower than multiplications, and + the above calculation can overflow, so we do this instead: + + usec = fast_ticks * (10^6 * 2^12 / fast_tick_rate) / 2^12 + + since we can pre-calculate (10^6 * (2^12 / fast_tick_rate)) + and use a shift for dividing by 2^12, this avoids division, + and is almost as accurate (it differs by about 2 microseconds + at the extreme value of the fast-tick counter's ranger). */ + highres_timer_usec_prescale = ((1000000 << HIGHRES_TIMER_USEC_SHIFT) + / fast_tick_rate); + + /* Enable the interrupt (which is hardwired to this use), and + give it the highest priority. */ + NB85E_INTC_IC (IRQ_INTCMD (HIGHRES_TIMER_TIMER_D_UNIT)) = 0; +} + +void highres_timer_stop (void) +{ + /* Stop the timer. */ + NB85E_TIMER_D_TMCD (HIGHRES_TIMER_TIMER_D_UNIT) = + NB85E_TIMER_D_TMCD_CAE; + /* Disable its interrupt, just in case. */ + nb85e_intc_disable_irq (IRQ_INTCMD (HIGHRES_TIMER_TIMER_D_UNIT)); +} + +inline void highres_timer_read_ticks (u32 *slow_ticks, u32 *fast_ticks) +{ + int flags; + u32 fast_ticks_1, fast_ticks_2, _slow_ticks; + + local_irq_save (flags); + fast_ticks_1 = NB85E_TIMER_D_TMD (HIGHRES_TIMER_TIMER_D_UNIT); + _slow_ticks = HIGHRES_TIMER_SLOW_TICKS; + fast_ticks_2 = NB85E_TIMER_D_TMD (HIGHRES_TIMER_TIMER_D_UNIT); + local_irq_restore (flags); + + if (fast_ticks_2 < fast_ticks_1) + _slow_ticks++; + + *slow_ticks = _slow_ticks; + *fast_ticks = fast_ticks_2; +} + +inline void highres_timer_ticks_to_timeval (u32 slow_ticks, u32 fast_ticks, + struct timeval *tv) +{ + unsigned long sec, sec_rem, usec; + + usec = ((fast_ticks * highres_timer_usec_prescale) + >> HIGHRES_TIMER_USEC_SHIFT); + + sec = slow_ticks / HIGHRES_TIMER_SLOW_TICK_RATE; + sec_rem = slow_ticks % HIGHRES_TIMER_SLOW_TICK_RATE; + + usec += sec_rem * (1000000 / HIGHRES_TIMER_SLOW_TICK_RATE); + + tv->tv_sec = sec; + tv->tv_usec = usec; +} + +void highres_timer_read (struct timeval *tv) +{ + u32 fast_ticks, slow_ticks; + highres_timer_read_ticks (&slow_ticks, &fast_ticks); + highres_timer_ticks_to_timeval (slow_ticks, fast_ticks, tv); +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/kernel/init_task.c linux.2.5.40-ac2/arch/v850/kernel/init_task.c --- linux.2.5.40/arch/v850/kernel/init_task.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/kernel/init_task.c 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,42 @@ +/* + * arch/v850/kernel/init_task.c -- Initial task/thread structures + * + * Copyright (C) 2002 NEC Corporation + * Copyright (C) 2002 Miles Bader + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file COPYING in the main directory of this + * archive for more details. + */ + +#include +#include +#include +#include +#include + +#include +#include + +static struct fs_struct init_fs = INIT_FS; +static struct files_struct init_files = INIT_FILES; +static struct signal_struct init_signals = INIT_SIGNALS (init_signals); +struct mm_struct init_mm = INIT_MM (init_mm); + +/* + * Initial task structure. + * + * All other task structs will be allocated on slabs in fork.c + */ +struct task_struct init_task = INIT_TASK (init_task); + +/* + * Initial thread structure. + * + * We need to make sure that this is 8192-byte aligned due to the + * way process stacks are handled. This is done by having a special + * "init_task" linker map entry. + */ +union thread_union init_thread_union + __attribute__((__section__(".data.init_task"))) = + { INIT_THREAD_INFO(init_task) }; diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/kernel/intv.S linux.2.5.40-ac2/arch/v850/kernel/intv.S --- linux.2.5.40/arch/v850/kernel/intv.S 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/kernel/intv.S 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,90 @@ +/* + * arch/v850/kernel/intv.S -- Interrupt vectors + * + * Copyright (C) 2001,02 NEC Corporation + * Copyright (C) 2001,02 Miles Bader + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file COPYING in the main directory of this + * archive for more details. + * + * Written by Miles Bader + */ + +#include +#include +#include +#include + +#ifdef CONFIG_V850E_MA1_HIGHRES_TIMER +#include +#endif + +/* Jump to an interrupt/trap handler. These handlers (defined in entry.S) + expect the stack-pointer to be saved in ENTRY_SP, so we use sp to do an + indirect jump (which avoids problems when the handler is more than a signed + 22-bit offset away). */ +#define JUMP_TO_HANDLER(name, sp_save_loc) \ + st.w sp, sp_save_loc; \ + mov hilo(name), sp; \ + jmp [sp] + + + /* Reset vector. */ + .section .intv.reset, "ax" + .org 0x0 + mov hilo(C_SYMBOL_NAME(start)), r1; + jmp [r1] + + + /* Generic interrupt vectors. */ + .section .intv.common, "ax" + .balign 0x10 + JUMP_TO_HANDLER (nmi, NMI_ENTRY_SP) // NMI0 + .balign 0x10 + JUMP_TO_HANDLER (nmi, NMI_ENTRY_SP) // NMI1 + .balign 0x10 + JUMP_TO_HANDLER (nmi, NMI_ENTRY_SP) // NMI2 + + .balign 0x10 + JUMP_TO_HANDLER (trap, ENTRY_SP) // TRAP0n + .balign 0x10 + JUMP_TO_HANDLER (trap, ENTRY_SP) // TRAP1n + + .balign 0x10 + JUMP_TO_HANDLER (illegal_instruction, ENTRY_SP) // illegal insn trap + + .balign 0x10 + JUMP_TO_HANDLER (dbtrap, ENTRY_SP) // DBTRAP insn + + + /* Hardware interrupt vectors. */ + .section .intv.mach, "ax" + .org 0x0 + +#if defined (CONFIG_V850E_MA1_HIGHRES_TIMER) && defined (IRQ_INTCMD) + + /* Interrupts before the highres timer interrupt. */ + .rept IRQ_INTCMD (HIGHRES_TIMER_TIMER_D_UNIT) + .balign 0x10 + JUMP_TO_HANDLER (irq, ENTRY_SP) + .endr + + /* The highres timer interrupt. */ + .balign 0x10 + JUMP_TO_HANDLER (C_SYMBOL_NAME (highres_timer_slow_tick_irq), ENTRY_SP) + + /* Interrupts after the highres timer interrupt. */ + .rept NUM_CPU_IRQS - IRQ_INTCMD (HIGHRES_TIMER_TIMER_D_UNIT) - 1 + .balign 0x10 + JUMP_TO_HANDLER (irq, ENTRY_SP) + .endr + +#else /* No highres timer */ + + .rept NUM_CPU_IRQS + .balign 0x10 + JUMP_TO_HANDLER (irq, ENTRY_SP) + .endr + +#endif /* Highres timer */ diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/kernel/irq.c linux.2.5.40-ac2/arch/v850/kernel/irq.c --- linux.2.5.40/arch/v850/kernel/irq.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/kernel/irq.c 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,696 @@ +/* + * arch/v850/kernel/irq.c -- High-level interrupt handling + * + * Copyright (C) 2001,02 NEC Corporation + * Copyright (C) 2001,02 Miles Bader + * Copyright (C) 1994-2000 Ralf Baechle + * Copyright (C) 1992 Linus Torvalds + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file COPYING in the main directory of this + * archive for more details. + * + * This file was was derived from the mips version, arch/mips/kernel/irq.c + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +/* + * Controller mappings for all interrupt sources: + */ +irq_desc_t irq_desc[NR_IRQS] __cacheline_aligned = + { [0 ... NR_IRQS-1] = { 0, &no_irq_type, NULL, 0, SPIN_LOCK_UNLOCKED}}; + +/* + * Special irq handlers. + */ + +void no_action(int cpl, void *dev_id, struct pt_regs *regs) { } + +/* + * Generic no controller code + */ + +static void enable_none(unsigned int irq) { } +static unsigned int startup_none(unsigned int irq) { return 0; } +static void disable_none(unsigned int irq) { } +static void ack_none(unsigned int irq) +{ + /* + * 'what should we do if we get a hw irq event on an illegal vector'. + * each architecture has to answer this themselves, it doesnt deserve + * a generic callback i think. + */ + printk("received IRQ %d with unknown interrupt type\n", irq); +} + +/* startup is the same as "enable", shutdown is same as "disable" */ +#define shutdown_none disable_none +#define end_none enable_none + +struct hw_interrupt_type no_irq_type = { + "none", + startup_none, + shutdown_none, + enable_none, + disable_none, + ack_none, + end_none +}; + +volatile unsigned long irq_err_count, spurious_count; + +/* + * Generic, controller-independent functions: + */ + +int show_interrupts(struct seq_file *p, void *v) +{ + int i; + struct irqaction * action; + + seq_puts(p, " "); + for (i=0; i < 1 /*smp_num_cpus*/; i++) + seq_printf(p, "CPU%d ", i); + seq_putc(p, '\n'); + + for (i = 0 ; i < NR_IRQS ; i++) { + action = irq_desc[i].action; + if (!action) + continue; + seq_printf(p, "%3d: ",i); + seq_printf(p, "%10u ", kstat_irqs(i)); + seq_printf(p, " %14s", irq_desc[i].handler->typename); + seq_printf(p, " %s", action->name); + + for (action=action->next; action; action = action->next) + seq_printf(p, ", %s", action->name); + seq_putc(p, '\n'); + } + seq_printf(p, "ERR: %10lu\n", irq_err_count); + return 0; +} + +/* + * This should really return information about whether + * we should do bottom half handling etc. Right now we + * end up _always_ checking the bottom half, which is a + * waste of time and is not what some drivers would + * prefer. + */ +int handle_IRQ_event(unsigned int irq, struct pt_regs * regs, struct irqaction * action) +{ + int status = 1; /* Force the "do bottom halves" bit */ + + if (!(action->flags & SA_INTERRUPT)) + local_irq_enable(); + + do { + status |= action->flags; + action->handler(irq, action->dev_id, regs); + action = action->next; + } while (action); + if (status & SA_SAMPLE_RANDOM) + add_interrupt_randomness(irq); + local_irq_disable(); + + return status; +} + +/* + * Generic enable/disable code: this just calls + * down into the PIC-specific version for the actual + * hardware disable after having gotten the irq + * controller lock. + */ + +/** + * disable_irq_nosync - disable an irq without waiting + * @irq: Interrupt to disable + * + * Disable the selected interrupt line. Disables of an interrupt + * stack. Unlike disable_irq(), this function does not ensure existing + * instances of the IRQ handler have completed before returning. + * + * This function may be called from IRQ context. + */ + +void inline disable_irq_nosync(unsigned int irq) +{ + irq_desc_t *desc = irq_desc + irq; + unsigned long flags; + + spin_lock_irqsave(&desc->lock, flags); + if (!desc->depth++) { + desc->status |= IRQ_DISABLED; + desc->handler->disable(irq); + } + spin_unlock_irqrestore(&desc->lock, flags); +} + +/** + * disable_irq - disable an irq and wait for completion + * @irq: Interrupt to disable + * + * Disable the selected interrupt line. Disables of an interrupt + * stack. That is for two disables you need two enables. This + * function waits for any pending IRQ handlers for this interrupt + * to complete before returning. If you use this function while + * holding a resource the IRQ handler may need you will deadlock. + * + * This function may be called - with care - from IRQ context. + */ + +void disable_irq(unsigned int irq) +{ + disable_irq_nosync(irq); + synchronize_irq(irq); +} + +/** + * enable_irq - enable interrupt handling on an irq + * @irq: Interrupt to enable + * + * Re-enables the processing of interrupts on this IRQ line + * providing no disable_irq calls are now in effect. + * + * This function may be called from IRQ context. + */ + +void enable_irq(unsigned int irq) +{ + irq_desc_t *desc = irq_desc + irq; + unsigned long flags; + + spin_lock_irqsave(&desc->lock, flags); + switch (desc->depth) { + case 1: { + unsigned int status = desc->status & ~IRQ_DISABLED; + desc->status = status; + if ((status & (IRQ_PENDING | IRQ_REPLAY)) == IRQ_PENDING) { + desc->status = status | IRQ_REPLAY; + hw_resend_irq(desc->handler,irq); + } + desc->handler->enable(irq); + /* fall-through */ + } + default: + desc->depth--; + break; + case 0: + printk("enable_irq(%u) unbalanced from %p\n", irq, + __builtin_return_address(0)); + } + spin_unlock_irqrestore(&desc->lock, flags); +} + +/* Handle interrupt IRQ. REGS are the registers at the time of ther + interrupt. */ +unsigned int handle_irq (int irq, struct pt_regs *regs) +{ + /* + * We ack quickly, we don't want the irq controller + * thinking we're snobs just because some other CPU has + * disabled global interrupts (we have already done the + * INT_ACK cycles, it's too late to try to pretend to the + * controller that we aren't taking the interrupt). + * + * 0 return value means that this irq is already being + * handled by some other CPU. (or is disabled) + */ + int cpu = smp_processor_id(); + irq_desc_t *desc = irq_desc + irq; + struct irqaction * action; + unsigned int status; + + irq_enter(); + kstat.irqs[cpu][irq]++; + spin_lock(&desc->lock); + desc->handler->ack(irq); + /* + REPLAY is when Linux resends an IRQ that was dropped earlier + WAITING is used by probe to mark irqs that are being tested + */ + status = desc->status & ~(IRQ_REPLAY | IRQ_WAITING); + status |= IRQ_PENDING; /* we _want_ to handle it */ + + /* + * If the IRQ is disabled for whatever reason, we cannot + * use the action we have. + */ + action = NULL; + if (likely(!(status & (IRQ_DISABLED | IRQ_INPROGRESS)))) { + action = desc->action; + status &= ~IRQ_PENDING; /* we commit to handling */ + status |= IRQ_INPROGRESS; /* we are handling it */ + } + desc->status = status; + + /* + * If there is no IRQ handler or it was disabled, exit early. + Since we set PENDING, if another processor is handling + a different instance of this same irq, the other processor + will take care of it. + */ + if (unlikely(!action)) + goto out; + + /* + * Edge triggered interrupts need to remember + * pending events. + * This applies to any hw interrupts that allow a second + * instance of the same irq to arrive while we are in handle_irq + * or in the handler. But the code here only handles the _second_ + * instance of the irq, not the third or fourth. So it is mostly + * useful for irq hardware that does not mask cleanly in an + * SMP environment. + */ + for (;;) { + spin_unlock(&desc->lock); + handle_IRQ_event(irq, regs, action); + spin_lock(&desc->lock); + + if (likely(!(desc->status & IRQ_PENDING))) + break; + desc->status &= ~IRQ_PENDING; + } + desc->status &= ~IRQ_INPROGRESS; + +out: + /* + * The ->end() handler has to deal with interrupts which got + * disabled while the handler was running. + */ + desc->handler->end(irq); + spin_unlock(&desc->lock); + + irq_exit(); + + return 1; +} + +/** + * request_irq - allocate an interrupt line + * @irq: Interrupt line to allocate + * @handler: Function to be called when the IRQ occurs + * @irqflags: Interrupt type flags + * @devname: An ascii name for the claiming device + * @dev_id: A cookie passed back to the handler function + * + * This call allocates interrupt resources and enables the + * interrupt line and IRQ handling. From the point this + * call is made your handler function may be invoked. Since + * your handler function must clear any interrupt the board + * raises, you must take care both to initialise your hardware + * and to set up the interrupt handler in the right order. + * + * Dev_id must be globally unique. Normally the address of the + * device data structure is used as the cookie. Since the handler + * receives this value it makes sense to use it. + * + * If your interrupt is shared you must pass a non NULL dev_id + * as this is required when freeing the interrupt. + * + * Flags: + * + * SA_SHIRQ Interrupt is shared + * + * SA_INTERRUPT Disable local interrupts while processing + * + * SA_SAMPLE_RANDOM The interrupt can be used for entropy + * + */ + +int request_irq(unsigned int irq, + void (*handler)(int, void *, struct pt_regs *), + unsigned long irqflags, + const char * devname, + void *dev_id) +{ + int retval; + struct irqaction * action; + +#if 1 + /* + * Sanity-check: shared interrupts should REALLY pass in + * a real dev-ID, otherwise we'll have trouble later trying + * to figure out which interrupt is which (messes up the + * interrupt freeing logic etc). + */ + if (irqflags & SA_SHIRQ) { + if (!dev_id) + printk("Bad boy: %s (at 0x%x) called us without a dev_id!\n", devname, (&irq)[-1]); + } +#endif + + if (irq >= NR_IRQS) + return -EINVAL; + if (!handler) + return -EINVAL; + + action = (struct irqaction *) + kmalloc(sizeof(struct irqaction), GFP_KERNEL); + if (!action) + return -ENOMEM; + + action->handler = handler; + action->flags = irqflags; + action->mask = 0; + action->name = devname; + action->next = NULL; + action->dev_id = dev_id; + + retval = setup_irq(irq, action); + if (retval) + kfree(action); + return retval; +} + +/** + * free_irq - free an interrupt + * @irq: Interrupt line to free + * @dev_id: Device identity to free + * + * Remove an interrupt handler. The handler is removed and if the + * interrupt line is no longer in use by any driver it is disabled. + * On a shared IRQ the caller must ensure the interrupt is disabled + * on the card it drives before calling this function. The function + * does not return until any executing interrupts for this IRQ + * have completed. + * + * This function may be called from interrupt context. + * + * Bugs: Attempting to free an irq in a handler for the same irq hangs + * the machine. + */ + +void free_irq(unsigned int irq, void *dev_id) +{ + irq_desc_t *desc; + struct irqaction **p; + unsigned long flags; + + if (irq >= NR_IRQS) + return; + + desc = irq_desc + irq; + spin_lock_irqsave(&desc->lock,flags); + p = &desc->action; + for (;;) { + struct irqaction * action = *p; + if (action) { + struct irqaction **pp = p; + p = &action->next; + if (action->dev_id != dev_id) + continue; + + /* Found it - now remove it from the list of entries */ + *pp = action->next; + if (!desc->action) { + desc->status |= IRQ_DISABLED; + desc->handler->shutdown(irq); + } + spin_unlock_irqrestore(&desc->lock,flags); + + synchronize_irq(irq); + kfree(action); + return; + } + printk("Trying to free free IRQ%d\n",irq); + spin_unlock_irqrestore(&desc->lock,flags); + return; + } +} + +/* + * IRQ autodetection code.. + * + * This depends on the fact that any interrupt that + * comes in on to an unassigned handler will get stuck + * with "IRQ_WAITING" cleared and the interrupt + * disabled. + */ + +static DECLARE_MUTEX(probe_sem); + +/** + * probe_irq_on - begin an interrupt autodetect + * + * Commence probing for an interrupt. The interrupts are scanned + * and a mask of potential interrupt lines is returned. + * + */ + +unsigned long probe_irq_on(void) +{ + unsigned int i; + irq_desc_t *desc; + unsigned long val; + unsigned long delay; + + down(&probe_sem); + /* + * something may have generated an irq long ago and we want to + * flush such a longstanding irq before considering it as spurious. + */ + for (i = NR_IRQS-1; i > 0; i--) { + desc = irq_desc + i; + + spin_lock_irq(&desc->lock); + if (!irq_desc[i].action) + irq_desc[i].handler->startup(i); + spin_unlock_irq(&desc->lock); + } + + /* Wait for longstanding interrupts to trigger. */ + for (delay = jiffies + HZ/50; time_after(delay, jiffies); ) + /* about 20ms delay */ barrier(); + + /* + * enable any unassigned irqs + * (we must startup again here because if a longstanding irq + * happened in the previous stage, it may have masked itself) + */ + for (i = NR_IRQS-1; i > 0; i--) { + desc = irq_desc + i; + + spin_lock_irq(&desc->lock); + if (!desc->action) { + desc->status |= IRQ_AUTODETECT | IRQ_WAITING; + if (desc->handler->startup(i)) + desc->status |= IRQ_PENDING; + } + spin_unlock_irq(&desc->lock); + } + + /* + * Wait for spurious interrupts to trigger + */ + for (delay = jiffies + HZ/10; time_after(delay, jiffies); ) + /* about 100ms delay */ barrier(); + + /* + * Now filter out any obviously spurious interrupts + */ + val = 0; + for (i = 0; i < NR_IRQS; i++) { + irq_desc_t *desc = irq_desc + i; + unsigned int status; + + spin_lock_irq(&desc->lock); + status = desc->status; + + if (status & IRQ_AUTODETECT) { + /* It triggered already - consider it spurious. */ + if (!(status & IRQ_WAITING)) { + desc->status = status & ~IRQ_AUTODETECT; + desc->handler->shutdown(i); + } else + if (i < 32) + val |= 1 << i; + } + spin_unlock_irq(&desc->lock); + } + + return val; +} + +/* + * Return a mask of triggered interrupts (this + * can handle only legacy ISA interrupts). + */ + +/** + * probe_irq_mask - scan a bitmap of interrupt lines + * @val: mask of interrupts to consider + * + * Scan the ISA bus interrupt lines and return a bitmap of + * active interrupts. The interrupt probe logic state is then + * returned to its previous value. + * + * Note: we need to scan all the irq's even though we will + * only return ISA irq numbers - just so that we reset them + * all to a known state. + */ +unsigned int probe_irq_mask(unsigned long val) +{ + int i; + unsigned int mask; + + mask = 0; + for (i = 0; i < NR_IRQS; i++) { + irq_desc_t *desc = irq_desc + i; + unsigned int status; + + spin_lock_irq(&desc->lock); + status = desc->status; + + if (status & IRQ_AUTODETECT) { + if (i < 16 && !(status & IRQ_WAITING)) + mask |= 1 << i; + + desc->status = status & ~IRQ_AUTODETECT; + desc->handler->shutdown(i); + } + spin_unlock_irq(&desc->lock); + } + up(&probe_sem); + + return mask & val; +} + +/* + * Return the one interrupt that triggered (this can + * handle any interrupt source). + */ + +/** + * probe_irq_off - end an interrupt autodetect + * @val: mask of potential interrupts (unused) + * + * Scans the unused interrupt lines and returns the line which + * appears to have triggered the interrupt. If no interrupt was + * found then zero is returned. If more than one interrupt is + * found then minus the first candidate is returned to indicate + * their is doubt. + * + * The interrupt probe logic state is returned to its previous + * value. + * + * BUGS: When used in a module (which arguably shouldnt happen) + * nothing prevents two IRQ probe callers from overlapping. The + * results of this are non-optimal. + */ + +int probe_irq_off(unsigned long val) +{ + int i, irq_found, nr_irqs; + + nr_irqs = 0; + irq_found = 0; + for (i = 0; i < NR_IRQS; i++) { + irq_desc_t *desc = irq_desc + i; + unsigned int status; + + spin_lock_irq(&desc->lock); + status = desc->status; + + if (status & IRQ_AUTODETECT) { + if (!(status & IRQ_WAITING)) { + if (!nr_irqs) + irq_found = i; + nr_irqs++; + } + desc->status = status & ~IRQ_AUTODETECT; + desc->handler->shutdown(i); + } + spin_unlock_irq(&desc->lock); + } + up(&probe_sem); + + if (nr_irqs > 1) + irq_found = -irq_found; + return irq_found; +} + +/* this was setup_x86_irq but it seems pretty generic */ +int setup_irq(unsigned int irq, struct irqaction * new) +{ + int shared = 0; + unsigned long flags; + struct irqaction *old, **p; + irq_desc_t *desc = irq_desc + irq; + + /* + * Some drivers like serial.c use request_irq() heavily, + * so we have to be careful not to interfere with a + * running system. + */ + if (new->flags & SA_SAMPLE_RANDOM) { + /* + * This function might sleep, we want to call it first, + * outside of the atomic block. + * Yes, this might clear the entropy pool if the wrong + * driver is attempted to be loaded, without actually + * installing a new handler, but is this really a problem, + * only the sysadmin is able to do this. + */ + rand_initialize_irq(irq); + } + + /* + * The following block of code has to be executed atomically + */ + spin_lock_irqsave(&desc->lock,flags); + p = &desc->action; + if ((old = *p) != NULL) { + /* Can't share interrupts unless both agree to */ + if (!(old->flags & new->flags & SA_SHIRQ)) { + spin_unlock_irqrestore(&desc->lock,flags); + return -EBUSY; + } + + /* add new interrupt at end of irq queue */ + do { + p = &old->next; + old = *p; + } while (old); + shared = 1; + } + + *p = new; + + if (!shared) { + desc->depth = 0; + desc->status &= ~(IRQ_DISABLED | IRQ_AUTODETECT | IRQ_WAITING | IRQ_INPROGRESS); + desc->handler->startup(irq); + } + spin_unlock_irqrestore(&desc->lock,flags); + + /* register_irq_proc(irq); */ + return 0; +} + +/* Initialize irq handling for IRQs BASE to BASE+NUM-1. */ +void __init +init_irq_handlers (int base_irq, int num, struct hw_interrupt_type *irq_type) +{ + while (num-- > 0) { + irq_desc[base_irq].status = IRQ_DISABLED; + irq_desc[base_irq].action = NULL; + irq_desc[base_irq].depth = 1; + irq_desc[base_irq].handler = irq_type; + base_irq++; + } +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/kernel/ma.c linux.2.5.40-ac2/arch/v850/kernel/ma.c --- linux.2.5.40/arch/v850/kernel/ma.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/kernel/ma.c 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,70 @@ +/* + * arch/v850/kernel/ma.c -- V850E/MA series of cpu chips + * + * Copyright (C) 2001 NEC Corporation + * Copyright (C) 2001 Miles Bader + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file COPYING in the main directory of this + * archive for more details. + * + * Written by Miles Bader + */ + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "mach.h" + +void __init mach_sched_init (struct irqaction *timer_action) +{ + /* Start hardware timer. */ + nb85e_timer_d_configure (0, HZ); + /* Install timer interrupt handler. */ + setup_irq (IRQ_INTCMD(0), timer_action); +} + +struct nb85e_intc_irq_init irq_inits[] = { + { "IRQ", 0, NUM_MACH_IRQS, 7 }, + { "CMD", IRQ_INTCMD(0), IRQ_INTCMD_NUM, 5 }, + { "DMA", IRQ_INTDMA(0), IRQ_INTDMA_NUM, 2 }, + { "CSI", IRQ_INTCSI(0), IRQ_INTCSI_NUM, 4 }, + { "SER", IRQ_INTSER(0), IRQ_INTSER_NUM, 3 }, + { "SR", IRQ_INTSR(0), IRQ_INTSR_NUM, 4 }, + { "ST", IRQ_INTST(0), IRQ_INTST_NUM, 5 }, + { 0 } +}; +#define NUM_IRQ_INITS ((sizeof irq_inits / sizeof irq_inits[0]) - 1) + +struct hw_interrupt_type hw_itypes[NUM_IRQ_INITS]; + +/* Initialize MA chip interrupts. */ +void __init ma_init_irqs (void) +{ + nb85e_intc_init_irq_types (irq_inits, hw_itypes); +} + +/* Called before configuring an on-chip UART. */ +void ma_uart_pre_configure (unsigned chan, unsigned cflags, unsigned baud) +{ + /* We only know about the first two UART channels (though + specific chips may have more). */ + if (chan < 2) { + unsigned bits = 0x3 << (chan * 3); + /* Specify that the relevent pins on the chip should do + serial I/O, not direct I/O. */ + MA_PORT4_PMC |= bits; + /* Specify that we're using the UART, not the CSI device. */ + MA_PORT4_PFC |= bits; + } +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/kernel/mach.c linux.2.5.40-ac2/arch/v850/kernel/mach.c --- linux.2.5.40/arch/v850/kernel/mach.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/kernel/mach.c 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,17 @@ +/* + * arch/v850/kernel/mach.c -- Defaults for some things defined by "mach.h" + * + * Copyright (C) 2001 NEC Corporation + * Copyright (C) 2001 Miles Bader + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file COPYING in the main directory of this + * archive for more details. + * + * Written by Miles Bader + */ + +#include "mach.h" + +/* Called with each timer tick, if non-zero. */ +void (*mach_tick)(void) = 0; diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/kernel/mach.h linux.2.5.40-ac2/arch/v850/kernel/mach.h --- linux.2.5.40/arch/v850/kernel/mach.h 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/kernel/mach.h 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,56 @@ +/* + * arch/v850/kernel/mach.h -- Machine-dependent functions used by v850 port + * + * Copyright (C) 2001,02 NEC Corporation + * Copyright (C) 2001,02 Miles Bader + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file COPYING in the main directory of this + * archive for more details. + * + * Written by Miles Bader + */ + +#ifndef __V850_MACH_H__ +#define __V850_MACH_H__ + +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +void mach_setup (char **cmdline); +void mach_gettimeofday (struct timeval *tv); +void mach_sched_init (struct irqaction *timer_action); +void mach_get_physical_ram (unsigned long *ram_start, unsigned long *ram_len); +void mach_init_irqs (void); + +/* If defined, is called very early in the kernel initialization. The + stack pointer is valid, but very little has been initialized (e.g., + bss is not zeroed yet) when this is called, so care must taken. */ +void mach_early_init (void); + +/* If defined, called after the bootmem allocator has been initialized, + to allow the platform-dependent code to reserve any areas of RAM that + the kernel shouldn't touch. */ +void mach_reserve_bootmem (void) __attribute__ ((__weak__)); + +/* Called with each timer tick, if non-zero. */ +extern void (*mach_tick) (void); + +/* The following establishes aliases for various mach_ functions to the + name by which the rest of the kernal calls them. These statements + should only have an effect in the file that defines the actual functions. */ +#define MACH_ALIAS(to, from) \ + asm (".global " macrology_stringify (C_SYMBOL_NAME (to)) ";" \ + macrology_stringify (C_SYMBOL_NAME (to)) \ + " = " macrology_stringify (C_SYMBOL_NAME (from))) +/* e.g.: MACH_ALIAS (kernel_name, arch_spec_name); */ + +#endif /* __V850_MACH_H__ */ diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/kernel/Makefile linux.2.5.40-ac2/arch/v850/kernel/Makefile --- linux.2.5.40/arch/v850/kernel/Makefile 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/kernel/Makefile 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,77 @@ +# +# arch/v850/kernel/Makefile +# +# Copyright (C) 2001,02 NEC Corporation +# Copyright (C) 2001,02 Miles Bader +# +# Note! Dependencies are done automagically by 'make dep', which also +# removes any old dependencies. DON'T put your own dependencies here +# unless it's something special (ie not a .c file). +# + +O_TARGET := kernel.o +EXTRA_TARGETS := head.o init_task.o + + +ifdef ROOT_IMAGE +# Deal with the initial contents of the root device +# (this really should be in the top-level arch/v850 Makefile, but the kernel +# build system can't cope with that) +ROOT_IMAGE_OBJ = $(TOPDIR)/root_fs_image.o +EXTRA_TARGETS += $(ROOT_IMAGE_OBJ) +endif # ROOT_IMAGE_OBJ + + +all: $(O_TARGET) $(EXTRA_TARGETS) + +obj-y := intv.o entry.o process.o syscalls.o time.o semaphore.o setup.o \ + signal.o irq.o mach.o ptrace.o bug.o +export-objs := v850_ksyms.o rte_mb_a_pci.o + +obj-$(CONFIG_MODULES) += v850_ksyms.o +# chip-specific code +obj-$(CONFIG_V850E_MA1) += ma.o nb85e_utils.o nb85e_timer_d.o +obj-$(CONFIG_V850E_NB85E) += nb85e.o nb85e_intc.o +# platform-specific code +obj-$(CONFIG_V850E_SIM) += sim.o simcons.o +obj-$(CONFIG_V850E2_SIM85E2C) += sim85e2c.o nb85e_intc.o memcons.o +obj-$(CONFIG_V850E2_FPGA85E2C) += fpga85e2c.o nb85e_intc.o memcons.o +obj-$(CONFIG_RTE_CB) += rte_cb.o rte_cb_leds.o +obj-$(CONFIG_RTE_CB_MA1) += rte_ma1_cb.o +obj-$(CONFIG_RTE_CB_NB85E) += rte_nb85e_cb.o +obj-$(CONFIG_RTE_CB_MULTI) += rte_cb_multi.o +obj-$(CONFIG_RTE_MB_A_PCI) += rte_mb_a_pci.o +obj-$(CONFIG_RTE_GBUS_INT) += gbus_int.o +# feature-specific code +obj-$(CONFIG_V850E_MA1_HIGHRES_TIMER) += highres_timer.o +obj-$(CONFIG_PROC_FS) += procfs.o + +head.o: head.S v850_defs.h +entry.o: entry.S v850_defs.h + +v850_defs.h: v850_defs.c v850_defs.head + rm -f v850_defs.d + SUNPRO_DEPENDENCIES="v850_defs.d v850_defs.h" \ + $(CC) $(filter-out -MD,$(CFLAGS)) -S v850_defs.c + cp v850_defs.head v850_defs.h + grep '^#define' v850_defs.s >> v850_defs.h + rm v850_defs.s +-include v850_defs.d + + +ifdef ROOT_IMAGE_OBJ +# The filename `ROOT_IMAGE' is relative to $(TOPDIR), but we're currently +# in arch/v850/kernel, so we have to use an absolute filename for it +ifeq ($(notdir $(ROOT_IMAGE)),$(ROOT_IMAGE)) +ABS_ROOT_IMAGE := $(TOPDIR)/$(ROOT_IMAGE) +else +ABS_ROOT_IMAGE := $(ROOT_IMAGE) +endif +# Note that we use the build-system's objcopy, as the v850 tools are fairly +# old, and don't have the --rename-section option. +$(ROOT_IMAGE_OBJ): $(ABS_ROOT_IMAGE) + objcopy -I binary -O elf32-little -B i386 --rename-section .data=.root,alloc,load,readonly,data,contents $< $@ +endif + + +include $(TOPDIR)/Rules.make diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/kernel/memcons.c linux.2.5.40-ac2/arch/v850/kernel/memcons.c --- linux.2.5.40/arch/v850/kernel/memcons.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/kernel/memcons.c 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,134 @@ +/* + * arch/v850/kernel/memcons.c -- Console I/O to a memory buffer + * + * Copyright (C) 2001,02 NEC Corporation + * Copyright (C) 2001,02 Miles Bader + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file COPYING in the main directory of this + * archive for more details. + * + * Written by Miles Bader + */ + +#include +#include +#include +#include +#include + +/* If this device is enabled, the linker map should define start and + end points for its buffer. */ +extern char memcons_output[], memcons_output_end; + +/* Current offset into the buffer. */ +static unsigned long memcons_offs = 0; + +/* Spinlock protecting memcons_offs. */ +static spinlock_t memcons_lock = SPIN_LOCK_UNLOCKED; + + +static size_t write (const char *buf, size_t len) +{ + int flags; + char *point; + + spin_lock_irqsave (memcons_lock, flags); + + point = memcons_output + memcons_offs; + if (point + len >= &memcons_output_end) { + len = &memcons_output_end - point; + memcons_offs = 0; + } else + memcons_offs += len; + + spin_unlock_irqrestore (memcons_lock, flags); + + memcpy (point, buf, len); + + return len; +} + + +/* Low-level console. */ + +static void memcons_write (struct console *co, const char *buf, unsigned len) +{ + while (len > 0) + len -= write (buf, len); +} + +static kdev_t memcons_device (struct console *co) +{ + return MKDEV (TTY_MAJOR, 64 + co->index); +} + +static struct console memcons = +{ + name: "memcons", + write: memcons_write, + device: memcons_device, + flags: CON_PRINTBUFFER, + index: -1, +}; + +void memcons_setup (void) +{ + register_console (&memcons); + printk (KERN_INFO "Console: static memory buffer (memcons)\n"); +} + +/* Higher level TTY interface. */ + +static struct tty_struct *tty_table[1] = { 0 }; +static struct termios *tty_termios[1] = { 0 }; +static struct termios *tty_termios_locked[1] = { 0 }; +static struct tty_driver tty_driver = { 0 }; +static int tty_ref_count = 0; + +int memcons_tty_open (struct tty_struct *tty, struct file *filp) +{ + return 0; +} + +int memcons_tty_write (struct tty_struct *tty, int from_user, + const unsigned char *buf, int len) +{ + return write (buf, len); +} + +int memcons_tty_write_room (struct tty_struct *tty) +{ + return &memcons_output_end - (memcons_output + memcons_offs); +} + +int memcons_tty_chars_in_buffer (struct tty_struct *tty) +{ + /* We have no buffer. */ + return 0; +} + +int __init memcons_tty_init (void) +{ + tty_driver.name = "memcons"; + tty_driver.major = TTY_MAJOR; + tty_driver.minor_start = 64; + tty_driver.num = 1; + tty_driver.type = TTY_DRIVER_TYPE_SYSCONS; + + tty_driver.refcount = &tty_ref_count; + + tty_driver.table = tty_table; + tty_driver.termios = tty_termios; + tty_driver.termios_locked = tty_termios_locked; + + tty_driver.init_termios = tty_std_termios; + + tty_driver.open = memcons_tty_open; + tty_driver.write = memcons_tty_write; + tty_driver.write_room = memcons_tty_write_room; + tty_driver.chars_in_buffer = memcons_tty_chars_in_buffer; + + tty_register_driver (&tty_driver); +} +__initcall (memcons_tty_init); diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/kernel/nb85e.c linux.2.5.40-ac2/arch/v850/kernel/nb85e.c --- linux.2.5.40/arch/v850/kernel/nb85e.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/kernel/nb85e.c 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,28 @@ +/* + * arch/v850/kernel/nb85e.c -- Machine-specific code for NB85E cpu core + * + * Copyright (C) 2001,02 NEC Corporation + * Copyright (C) 2001,02 Miles Bader + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file COPYING in the main directory of this + * archive for more details. + * + * Written by Miles Bader + */ + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "mach.h" + +unsigned long cpu_clock_freq = CPU_CLOCK_FREQ; diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/kernel/nb85e_intc.c linux.2.5.40-ac2/arch/v850/kernel/nb85e_intc.c --- linux.2.5.40/arch/v850/kernel/nb85e_intc.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/kernel/nb85e_intc.c 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,68 @@ +/* + * arch/v850/kernel/nb85e_intc.c -- NB85E cpu core interrupt controller (INTC) + * + * Copyright (C) 2001,02 NEC Corporation + * Copyright (C) 2001,02 Miles Bader + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file COPYING in the main directory of this + * archive for more details. + * + * Written by Miles Bader + */ + +#include +#include +#include + +#include + +static void irq_nop (unsigned irq) { } + +static unsigned nb85e_intc_irq_startup (unsigned irq) +{ + nb85e_intc_clear_pending_irq (irq); + nb85e_intc_enable_irq (irq); + return 0; +} + +/* Initialize HW_IRQ_TYPES for INTC-controlled irqs described in array + INITS (which is terminated by an entry with the name field == 0). */ +void __init nb85e_intc_init_irq_types (struct nb85e_intc_irq_init *inits, + struct hw_interrupt_type *hw_irq_types) +{ + struct nb85e_intc_irq_init *init; + for (init = inits; init->name; init++) { + int i; + struct hw_interrupt_type *hwit = hw_irq_types++; + + hwit->typename = init->name; + + hwit->startup = nb85e_intc_irq_startup; + hwit->shutdown = nb85e_intc_disable_irq; + hwit->enable = nb85e_intc_enable_irq; + hwit->disable = nb85e_intc_disable_irq; + hwit->ack = irq_nop; + hwit->end = irq_nop; + + /* Initialize kernel IRQ infrastructure for this interrupt. */ + init_irq_handlers (init->base, init->num, hwit); + + /* Set the interrupt priorities. */ + for (i = 0; i < init->num; i++) { + unsigned irq = init->base + i; + + /* If the interrupt is currently enabled (all + interrupts are initially disabled), then + assume whoever enabled it has set things up + properly, and avoid messing with it. */ + if (! nb85e_intc_irq_enabled (irq)) + /* This write also (1) disables the + interrupt, and (2) clears any pending + interrupts. */ + NB85E_INTC_IC (irq) + = (NB85E_INTC_IC_PR (init->priority) + | NB85E_INTC_IC_MK); + } + } +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/kernel/nb85e_timer_d.c linux.2.5.40-ac2/arch/v850/kernel/nb85e_timer_d.c --- linux.2.5.40/arch/v850/kernel/nb85e_timer_d.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/kernel/nb85e_timer_d.c 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,53 @@ +/* + * include/asm-v850/nb85e_timer_d.c -- `Timer D' component often used + * with the NB85E cpu core + * + * Copyright (C) 2001,02 NEC Corporation + * Copyright (C) 2001,02 Miles Bader + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file COPYING in the main directory of this + * archive for more details. + * + * Written by Miles Bader + */ + +#include + +#include +#include + +/* Start interval timer TIMER (0-3). The timer will issue the + corresponding INTCMD interrupt RATE times per second. + This function does not enable the interrupt. */ +void nb85e_timer_d_configure (unsigned timer, unsigned rate) +{ + unsigned divlog2, count; + + /* Calculate params for timer. */ + if (! calc_counter_params ( + cpu_clock_freq, rate, + NB85E_TIMER_D_TMCD_CS_MIN, NB85E_TIMER_D_TMCD_CS_MAX, 16, + &divlog2, &count)) + printk (KERN_WARNING + "Cannot find interval timer %d setting suitable" + " for rate of %dHz.\n" + "Using rate of %ldHz instead.\n", + timer, rate, (cpu_clock_freq >> divlog2) >> 16); + + /* Do the actual hardware timer initialization: */ + + /* Enable timer. */ + NB85E_TIMER_D_TMCD(timer) = NB85E_TIMER_D_TMCD_CAE; + /* Set clock divider. */ + NB85E_TIMER_D_TMCD(timer) + = NB85E_TIMER_D_TMCD_CAE + | NB85E_TIMER_D_TMCD_CS(divlog2); + /* Set timer compare register. */ + NB85E_TIMER_D_CMD(timer) = count; + /* Start counting. */ + NB85E_TIMER_D_TMCD(timer) + = NB85E_TIMER_D_TMCD_CAE + | NB85E_TIMER_D_TMCD_CS(divlog2) + | NB85E_TIMER_D_TMCD_CE; +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/kernel/nb85e_utils.c linux.2.5.40-ac2/arch/v850/kernel/nb85e_utils.c --- linux.2.5.40/arch/v850/kernel/nb85e_utils.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/kernel/nb85e_utils.c 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,65 @@ +/* + * include/asm-v850/nb85e_utils.h -- Utility functions associated with + * the NB85E cpu core + * + * Copyright (C) 2001 NEC Corporation + * Copyright (C) 2001 Miles Bader + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file COPYING in the main directory of this + * archive for more details. + * + * Written by Miles Bader + */ + +/* Note: these functions are often associated with the N85E cpu core, + but not always, which is why they're not in `nb85e.c'. */ + +#include + +/* Calculate counter clock-divider and count values to attain the + desired frequency RATE from the base frequency BASE_FREQ. The + counter is expected to have a clock-divider, which can divide the + system cpu clock by a power of two value from MIN_DIVLOG2 to + MAX_DIV_LOG2, and a word-size of COUNTER_SIZE bits (the counter + counts up and resets whenever it's equal to the compare register, + generating an interrupt or whatever when it does so). The returned + values are: *DIVLOG2 -- log2 of the desired clock divider and *COUNT + -- the counter compare value to use. Returns true if it was possible + to find a reasonable value, otherwise false (and the other return + values will be set to be as good as possible). */ +int calc_counter_params (unsigned long base_freq, + unsigned long rate, + unsigned min_divlog2, unsigned max_divlog2, + unsigned counter_size, + unsigned *divlog2, unsigned *count) +{ + unsigned _divlog2; + int ok = 0; + + /* Find the lowest clock divider setting that can represent RATE. */ + for (_divlog2 = min_divlog2; _divlog2 <= max_divlog2; _divlog2++) { + /* Minimum interrupt rate possible using this divider. */ + int min_int_rate + = (base_freq >> _divlog2) >> counter_size; + + if (min_int_rate <= rate) { + /* This setting is the highest resolution + setting that's slow enough enough to attain + RATE interrupts per second, so use it. */ + ok = 1; + break; + } + } + + if (_divlog2 > max_divlog2) + /* Can't find correct setting. */ + _divlog2 = max_divlog2; + + if (divlog2) + *divlog2 = _divlog2; + if (count) + *count = ((base_freq >> _divlog2) + rate/2) / rate; + + return ok; +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/kernel/process.c linux.2.5.40-ac2/arch/v850/kernel/process.c --- linux.2.5.40/arch/v850/kernel/process.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/kernel/process.c 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,282 @@ +/* + * arch/v850/kernel/process.c -- Arch-dependent process handling + * + * Copyright (C) 2001,02 NEC Corporation + * Copyright (C) 2001,02 Miles Bader + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file COPYING in the main directory of this + * archive for more details. + * + * Written by Miles Bader + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +extern void ret_from_fork (void); + + +/* The idle loop. */ +void default_idle (void) +{ + while (1) { + while (! need_resched ()) + asm ("halt; nop; nop; nop; nop; nop" ::: "cc"); + schedule (); + } +} + +void (*idle)(void) = default_idle; + +/* + * The idle thread. There's no useful work to be + * done, so just try to conserve power and have a + * low exit latency (ie sit in a loop waiting for + * somebody to say that they'd like to reschedule) + */ +void cpu_idle (void) +{ + /* endless idle loop with no priority at all */ + (*idle) (); +} + +struct spec_reg_name { + const char *name; + int gpr; +}; + +struct spec_reg_name spec_reg_names[] = { + { "sp", GPR_SP }, + { "gp", GPR_GP }, + { "tp", GPR_TP }, + { "ep", GPR_EP }, + { "lp", GPR_LP }, + { 0, 0 } +}; + +void show_regs (struct pt_regs *regs) +{ + int gpr_base, gpr_offs; + + printk (" pc 0x%08lx psw 0x%08lx kernel_mode %d\n", + regs->pc, regs->psw, regs->kernel_mode); + printk (" ctpc 0x%08lx ctpsw 0x%08lx ctbp 0x%08lx\n", + regs->ctpc, regs->ctpsw, regs->ctbp); + + for (gpr_base = 0; gpr_base < NUM_GPRS; gpr_base += 4) { + for (gpr_offs = 0; gpr_offs < 4; gpr_offs++) { + int gpr = gpr_base + gpr_offs; + long val = regs->gpr[gpr]; + struct spec_reg_name *srn; + + for (srn = spec_reg_names; srn->name; srn++) + if (srn->gpr == gpr) + break; + + if (srn->name) + printk ("%7s 0x%08lx", srn->name, val); + else + printk (" r%02d 0x%08lx", gpr, val); + } + + printk ("\n"); + } +} + +/* + * This is the mechanism for creating a new kernel thread. + * + * NOTE! Only a kernel-only process (ie the swapper or direct descendants who + * haven't done an "execve()") should use this: it will work within a system + * call from a "real" process, but the process memory space will not be free'd + * until both the parent and the child have exited. + */ +int kernel_thread (int (*fn)(void *), void *arg, unsigned long flags) +{ + register mm_segment_t fs = get_fs (); + register unsigned long syscall asm (SYSCALL_NUM); + register unsigned long arg0 asm (SYSCALL_ARG0); + register unsigned long ret asm (SYSCALL_RET); + + set_fs (KERNEL_DS); + + /* Clone this thread. */ + arg0 = flags | CLONE_VM; + syscall = __NR_clone; + asm volatile ("trap " SYSCALL_SHORT_TRAP + : "=r" (ret), "=r" (syscall) + : "1" (syscall), "r" (arg0) + : SYSCALL_SHORT_CLOBBERS); + + if (ret == 0) { + /* In child thread, call FN and exit. */ + arg0 = (*fn) (arg); + syscall = __NR_exit; + asm volatile ("trap " SYSCALL_SHORT_TRAP + : "=r" (ret), "=r" (syscall) + : "1" (syscall), "r" (arg0) + : SYSCALL_SHORT_CLOBBERS); + } + + /* In parent. */ + set_fs (fs); + + return ret; +} + +void flush_thread (void) +{ + set_fs (USER_DS); +} + +int copy_thread (int nr, unsigned long clone_flags, + unsigned long stack_start, unsigned long stack_size, + struct task_struct *p, struct pt_regs *regs) +{ + /* Start pushing stuff from the top of the child's kernel stack. */ + unsigned long ksp = (unsigned long)p->thread_info + THREAD_SIZE; + /* We push two `state save' stack fames (see entry.S) on the new + kernel stack: + 1) The innermost one is what switch_thread would have + pushed, and is used when we context switch to the child + thread for the first time. It's set up to return to + ret_from_fork in entry.S. + 2) The outermost one (nearest the top) is what a syscall + trap would have pushed, and is set up to return to the + same location as the parent thread, but with a return + value of 0. */ + struct pt_regs *child_switch_regs, *child_trap_regs; + + /* Trap frame. */ + ksp -= STATE_SAVE_SIZE; + child_trap_regs = (struct pt_regs *)(ksp + STATE_SAVE_PT_OFFSET); + /* Switch frame. */ + ksp -= STATE_SAVE_SIZE; + child_switch_regs = (struct pt_regs *)(ksp + STATE_SAVE_PT_OFFSET); + + /* First copy parent's register state to child. */ + *child_switch_regs = *regs; + *child_trap_regs = *regs; + + /* switch_thread returns to the restored value of the lp + register (r31), so we make that the place where we want to + jump when the child thread begins running. */ + child_switch_regs->gpr[GPR_LP] = (v850_reg_t)ret_from_fork; + + /* Thread state for the child (everything else is on the stack). */ + p->thread.ksp = ksp; + + return 0; +} + +/* + * fill in the user structure for a core dump.. + */ +void dump_thread (struct pt_regs *regs, struct user *dump) +{ +#if 0 /* Later. XXX */ + dump->magic = CMAGIC; + dump->start_code = 0; + dump->start_stack = regs->gpr[GPR_SP]; + dump->u_tsize = ((unsigned long) current->mm->end_code) >> PAGE_SHIFT; + dump->u_dsize = ((unsigned long) (current->mm->brk + + (PAGE_SIZE-1))) >> PAGE_SHIFT; + dump->u_dsize -= dump->u_tsize; + dump->u_ssize = 0; + + if (dump->start_stack < TASK_SIZE) + dump->u_ssize = ((unsigned long) (TASK_SIZE - dump->start_stack)) >> PAGE_SHIFT; + + dump->u_ar0 = (struct user_regs_struct *)((int)&dump->regs - (int)dump); + dump->regs = *regs; + dump->u_fpvalid = 0; +#endif +} + +/* + * sys_execve() executes a new program. + */ +int sys_execve (char *name, char **argv, char **envp, struct pt_regs *regs) +{ + char *filename = getname (name); + int error = PTR_ERR (filename); + + if (! IS_ERR (filename)) { + error = do_execve (filename, argv, envp, regs); + putname (filename); + } + + return error; +} + +/* This is the common part of the various fork-like system calls (which + are in entry.S). */ +int fork_common (int flags, unsigned long new_sp, struct pt_regs *regs) +{ + struct task_struct *p = do_fork (flags, new_sp, regs, 0, 0); + return IS_ERR (p) ? PTR_ERR (p) : p->pid; +} + + +/* + * These bracket the sleeping functions.. + */ +extern void scheduling_functions_start_here (void); +extern void scheduling_functions_end_here (void); +#define first_sched ((unsigned long) scheduling_functions_start_here) +#define last_sched ((unsigned long) scheduling_functions_end_here) + +unsigned long get_wchan (struct task_struct *p) +{ +#if 0 /* Barf. Figure out the stack-layout later. XXX */ + unsigned long fp, pc; + int count = 0; + + if (!p || p == current || p->state == TASK_RUNNING) + return 0; + + pc = thread_saved_pc (&p->thread); + + /* This quite disgusting function walks up the stack, following + saved return address, until it something that's out of bounds + (as defined by `first_sched' and `last_sched'). It then + returns the last PC that was in-bounds. */ + do { + if (fp < stack_page + sizeof (struct task_struct) || + fp >= 8184+stack_page) + return 0; + pc = ((unsigned long *)fp)[1]; + /* FIXME: This depends on the order of these functions. */ + if (pc < first_sched || pc >= last_sched) + return pc; + fp = *(unsigned long *) fp; + } while (count++ < 16); +#endif + + return 0; +} + +void show_trace_task (struct task_struct *t) +{ + /* blarg XXX */ + printk ("show_trace_task: KSP = 0x%lx, USP = 0x%lx, UPC = 0x%lx\n", + t->thread.ksp, KSTK_ESP (t), KSTK_EIP (t)); +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/kernel/procfs.c linux.2.5.40-ac2/arch/v850/kernel/procfs.c --- linux.2.5.40/arch/v850/kernel/procfs.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/kernel/procfs.c 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,50 @@ +/* + * arch/v850/kernel/procfs.c -- Introspection functions for /proc filesystem + * + * Copyright (C) 2001,02 NEC Corporation + * Copyright (C) 2001,02 Miles Bader + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file COPYING in the main directory of this + * archive for more details. + * + * Written by Miles Bader + */ + +#include "mach.h" + +static int cpuinfo_print (struct seq_file *m, void *v) +{ + extern unsigned long loops_per_jiffy; + return seq_printf (m, + "CPU-Family: v850\n" + "CPU-Arch: %s\n" + "CPU-Model: %s\n" + "BogoMips: %lu.%02lu\n", + CPU_ARCH, + CPU_MODEL, + loops_per_jiffy/(500000/HZ), + (loops_per_jiffy/(5000/HZ)) % 100); +} + +static void *cpuinfo_start (struct seq_file *m, loff_t *pos) +{ + return *pos < NR_CPUS ? ((void *) 0x12345678) : NULL; +} + +static void *cpuinfo_next (struct seq_file *m, void *v, loff_t *pos) +{ + ++*pos; + return cpuinfo_start (m, pos); +} + +static void cpuinfo_stop (struct seq_file *m, void *v) +{ +} + +struct seq_operations cpuinfo_op = { + start: cpuinfo_start, + next: cpuinfo_next, + stop: cpuinfo_stop, + show: cpuinfo_print +}; diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/kernel/ptrace.c linux.2.5.40-ac2/arch/v850/kernel/ptrace.c --- linux.2.5.40/arch/v850/kernel/ptrace.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/kernel/ptrace.c 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,202 @@ +/* + * arch/v850/kernel/ptrace.c -- `ptrace' system call + * + * Copyright (C) 2002 NEC Corporation + * Copyright (C) 2002 Miles Bader + * + * Derived from arch/mips/kernel/ptrace.c: + * + * Copyright (C) 1992 Ross Biro + * Copyright (C) Linus Torvalds + * Copyright (C) 1994, 95, 96, 97, 98, 2000 Ralf Baechle + * Copyright (C) 1996 David S. Miller + * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com + * Copyright (C) 1999 MIPS Technologies, Inc. + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file COPYING in the main directory of this + * archive for more details. + */ + +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +int sys_ptrace(long request, long pid, long addr, long data) +{ + struct task_struct *child; + int rval; + + lock_kernel(); + +#if 0 + printk("ptrace(r=%d,pid=%d,addr=%08lx,data=%08lx)\n", + (int) request, (int) pid, (unsigned long) addr, + (unsigned long) data); +#endif + + if (request == PTRACE_TRACEME) { + /* are we already being traced? */ + if (current->ptrace & PT_PTRACED) { + rval = -EPERM; + goto out; + } + /* set the ptrace bit in the process flags. */ + current->ptrace |= PT_PTRACED; + rval = 0; + goto out; + } + rval = -ESRCH; + read_lock(&tasklist_lock); + child = find_task_by_pid(pid); + if (child) + get_task_struct(child); + read_unlock(&tasklist_lock); + if (!child) + goto out; + + rval = -EPERM; + if (pid == 1) /* you may not mess with init */ + goto out; + + if (request == PTRACE_ATTACH) { + rval = ptrace_attach(child); + goto out_tsk; + } + rval = -ESRCH; + if (!(child->ptrace & PT_PTRACED)) + goto out_tsk; + if (child->state != TASK_STOPPED) { + if (request != PTRACE_KILL) + goto out_tsk; + } + if (child->parent != current) + goto out_tsk; + + switch (request) { + case PTRACE_PEEKTEXT: /* read word at location addr. */ + case PTRACE_PEEKDATA:{ + unsigned long tmp; + int copied; + + copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0); + rval = -EIO; + if (copied != sizeof(tmp)) + break; + rval = put_user(tmp,(unsigned long *) data); + + goto out; + } + + /* Read the word at location addr in the USER area. */ + case PTRACE_PEEKUSR: + if (addr >= 0 && addr < PT_SIZE && (addr & 0x3) == 0) { + struct pt_regs *regs = task_regs (child); + unsigned long val = + *(unsigned long *)((char *)regs + addr); + rval = put_user (val, (unsigned long *)data); + } else { + rval = 0; + rval = -EIO; + } + goto out; + + case PTRACE_POKETEXT: /* write the word at location addr. */ + case PTRACE_POKEDATA: + rval = 0; + if (access_process_vm(child, addr, &data, sizeof(data), 1) + == sizeof(data)) + break; + rval = -EIO; + goto out; + + case PTRACE_POKEUSR: + if (addr >= 0 && addr < PT_SIZE && (addr & 0x3) == 0) { + struct pt_regs *regs = task_regs (child); + unsigned long *loc = + (unsigned long *)((char *)regs + addr); + *loc = data; + } else { + rval = 0; + rval = -EIO; + } + goto out; + + case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */ + case PTRACE_CONT: /* rvaltart after signal. */ + rval = -EIO; + if ((unsigned long) data > _NSIG) + break; + if (request == PTRACE_SYSCALL) + set_tsk_thread_flag(child, TIF_SYSCALL_TRACE); + else + clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE); + child->exit_code = data; + wake_up_process(child); + rval = 0; + break; + + /* + * make the child exit. Best I can do is send it a sigkill. + * perhaps it should be put in the status that it wants to + * exit. + */ + case PTRACE_KILL: + rval = 0; + if (child->state == TASK_ZOMBIE) /* already dead */ + break; + child->exit_code = SIGKILL; + wake_up_process(child); + break; + + case PTRACE_DETACH: /* detach a process that was attached. */ + rval = ptrace_detach(child, data); + break; + + default: + rval = -EIO; + goto out; + } + +out_tsk: + put_task_struct(child); +out: + unlock_kernel(); + return rval; +} + +asmlinkage void syscall_trace(void) +{ + if (!test_thread_flag(TIF_SYSCALL_TRACE)) + return; + if (!(current->ptrace & PT_PTRACED)) + return; + /* The 0x80 provides a way for the tracing parent to distinguish + between a syscall stop and SIGTRAP delivery */ + current->exit_code = SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) + ? 0x80 : 0); + current->state = TASK_STOPPED; + notify_parent(current, SIGCHLD); + schedule(); + /* + * this isn't the same as continuing with a signal, but it will do + * for normal use. strace only continues with a signal if the + * stopping signal is not SIGTRAP. -brl + */ + if (current->exit_code) { + send_sig(current->exit_code, current, 1); + current->exit_code = 0; + } +} + +void ptrace_disable (struct task_struct *child) +{ + /* nothing to do */ +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/kernel/rte_cb.c linux.2.5.40-ac2/arch/v850/kernel/rte_cb.c --- linux.2.5.40/arch/v850/kernel/rte_cb.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/kernel/rte_cb.c 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,223 @@ +/* + * include/asm-v850/rte_cb.c -- Midas lab RTE-CB series of evaluation boards + * + * Copyright (C) 2001,02 NEC Corporation + * Copyright (C) 2001,02 Miles Bader + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file COPYING in the main directory of this + * archive for more details. + * + * Written by Miles Bader + */ + +#include +#include +#include +#include + +#include +#include + +#include "mach.h" + +static void led_tick (void); + +#ifdef CONFIG_RTE_CB_MULTI +extern void multi_init (void); +#endif + + +#ifdef CONFIG_ROM_KERNEL +/* Initialization for kernel in ROM. */ +static inline rom_kernel_init (void) +{ + /* If the kernel is in ROM, we have to copy any initialized data + from ROM into RAM. */ + extern unsigned long _data_load_start, _sdata, _edata; + register unsigned long *src = &_data_load_start; + register unsigned long *dst = &_sdata, *end = &_edata; + + while (dst != end) + *dst++ = *src++; +} +#endif /* CONFIG_ROM_KERNEL */ + +void __init mach_early_init (void) +{ + nb85e_intc_disable_irqs (); + +#if defined (CONFIG_ROM_KERNEL) + rom_kernel_init (); +#elif defined (CONFIG_RTE_CB_MULTI) + multi_init (); +#endif +} + +void __init mach_setup (char **cmdline) +{ + printk (KERN_INFO + "CPU: %s\n" + "Platform: %s%s\n", + CPU_MODEL_LONG, + PLATFORM_LONG, +#ifdef CONFIG_ROM_KERNEL + "" +#elif defined (CONFIG_RTE_CB_MULTI) + " (with Multi ROM monitor)" +#else + " (with ROM monitor)" +#endif + ); + + /* Probe for Mother-A, and print a message if we find it. */ + *(volatile long *)MB_A_SRAM_ADDR = 0xDEADBEEF; + if (*(volatile long *)MB_A_SRAM_ADDR == 0xDEADBEEF) { + *(volatile long *)MB_A_SRAM_ADDR = 0x12345678; + if (*(volatile long *)MB_A_SRAM_ADDR == 0x12345678) + printk (KERN_INFO + " NEC SolutionGear/Midas lab" + " RTE-MOTHER-A motherboard\n"); + } + +#if defined (CONFIG_V850E_NB85E_UART_CONSOLE) && !defined (CONFIG_TIME_BOOTUP) + nb85e_uart_cons_init (); +#endif + + mach_tick = led_tick; +} + +#ifdef CONFIG_TIME_BOOTUP +void initial_boot_done (void) +{ +#ifdef CONFIG_V850E_NB85E_UART_CONSOLE + nb85e_uart_cons_init (); +#endif +} +#endif + +void machine_restart (char *__unused) +{ +#ifdef CONFIG_RESET_GUARD + disable_reset_guard (); +#endif + asm ("jmp r0"); /* Jump to the reset vector. */ +} + +void machine_halt (void) +{ +#ifdef CONFIG_RESET_GUARD + disable_reset_guard (); +#endif + for (;;) + asm ("halt; nop; nop; nop; nop; nop"); +} + +void machine_power_off (void) +{ + machine_halt (); +} + + +/* Animated LED display for timer tick. */ + +#define TICK_UPD_FREQ 6 +static int tick_frames[][10] = { + { 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, -1 }, + { 0x63, 0x5c, -1 }, + { 0x5c, 0x00, -1 }, + { 0x63, 0x00, -1 }, + { -1 } +}; + +/* LED access routines. */ +extern unsigned read_leds (int pos, char *buf, int len); +extern unsigned write_leds (int pos, const char *buf, int len); + +static void led_tick () +{ + static unsigned counter = 0; + + if (++counter == (HZ / TICK_UPD_FREQ)) { + /* Which frame we're currently displaying for each digit. */ + static unsigned frame_nums[LED_NUM_DIGITS] = { 0 }; + /* Display image. */ + static unsigned char image[LED_NUM_DIGITS] = { 0 }; + unsigned char prev_image[LED_NUM_DIGITS]; + int write_to_leds = 1; /* true if we should actually display */ + int digit; + + /* We check to see if the physical LEDs contains what we last + wrote to them; if not, we suppress display (this is so that + users can write to the LEDs, and not have their output + overwritten). As a special case, we start writing again if + all the LEDs are blank, or our display image is all zeros + (indicating that this is the initial update, when the actual + LEDs might contain random data). */ + read_leds (0, prev_image, LED_NUM_DIGITS); + for (digit = 0; digit < LED_NUM_DIGITS; digit++) + if (image[digit] != prev_image[digit] + && image[digit] && prev_image[digit]) + { + write_to_leds = 0; + break; + } + + /* Update display image. */ + for (digit = 0; + digit < LED_NUM_DIGITS && tick_frames[digit][0] >= 0; + digit++) + { + int frame = tick_frames[digit][frame_nums[digit]]; + if (frame < 0) { + image[digit] = tick_frames[digit][0]; + frame_nums[digit] = 1; + } else { + image[digit] = frame; + frame_nums[digit]++; + break; + } + } + + if (write_to_leds) + /* Write the display image to the physical LEDs. */ + write_leds (0, image, LED_NUM_DIGITS); + + counter = 0; + } +} + + +/* Mother-A interrupts. */ + +#ifdef CONFIG_RTE_GBUS_INT + +#define L GBUS_INT_PRIORITY_LOW +#define M GBUS_INT_PRIORITY_MEDIUM +#define H GBUS_INT_PRIORITY_HIGH + +static struct gbus_int_irq_init gbus_irq_inits[] = { +#ifdef CONFIG_RTE_MB_A_PCI + { "MB_A_LAN", IRQ_MB_A_LAN, 1, L }, + { "MB_A_PCI1", IRQ_MB_A_PCI1(0), IRQ_MB_A_PCI1_NUM, L }, + { "MB_A_PCI2", IRQ_MB_A_PCI2(0), IRQ_MB_A_PCI2_NUM, L }, + { "MB_A_EXT", IRQ_MB_A_EXT(0), IRQ_MB_A_EXT_NUM, L }, + { "MB_A_USB_OC",IRQ_MB_A_USB_OC(0), IRQ_MB_A_USB_OC_NUM, L }, + { "MB_A_PCMCIA_OC",IRQ_MB_A_PCMCIA_OC, 1, L }, +#endif + { 0 } +}; +#define NUM_GBUS_IRQ_INITS \ + ((sizeof gbus_irq_inits / sizeof gbus_irq_inits[0]) - 1) + +static struct hw_interrupt_type gbus_hw_itypes[NUM_GBUS_IRQ_INITS]; + +#endif /* CONFIG_RTE_GBUS_INT */ + +void __init rte_cb_init_irqs (void) +{ +#ifdef CONFIG_RTE_GBUS_INT + gbus_int_init_irqs (); + gbus_int_init_irq_types (gbus_irq_inits, gbus_hw_itypes); +#endif /* CONFIG_RTE_GBUS_INT */ +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/kernel/rte_cb_leds.c linux.2.5.40-ac2/arch/v850/kernel/rte_cb_leds.c --- linux.2.5.40/arch/v850/kernel/rte_cb_leds.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/kernel/rte_cb_leds.c 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,135 @@ +/* + * include/asm-v850/rte_cb_leds.c -- Midas lab RTE-CB board LED device support + * + * Copyright (C) 2002 NEC Corporation + * Copyright (C) 2002 Miles Bader + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file COPYING in the main directory of this + * archive for more details. + * + * Written by Miles Bader + */ + +#include +#include +#include +#include + +#include + +#define LEDS_MINOR 169 /* Minor device number, using misc major. */ + +/* The actual LED hardware is write-only, so we hold the contents here too. */ +static unsigned char leds_image[LED_NUM_DIGITS] = { 0 }; + +/* Spinlock protecting the above leds. */ +static spinlock_t leds_lock = SPIN_LOCK_UNLOCKED; + +/* Common body of LED read/write functions, checks POS and LEN for + correctness, declares a variable using IMG_DECL, initialized pointing at + the POS position in the LED image buffer, and and iterates COPY_EXPR + until BUF is equal to the last buffer position; finally, sets LEN to be + the amount actually copied. IMG should be a variable declaration + (without an initializer or a terminating semicolon); POS, BUF, and LEN + should all be simple variables. */ +#define DO_LED_COPY(img_decl, pos, buf, len, copy_expr) \ +do { \ + if (pos > LED_NUM_DIGITS) \ + len = 0; \ + else { \ + if (pos + len > LED_NUM_DIGITS) \ + len = LED_NUM_DIGITS - pos; \ + \ + if (len > 0) { \ + int _flags; \ + const char *_end = buf + len; \ + img_decl = &leds_image[pos]; \ + \ + spin_lock_irqsave (leds_lock, _flags); \ + do \ + (copy_expr); \ + while (buf != _end); \ + spin_unlock_irqrestore (leds_lock, _flags); \ + } \ + } \ +} while (0) + +/* Read LEN bytes from LEDs at position POS, into BUF. + Returns actual amount read. */ +unsigned read_leds (unsigned pos, char *buf, unsigned len) +{ + DO_LED_COPY (const char *img, pos, buf, len, *buf++ = *img++); + return len; +} + +/* Write LEN bytes to LEDs at position POS, from BUF. + Returns actual amount written. */ +unsigned write_leds (unsigned pos, const char *buf, unsigned len) +{ + /* We write the actual LED values backwards, because + increasing memory addresses reflect LEDs right-to-left. */ + volatile char *led = &LED (LED_NUM_DIGITS - pos - 1); + /* We invert the value written to the hardware, because 1 = off, + and 0 = on. */ + DO_LED_COPY (char *img, pos, buf, len, + *led-- = 0xFF ^ (*img++ = *buf++)); + return len; +} + + +/* Device functions. */ + +static ssize_t leds_dev_read (struct file *file, char *buf, size_t len, + loff_t *pos) +{ + char temp_buf[LED_NUM_DIGITS]; + len = read_leds (*pos, temp_buf, len); + if (copy_to_user (buf, temp_buf, len)) + return -EFAULT; + *pos += len; + return len; +} + +static ssize_t leds_dev_write (struct file *file, const char *buf, size_t len, + loff_t *pos) +{ + char temp_buf[LED_NUM_DIGITS]; + if (copy_from_user (temp_buf, buf, min_t(size_t, len, LED_NUM_DIGITS))) + return -EFAULT; + len = write_leds (*pos, temp_buf, len); + *pos += len; + return len; +} + +static loff_t leds_dev_lseek (struct file *file, loff_t offs, int whence) +{ + if (whence == 1) + offs += file->f_pos; /* relative */ + else if (whence == 2) + offs += LED_NUM_DIGITS; /* end-relative */ + + if (offs >= 0 && offs <= LED_NUM_DIGITS) + file->f_pos = offs; + else + return -EINVAL; +} + +static struct file_operations leds_fops = { + read: leds_dev_read, + write: leds_dev_write, + llseek: leds_dev_lseek +}; + +static struct miscdevice leds_miscdev = { + name: "leds", + minor: LEDS_MINOR, + fops: &leds_fops +}; + +int __init leds_dev_init (void) +{ + return misc_register (&leds_miscdev); +} + +__initcall (leds_dev_init); diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/kernel/rte_cb_multi.c linux.2.5.40-ac2/arch/v850/kernel/rte_cb_multi.c --- linux.2.5.40/arch/v850/kernel/rte_cb_multi.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/kernel/rte_cb_multi.c 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,85 @@ +/* + * include/asm-v850/rte_multi.c -- Support for Multi debugger monitor ROM + * on Midas lab RTE-CB series of evaluation boards + * + * Copyright (C) 2001,02 NEC Corporation + * Copyright (C) 2001,02 Miles Bader + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file COPYING in the main directory of this + * archive for more details. + * + * Written by Miles Bader + */ + +#include + +#include + +/* A table of which interrupt vectors to install, since blindly + installing all of them makes the debugger stop working. This is a + list of offsets in the interrupt vector area; each entry means to + copy that particular 16-byte vector. An entry less than zero ends + the table. */ +static long multi_intv_install_table[] = { + 0x40, 0x50, /* trap vectors */ + /* Note -- illegal insn trap is used by the debugger. */ + 0xD0, 0xE0, 0xF0, /* GINT1 - GINT3 */ + 0x240, 0x250, 0x260, 0x270, /* timer D interrupts */ + 0x2D0, 0x2E0, 0x2F0, /* UART channel 0 */ + 0x310, 0x320, 0x330, /* UART channel 1 */ + 0x350, 0x360, 0x370, /* UART channel 2 */ + -1 +}; + +/* Early initialization for kernel using Multi debugger ROM monitor. */ +void __init multi_init (void) +{ + /* We're using the Multi debugger monitor, so we have to install + the interrupt vectors. The monitor doesn't allow them to be + initially downloaded into their final destination because + it's in the monitor's scratch-RAM area. Unfortunately, Multi + also doesn't deal correctly with ELF sections where the LMA + and VMA differ -- it just ignores the LMA -- so we can't use + that feature to work around the problem. What we do instead + is just put the interrupt vectors into a normal section, and + do the necessary copying and relocation here. Since the + interrupt vector basically only contains `jr' instructions + and no-ops, it's not that hard. */ + extern unsigned long _intv_load_start, _intv_start; + register unsigned long *src = &_intv_load_start; + register unsigned long *dst = (unsigned long *)INTV_BASE; + register unsigned long jr_fixup = (char *)&_intv_start - (char *)dst; + register long *ii; + + /* Copy interupt vectors as instructed by multi_intv_install_table. */ + for (ii = multi_intv_install_table; *ii >= 0; ii++) { + /* Copy 16-byte interrupt vector at offset *ii. */ + int boffs; + for (boffs = 0; boffs < 0x10; boffs += sizeof *src) { + /* Copy a single word, fixing up the jump offs + if it's a `jr' instruction. */ + int woffs = (*ii + boffs) / sizeof *src; + unsigned long word = src[woffs]; + + if ((word & 0xFC0) == 0x780) { + /* A `jr' insn, fix up its offset (and yes, the + wierd half-word swapping is intentional). */ + unsigned short hi = word & 0xFFFF; + unsigned short lo = word >> 16; + unsigned long udisp22 + = lo + ((hi & 0x3F) << 16); + long disp22 = (long)(udisp22 << 10) >> 10; + + disp22 += jr_fixup; + + hi = ((disp22 >> 16) & 0x3F) | 0x780; + lo = disp22 & 0xFFFF; + + word = hi + (lo << 16); + } + + dst[woffs] = word; + } + } +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/kernel/rte_ma1_cb.c linux.2.5.40-ac2/arch/v850/kernel/rte_ma1_cb.c --- linux.2.5.40/arch/v850/kernel/rte_ma1_cb.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/kernel/rte_ma1_cb.c 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,101 @@ +/* + * arch/v850/kernel/rte_ma1_cb.c -- Midas labs RTE-V850E/MA1-CB board + * + * Copyright (C) 2001,02 NEC Corporation + * Copyright (C) 2001,02 Miles Bader + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file COPYING in the main directory of this + * archive for more details. + * + * Written by Miles Bader + */ + +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "mach.h" + +/* SRAM and SDRAM are almost contiguous (with a small hole in between; + see mach_reserve_bootmem for details), so just use both as one big area. */ +#define RAM_START SRAM_ADDR +#define RAM_END (SDRAM_ADDR + SDRAM_SIZE) + +void __init mach_get_physical_ram (unsigned long *ram_start, + unsigned long *ram_len) +{ + *ram_start = RAM_START; + *ram_len = RAM_END - RAM_START; +} + +void __init mach_reserve_bootmem () +{ + unsigned long dup; + +#ifdef CONFIG_RTE_CB_MULTI + /* Prevent the kernel from touching the monitor's scratch RAM. */ + reserve_bootmem (MON_SCRATCH_ADDR, MON_SCRATCH_SIZE); +#endif + + /* The space between SRAM and SDRAM is filled with duplicate + images of SRAM. Prevent the kernel from using them. */ + for (dup = SRAM_ADDR + SRAM_SIZE; dup < SDRAM_ADDR; dup += SRAM_SIZE) + reserve_bootmem (dup, SRAM_SIZE); +} + +void mach_gettimeofday (struct timeval *tv) +{ + tv->tv_sec = 0; + tv->tv_usec = 0; +} + +/* Called before configuring an on-chip UART. */ +void rte_ma1_cb_uart_pre_configure (unsigned chan, + unsigned cflags, unsigned baud) +{ + /* The RTE-MA1-CB connects some general-purpose I/O pins on the + CPU to the RTS/CTS lines of UART 0's serial connection. + I/O pins P42 and P43 are RTS and CTS respectively. */ + if (chan == 0) { + /* Put P42 & P43 in I/O port mode. */ + MA_PORT4_PMC &= ~0xC; + /* Make P42 and output, and P43 an input. */ + MA_PORT4_PM = (MA_PORT4_PM & ~0xC) | 0x8; + } + + /* Do pre-configuration for the actual UART. */ + ma_uart_pre_configure (chan, cflags, baud); +} + +void __init mach_init_irqs (void) +{ + unsigned tc; + + /* Initialize interrupts. */ + ma_init_irqs (); + rte_cb_init_irqs (); + + /* Use falling-edge-sensitivity for interrupts . */ + NB85E_TIMER_C_SESC (0) &= ~0xC; + NB85E_TIMER_C_SESC (1) &= ~0xF; + + /* INTP000-INTP011 are shared with `Timer C', so we have to set + up Timer C to pass them through as raw interrupts. */ + for (tc = 0; tc < 2; tc++) + /* Turn on the timer. */ + NB85E_TIMER_C_TMCC0 (tc) |= NB85E_TIMER_C_TMCC0_CAE; + + /* Make sure the relevent port0/port1 pins are assigned + interrupt duty. We used INTP001-INTP011 (don't screw with + INTP000 because the monitor uses it). */ + MA_PORT0_PMC |= 0x4; /* P02 (INTP001) in IRQ mode. */ + MA_PORT1_PMC |= 0x6; /* P11 (INTP010) & P12 (INTP011) in IRQ mode.*/ +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/kernel/rte_mb_a_pci.c linux.2.5.40-ac2/arch/v850/kernel/rte_mb_a_pci.c --- linux.2.5.40/arch/v850/kernel/rte_mb_a_pci.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/kernel/rte_mb_a_pci.c 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,779 @@ +/* + * arch/v850/kernel/mb_a_pci.c -- PCI support for Midas lab RTE-MOTHER-A board + * + * Copyright (C) 2001,02 NEC Corporation + * Copyright (C) 2001,02 Miles Bader + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file COPYING in the main directory of this + * archive for more details. + * + * Written by Miles Bader + */ + +#include +#include +#include +#include +#include +#include +#include + +#include + +/* __nomods_init is like __devinit, but is a no-op when modules are enabled. + This is used by some routines that can be called either during boot + or by a module. */ +#ifdef CONFIG_MODULES +#define __nomods_init /*nothing*/ +#else +#define __nomods_init __devinit +#endif + +/* PCI devices on the Mother-A board can only do DMA to/from the MB SRAM + (the RTE-V850E/MA1-CB cpu board doesn't support PCI access to + CPU-board memory), and since linux DMA buffers are allocated in + normal kernel memory, we basically have to copy DMA blocks around + (this is like a `bounce buffer'). When a DMA block is `mapped', we + allocate an identically sized block in MB SRAM, and if we're doing + output to the device, copy the CPU-memory block to the MB-SRAM block. + When an active block is `unmapped', we will copy the block back to + CPU memory if necessary, and then deallocate the MB SRAM block. + Ack. */ + +/* Where the motherboard SRAM is in the PCI-bus address space (the + first 512K of it is also mapped at PCI address 0). */ +#define PCI_MB_SRAM_ADDR 0x800000 + +/* Convert CPU-view MB SRAM address to/from PCI-view addresses of the + same memory. */ +#define MB_SRAM_TO_PCI(mb_sram_addr) \ + ((dma_addr_t)mb_sram_addr - MB_A_SRAM_ADDR + PCI_MB_SRAM_ADDR) +#define PCI_TO_MB_SRAM(pci_addr) \ + (void *)(pci_addr - PCI_MB_SRAM_ADDR + MB_A_SRAM_ADDR) + +static void pcibios_assign_resources (void); + +struct mb_pci_dev_irq { + unsigned dev; /* PCI device number */ + unsigned irq_base; /* First IRQ */ + unsigned query_pin; /* True if we should read the device's + Interrupt Pin info, and allocate + interrupt IRQ_BASE + PIN. */ +}; + +/* PCI interrupts are mapped statically to GBUS interrupts. */ +static struct mb_pci_dev_irq mb_pci_dev_irqs[] = { + /* Motherboard SB82558 ethernet controller */ + { 10, IRQ_MB_A_LAN, 0 }, + /* PCI slot 1 */ + { 8, IRQ_MB_A_PCI1(0), 1 }, + /* PCI slot 2 */ + { 9, IRQ_MB_A_PCI2(0), 1 } +}; +#define NUM_MB_PCI_DEV_IRQS \ + (sizeof mb_pci_dev_irqs / sizeof mb_pci_dev_irqs[0]) + + +/* PCI configuration primitives. */ + +#define CONFIG_DMCFGA(bus, devfn, offs) \ + (0x80000000 \ + | ((offs) & ~0x3) \ + | ((devfn) << 8) \ + | ((bus)->number << 16)) + +static int +mb_pci_read (struct pci_bus *bus, unsigned devfn, int offs, int size, u32 *rval) +{ + u32 addr; + int flags; + + local_irq_save (flags); + + MB_A_PCI_PCICR = 0x7; + MB_A_PCI_DMCFGA = CONFIG_DMCFGA (bus, devfn, offs); + + addr = MB_A_PCI_IO_ADDR + (offs & 0x3); + + switch (size) { + case 1: *rval = *(volatile u8 *)addr; break; + case 2: *rval = *(volatile u16 *)addr; break; + case 4: *rval = *(volatile u32 *)addr; break; + } + + if (MB_A_PCI_PCISR & 0x2000) { + MB_A_PCI_PCISR = 0x2000; + *rval = ~0; + } + + MB_A_PCI_DMCFGA = 0; + + local_irq_restore (flags); + + return PCIBIOS_SUCCESSFUL; +} + +static int +mb_pci_write (struct pci_bus *bus, unsigned devfn, int offs, int size, u32 val) +{ + u32 addr; + int flags; + + local_irq_save (flags); + + MB_A_PCI_PCICR = 0x7; + MB_A_PCI_DMCFGA = CONFIG_DMCFGA (bus, devfn, offs); + + addr = MB_A_PCI_IO_ADDR + (offs & 0x3); + + switch (size) { + case 1: *(volatile u8 *)addr = val; break; + case 2: *(volatile u16 *)addr = val; break; + case 4: *(volatile u32 *)addr = val; break; + } + + if (MB_A_PCI_PCISR & 0x2000) + MB_A_PCI_PCISR = 0x2000; + + MB_A_PCI_DMCFGA = 0; + + local_irq_restore (flags); + + return PCIBIOS_SUCCESSFUL; +} + +static struct pci_ops mb_pci_config_ops = { + .read = mb_pci_read, + .write = mb_pci_write, +}; + + +/* PCI Initialization. */ + +static struct pci_bus *mb_pci_bus = 0; + +/* Do initial PCI setup. */ +static void __devinit pcibios_init (void) +{ + u32 id = MB_A_PCI_PCIHIDR; + u16 vendor = id & 0xFFFF; + u16 device = (id >> 16) & 0xFFFF; + + if (vendor == PCI_VENDOR_ID_PLX && device == PCI_DEVICE_ID_PLX_9080) { + printk (KERN_INFO + "PCI: PLX Technology PCI9080 HOST/PCI bridge\n"); + + MB_A_PCI_PCICR = 0x147; + MB_A_PCI_DMLBAM = 0x0; + + MB_A_PCI_PCIBAR0 = 0x007FFF00; + MB_A_PCI_PCIBAR1 = 0x0000FF00; + MB_A_PCI_PCIBAR2 = 0x00800000; + + MB_A_PCI_PCILTR = 0x20; + + MB_A_PCI_PCIPBAM |= 0x3; + + MB_A_PCI_PCISR = ~0; /* Clear errors. */ + + /* Reprogram the motherboard's IO/config address space, + as we don't support the GCS7 address space that the + default uses. Note that we have to give the address + from the motherboard's point of view, which is + different than the CPU's. */ + MB_A_PCI_DMLBAI = MB_A_PCI_IO_ADDR - GCS5_ADDR; + MB_A_PCI_DMRR = ~(MB_A_PCI_MEM_SIZE - 1); + + mb_pci_bus = pci_scan_bus (0, &mb_pci_config_ops, 0); + + pcibios_assign_resources (); + } else + printk (KERN_ERR "PCI: HOST/PCI bridge not found\n"); +} + +subsys_initcall(pcibios_init); + +char __devinit *pcibios_setup (char *option) +{ + /* Don't handle any options. */ + return option; +} + + +int __nomods_init pcibios_enable_device (struct pci_dev *dev, int mask) +{ + u16 cmd, old_cmd; + int idx; + struct resource *r; + + pci_read_config_word(dev, PCI_COMMAND, &cmd); + old_cmd = cmd; + for (idx = 0; idx < 6; idx++) { + r = &dev->resource[idx]; + if (!r->start && r->end) { + printk(KERN_ERR "PCI: Device %s not available because " + "of resource collisions\n", dev->slot_name); + return -EINVAL; + } + if (r->flags & IORESOURCE_IO) + cmd |= PCI_COMMAND_IO; + if (r->flags & IORESOURCE_MEM) + cmd |= PCI_COMMAND_MEMORY; + } + if (cmd != old_cmd) { + printk("PCI: Enabling device %s (%04x -> %04x)\n", + dev->slot_name, old_cmd, cmd); + pci_write_config_word(dev, PCI_COMMAND, cmd); + } + return 0; +} + + +/* Resource allocation. */ +static void __devinit pcibios_assign_resources (void) +{ + struct pci_dev *dev; + struct resource *r; + + pci_for_each_dev (dev) { + int di_num; + unsigned class = dev->class >> 8; + + if (class && class != PCI_CLASS_BRIDGE_HOST) { + unsigned r_num; + for(r_num = 0; r_num < 6; r_num++) { + r = &dev->resource[r_num]; + if (!r->start && r->end) + pci_assign_resource (dev, r_num); + } + } + + /* Assign interrupts. */ + for (di_num = 0; di_num < NUM_MB_PCI_DEV_IRQS; di_num++) { + struct mb_pci_dev_irq *di = &mb_pci_dev_irqs[di_num]; + + if (di->dev == PCI_SLOT (dev->devfn)) { + unsigned irq = di->irq_base; + + if (di->query_pin) { + /* Find out which interrupt pin + this device uses (each PCI + slot has 4). */ + u8 irq_pin; + + pci_read_config_byte (dev, + PCI_INTERRUPT_PIN, + &irq_pin); + + if (irq_pin == 0) + /* Doesn't use interrupts. */ + continue; + else + irq += irq_pin - 1; + } + + pcibios_update_irq (dev, irq); + } + } + } +} + +void __devinit pcibios_update_irq (struct pci_dev *dev, int irq) +{ + dev->irq = irq; + pci_write_config_byte (dev, PCI_INTERRUPT_LINE, irq); +} + +void __nomods_init +pcibios_update_resource (struct pci_dev *dev, struct resource *root, + struct resource *r, int resource) +{ + u32 new, check; + int reg; + + if (r->flags & IORESOURCE_IO) + new = (((r->start - MB_A_PCI_IO_ADDR) + & PCI_BASE_ADDRESS_IO_MASK) + | PCI_BASE_ADDRESS_SPACE_IO); + else if (r->flags & IORESOURCE_MEM) + new = (((r->start - MB_A_PCI_MEM_ADDR) + & PCI_BASE_ADDRESS_MEM_MASK) + | PCI_BASE_ADDRESS_MEM_TYPE_32 + | ((r->flags & IORESOURCE_PREFETCH) + ? PCI_BASE_ADDRESS_MEM_PREFETCH + : 0) + | PCI_BASE_ADDRESS_SPACE_MEMORY); + else + panic ("pcibios_update_resource: unknown resource type"); + + if (resource < 6) + reg = PCI_BASE_ADDRESS_0 + 4*resource; + else if (resource == PCI_ROM_RESOURCE) { + r->flags |= PCI_ROM_ADDRESS_ENABLE; + new |= PCI_ROM_ADDRESS_ENABLE; + reg = dev->rom_base_reg; + } else + return; + + pci_write_config_dword(dev, reg, new); + pci_read_config_dword(dev, reg, &check); + if ((new ^ check) & ((new & PCI_BASE_ADDRESS_SPACE_IO) ? PCI_BASE_ADDRESS_IO_MASK : PCI_BASE_ADDRESS_MEM_MASK)) { + printk (KERN_ERR "PCI: Error while updating region " + "%s/%d (%08x != %08x)\n", dev->slot_name, resource, + new, check); + } +} + + +/* Stubs for things we don't use. */ + +struct pci_fixup pcibios_fixups[] = { { 0 } }; + +/* Called after each bus is probed, but before its children are examined. */ +void pcibios_fixup_bus(struct pci_bus *b) +{ +} + +void +pcibios_align_resource (void *data, struct resource *res, + unsigned long size, unsigned long align) +{ +} + +void pcibios_set_master (struct pci_dev *dev) +{ +} + + +/* Mother-A SRAM memory allocation. This is a simple first-fit allocator. */ + +/* A memory free-list node. */ +struct mb_sram_free_area { + void *mem; + unsigned long size; + struct mb_sram_free_area *next; +}; + +/* The tail of the free-list, which starts out containing all the SRAM. */ +static struct mb_sram_free_area mb_sram_free_tail = { + (void *)MB_A_SRAM_ADDR, MB_A_SRAM_SIZE, 0 +}; + +/* The free-list. */ +static struct mb_sram_free_area *mb_sram_free_areas = &mb_sram_free_tail; + +/* The free-list of free free-list nodes. (:-) */ +static struct mb_sram_free_area *mb_sram_free_free_areas = 0; + +/* Spinlock protecting the above globals. */ +static spinlock_t mb_sram_lock = SPIN_LOCK_UNLOCKED; + +/* Allocate a memory block at least SIZE bytes long in the Mother-A SRAM + space. */ +static void *alloc_mb_sram (size_t size) +{ + struct mb_sram_free_area *prev, *fa; + int flags; + void *mem = 0; + + spin_lock_irqsave (mb_sram_lock, flags); + + /* Look for a free area that can contain SIZE bytes. */ + for (prev = 0, fa = mb_sram_free_areas; fa; prev = fa, fa = fa->next) + if (fa->size >= size) { + /* Found one! */ + mem = fa->mem; + + if (fa->size == size) { + /* In fact, it fits exactly, so remove + this node from the free-list. */ + if (prev) + prev->next = fa->next; + else + mb_sram_free_areas = fa->next; + /* Put it on the free-list-entry-free-list. */ + fa->next = mb_sram_free_free_areas; + mb_sram_free_free_areas = fa; + } else { + /* FA is bigger than SIZE, so just + reduce its size to account for this + allocation. */ + fa->mem += size; + fa->size -= size; + } + + break; + } + + spin_unlock_irqrestore (mb_sram_lock, flags); + + return mem; +} + +/* Return the memory area MEM of size SIZE to the MB SRAM free pool. */ +static void free_mb_sram (void *mem, size_t size) +{ + struct mb_sram_free_area *prev, *fa, *new_fa; + int flags; + void *end = mem + size; + + spin_lock_irqsave (mb_sram_lock, flags); + + retry: + /* Find an adjacent free-list entry. */ + for (prev = 0, fa = mb_sram_free_areas; fa; prev = fa, fa = fa->next) + if (fa->mem == end) { + /* FA is just after MEM, grow down to encompass it. */ + fa->mem = mem; + fa->size += size; + goto done; + } else if (fa->mem + fa->size == mem) { + struct mb_sram_free_area *next_fa = fa->next; + + /* FA is just before MEM, expand to encompass it. */ + fa->size += size; + + /* See if FA can now be merged with its successor. */ + if (next_fa && fa->mem + fa->size == next_fa->mem) { + /* Yup; merge NEXT_FA's info into FA. */ + fa->size += next_fa->size; + fa->next = next_fa->next; + /* Free NEXT_FA. */ + next_fa->next = mb_sram_free_free_areas; + mb_sram_free_free_areas = next_fa; + } + goto done; + } else if (fa->mem > mem) + /* We've reached the right spot in the free-list + without finding an adjacent free-area, so add + a new free area to hold mem. */ + break; + + /* Make a new free-list entry. */ + + /* First, get a free-list entry. */ + if (! mb_sram_free_free_areas) { + /* There are none, so make some. */ + void *block; + size_t block_size = sizeof (struct mb_sram_free_area) * 8; + + /* Don't hold the lock while calling kmalloc (I'm not + sure whether it would be a problem, since we use + GFP_ATOMIC, but it makes me nervous). */ + spin_unlock_irqrestore (mb_sram_lock, flags); + + block = kmalloc (block_size, GFP_ATOMIC); + if (! block) + panic ("free_mb_sram: can't allocate free-list entry"); + + /* Now get the lock back. */ + spin_lock_irqsave (mb_sram_lock, flags); + + /* Add the new free free-list entries. */ + while (block_size > 0) { + struct mb_sram_free_area *nfa = block; + nfa->next = mb_sram_free_free_areas; + mb_sram_free_free_areas = nfa; + block += sizeof *nfa; + block_size -= sizeof *nfa; + } + + /* Since we dropped the lock to call kmalloc, the + free-list could have changed, so retry from the + beginning. */ + goto retry; + } + + /* Remove NEW_FA from the free-list of free-list entries. */ + new_fa = mb_sram_free_free_areas; + mb_sram_free_free_areas = new_fa->next; + + /* NEW_FA initially holds only MEM. */ + new_fa->mem = mem; + new_fa->size = size; + + /* Insert NEW_FA in the free-list between PREV and FA. */ + new_fa->next = fa; + if (prev) + prev->next = new_fa; + else + mb_sram_free_areas = new_fa; + + done: + spin_unlock_irqrestore (mb_sram_lock, flags); +} + + +/* Maintainence of CPU -> Mother-A DMA mappings. */ + +struct dma_mapping { + void *cpu_addr; + void *mb_sram_addr; + size_t size; + struct dma_mapping *next; +}; + +/* A list of mappings from CPU addresses to MB SRAM addresses for active + DMA blocks (that have been `granted' to the PCI device). */ +static struct dma_mapping *active_dma_mappings = 0; + +/* A list of free mapping objects. */ +static struct dma_mapping *free_dma_mappings = 0; + +/* Spinlock protecting the above globals. */ +static spinlock_t dma_mappings_lock = SPIN_LOCK_UNLOCKED; + +static struct dma_mapping *new_dma_mapping (size_t size) +{ + int flags; + struct dma_mapping *mapping; + void *mb_sram_block = alloc_mb_sram (size); + + if (! mb_sram_block) + return 0; + + spin_lock_irqsave (dma_mappings_lock, flags); + + if (! free_dma_mappings) { + /* We're out of mapping structures, make more. */ + void *mblock; + size_t mblock_size = sizeof (struct dma_mapping) * 8; + + /* Don't hold the lock while calling kmalloc (I'm not + sure whether it would be a problem, since we use + GFP_ATOMIC, but it makes me nervous). */ + spin_unlock_irqrestore (dma_mappings_lock, flags); + + mblock = kmalloc (mblock_size, GFP_ATOMIC); + if (! mblock) { + free_mb_sram (mb_sram_block, size); + return 0; + } + + /* Get the lock back. */ + spin_lock_irqsave (dma_mappings_lock, flags); + + /* Add the new mapping structures to the free-list. */ + while (mblock_size > 0) { + struct dma_mapping *fm = mblock; + fm->next = free_dma_mappings; + free_dma_mappings = fm; + mblock += sizeof *fm; + mblock_size -= sizeof *fm; + } + } + + /* Get a mapping struct from the freelist. */ + mapping = free_dma_mappings; + free_dma_mappings = mapping->next; + + /* Initialize the mapping. Other fields should be filled in by + caller. */ + mapping->mb_sram_addr = mb_sram_block; + mapping->size = size; + + /* Add it to the list of active mappings. */ + mapping->next = active_dma_mappings; + active_dma_mappings = mapping; + + spin_unlock_irqrestore (dma_mappings_lock, flags); + + return mapping; +} + +static struct dma_mapping *find_dma_mapping (void *mb_sram_addr) +{ + int flags; + struct dma_mapping *mapping; + + spin_lock_irqsave (dma_mappings_lock, flags); + + for (mapping = active_dma_mappings; mapping; mapping = mapping->next) + if (mapping->mb_sram_addr == mb_sram_addr) { + spin_unlock_irqrestore (dma_mappings_lock, flags); + return mapping; + } + + panic ("find_dma_mapping: unmapped PCI DMA addr 0x%x", + MB_SRAM_TO_PCI (mb_sram_addr)); +} + +static struct dma_mapping *deactivate_dma_mapping (void *mb_sram_addr) +{ + int flags; + struct dma_mapping *mapping, *prev; + + spin_lock_irqsave (dma_mappings_lock, flags); + + for (prev = 0, mapping = active_dma_mappings; + mapping; + prev = mapping, mapping = mapping->next) + { + if (mapping->mb_sram_addr == mb_sram_addr) { + /* This is the MAPPING; deactivate it. */ + if (prev) + prev->next = mapping->next; + else + active_dma_mappings = mapping->next; + + spin_unlock_irqrestore (dma_mappings_lock, flags); + + return mapping; + } + } + + panic ("deactivate_dma_mapping: unmapped PCI DMA addr 0x%x", + MB_SRAM_TO_PCI (mb_sram_addr)); +} + +/* Return MAPPING to the freelist. */ +static inline void +free_dma_mapping (struct dma_mapping *mapping) +{ + int flags; + + free_mb_sram (mapping->mb_sram_addr, mapping->size); + + spin_lock_irqsave (dma_mappings_lock, flags); + + mapping->next = free_dma_mappings; + free_dma_mappings = mapping; + + spin_unlock_irqrestore (dma_mappings_lock, flags); +} + + +/* Single PCI DMA mappings. */ + +/* `Grant' to PDEV the memory block at CPU_ADDR, for doing DMA. The + 32-bit PCI bus mastering address to use is returned. the device owns + this memory until either pci_unmap_single or pci_dma_sync_single is + performed. */ +dma_addr_t +pci_map_single (struct pci_dev *pdev, void *cpu_addr, size_t size, int dir) +{ + struct dma_mapping *mapping = new_dma_mapping (size); + + if (! mapping) + return 0; + + mapping->cpu_addr = cpu_addr; + + if (dir == PCI_DMA_BIDIRECTIONAL || dir == PCI_DMA_TODEVICE) + memcpy (mapping->mb_sram_addr, cpu_addr, size); + + return MB_SRAM_TO_PCI (mapping->mb_sram_addr); +} + +/* Return to the CPU the PCI DMA memory block previously `granted' to + PDEV, at DMA_ADDR. */ +void pci_unmap_single (struct pci_dev *pdev, dma_addr_t dma_addr, size_t size, + int dir) +{ + void *mb_sram_addr = PCI_TO_MB_SRAM (dma_addr); + struct dma_mapping *mapping = deactivate_dma_mapping (mb_sram_addr); + + if (size != mapping->size) + panic ("pci_unmap_single: size (%d) doesn't match" + " size of mapping at PCI DMA addr 0x%x (%d)\n", + size, dma_addr, mapping->size); + + /* Copy back the DMA'd contents if necessary. */ + if (dir == PCI_DMA_BIDIRECTIONAL || dir == PCI_DMA_FROMDEVICE) + memcpy (mapping->cpu_addr, mb_sram_addr, size); + + /* Return mapping to the freelist. */ + free_dma_mapping (mapping); +} + +/* Make physical memory consistant for a single streaming mode DMA + translation after a transfer. + + If you perform a pci_map_single() but wish to interrogate the + buffer using the cpu, yet do not wish to teardown the PCI dma + mapping, you must call this function before doing so. At the next + point you give the PCI dma address back to the card, the device + again owns the buffer. */ +void +pci_dma_sync_single (struct pci_dev *pdev, dma_addr_t dma_addr, size_t size, + int dir) +{ + void *mb_sram_addr = PCI_TO_MB_SRAM (dma_addr); + struct dma_mapping *mapping = find_dma_mapping (mb_sram_addr); + + /* Synchronize the DMA buffer with the CPU buffer if necessary. */ + if (dir == PCI_DMA_FROMDEVICE) + memcpy (mapping->cpu_addr, mb_sram_addr, size); + else if (dir == PCI_DMA_TODEVICE) + memcpy (mb_sram_addr, mapping->cpu_addr, size); + else + panic("pci_dma_sync_single: unsupported sync dir: %d", dir); +} + + +/* Scatter-gather PCI DMA mappings. */ + +/* Do multiple DMA mappings at once. */ +int +pci_map_sg (struct pci_dev *pdev, struct scatterlist *sg, int sg_len, int dir) +{ + BUG (); + return 0; +} + +/* Unmap multiple DMA mappings at once. */ +void +pci_unmap_sg (struct pci_dev *pdev, struct scatterlist *sg, int sg_len,int dir) +{ + BUG (); +} + +/* Make physical memory consistant for a set of streaming mode DMA + translations after a transfer. The same as pci_dma_sync_single but + for a scatter-gather list, same rules and usage. */ + +void +pci_dma_sync_sg (struct pci_dev *dev, struct scatterlist *sg, int sg_len, + int dir) +{ + BUG (); +} + + +/* PCI mem mapping. */ + +/* Allocate and map kernel buffer using consistent mode DMA for PCI + device. Returns non-NULL cpu-view pointer to the buffer if + successful and sets *DMA_ADDR to the pci side dma address as well, + else DMA_ADDR is undefined. */ +void * +pci_alloc_consistent (struct pci_dev *pdev, size_t size, dma_addr_t *dma_addr) +{ + void *mb_sram_mem = alloc_mb_sram (size); + if (mb_sram_mem) + *dma_addr = MB_SRAM_TO_PCI (mb_sram_mem); + return mb_sram_mem; +} + +/* Free and unmap a consistent DMA buffer. CPU_ADDR and DMA_ADDR must + be values that were returned from pci_alloc_consistent. SIZE must be + the same as what as passed into pci_alloc_consistent. References to + the memory and mappings assosciated with CPU_ADDR or DMA_ADDR past + this call are illegal. */ +void +pci_free_consistent (struct pci_dev *pdev, size_t size, void *cpu_addr, + dma_addr_t dma_addr) +{ + void *mb_sram_mem = PCI_TO_MB_SRAM (dma_addr); + free_mb_sram (mb_sram_mem, size); +} + + +/* symbol exports (for modules) */ + +EXPORT_SYMBOL (pci_map_single); +EXPORT_SYMBOL (pci_unmap_single); +EXPORT_SYMBOL (pci_alloc_consistent); +EXPORT_SYMBOL (pci_free_consistent); +EXPORT_SYMBOL (pci_dma_sync_single); diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/kernel/rte_nb85e_cb.c linux.2.5.40-ac2/arch/v850/kernel/rte_nb85e_cb.c --- linux.2.5.40/arch/v850/kernel/rte_nb85e_cb.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/kernel/rte_nb85e_cb.c 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,40 @@ +/* + * arch/v850/kernel/rte_nb85e_cb.c -- Midas labs RTE-V850E/NB85E-CB board + * + * Copyright (C) 2001,02 NEC Corporation + * Copyright (C) 2001,02 Miles Bader + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file COPYING in the main directory of this + * archive for more details. + * + * Written by Miles Bader + */ + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "mach.h" + +void mach_get_physical_ram (unsigned long *ram_start, unsigned long *ram_len) +{ + /* We just use SDRAM here; the kernel itself is in SRAM. */ + *ram_start = SDRAM_ADDR; + *ram_len = SDRAM_SIZE; +} + +void mach_gettimeofday (struct timeval *tv) +{ + tv->tv_sec = 0; + tv->tv_usec = 0; +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/kernel/semaphore.c linux.2.5.40-ac2/arch/v850/kernel/semaphore.c --- linux.2.5.40/arch/v850/kernel/semaphore.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/kernel/semaphore.c 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,164 @@ +/* + * arch/v850/kernel/semaphore.c -- Semaphore support + * + * Copyright (C) 1998-2000 IBM Corporation + * Copyright (C) 1999 Linus Torvalds + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file COPYING in the main directory of this + * archive for more details. + * + * This file is a copy of the s390 version, arch/s390/kernel/semaphore.c + * Author(s): Martin Schwidefsky + * which was derived from the i386 version, linux/arch/i386/kernel/semaphore.c + */ + +#include + +#include + +/* + * Semaphores are implemented using a two-way counter: + * The "count" variable is decremented for each process + * that tries to acquire the semaphore, while the "sleeping" + * variable is a count of such acquires. + * + * Notably, the inline "up()" and "down()" functions can + * efficiently test if they need to do any extra work (up + * needs to do something only if count was negative before + * the increment operation. + * + * "sleeping" and the contention routine ordering is + * protected by the semaphore spinlock. + * + * Note that these functions are only called when there is + * contention on the lock, and as such all this is the + * "non-critical" part of the whole semaphore business. The + * critical part is the inline stuff in + * where we want to avoid any extra jumps and calls. + */ + +/* + * Logic: + * - only on a boundary condition do we need to care. When we go + * from a negative count to a non-negative, we wake people up. + * - when we go from a non-negative count to a negative do we + * (a) synchronize with the "sleeper" count and (b) make sure + * that we're on the wakeup list before we synchronize so that + * we cannot lose wakeup events. + */ + +void __up(struct semaphore *sem) +{ + wake_up(&sem->wait); +} + +static spinlock_t semaphore_lock = SPIN_LOCK_UNLOCKED; + +void __down(struct semaphore * sem) +{ + struct task_struct *tsk = current; + DECLARE_WAITQUEUE(wait, tsk); + tsk->state = TASK_UNINTERRUPTIBLE; + add_wait_queue_exclusive(&sem->wait, &wait); + + spin_lock_irq(&semaphore_lock); + sem->sleepers++; + for (;;) { + int sleepers = sem->sleepers; + + /* + * Add "everybody else" into it. They aren't + * playing, because we own the spinlock. + */ + if (!atomic_add_negative(sleepers - 1, &sem->count)) { + sem->sleepers = 0; + break; + } + sem->sleepers = 1; /* us - see -1 above */ + spin_unlock_irq(&semaphore_lock); + + schedule(); + tsk->state = TASK_UNINTERRUPTIBLE; + spin_lock_irq(&semaphore_lock); + } + spin_unlock_irq(&semaphore_lock); + remove_wait_queue(&sem->wait, &wait); + tsk->state = TASK_RUNNING; + wake_up(&sem->wait); +} + +int __down_interruptible(struct semaphore * sem) +{ + int retval = 0; + struct task_struct *tsk = current; + DECLARE_WAITQUEUE(wait, tsk); + tsk->state = TASK_INTERRUPTIBLE; + add_wait_queue_exclusive(&sem->wait, &wait); + + spin_lock_irq(&semaphore_lock); + sem->sleepers ++; + for (;;) { + int sleepers = sem->sleepers; + + /* + * With signals pending, this turns into + * the trylock failure case - we won't be + * sleeping, and we* can't get the lock as + * it has contention. Just correct the count + * and exit. + */ + if (signal_pending(current)) { + retval = -EINTR; + sem->sleepers = 0; + atomic_add(sleepers, &sem->count); + break; + } + + /* + * Add "everybody else" into it. They aren't + * playing, because we own the spinlock. The + * "-1" is because we're still hoping to get + * the lock. + */ + if (!atomic_add_negative(sleepers - 1, &sem->count)) { + sem->sleepers = 0; + break; + } + sem->sleepers = 1; /* us - see -1 above */ + spin_unlock_irq(&semaphore_lock); + + schedule(); + tsk->state = TASK_INTERRUPTIBLE; + spin_lock_irq(&semaphore_lock); + } + spin_unlock_irq(&semaphore_lock); + tsk->state = TASK_RUNNING; + remove_wait_queue(&sem->wait, &wait); + wake_up(&sem->wait); + return retval; +} + +/* + * Trylock failed - make sure we correct for + * having decremented the count. + */ +int __down_trylock(struct semaphore * sem) +{ + unsigned long flags; + int sleepers; + + spin_lock_irqsave(&semaphore_lock, flags); + sleepers = sem->sleepers + 1; + sem->sleepers = 0; + + /* + * Add "everybody else" and us into it. They aren't + * playing, because we own the spinlock. + */ + if (!atomic_add_negative(sleepers, &sem->count)) + wake_up(&sem->wait); + + spin_unlock_irqrestore(&semaphore_lock, flags); + return 1; +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/kernel/setup.c linux.2.5.40-ac2/arch/v850/kernel/setup.c --- linux.2.5.40/arch/v850/kernel/setup.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/kernel/setup.c 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,271 @@ +/* + * arch/v850/kernel/setup.c -- Arch-dependent initialization functions + * + * Copyright (C) 2001,02 NEC Corporation + * Copyright (C) 2001,02 Miles Bader + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file COPYING in the main directory of this + * archive for more details. + * + * Written by Miles Bader + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include "mach.h" + +/* These symbols are all defined in the linker map to delineate various + statically allocated regions of memory. */ + +extern char _intv_start, _intv_end; +/* `kram' is only used if the kernel uses part of normal user RAM. */ +extern char _kram_start __attribute__ ((__weak__)); +extern char _kram_end __attribute__ ((__weak__)); +extern char _init_start, _init_end; +extern char _bootmap; +extern char _stext, _etext, _sdata, _edata, _sbss, _ebss; +/* Many platforms use an embedded root image. */ +extern char _root_fs_image_start __attribute__ ((__weak__)); +extern char _root_fs_image_end __attribute__ ((__weak__)); + + +char command_line[512]; +char saved_command_line[512]; + +/* Memory not used by the kernel. */ +static unsigned long total_ram_pages; + +/* System RAM. */ +static unsigned long ram_start = 0, ram_len = 0; + + +#define ADDR_TO_PAGE_UP(x) ((((unsigned long)x) + PAGE_SIZE-1) >> PAGE_SHIFT) +#define ADDR_TO_PAGE(x) (((unsigned long)x) >> PAGE_SHIFT) +#define PAGE_TO_ADDR(x) (((unsigned long)x) << PAGE_SHIFT) + +static void init_mem_alloc (unsigned long ram_start, unsigned long ram_len); + +void set_mem_root (void *addr, size_t len, char *cmd_line); + + +void __init setup_arch (char **cmdline) +{ + /* Keep a copy of command line */ + *cmdline = command_line; + memcpy (saved_command_line, command_line, sizeof saved_command_line); + saved_command_line[sizeof saved_command_line - 1] = '\0'; + + console_verbose (); + + init_mm.start_code = (unsigned long) &_stext; + init_mm.end_code = (unsigned long) &_etext; + init_mm.end_data = (unsigned long) &_edata; + init_mm.brk = (unsigned long) &_kram_end; + + /* Find out what mem this machine has. */ + mach_get_physical_ram (&ram_start, &ram_len); + /* ... and tell the kernel about it. */ + init_mem_alloc (ram_start, ram_len); + + /* do machine-specific setups. */ + mach_setup (cmdline); + +#ifdef CONFIG_MTD + if (!ROOT_DEV && &_root_fs_image_end > &_root_fs_image_start) + set_mem_root (&_root_fs_image_start, + &_root_fs_image_end - &_root_fs_image_start, + *cmdline); +#endif +} + +void __init trap_init (void) +{ +} + +#ifdef CONFIG_MTD +/* Set the root filesystem to be the given memory region. + Some parameter may be appended to CMD_LINE. */ +void set_mem_root (void *addr, size_t len, char *cmd_line) +{ + /* The only way to pass info to the MTD slram driver is via + the command line. */ + if (*cmd_line) { + cmd_line += strlen (cmd_line); + *cmd_line++ = ' '; + } + sprintf (cmd_line, "slram=root,0x%x,+0x%x", (u32)addr, (u32)len); + + ROOT_DEV = MKDEV (MTD_BLOCK_MAJOR, 0); +} +#endif + + +static void irq_nop (unsigned irq) { } +static unsigned irq_zero (unsigned irq) { return 0; } + +static void nmi_end (unsigned irq) +{ + if (irq != IRQ_NMI (0)) { + printk (KERN_CRIT "NMI %d is unrecoverable; restarting...", + irq - IRQ_NMI (0)); + machine_restart (0); + } +} + +static struct hw_interrupt_type nmi_irq_type = { + "NMI", + irq_zero, /* startup */ + irq_nop, /* shutdown */ + irq_nop, /* enable */ + irq_nop, /* disable */ + irq_nop, /* ack */ + nmi_end, /* end */ +}; + +void __init init_IRQ (void) +{ + init_irq_handlers (0, NUM_MACH_IRQS, 0); + init_irq_handlers (IRQ_NMI (0), NUM_NMIS, &nmi_irq_type); + mach_init_irqs (); +} + + +void __init mem_init (void) +{ + max_mapnr = MAP_NR (ram_start + ram_len); + + num_physpages = ADDR_TO_PAGE (ram_len); + + total_ram_pages = free_all_bootmem (); + + printk (KERN_INFO + "Memory: %luK/%luK available" + " (%luK kernel code, %luK data)\n", + PAGE_TO_ADDR (nr_free_pages()) / 1024, + ram_len / 1024, + ((unsigned long)&_etext - (unsigned long)&_stext) / 1024, + ((unsigned long)&_ebss - (unsigned long)&_sdata) / 1024); +} + +void free_initmem (void) +{ + unsigned long ram_end = ram_start + ram_len; + unsigned long start = PAGE_ALIGN ((unsigned long)(&_init_start)); + + if (start >= ram_start && start < ram_end) { + unsigned long addr; + unsigned long end = PAGE_ALIGN ((unsigned long)(&_init_end)); + + if (end > ram_end) + end = ram_end; + + printk("Freeing unused kernel memory: %ldK freed\n", + (end - start) / 1024); + + for (addr = start; addr < end; addr += PAGE_SIZE) { + struct page *page = virt_to_page (addr); + ClearPageReserved (page); + set_page_count (page, 1); + __free_page (page); + total_ram_pages++; + } + } +} + + +/* Initialize the `bootmem allocator'. RAM_START and RAM_LEN identify + what RAM may be used. */ +static void __init +init_bootmem_alloc (unsigned long ram_start, unsigned long ram_len) +{ + /* The part of the kernel that's in the same managed RAM space + used for general allocation. */ + unsigned long kram_start = (unsigned long)&_kram_start; + unsigned long kram_end = (unsigned long)&_kram_end; + /* End of the managed RAM space. */ + unsigned long ram_end = ram_start + ram_len; + /* Address range of the interrupt vector table. */ + unsigned long intv_start = (unsigned long)&_intv_start; + unsigned long intv_end = (unsigned long)&_intv_end; + /* True if the interrupt vectors are in the managed RAM area. */ + int intv_in_ram = (intv_end > ram_start && intv_start < ram_end); + /* True if the interrupt vectors are inside the kernel's RAM. */ + int intv_in_kram = (intv_end > kram_start && intv_start < kram_end); + /* A pointer to an optional function that reserves platform-specific + memory regions. We declare the pointer `volatile' to avoid gcc + turning the call into a static call (the problem is that since + it's a weak symbol, a static call may end up trying to reference + the location 0x0, which is not always reachable). */ + void (*volatile mrb) (void) = mach_reserve_bootmem; + /* The bootmem allocator's allocation bitmap. */ + unsigned long bootmap = (unsigned long)&_bootmap; + unsigned long bootmap_len; + + /* Round bootmap location up to next page. */ + bootmap = PAGE_TO_ADDR (ADDR_TO_PAGE_UP (bootmap)); + + /* Initialize bootmem allocator. */ + bootmap_len = init_bootmem_node (NODE_DATA (0), + ADDR_TO_PAGE (bootmap), + ADDR_TO_PAGE (PAGE_OFFSET), + ADDR_TO_PAGE (ram_end)); + + /* Now make the RAM actually allocatable (it starts out `reserved'). */ + free_bootmem (ram_start, ram_len); + + if (kram_end > kram_start) + /* Reserve the RAM part of the kernel's address space, so it + doesn't get allocated. */ + reserve_bootmem (kram_start, kram_end - kram_start); + + if (intv_in_ram && !intv_in_kram) + /* Reserve the interrupt vector space. */ + reserve_bootmem (intv_start, intv_end - intv_start); + + if (bootmap >= ram_start && bootmap < ram_end) + /* Reserve the bootmap space. */ + reserve_bootmem (bootmap, bootmap_len); + + /* Reserve the memory used by the root filesystem image if it's + in RAM. */ + if (&_root_fs_image_end > &_root_fs_image_start + && (unsigned long)&_root_fs_image_start >= ram_start + && (unsigned long)&_root_fs_image_start < ram_end) + reserve_bootmem ((unsigned long)&_root_fs_image_start, + &_root_fs_image_end - &_root_fs_image_start); + + /* Let the platform-dependent code reserve some too. */ + if (mrb) + (*mrb) (); +} + +/* Tell the kernel about what RAM it may use for memory allocation. */ +static void __init +init_mem_alloc (unsigned long ram_start, unsigned long ram_len) +{ + unsigned i; + unsigned long zones_size[MAX_NR_ZONES]; + + init_bootmem_alloc (ram_start, ram_len); + + for (i = 0; i < MAX_NR_ZONES; i++) + zones_size[i] = 0; + + /* We stuff all the memory into one area, which includes the + initial gap from PAGE_OFFSET to ram_start. */ + zones_size[ZONE_DMA] + = ADDR_TO_PAGE (ram_len + (ram_start - PAGE_OFFSET)); + + free_area_init_node (0,0,0, zones_size, ADDR_TO_PAGE (PAGE_OFFSET), 0); +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/kernel/signal.c linux.2.5.40-ac2/arch/v850/kernel/signal.c --- linux.2.5.40/arch/v850/kernel/signal.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/kernel/signal.c 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,523 @@ +/* + * arch/v850/kernel/signal.c -- Signal handling + * + * Copyright (C) 2001,02 NEC Corporation + * Copyright (C) 2001,02 Miles Bader + * Copyright (C) 1999,2000,2002 Niibe Yutaka & Kaz Kojima + * Copyright (C) 1991,1992 Linus Torvalds + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file COPYING in the main directory of this + * archive for more details. + * + * 1997-11-28 Modified for POSIX.1b signals by Richard Henderson + * + * This file was derived from the sh version, arch/sh/kernel/signal.c + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#define DEBUG_SIG 0 + +#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP))) + +asmlinkage int do_signal(struct pt_regs *regs, sigset_t *oldset); + +/* + * Atomically swap in the new signal mask, and wait for a signal. + */ +asmlinkage int +sys_sigsuspend(old_sigset_t mask, struct pt_regs *regs) +{ + sigset_t saveset; + + mask &= _BLOCKABLE; + spin_lock_irq(¤t->sigmask_lock); + saveset = current->blocked; + siginitset(¤t->blocked, mask); + recalc_sigpending(); + spin_unlock_irq(¤t->sigmask_lock); + + regs->gpr[GPR_RVAL] = -EINTR; + while (1) { + current->state = TASK_INTERRUPTIBLE; + schedule(); + if (do_signal(regs, &saveset)) + return -EINTR; + } +} + +asmlinkage int +sys_rt_sigsuspend(sigset_t *unewset, size_t sigsetsize, + struct pt_regs *regs) +{ + sigset_t saveset, newset; + + /* XXX: Don't preclude handling different sized sigset_t's. */ + if (sigsetsize != sizeof(sigset_t)) + return -EINVAL; + + if (copy_from_user(&newset, unewset, sizeof(newset))) + return -EFAULT; + sigdelsetmask(&newset, ~_BLOCKABLE); + spin_lock_irq(¤t->sigmask_lock); + saveset = current->blocked; + current->blocked = newset; + recalc_sigpending(); + spin_unlock_irq(¤t->sigmask_lock); + + regs->gpr[GPR_RVAL] = -EINTR; + while (1) { + current->state = TASK_INTERRUPTIBLE; + schedule(); + if (do_signal(regs, &saveset)) + return -EINTR; + } +} + +asmlinkage int +sys_sigaction(int sig, const struct old_sigaction *act, + struct old_sigaction *oact) +{ + struct k_sigaction new_ka, old_ka; + int ret; + + if (act) { + old_sigset_t mask; + if (verify_area(VERIFY_READ, act, sizeof(*act)) || + __get_user(new_ka.sa.sa_handler, &act->sa_handler) || + __get_user(new_ka.sa.sa_restorer, &act->sa_restorer)) + return -EFAULT; + __get_user(new_ka.sa.sa_flags, &act->sa_flags); + __get_user(mask, &act->sa_mask); + siginitset(&new_ka.sa.sa_mask, mask); + } + + ret = do_sigaction(sig, act ? &new_ka : NULL, oact ? &old_ka : NULL); + + if (!ret && oact) { + if (verify_area(VERIFY_WRITE, oact, sizeof(*oact)) || + __put_user(old_ka.sa.sa_handler, &oact->sa_handler) || + __put_user(old_ka.sa.sa_restorer, &oact->sa_restorer)) + return -EFAULT; + __put_user(old_ka.sa.sa_flags, &oact->sa_flags); + __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask); + } + + return ret; +} + +asmlinkage int +sys_sigaltstack(const stack_t *uss, stack_t *uoss, + struct pt_regs *regs) +{ + return do_sigaltstack(uss, uoss, regs->gpr[GPR_SP]); +} + + +/* + * Do a signal return; undo the signal stack. + */ + +struct sigframe +{ + struct sigcontext sc; + unsigned long extramask[_NSIG_WORDS-1]; + unsigned long tramp[2]; /* signal trampoline */ +}; + +struct rt_sigframe +{ + struct siginfo *pinfo; + void *puc; + struct siginfo info; + struct ucontext uc; + unsigned long tramp[2]; /* signal trampoline */ +}; + +static int +restore_sigcontext(struct pt_regs *regs, struct sigcontext *sc, int *rval_p) +{ + unsigned int err = 0; + +#define COPY(x) err |= __get_user(regs->x, &sc->regs.x) + COPY(gpr[0]); COPY(gpr[1]); COPY(gpr[2]); COPY(gpr[3]); + COPY(gpr[4]); COPY(gpr[5]); COPY(gpr[6]); COPY(gpr[7]); + COPY(gpr[8]); COPY(gpr[9]); COPY(gpr[10]); COPY(gpr[11]); + COPY(gpr[12]); COPY(gpr[13]); COPY(gpr[14]); COPY(gpr[15]); + COPY(gpr[16]); COPY(gpr[17]); COPY(gpr[18]); COPY(gpr[19]); + COPY(gpr[20]); COPY(gpr[21]); COPY(gpr[22]); COPY(gpr[23]); + COPY(gpr[24]); COPY(gpr[25]); COPY(gpr[26]); COPY(gpr[27]); + COPY(gpr[28]); COPY(gpr[29]); COPY(gpr[30]); COPY(gpr[31]); + COPY(pc); COPY(psw); + COPY(ctpc); COPY(ctpsw); COPY(ctbp); +#undef COPY + + return err; +} + +asmlinkage int sys_sigreturn(struct pt_regs *regs) +{ + struct sigframe *frame = (struct sigframe *)regs->gpr[GPR_SP]; + sigset_t set; + int rval; + + if (verify_area(VERIFY_READ, frame, sizeof(*frame))) + goto badframe; + + if (__get_user(set.sig[0], &frame->sc.oldmask) + || (_NSIG_WORDS > 1 + && __copy_from_user(&set.sig[1], &frame->extramask, + sizeof(frame->extramask)))) + goto badframe; + + sigdelsetmask(&set, ~_BLOCKABLE); + spin_lock_irq(¤t->sigmask_lock); + current->blocked = set; + recalc_sigpending(); + spin_unlock_irq(¤t->sigmask_lock); + + if (restore_sigcontext(regs, &frame->sc, &rval)) + goto badframe; + return rval; + +badframe: + force_sig(SIGSEGV, current); + return 0; +} + +asmlinkage int sys_rt_sigreturn(struct pt_regs *regs) +{ + struct rt_sigframe *frame = (struct rt_sigframe *)regs->gpr[GPR_SP]; + sigset_t set; + stack_t st; + int rval; + + if (verify_area(VERIFY_READ, frame, sizeof(*frame))) + goto badframe; + + if (__copy_from_user(&set, &frame->uc.uc_sigmask, sizeof(set))) + goto badframe; + + sigdelsetmask(&set, ~_BLOCKABLE); + spin_lock_irq(¤t->sigmask_lock); + current->blocked = set; + recalc_sigpending(); + spin_unlock_irq(¤t->sigmask_lock); + + if (restore_sigcontext(regs, &frame->uc.uc_mcontext, &rval)) + goto badframe; + + if (__copy_from_user(&st, &frame->uc.uc_stack, sizeof(st))) + goto badframe; + /* It is more difficult to avoid calling this function than to + call it and ignore errors. */ + do_sigaltstack(&st, NULL, regs->gpr[GPR_SP]); + + return rval; + +badframe: + force_sig(SIGSEGV, current); + return 0; +} + +/* + * Set up a signal frame. + */ + +static int +setup_sigcontext(struct sigcontext *sc, struct pt_regs *regs, + unsigned long mask) +{ + int err = 0; + +#define COPY(x) err |= __put_user(regs->x, &sc->regs.x) + COPY(gpr[0]); COPY(gpr[1]); COPY(gpr[2]); COPY(gpr[3]); + COPY(gpr[4]); COPY(gpr[5]); COPY(gpr[6]); COPY(gpr[7]); + COPY(gpr[8]); COPY(gpr[9]); COPY(gpr[10]); COPY(gpr[11]); + COPY(gpr[12]); COPY(gpr[13]); COPY(gpr[14]); COPY(gpr[15]); + COPY(gpr[16]); COPY(gpr[17]); COPY(gpr[18]); COPY(gpr[19]); + COPY(gpr[20]); COPY(gpr[21]); COPY(gpr[22]); COPY(gpr[23]); + COPY(gpr[24]); COPY(gpr[25]); COPY(gpr[26]); COPY(gpr[27]); + COPY(gpr[28]); COPY(gpr[29]); COPY(gpr[30]); COPY(gpr[31]); + COPY(pc); COPY(psw); + COPY(ctpc); COPY(ctpsw); COPY(ctbp); +#undef COPY + + err |= __put_user(mask, &sc->oldmask); + + return err; +} + +/* + * Determine which stack to use.. + */ +static inline void * +get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size) +{ + /* Default to using normal stack */ + unsigned long sp = regs->gpr[GPR_SP]; + + if ((ka->sa.sa_flags & SA_ONSTACK) != 0 && ! on_sig_stack(sp)) + sp = current->sas_ss_sp + current->sas_ss_size; + + return (void *)((sp - frame_size) & -8UL); +} + +static void setup_frame(int sig, struct k_sigaction *ka, + sigset_t *set, struct pt_regs *regs) +{ + struct sigframe *frame; + int err = 0; + int signal; + + frame = get_sigframe(ka, regs, sizeof(*frame)); + + if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame))) + goto give_sigsegv; + + signal = current_thread_info()->exec_domain + && current_thread_info()->exec_domain->signal_invmap + && sig < 32 + ? current_thread_info()->exec_domain->signal_invmap[sig] + : sig; + + err |= setup_sigcontext(&frame->sc, regs, set->sig[0]); + + if (_NSIG_WORDS > 1) { + err |= __copy_to_user(frame->extramask, &set->sig[1], + sizeof(frame->extramask)); + } + + /* Set up to return from userspace. If provided, use a stub + already in userspace. */ + if (ka->sa.sa_flags & SA_RESTORER) { + regs->gpr[GPR_LP] = (unsigned long) ka->sa.sa_restorer; + } else { + /* Note, these encodings are _little endian_! */ + + /* addi __NR_sigreturn, r0, r12 */ + err |= __put_user(0x6600 | (__NR_sigreturn << 16), + frame->tramp + 0); + /* trap 0 */ + err |= __put_user(0x010007e0, + frame->tramp + 1); + + regs->gpr[GPR_LP] = (unsigned long)frame->tramp; + + flush_cache_sigtramp (regs->gpr[GPR_LP]); + } + + if (err) + goto give_sigsegv; + + /* Set up registers for signal handler */ + regs->gpr[GPR_SP] = (unsigned long) frame; + regs->gpr[GPR_ARG0] = signal; /* Arg for signal handler */ + regs->pc = (unsigned long) ka->sa.sa_handler; + + set_fs(USER_DS); + +#if DEBUG_SIG + printk("SIG deliver (%s:%d): sp=%p pc=%08lx ra=%08lx\n", + current->comm, current->pid, frame, regs->pc, ); +#endif + + return; + +give_sigsegv: + if (sig == SIGSEGV) + ka->sa.sa_handler = SIG_DFL; + force_sig(SIGSEGV, current); +} + +static void setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, + sigset_t *set, struct pt_regs *regs) +{ + struct rt_sigframe *frame; + int err = 0; + int signal; + + frame = get_sigframe(ka, regs, sizeof(*frame)); + + if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame))) + goto give_sigsegv; + + signal = current_thread_info()->exec_domain + && current_thread_info()->exec_domain->signal_invmap + && sig < 32 + ? current_thread_info()->exec_domain->signal_invmap[sig] + : sig; + + err |= __put_user(&frame->info, &frame->pinfo); + err |= __put_user(&frame->uc, &frame->puc); + err |= copy_siginfo_to_user(&frame->info, info); + + /* Create the ucontext. */ + err |= __put_user(0, &frame->uc.uc_flags); + err |= __put_user(0, &frame->uc.uc_link); + err |= __put_user((void *)current->sas_ss_sp, + &frame->uc.uc_stack.ss_sp); + err |= __put_user(sas_ss_flags(regs->gpr[GPR_SP]), + &frame->uc.uc_stack.ss_flags); + err |= __put_user(current->sas_ss_size, &frame->uc.uc_stack.ss_size); + err |= setup_sigcontext(&frame->uc.uc_mcontext, + regs, set->sig[0]); + err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set)); + + /* Set up to return from userspace. If provided, use a stub + already in userspace. */ + if (ka->sa.sa_flags & SA_RESTORER) { + regs->gpr[GPR_LP] = (unsigned long) ka->sa.sa_restorer; + } else { + /* Note, these encodings are _little endian_! */ + + /* addi __NR_sigreturn, r0, r12 */ + err |= __put_user(0x6600 | (__NR_sigreturn << 16), + frame->tramp + 0); + /* trap 0 */ + err |= __put_user(0x010007e0, + frame->tramp + 1); + + regs->gpr[GPR_LP] = (unsigned long)frame->tramp; + + flush_cache_sigtramp (regs->gpr[GPR_LP]); + } + + if (err) + goto give_sigsegv; + + /* Set up registers for signal handler */ + regs->gpr[GPR_SP] = (unsigned long) frame; + regs->gpr[GPR_ARG0] = signal; /* Arg for signal handler */ + regs->pc = (unsigned long) ka->sa.sa_handler; + + set_fs(USER_DS); + +#if DEBUG_SIG + printk("SIG deliver (%s:%d): sp=%p pc=%08lx pr=%08lx\n", + current->comm, current->pid, frame, regs->pc, regs->pr); +#endif + + return; + +give_sigsegv: + if (sig == SIGSEGV) + ka->sa.sa_handler = SIG_DFL; + force_sig(SIGSEGV, current); +} + +/* + * OK, we're invoking a handler + */ + +static void +handle_signal(unsigned long sig, siginfo_t *info, sigset_t *oldset, + struct pt_regs * regs) +{ + struct k_sigaction *ka = ¤t->sig->action[sig-1]; + + /* Are we from a system call? */ + if (PT_REGS_SYSCALL (regs)) { + /* If so, check system call restarting.. */ + switch (regs->gpr[GPR_RVAL]) { + case -ERESTARTNOHAND: + regs->gpr[GPR_RVAL] = -EINTR; + break; + + case -ERESTARTSYS: + if (!(ka->sa.sa_flags & SA_RESTART)) { + regs->gpr[GPR_RVAL] = -EINTR; + break; + } + /* fallthrough */ + case -ERESTARTNOINTR: + regs->gpr[12] = PT_REGS_SYSCALL (regs); + regs->pc -= 4; /* Size of `trap 0' insn. */ + } + + PT_REGS_SET_SYSCALL (regs, 0); + } + + /* Set up the stack frame */ + if (ka->sa.sa_flags & SA_SIGINFO) + setup_rt_frame(sig, ka, info, oldset, regs); + else + setup_frame(sig, ka, oldset, regs); + + if (ka->sa.sa_flags & SA_ONESHOT) + ka->sa.sa_handler = SIG_DFL; + + if (!(ka->sa.sa_flags & SA_NODEFER)) { + spin_lock_irq(¤t->sigmask_lock); + sigorsets(¤t->blocked,¤t->blocked,&ka->sa.sa_mask); + sigaddset(¤t->blocked,sig); + recalc_sigpending(); + spin_unlock_irq(¤t->sigmask_lock); + } +} + +/* + * Note that 'init' is a special process: it doesn't get signals it doesn't + * want to handle. Thus you cannot kill init even with a SIGKILL even by + * mistake. + * + * Note that we go through the signals twice: once to check the signals that + * the kernel can handle, and then we build all the user-level signal handling + * stack-frames in one go after that. + */ +int do_signal(struct pt_regs *regs, sigset_t *oldset) +{ + siginfo_t info; + int signr; + + /* + * We want the common case to go fast, which + * is why we may in certain cases get here from + * kernel mode. Just return without doing anything + * if so. + */ + if (!user_mode(regs)) + return 1; + + if (!oldset) + oldset = ¤t->blocked; + + signr = get_signal_to_deliver(&info, regs); + if (signr > 0) { + /* Whee! Actually deliver the signal. */ + handle_signal(signr, &info, oldset, regs); + return 1; + } + + /* Did we come from a system call? */ + if (PT_REGS_SYSCALL (regs)) { + /* Restart the system call - no handlers present */ + if (regs->gpr[GPR_RVAL] == -ERESTARTNOHAND || + regs->gpr[GPR_RVAL] == -ERESTARTSYS || + regs->gpr[GPR_RVAL] == -ERESTARTNOINTR) { + regs->gpr[12] = PT_REGS_SYSCALL (regs); + regs->pc -= 4; /* Size of `trap 0' insn. */ + } + } + return 0; +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/kernel/sim85e2c.c linux.2.5.40-ac2/arch/v850/kernel/sim85e2c.c --- linux.2.5.40/arch/v850/kernel/sim85e2c.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/kernel/sim85e2c.c 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,149 @@ +/* + * arch/v850/kernel/sim85e2c.c -- Machine-specific stuff for + * V850E2 RTL simulator + * + * Copyright (C) 2002 NEC Corporation + * Copyright (C) 2002 Miles Bader + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file COPYING in the main directory of this + * archive for more details. + * + * Written by Miles Bader + */ + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "mach.h" + +extern void memcons_setup (void); + + +void __init mach_early_init (void) +{ + extern int panic_timeout; + + /* Don't stop the simulator at `halt' instructions. */ + NOTHAL = 1; + + /* The sim85e2c simulator tracks `undefined' values, so to make + debugging easier, we begin by zeroing out all otherwise + undefined registers. This is not strictly necessary. + + The registers we zero are: + Every GPR except: + stack-pointer (r3) + task-pointer (r16) + our return addr (r31) + Every system register (SPR) that we know about except for + the PSW (SPR 5), which we zero except for the + disable-interrupts bit. + */ + + /* GPRs */ + asm volatile (" mov r0, r1 ; mov r0, r2 "); + asm volatile ("mov r0, r4 ; mov r0, r5 ; mov r0, r6 ; mov r0, r7 "); + asm volatile ("mov r0, r8 ; mov r0, r9 ; mov r0, r10; mov r0, r11"); + asm volatile ("mov r0, r12; mov r0, r13; mov r0, r14; mov r0, r15"); + asm volatile (" mov r0, r17; mov r0, r18; mov r0, r19"); + asm volatile ("mov r0, r20; mov r0, r21; mov r0, r22; mov r0, r23"); + asm volatile ("mov r0, r24; mov r0, r25; mov r0, r26; mov r0, r27"); + asm volatile ("mov r0, r28; mov r0, r29; mov r0, r30"); + + /* SPRs */ + asm volatile ("ldsr r0, 0; ldsr r0, 1; ldsr r0, 2; ldsr r0, 3"); + asm volatile ("ldsr r0, 4"); + asm volatile ("addi 0x20, r0, r1; ldsr r1, 5"); /* PSW */ + asm volatile ("ldsr r0, 16; ldsr r0, 17; ldsr r0, 18; ldsr r0, 19"); + asm volatile ("ldsr r0, 20"); + + /* Turn on the caches. */ + NA85E2C_CACHE_BTSC + |= (NA85E2C_CACHE_BTSC_ICM | NA85E2C_CACHE_BTSC_DCM0); + NA85E2C_BUSM_BHC = 0xFFFF; + + /* Ensure that the simulator halts on a panic, instead of going + into an infinite loop inside the panic function. */ + panic_timeout = -1; +} + +void __init mach_setup (char **cmdline) +{ + printk (KERN_INFO "CPU: NEC V850E2 (sim85e2c simulator)\n"); + + memcons_setup (); +} + +void mach_get_physical_ram (unsigned long *ram_start, unsigned long *ram_len) +{ + /* There are 3 possible areas we can use: + IRAM (1MB) is fast for instruction fetches, but slow for data + DRAM (1020KB) is fast for data, but slow for instructions + ERAM is cached, so should be fast for both insns and data, + _but_ currently only supports write-through caching, so + writes are slow. + Since there's really no area that's good for general kernel + use, we use DRAM -- it won't be good for user programs + (which will be loaded into kernel allocated memory), but + currently we're more concerned with testing the kernel. */ + *ram_start = DRAM_ADDR; + *ram_len = R0_RAM_ADDR - DRAM_ADDR; +} + +void __init mach_sched_init (struct irqaction *timer_action) +{ + /* The simulator actually cycles through all interrupts + periodically. We just pay attention to IRQ0, which gives us + 1/64 the rate of the periodic interrupts. */ + setup_irq (0, timer_action); +} + +void mach_gettimeofday (struct timeval *tv) +{ + tv->tv_sec = 0; + tv->tv_usec = 0; +} + +/* Interrupts */ + +struct nb85e_intc_irq_init irq_inits[] = { + { "IRQ", 0, NUM_MACH_IRQS, 7 }, + { 0 } +}; +#define NUM_IRQ_INITS ((sizeof irq_inits / sizeof irq_inits[0]) - 1) + +struct hw_interrupt_type hw_itypes[NUM_IRQ_INITS]; + +/* Initialize interrupts. */ +void __init mach_init_irqs (void) +{ + nb85e_intc_init_irq_types (irq_inits, hw_itypes); +} + + +void machine_halt (void) __attribute__ ((noreturn)); +void machine_halt (void) +{ + SIMFIN = 0; /* Halt immediately. */ + for (;;) {} +} + +void machine_restart (char *__unused) +{ + machine_halt (); +} + +void machine_power_off (void) +{ + machine_halt (); +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/kernel/sim.c linux.2.5.40-ac2/arch/v850/kernel/sim.c --- linux.2.5.40/arch/v850/kernel/sim.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/kernel/sim.c 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,174 @@ +/* + * arch/v850/kernel/sim.c -- Machine-specific stuff for GDB v850e simulator + * + * Copyright (C) 2001,02 NEC Corporation + * Copyright (C) 2001,02 Miles Bader + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file COPYING in the main directory of this + * archive for more details. + * + * Written by Miles Bader + */ + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "mach.h" + +/* The name of a file containing the root filesystem. */ +#define ROOT_FS "root.image" + +extern void simcons_setup (void); +extern void simcons_poll_ttys (void); +extern void set_mem_root (void *addr, size_t len, char *cmd_line); + +static int read_file (const char *name, + unsigned long *addr, unsigned long *len, + const char **err); + +void __init mach_setup (char **cmdline) +{ + const char *err; + unsigned long root_dev_addr, root_dev_len; + + printk (KERN_INFO "CPU: NEC V850E (GDB simulator)\n"); + + simcons_setup (); + + printk (KERN_INFO "Reading root filesystem: %s", ROOT_FS); + + if (read_file (ROOT_FS, &root_dev_addr, &root_dev_len, &err)) { + printk (" (size %luK)\n", root_dev_len / 1024); + set_mem_root ((void *)root_dev_addr, (size_t)root_dev_len, + *cmdline); + } else + printk ("...%s failed!\n", err); +} + +void mach_get_physical_ram (unsigned long *ram_start, unsigned long *ram_len) +{ + *ram_start = RAM_ADDR; + *ram_len = RAM_SIZE; +} + +void __init mach_sched_init (struct irqaction *timer_action) +{ + /* ...do magic timer initialization?... */ + mach_tick = simcons_poll_ttys; + setup_irq (0, timer_action); +} + + +static void irq_nop (unsigned irq) { } +static unsigned irq_zero (unsigned irq) { return 0; } + +static struct hw_interrupt_type sim_irq_type = { + "IRQ", + irq_zero, /* startup */ + irq_nop, /* shutdown */ + irq_nop, /* enable */ + irq_nop, /* disable */ + irq_nop, /* ack */ + irq_nop, /* end */ +}; + +void __init mach_init_irqs (void) +{ + init_irq_handlers (0, NUM_MACH_IRQS, &sim_irq_type); +} + + +void mach_gettimeofday (struct timeval *tv) +{ + long timeval[2], timezone[2]; + int rval = V850_SIM_SYSCALL (gettimeofday, timeval, timezone); + if (rval == 0) { + tv->tv_sec = timeval[0]; + tv->tv_usec = timeval[1]; + } +} + +void machine_restart (char *__unused) +{ + V850_SIM_SYSCALL (write, 1, "RESTART\n", 8); + V850_SIM_SYSCALL (exit, 0); +} + +void machine_halt (void) +{ + V850_SIM_SYSCALL (write, 1, "HALT\n", 5); + V850_SIM_SYSCALL (exit, 0); +} + +void machine_power_off (void) +{ + V850_SIM_SYSCALL (write, 1, "POWER OFF\n", 10); + V850_SIM_SYSCALL (exit, 0); +} + + +/* Load data from a file called NAME into ram. The address and length + of the data image are returned in ADDR and LEN. */ +static int __init +read_file (const char *name, + unsigned long *addr, unsigned long *len, + const char **err) +{ + int rval, fd; + unsigned long cur, left; + /* Note this is not a normal stat buffer, it's an ad-hoc + structure defined by the simulator. */ + unsigned long stat_buf[10]; + + /* Stat the file to find out the length. */ + rval = V850_SIM_SYSCALL (stat, name, stat_buf); + if (rval < 0) { + if (err) *err = "stat"; + return 0; + } + *len = stat_buf[4]; + + /* Open the file; `0' is O_RDONLY. */ + fd = V850_SIM_SYSCALL (open, name, 0); + if (fd < 0) { + if (err) *err = "open"; + return 0; + } + + *addr = (unsigned long)alloc_bootmem(*len); + if (! *addr) { + V850_SIM_SYSCALL (close, fd); + if (err) *err = "alloc_bootmem"; + return 0; + } + + cur = *addr; + left = *len; + while (left > 0) { + int chunk = V850_SIM_SYSCALL (read, fd, cur, left); + if (chunk <= 0) + break; + cur += chunk; + left -= chunk; + } + V850_SIM_SYSCALL (close, fd); + if (left > 0) { + /* Some read failed. */ + free_bootmem (*addr, *len); + if (err) *err = "read"; + return 0; + } + + return 1; +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/kernel/simcons.c linux.2.5.40-ac2/arch/v850/kernel/simcons.c --- linux.2.5.40/arch/v850/kernel/simcons.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/kernel/simcons.c 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,158 @@ +/* + * arch/v850/kernel/simcons.c -- Console I/O for GDB v850e simulator + * + * Copyright (C) 2001,02 NEC Corporation + * Copyright (C) 2001,02 Miles Bader + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file COPYING in the main directory of this + * archive for more details. + * + * Written by Miles Bader + */ + +#include +#include +#include +#include +#include +#include + +#include +#include + + +/* Low-level console. */ + +static void simcons_write (struct console *co, const char *buf, unsigned len) +{ + V850_SIM_SYSCALL (write, 1, buf, len); +} + +static int simcons_read (struct console *co, const char *buf, unsigned len) +{ + return V850_SIM_SYSCALL (read, 0, buf, len); +} + +static kdev_t simcons_device (struct console *c) +{ + return mk_kdev (TTY_MAJOR, 64 + c->index); +} + +static struct console simcons = +{ + .name = "simcons", + .write = simcons_write, + .read = simcons_read, + .device = simcons_device, + .flags = CON_PRINTBUFFER, + .index = -1, +}; + +/* Higher level TTY interface. */ + +static struct tty_struct *tty_table[1] = { 0 }; +static struct termios *tty_termios[1] = { 0 }; +static struct termios *tty_termios_locked[1] = { 0 }; +static struct tty_driver tty_driver = { 0 }; +static int tty_refcount = 0; + +int simcons_tty_open (struct tty_struct *tty, struct file *filp) +{ + return 0; +} + +int simcons_tty_write (struct tty_struct *tty, int from_user, + const unsigned char *buf, int count) +{ + return V850_SIM_SYSCALL (write, 1, buf, count); +} + +int simcons_tty_write_room (struct tty_struct *tty) +{ + /* Completely arbitrary. */ + return 0x100000; +} + +int simcons_tty_chars_in_buffer (struct tty_struct *tty) +{ + /* We have no buffer. */ + return 0; +} + +int __init simcons_tty_init (void) +{ + tty_driver.name = "simcons"; + tty_driver.major = TTY_MAJOR; + tty_driver.minor_start = 64; + tty_driver.num = 1; + tty_driver.type = TTY_DRIVER_TYPE_SYSCONS; + + tty_driver.refcount = &tty_refcount; + + tty_driver.table = tty_table; + tty_driver.termios = tty_termios; + tty_driver.termios_locked = tty_termios_locked; + + tty_driver.init_termios = tty_std_termios; + + tty_driver.open = simcons_tty_open; + tty_driver.write = simcons_tty_write; + tty_driver.write_room = simcons_tty_write_room; + tty_driver.chars_in_buffer = simcons_tty_chars_in_buffer; + + tty_register_driver (&tty_driver); +} +__initcall (simcons_tty_init); + +/* Poll for input on the console, and if there's any, deliver it to the + tty driver. */ +void simcons_poll_tty (struct tty_struct *tty) +{ + int flip = 0, send_break = 0; + struct pollfd pfd; + pfd.fd = 0; + pfd.events = POLLIN; + + if (V850_SIM_SYSCALL (poll, &pfd, 1, 0) > 0) { + if (pfd.revents & POLLIN) { + int left = TTY_FLIPBUF_SIZE - tty->flip.count; + + if (left > 0) { + unsigned char *buf = tty->flip.char_buf_ptr; + int rd = V850_SIM_SYSCALL (read, 0, buf, left); + + if (rd > 0) { + tty->flip.count += rd; + tty->flip.char_buf_ptr += rd; + memset (tty->flip.flag_buf_ptr, 0, rd); + tty->flip.flag_buf_ptr += rd; + flip = 1; + } else + send_break = 1; + } + } else if (pfd.revents & POLLERR) + send_break = 1; + } + + if (send_break) { + tty_insert_flip_char (tty, 0, TTY_BREAK); + flip = 1; + } + + if (flip) + tty_schedule_flip (tty); +} + +void simcons_poll_ttys (void) +{ + if (tty_table[0]) + simcons_poll_tty (tty_table[0]); +} + +void simcons_setup (void) +{ + V850_SIM_SYSCALL (make_raw, 0); + register_console (&simcons); + printk (KERN_INFO "Console: GDB/v850e simulator stdio\n"); +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/kernel/syscalls.c linux.2.5.40-ac2/arch/v850/kernel/syscalls.c --- linux.2.5.40/arch/v850/kernel/syscalls.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/kernel/syscalls.c 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,197 @@ +/* + * arch/v850/kernel/syscalls.c -- Various system-call definitions not + * defined in machine-independent code + * + * Copyright (C) 2001,02 NEC Corporation + * Copyright (C) 2001,02 Miles Bader + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file COPYING in the main directory of this + * archive for more details. + * + * This file was derived the ppc version, arch/ppc/kernel/syscalls.c + * ... which was derived from "arch/i386/kernel/sys_i386.c" by Gary Thomas; + * modified by Cort Dougan (cort@cs.nmt.edu) + * and Paul Mackerras (paulus@cs.anu.edu.au). + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +/* + * sys_ipc() is the de-multiplexer for the SysV IPC calls.. + * + * This is really horribly ugly. + */ +int +sys_ipc (uint call, int first, int second, int third, void *ptr, long fifth) +{ + int version, ret; + + version = call >> 16; /* hack for backward compatibility */ + call &= 0xffff; + + ret = -EINVAL; + switch (call) { + case SEMOP: + ret = sys_semop (first, (struct sembuf *)ptr, second); + break; + case SEMGET: + ret = sys_semget (first, second, third); + break; + case SEMCTL: + { + union semun fourth; + + if (!ptr) + break; + if ((ret = verify_area (VERIFY_READ, ptr, sizeof(long))) + || (ret = get_user(fourth.__pad, (void **)ptr))) + break; + ret = sys_semctl (first, second, third, fourth); + break; + } + case MSGSND: + ret = sys_msgsnd (first, (struct msgbuf *) ptr, second, third); + break; + case MSGRCV: + switch (version) { + case 0: { + struct ipc_kludge tmp; + + if (!ptr) + break; + if ((ret = verify_area (VERIFY_READ, ptr, sizeof(tmp))) + || (ret = copy_from_user(&tmp, + (struct ipc_kludge *) ptr, + sizeof (tmp)))) + break; + ret = sys_msgrcv (first, tmp.msgp, second, tmp.msgtyp, + third); + break; + } + default: + ret = sys_msgrcv (first, (struct msgbuf *) ptr, + second, fifth, third); + break; + } + break; + case MSGGET: + ret = sys_msgget ((key_t) first, second); + break; + case MSGCTL: + ret = sys_msgctl (first, second, (struct msqid_ds *) ptr); + break; + case SHMAT: + switch (version) { + default: { + ulong raddr; + + if ((ret = verify_area(VERIFY_WRITE, (ulong*) third, + sizeof(ulong)))) + break; + ret = sys_shmat (first, (char *) ptr, second, &raddr); + if (ret) + break; + ret = put_user (raddr, (ulong *) third); + break; + } + case 1: /* iBCS2 emulator entry point */ + if (!segment_eq(get_fs(), get_ds())) + break; + ret = sys_shmat (first, (char *) ptr, second, + (ulong *) third); + break; + } + break; + case SHMDT: + ret = sys_shmdt ((char *)ptr); + break; + case SHMGET: + ret = sys_shmget (first, second, third); + break; + case SHMCTL: + ret = sys_shmctl (first, second, (struct shmid_ds *) ptr); + break; + } + + return ret; +} + +/* + * sys_pipe() is the normal C calling standard for creating + * a pipe. It's not the way unix traditionally does this, though. + */ +int sys_pipe (int *fildes) +{ + int fd[2]; + int error; + + error = do_pipe (fd); + if (!error) { + if (copy_to_user (fildes, fd, 2*sizeof (int))) + error = -EFAULT; + } + return error; +} + +static inline unsigned long +do_mmap2 (unsigned long addr, size_t len, + unsigned long prot, unsigned long flags, + unsigned long fd, unsigned long pgoff) +{ + struct file * file = NULL; + int ret = -EBADF; + + flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE); + if (! (flags & MAP_ANONYMOUS)) { + if (!(file = fget (fd))) + goto out; + } + + down_write (¤t->mm->mmap_sem); + ret = do_mmap_pgoff (file, addr, len, prot, flags, pgoff); + up_write (¤t->mm->mmap_sem); + if (file) + fput (file); +out: + return ret; +} + +unsigned long sys_mmap2 (unsigned long addr, size_t len, + unsigned long prot, unsigned long flags, + unsigned long fd, unsigned long pgoff) +{ + return do_mmap2 (addr, len, prot, flags, fd, pgoff); +} + +unsigned long sys_mmap (unsigned long addr, size_t len, + unsigned long prot, unsigned long flags, + unsigned long fd, off_t offset) +{ + int err = -EINVAL; + + if (offset & ~PAGE_MASK) + goto out; + + err = do_mmap2 (addr, len, prot, flags, fd, offset >> PAGE_SHIFT); +out: + return err; +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/kernel/time.c linux.2.5.40-ac2/arch/v850/kernel/time.c --- linux.2.5.40/arch/v850/kernel/time.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/kernel/time.c 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,193 @@ +/* + * linux/arch/v850/kernel/time.c -- Arch-dependent timer functions + * + * Copyright (C) 1991, 1992, 1995, 2001, 2002 Linus Torvalds + * + * This file contains the v850-specific time handling details. + * Most of the stuff is located in the machine specific files. + * + * 1997-09-10 Updated NTP code according to technical memorandum Jan '96 + * "A Kernel Model for Precision Timekeeping" by Dave Mills + */ + +#include /* CONFIG_HEARTBEAT */ +#include +#include +#include +#include +#include +#include +#include + +#include + +#include + +#include "mach.h" + +u64 jiffies_64; + +#define TICK_SIZE (tick_nsec / 1000) + +static inline void do_profile (unsigned long pc) +{ + if (prof_buffer && current->pid) { + extern int _stext; + pc -= (unsigned long) &_stext; + pc >>= prof_shift; + if (pc < prof_len) + ++prof_buffer[pc]; + else + /* + * Don't ignore out-of-bounds PC values silently, + * put them into the last histogram slot, so if + * present, they will show up as a sharp peak. + */ + ++prof_buffer[prof_len-1]; + } +} + +/* + * timer_interrupt() needs to keep up the real-time clock, + * as well as call the "do_timer()" routine every clocktick + */ +static void timer_interrupt (int irq, void *dummy, struct pt_regs *regs) +{ +#if 0 + /* last time the cmos clock got updated */ + static long last_rtc_update=0; +#endif + + /* may need to kick the hardware timer */ + if (mach_tick) + mach_tick (); + + do_timer (regs); + + if (! user_mode (regs)) + do_profile (regs->pc); + +#if 0 + /* + * If we have an externally synchronized Linux clock, then update + * CMOS clock accordingly every ~11 minutes. Set_rtc_mmss() has to be + * called as close as possible to 500 ms before the new second starts. + */ + if ((time_status & STA_UNSYNC) == 0 && + xtime.tv_sec > last_rtc_update + 660 && + (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 && + (xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) { + if (set_rtc_mmss (xtime.tv_sec) == 0) + last_rtc_update = xtime.tv_sec; + else + last_rtc_update = xtime.tv_sec - 600; /* do it again in 60 s */ + } +#ifdef CONFIG_HEARTBEAT + /* use power LED as a heartbeat instead -- much more useful + for debugging -- based on the version for PReP by Cort */ + /* acts like an actual heart beat -- ie thump-thump-pause... */ + if (mach_heartbeat) { + static unsigned cnt = 0, period = 0, dist = 0; + + if (cnt == 0 || cnt == dist) + mach_heartbeat ( 1 ); + else if (cnt == 7 || cnt == dist+7) + mach_heartbeat ( 0 ); + + if (++cnt > period) { + cnt = 0; + /* The hyperbolic function below modifies the heartbeat period + * length in dependency of the current (5min) load. It goes + * through the points f(0)=126, f(1)=86, f(5)=51, + * f(inf)->30. */ + period = ((672<= 1000000) { + usec -= 1000000; + sec++; + } + + tv->tv_sec = sec; + tv->tv_usec = usec; +} + +void do_settimeofday (struct timeval *tv) +{ + write_lock_irq (&xtime_lock); + + /* This is revolting. We need to set the xtime.tv_nsec + * correctly. However, the value in this location is + * is value at the last tick. + * Discover what correction gettimeofday + * would have done, and then undo it! + */ +#if 0 + tv->tv_usec -= mach_gettimeoffset (); +#endif + + while (tv->tv_usec < 0) { + tv->tv_usec += 1000000; + tv->tv_sec--; + } + + xtime.tv_sec = tv->tv_sec; + xtime.tv_nsec = tv->tv_usec * 1000; + + time_adjust = 0; /* stop active adjtime () */ + time_status |= STA_UNSYNC; + time_maxerror = NTP_PHASE_LIMIT; + time_esterror = NTP_PHASE_LIMIT; + + write_unlock_irq (&xtime_lock); +} + +static int timer_dev_id; +static struct irqaction timer_irqaction = { + timer_interrupt, + SA_INTERRUPT, + 0, + "timer", + &timer_dev_id, + NULL +}; + +void time_init (void) +{ + mach_gettimeofday (&xtime); + mach_sched_init (&timer_irqaction); +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/kernel/v850_defs.c linux.2.5.40-ac2/arch/v850/kernel/v850_defs.c --- linux.2.5.40/arch/v850/kernel/v850_defs.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/kernel/v850_defs.c 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,58 @@ +/* + * This program is used to generate definitions needed by + * assembly language modules. + * + * We use the technique used in the OSF Mach kernel code: + * generate asm statements containing #defines, + * compile this file to assembler, and then extract the + * #defines from the assembly-language output. + */ + +#include +#include +#include +#include +#include +#include + +#define DEFINE(sym, val) \ + asm volatile ("\n#define " #sym " %0" : : "i" (val)) + +int main (void) +{ + /* offsets into the task struct */ + DEFINE (TASK_STATE, offsetof (struct task_struct, state)); + DEFINE (TASK_FLAGS, offsetof (struct task_struct, flags)); + DEFINE (TASK_PTRACE, offsetof (struct task_struct, ptrace)); + DEFINE (TASK_BLOCKED, offsetof (struct task_struct, blocked)); + DEFINE (TASK_THREAD, offsetof (struct task_struct, thread)); + DEFINE (TASK_THREAD_INFO, offsetof (struct task_struct, thread_info)); + DEFINE (TASK_MM, offsetof (struct task_struct, mm)); + DEFINE (TASK_ACTIVE_MM, offsetof (struct task_struct, active_mm)); + DEFINE (TASK_PID, offsetof (struct task_struct, pid)); + + /* offsets into the kernel_stat struct */ + DEFINE (STAT_IRQ, offsetof (struct kernel_stat, irqs)); + + + /* signal defines */ + DEFINE (SIGSEGV, SIGSEGV); + DEFINE (SEGV_MAPERR, SEGV_MAPERR); + DEFINE (SIGTRAP, SIGTRAP); + DEFINE (SIGCHLD, SIGCHLD); + DEFINE (SIGILL, SIGILL); + DEFINE (TRAP_TRACE, TRAP_TRACE); + + /* ptrace flag bits */ + DEFINE (PT_PTRACED, PT_PTRACED); + DEFINE (PT_DTRACE, PT_DTRACE); + + /* error values */ + DEFINE (ENOSYS, ENOSYS); + + /* clone flag bits */ + DEFINE (CLONE_VFORK, CLONE_VFORK); + DEFINE (CLONE_VM, CLONE_VM); + + return 0; +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/kernel/v850_defs.head linux.2.5.40-ac2/arch/v850/kernel/v850_defs.head --- linux.2.5.40/arch/v850/kernel/v850_defs.head 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/kernel/v850_defs.head 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,5 @@ +/* + * WARNING! This file is automatically generated - DO NOT EDIT! + */ + +#define TS_MAGICKEY 0x5a5a5a5a diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/kernel/v850_ksyms.c linux.2.5.40-ac2/arch/v850/kernel/v850_ksyms.c --- linux.2.5.40/arch/v850/kernel/v850_ksyms.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/kernel/v850_ksyms.c 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,79 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +extern void *trap_table; +EXPORT_SYMBOL (trap_table); + +/* platform dependent support */ +extern void dump_thread (struct pt_regs *, struct user *); +EXPORT_SYMBOL (dump_thread); +EXPORT_SYMBOL (kernel_thread); +EXPORT_SYMBOL (__bug); + +/* Networking helper routines. */ +EXPORT_SYMBOL (csum_partial_copy); +EXPORT_SYMBOL (csum_partial_copy_from_user); +EXPORT_SYMBOL (ip_compute_csum); +EXPORT_SYMBOL (ip_fast_csum); + +/* string / mem functions */ +EXPORT_SYMBOL_NOVERS (strcpy); +EXPORT_SYMBOL_NOVERS (strncpy); +EXPORT_SYMBOL_NOVERS (strcat); +EXPORT_SYMBOL_NOVERS (strncat); +EXPORT_SYMBOL_NOVERS (strcmp); +EXPORT_SYMBOL_NOVERS (strncmp); +EXPORT_SYMBOL_NOVERS (strchr); +EXPORT_SYMBOL_NOVERS (strlen); +EXPORT_SYMBOL_NOVERS (strnlen); +EXPORT_SYMBOL_NOVERS (strpbrk); +EXPORT_SYMBOL_NOVERS (strtok); +EXPORT_SYMBOL_NOVERS (strrchr); +EXPORT_SYMBOL_NOVERS (strstr); +EXPORT_SYMBOL_NOVERS (memset); +EXPORT_SYMBOL_NOVERS (memcpy); +EXPORT_SYMBOL_NOVERS (memmove); +EXPORT_SYMBOL_NOVERS (memcmp); +EXPORT_SYMBOL_NOVERS (memscan); + +/* semaphores */ +EXPORT_SYMBOL_NOVERS (__down); +EXPORT_SYMBOL_NOVERS (__down_interruptible); +EXPORT_SYMBOL_NOVERS (__down_trylock); +EXPORT_SYMBOL_NOVERS (__up); + +/* + * libgcc functions - functions that are used internally by the + * compiler... (prototypes are not correct though, but that + * doesn't really matter since they're not versioned). + */ +extern void __ashldi3 (void); +extern void __ashrdi3 (void); +extern void __lshrdi3 (void); +extern void __muldi3 (void); +extern void __negdi2 (void); + +EXPORT_SYMBOL_NOVERS (__ashldi3); +EXPORT_SYMBOL_NOVERS (__ashrdi3); +EXPORT_SYMBOL_NOVERS (__lshrdi3); +EXPORT_SYMBOL_NOVERS (__muldi3); +EXPORT_SYMBOL_NOVERS (__negdi2); diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/lib/ashldi3.c linux.2.5.40-ac2/arch/v850/lib/ashldi3.c --- linux.2.5.40/arch/v850/lib/ashldi3.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/lib/ashldi3.c 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,62 @@ +/* ashldi3.c extracted from gcc-2.95.2/libgcc2.c which is: */ +/* Copyright (C) 1989, 92-98, 1999 Free Software Foundation, Inc. + +This file is part of GNU CC. + +GNU CC is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2, or (at your option) +any later version. + +GNU CC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with GNU CC; see the file COPYING. If not, write to +the Free Software Foundation, 59 Temple Place - Suite 330, +Boston, MA 02111-1307, USA. */ + +#define BITS_PER_UNIT 8 + +typedef int SItype __attribute__ ((mode (SI))); +typedef unsigned int USItype __attribute__ ((mode (SI))); +typedef int DItype __attribute__ ((mode (DI))); +typedef int word_type __attribute__ ((mode (__word__))); + +struct DIstruct {SItype high, low;}; + +typedef union +{ + struct DIstruct s; + DItype ll; +} DIunion; + +DItype +__ashldi3 (DItype u, word_type b) +{ + DIunion w; + word_type bm; + DIunion uu; + + if (b == 0) + return u; + + uu.ll = u; + + bm = (sizeof (SItype) * BITS_PER_UNIT) - b; + if (bm <= 0) + { + w.s.low = 0; + w.s.high = (USItype)uu.s.low << -bm; + } + else + { + USItype carries = (USItype)uu.s.low >> bm; + w.s.low = (USItype)uu.s.low << b; + w.s.high = ((USItype)uu.s.high << b) | carries; + } + + return w.ll; +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/lib/ashrdi3.c linux.2.5.40-ac2/arch/v850/lib/ashrdi3.c --- linux.2.5.40/arch/v850/lib/ashrdi3.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/lib/ashrdi3.c 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,63 @@ +/* ashrdi3.c extracted from gcc-2.7.2/libgcc2.c which is: */ +/* Copyright (C) 1989, 1992, 1993, 1994, 1995 Free Software Foundation, Inc. + +This file is part of GNU CC. + +GNU CC is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2, or (at your option) +any later version. + +GNU CC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with GNU CC; see the file COPYING. If not, write to +the Free Software Foundation, 59 Temple Place - Suite 330, +Boston, MA 02111-1307, USA. */ + +#define BITS_PER_UNIT 8 + +typedef int SItype __attribute__ ((mode (SI))); +typedef unsigned int USItype __attribute__ ((mode (SI))); +typedef int DItype __attribute__ ((mode (DI))); +typedef int word_type __attribute__ ((mode (__word__))); + +struct DIstruct {SItype high, low;}; + +typedef union +{ + struct DIstruct s; + DItype ll; +} DIunion; + +DItype +__ashrdi3 (DItype u, word_type b) +{ + DIunion w; + word_type bm; + DIunion uu; + + if (b == 0) + return u; + + uu.ll = u; + + bm = (sizeof (SItype) * BITS_PER_UNIT) - b; + if (bm <= 0) + { + /* w.s.high = 1..1 or 0..0 */ + w.s.high = uu.s.high >> (sizeof (SItype) * BITS_PER_UNIT - 1); + w.s.low = uu.s.high >> -bm; + } + else + { + USItype carries = (USItype)uu.s.high << bm; + w.s.high = uu.s.high >> b; + w.s.low = ((USItype)uu.s.low >> b) | carries; + } + + return w.ll; +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/lib/checksum.c linux.2.5.40-ac2/arch/v850/lib/checksum.c --- linux.2.5.40/arch/v850/lib/checksum.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/lib/checksum.c 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,151 @@ +/* + * INET An implementation of the TCP/IP protocol suite for the LINUX + * operating system. INET is implemented using the BSD Socket + * interface as the means of communication with the user level. + * + * MIPS specific IP/TCP/UDP checksumming routines + * + * Authors: Ralf Baechle, + * Lots of code moved from tcp.c and ip.c; see those files + * for more names. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + * + * $Id: checksum.c,v 1.1 2002/09/28 14:58:40 gerg Exp $ + */ +#include +#include +#include +#include +#include + +static inline unsigned short from32to16 (unsigned long sum) +{ + unsigned int result; + /* + %0 %1 + hsw %1, %0 H L L H + add %1, %0 H L H+L+C H+L + */ + asm ("hsw %1, %0; add %1, %0" : "=&r" (result) : "r" (sum)); + return result >> 16; +} + +static inline unsigned int do_csum(const unsigned char * buff, int len) +{ + int odd, count; + unsigned int result = 0; + + if (len <= 0) + goto out; + odd = 1 & (unsigned long) buff; + if (odd) { + result = be16_to_cpu(*buff); + len--; + buff++; + } + count = len >> 1; /* nr of 16-bit words.. */ + if (count) { + if (2 & (unsigned long) buff) { + result += *(unsigned short *) buff; + count--; + len -= 2; + buff += 2; + } + count >>= 1; /* nr of 32-bit words.. */ + if (count) { + unsigned int carry = 0; + do { + unsigned int w = *(unsigned int *) buff; + count--; + buff += 4; + result += carry; + result += w; + carry = (w > result); + } while (count); + result += carry; + result = (result & 0xffff) + (result >> 16); + } + if (len & 2) { + result += *(unsigned short *) buff; + buff += 2; + } + } + if (len & 1) + result += le16_to_cpu(*buff); + result = from32to16(result); + if (odd) + result = ((result >> 8) & 0xff) | ((result & 0xff) << 8); +out: + return result; +} + +/* + * This is a version of ip_compute_csum() optimized for IP headers, + * which always checksum on 4 octet boundaries. + */ +unsigned short ip_fast_csum(unsigned char * iph, unsigned int ihl) +{ + return ~do_csum(iph,ihl*4); +} + +/* + * this routine is used for miscellaneous IP-like checksums, mainly + * in icmp.c + */ +unsigned short ip_compute_csum(const unsigned char * buff, int len) +{ + return ~do_csum(buff,len); +} + +/* + * computes a partial checksum, e.g. for TCP/UDP fragments + */ +unsigned int csum_partial(const unsigned char *buff, int len, unsigned int sum) +{ + unsigned int result = do_csum(buff, len); + + /* add in old sum, and carry.. */ + result += sum; + if(sum > result) + result += 1; + return result; +} + +/* + * copy while checksumming, otherwise like csum_partial + */ +unsigned int csum_partial_copy(const char *src, char *dst, + int len, unsigned int sum) +{ + /* + * It's 2:30 am and I don't feel like doing it real ... + * This is lots slower than the real thing (tm) + */ + sum = csum_partial(src, len, sum); + memcpy(dst, src, len); + + return sum; +} + +/* + * Copy from userspace and compute checksum. If we catch an exception + * then zero the rest of the buffer. + */ +unsigned int csum_partial_copy_from_user (const char *src, char *dst, + int len, unsigned int sum, + int *err_ptr) +{ + int missing; + + missing = copy_from_user(dst, src, len); + if (missing) { + memset(dst + len - missing, 0, missing); + *err_ptr = -EFAULT; + } + + return csum_partial(dst, len, sum); +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/lib/lshrdi3.c linux.2.5.40-ac2/arch/v850/lib/lshrdi3.c --- linux.2.5.40/arch/v850/lib/lshrdi3.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/lib/lshrdi3.c 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,62 @@ +/* lshrdi3.c extracted from gcc-2.7.2/libgcc2.c which is: */ +/* Copyright (C) 1989, 1992, 1993, 1994, 1995 Free Software Foundation, Inc. + +This file is part of GNU CC. + +GNU CC is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2, or (at your option) +any later version. + +GNU CC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with GNU CC; see the file COPYING. If not, write to +the Free Software Foundation, 59 Temple Place - Suite 330, +Boston, MA 02111-1307, USA. */ + +#define BITS_PER_UNIT 8 + +typedef int SItype __attribute__ ((mode (SI))); +typedef unsigned int USItype __attribute__ ((mode (SI))); +typedef int DItype __attribute__ ((mode (DI))); +typedef int word_type __attribute__ ((mode (__word__))); + +struct DIstruct {SItype high, low;}; + +typedef union +{ + struct DIstruct s; + DItype ll; +} DIunion; + +DItype +__lshrdi3 (DItype u, word_type b) +{ + DIunion w; + word_type bm; + DIunion uu; + + if (b == 0) + return u; + + uu.ll = u; + + bm = (sizeof (SItype) * BITS_PER_UNIT) - b; + if (bm <= 0) + { + w.s.high = 0; + w.s.low = (USItype)uu.s.high >> -bm; + } + else + { + USItype carries = (USItype)uu.s.high << bm; + w.s.high = (USItype)uu.s.high >> b; + w.s.low = ((USItype)uu.s.low >> b) | carries; + } + + return w.ll; +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/lib/Makefile linux.2.5.40-ac2/arch/v850/lib/Makefile --- linux.2.5.40/arch/v850/lib/Makefile 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/lib/Makefile 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,9 @@ +# +# arch/v850/lib/Makefile +# + +L_TARGET = lib.a +obj-y = ashrdi3.o ashldi3.o lshrdi3.o muldi3.o negdi2.o \ + checksum.o memcpy.o memset.o + +include $(TOPDIR)/Rules.make diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/lib/memcpy.c linux.2.5.40-ac2/arch/v850/lib/memcpy.c --- linux.2.5.40/arch/v850/lib/memcpy.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/lib/memcpy.c 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,97 @@ +/* + * arch/v850/lib/memcpy.c -- Memory copying + * + * Copyright (C) 2001,02 NEC Corporation + * Copyright (C) 2001,02 Miles Bader + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file COPYING in the main directory of this + * archive for more details. + * + * Written by Miles Bader + */ + +#include +#include + +#define CHUNK_SIZE 32 /* bytes */ +#define CHUNK_ALIGNED(addr) (((unsigned long)addr & 0x3) == 0) + +/* Note that this macro uses 8 call-clobbered registers (not including + R1), which are few enough so that the following functions don't need + to spill anything to memory. It also uses R1, which is nominally + reserved for the assembler, but here it should be OK. */ +#define COPY_CHUNK(src, dst) \ + asm ("mov %0, ep;" \ + "sld.w 0[ep], r1; sld.w 4[ep], r12;" \ + "sld.w 8[ep], r13; sld.w 12[ep], r14;" \ + "sld.w 16[ep], r15; sld.w 20[ep], r17;" \ + "sld.w 24[ep], r18; sld.w 28[ep], r19;" \ + "mov %1, ep;" \ + "sst.w r1, 0[ep]; sst.w r12, 4[ep];" \ + "sst.w r13, 8[ep]; sst.w r14, 12[ep];" \ + "sst.w r15, 16[ep]; sst.w r17, 20[ep];" \ + "sst.w r18, 24[ep]; sst.w r19, 28[ep]" \ + :: "r" (src), "r" (dst) \ + : "r1", "r12", "r13", "r14", "r15", \ + "r17", "r18", "r19", "ep", "memory"); + +void *memcpy (void *dst, const void *src, __kernel_size_t size) +{ + char *_dst = dst; + const char *_src = src; + + if (size >= CHUNK_SIZE && CHUNK_ALIGNED(_src) && CHUNK_ALIGNED(_dst)) { + /* Copy large blocks efficiently. */ + unsigned count; + for (count = size / CHUNK_SIZE; count; count--) { + COPY_CHUNK (_src, _dst); + _src += CHUNK_SIZE; + _dst += CHUNK_SIZE; + } + size %= CHUNK_SIZE; + } + + if (size > 0) + do + *_dst++ = *_src++; + while (--size); + + return dst; +} + +void bcopy (const char *src, char *dst, int size) +{ + memcpy (dst, src, size); +} + +void *memmove (void *dst, const void *src, __kernel_size_t size) +{ + if ((unsigned long)dst < (unsigned long)src + || (unsigned long)src + size < (unsigned long)dst) + return memcpy (dst, src, size); + else { + char *_dst = dst + size; + const char *_src = src + size; + + if (size >= CHUNK_SIZE + && CHUNK_ALIGNED (_src) && CHUNK_ALIGNED (_dst)) + { + /* Copy large blocks efficiently. */ + unsigned count; + for (count = size / CHUNK_SIZE; count; count--) { + _src -= CHUNK_SIZE; + _dst -= CHUNK_SIZE; + COPY_CHUNK (_src, _dst); + } + size %= CHUNK_SIZE; + } + + if (size > 0) + do + *--_dst = *--_src; + while (--size); + + return _dst; + } +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/lib/memset.c linux.2.5.40-ac2/arch/v850/lib/memset.c --- linux.2.5.40/arch/v850/lib/memset.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/lib/memset.c 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,61 @@ +/* + * arch/v850/lib/memset.c -- Memory initialization + * + * Copyright (C) 2001,02 NEC Corporation + * Copyright (C) 2001,02 Miles Bader + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file COPYING in the main directory of this + * archive for more details. + * + * Written by Miles Bader + */ + +#include + +void *memset (void *dst, int val, __kernel_size_t count) +{ + if (count) { + register unsigned loop; + register void *ptr asm ("ep") = dst; + + /* replicate VAL into a long. */ + val &= 0xff; + val |= val << 8; + val |= val << 16; + + /* copy initial unaligned bytes. */ + if ((long)ptr & 1) { + *((char *)ptr)++ = val; + count--; + } + if (count > 2 && ((long)ptr & 2)) { + *((short *)ptr)++ = val; + count -= 2; + } + + /* 32-byte copying loop. */ + for (loop = count / 32; loop; loop--) { + asm ("sst.w %0, 0[ep]; sst.w %0, 4[ep];" + "sst.w %0, 8[ep]; sst.w %0, 12[ep];" + "sst.w %0, 16[ep]; sst.w %0, 20[ep];" + "sst.w %0, 24[ep]; sst.w %0, 28[ep]" + :: "r" (val) : "memory"); + ptr += 32; + } + count %= 32; + + /* long copying loop. */ + for (loop = count / 4; loop; loop--) + *((long *)ptr)++ = val; + count %= 4; + + /* finish up with any trailing bytes. */ + if (count & 2) + *((short *)ptr)++ = val; + if (count & 1) + *(char *)ptr = val; + } + + return dst; +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/lib/muldi3.c linux.2.5.40-ac2/arch/v850/lib/muldi3.c --- linux.2.5.40/arch/v850/lib/muldi3.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/lib/muldi3.c 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,61 @@ +/* muldi3.c extracted from gcc-2.7.2.3/libgcc2.c and + gcc-2.7.2.3/longlong.h which is: */ +/* Copyright (C) 1989, 1992, 1993, 1994, 1995, 2001 Free Software Foundation, Inc. + +This file is part of GNU CC. + +GNU CC is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2, or (at your option) +any later version. + +GNU CC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with GNU CC; see the file COPYING. If not, write to +the Free Software Foundation, 59 Temple Place - Suite 330, +Boston, MA 02111-1307, USA. */ + +#define umul_ppmm(w1, w0, u, v) \ + __asm__ ("mulu %3, %0, %1" \ + : "=r" ((USItype)(w0)), \ + "=r" ((USItype)(w1)) \ + : "%0" ((USItype)(u)), \ + "r" ((USItype)(v))) + +#define __umulsidi3(u, v) \ + ({DIunion __w; \ + umul_ppmm (__w.s.high, __w.s.low, u, v); \ + __w.ll; }) + +typedef int SItype __attribute__ ((mode (SI))); +typedef unsigned int USItype __attribute__ ((mode (SI))); +typedef int DItype __attribute__ ((mode (DI))); +typedef int word_type __attribute__ ((mode (__word__))); + +struct DIstruct {SItype high, low;}; + +typedef union +{ + struct DIstruct s; + DItype ll; +} DIunion; + +DItype +__muldi3 (DItype u, DItype v) +{ + DIunion w; + DIunion uu, vv; + + uu.ll = u, + vv.ll = v; + + w.ll = __umulsidi3 (uu.s.low, vv.s.low); + w.s.high += ((USItype) uu.s.low * (USItype) vv.s.high + + (USItype) uu.s.high * (USItype) vv.s.low); + + return w.ll; +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/lib/negdi2.c linux.2.5.40-ac2/arch/v850/lib/negdi2.c --- linux.2.5.40/arch/v850/lib/negdi2.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/lib/negdi2.c 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,25 @@ +/* + * arch/v850/lib/negdi2.c -- 64-bit negation + * + * Copyright (C) 2001 NEC Corporation + * Copyright (C) 2001 Miles Bader + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file COPYING in the main directory of this + * archive for more details. + * + * Written by Miles Bader + */ + +typedef int DItype __attribute__ ((mode (DI))); + +DItype __negdi2 (DItype x) +{ + __asm__ __volatile__ + ("not r6, r10;" + "add 1, r10;" + "setf c, r6;" + "not r7, r11;" + "add r6, r11" + ::: "r6", "r7", "r10", "r11"); +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/Makefile linux.2.5.40-ac2/arch/v850/Makefile --- linux.2.5.40/arch/v850/Makefile 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/Makefile 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,89 @@ +# +# arch/v850/Makefile +# +# This file is included by the global makefile so that you can add your own +# architecture-specific flags and dependencies. Remember to do have actions +# for "archclean" and "archdep" for cleaning up and making dependencies for +# this architecture +# +# This file is subject to the terms and conditions of the GNU General Public +# License. See the file "COPYING" in the main directory of this archive +# for more details. +# + +UTS_SYSNAME = -DUTS_SYSNAME=\"uClinux\" + + +CFLAGS += -mv850e +# r16 is a fixed pointer to the current task +CFLAGS += -ffixed-r16 -mno-prolog-function +CFLAGS += -fno-builtin +CFLAGS += $(UTS_SYSNAME) -D__linux__ + + +ARCH_DIR := arch/$(ARCH) + + +# linker scripts +ifdef CONFIG_V850E_SIM +LDFLAGS_vmlinux := -T $(ARCH_DIR)/sim.ld +endif +ifdef CONFIG_V850E2_SIM85E2C +LDFLAGS_vmlinux := -T $(ARCH_DIR)/sim85e2c.ld +endif +ifdef CONFIG_V850E2_FPGA85E2C +LDFLAGS_vmlinux := -T $(ARCH_DIR)/fpga85e2c.ld +endif +ifdef CONFIG_RTE_CB_MA1 +ifdef CONFIG_ROM_KERNEL +LDFLAGS_vmlinux := -T $(ARCH_DIR)/rte_ma1_cb-rom.ld +else +ifdef CONFIG_RTE_CB_MA1_KSRAM +LDFLAGS_vmlinux := -T $(ARCH_DIR)/rte_ma1_cb-ksram.ld +else +LDFLAGS_vmlinux := -T $(ARCH_DIR)/rte_ma1_cb.ld +endif +endif +endif + +HEAD := $(ARCH_DIR)/kernel/head.o $(ARCH_DIR)/kernel/init_task.o + +SUBDIRS += $(ARCH_DIR)/kernel $(ARCH_DIR)/lib +CORE_FILES := $(ARCH_DIR)/kernel/kernel.o $(CORE_FILES) +LIBS += $(ARCH_DIR)/lib/lib.a + + +# Deal with the initial contents of the root device +ifdef ROOT_IMAGE +ifndef CONFIG_SIM +CORE_FILES += root_fs_image.o +endif # !CONFIG_SIM +endif # ROOT_IMAGE + + +# Barf. The stupid top-level Makefile requires that this exist. +$(ARCH_DIR)/vmlinux.lds.S: + touch $@ + + +# +# If you want the kernel build to build modules outside of the tree +# then define this and pass it to the main linux makefile +# +ifdef EXTRA_MODULE_DIRS +SUBDIRS += $(EXTRA_MODULE_DIRS) +endif + +bootstrap: + @$(MAKEBOOT) bootstrap + +archmrproper: + +archdep: + +archclean: + rm -f vmlinux + rm -f $(ARCH_DIR)/kernel/v850_defs.h $(ARCH_DIR)/kernel/v850_defs.d + rm -f $(ARCH_DIR)/vmlinux.lds.S + +include $(TOPDIR)/Rules.make diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/README linux.2.5.40-ac2/arch/v850/README --- linux.2.5.40/arch/v850/README 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/README 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,21 @@ +This port to the NEC V850E processor supports the following platforms: + + + The gdb v850e simulator (CONFIG_V850E_SIM); see the subdirectory `sim' + for some more support files for this. + + + The Midas labs RTE-V850E/MA1-CB evaluation board (CONFIG_RTE_CB_MA1), + with untested support for the RTE-V850E/NB85E-CB board + (CONFIG_RTE_CB_NB85E). This support has only been tested when running + with the Multi-debugger monitor ROM (for the Green Hills Multi debugger). + The optional NEC Solution Gear RTE-MOTHER-A motherboard is also + supported, which allows PCI boards to be used (CONFIG_RTE_MB_A_PCI). + + + The sim85e2c simulator, which is a verilog simulation of the V850E2 + NA85E2C cpu core (CONFIG_V850E2_SIM85E2C). + + + A FPGA implementation of the V850E2 NA85E2C cpu core + (CONFIG_V850E2_FPGA85E2C). + +Porting to anything with a V850E/MA1 or MA2 processor should be simple. +See the file and the files it includes for an example of +how to add platform/chip-specific support. diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/rte_ma1_cb-ksram.ld linux.2.5.40-ac2/arch/v850/rte_ma1_cb-ksram.ld --- linux.2.5.40/arch/v850/rte_ma1_cb-ksram.ld 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/rte_ma1_cb-ksram.ld 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,145 @@ +/* Linker script for the Midas labs RTE-V850E/MA1-CB evaluation board + (CONFIG_RTE_CB_MA1), with kernel in SRAM, under Multi debugger. */ + +/* Note, all symbols are prefixed with an extra `_' for compatibility with + the existing linux sources. */ + +_jiffies = _jiffies_64 ; + +MEMORY { + /* 1MB of SRAM; we can't use the last 32KB, because it's used by + the monitor scratch-RAM. This memory is mirrored 4 times. */ + SRAM : ORIGIN = 0x00400000, LENGTH = 0x000F8000 + /* Monitor scratch RAM; only the interrupt vectors should go here. */ + MRAM : ORIGIN = 0x004F8000, LENGTH = 0x00008000 + /* 32MB of SDRAM. */ + SDRAM : ORIGIN = 0x00800000, LENGTH = 0x02000000 +} + +SECTIONS { + .text : { + __kram_start = . ; + + __stext = . ; + *(.text) + *(.text.exit) + *(.text.lock) + *(.exitcall.exit) + __real_etext = . ; /* There may be data after here. */ + *(.rodata) + + . = ALIGN (0x4) ; + *(.kstrtab) + + . = ALIGN (4) ; + *(.call_table_data) + *(.call_table_text) + + . = ALIGN (16) ; /* Exception table. */ + ___start___ex_table = . ; + *(__ex_table) + ___stop___ex_table = . ; + + ___start___ksymtab = . ;/* Kernel symbol table. */ + *(__ksymtab) + ___stop___ksymtab = . ; + . = ALIGN (4) ; + __etext = . ; + } > SRAM + + .data ALIGN (0x4) : { + __sdata = . ; + ___data_start = . ; + *(.data) + *(.data.exit) + . = ALIGN (16) ; + *(.data.cacheline_aligned) + . = ALIGN (0x2000) ; + *(.data.init_task) + . = ALIGN (0x2000) ; + __edata = . ; + } > SRAM + + .bss ALIGN (0x4) : { + __sbss = . ; + *(.bss) + *(COMMON) + . = ALIGN (4) ; + __ebss = . ; + } > SRAM + + .init ALIGN (4096) : { + __init_start = . ; + *(.text.init) + *(.data.init) + . = ALIGN (16) ; + ___setup_start = . ; + *(.setup.init) + ___setup_end = . ; + ___initcall_start = . ; + *(.initcall1.init) + *(.initcall2.init) + *(.initcall3.init) + *(.initcall4.init) + *(.initcall5.init) + *(.initcall6.init) + *(.initcall7.init) + . = ALIGN (4) ; + ___initcall_end = . ; + } > SRAM + + /* This provides address at which the interrupt vectors are + initially loaded by the loader. */ + __intv_load_start = ALIGN (0x10) ; + + /* Interrupt vector space. Because we're using the monitor + ROM, Instead of the native interrupt vector, we must use the + `alternate interrupt vector' area. Note that this is in + `SRAM' space, which is not currently used by the kernel (the + kernel uses `SDRAM' space). */ + + /* We can't load the interrupt vectors directly into their + target location, because the monitor ROM for the GHS Multi + debugger barfs if we try. Unfortunately, Multi also doesn't + deal correctly with ELF sections where the LMA and VMA differ + (it just ignores the LMA), so we can't use that feature to + work around the problem! What we do instead is just put the + interrupt vectors into a normal section, and have the + `mach_early_init' function for Midas boards do the necessary + copying and relocation at runtime (this section basically + only contains `jr' instructions, so it's not that hard). + + This the section structure I initially tried to use (which more + accurately expresses the intent): + + .intv 0x007F8000 : AT (ADDR (.init) + SIZEOF (.init)) { + ... + } > MRAM + */ + + .intv ALIGN (0x10) : { + __intv_start = . ; + *(.intv.reset) /* Reset vector */ + *(.intv.common) /* Vectors common to all v850e proc. */ + *(.intv.mach) /* Machine-specific int. vectors. */ + __intv_end = . ; + + /* This is here so that when we free init memory, the initial + load-area of the interrupt vectors is freed too. */ + __init_end = __intv_end; + + __kram_end = __init_end ; + } > SRAM + + .bootmap ALIGN (4096) : { + __bootmap = . ; + . = . + 4096 ; /* enough for 128MB. */ + } > SRAM + + /* Device contents for the root filesystem. */ + .root : { + __root_fs_image_start = . ; + *(.root) + __root_fs_image_end = . ; + } > SDRAM +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/rte_ma1_cb.ld linux.2.5.40-ac2/arch/v850/rte_ma1_cb.ld --- linux.2.5.40/arch/v850/rte_ma1_cb.ld 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/rte_ma1_cb.ld 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,145 @@ +/* Linker script for the Midas labs RTE-V850E/MA1-CB evaluation board + (CONFIG_RTE_CB_MA1), with kernel in SDRAM, under Multi debugger. */ + +/* Note, all symbols are prefixed with an extra `_' for compatibility with + the existing linux sources. */ + +_jiffies = _jiffies_64 ; + +MEMORY { + /* 1MB of SRAM; we can't use the last 32KB, because it's used by + the monitor scratch-RAM. This memory is mirrored 4 times. */ + SRAM : ORIGIN = 0x00400000, LENGTH = 0x000F8000 + /* Monitor scratch RAM; only the interrupt vectors should go here. */ + MRAM : ORIGIN = 0x004F8000, LENGTH = 0x00008000 + /* 32MB of SDRAM. */ + SDRAM : ORIGIN = 0x00800000, LENGTH = 0x02000000 +} + +SECTIONS { + .bootmap : { + __bootmap = . ; + . = . + 4096 ; /* enough for 128MB. */ + } > SRAM + + .text : { + __kram_start = . ; + + __stext = . ; + *(.text) + *(.text.exit) + *(.text.lock) + *(.exitcall.exit) + __real_etext = . ; /* There may be data after here. */ + *(.rodata) + + . = ALIGN (0x4) ; + *(.kstrtab) + + . = ALIGN (4) ; + *(.call_table_data) + *(.call_table_text) + + . = ALIGN (16) ; /* Exception table. */ + ___start___ex_table = . ; + *(__ex_table) + ___stop___ex_table = . ; + + ___start___ksymtab = . ;/* Kernel symbol table. */ + *(__ksymtab) + ___stop___ksymtab = . ; + . = ALIGN (4) ; + __etext = . ; + } > SDRAM + + .data ALIGN (0x4) : { + __sdata = . ; + ___data_start = . ; + *(.data) + *(.data.exit) + . = ALIGN (16) ; + *(.data.cacheline_aligned) + . = ALIGN (0x2000) ; + *(.data.init_task) + . = ALIGN (0x2000) ; + __edata = . ; + } > SDRAM + + .bss ALIGN (0x4) : { + __sbss = . ; + *(.bss) + *(COMMON) + . = ALIGN (4) ; + __ebss = . ; + } > SDRAM + + .init ALIGN (4096) : { + __init_start = . ; + *(.text.init) + *(.data.init) + . = ALIGN (16) ; + ___setup_start = . ; + *(.setup.init) + ___setup_end = . ; + ___initcall_start = . ; + *(.initcall1.init) + *(.initcall2.init) + *(.initcall3.init) + *(.initcall4.init) + *(.initcall5.init) + *(.initcall6.init) + *(.initcall7.init) + . = ALIGN (4) ; + ___initcall_end = . ; + } > SDRAM + + /* This provides address at which the interrupt vectors are + initially loaded by the loader. */ + __intv_load_start = ALIGN (0x10) ; + + /* Interrupt vector space. Because we're using the monitor + ROM, Instead of the native interrupt vector, we must use the + `alternate interrupt vector' area. Note that this is in + `SRAM' space, which is not currently used by the kernel (the + kernel uses `SDRAM' space). */ + + /* We can't load the interrupt vectors directly into their + target location, because the monitor ROM for the GHS Multi + debugger barfs if we try. Unfortunately, Multi also doesn't + deal correctly with ELF sections where the LMA and VMA differ + (it just ignores the LMA), so we can't use that feature to + work around the problem! What we do instead is just put the + interrupt vectors into a normal section, and have the + `mach_early_init' function for Midas boards do the necessary + copying and relocation at runtime (this section basically + only contains `jr' instructions, so it's not that hard). + + This the section structure I initially tried to use (which more + accurately expresses the intent): + + .intv 0x007F8000 : AT (ADDR (.init) + SIZEOF (.init)) { + ... + } > MRAM + */ + + .intv ALIGN (0x10) : { + __intv_start = . ; + *(.intv.reset) /* Reset vector */ + *(.intv.common) /* Vectors common to all v850e proc. */ + *(.intv.mach) /* Machine-specific int. vectors. */ + __intv_end = . ; + + /* This is here so that when we free init memory, the initial + load-area of the interrupt vectors is freed too. */ + __init_end = __intv_end; + + __kram_end = . ; + } > SDRAM + + /* Device contents for the root filesystem. */ + .root ALIGN (4096) : { + __root_fs_image_start = . ; + *(.root) + __root_fs_image_end = . ; + } > SDRAM +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/rte_ma1_cb-rom.ld linux.2.5.40-ac2/arch/v850/rte_ma1_cb-rom.ld --- linux.2.5.40/arch/v850/rte_ma1_cb-rom.ld 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/rte_ma1_cb-rom.ld 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,107 @@ +/* Linker script for the Midas labs RTE-V850E/MA1-CB evaluation board + (CONFIG_RTE_CB_MA1), with kernel in ROM. */ + +/* Note, all symbols are prefixed with an extra `_' for compatibility with + the existing linux sources. */ + +_jiffies = _jiffies_64 ; + +MEMORY { + ROM : ORIGIN = 0x00000000, LENGTH = 0x00100000 + /* 1MB of SRAM. This memory is mirrored 4 times. */ + SRAM : ORIGIN = 0x00400000, LENGTH = 0x00100000 + /* 32MB of SDRAM. */ + SDRAM : ORIGIN = 0x00800000, LENGTH = 0x02000000 +} + +SECTIONS { + /* Interrupt vector space. */ + .intv { + __intv_start = . ; + *(.intv.reset) /* Reset vector */ + *(.intv.common) /* Vectors common to all v850e proc. */ + *(.intv.mach) /* Machine-specific int. vectors. */ + __intv_end = . ; + } > ROM + + .text : { + __stext = . ; + *(.text) + *(.text.exit) + *(.text.lock) + *(.exitcall.exit) + __real_etext = . ; /* There may be data after here. */ + *(.rodata) + . = ALIGN (0x4) ; + *(.kstrtab) + . = ALIGN (16) ; /* Exception table. */ + ___start___ex_table = . ; + *(__ex_table) + ___stop___ex_table = . ; + + ___start___ksymtab = . ;/* Kernel symbol table. */ + *(__ksymtab) + ___stop___ksymtab = . ; + . = ALIGN (4) ; + __etext = . ; + } > ROM + + + .data ALIGN (0x4) : { + __kram_start = . ; + + __sdata = . ; + ___data_start = . ; + *(.data) + *(.data.exit) + . = ALIGN (16) ; + *(.data.cacheline_aligned) + . = ALIGN (0x2000) ; + *(.data.init_task) + . = ALIGN (0x2000) ; + __edata = . ; + } > SRAM + + .bss ALIGN (0x4) : { + __sbss = . ; + *(.bss) + *(COMMON) + . = ALIGN (4) ; + __ebss = . ; + } > SRAM + + .init ALIGN (4096) : { + __init_start = . ; + *(.text.init) + *(.data.init) + . = ALIGN (16) ; + ___setup_start = . ; + *(.setup.init) + ___setup_end = . ; + ___initcall_start = . ; + *(.initcall1.init) + *(.initcall2.init) + *(.initcall3.init) + *(.initcall4.init) + *(.initcall5.init) + *(.initcall6.init) + *(.initcall7.init) + . = ALIGN (4) ; + ___initcall_end = . ; + __init_end = . ; + + __kram_end = . ; + } > SRAM + + .bootmap ALIGN (4096) : { + __bootmap = . ; + . = . + 4096 ; /* enough for 128MB. */ + } > SRAM + + /* device contents for the root filesystem. */ + .root ALIGN (4096) { + __root_fs_image_start = . ; + *(.root) + __root_fs_image_end = . ; + } > SDRAM +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/sim/updroot linux.2.5.40-ac2/arch/v850/sim/updroot --- linux.2.5.40/arch/v850/sim/updroot 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/sim/updroot 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,27 @@ +#!/bin/sh + +SIZE=1024 +SRC=root +DST=root.ext2 + +TMP=/tmp/root.ext2 +MNT=/tmp/root.mnt + +dd if=/dev/zero of=$TMP bs=1024 count=$SIZE 2>&1 | grep -v 'records \(in\|out\)' 1>&2 +mke2fs -m0 -q -F $TMP 2>&1 | grep -v '^mke2fs ' 1>&2 + +mkdir -p $MNT +sudo mount -t ext2 $TMP $MNT -o loop + +mkdir -p $MNT/dev + +rm -rf $MNT/lost+found + +# Not need with devfs +#sudo mknod $MNT/dev/console c 5 1 + +(cd $SRC; tar cf - .) | (cd $MNT; tar xvf -) + +sudo umount $MNT + +mv $TMP . diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/sim85e2c.ld linux.2.5.40-ac2/arch/v850/sim85e2c.ld --- linux.2.5.40/arch/v850/sim85e2c.ld 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/sim85e2c.ld 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,128 @@ +/* Linker script for the sim85e2c simulator, which is a verilog simulation of + the V850E2 NA85E2C cpu core (CONFIG_V850E2_SIM85E2C). */ + +/* Note, all symbols are prefixed with an extra `_' for compatibility with + the existing linux sources. */ + +_jiffies = _jiffies_64 ; + +MEMORY { + /* 1MB of `instruction RAM', starting at 0. + Instruction fetches are much faster from IRAM than from DRAM. + This should match IRAM_ADDR in "include/asm-v580/sim85e2c.h". */ + IRAM : ORIGIN = 0x00000000, LENGTH = 0x00100000 + + /* 1MB of `data RAM', below and contiguous with the I/O space. + Data fetches are much faster from DRAM than from IRAM. + This should match DRAM_ADDR in "include/asm-v580/sim85e2c.h". */ + DRAM : ORIGIN = 0xfff00000, LENGTH = 0x000ff000 + /* We have to load DRAM at a mirror-address of 0x1ff00000, + because the simulator's preprocessing script isn't smart + enough to deal with the above LMA. */ + DRAM_LOAD : ORIGIN = 0x1ff00000, LENGTH = 0x000ff000 + + /* `external ram' (CS1 area), comes after IRAM. + This should match ERAM_ADDR in "include/asm-v580/sim85e2c.h". */ + ERAM : ORIGIN = 0x00100000, LENGTH = 0x07f00000 +} + +SECTIONS { + .intv : { + __intv_start = . ; + *(.intv) /* Interrupt vectors. */ + *(.intv.reset) /* Reset vector */ + *(.intv.common) /* Vectors common to all v850e proc. */ + *(.intv.mach) /* Machine-specific int. vectors. */ + __intv_end = . ; + } > IRAM + + .text : { + __stext = . ; + *(.text) + *(.text.exit) + *(.text.lock) + *(.exitcall.exit) + __real_etext = . ; /* There may be data after here. */ + *(.rodata) + . = ALIGN (0x4) ; + *(.kstrtab) + + . = ALIGN (4) ; + *(.call_table_data) + *(.call_table_text) + + . = ALIGN (16) ; /* Exception table. */ + ___start___ex_table = . ; + *(__ex_table) + ___stop___ex_table = . ; + + ___start___ksymtab = . ;/* Kernel symbol table. */ + *(__ksymtab) + ___stop___ksymtab = . ; + . = ALIGN (4) ; + __etext = . ; + } > IRAM + + .init ALIGN (4096) : { + __init_start = . ; + *(.text.init) + *(.data.init) + . = ALIGN (16) ; + ___setup_start = . ; + *(.setup.init) + ___setup_end = . ; + ___initcall_start = . ; + *(.initcall1.init) + *(.initcall2.init) + *(.initcall3.init) + *(.initcall4.init) + *(.initcall5.init) + *(.initcall6.init) + *(.initcall7.init) + . = ALIGN (4) ; + ___initcall_end = . ; + __init_end = . ; + } > IRAM + + .data : { + __kram_start = . ; + + __sdata = . ; + *(.data) + *(.data.exit) + . = ALIGN (16) ; + *(.data.cacheline_aligned) + . = ALIGN (0x2000) ; + *(.data.init_task) + . = ALIGN (0x2000) ; + __edata = . ; + } > DRAM AT> DRAM_LOAD + + .bss ALIGN (0x4) : { + __sbss = . ; + *(.bss) + *(COMMON) + . = ALIGN (4) ; + __ebss = . ; + } > DRAM AT> DRAM_LOAD + + /* Device contents for the root filesystem. */ + .root ALIGN (4096) : { + __root_fs_image_start = . ; + *(.root) + __root_fs_image_end = . ; + } > DRAM AT> DRAM_LOAD + + .memcons : { + _memcons_output = . ; + . = . + 0x8000 ; + _memcons_output_end = . ; + + __kram_end = . ; + } > DRAM AT> DRAM_LOAD + + .bootmap ALIGN (4096) : { + __bootmap = . ; + . = . + 4096 ; /* enough for 128MB. */ + } > DRAM AT> DRAM_LOAD +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/arch/v850/sim.ld linux.2.5.40-ac2/arch/v850/sim.ld --- linux.2.5.40/arch/v850/sim.ld 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/arch/v850/sim.ld 2002-10-02 21:54:23.000000000 +0100 @@ -0,0 +1,101 @@ +/* Linker script for the gdb v850e simulator (CONFIG_V850E_SIM). */ + +/* Note, all symbols are prefixed with an extra `_' for compatibility with + the existing linux sources. */ + +_jiffies = _jiffies_64 ; + +MEMORY { + /* Interrupt vectors. */ + INTV : ORIGIN = 0x0, LENGTH = 0xe0 + /* 16MB of RAM. + This must match RAM_ADDR and RAM_SIZE in include/asm-v580/sim.h */ + RAM : ORIGIN = 0x8F000000, LENGTH = 0x01000000 +} + +SECTIONS { + .intv : { + __intv_start = . ; + *(.intv.reset) /* Reset vector */ + *(.intv.common) /* Vectors common to all v850e proc. */ + *(.intv.mach) /* Machine-specific int. vectors. */ + __intv_end = . ; + } > INTV + + .text : { + __kram_start = . ; + + __stext = . ; + *(.text) + *(.text.exit) + *(.text.lock) + *(.exitcall.exit) + __real_etext = . ; /* There may be data after here. */ + *(.rodata) + . = ALIGN (0x4) ; + *(.kstrtab) + + . = ALIGN (4) ; + *(.call_table_data) + *(.call_table_text) + + . = ALIGN (16) ; /* Exception table. */ + ___start___ex_table = . ; + *(__ex_table) + ___stop___ex_table = . ; + + ___start___ksymtab = . ;/* Kernel symbol table. */ + *(__ksymtab) + ___stop___ksymtab = . ; + . = ALIGN (4) ; + __etext = . ; + } > RAM + + .data ALIGN (0x4) : { + __sdata = . ; + *(.data) + *(.data.exit) + . = ALIGN (16) ; + *(.data.cacheline_aligned) + . = ALIGN (0x2000) ; + *(.data.init_task) + . = ALIGN (0x2000) ; + __edata = . ; + } > RAM + + .bss ALIGN (0x4) : { + __sbss = . ; + *(.bss) + *(COMMON) + . = ALIGN (4) ; + __ebss = . ; + } > RAM + + .init ALIGN (4096) : { + __init_start = . ; + *(.text.init) + *(.data.init) + . = ALIGN (16) ; + ___setup_start = . ; + *(.setup.init) + ___setup_end = . ; + ___initcall_start = . ; + *(.initcall1.init) + *(.initcall2.init) + *(.initcall3.init) + *(.initcall4.init) + *(.initcall5.init) + *(.initcall6.init) + *(.initcall7.init) + . = ALIGN (4) ; + ___initcall_end = . ; + __init_end = . ; + + __kram_end = . ; + } > RAM + + .bootmap ALIGN (4096) : { + __bootmap = . ; + . = . + 4096 ; /* enough for 128MB. */ + } > RAM +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/CREDITS linux.2.5.40-ac2/CREDITS --- linux.2.5.40/CREDITS 2002-10-02 21:34:05.000000000 +0100 +++ linux.2.5.40-ac2/CREDITS 2002-10-02 21:54:22.000000000 +0100 @@ -156,6 +156,14 @@ S: Calgary, Alberta S: Canada +N: Miles Bader +E: miles@gnu.org +D: v850 port (uClinux) +S: NEC Corporation +S: 1753 Shimonumabe, Nakahara-ku +S: Kawasaki 211-8666 +S: Japan + N: Ralf Baechle E: ralf@gnu.org P: 1024/AF7B30C1 CF 97 C2 CC 6D AE A7 FE C8 BA 9C FC 88 DE 32 C3 @@ -3037,8 +3045,14 @@ S: Germany N: Greg Ungerer -E: gerg@moreton.com.au +E: gerg@snapgear.com +D: uClinux kernel hacker +D: Port uClinux to the Motorola ColdFire CPU D: Author of Stallion multiport serial drivers +S: SnapGear Inc. +S: 825 Stanley St +S: Woolloongabba. QLD. 4102 +S: Australia N: Jeffrey A. Uphoff E: juphoff@transmeta.com diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/Documentation/sound/oss/Maestro3 linux.2.5.40-ac2/Documentation/sound/oss/Maestro3 --- linux.2.5.40/Documentation/sound/oss/Maestro3 2002-07-20 20:11:33.000000000 +0100 +++ linux.2.5.40-ac2/Documentation/sound/oss/Maestro3 2002-10-03 00:14:21.000000000 +0100 @@ -71,10 +71,18 @@ tell the driver to print minimal debugging information as it runs. This can be collected with 'dmesg' or through the klogd daemon. -The other is 'external_amp', which tells the driver to attempt to enable +One is 'external_amp', which tells the driver to attempt to enable an external amplifier. This defaults to '1', you can tell the driver not to bother enabling such an amplifier by setting it to '0'. +And the last is 'gpio_pin', which tells the driver which GPIO pin number +the external amp uses (0-15), The Allegro uses 8 by default, all others 1. +If everything loads correctly and seems to be working but you get no sound, +try tweaking this value. + +Systems known to need a different value + Panasonic ToughBook CF-72: gpio_pin=13 + Power Management ---------------- diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/Documentation/voyager.txt linux.2.5.40-ac2/Documentation/voyager.txt --- linux.2.5.40/Documentation/voyager.txt 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/Documentation/voyager.txt 2002-10-02 21:41:29.000000000 +0100 @@ -0,0 +1,95 @@ +Running Linux on the Voyager Architecture +========================================= + +For full details and current project status, see + +http://www.hansenpartnership.com/voyager + +The voyager architecture was designed by NCR in the mid 80s to be a +fully SMP capable RAS computing architecture built around intel's 486 +chip set. The voyager came in three levels of architectural +sophistication: 3,4 and 5 --- 1 and 2 never made it out of prototype. +The linux patches support only the Level 5 voyager architecture (any +machine class 3435 and above). + +The Voyager Architecture +------------------------ + +Voyager machines consist of a Baseboard with a 386 diagnostic +processor, a Power Supply Interface (PSI) a Primary and possibly +Secondary Microchannel bus and between 2 and 20 voyager slots. The +voyager slots can be populated with memory and cpu cards (up to 4GB +memory and from 1 486 to 32 Pentium Pro processors). Internally, the +voyager has a dual arbitrated system bus and a configuration and test +bus (CAT). The voyager bus speed is 40MHz. Therefore (since all +voyager cards are dual ported for each system bus) the maximum +transfer rate is 320Mb/s but only if you have your slot configuration +tuned (only memory cards can communicate with both busses at once, CPU +cards utilise them one at a time). + +Voyager SMP +----------- + +Since voyager was the first intel based SMP system, it is slightly +more primitive than the Intel IO-APIC approach to SMP. Voyager allows +arbitrary interrupt routing (including processor affinity routing) of +all 16 PC type interrupts. However it does this by using a modified +5259 master/slave chip set instead of an APIC bus. Additionally, +voyager supports Cross Processor Interrupts (CPI) equivalent to the +APIC IPIs. There are two routed voyager interrupt lines provided to +each slot. + +Processor Cards +--------------- + +These come in single, dyadic and quad configurations (the quads are +problematic--see later). The maximum configuration is 8 quad cards +for 32 way SMP. + +Quad Processors +--------------- + +Because voyager only supplies two interrupt lines to each Processor +card, the Quad processors have to be configured (and Bootstrapped) in +as a pair of Master/Slave processors. + +In fact, most Quad cards only accept one VIC interrupt line, so they +have one interrupt handling processor (called the VIC extended +processor) and three non-interrupt handling processors. + +Current Status +-------------- + +The System will boot on Mono, Dyad and Quad cards. There was +originally a Quad boot problem which has been fixed by proper gdt +alignment in the initial boot loader. If you still cannot get your +voyager system to boot, email me at: + + + + +The Quad cards now support using the separate Quad CPI vectors instead +of going through the VIC mailbox system. + +The Level 4 architecture (3430 and 3360 Machines) should also work +fine. + +Dump Switch +----------- + +The voyager dump switch sends out a broadcast NMI which the voyager +code intercepts and does a task dump. + +Power Switch +------------ + +The front panel power switch is intercepted by the kernel and should +cause a system shutdown and power off. + +A Note About Mixed CPU Systems +------------------------------ + +Linux isn't designed to handle mixed CPU systems very well. In order +to get everything going you *must* make sure that your lowest +capability CPU is used for booting. Also, mixing CPU classes +(e.g. 486 and 586) is really not going to work very well at all. diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/atm/firestream.c linux.2.5.40-ac2/drivers/atm/firestream.c --- linux.2.5.40/drivers/atm/firestream.c 2002-10-02 21:33:21.000000000 +0100 +++ linux.2.5.40-ac2/drivers/atm/firestream.c 2002-10-03 13:45:25.000000000 +0100 @@ -330,8 +330,8 @@ #define FS_DEBUG_QSIZE 0x00001000 -#define func_enter() fs_dprintk (FS_DEBUG_FLOW, "fs: enter " __FUNCTION__ "\n") -#define func_exit() fs_dprintk (FS_DEBUG_FLOW, "fs: exit " __FUNCTION__ "\n") +#define func_enter() fs_dprintk(FS_DEBUG_FLOW, "fs: enter %s\n", __FUNCTION__ ) +#define func_exit() fs_dprintk(FS_DEBUG_FLOW, "fs: exit %s\n", __FUNCTION__ ) struct fs_dev *fs_boards = NULL; @@ -814,7 +814,7 @@ skb_put (skb, qe->p1 & 0xffff); ATM_SKB(skb)->vcc = atm_vcc; atomic_inc(&atm_vcc->stats->rx); - skb->stamp = xtime; + do_gettimeofday(&skb->stamp); fs_dprintk (FS_DEBUG_ALLOC, "Free rec-skb: %p (pushed)\n", skb); atm_vcc->push (atm_vcc, skb); fs_dprintk (FS_DEBUG_ALLOC, "Free rec-d: %p\n", pe); diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/base/hotplug.c linux.2.5.40-ac2/drivers/base/hotplug.c --- linux.2.5.40/drivers/base/hotplug.c 2002-10-02 21:34:05.000000000 +0100 +++ linux.2.5.40-ac2/drivers/base/hotplug.c 2002-10-03 13:52:11.000000000 +0100 @@ -62,6 +62,7 @@ envp = (char **) kmalloc (NUM_ENVP * sizeof (char *), GFP_KERNEL); if (!envp) return -ENOMEM; + memset (envp, 0x00, NUM_ENVP * sizeof (char *)); buffer = kmalloc (BUFFER_SIZE, GFP_KERNEL); if (!buffer) { diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/block/rd.c linux.2.5.40-ac2/drivers/block/rd.c --- linux.2.5.40/drivers/block/rd.c 2002-10-02 21:34:05.000000000 +0100 +++ linux.2.5.40-ac2/drivers/block/rd.c 2002-10-03 00:17:22.000000000 +0100 @@ -213,7 +213,7 @@ kunmap(vec->bv_page); if (rw == READ) { - flush_dcache_page(page); + flush_dcache_page(sbh->b_page); } else { SetPageDirty(page); } diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/char/amd768_rng.c linux.2.5.40-ac2/drivers/char/amd768_rng.c --- linux.2.5.40/drivers/char/amd768_rng.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/drivers/char/amd768_rng.c 2002-10-02 22:29:55.000000000 +0100 @@ -0,0 +1,295 @@ +/* + Hardware driver for the AMD 768 Random Number Generator (RNG) + (c) Copyright 2001 Red Hat Inc + + derived from + + Hardware driver for Intel i810 Random Number Generator (RNG) + Copyright 2000,2001 Jeff Garzik + Copyright 2000,2001 Philipp Rumpf + + Please read Documentation/i810_rng.txt for details on use. + + ---------------------------------------------------------- + This software may be used and distributed according to the terms + of the GNU General Public License, incorporated herein by reference. + + */ + + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + + +/* + * core module and version information + */ +#define RNG_VERSION "0.1.0" +#define RNG_MODULE_NAME "amd768_rng" +#define RNG_DRIVER_NAME RNG_MODULE_NAME " hardware driver " RNG_VERSION +#define PFX RNG_MODULE_NAME ": " + + +/* + * debugging macros + */ +#undef RNG_DEBUG /* define to enable copious debugging info */ + +#ifdef RNG_DEBUG +/* note: prints function name for you */ +#define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __FUNCTION__ , ## args) +#else +#define DPRINTK(fmt, args...) +#endif + +#undef RNG_NDEBUG /* define to disable lightweight runtime checks */ +#ifdef RNG_NDEBUG +#define assert(expr) +#else +#define assert(expr) \ + if(!(expr)) { \ + printk( "Assertion failed! %s,%s,%s,line=%d\n", \ + #expr,__FILE__,__FUNCTION__,__LINE__); \ + } +#endif + +#define RNG_MISCDEV_MINOR 183 /* official */ + +/* + * various RNG status variables. they are globals + * as we only support a single RNG device + */ + +static u32 pmbase; /* PMxx I/O base */ +static struct semaphore rng_open_sem; /* Semaphore for serializing rng_open/release */ + + +/* + * inlined helper functions for accessing RNG registers + */ + +static inline int rng_data_present (void) +{ + return inl(pmbase+0xF4) & 1; +} + + +static inline int rng_data_read (void) +{ + return inl(pmbase+0xF0); +} + +static int rng_dev_open (struct inode *inode, struct file *filp) +{ + if ((filp->f_mode & FMODE_READ) == 0) + return -EINVAL; + if (filp->f_mode & FMODE_WRITE) + return -EINVAL; + + /* wait for device to become free */ + if (filp->f_flags & O_NONBLOCK) { + if (down_trylock (&rng_open_sem)) + return -EAGAIN; + } else { + if (down_interruptible (&rng_open_sem)) + return -ERESTARTSYS; + } + return 0; +} + + +static int rng_dev_release (struct inode *inode, struct file *filp) +{ + up(&rng_open_sem); + return 0; +} + + +static ssize_t rng_dev_read (struct file *filp, char *buf, size_t size, + loff_t * offp) +{ + static spinlock_t rng_lock = SPIN_LOCK_UNLOCKED; + int have_data; + u32 data = 0; + ssize_t ret = 0; + + while (size) { + spin_lock(&rng_lock); + + have_data = 0; + if (rng_data_present()) { + data = rng_data_read(); + have_data = 4; + } + + spin_unlock (&rng_lock); + + while (have_data > 0) { + if (put_user((u8)data, buf++)) { + ret = ret ? : -EFAULT; + break; + } + size--; + ret++; + have_data--; + data>>=8; + } + + if (filp->f_flags & O_NONBLOCK) + return ret ? : -EAGAIN; + + if(need_resched()) + { + current->state = TASK_INTERRUPTIBLE; + schedule_timeout(1); + } + else + udelay(200); /* FIXME: We could poll for 250uS ?? */ + + if (signal_pending (current)) + return ret ? : -ERESTARTSYS; + } + return ret; +} + + +static struct file_operations rng_chrdev_ops = { + owner: THIS_MODULE, + open: rng_dev_open, + release: rng_dev_release, + read: rng_dev_read, +}; + + +static struct miscdevice rng_miscdev = { + RNG_MISCDEV_MINOR, + RNG_MODULE_NAME, + &rng_chrdev_ops, +}; + + +/* + * rng_init_one - look for and attempt to init a single RNG + */ +static int __init rng_init_one (struct pci_dev *dev) +{ + int rc; + u8 rnen; + + DPRINTK ("ENTER\n"); + + rc = misc_register (&rng_miscdev); + if (rc) { + printk (KERN_ERR PFX "cannot register misc device\n"); + DPRINTK ("EXIT, returning %d\n", rc); + goto err_out; + } + + pci_read_config_dword(dev, 0x58, &pmbase); + + pmbase&=0x0000FF00; + + if(pmbase == 0) + { + printk (KERN_ERR PFX "power management base not set\n"); + DPRINTK ("EXIT, returning %d\n", rc); + goto err_out_free_miscdev; + } + + pci_read_config_byte(dev, 0x40, &rnen); + rnen|=(1<<7); /* RNG on */ + pci_write_config_byte(dev, 0x40, rnen); + + pci_read_config_byte(dev, 0x41, &rnen); + rnen|=(1<<7); /* PMIO enable */ + pci_write_config_byte(dev, 0x41, rnen); + + printk(KERN_INFO PFX "AMD768 system management I/O registers at 0x%X.\n", pmbase); + DPRINTK ("EXIT, returning 0\n"); + return 0; + +err_out_free_miscdev: + misc_deregister (&rng_miscdev); +err_out: + return rc; +} + + +/* + * Data for PCI driver interface + * + * This data only exists for exporting the supported + * PCI ids via MODULE_DEVICE_TABLE. We do not actually + * register a pci_driver, because someone else might one day + * want to register another driver on the same PCI id. + */ +static struct pci_device_id rng_pci_tbl[] __initdata = { + { 0x1022, 0x7443, PCI_ANY_ID, PCI_ANY_ID, }, + { 0, }, +}; +MODULE_DEVICE_TABLE (pci, rng_pci_tbl); + + +MODULE_AUTHOR("Alan Cox, Jeff Garzik, Philipp Rumpf, Matt Sottek"); +MODULE_DESCRIPTION("AMD 768 Random Number Generator (RNG) driver"); +MODULE_LICENSE("GPL"); + + +/* + * rng_init - initialize RNG module + */ +static int __init rng_init (void) +{ + int rc; + struct pci_dev *pdev; + + DPRINTK ("ENTER\n"); + + init_MUTEX (&rng_open_sem); + + pci_for_each_dev(pdev) { + if (pci_match_device (rng_pci_tbl, pdev) != NULL) + goto match; + } + + DPRINTK ("EXIT, returning -ENODEV\n"); + return -ENODEV; + +match: + rc = rng_init_one (pdev); + if (rc) + return rc; + + printk (KERN_INFO RNG_DRIVER_NAME " loaded\n"); + + DPRINTK ("EXIT, returning 0\n"); + return 0; +} + + +/* + * rng_init - shutdown RNG module + */ +static void __exit rng_cleanup (void) +{ + DPRINTK ("ENTER\n"); + misc_deregister (&rng_miscdev); + DPRINTK ("EXIT\n"); +} + + +module_init (rng_init); +module_exit (rng_cleanup); diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/char/Config.help linux.2.5.40-ac2/drivers/char/Config.help --- linux.2.5.40/drivers/char/Config.help 2002-10-02 21:33:46.000000000 +0100 +++ linux.2.5.40-ac2/drivers/char/Config.help 2002-10-02 23:45:38.000000000 +0100 @@ -648,6 +648,21 @@ If unsure, say N. +CONFIG_AMD_RNG + This driver provides kernel-side support for the Random Number + Generator hardware found on AMD 76x based motherboards. + + Both a character driver, used to read() entropy data, and a timer + function which automatically adds entropy directly into the + kernel pool, are exported by this driver. + + To compile this driver as a module ( = code which can be inserted in + and removed from the running kernel whenever you want), say M here + and read . The module will be called + amd768_rng.o. + + If unsure, say N. + CONFIG_WATCHDOG If you say Y here (and to one of the following options) and create a character special file /dev/watchdog with major number 10 and minor diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/char/Config.in linux.2.5.40-ac2/drivers/char/Config.in --- linux.2.5.40/drivers/char/Config.in 2002-10-02 21:33:46.000000000 +0100 +++ linux.2.5.40-ac2/drivers/char/Config.in 2002-10-02 22:21:19.000000000 +0100 @@ -149,6 +149,9 @@ if [ "$CONFIG_X86" = "y" -o "$CONFIG_IA64" = "y" ]; then dep_tristate 'Intel i8x0 Random Number Generator support' CONFIG_INTEL_RNG $CONFIG_PCI fi +if [ "$CONFIG_X86" = "y" ]; then + dep_tristate 'AMD 768 Random Number Generator support' CONFIG_AMD_RNG $CONFIG_PCI +fi tristate '/dev/nvram support' CONFIG_NVRAM tristate 'Enhanced Real Time Clock Support' CONFIG_RTC if [ "$CONFIG_RTC" != "y" ]; then diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/char/drm/Config.in linux.2.5.40-ac2/drivers/char/drm/Config.in --- linux.2.5.40/drivers/char/drm/Config.in 2002-07-20 20:12:19.000000000 +0100 +++ linux.2.5.40-ac2/drivers/char/drm/Config.in 2002-10-02 22:30:21.000000000 +0100 @@ -8,7 +8,7 @@ bool 'Direct Rendering Manager (XFree86 4.1.0 and higher DRI support)' CONFIG_DRM if [ "$CONFIG_DRM" != "n" ]; then tristate ' 3dfx Banshee/Voodoo3+' CONFIG_DRM_TDFX - tristate ' 3dlabs GMX 2000' CONFIG_DRM_GAMMA +# tristate ' 3dlabs GMX 2000' CONFIG_DRM_GAMMA tristate ' ATI Rage 128' CONFIG_DRM_R128 dep_tristate ' ATI Radeon' CONFIG_DRM_RADEON $CONFIG_AGP dep_tristate ' Intel I810' CONFIG_DRM_I810 $CONFIG_AGP diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/char/Makefile linux.2.5.40-ac2/drivers/char/Makefile --- linux.2.5.40/drivers/char/Makefile 2002-10-02 21:33:52.000000000 +0100 +++ linux.2.5.40-ac2/drivers/char/Makefile 2002-10-02 22:22:56.000000000 +0100 @@ -67,6 +67,7 @@ obj-$(CONFIG_I8K) += i8k.o obj-$(CONFIG_DS1620) += ds1620.o obj-$(CONFIG_INTEL_RNG) += i810_rng.o +obj-$(CONFIG_AMD_RNG) += amd768_rng.o obj-$(CONFIG_QIC02_TAPE) += tpqic02.o obj-$(CONFIG_FTAPE) += ftape/ obj-$(CONFIG_H8) += h8.o diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/char/sysrq.c linux.2.5.40-ac2/drivers/char/sysrq.c --- linux.2.5.40/drivers/char/sysrq.c 2002-10-02 21:34:02.000000000 +0100 +++ linux.2.5.40-ac2/drivers/char/sysrq.c 2002-10-02 21:41:29.000000000 +0100 @@ -35,6 +35,10 @@ #include +#ifdef CONFIG_VOYAGER +#include +#endif + extern void reset_vc(unsigned int); extern struct list_head super_blocks; @@ -319,6 +323,14 @@ action_msg: "Terminate All Tasks", }; +#ifdef CONFIG_VOYAGER +static struct sysrq_key_op sysrq_voyager_dump_op = { + handler: voyager_dump, + help_msg: "voyager", + action_msg: "Dump Voyager Status\n", +}; +#endif + static void sysrq_handle_kill(int key, struct pt_regs *pt_regs, struct tty_struct *tty) { @@ -352,7 +364,11 @@ it is handled specially on the spark and will never arive */ /* b */ &sysrq_reboot_op, +#ifdef CONFIG_VOYAGER +/* c */ &sysrq_voyager_dump_op, +#else /* c */ NULL, +#endif /* d */ NULL, /* e */ &sysrq_term_op, /* f */ NULL, diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/char/tty_io.c linux.2.5.40-ac2/drivers/char/tty_io.c --- linux.2.5.40/drivers/char/tty_io.c 2002-10-02 21:34:05.000000000 +0100 +++ linux.2.5.40-ac2/drivers/char/tty_io.c 2002-10-02 21:54:34.000000000 +0100 @@ -155,6 +155,9 @@ extern void uart_console_init(void); extern void sgi_serial_console_init(void); extern void sci_console_init(void); +extern void m68328_console_init(void); +extern void mcfrs_console_init(void); +extern void rs_360_init(void); extern void tx3912_console_init(void); extern void tx3912_rs_init(void); extern void hvc_console_init(void); @@ -2235,6 +2238,15 @@ #ifdef CONFIG_ARC_CONSOLE arc_console_init(); #endif +#ifdef CONFIG_SERIAL_68328 + m68328_console_init(); +#endif +#ifdef CONFIG_SERIAL_COLDFIRE + mcfrs_console_init(); +#endif +#if defined (CONFIG_M68360_SMC_UART) || defined (CONFIG_M68360_SCC_UART) + rs_360_init(); +#endif #ifdef CONFIG_SERIAL_TX3912_CONSOLE tx3912_console_init(); #endif diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/ide/Config.in linux.2.5.40-ac2/drivers/ide/Config.in --- linux.2.5.40/drivers/ide/Config.in 2002-10-02 21:33:52.000000000 +0100 +++ linux.2.5.40-ac2/drivers/ide/Config.in 2002-10-03 14:53:07.000000000 +0100 @@ -31,7 +31,7 @@ dep_bool ' CMD640 enhanced support' CONFIG_BLK_DEV_CMD640_ENHANCED $CONFIG_BLK_DEV_CMD640 dep_bool ' ISA-PNP EIDE support' CONFIG_BLK_DEV_ISAPNP $CONFIG_ISAPNP if [ "$CONFIG_PCI" = "y" ]; then - bool ' Generic PCI IDE chipset support' CONFIG_BLK_DEV_IDEPCI + bool ' PCI IDE chipset support' CONFIG_BLK_DEV_IDEPCI if [ "$CONFIG_BLK_DEV_IDEPCI" = "y" ]; then dep_bool ' Generic PCI IDE Chipset Support' CONFIG_BLK_DEV_GENERIC $CONFIG_BLK_DEV_IDEPCI bool ' Sharing PCI IDE interrupts support' CONFIG_IDEPCI_SHARE_IRQ diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/ieee1394/ieee1394_core.c linux.2.5.40-ac2/drivers/ieee1394/ieee1394_core.c --- linux.2.5.40/drivers/ieee1394/ieee1394_core.c 2002-10-02 21:33:52.000000000 +0100 +++ linux.2.5.40-ac2/drivers/ieee1394/ieee1394_core.c 2002-10-03 14:20:16.000000000 +0100 @@ -378,7 +378,7 @@ packet->state = hpsb_complete; up(&packet->state_change); up(&packet->state_change); - run_task_queue(&packet->complete_tq); + flush_scheduled_tasks(); return; } @@ -390,7 +390,7 @@ spin_unlock_irqrestore(&host->pending_pkt_lock, flags); up(&packet->state_change); - queue_task(&host->timeout_tq, &tq_timer); + schedule_task(&host->timeout_tq); } /** @@ -528,7 +528,7 @@ packet->state = hpsb_complete; up(&packet->state_change); - run_task_queue(&packet->complete_tq); + flush_scheduled_tasks(); } @@ -748,7 +748,7 @@ packet->state = hpsb_complete; packet->ack_code = ACKX_ABORTED; up(&packet->state_change); - run_task_queue(&packet->complete_tq); + flush_scheduled_tasks(); } } @@ -781,7 +781,7 @@ } if (!list_empty(&host->pending_packets)) { - queue_task(&host->timeout_tq, &tq_timer); + schedule_task(&host->timeout_tq); } spin_unlock_irqrestore(&host->pending_pkt_lock, flags); @@ -790,7 +790,7 @@ packet->state = hpsb_complete; packet->ack_code = ACKX_TIMEOUT; up(&packet->state_change); - run_task_queue(&packet->complete_tq); + flush_scheduled_tasks(); } } diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/ieee1394/ieee1394_core.h linux.2.5.40-ac2/drivers/ieee1394/ieee1394_core.h --- linux.2.5.40/drivers/ieee1394/ieee1394_core.h 2002-10-02 21:33:52.000000000 +0100 +++ linux.2.5.40-ac2/drivers/ieee1394/ieee1394_core.h 2002-10-03 14:20:16.000000000 +0100 @@ -69,7 +69,7 @@ /* Very core internal, don't care. */ struct semaphore state_change; - task_queue complete_tq; + struct list_head complete_tq; /* Store jiffies for implementing bus timeouts. */ unsigned long sendtime; diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/input/mouse/Config.help linux.2.5.40-ac2/drivers/input/mouse/Config.help --- linux.2.5.40/drivers/input/mouse/Config.help 2002-07-20 20:11:33.000000000 +0100 +++ linux.2.5.40-ac2/drivers/input/mouse/Config.help 2002-10-02 22:18:49.000000000 +0100 @@ -52,7 +52,7 @@ CONFIG_MOUSE_PC110PAD Say Y if you have the IBM PC-110 micro-notebook and want its - touchscreen supported. + touchpad supported. This driver is also available as a module ( = code which can be inserted in and removed from the running kernel whenever you want). diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/isdn/act2000/act2000.h linux.2.5.40-ac2/drivers/isdn/act2000/act2000.h --- linux.2.5.40/drivers/isdn/act2000/act2000.h 2002-07-20 20:11:21.000000000 +0100 +++ linux.2.5.40-ac2/drivers/isdn/act2000/act2000.h 2002-10-03 14:19:47.000000000 +0100 @@ -179,20 +179,17 @@ extern __inline__ void act2000_schedule_tx(act2000_card *card) { - queue_task(&card->snd_tq, &tq_immediate); - mark_bh(IMMEDIATE_BH); + schedule_task(&card->snd_tq); } extern __inline__ void act2000_schedule_rx(act2000_card *card) { - queue_task(&card->rcv_tq, &tq_immediate); - mark_bh(IMMEDIATE_BH); + schedule_task(&card->rcv_tq); } extern __inline__ void act2000_schedule_poll(act2000_card *card) { - queue_task(&card->poll_tq, &tq_immediate); - mark_bh(IMMEDIATE_BH); + schedule_task(&card->poll_tq); } extern char *act2000_find_eaz(act2000_card *, char); diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/isdn/capi/kcapi.c linux.2.5.40-ac2/drivers/isdn/capi/kcapi.c --- linux.2.5.40/drivers/isdn/capi/kcapi.c 2002-07-20 20:11:33.000000000 +0100 +++ linux.2.5.40-ac2/drivers/isdn/capi/kcapi.c 2002-10-03 14:29:10.000000000 +0100 @@ -359,8 +359,7 @@ } skb_queue_tail(&recv_queue, skb); - queue_task(&tq_recv_notify, &tq_immediate); - mark_bh(IMMEDIATE_BH); + schedule_task(&tq_recv_notify); return; error: diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/isdn/eicon/eicon.h linux.2.5.40-ac2/drivers/isdn/eicon/eicon.h --- linux.2.5.40/drivers/isdn/eicon/eicon.h 2002-07-20 20:11:11.000000000 +0100 +++ linux.2.5.40-ac2/drivers/isdn/eicon/eicon.h 2002-10-03 14:19:47.000000000 +0100 @@ -349,20 +349,17 @@ extern __inline__ void eicon_schedule_tx(eicon_card *card) { - queue_task(&card->snd_tq, &tq_immediate); - mark_bh(IMMEDIATE_BH); + schedule_task(&card->snd_tq); } extern __inline__ void eicon_schedule_rx(eicon_card *card) { - queue_task(&card->rcv_tq, &tq_immediate); - mark_bh(IMMEDIATE_BH); + schedule_task(&card->rcv_tq); } extern __inline__ void eicon_schedule_ack(eicon_card *card) { - queue_task(&card->ack_tq, &tq_immediate); - mark_bh(IMMEDIATE_BH); + schedule_task(&card->ack_tq); } extern int eicon_addcard(int, int, int, char *, int); diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/isdn/eicon/linsys.c linux.2.5.40-ac2/drivers/isdn/eicon/linsys.c --- linux.2.5.40/drivers/isdn/eicon/linsys.c 2002-07-20 20:11:15.000000000 +0100 +++ linux.2.5.40-ac2/drivers/isdn/eicon/linsys.c 2002-10-03 14:19:47.000000000 +0100 @@ -84,8 +84,7 @@ DivasTask.routine = DivasDoDpc; DivasTask.data = (void *) 0; - queue_task(&DivasTask, &tq_immediate); - mark_bh(IMMEDIATE_BH); + schedule_task(&DivasTask); return 0; } @@ -97,8 +96,7 @@ DivasTask.routine = DivasDoRequestDpc; DivasTask.data = (void *) 0; - queue_task(&DivasTask, &tq_immediate); - mark_bh(IMMEDIATE_BH); + schedule_task(&DivasTask); return 0; } diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/isdn/hisax/amd7930_fn.c linux.2.5.40-ac2/drivers/isdn/hisax/amd7930_fn.c --- linux.2.5.40/drivers/isdn/hisax/amd7930_fn.c 2002-10-02 21:33:44.000000000 +0100 +++ linux.2.5.40-ac2/drivers/isdn/hisax/amd7930_fn.c 2002-10-03 14:19:47.000000000 +0100 @@ -277,8 +277,7 @@ } test_and_set_bit(event, &cs->event); - queue_task(&cs->tqueue, &tq_immediate); - mark_bh(IMMEDIATE_BH); + schedule_task(&cs->tqueue); } static void diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/isdn/hisax/avm_pci.c linux.2.5.40-ac2/drivers/isdn/hisax/avm_pci.c --- linux.2.5.40/drivers/isdn/hisax/avm_pci.c 2002-10-02 21:33:44.000000000 +0100 +++ linux.2.5.40-ac2/drivers/isdn/hisax/avm_pci.c 2002-10-03 14:19:47.000000000 +0100 @@ -200,8 +200,7 @@ hdlc_sched_event(struct BCState *bcs, int event) { bcs->event |= 1 << event; - queue_task(&bcs->tqueue, &tq_immediate); - mark_bh(IMMEDIATE_BH); + schedule_task(&bcs->tqueue); } void diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/isdn/hisax/config.c linux.2.5.40-ac2/drivers/isdn/hisax/config.c --- linux.2.5.40/drivers/isdn/hisax/config.c 2002-10-02 21:33:29.000000000 +0100 +++ linux.2.5.40-ac2/drivers/isdn/hisax/config.c 2002-10-03 14:19:47.000000000 +0100 @@ -1818,8 +1818,7 @@ static void hisax_sched_event(struct IsdnCardState *cs, int event) { cs->event |= 1 << event; - queue_task(&cs->tqueue, &tq_immediate); - mark_bh(IMMEDIATE_BH); + schedule_task(&cs->tqueue); } static void hisax_bh(struct IsdnCardState *cs) @@ -1845,8 +1844,7 @@ static void hisax_b_sched_event(struct BCState *bcs, int event) { bcs->event |= 1 << event; - queue_task(&bcs->tqueue, &tq_immediate); - mark_bh(IMMEDIATE_BH); + schedule_task(&bcs->tqueue); } static inline void D_L2L1(struct hisax_d_if *d_if, int pr, void *arg) diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/isdn/hisax/hfc_2bds0.c linux.2.5.40-ac2/drivers/isdn/hisax/hfc_2bds0.c --- linux.2.5.40/drivers/isdn/hisax/hfc_2bds0.c 2002-10-02 21:33:44.000000000 +0100 +++ linux.2.5.40-ac2/drivers/isdn/hisax/hfc_2bds0.c 2002-10-03 14:19:47.000000000 +0100 @@ -202,8 +202,7 @@ hfc_sched_event(struct BCState *bcs, int event) { bcs->event |= 1 << event; - queue_task(&bcs->tqueue, &tq_immediate); - mark_bh(IMMEDIATE_BH); + schedule_task(&bcs->tqueue); } static struct sk_buff @@ -646,8 +645,7 @@ sched_event_D(struct IsdnCardState *cs, int event) { test_and_set_bit(event, &cs->event); - queue_task(&cs->tqueue, &tq_immediate); - mark_bh(IMMEDIATE_BH); + schedule_task(&cs->tqueue); } static diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/isdn/hisax/hfc_2bs0.c linux.2.5.40-ac2/drivers/isdn/hisax/hfc_2bs0.c --- linux.2.5.40/drivers/isdn/hisax/hfc_2bs0.c 2002-10-02 21:33:44.000000000 +0100 +++ linux.2.5.40-ac2/drivers/isdn/hisax/hfc_2bs0.c 2002-10-03 14:19:47.000000000 +0100 @@ -86,8 +86,7 @@ hfc_sched_event(struct BCState *bcs, int event) { bcs->event |= 1 << event; - queue_task(&bcs->tqueue, &tq_immediate); - mark_bh(IMMEDIATE_BH); + schedule_task(&bcs->tqueue); } static void diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/isdn/hisax/hfc_pci.c linux.2.5.40-ac2/drivers/isdn/hisax/hfc_pci.c --- linux.2.5.40/drivers/isdn/hisax/hfc_pci.c 2002-10-02 21:33:44.000000000 +0100 +++ linux.2.5.40-ac2/drivers/isdn/hisax/hfc_pci.c 2002-10-03 14:19:47.000000000 +0100 @@ -194,8 +194,7 @@ sched_event_D_pci(struct IsdnCardState *cs, int event) { test_and_set_bit(event, &cs->event); - queue_task(&cs->tqueue, &tq_immediate); - mark_bh(IMMEDIATE_BH); + schedule_task(&cs->tqueue); } /*********************************/ @@ -205,8 +204,7 @@ hfcpci_sched_event(struct BCState *bcs, int event) { bcs->event |= 1 << event; - queue_task(&bcs->tqueue, &tq_immediate); - mark_bh(IMMEDIATE_BH); + schedule_task(&bcs->tqueue); } /************************************************/ diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/isdn/hisax/hfc_sx.c linux.2.5.40-ac2/drivers/isdn/hisax/hfc_sx.c --- linux.2.5.40/drivers/isdn/hisax/hfc_sx.c 2002-10-02 21:33:44.000000000 +0100 +++ linux.2.5.40-ac2/drivers/isdn/hisax/hfc_sx.c 2002-10-03 14:19:47.000000000 +0100 @@ -464,8 +464,7 @@ sched_event_D_sx(struct IsdnCardState *cs, int event) { test_and_set_bit(event, &cs->event); - queue_task(&cs->tqueue, &tq_immediate); - mark_bh(IMMEDIATE_BH); + schedule_task(&cs->tqueue); } /*********************************/ @@ -475,8 +474,7 @@ hfcsx_sched_event(struct BCState *bcs, int event) { bcs->event |= 1 << event; - queue_task(&bcs->tqueue, &tq_immediate); - mark_bh(IMMEDIATE_BH); + schedule_task(&bcs->tqueue); } /************************************************/ diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/isdn/hisax/hscx.c linux.2.5.40-ac2/drivers/isdn/hisax/hscx.c --- linux.2.5.40/drivers/isdn/hisax/hscx.c 2002-10-02 21:33:44.000000000 +0100 +++ linux.2.5.40-ac2/drivers/isdn/hisax/hscx.c 2002-10-03 14:19:47.000000000 +0100 @@ -95,8 +95,7 @@ hscx_sched_event(struct BCState *bcs, int event) { bcs->event |= 1 << event; - queue_task(&bcs->tqueue, &tq_immediate); - mark_bh(IMMEDIATE_BH); + schedule_task(&bcs->tqueue); } void diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/isdn/hisax/icc.c linux.2.5.40-ac2/drivers/isdn/hisax/icc.c --- linux.2.5.40/drivers/isdn/hisax/icc.c 2002-10-02 21:33:44.000000000 +0100 +++ linux.2.5.40-ac2/drivers/isdn/hisax/icc.c 2002-10-03 14:19:47.000000000 +0100 @@ -191,8 +191,7 @@ icc_sched_event(struct IsdnCardState *cs, int event) { test_and_set_bit(event, &cs->event); - queue_task(&cs->tqueue, &tq_immediate); - mark_bh(IMMEDIATE_BH); + schedule_task(&cs->tqueue); } void diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/isdn/hisax/ipacx.c linux.2.5.40-ac2/drivers/isdn/hisax/ipacx.c --- linux.2.5.40/drivers/isdn/hisax/ipacx.c 2002-10-02 21:33:44.000000000 +0100 +++ linux.2.5.40-ac2/drivers/isdn/hisax/ipacx.c 2002-10-03 14:19:47.000000000 +0100 @@ -304,8 +304,7 @@ dch_sched_event(struct IsdnCardState *cs, int event) { set_bit(event, &cs->event); - queue_task(&cs->tqueue, &tq_immediate); - mark_bh(IMMEDIATE_BH); + schedule_task(&cs->tqueue); } //---------------------------------------------------------- @@ -593,8 +592,7 @@ bch_sched_event(struct BCState *bcs, int event) { bcs->event |= 1 << event; - queue_task(&bcs->tqueue, &tq_immediate); - mark_bh(IMMEDIATE_BH); + schedule_task(&bcs->tqueue); } //---------------------------------------------------------- diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/isdn/hisax/isac.c linux.2.5.40-ac2/drivers/isdn/hisax/isac.c --- linux.2.5.40/drivers/isdn/hisax/isac.c 2002-10-02 21:33:44.000000000 +0100 +++ linux.2.5.40-ac2/drivers/isdn/hisax/isac.c 2002-10-03 14:19:47.000000000 +0100 @@ -195,8 +195,7 @@ isac_sched_event(struct IsdnCardState *cs, int event) { test_and_set_bit(event, &cs->event); - queue_task(&cs->tqueue, &tq_immediate); - mark_bh(IMMEDIATE_BH); + schedule_task(&cs->tqueue); } void diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/isdn/hisax/isar.c linux.2.5.40-ac2/drivers/isdn/hisax/isar.c --- linux.2.5.40/drivers/isdn/hisax/isar.c 2002-10-02 21:33:44.000000000 +0100 +++ linux.2.5.40-ac2/drivers/isdn/hisax/isar.c 2002-10-03 14:19:47.000000000 +0100 @@ -447,8 +447,7 @@ isar_sched_event(struct BCState *bcs, int event) { bcs->event |= 1 << event; - queue_task(&bcs->tqueue, &tq_immediate); - mark_bh(IMMEDIATE_BH); + schedule_task(&bcs->tqueue); } static inline void diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/isdn/hisax/jade.c linux.2.5.40-ac2/drivers/isdn/hisax/jade.c --- linux.2.5.40/drivers/isdn/hisax/jade.c 2002-10-02 21:33:44.000000000 +0100 +++ linux.2.5.40-ac2/drivers/isdn/hisax/jade.c 2002-10-03 14:19:47.000000000 +0100 @@ -138,8 +138,7 @@ jade_sched_event(struct BCState *bcs, int event) { bcs->event |= 1 << event; - queue_task(&bcs->tqueue, &tq_immediate); - mark_bh(IMMEDIATE_BH); + schedule_task(&bcs->tqueue); } static void diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/isdn/hisax/netjet.c linux.2.5.40-ac2/drivers/isdn/hisax/netjet.c --- linux.2.5.40/drivers/isdn/hisax/netjet.c 2002-10-02 21:33:44.000000000 +0100 +++ linux.2.5.40-ac2/drivers/isdn/hisax/netjet.c 2002-10-03 14:19:47.000000000 +0100 @@ -434,8 +434,7 @@ skb_queue_tail(&bcs->rqueue, skb); } bcs->event |= 1 << B_RCVBUFREADY; - queue_task(&bcs->tqueue, &tq_immediate); - mark_bh(IMMEDIATE_BH); + schedule_task(&bcs->tqueue); if (bcs->cs->debug & L1_DEB_RECEIVE_FRAME) printframe(bcs->cs, bcs->hw.tiger.rcvbuf, count, "rec"); @@ -791,8 +790,7 @@ cnt - s_cnt); } bcs->event |= 1 << B_XMTBUFREADY; - queue_task(&bcs->tqueue, &tq_immediate); - mark_bh(IMMEDIATE_BH); + schedule_task(&bcs->tqueue); } } } else if (test_and_clear_bit(BC_FLG_NOFRAME, &bcs->Flag)) { diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/isdn/hisax/w6692.c linux.2.5.40-ac2/drivers/isdn/hisax/w6692.c --- linux.2.5.40/drivers/isdn/hisax/w6692.c 2002-10-02 21:33:44.000000000 +0100 +++ linux.2.5.40-ac2/drivers/isdn/hisax/w6692.c 2002-10-03 14:19:47.000000000 +0100 @@ -135,16 +135,14 @@ W6692_sched_event(struct IsdnCardState *cs, int event) { test_and_set_bit(event, &cs->event); - queue_task(&cs->tqueue, &tq_immediate); - mark_bh(IMMEDIATE_BH); + schedule_task(&cs->tqueue); } static void W6692B_sched_event(struct BCState *bcs, int event) { bcs->event |= 1 << event; - queue_task(&bcs->tqueue, &tq_immediate); - mark_bh(IMMEDIATE_BH); + schedule_task(&bcs->tqueue); } static void diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/isdn/hysdn/boardergo.c linux.2.5.40-ac2/drivers/isdn/hysdn/boardergo.c --- linux.2.5.40/drivers/isdn/hysdn/boardergo.c 2002-10-02 21:33:19.000000000 +0100 +++ linux.2.5.40-ac2/drivers/isdn/hysdn/boardergo.c 2002-10-03 14:19:47.000000000 +0100 @@ -59,10 +59,9 @@ b |= dpr->ToHyInt; /* and for champ */ /* start kernel task immediately after leaving all interrupts */ - if (!card->hw_lock) { - queue_task(&card->irq_queue, &tq_immediate); - mark_bh(IMMEDIATE_BH); - } + if (!card->hw_lock) + schedule_task(&card->irq_queue); + restore_flags(flags); } /* ergo_interrupt */ @@ -177,8 +176,7 @@ card->err_log_state = ERRLOG_STATE_STOP; /* request stop */ restore_flags(flags); - queue_task(&card->irq_queue, &tq_immediate); - mark_bh(IMMEDIATE_BH); + schedule_task(&card->irq_queue); } /* ergo_set_errlog_state */ /******************************************/ diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/isdn/hysdn/hycapi.c linux.2.5.40-ac2/drivers/isdn/hysdn/hycapi.c --- linux.2.5.40/drivers/isdn/hysdn/hycapi.c 2002-07-20 20:11:07.000000000 +0100 +++ linux.2.5.40-ac2/drivers/isdn/hysdn/hycapi.c 2002-10-03 14:31:01.000000000 +0100 @@ -131,8 +131,7 @@ } cinfo->tx_skb = skb; spin_unlock_irq(&cinfo->lock); - queue_task(&card->irq_queue, &tq_immediate); - mark_bh(IMMEDIATE_BH); + schedule_task(&card->irq_queue); } /*********************************************************** diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/isdn/hysdn/hysdn_net.c linux.2.5.40-ac2/drivers/isdn/hysdn/hysdn_net.c --- linux.2.5.40/drivers/isdn/hysdn/hysdn_net.c 2002-10-02 21:33:44.000000000 +0100 +++ linux.2.5.40-ac2/drivers/isdn/hysdn/hysdn_net.c 2002-10-03 14:19:47.000000000 +0100 @@ -168,10 +168,9 @@ spin_unlock_irq(&lp->lock); - if (lp->sk_count <= 3) { - queue_task(&((hysdn_card *) dev->priv)->irq_queue, &tq_immediate); - mark_bh(IMMEDIATE_BH); - } + if (lp->sk_count <= 3) + schedule_task(&((hysdn_card *) dev->priv)->irq_queue); + return (0); /* success */ } /* net_send_packet */ diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/isdn/hysdn/hysdn_sched.c linux.2.5.40-ac2/drivers/isdn/hysdn/hysdn_sched.c --- linux.2.5.40/drivers/isdn/hysdn/hysdn_sched.c 2002-07-20 20:11:08.000000000 +0100 +++ linux.2.5.40-ac2/drivers/isdn/hysdn/hysdn_sched.c 2002-10-03 14:19:47.000000000 +0100 @@ -175,8 +175,8 @@ card->async_busy = 1; /* request transfer */ /* now queue the task */ - queue_task(&card->irq_queue, &tq_immediate); - mark_bh(IMMEDIATE_BH); + schedule_task(&card->irq_queue); + sti(); if (card->debug_flags & LOG_SCHED_ASYN) diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/isdn/i4l/isdn_concap.c linux.2.5.40-ac2/drivers/isdn/i4l/isdn_concap.c --- linux.2.5.40/drivers/isdn/i4l/isdn_concap.c 2002-10-02 21:34:05.000000000 +0100 +++ linux.2.5.40-ac2/drivers/isdn/i4l/isdn_concap.c 2002-10-03 14:19:47.000000000 +0100 @@ -19,7 +19,9 @@ #include "isdn_net.h" #include #include "isdn_concap.h" +#include +#ifdef CONFIG_ISDN_X25 /* The following set of device service operations are for encapsulation protocols that require for reliable datalink semantics. That means: diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/isdn/i4l/isdn_net.c linux.2.5.40-ac2/drivers/isdn/i4l/isdn_net.c --- linux.2.5.40/drivers/isdn/i4l/isdn_net.c 2002-10-02 21:34:05.000000000 +0100 +++ linux.2.5.40-ac2/drivers/isdn/i4l/isdn_net.c 2002-10-03 14:19:47.000000000 +0100 @@ -161,8 +161,7 @@ if (!(isdn_net_device_busy(lp))) { if (!skb_queue_empty(&lp->super_tx_queue)) { - queue_task(&lp->tqueue, &tq_immediate); - mark_bh(IMMEDIATE_BH); + schedule_task(&lp->tqueue); } else { isdn_net_device_wake_queue(lp); } @@ -852,8 +851,7 @@ // we can't grab the lock from irq context, // so we just queue the packet skb_queue_tail(&lp->super_tx_queue, skb); - queue_task(&lp->tqueue, &tq_immediate); - mark_bh(IMMEDIATE_BH); + schedule_task(&lp->tqueue); return; } diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/isdn/i4l/isdn_tty.c linux.2.5.40-ac2/drivers/isdn/i4l/isdn_tty.c --- linux.2.5.40/drivers/isdn/i4l/isdn_tty.c 2002-10-02 21:33:21.000000000 +0100 +++ linux.2.5.40-ac2/drivers/isdn/i4l/isdn_tty.c 2002-10-03 14:19:47.000000000 +0100 @@ -101,7 +101,7 @@ #endif if (info->emu.mdmreg[REG_CPPP] & BIT_CPPP) tty->flip.flag_buf_ptr[len - 1] = 0xff; - queue_task(&tty->flip.tqueue, &tq_timer); + schedule_task(&tty->flip.tqueue); kfree_skb(skb); return 1; } @@ -153,7 +153,7 @@ tty->flip.flag_buf_ptr += r; tty->flip.char_buf_ptr += r; if (r) - queue_task(&tty->flip.tqueue, &tq_timer); + schedule_task(&tty->flip.tqueue); restore_flags(flags); } } else @@ -2498,7 +2498,7 @@ } else { restore_flags(flags); - queue_task(&tty->flip.tqueue, &tq_timer); + schedule_task(&tty->flip.tqueue); } } diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/isdn/pcbit/layer2.c linux.2.5.40-ac2/drivers/isdn/pcbit/layer2.c --- linux.2.5.40/drivers/isdn/pcbit/layer2.c 2002-07-20 20:11:30.000000000 +0100 +++ linux.2.5.40-ac2/drivers/isdn/pcbit/layer2.c 2002-10-03 14:31:40.000000000 +0100 @@ -81,8 +81,7 @@ static __inline__ void pcbit_sched_delivery(struct pcbit_dev *dev) { - queue_task(&dev->qdelivery, &tq_immediate); - mark_bh(IMMEDIATE_BH); + schedule_task(&dev->qdelivery); } diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/isdn/tpam/tpam_queues.c linux.2.5.40-ac2/drivers/isdn/tpam/tpam_queues.c --- linux.2.5.40/drivers/isdn/tpam/tpam_queues.c 2002-07-20 20:11:06.000000000 +0100 +++ linux.2.5.40-ac2/drivers/isdn/tpam/tpam_queues.c 2002-10-03 14:33:06.000000000 +0100 @@ -36,8 +36,7 @@ skb_queue_tail(&card->sendq, skb); /* queue the board's send task struct for immediate treatment */ - queue_task(&card->send_tq, &tq_immediate); - mark_bh(IMMEDIATE_BH); + schedule_task(&card->send_tq); } /* @@ -58,8 +57,7 @@ skb_queue_tail(&channel->sendq, skb); /* queue the channel's send task struct for immediate treatment */ - queue_task(&channel->card->send_tq, &tq_immediate); - mark_bh(IMMEDIATE_BH); + schedule_task(&channel->card->send_tq); } /* @@ -169,8 +167,7 @@ else { /* put the message in the receive queue */ skb_queue_tail(&card->recvq, skb); - queue_task(&card->recv_tq, &tq_immediate); - mark_bh(IMMEDIATE_BH); + schedule_task(&card->recv_tq); } return; } @@ -187,8 +184,7 @@ spin_unlock(&card->lock); /* schedule the send queue for execution */ - queue_task(&card->send_tq, &tq_immediate); - mark_bh(IMMEDIATE_BH); + schedule_task(&card->send_tq); return; } diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/message/fusion/mptlan.c linux.2.5.40-ac2/drivers/message/fusion/mptlan.c --- linux.2.5.40/drivers/message/fusion/mptlan.c 2002-07-20 20:11:19.000000000 +0100 +++ linux.2.5.40-ac2/drivers/message/fusion/mptlan.c 2002-10-03 14:18:57.000000000 +0100 @@ -875,14 +875,7 @@ struct mpt_lan_priv *priv = dev->priv; if (test_and_set_bit(0, &priv->post_buckets_active) == 0) { - if (priority) { - queue_task(&priv->post_buckets_task, &tq_immediate); - mark_bh(IMMEDIATE_BH); - } else { - queue_task(&priv->post_buckets_task, &tq_timer); - dioprintk((KERN_INFO MYNAM ": post_buckets queued on " - "timer.\n")); - } + schedule_task(&priv->post_buckets_task); dioprintk((KERN_INFO MYNAM ": %s/%s: Queued post_buckets task.\n", IOC_AND_NETDEV_NAMES_s_s(dev) )); } diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/message/fusion/mptscsih.c linux.2.5.40-ac2/drivers/message/fusion/mptscsih.c --- linux.2.5.40/drivers/message/fusion/mptscsih.c 2002-10-02 21:33:52.000000000 +0100 +++ linux.2.5.40-ac2/drivers/message/fusion/mptscsih.c 2002-10-03 14:18:57.000000000 +0100 @@ -2023,7 +2023,7 @@ mptscsih_dvTask.routine = mptscsih_domainValidation; mptscsih_dvTask.data = (void *) hd; - SCHEDULE_TASK(&mptscsih_dvTask); + schedule_task(&mptscsih_dvTask); } else { spin_unlock_irqrestore(&dvtaskQ_lock, lflags); } diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/mtd/maps/Config.in linux.2.5.40-ac2/drivers/mtd/maps/Config.in --- linux.2.5.40/drivers/mtd/maps/Config.in 2002-10-02 21:33:29.000000000 +0100 +++ linux.2.5.40-ac2/drivers/mtd/maps/Config.in 2002-10-02 21:59:46.000000000 +0100 @@ -59,4 +59,8 @@ dep_tristate ' CFI Flash device mapped on the XScale IQ80310 board' CONFIG_MTD_IQ80310 $CONFIG_MTD_CFI $CONFIG_ARCH_IQ80310 fi +if [ "$CONFIG_UCLINUX" = "y" ]; then + dep_tristate ' Generic uClinux RAM/ROM filesystem support' CONFIG_MTD_UCLINUX $CONFIG_MTD_PARTITIONS +fi + endmenu diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/mtd/maps/Makefile linux.2.5.40-ac2/drivers/mtd/maps/Makefile --- linux.2.5.40/drivers/mtd/maps/Makefile 2002-07-20 20:11:03.000000000 +0100 +++ linux.2.5.40-ac2/drivers/mtd/maps/Makefile 2002-10-02 21:54:46.000000000 +0100 @@ -26,6 +26,7 @@ obj-$(CONFIG_MTD_VMAX) += vmax301.o obj-$(CONFIG_MTD_DBOX2) += dbox2-flash.o obj-$(CONFIG_MTD_OCELOT) += ocelot.o +obj-$(CONFIG_MTD_UCLINUX) += uclinux.o obj-$(CONFIG_MTD_SOLUTIONENGINE)+= solutionengine.o include $(TOPDIR)/Rules.make diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/mtd/maps/uclinux.c linux.2.5.40-ac2/drivers/mtd/maps/uclinux.c --- linux.2.5.40/drivers/mtd/maps/uclinux.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/drivers/mtd/maps/uclinux.c 2002-10-02 21:54:46.000000000 +0100 @@ -0,0 +1,171 @@ +/****************************************************************************/ + +/* + * uclinux.c -- generic memory mapped MTD driver for uclinux + * + * (C) Copyright 2002, Greg Ungerer (gerg@snapgear.com) + */ + +/****************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/****************************************************************************/ + +__u8 uclinux_read8(struct map_info *map, unsigned long ofs) +{ + return(*((__u8 *) (map->map_priv_1 + ofs))); +} + +__u16 uclinux_read16(struct map_info *map, unsigned long ofs) +{ + return(*((__u16 *) (map->map_priv_1 + ofs))); +} + +__u32 uclinux_read32(struct map_info *map, unsigned long ofs) +{ + return(*((__u32 *) (map->map_priv_1 + ofs))); +} + +void uclinux_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len) +{ + memcpy(to, (void *)(map->map_priv_1 + from), len); +} + +void uclinux_write8(struct map_info *map, __u8 d, unsigned long adr) +{ + *((__u8 *) (map->map_priv_1 + adr)) = d; +} + +void uclinux_write16(struct map_info *map, __u16 d, unsigned long adr) +{ + *((__u16 *) (map->map_priv_1 + adr)) = d; +} + +void uclinux_write32(struct map_info *map, __u32 d, unsigned long adr) +{ + *((__u32 *) (map->map_priv_1 + adr)) = d; +} + +void uclinux_copy_to(struct map_info *map, unsigned long to, const void *from, ssize_t len) +{ + memcpy((void *) (map->map_priv_1 + to), from, len); +} + +/****************************************************************************/ + +struct map_info uclinux_ram_map = { + name: "RAM", + read8: uclinux_read8, + read16: uclinux_read16, + read32: uclinux_read32, + copy_from: uclinux_copy_from, + write8: uclinux_write8, + write16: uclinux_write16, + write32: uclinux_write32, + copy_to: uclinux_copy_to, +}; + +struct mtd_info *uclinux_ram_mtdinfo; + +/****************************************************************************/ + +struct mtd_partition uclinux_romfs[] = { + { name: "ROMfs", offset: 0 } +}; + +#define NUM_PARTITIONS (sizeof(uclinux_romfs) / sizeof(uclinux_romfs[0])) + +/****************************************************************************/ + +int uclinux_point(struct mtd_info *mtd, loff_t from, size_t len, + size_t *retlen, u_char **mtdbuf) +{ + struct map_info *map = (struct map_info *) mtd->priv; + *mtdbuf = (u_char *) (map->map_priv_1 + ((int) from)); + *retlen = len; + return(0); +} + +/****************************************************************************/ + +int __init uclinux_mtd_init(void) +{ + struct mtd_info *mtd; + struct map_info *mapp; + extern char _ebss; + + mapp = &uclinux_ram_map; + mapp->map_priv_2 = (unsigned long) &_ebss; + mapp->size = PAGE_ALIGN(*((unsigned long *)((&_ebss) + 8))); + mapp->buswidth = 4; + + printk("uclinux[mtd]: RAM probe address=0x%x size=0x%x\n", + (int) mapp->map_priv_2, (int) mapp->size); + + mapp->map_priv_1 = (unsigned long) + ioremap_nocache(mapp->map_priv_2, mapp->size); + + if (mapp->map_priv_1 == 0) { + printk("uclinux[mtd]: ioremap_nocache() failed\n"); + return(-EIO); + } + + mtd = do_map_probe("map_ram", mapp); + if (!mtd) { + printk("uclinux[mtd]: failed to find a mapping?\n"); + iounmap((void *) mapp->map_priv_1); + return(-ENXIO); + } + + mtd->module = THIS_MODULE; + mtd->point = uclinux_point; + mtd->priv = mapp; + + uclinux_ram_mtdinfo = mtd; + add_mtd_partitions(mtd, uclinux_romfs, NUM_PARTITIONS); + + printk("uclinux[mtd]: set %s to be root filesystem\n", + uclinux_romfs[0].name); + ROOT_DEV = MKDEV(MTD_BLOCK_MAJOR, 0); + put_mtd_device(mtd); + + return(0); +} + +/****************************************************************************/ + +void __exit uclinux_mtd_cleanup(void) +{ + if (uclinux_ram_mtdinfo) { + del_mtd_partitions(uclinux_ram_mtdinfo); + map_destroy(uclinux_ram_mtdinfo); + uclinux_ram_mtdinfo = NULL; + } + if (uclinux_ram_map.map_priv_1) { + iounmap((void *) uclinux_ram_map.map_priv_1); + uclinux_ram_map.map_priv_1 = 0; + } +} + +/****************************************************************************/ + +module_init(uclinux_mtd_init); +module_exit(uclinux_mtd_cleanup); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Greg Ungerer "); +MODULE_DESCRIPTION("Generic RAM based MTD for uClinux"); + +/****************************************************************************/ diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/mtd/mtdblock_ro.c linux.2.5.40-ac2/drivers/mtd/mtdblock_ro.c --- linux.2.5.40/drivers/mtd/mtdblock_ro.c 2002-10-02 21:34:05.000000000 +0100 +++ linux.2.5.40-ac2/drivers/mtd/mtdblock_ro.c 2002-10-03 14:52:04.000000000 +0100 @@ -15,6 +15,8 @@ #include #include +#include +#include #define LOCAL_END_REQUEST #define MAJOR_NR MTD_BLOCK_MAJOR @@ -47,7 +49,7 @@ return -EINVAL; } - set_capacit(disk, mtd->size>>9); + set_capacity(disk, mtd->size>>9); add_disk(disk); DEBUG(1, "ok\n"); @@ -119,7 +121,7 @@ mtd = __get_mtd_device(NULL, minor(current_request->rq_dev)); if (!mtd) { - printk("MTD device %d doesn't appear to exist any more\n", DEVICE_NR(CURRENT->rq_dev)); + printk("MTD device %s doesn't appear to exist any more\n", kdevname(DEVICE_NR(CURRENT->rq_dev))); mtdblock_end_request(current_request, 0); } diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/net/atp.c linux.2.5.40-ac2/drivers/net/atp.c --- linux.2.5.40/drivers/net/atp.c 2002-10-02 21:33:29.000000000 +0100 +++ linux.2.5.40-ac2/drivers/net/atp.c 2002-10-02 22:40:31.000000000 +0100 @@ -27,11 +27,12 @@ Modular support/softnet added by Alan Cox. + _bit abuse fixed up by Alan Cox */ static const char versionA[] = -"atp.c:v1.09 8/9/2000 Donald Becker \n"; +"atp.c:v1.09=ac 2002/10/01 Donald Becker \n"; static const char versionB[] = " http://www.scyld.com/network/atp.html\n"; @@ -164,8 +165,6 @@ MODULE_PARM_DESC(irq, "ATP IRQ number(s)"); MODULE_PARM_DESC(xcvr, "ATP tranceiver(s) (0=internal, 1=external)"); -#define RUN_AT(x) (jiffies + (x)) - /* The number of low I/O ports used by the ethercard. */ #define ETHERCARD_TOTAL_SIZE 3 @@ -223,6 +222,8 @@ If dev->base_addr == 1, always return failure. If dev->base_addr == 2, allocate space for the device and return success (detachable devices only). + + FIXME: we should use the parport layer for this */ static int __init atp_init(struct net_device *dev) { @@ -402,13 +403,13 @@ * DO : _________X_______X */ -static unsigned short __init eeprom_op(long ioaddr, unsigned int cmd) +static unsigned short __init eeprom_op(long ioaddr, u32 cmd) { unsigned eedata_out = 0; int num_bits = EE_CMD_SIZE; while (--num_bits >= 0) { - char outval = test_bit(num_bits, &cmd) ? EE_DATA_WRITE : 0; + char outval = (cmd & (1<timer); - lp->timer.expires = RUN_AT(TIMED_CHECKER); + lp->timer.expires = jiffies + TIMED_CHECKER; lp->timer.data = (unsigned long)dev; lp->timer.function = &atp_timed_checker; /* timer handler */ add_timer(&lp->timer); @@ -687,7 +688,7 @@ for (i = 0; i < 6; i++) write_reg_byte(ioaddr, PAR0 + i, dev->dev_addr[i]); #if 0 && defined(TIMED_CHECKER) - mod_timer(&lp->timer, RUN_AT(TIMED_CHECKER)); + mod_timer(&lp->timer, jiffies + TIMED_CHECKER); #endif } @@ -740,7 +741,7 @@ #endif } spin_unlock(&lp->lock); - lp->timer.expires = RUN_AT(TIMED_CHECKER); + lp->timer.expires = jiffies + TIMED_CHECKER; add_timer(&lp->timer); } #endif @@ -893,8 +894,10 @@ memset(mc_filter, 0, sizeof(mc_filter)); for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count; i++, mclist = mclist->next) - set_bit(ether_crc_le(ETH_ALEN, mclist->dmi_addr) & 0x3f, - mc_filter); + { + int filterbit = ether_crc_le(ETH_ALEN, mclist->dmi_addr) & 0x3f; + mc_filter[filterbit >> 5] |= cpu_to_le32(1 << (filterbit & 31)); + } new_mode = CMR2h_Normal; } lp->addr_mode = new_mode; diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/net/Config.in linux.2.5.40-ac2/drivers/net/Config.in --- linux.2.5.40/drivers/net/Config.in 2002-10-02 21:33:55.000000000 +0100 +++ linux.2.5.40-ac2/drivers/net/Config.in 2002-10-02 22:17:39.000000000 +0100 @@ -108,6 +108,9 @@ dep_tristate ' NI5210 support' CONFIG_NI52 $CONFIG_ISA dep_tristate ' NI6510 support' CONFIG_NI65 $CONFIG_ISA fi + if [ "$CONFIG_PCI" = "y" -o "$CONFIG_EISA" = "y" -o "$CONFIG_CARDBUS" != "n" ]; then + source drivers/net/tulip/Config.in + fi if [ "$CONFIG_ISA" = "y" -o "$CONFIG_MCA" = "y" ]; then dep_tristate ' AT1700/1720 support (EXPERIMENTAL)' CONFIG_AT1700 $CONFIG_EXPERIMENTAL fi @@ -198,6 +201,9 @@ dep_tristate ' D-Link DE600 pocket adapter support' CONFIG_DE600 $CONFIG_ISA dep_tristate ' D-Link DE620 pocket adapter support' CONFIG_DE620 $CONFIG_ISA fi + if [ "$CONFIG_M5272" = "y" ]; then + bool ' FEC ethernet controller (of ColdFire 5272)' CONFIG_FEC + fi if [ "$CONFIG_SGI_IP22" = "y" ]; then bool ' SGI Seeq ethernet controller support' CONFIG_SGISEEQ fi @@ -320,9 +326,6 @@ source drivers/net/wan/Config.in -if [ "$CONFIG_PCI" = "y" -o "$CONFIG_EISA" = "y" -o "$CONFIG_CARDBUS" != "n" ]; then - source drivers/net/tulip/Config.in -fi if [ "$CONFIG_HOTPLUG" = "y" -a "$CONFIG_PCMCIA" != "n" ]; then source drivers/net/pcmcia/Config.in fi diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/net/fec.c linux.2.5.40-ac2/drivers/net/fec.c --- linux.2.5.40/drivers/net/fec.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/drivers/net/fec.c 2002-10-02 21:54:46.000000000 +0100 @@ -0,0 +1,1928 @@ +/* + * Fast Ethernet Controller (FEC) driver for Motorola MPC8xx. + * Copyright (c) 1997 Dan Malek (dmalek@jlc.net) + * + * This version of the driver is specific to the FADS implementation, + * since the board contains control registers external to the processor + * for the control of the LevelOne LXT970 transceiver. The MPC860T manual + * describes connections using the internal parallel port I/O, which + * is basically all of Port D. + * + * Right now, I am very watseful with the buffers. I allocate memory + * pages and then divide them into 2K frame buffers. This way I know I + * have buffers large enough to hold one frame within one buffer descriptor. + * Once I get this working, I will use 64 or 128 byte CPM buffers, which + * will be much more memory efficient and will easily handle lots of + * small packets. + * + * Much better multiple PHY support by Magnus Damm. + * Copyright (c) 2000 Ericsson Radio Systems AB. + * + * Support for FEC controller of ColdFire/5272. + * Copyrught (c) 2001-2002 Greg Ungerer (gerg@snapgear.com) + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#ifdef CONFIG_M5272 +#include +#include +#include "fec.h" +#else +#include +#include +#include "commproc.h" +#endif + +static int opened = 0; +static int found = 0; + +/* + * Define the fixed address of the FEC hardware. + */ +#ifdef CONFIG_M5272 +static volatile fec_t *fec_hwp = (volatile fec_t *) (MCF_MBAR + 0x840); +static ushort my_enet_addr[] = { 0x00d0, 0xcf00, 0x0072 }; +#else +static volatile fec_t *fec_hwp = &(((immap_t *)IMAP_ADDR)->im_cpm.cp_fec) +static ushort my_enet_addr[3]; +#endif /* CONFIG_M5272 */ + +/* + * Some hardware gets it MAC address out of local flash memory. + * if this is non-zero then assume it is the address to get MAC from. + */ +#if defined(CONFIG_NETtel) +#define FEC_FLASHMAC 0xf0006006 +#elif defined(CONFIG_GILBARCONAP) +#define FEC_FLASHMAC 0xf0006000 +#elif defined (CONFIG_MTD_KeyTechnology) +#define FEC_FLASHMAC 0xffe04000 +#else +#define FEC_FLASHMAC 0 +#endif + +unsigned char *fec_flashmac = (unsigned char *) FEC_FLASHMAC; + +/* Forward declarations of some structures to support different PHYs +*/ + +typedef struct { + uint mii_data; + void (*funct)(uint mii_reg, struct net_device *dev); +} phy_cmd_t; + +typedef struct { + uint id; + char *name; + + const phy_cmd_t *config; + const phy_cmd_t *startup; + const phy_cmd_t *ack_int; + const phy_cmd_t *shutdown; +} phy_info_t; + +/* The number of Tx and Rx buffers. These are allocated from the page + * pool. The code may assume these are power of two, so it it best + * to keep them that size. + * We don't need to allocate pages for the transmitter. We just use + * the skbuffer directly. + */ +#if 1 +#define FEC_ENET_RX_PAGES 4 +#define FEC_ENET_RX_FRSIZE 2048 +#define FEC_ENET_RX_FRPPG (PAGE_SIZE / FEC_ENET_RX_FRSIZE) +#define RX_RING_SIZE (FEC_ENET_RX_FRPPG * FEC_ENET_RX_PAGES) +#define TX_RING_SIZE 8 /* Must be power of two */ +#define TX_RING_MOD_MASK 7 /* for this to work */ +#else +#define FEC_ENET_RX_PAGES 16 +#define FEC_ENET_RX_FRSIZE 2048 +#define FEC_ENET_RX_FRPPG (PAGE_SIZE / FEC_ENET_RX_FRSIZE) +#define RX_RING_SIZE (FEC_ENET_RX_FRPPG * FEC_ENET_RX_PAGES) +#define TX_RING_SIZE 16 /* Must be power of two */ +#define TX_RING_MOD_MASK 15 /* for this to work */ +#endif + +/* Interrupt events/masks. +*/ +#define FEC_ENET_HBERR ((uint)0x80000000) /* Heartbeat error */ +#define FEC_ENET_BABR ((uint)0x40000000) /* Babbling receiver */ +#define FEC_ENET_BABT ((uint)0x20000000) /* Babbling transmitter */ +#define FEC_ENET_GRA ((uint)0x10000000) /* Graceful stop complete */ +#define FEC_ENET_TXF ((uint)0x08000000) /* Full frame transmitted */ +#define FEC_ENET_TXB ((uint)0x04000000) /* A buffer was transmitted */ +#define FEC_ENET_RXF ((uint)0x02000000) /* Full frame received */ +#define FEC_ENET_RXB ((uint)0x01000000) /* A buffer was received */ +#define FEC_ENET_MII ((uint)0x00800000) /* MII interrupt */ +#define FEC_ENET_EBERR ((uint)0x00400000) /* SDMA bus error */ + +/* The FEC stores dest/src/type, data, and checksum for receive packets. + */ +#define PKT_MAXBUF_SIZE 1518 +#define PKT_MINBUF_SIZE 64 +#define PKT_MAXBLR_SIZE 1520 + +/* The FEC buffer descriptors track the ring buffers. The rx_bd_base and + * tx_bd_base always point to the base of the buffer descriptors. The + * cur_rx and cur_tx point to the currently available buffer. + * The dirty_tx tracks the current buffer that is being sent by the + * controller. The cur_tx and dirty_tx are equal under both completely + * empty and completely full conditions. The empty/ready indicator in + * the buffer descriptor determines the actual condition. + */ +struct fec_enet_private { + /* The saved address of a sent-in-place packet/buffer, for skfree(). */ + struct sk_buff* tx_skbuff[TX_RING_SIZE]; + ushort skb_cur; + ushort skb_dirty; + + /* CPM dual port RAM relative addresses. + */ + cbd_t *rx_bd_base; /* Address of Rx and Tx buffers. */ + cbd_t *tx_bd_base; + cbd_t *cur_rx, *cur_tx; /* The next free ring entry */ + cbd_t *dirty_tx; /* The ring entries to be free()ed. */ + struct net_device_stats stats; + uint tx_full; + spinlock_t lock; + + uint phy_id; + uint phy_id_done; + uint phy_status; + uint phy_speed; + phy_info_t *phy; + struct tq_struct phy_task; + + uint sequence_done; + + uint phy_addr; + + int link; + int old_link; + int full_duplex; +}; + +static int fec_enet_open(struct net_device *dev); +static int fec_enet_start_xmit(struct sk_buff *skb, struct net_device *dev); +static void fec_enet_mii(struct net_device *dev); +static void fec_enet_interrupt(int irq, void * dev_id, struct pt_regs * regs); +static void fec_enet_tx(struct net_device *dev); +static void fec_enet_rx(struct net_device *dev); +static int fec_enet_close(struct net_device *dev); +static struct net_device_stats *fec_enet_get_stats(struct net_device *dev); +static void set_multicast_list(struct net_device *dev); +static void fec_restart(struct net_device *dev, int duplex); +static void fec_stop(struct net_device *dev); + + +/* MII processing. We keep this as simple as possible. Requests are + * placed on the list (if there is room). When the request is finished + * by the MII, an optional function may be called. + */ +typedef struct mii_list { + uint mii_regval; + void (*mii_func)(uint val, struct net_device *dev); + struct mii_list *mii_next; +} mii_list_t; + +#define NMII 20 +mii_list_t mii_cmds[NMII]; +mii_list_t *mii_free; +mii_list_t *mii_head; +mii_list_t *mii_tail; + +static int mii_queue(struct net_device *dev, int request, + void (*func)(uint, struct net_device *)); + +/* Make MII read/write commands for the FEC. +*/ +#define mk_mii_read(REG) (0x60020000 | ((REG & 0x1f) << 18)) +#define mk_mii_write(REG, VAL) (0x50020000 | ((REG & 0x1f) << 18) | \ + (VAL & 0xffff)) +#define mk_mii_end 0 + +/* Transmitter timeout. +*/ +#define TX_TIMEOUT (2*HZ) + +/* Register definitions for the PHY. +*/ + +#define MII_REG_CR 0 /* Control Register */ +#define MII_REG_SR 1 /* Status Register */ +#define MII_REG_PHYIR1 2 /* PHY Identification Register 1 */ +#define MII_REG_PHYIR2 3 /* PHY Identification Register 2 */ +#define MII_REG_ANAR 4 /* A-N Advertisement Register */ +#define MII_REG_ANLPAR 5 /* A-N Link Partner Ability Register */ +#define MII_REG_ANER 6 /* A-N Expansion Register */ +#define MII_REG_ANNPTR 7 /* A-N Next Page Transmit Register */ +#define MII_REG_ANLPRNPR 8 /* A-N Link Partner Received Next Page Reg. */ + +/* values for phy_status */ + +#define PHY_CONF_ANE 0x0001 /* 1 auto-negotiation enabled */ +#define PHY_CONF_LOOP 0x0002 /* 1 loopback mode enabled */ +#define PHY_CONF_SPMASK 0x00f0 /* mask for speed */ +#define PHY_CONF_10HDX 0x0010 /* 10 Mbit half duplex supported */ +#define PHY_CONF_10FDX 0x0020 /* 10 Mbit full duplex supported */ +#define PHY_CONF_100HDX 0x0040 /* 100 Mbit half duplex supported */ +#define PHY_CONF_100FDX 0x0080 /* 100 Mbit full duplex supported */ + +#define PHY_STAT_LINK 0x0100 /* 1 up - 0 down */ +#define PHY_STAT_FAULT 0x0200 /* 1 remote fault */ +#define PHY_STAT_ANC 0x0400 /* 1 auto-negotiation complete */ +#define PHY_STAT_SPMASK 0xf000 /* mask for speed */ +#define PHY_STAT_10HDX 0x1000 /* 10 Mbit half duplex selected */ +#define PHY_STAT_10FDX 0x2000 /* 10 Mbit full duplex selected */ +#define PHY_STAT_100HDX 0x4000 /* 100 Mbit half duplex selected */ +#define PHY_STAT_100FDX 0x8000 /* 100 Mbit full duplex selected */ + + +static int +fec_enet_start_xmit(struct sk_buff *skb, struct net_device *dev) +{ + struct fec_enet_private *fep; + volatile fec_t *fecp; + volatile cbd_t *bdp; + + fep = dev->priv; + fecp = (volatile fec_t*)dev->base_addr; + + if (!fep->link) { + /* Link is down or autonegotiation is in progress. */ + return 1; + } + + /* Fill in a Tx ring entry */ + bdp = fep->cur_tx; + +#ifndef final_version + if (bdp->cbd_sc & BD_ENET_TX_READY) { + /* Ooops. All transmit buffers are full. Bail out. + * This should not happen, since dev->tbusy should be set. + */ + printk("%s: tx queue full!.\n", dev->name); + return 1; + } +#endif + + /* Clear all of the status flags. + */ + bdp->cbd_sc &= ~BD_ENET_TX_STATS; + + /* Set buffer length and buffer pointer. + */ + bdp->cbd_bufaddr = __pa(skb->data); + bdp->cbd_datlen = skb->len; + + /* Save skb pointer. + */ + fep->tx_skbuff[fep->skb_cur] = skb; + + fep->stats.tx_bytes += skb->len; + fep->skb_cur = (fep->skb_cur+1) & TX_RING_MOD_MASK; + + /* Push the data cache so the CPM does not get stale memory + * data. + */ + flush_dcache_range((unsigned long)skb->data, + (unsigned long)skb->data + skb->len); + + spin_lock_irq(&fep->lock); + + /* Send it on its way. Tell FEC its ready, interrupt when done, + * its the last BD of the frame, and to put the CRC on the end. + */ + + bdp->cbd_sc |= (BD_ENET_TX_READY | BD_ENET_TX_INTR + | BD_ENET_TX_LAST | BD_ENET_TX_TC); + + dev->trans_start = jiffies; + + /* Trigger transmission start */ + fecp->fec_x_des_active = 0x01000000; + + /* If this was the last BD in the ring, start at the beginning again. + */ + if (bdp->cbd_sc & BD_ENET_TX_WRAP) { + bdp = fep->tx_bd_base; + } else { + bdp++; + } + + if (bdp == fep->dirty_tx) { + fep->tx_full = 1; + netif_stop_queue(dev); + } + + fep->cur_tx = (cbd_t *)bdp; + + spin_unlock_irq(&fep->lock); + + return 0; +} + +static void +fec_timeout(struct net_device *dev) +{ + struct fec_enet_private *fep = dev->priv; + + printk("%s: transmit timed out.\n", dev->name); + fep->stats.tx_errors++; +#ifndef final_version + { + int i; + cbd_t *bdp; + + printk("Ring data dump: cur_tx %lx%s, dirty_tx %lx cur_rx: %lx\n", + (unsigned long)fep->cur_tx, fep->tx_full ? " (full)" : "", + (unsigned long)fep->dirty_tx, + (unsigned long)fep->cur_rx); + + bdp = fep->tx_bd_base; + printk(" tx: %u buffers\n", TX_RING_SIZE); + for (i = 0 ; i < TX_RING_SIZE; i++) { + printk(" %08x: %04x %04x %08x\n", + (uint) bdp, + bdp->cbd_sc, + bdp->cbd_datlen, + (int) bdp->cbd_bufaddr); + bdp++; + } + + bdp = fep->rx_bd_base; + printk(" rx: %lu buffers\n", (unsigned long) RX_RING_SIZE); + for (i = 0 ; i < RX_RING_SIZE; i++) { + printk(" %08x: %04x %04x %08x\n", + (uint) bdp, + bdp->cbd_sc, + bdp->cbd_datlen, + (int) bdp->cbd_bufaddr); + bdp++; + } + } +#endif + fec_restart(dev, 0); + netif_wake_queue(dev); +} + +/* The interrupt handler. + * This is called from the MPC core interrupt. + */ +static void +fec_enet_interrupt(int irq, void * dev_id, struct pt_regs * regs) +{ + struct net_device *dev = dev_id; + volatile fec_t *fecp; + uint int_events; + + fecp = (volatile fec_t*)dev->base_addr; + + /* Get the interrupt events that caused us to be here. + */ + while ((int_events = fecp->fec_ievent) != 0) { + fecp->fec_ievent = int_events; + if ((int_events & (FEC_ENET_HBERR | FEC_ENET_BABR | + FEC_ENET_BABT | FEC_ENET_EBERR)) != 0) { + printk("FEC ERROR %x\n", int_events); + } + + /* Handle receive event in its own function. + */ + if (int_events & FEC_ENET_RXF) + fec_enet_rx(dev); + + /* Transmit OK, or non-fatal error. Update the buffer + descriptors. FEC handles all errors, we just discover + them as part of the transmit process. + */ + if (int_events & FEC_ENET_TXF) + fec_enet_tx(dev); + + if (int_events & FEC_ENET_MII) + fec_enet_mii(dev); + + } +} + + +static void +fec_enet_tx(struct net_device *dev) +{ + struct fec_enet_private *fep; + volatile cbd_t *bdp; + struct sk_buff *skb; + + fep = dev->priv; + spin_lock(&fep->lock); + bdp = fep->dirty_tx; + + while ((bdp->cbd_sc&BD_ENET_TX_READY) == 0) { + if (bdp == fep->cur_tx && fep->tx_full == 0) break; + + skb = fep->tx_skbuff[fep->skb_dirty]; + /* Check for errors. */ + if (bdp->cbd_sc & (BD_ENET_TX_HB | BD_ENET_TX_LC | + BD_ENET_TX_RL | BD_ENET_TX_UN | + BD_ENET_TX_CSL)) { + fep->stats.tx_errors++; + if (bdp->cbd_sc & BD_ENET_TX_HB) /* No heartbeat */ + fep->stats.tx_heartbeat_errors++; + if (bdp->cbd_sc & BD_ENET_TX_LC) /* Late collision */ + fep->stats.tx_window_errors++; + if (bdp->cbd_sc & BD_ENET_TX_RL) /* Retrans limit */ + fep->stats.tx_aborted_errors++; + if (bdp->cbd_sc & BD_ENET_TX_UN) /* Underrun */ + fep->stats.tx_fifo_errors++; + if (bdp->cbd_sc & BD_ENET_TX_CSL) /* Carrier lost */ + fep->stats.tx_carrier_errors++; + } else { + fep->stats.tx_packets++; + } + +#ifndef final_version + if (bdp->cbd_sc & BD_ENET_TX_READY) + printk("HEY! Enet xmit interrupt and TX_READY.\n"); +#endif + /* Deferred means some collisions occurred during transmit, + * but we eventually sent the packet OK. + */ + if (bdp->cbd_sc & BD_ENET_TX_DEF) + fep->stats.collisions++; + + /* Free the sk buffer associated with this last transmit. + */ + dev_kfree_skb_any(skb); + fep->tx_skbuff[fep->skb_dirty] = NULL; + fep->skb_dirty = (fep->skb_dirty + 1) & TX_RING_MOD_MASK; + + /* Update pointer to next buffer descriptor to be transmitted. + */ + if (bdp->cbd_sc & BD_ENET_TX_WRAP) + bdp = fep->tx_bd_base; + else + bdp++; + + /* Since we have freed up a buffer, the ring is no longer + * full. + */ + if (fep->tx_full) { + fep->tx_full = 0; + if (netif_queue_stopped(dev)) + netif_wake_queue(dev); + } + } + fep->dirty_tx = (cbd_t *)bdp; + spin_unlock(&fep->lock); +} + + +/* During a receive, the cur_rx points to the current incoming buffer. + * When we update through the ring, if the next incoming buffer has + * not been given to the system, we just set the empty indicator, + * effectively tossing the packet. + */ +static void +fec_enet_rx(struct net_device *dev) +{ + struct fec_enet_private *fep; + volatile fec_t *fecp; + volatile cbd_t *bdp; + struct sk_buff *skb; + ushort pkt_len; + __u8 *data; + + fep = dev->priv; + fecp = (volatile fec_t*)dev->base_addr; + + /* First, grab all of the stats for the incoming packet. + * These get messed up if we get called due to a busy condition. + */ + bdp = fep->cur_rx; + +while (!(bdp->cbd_sc & BD_ENET_RX_EMPTY)) { + +#ifndef final_version + /* Since we have allocated space to hold a complete frame, + * the last indicator should be set. + */ + if ((bdp->cbd_sc & BD_ENET_RX_LAST) == 0) + printk("FEC ENET: rcv is not +last\n"); +#endif + + if (!opened) + goto rx_processing_done; + + /* Check for errors. */ + if (bdp->cbd_sc & (BD_ENET_RX_LG | BD_ENET_RX_SH | BD_ENET_RX_NO | + BD_ENET_RX_CR | BD_ENET_RX_OV)) { + fep->stats.rx_errors++; + if (bdp->cbd_sc & (BD_ENET_RX_LG | BD_ENET_RX_SH)) { + /* Frame too long or too short. */ + fep->stats.rx_length_errors++; + } + if (bdp->cbd_sc & BD_ENET_RX_NO) /* Frame alignment */ + fep->stats.rx_frame_errors++; + if (bdp->cbd_sc & BD_ENET_RX_CR) /* CRC Error */ + fep->stats.rx_crc_errors++; + if (bdp->cbd_sc & BD_ENET_RX_OV) /* FIFO overrun */ + fep->stats.rx_crc_errors++; + } + + /* Report late collisions as a frame error. + * On this error, the BD is closed, but we don't know what we + * have in the buffer. So, just drop this frame on the floor. + */ + if (bdp->cbd_sc & BD_ENET_RX_CL) { + fep->stats.rx_errors++; + fep->stats.rx_frame_errors++; + goto rx_processing_done; + } + + /* Process the incoming frame. + */ + fep->stats.rx_packets++; + pkt_len = bdp->cbd_datlen; + fep->stats.rx_bytes += pkt_len; + data = (__u8*)__va(bdp->cbd_bufaddr); + + /* This does 16 byte alignment, exactly what we need. + * The packet length includes FCS, but we don't want to + * include that when passing upstream as it messes up + * bridging applications. + */ + skb = dev_alloc_skb(pkt_len-4); + + if (skb == NULL) { + printk("%s: Memory squeeze, dropping packet.\n", dev->name); + fep->stats.rx_dropped++; + } else { + skb->dev = dev; + skb_put(skb,pkt_len-4); /* Make room */ + eth_copy_and_sum(skb, + (unsigned char *)__va(bdp->cbd_bufaddr), + pkt_len-4, 0); + skb->protocol=eth_type_trans(skb,dev); + netif_rx(skb); + } + rx_processing_done: + + /* Clear the status flags for this buffer. + */ + bdp->cbd_sc &= ~BD_ENET_RX_STATS; + + /* Mark the buffer empty. + */ + bdp->cbd_sc |= BD_ENET_RX_EMPTY; + + /* Update BD pointer to next entry. + */ + if (bdp->cbd_sc & BD_ENET_RX_WRAP) + bdp = fep->rx_bd_base; + else + bdp++; + +#if 1 + /* Doing this here will keep the FEC running while we process + * incoming frames. On a heavily loaded network, we should be + * able to keep up at the expense of system resources. + */ + fecp->fec_r_des_active = 0x01000000; +#endif + } /* while (!(bdp->cbd_sc & BD_ENET_RX_EMPTY)) */ + fep->cur_rx = (cbd_t *)bdp; + +#if 0 + /* Doing this here will allow us to process all frames in the + * ring before the FEC is allowed to put more there. On a heavily + * loaded network, some frames may be lost. Unfortunately, this + * increases the interrupt overhead since we can potentially work + * our way back to the interrupt return only to come right back + * here. + */ + fecp->fec_r_des_active = 0x01000000; +#endif +} + + +static void +fec_enet_mii(struct net_device *dev) +{ + struct fec_enet_private *fep; + volatile fec_t *ep; + mii_list_t *mip; + uint mii_reg; + + fep = (struct fec_enet_private *)dev->priv; + ep = fec_hwp; + mii_reg = ep->fec_mii_data; + + if ((mip = mii_head) == NULL) { + printk("MII and no head!\n"); + return; + } + + if (mip->mii_func != NULL) + (*(mip->mii_func))(mii_reg, dev); + + mii_head = mip->mii_next; + mip->mii_next = mii_free; + mii_free = mip; + + if ((mip = mii_head) != NULL) + ep->fec_mii_data = mip->mii_regval; +} + +static int +mii_queue(struct net_device *dev, int regval, void (*func)(uint, struct net_device *)) +{ + struct fec_enet_private *fep; + unsigned long flags; + mii_list_t *mip; + int retval; + + /* Add PHY address to register command. + */ + fep = dev->priv; + regval |= fep->phy_addr << 23; + + retval = 0; + + save_flags(flags); + cli(); + + if ((mip = mii_free) != NULL) { + mii_free = mip->mii_next; + mip->mii_regval = regval; + mip->mii_func = func; + mip->mii_next = NULL; + if (mii_head) { + mii_tail->mii_next = mip; + mii_tail = mip; + } + else { + mii_head = mii_tail = mip; + fec_hwp->fec_mii_data = regval; + } + } + else { + retval = 1; + } + + restore_flags(flags); + + return(retval); +} + +static void mii_do_cmd(struct net_device *dev, const phy_cmd_t *c) +{ + int k; + + if(!c) + return; + + for(k = 0; (c+k)->mii_data != mk_mii_end; k++) { + mii_queue(dev, (c+k)->mii_data, (c+k)->funct); + } +} + +static void mii_parse_sr(uint mii_reg, struct net_device *dev) +{ + struct fec_enet_private *fep = dev->priv; + volatile uint *s = &(fep->phy_status); + + *s &= ~(PHY_STAT_LINK | PHY_STAT_FAULT | PHY_STAT_ANC); + + if (mii_reg & 0x0004) + *s |= PHY_STAT_LINK; + if (mii_reg & 0x0010) + *s |= PHY_STAT_FAULT; + if (mii_reg & 0x0020) + *s |= PHY_STAT_ANC; +} + +static void mii_parse_cr(uint mii_reg, struct net_device *dev) +{ + struct fec_enet_private *fep = dev->priv; + volatile uint *s = &(fep->phy_status); + + *s &= ~(PHY_CONF_ANE | PHY_CONF_LOOP); + + if (mii_reg & 0x1000) + *s |= PHY_CONF_ANE; + if (mii_reg & 0x4000) + *s |= PHY_CONF_LOOP; +} + +static void mii_parse_anar(uint mii_reg, struct net_device *dev) +{ + struct fec_enet_private *fep = dev->priv; + volatile uint *s = &(fep->phy_status); + + *s &= ~(PHY_CONF_SPMASK); + + if (mii_reg & 0x0020) + *s |= PHY_CONF_10HDX; + if (mii_reg & 0x0040) + *s |= PHY_CONF_10FDX; + if (mii_reg & 0x0080) + *s |= PHY_CONF_100HDX; + if (mii_reg & 0x00100) + *s |= PHY_CONF_100FDX; +} + +/* ------------------------------------------------------------------------- */ +/* The Level one LXT970 is used by many boards */ + +#define MII_LXT970_MIRROR 16 /* Mirror register */ +#define MII_LXT970_IER 17 /* Interrupt Enable Register */ +#define MII_LXT970_ISR 18 /* Interrupt Status Register */ +#define MII_LXT970_CONFIG 19 /* Configuration Register */ +#define MII_LXT970_CSR 20 /* Chip Status Register */ + +static void mii_parse_lxt970_csr(uint mii_reg, struct net_device *dev) +{ + struct fec_enet_private *fep = dev->priv; + volatile uint *s = &(fep->phy_status); + + *s &= ~(PHY_STAT_SPMASK); + + if (mii_reg & 0x0800) { + if (mii_reg & 0x1000) + *s |= PHY_STAT_100FDX; + else + *s |= PHY_STAT_100HDX; + } else { + if (mii_reg & 0x1000) + *s |= PHY_STAT_10FDX; + else + *s |= PHY_STAT_10HDX; + } +} + +static phy_info_t phy_info_lxt970 = { + 0x07810000, + "LXT970", + + (const phy_cmd_t []) { /* config */ + { mk_mii_read(MII_REG_CR), mii_parse_cr }, + { mk_mii_read(MII_REG_ANAR), mii_parse_anar }, + { mk_mii_end, } + }, + (const phy_cmd_t []) { /* startup - enable interrupts */ + { mk_mii_write(MII_LXT970_IER, 0x0002), NULL }, + { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */ + { mk_mii_end, } + }, + (const phy_cmd_t []) { /* ack_int */ + /* read SR and ISR to acknowledge */ + { mk_mii_read(MII_REG_SR), mii_parse_sr }, + { mk_mii_read(MII_LXT970_ISR), NULL }, + + /* find out the current status */ + { mk_mii_read(MII_LXT970_CSR), mii_parse_lxt970_csr }, + { mk_mii_end, } + }, + (const phy_cmd_t []) { /* shutdown - disable interrupts */ + { mk_mii_write(MII_LXT970_IER, 0x0000), NULL }, + { mk_mii_end, } + }, +}; + +/* ------------------------------------------------------------------------- */ +/* The Level one LXT971 is used on some of my custom boards */ + +/* register definitions for the 971 */ + +#define MII_LXT971_PCR 16 /* Port Control Register */ +#define MII_LXT971_SR2 17 /* Status Register 2 */ +#define MII_LXT971_IER 18 /* Interrupt Enable Register */ +#define MII_LXT971_ISR 19 /* Interrupt Status Register */ +#define MII_LXT971_LCR 20 /* LED Control Register */ +#define MII_LXT971_TCR 30 /* Transmit Control Register */ + +/* + * I had some nice ideas of running the MDIO faster... + * The 971 should support 8MHz and I tried it, but things acted really + * wierd, so 2.5 MHz ought to be enough for anyone... + */ + +static void mii_parse_lxt971_sr2(uint mii_reg, struct net_device *dev) +{ + struct fec_enet_private *fep = dev->priv; + volatile uint *s = &(fep->phy_status); + + *s &= ~(PHY_STAT_SPMASK | PHY_STAT_LINK | PHY_STAT_ANC); + + if (mii_reg & 0x0400) { + fep->link = 1; + *s |= PHY_STAT_LINK; + } else { + fep->link = 0; + } + if (mii_reg & 0x0080) + *s |= PHY_STAT_ANC; + if (mii_reg & 0x4000) { + if (mii_reg & 0x0200) + *s |= PHY_STAT_100FDX; + else + *s |= PHY_STAT_100HDX; + } else { + if (mii_reg & 0x0200) + *s |= PHY_STAT_10FDX; + else + *s |= PHY_STAT_10HDX; + } + if (mii_reg & 0x0008) + *s |= PHY_STAT_FAULT; +} + +static phy_info_t phy_info_lxt971 = { + 0x0001378e, + "LXT971", + + (const phy_cmd_t []) { /* config */ + /* limit to 10MBit because my protorype board + * doesn't work with 100. */ + { mk_mii_read(MII_REG_CR), mii_parse_cr }, + { mk_mii_read(MII_REG_ANAR), mii_parse_anar }, + { mk_mii_read(MII_LXT971_SR2), mii_parse_lxt971_sr2 }, + { mk_mii_end, } + }, + (const phy_cmd_t []) { /* startup - enable interrupts */ + { mk_mii_write(MII_LXT971_IER, 0x00f2), NULL }, + { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */ + { mk_mii_write(MII_LXT971_LCR, 0xd422), NULL }, /* LED config */ + /* Somehow does the 971 tell me that the link is down + * the first read after power-up. + * read here to get a valid value in ack_int */ + { mk_mii_read(MII_REG_SR), mii_parse_sr }, + { mk_mii_end, } + }, + (const phy_cmd_t []) { /* ack_int */ + /* find out the current status */ + { mk_mii_read(MII_REG_SR), mii_parse_sr }, + { mk_mii_read(MII_LXT971_SR2), mii_parse_lxt971_sr2 }, + /* we only need to read ISR to acknowledge */ + { mk_mii_read(MII_LXT971_ISR), NULL }, + { mk_mii_end, } + }, + (const phy_cmd_t []) { /* shutdown - disable interrupts */ + { mk_mii_write(MII_LXT971_IER, 0x0000), NULL }, + { mk_mii_end, } + }, +}; + +/* ------------------------------------------------------------------------- */ +/* The Quality Semiconductor QS6612 is used on the RPX CLLF */ + +/* register definitions */ + +#define MII_QS6612_MCR 17 /* Mode Control Register */ +#define MII_QS6612_FTR 27 /* Factory Test Register */ +#define MII_QS6612_MCO 28 /* Misc. Control Register */ +#define MII_QS6612_ISR 29 /* Interrupt Source Register */ +#define MII_QS6612_IMR 30 /* Interrupt Mask Register */ +#define MII_QS6612_PCR 31 /* 100BaseTx PHY Control Reg. */ + +static void mii_parse_qs6612_pcr(uint mii_reg, struct net_device *dev) +{ + struct fec_enet_private *fep = dev->priv; + volatile uint *s = &(fep->phy_status); + + *s &= ~(PHY_STAT_SPMASK); + + switch((mii_reg >> 2) & 7) { + case 1: *s |= PHY_STAT_10HDX; break; + case 2: *s |= PHY_STAT_100HDX; break; + case 5: *s |= PHY_STAT_10FDX; break; + case 6: *s |= PHY_STAT_100FDX; break; + } +} + +static phy_info_t phy_info_qs6612 = { + 0x00181440, + "QS6612", + + (const phy_cmd_t []) { /* config */ + /* The PHY powers up isolated on the RPX, + * so send a command to allow operation. + */ + { mk_mii_write(MII_QS6612_PCR, 0x0dc0), NULL }, + + /* parse cr and anar to get some info */ + { mk_mii_read(MII_REG_CR), mii_parse_cr }, + { mk_mii_read(MII_REG_ANAR), mii_parse_anar }, + { mk_mii_end, } + }, + (const phy_cmd_t []) { /* startup - enable interrupts */ + { mk_mii_write(MII_QS6612_IMR, 0x003a), NULL }, + { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */ + { mk_mii_end, } + }, + (const phy_cmd_t []) { /* ack_int */ + /* we need to read ISR, SR and ANER to acknowledge */ + { mk_mii_read(MII_QS6612_ISR), NULL }, + { mk_mii_read(MII_REG_SR), mii_parse_sr }, + { mk_mii_read(MII_REG_ANER), NULL }, + + /* read pcr to get info */ + { mk_mii_read(MII_QS6612_PCR), mii_parse_qs6612_pcr }, + { mk_mii_end, } + }, + (const phy_cmd_t []) { /* shutdown - disable interrupts */ + { mk_mii_write(MII_QS6612_IMR, 0x0000), NULL }, + { mk_mii_end, } + }, +}; + +/* ------------------------------------------------------------------------- */ +/* AMD AM79C874 phy */ + +/* register definitions for the 874 */ + +#define MII_AM79C874_MFR 16 /* Miscellaneous Feature Register */ +#define MII_AM79C874_ICSR 17 /* Interrupt/Status Register */ +#define MII_AM79C874_DR 18 /* Diagnostic Register */ +#define MII_AM79C874_PMLR 19 /* Power and Loopback Register */ +#define MII_AM79C874_MCR 21 /* ModeControl Register */ +#define MII_AM79C874_DC 23 /* Disconnect Counter */ +#define MII_AM79C874_REC 24 /* Recieve Error Counter */ + +static void mii_parse_am79c874_dr(uint mii_reg, struct net_device *dev) +{ + struct fec_enet_private *fep = dev->priv; + volatile uint *s = &(fep->phy_status); + + *s &= ~(PHY_STAT_SPMASK | PHY_STAT_ANC); + + if (mii_reg & 0x0080) + *s |= PHY_STAT_ANC; + if (mii_reg & 0x0400) + *s |= ((mii_reg & 0x0800) ? PHY_STAT_100FDX : PHY_STAT_100HDX); + else + *s |= ((mii_reg & 0x0800) ? PHY_STAT_10FDX : PHY_STAT_10HDX); +} + +static phy_info_t phy_info_am79c874 = { + 0x00022561, + "AM79C874", + + (const phy_cmd_t []) { /* config */ + /* limit to 10MBit because my protorype board + * doesn't work with 100. */ + { mk_mii_read(MII_REG_CR), mii_parse_cr }, + { mk_mii_read(MII_REG_ANAR), mii_parse_anar }, + { mk_mii_read(MII_AM79C874_DR), mii_parse_am79c874_dr }, + { mk_mii_end, } + }, + (const phy_cmd_t []) { /* startup - enable interrupts */ + { mk_mii_write(MII_AM79C874_ICSR, 0xff00), NULL }, + { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */ + { mk_mii_read(MII_REG_SR), mii_parse_sr }, + { mk_mii_end, } + }, + (const phy_cmd_t []) { /* ack_int */ + /* find out the current status */ + { mk_mii_read(MII_REG_SR), mii_parse_sr }, + { mk_mii_read(MII_AM79C874_DR), mii_parse_am79c874_dr }, + /* we only need to read ISR to acknowledge */ + { mk_mii_read(MII_AM79C874_ICSR), NULL }, + { mk_mii_end, } + }, + (const phy_cmd_t []) { /* shutdown - disable interrupts */ + { mk_mii_write(MII_AM79C874_ICSR, 0x0000), NULL }, + { mk_mii_end, } + }, +}; + +/* ------------------------------------------------------------------------- */ + +static phy_info_t *phy_info[] = { + &phy_info_lxt970, + &phy_info_lxt971, + &phy_info_qs6612, + &phy_info_am79c874, + NULL +}; + +/* ------------------------------------------------------------------------- */ + +static void +#ifdef CONFIG_RPXCLASSIC +mii_link_interrupt(void *dev_id); +#else +mii_link_interrupt(int irq, void * dev_id, struct pt_regs * regs); +#endif + +#ifdef CONFIG_M5272 + +/* + * Code specific to Coldfire 5272 setup. + */ +static void __inline__ fec_request_intrs(struct net_device *dev, volatile fec_t *fecp) +{ + volatile unsigned long *icrp; + + /* Setup interrupt handlers. */ + if (request_irq(86, fec_enet_interrupt, 0, "fec(RX)", dev) != 0) + printk("FEC: Could not allocate FEC(RC) IRQ(86)!\n"); + if (request_irq(87, fec_enet_interrupt, 0, "fec(TX)", dev) != 0) + printk("FEC: Could not allocate FEC(RC) IRQ(87)!\n"); + if (request_irq(88, fec_enet_interrupt, 0, "fec(OTHER)", dev) != 0) + printk("FEC: Could not allocate FEC(OTHER) IRQ(88)!\n"); + if (request_irq(66, mii_link_interrupt, 0, "fec(MII)", dev) != 0) + printk("FEC: Could not allocate MII IRQ(66)!\n"); + + /* Unmask interrupt at ColdFire 5272 SIM */ + icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR3); + *icrp = 0x00000ddd; + icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR1); + *icrp = (*icrp & 0x70777777) | 0x0d000000; +} + +static void __inline__ fec_set_mii(struct net_device *dev, struct fec_enet_private *fep) +{ + volatile fec_t *fecp; + fecp = fec_hwp; + + fecp->fec_r_cntrl = 0x04; + fecp->fec_x_cntrl = 0x00; + + /* Set MII speed to 2.5 MHz + */ + fecp->fec_mii_speed = fep->phy_speed = 0x0e; + + fec_restart(dev, 0); +} + +static void __inline__ fec_get_mac(struct net_device *dev, struct fec_enet_private *fep) +{ + volatile fec_t *fecp; + unsigned char *eap, *iap, tmpaddr[6]; + int i; + + fecp = fec_hwp; + eap = (unsigned char *) my_enet_addr; + + if (fec_flashmac) { + /* + * Get MAC address from FLASH. + * If it is all 1's or 0's, use the default. + */ + iap = fec_flashmac; + if ((iap[0] == 0) && (iap[1] == 0) && (iap[2] == 0) && + (iap[3] == 0) && (iap[4] == 0) && (iap[5] == 0)) + iap = eap; + if ((iap[0] == 0xff) && (iap[1] == 0xff) && (iap[2] == 0xff) && + (iap[3] == 0xff) && (iap[4] == 0xff) && (iap[5] == 0xff)) + iap = eap; + } else { + *((unsigned long *) &tmpaddr[0]) = fecp->fec_addr_low; + *((unsigned short *) &tmpaddr[4]) = (fecp->fec_addr_high >> 16); + iap = &tmpaddr[0]; + } + + for (i=0; i<6; i++) + dev->dev_addr[i] = *eap++ = *iap++; +} + +static void __inline__ fec_enable_phy_intr(void) +{ +} + +static void __inline__ fec_disable_phy_intr(void) +{ + volatile unsigned long *icrp; + icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR1); + *icrp = (*icrp & 0x70777777) | 0x08000000; +} + +static void __inline__ fec_phy_ack_intr(void) +{ + volatile unsigned long *icrp; + /* Acknowledge the interrupt */ + icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR1); + *icrp = (*icrp & 0x77777777) | 0x08000000; +} + +static void __inline__ fec_localhw_setup(void) +{ +} + +/* + * Do not need to make region uncached on 5272. + */ +static void __inline__ fec_uncache(unsigned long addr) +{ +} + +/* ------------------------------------------------------------------------- */ + +#else + +/* + * Code sepcific to the MPC860T setup. + */ +static void __inline__ fec_request_intrs(struct net_device *dev, volatile fec_t *fecp) +{ + volatile immap_t *immap; + + immap = (immap_t *)IMAP_ADDR; /* pointer to internal registers */ + + if (request_8xxirq(FEC_INTERRUPT, fec_enet_interrupt, 0, "fec", dev) != 0) + panic("Could not allocate FEC IRQ!"); + +#ifdef CONFIG_RPXCLASSIC + /* Make Port C, bit 15 an input that causes interrupts. + */ + immap->im_ioport.iop_pcpar &= ~0x0001; + immap->im_ioport.iop_pcdir &= ~0x0001; + immap->im_ioport.iop_pcso &= ~0x0001; + immap->im_ioport.iop_pcint |= 0x0001; + cpm_install_handler(CPMVEC_PIO_PC15, mii_link_interrupt, dev); + + /* Make LEDS reflect Link status. + */ + *((uint *) RPX_CSR_ADDR) &= ~BCSR2_FETHLEDMODE; +#endif +#ifdef CONFIG_FADS + if (request_8xxirq(SIU_IRQ2, mii_link_interrupt, 0, "mii", dev) != 0) + panic("Could not allocate MII IRQ!"); +#endif +} + +static void __inline__ fec_get_mac(struct net_device *dev, struct fec_enet_private *fep) +{ + unsigned char *eap, *iap, tmpaddr[6]; + bd_t *bd; + int i; + + eap = (unsigned char *)my_enet_addr; + iap = bd->bi_enetaddr; + bd = (bd_t *)__res; + +#ifdef CONFIG_RPXCLASSIC + /* The Embedded Planet boards have only one MAC address in + * the EEPROM, but can have two Ethernet ports. For the + * FEC port, we create another address by setting one of + * the address bits above something that would have (up to + * now) been allocated. + */ + for (i=0; i<6; i++) + tmpaddr[i] = *iap++; + tmpaddr[3] |= 0x80; + iap = tmpaddr; +#endif + + for (i=0; i<6; i++) + dev->dev_addr[i] = *eap++ = *iap++; +} + +static void __inline__ fec_set_mii(struct net_device *dev, struct fec_enet_private *fep) +{ + extern uint _get_IMMR(void); + volatile immap_t *immap; + volatile fec_t *fecp; + + fecp = fec_hwp; + immap = (immap_t *)IMAP_ADDR; /* pointer to internal registers */ + + /* Configure all of port D for MII. + */ + immap->im_ioport.iop_pdpar = 0x1fff; + + /* Bits moved from Rev. D onward. + */ + if ((_get_IMMR() & 0xffff) < 0x0501) + immap->im_ioport.iop_pddir = 0x1c58; /* Pre rev. D */ + else + immap->im_ioport.iop_pddir = 0x1fff; /* Rev. D and later */ + + /* Set MII speed to 2.5 MHz + */ + fecp->fec_mii_speed = fep->phy_speed = + ((bd->bi_busfreq * 1000000) / 2500000) & 0x7e; +} + +static void __inline__ fec_enable_phy_intr(void) +{ + volatile fec_t *fecp; + fecp = fec_hwp; + + /* Enable MII command finished interrupt + */ + fecp->fec_ivec = (FEC_INTERRUPT/2) << 29; +} + +static void __inline__ fec_disable_phy_intr(void) +{ +} + +static void __inline__ fec_phy_ack_intr(void) +{ +} + +static void __inline__ fec_localhw_setup(void) +{ + volatile fec_t *fecp; + fecp = fec_hwp; + + fecp->fec_r_hash = PKT_MAXBUF_SIZE; + /* Enable big endian and don't care about SDMA FC. + */ + fecp->fec_fun_code = 0x78000000; +} + +static void __inline__ fec_uncache(unsigned long addr) +{ + pte_t *pte; + pte = va_to_pte(mem_addr); + pte_val(*pte) |= _PAGE_NO_CACHE; + flush_tlb_page(init_mm.mmap, mem_addr); +} + +#endif + +/* ------------------------------------------------------------------------- */ + +static void mii_display_status(struct net_device *dev) +{ + struct fec_enet_private *fep = dev->priv; + volatile uint *s = &(fep->phy_status); + + if (!fep->link && !fep->old_link) { + /* Link is still down - don't print anything */ + return; + } + + printk("%s: status: ", dev->name); + + if (!fep->link) { + printk("link down"); + } else { + printk("link up"); + + switch(*s & PHY_STAT_SPMASK) { + case PHY_STAT_100FDX: printk(", 100MBit Full Duplex"); break; + case PHY_STAT_100HDX: printk(", 100MBit Half Duplex"); break; + case PHY_STAT_10FDX: printk(", 10MBit Full Duplex"); break; + case PHY_STAT_10HDX: printk(", 10MBit Half Duplex"); break; + default: + printk(", Unknown speed/duplex"); + } + + if (*s & PHY_STAT_ANC) + printk(", auto-negotiation complete"); + } + + if (*s & PHY_STAT_FAULT) + printk(", remote fault"); + + printk(".\n"); +} + +static void mii_display_config(struct net_device *dev) +{ + struct fec_enet_private *fep = dev->priv; + volatile uint *s = &(fep->phy_status); + + printk("%s: config: auto-negotiation ", dev->name); + + if (*s & PHY_CONF_ANE) + printk("on"); + else + printk("off"); + + if (*s & PHY_CONF_100FDX) + printk(", 100FDX"); + if (*s & PHY_CONF_100HDX) + printk(", 100HDX"); + if (*s & PHY_CONF_10FDX) + printk(", 10FDX"); + if (*s & PHY_CONF_10HDX) + printk(", 10HDX"); + if (!(*s & PHY_CONF_SPMASK)) + printk(", No speed/duplex selected?"); + + if (*s & PHY_CONF_LOOP) + printk(", loopback enabled"); + + printk(".\n"); + + fep->sequence_done = 1; +} + +static void mii_relink(struct net_device *dev) +{ + struct fec_enet_private *fep = dev->priv; + int duplex; + + fep->link = (fep->phy_status & PHY_STAT_LINK) ? 1 : 0; + mii_display_status(dev); + fep->old_link = fep->link; + + if (fep->link) { + duplex = 0; + if (fep->phy_status + & (PHY_STAT_100FDX | PHY_STAT_10FDX)) + duplex = 1; + fec_restart(dev, duplex); + } + else + fec_stop(dev); + +#if 0 + enable_irq(fep->mii_irq); +#endif + +} + +static void mii_queue_relink(uint mii_reg, struct net_device *dev) +{ + struct fec_enet_private *fep = dev->priv; + + fep->phy_task.routine = (void *)mii_relink; + fep->phy_task.data = dev; + schedule_task(&fep->phy_task); +} + +static void mii_queue_config(uint mii_reg, struct net_device *dev) +{ + struct fec_enet_private *fep = dev->priv; + + fep->phy_task.routine = (void *)mii_display_config; + fep->phy_task.data = dev; + schedule_task(&fep->phy_task); +} + + + +phy_cmd_t phy_cmd_relink[] = { { mk_mii_read(MII_REG_CR), mii_queue_relink }, + { mk_mii_end, } }; +phy_cmd_t phy_cmd_config[] = { { mk_mii_read(MII_REG_CR), mii_queue_config }, + { mk_mii_end, } }; + + + +/* Read remainder of PHY ID. +*/ +static void +mii_discover_phy3(uint mii_reg, struct net_device *dev) +{ + struct fec_enet_private *fep; + int i; + + fep = dev->priv; + fep->phy_id |= (mii_reg & 0xffff); + printk("fec: PHY @ 0x%x, ID 0x%08x", fep->phy_addr, fep->phy_id); + + for(i = 0; phy_info[i]; i++) { + if(phy_info[i]->id == (fep->phy_id >> 4)) + break; + } + + if (phy_info[i]) + printk(" -- %s\n", phy_info[i]->name); + else + printk(" -- unknown PHY!\n"); + + fep->phy = phy_info[i]; + fep->phy_id_done = 1; +} + +/* Scan all of the MII PHY addresses looking for someone to respond + * with a valid ID. This usually happens quickly. + */ +static void +mii_discover_phy(uint mii_reg, struct net_device *dev) +{ + struct fec_enet_private *fep; + volatile fec_t *fecp; + uint phytype; + + fep = dev->priv; + fecp = fec_hwp; + + if (fep->phy_addr < 32) { + if ((phytype = (mii_reg & 0xffff)) != 0xffff && phytype != 0) { + + /* Got first part of ID, now get remainder. + */ + fep->phy_id = phytype << 16; + mii_queue(dev, mk_mii_read(MII_REG_PHYIR2), + mii_discover_phy3); + } + else { + fep->phy_addr++; + mii_queue(dev, mk_mii_read(MII_REG_PHYIR1), + mii_discover_phy); + } + } else { + printk("FEC: No PHY device found.\n"); + /* Disable external MII interface */ + fecp->fec_mii_speed = fep->phy_speed = 0; + fec_disable_phy_intr(); + } +} + +/* This interrupt occurs when the PHY detects a link change. +*/ +static void +#ifdef CONFIG_RPXCLASSIC +mii_link_interrupt(void *dev_id) +#else +mii_link_interrupt(int irq, void * dev_id, struct pt_regs * regs) +#endif +{ + struct net_device *dev = dev_id; + struct fec_enet_private *fep = dev->priv; + + fec_phy_ack_intr(); + +#if 0 + disable_irq(fep->mii_irq); /* disable now, enable later */ +#endif + + mii_do_cmd(dev, fep->phy->ack_int); + mii_do_cmd(dev, phy_cmd_relink); /* restart and display status */ + +} + +static int +fec_enet_open(struct net_device *dev) +{ + struct fec_enet_private *fep = dev->priv; + + /* I should reset the ring buffers here, but I don't yet know + * a simple way to do that. + */ + + fep->sequence_done = 0; + fep->link = 0; + + if (fep->phy) { + mii_do_cmd(dev, fep->phy->ack_int); + mii_do_cmd(dev, fep->phy->config); + mii_do_cmd(dev, phy_cmd_config); /* display configuration */ + + while(!fep->sequence_done) + schedule(); + + mii_do_cmd(dev, fep->phy->startup); + } else { + fep->link = 1; /* lets just try it and see */ + /* no phy, go full duplex, it's most likely a hub chip */ + fec_restart(dev, 1); + } + + netif_start_queue(dev); + opened = 1; + return 0; /* Success */ +} + +static int +fec_enet_close(struct net_device *dev) +{ + /* Don't know what to do yet. + */ + opened = 0; + netif_stop_queue(dev); + fec_stop(dev); + + return 0; +} + +static struct net_device_stats *fec_enet_get_stats(struct net_device *dev) +{ + struct fec_enet_private *fep = (struct fec_enet_private *)dev->priv; + + return &fep->stats; +} + +/* Set or clear the multicast filter for this adaptor. + * Skeleton taken from sunlance driver. + * The CPM Ethernet implementation allows Multicast as well as individual + * MAC address filtering. Some of the drivers check to make sure it is + * a group multicast address, and discard those that are not. I guess I + * will do the same for now, but just remove the test if you want + * individual filtering as well (do the upper net layers want or support + * this kind of feature?). + */ + +#define HASH_BITS 6 /* #bits in hash */ +#define CRC32_POLY 0xEDB88320 + +static void set_multicast_list(struct net_device *dev) +{ + struct fec_enet_private *fep; + volatile fec_t *ep; + struct dev_mc_list *dmi; + unsigned int i, j, bit, data, crc; + unsigned char hash; + + fep = (struct fec_enet_private *)dev->priv; + ep = fec_hwp; + + if (dev->flags&IFF_PROMISC) { + /* Log any net taps. */ + printk("%s: Promiscuous mode enabled.\n", dev->name); + ep->fec_r_cntrl |= 0x0008; + } else { + + ep->fec_r_cntrl &= ~0x0008; + + if (dev->flags & IFF_ALLMULTI) { + /* Catch all multicast addresses, so set the + * filter to all 1's. + */ + ep->fec_hash_table_high = 0xffffffff; + ep->fec_hash_table_low = 0xffffffff; + } else { + /* Clear filter and add the addresses in hash register. + */ + ep->fec_hash_table_high = 0; + ep->fec_hash_table_low = 0; + + dmi = dev->mc_list; + + for (j = 0; j < dev->mc_count; j++, dmi = dmi->next) + { + /* Only support group multicast for now. + */ + if (!(dmi->dmi_addr[0] & 1)) + continue; + + /* calculate crc32 value of mac address + */ + crc = 0xffffffff; + + for (i = 0; i < dmi->dmi_addrlen; i++) + { + data = dmi->dmi_addr[i]; + for (bit = 0; bit < 8; bit++, data >>= 1) + { + crc = (crc >> 1) ^ + (((crc ^ data) & 1) ? CRC32_POLY : 0); + } + } + + /* only upper 6 bits (HASH_BITS) are used + which point to specific bit in he hash registers + */ + hash = (crc >> (32 - HASH_BITS)) & 0x3f; + + if (hash > 31) + ep->fec_hash_table_high |= 1 << (hash - 32); + else + ep->fec_hash_table_low |= 1 << hash; + } + } + } +} + +/* Initialize the FEC Ethernet on 860T (or ColdFire 5272). + */ +int __init fec_enet_init(struct net_device *dev) +{ + struct fec_enet_private *fep; + unsigned long mem_addr; + volatile cbd_t *bdp; + cbd_t *cbd_base; + volatile fec_t *fecp; + int i, j; + + /* Only allow us to be probed once. */ + if (found) + return(-ENXIO); + + /* Allocate some private information. + */ + fep = (struct fec_enet_private *)kmalloc(sizeof(*fep), GFP_KERNEL); + memset(fep, 0, sizeof(*fep)); + + /* Create an Ethernet device instance. + */ + fecp = fec_hwp; + + /* Whack a reset. We should wait for this. + */ + fecp->fec_ecntrl = 1; + udelay(10); + + /* Clear and enable interrupts */ + fecp->fec_ievent = 0xffc0; + fecp->fec_imask = (FEC_ENET_TXF | FEC_ENET_TXB | + FEC_ENET_RXF | FEC_ENET_RXB | FEC_ENET_MII); + fecp->fec_hash_table_high = 0; + fecp->fec_hash_table_low = 0; + fecp->fec_r_buff_size = PKT_MAXBLR_SIZE; + fecp->fec_ecntrl = 2; + fecp->fec_r_des_active = 0x01000000; + + /* Set the Ethernet address. If using multiple Enets on the 8xx, + * this needs some work to get unique addresses. + */ + fec_get_mac(dev, fep); + + /* Allocate memory for buffer descriptors. + */ + if (((RX_RING_SIZE + TX_RING_SIZE) * sizeof(cbd_t)) > PAGE_SIZE) { + printk("FEC init error. Need more space.\n"); + printk("FEC initialization failed.\n"); + return 1; + } + mem_addr = __get_free_page(GFP_KERNEL); + cbd_base = (cbd_t *)mem_addr; + + fec_uncache(mem_addr); + + /* Set receive and transmit descriptor base. + */ + fep->rx_bd_base = cbd_base; + fep->tx_bd_base = cbd_base + RX_RING_SIZE; + + fep->dirty_tx = fep->cur_tx = fep->tx_bd_base; + fep->cur_rx = fep->rx_bd_base; + + fep->skb_cur = fep->skb_dirty = 0; + + /* Initialize the receive buffer descriptors. + */ + bdp = fep->rx_bd_base; + for (i=0; icbd_sc = BD_ENET_RX_EMPTY; + bdp->cbd_bufaddr = __pa(mem_addr); + mem_addr += FEC_ENET_RX_FRSIZE; + bdp++; + } + } + + /* Set the last buffer to wrap. + */ + bdp--; + bdp->cbd_sc |= BD_SC_WRAP; + + /* ...and the same for transmmit. + */ + bdp = fep->tx_bd_base; + for (i=0; icbd_sc = 0; + bdp->cbd_bufaddr = 0; + bdp++; + } + + /* Set the last buffer to wrap. + */ + bdp--; + bdp->cbd_sc |= BD_SC_WRAP; + + /* Set receive and transmit descriptor base. + */ + fecp->fec_r_des_start = __pa((uint)(fep->rx_bd_base)); + fecp->fec_x_des_start = __pa((uint)(fep->tx_bd_base)); + + /* Install our interrupt handlers. This varies depending on + * the architecture. + */ + fec_request_intrs(dev, fecp); + + dev->base_addr = (unsigned long)fecp; + dev->priv = fep; + + ether_setup(dev); + + /* The FEC Ethernet specific entries in the device structure. */ + dev->open = fec_enet_open; + dev->hard_start_xmit = fec_enet_start_xmit; + dev->tx_timeout = fec_timeout; + dev->watchdog_timeo = TX_TIMEOUT; + dev->stop = fec_enet_close; + dev->get_stats = fec_enet_get_stats; + dev->set_multicast_list = set_multicast_list; + + for (i=0; iname); + for (i=0; i<5; i++) + printk("%02x:", dev->dev_addr[i]); + printk("%02x\n", dev->dev_addr[5]); + + /* Queue up command to detect the PHY and initialize the + * remainder of the interface. + */ + fep->phy_id_done = 0; + fep->phy_addr = 0; + mii_queue(dev, mk_mii_read(MII_REG_PHYIR1), mii_discover_phy); + + found++; + return 0; +} + +/* This function is called to start or restart the FEC during a link + * change. This only happens when switching between half and full + * duplex. + */ +static void +fec_restart(struct net_device *dev, int duplex) +{ + struct fec_enet_private *fep; + int i; + unsigned char *eap; + volatile cbd_t *bdp; + volatile fec_t *fecp; + + fecp = fec_hwp; + + fep = dev->priv; + + /* Whack a reset. We should wait for this. + */ + fecp->fec_ecntrl = 1; + udelay(10); + + /* Enable interrupts we wish to service. + */ + fecp->fec_imask = (FEC_ENET_TXF | FEC_ENET_TXB | + FEC_ENET_RXF | FEC_ENET_RXB | FEC_ENET_MII); + + /* Clear any outstanding interrupt. + */ + fecp->fec_ievent = 0xffc0; + fec_enable_phy_intr(); + + /* Set station address. + */ + fecp->fec_addr_low = (my_enet_addr[0] << 16) | my_enet_addr[1]; + fecp->fec_addr_high = (my_enet_addr[2] << 16); + + eap = (unsigned char *)&my_enet_addr[0]; + for (i=0; i<6; i++) + dev->dev_addr[i] = *eap++; + + /* Reset all multicast. + */ + fecp->fec_hash_table_high = 0; + fecp->fec_hash_table_low = 0; + + /* Set maximum receive buffer size. + */ + fecp->fec_r_buff_size = PKT_MAXBLR_SIZE; + + fec_localhw_setup(); + + /* Set receive and transmit descriptor base. + */ + fecp->fec_r_des_start = __pa((uint)(fep->rx_bd_base)); + fecp->fec_x_des_start = __pa((uint)(fep->tx_bd_base)); + + fep->dirty_tx = fep->cur_tx = fep->tx_bd_base; + fep->cur_rx = fep->rx_bd_base; + + /* Reset SKB transmit buffers. + */ + fep->skb_cur = fep->skb_dirty = 0; + for (i=0; i<=TX_RING_MOD_MASK; i++) { + if (fep->tx_skbuff[i] != NULL) { + dev_kfree_skb_any(fep->tx_skbuff[i]); + fep->tx_skbuff[i] = NULL; + } + } + + /* Initialize the receive buffer descriptors. + */ + bdp = fep->rx_bd_base; + for (i=0; icbd_sc = BD_ENET_RX_EMPTY; + bdp++; + } + + /* Set the last buffer to wrap. + */ + bdp--; + bdp->cbd_sc |= BD_SC_WRAP; + + /* ...and the same for transmmit. + */ + bdp = fep->tx_bd_base; + for (i=0; icbd_sc = 0; + bdp->cbd_bufaddr = 0; + bdp++; + } + + /* Set the last buffer to wrap. + */ + bdp--; + bdp->cbd_sc |= BD_SC_WRAP; + + /* Enable MII mode. + */ + if (duplex) { + fecp->fec_r_cntrl = 0x04; /* MII enable */ + fecp->fec_x_cntrl = 0x04; /* FD enable */ + } + else { + fecp->fec_r_cntrl = 0x06; /* MII enable|No Rcv on Xmit */ + fecp->fec_x_cntrl = 0x00; + } + fep->full_duplex = duplex; + + /* Set MII speed. + */ + fecp->fec_mii_speed = fep->phy_speed; + + /* And last, enable the transmit and receive processing. + */ + fecp->fec_ecntrl = 2; + fecp->fec_r_des_active = 0x01000000; +} + +static void +fec_stop(struct net_device *dev) +{ + volatile fec_t *fecp; + struct fec_enet_private *fep; + + fecp = fec_hwp; + fep = dev->priv; + + fecp->fec_x_cntrl = 0x01; /* Graceful transmit stop */ + + while(!(fecp->fec_ievent & 0x10000000)); + + /* Whack a reset. We should wait for this. + */ + fecp->fec_ecntrl = 1; + udelay(10); + + /* Clear outstanding MII command interrupts. + */ + fecp->fec_ievent = FEC_ENET_MII; + fec_enable_phy_intr(); + + fecp->fec_imask = FEC_ENET_MII; + fecp->fec_mii_speed = fep->phy_speed; +} + +static struct net_device fec_dev = { + .init = fec_enet_init, +}; + +static int __init fec_enet_module_init(void) +{ + if (register_netdev(&fec_dev) != 0) + return -EIO; + return(0); +} + +module_init(fec_enet_module_init); + +MODULE_LICENSE("GPL"); diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/net/fec.h linux.2.5.40-ac2/drivers/net/fec.h --- linux.2.5.40/drivers/net/fec.h 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/drivers/net/fec.h 2002-10-02 21:54:46.000000000 +0100 @@ -0,0 +1,115 @@ +/****************************************************************************/ + +/* + * fec.h -- Fast Ethernet Controller for Motorola ColdFire 5272. + * + * (C) Copyright 2000-2001, Greg Ungerer (gerg@snapgear.com) + * (C) Copyright 2000-2001, Lineo (www.lineo.com) + */ + +/****************************************************************************/ +#ifndef FEC_H +#define FEC_H +/****************************************************************************/ + +/* + * Define device register set address map. + */ +typedef struct fec { + unsigned long fec_ecntrl; /* Ethernet control reg */ + unsigned long fec_ievent; /* Interrupt even reg */ + unsigned long fec_imask; /* Interrupt mask reg */ + unsigned long fec_ivec; /* Interrupt vec status reg */ + unsigned long fec_r_des_active; /* Receive descriptor reg */ + unsigned long fec_x_des_active; /* Transmit descriptor reg */ + unsigned long fec_reserved1[10]; + unsigned long fec_mii_data; /* MII manage frame reg */ + unsigned long fec_mii_speed; /* MII speed control reg */ + unsigned long fec_reserved2[17]; + unsigned long fec_r_bound; /* FIFO receive bound reg */ + unsigned long fec_r_fstart; /* FIFO receive start reg */ + unsigned long fec_reserved3[4]; + unsigned long fec_x_wmrk; /* FIFO transmit water mark */ + unsigned long fec_reserved4; + unsigned long fec_x_fstart; /* FIFO transmit start reg */ + unsigned long fec_reserved5[21]; + unsigned long fec_r_cntrl; /* Receive control reg */ + unsigned long fec_max_frm_len; /* Maximum frame length reg */ + unsigned long fec_reserved6[14]; + unsigned long fec_x_cntrl; /* Transmit Control reg */ + unsigned long fec_reserved7[158]; + unsigned long fec_addr_low; /* Low 32bits MAC address */ + unsigned long fec_addr_high; /* High 16bits MAC address */ + unsigned long fec_hash_table_high; /* High 32bits hash table */ + unsigned long fec_hash_table_low; /* Low 32bits hash table */ + unsigned long fec_r_des_start; /* Receive descriptor ring */ + unsigned long fec_x_des_start; /* Transmit descriptor ring */ + unsigned long fec_r_buff_size; /* Maximum receive buff size */ + unsigned long reserved8[9]; + unsigned long fec_fifo_ram[112]; /* FIFO RAM buffer */ +} fec_t; + + +/* + * Define the buffer descriptor structure. + */ +typedef struct bufdesc { + unsigned short cbd_sc; /* Control and status info */ + unsigned short cbd_datlen; /* Data length */ + unsigned long cbd_bufaddr; /* Buffer address */ +} cbd_t; + + +/* + * The following definitions courtesy of commproc.h, which where + * Copyright (c) 1997 Dan Malek (dmalek@jlc.net). + */ +#define BD_SC_EMPTY ((ushort)0x8000) /* Recieve is empty */ +#define BD_SC_READY ((ushort)0x8000) /* Transmit is ready */ +#define BD_SC_WRAP ((ushort)0x2000) /* Last buffer descriptor */ +#define BD_SC_INTRPT ((ushort)0x1000) /* Interrupt on change */ +#define BD_SC_CM ((ushort)0x0200) /* Continous mode */ +#define BD_SC_ID ((ushort)0x0100) /* Rec'd too many idles */ +#define BD_SC_P ((ushort)0x0100) /* xmt preamble */ +#define BD_SC_BR ((ushort)0x0020) /* Break received */ +#define BD_SC_FR ((ushort)0x0010) /* Framing error */ +#define BD_SC_PR ((ushort)0x0008) /* Parity error */ +#define BD_SC_OV ((ushort)0x0002) /* Overrun */ +#define BD_SC_CD ((ushort)0x0001) /* ?? */ + +/* Buffer descriptor control/status used by Ethernet receive. +*/ +#define BD_ENET_RX_EMPTY ((ushort)0x8000) +#define BD_ENET_RX_WRAP ((ushort)0x2000) +#define BD_ENET_RX_INTR ((ushort)0x1000) +#define BD_ENET_RX_LAST ((ushort)0x0800) +#define BD_ENET_RX_FIRST ((ushort)0x0400) +#define BD_ENET_RX_MISS ((ushort)0x0100) +#define BD_ENET_RX_LG ((ushort)0x0020) +#define BD_ENET_RX_NO ((ushort)0x0010) +#define BD_ENET_RX_SH ((ushort)0x0008) +#define BD_ENET_RX_CR ((ushort)0x0004) +#define BD_ENET_RX_OV ((ushort)0x0002) +#define BD_ENET_RX_CL ((ushort)0x0001) +#define BD_ENET_RX_STATS ((ushort)0x013f) /* All status bits */ + +/* Buffer descriptor control/status used by Ethernet transmit. +*/ +#define BD_ENET_TX_READY ((ushort)0x8000) +#define BD_ENET_TX_PAD ((ushort)0x4000) +#define BD_ENET_TX_WRAP ((ushort)0x2000) +#define BD_ENET_TX_INTR ((ushort)0x1000) +#define BD_ENET_TX_LAST ((ushort)0x0800) +#define BD_ENET_TX_TC ((ushort)0x0400) +#define BD_ENET_TX_DEF ((ushort)0x0200) +#define BD_ENET_TX_HB ((ushort)0x0100) +#define BD_ENET_TX_LC ((ushort)0x0080) +#define BD_ENET_TX_RL ((ushort)0x0040) +#define BD_ENET_TX_RCMASK ((ushort)0x003c) +#define BD_ENET_TX_UN ((ushort)0x0002) +#define BD_ENET_TX_CSL ((ushort)0x0001) +#define BD_ENET_TX_STATS ((ushort)0x03ff) /* All status bits */ + + +/****************************************************************************/ +#endif /* FEC_H */ diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/net/hamradio/baycom_epp.c linux.2.5.40-ac2/drivers/net/hamradio/baycom_epp.c --- linux.2.5.40/drivers/net/hamradio/baycom_epp.c 2002-10-02 21:33:21.000000000 +0100 +++ linux.2.5.40-ac2/drivers/net/hamradio/baycom_epp.c 2002-10-03 14:18:13.000000000 +0100 @@ -928,7 +928,7 @@ bc->debug_vals.mod_cycles = time2 - time1; bc->debug_vals.demod_cycles = time3 - time2; #endif /* BAYCOM_DEBUG */ - queue_task(&bc->run_bh, &tq_timer); + schedule_task(&bc->run_bh); if (!bc->skb) netif_wake_queue(dev); return; @@ -1121,7 +1121,7 @@ bc->hdlctx.slotcnt = bc->ch_params.slottime; bc->hdlctx.calibrate = 0; /* start the bottom half stuff */ - queue_task(&bc->run_bh, &tq_timer); + schedule_task(&bc->run_bh); netif_start_queue(dev); MOD_INC_USE_COUNT; return 0; diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/net/hamradio/dmascc.c linux.2.5.40-ac2/drivers/net/hamradio/dmascc.c --- linux.2.5.40/drivers/net/hamradio/dmascc.c 2002-07-20 20:11:16.000000000 +0100 +++ linux.2.5.40-ac2/drivers/net/hamradio/dmascc.c 2002-10-03 14:18:13.000000000 +0100 @@ -1073,8 +1073,7 @@ priv->rx_head = (priv->rx_head + 1) % NUM_RX_BUF; priv->rx_count++; /* Mark bottom half handler */ - queue_task(&priv->rx_task, &tq_immediate); - mark_bh(IMMEDIATE_BH); + schedule_task(&priv->rx_task); } else { priv->stats.rx_errors++; priv->stats.rx_over_errors++; diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/net/Makefile linux.2.5.40-ac2/drivers/net/Makefile --- linux.2.5.40/drivers/net/Makefile 2002-10-02 21:34:05.000000000 +0100 +++ linux.2.5.40-ac2/drivers/net/Makefile 2002-10-02 21:54:46.000000000 +0100 @@ -83,6 +83,7 @@ obj-$(CONFIG_SK_G16) += sk_g16.o obj-$(CONFIG_HP100) += hp100.o obj-$(CONFIG_SMC9194) += smc9194.o +obj-$(CONFIG_FEC) += fec.o obj-$(CONFIG_ARM_AM79C961A) += am79c961a.o obj-$(CONFIG_ARM_ETHERH) += 8390.o obj-$(CONFIG_WD80x3) += wd.o 8390.o diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/net/plip.c linux.2.5.40-ac2/drivers/net/plip.c --- linux.2.5.40/drivers/net/plip.c 2002-10-02 21:33:29.000000000 +0100 +++ linux.2.5.40-ac2/drivers/net/plip.c 2002-10-03 14:18:30.000000000 +0100 @@ -378,10 +378,8 @@ { struct net_local *nl = (struct net_local *)dev->priv; - if (nl->is_deferred) { - queue_task(&nl->immediate, &tq_immediate); - mark_bh(IMMEDIATE_BH); - } + if (nl->is_deferred) + schedule_task(&nl->immediate); } /* Forward declarations of internal routines */ @@ -432,7 +430,7 @@ if ((r = (*f)(dev, nl, snd, rcv)) != OK && (r = plip_bh_timeout_error(dev, nl, snd, rcv, r)) != OK) { nl->is_deferred = 1; - queue_task(&nl->deferred, &tq_timer); + schedule_task(&nl->deferred); } } @@ -444,7 +442,7 @@ if (!(atomic_read (&nl->kill_timer))) { plip_interrupt (-1, dev, NULL); - queue_task (&nl->timer, &tq_timer); + schedule_task (&nl->timer); } else { up (&nl->killed_timer_sem); @@ -665,7 +663,7 @@ rcv->state = PLIP_PK_DONE; nl->is_deferred = 1; nl->connection = PLIP_CN_SEND; - queue_task(&nl->deferred, &tq_timer); + schedule_task(&nl->deferred); enable_parport_interrupts (dev); ENABLE(dev->irq); return OK; @@ -740,8 +738,7 @@ if (snd->state != PLIP_PK_DONE) { nl->connection = PLIP_CN_SEND; spin_unlock_irq(&nl->lock); - queue_task(&nl->immediate, &tq_immediate); - mark_bh(IMMEDIATE_BH); + schedule_task(&nl->immediate); enable_parport_interrupts (dev); ENABLE(dev->irq); return OK; @@ -909,7 +906,7 @@ printk(KERN_DEBUG "%s: send end\n", dev->name); nl->connection = PLIP_CN_CLOSING; nl->is_deferred = 1; - queue_task(&nl->deferred, &tq_timer); + schedule_task(&nl->deferred); enable_parport_interrupts (dev); ENABLE(dev->irq); return OK; @@ -953,7 +950,7 @@ netif_wake_queue (dev); } else { nl->is_deferred = 1; - queue_task(&nl->deferred, &tq_timer); + schedule_task(&nl->deferred); } return OK; @@ -997,8 +994,7 @@ rcv->state = PLIP_PK_TRIGGER; nl->connection = PLIP_CN_RECEIVE; nl->timeout_count = 0; - queue_task(&nl->immediate, &tq_immediate); - mark_bh(IMMEDIATE_BH); + schedule_task(&nl->immediate); break; case PLIP_CN_RECEIVE: @@ -1051,8 +1047,7 @@ nl->connection = PLIP_CN_SEND; nl->timeout_count = 0; } - queue_task(&nl->immediate, &tq_immediate); - mark_bh(IMMEDIATE_BH); + schedule_task(&nl->immediate); spin_unlock_irq(&nl->lock); return 0; @@ -1131,7 +1126,7 @@ if (dev->irq == -1) { atomic_set (&nl->kill_timer, 0); - queue_task (&nl->timer, &tq_timer); + schedule_task (&nl->timer); } /* Initialize the state machine. */ diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/net/tokenring/olympic.c linux.2.5.40-ac2/drivers/net/tokenring/olympic.c --- linux.2.5.40/drivers/net/tokenring/olympic.c 2002-10-02 21:34:05.000000000 +0100 +++ linux.2.5.40-ac2/drivers/net/tokenring/olympic.c 2002-10-02 21:43:12.000000000 +0100 @@ -56,8 +56,15 @@ * 07/19/01 - Improve bad LAA reporting, strip out freemem * into a separate function, its called from 3 * different places now. - * 02/09/01 - Replaced sleep_on. - * + * 02/09/02 - Replaced sleep_on. + * 03/01/02 - Replace access to several registers from 32 bit to + * 16 bit. Fixes alignment errors on PPC 64 bit machines. + * Thanks to Al Trautman for this one. + * 03/10/02 - Fix BUG in arb_cmd. Bug was there all along but was + * silently ignored until the error checking code + * went into version 1.0.0 + * 06/04/02 - Add correct start up sequence for the cardbus adapters. + * Required for strict compliance with pci power mgmt specs. * To Do: * * Wake on lan @@ -111,7 +118,7 @@ */ static char version[] __devinitdata = -"Olympic.c v1.0.0 2/9/02 - Peter De Schrijver & Mike Phillips" ; +"Olympic.c v1.0.5 6/04/02 - Peter De Schrijver & Mike Phillips" ; static char *open_maj_error[] = {"No error", "Lobe Media Test", "Physical Insertion", "Address Verification", "Neighbor Notification (Ring Poll)", @@ -296,9 +303,10 @@ spin_lock_init(&olympic_priv->olympic_lock) ; /* Needed for cardbus */ - if(!(readl(olympic_mmio+BCTL) & BCTL_MODE_INDICATOR)) + if(!(readl(olympic_mmio+BCTL) & BCTL_MODE_INDICATOR)) { writel(readl(olympic_priv->olympic_mmio+FERMASK)|FERMASK_INT_BIT, olympic_mmio+FERMASK); - + } + #if OLYMPIC_DEBUG printk("BCTL: %x\n",readl(olympic_mmio+BCTL)); printk("GPR: %x\n",readw(olympic_mmio+GPR)); @@ -311,24 +319,42 @@ writel(readl(olympic_mmio+BCTL)|BCTL_MIMREB,olympic_mmio+BCTL); if (olympic_priv->olympic_ring_speed == 0) { /* Autosense */ - writel(readl(olympic_mmio+GPR)|GPR_AUTOSENSE,olympic_mmio+GPR); + writew(readw(olympic_mmio+GPR)|GPR_AUTOSENSE,olympic_mmio+GPR); if (olympic_priv->olympic_message_level) printk(KERN_INFO "%s: Ringspeed autosense mode on\n",olympic_priv->olympic_card_name); } else if (olympic_priv->olympic_ring_speed == 16) { if (olympic_priv->olympic_message_level) printk(KERN_INFO "%s: Trying to open at 16 Mbps as requested\n", olympic_priv->olympic_card_name); - writel(GPR_16MBPS, olympic_mmio+GPR); + writew(GPR_16MBPS, olympic_mmio+GPR); } else if (olympic_priv->olympic_ring_speed == 4) { if (olympic_priv->olympic_message_level) printk(KERN_INFO "%s: Trying to open at 4 Mbps as requested\n", olympic_priv->olympic_card_name) ; - writel(0, olympic_mmio+GPR); + writew(0, olympic_mmio+GPR); } - writel(readl(olympic_mmio+GPR)|GPR_NEPTUNE_BF,olympic_mmio+GPR); + writew(readw(olympic_mmio+GPR)|GPR_NEPTUNE_BF,olympic_mmio+GPR); #if OLYMPIC_DEBUG printk("GPR = %x\n",readw(olympic_mmio + GPR) ) ; #endif + /* Solo has been paused to meet the Cardbus power + * specs if the adapter is cardbus. Check to + * see its been paused and then restart solo. The + * adapter should set the pause bit within 1 second. + */ + + if(!(readl(olympic_mmio+BCTL) & BCTL_MODE_INDICATOR)) { + t=jiffies; + while (!readl(olympic_mmio+CLKCTL) & CLKCTL_PAUSE) { + schedule() ; + if(jiffies-t > 2*HZ) { + printk(KERN_ERR "IBM Cardbus tokenring adapter not responsing.\n") ; + return -ENODEV; + } + } + writel(readl(olympic_mmio+CLKCTL) & ~CLKCTL_PAUSE, olympic_mmio+CLKCTL) ; + } + /* start solo init */ writel((1<<15),olympic_mmio+SISR_MASK_SUM); @@ -341,13 +367,13 @@ } } - writel(readl(olympic_mmio+LAPWWO),olympic_mmio+LAPA); + writel(readw(olympic_mmio+LAPWWO),olympic_mmio+LAPA); #if OLYMPIC_DEBUG printk("LAPWWO: %x, LAPA: %x\n",readl(olympic_mmio+LAPWWO), readl(olympic_mmio+LAPA)); #endif - init_srb=olympic_priv->olympic_lap + ((readl(olympic_mmio+LAPWWO)) & (~0xf800)); + init_srb=olympic_priv->olympic_lap + ((readw(olympic_mmio+LAPWWO)) & (~0xf800)); #if OLYMPIC_DEBUG { @@ -422,11 +448,11 @@ /* adapter is closed, so SRB is pointed to by LAPWWO */ - writel(readl(olympic_mmio+LAPWWO),olympic_mmio+LAPA); - init_srb=olympic_priv->olympic_lap + ((readl(olympic_mmio+LAPWWO)) & (~0xf800)); + writel(readw(olympic_mmio+LAPWWO),olympic_mmio+LAPA); + init_srb=olympic_priv->olympic_lap + ((readw(olympic_mmio+LAPWWO)) & (~0xf800)); #if OLYMPIC_DEBUG - printk("LAPWWO: %x, LAPA: %x\n",readl(olympic_mmio+LAPWWO), readl(olympic_mmio+LAPA)); + printk("LAPWWO: %x, LAPA: %x\n",readw(olympic_mmio+LAPWWO), readl(olympic_mmio+LAPA)); printk("SISR Mask = %04x\n", readl(olympic_mmio+SISR_MASK)); printk("Before the open command \n"); #endif @@ -486,7 +512,7 @@ olympic_priv->srb_queued=0; break; } - if ((jiffies-t) > 60*HZ) { + if ((jiffies-t) > 10*HZ) { printk(KERN_WARNING "%s: SRB timed out. \n",dev->name) ; olympic_priv->srb_queued=0; break ; @@ -495,7 +521,7 @@ } remove_wait_queue(&olympic_priv->srb_wait,&wait) ; set_current_state(TASK_RUNNING) ; - + olympic_priv->srb_queued = 0 ; #if OLYMPIC_DEBUG printk("init_srb(%p): ",init_srb); for(i=0;i<20;i++) @@ -629,7 +655,8 @@ printk(" stat_ring[7]: %p\n", &(olympic_priv->olympic_rx_status_ring[7]) ); printk("RXCDA: %x, rx_ring[0]: %p\n",readl(olympic_mmio+RXCDA),&olympic_priv->olympic_rx_ring[0]); - printk("Rx_ring_dma_addr = %08x, rx_status_dma_addr = %08x\n",olympic_priv->rx_ring_dma_addr,olympic_priv->rx_status_ring_dma_addr) ; + printk("Rx_ring_dma_addr = %08x, rx_status_dma_addr = +%08x\n",olympic_priv->rx_ring_dma_addr,olympic_priv->rx_status_ring_dma_addr) ; #endif writew((((readw(olympic_mmio+RXENQ)) & 0x8000) ^ 0x8000) | i,olympic_mmio+RXENQ); @@ -790,7 +817,7 @@ first. Ideally all frames would be in a single buffer, this can be tuned by altering the buffer size. If the length of the packet is less than 1500 bytes we're going to copy it over anyway to stop packets getting - dropped from sockets with buffers small than our pkt_buf_sz. */ + dropped from sockets with buffers smaller than our pkt_buf_sz. */ if (buffer_cnt==1) { olympic_priv->rx_ring_last_received++ ; @@ -1097,10 +1124,13 @@ writel(readl(olympic_mmio+BCTL)&~(3<<13),olympic_mmio+BCTL); #if OLYMPIC_DEBUG + { + int i ; printk("srb(%p): ",srb); for(i=0;i<4;i++) printk("%x ",readb(srb+i)); printk("\n"); + } #endif free_irq(dev->irq,dev); @@ -1369,8 +1399,7 @@ arb_block = (u8 *)(olympic_priv->olympic_lap + olympic_priv->arb) ; asb_block = (u8 *)(olympic_priv->olympic_lap + olympic_priv->asb) ; srb = (u8 *)(olympic_priv->olympic_lap + olympic_priv->srb) ; - writel(readl(olympic_mmio+LAPA),olympic_mmio+LAPWWO); - + if (readb(arb_block+0) == ARB_RECEIVE_DATA) { /* Receive.data, MAC frames */ header_len = readb(arb_block+8) ; /* 802.5 Token-Ring Header Length */ @@ -1423,7 +1452,7 @@ /* Now tell the card we have dealt with the received frame */ /* Set LISR Bit 1 */ - writel(LISR_ARB_FREE,olympic_priv->olympic_lap + LISR_SUM); + writel(LISR_ARB_FREE,olympic_priv->olympic_mmio + LISR_SUM); /* Is the ASB free ? */ diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/net/tokenring/olympic.h linux.2.5.40-ac2/drivers/net/tokenring/olympic.h --- linux.2.5.40/drivers/net/tokenring/olympic.h 2002-07-20 20:12:26.000000000 +0100 +++ linux.2.5.40-ac2/drivers/net/tokenring/olympic.h 2002-10-02 21:43:12.000000000 +0100 @@ -91,6 +91,7 @@ #define TIMER 0x50 #define CLKCTL 0x74 +#define CLKCTL_PAUSE (1<<15) #define PM_CON 0x4 diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/net/tulip/winbond-840.c linux.2.5.40-ac2/drivers/net/tulip/winbond-840.c --- linux.2.5.40/drivers/net/tulip/winbond-840.c 2002-10-02 21:34:05.000000000 +0100 +++ linux.2.5.40-ac2/drivers/net/tulip/winbond-840.c 2002-10-02 22:37:54.000000000 +0100 @@ -1428,8 +1428,9 @@ memset(mc_filter, 0, sizeof(mc_filter)); for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count; i++, mclist = mclist->next) { - set_bit((ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26) ^ 0x3F, - mc_filter); + int filterbit = (ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26) ^ 0x3F; + filterbit &= 0x3f; + mc_filter[filterbit >> 5] |= cpu_to_le32(1 << (filterbit & 31)); } rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys; } diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/scsi/aacraid/aachba.c linux.2.5.40-ac2/drivers/scsi/aacraid/aachba.c --- linux.2.5.40/drivers/scsi/aacraid/aachba.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/drivers/scsi/aacraid/aachba.c 2002-10-02 21:37:46.000000000 +0100 @@ -0,0 +1,1661 @@ +/* + * Adaptec AAC series RAID controller driver + * (c) Copyright 2001 Red Hat Inc. + * + * based on the old aacraid driver that is.. + * Adaptec aacraid device driver for Linux. + * Copyright (c) 2000 Adaptec, Inc. (aacraid@adaptec.com) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; see the file COPYING. If not, write to + * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#define MAJOR_NR SCSI_DISK0_MAJOR /* For DEVICE_NR() */ +#include +#include "scsi.h" +#include "hosts.h" +#include "sd.h" + +#include "aacraid.h" + +/* FIXME: We share this with sd.c - wants putting in one spot only */ +#define DEVICE_NR(device) (((major(device) & SD_MAJOR_MASK) << (8 - 4)) + (minor(device) >> 4)) + +/* SCSI Commands */ +/* TODO: dmb - use the ones defined in include/scsi/scsi.h */ + +#define SS_TEST 0x00 /* Test unit ready */ +#define SS_REZERO 0x01 /* Rezero unit */ +#define SS_REQSEN 0x03 /* Request Sense */ +#define SS_REASGN 0x07 /* Reassign blocks */ +#define SS_READ 0x08 /* Read 6 */ +#define SS_WRITE 0x0A /* Write 6 */ +#define SS_INQUIR 0x12 /* inquiry */ +#define SS_ST_SP 0x1B /* Start/Stop unit */ +#define SS_LOCK 0x1E /* prevent/allow medium removal */ +#define SS_RESERV 0x16 /* Reserve */ +#define SS_RELES 0x17 /* Release */ +#define SS_MODESEN 0x1A /* Mode Sense 6 */ +#define SS_RDCAP 0x25 /* Read Capacity */ +#define SM_READ 0x28 /* Read 10 */ +#define SM_WRITE 0x2A /* Write 10 */ +#define SS_SEEK 0x2B /* Seek */ + +/* values for inqd_pdt: Peripheral device type in plain English */ +#define INQD_PDT_DA 0x00 /* Direct-access (DISK) device */ +#define INQD_PDT_PROC 0x03 /* Processor device */ +#define INQD_PDT_CHNGR 0x08 /* Changer (jukebox, scsi2) */ +#define INQD_PDT_COMM 0x09 /* Communication device (scsi2) */ +#define INQD_PDT_NOLUN2 0x1f /* Unknown Device (scsi2) */ +#define INQD_PDT_NOLUN 0x7f /* Logical Unit Not Present */ + +#define INQD_PDT_DMASK 0x1F /* Peripheral Device Type Mask */ +#define INQD_PDT_QMASK 0xE0 /* Peripheral Device Qualifer Mask */ + +#define TARGET_LUN_TO_CONTAINER(target, lun) (target) +#define CONTAINER_TO_TARGET(cont) ((cont)) +#define CONTAINER_TO_LUN(cont) (0) + +#define MAX_FIB_DATA (sizeof(struct hw_fib) - sizeof(FIB_HEADER)) + +#define MAX_DRIVER_SG_SEGMENT_COUNT 17 + +/* + * Sense keys + */ +#define SENKEY_NO_SENSE 0x00 +#define SENKEY_UNDEFINED 0x01 +#define SENKEY_NOT_READY 0x02 +#define SENKEY_MEDIUM_ERR 0x03 +#define SENKEY_HW_ERR 0x04 +#define SENKEY_ILLEGAL 0x05 +#define SENKEY_ATTENTION 0x06 +#define SENKEY_PROTECTED 0x07 +#define SENKEY_BLANK 0x08 +#define SENKEY_V_UNIQUE 0x09 +#define SENKEY_CPY_ABORT 0x0A +#define SENKEY_ABORT 0x0B +#define SENKEY_EQUAL 0x0C +#define SENKEY_VOL_OVERFLOW 0x0D +#define SENKEY_MISCOMP 0x0E +#define SENKEY_RESERVED 0x0F + +/* + * Sense codes + */ + +#define SENCODE_NO_SENSE 0x00 +#define SENCODE_END_OF_DATA 0x00 +#define SENCODE_BECOMING_READY 0x04 +#define SENCODE_INIT_CMD_REQUIRED 0x04 +#define SENCODE_PARAM_LIST_LENGTH_ERROR 0x1A +#define SENCODE_INVALID_COMMAND 0x20 +#define SENCODE_LBA_OUT_OF_RANGE 0x21 +#define SENCODE_INVALID_CDB_FIELD 0x24 +#define SENCODE_LUN_NOT_SUPPORTED 0x25 +#define SENCODE_INVALID_PARAM_FIELD 0x26 +#define SENCODE_PARAM_NOT_SUPPORTED 0x26 +#define SENCODE_PARAM_VALUE_INVALID 0x26 +#define SENCODE_RESET_OCCURRED 0x29 +#define SENCODE_LUN_NOT_SELF_CONFIGURED_YET 0x3E +#define SENCODE_INQUIRY_DATA_CHANGED 0x3F +#define SENCODE_SAVING_PARAMS_NOT_SUPPORTED 0x39 +#define SENCODE_DIAGNOSTIC_FAILURE 0x40 +#define SENCODE_INTERNAL_TARGET_FAILURE 0x44 +#define SENCODE_INVALID_MESSAGE_ERROR 0x49 +#define SENCODE_LUN_FAILED_SELF_CONFIG 0x4c +#define SENCODE_OVERLAPPED_COMMAND 0x4E + +/* + * Additional sense codes + */ + +#define ASENCODE_NO_SENSE 0x00 +#define ASENCODE_END_OF_DATA 0x05 +#define ASENCODE_BECOMING_READY 0x01 +#define ASENCODE_INIT_CMD_REQUIRED 0x02 +#define ASENCODE_PARAM_LIST_LENGTH_ERROR 0x00 +#define ASENCODE_INVALID_COMMAND 0x00 +#define ASENCODE_LBA_OUT_OF_RANGE 0x00 +#define ASENCODE_INVALID_CDB_FIELD 0x00 +#define ASENCODE_LUN_NOT_SUPPORTED 0x00 +#define ASENCODE_INVALID_PARAM_FIELD 0x00 +#define ASENCODE_PARAM_NOT_SUPPORTED 0x01 +#define ASENCODE_PARAM_VALUE_INVALID 0x02 +#define ASENCODE_RESET_OCCURRED 0x00 +#define ASENCODE_LUN_NOT_SELF_CONFIGURED_YET 0x00 +#define ASENCODE_INQUIRY_DATA_CHANGED 0x03 +#define ASENCODE_SAVING_PARAMS_NOT_SUPPORTED 0x00 +#define ASENCODE_DIAGNOSTIC_FAILURE 0x80 +#define ASENCODE_INTERNAL_TARGET_FAILURE 0x00 +#define ASENCODE_INVALID_MESSAGE_ERROR 0x00 +#define ASENCODE_LUN_FAILED_SELF_CONFIG 0x00 +#define ASENCODE_OVERLAPPED_COMMAND 0x00 + +#define BYTE0(x) (unsigned char)(x) +#define BYTE1(x) (unsigned char)((x) >> 8) +#define BYTE2(x) (unsigned char)((x) >> 16) +#define BYTE3(x) (unsigned char)((x) >> 24) + +/*------------------------------------------------------------------------------ + * S T R U C T S / T Y P E D E F S + *----------------------------------------------------------------------------*/ +/* SCSI inquiry data */ +struct inquiry_data { + u8 inqd_pdt; /* Peripheral qualifier | Peripheral Device Type */ + u8 inqd_dtq; /* RMB | Device Type Qualifier */ + u8 inqd_ver; /* ISO version | ECMA version | ANSI-approved version */ + u8 inqd_rdf; /* AENC | TrmIOP | Response data format */ + u8 inqd_len; /* Additional length (n-4) */ + u8 inqd_pad1[2]; /* Reserved - must be zero */ + u8 inqd_pad2; /* RelAdr | WBus32 | WBus16 | Sync | Linked |Reserved| CmdQue | SftRe */ + u8 inqd_vid[8]; /* Vendor ID */ + u8 inqd_pid[16]; /* Product ID */ + u8 inqd_prl[4]; /* Product Revision Level */ +}; + +struct sense_data { + u8 error_code; /* 70h (current errors), 71h(deferred errors) */ + u8 valid:1; /* A valid bit of one indicates that the information */ + /* field contains valid information as defined in the + * SCSI-2 Standard. + */ + u8 segment_number; /* Only used for COPY, COMPARE, or COPY AND VERIFY Commands */ + u8 sense_key:4; /* Sense Key */ + u8 reserved:1; + u8 ILI:1; /* Incorrect Length Indicator */ + u8 EOM:1; /* End Of Medium - reserved for random access devices */ + u8 filemark:1; /* Filemark - reserved for random access devices */ + + u8 information[4]; /* for direct-access devices, contains the unsigned + * logical block address or residue associated with + * the sense key + */ + u8 add_sense_len; /* number of additional sense bytes to follow this field */ + u8 cmnd_info[4]; /* not used */ + u8 ASC; /* Additional Sense Code */ + u8 ASCQ; /* Additional Sense Code Qualifier */ + u8 FRUC; /* Field Replaceable Unit Code - not used */ + u8 bit_ptr:3; /* indicates which byte of the CDB or parameter data + * was in error + */ + u8 BPV:1; /* bit pointer valid (BPV): 1- indicates that + * the bit_ptr field has valid value + */ + u8 reserved2:2; + u8 CD:1; /* command data bit: 1- illegal parameter in CDB. + * 0- illegal parameter in data. + */ + u8 SKSV:1; + u8 field_ptr[2]; /* byte of the CDB or parameter data in error */ +}; + +/* + * M O D U L E G L O B A L S + */ + +static struct fsa_scsi_hba *fsa_dev[MAXIMUM_NUM_ADAPTERS]; /* SCSI Device Instance Pointers */ +static struct sense_data sense_data[MAXIMUM_NUM_CONTAINERS]; +static void get_sd_devname(int disknum, char *buffer); +static unsigned long aac_build_sg(Scsi_Cmnd* scsicmd, struct sgmap* sgmap); +static unsigned long aac_build_sg64(Scsi_Cmnd* scsicmd, struct sgmap64* psg); +static int aac_send_srb_fib(Scsi_Cmnd* scsicmd); +#ifdef AAC_DETAILED_STATUS_INFO +static char *aac_get_status_string(u32 status); +#endif + +/** + * aac_get_containers - list containers + * @common: adapter to probe + * + * Make a list of all containers on this controller + */ +int aac_get_containers(struct aac_dev *dev) +{ + struct fsa_scsi_hba *fsa_dev_ptr; + u32 index, status = 0; + struct aac_query_mount *dinfo; + struct aac_mount *dresp; + struct fib * fibptr; + unsigned instance; + + fsa_dev_ptr = &(dev->fsa_dev); + instance = dev->scsi_host_ptr->unique_id; + + if (!(fibptr = fib_alloc(dev))) + return -ENOMEM; + + for (index = 0; index < MAXIMUM_NUM_CONTAINERS; index++) { + fib_init(fibptr); + dinfo = (struct aac_query_mount *) fib_data(fibptr); + + dinfo->command = cpu_to_le32(VM_NameServe); + dinfo->count = cpu_to_le32(index); + dinfo->type = cpu_to_le32(FT_FILESYS); + + status = fib_send(ContainerCommand, + fibptr, + sizeof (struct aac_query_mount), + FsaNormal, + 1, 1, + NULL, NULL); + if (status < 0 ) { + printk(KERN_WARNING "ProbeContainers: SendFIB failed.\n"); + break; + } + dresp = (struct aac_mount *)fib_data(fibptr); + + if ((le32_to_cpu(dresp->status) == ST_OK) && + (le32_to_cpu(dresp->mnt[0].vol) != CT_NONE)) { + fsa_dev_ptr->valid[index] = 1; + fsa_dev_ptr->type[index] = le32_to_cpu(dresp->mnt[0].vol); + fsa_dev_ptr->size[index] = le32_to_cpu(dresp->mnt[0].capacity); + if (le32_to_cpu(dresp->mnt[0].state) & FSCS_READONLY) + fsa_dev_ptr->ro[index] = 1; + } + fib_complete(fibptr); + /* + * If there are no more containers, then stop asking. + */ + if ((index + 1) >= le32_to_cpu(dresp->count)) + break; + } + fib_free(fibptr); + fsa_dev[instance] = fsa_dev_ptr; + return status; +} + +/** + * probe_container - query a logical volume + * @dev: device to query + * @cid: container identifier + * + * Queries the controller about the given volume. The volume information + * is updated in the struct fsa_scsi_hba structure rather than returned. + */ + +static int probe_container(struct aac_dev *dev, int cid) +{ + struct fsa_scsi_hba *fsa_dev_ptr; + int status; + struct aac_query_mount *dinfo; + struct aac_mount *dresp; + struct fib * fibptr; + unsigned instance; + + fsa_dev_ptr = &(dev->fsa_dev); + instance = dev->scsi_host_ptr->unique_id; + + if (!(fibptr = fib_alloc(dev))) + return -ENOMEM; + + fib_init(fibptr); + + dinfo = (struct aac_query_mount *)fib_data(fibptr); + + dinfo->command = cpu_to_le32(VM_NameServe); + dinfo->count = cpu_to_le32(cid); + dinfo->type = cpu_to_le32(FT_FILESYS); + + status = fib_send(ContainerCommand, + fibptr, + sizeof(struct aac_query_mount), + FsaNormal, + 1, 1, + NULL, NULL); + if (status < 0) { + printk(KERN_WARNING "aacraid: probe_containers query failed.\n"); + goto error; + } + + dresp = (struct aac_mount *) fib_data(fibptr); + + if ((le32_to_cpu(dresp->status) == ST_OK) && + (le32_to_cpu(dresp->mnt[0].vol) != CT_NONE)) { + fsa_dev_ptr->valid[cid] = 1; + fsa_dev_ptr->type[cid] = le32_to_cpu(dresp->mnt[0].vol); + fsa_dev_ptr->size[cid] = le32_to_cpu(dresp->mnt[0].capacity); + if (le32_to_cpu(dresp->mnt[0].state) & FSCS_READONLY) + fsa_dev_ptr->ro[cid] = 1; + } + +error: + fib_complete(fibptr); + fib_free(fibptr); + + return status; +} + +/* Local Structure to set SCSI inquiry data strings */ +struct scsi_inq { + char vid[8]; /* Vendor ID */ + char pid[16]; /* Product ID */ + char prl[4]; /* Product Revision Level */ +}; + +/** + * InqStrCopy - string merge + * @a: string to copy from + * @b: string to copy to + * + * Copy a String from one location to another + * without copying \0 + */ + +static void inqstrcpy(char *a, char *b) +{ + + while(*a != (char)0) + *b++ = *a++; +} + +static char *container_types[] = { + "None", + "Volume", + "Mirror", + "Stripe", + "RAID5", + "SSRW", + "SSRO", + "Morph", + "Legacy", + "RAID4", + "RAID10", + "RAID00", + "V-MIRRORS", + "PSEUDO R4", + "RAID50", + "Unknown" +}; + + + +/* Function: setinqstr + * + * Arguments: [1] pointer to void [1] int + * + * Purpose: Sets SCSI inquiry data strings for vendor, product + * and revision level. Allows strings to be set in platform dependant + * files instead of in OS dependant driver source. + */ + +static void setinqstr(int devtype, void *data, int tindex) +{ + struct scsi_inq *str; + char *findit; + struct aac_driver_ident *mp; + + mp = aac_get_driver_ident(devtype); + + str = (struct scsi_inq *)(data); /* cast data to scsi inq block */ + + inqstrcpy (mp->vname, str->vid); + inqstrcpy (mp->model, str->pid); /* last six chars reserved for vol type */ + + findit = str->pid; + + for ( ; *findit != ' '; findit++); /* walk till we find a space then incr by 1 */ + findit++; + + if (tindex < (sizeof(container_types)/sizeof(char *))){ + inqstrcpy (container_types[tindex], findit); + } + inqstrcpy ("V1.0", str->prl); +} + +void set_sense(u8 *sense_buf, u8 sense_key, u8 sense_code, + u8 a_sense_code, u8 incorrect_length, + u8 bit_pointer, u16 field_pointer, + u32 residue) +{ + sense_buf[0] = 0xF0; /* Sense data valid, err code 70h (current error) */ + sense_buf[1] = 0; /* Segment number, always zero */ + + if (incorrect_length) { + sense_buf[2] = sense_key | 0x20; /* Set ILI bit | sense key */ + sense_buf[3] = BYTE3(residue); + sense_buf[4] = BYTE2(residue); + sense_buf[5] = BYTE1(residue); + sense_buf[6] = BYTE0(residue); + } else + sense_buf[2] = sense_key; /* Sense key */ + + if (sense_key == SENKEY_ILLEGAL) + sense_buf[7] = 10; /* Additional sense length */ + else + sense_buf[7] = 6; /* Additional sense length */ + + sense_buf[12] = sense_code; /* Additional sense code */ + sense_buf[13] = a_sense_code; /* Additional sense code qualifier */ + if (sense_key == SENKEY_ILLEGAL) { + sense_buf[15] = 0; + + if (sense_code == SENCODE_INVALID_PARAM_FIELD) + sense_buf[15] = 0x80; /* Std sense key specific field */ + /* Illegal parameter is in the parameter block */ + + if (sense_code == SENCODE_INVALID_CDB_FIELD) + sense_buf[15] = 0xc0; /* Std sense key specific field */ + /* Illegal parameter is in the CDB block */ + sense_buf[15] |= bit_pointer; + sense_buf[16] = field_pointer >> 8; /* MSB */ + sense_buf[17] = field_pointer; /* LSB */ + } +} + +static void aac_io_done(Scsi_Cmnd * scsicmd) +{ + unsigned long cpu_flags; + spin_lock_irqsave(scsicmd->host->host_lock, cpu_flags); + scsicmd->scsi_done(scsicmd); + spin_unlock_irqrestore(scsicmd->host->host_lock, cpu_flags); +} + +static void __aac_io_done(Scsi_Cmnd * scsicmd) +{ + scsicmd->scsi_done(scsicmd); +} + +int aac_get_adapter_info(struct aac_dev* dev) +{ + struct fib* fibptr; + struct aac_adapter_info* info; + int rcode; + u32 tmp; + if (!(fibptr = fib_alloc(dev))) + return -ENOMEM; + + fib_init(fibptr); + info = (struct aac_adapter_info*) fib_data(fibptr); + + memset(info,0,sizeof(struct aac_adapter_info)); + + rcode = fib_send(RequestAdapterInfo, + fibptr, + sizeof(struct aac_adapter_info), + FsaNormal, + 1, 1, + NULL, + NULL); + + memcpy(&dev->adapter_info, info, sizeof(struct aac_adapter_info)); + + tmp = dev->adapter_info.kernelrev; + printk(KERN_INFO "%s%d: kernel %d.%d.%d build %d\n", + dev->name, dev->id, + tmp>>24,(tmp>>16)&0xff,(tmp>>8)&0xff, + dev->adapter_info.kernelbuild); + tmp = dev->adapter_info.monitorrev; + printk(KERN_INFO "%s%d: monitor %d.%d.%d build %d\n", + dev->name, dev->id, + tmp>>24,(tmp>>16)&0xff,(tmp>>8)&0xff, + dev->adapter_info.monitorbuild); + tmp = dev->adapter_info.biosrev; + printk(KERN_INFO "%s%d: bios %d.%d.%d build %d\n", + dev->name, dev->id, + tmp>>24,(tmp>>16)&0xff,(tmp>>8)&0xff, + dev->adapter_info.biosbuild); + printk(KERN_INFO "%s%d: serial %x%x\n", + dev->name, dev->id, + dev->adapter_info.serial[0], + dev->adapter_info.serial[1]); + dev->pae_support = 0; + dev->nondasd_support = 0; + if( BITS_PER_LONG >= 64 && + (dev->adapter_info.options & AAC_OPT_SGMAP_HOST64)){ + printk(KERN_INFO "%s%d: 64 Bit PAE enabled\n", dev->name, dev->id); + dev->pae_support = 1; + } + /* TODO - dmb temporary until fw can set this bit */ + dev->pae_support = (BITS_PER_LONG >= 64); + if(dev->pae_support != 0) { + printk(KERN_INFO "%s%d: 64 Bit PAE enabled\n", dev->name, dev->id); + } + + if(dev->adapter_info.options & AAC_OPT_NONDASD){ + dev->nondasd_support = 1; + } + return rcode; +} + + +static void read_callback(void *context, struct fib * fibptr) +{ + struct aac_dev *dev; + struct aac_read_reply *readreply; + Scsi_Cmnd *scsicmd; + u32 lba; + u32 cid; + + scsicmd = (Scsi_Cmnd *) context; + + dev = (struct aac_dev *)scsicmd->host->hostdata; + cid =TARGET_LUN_TO_CONTAINER(scsicmd->target, scsicmd->lun); + + lba = ((scsicmd->cmnd[1] & 0x1F) << 16) | (scsicmd->cmnd[2] << 8) | scsicmd->cmnd[3]; + dprintk((KERN_DEBUG "read_callback[cpu %d]: lba = %d, t = %ld.\n", smp_processor_id(), lba, jiffies)); + + if (fibptr == NULL) + BUG(); + + if(scsicmd->use_sg) + pci_unmap_sg(dev->pdev, + (struct scatterlist *)scsicmd->buffer, + scsicmd->use_sg, + scsi_to_pci_dma_dir(scsicmd->sc_data_direction)); + else if(scsicmd->request_bufflen) + pci_unmap_single(dev->pdev, (dma_addr_t)(unsigned long)scsicmd->SCp.ptr, + scsicmd->request_bufflen, + scsi_to_pci_dma_dir(scsicmd->sc_data_direction)); + readreply = (struct aac_read_reply *)fib_data(fibptr); + if (le32_to_cpu(readreply->status) == ST_OK) + scsicmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8 | GOOD; + else { + printk(KERN_WARNING "read_callback: read failed, status = %d\n", readreply->status); + scsicmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8 | CHECK_CONDITION; + set_sense((u8 *) &sense_data[cid], + SENKEY_HW_ERR, + SENCODE_INTERNAL_TARGET_FAILURE, + ASENCODE_INTERNAL_TARGET_FAILURE, 0, 0, + 0, 0); + } + fib_complete(fibptr); + fib_free(fibptr); + + aac_io_done(scsicmd); +} + +static void write_callback(void *context, struct fib * fibptr) +{ + struct aac_dev *dev; + struct aac_write_reply *writereply; + Scsi_Cmnd *scsicmd; + u32 lba; + u32 cid; + + scsicmd = (Scsi_Cmnd *) context; + dev = (struct aac_dev *)scsicmd->host->hostdata; + cid = TARGET_LUN_TO_CONTAINER(scsicmd->target, scsicmd->lun); + + lba = ((scsicmd->cmnd[1] & 0x1F) << 16) | (scsicmd->cmnd[2] << 8) | scsicmd->cmnd[3]; + dprintk((KERN_DEBUG "write_callback[cpu %d]: lba = %d, t = %ld.\n", smp_processor_id(), lba, jiffies)); + if (fibptr == NULL) + BUG(); + + if(scsicmd->use_sg) + pci_unmap_sg(dev->pdev, + (struct scatterlist *)scsicmd->buffer, + scsicmd->use_sg, + scsi_to_pci_dma_dir(scsicmd->sc_data_direction)); + else if(scsicmd->request_bufflen) + pci_unmap_single(dev->pdev, (dma_addr_t)(unsigned long)scsicmd->SCp.ptr, + scsicmd->request_bufflen, + scsi_to_pci_dma_dir(scsicmd->sc_data_direction)); + + writereply = (struct aac_write_reply *) fib_data(fibptr); + if (le32_to_cpu(writereply->status) == ST_OK) + scsicmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8 | GOOD; + else { + printk(KERN_WARNING "write_callback: write failed, status = %d\n", writereply->status); + scsicmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8 | CHECK_CONDITION; + set_sense((u8 *) &sense_data[cid], + SENKEY_HW_ERR, + SENCODE_INTERNAL_TARGET_FAILURE, + ASENCODE_INTERNAL_TARGET_FAILURE, 0, 0, + 0, 0); + } + + fib_complete(fibptr); + fib_free(fibptr); + aac_io_done(scsicmd); +} + +int aac_read(Scsi_Cmnd * scsicmd, int cid) +{ + u32 lba; + u32 count; + int status; + + u16 fibsize; + struct aac_dev *dev; + struct fib * cmd_fibcontext; + + dev = (struct aac_dev *)scsicmd->host->hostdata; + /* + * Get block address and transfer length + */ + if (scsicmd->cmnd[0] == SS_READ) /* 6 byte command */ + { + dprintk((KERN_DEBUG "aachba: received a read(6) command on target %d.\n", cid)); + + lba = ((scsicmd->cmnd[1] & 0x1F) << 16) | (scsicmd->cmnd[2] << 8) | scsicmd->cmnd[3]; + count = scsicmd->cmnd[4]; + + if (count == 0) + count = 256; + } else { + dprintk((KERN_DEBUG "aachba: received a read(10) command on target %d.\n", cid)); + + lba = (scsicmd->cmnd[2] << 24) | (scsicmd->cmnd[3] << 16) | (scsicmd->cmnd[4] << 8) | scsicmd->cmnd[5]; + count = (scsicmd->cmnd[7] << 8) | scsicmd->cmnd[8]; + } + dprintk((KERN_DEBUG "aac_read[cpu %d]: lba = %u, t = %ld.\n", smp_processor_id(), lba, jiffies)); + /* + * Alocate and initialize a Fib + */ + if (!(cmd_fibcontext = fib_alloc(dev))) { + scsicmd->result = DID_ERROR << 16; + aac_io_done(scsicmd); + return (-1); + } + + fib_init(cmd_fibcontext); + + if(dev->pae_support == 1){ + struct aac_read64 *readcmd; + readcmd = (struct aac_read64 *) fib_data(cmd_fibcontext); + readcmd->command = cpu_to_le32(VM_CtHostRead64); + readcmd->cid = cpu_to_le16(cid); + readcmd->sector_count = cpu_to_le16(count); + readcmd->block = cpu_to_le32(lba); + readcmd->pad = cpu_to_le16(0); + readcmd->flags = cpu_to_le16(0); + + aac_build_sg64(scsicmd, &readcmd->sg); + if(readcmd->sg.count > MAX_DRIVER_SG_SEGMENT_COUNT) + BUG(); + fibsize = sizeof(struct aac_read64) + ((readcmd->sg.count - 1) * sizeof (struct sgentry64)); + /* + * Now send the Fib to the adapter + */ + status = fib_send(ContainerCommand64, + cmd_fibcontext, + fibsize, + FsaNormal, + 0, 1, + (fib_callback) read_callback, + (void *) scsicmd); + } else { + struct aac_read *readcmd; + readcmd = (struct aac_read *) fib_data(cmd_fibcontext); + readcmd->command = cpu_to_le32(VM_CtBlockRead); + readcmd->cid = cpu_to_le32(cid); + readcmd->block = cpu_to_le32(lba); + readcmd->count = cpu_to_le32(count * 512); + + if (count * 512 > (64 * 1024)) + BUG(); + + aac_build_sg(scsicmd, &readcmd->sg); + if(readcmd->sg.count > MAX_DRIVER_SG_SEGMENT_COUNT) + BUG(); + fibsize = sizeof(struct aac_read) + ((readcmd->sg.count - 1) * sizeof (struct sgentry)); + /* + * Now send the Fib to the adapter + */ + status = fib_send(ContainerCommand, + cmd_fibcontext, + fibsize, + FsaNormal, + 0, 1, + (fib_callback) read_callback, + (void *) scsicmd); + } + + + /* + * Check that the command queued to the controller + */ + if (status == -EINPROGRESS) + return 0; + + printk(KERN_WARNING "aac_read: fib_send failed with status: %d.\n", status); + /* + * For some reason, the Fib didn't queue, return QUEUE_FULL + */ + scsicmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8 | QUEUE_FULL; + aac_io_done(scsicmd); + fib_complete(cmd_fibcontext); + fib_free(cmd_fibcontext); + return -1; +} + +static int aac_write(Scsi_Cmnd * scsicmd, int cid) +{ + u32 lba; + u32 count; + int status; + u16 fibsize; + struct aac_dev *dev; + struct fib * cmd_fibcontext; + + dev = (struct aac_dev *)scsicmd->host->hostdata; + /* + * Get block address and transfer length + */ + if (scsicmd->cmnd[0] == SS_WRITE) /* 6 byte command */ + { + lba = ((scsicmd->cmnd[1] & 0x1F) << 16) | (scsicmd->cmnd[2] << 8) | scsicmd->cmnd[3]; + count = scsicmd->cmnd[4]; + if (count == 0) + count = 256; + } else { + dprintk((KERN_DEBUG "aachba: received a write(10) command on target %d.\n", cid)); + lba = (scsicmd->cmnd[2] << 24) | (scsicmd->cmnd[3] << 16) | (scsicmd->cmnd[4] << 8) | scsicmd->cmnd[5]; + count = (scsicmd->cmnd[7] << 8) | scsicmd->cmnd[8]; + } + dprintk((KERN_DEBUG "aac_write[cpu %d]: lba = %lu, t = %ld.\n", smp_processor_id(), lba, jiffies)); + /* + * Allocate and initialize a Fib then setup a BlockWrite command + */ + if (!(cmd_fibcontext = fib_alloc(dev))) { + scsicmd->result = DID_ERROR << 16; + aac_io_done(scsicmd); + return -1; + } + fib_init(cmd_fibcontext); + + if(dev->pae_support == 1) + { + struct aac_write64 *writecmd; + writecmd = (struct aac_write64 *) fib_data(cmd_fibcontext); + writecmd->command = cpu_to_le32(VM_CtHostWrite64); + writecmd->cid = cpu_to_le16(cid); + writecmd->sector_count = cpu_to_le16(count); + writecmd->block = cpu_to_le32(lba); + writecmd->pad = cpu_to_le16(0); + writecmd->flags = cpu_to_le16(0); + + aac_build_sg64(scsicmd, &writecmd->sg); + if(writecmd->sg.count > MAX_DRIVER_SG_SEGMENT_COUNT) + BUG(); + fibsize = sizeof(struct aac_write64) + ((writecmd->sg.count - 1) * sizeof (struct sgentry64)); + /* + * Now send the Fib to the adapter + */ + status = fib_send(ContainerCommand64, + cmd_fibcontext, + fibsize, + FsaNormal, + 0, 1, + (fib_callback) write_callback, + (void *) scsicmd); + } + else + { + struct aac_write *writecmd; + writecmd = (struct aac_write *) fib_data(cmd_fibcontext); + writecmd->command = cpu_to_le32(VM_CtBlockWrite); + writecmd->cid = cpu_to_le32(cid); + writecmd->block = cpu_to_le32(lba); + writecmd->count = cpu_to_le32(count * 512); + writecmd->sg.count = cpu_to_le32(1); + /* ->stable is not used - it did mean which type of write */ + + if (count * 512 > (64 * 1024)) + BUG(); + aac_build_sg(scsicmd, &writecmd->sg); + if(writecmd->sg.count > MAX_DRIVER_SG_SEGMENT_COUNT) + BUG(); + fibsize = sizeof(struct aac_write) + ((writecmd->sg.count - 1) * sizeof (struct sgentry)); + /* + * Now send the Fib to the adapter + */ + status = fib_send(ContainerCommand, + cmd_fibcontext, + fibsize, + FsaNormal, + 0, 1, + (fib_callback) write_callback, + (void *) scsicmd); + } + + /* + * Check that the command queued to the controller + */ + if (status == -EINPROGRESS) + return 0; + + printk(KERN_WARNING "aac_write: fib_send failed with status: %d\n", status); + /* + * For some reason, the Fib didn't queue, return QUEUE_FULL + */ + scsicmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8 | QUEUE_FULL; + aac_io_done(scsicmd); + + fib_complete(cmd_fibcontext); + fib_free(cmd_fibcontext); + return -1; +} + + +/** + * aac_scsi_cmd() - Process SCSI command + * @scsicmd: SCSI command block + * @wait: 1 if the user wants to await completion + * + * Emulate a SCSI command and queue the required request for the + * aacraid firmware. + */ + +int aac_scsi_cmd(Scsi_Cmnd * scsicmd) +{ + u32 cid = 0; + struct fsa_scsi_hba *fsa_dev_ptr; + int cardtype; + int ret; + struct aac_dev *dev = (struct aac_dev *)scsicmd->host->hostdata; + + cardtype = dev->cardtype; + + fsa_dev_ptr = fsa_dev[scsicmd->host->unique_id]; + + /* + * If the bus, target or lun is out of range, return fail + * Test does not apply to ID 16, the pseudo id for the controller + * itself. + */ + if (scsicmd->target != scsicmd->host->this_id) { + if ((scsicmd->channel == 0) ){ + if( (scsicmd->target >= AAC_MAX_TARGET) || (scsicmd->lun != 0)){ + scsicmd->result = DID_NO_CONNECT << 16; + __aac_io_done(scsicmd); + return 0; + } + cid = TARGET_LUN_TO_CONTAINER(scsicmd->target, scsicmd->lun); + + /* + * If the target container doesn't exist, it may have + * been newly created + */ + if (fsa_dev_ptr->valid[cid] == 0) { + switch (scsicmd->cmnd[0]) { + case SS_INQUIR: + case SS_RDCAP: + case SS_TEST: + spin_unlock_irq(scsicmd->host->host_lock); + probe_container(dev, cid); + spin_lock_irq(scsicmd->host->host_lock); + if (fsa_dev_ptr->valid[cid] == 0) { + scsicmd->result = DID_NO_CONNECT << 16; + __aac_io_done(scsicmd); + return 0; + } + default: + break; + } + } + /* + * If the target container still doesn't exist, + * return failure + */ + if (fsa_dev_ptr->valid[cid] == 0) { + scsicmd->result = DID_BAD_TARGET << 16; + __aac_io_done(scsicmd); + return -1; + } + } else { /* check for physical non-dasd devices */ + if(dev->nondasd_support == 1){ + return aac_send_srb_fib(scsicmd); + } else { + scsicmd->result = DID_NO_CONNECT << 16; + __aac_io_done(scsicmd); + return 0; + } + } + } + /* + * else Command for the controller itself + */ + else if ((scsicmd->cmnd[0] != SS_INQUIR) && /* only INQUIRY & TUR cmnd supported for controller */ + (scsicmd->cmnd[0] != SS_TEST)) + { + dprintk((KERN_WARNING "Only INQUIRY & TUR command supported for controller, rcvd = 0x%x.\n", scsicmd->cmnd[0])); + scsicmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8 | CHECK_CONDITION; + set_sense((u8 *) &sense_data[cid], + SENKEY_ILLEGAL, + SENCODE_INVALID_COMMAND, + ASENCODE_INVALID_COMMAND, 0, 0, 0, 0); + __aac_io_done(scsicmd); + return -1; + } + + + /* Handle commands here that don't really require going out to the adapter */ + switch (scsicmd->cmnd[0]) { + case SS_INQUIR: + { + struct inquiry_data *inq_data_ptr; + + dprintk((KERN_DEBUG "INQUIRY command, ID: %d.\n", scsicmd->target)); + inq_data_ptr = (struct inquiry_data *)scsicmd->request_buffer; + memset(inq_data_ptr, 0, sizeof (struct inquiry_data)); + + inq_data_ptr->inqd_ver = 2; /* claim compliance to SCSI-2 */ + inq_data_ptr->inqd_dtq = 0x80; /* set RMB bit to one indicating that the medium is removable */ + inq_data_ptr->inqd_rdf = 2; /* A response data format value of two indicates that the data shall be in the format specified in SCSI-2 */ + inq_data_ptr->inqd_len = 31; + /*Format for "pad2" is RelAdr | WBus32 | WBus16 | Sync | Linked |Reserved| CmdQue | SftRe */ + inq_data_ptr->inqd_pad2= 0x32 ; /*WBus16|Sync|CmdQue */ + /* + * Set the Vendor, Product, and Revision Level + * see: .c i.e. aac.c + */ + setinqstr(cardtype, (void *) (inq_data_ptr->inqd_vid), fsa_dev_ptr->type[cid]); + if (scsicmd->target == scsicmd->host->this_id) + inq_data_ptr->inqd_pdt = INQD_PDT_PROC; /* Processor device */ + else + inq_data_ptr->inqd_pdt = INQD_PDT_DA; /* Direct/random access device */ + scsicmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8 | GOOD; + __aac_io_done(scsicmd); + return 0; + } + case SS_RDCAP: + { + int capacity; + char *cp; + + dprintk((KERN_DEBUG "READ CAPACITY command.\n")); + capacity = fsa_dev_ptr->size[cid] - 1; + cp = scsicmd->request_buffer; + cp[0] = (capacity >> 24) & 0xff; + cp[1] = (capacity >> 16) & 0xff; + cp[2] = (capacity >> 8) & 0xff; + cp[3] = (capacity >> 0) & 0xff; + cp[4] = 0; + cp[5] = 0; + cp[6] = 2; + cp[7] = 0; + + scsicmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8 | GOOD; + __aac_io_done(scsicmd); + + return 0; + } + + case SS_MODESEN: + { + char *mode_buf; + + dprintk((KERN_DEBUG "MODE SENSE command.\n")); + mode_buf = scsicmd->request_buffer; + mode_buf[0] = 0; /* Mode data length (MSB) */ + mode_buf[1] = 6; /* Mode data length (LSB) */ + mode_buf[2] = 0; /* Medium type - default */ + mode_buf[3] = 0; /* Device-specific param, bit 8: 0/1 = write enabled/protected */ + mode_buf[4] = 0; /* reserved */ + mode_buf[5] = 0; /* reserved */ + mode_buf[6] = 0; /* Block descriptor length (MSB) */ + mode_buf[7] = 0; /* Block descriptor length (LSB) */ + + scsicmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8 | GOOD; + __aac_io_done(scsicmd); + + return 0; + } + case SS_REQSEN: + dprintk((KERN_DEBUG "REQUEST SENSE command.\n")); + memcpy(scsicmd->sense_buffer, &sense_data[cid], sizeof (struct sense_data)); + memset(&sense_data[cid], 0, sizeof (struct sense_data)); + scsicmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8 | GOOD; + __aac_io_done(scsicmd); + return (0); + + case SS_LOCK: + dprintk((KERN_DEBUG "LOCK command.\n")); + if (scsicmd->cmnd[4]) + fsa_dev_ptr->locked[cid] = 1; + else + fsa_dev_ptr->locked[cid] = 0; + + scsicmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8 | GOOD; + __aac_io_done(scsicmd); + return 0; + /* + * These commands are all No-Ops + */ + case SS_TEST: + case SS_RESERV: + case SS_RELES: + case SS_REZERO: + case SS_REASGN: + case SS_SEEK: + case SS_ST_SP: + scsicmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8 | GOOD; + __aac_io_done(scsicmd); + return (0); + } + + switch (scsicmd->cmnd[0]) + { + case SS_READ: + case SM_READ: + /* + * Hack to keep track of ordinal number of the device that + * corresponds to a container. Needed to convert + * containers to /dev/sd device names + */ + + spin_unlock_irq(scsicmd->host->host_lock); + fsa_dev_ptr->devno[cid] = DEVICE_NR(scsicmd->sc_request->sr_request->rq_dev); + ret = aac_read(scsicmd, cid); + spin_lock_irq(scsicmd->host->host_lock); + return ret; + + case SS_WRITE: + case SM_WRITE: + spin_unlock_irq(scsicmd->host->host_lock); + ret = aac_write(scsicmd, cid); + spin_lock_irq(scsicmd->host->host_lock); + return ret; + default: + /* + * Unhandled commands + */ + printk(KERN_WARNING "Unhandled SCSI Command: 0x%x.\n", scsicmd->cmnd[0]); + scsicmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8 | CHECK_CONDITION; + set_sense((u8 *) &sense_data[cid], + SENKEY_ILLEGAL, SENCODE_INVALID_COMMAND, + ASENCODE_INVALID_COMMAND, 0, 0, 0, 0); + __aac_io_done(scsicmd); + return -1; + } +} + +static int query_disk(struct aac_dev *dev, void *arg) +{ + struct aac_query_disk qd; + struct fsa_scsi_hba *fsa_dev_ptr; + + fsa_dev_ptr = &(dev->fsa_dev); + if (copy_from_user(&qd, arg, sizeof (struct aac_query_disk))) + return -EFAULT; + if (qd.cnum == -1) + qd.cnum = TARGET_LUN_TO_CONTAINER(qd.target, qd.lun); + else if ((qd.bus == -1) && (qd.target == -1) && (qd.lun == -1)) + { + if (qd.cnum < 0 || qd.cnum > MAXIMUM_NUM_CONTAINERS) + return -EINVAL; + qd.instance = dev->scsi_host_ptr->host_no; + qd.bus = 0; + qd.target = CONTAINER_TO_TARGET(qd.cnum); + qd.lun = CONTAINER_TO_LUN(qd.cnum); + } + else return -EINVAL; + + qd.valid = fsa_dev_ptr->valid[qd.cnum]; + qd.locked = fsa_dev_ptr->locked[qd.cnum]; + qd.deleted = fsa_dev_ptr->deleted[qd.cnum]; + + if (fsa_dev_ptr->devno[qd.cnum] == -1) + qd.unmapped = 1; + else + qd.unmapped = 0; + + get_sd_devname(fsa_dev_ptr->devno[qd.cnum], qd.name); + + if (copy_to_user(arg, &qd, sizeof (struct aac_query_disk))) + return -EFAULT; + return 0; +} + +static void get_sd_devname(int disknum, char *buffer) +{ + if (disknum < 0) { + sprintf(buffer, "%s", ""); + return; + } + + if (disknum < 26) + sprintf(buffer, "sd%c", 'a' + disknum); + else { + unsigned int min1; + unsigned int min2; + /* + * For larger numbers of disks, we need to go to a new + * naming scheme. + */ + min1 = disknum / 26; + min2 = disknum % 26; + sprintf(buffer, "sd%c%c", 'a' + min1 - 1, 'a' + min2); + } +} + +static int force_delete_disk(struct aac_dev *dev, void *arg) +{ + struct aac_delete_disk dd; + struct fsa_scsi_hba *fsa_dev_ptr; + + fsa_dev_ptr = &(dev->fsa_dev); + + if (copy_from_user(&dd, arg, sizeof (struct aac_delete_disk))) + return -EFAULT; + + if (dd.cnum > MAXIMUM_NUM_CONTAINERS) + return -EINVAL; + /* + * Mark this container as being deleted. + */ + fsa_dev_ptr->deleted[dd.cnum] = 1; + /* + * Mark the container as no longer valid + */ + fsa_dev_ptr->valid[dd.cnum] = 0; + return 0; +} + +static int delete_disk(struct aac_dev *dev, void *arg) +{ + struct aac_delete_disk dd; + struct fsa_scsi_hba *fsa_dev_ptr; + + fsa_dev_ptr = &(dev->fsa_dev); + + if (copy_from_user(&dd, arg, sizeof (struct aac_delete_disk))) + return -EFAULT; + + if (dd.cnum > MAXIMUM_NUM_CONTAINERS) + return -EINVAL; + /* + * If the container is locked, it can not be deleted by the API. + */ + if (fsa_dev_ptr->locked[dd.cnum]) + return -EBUSY; + else { + /* + * Mark the container as no longer being valid. + */ + fsa_dev_ptr->valid[dd.cnum] = 0; + fsa_dev_ptr->devno[dd.cnum] = -1; + return 0; + } +} + +int aac_dev_ioctl(struct aac_dev *dev, int cmd, void *arg) +{ + switch (cmd) { + case FSACTL_QUERY_DISK: + return query_disk(dev, arg); + case FSACTL_DELETE_DISK: + return delete_disk(dev, arg); + case FSACTL_FORCE_DELETE_DISK: + return force_delete_disk(dev, arg); + case 2131: + return aac_get_containers(dev); + default: + return -ENOTTY; + } +} + +/** + * + * aac_srb_callback + * @context: the context set in the fib - here it is scsi cmd + * @fibptr: pointer to the fib + * + * Handles the completion of a scsi command to a non dasd device + * + */ + +static void aac_srb_callback(void *context, struct fib * fibptr) +{ + struct aac_dev *dev; + struct aac_srb_reply *srbreply; + Scsi_Cmnd *scsicmd; + + scsicmd = (Scsi_Cmnd *) context; + dev = (struct aac_dev *)scsicmd->host->hostdata; + + if (fibptr == NULL) + BUG(); + + srbreply = (struct aac_srb_reply *) fib_data(fibptr); + + scsicmd->sense_buffer[0] = '\0'; // initialize sense valid flag to false + // calculate resid for sg + scsicmd->resid = scsicmd->request_bufflen - srbreply->data_xfer_length; + + if(scsicmd->use_sg) + pci_unmap_sg(dev->pdev, + (struct scatterlist *)scsicmd->buffer, + scsicmd->use_sg, + scsi_to_pci_dma_dir(scsicmd->sc_data_direction)); + else if(scsicmd->request_bufflen) + pci_unmap_single(dev->pdev, (ulong)scsicmd->SCp.ptr, scsicmd->request_bufflen, + scsi_to_pci_dma_dir(scsicmd->sc_data_direction)); + + /* + * First check the fib status + */ + + if (le32_to_cpu(srbreply->status) != ST_OK){ + int len; + printk(KERN_WARNING "aac_srb_callback: srb failed, status = %d\n", le32_to_cpu(srbreply->status)); + len = (srbreply->sense_data_size > sizeof(scsicmd->sense_buffer))? + sizeof(scsicmd->sense_buffer):srbreply->sense_data_size; + scsicmd->result = DID_ERROR << 16 | COMMAND_COMPLETE << 8 | CHECK_CONDITION; + memcpy(scsicmd->sense_buffer, srbreply->sense_data, len); + } + + /* + * Next check the srb status + */ + switch(le32_to_cpu(srbreply->srb_status)){ + case SRB_STATUS_ERROR_RECOVERY: + case SRB_STATUS_PENDING: + case SRB_STATUS_SUCCESS: + if(scsicmd->cmnd[0] == INQUIRY ){ + u8 b; + /* We can't expose disk devices because we can't tell whether they + * are the raw container drives or stand alone drives + */ + b = *(u8*)scsicmd->buffer; + if( (b & 0x0f) == TYPE_DISK ){ + scsicmd->result = DID_NO_CONNECT << 16 | COMMAND_COMPLETE << 8; + } + } else { + scsicmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8; + } + break; + case SRB_STATUS_DATA_OVERRUN: + switch(scsicmd->cmnd[0]){ + case READ_6: + case WRITE_6: + case READ_10: + case WRITE_10: + case READ_12: + case WRITE_12: + if(le32_to_cpu(srbreply->data_xfer_length) < scsicmd->underflow ) { + printk(KERN_WARNING"aacraid: SCSI CMD underflow\n"); + } else { + printk(KERN_WARNING"aacraid: SCSI CMD Data Overrun\n"); + } + scsicmd->result = DID_ERROR << 16 | COMMAND_COMPLETE << 8; + break; + default: + scsicmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8; + break; + } + break; + case SRB_STATUS_ABORTED: + scsicmd->result = DID_ABORT << 16 | ABORT << 8; + break; + case SRB_STATUS_ABORT_FAILED: + // Not sure about this one - but assuming the hba was trying to abort for some reason + scsicmd->result = DID_ERROR << 16 | ABORT << 8; + break; + case SRB_STATUS_PARITY_ERROR: + scsicmd->result = DID_PARITY << 16 | MSG_PARITY_ERROR << 8; + break; + case SRB_STATUS_NO_DEVICE: + case SRB_STATUS_INVALID_PATH_ID: + case SRB_STATUS_INVALID_TARGET_ID: + case SRB_STATUS_INVALID_LUN: + case SRB_STATUS_SELECTION_TIMEOUT: + scsicmd->result = DID_NO_CONNECT << 16 | COMMAND_COMPLETE << 8; + break; + + case SRB_STATUS_COMMAND_TIMEOUT: + case SRB_STATUS_TIMEOUT: + scsicmd->result = DID_TIME_OUT << 16 | COMMAND_COMPLETE << 8; + break; + + case SRB_STATUS_BUSY: + scsicmd->result = DID_NO_CONNECT << 16 | COMMAND_COMPLETE << 8; + break; + + case SRB_STATUS_BUS_RESET: + scsicmd->result = DID_RESET << 16 | COMMAND_COMPLETE << 8; + break; + + case SRB_STATUS_MESSAGE_REJECTED: + scsicmd->result = DID_ERROR << 16 | MESSAGE_REJECT << 8; + break; + case SRB_STATUS_REQUEST_FLUSHED: + case SRB_STATUS_ERROR: + case SRB_STATUS_INVALID_REQUEST: + case SRB_STATUS_REQUEST_SENSE_FAILED: + case SRB_STATUS_NO_HBA: + case SRB_STATUS_UNEXPECTED_BUS_FREE: + case SRB_STATUS_PHASE_SEQUENCE_FAILURE: + case SRB_STATUS_BAD_SRB_BLOCK_LENGTH: + case SRB_STATUS_DELAYED_RETRY: + case SRB_STATUS_BAD_FUNCTION: + case SRB_STATUS_NOT_STARTED: + case SRB_STATUS_NOT_IN_USE: + case SRB_STATUS_FORCE_ABORT: + case SRB_STATUS_DOMAIN_VALIDATION_FAIL: + default: +#ifdef AAC_DETAILED_STATUS_INFO + printk("aacraid: SRB ERROR (%s)\n",aac_get_status_string(le32_to_cpu(srbreply->srb_status))); +#endif + scsicmd->result = DID_ERROR << 16 | COMMAND_COMPLETE << 8; + break; + } + if (le32_to_cpu(srbreply->scsi_status) == 0x02 ){ // Check Condition + int len; + len = (srbreply->sense_data_size > sizeof(scsicmd->sense_buffer))? + sizeof(scsicmd->sense_buffer):srbreply->sense_data_size; + printk(KERN_WARNING "aac_srb_callback: check condition, status = %d len=%d\n", le32_to_cpu(srbreply->status), len); + memcpy(scsicmd->sense_buffer, srbreply->sense_data, len); + } + /* + * OR in the scsi status (already shifted up a bit) + */ + scsicmd->result |= le32_to_cpu(srbreply->scsi_status); + + fib_complete(fibptr); + fib_free(fibptr); + aac_io_done(scsicmd); +} + +/** + * + * aac_send_scb_fib + * @scsicmd: the scsi command block + * + * This routine will form a FIB and fill in the aac_srb from the + * scsicmd passed in. + */ + +static int aac_send_srb_fib(Scsi_Cmnd* scsicmd) +{ + struct fib* cmd_fibcontext; + struct aac_dev* dev; + int status; + struct aac_srb *srbcmd; + u16 fibsize; + u32 flag; + + if( scsicmd->target > 15 || scsicmd->lun > 7) { + scsicmd->result = DID_NO_CONNECT << 16; + __aac_io_done(scsicmd); + return 0; + } + + dev = (struct aac_dev *)scsicmd->host->hostdata; + switch(scsicmd->sc_data_direction){ + case SCSI_DATA_WRITE: + flag = SRB_DataOut; + break; + case SCSI_DATA_UNKNOWN: + flag = SRB_DataIn | SRB_DataOut; + break; + case SCSI_DATA_READ: + flag = SRB_DataIn; + break; + case SCSI_DATA_NONE: + default: + flag = SRB_NoDataXfer; + break; + } + + + /* + * Allocate and initialize a Fib then setup a BlockWrite command + */ + if (!(cmd_fibcontext = fib_alloc(dev))) { + scsicmd->result = DID_ERROR << 16; + __aac_io_done(scsicmd); + return -1; + } + fib_init(cmd_fibcontext); + + srbcmd = (struct aac_srb*) fib_data(cmd_fibcontext); + srbcmd->function = cpu_to_le32(SRBF_ExecuteScsi); + srbcmd->channel = cpu_to_le32(aac_logical_to_phys(scsicmd->channel)); + srbcmd->target = cpu_to_le32(scsicmd->target); + srbcmd->lun = cpu_to_le32(scsicmd->lun); + srbcmd->flags = cpu_to_le32(flag); + srbcmd->timeout = cpu_to_le32(0); // timeout not used + srbcmd->retry_limit =cpu_to_le32(0); // Obsolete parameter + srbcmd->cdb_size = cpu_to_le32(scsicmd->cmd_len); + + if( dev->pae_support ==1 ) { + aac_build_sg64(scsicmd, (struct sgmap64*) &srbcmd->sg); + srbcmd->count = cpu_to_le32(scsicmd->request_bufflen); + + memset(srbcmd->cdb, 0, sizeof(srbcmd->cdb)); + memcpy(srbcmd->cdb, scsicmd->cmnd, scsicmd->cmd_len); + /* + * Build Scatter/Gather list + */ + fibsize = sizeof (struct aac_srb) + (((srbcmd->sg.count & 0xff) - 1) * sizeof (struct sgentry64)); + + /* + * Now send the Fib to the adapter + */ + status = fib_send(ScsiPortCommand64, cmd_fibcontext, fibsize, FsaNormal, 0, 1, + (fib_callback) aac_srb_callback, (void *) scsicmd); + } else { + aac_build_sg(scsicmd, (struct sgmap*)&srbcmd->sg); + srbcmd->count = cpu_to_le32(scsicmd->request_bufflen); + + memset(srbcmd->cdb, 0, sizeof(srbcmd->cdb)); + memcpy(srbcmd->cdb, scsicmd->cmnd, scsicmd->cmd_len); + /* + * Build Scatter/Gather list + */ + fibsize = sizeof (struct aac_srb) + (((srbcmd->sg.count & 0xff) - 1) * sizeof (struct sgentry)); + + /* + * Now send the Fib to the adapter + */ + status = fib_send(ScsiPortCommand, cmd_fibcontext, fibsize, FsaNormal, 0, 1, + (fib_callback) aac_srb_callback, (void *) scsicmd); + } + /* + * Check that the command queued to the controller + */ + if (status == -EINPROGRESS){ + return 0; + } + + printk(KERN_WARNING "aac_srb: fib_send failed with status: %d\n", status); + /* + * For some reason, the Fib didn't queue, return QUEUE_FULL + */ + scsicmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8 | QUEUE_FULL; + __aac_io_done(scsicmd); + + fib_complete(cmd_fibcontext); + fib_free(cmd_fibcontext); + + return -1; +} + +static unsigned long aac_build_sg(Scsi_Cmnd* scsicmd, struct sgmap* psg) +{ + struct aac_dev *dev; + unsigned long byte_count = 0; + + dev = (struct aac_dev *)scsicmd->host->hostdata; + // Get rid of old data + psg->count = cpu_to_le32(0); + psg->sg[0].addr = cpu_to_le32(NULL); + psg->sg[0].count = cpu_to_le32(0); + if (scsicmd->use_sg) { + struct scatterlist *sg; + int i; + int sg_count; + sg = (struct scatterlist *) scsicmd->request_buffer; + + sg_count = pci_map_sg(dev->pdev, sg, scsicmd->use_sg, + scsi_to_pci_dma_dir(scsicmd->sc_data_direction)); + psg->count = cpu_to_le32(sg_count); + + byte_count = 0; + + for (i = 0; i < sg_count; i++) { + psg->sg[i].addr = cpu_to_le32(sg_dma_address(sg)); + psg->sg[i].count = cpu_to_le32(sg_dma_len(sg)); + byte_count += sg_dma_len(sg); + sg++; + } + /* hba wants the size to be exact */ + if(byte_count > scsicmd->request_bufflen){ + psg->sg[i-1].count -= (byte_count - scsicmd->request_bufflen); + byte_count = scsicmd->request_bufflen; + } + /* Check for command underflow */ + if(scsicmd->underflow && (byte_count < scsicmd->underflow)){ + printk(KERN_WARNING"aacraid: cmd len %08lX cmd underflow %08X\n", + byte_count, scsicmd->underflow); + } + } + else if(scsicmd->request_bufflen) { + dma_addr_t addr; + addr = pci_map_single(dev->pdev, + scsicmd->request_buffer, + scsicmd->request_bufflen, + scsi_to_pci_dma_dir(scsicmd->sc_data_direction)); + psg->count = cpu_to_le32(1); + psg->sg[0].addr = cpu_to_le32(addr); + psg->sg[0].count = cpu_to_le32(scsicmd->request_bufflen); + scsicmd->SCp.ptr = (void *)addr; + byte_count = scsicmd->request_bufflen; + } + return byte_count; +} + + +static unsigned long aac_build_sg64(Scsi_Cmnd* scsicmd, struct sgmap64* psg) +{ + struct aac_dev *dev; + unsigned long byte_count = 0; + u64 le_addr; + + dev = (struct aac_dev *)scsicmd->host->hostdata; + // Get rid of old data + psg->count = cpu_to_le32(0); + psg->sg[0].addr[0] = cpu_to_le32(NULL); + psg->sg[0].addr[1] = cpu_to_le32(NULL); + psg->sg[0].count = cpu_to_le32(0); + if (scsicmd->use_sg) { + struct scatterlist *sg; + int i; + int sg_count; + sg = (struct scatterlist *) scsicmd->request_buffer; + + sg_count = pci_map_sg(dev->pdev, sg, scsicmd->use_sg, + scsi_to_pci_dma_dir(scsicmd->sc_data_direction)); + psg->count = cpu_to_le32(sg_count); + + byte_count = 0; + + for (i = 0; i < sg_count; i++) { + le_addr = cpu_to_le64(sg_dma_address(sg)); + psg->sg[i].addr[1] = (u32)(le_addr>>32); + psg->sg[i].addr[0] = (u32)(le_addr & 0xffffffff); + psg->sg[i].count = cpu_to_le32(sg_dma_len(sg)); + byte_count += sg_dma_len(sg); + sg++; + } + /* hba wants the size to be exact */ + if(byte_count > scsicmd->request_bufflen){ + psg->sg[i-1].count -= (byte_count - scsicmd->request_bufflen); + byte_count = scsicmd->request_bufflen; + } + /* Check for command underflow */ + if(scsicmd->underflow && (byte_count < scsicmd->underflow)){ + printk(KERN_WARNING"aacraid: cmd len %08lX cmd underflow %08X\n", + byte_count, scsicmd->underflow); + } + } + else if(scsicmd->request_bufflen) { + dma_addr_t addr; + addr = pci_map_single(dev->pdev, + scsicmd->request_buffer, + scsicmd->request_bufflen, + scsi_to_pci_dma_dir(scsicmd->sc_data_direction)); + psg->count = cpu_to_le32(1); + le_addr = cpu_to_le64(addr); + psg->sg[0].addr[1] = (u32)(le_addr>>32); + psg->sg[0].addr[0] = (u32)(le_addr & 0xffffffff); + psg->sg[0].count = cpu_to_le32(scsicmd->request_bufflen); + scsicmd->SCp.ptr = (void *)addr; + byte_count = scsicmd->request_bufflen; + } + return byte_count; +} + +#ifdef AAC_DETAILED_STATUS_INFO + +struct aac_srb_status_info { + u32 status; + char *str; +}; + + +static struct aac_srb_status_info srb_status_info[] = { + { SRB_STATUS_PENDING, "Pending Status"}, + { SRB_STATUS_SUCCESS, "Success"}, + { SRB_STATUS_ABORTED, "Aborted Command"}, + { SRB_STATUS_ABORT_FAILED, "Abort Failed"}, + { SRB_STATUS_ERROR, "Error Event"}, + { SRB_STATUS_BUSY, "Device Busy"}, + { SRB_STATUS_INVALID_REQUEST, "Invalid Request"}, + { SRB_STATUS_INVALID_PATH_ID, "Invalid Path ID"}, + { SRB_STATUS_NO_DEVICE, "No Device"}, + { SRB_STATUS_TIMEOUT, "Timeout"}, + { SRB_STATUS_SELECTION_TIMEOUT, "Selection Timeout"}, + { SRB_STATUS_COMMAND_TIMEOUT, "Command Timeout"}, + { SRB_STATUS_MESSAGE_REJECTED, "Message Rejected"}, + { SRB_STATUS_BUS_RESET, "Bus Reset"}, + { SRB_STATUS_PARITY_ERROR, "Parity Error"}, + { SRB_STATUS_REQUEST_SENSE_FAILED,"Request Sense Failed"}, + { SRB_STATUS_NO_HBA, "No HBA"}, + { SRB_STATUS_DATA_OVERRUN, "Data Overrun/Data Underrun"}, + { SRB_STATUS_UNEXPECTED_BUS_FREE,"Unexpected Bus Free"}, + { SRB_STATUS_PHASE_SEQUENCE_FAILURE,"Phase Error"}, + { SRB_STATUS_BAD_SRB_BLOCK_LENGTH,"Bad Srb Block Length"}, + { SRB_STATUS_REQUEST_FLUSHED, "Request Flushed"}, + { SRB_STATUS_DELAYED_RETRY, "Delayed Retry"}, + { SRB_STATUS_INVALID_LUN, "Invalid LUN"}, + { SRB_STATUS_INVALID_TARGET_ID, "Invalid TARGET ID"}, + { SRB_STATUS_BAD_FUNCTION, "Bad Function"}, + { SRB_STATUS_ERROR_RECOVERY, "Error Recovery"}, + { SRB_STATUS_NOT_STARTED, "Not Started"}, + { SRB_STATUS_NOT_IN_USE, "Not In Use"}, + { SRB_STATUS_FORCE_ABORT, "Force Abort"}, + { SRB_STATUS_DOMAIN_VALIDATION_FAIL,"Domain Validation Failure"}, + { 0xff, "Unknown Error"} +}; + +char *aac_get_status_string(u32 status) +{ + int i; + + for(i=0; i < (sizeof(srb_status_info)/sizeof(struct aac_srb_status_info)); i++ ){ + if(srb_status_info[i].status == status){ + return srb_status_info[i].str; + } + } + + return "Bad Status Code"; +} + +#endif diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/scsi/aacraid/aacraid.h linux.2.5.40-ac2/drivers/scsi/aacraid/aacraid.h --- linux.2.5.40/drivers/scsi/aacraid/aacraid.h 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/drivers/scsi/aacraid/aacraid.h 2002-10-02 21:37:46.000000000 +0100 @@ -0,0 +1,1400 @@ +#define dprintk(x) +/*#define dprintk(x) printk x */ + +/*------------------------------------------------------------------------------ + * D E F I N E S + *----------------------------------------------------------------------------*/ + +#define MAXIMUM_NUM_CONTAINERS 31 +#define MAXIMUM_NUM_ADAPTERS 8 + +#define AAC_NUM_FIB 578 +#define AAC_NUM_IO_FIB 512 + +#define AAC_MAX_TARGET (MAXIMUM_NUM_CONTAINERS+1) +//#define AAC_MAX_TARGET (16) +#define AAC_MAX_LUN (8) + +/* + * These macros convert from physical channels to virtual channels + */ +#define CONTAINER_CHANNEL (0) +#define aac_phys_to_logical(x) (x+1) +#define aac_logical_to_phys(x) (x?x-1:0) + +#define AAC_DETAILED_STATUS_INFO + +struct diskparm +{ + int heads; + int sectors; + int cylinders; +}; + + +/* + * DON'T CHANGE THE ORDER, this is set by the firmware + */ + +#define CT_NONE 0 +#define CT_VOLUME 1 +#define CT_MIRROR 2 +#define CT_STRIPE 3 +#define CT_RAID5 4 +#define CT_SSRW 5 +#define CT_SSRO 6 +#define CT_MORPH 7 +#define CT_PASSTHRU 8 +#define CT_RAID4 9 +#define CT_RAID10 10 /* stripe of mirror */ +#define CT_RAID00 11 /* stripe of stripe */ +#define CT_VOLUME_OF_MIRRORS 12 /* volume of mirror */ +#define CT_PSEUDO_RAID 13 /* really raid4 */ +#define CT_LAST_VOLUME_TYPE 14 + +/* + * Types of objects addressable in some fashion by the client. + * This is a superset of those objects handled just by the filesystem + * and includes "raw" objects that an administrator would use to + * configure containers and filesystems. + */ + +#define FT_REG 1 /* regular file */ +#define FT_DIR 2 /* directory */ +#define FT_BLK 3 /* "block" device - reserved */ +#define FT_CHR 4 /* "character special" device - reserved */ +#define FT_LNK 5 /* symbolic link */ +#define FT_SOCK 6 /* socket */ +#define FT_FIFO 7 /* fifo */ +#define FT_FILESYS 8 /* ADAPTEC's "FSA"(tm) filesystem */ +#define FT_DRIVE 9 /* physical disk - addressable in scsi by bus/target/lun */ +#define FT_SLICE 10 /* virtual disk - raw volume - slice */ +#define FT_PARTITION 11 /* FSA partition - carved out of a slice - building block for containers */ +#define FT_VOLUME 12 /* Container - Volume Set */ +#define FT_STRIPE 13 /* Container - Stripe Set */ +#define FT_MIRROR 14 /* Container - Mirror Set */ +#define FT_RAID5 15 /* Container - Raid 5 Set */ +#define FT_DATABASE 16 /* Storage object with "foreign" content manager */ + +/* + * Host side memory scatter gather list + * Used by the adapter for read, write, and readdirplus operations + * We have seperate 32 and 64 bit version because even + * on 64 bit systems not all cards support the 64 bit version + */ +struct sgentry { + u32 addr; /* 32-bit address. */ + u32 count; /* Length. */ +}; + +struct sgentry64 { + u32 addr[2]; /* 64-bit addr. 2 pieces for data alignment */ + u32 count; /* Length. */ +}; + +/* + * SGMAP + * + * This is the SGMAP structure for all commands that use + * 32-bit addressing. + */ + +struct sgmap { + u32 count; + struct sgentry sg[1]; +}; + +struct sgmap64 { + u32 count; + struct sgentry64 sg[1]; +}; + +struct creation_info +{ + u8 buildnum; /* e.g., 588 */ + u8 usec; /* e.g., 588 */ + u8 via; /* e.g., 1 = FSU, + * 2 = API + */ + u8 year; /* e.g., 1997 = 97 */ + u32 date; /* + * unsigned Month :4; // 1 - 12 + * unsigned Day :6; // 1 - 32 + * unsigned Hour :6; // 0 - 23 + * unsigned Minute :6; // 0 - 60 + * unsigned Second :6; // 0 - 60 + */ + u32 serial[2]; /* e.g., 0x1DEADB0BFAFAF001 */ +}; + + +/* + * Define all the constants needed for the communication interface + */ + +/* + * Define how many queue entries each queue will have and the total + * number of entries for the entire communication interface. Also define + * how many queues we support. + * + * This has to match the controller + */ + +#define NUMBER_OF_COMM_QUEUES 8 // 4 command; 4 response +#define HOST_HIGH_CMD_ENTRIES 4 +#define HOST_NORM_CMD_ENTRIES 8 +#define ADAP_HIGH_CMD_ENTRIES 4 +#define ADAP_NORM_CMD_ENTRIES 512 +#define HOST_HIGH_RESP_ENTRIES 4 +#define HOST_NORM_RESP_ENTRIES 512 +#define ADAP_HIGH_RESP_ENTRIES 4 +#define ADAP_NORM_RESP_ENTRIES 8 + +#define TOTAL_QUEUE_ENTRIES \ + (HOST_NORM_CMD_ENTRIES + HOST_HIGH_CMD_ENTRIES + ADAP_NORM_CMD_ENTRIES + ADAP_HIGH_CMD_ENTRIES + \ + HOST_NORM_RESP_ENTRIES + HOST_HIGH_RESP_ENTRIES + ADAP_NORM_RESP_ENTRIES + ADAP_HIGH_RESP_ENTRIES) + + +/* + * Set the queues on a 16 byte alignment + */ + +#define QUEUE_ALIGNMENT 16 + +/* + * The queue headers define the Communication Region queues. These + * are physically contiguous and accessible by both the adapter and the + * host. Even though all queue headers are in the same contiguous block + * they will be represented as individual units in the data structures. + */ + +struct aac_entry { + u32 size; /* Size in bytes of Fib which this QE points to */ + u32 addr; /* Receiver address of the FIB */ +}; + +/* + * The adapter assumes the ProducerIndex and ConsumerIndex are grouped + * adjacently and in that order. + */ + +struct aac_qhdr { + u64 header_addr; /* Address to hand the adapter to access to this queue head */ + u32 *producer; /* The producer index for this queue (host address) */ + u32 *consumer; /* The consumer index for this queue (host address) */ +}; + +/* + * Define all the events which the adapter would like to notify + * the host of. + */ + +#define HostNormCmdQue 1 /* Change in host normal priority command queue */ +#define HostHighCmdQue 2 /* Change in host high priority command queue */ +#define HostNormRespQue 3 /* Change in host normal priority response queue */ +#define HostHighRespQue 4 /* Change in host high priority response queue */ +#define AdapNormRespNotFull 5 +#define AdapHighRespNotFull 6 +#define AdapNormCmdNotFull 7 +#define AdapHighCmdNotFull 8 +#define SynchCommandComplete 9 +#define AdapInternalError 0xfe /* The adapter detected an internal error shutting down */ + +/* + * Define all the events the host wishes to notify the + * adapter of. The first four values much match the Qid the + * corresponding queue. + */ + +#define AdapNormCmdQue 2 +#define AdapHighCmdQue 3 +#define AdapNormRespQue 6 +#define AdapHighRespQue 7 +#define HostShutdown 8 +#define HostPowerFail 9 +#define FatalCommError 10 +#define HostNormRespNotFull 11 +#define HostHighRespNotFull 12 +#define HostNormCmdNotFull 13 +#define HostHighCmdNotFull 14 +#define FastIo 15 +#define AdapPrintfDone 16 + +/* + * Define all the queues that the adapter and host use to communicate + * Number them to match the physical queue layout. + */ + +enum aac_queue_types { + HostNormCmdQueue = 0, /* Adapter to host normal priority command traffic */ + HostHighCmdQueue, /* Adapter to host high priority command traffic */ + AdapNormCmdQueue, /* Host to adapter normal priority command traffic */ + AdapHighCmdQueue, /* Host to adapter high priority command traffic */ + HostNormRespQueue, /* Adapter to host normal priority response traffic */ + HostHighRespQueue, /* Adapter to host high priority response traffic */ + AdapNormRespQueue, /* Host to adapter normal priority response traffic */ + AdapHighRespQueue /* Host to adapter high priority response traffic */ +}; + +/* + * Assign type values to the FSA communication data structures + */ + +#define FIB_MAGIC 0x0001 + +/* + * Define the priority levels the FSA communication routines support. + */ + +#define FsaNormal 1 +#define FsaHigh 2 + +/* + * Define the FIB. The FIB is the where all the requested data and + * command information are put to the application on the FSA adapter. + */ + +struct aac_fibhdr { + u32 XferState; // Current transfer state for this CCB + u16 Command; // Routing information for the destination + u8 StructType; // Type FIB + u8 Flags; // Flags for FIB + u16 Size; // Size of this FIB in bytes + u16 SenderSize; // Size of the FIB in the sender (for response sizing) + u32 SenderFibAddress; // Host defined data in the FIB + u32 ReceiverFibAddress; // Logical address of this FIB for the adapter + u32 SenderData; // Place holder for the sender to store data + union { + struct { + u32 _ReceiverTimeStart; // Timestamp for receipt of fib + u32 _ReceiverTimeDone; // Timestamp for completion of fib + } _s; + struct list_head _FibLinks; // Used to link Adapter Initiated Fibs on the host + } _u; +}; + +#define FibLinks _u._FibLinks + +#define FIB_DATA_SIZE_IN_BYTES (512 - sizeof(struct aac_fibhdr)) + + +struct hw_fib { + struct aac_fibhdr header; + u8 data[FIB_DATA_SIZE_IN_BYTES]; // Command specific data +}; + +/* + * FIB commands + */ + +#define TestCommandResponse 1 +#define TestAdapterCommand 2 +/* + * Lowlevel and comm commands + */ +#define LastTestCommand 100 +#define ReinitHostNormCommandQueue 101 +#define ReinitHostHighCommandQueue 102 +#define ReinitHostHighRespQueue 103 +#define ReinitHostNormRespQueue 104 +#define ReinitAdapNormCommandQueue 105 +#define ReinitAdapHighCommandQueue 107 +#define ReinitAdapHighRespQueue 108 +#define ReinitAdapNormRespQueue 109 +#define InterfaceShutdown 110 +#define DmaCommandFib 120 +#define StartProfile 121 +#define TermProfile 122 +#define SpeedTest 123 +#define TakeABreakPt 124 +#define RequestPerfData 125 +#define SetInterruptDefTimer 126 +#define SetInterruptDefCount 127 +#define GetInterruptDefStatus 128 +#define LastCommCommand 129 +/* + * Filesystem commands + */ +#define NuFileSystem 300 +#define UFS 301 +#define HostFileSystem 302 +#define LastFileSystemCommand 303 +/* + * Container Commands + */ +#define ContainerCommand 500 +#define ContainerCommand64 501 +/* + * Cluster Commands + */ +#define ClusterCommand 550 +/* + * Scsi Port commands (scsi passthrough) + */ +#define ScsiPortCommand 600 +#define ScsiPortCommand64 601 +/* + * Misc house keeping and generic adapter initiated commands + */ +#define AifRequest 700 +#define CheckRevision 701 +#define FsaHostShutdown 702 +#define RequestAdapterInfo 703 +#define IsAdapterPaused 704 +#define SendHostTime 705 +#define LastMiscCommand 706 + +// +// Commands that will target the failover level on the FSA adapter +// + +enum fib_xfer_state { + HostOwned = (1<<0), + AdapterOwned = (1<<1), + FibInitialized = (1<<2), + FibEmpty = (1<<3), + AllocatedFromPool = (1<<4), + SentFromHost = (1<<5), + SentFromAdapter = (1<<6), + ResponseExpected = (1<<7), + NoResponseExpected = (1<<8), + AdapterProcessed = (1<<9), + HostProcessed = (1<<10), + HighPriority = (1<<11), + NormalPriority = (1<<12), + Async = (1<<13), + AsyncIo = (1<<13), // rpbfix: remove with new regime + PageFileIo = (1<<14), // rpbfix: remove with new regime + ShutdownRequest = (1<<15), + LazyWrite = (1<<16), // rpbfix: remove with new regime + AdapterMicroFib = (1<<17), + BIOSFibPath = (1<<18), + FastResponseCapable = (1<<19), + ApiFib = (1<<20) // Its an API Fib. +}; + +/* + * The following defines needs to be updated any time there is an + * incompatible change made to the aac_init structure. + */ + +#define ADAPTER_INIT_STRUCT_REVISION 3 + +struct aac_init +{ + u32 InitStructRevision; + u32 MiniPortRevision; + u32 fsrev; + u32 CommHeaderAddress; + u32 FastIoCommAreaAddress; + u32 AdapterFibsPhysicalAddress; + u32 AdapterFibsVirtualAddress; + u32 AdapterFibsSize; + u32 AdapterFibAlign; + u32 printfbuf; + u32 printfbufsiz; + u32 HostPhysMemPages; // number of 4k pages of host physical memory + u32 HostElapsedSeconds; // number of seconds since 1970. +}; + +enum aac_log_level { + LOG_INIT = 10, + LOG_INFORMATIONAL = 20, + LOG_WARNING = 30, + LOG_LOW_ERROR = 40, + LOG_MEDIUM_ERROR = 50, + LOG_HIGH_ERROR = 60, + LOG_PANIC = 70, + LOG_DEBUG = 80, + LOG_WINDBG_PRINT = 90 +}; + +#define FSAFS_NTC_GET_ADAPTER_FIB_CONTEXT 0x030b +#define FSAFS_NTC_FIB_CONTEXT 0x030c + +struct aac_dev; + +struct adapter_ops +{ + void (*adapter_interrupt)(struct aac_dev *dev); + void (*adapter_notify)(struct aac_dev *dev, u32 event); + void (*adapter_enable_int)(struct aac_dev *dev, u32 event); + void (*adapter_disable_int)(struct aac_dev *dev, u32 event); + int (*adapter_sync_cmd)(struct aac_dev *dev, u32 command, u32 p1, u32 *status); +}; + +/* + * Define which interrupt handler needs to be installed + */ + +struct aac_driver_ident +{ + u16 vendor; + u16 device; + u16 subsystem_vendor; + u16 subsystem_device; + int (*init)(struct aac_dev *dev, unsigned long num); + char * name; + char * vname; + char * model; + u16 channels; +}; + +/* + * The adapter interface specs all queues to be located in the same + * physically contigous block. The host structure that defines the + * commuication queues will assume they are each a seperate physically + * contigous memory region that will support them all being one big + * contigous block. + * There is a command and response queue for each level and direction of + * commuication. These regions are accessed by both the host and adapter. + */ + +struct aac_queue { + u64 logical; /* This is the address we give the adapter */ + struct aac_entry *base; /* This is the system virtual address */ + struct aac_qhdr headers; /* A pointer to the producer and consumer queue headers for this queue */ + u32 entries; /* Number of queue entries on this queue */ + wait_queue_head_t qfull; /* Event to wait on if the queue is full */ + wait_queue_head_t cmdready; /* Indicates there is a Command ready from the adapter on this queue. */ + /* This is only valid for adapter to host command queues. */ + spinlock_t *lock; /* Spinlock for this queue must take this lock before accessing the lock */ + spinlock_t lockdata; /* Actual lock (used only on one side of the lock) */ + unsigned long SavedIrql; /* Previous IRQL when the spin lock is taken */ + u32 padding; /* Padding - FIXME - can remove I believe */ + struct list_head cmdq; /* A queue of FIBs which need to be prcessed by the FS thread. This is */ + /* only valid for command queues which receive entries from the adapter. */ + struct list_head pendingq; /* A queue of outstanding fib's to the adapter. */ + unsigned long numpending; /* Number of entries on outstanding queue. */ + struct aac_dev * dev; /* Back pointer to adapter structure */ +}; + +/* + * Message queues. The order here is important, see also the + * queue type ordering + */ + +struct aac_queue_block +{ + struct aac_queue queue[8]; +}; + +/* + * SaP1 Message Unit Registers + */ + +struct sa_drawbridge_CSR { + // Offset | Name + u32 reserved[10]; // 00h-27h | Reserved + u8 LUT_Offset; // 28h | Looup Table Offset + u8 reserved1[3]; // 29h-2bh | Reserved + u32 LUT_Data; // 2ch | Looup Table Data + u32 reserved2[26]; // 30h-97h | Reserved + u16 PRICLEARIRQ; // 98h | Primary Clear Irq + u16 SECCLEARIRQ; // 9ah | Secondary Clear Irq + u16 PRISETIRQ; // 9ch | Primary Set Irq + u16 SECSETIRQ; // 9eh | Secondary Set Irq + u16 PRICLEARIRQMASK; // a0h | Primary Clear Irq Mask + u16 SECCLEARIRQMASK; // a2h | Secondary Clear Irq Mask + u16 PRISETIRQMASK; // a4h | Primary Set Irq Mask + u16 SECSETIRQMASK; // a6h | Secondary Set Irq Mask + u32 MAILBOX0; // a8h | Scratchpad 0 + u32 MAILBOX1; // ach | Scratchpad 1 + u32 MAILBOX2; // b0h | Scratchpad 2 + u32 MAILBOX3; // b4h | Scratchpad 3 + u32 MAILBOX4; // b8h | Scratchpad 4 + u32 MAILBOX5; // bch | Scratchpad 5 + u32 MAILBOX6; // c0h | Scratchpad 6 + u32 MAILBOX7; // c4h | Scratchpad 7 + + u32 ROM_Setup_Data; // c8h | Rom Setup and Data + u32 ROM_Control_Addr; // cch | Rom Control and Address + + u32 reserved3[12]; // d0h-ffh | reserved + u32 LUT[64]; // 100h-1ffh| Lookup Table Entries + + // + // TO DO + // need to add DMA, I2O, UART, etc registers form 80h to 364h + // + +}; + +#define Mailbox0 SaDbCSR.MAILBOX0 +#define Mailbox1 SaDbCSR.MAILBOX1 +#define Mailbox2 SaDbCSR.MAILBOX2 +#define Mailbox3 SaDbCSR.MAILBOX3 +#define Mailbox4 SaDbCSR.MAILBOX4 +#define Mailbox5 SaDbCSR.MAILBOX5 +#define Mailbox7 SaDbCSR.MAILBOX7 + +#define DoorbellReg_p SaDbCSR.PRISETIRQ +#define DoorbellReg_s SaDbCSR.SECSETIRQ +#define DoorbellClrReg_p SaDbCSR.PRICLEARIRQ + + +#define DOORBELL_0 cpu_to_le16(0x0001) +#define DOORBELL_1 cpu_to_le16(0x0002) +#define DOORBELL_2 cpu_to_le16(0x0004) +#define DOORBELL_3 cpu_to_le16(0x0008) +#define DOORBELL_4 cpu_to_le16(0x0010) +#define DOORBELL_5 cpu_to_le16(0x0020) +#define DOORBELL_6 cpu_to_le16(0x0040) + + +#define PrintfReady DOORBELL_5 +#define PrintfDone DOORBELL_5 + +struct sa_registers { + struct sa_drawbridge_CSR SaDbCSR; /* 98h - c4h */ +}; + + +#define Sa_MINIPORT_REVISION 1 + +#define sa_readw(AEP, CSR) readl(&((AEP)->regs.sa->CSR)) +#define sa_readl(AEP, CSR) readl(&((AEP)->regs.sa->CSR)) +#define sa_writew(AEP, CSR, value) writew(value, &((AEP)->regs.sa->CSR)) +#define sa_writel(AEP, CSR, value) writel(value, &((AEP)->regs.sa->CSR)) + +/* + * Rx Message Unit Registers + */ + +struct rx_mu_registers { + // Local | PCI* | Name + // | | + u32 ARSR; // 1300h | 00h | APIC Register Select Register + u32 reserved0; // 1304h | 04h | Reserved + u32 AWR; // 1308h | 08h | APIC Window Register + u32 reserved1; // 130Ch | 0Ch | Reserved + u32 IMRx[2]; // 1310h | 10h | Inbound Message Registers + u32 OMRx[2]; // 1318h | 18h | Outbound Message Registers + u32 IDR; // 1320h | 20h | Inbound Doorbell Register + u32 IISR; // 1324h | 24h | Inbound Interrupt Status Register + u32 IIMR; // 1328h | 28h | Inbound Interrupt Mask Register + u32 ODR; // 132Ch | 2Ch | Outbound Doorbell Register + u32 OISR; // 1330h | 30h | Outbound Interrupt Status Register + u32 OIMR; // 1334h | 34h | Outbound Interrupt Mask Register + // * Must access through ATU Inbound Translation Window +}; + +struct rx_inbound { + u32 Mailbox[8]; +}; + +#define InboundMailbox0 IndexRegs.Mailbox[0] +#define InboundMailbox1 IndexRegs.Mailbox[1] +#define InboundMailbox2 IndexRegs.Mailbox[2] +#define InboundMailbox3 IndexRegs.Mailbox[3] +#define InboundMailbox4 IndexRegs.Mailbox[4] + +#define INBOUNDDOORBELL_0 cpu_to_le32(0x00000001) +#define INBOUNDDOORBELL_1 cpu_to_le32(0x00000002) +#define INBOUNDDOORBELL_2 cpu_to_le32(0x00000004) +#define INBOUNDDOORBELL_3 cpu_to_le32(0x00000008) +#define INBOUNDDOORBELL_4 cpu_to_le32(0x00000010) +#define INBOUNDDOORBELL_5 cpu_to_le32(0x00000020) +#define INBOUNDDOORBELL_6 cpu_to_le32(0x00000040) + +#define OUTBOUNDDOORBELL_0 cpu_to_le32(0x00000001) +#define OUTBOUNDDOORBELL_1 cpu_to_le32(0x00000002) +#define OUTBOUNDDOORBELL_2 cpu_to_le32(0x00000004) +#define OUTBOUNDDOORBELL_3 cpu_to_le32(0x00000008) +#define OUTBOUNDDOORBELL_4 cpu_to_le32(0x00000010) + +#define InboundDoorbellReg MUnit.IDR +#define OutboundDoorbellReg MUnit.ODR + +struct rx_registers { + struct rx_mu_registers MUnit; // 1300h - 1334h + u32 reserved1[6]; // 1338h - 134ch + struct rx_inbound IndexRegs; +}; + +#define rx_readb(AEP, CSR) readb(&((AEP)->regs.rx->CSR)) +#define rx_readl(AEP, CSR) readl(&((AEP)->regs.rx->CSR)) +#define rx_writeb(AEP, CSR, value) writeb(value, &((AEP)->regs.rx->CSR)) +#define rx_writel(AEP, CSR, value) writel(value, &((AEP)->regs.rx->CSR)) + +struct fib; + +typedef void (*fib_callback)(void *ctxt, struct fib *fibctx); + +struct aac_fib_context { + s16 type; // used for verification of structure + s16 size; + ulong jiffies; // used for cleanup - dmb changed to ulong + struct list_head next; // used to link context's into a linked list + struct semaphore wait_sem; // this is used to wait for the next fib to arrive. + int wait; // Set to true when thread is in WaitForSingleObject + unsigned long count; // total number of FIBs on FibList + struct list_head fibs; +}; + +struct fsa_scsi_hba { + u32 size[MAXIMUM_NUM_CONTAINERS]; + u32 type[MAXIMUM_NUM_CONTAINERS]; + u8 valid[MAXIMUM_NUM_CONTAINERS]; + u8 ro[MAXIMUM_NUM_CONTAINERS]; + u8 locked[MAXIMUM_NUM_CONTAINERS]; + u8 deleted[MAXIMUM_NUM_CONTAINERS]; + u32 devno[MAXIMUM_NUM_CONTAINERS]; +}; + +struct fib { + void *next; /* this is used by the allocator */ + s16 type; + s16 size; + /* + * The Adapter that this I/O is destined for. + */ + struct aac_dev *dev; + u64 logicaladdr; /* 64 bit */ + /* + * This is the event the sendfib routine will wait on if the + * caller did not pass one and this is synch io. + */ + struct semaphore event_wait; + spinlock_t event_lock; + + u32 done; /* gets set to 1 when fib is complete */ + fib_callback callback; + void *callback_data; + u32 flags; // u32 dmb was ulong + /* + * The following is used to put this fib context onto the + * Outstanding I/O queue. + */ + struct list_head queue; + + void *data; + struct hw_fib *fib; /* Actual shared object */ +}; + +/* + * Adapter Information Block + * + * This is returned by the RequestAdapterInfo block + */ + +struct aac_adapter_info +{ + u32 platform; + u32 cpu; + u32 subcpu; + u32 clock; + u32 execmem; + u32 buffermem; + u32 totalmem; + u32 kernelrev; + u32 kernelbuild; + u32 monitorrev; + u32 monitorbuild; + u32 hwrev; + u32 hwbuild; + u32 biosrev; + u32 biosbuild; + u32 cluster; + u32 serial[2]; + u32 battery; + u32 options; + u32 OEM; +}; + +/* + * Battery platforms + */ +#define AAC_BAT_REQ_PRESENT (1) +#define AAC_BAT_REQ_NOTPRESENT (2) +#define AAC_BAT_OPT_PRESENT (3) +#define AAC_BAT_OPT_NOTPRESENT (4) +#define AAC_BAT_NOT_SUPPORTED (5) +/* + * cpu types + */ +#define AAC_CPU_SIMULATOR (1) +#define AAC_CPU_I960 (2) +#define AAC_CPU_STRONGARM (3) + +/* + * Supported Options + */ +#define AAC_OPT_SNAPSHOT cpu_to_le32(1) +#define AAC_OPT_CLUSTERS cpu_to_le32(1<<1) +#define AAC_OPT_WRITE_CACHE cpu_to_le32(1<<2) +#define AAC_OPT_64BIT_DATA cpu_to_le32(1<<3) +#define AAC_OPT_HOST_TIME_FIB cpu_to_le32(1<<4) +#define AAC_OPT_RAID50 cpu_to_le32(1<<5) +#define AAC_OPT_4GB_WINDOW cpu_to_le32(1<<6) +#define AAC_OPT_SCSI_UPGRADEABLE cpu_to_le32(1<<7) +#define AAC_OPT_SOFT_ERR_REPORT cpu_to_le32(1<<8) +#define AAC_OPT_SUPPORTED_RECONDITION cpu_to_le32(1<<9) +#define AAC_OPT_SGMAP_HOST64 cpu_to_le32(1<<10) +#define AAC_OPT_ALARM cpu_to_le32(1<<11) +#define AAC_OPT_NONDASD cpu_to_le32(1<<12) + +struct aac_dev +{ + struct aac_dev *next; + const char *name; + int id; + + u16 irq_mask; + /* + * Map for 128 fib objects (64k) + */ + dma_addr_t hw_fib_pa; + struct hw_fib *hw_fib_va; +#if BITS_PER_LONG >= 64 + ulong fib_base_va; +#endif + /* + * Fib Headers + */ + struct fib fibs[AAC_NUM_FIB]; + struct fib *free_fib; + struct fib *timeout_fib; + spinlock_t fib_lock; + + struct aac_queue_block *queues; + /* + * The user API will use an IOCTL to register itself to receive + * FIBs from the adapter. The following list is used to keep + * track of all the threads that have requested these FIBs. The + * mutex is used to synchronize access to all data associated + * with the adapter fibs. + */ + struct list_head fib_list; + + struct adapter_ops a_ops; + unsigned long fsrev; /* Main driver's revision number */ + + struct aac_init *init; /* Holds initialization info to communicate with adapter */ + dma_addr_t init_pa; /* Holds physical address of the init struct */ + + struct pci_dev *pdev; /* Our PCI interface */ + void * printfbuf; /* pointer to buffer used for printf's from the adapter */ + void * comm_addr; /* Base address of Comm area */ + dma_addr_t comm_phys; /* Physical Address of Comm area */ + size_t comm_size; + + struct Scsi_Host *scsi_host_ptr; + struct fsa_scsi_hba fsa_dev; + int thread_pid; + int cardtype; + + /* + * The following is the device specific extension. + */ + union + { + struct sa_registers *sa; + struct rx_registers *rx; + } regs; + /* + * The following is the number of the individual adapter + */ + u32 devnum; + u32 aif_thread; + struct completion aif_completion; + struct aac_adapter_info adapter_info; + /* These are in adapter info but they are in the io flow so + * lets break them out so we don't have to do an AND to check them + */ + u8 nondasd_support; + u8 pae_support; +}; + +#define AllocateAndMapFibSpace(dev, MapFibContext) \ + dev->a_ops.AllocateAndMapFibSpace(dev, MapFibContext) + +#define UnmapAndFreeFibSpace(dev, MapFibContext) \ + dev->a_ops.UnmapAndFreeFibSpace(dev, MapFibContext) + +#define aac_adapter_interrupt(dev) \ + dev->a_ops.adapter_interrupt(dev) + +#define aac_adapter_notify(dev, event) \ + dev->a_ops.adapter_notify(dev, event) + +#define aac_adapter_enable_int(dev, event) \ + dev->a_ops.adapter_enable_int(dev, event) + +#define aac_adapter_disable_int(dev, event) \ + dev->a_ops.adapter_disable_int(dev, event) + + + +#define FIB_CONTEXT_FLAG_TIMED_OUT (0x00000001) + +/* + * Define the command values + */ + +#define Null 0 +#define GetAttributes 1 +#define SetAttributes 2 +#define Lookup 3 +#define ReadLink 4 +#define Read 5 +#define Write 6 +#define Create 7 +#define MakeDirectory 8 +#define SymbolicLink 9 +#define MakeNode 10 +#define Removex 11 +#define RemoveDirectoryx 12 +#define Rename 13 +#define Link 14 +#define ReadDirectory 15 +#define ReadDirectoryPlus 16 +#define FileSystemStatus 17 +#define FileSystemInfo 18 +#define PathConfigure 19 +#define Commit 20 +#define Mount 21 +#define UnMount 22 +#define Newfs 23 +#define FsCheck 24 +#define FsSync 25 +#define SimReadWrite 26 +#define SetFileSystemStatus 27 +#define BlockRead 28 +#define BlockWrite 29 +#define NvramIoctl 30 +#define FsSyncWait 31 +#define ClearArchiveBit 32 +#define SetAcl 33 +#define GetAcl 34 +#define AssignAcl 35 +#define FaultInsertion 36 /* Fault Insertion Command */ +#define CrazyCache 37 /* Crazycache */ + +#define MAX_FSACOMMAND_NUM 38 + + +/* + * Define the status returns. These are very unixlike although + * most are not in fact used + */ + +#define ST_OK 0 +#define ST_PERM 1 +#define ST_NOENT 2 +#define ST_IO 5 +#define ST_NXIO 6 +#define ST_E2BIG 7 +#define ST_ACCES 13 +#define ST_EXIST 17 +#define ST_XDEV 18 +#define ST_NODEV 19 +#define ST_NOTDIR 20 +#define ST_ISDIR 21 +#define ST_INVAL 22 +#define ST_FBIG 27 +#define ST_NOSPC 28 +#define ST_ROFS 30 +#define ST_MLINK 31 +#define ST_WOULDBLOCK 35 +#define ST_NAMETOOLONG 63 +#define ST_NOTEMPTY 66 +#define ST_DQUOT 69 +#define ST_STALE 70 +#define ST_REMOTE 71 +#define ST_BADHANDLE 10001 +#define ST_NOT_SYNC 10002 +#define ST_BAD_COOKIE 10003 +#define ST_NOTSUPP 10004 +#define ST_TOOSMALL 10005 +#define ST_SERVERFAULT 10006 +#define ST_BADTYPE 10007 +#define ST_JUKEBOX 10008 +#define ST_NOTMOUNTED 10009 +#define ST_MAINTMODE 10010 +#define ST_STALEACL 10011 + +/* + * On writes how does the client want the data written. + */ + +#define CACHE_CSTABLE 1 +#define CACHE_UNSTABLE 2 + +/* + * Lets the client know at which level the data was commited on + * a write request + */ + +#define CMFILE_SYNCH_NVRAM 1 +#define CMDATA_SYNCH_NVRAM 2 +#define CMFILE_SYNCH 3 +#define CMDATA_SYNCH 4 +#define CMUNSTABLE 5 + +struct aac_read +{ + u32 command; + u32 cid; + u32 block; + u32 count; + struct sgmap sg; // Must be last in struct because it is variable +}; + +struct aac_read64 +{ + u32 command; + u16 cid; + u16 sector_count; + u32 block; + u16 pad; + u16 flags; + struct sgmap64 sg; // Must be last in struct because it is variable +}; + +struct aac_read_reply +{ + u32 status; + u32 count; +}; + +struct aac_write +{ + u32 command; + u32 cid; + u32 block; + u32 count; + u32 stable; // Not used + struct sgmap sg; // Must be last in struct because it is variable +}; + +struct aac_write64 +{ + u32 command; + u16 cid; + u16 sector_count; + u32 block; + u16 pad; + u16 flags; + struct sgmap64 sg; // Must be last in struct because it is variable +}; +struct aac_write_reply +{ + u32 status; + u32 count; + u32 committed; +}; + +struct aac_srb +{ + u32 function; + u32 channel; + u32 target; + u32 lun; + u32 timeout; + u32 flags; + u32 count; // Data xfer size + u32 retry_limit; + u32 cdb_size; + u8 cdb[16]; + struct sgmap sg; +}; + + + +#define AAC_SENSE_BUFFERSIZE 30 + +struct aac_srb_reply +{ + u32 status; + u32 srb_status; + u32 scsi_status; + u32 data_xfer_length; + u32 sense_data_size; + u8 sense_data[AAC_SENSE_BUFFERSIZE]; // Can this be SCSI_SENSE_BUFFERSIZE +}; +/* + * SRB Flags + */ +#define SRB_NoDataXfer 0x0000 +#define SRB_DisableDisconnect 0x0004 +#define SRB_DisableSynchTransfer 0x0008 +#define SRB_BypassFrozenQueue 0x0010 +#define SRB_DisableAutosense 0x0020 +#define SRB_DataIn 0x0040 +#define SRB_DataOut 0x0080 + +/* + * SRB Functions - set in aac_srb->function + */ +#define SRBF_ExecuteScsi 0x0000 +#define SRBF_ClaimDevice 0x0001 +#define SRBF_IO_Control 0x0002 +#define SRBF_ReceiveEvent 0x0003 +#define SRBF_ReleaseQueue 0x0004 +#define SRBF_AttachDevice 0x0005 +#define SRBF_ReleaseDevice 0x0006 +#define SRBF_Shutdown 0x0007 +#define SRBF_Flush 0x0008 +#define SRBF_AbortCommand 0x0010 +#define SRBF_ReleaseRecovery 0x0011 +#define SRBF_ResetBus 0x0012 +#define SRBF_ResetDevice 0x0013 +#define SRBF_TerminateIO 0x0014 +#define SRBF_FlushQueue 0x0015 +#define SRBF_RemoveDevice 0x0016 +#define SRBF_DomainValidation 0x0017 + +/* + * SRB SCSI Status - set in aac_srb->scsi_status + */ +#define SRB_STATUS_PENDING 0x00 +#define SRB_STATUS_SUCCESS 0x01 +#define SRB_STATUS_ABORTED 0x02 +#define SRB_STATUS_ABORT_FAILED 0x03 +#define SRB_STATUS_ERROR 0x04 +#define SRB_STATUS_BUSY 0x05 +#define SRB_STATUS_INVALID_REQUEST 0x06 +#define SRB_STATUS_INVALID_PATH_ID 0x07 +#define SRB_STATUS_NO_DEVICE 0x08 +#define SRB_STATUS_TIMEOUT 0x09 +#define SRB_STATUS_SELECTION_TIMEOUT 0x0A +#define SRB_STATUS_COMMAND_TIMEOUT 0x0B +#define SRB_STATUS_MESSAGE_REJECTED 0x0D +#define SRB_STATUS_BUS_RESET 0x0E +#define SRB_STATUS_PARITY_ERROR 0x0F +#define SRB_STATUS_REQUEST_SENSE_FAILED 0x10 +#define SRB_STATUS_NO_HBA 0x11 +#define SRB_STATUS_DATA_OVERRUN 0x12 +#define SRB_STATUS_UNEXPECTED_BUS_FREE 0x13 +#define SRB_STATUS_PHASE_SEQUENCE_FAILURE 0x14 +#define SRB_STATUS_BAD_SRB_BLOCK_LENGTH 0x15 +#define SRB_STATUS_REQUEST_FLUSHED 0x16 +#define SRB_STATUS_DELAYED_RETRY 0x17 +#define SRB_STATUS_INVALID_LUN 0x20 +#define SRB_STATUS_INVALID_TARGET_ID 0x21 +#define SRB_STATUS_BAD_FUNCTION 0x22 +#define SRB_STATUS_ERROR_RECOVERY 0x23 +#define SRB_STATUS_NOT_STARTED 0x24 +#define SRB_STATUS_NOT_IN_USE 0x30 +#define SRB_STATUS_FORCE_ABORT 0x31 +#define SRB_STATUS_DOMAIN_VALIDATION_FAIL 0x32 + +/* + * Object-Server / Volume-Manager Dispatch Classes + */ + +#define VM_Null 0 +#define VM_NameServe 1 +#define VM_ContainerConfig 2 +#define VM_Ioctl 3 +#define VM_FilesystemIoctl 4 +#define VM_CloseAll 5 +#define VM_CtBlockRead 6 +#define VM_CtBlockWrite 7 +#define VM_SliceBlockRead 8 /* raw access to configured "storage objects" */ +#define VM_SliceBlockWrite 9 +#define VM_DriveBlockRead 10 /* raw access to physical devices */ +#define VM_DriveBlockWrite 11 +#define VM_EnclosureMgt 12 /* enclosure management */ +#define VM_Unused 13 /* used to be diskset management */ +#define VM_CtBlockVerify 14 +#define VM_CtPerf 15 /* performance test */ +#define VM_CtBlockRead64 16 +#define VM_CtBlockWrite64 17 +#define VM_CtBlockVerify64 18 +#define VM_CtHostRead64 19 +#define VM_CtHostWrite64 20 + +#define MAX_VMCOMMAND_NUM 21 /* used for sizing stats array - leave last */ + +/* + * Descriptive information (eg, vital stats) + * that a content manager might report. The + * FileArray filesystem component is one example + * of a content manager. Raw mode might be + * another. + */ + +struct aac_fsinfo { + u32 fsTotalSize; /* Consumed by fs, incl. metadata */ + u32 fsBlockSize; + u32 fsFragSize; + u32 fsMaxExtendSize; + u32 fsSpaceUnits; + u32 fsMaxNumFiles; + u32 fsNumFreeFiles; + u32 fsInodeDensity; +}; /* valid iff ObjType == FT_FILESYS && !(ContentState & FSCS_NOTCLEAN) */ + +union aac_contentinfo { + struct aac_fsinfo filesys; /* valid iff ObjType == FT_FILESYS && !(ContentState & FSCS_NOTCLEAN) */ +}; + +/* + * Query for "mountable" objects, ie, objects that are typically + * associated with a drive letter on the client (host) side. + */ + +struct aac_mntent { + u32 oid; + u8 name[16]; // if applicable + struct creation_info create_info; // if applicable + u32 capacity; + u32 vol; // substrate structure + u32 obj; // FT_FILESYS, FT_DATABASE, etc. + u32 state; // unready for mounting, readonly, etc. + union aac_contentinfo fileinfo; // Info specific to content manager (eg, filesystem) + u32 altoid; // != oid <==> snapshot or broken mirror exists +}; + +#define FSCS_READONLY 0x0002 /* possible result of broken mirror */ + +struct aac_query_mount { + u32 command; + u32 type; + u32 count; +}; + +struct aac_mount { + u32 status; + u32 type; /* should be same as that requested */ + u32 count; + struct aac_mntent mnt[1]; +}; + +/* + * The following command is sent to shut down each container. + */ + +struct aac_close { + u32 command; + u32 cid; +}; + +struct aac_query_disk +{ + s32 cnum; + s32 bus; + s32 target; + s32 lun; + u32 valid; + u32 locked; + u32 deleted; + s32 instance; + s8 name[10]; + u32 unmapped; +}; + +struct aac_delete_disk { + u32 disknum; + u32 cnum; +}; + +struct fib_ioctl +{ + char *fibctx; + int wait; + char *fib; +}; + +struct revision +{ + u32 compat; + u32 version; + u32 build; +}; + +/* + * Ugly - non Linux like ioctl coding for back compat. + */ + +#define CTL_CODE(function, method) ( \ + (4<< 16) | ((function) << 2) | (method) \ +) + +/* + * Define the method codes for how buffers are passed for I/O and FS + * controls + */ + +#define METHOD_BUFFERED 0 +#define METHOD_NEITHER 3 + +/* + * Filesystem ioctls + */ + +#define FSACTL_SENDFIB CTL_CODE(2050, METHOD_BUFFERED) +#define FSACTL_SEND_RAW_SRB CTL_CODE(2067, METHOD_BUFFERED) +#define FSACTL_DELETE_DISK 0x163 +#define FSACTL_QUERY_DISK 0x173 +#define FSACTL_OPEN_GET_ADAPTER_FIB CTL_CODE(2100, METHOD_BUFFERED) +#define FSACTL_GET_NEXT_ADAPTER_FIB CTL_CODE(2101, METHOD_BUFFERED) +#define FSACTL_CLOSE_GET_ADAPTER_FIB CTL_CODE(2102, METHOD_BUFFERED) +#define FSACTL_MINIPORT_REV_CHECK CTL_CODE(2107, METHOD_BUFFERED) +#define FSACTL_GET_PCI_INFO CTL_CODE(2119, METHOD_BUFFERED) +#define FSACTL_FORCE_DELETE_DISK CTL_CODE(2120, METHOD_NEITHER) + + +struct aac_common +{ + /* + * If this value is set to 1 then interrupt moderation will occur + * in the base commuication support. + */ + u32 irq_mod; + u32 peak_fibs; + u32 zero_fibs; + u32 fib_timeouts; + /* + * Statistical counters in debug mode + */ +#ifdef DBG + u32 FibsSent; + u32 FibRecved; + u32 NoResponseSent; + u32 NoResponseRecved; + u32 AsyncSent; + u32 AsyncRecved; + u32 NormalSent; + u32 NormalRecved; +#endif +}; + +extern struct aac_common aac_config; + + +/* + * The following macro is used when sending and receiving FIBs. It is + * only used for debugging. + */ + +#if DBG +#define FIB_COUNTER_INCREMENT(counter) (counter)++ +#else +#define FIB_COUNTER_INCREMENT(counter) +#endif + +/* + * Adapter direct commands + * Monitor/Kernel API + */ + +#define BREAKPOINT_REQUEST cpu_to_le32(0x00000004) +#define INIT_STRUCT_BASE_ADDRESS cpu_to_le32(0x00000005) +#define READ_PERMANENT_PARAMETERS cpu_to_le32(0x0000000a) +#define WRITE_PERMANENT_PARAMETERS cpu_to_le32(0x0000000b) +#define HOST_CRASHING cpu_to_le32(0x0000000d) +#define SEND_SYNCHRONOUS_FIB cpu_to_le32(0x0000000c) +#define GET_ADAPTER_PROPERTIES cpu_to_le32(0x00000019) +#define RE_INIT_ADAPTER cpu_to_le32(0x000000ee) + +/* + * Adapter Status Register + * + * Phase Staus mailbox is 32bits: + * <31:16> = Phase Status + * <15:0> = Phase + * + * The adapter reports is present state through the phase. Only + * a single phase should be ever be set. Each phase can have multiple + * phase status bits to provide more detailed information about the + * state of the board. Care should be taken to ensure that any phase + * status bits that are set when changing the phase are also valid + * for the new phase or be cleared out. Adapter software (monitor, + * iflash, kernel) is responsible for properly maintining the phase + * status mailbox when it is running. + * + * MONKER_API Phases + * + * Phases are bit oriented. It is NOT valid to have multiple bits set + */ + +#define SELF_TEST_FAILED cpu_to_le32(0x00000004) +#define KERNEL_UP_AND_RUNNING cpu_to_le32(0x00000080) +#define KERNEL_PANIC cpu_to_le32(0x00000100) + +/* + * Doorbell bit defines + */ + +#define DoorBellPrintfDone cpu_to_le32(1<<5) // Host -> Adapter +#define DoorBellAdapterNormCmdReady cpu_to_le32(1<<1) // Adapter -> Host +#define DoorBellAdapterNormRespReady cpu_to_le32(1<<2) // Adapter -> Host +#define DoorBellAdapterNormCmdNotFull cpu_to_le32(1<<3) // Adapter -> Host +#define DoorBellAdapterNormRespNotFull cpu_to_le32(1<<4) // Adapter -> Host +#define DoorBellPrintfReady cpu_to_le32(1<<5) // Adapter -> Host + +/* + * For FIB communication, we need all of the following things + * to send back to the user. + */ + +#define AifCmdEventNotify 1 /* Notify of event */ +#define AifCmdJobProgress 2 /* Progress report */ +#define AifCmdAPIReport 3 /* Report from other user of API */ +#define AifCmdDriverNotify 4 /* Notify host driver of event */ +#define AifReqJobList 100 /* Gets back complete job list */ +#define AifReqJobsForCtr 101 /* Gets back jobs for specific container */ +#define AifReqJobsForScsi 102 /* Gets back jobs for specific SCSI device */ +#define AifReqJobReport 103 /* Gets back a specific job report or list of them */ +#define AifReqTerminateJob 104 /* Terminates job */ +#define AifReqSuspendJob 105 /* Suspends a job */ +#define AifReqResumeJob 106 /* Resumes a job */ +#define AifReqSendAPIReport 107 /* API generic report requests */ +#define AifReqAPIJobStart 108 /* Start a job from the API */ +#define AifReqAPIJobUpdate 109 /* Update a job report from the API */ +#define AifReqAPIJobFinish 110 /* Finish a job from the API */ + +/* + * Adapter Initiated FIB command structures. Start with the adapter + * initiated FIBs that really come from the adapter, and get responded + * to by the host. + */ + +struct aac_aifcmd { + u32 command; /* Tell host what type of notify this is */ + u32 seqnum; /* To allow ordering of reports (if necessary) */ + u8 data[1]; /* Undefined length (from kernel viewpoint) */ +}; + +static inline u32 fib2addr(struct hw_fib *hw) +{ + return (u32)hw; +} + +static inline struct hw_fib *addr2fib(u32 addr) +{ + return (struct hw_fib *)addr; +} + +const char *aac_driverinfo(struct Scsi_Host *); +struct fib *fib_alloc(struct aac_dev *dev); +int fib_setup(struct aac_dev *dev); +void fib_map_free(struct aac_dev *dev); +void fib_free(struct fib * context); +void fib_init(struct fib * context); +void fib_dealloc(struct fib * context); +void aac_printf(struct aac_dev *dev, u32 val); +int fib_send(u16 command, struct fib * context, unsigned long size, int priority, int wait, int reply, fib_callback callback, void *ctxt); +int aac_consumer_get(struct aac_dev * dev, struct aac_queue * q, struct aac_entry **entry); +int aac_consumer_avail(struct aac_dev * dev, struct aac_queue * q); +void aac_consumer_free(struct aac_dev * dev, struct aac_queue * q, u32 qnum); +int fib_complete(struct fib * context); +#define fib_data(fibctx) ((void *)(fibctx)->fib->data) +int aac_detach(struct aac_dev *dev); +struct aac_dev *aac_init_adapter(struct aac_dev *dev); +int aac_get_containers(struct aac_dev *dev); +int aac_scsi_cmd(Scsi_Cmnd *scsi_cmnd_ptr); +int aac_dev_ioctl(struct aac_dev *dev, int cmd, void *arg); +int aac_do_ioctl(struct aac_dev * dev, int cmd, void *arg); +int aac_rx_init(struct aac_dev *dev, unsigned long devNumber); +int aac_sa_init(struct aac_dev *dev, unsigned long devNumber); +unsigned int aac_response_normal(struct aac_queue * q); +unsigned int aac_command_normal(struct aac_queue * q); +int aac_command_thread(struct aac_dev * dev); +int aac_close_fib_context(struct aac_dev * dev, struct aac_fib_context *fibctx); +int fib_adapter_complete(struct fib * fibptr, unsigned short size); +struct aac_driver_ident* aac_get_driver_ident(int devtype); +int aac_get_adapter_info(struct aac_dev* dev); diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/scsi/aacraid/commctrl.c linux.2.5.40-ac2/drivers/scsi/aacraid/commctrl.c --- linux.2.5.40/drivers/scsi/aacraid/commctrl.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/drivers/scsi/aacraid/commctrl.c 2002-10-02 21:37:46.000000000 +0100 @@ -0,0 +1,432 @@ +/* + * Adaptec AAC series RAID controller driver + * (c) Copyright 2001 Red Hat Inc. + * + * based on the old aacraid driver that is.. + * Adaptec aacraid device driver for Linux. + * + * Copyright (c) 2000 Adaptec, Inc. (aacraid@adaptec.com) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; see the file COPYING. If not, write to + * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. + * + * Module Name: + * commctrl.c + * + * Abstract: Contains all routines for control of the AFA comm layer + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "scsi.h" +#include "hosts.h" + +#include "aacraid.h" + +/** + * ioctl_send_fib - send a FIB from userspace + * @dev: adapter is being processed + * @arg: arguments to the ioctl call + * + * This routine sends a fib to the adapter on behalf of a user level + * program. + */ + +static int ioctl_send_fib(struct aac_dev * dev, void *arg) +{ + struct hw_fib * kfib; + struct fib *fibptr; + + fibptr = fib_alloc(dev); + if(fibptr == NULL) + return -ENOMEM; + + kfib = fibptr->fib; + /* + * First copy in the header so that we can check the size field. + */ + if (copy_from_user((void *)kfib, arg, sizeof(struct aac_fibhdr))) { + fib_free(fibptr); + return -EFAULT; + } + /* + * Since we copy based on the fib header size, make sure that we + * will not overrun the buffer when we copy the memory. Return + * an error if we would. + */ + if(le32_to_cpu(kfib->header.Size) > sizeof(struct hw_fib) - sizeof(struct aac_fibhdr)) { + fib_free(fibptr); + return -EINVAL; + } + + if (copy_from_user((void *) kfib, arg, le32_to_cpu(kfib->header.Size) + sizeof(struct aac_fibhdr))) { + fib_free(fibptr); + return -EFAULT; + } + + if (kfib->header.Command == cpu_to_le32(TakeABreakPt)) { + aac_adapter_interrupt(dev); + /* + * Since we didn't really send a fib, zero out the state to allow + * cleanup code not to assert. + */ + kfib->header.XferState = 0; + } else { + if (fib_send(kfib->header.Command, fibptr, le32_to_cpu(kfib->header.Size) , FsaNormal, + 1, 1, NULL, NULL) != 0) + { + fib_free(fibptr); + return -EINVAL; + } + if (fib_complete(fibptr) != 0) { + fib_free(fibptr); + return -EINVAL; + } + } + /* + * Make sure that the size returned by the adapter (which includes + * the header) is less than or equal to the size of a fib, so we + * don't corrupt application data. Then copy that size to the user + * buffer. (Don't try to add the header information again, since it + * was already included by the adapter.) + */ + + if (copy_to_user(arg, (void *)kfib, kfib->header.Size)) { + fib_free(fibptr); + return -EFAULT; + } + fib_free(fibptr); + return 0; +} + +/** + * open_getadapter_fib - Get the next fib + * + * This routine will get the next Fib, if available, from the AdapterFibContext + * passed in from the user. + */ + +static int open_getadapter_fib(struct aac_dev * dev, void *arg) +{ + struct aac_fib_context * fibctx; + int status; + unsigned long flags; + + fibctx = kmalloc(sizeof(struct aac_fib_context), GFP_KERNEL); + if (fibctx == NULL) { + status = -ENOMEM; + } else { + fibctx->type = FSAFS_NTC_GET_ADAPTER_FIB_CONTEXT; + fibctx->size = sizeof(struct aac_fib_context); + /* + * Initialize the mutex used to wait for the next AIF. + */ + init_MUTEX_LOCKED(&fibctx->wait_sem); + fibctx->wait = 0; + /* + * Initialize the fibs and set the count of fibs on + * the list to 0. + */ + fibctx->count = 0; + INIT_LIST_HEAD(&fibctx->fibs); + fibctx->jiffies = jiffies/HZ; + /* + * Now add this context onto the adapter's + * AdapterFibContext list. + */ + spin_lock_irqsave(&dev->fib_lock, flags); + list_add_tail(&fibctx->next, &dev->fib_list); + spin_unlock_irqrestore(&dev->fib_lock, flags); + if (copy_to_user(arg, &fibctx, sizeof(struct aac_fib_context *))) { + status = -EFAULT; + } else { + status = 0; + } + } + return status; +} + +/** + * next_getadapter_fib - get the next fib + * @dev: adapter to use + * @arg: ioctl argument + * + * This routine will get the next Fib, if available, from the AdapterFibContext + * passed in from the user. + */ + +static int next_getadapter_fib(struct aac_dev * dev, void *arg) +{ + struct fib_ioctl f; + struct aac_fib_context *fibctx, *aifcp; + struct hw_fib * fib; + int status; + struct list_head * entry; + int found; + unsigned long flags; + + if(copy_from_user((void *)&f, arg, sizeof(struct fib_ioctl))) + return -EFAULT; + /* + * Extract the AdapterFibContext from the Input parameters. + */ + fibctx = (struct aac_fib_context *) f.fibctx; + + /* + * Verify that the HANDLE passed in was a valid AdapterFibContext + * + * Search the list of AdapterFibContext addresses on the adapter + * to be sure this is a valid address + */ + found = 0; + entry = dev->fib_list.next; + + while(entry != &dev->fib_list) { + aifcp = list_entry(entry, struct aac_fib_context, next); + if(fibctx == aifcp) { /* We found a winner */ + found = 1; + break; + } + entry = entry->next; + } + if (found == 0) + return -EINVAL; + + if((fibctx->type != FSAFS_NTC_GET_ADAPTER_FIB_CONTEXT) || + (fibctx->size != sizeof(struct aac_fib_context))) + return -EINVAL; + status = 0; + spin_lock_irqsave(&dev->fib_lock, flags); + /* + * If there are no fibs to send back, then either wait or return + * -EAGAIN + */ +return_fib: + if (!list_empty(&fibctx->fibs)) { + struct list_head * entry; + /* + * Pull the next fib from the fibs + */ + entry = fibctx->fibs.next; + list_del(entry); + + fib = list_entry(entry, struct hw_fib, header.FibLinks); + fibctx->count--; + spin_unlock_irqrestore(&dev->fib_lock, flags); + if (copy_to_user(f.fib, fib, sizeof(struct hw_fib))) { + kfree(fib); + return -EFAULT; + } + /* + * Free the space occupied by this copy of the fib. + */ + kfree(fib); + status = 0; + fibctx->jiffies = jiffies/HZ; + } else { + spin_unlock_irqrestore(&dev->fib_lock, flags); + if (f.wait) { + if(down_interruptible(&fibctx->wait_sem) < 0) { + status = -EINTR; + } else { + /* Lock again and retry */ + spin_lock_irqsave(&dev->fib_lock, flags); + goto return_fib; + } + } else { + status = -EAGAIN; + } + } + return status; +} + +int aac_close_fib_context(struct aac_dev * dev, struct aac_fib_context * fibctx) +{ + struct hw_fib *fib; + + /* + * First free any FIBs that have not been consumed. + */ + while (!list_empty(&fibctx->fibs)) { + struct list_head * entry; + /* + * Pull the next fib from the fibs + */ + entry = fibctx->fibs.next; + list_del(entry); + fib = list_entry(entry, struct hw_fib, header.FibLinks); + fibctx->count--; + /* + * Free the space occupied by this copy of the fib. + */ + kfree(fib); + } + /* + * Remove the Context from the AdapterFibContext List + */ + list_del(&fibctx->next); + /* + * Invalidate context + */ + fibctx->type = 0; + /* + * Free the space occupied by the Context + */ + kfree(fibctx); + return 0; +} + +/** + * close_getadapter_fib - close down user fib context + * @dev: adapter + * @arg: ioctl arguments + * + * This routine will close down the fibctx passed in from the user. + */ + +static int close_getadapter_fib(struct aac_dev * dev, void *arg) +{ + struct aac_fib_context *fibctx, *aifcp; + int status; + unsigned long flags; + struct list_head * entry; + int found; + + /* + * Extract the fibctx from the input parameters + */ + fibctx = arg; + + /* + * Verify that the HANDLE passed in was a valid AdapterFibContext + * + * Search the list of AdapterFibContext addresses on the adapter + * to be sure this is a valid address + */ + + found = 0; + entry = dev->fib_list.next; + + while(entry != &dev->fib_list) { + aifcp = list_entry(entry, struct aac_fib_context, next); + if(fibctx == aifcp) { /* We found a winner */ + found = 1; + break; + } + entry = entry->next; + } + + if(found == 0) + return 0; /* Already gone */ + + if((fibctx->type != FSAFS_NTC_GET_ADAPTER_FIB_CONTEXT) || + (fibctx->size != sizeof(struct aac_fib_context))) + return -EINVAL; + spin_lock_irqsave(&dev->fib_lock, flags); + status = aac_close_fib_context(dev, fibctx); + spin_unlock_irqrestore(&dev->fib_lock, flags); + return status; +} + +/** + * check_revision - close down user fib context + * @dev: adapter + * @arg: ioctl arguments + * + * This routine returns the firmware version. + * Under Linux, there have been no version incompatibilities, so this is simple! + */ + +static int check_revision(struct aac_dev *dev, void *arg) +{ + struct revision response; + + response.compat = 1; + response.version = dev->adapter_info.kernelrev; + response.build = dev->adapter_info.kernelbuild; + + if (copy_to_user(arg, &response, sizeof(response))) + return -EFAULT; + return 0; +} + + +struct aac_pci_info { + u32 bus; + u32 slot; +}; + + +int aac_get_pci_info(struct aac_dev* dev, void* arg) +{ + struct aac_pci_info pci_info; + + pci_info.bus = dev->pdev->bus->number; + pci_info.slot = PCI_SLOT(dev->pdev->devfn); + + if(copy_to_user( arg, (void*)&pci_info, sizeof(struct aac_pci_info))) + return -EFAULT; + return 0; + } + + +int aac_do_ioctl(struct aac_dev * dev, int cmd, void *arg) +{ + int status; + + /* + * HBA gets first crack + */ + + status = aac_dev_ioctl(dev, cmd, arg); + if(status != -ENOTTY) + return status; + + switch (cmd) { + case FSACTL_MINIPORT_REV_CHECK: + status = check_revision(dev, arg); + break; + case FSACTL_SENDFIB: + status = ioctl_send_fib(dev, arg); + break; + case FSACTL_OPEN_GET_ADAPTER_FIB: + status = open_getadapter_fib(dev, arg); + break; + case FSACTL_GET_NEXT_ADAPTER_FIB: + status = next_getadapter_fib(dev, arg); + break; + case FSACTL_CLOSE_GET_ADAPTER_FIB: + status = close_getadapter_fib(dev, arg); + break; + case FSACTL_GET_PCI_INFO: + status = aac_get_pci_info(dev,arg); + break; + default: + status = -ENOTTY; + break; + } + return status; +} + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/scsi/aacraid/comminit.c linux.2.5.40-ac2/drivers/scsi/aacraid/comminit.c --- linux.2.5.40/drivers/scsi/aacraid/comminit.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/drivers/scsi/aacraid/comminit.c 2002-10-02 21:37:46.000000000 +0100 @@ -0,0 +1,341 @@ +/* + * Adaptec AAC series RAID controller driver + * (c) Copyright 2001 Red Hat Inc. + * + * based on the old aacraid driver that is.. + * Adaptec aacraid device driver for Linux. + * + * Copyright (c) 2000 Adaptec, Inc. (aacraid@adaptec.com) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; see the file COPYING. If not, write to + * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. + * + * Module Name: + * comminit.c + * + * Abstract: This supports the initialization of the host adapter commuication interface. + * This is a platform dependent module for the pci cyclone board. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "scsi.h" +#include "hosts.h" + +#include "aacraid.h" + +struct aac_common aac_config; + +static struct aac_dev *devices; + +static int aac_alloc_comm(struct aac_dev *dev, void **commaddr, unsigned long commsize, unsigned long commalign) +{ + unsigned char *base; + unsigned long size, align; + unsigned long fibsize = 4096; + unsigned long printfbufsiz = 256; + struct aac_init *init; + dma_addr_t phys; + + /* FIXME: Adaptec add 128 bytes to this value - WHY ?? */ + size = fibsize + sizeof(struct aac_init) + commsize + commalign + printfbufsiz; + + base = pci_alloc_consistent(dev->pdev, size, &phys); + if(base == NULL) + { + printk(KERN_ERR "aacraid: unable to create mapping.\n"); + return 0; + } + dev->comm_addr = (void *)base; + dev->comm_phys = phys; + dev->comm_size = size; + + dev->init = (struct aac_init *)(base + fibsize); + dev->init_pa = phys + fibsize; + + /* + * Cache the upper bits of the virtual mapping for 64bit boxes + * FIXME: this crap should be rewritten + */ +#if BITS_PER_LONG >= 64 + dev->fib_base_va = ((ulong)base & 0xffffffff00000000); +#endif + + init = dev->init; + + init->InitStructRevision = cpu_to_le32(ADAPTER_INIT_STRUCT_REVISION); + init->MiniPortRevision = cpu_to_le32(Sa_MINIPORT_REVISION); + init->fsrev = cpu_to_le32(dev->fsrev); + + /* + * Adapter Fibs are the first thing allocated so that they + * start page aligned + */ + init->AdapterFibsVirtualAddress = cpu_to_le32((u32)base); + init->AdapterFibsPhysicalAddress = cpu_to_le32(phys); + init->AdapterFibsSize = cpu_to_le32(fibsize); + init->AdapterFibAlign = cpu_to_le32(sizeof(struct hw_fib)); + + /* + * Increment the base address by the amount already used + */ + base = base + fibsize + sizeof(struct aac_init); + phys = phys + fibsize + sizeof(struct aac_init); + /* + * Align the beginning of Headers to commalign + */ + align = (commalign - ((unsigned long)(base) & (commalign - 1))); + base = base + align; + phys = phys + align; + /* + * Fill in addresses of the Comm Area Headers and Queues + */ + *commaddr = (unsigned long *)base; + init->CommHeaderAddress = cpu_to_le32(phys); + /* + * Increment the base address by the size of the CommArea + */ + base = base + commsize; + phys = phys + commsize; + /* + * Place the Printf buffer area after the Fast I/O comm area. + */ + dev->printfbuf = (void *)base; + init->printfbuf = cpu_to_le32(phys); + init->printfbufsiz = cpu_to_le32(printfbufsiz); + memset(base, 0, printfbufsiz); + return 1; +} + +static void aac_queue_init(struct aac_dev * dev, struct aac_queue * q, u32 *mem, int qsize) +{ + q->numpending = 0; + q->dev = dev; + INIT_LIST_HEAD(&q->pendingq); + init_waitqueue_head(&q->cmdready); + INIT_LIST_HEAD(&q->cmdq); + init_waitqueue_head(&q->qfull); + spin_lock_init(&q->lockdata); + q->lock = &q->lockdata; + q->headers.producer = mem; + q->headers.consumer = mem+1; + *q->headers.producer = cpu_to_le32(qsize); + *q->headers.consumer = cpu_to_le32(qsize); + q->entries = qsize; +} + +/** + * aac_send_shutdown - shutdown an adapter + * @dev: Adapter to shutdown + * + * This routine will send a VM_CloseAll (shutdown) request to the adapter. + */ + +static int aac_send_shutdown(struct aac_dev * dev) +{ + struct fib * fibctx; + struct aac_close *cmd; + int status; + + fibctx = fib_alloc(dev); + fib_init(fibctx); + + cmd = (struct aac_close *) fib_data(fibctx); + + cmd->command = cpu_to_le32(VM_CloseAll); + cmd->cid = cpu_to_le32(0xffffffff); + + status = fib_send(ContainerCommand, + fibctx, + sizeof(struct aac_close), + FsaNormal, + 1, 1, + NULL, NULL); + + if (status == 0) + fib_complete(fibctx); + fib_free(fibctx); + return status; +} + +/** + * aac_detach - detach adapter + * @detach: adapter to disconnect + * + * Disconnect and shutdown an AAC based adapter, freeing resources + * as we go. + */ + +int aac_detach(struct aac_dev *detach) +{ + struct aac_dev **dev = &devices; + + while(*dev) + { + if(*dev == detach) + { + *dev = detach->next; + aac_send_shutdown(detach); + fib_map_free(detach); + pci_free_consistent(detach->pdev, detach->comm_size, detach->comm_addr, detach->comm_phys); + kfree(detach->queues); + return 1; + } + dev=&((*dev)->next); + } + BUG(); + return 0; +} + +/** + * aac_comm_init - Initialise FSA data structures + * @dev: Adapter to intialise + * + * Initializes the data structures that are required for the FSA commuication + * interface to operate. + * Returns + * 1 - if we were able to init the commuication interface. + * 0 - If there were errors initing. This is a fatal error. + */ + +int aac_comm_init(struct aac_dev * dev) +{ + unsigned long hdrsize = (sizeof(u32) * NUMBER_OF_COMM_QUEUES) * 2; + unsigned long queuesize = sizeof(struct aac_entry) * TOTAL_QUEUE_ENTRIES; + u32 *headers; + struct aac_entry * queues; + unsigned long size; + struct aac_queue_block * comm = dev->queues; + + /* + * Now allocate and initialize the zone structures used as our + * pool of FIB context records. The size of the zone is based + * on the system memory size. We also initialize the mutex used + * to protect the zone. + */ + spin_lock_init(&dev->fib_lock); + + /* + * Allocate the physically contigous space for the commuication + * queue headers. + */ + + size = hdrsize + queuesize; + + if (!aac_alloc_comm(dev, (void * *)&headers, size, QUEUE_ALIGNMENT)) + return -ENOMEM; + + queues = (struct aac_entry *)((unsigned char *)headers + hdrsize); + + /* Adapter to Host normal proirity Command queue */ + comm->queue[HostNormCmdQueue].base = queues; + aac_queue_init(dev, &comm->queue[HostNormCmdQueue], headers, HOST_NORM_CMD_ENTRIES); + queues += HOST_NORM_CMD_ENTRIES; + headers += 2; + + /* Adapter to Host high priority command queue */ + comm->queue[HostHighCmdQueue].base = queues; + aac_queue_init(dev, &comm->queue[HostHighCmdQueue], headers, HOST_HIGH_CMD_ENTRIES); + + queues += HOST_HIGH_CMD_ENTRIES; + headers +=2; + + /* Host to adapter normal priority command queue */ + comm->queue[AdapNormCmdQueue].base = queues; + aac_queue_init(dev, &comm->queue[AdapNormCmdQueue], headers, ADAP_NORM_CMD_ENTRIES); + + queues += ADAP_NORM_CMD_ENTRIES; + headers += 2; + + /* host to adapter high priority command queue */ + comm->queue[AdapHighCmdQueue].base = queues; + aac_queue_init(dev, &comm->queue[AdapHighCmdQueue], headers, ADAP_HIGH_CMD_ENTRIES); + + queues += ADAP_HIGH_CMD_ENTRIES; + headers += 2; + + /* adapter to host normal priority response queue */ + comm->queue[HostNormRespQueue].base = queues; + aac_queue_init(dev, &comm->queue[HostNormRespQueue], headers, HOST_NORM_RESP_ENTRIES); + + queues += HOST_NORM_RESP_ENTRIES; + headers += 2; + + /* adapter to host high priority response queue */ + comm->queue[HostHighRespQueue].base = queues; + aac_queue_init(dev, &comm->queue[HostHighRespQueue], headers, HOST_HIGH_RESP_ENTRIES); + + queues += HOST_HIGH_RESP_ENTRIES; + headers += 2; + + /* host to adapter normal priority response queue */ + comm->queue[AdapNormRespQueue].base = queues; + aac_queue_init(dev, &comm->queue[AdapNormRespQueue], headers, ADAP_NORM_RESP_ENTRIES); + + queues += ADAP_NORM_RESP_ENTRIES; + headers += 2; + + /* host to adapter high priority response queue */ + comm->queue[AdapHighRespQueue].base = queues; + aac_queue_init(dev, &comm->queue[AdapHighRespQueue], headers, ADAP_HIGH_RESP_ENTRIES); + + comm->queue[AdapNormCmdQueue].lock = comm->queue[HostNormRespQueue].lock; + comm->queue[AdapHighCmdQueue].lock = comm->queue[HostHighRespQueue].lock; + comm->queue[AdapNormRespQueue].lock = comm->queue[HostNormCmdQueue].lock; + comm->queue[AdapHighRespQueue].lock = comm->queue[HostHighCmdQueue].lock; + + return 0; +} + +struct aac_dev *aac_init_adapter(struct aac_dev *dev) +{ + /* + * Ok now init the communication subsystem + */ + dev->queues = (struct aac_queue_block *) kmalloc(sizeof(struct aac_queue_block), GFP_KERNEL); + if (dev->queues == NULL) { + printk(KERN_ERR "Error could not allocate comm region.\n"); + return NULL; + } + memset(dev->queues, 0, sizeof(struct aac_queue_block)); + + if (aac_comm_init(dev)<0) + return NULL; + /* + * Initialize the list of fibs + */ + if(fib_setup(dev)<0) + return NULL; + + INIT_LIST_HEAD(&dev->fib_list); + init_completion(&dev->aif_completion); + /* + * Add this adapter in to our dev List. + */ + dev->next = devices; + devices = dev; + return dev; +} + + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/scsi/aacraid/commsup.c linux.2.5.40-ac2/drivers/scsi/aacraid/commsup.c --- linux.2.5.40/drivers/scsi/aacraid/commsup.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/drivers/scsi/aacraid/commsup.c 2002-10-02 21:37:46.000000000 +0100 @@ -0,0 +1,948 @@ +/* + * Adaptec AAC series RAID controller driver + * (c) Copyright 2001 Red Hat Inc. + * + * based on the old aacraid driver that is.. + + * Adaptec aacraid device driver for Linux. + * + * Copyright (c) 2000 Adaptec, Inc. (aacraid@adaptec.com) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; see the file COPYING. If not, write to + * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. + * + * Module Name: + * commsup.c + * + * Abstract: Contain all routines that are required for FSA host/adapter + * commuication. + * + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "scsi.h" +#include "hosts.h" + +#include "aacraid.h" + +/** + * fib_map_alloc - allocate the fib objects + * @dev: Adapter to allocate for + * + * Allocate and map the shared PCI space for the FIB blocks used to + * talk to the Adaptec firmware. + */ + +static int fib_map_alloc(struct aac_dev *dev) +{ + if((dev->hw_fib_va = pci_alloc_consistent(dev->pdev, sizeof(struct hw_fib) * AAC_NUM_FIB, &dev->hw_fib_pa))==NULL) + return -ENOMEM; + return 0; +} + +/** + * fib_map_free - free the fib objects + * @dev: Adapter to free + * + * Free the PCI mappings and the memory allocated for FIB blocks + * on this adapter. + */ + +void fib_map_free(struct aac_dev *dev) +{ + pci_free_consistent(dev->pdev, sizeof(struct hw_fib) * AAC_NUM_FIB, dev->hw_fib_va, dev->hw_fib_pa); +} + +/** + * fib_setup - setup the fibs + * @dev: Adapter to set up + * + * Allocate the PCI space for the fibs, map it and then intialise the + * fib area, the unmapped fib data and also the free list + */ + +int fib_setup(struct aac_dev * dev) +{ + struct fib *fibptr; + struct hw_fib *fib; + dma_addr_t fibpa; + int i; + + if(fib_map_alloc(dev)<0) + return -ENOMEM; + + fib = dev->hw_fib_va; + fibpa = dev->hw_fib_pa; + memset(fib, 0, sizeof(struct hw_fib) * AAC_NUM_FIB); + /* + * Initialise the fibs + */ + for (i = 0, fibptr = &dev->fibs[i]; i < AAC_NUM_FIB; i++, fibptr++) + { + fibptr->dev = dev; + fibptr->fib = fib; + fibptr->data = (void *) fibptr->fib->data; + fibptr->next = fibptr+1; /* Forward chain the fibs */ + init_MUTEX_LOCKED(&fibptr->event_wait); + spin_lock_init(&fibptr->event_lock); + fib->header.XferState = cpu_to_le32(0xffffffff); + fib->header.SenderSize = cpu_to_le16(sizeof(struct hw_fib)); + fibptr->logicaladdr = (unsigned long) fibpa; + fib = (struct hw_fib *)((unsigned char *)fib + sizeof(struct hw_fib)); + fibpa = fibpa + sizeof(struct hw_fib); + } + /* + * Add the fib chain to the free list + */ + dev->fibs[AAC_NUM_FIB-1].next = NULL; + /* + * Enable this to debug out of queue space + */ + dev->free_fib = &dev->fibs[0]; + return 0; +} + +/** + * fib_alloc - allocate a fib + * @dev: Adapter to allocate the fib for + * + * Allocate a fib from the adapter fib pool. If the pool is empty we + * wait for fibs to become free. + */ + +struct fib * fib_alloc(struct aac_dev *dev) +{ + struct fib * fibptr; + unsigned long flags; + + spin_lock_irqsave(&dev->fib_lock, flags); + fibptr = dev->free_fib; + if(!fibptr) + BUG(); + dev->free_fib = fibptr->next; + spin_unlock_irqrestore(&dev->fib_lock, flags); + /* + * Set the proper node type code and node byte size + */ + fibptr->type = FSAFS_NTC_FIB_CONTEXT; + fibptr->size = sizeof(struct fib); + /* + * Null out fields that depend on being zero at the start of + * each I/O + */ + fibptr->fib->header.XferState = cpu_to_le32(0); + fibptr->callback = NULL; + fibptr->callback_data = NULL; + + return fibptr; +} + +/** + * fib_free - free a fib + * @fibptr: fib to free up + * + * Frees up a fib and places it on the appropriate queue + * (either free or timed out) + */ + +void fib_free(struct fib * fibptr) +{ + unsigned long flags; + + spin_lock_irqsave(&fibptr->dev->fib_lock, flags); + + if (fibptr->flags & FIB_CONTEXT_FLAG_TIMED_OUT) { + aac_config.fib_timeouts++; + fibptr->next = fibptr->dev->timeout_fib; + fibptr->dev->timeout_fib = fibptr; + } else { + if (fibptr->fib->header.XferState != 0) { + printk(KERN_WARNING "fib_free, XferState != 0, fibptr = 0x%p, XferState = 0x%x\n", + (void *)fibptr, fibptr->fib->header.XferState); + } + fibptr->next = fibptr->dev->free_fib; + fibptr->dev->free_fib = fibptr; + } + spin_unlock_irqrestore(&fibptr->dev->fib_lock, flags); +} + +/** + * fib_init - initialise a fib + * @fibptr: The fib to initialize + * + * Set up the generic fib fields ready for use + */ + +void fib_init(struct fib *fibptr) +{ + struct hw_fib *fib = fibptr->fib; + + fib->header.StructType = FIB_MAGIC; + fib->header.Size = cpu_to_le16(sizeof(struct hw_fib)); + fib->header.XferState = cpu_to_le32(HostOwned | FibInitialized | FibEmpty | FastResponseCapable); + fib->header.SenderFibAddress = cpu_to_le32(0); + fib->header.ReceiverFibAddress = cpu_to_le32(0); + fib->header.SenderSize = cpu_to_le16(sizeof(struct hw_fib)); +} + +/** + * fib_deallocate - deallocate a fib + * @fibptr: fib to deallocate + * + * Will deallocate and return to the free pool the FIB pointed to by the + * caller. + */ + +void fib_dealloc(struct fib * fibptr) +{ + struct hw_fib *fib = fibptr->fib; + if(fib->header.StructType != FIB_MAGIC) + BUG(); + fib->header.XferState = cpu_to_le32(0); +} + +/* + * Commuication primitives define and support the queuing method we use to + * support host to adapter commuication. All queue accesses happen through + * these routines and are the only routines which have a knowledge of the + * how these queues are implemented. + */ + +/** + * aac_get_entry - get a queue entry + * @dev: Adapter + * @qid: Queue Number + * @entry: Entry return + * @index: Index return + * @nonotify: notification control + * + * With a priority the routine returns a queue entry if the queue has free entries. If the queue + * is full(no free entries) than no entry is returned and the function returns 0 otherwise 1 is + * returned. + */ + +static int aac_get_entry (struct aac_dev * dev, u32 qid, struct aac_entry **entry, u32 * index, unsigned long *nonotify) +{ + struct aac_queue * q; + + /* + * All of the queues wrap when they reach the end, so we check + * to see if they have reached the end and if they have we just + * set the index back to zero. This is a wrap. You could or off + * the high bits in all updates but this is a bit faster I think. + */ + + q = &dev->queues->queue[qid]; + + *index = le32_to_cpu(*(q->headers.producer)); + if (*index - 2 == le32_to_cpu(*(q->headers.consumer))) + *nonotify = 1; + + if (qid == AdapHighCmdQueue) { + if (*index >= ADAP_HIGH_CMD_ENTRIES) + *index = 0; + } else if (qid == AdapNormCmdQueue) { + if (*index >= ADAP_NORM_CMD_ENTRIES) + *index = 0; /* Wrap to front of the Producer Queue. */ + } + else if (qid == AdapHighRespQueue) + { + if (*index >= ADAP_HIGH_RESP_ENTRIES) + *index = 0; + } + else if (qid == AdapNormRespQueue) + { + if (*index >= ADAP_NORM_RESP_ENTRIES) + *index = 0; /* Wrap to front of the Producer Queue. */ + } + else BUG(); + + if (*index + 1 == le32_to_cpu(*(q->headers.consumer))) { /* Queue is full */ + printk(KERN_WARNING "Queue %d full, %ld outstanding.\n", qid, q->numpending); + return 0; + } else { + *entry = q->base + *index; + return 1; + } +} + +/** + * aac_queue_get - get the next free QE + * @dev: Adapter + * @index: Returned index + * @priority: Priority of fib + * @fib: Fib to associate with the queue entry + * @wait: Wait if queue full + * @fibptr: Driver fib object to go with fib + * @nonotify: Don't notify the adapter + * + * Gets the next free QE off the requested priorty adapter command + * queue and associates the Fib with the QE. The QE represented by + * index is ready to insert on the queue when this routine returns + * success. + */ + +static int aac_queue_get(struct aac_dev * dev, u32 * index, u32 qid, struct hw_fib * fib, int wait, struct fib * fibptr, unsigned long *nonotify) +{ + struct aac_entry * entry = NULL; + int map = 0; + struct aac_queue * q = &dev->queues->queue[qid]; + + spin_lock_irqsave(q->lock, q->SavedIrql); + + if (qid == AdapHighCmdQueue || qid == AdapNormCmdQueue) + { + /* if no entries wait for some if caller wants to */ + while (!aac_get_entry(dev, qid, &entry, index, nonotify)) + { + printk(KERN_ERR "GetEntries failed\n"); + } + /* + * Setup queue entry with a command, status and fib mapped + */ + entry->size = cpu_to_le32(le16_to_cpu(fib->header.Size)); + map = 1; + } + else if (qid == AdapHighRespQueue || qid == AdapNormRespQueue) + { + while(!aac_get_entry(dev, qid, &entry, index, nonotify)) + { + /* if no entries wait for some if caller wants to */ + } + /* + * Setup queue entry with command, status and fib mapped + */ + entry->size = cpu_to_le32(le16_to_cpu(fib->header.Size)); + entry->addr = cpu_to_le32(fib->header.SenderFibAddress); /* Restore adapters pointer to the FIB */ + fib->header.ReceiverFibAddress = fib->header.SenderFibAddress; /* Let the adapter now where to find its data */ + map = 0; + } + /* + * If MapFib is true than we need to map the Fib and put pointers + * in the queue entry. + */ + if (map) + entry->addr = cpu_to_le32((unsigned long)(fibptr->logicaladdr)); + return 0; +} + + +/** + * aac_insert_entry - insert a queue entry + * @dev: Adapter + * @index: Index of entry to insert + * @qid: Queue number + * @nonotify: Suppress adapter notification + * + * Gets the next free QE off the requested priorty adapter command + * queue and associates the Fib with the QE. The QE represented by + * index is ready to insert on the queue when this routine returns + * success. + */ + +static int aac_insert_entry(struct aac_dev * dev, u32 index, u32 qid, unsigned long nonotify) +{ + struct aac_queue * q = &dev->queues->queue[qid]; + + if(q == NULL) + BUG(); + *(q->headers.producer) = cpu_to_le32(index + 1); + spin_unlock_irqrestore(q->lock, q->SavedIrql); + + if (qid == AdapHighCmdQueue || + qid == AdapNormCmdQueue || + qid == AdapHighRespQueue || + qid == AdapNormRespQueue) + { + if (!nonotify) + aac_adapter_notify(dev, qid); + } + else + printk("Suprise insert!\n"); + return 0; +} + +/* + * Define the highest level of host to adapter communication routines. + * These routines will support host to adapter FS commuication. These + * routines have no knowledge of the commuication method used. This level + * sends and receives FIBs. This level has no knowledge of how these FIBs + * get passed back and forth. + */ + +/** + * fib_send - send a fib to the adapter + * @command: Command to send + * @fibptr: The fib + * @size: Size of fib data area + * @priority: Priority of Fib + * @wait: Async/sync select + * @reply: True if a reply is wanted + * @callback: Called with reply + * @callback_data: Passed to callback + * + * Sends the requested FIB to the adapter and optionally will wait for a + * response FIB. If the caller does not wish to wait for a response than + * an event to wait on must be supplied. This event will be set when a + * response FIB is received from the adapter. + */ + +int fib_send(u16 command, struct fib * fibptr, unsigned long size, int priority, int wait, int reply, fib_callback callback, void * callback_data) +{ + u32 index; + u32 qid; + struct aac_dev * dev = fibptr->dev; + unsigned long nointr = 0; + struct hw_fib * fib = fibptr->fib; + struct aac_queue * q; + unsigned long flags = 0; + + if (!(le32_to_cpu(fib->header.XferState) & HostOwned)) + return -EBUSY; + /* + * There are 5 cases with the wait and reponse requested flags. + * The only invalid cases are if the caller requests to wait and + * does not request a response and if the caller does not want a + * response and the Fibis not allocated from pool. If a response + * is not requesed the Fib will just be deallocaed by the DPC + * routine when the response comes back from the adapter. No + * further processing will be done besides deleting the Fib. We + * will have a debug mode where the adapter can notify the host + * it had a problem and the host can log that fact. + */ + if (wait && !reply) { + return -EINVAL; + } else if (!wait && reply) { + fib->header.XferState |= cpu_to_le32(Async | ResponseExpected); + FIB_COUNTER_INCREMENT(aac_config.AsyncSent); + } else if (!wait && !reply) { + fib->header.XferState |= cpu_to_le32(NoResponseExpected); + FIB_COUNTER_INCREMENT(aac_config.NoResponseSent); + } else if (wait && reply) { + fib->header.XferState |= cpu_to_le32(ResponseExpected); + FIB_COUNTER_INCREMENT(aac_config.NormalSent); + } + /* + * Map the fib into 32bits by using the fib number + */ + fib->header.SenderData = fibptr-&dev->fibs[0]; /* for callback */ + /* + * Set FIB state to indicate where it came from and if we want a + * response from the adapter. Also load the command from the + * caller. + * + * Map the hw fib pointer as a 32bit value + */ + fib->header.SenderFibAddress = fib2addr(fib); + fib->header.Command = cpu_to_le16(command); + fib->header.XferState |= cpu_to_le32(SentFromHost); + fibptr->fib->header.Flags = 0; /* Zero the flags field - its internal only... */ + /* + * Set the size of the Fib we want to send to the adapter + */ + fib->header.Size = cpu_to_le16(sizeof(struct aac_fibhdr) + size); + if (le16_to_cpu(fib->header.Size) > le16_to_cpu(fib->header.SenderSize)) { + return -EMSGSIZE; + } + /* + * Get a queue entry connect the FIB to it and send an notify + * the adapter a command is ready. + */ + if (priority == FsaHigh) { + fib->header.XferState |= cpu_to_le32(HighPriority); + qid = AdapHighCmdQueue; + } else { + fib->header.XferState |= cpu_to_le32(NormalPriority); + qid = AdapNormCmdQueue; + } + q = &dev->queues->queue[qid]; + + if(wait) + spin_lock_irqsave(&fibptr->event_lock, flags); + if(aac_queue_get( dev, &index, qid, fib, 1, fibptr, &nointr)<0) + return -EWOULDBLOCK; + dprintk((KERN_DEBUG "fib_send: inserting a queue entry at index %d.\n",index)); + dprintk((KERN_DEBUG "Fib contents:.\n")); + dprintk((KERN_DEBUG " Command = %d.\n", fib->header.Command)); + dprintk((KERN_DEBUG " XferState = %x.\n", fib->header.XferState)); + /* + * Fill in the Callback and CallbackContext if we are not + * going to wait. + */ + if (!wait) { + fibptr->callback = callback; + fibptr->callback_data = callback_data; + } + FIB_COUNTER_INCREMENT(aac_config.FibsSent); + list_add_tail(&fibptr->queue, &q->pendingq); + q->numpending++; + + fibptr->done = 0; + + if(aac_insert_entry(dev, index, qid, (nointr & aac_config.irq_mod)) < 0) + return -EWOULDBLOCK; + /* + * If the caller wanted us to wait for response wait now. + */ + + if (wait) { + spin_unlock_irqrestore(&fibptr->event_lock, flags); + down(&fibptr->event_wait); + if(fibptr->done == 0) + BUG(); + + if((fibptr->flags & FIB_CONTEXT_FLAG_TIMED_OUT)) + return -ETIMEDOUT; + else + return 0; + } + /* + * If the user does not want a response than return success otherwise + * return pending + */ + if (reply) + return -EINPROGRESS; + else + return 0; +} + +/** + * aac_consumer_get - get the top of the queue + * @dev: Adapter + * @q: Queue + * @entry: Return entry + * + * Will return a pointer to the entry on the top of the queue requested that + * we are a consumer of, and return the address of the queue entry. It does + * not change the state of the queue. + */ + +int aac_consumer_get(struct aac_dev * dev, struct aac_queue * q, struct aac_entry **entry) +{ + u32 index; + int status; + + if (*q->headers.producer == *q->headers.consumer) { + status = 0; + } else { + /* + * The consumer index must be wrapped if we have reached + * the end of the queue, else we just use the entry + * pointed to by the header index + */ + if (le32_to_cpu(*q->headers.consumer) >= q->entries) + index = 0; + else + index = le32_to_cpu(*q->headers.consumer); + *entry = q->base + index; + status = 1; + } + return(status); +} + +int aac_consumer_avail(struct aac_dev *dev, struct aac_queue * q) +{ + return (*q->headers.producer != *q->headers.consumer); +} + + +/** + * aac_consumer_free - free consumer entry + * @dev: Adapter + * @q: Queue + * @qid: Queue ident + * + * Frees up the current top of the queue we are a consumer of. If the + * queue was full notify the producer that the queue is no longer full. + */ + +void aac_consumer_free(struct aac_dev * dev, struct aac_queue *q, u32 qid) +{ + int wasfull = 0; + u32 notify; + + if (*q->headers.producer+1 == *q->headers.consumer) + wasfull = 1; + + if (le32_to_cpu(*q->headers.consumer) >= q->entries) + *q->headers.consumer = cpu_to_le32(1); + else + *q->headers.consumer = cpu_to_le32(le32_to_cpu(*q->headers.consumer)+1); + + if (wasfull) { + switch (qid) { + + case HostNormCmdQueue: + notify = HostNormCmdNotFull; + break; + case HostHighCmdQueue: + notify = HostHighCmdNotFull; + break; + case HostNormRespQueue: + notify = HostNormRespNotFull; + break; + case HostHighRespQueue: + notify = HostHighRespNotFull; + break; + default: + BUG(); + return; + } + aac_adapter_notify(dev, notify); + } +} + +/** + * fib_adapter_complete - complete adapter issued fib + * @fibptr: fib to complete + * @size: size of fib + * + * Will do all necessary work to complete a FIB that was sent from + * the adapter. + */ + +int fib_adapter_complete(struct fib * fibptr, unsigned short size) +{ + struct hw_fib * fib = fibptr->fib; + struct aac_dev * dev = fibptr->dev; + unsigned long nointr = 0; + + if (le32_to_cpu(fib->header.XferState) == 0) + return 0; + /* + * If we plan to do anything check the structure type first. + */ + if ( fib->header.StructType != FIB_MAGIC ) { + return -EINVAL; + } + /* + * This block handles the case where the adapter had sent us a + * command and we have finished processing the command. We + * call completeFib when we are done processing the command + * and want to send a response back to the adapter. This will + * send the completed cdb to the adapter. + */ + if (fib->header.XferState & cpu_to_le32(SentFromAdapter)) { + fib->header.XferState |= cpu_to_le32(HostProcessed); + if (fib->header.XferState & cpu_to_le32(HighPriority)) { + u32 index; + if (size) + { + size += sizeof(struct aac_fibhdr); + if (size > le16_to_cpu(fib->header.SenderSize)) + return -EMSGSIZE; + fib->header.Size = cpu_to_le16(size); + } + if(aac_queue_get(dev, &index, AdapHighRespQueue, fib, 1, NULL, &nointr) < 0) { + return -EWOULDBLOCK; + } + if (aac_insert_entry(dev, index, AdapHighRespQueue, (nointr & (int)aac_config.irq_mod)) != 0) { + } + } + else if (fib->header.XferState & NormalPriority) + { + u32 index; + + if (size) { + size += sizeof(struct aac_fibhdr); + if (size > le16_to_cpu(fib->header.SenderSize)) + return -EMSGSIZE; + fib->header.Size = cpu_to_le16(size); + } + if (aac_queue_get(dev, &index, AdapNormRespQueue, fib, 1, NULL, &nointr) < 0) + return -EWOULDBLOCK; + if (aac_insert_entry(dev, index, AdapNormRespQueue, + (nointr & (int)aac_config.irq_mod)) != 0) + { + } + } + } + else + { + printk(KERN_WARNING "fib_adapter_complete: Unknown xferstate detected.\n"); + BUG(); + } + return 0; +} + +/** + * fib_complete - fib completion handler + * @fib: FIB to complete + * + * Will do all necessary work to complete a FIB. + */ + +int fib_complete(struct fib * fibptr) +{ + struct hw_fib * fib = fibptr->fib; + + /* + * Check for a fib which has already been completed + */ + + if (fib->header.XferState == cpu_to_le32(0)) + return 0; + /* + * If we plan to do anything check the structure type first. + */ + + if (fib->header.StructType != FIB_MAGIC) + return -EINVAL; + /* + * This block completes a cdb which orginated on the host and we + * just need to deallocate the cdb or reinit it. At this point the + * command is complete that we had sent to the adapter and this + * cdb could be reused. + */ + if((fib->header.XferState & cpu_to_le32(SentFromHost)) && + (fib->header.XferState & cpu_to_le32(AdapterProcessed))) + { + fib_dealloc(fibptr); + } + else if(fib->header.XferState & cpu_to_le32(SentFromHost)) + { + /* + * This handles the case when the host has aborted the I/O + * to the adapter because the adapter is not responding + */ + fib_dealloc(fibptr); + } else if(fib->header.XferState & cpu_to_le32(HostOwned)) { + fib_dealloc(fibptr); + } else { + BUG(); + } + return 0; +} + +/** + * aac_printf - handle printf from firmware + * @dev: Adapter + * @val: Message info + * + * Print a message passed to us by the controller firmware on the + * Adaptec board + */ + +void aac_printf(struct aac_dev *dev, u32 val) +{ + int length = val & 0xffff; + int level = (val >> 16) & 0xffff; + char *cp = dev->printfbuf; + + /* + * The size of the printfbuf is set in port.c + * There is no variable or define for it + */ + if (length > 255) + length = 255; + if (cp[length] != 0) + cp[length] = 0; + if (level == LOG_HIGH_ERROR) + printk(KERN_WARNING "aacraid:%s", cp); + else + printk(KERN_INFO "aacraid:%s", cp); + memset(cp, 0, 256); +} + + +/** + * aac_handle_aif - Handle a message from the firmware + * @dev: Which adapter this fib is from + * @fibptr: Pointer to fibptr from adapter + * + * This routine handles a driver notify fib from the adapter and + * dispatches it to the appropriate routine for handling. + */ + +static void aac_handle_aif(struct aac_dev * dev, struct fib * fibptr) +{ + struct hw_fib * fib = fibptr->fib; + /* + * Set the status of this FIB to be Invalid parameter. + * + * *(u32 *)fib->data = ST_INVAL; + */ + *(u32 *)fib->data = cpu_to_le32(ST_OK); + fib_adapter_complete(fibptr, sizeof(u32)); +} + +/** + * aac_command_thread - command processing thread + * @dev: Adapter to monitor + * + * Waits on the commandready event in it's queue. When the event gets set + * it will pull FIBs off it's queue. It will continue to pull FIBs off + * until the queue is empty. When the queue is empty it will wait for + * more FIBs. + */ + +int aac_command_thread(struct aac_dev * dev) +{ + struct hw_fib *fib, *newfib; + struct fib fibptr; /* for error logging */ + struct aac_queue_block *queues = dev->queues; + struct aac_fib_context *fibctx; + unsigned long flags; + DECLARE_WAITQUEUE(wait, current); + + /* + * We can only have one thread per adapter for AIF's. + */ + if (dev->aif_thread) + return -EINVAL; + /* + * Set up the name that will appear in 'ps' + * stored in task_struct.comm[16]. + */ + sprintf(current->comm, "aacraid"); + daemonize(); + /* + * Let the DPC know it has a place to send the AIF's to. + */ + dev->aif_thread = 1; + memset(&fibptr, 0, sizeof(struct fib)); + add_wait_queue(&queues->queue[HostNormCmdQueue].cmdready, &wait); + set_current_state(TASK_INTERRUPTIBLE); + while(1) + { + spin_lock_irqsave(queues->queue[HostNormCmdQueue].lock, flags); + while(!list_empty(&(queues->queue[HostNormCmdQueue].cmdq))) { + struct list_head *entry; + struct aac_aifcmd * aifcmd; + + set_current_state(TASK_RUNNING); + + entry = queues->queue[HostNormCmdQueue].cmdq.next; + list_del(entry); + + spin_unlock_irqrestore(queues->queue[HostNormCmdQueue].lock, flags); + fib = list_entry(entry, struct hw_fib, header.FibLinks); + /* + * We will process the FIB here or pass it to a + * worker thread that is TBD. We Really can't + * do anything at this point since we don't have + * anything defined for this thread to do. + */ + memset(&fibptr, 0, sizeof(struct fib)); + fibptr.type = FSAFS_NTC_FIB_CONTEXT; + fibptr.size = sizeof( struct fib ); + fibptr.fib = fib; + fibptr.data = fib->data; + fibptr.dev = dev; + /* + * We only handle AifRequest fibs from the adapter. + */ + aifcmd = (struct aac_aifcmd *) fib->data; + if (aifcmd->command == le16_to_cpu(AifCmdDriverNotify)) { + aac_handle_aif(dev, &fibptr); + } else { + /* The u32 here is important and intended. We are using + 32bit wrapping time to fit the adapter field */ + + u32 time_now, time_last; + unsigned long flagv; + + time_now = jiffies/HZ; + + spin_lock_irqsave(&dev->fib_lock, flagv); + entry = dev->fib_list.next; + /* + * For each Context that is on the + * fibctxList, make a copy of the + * fib, and then set the event to wake up the + * thread that is waiting for it. + */ + while (entry != &dev->fib_list) { + /* + * Extract the fibctx + */ + fibctx = list_entry(entry, struct aac_fib_context, next); + /* + * Check if the queue is getting + * backlogged + */ + if (fibctx->count > 20) + { + time_last = fibctx->jiffies; + /* + * Has it been > 2 minutes + * since the last read off + * the queue? + */ + if ((time_now - time_last) > 120) { + entry = entry->next; + aac_close_fib_context(dev, fibctx); + continue; + } + } + /* + * Warning: no sleep allowed while + * holding spinlock + */ + newfib = kmalloc(sizeof(struct hw_fib), GFP_ATOMIC); + if (newfib) { + /* + * Make the copy of the FIB + */ + memcpy(newfib, fib, sizeof(struct hw_fib)); + /* + * Put the FIB onto the + * fibctx's fibs + */ + list_add_tail(&newfib->header.FibLinks, &fibctx->fibs); + fibctx->count++; + /* + * Set the event to wake up the + * thread that will waiting. + */ + up(&fibctx->wait_sem); + } else { + printk(KERN_WARNING "aifd: didn't allocate NewFib.\n"); + } + entry = entry->next; + } + /* + * Set the status of this FIB + */ + *(u32 *)fib->data = cpu_to_le32(ST_OK); + fib_adapter_complete(&fibptr, sizeof(u32)); + spin_unlock_irqrestore(&dev->fib_lock, flagv); + } + spin_lock_irqsave(queues->queue[HostNormCmdQueue].lock, flags); + } + /* + * There are no more AIF's + */ + spin_unlock_irqrestore(queues->queue[HostNormCmdQueue].lock, flags); + schedule(); + + if(signal_pending(current)) + break; + set_current_state(TASK_INTERRUPTIBLE); + } + remove_wait_queue(&queues->queue[HostNormCmdQueue].cmdready, &wait); + dev->aif_thread = 0; + complete_and_exit(&dev->aif_completion, 0); +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/scsi/aacraid/dpcsup.c linux.2.5.40-ac2/drivers/scsi/aacraid/dpcsup.c --- linux.2.5.40/drivers/scsi/aacraid/dpcsup.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/drivers/scsi/aacraid/dpcsup.c 2002-10-02 21:37:46.000000000 +0100 @@ -0,0 +1,201 @@ +/* + * Adaptec AAC series RAID controller driver + * (c) Copyright 2001 Red Hat Inc. + * + * based on the old aacraid driver that is.. + * Adaptec aacraid device driver for Linux. + * + * Copyright (c) 2000 Adaptec, Inc. (aacraid@adaptec.com) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; see the file COPYING. If not, write to + * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. + * + * Module Name: + * dpcsup.c + * + * Abstract: All DPC processing routines for the cyclone board occur here. + * + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "scsi.h" +#include "hosts.h" + +#include "aacraid.h" + +/** + * aac_response_normal - Handle command replies + * @q: Queue to read from + * + * This DPC routine will be run when the adapter interrupts us to let us + * know there is a response on our normal priority queue. We will pull off + * all QE there are and wake up all the waiters before exiting. We will + * take a spinlock out on the queue before operating on it. + */ + +unsigned int aac_response_normal(struct aac_queue * q) +{ + struct aac_dev * dev = q->dev; + struct aac_entry *entry; + struct hw_fib * hwfib; + struct fib * fib; + int consumed = 0; + unsigned long flags; + + spin_lock_irqsave(q->lock, flags); + + /* + * Keep pulling response QEs off the response queue and waking + * up the waiters until there are no more QEs. We then return + * back to the system. If no response was requesed we just + * deallocate the Fib here and continue. + */ + while(aac_consumer_get(dev, q, &entry)) + { + int fast; + + fast = (int) (entry->addr & 0x01); + hwfib = addr2fib(entry->addr & ~0x01); + aac_consumer_free(dev, q, HostNormRespQueue); + fib = &dev->fibs[hwfib->header.SenderData]; + /* + * Remove this fib from the Outstanding I/O queue. + * But only if it has not already been timed out. + * + * If the fib has been timed out already, then just + * continue. The caller has already been notified that + * the fib timed out. + */ + if (!(fib->flags & FIB_CONTEXT_FLAG_TIMED_OUT)) { + list_del(&fib->queue); + dev->queues->queue[AdapNormCmdQueue].numpending--; + } else { + printk(KERN_WARNING "aacraid: FIB timeout (%x).\n", fib->flags); + continue; + } + spin_unlock_irqrestore(q->lock, flags); + + if (fast) { + /* + * Doctor the fib + */ + *(u32 *)hwfib->data = cpu_to_le32(ST_OK); + hwfib->header.XferState |= cpu_to_le32(AdapterProcessed); + } + + FIB_COUNTER_INCREMENT(aac_config.FibRecved); + + if (hwfib->header.Command == cpu_to_le16(NuFileSystem)) + { + u32 *pstatus = (u32 *)hwfib->data; + if (*pstatus & cpu_to_le32(0xffff0000)) + *pstatus = cpu_to_le32(ST_OK); + } + if (hwfib->header.XferState & cpu_to_le32(NoResponseExpected | Async)) + { + if (hwfib->header.XferState & cpu_to_le32(NoResponseExpected)) + FIB_COUNTER_INCREMENT(aac_config.NoResponseRecved); + else + FIB_COUNTER_INCREMENT(aac_config.AsyncRecved); + /* + * NOTE: we cannot touch the fib after this + * call, because it may have been deallocated. + */ + fib->callback(fib->callback_data, fib); + } else { + unsigned long flagv; + spin_lock_irqsave(&fib->event_lock, flagv); + fib->done = 1; + up(&fib->event_wait); + spin_unlock_irqrestore(&fib->event_lock, flagv); + FIB_COUNTER_INCREMENT(aac_config.NormalRecved); + } + consumed++; + spin_lock_irqsave(q->lock, flags); + } + + if (consumed > aac_config.peak_fibs) + aac_config.peak_fibs = consumed; + if (consumed == 0) + aac_config.zero_fibs++; + + spin_unlock_irqrestore(q->lock, flags); + return 0; +} + + +/** + * aac_command_normal - handle commands + * @q: queue to process + * + * This DPC routine will be queued when the adapter interrupts us to + * let us know there is a command on our normal priority queue. We will + * pull off all QE there are and wake up all the waiters before exiting. + * We will take a spinlock out on the queue before operating on it. + */ + +unsigned int aac_command_normal(struct aac_queue *q) +{ + struct aac_dev * dev = q->dev; + struct aac_entry *entry; + unsigned long flags; + + spin_lock_irqsave(q->lock, flags); + + /* + * Keep pulling response QEs off the response queue and waking + * up the waiters until there are no more QEs. We then return + * back to the system. + */ + while(aac_consumer_get(dev, q, &entry)) + { + struct hw_fib * fib; + fib = addr2fib(entry->addr); + + if (dev->aif_thread) { + list_add_tail(&fib->header.FibLinks, &q->cmdq); + aac_consumer_free(dev, q, HostNormCmdQueue); + wake_up_interruptible(&q->cmdready); + } else { + struct fib fibctx; + aac_consumer_free(dev, q, HostNormCmdQueue); + spin_unlock_irqrestore(q->lock, flags); + memset(&fibctx, 0, sizeof(struct fib)); + fibctx.type = FSAFS_NTC_FIB_CONTEXT; + fibctx.size = sizeof(struct fib); + fibctx.fib = fib; + fibctx.data = fib->data; + fibctx.dev = dev; + /* + * Set the status of this FIB + */ + *(u32 *)fib->data = cpu_to_le32(ST_OK); + fib_adapter_complete(&fibctx, sizeof(u32)); + spin_lock_irqsave(q->lock, flags); + } + } + spin_unlock_irqrestore(q->lock, flags); + return 0; +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/scsi/aacraid/linit.c linux.2.5.40-ac2/drivers/scsi/aacraid/linit.c --- linux.2.5.40/drivers/scsi/aacraid/linit.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/drivers/scsi/aacraid/linit.c 2002-10-02 21:37:46.000000000 +0100 @@ -0,0 +1,743 @@ +/* + * Adaptec AAC series RAID controller driver + * (c) Copyright 2001 Red Hat Inc. + * + * based on the old aacraid driver that is.. + * Adaptec aacraid device driver for Linux. + * + * Copyright (c) 2000 Adaptec, Inc. (aacraid@adaptec.com) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; see the file COPYING. If not, write to + * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. + * + * Module Name: + * linit.c + * + * Abstract: Linux Driver entry module for Adaptec RAID Array Controller + * + * Provides the following driver entry points: + * aac_detect() + * aac_release() + * aac_queuecommand() + * aac_resetcommand() + * aac_biosparm() + * + */ + +#define AAC_DRIVER_VERSION "0.9.9ac6-TEST" +#define AAC_DRIVER_BUILD_DATE __DATE__ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "scsi.h" +#include "hosts.h" + +#include + +#include "aacraid.h" +#include "sd.h" + +#define AAC_DRIVERNAME "aacraid" + +MODULE_AUTHOR("Red Hat Inc and Adaptec"); +MODULE_DESCRIPTION("Supports Dell PERC2, 2/Si, 3/Si, 3/Di, Adaptec 2120S, 2200S, 5400S, and HP NetRAID-4M devices. http://domsch.com/linux/ or http://linux.adaptec.com"); +MODULE_LICENSE("GPL"); +MODULE_PARM(nondasd, "i"); +MODULE_PARM_DESC(nondasd, "Control scanning of hba for nondasd devices. 0=off, 1=on"); + +static int nondasd=-1; + +struct aac_dev *aac_devices[MAXIMUM_NUM_ADAPTERS]; + +static unsigned aac_count = 0; +static int aac_cfg_major = -1; + +/* + * Because of the way Linux names scsi devices, the order in this table has + * become important. Check for on-board Raid first, add-in cards second. + * + * dmb - For now we add the number of channels to this structure. + * In the future we should add a fib that reports the number of channels + * for the card. At that time we can remove the channels from here + */ + +static struct aac_driver_ident aac_drivers[] = { + { 0x1028, 0x0001, 0x1028, 0x0001, aac_rx_init, "percraid", "DELL ", "PERCRAID ", 2 }, /* PERC 2/Si */ + { 0x1028, 0x0002, 0x1028, 0x0002, aac_rx_init, "percraid", "DELL ", "PERCRAID ", 2 }, /* PERC 3/Di */ + { 0x1028, 0x0003, 0x1028, 0x0003, aac_rx_init, "percraid", "DELL ", "PERCRAID ", 2 }, /* PERC 3/Si */ + { 0x1028, 0x0004, 0x1028, 0x00d0, aac_rx_init, "percraid", "DELL ", "PERCRAID ", 2 }, /* PERC 3/Si */ + { 0x1028, 0x0002, 0x1028, 0x00d1, aac_rx_init, "percraid", "DELL ", "PERCRAID ", 2 }, /* PERC 3/Di */ + { 0x1028, 0x0002, 0x1028, 0x00d9, aac_rx_init, "percraid", "DELL ", "PERCRAID ", 2 }, /* PERC 3/Di */ + { 0x1028, 0x000a, 0x1028, 0x0106, aac_rx_init, "percraid", "DELL ", "PERCRAID ", 2 }, /* PERC 3/Di */ + { 0x1028, 0x000a, 0x1028, 0x011b, aac_rx_init, "percraid", "DELL ", "PERCRAID ", 2 }, /* PERC 3/Di */ + { 0x1028, 0x000a, 0x1028, 0x0121, aac_rx_init, "percraid", "DELL ", "PERCRAID ", 2 }, /* PERC 3/Di */ + { 0x9005, 0x0283, 0x9005, 0x0283, aac_rx_init, "aacraid", "ADAPTEC ", "catapult ", 2 }, /* catapult*/ + { 0x9005, 0x0284, 0x9005, 0x0284, aac_rx_init, "aacraid", "ADAPTEC ", "tomcat ", 2 }, /* tomcat*/ + { 0x9005, 0x0285, 0x9005, 0x0286, aac_rx_init, "aacraid", "ADAPTEC ", "Adaptec 2120S ", 1 }, /* Adaptec 2120S (Crusader)*/ + { 0x9005, 0x0285, 0x9005, 0x0285, aac_rx_init, "aacraid", "ADAPTEC ", "Adaptec 2200S ", 2 }, /* Adaptec 2200S (Vulcan)*/ + { 0x9005, 0x0285, 0x9005, 0x0287, aac_rx_init, "aacraid", "ADAPTEC ", "Adaptec 2200S ", 2 }, /* Adaptec 2200S (Vulcan-2m)*/ + { 0x1011, 0x0046, 0x9005, 0x0365, aac_sa_init, "aacraid", "ADAPTEC ", "Adaptec 5400S ", 4 }, /* Adaptec 5400S (Mustang)*/ + { 0x1011, 0x0046, 0x9005, 0x0364, aac_sa_init, "aacraid", "ADAPTEC ", "AAC-364 ", 4 }, /* Adaptec 5400S (Mustang)*/ + { 0x1011, 0x0046, 0x9005, 0x1364, aac_sa_init, "percraid", "DELL ", "PERCRAID ", 4 }, /* Dell PERC2 "Quad Channel" */ + { 0x1011, 0x0046, 0x103c, 0x10c2, aac_sa_init, "hpnraid", "HP ", "NetRAID-4M ", 4 } /* HP NetRAID-4M */ +}; + +#define NUM_AACTYPES (sizeof(aac_drivers) / sizeof(struct aac_driver_ident)) +static int num_aacdrivers = NUM_AACTYPES; + +static int aac_cfg_ioctl(struct inode * inode, struct file * file, unsigned int cmd, unsigned long arg); +static int aac_cfg_open(struct inode * inode, struct file * file); +static int aac_cfg_release(struct inode * inode,struct file * file); + +static struct file_operations aac_cfg_fops = { + owner: THIS_MODULE, + ioctl: aac_cfg_ioctl, + open: aac_cfg_open, + release: aac_cfg_release +}; + +static int aac_detect(Scsi_Host_Template *); +static int aac_release(struct Scsi_Host *); +static int aac_queuecommand(Scsi_Cmnd *, void (*CompletionRoutine)(Scsi_Cmnd *)); +static int aac_biosparm(Scsi_Disk *, struct block_device *, int *); +static int aac_procinfo(char *, char **, off_t, int, int, int); +static int aac_ioctl(Scsi_Device *, int, void *); +static int aac_eh_abort(Scsi_Cmnd * cmd); +static int aac_eh_device_reset(Scsi_Cmnd* cmd); +static int aac_eh_bus_reset(Scsi_Cmnd* cmd); +static int aac_eh_reset(Scsi_Cmnd* cmd); + +static void aac_queuedepth(struct Scsi_Host *, Scsi_Device *); + +/** + * aac_detect - Probe for aacraid cards + * @template: SCSI driver template + * + * Probe for AAC Host Adapters initialize, register, and report the + * configuration of each AAC Host Adapter found. + * Returns the number of adapters successfully initialized and + * registered. + * Initializes all data necessary for this particular SCSI driver. + * Notes: + * The detect routine must not call any of the mid level functions + * to queue commands because things are not guaranteed to be set + * up yet. The detect routine can send commands to the host adapter + * as long as the program control will not be passed to scsi.c in + * the processing of the command. Note especially that + * scsi_malloc/scsi_free must not be called. + * + */ + +static int aac_detect(Scsi_Host_Template *template) +{ + int index; + int container; + u16 vendor_id, device_id; + struct Scsi_Host *host_ptr; + struct pci_dev *dev = NULL; + struct aac_dev *aac; + struct fsa_scsi_hba *fsa_dev_ptr; + char *name = NULL; + + printk(KERN_INFO "Red Hat/Adaptec aacraid driver, %s\n", AAC_DRIVER_BUILD_DATE); + + /* setting up the proc directory structure */ + template->proc_name = "aacraid"; + + for( index = 0; index != num_aacdrivers; index++ ) + { + device_id = aac_drivers[index].device; + vendor_id = aac_drivers[index].vendor; + name = aac_drivers[index].name; + dprintk((KERN_DEBUG "Checking %s %x/%x/%x/%x.\n", + name, vendor_id, device_id, + aac_drivers[index].subsystem_vendor, + aac_drivers[index].subsystem_device)); + + dev = NULL; + while((dev = pci_find_device(vendor_id, device_id, dev))) { + if (pci_enable_device(dev)) + continue; + pci_set_master(dev); + pci_set_dma_mask(dev, 0xFFFFFFFFULL); + + if((dev->subsystem_vendor != aac_drivers[index].subsystem_vendor) || + (dev->subsystem_device != aac_drivers[index].subsystem_device)) + continue; + + dprintk((KERN_DEBUG "%s device detected.\n", name)); + dprintk((KERN_DEBUG "%x/%x/%x/%x.\n", vendor_id, device_id, + aac_drivers[index].subsystem_vendor, aac_drivers[index].subsystem_device)); + /* Increment the host adapter count */ + aac_count++; + /* + * scsi_register() allocates memory for a Scsi_Hosts structure and + * links it into the linked list of host adapters. This linked list + * contains the data for all possible scsi hosts. + * This is similar to the Scsi_Host_Template, except that we have + * one entry for each actual physical host adapter on the system, + * stored as a linked list. If there are two AAC boards, then we + * will need to make two Scsi_Host entries, but there will be only + * one Scsi_Host_Template entry. The second argument to scsi_register() + * specifies the size of the extra memory we want to hold any device + * specific information. + */ + host_ptr = scsi_register( template, sizeof(struct aac_dev) ); + /* + * These three parameters can be used to allow for wide SCSI + * and for host adapters that support multiple buses. + */ + host_ptr->max_id = 17; + host_ptr->max_lun = 8; + host_ptr->max_channel = 1; + host_ptr->irq = dev->irq; /* Adapter IRQ number */ + /* host_ptr->base = ( char * )(dev->resource[0].start & ~0xff); */ + host_ptr->base = dev->resource[0].start; + scsi_set_pci_device(host_ptr, dev); + dprintk((KERN_DEBUG "Device base address = 0x%lx [0x%lx].\n", host_ptr->base, dev->resource[0].start)); + dprintk((KERN_DEBUG "Device irq = 0x%x.\n", dev->irq)); + /* + * The unique_id field is a unique identifier that must + * be assigned so that we have some way of identifying + * each host adapter properly and uniquely. For hosts + * that do not support more than one card in the + * system, this does not need to be set. It is + * initialized to zero in scsi_register(). This is the + * value returned as aac->id. + */ + host_ptr->unique_id = aac_count - 1; + /* + * This function is called after the device list has + * been built to find the tagged queueing depth + * supported for each device. + */ + host_ptr->select_queue_depths = aac_queuedepth; + aac = (struct aac_dev *)host_ptr->hostdata; + /* attach a pointer back to Scsi_Host */ + aac->scsi_host_ptr = host_ptr; + aac->pdev = dev; + aac->cardtype = index; + aac->name = aac->scsi_host_ptr->hostt->name; + aac->id = aac->scsi_host_ptr->unique_id; + /* Initialize the ordinal number of the device to -1 */ + fsa_dev_ptr = &(aac->fsa_dev); + for( container = 0; container < MAXIMUM_NUM_CONTAINERS; container++ ) + fsa_dev_ptr->devno[container] = -1; + + dprintk((KERN_DEBUG "Initializing Hardware...\n")); + if((*aac_drivers[index].init)(aac , host_ptr->unique_id) != 0) + { + /* device initialization failed */ + printk(KERN_WARNING "aacraid: device initialization failed.\n"); + scsi_unregister(host_ptr); + aac_count--; + continue; + } + dprintk((KERN_DEBUG "%s:%d device initialization successful.\n", name, host_ptr->unique_id)); + aac_get_adapter_info(aac); + if(nondasd != -1) + { + /* someone told us how to set this on the cmdline */ + aac->nondasd_support = (nondasd!=0); + } + if(aac->nondasd_support != 0){ + printk(KERN_INFO "%s%d: Non-DASD support enabled\n", aac->name, aac->id); + } + dprintk((KERN_DEBUG "%s:%d options flag %04x.\n",name, host_ptr->unique_id,aac->adapter_info.options)); + if(aac->nondasd_support == 1) + { + /* + * max channel will be the physical channels plus 1 virtual channel + * all containers are on the virtual channel 0 + * physical channels are address by their actual physical number+1 + */ + host_ptr->max_channel = aac_drivers[index].channels+1; + } else { + host_ptr->max_channel = 1; + } + dprintk((KERN_DEBUG "Device has %d logical channels\n", host_ptr->max_channel)); + aac_get_containers(aac); + aac_devices[aac_count-1] = aac; + + /* + * dmb - we may need to move these 3 parms somewhere else once + * we get a fib that can report the actual numbers + */ + host_ptr->max_id = AAC_MAX_TARGET; + host_ptr->max_lun = AAC_MAX_LUN; + + /* + * If we are PAE capable then our future DMA mappings + * (for read/write commands) are 64bit clean and don't + * need bouncing. This assumes we do no other 32bit only + * allocations (eg fib table expands) after this point. + */ + + if(aac->pae_support) + pci_set_dma_mask(dev, 0xFFFFFFFFFFFFFFFFUL); + } + } + + if( aac_count ){ + if((aac_cfg_major = register_chrdev( 0, "aac", &aac_cfg_fops))<0) + printk(KERN_WARNING "aacraid: unable to register \"aac\" device.\n"); + } + + template->present = aac_count; /* # of cards of this type found */ + return aac_count; +} + +/** + * aac_release - release SCSI host resources + * @host_ptr: SCSI host to clean up + * + * Release all resources previously acquired to support a specific Host + * Adapter and unregister the AAC Host Adapter. + * + * BUGS: Does not wait for the thread it kills to die. + */ + +static int aac_release(struct Scsi_Host *host_ptr) +{ + struct aac_dev *dev; + dprintk((KERN_DEBUG "aac_release.\n")); + dev = (struct aac_dev *)host_ptr->hostdata; + /* + * kill any threads we started + */ + kill_proc(dev->thread_pid, SIGKILL, 0); + wait_for_completion(&dev->aif_completion); + /* + * Call the comm layer to detach from this adapter + */ + aac_detach(dev); + /* Check free orderings... */ + /* remove interrupt binding */ + free_irq(host_ptr->irq, dev); + iounmap((void * )dev->regs.sa); + /* unregister adapter */ + scsi_unregister(host_ptr); + /* + * FIXME: This assumes no hot plugging is going on... + */ + if( aac_cfg_major >= 0 ) + { + unregister_chrdev(aac_cfg_major, "aac"); + aac_cfg_major = -1; + } + return 0; +} + +/** + * aac_queuecommand - queue a SCSI command + * @scsi_cmnd_ptr: SCSI command to queue + * @CompletionRoutine: Function to call on command completion + * + * Queues a command for execution by the associated Host Adapter. + */ + +static int aac_queuecommand(Scsi_Cmnd *scsi_cmnd_ptr, void (*complete)(Scsi_Cmnd *)) +{ + int ret; + + scsi_cmnd_ptr->scsi_done = complete; + /* + * aac_scsi_cmd() handles command processing, setting the + * result code and calling completion routine. + */ + if((ret = aac_scsi_cmd(scsi_cmnd_ptr)) != 0) + dprintk((KERN_DEBUG "aac_scsi_cmd failed.\n")); + return ret; +} + +/** + * aac_driverinfo - Returns the host adapter name + * @host_ptr: Scsi host to report on + * + * Returns a static string describing the device in question + */ + +const char *aac_driverinfo(struct Scsi_Host *host_ptr) +{ + struct aac_dev *dev = (struct aac_dev *)host_ptr->hostdata; + return aac_drivers[dev->cardtype].name; +} + +/** + * aac_get_driver_ident + * @devtype: index into lookup table + * + * Returns a pointer to the entry in the driver lookup table. + */ +struct aac_driver_ident* aac_get_driver_ident(int devtype) +{ + return &aac_drivers[devtype]; +} + +/** + * aac_biosparm - return BIOS parameters for disk + * @disk: SCSI disk object to process + * @device: Disk in question + * @geom: geometry block to fill in + * + * Return the Heads/Sectors/Cylinders BIOS Disk Parameters for Disk. + * The default disk geometry is 64 heads, 32 sectors, and the appropriate + * number of cylinders so as not to exceed drive capacity. In order for + * disks equal to or larger than 1 GB to be addressable by the BIOS + * without exceeding the BIOS limitation of 1024 cylinders, Extended + * Translation should be enabled. With Extended Translation enabled, + * drives between 1 GB inclusive and 2 GB exclusive are given a disk + * geometry of 128 heads and 32 sectors, and drives above 2 GB inclusive + * are given a disk geometry of 255 heads and 63 sectors. However, if + * the BIOS detects that the Extended Translation setting does not match + * the geometry in the partition table, then the translation inferred + * from the partition table will be used by the BIOS, and a warning may + * be displayed. + */ + +static int aac_biosparm(Scsi_Disk *disk, struct block_device *bdev, int *geom) +{ + struct diskparm *param = (struct diskparm *)geom; + u8 *buf; + + dprintk((KERN_DEBUG "aac_biosparm.\n")); + + /* + * Assuming extended translation is enabled - #REVISIT# + */ + if( disk->capacity >= 2 * 1024 * 1024 ) /* 1 GB in 512 byte sectors */ + { + if( disk->capacity >= 4 * 1024 * 1024 ) /* 2 GB in 512 byte sectors */ + { + param->heads = 255; + param->sectors = 63; + } + else + { + param->heads = 128; + param->sectors = 32; + } + } + else + { + param->heads = 64; + param->sectors = 32; + } + + param->cylinders = disk->capacity/(param->heads * param->sectors); + + /* + * Read the partition table block + */ + + buf = scsi_bios_ptable(bdev); + + /* + * If the boot sector partition table is valid, search for a partition + * table entry whose end_head matches one of the standard geometry + * translations ( 64/32, 128/32, 255/63 ). + */ + + if(*(unsigned short *)(buf + 0x40) == cpu_to_le16(0xaa55)) + { + struct partition *first = (struct partition *)buf; + struct partition *entry = first; + int saved_cylinders = param->cylinders; + int num; + unsigned char end_head, end_sec; + + for(num = 0; num < 4; num++) + { + end_head = entry->end_head; + end_sec = entry->end_sector & 0x3f; + + if(end_head == 63) + { + param->heads = 64; + param->sectors = 32; + break; + } + else if(end_head == 127) + { + param->heads = 128; + param->sectors = 32; + break; + } + else if(end_head == 254) + { + param->heads = 255; + param->sectors = 63; + break; + } + entry++; + } + + if(num == 4) + { + end_head = first->end_head; + end_sec = first->end_sector & 0x3f; + } + + param->cylinders = disk->capacity / (param->heads * param->sectors); + + if(num < 4 && end_sec == param->sectors) + { + if(param->cylinders != saved_cylinders) + dprintk((KERN_DEBUG "Adopting geometry: heads=%d, sectors=%d from partition table %d.\n", + param->heads, param->sectors, num)); + } + else if(end_head > 0 || end_sec > 0) + { + dprintk((KERN_DEBUG "Strange geometry: heads=%d, sectors=%d in partition table %d.\n", + end_head + 1, end_sec, num)); + dprintk((KERN_DEBUG "Using geometry: heads=%d, sectors=%d.\n", + param->heads, param->sectors)); + } + } + kfree(buf); + return 0; +} + +/** + * aac_queuedepth - compute queue depths + * @host: SCSI host in question + * @dev: SCSI device we are considering + * + * Selects queue depths for each target device based on the host adapter's + * total capacity and the queue depth supported by the target device. + * A queue depth of one automatically disables tagged queueing. + */ + +static void aac_queuedepth(struct Scsi_Host * host, Scsi_Device * dev ) +{ + Scsi_Device * dptr; + + dprintk((KERN_DEBUG "aac_queuedepth.\n")); + dprintk((KERN_DEBUG "Device # Q Depth Online\n")); + dprintk((KERN_DEBUG "---------------------------\n")); + for(dptr = dev; dptr != NULL; dptr = dptr->next) + { + if(dptr->host == host) + { + dptr->queue_depth = 10; + dprintk((KERN_DEBUG " %2d %d %d\n", + dptr->id, dptr->queue_depth, dptr->online)); + } + } +} + + +/** + * aac_eh_abort - Abort command if possible. + * @cmd: SCSI command block to abort + * + * Called when the midlayer wishes to abort a command. We don't support + * this facility, and our firmware looks after life for us. We just + * report this as failing + */ + +static int aac_eh_abort(Scsi_Cmnd *cmd) +{ + return FAILED; +} + +/** + * aac_eh_device_reset - Reset command handling + * @cmd: SCSI command block causing the reset + * + * Issue a reset of a SCSI device. We are ourselves not truely a SCSI + * controller and our firmware will do the work for us anyway. Thus this + * is a no-op. We just return FAILED. + */ + +static int aac_eh_device_reset(Scsi_Cmnd *cmd) +{ + return FAILED; +} + +/** + * aac_eh_bus_reset - Reset command handling + * @scsi_cmd: SCSI command block causing the reset + * + * Issue a reset of a SCSI bus. We are ourselves not truely a SCSI + * controller and our firmware will do the work for us anyway. Thus this + * is a no-op. We just return FAILED. + */ + +static int aac_eh_bus_reset(Scsi_Cmnd* cmd) +{ + return FAILED; +} + +/** + * aac_eh_hba_reset - Reset command handling + * @scsi_cmd: SCSI command block causing the reset + * + * Issue a reset of a SCSI host. If things get this bad then arguably we should + * go take a look at what the host adapter is doing and see if something really + * broke (as can occur at least on my Dell QC card if a drive keeps failing spinup) + */ + +static int aac_eh_reset(Scsi_Cmnd* cmd) +{ + printk(KERN_ERR "aacraid: Host adapter reset request. SCSI hang ?\n"); + return FAILED; +} + +/** + * aac_ioctl - Handle SCSI ioctls + * @scsi_dev_ptr: scsi device to operate upon + * @cmd: ioctl command to use issue + * @arg: ioctl data pointer + * + * Issue an ioctl on an aacraid device. Returns a standard unix error code or + * zero for success + */ + +static int aac_ioctl(Scsi_Device * scsi_dev_ptr, int cmd, void * arg) +{ + struct aac_dev *dev; + dprintk((KERN_DEBUG "aac_ioctl.\n")); + dev = (struct aac_dev *)scsi_dev_ptr->host->hostdata; + return aac_do_ioctl(dev, cmd, arg); +} + +/** + * aac_cfg_open - open a configuration file + * @inode: inode being opened + * @file: file handle attached + * + * Called when the configuration device is opened. Does the needed + * set up on the handle and then returns + * + * Bugs: This needs extending to check a given adapter is present + * so we can support hot plugging, and to ref count adapters. + */ + +static int aac_cfg_open(struct inode * inode, struct file * file ) +{ + unsigned minor_number = minor(inode->i_rdev); + if(minor_number >= aac_count) + return -ENODEV; + return 0; +} + +/** + * aac_cfg_release - close down an AAC config device + * @inode: inode of configuration file + * @file: file handle of configuration file + * + * Called when the last close of the configuration file handle + * is performed. + */ + +static int aac_cfg_release(struct inode * inode, struct file * file ) +{ + return 0; +} + +/** + * aac_cfg_ioctl - AAC configuration request + * @inode: inode of device + * @file: file handle + * @cmd: ioctl command code + * @arg: argument + * + * Handles a configuration ioctl. Currently this involves wrapping it + * up and feeding it into the nasty windowsalike glue layer. + * + * Bugs: Needs locking against parallel ioctls lower down + * Bugs: Needs to handle hot plugging + */ + +static int aac_cfg_ioctl(struct inode * inode, struct file * file, unsigned int cmd, unsigned long arg ) +{ + struct aac_dev *dev = aac_devices[minor(inode->i_rdev)]; + return aac_do_ioctl(dev, cmd, (void *)arg); +} + +/* + * To use the low level SCSI driver support using the linux kernel loadable + * module interface we should initialize the global variable driver_interface + * (datatype Scsi_Host_Template) and then include the file scsi_module.c. + */ + +static Scsi_Host_Template driver_template = { + module: THIS_MODULE, + name: "AAC", + proc_info: aac_procinfo, + detect: aac_detect, + release: aac_release, + info: aac_driverinfo, + ioctl: aac_ioctl, + queuecommand: aac_queuecommand, + bios_param: aac_biosparm, + can_queue: AAC_NUM_IO_FIB, + this_id: 16, + sg_tablesize: 16, + max_sectors: 128, + cmd_per_lun: AAC_NUM_IO_FIB, + eh_abort_handler: aac_eh_abort, + eh_device_reset_handler:aac_eh_device_reset, + eh_bus_reset_handler: aac_eh_bus_reset, + eh_host_reset_handler: aac_eh_reset, + + use_clustering: ENABLE_CLUSTERING, +}; + +#include "scsi_module.c" + +/** + * aac_procinfo - Implement /proc/scsi// + * @proc_buffer: memory buffer for I/O + * @start_ptr: pointer to first valid data + * @offset: offset into file + * @bytes_available: space left + * @host_no: scsi host ident + * @write: direction of I/O + * + * Used to export driver statistics and other infos to the world outside + * the kernel using the proc file system. Also provides an interface to + * feed the driver with information. + * + * For reads + * - if offset > 0 return 0 + * - if offset == 0 write data to proc_buffer and set the start_ptr to + * beginning of proc_buffer, return the number of characters written. + * For writes + * - writes currently not supported, return 0 + * + * Bugs: Only offset zero is handled + */ + +static int aac_procinfo(char *proc_buffer, char **start_ptr,off_t offset, + int bytes_available, int host_no, int write) +{ + if(write || offset > 0) + return 0; + *start_ptr = proc_buffer; + return sprintf(proc_buffer, "%s %d\n", "Raid Controller, scsi hba number", host_no); +} + +EXPORT_NO_SYMBOLS; diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/scsi/aacraid/Makefile linux.2.5.40-ac2/drivers/scsi/aacraid/Makefile --- linux.2.5.40/drivers/scsi/aacraid/Makefile 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/drivers/scsi/aacraid/Makefile 2002-10-02 21:37:46.000000000 +0100 @@ -0,0 +1,10 @@ + +EXTRA_CFLAGS += -I$(TOPDIR)/drivers/scsi + +O_TARGET := aacraid.o +obj-m := $(O_TARGET) + +obj-y := linit.o aachba.o commctrl.o comminit.o commsup.o \ + dpcsup.o rx.o sa.o + +include $(TOPDIR)/Rules.make diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/scsi/aacraid/README linux.2.5.40-ac2/drivers/scsi/aacraid/README --- linux.2.5.40/drivers/scsi/aacraid/README 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/drivers/scsi/aacraid/README 2002-10-02 21:37:46.000000000 +0100 @@ -0,0 +1,42 @@ +AACRAID Driver for Linux (take two) + +Introduction +------------------------- +The aacraid driver adds support for Adaptec (http://www.adaptec.com) +RAID controllers. This is a major rewrite from the original +Adaptec supplied driver. It has signficantly cleaned up both the code +and the running binary size (the module is less than half the size of +the original). + +Supported Cards/Chipsets +------------------------- + Dell Computer Corporation PERC 2 Quad Channel + Dell Computer Corporation PERC 2/Si + Dell Computer Corporation PERC 3/Si + Dell Computer Corporation PERC 3/Di + HP NetRAID-4M + ADAPTEC 2120S + ADAPTEC 2200S + ADAPTEC 5400S + +People +------------------------- +Alan Cox +Christoph Hellwig (small cleanups/fixes) +Matt Domsch (revision ioctl, adapter messages) +Deanna Bonds (non-DASD support, PAE fibs and 64 bit, added new adaptec controllers + added new ioctls, changed scsi interface to use new error handler, + increased the number of fibs and outstanding commands to a container) + +Original Driver +------------------------- +Adaptec Unix OEM Product Group + +Mailing List +------------------------- +None currently. Also note this is very different to Brian's original driver +so don't expect him to support it. +Adaptec does support this driver. Contact either tech support or deanna bonds. + +Original by Brian Boerner February 2001 +Rewritten by Alan Cox, November 2001 diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/scsi/aacraid/rx.c linux.2.5.40-ac2/drivers/scsi/aacraid/rx.c --- linux.2.5.40/drivers/scsi/aacraid/rx.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/drivers/scsi/aacraid/rx.c 2002-10-02 21:37:46.000000000 +0100 @@ -0,0 +1,409 @@ +/* + * Adaptec AAC series RAID controller driver + * (c) Copyright 2001 Red Hat Inc. + * + * based on the old aacraid driver that is.. + * Adaptec aacraid device driver for Linux. + * + * Copyright (c) 2000 Adaptec, Inc. (aacraid@adaptec.com) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; see the file COPYING. If not, write to + * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. + * + * Module Name: + * rx.c + * + * Abstract: Hardware miniport for Drawbridge specific hardware functions. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "scsi.h" +#include "hosts.h" + +#include "aacraid.h" + +static void aac_rx_intr(int irq, void *dev_id, struct pt_regs *regs) +{ + struct aac_dev *dev = dev_id; + unsigned long bellbits; + u8 intstat, mask; + intstat = rx_readb(dev, MUnit.OISR); + /* + * Read mask and invert because drawbridge is reversed. + * This allows us to only service interrupts that have + * been enabled. + */ + mask = ~(rx_readb(dev, MUnit.OIMR)); + /* Check to see if this is our interrupt. If it isn't just return */ + if (intstat & mask) + { + bellbits = rx_readl(dev, OutboundDoorbellReg); + if (bellbits & DoorBellPrintfReady) { + aac_printf(dev, le32_to_cpu(rx_readl (dev, IndexRegs.Mailbox[5]))); + rx_writel(dev, MUnit.ODR,DoorBellPrintfReady); + rx_writel(dev, InboundDoorbellReg,DoorBellPrintfDone); + } + else if (bellbits & DoorBellAdapterNormCmdReady) { + aac_command_normal(&dev->queues->queue[HostNormCmdQueue]); + rx_writel(dev, MUnit.ODR, DoorBellAdapterNormCmdReady); + } + else if (bellbits & DoorBellAdapterNormRespReady) { + aac_response_normal(&dev->queues->queue[HostNormRespQueue]); + rx_writel(dev, MUnit.ODR,DoorBellAdapterNormRespReady); + } + else if (bellbits & DoorBellAdapterNormCmdNotFull) { + rx_writel(dev, MUnit.ODR, DoorBellAdapterNormCmdNotFull); + } + else if (bellbits & DoorBellAdapterNormRespNotFull) { + rx_writel(dev, MUnit.ODR, DoorBellAdapterNormCmdNotFull); + rx_writel(dev, MUnit.ODR, DoorBellAdapterNormRespNotFull); + } + } +} + +/** + * aac_rx_enable_interrupt - Enable event reporting + * @dev: Adapter + * @event: Event to enable + * + * Enable event reporting from the i960 for a given event. + */ + +static void aac_rx_enable_interrupt(struct aac_dev * dev, u32 event) +{ + switch (event) { + + case HostNormCmdQue: + dev->irq_mask &= ~(OUTBOUNDDOORBELL_1); + break; + + case HostNormRespQue: + dev->irq_mask &= ~(OUTBOUNDDOORBELL_2); + break; + + case AdapNormCmdNotFull: + dev->irq_mask &= ~(OUTBOUNDDOORBELL_3); + break; + + case AdapNormRespNotFull: + dev->irq_mask &= ~(OUTBOUNDDOORBELL_4); + break; + } +} + +/** + * aac_rx_disable_interrupt - Disable event reporting + * @dev: Adapter + * @event: Event to enable + * + * Disable event reporting from the i960 for a given event. + */ + +static void aac_rx_disable_interrupt(struct aac_dev *dev, u32 event) +{ + switch (event) { + + case HostNormCmdQue: + dev->irq_mask |= (OUTBOUNDDOORBELL_1); + break; + + case HostNormRespQue: + dev->irq_mask |= (OUTBOUNDDOORBELL_2); + break; + + case AdapNormCmdNotFull: + dev->irq_mask |= (OUTBOUNDDOORBELL_3); + break; + + case AdapNormRespNotFull: + dev->irq_mask |= (OUTBOUNDDOORBELL_4); + break; + } +} + +/** + * rx_sync_cmd - send a command and wait + * @dev: Adapter + * @command: Command to execute + * @p1: first parameter + * @ret: adapter status + * + * This routine will send a synchronous comamnd to the adapter and wait + * for its completion. + */ + +static int rx_sync_cmd(struct aac_dev *dev, u32 command, u32 p1, u32 *status) +{ + unsigned long start; + int ok; + /* + * Write the command into Mailbox 0 + */ + rx_writel(dev, InboundMailbox0, cpu_to_le32(command)); + /* + * Write the parameters into Mailboxes 1 - 4 + */ + rx_writel(dev, InboundMailbox1, cpu_to_le32(p1)); + rx_writel(dev, InboundMailbox2, 0); + rx_writel(dev, InboundMailbox3, 0); + rx_writel(dev, InboundMailbox4, 0); + /* + * Clear the synch command doorbell to start on a clean slate. + */ + rx_writel(dev, OutboundDoorbellReg, OUTBOUNDDOORBELL_0); + /* + * Disable doorbell interrupts + */ + rx_writeb(dev, MUnit.OIMR, rx_readb(dev, MUnit.OIMR) | 0x04); + /* + * Force the completion of the mask register write before issuing + * the interrupt. + */ + rx_readb (dev, MUnit.OIMR); + /* + * Signal that there is a new synch command + */ + rx_writel(dev, InboundDoorbellReg, INBOUNDDOORBELL_0); + + ok = 0; + start = jiffies; + + /* + * Wait up to 30 seconds + */ + while (time_before(jiffies, start+30*HZ)) + { + udelay(5); /* Delay 5 microseconds to let Mon960 get info. */ + /* + * Mon960 will set doorbell0 bit when it has completed the command. + */ + if (rx_readl(dev, OutboundDoorbellReg) & OUTBOUNDDOORBELL_0) { + /* + * Clear the doorbell. + */ + rx_writel(dev, OutboundDoorbellReg, OUTBOUNDDOORBELL_0); + ok = 1; + break; + } + /* + * Yield the processor in case we are slow + */ + set_current_state(TASK_UNINTERRUPTIBLE); + schedule_timeout(1); + } + if (ok != 1) { + /* + * Restore interrupt mask even though we timed out + */ + rx_writeb(dev, MUnit.OIMR, rx_readl(dev, MUnit.OIMR) & 0xfb); + return -ETIMEDOUT; + } + /* + * Pull the synch status from Mailbox 0. + */ + *status = le32_to_cpu(rx_readl(dev, IndexRegs.Mailbox[0])); + /* + * Clear the synch command doorbell. + */ + rx_writel(dev, OutboundDoorbellReg, OUTBOUNDDOORBELL_0); + /* + * Restore interrupt mask + */ + rx_writeb(dev, MUnit.OIMR, rx_readl(dev, MUnit.OIMR) & 0xfb); + return 0; + +} + +/** + * aac_rx_interrupt_adapter - interrupt adapter + * @dev: Adapter + * + * Send an interrupt to the i960 and breakpoint it. + */ + +static void aac_rx_interrupt_adapter(struct aac_dev *dev) +{ + u32 ret; + rx_sync_cmd(dev, BREAKPOINT_REQUEST, 0, &ret); +} + +/** + * aac_rx_notify_adapter - send an event to the adapter + * @dev: Adapter + * @event: Event to send + * + * Notify the i960 that something it probably cares about has + * happened. + */ + +static void aac_rx_notify_adapter(struct aac_dev *dev, u32 event) +{ + switch (event) { + + case AdapNormCmdQue: + rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_1); + break; + case HostNormRespNotFull: + rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_4); + break; + case AdapNormRespQue: + rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_2); + break; + case HostNormCmdNotFull: + rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_3); + break; + case HostShutdown: +// rx_sync_cmd(dev, HOST_CRASHING, 0, 0, 0, 0, &ret); + break; + case FastIo: + rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_6); + break; + case AdapPrintfDone: + rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_5); + break; + default: + BUG(); + break; + } +} + +/** + * aac_rx_start_adapter - activate adapter + * @dev: Adapter + * + * Start up processing on an i960 based AAC adapter + */ + +static void aac_rx_start_adapter(struct aac_dev *dev) +{ + u32 status; + struct aac_init *init; + + init = dev->init; + init->HostElapsedSeconds = cpu_to_le32(jiffies/HZ); + /* + * Tell the adapter we are back and up and running so it will scan + * its command queues and enable our interrupts + */ + dev->irq_mask = (DoorBellPrintfReady | OUTBOUNDDOORBELL_1 | OUTBOUNDDOORBELL_2 | OUTBOUNDDOORBELL_3 | OUTBOUNDDOORBELL_4); + /* + * First clear out all interrupts. Then enable the one's that we + * can handle. + */ + rx_writeb(dev, MUnit.OIMR, 0xff); + rx_writel(dev, MUnit.ODR, 0xffffffff); +// rx_writeb(dev, MUnit.OIMR, ~(u8)OUTBOUND_DOORBELL_INTERRUPT_MASK); + rx_writeb(dev, MUnit.OIMR, 0xfb); + + // We can only use a 32 bit address here + rx_sync_cmd(dev, INIT_STRUCT_BASE_ADDRESS, (u32)(ulong)dev->init_pa, &status); +} + +/** + * aac_rx_init - initialize an i960 based AAC card + * @dev: device to configure + * @devnum: adapter number + * + * Allocate and set up resources for the i960 based AAC variants. The + * device_interface in the commregion will be allocated and linked + * to the comm region. + */ + +int aac_rx_init(struct aac_dev *dev, unsigned long num) +{ + unsigned long start; + unsigned long status; + int instance; + const char * name; + + dev->devnum = num; + instance = dev->id; + name = dev->name; + + /* + * Map in the registers from the adapter. + */ + if((dev->regs.rx = (struct rx_registers *)ioremap((unsigned long)dev->scsi_host_ptr->base, 8192))==NULL) + { + printk(KERN_WARNING "aacraid: unable to map i960.\n" ); + return -1; + } + /* + * Check to see if the board failed any self tests. + */ + if (rx_readl(dev, IndexRegs.Mailbox[7]) & SELF_TEST_FAILED) { + printk(KERN_ERR "%s%d: adapter self-test failed.\n", dev->name, instance); + return -1; + } + /* + * Check to see if the board panic'd while booting. + */ + if (rx_readl(dev, IndexRegs.Mailbox[7]) & KERNEL_PANIC) { + printk(KERN_ERR "%s%d: adapter kernel panic'd.\n", dev->name, instance); + return -1; + } + start = jiffies; + /* + * Wait for the adapter to be up and running. Wait up to 3 minutes + */ + while (!(rx_readl(dev, IndexRegs.Mailbox[7]) & KERNEL_UP_AND_RUNNING)) + { + if(time_after(jiffies, start+180*HZ)) + { + status = rx_readl(dev, IndexRegs.Mailbox[7]) >> 16; + printk(KERN_ERR "%s%d: adapter kernel failed to start, init status = %ld.\n", dev->name, instance, status); + return -1; + } + set_current_state(TASK_UNINTERRUPTIBLE); + schedule_timeout(1); + } + if (request_irq(dev->scsi_host_ptr->irq, aac_rx_intr, SA_SHIRQ|SA_INTERRUPT, "aacraid", (void *)dev)<0) + { + printk(KERN_ERR "%s%d: Interrupt unavailable.\n", name, instance); + return -1; + } + /* + * Fill in the function dispatch table. + */ + dev->a_ops.adapter_interrupt = aac_rx_interrupt_adapter; + dev->a_ops.adapter_enable_int = aac_rx_enable_interrupt; + dev->a_ops.adapter_disable_int = aac_rx_disable_interrupt; + dev->a_ops.adapter_notify = aac_rx_notify_adapter; + dev->a_ops.adapter_sync_cmd = rx_sync_cmd; + + if (aac_init_adapter(dev) == NULL) + return -1; + /* + * Start any kernel threads needed + */ + dev->thread_pid = kernel_thread((int (*)(void *))aac_command_thread, dev, 0); + /* + * Tell the adapter that all is configured, and it can start + * accepting requests + */ + aac_rx_start_adapter(dev); + return 0; +} diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/scsi/aacraid/sa.c linux.2.5.40-ac2/drivers/scsi/aacraid/sa.c --- linux.2.5.40/drivers/scsi/aacraid/sa.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/drivers/scsi/aacraid/sa.c 2002-10-02 21:37:46.000000000 +0100 @@ -0,0 +1,396 @@ +/* + * Adaptec AAC series RAID controller driver + * (c) Copyright 2001 Red Hat Inc. + * + * based on the old aacraid driver that is.. + * Adaptec aacraid device driver for Linux. + * + * Copyright (c) 2000 Adaptec, Inc. (aacraid@adaptec.com) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; see the file COPYING. If not, write to + * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. + * + * Module Name: + * sa.c + * + * Abstract: Drawbridge specific support functions + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "scsi.h" +#include "hosts.h" + +#include "aacraid.h" + +static void aac_sa_intr(int irq, void *dev_id, struct pt_regs *regs) +{ + struct aac_dev *dev = dev_id; + unsigned short intstat, mask; + + intstat = sa_readw(dev, DoorbellReg_p); + /* + * Read mask and invert because drawbridge is reversed. + * This allows us to only service interrupts that have been enabled. + */ + mask = ~(sa_readw(dev, SaDbCSR.PRISETIRQMASK)); + + /* Check to see if this is our interrupt. If it isn't just return */ + + if (intstat & mask) { + if (intstat & PrintfReady) { + aac_printf(dev, le32_to_cpu(sa_readl(dev, Mailbox5))); + sa_writew(dev, DoorbellClrReg_p, PrintfReady); /* clear PrintfReady */ + sa_writew(dev, DoorbellReg_s, PrintfDone); + } else if (intstat & DOORBELL_1) { // dev -> Host Normal Command Ready + aac_command_normal(&dev->queues->queue[HostNormCmdQueue]); + sa_writew(dev, DoorbellClrReg_p, DOORBELL_1); + } else if (intstat & DOORBELL_2) { // dev -> Host Normal Response Ready + aac_response_normal(&dev->queues->queue[HostNormRespQueue]); + sa_writew(dev, DoorbellClrReg_p, DOORBELL_2); + } else if (intstat & DOORBELL_3) { // dev -> Host Normal Command Not Full + sa_writew(dev, DoorbellClrReg_p, DOORBELL_3); + } else if (intstat & DOORBELL_4) { // dev -> Host Normal Response Not Full + sa_writew(dev, DoorbellClrReg_p, DOORBELL_4); + } + } +} + +/** + * aac_sa_enable_interrupt - enable an interrupt event + * @dev: Which adapter to enable. + * @event: Which adapter event. + * + * This routine will enable the corresponding adapter event to cause an interrupt on + * the host. + */ + +void aac_sa_enable_interrupt(struct aac_dev *dev, u32 event) +{ + switch (event) { + + case HostNormCmdQue: + sa_writew(dev, SaDbCSR.PRICLEARIRQMASK, DOORBELL_1); + break; + + case HostNormRespQue: + sa_writew(dev, SaDbCSR.PRICLEARIRQMASK, DOORBELL_2); + break; + + case AdapNormCmdNotFull: + sa_writew(dev, SaDbCSR.PRICLEARIRQMASK, DOORBELL_3); + break; + + case AdapNormRespNotFull: + sa_writew(dev, SaDbCSR.PRICLEARIRQMASK, DOORBELL_4); + break; + } +} + +/** + * aac_sa_disable_interrupt - disable an interrupt event + * @dev: Which adapter to enable. + * @event: Which adapter event. + * + * This routine will enable the corresponding adapter event to cause an interrupt on + * the host. + */ + +void aac_sa_disable_interrupt (struct aac_dev *dev, u32 event) +{ + switch (event) { + + case HostNormCmdQue: + sa_writew(dev, SaDbCSR.PRISETIRQMASK, DOORBELL_1); + break; + + case HostNormRespQue: + sa_writew(dev, SaDbCSR.PRISETIRQMASK, DOORBELL_2); + break; + + case AdapNormCmdNotFull: + sa_writew(dev, SaDbCSR.PRISETIRQMASK, DOORBELL_3); + break; + + case AdapNormRespNotFull: + sa_writew(dev, SaDbCSR.PRISETIRQMASK, DOORBELL_4); + break; + } +} + +/** + * aac_sa_notify_adapter - handle adapter notification + * @dev: Adapter that notification is for + * @event: Event to notidy + * + * Notify the adapter of an event + */ + +void aac_sa_notify_adapter(struct aac_dev *dev, u32 event) +{ + switch (event) { + + case AdapNormCmdQue: + sa_writew(dev, DoorbellReg_s,DOORBELL_1); + break; + case HostNormRespNotFull: + sa_writew(dev, DoorbellReg_s,DOORBELL_4); + break; + case AdapNormRespQue: + sa_writew(dev, DoorbellReg_s,DOORBELL_2); + break; + case HostNormCmdNotFull: + sa_writew(dev, DoorbellReg_s,DOORBELL_3); + break; + case HostShutdown: + //sa_sync_cmd(dev, HOST_CRASHING, 0, &ret); + break; + case FastIo: + sa_writew(dev, DoorbellReg_s,DOORBELL_6); + break; + case AdapPrintfDone: + sa_writew(dev, DoorbellReg_s,DOORBELL_5); + break; + default: + BUG(); + break; + } +} + + +/** + * sa_sync_cmd - send a command and wait + * @dev: Adapter + * @command: Command to execute + * @p1: first parameter + * @ret: adapter status + * + * This routine will send a synchronous comamnd to the adapter and wait + * for its completion. + */ + +static int sa_sync_cmd(struct aac_dev *dev, u32 command, u32 p1, u32 *ret) +{ + unsigned long start; + int ok; + /* + * Write the Command into Mailbox 0 + */ + sa_writel(dev, Mailbox0, cpu_to_le32(command)); + /* + * Write the parameters into Mailboxes 1 - 4 + */ + sa_writel(dev, Mailbox1, cpu_to_le32(p1)); + sa_writel(dev, Mailbox2, 0); + sa_writel(dev, Mailbox3, 0); + sa_writel(dev, Mailbox4, 0); + /* + * Clear the synch command doorbell to start on a clean slate. + */ + sa_writew(dev, DoorbellClrReg_p, DOORBELL_0); + /* + * Signal that there is a new synch command + */ + sa_writew(dev, DoorbellReg_s, DOORBELL_0); + + ok = 0; + start = jiffies; + + while(time_before(jiffies, start+30*HZ)) + { + /* + * Delay 5uS so that the monitor gets access + */ + udelay(5); + /* + * Mon110 will set doorbell0 bit when it has + * completed the command. + */ + if(sa_readw(dev, DoorbellReg_p) & DOORBELL_0) { + ok = 1; + break; + } + set_current_state(TASK_UNINTERRUPTIBLE); + schedule_timeout(1); + } + + if (ok != 1) + return -ETIMEDOUT; + /* + * Clear the synch command doorbell. + */ + sa_writew(dev, DoorbellClrReg_p, DOORBELL_0); + /* + * Pull the synch status from Mailbox 0. + */ + *ret = le32_to_cpu(sa_readl(dev, Mailbox0)); + return 0; +} + +/** + * aac_sa_interrupt_adapter - interrupt an adapter + * @dev: Which adapter to enable. + * + * Breakpoint an adapter. + */ + +static void aac_sa_interrupt_adapter (struct aac_dev *dev) +{ + u32 ret; + sa_sync_cmd(dev, BREAKPOINT_REQUEST, 0, &ret); +} + +/** + * aac_sa_start_adapter - activate adapter + * @dev: Adapter + * + * Start up processing on an ARM based AAC adapter + */ + +static void aac_sa_start_adapter(struct aac_dev *dev) +{ + u32 ret; + struct aac_init *init; + /* + * Fill in the remaining pieces of the init. + */ + init = dev->init; + init->HostElapsedSeconds = cpu_to_le32(jiffies/HZ); + + dprintk(("INIT\n")); + /* + * Tell the adapter we are back and up and running so it will scan its command + * queues and enable our interrupts + */ + dev->irq_mask = (PrintfReady | DOORBELL_1 | DOORBELL_2 | DOORBELL_3 | DOORBELL_4); + /* + * First clear out all interrupts. Then enable the one's that + * we can handle. + */ + dprintk(("MASK\n")); + sa_writew(dev, SaDbCSR.PRISETIRQMASK, cpu_to_le16(0xffff)); + sa_writew(dev, SaDbCSR.PRICLEARIRQMASK, (PrintfReady | DOORBELL_1 | DOORBELL_2 | DOORBELL_3 | DOORBELL_4)); + dprintk(("SYNCCMD\n")); + /* We can only use a 32 bit address here */ + sa_sync_cmd(dev, INIT_STRUCT_BASE_ADDRESS, (u32)(ulong)dev->init_pa, &ret); +} + +/** + * aac_sa_init - initialize an ARM based AAC card + * @dev: device to configure + * @devnum: adapter number + * + * Allocate and set up resources for the ARM based AAC variants. The + * device_interface in the commregion will be allocated and linked + * to the comm region. + */ + +int aac_sa_init(struct aac_dev *dev, unsigned long devnum) +{ + unsigned long start; + unsigned long status; + int instance; + const char *name; + + dev->devnum = devnum; + + dprintk(("PREINST\n")); + instance = dev->id; + name = dev->name; + + /* + * Map in the registers from the adapter. + */ + dprintk(("PREMAP\n")); + + if((dev->regs.sa = (struct sa_registers *)ioremap((unsigned long)dev->scsi_host_ptr->base, 8192))==NULL) + { + printk(KERN_WARNING "aacraid: unable to map ARM.\n" ); + return -1; + } + /* + * Check to see if the board failed any self tests. + */ + if (sa_readl(dev, Mailbox7) & SELF_TEST_FAILED) { + printk(KERN_WARNING "%s%d: adapter self-test failed.\n", name, instance); + return -1; + } + /* + * Check to see if the board panic'd while booting. + */ + if (sa_readl(dev, Mailbox7) & KERNEL_PANIC) { + printk(KERN_WARNING "%s%d: adapter kernel panic'd.\n", name, instance); + return -1; + } + start = jiffies; + /* + * Wait for the adapter to be up and running. Wait up to 3 minutes. + */ + while (!(sa_readl(dev, Mailbox7) & KERNEL_UP_AND_RUNNING)) { + if (time_after(start+180*HZ, jiffies)) { + status = sa_readl(dev, Mailbox7) >> 16; + printk(KERN_WARNING "%s%d: adapter kernel failed to start, init status = %d.\n", name, instance, le32_to_cpu(status)); + return -1; + } + set_current_state(TASK_UNINTERRUPTIBLE); + schedule_timeout(1); + } + + dprintk(("ATIRQ\n")); + if (request_irq(dev->scsi_host_ptr->irq, aac_sa_intr, SA_SHIRQ|SA_INTERRUPT, "aacraid", (void *)dev ) < 0) { + printk(KERN_WARNING "%s%d: Interrupt unavailable.\n", name, instance); + return -1; + } + + /* + * Fill in the function dispatch table. + */ + + dev->a_ops.adapter_interrupt = aac_sa_interrupt_adapter; + dev->a_ops.adapter_enable_int = aac_sa_enable_interrupt; + dev->a_ops.adapter_disable_int = aac_sa_disable_interrupt; + dev->a_ops.adapter_notify = aac_sa_notify_adapter; + dev->a_ops.adapter_sync_cmd = sa_sync_cmd; + + dprintk(("FUNCDONE\n")); + + if(aac_init_adapter(dev) == NULL) + return -1; + + dprintk(("NEWADAPTDONE\n")); + /* + * Start any kernel threads needed + */ + dev->thread_pid = kernel_thread((int (*)(void *))aac_command_thread, dev, 0); + /* + * Tell the adapter that all is configure, and it can start + * accepting requests + */ + dprintk(("STARTING\n")); + aac_sa_start_adapter(dev); + dprintk(("STARTED\n")); + return 0; +} + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/scsi/aacraid/TODO linux.2.5.40-ac2/drivers/scsi/aacraid/TODO --- linux.2.5.40/drivers/scsi/aacraid/TODO 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/drivers/scsi/aacraid/TODO 2002-10-02 21:37:46.000000000 +0100 @@ -0,0 +1,4 @@ +o Testing +o More testing +o Feature request: display the firmware/bios/etc revisions in the + /proc info diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/scsi/aha152x.c linux.2.5.40-ac2/drivers/scsi/aha152x.c --- linux.2.5.40/drivers/scsi/aha152x.c 2002-10-02 21:32:55.000000000 +0100 +++ linux.2.5.40-ac2/drivers/scsi/aha152x.c 2002-10-03 14:17:46.000000000 +0100 @@ -1941,8 +1941,7 @@ /* Poke the BH handler */ HOSTDATA(shpnt)->service++; aha152x_tq.routine = (void *) run; - queue_task(&aha152x_tq, &tq_immediate); - mark_bh(IMMEDIATE_BH); + schedule_task(&aha152x_tq); } /* diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/scsi/Config.in linux.2.5.40-ac2/drivers/scsi/Config.in --- linux.2.5.40/drivers/scsi/Config.in 2002-10-02 21:33:41.000000000 +0100 +++ linux.2.5.40-ac2/drivers/scsi/Config.in 2002-10-02 21:37:46.000000000 +0100 @@ -51,6 +51,9 @@ if [ "$CONFIG_EISA" = "y" ]; then dep_tristate 'Adaptec AHA1740 support' CONFIG_SCSI_AHA1740 $CONFIG_SCSI fi +if [ "$CONFIG_EXPERIMENTAL" = "y" ]; then + dep_tristate 'Adaptec AACRAID support (EXPERIMENTAL)' CONFIG_SCSI_AACRAID $CONFIG_SCSI $CONFIG_PCI +fi source drivers/scsi/aic7xxx/Config.in if [ "$CONFIG_SCSI_AIC7XXX" != "y" ]; then dep_tristate 'Old Adaptec AIC7xxx support' CONFIG_SCSI_AIC7XXX_OLD $CONFIG_SCSI diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/scsi/imm.c linux.2.5.40-ac2/drivers/scsi/imm.c --- linux.2.5.40/drivers/scsi/imm.c 2002-10-02 21:33:41.000000000 +0100 +++ linux.2.5.40-ac2/drivers/scsi/imm.c 2002-10-03 14:17:38.000000000 +0100 @@ -898,7 +898,7 @@ if (imm_engine(tmp, cmd)) { tmp->imm_tq.data = (void *) tmp; tmp->imm_tq.sync = 0; - queue_task(&tmp->imm_tq, &tq_timer); + schedule_task(&tmp->imm_tq); return; } /* Command must of completed hence it is safe to let go... */ @@ -1105,8 +1105,8 @@ imm_hosts[host_no].imm_tq.data = imm_hosts + host_no; imm_hosts[host_no].imm_tq.sync = 0; - queue_task(&imm_hosts[host_no].imm_tq, &tq_immediate); - mark_bh(IMMEDIATE_BH); + + schedule_task(&imm_hosts[host_no].imm_tq); return 0; } diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/scsi/Makefile linux.2.5.40-ac2/drivers/scsi/Makefile --- linux.2.5.40/drivers/scsi/Makefile 2002-10-02 21:33:55.000000000 +0100 +++ linux.2.5.40-ac2/drivers/scsi/Makefile 2002-10-02 21:37:46.000000000 +0100 @@ -58,6 +58,7 @@ obj-$(CONFIG_SCSI_AHA1542) += aha1542.o obj-$(CONFIG_SCSI_AHA1740) += aha1740.o obj-$(CONFIG_SCSI_AIC7XXX) += aic7xxx/ +obj-$(CONFIG_SCSI_AACRAID) += aacraid/ obj-$(CONFIG_SCSI_AIC7XXX_OLD) += aic7xxx_old.o obj-$(CONFIG_SCSI_IPS) += ips.o obj-$(CONFIG_SCSI_FD_MCS) += fd_mcs.o diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/scsi/ppa.c linux.2.5.40-ac2/drivers/scsi/ppa.c --- linux.2.5.40/drivers/scsi/ppa.c 2002-10-02 21:33:41.000000000 +0100 +++ linux.2.5.40-ac2/drivers/scsi/ppa.c 2002-10-03 14:17:17.000000000 +0100 @@ -110,7 +110,7 @@ int ppa_detect(Scsi_Host_Template * host) { - struct Scsi_Host *hreg; + struct Scsi_Host *hreg = NULL; int ports; int i, nhosts, try_again; struct parport *pb; @@ -801,7 +801,7 @@ if (ppa_engine(tmp, cmd)) { tmp->ppa_tq.data = (void *) tmp; tmp->ppa_tq.sync = 0; - queue_task(&tmp->ppa_tq, &tq_timer); + schedule_task(&tmp->ppa_tq); return; } /* Command must of completed hence it is safe to let go... */ @@ -986,8 +986,8 @@ ppa_hosts[host_no].ppa_tq.data = ppa_hosts + host_no; ppa_hosts[host_no].ppa_tq.sync = 0; - queue_task(&ppa_hosts[host_no].ppa_tq, &tq_immediate); - mark_bh(IMMEDIATE_BH); + + schedule_task(&ppa_hosts[host_no].ppa_tq); return 0; } diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/scsi/sg.c linux.2.5.40-ac2/drivers/scsi/sg.c --- linux.2.5.40/drivers/scsi/sg.c 2002-10-02 21:34:06.000000000 +0100 +++ linux.2.5.40-ac2/drivers/scsi/sg.c 2002-10-02 21:47:22.000000000 +0100 @@ -1354,11 +1354,29 @@ { static int sg_registered = 0; unsigned long iflags; + int tmp_dev_max; + Sg_device **tmp_da; if ((sg_template.dev_noticed == 0) || sg_dev_arr) return 0; + SCSI_LOG_TIMEOUT(3, printk("sg_init\n")); + write_lock_irqsave(&sg_dev_arr_lock, iflags); + tmp_dev_max = sg_template.dev_noticed + SG_DEV_ARR_LUMP; + write_unlock_irqrestore(&sg_dev_arr_lock, iflags); + + tmp_da = (Sg_device **)vmalloc( + tmp_dev_max * sizeof(Sg_device *)); + if (NULL == tmp_da) { + printk(KERN_ERR "sg_init: no space for sg_dev_arr\n"); + return 1; + } + memset(tmp_da, 0, tmp_dev_max * sizeof (Sg_device *)); + write_lock_irqsave(&sg_dev_arr_lock, iflags); + sg_template.dev_max = tmp_dev_max; + sg_dev_arr = tmp_da; + if (!sg_registered) { if (register_chrdev(SCSI_GENERIC_MAJOR, "sg", &sg_fops)) { printk(KERN_ERR @@ -1370,16 +1388,6 @@ sg_registered++; } - SCSI_LOG_TIMEOUT(3, printk("sg_init\n")); - sg_template.dev_max = sg_template.dev_noticed + SG_DEV_ARR_LUMP; - sg_dev_arr = (Sg_device **)vmalloc( - sg_template.dev_max * sizeof(Sg_device *)); - if (NULL == sg_dev_arr) { - printk(KERN_ERR "sg_init: no space for sg_dev_arr\n"); - write_unlock_irqrestore(&sg_dev_arr_lock, iflags); - return 1; - } - memset(sg_dev_arr, 0, sg_template.dev_max * sizeof (Sg_device *)); write_unlock_irqrestore(&sg_dev_arr_lock, iflags); #ifdef CONFIG_PROC_FS sg_proc_init(); @@ -1430,7 +1438,7 @@ static int sg_attach(Scsi_Device * scsidp) { - Sg_device *sdp; + Sg_device *sdp = NULL; unsigned long iflags; int k; @@ -1439,15 +1447,16 @@ Sg_device **tmp_da; int tmp_dev_max = sg_template.nr_dev + SG_DEV_ARR_LUMP; + write_unlock_irqrestore(&sg_dev_arr_lock, iflags); tmp_da = (Sg_device **)vmalloc( tmp_dev_max * sizeof(Sg_device *)); if (NULL == tmp_da) { scsidp->attached--; - write_unlock_irqrestore(&sg_dev_arr_lock, iflags); printk(KERN_ERR "sg_attach: device array cannot be resized\n"); return 1; } + write_lock_irqsave(&sg_dev_arr_lock, iflags); memset(tmp_da, 0, tmp_dev_max * sizeof (Sg_device *)); memcpy(tmp_da, sg_dev_arr, sg_template.dev_max * sizeof (Sg_device *)); @@ -1456,6 +1465,7 @@ sg_template.dev_max = tmp_dev_max; } +find_empty_slot: for (k = 0; k < sg_template.dev_max; k++) if (!sg_dev_arr[k]) break; @@ -1467,11 +1477,19 @@ " type=%d, minor number exceed %d\n", scsidp->host->host_no, scsidp->channel, scsidp->id, scsidp->lun, scsidp->type, SG_MAX_DEVS_MASK); + if (NULL != sdp) + vfree((char *) sdp); return 1; } - if (k < sg_template.dev_max) - sdp = (Sg_device *)vmalloc(sizeof(Sg_device)); - else + if (k < sg_template.dev_max) { + if (NULL == sdp) { + write_unlock_irqrestore(&sg_dev_arr_lock, iflags); + sdp = (Sg_device *)vmalloc(sizeof(Sg_device)); + write_lock_irqsave(&sg_dev_arr_lock, iflags); + if (!sg_dev_arr[k]) + goto find_empty_slot; + } + } else sdp = NULL; if (NULL == sdp) { scsidp->attached--; diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/serial/68328serial.c linux.2.5.40-ac2/drivers/serial/68328serial.c --- linux.2.5.40/drivers/serial/68328serial.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/drivers/serial/68328serial.c 2002-10-02 21:55:06.000000000 +0100 @@ -0,0 +1,1695 @@ +/* 68328serial.c: Serial port driver for 68328 microcontroller + * + * Copyright (C) 1995 David S. Miller + * Copyright (C) 1998 Kenneth Albanowski + * Copyright (C) 1998, 1999 D. Jeff Dionne + * Copyright (C) 1999 Vladimir Gurevich + * Copyright (C) 2002 David McCullough + * Copyright (C) 2002 Greg Ungerer + * + * VZ Support/Fixes Evan Stawnyczy + * Multiple UART support Daniel Potts + * Power management support Daniel Potts + * VZ Second Serial Port enable Phil Wilshire + * 2.4/2.5 port David McCullough + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +/* (es) */ +/* note: perhaps we can murge these files, so that you can just + * define 1 of them, and they can sort that out for themselves + */ +#if defined(CONFIG_M68EZ328) +#include +#else +#if defined(CONFIG_M68VZ328) +#include +#else +#include +#endif /* CONFIG_M68VZ328 */ +#endif /* CONFIG_M68EZ328 */ + +#include "68328serial.h" + +/* Turn off usage of real serial interrupt code, to "support" Copilot */ +#ifdef CONFIG_XCOPILOT_BUGS +#undef USE_INTS +#else +#define USE_INTS +#endif + +static struct m68k_serial m68k_soft[NR_PORTS]; +struct m86k_serial *IRQ_ports[NR_IRQS]; + +static unsigned int uart_irqs[NR_PORTS] = UART_IRQ_DEFNS; + +/* multiple ports are contiguous in memory */ +m68328_uart *uart_addr = USTCNT_ADDR; + +struct tty_struct m68k_ttys; +struct m68k_serial *m68k_consinfo = 0; + +#define M68K_CLOCK (16667000) /* FIXME: 16MHz is likely wrong */ + +#ifdef CONFIG_CONSOLE +extern wait_queue_head_t keypress_wait; +#endif + +struct tty_driver serial_driver, callout_driver; +static int serial_refcount; + +/* serial subtype definitions */ +#define SERIAL_TYPE_NORMAL 1 +#define SERIAL_TYPE_CALLOUT 2 + +/* number of characters left in xmit buffer before we ask for more */ +#define WAKEUP_CHARS 256 + +/* Debugging... DEBUG_INTR is bad to use when one of the zs + * lines is your console ;( + */ +#undef SERIAL_DEBUG_INTR +#undef SERIAL_DEBUG_OPEN +#undef SERIAL_DEBUG_FLOW + +#define RS_ISR_PASS_LIMIT 256 + +#define _INLINE_ inline + +static void change_speed(struct m68k_serial *info); + +static struct tty_struct *serial_table[NR_PORTS]; +static struct termios *serial_termios[NR_PORTS]; +static struct termios *serial_termios_locked[NR_PORTS]; + +/* + * Setup for console. Argument comes from the boot command line. + */ + +#if defined(CONFIG_M68EZ328ADS) || defined(CONFIG_ALMA_ANS) || defined(CONFIG_DRAGONIXVZ) +#define CONSOLE_BAUD_RATE 115200 +#define DEFAULT_CBAUD B115200 +#else + /* (es) */ + /* note: this is messy, but it works, again, perhaps defined somewhere else?*/ + #ifdef CONFIG_M68VZ328 + #define CONSOLE_BAUD_RATE 19200 + #define DEFAULT_CBAUD B19200 + #endif + /* (/es) */ +#endif + +#ifndef CONSOLE_BAUD_RATE +#define CONSOLE_BAUD_RATE 9600 +#define DEFAULT_CBAUD B9600 +#endif + + +static int m68328_console_initted = 0; +static int m68328_console_baud = CONSOLE_BAUD_RATE; +static int m68328_console_cbaud = DEFAULT_CBAUD; + + +/* + * tmp_buf is used as a temporary buffer by serial_write. We need to + * lock it in case the memcpy_fromfs blocks while swapping in a page, + * and some other program tries to do a serial write at the same time. + * Since the lock will only come under contention when the system is + * swapping and available memory is low, it makes sense to share one + * buffer across all the serial ports, since it significantly saves + * memory if large numbers of serial ports are open. + */ +static unsigned char tmp_buf[SERIAL_XMIT_SIZE]; /* This is cheating */ +DECLARE_MUTEX(tmp_buf_sem); + +static inline int serial_paranoia_check(struct m68k_serial *info, + kdev_t device, const char *routine) +{ +#ifdef SERIAL_PARANOIA_CHECK + static const char *badmagic = + "Warning: bad magic number for serial struct (%d, %d) in %s\n"; + static const char *badinfo = + "Warning: null m68k_serial for (%d, %d) in %s\n"; + + if (!info) { + printk(badinfo, major(device), minor(device), routine); + return 1; + } + if (info->magic != SERIAL_MAGIC) { + printk(badmagic, major(device), minor(device), routine); + return 1; + } +#endif + return 0; +} + +/* + * This is used to figure out the divisor speeds and the timeouts + */ +static int baud_table[] = { + 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800, + 9600, 19200, 38400, 57600, 115200, 0 }; + +#define BAUD_TABLE_SIZE (sizeof(baud_table)/sizeof(baud_table[0])) + +/* Sets or clears DTR/RTS on the requested line */ +static inline void m68k_rtsdtr(struct m68k_serial *ss, int set) +{ + if (set) { + /* set the RTS/CTS line */ + } else { + /* clear it */ + } + return; +} + +/* Utility routines */ +static inline int get_baud(struct m68k_serial *ss) +{ + unsigned long result = 115200; + unsigned short int baud = uart_addr[ss->line].ubaud; + if (GET_FIELD(baud, UBAUD_PRESCALER) == 0x38) result = 38400; + result >>= GET_FIELD(baud, UBAUD_DIVIDE); + + return result; +} + +/* + * ------------------------------------------------------------ + * rs_stop() and rs_start() + * + * This routines are called before setting or resetting tty->stopped. + * They enable or disable transmitter interrupts, as necessary. + * ------------------------------------------------------------ + */ +static void rs_stop(struct tty_struct *tty) +{ + struct m68k_serial *info = (struct m68k_serial *)tty->driver_data; + m68328_uart *uart = &uart_addr[info->line]; + unsigned long flags; + + if (serial_paranoia_check(info, tty->device, "rs_stop")) + return; + + save_flags(flags); cli(); + uart->ustcnt &= ~USTCNT_TXEN; + restore_flags(flags); +} + +static void rs_put_char(char ch) +{ + int flags, loops = 0; + + save_flags(flags); cli(); + + while (!(UTX & UTX_TX_AVAIL) && (loops < 1000)) { + loops++; + udelay(5); + } + + UTX_TXDATA = ch; + udelay(5); + restore_flags(flags); +} + +static void rs_start(struct tty_struct *tty) +{ + struct m68k_serial *info = (struct m68k_serial *)tty->driver_data; + m68328_uart *uart = &uart_addr[info->line]; + unsigned long flags; + + if (serial_paranoia_check(info, tty->device, "rs_start")) + return; + + save_flags(flags); cli(); + if (info->xmit_cnt && info->xmit_buf && !(uart->ustcnt & USTCNT_TXEN)) { +#ifdef USE_INTS + uart->ustcnt |= USTCNT_TXEN | USTCNT_TX_INTR_MASK; +#else + uart->ustcnt |= USTCNT_TXEN; +#endif + } + restore_flags(flags); +} + +/* Drop into either the boot monitor or kadb upon receiving a break + * from keyboard/console input. + */ +static void batten_down_hatches(void) +{ + /* Drop into the debugger */ +} + +static _INLINE_ void status_handle(struct m68k_serial *info, unsigned short status) +{ +#if 0 + if(status & DCD) { + if((info->tty->termios->c_cflag & CRTSCTS) && + ((info->curregs[3] & AUTO_ENAB)==0)) { + info->curregs[3] |= AUTO_ENAB; + info->pendregs[3] |= AUTO_ENAB; + write_zsreg(info->m68k_channel, 3, info->curregs[3]); + } + } else { + if((info->curregs[3] & AUTO_ENAB)) { + info->curregs[3] &= ~AUTO_ENAB; + info->pendregs[3] &= ~AUTO_ENAB; + write_zsreg(info->m68k_channel, 3, info->curregs[3]); + } + } +#endif + /* If this is console input and this is a + * 'break asserted' status change interrupt + * see if we can drop into the debugger + */ + if((status & URX_BREAK) && info->break_abort) + batten_down_hatches(); + return; +} + +static _INLINE_ void receive_chars(struct m68k_serial *info, struct pt_regs *regs, unsigned short rx) +{ + struct tty_struct *tty = info->tty; + m68328_uart *uart = &uart_addr[info->line]; + unsigned char ch; + + /* + * This do { } while() loop will get ALL chars out of Rx FIFO + */ +#ifndef CONFIG_XCOPILOT_BUGS + do { +#endif + ch = GET_FIELD(rx, URX_RXDATA); + + if(info->is_cons) { + if(URX_BREAK & rx) { /* whee, break received */ + status_handle(info, rx); + return; +#ifdef CONFIG_MAGIC_SYSRQ + } else if (ch == 0x10) { /* ^P */ + show_state(); + show_free_areas(); + show_buffers(); +/* show_net_buffers(); */ + return; + } else if (ch == 0x12) { /* ^R */ + machine_restart(NULL); + return; +#endif /* CONFIG_MAGIC_SYSRQ */ + } + /* It is a 'keyboard interrupt' ;-) */ +#ifdef CONFIG_CONSOLE + wake_up(&keypress_wait); +#endif + } + + if(!tty) + goto clear_and_exit; + + /* + * Make sure that we do not overflow the buffer + */ + if (tty->flip.count >= TTY_FLIPBUF_SIZE) { + schedule_task(&tty->flip.tqueue); + return; + } + + if(rx & URX_PARITY_ERROR) { + *tty->flip.flag_buf_ptr++ = TTY_PARITY; + status_handle(info, rx); + } else if(rx & URX_OVRUN) { + *tty->flip.flag_buf_ptr++ = TTY_OVERRUN; + status_handle(info, rx); + } else if(rx & URX_FRAME_ERROR) { + *tty->flip.flag_buf_ptr++ = TTY_FRAME; + status_handle(info, rx); + } else { + *tty->flip.flag_buf_ptr++ = 0; /* XXX */ + } + *tty->flip.char_buf_ptr++ = ch; + tty->flip.count++; + +#ifndef CONFIG_XCOPILOT_BUGS + } while((rx = uart->urx.w) & URX_DATA_READY); +#endif + + schedule_task(&tty->flip.tqueue); + +clear_and_exit: + return; +} + +static _INLINE_ void transmit_chars(struct m68k_serial *info) +{ + m68328_uart *uart = &uart_addr[info->line]; + + if (info->x_char) { + /* Send next char */ + uart->utx.b.txdata = info->x_char; + info->x_char = 0; + goto clear_and_return; + } + + if((info->xmit_cnt <= 0) || info->tty->stopped) { + /* That's peculiar... TX ints off */ + uart->ustcnt &= ~USTCNT_TX_INTR_MASK; + goto clear_and_return; + } + + /* Send char */ + uart->utx.b.txdata = info->xmit_buf[info->xmit_tail++]; + info->xmit_tail = info->xmit_tail & (SERIAL_XMIT_SIZE-1); + info->xmit_cnt--; + + if (info->xmit_cnt < WAKEUP_CHARS) + schedule_task(&info->tqueue); + + if(info->xmit_cnt <= 0) { + /* All done for now... TX ints off */ + uart->ustcnt &= ~USTCNT_TX_INTR_MASK; + goto clear_and_return; + } + +clear_and_return: + /* Clear interrupt (should be auto)*/ + return; +} + +/* + * This is the serial driver's generic interrupt routine + */ +void rs_interrupt(int irq, void *dev_id, struct pt_regs * regs) +{ + struct m68k_serial * info; + m68328_uart *uart; + unsigned short rx; + unsigned short tx; + + info = IRQ_ports[irq]; + if(!info) + return; + + uart = &uart_addr[info->line]; + rx = uart->urx.w; + +#ifdef USE_INTS + tx = uart->utx.w; + + if (rx & URX_DATA_READY) receive_chars(info, regs, rx); + if (tx & UTX_TX_AVAIL) transmit_chars(info); +#else + receive_chars(info, regs, rx); +#endif + return; +} + +static void do_softint(void *private) +{ + struct m68k_serial *info = (struct m68k_serial *) private; + struct tty_struct *tty; + + tty = info->tty; + if (!tty) + return; +#if 0 + if (clear_bit(RS_EVENT_WRITE_WAKEUP, &info->event)) { + if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) && + tty->ldisc.write_wakeup) + (tty->ldisc.write_wakeup)(tty); + wake_up_interruptible(&tty->write_wait); + } +#endif +} + +/* + * This routine is called from the scheduler tqueue when the interrupt + * routine has signalled that a hangup has occurred. The path of + * hangup processing is: + * + * serial interrupt routine -> (scheduler tqueue) -> + * do_serial_hangup() -> tty->hangup() -> rs_hangup() + * + */ +static void do_serial_hangup(void *private) +{ + struct m68k_serial *info = (struct m68k_serial *) private; + struct tty_struct *tty; + + tty = info->tty; + if (!tty) + return; + + tty_hangup(tty); +} + + +static int startup(struct m68k_serial * info) +{ + m68328_uart *uart = &uart_addr[info->line]; + unsigned long flags; + + if (info->flags & S_INITIALIZED) + return 0; + + if (!info->xmit_buf) { + info->xmit_buf = (unsigned char *) get_free_page(GFP_KERNEL); + if (!info->xmit_buf) + return -ENOMEM; + } + + save_flags(flags); cli(); + + /* + * Clear the FIFO buffers and disable them + * (they will be reenabled in change_speed()) + */ + + uart->ustcnt = USTCNT_UEN; + info->xmit_fifo_size = 1; + uart->ustcnt = USTCNT_UEN | USTCNT_RXEN | USTCNT_TXEN; + (void)uart->urx.w; + + /* + * Finally, enable sequencing and interrupts + */ +#ifdef USE_INTS + uart->ustcnt = USTCNT_UEN | USTCNT_RXEN | + USTCNT_RX_INTR_MASK | USTCNT_TX_INTR_MASK; +#else + uart->ustcnt = USTCNT_UEN | USTCNT_RXEN | USTCNT_RX_INTR_MASK; +#endif + + if (info->tty) + clear_bit(TTY_IO_ERROR, &info->tty->flags); + info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; + + /* + * and set the speed of the serial port + */ + + change_speed(info); + + info->flags |= S_INITIALIZED; + restore_flags(flags); + return 0; +} + +/* + * This routine will shutdown a serial port; interrupts are disabled, and + * DTR is dropped if the hangup on close termio flag is on. + */ +static void shutdown(struct m68k_serial * info) +{ + m68328_uart *uart = &uart_addr[info->line]; + unsigned long flags; + + uart->ustcnt = 0; /* All off! */ + if (!(info->flags & S_INITIALIZED)) + return; + + save_flags(flags); cli(); /* Disable interrupts */ + + if (info->xmit_buf) { + free_page((unsigned long) info->xmit_buf); + info->xmit_buf = 0; + } + + if (info->tty) + set_bit(TTY_IO_ERROR, &info->tty->flags); + + info->flags &= ~S_INITIALIZED; + restore_flags(flags); +} + +struct { + int divisor, prescale; +} +#ifndef CONFIG_M68VZ328 + hw_baud_table[18] = { + {0,0}, /* 0 */ + {0,0}, /* 50 */ + {0,0}, /* 75 */ + {0,0}, /* 110 */ + {0,0}, /* 134 */ + {0,0}, /* 150 */ + {0,0}, /* 200 */ + {7,0x26}, /* 300 */ + {6,0x26}, /* 600 */ + {5,0x26}, /* 1200 */ + {0,0}, /* 1800 */ + {4,0x26}, /* 2400 */ + {3,0x26}, /* 4800 */ + {2,0x26}, /* 9600 */ + {1,0x26}, /* 19200 */ + {0,0x26}, /* 38400 */ + {1,0x38}, /* 57600 */ + {0,0x38}, /* 115200 */ +}; +#else + hw_baud_table[18] = { + {0,0}, /* 0 */ + {0,0}, /* 50 */ + {0,0}, /* 75 */ + {0,0}, /* 110 */ + {0,0}, /* 134 */ + {0,0}, /* 150 */ + {0,0}, /* 200 */ + {0,0}, /* 300 */ + {7,0x26}, /* 600 */ + {6,0x26}, /* 1200 */ + {0,0}, /* 1800 */ + {5,0x26}, /* 2400 */ + {4,0x26}, /* 4800 */ + {3,0x26}, /* 9600 */ + {2,0x26}, /* 19200 */ + {1,0x26}, /* 38400 */ + {0,0x26}, /* 57600 */ + {1,0x38}, /* 115200 */ +}; +#endif +/* rate = 1036800 / ((65 - prescale) * (1<line]; + unsigned short port; + unsigned short ustcnt; + unsigned cflag; + int i; + + if (!info->tty || !info->tty->termios) + return; + cflag = info->tty->termios->c_cflag; + if (!(port = info->port)) + return; + + ustcnt = uart->ustcnt; + uart->ustcnt = ustcnt & ~USTCNT_TXEN; + + i = cflag & CBAUD; + if (i & CBAUDEX) { + i = (i & ~CBAUDEX) + B38400; + } + + info->baud = baud_table[i]; + uart->ubaud = PUT_FIELD(UBAUD_DIVIDE, hw_baud_table[i].divisor) | + PUT_FIELD(UBAUD_PRESCALER, hw_baud_table[i].prescale); + + ustcnt &= ~(USTCNT_PARITYEN | USTCNT_ODD_EVEN | USTCNT_STOP | USTCNT_8_7); + + if ((cflag & CSIZE) == CS8) + ustcnt |= USTCNT_8_7; + + if (cflag & CSTOPB) + ustcnt |= USTCNT_STOP; + + if (cflag & PARENB) + ustcnt |= USTCNT_PARITYEN; + if (cflag & PARODD) + ustcnt |= USTCNT_ODD_EVEN; + +#ifdef CONFIG_SERIAL_68328_RTS_CTS + if (cflag & CRTSCTS) { + uart->utx.w &= ~ UTX_NOCTS; + } else { + uart->utx.w |= UTX_NOCTS; + } +#endif + + ustcnt |= USTCNT_TXEN; + + uart->ustcnt = ustcnt; + return; +} + +/* + * Fair output driver allows a process to speak. + */ +static void rs_fair_output(void) +{ + int left; /* Output no more than that */ + unsigned long flags; + struct m68k_serial *info = &m68k_soft[0]; + char c; + + if (info == 0) return; + if (info->xmit_buf == 0) return; + + save_flags(flags); cli(); + left = info->xmit_cnt; + while (left != 0) { + c = info->xmit_buf[info->xmit_tail]; + info->xmit_tail = (info->xmit_tail+1) & (SERIAL_XMIT_SIZE-1); + info->xmit_cnt--; + restore_flags(flags); + + rs_put_char(c); + + save_flags(flags); cli(); + left = min(info->xmit_cnt, left-1); + } + + /* Last character is being transmitted now (hopefully). */ + udelay(5); + + restore_flags(flags); + return; +} + +/* + * m68k_console_print is registered for printk. + */ +void console_print_68328(const char *p) +{ + char c; + + while((c=*(p++)) != 0) { + if(c == '\n') + rs_put_char('\r'); + rs_put_char(c); + } + + /* Comment this if you want to have a strict interrupt-driven output */ + rs_fair_output(); + + return; +} + +static void rs_set_ldisc(struct tty_struct *tty) +{ + struct m68k_serial *info = (struct m68k_serial *)tty->driver_data; + + if (serial_paranoia_check(info, tty->device, "rs_set_ldisc")) + return; + + info->is_cons = (tty->termios->c_line == N_TTY); + + printk("ttyS%d console mode %s\n", info->line, info->is_cons ? "on" : "off"); +} + +static void rs_flush_chars(struct tty_struct *tty) +{ + struct m68k_serial *info = (struct m68k_serial *)tty->driver_data; + m68328_uart *uart = &uart_addr[info->line]; + unsigned long flags; + + if (serial_paranoia_check(info, tty->device, "rs_flush_chars")) + return; +#ifndef USE_INTS + for(;;) { +#endif + if (info->xmit_cnt <= 0 || tty->stopped || tty->hw_stopped || + !info->xmit_buf) + return; + + /* Enable transmitter */ + save_flags(flags); cli(); + +#ifdef USE_INTS + uart->ustcnt |= USTCNT_TXEN | USTCNT_TX_INTR_MASK; +#else + uart->ustcnt |= USTCNT_TXEN; +#endif + +#ifdef USE_INTS + if (uart->utx.w & UTX_TX_AVAIL) { +#else + if (1) { +#endif + /* Send char */ + uart->utx.b.txdata = info->xmit_buf[info->xmit_tail++]; + info->xmit_tail = info->xmit_tail & (SERIAL_XMIT_SIZE-1); + info->xmit_cnt--; + } + +#ifndef USE_INTS + while (!(uart->utx.w & UTX_TX_AVAIL)) udelay(5); + } +#endif + restore_flags(flags); +} + +extern void console_printn(const char * b, int count); + +static int rs_write(struct tty_struct * tty, int from_user, + const unsigned char *buf, int count) +{ + int c, total = 0; + struct m68k_serial *info = (struct m68k_serial *)tty->driver_data; + m68328_uart *uart = &uart_addr[info->line]; + unsigned long flags; + + if (serial_paranoia_check(info, tty->device, "rs_write")) + return 0; + + if (!tty || !info->xmit_buf) + return 0; + + save_flags(flags); + while (1) { + cli(); + c = min(count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1, + SERIAL_XMIT_SIZE - info->xmit_head)); + if (c <= 0) + break; + + if (from_user) { + down(&tmp_buf_sem); + copy_from_user(tmp_buf, buf, c); + c = min(c, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1, + SERIAL_XMIT_SIZE - info->xmit_head)); + memcpy(info->xmit_buf + info->xmit_head, tmp_buf, c); + up(&tmp_buf_sem); + } else + memcpy(info->xmit_buf + info->xmit_head, buf, c); + info->xmit_head = (info->xmit_head + c) & (SERIAL_XMIT_SIZE-1); + info->xmit_cnt += c; + restore_flags(flags); + buf += c; + count -= c; + total += c; + } + + if (info->xmit_cnt && !tty->stopped && !tty->hw_stopped) { + /* Enable transmitter */ + cli(); +#ifndef USE_INTS + while(info->xmit_cnt) { +#endif + + uart->ustcnt |= USTCNT_TXEN; +#ifdef USE_INTS + uart->ustcnt |= USTCNT_TX_INTR_MASK; +#else + while (!(uart->utx.w & UTX_TX_AVAIL)) udelay(5); +#endif + if (uart->utx.w & UTX_TX_AVAIL) { + uart->utx.b.txdata = info->xmit_buf[info->xmit_tail++]; + info->xmit_tail = info->xmit_tail & (SERIAL_XMIT_SIZE-1); + info->xmit_cnt--; + } + +#ifndef USE_INTS + } +#endif + restore_flags(flags); + } + restore_flags(flags); + return total; +} + +static int rs_write_room(struct tty_struct *tty) +{ + struct m68k_serial *info = (struct m68k_serial *)tty->driver_data; + int ret; + + if (serial_paranoia_check(info, tty->device, "rs_write_room")) + return 0; + ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1; + if (ret < 0) + ret = 0; + return ret; +} + +static int rs_chars_in_buffer(struct tty_struct *tty) +{ + struct m68k_serial *info = (struct m68k_serial *)tty->driver_data; + + if (serial_paranoia_check(info, tty->device, "rs_chars_in_buffer")) + return 0; + return info->xmit_cnt; +} + +static void rs_flush_buffer(struct tty_struct *tty) +{ + struct m68k_serial *info = (struct m68k_serial *)tty->driver_data; + + if (serial_paranoia_check(info, tty->device, "rs_flush_buffer")) + return; + cli(); + info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; + sti(); + wake_up_interruptible(&tty->write_wait); + if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) && + tty->ldisc.write_wakeup) + (tty->ldisc.write_wakeup)(tty); +} + +/* + * ------------------------------------------------------------ + * rs_throttle() + * + * This routine is called by the upper-layer tty layer to signal that + * incoming characters should be throttled. + * ------------------------------------------------------------ + */ +static void rs_throttle(struct tty_struct * tty) +{ + struct m68k_serial *info = (struct m68k_serial *)tty->driver_data; + + if (serial_paranoia_check(info, tty->device, "rs_throttle")) + return; + + if (I_IXOFF(tty)) + info->x_char = STOP_CHAR(tty); + + /* Turn off RTS line (do this atomic) */ +} + +static void rs_unthrottle(struct tty_struct * tty) +{ + struct m68k_serial *info = (struct m68k_serial *)tty->driver_data; + + if (serial_paranoia_check(info, tty->device, "rs_unthrottle")) + return; + + if (I_IXOFF(tty)) { + if (info->x_char) + info->x_char = 0; + else + info->x_char = START_CHAR(tty); + } + + /* Assert RTS line (do this atomic) */ +} + +/* + * ------------------------------------------------------------ + * rs_ioctl() and friends + * ------------------------------------------------------------ + */ + +static int get_serial_info(struct m68k_serial * info, + struct serial_struct * retinfo) +{ + struct serial_struct tmp; + + if (!retinfo) + return -EFAULT; + memset(&tmp, 0, sizeof(tmp)); + tmp.type = info->type; + tmp.line = info->line; + tmp.port = info->port; + tmp.irq = info->irq; + tmp.flags = info->flags; + tmp.baud_base = info->baud_base; + tmp.close_delay = info->close_delay; + tmp.closing_wait = info->closing_wait; + tmp.custom_divisor = info->custom_divisor; + copy_to_user(retinfo,&tmp,sizeof(*retinfo)); + return 0; +} + +static int set_serial_info(struct m68k_serial * info, + struct serial_struct * new_info) +{ + struct serial_struct new_serial; + struct m68k_serial old_info; + int retval = 0; + + if (!new_info) + return -EFAULT; + copy_from_user(&new_serial,new_info,sizeof(new_serial)); + old_info = *info; + + if (!capable(CAP_SYS_ADMIN)) { + if ((new_serial.baud_base != info->baud_base) || + (new_serial.type != info->type) || + (new_serial.close_delay != info->close_delay) || + ((new_serial.flags & ~S_USR_MASK) != + (info->flags & ~S_USR_MASK))) + return -EPERM; + info->flags = ((info->flags & ~S_USR_MASK) | + (new_serial.flags & S_USR_MASK)); + info->custom_divisor = new_serial.custom_divisor; + goto check_and_exit; + } + + if (info->count > 1) + return -EBUSY; + + /* + * OK, past this point, all the error checking has been done. + * At this point, we start making changes..... + */ + + info->baud_base = new_serial.baud_base; + info->flags = ((info->flags & ~S_FLAGS) | + (new_serial.flags & S_FLAGS)); + info->type = new_serial.type; + info->close_delay = new_serial.close_delay; + info->closing_wait = new_serial.closing_wait; + +check_and_exit: + retval = startup(info); + return retval; +} + +/* + * get_lsr_info - get line status register info + * + * Purpose: Let user call ioctl() to get info when the UART physically + * is emptied. On bus types like RS485, the transmitter must + * release the bus after transmitting. This must be done when + * the transmit shift register is empty, not be done when the + * transmit holding register is empty. This functionality + * allows an RS485 driver to be written in user space. + */ +static int get_lsr_info(struct m68k_serial * info, unsigned int *value) +{ +#ifdef CONFIG_SERIAL_68328_RTS_CTS + m68328_uart *uart = &uart_addr[info->line]; +#endif + unsigned char status; + + cli(); +#ifdef CONFIG_SERIAL_68328_RTS_CTS + status = (uart->utx.w & UTX_CTS_STAT) ? 1 : 0; +#else + status = 0; +#endif + sti(); + put_user(status,value); + return 0; +} + +/* + * This routine sends a break character out the serial port. + */ +static void send_break( struct m68k_serial * info, int duration) +{ + m68328_uart *uart = &uart_addr[info->line]; + unsigned long flags; + if (!info->port) + return; + current->state = TASK_INTERRUPTIBLE; + save_flags(flags); + cli(); +#ifdef USE_INTS + uart->utx.w |= UTX_SEND_BREAK; + schedule_timeout(duration); + uart->utx.w &= ~UTX_SEND_BREAK; +#endif + restore_flags(flags); +} + +static int rs_ioctl(struct tty_struct *tty, struct file * file, + unsigned int cmd, unsigned long arg) +{ + int error; + struct m68k_serial * info = (struct m68k_serial *)tty->driver_data; + int retval; + + if (serial_paranoia_check(info, tty->device, "rs_ioctl")) + return -ENODEV; + + if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) && + (cmd != TIOCSERCONFIG) && (cmd != TIOCSERGWILD) && + (cmd != TIOCSERSWILD) && (cmd != TIOCSERGSTRUCT)) { + if (tty->flags & (1 << TTY_IO_ERROR)) + return -EIO; + } + + switch (cmd) { + case TCSBRK: /* SVID version: non-zero arg --> no break */ + retval = tty_check_change(tty); + if (retval) + return retval; + tty_wait_until_sent(tty, 0); + if (!arg) + send_break(info, HZ/4); /* 1/4 second */ + return 0; + case TCSBRKP: /* support for POSIX tcsendbreak() */ + retval = tty_check_change(tty); + if (retval) + return retval; + tty_wait_until_sent(tty, 0); + send_break(info, arg ? arg*(HZ/10) : HZ/4); + return 0; + case TIOCGSOFTCAR: + error = verify_area(VERIFY_WRITE, (void *) arg,sizeof(long)); + if (error) + return error; + put_user(C_CLOCAL(tty) ? 1 : 0, + (unsigned long *) arg); + return 0; + case TIOCSSOFTCAR: + get_user(arg, (unsigned long *) arg); + tty->termios->c_cflag = + ((tty->termios->c_cflag & ~CLOCAL) | + (arg ? CLOCAL : 0)); + return 0; + case TIOCGSERIAL: + error = verify_area(VERIFY_WRITE, (void *) arg, + sizeof(struct serial_struct)); + if (error) + return error; + return get_serial_info(info, + (struct serial_struct *) arg); + case TIOCSSERIAL: + return set_serial_info(info, + (struct serial_struct *) arg); + case TIOCSERGETLSR: /* Get line status register */ + error = verify_area(VERIFY_WRITE, (void *) arg, + sizeof(unsigned int)); + if (error) + return error; + else + return get_lsr_info(info, (unsigned int *) arg); + + case TIOCSERGSTRUCT: + error = verify_area(VERIFY_WRITE, (void *) arg, + sizeof(struct m68k_serial)); + if (error) + return error; + copy_to_user((struct m68k_serial *) arg, + info, sizeof(struct m68k_serial)); + return 0; + + default: + return -ENOIOCTLCMD; + } + return 0; +} + +static void rs_set_termios(struct tty_struct *tty, struct termios *old_termios) +{ + struct m68k_serial *info = (struct m68k_serial *)tty->driver_data; + + if (tty->termios->c_cflag == old_termios->c_cflag) + return; + + change_speed(info); + + if ((old_termios->c_cflag & CRTSCTS) && + !(tty->termios->c_cflag & CRTSCTS)) { + tty->hw_stopped = 0; + rs_start(tty); + } + +} + +/* + * ------------------------------------------------------------ + * rs_close() + * + * This routine is called when the serial port gets closed. First, we + * wait for the last remaining data to be sent. Then, we unlink its + * S structure from the interrupt chain if necessary, and we free + * that IRQ if nothing is left in the chain. + * ------------------------------------------------------------ + */ +static void rs_close(struct tty_struct *tty, struct file * filp) +{ + struct m68k_serial * info = (struct m68k_serial *)tty->driver_data; + m68328_uart *uart = &uart_addr[info->line]; + unsigned long flags; + + if (!info || serial_paranoia_check(info, tty->device, "rs_close")) + return; + + save_flags(flags); cli(); + + if (tty_hung_up_p(filp)) { + restore_flags(flags); + return; + } + + if ((tty->count == 1) && (info->count != 1)) { + /* + * Uh, oh. tty->count is 1, which means that the tty + * structure will be freed. Info->count should always + * be one in these conditions. If it's greater than + * one, we've got real problems, since it means the + * serial port won't be shutdown. + */ + printk("rs_close: bad serial port count; tty->count is 1, " + "info->count is %d\n", info->count); + info->count = 1; + } + if (--info->count < 0) { + printk("rs_close: bad serial port count for ttyS%d: %d\n", + info->line, info->count); + info->count = 0; + } + if (info->count) { + restore_flags(flags); + return; + } + info->flags |= S_CLOSING; + /* + * Save the termios structure, since this port may have + * separate termios for callout and dialin. + */ + if (info->flags & S_NORMAL_ACTIVE) + info->normal_termios = *tty->termios; + if (info->flags & S_CALLOUT_ACTIVE) + info->callout_termios = *tty->termios; + /* + * Now we wait for the transmit buffer to clear; and we notify + * the line discipline to only process XON/XOFF characters. + */ + tty->closing = 1; + if (info->closing_wait != S_CLOSING_WAIT_NONE) + tty_wait_until_sent(tty, info->closing_wait); + /* + * At this point we stop accepting input. To do this, we + * disable the receive line status interrupts, and tell the + * interrupt driver to stop checking the data ready bit in the + * line status register. + */ + + uart->ustcnt &= ~USTCNT_RXEN; + uart->ustcnt &= ~(USTCNT_RXEN | USTCNT_RX_INTR_MASK); + + shutdown(info); + if (tty->driver.flush_buffer) + tty->driver.flush_buffer(tty); + if (tty->ldisc.flush_buffer) + tty->ldisc.flush_buffer(tty); + tty->closing = 0; + info->event = 0; + info->tty = 0; + if (tty->ldisc.num != ldiscs[N_TTY].num) { + if (tty->ldisc.close) + (tty->ldisc.close)(tty); + tty->ldisc = ldiscs[N_TTY]; + tty->termios->c_line = N_TTY; + if (tty->ldisc.open) + (tty->ldisc.open)(tty); + } + if (info->blocked_open) { + if (info->close_delay) { + current->state = TASK_INTERRUPTIBLE; + schedule_timeout(info->close_delay); + } + wake_up_interruptible(&info->open_wait); + } + info->flags &= ~(S_NORMAL_ACTIVE|S_CALLOUT_ACTIVE| + S_CLOSING); + wake_up_interruptible(&info->close_wait); + restore_flags(flags); +} + +/* + * rs_hangup() --- called by tty_hangup() when a hangup is signaled. + */ +void rs_hangup(struct tty_struct *tty) +{ + struct m68k_serial * info = (struct m68k_serial *)tty->driver_data; + + if (serial_paranoia_check(info, tty->device, "rs_hangup")) + return; + + rs_flush_buffer(tty); + shutdown(info); + info->event = 0; + info->count = 0; + info->flags &= ~(S_NORMAL_ACTIVE|S_CALLOUT_ACTIVE); + info->tty = 0; + wake_up_interruptible(&info->open_wait); +} + +/* + * ------------------------------------------------------------ + * rs_open() and friends + * ------------------------------------------------------------ + */ +static int block_til_ready(struct tty_struct *tty, struct file * filp, + struct m68k_serial *info) +{ + DECLARE_WAITQUEUE(wait, current); + int retval; + int do_clocal = 0; + + /* + * If the device is in the middle of being closed, then block + * until it's done, and then try again. + */ + if (info->flags & S_CLOSING) { + interruptible_sleep_on(&info->close_wait); +#ifdef SERIAL_DO_RESTART + if (info->flags & S_HUP_NOTIFY) + return -EAGAIN; + else + return -ERESTARTSYS; +#else + return -EAGAIN; +#endif + } + + /* + * If this is a callout device, then just make sure the normal + * device isn't being used. + */ + if (tty->driver.subtype == SERIAL_TYPE_CALLOUT) { + if (info->flags & S_NORMAL_ACTIVE) + return -EBUSY; + if ((info->flags & S_CALLOUT_ACTIVE) && + (info->flags & S_SESSION_LOCKOUT) && + (info->session != current->session)) + return -EBUSY; + if ((info->flags & S_CALLOUT_ACTIVE) && + (info->flags & S_PGRP_LOCKOUT) && + (info->pgrp != current->pgrp)) + return -EBUSY; + info->flags |= S_CALLOUT_ACTIVE; + return 0; + } + + /* + * If non-blocking mode is set, or the port is not enabled, + * then make the check up front and then exit. + */ + if ((filp->f_flags & O_NONBLOCK) || + (tty->flags & (1 << TTY_IO_ERROR))) { + if (info->flags & S_CALLOUT_ACTIVE) + return -EBUSY; + info->flags |= S_NORMAL_ACTIVE; + return 0; + } + + if (info->flags & S_CALLOUT_ACTIVE) { + if (info->normal_termios.c_cflag & CLOCAL) + do_clocal = 1; + } else { + if (tty->termios->c_cflag & CLOCAL) + do_clocal = 1; + } + + /* + * Block waiting for the carrier detect and the line to become + * free (i.e., not in use by the callout). While we are in + * this loop, info->count is dropped by one, so that + * rs_close() knows when to free things. We restore it upon + * exit, either normal or abnormal. + */ + retval = 0; + add_wait_queue(&info->open_wait, &wait); + + info->count--; + info->blocked_open++; + while (1) { + cli(); + if (!(info->flags & S_CALLOUT_ACTIVE)) + m68k_rtsdtr(info, 1); + sti(); + current->state = TASK_INTERRUPTIBLE; + if (tty_hung_up_p(filp) || + !(info->flags & S_INITIALIZED)) { +#ifdef SERIAL_DO_RESTART + if (info->flags & S_HUP_NOTIFY) + retval = -EAGAIN; + else + retval = -ERESTARTSYS; +#else + retval = -EAGAIN; +#endif + break; + } + if (!(info->flags & S_CALLOUT_ACTIVE) && + !(info->flags & S_CLOSING) && do_clocal) + break; + if (signal_pending(current)) { + retval = -ERESTARTSYS; + break; + } + schedule(); + } + current->state = TASK_RUNNING; + remove_wait_queue(&info->open_wait, &wait); + if (!tty_hung_up_p(filp)) + info->count++; + info->blocked_open--; + + if (retval) + return retval; + info->flags |= S_NORMAL_ACTIVE; + return 0; +} + +/* + * This routine is called whenever a serial port is opened. It + * enables interrupts for a serial port, linking in its S structure into + * the IRQ chain. It also performs the serial-specific + * initialization for the tty structure. + */ +int rs_open(struct tty_struct *tty, struct file * filp) +{ + struct m68k_serial *info; + int retval, line; + + line = minor(tty->device) - tty->driver.minor_start; + + if (line >= NR_PORTS || line < 0) /* we have exactly one */ + return -ENODEV; + + info = &m68k_soft[line]; + + if (serial_paranoia_check(info, tty->device, "rs_open")) + return -ENODEV; + + info->count++; + tty->driver_data = info; + info->tty = tty; + + /* + * Start up serial port + */ + retval = startup(info); + if (retval) + return retval; + + retval = block_til_ready(tty, filp, info); + if (retval) { + return retval; + } + + if ((info->count == 1) && (info->flags & S_SPLIT_TERMIOS)) { + if (tty->driver.subtype == SERIAL_TYPE_NORMAL) + *tty->termios = info->normal_termios; + else + *tty->termios = info->callout_termios; + change_speed(info); + } + + info->session = current->session; + info->pgrp = current->pgrp; + + return 0; +} + +/* Finally, routines used to initialize the serial driver. */ + +static void show_serial_version(void) +{ + printk("MC68328 serial driver version 1.00\n"); +} + +#ifdef CONFIG_PM +/* Serial Power management + * The console (currently fixed at line 0) is a special case for power + * management because the kernel is so chatty. The console will be + * explicitly disabled my our power manager as the last minute, so we won't + * mess with it here. + */ +static struct pm_dev *serial_pm[NR_PORTS]; + +static int serial_pm_callback(struct pm_dev *dev, pm_request_t request, void *data) +{ + struct m68k_serial *info = (struct m68k_serial *)dev->data; + + if(info == NULL) + return -1; + + /* special case for line 0 - pm restores it */ + if(info->line == 0) + return 0; + + switch (request) { + case PM_SUSPEND: + shutdown(info); + break; + + case PM_RESUME: + startup(info); + break; + } + return 0; +} + +void shutdown_console(void) +{ + struct m68k_serial *info = &m68k_soft[0]; + + /* HACK: wait a bit for any pending printk's to be dumped */ + { + int i = 10000; + while(i--); + } + + shutdown(info); +} + +void startup_console(void) +{ + struct m68k_serial *info = &m68k_soft[0]; + startup(info); +} +#endif + + +/* rs_init inits the driver */ +static int __init +rs68328_init(void) +{ + int flags, i; + struct m68k_serial *info; + + show_serial_version(); + + /* Initialize the tty_driver structure */ + /* SPARC: Not all of this is exactly right for us. */ + + memset(&serial_driver, 0, sizeof(struct tty_driver)); + serial_driver.magic = TTY_DRIVER_MAGIC; + serial_driver.name = "ttyS"; + serial_driver.major = TTY_MAJOR; + serial_driver.minor_start = 64; + serial_driver.num = NR_PORTS; + serial_driver.type = TTY_DRIVER_TYPE_SERIAL; + serial_driver.subtype = SERIAL_TYPE_NORMAL; + serial_driver.init_termios = tty_std_termios; + serial_driver.init_termios.c_cflag = + m68328_console_cbaud | CS8 | CREAD | HUPCL | CLOCAL; + serial_driver.flags = TTY_DRIVER_REAL_RAW; + serial_driver.refcount = &serial_refcount; + serial_driver.table = serial_table; + serial_driver.termios = serial_termios; + serial_driver.termios_locked = serial_termios_locked; + + serial_driver.open = rs_open; + serial_driver.close = rs_close; + serial_driver.write = rs_write; + serial_driver.flush_chars = rs_flush_chars; + serial_driver.write_room = rs_write_room; + serial_driver.chars_in_buffer = rs_chars_in_buffer; + serial_driver.flush_buffer = rs_flush_buffer; + serial_driver.ioctl = rs_ioctl; + serial_driver.throttle = rs_throttle; + serial_driver.unthrottle = rs_unthrottle; + serial_driver.set_termios = rs_set_termios; + serial_driver.stop = rs_stop; + serial_driver.start = rs_start; + serial_driver.hangup = rs_hangup; + serial_driver.set_ldisc = rs_set_ldisc; + + /* + * The callout device is just like normal device except for + * major number and the subtype code. + */ + callout_driver = serial_driver; + callout_driver.name = "cua"; + callout_driver.major = TTYAUX_MAJOR; + callout_driver.subtype = SERIAL_TYPE_CALLOUT; + + if (tty_register_driver(&serial_driver)) + panic("Couldn't register serial driver\n"); + if (tty_register_driver(&callout_driver)) + panic("Couldn't register callout driver\n"); + + save_flags(flags); cli(); + + for(i=0;imagic = SERIAL_MAGIC; + info->port = (int) &uart_addr[i]; + info->tty = 0; + info->irq = uart_irqs[i]; + info->custom_divisor = 16; + info->close_delay = 50; + info->closing_wait = 3000; + info->x_char = 0; + info->event = 0; + info->count = 0; + info->blocked_open = 0; + INIT_TQUEUE(&info->tqueue, do_softint, info); + INIT_TQUEUE(&info->tqueue_hangup, do_serial_hangup, info); + info->callout_termios =callout_driver.init_termios; + info->normal_termios = serial_driver.init_termios; + init_waitqueue_head(&info->open_wait); + init_waitqueue_head(&info->close_wait); + info->line = i; + info->is_cons = 1; /* Means shortcuts work */ + + printk("%s%d at 0x%08x (irq = %d)", serial_driver.name, info->line, + info->port, info->irq); + printk(" is a builtin MC68328 UART\n"); + + IRQ_ports[info->irq] = info; /* waste of space */ + +#ifdef CONFIG_M68VZ328 + if (i > 0 ) + PJSEL &= 0xCF; /* PSW enable second port output */ +#endif + + if (request_irq(uart_irqs[i], + rs_interrupt, + IRQ_FLG_STD, + "M68328_UART", NULL)) + panic("Unable to attach 68328 serial interrupt\n"); +#ifdef CONFIG_PM + serial_pm[i] = pm_register(PM_SYS_DEV, PM_SYS_COM, serial_pm_callback); + if (serial_pm[i]) + serial_pm[i]->data = info; +#endif + } + restore_flags(flags); + return 0; +} + + + +/* + * register_serial and unregister_serial allows for serial ports to be + * configured at run-time, to support PCMCIA modems. + */ +/* SPARC: Unused at this time, just here to make things link. */ +int register_serial(struct serial_struct *req) +{ + return -1; +} + +void unregister_serial(int line) +{ + return; +} + +module_init(rs68328_init); +/* DAVIDM module_exit(rs68328_fini); */ + + + +static void m68328_set_baud(void) +{ + unsigned short ustcnt; + int i; + + ustcnt = USTCNT; + USTCNT = ustcnt & ~USTCNT_TXEN; + +again: + for (i = 0; i < sizeof(baud_table) / sizeof(baud_table[0]); i++) + if (baud_table[i] == m68328_console_baud) + break; + if (i >= sizeof(baud_table) / sizeof(baud_table[0])) { + m68328_console_baud = 9600; + goto again; + } + + UBAUD = PUT_FIELD(UBAUD_DIVIDE, hw_baud_table[i].divisor) | + PUT_FIELD(UBAUD_PRESCALER, hw_baud_table[i].prescale); + ustcnt &= ~(USTCNT_PARITYEN | USTCNT_ODD_EVEN | USTCNT_STOP | USTCNT_8_7); + ustcnt |= USTCNT_8_7; + ustcnt |= USTCNT_TXEN; + USTCNT = ustcnt; + m68328_console_initted = 1; + return; +} + + +int m68328_console_setup(struct console *cp, char *arg) +{ + int i, n = CONSOLE_BAUD_RATE; + + if (!cp) + return(-1); + + if (arg) + n = simple_strtoul(arg,NULL,0); + + for (i = 0; i < BAUD_TABLE_SIZE; i++) + if (baud_table[i] == n) + break; + if (i < BAUD_TABLE_SIZE) { + m68328_console_baud = n; + m68328_console_cbaud = 0; + if (i > 15) { + m68328_console_cbaud |= CBAUDEX; + i -= 15; + } + m68328_console_cbaud |= i; + } + + m68328_set_baud(); /* make sure baud rate changes */ + return(0); +} + + +static kdev_t m68328_console_device(struct console *c) +{ + return mk_kdev(TTY_MAJOR, 64 + c->index); +} + + +void m68328_console_write (struct console *co, const char *str, + unsigned int count) +{ + if (!m68328_console_initted) + m68328_set_baud(); + while (count--) { + if (*str == '\n') + rs_put_char('\r'); + rs_put_char( *str++ ); + } +} + + +static struct console m68328_driver = { + name: "ttyS", + write: m68328_console_write, + device: m68328_console_device, + setup: m68328_console_setup, + flags: CON_PRINTBUFFER, + index: -1, +}; + + +void m68328_console_init(void) +{ + register_console(&m68328_driver); +} + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/serial/68328serial.h linux.2.5.40-ac2/drivers/serial/68328serial.h --- linux.2.5.40/drivers/serial/68328serial.h 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/drivers/serial/68328serial.h 2002-10-02 21:55:06.000000000 +0100 @@ -0,0 +1,198 @@ +/* 68328serial.h: Definitions for the mc68328 serial driver. + * + * Copyright (C) 1995 David S. Miller + * Copyright (C) 1998 Kenneth Albanowski + * Copyright (C) 1998, 1999 D. Jeff Dionne + * Copyright (C) 1999 Vladimir Gurevich + * + * VZ Support/Fixes Evan Stawnyczy + */ + +#ifndef _MC683XX_SERIAL_H +#define _MC683XX_SERIAL_H + +#include + +struct serial_struct { + int type; + int line; + int port; + int irq; + int flags; + int xmit_fifo_size; + int custom_divisor; + int baud_base; + unsigned short close_delay; + char reserved_char[2]; + int hub6; /* FIXME: We don't have AT&T Hub6 boards! */ + unsigned short closing_wait; /* time to wait before closing */ + unsigned short closing_wait2; /* no longer used... */ + int reserved[4]; +}; + +/* + * For the close wait times, 0 means wait forever for serial port to + * flush its output. 65535 means don't wait at all. + */ +#define S_CLOSING_WAIT_INF 0 +#define S_CLOSING_WAIT_NONE 65535 + +/* + * Definitions for S_struct (and serial_struct) flags field + */ +#define S_HUP_NOTIFY 0x0001 /* Notify getty on hangups and closes + on the callout port */ +#define S_FOURPORT 0x0002 /* Set OU1, OUT2 per AST Fourport settings */ +#define S_SAK 0x0004 /* Secure Attention Key (Orange book) */ +#define S_SPLIT_TERMIOS 0x0008 /* Separate termios for dialin/callout */ + +#define S_SPD_MASK 0x0030 +#define S_SPD_HI 0x0010 /* Use 56000 instead of 38400 bps */ + +#define S_SPD_VHI 0x0020 /* Use 115200 instead of 38400 bps */ +#define S_SPD_CUST 0x0030 /* Use user-specified divisor */ + +#define S_SKIP_TEST 0x0040 /* Skip UART test during autoconfiguration */ +#define S_AUTO_IRQ 0x0080 /* Do automatic IRQ during autoconfiguration */ +#define S_SESSION_LOCKOUT 0x0100 /* Lock out cua opens based on session */ +#define S_PGRP_LOCKOUT 0x0200 /* Lock out cua opens based on pgrp */ +#define S_CALLOUT_NOHUP 0x0400 /* Don't do hangups for cua device */ + +#define S_FLAGS 0x0FFF /* Possible legal S flags */ +#define S_USR_MASK 0x0430 /* Legal flags that non-privileged + * users can set or reset */ + +/* Internal flags used only by kernel/chr_drv/serial.c */ +#define S_INITIALIZED 0x80000000 /* Serial port was initialized */ +#define S_CALLOUT_ACTIVE 0x40000000 /* Call out device is active */ +#define S_NORMAL_ACTIVE 0x20000000 /* Normal device is active */ +#define S_BOOT_AUTOCONF 0x10000000 /* Autoconfigure port on bootup */ +#define S_CLOSING 0x08000000 /* Serial port is closing */ +#define S_CTS_FLOW 0x04000000 /* Do CTS flow control */ +#define S_CHECK_CD 0x02000000 /* i.e., CLOCAL */ + +/* Software state per channel */ + +#ifdef __KERNEL__ + +/* + * I believe this is the optimal setting that reduces the number of interrupts. + * At high speeds the output might become a little "bursted" (use USTCNT_TXHE + * if that bothers you), but in most cases it will not, since we try to + * transmit characters every time rs_interrupt is called. Thus, quite often + * you'll see that a receive interrupt occures before the transmit one. + * -- Vladimir Gurevich + */ +#define USTCNT_TX_INTR_MASK (USTCNT_TXEE) + +/* + * 68328 and 68EZ328 UARTS are a little bit different. EZ328 has special + * "Old data interrupt" which occures whenever the data stay in the FIFO + * longer than 30 bits time. This allows us to use FIFO without compromising + * latency. '328 does not have this feature and without the real 328-based + * board I would assume that RXRE is the safest setting. + * + * For EZ328 I use RXHE (Half empty) interrupt to reduce the number of + * interrupts. RXFE (receive queue full) causes the system to loose data + * at least at 115200 baud + * + * If your board is busy doing other stuff, you might consider to use + * RXRE (data ready intrrupt) instead. + * + * The other option is to make these INTR masks run-time configurable, so + * that people can dynamically adapt them according to the current usage. + * -- Vladimir Gurevich + */ + +/* (es) */ +#if defined(CONFIG_M68EZ328) || defined(CONFIG_M68VZ328) +#define USTCNT_RX_INTR_MASK (USTCNT_RXHE | USTCNT_ODEN) +#elif defined(CONFIG_M68328) +#define USTCNT_RX_INTR_MASK (USTCNT_RXRE) +#else +#error Please, define the Rx interrupt events for your CPU +#endif +/* (/es) */ + +/* + * This is our internal structure for each serial port's state. + * + * Many fields are paralleled by the structure used by the serial_struct + * structure. + * + * For definitions of the flags field, see tty.h + */ + +struct m68k_serial { + char soft_carrier; /* Use soft carrier on this channel */ + char break_abort; /* Is serial console in, so process brk/abrt */ + char is_cons; /* Is this our console. */ + + /* We need to know the current clock divisor + * to read the bps rate the chip has currently + * loaded. + */ + unsigned char clk_divisor; /* May be 1, 16, 32, or 64 */ + int baud; + int magic; + int baud_base; + int port; + int irq; + int flags; /* defined in tty.h */ + int type; /* UART type */ + struct tty_struct *tty; + int read_status_mask; + int ignore_status_mask; + int timeout; + int xmit_fifo_size; + int custom_divisor; + int x_char; /* xon/xoff character */ + int close_delay; + unsigned short closing_wait; + unsigned short closing_wait2; + unsigned long event; + unsigned long last_active; + int line; + int count; /* # of fd on device */ + int blocked_open; /* # of blocked opens */ + long session; /* Session of opening process */ + long pgrp; /* pgrp of opening process */ + unsigned char *xmit_buf; + int xmit_head; + int xmit_tail; + int xmit_cnt; + struct tq_struct tqueue; + struct tq_struct tqueue_hangup; + struct termios normal_termios; + struct termios callout_termios; + wait_queue_head_t open_wait; + wait_queue_head_t close_wait; +}; + + +#define SERIAL_MAGIC 0x5301 + +/* + * The size of the serial xmit buffer is 1 page, or 4096 bytes + */ +#define SERIAL_XMIT_SIZE 4096 + +/* + * Events are used to schedule things to happen at timer-interrupt + * time, instead of at rs interrupt time. + */ +#define RS_EVENT_WRITE_WAKEUP 0 + +/* + * Define the number of ports supported and their irqs. + */ +#ifndef CONFIG_68328_SERIAL_UART2 +#define NR_PORTS 1 +#define UART_IRQ_DEFNS {UART_IRQ_NUM} +#else +#define NR_PORTS 2 +#define UART_IRQ_DEFNS {UART1_IRQ_NUM, UART2_IRQ_NUM} +#endif + +#endif /* __KERNEL__ */ +#endif /* !(_MC683XX_SERIAL_H) */ diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/serial/Config.in linux.2.5.40-ac2/drivers/serial/Config.in --- linux.2.5.40/drivers/serial/Config.in 2002-10-02 21:33:41.000000000 +0100 +++ linux.2.5.40-ac2/drivers/serial/Config.in 2002-10-02 21:55:06.000000000 +0100 @@ -59,12 +59,20 @@ dep_tristate 'Sun Siemens SAB82532 serial support' CONFIG_SERIAL_SUNSAB $CONFIG_PCI fi +if [ "$CONFIG_V850E_NB85E" = "y" ]; then + bool 'NEC v850e on-chip UART support' CONFIG_V850E_NB85E_UART + dep_bool ' Use NEC v850e on-chip UART for console' \ + CONFIG_V850E_NB85E_UART_CONSOLE \ + $CONFIG_V850E_NB85E_UART +fi + + if [ "$CONFIG_SERIAL_AMBA" = "y" -o "$CONFIG_SERIAL_CLPS711X" = "y" -o \ "$CONFIG_SERIAL_21285" = "y" -o "$CONFIG_SERIAL_SA1100" = "y" -o \ "$CONFIG_SERIAL_ANAKIN" = "y" -o "$CONFIG_SERIAL_UART00" = "y" -o \ "$CONFIG_SERIAL_8250" = "y" -o "$CONFIG_SERIAL_ROCKETPORT" = "y" -o \ "$CONFIG_SERIAL_SUNZILOG" = "y" -o "$CONFIG_SERIAL_SUNSU" = "y" -o \ - "$CONFIG_SERIAL_SUNSAB" = "y" ]; then + "$CONFIG_SERIAL_SUNSAB" = "y" -o "$CONFIG_V850E_NB85E_UART" = "y" ]; then define_bool CONFIG_SERIAL_CORE y else if [ "$CONFIG_SERIAL_AMBA" = "m" -o "$CONFIG_SERIAL_CLPS711X" = "m" -o \ @@ -72,7 +80,7 @@ "$CONFIG_SERIAL_ANAKIN" = "m" -o "$CONFIG_SERIAL_UART00" = "m" -o \ "$CONFIG_SERIAL_8250" = "m" -o "$CONFIG_SERIAL_ROCKETPORT" = "m" -o \ "$CONFIG_SERIAL_SUNZILOG" = "m" -o "$CONFIG_SERIAL_SUNSU" = "m" -o \ - "$CONFIG_SERIAL_SUNSAB" = "m" ]; then + "$CONFIG_SERIAL_SUNSAB" = "m" -o "$CONFIG_V850E_NB85E_UART" = "m" ]; then define_bool CONFIG_SERIAL_CORE m fi fi @@ -83,8 +91,22 @@ "$CONFIG_SERIAL_ANAKIN_CONSOLE" = "y" -o \ "$CONFIG_SERIAL_UART00_CONSOLE" = "y" -o \ "$CONFIG_SERIAL_8250_CONSOLE" = "y" -o \ - "$CONFIG_SERIAL_SUNCORE" = "y" ]; then + "$CONFIG_SERIAL_SUNCORE" = "y" -o \ + "$CONFIG_V850E_NB85E_UART_CONSOLE" = "y" ]; then define_bool CONFIG_SERIAL_CORE_CONSOLE y fi +if [ "$CONFIG_M68328" = "y" -o \ + "$CONFIG_M68EZ328" = "y" -o \ + "$CONFIG_M68VZ328" = "y" ]; then + bool '68328 serial support' CONFIG_SERIAL_68328 + if [ "$CONFIG_SERIAL_68328" = "y" ]; then + bool ' Support RTS/CTS on 68328 serial support' CONFIG_SERIAL_68328_RTS_CTS + fi +fi + +if [ "$CONFIG_COLDFIRE" = "y" ]; then + bool 'ColdFire serial support' CONFIG_SERIAL_COLDFIRE +fi + endmenu diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/serial/Makefile linux.2.5.40-ac2/drivers/serial/Makefile --- linux.2.5.40/drivers/serial/Makefile 2002-10-02 21:33:21.000000000 +0100 +++ linux.2.5.40-ac2/drivers/serial/Makefile 2002-10-02 21:55:06.000000000 +0100 @@ -22,5 +22,8 @@ obj-$(CONFIG_SERIAL_SUNZILOG) += sunzilog.o obj-$(CONFIG_SERIAL_SUNSU) += sunsu.o obj-$(CONFIG_SERIAL_SUNSAB) += sunsab.o +obj-$(CONFIG_SERIAL_68328) += 68328serial.o +obj-$(CONFIG_SERIAL_COLDFIRE) += mcfserial.o +obj-$(CONFIG_V850E_NB85E_UART) += nb85e_uart.o include $(TOPDIR)/Rules.make diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/serial/mcfserial.c linux.2.5.40-ac2/drivers/serial/mcfserial.c --- linux.2.5.40/drivers/serial/mcfserial.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/drivers/serial/mcfserial.c 2002-10-02 21:55:06.000000000 +0100 @@ -0,0 +1,1876 @@ +/* + * mcfserial.c -- serial driver for ColdFire internal UARTS. + * + * Copyright (c) 1999-2002 Greg Ungerer + * Copyright (c) 2000-2001 Lineo, Inc. + * Copyright (C) 2001-2002 SnapGear Inc. + * + * Based on code from 68332serial.c which was: + * + * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) + * Copyright (C) 1998 TSHG + * Copyright (c) 1999 Rt-Control Inc. + * + * CHANGES + * 020506 Included the "|| defined(CONFIG_senTec)" to get the + * correct console baud rate of 19200 again. (Thanks + * to Michael Chen +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#ifdef CONFIG_LEDMAN +#include +#endif +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include "mcfserial.h" + +/* + * the only event we use + */ +#undef RS_EVENT_WRITE_WAKEUP +#define RS_EVENT_WRITE_WAKEUP 0 + +struct timer_list mcfrs_timer_struct; + +/* + * Default console baud rate, we use this as the default + * for all ports so init can just open /dev/console and + * keep going. Perhaps one day the cflag settings for the + * console can be used instead. + */ +#if defined(CONFIG_ARNEWSH) || defined(CONFIG_MOTOROLA) || defined(CONFIG_senTec) +#define CONSOLE_BAUD_RATE 19200 +#define DEFAULT_CBAUD B19200 +#endif + +#ifndef CONSOLE_BAUD_RATE +#define CONSOLE_BAUD_RATE 9600 +#define DEFAULT_CBAUD B9600 +#endif + +int mcfrs_console_inited = 0; +int mcfrs_console_port = -1; +int mcfrs_console_baud = CONSOLE_BAUD_RATE; +int mcfrs_console_cbaud = DEFAULT_CBAUD; + +/* + * Driver data structures. + */ +struct tty_driver mcfrs_serial_driver, mcfrs_callout_driver; +static int mcfrs_serial_refcount; + +/* serial subtype definitions */ +#define SERIAL_TYPE_NORMAL 1 +#define SERIAL_TYPE_CALLOUT 2 + +/* number of characters left in xmit buffer before we ask for more */ +#define WAKEUP_CHARS 256 + +/* Debugging... + */ +#undef SERIAL_DEBUG_OPEN +#undef SERIAL_DEBUG_FLOW + +#define _INLINE_ inline + +#define IRQBASE 73 + +/* + * Configuration table, UARTs to look for at startup. + */ +static struct mcf_serial mcfrs_table[] = { + { 0, (MCF_MBAR+MCFUART_BASE1), IRQBASE, ASYNC_BOOT_AUTOCONF }, /* ttyS0 */ + { 0, (MCF_MBAR+MCFUART_BASE2), IRQBASE+1, ASYNC_BOOT_AUTOCONF }, /* ttyS1 */ +}; + + +#define NR_PORTS (sizeof(mcfrs_table) / sizeof(struct mcf_serial)) + +static struct tty_struct *mcfrs_serial_table[NR_PORTS]; +static struct termios *mcfrs_serial_termios[NR_PORTS]; +static struct termios *mcfrs_serial_termios_locked[NR_PORTS]; + +/* + * This is used to figure out the divisor speeds and the timeouts. + */ +static int mcfrs_baud_table[] = { + 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800, + 9600, 19200, 38400, 57600, 115200, 230400, 460800, 0 +}; +#define MCFRS_BAUD_TABLE_SIZE \ + (sizeof(mcfrs_baud_table)/sizeof(mcfrs_baud_table[0])) + + +#ifdef CONFIG_MAGIC_SYSRQ +/* + * Magic system request keys. Used for debugging... + */ +extern int magic_sysrq_key(int ch); +#endif + + +/* + * tmp_buf is used as a temporary buffer by serial_write. We need to + * lock it in case the copy_from_user blocks while swapping in a page, + * and some other program tries to do a serial write at the same time. + * Since the lock will only come under contention when the system is + * swapping and available memory is low, it makes sense to share one + * buffer across all the serial ports, since it significantly saves + * memory if large numbers of serial ports are open. + */ +static unsigned char mcfrs_tmp_buf[4096]; /* This is cheating */ +static DECLARE_MUTEX(mcfrs_tmp_buf_sem); + +/* + * Forware declarations... + */ +static void mcfrs_change_speed(struct mcf_serial *info); + + +static inline int serial_paranoia_check(struct mcf_serial *info, + kdev_t device, const char *routine) +{ +#ifdef SERIAL_PARANOIA_CHECK + static const char *badmagic = + "MCFRS(warning): bad magic number for serial struct (%d, %d) in %s\n"; + static const char *badinfo = + "MCFRS(warning): null mcf_serial for (%d, %d) in %s\n"; + + if (!info) { + printk(badinfo, MAJOR(device), MINOR(device), routine); + return 1; + } + if (info->magic != SERIAL_MAGIC) { + printk(badmagic, MAJOR(device), MINOR(device), routine); + return 1; + } +#endif + return 0; +} + +/* + * Sets or clears DTR and RTS on the requested line. + */ +static void mcfrs_setsignals(struct mcf_serial *info, int dtr, int rts) +{ + volatile unsigned char *uartp; + unsigned long flags; + +#if 0 + printk("%s(%d): mcfrs_setsignals(info=%x,dtr=%d,rts=%d)\n", + __FILE__, __LINE__, info, dtr, rts); +#endif + + local_irq_save(flags); + if (dtr >= 0) { +#ifdef MCFPP_DTR0 + if (info->line) + mcf_setppdata(MCFPP_DTR1, (dtr ? 0 : MCFPP_DTR1)); + else + mcf_setppdata(MCFPP_DTR0, (dtr ? 0 : MCFPP_DTR0)); +#endif + } + if (rts >= 0) { + uartp = (volatile unsigned char *) info->addr; + if (rts) { + info->sigs |= TIOCM_RTS; + uartp[MCFUART_UOP1] = MCFUART_UOP_RTS; + } else { + info->sigs &= ~TIOCM_RTS; + uartp[MCFUART_UOP0] = MCFUART_UOP_RTS; + } + } + local_irq_restore(flags); + return; +} + +/* + * Gets values of serial signals. + */ +static int mcfrs_getsignals(struct mcf_serial *info) +{ + volatile unsigned char *uartp; + unsigned long flags; + int sigs; +#if defined(CONFIG_NETtel) && defined(CONFIG_M5307) + unsigned short ppdata; +#endif + +#if 0 + printk("%s(%d): mcfrs_getsignals(info=%x)\n", __FILE__, __LINE__); +#endif + + local_irq_save(flags); + uartp = (volatile unsigned char *) info->addr; + sigs = (uartp[MCFUART_UIPR] & MCFUART_UIPR_CTS) ? 0 : TIOCM_CTS; + sigs |= (info->sigs & TIOCM_RTS); + +#ifdef MCFPP_DCD0 +{ + unsigned int ppdata; + ppdata = mcf_getppdata(); + if (info->line == 0) { + sigs |= (ppdata & MCFPP_DCD0) ? 0 : TIOCM_CD; + sigs |= (ppdata & MCFPP_DTR0) ? 0 : TIOCM_DTR; + } else if (info->line == 1) { + sigs |= (ppdata & MCFPP_DCD1) ? 0 : TIOCM_CD; + sigs |= (ppdata & MCFPP_DTR1) ? 0 : TIOCM_DTR; + } +} +#endif + + local_irq_restore(flags); + return(sigs); +} + +/* + * ------------------------------------------------------------ + * mcfrs_stop() and mcfrs_start() + * + * This routines are called before setting or resetting tty->stopped. + * They enable or disable transmitter interrupts, as necessary. + * ------------------------------------------------------------ + */ +static void mcfrs_stop(struct tty_struct *tty) +{ + volatile unsigned char *uartp; + struct mcf_serial *info = (struct mcf_serial *)tty->driver_data; + unsigned long flags; + + if (serial_paranoia_check(info, tty->device, "mcfrs_stop")) + return; + + local_irq_save(flags); + uartp = (volatile unsigned char *) info->addr; + info->imr &= ~MCFUART_UIR_TXREADY; + uartp[MCFUART_UIMR] = info->imr; + local_irq_restore(flags); +} + +static void mcfrs_start(struct tty_struct *tty) +{ + volatile unsigned char *uartp; + struct mcf_serial *info = (struct mcf_serial *)tty->driver_data; + unsigned long flags; + + if (serial_paranoia_check(info, tty->device, "mcfrs_start")) + return; + + local_irq_save(flags); + if (info->xmit_cnt && info->xmit_buf) { + uartp = (volatile unsigned char *) info->addr; + info->imr |= MCFUART_UIR_TXREADY; + uartp[MCFUART_UIMR] = info->imr; + } + local_irq_restore(flags); +} + +/* + * ---------------------------------------------------------------------- + * + * Here starts the interrupt handling routines. All of the following + * subroutines are declared as inline and are folded into + * mcfrs_interrupt(). They were separated out for readability's sake. + * + * Note: mcfrs_interrupt() is a "fast" interrupt, which means that it + * runs with interrupts turned off. People who may want to modify + * mcfrs_interrupt() should try to keep the interrupt handler as fast as + * possible. After you are done making modifications, it is not a bad + * idea to do: + * + * gcc -S -DKERNEL -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer serial.c + * + * and look at the resulting assemble code in serial.s. + * + * - Ted Ts'o (tytso@mit.edu), 7-Mar-93 + * ----------------------------------------------------------------------- + */ + +static _INLINE_ void receive_chars(struct mcf_serial *info, struct pt_regs *regs, unsigned short rx) +{ + volatile unsigned char *uartp; + struct tty_struct *tty = info->tty; + unsigned char status, ch; + + if (!tty) + return; + +#if defined(CONFIG_LEDMAN) + ledman_cmd(LEDMAN_CMD_SET, info->line ? LEDMAN_COM2_RX : LEDMAN_COM1_RX); +#endif + + uartp = (volatile unsigned char *) info->addr; + + while ((status = uartp[MCFUART_USR]) & MCFUART_USR_RXREADY) { + + if (tty->flip.count >= TTY_FLIPBUF_SIZE) + break; + + ch = uartp[MCFUART_URB]; + info->stats.rx++; + +#ifdef CONFIG_MAGIC_SYSRQ + if (mcfrs_console_inited && (info->line == mcfrs_console_port)) { + if (magic_sysrq_key(ch)) + continue; + } +#endif + + tty->flip.count++; + if (status & MCFUART_USR_RXERR) + uartp[MCFUART_UCR] = MCFUART_UCR_CMDRESETERR; + if (status & MCFUART_USR_RXBREAK) { + info->stats.rxbreak++; + *tty->flip.flag_buf_ptr++ = TTY_BREAK; + } else if (status & MCFUART_USR_RXPARITY) { + info->stats.rxparity++; + *tty->flip.flag_buf_ptr++ = TTY_PARITY; + } else if (status & MCFUART_USR_RXOVERRUN) { + info->stats.rxoverrun++; + *tty->flip.flag_buf_ptr++ = TTY_OVERRUN; + } else if (status & MCFUART_USR_RXFRAMING) { + info->stats.rxframing++; + *tty->flip.flag_buf_ptr++ = TTY_FRAME; + } else { + *tty->flip.flag_buf_ptr++ = 0; + } + *tty->flip.char_buf_ptr++ = ch; + } + + schedule_task(&tty->flip.tqueue); + return; +} + +static _INLINE_ void transmit_chars(struct mcf_serial *info) +{ + volatile unsigned char *uartp; + +#if defined(CONFIG_LEDMAN) + ledman_cmd(LEDMAN_CMD_SET, info->line ? LEDMAN_COM2_TX : LEDMAN_COM1_TX); +#endif + + uartp = (volatile unsigned char *) info->addr; + + if (info->x_char) { + /* Send special char - probably flow control */ + uartp[MCFUART_UTB] = info->x_char; + info->x_char = 0; + info->stats.tx++; + } + + if ((info->xmit_cnt <= 0) || info->tty->stopped) { + info->imr &= ~MCFUART_UIR_TXREADY; + uartp[MCFUART_UIMR] = info->imr; + return; + } + + while (uartp[MCFUART_USR] & MCFUART_USR_TXREADY) { + uartp[MCFUART_UTB] = info->xmit_buf[info->xmit_tail++]; + info->xmit_tail = info->xmit_tail & (SERIAL_XMIT_SIZE-1); + info->stats.tx++; + if (--info->xmit_cnt <= 0) + break; + } + + if (info->xmit_cnt < WAKEUP_CHARS) + schedule_task(&info->tqueue); + return; +} + +/* + * This is the serial driver's generic interrupt routine + */ +void mcfrs_interrupt(int irq, void *dev_id, struct pt_regs *regs) +{ + struct mcf_serial *info; + unsigned char isr; + + info = &mcfrs_table[(irq - IRQBASE)]; + isr = (((volatile unsigned char *)info->addr)[MCFUART_UISR]) & info->imr; + + if (isr & MCFUART_UIR_RXREADY) + receive_chars(info, regs, isr); + if (isr & MCFUART_UIR_TXREADY) + transmit_chars(info); +#if 0 + if (isr & MCFUART_UIR_DELTABREAK) { + printk("%s(%d): delta break!\n", __FILE__, __LINE__); + receive_chars(info, regs, isr); + } +#endif + + return; +} + +/* + * ------------------------------------------------------------------- + * Here ends the serial interrupt routines. + * ------------------------------------------------------------------- + */ + +static void mcfrs_offintr(void *private) +{ + struct mcf_serial *info = (struct mcf_serial *) private; + struct tty_struct *tty; + + tty = info->tty; + if (!tty) + return; + + if (test_and_clear_bit(RS_EVENT_WRITE_WAKEUP, &info->event)) { + if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) && + tty->ldisc.write_wakeup) + (tty->ldisc.write_wakeup)(tty); + wake_up_interruptible(&tty->write_wait); + } +} + + +/* + * Change of state on a DCD line. + */ +void mcfrs_modem_change(struct mcf_serial *info, int dcd) +{ + if (info->count == 0) + return; + + if (info->flags & ASYNC_CHECK_CD) { + if (dcd) { + wake_up_interruptible(&info->open_wait); + } else if (!((info->flags & ASYNC_CALLOUT_ACTIVE) && + (info->flags & ASYNC_CALLOUT_NOHUP))) { + schedule_task(&info->tqueue_hangup); + } + } +} + + +#ifdef MCFPP_DCD0 + +unsigned short mcfrs_ppstatus; + +/* + * This subroutine is called when the RS_TIMER goes off. It is used + * to monitor the state of the DCD lines - since they have no edge + * sensors and interrupt generators. + */ +static void mcfrs_timer(void) +{ + unsigned int ppstatus, dcdval, i; + + ppstatus = mcf_getppdata() & (MCFPP_DCD0 | MCFPP_DCD1); + + if (ppstatus != mcfrs_ppstatus) { + for (i = 0; (i < 2); i++) { + dcdval = (i ? MCFPP_DCD1 : MCFPP_DCD0); + if ((ppstatus & dcdval) != (mcfrs_ppstatus & dcdval)) { + mcfrs_modem_change(&mcfrs_table[i], + ((ppstatus & dcdval) ? 0 : 1)); + } + } + } + mcfrs_ppstatus = ppstatus; + + /* Re-arm timer */ + mcfrs_timer_struct.expires = jiffies + HZ/25; + add_timer(&mcfrs_timer_struct); +} + +#endif /* MCFPP_DCD0 */ + + +/* + * This routine is called from the scheduler tqueue when the interrupt + * routine has signalled that a hangup has occurred. The path of + * hangup processing is: + * + * serial interrupt routine -> (scheduler tqueue) -> + * do_serial_hangup() -> tty->hangup() -> mcfrs_hangup() + * + */ +static void do_serial_hangup(void *private) +{ + struct mcf_serial *info = (struct mcf_serial *) private; + struct tty_struct *tty; + + tty = info->tty; + if (!tty) + return; + + tty_hangup(tty); +} + +static int startup(struct mcf_serial * info) +{ + volatile unsigned char *uartp; + unsigned long flags; + + if (info->flags & ASYNC_INITIALIZED) + return 0; + + if (!info->xmit_buf) { + info->xmit_buf = (unsigned char *) get_free_page(GFP_KERNEL); + if (!info->xmit_buf) + return -ENOMEM; + } + + local_irq_save(flags); + +#ifdef SERIAL_DEBUG_OPEN + printk("starting up ttyS%d (irq %d)...\n", info->line, info->irq); +#endif + + /* + * Reset UART, get it into known state... + */ + uartp = (volatile unsigned char *) info->addr; + uartp[MCFUART_UCR] = MCFUART_UCR_CMDRESETRX; /* reset RX */ + uartp[MCFUART_UCR] = MCFUART_UCR_CMDRESETTX; /* reset TX */ + mcfrs_setsignals(info, 1, 1); + + if (info->tty) + clear_bit(TTY_IO_ERROR, &info->tty->flags); + info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; + + /* + * and set the speed of the serial port + */ + mcfrs_change_speed(info); + + /* + * Lastly enable the UART transmitter and receiver, and + * interrupt enables. + */ + info->imr = MCFUART_UIR_RXREADY; + uartp[MCFUART_UCR] = MCFUART_UCR_RXENABLE | MCFUART_UCR_TXENABLE; + uartp[MCFUART_UIMR] = info->imr; + + info->flags |= ASYNC_INITIALIZED; + local_irq_restore(flags); + return 0; +} + +/* + * This routine will shutdown a serial port; interrupts are disabled, and + * DTR is dropped if the hangup on close termio flag is on. + */ +static void shutdown(struct mcf_serial * info) +{ + volatile unsigned char *uartp; + unsigned long flags; + + if (!(info->flags & ASYNC_INITIALIZED)) + return; + +#ifdef SERIAL_DEBUG_OPEN + printk("Shutting down serial port %d (irq %d)....\n", info->line, + info->irq); +#endif + + local_irq_save(flags); + + uartp = (volatile unsigned char *) info->addr; + uartp[MCFUART_UIMR] = 0; /* mask all interrupts */ + uartp[MCFUART_UCR] = MCFUART_UCR_CMDRESETRX; /* reset RX */ + uartp[MCFUART_UCR] = MCFUART_UCR_CMDRESETTX; /* reset TX */ + + if (!info->tty || (info->tty->termios->c_cflag & HUPCL)) + mcfrs_setsignals(info, 0, 0); + + if (info->xmit_buf) { + free_page((unsigned long) info->xmit_buf); + info->xmit_buf = 0; + } + + if (info->tty) + set_bit(TTY_IO_ERROR, &info->tty->flags); + + info->flags &= ~ASYNC_INITIALIZED; + local_irq_restore(flags); +} + + +/* + * This routine is called to set the UART divisor registers to match + * the specified baud rate for a serial port. + */ +static void mcfrs_change_speed(struct mcf_serial *info) +{ + volatile unsigned char *uartp; + unsigned int baudclk, cflag; + unsigned long flags; + unsigned char mr1, mr2; + int i; + + if (!info->tty || !info->tty->termios) + return; + cflag = info->tty->termios->c_cflag; + if (info->addr == 0) + return; + +#if 0 + printk("%s(%d): mcfrs_change_speed()\n", __FILE__, __LINE__); +#endif + + i = cflag & CBAUD; + if (i & CBAUDEX) { + i &= ~CBAUDEX; + if (i < 1 || i > 4) + info->tty->termios->c_cflag &= ~CBAUDEX; + else + i += 15; + } + if (i == 0) { + mcfrs_setsignals(info, 0, -1); + return; + } + baudclk = ((MCF_BUSCLK / mcfrs_baud_table[i]) + 16) / 32; + info->baud = mcfrs_baud_table[i]; + + mr1 = MCFUART_MR1_RXIRQRDY | MCFUART_MR1_RXERRCHAR; + mr2 = 0; + + switch (cflag & CSIZE) { + case CS5: mr1 |= MCFUART_MR1_CS5; break; + case CS6: mr1 |= MCFUART_MR1_CS6; break; + case CS7: mr1 |= MCFUART_MR1_CS7; break; + case CS8: + default: mr1 |= MCFUART_MR1_CS8; break; + } + + if (cflag & PARENB) { + if (cflag & PARODD) + mr1 |= MCFUART_MR1_PARITYODD; + else + mr1 |= MCFUART_MR1_PARITYEVEN; + } else { + mr1 |= MCFUART_MR1_PARITYNONE; + } + + if (cflag & CSTOPB) + mr2 |= MCFUART_MR2_STOP2; + else + mr2 |= MCFUART_MR2_STOP1; + + if (cflag & CRTSCTS) { + mr1 |= MCFUART_MR1_RXRTS; + mr2 |= MCFUART_MR2_TXCTS; + } + + if (cflag & CLOCAL) + info->flags &= ~ASYNC_CHECK_CD; + else + info->flags |= ASYNC_CHECK_CD; + + uartp = (volatile unsigned char *) info->addr; + + local_irq_save(flags); +#if 0 + printk("%s(%d): mr1=%x mr2=%x baudclk=%x\n", __FILE__, __LINE__, + mr1, mr2, baudclk); +#endif + /* + Note: pg 12-16 of MCF5206e User's Manual states that a + software reset should be performed prior to changing + UMR1,2, UCSR, UACR, bit 7 + */ + uartp[MCFUART_UCR] = MCFUART_UCR_CMDRESETRX; /* reset RX */ + uartp[MCFUART_UCR] = MCFUART_UCR_CMDRESETTX; /* reset TX */ + uartp[MCFUART_UCR] = MCFUART_UCR_CMDRESETMRPTR; /* reset MR pointer */ + uartp[MCFUART_UMR] = mr1; + uartp[MCFUART_UMR] = mr2; + uartp[MCFUART_UBG1] = (baudclk & 0xff00) >> 8; /* set msb byte */ + uartp[MCFUART_UBG2] = (baudclk & 0xff); /* set lsb byte */ + uartp[MCFUART_UCSR] = MCFUART_UCSR_RXCLKTIMER | MCFUART_UCSR_TXCLKTIMER; + uartp[MCFUART_UCR] = MCFUART_UCR_RXENABLE | MCFUART_UCR_TXENABLE; + mcfrs_setsignals(info, 1, -1); + local_irq_restore(flags); + return; +} + +static void mcfrs_flush_chars(struct tty_struct *tty) +{ + volatile unsigned char *uartp; + struct mcf_serial *info = (struct mcf_serial *)tty->driver_data; + unsigned long flags; + + if (serial_paranoia_check(info, tty->device, "mcfrs_flush_chars")) + return; + + if (info->xmit_cnt <= 0 || tty->stopped || tty->hw_stopped || + !info->xmit_buf) + return; + + /* Enable transmitter */ + local_irq_save(flags); + uartp = (volatile unsigned char *) info->addr; + info->imr |= MCFUART_UIR_TXREADY; + uartp[MCFUART_UIMR] = info->imr; + local_irq_restore(flags); +} + +static int mcfrs_write(struct tty_struct * tty, int from_user, + const unsigned char *buf, int count) +{ + volatile unsigned char *uartp; + struct mcf_serial *info = (struct mcf_serial *)tty->driver_data; + unsigned long flags; + int c, total = 0; + +#if 0 + printk("%s(%d): mcfrs_write(tty=%x,from_user=%d,buf=%x,count=%d)\n", + __FILE__, __LINE__, tty, from_user, buf, count); +#endif + + if (serial_paranoia_check(info, tty->device, "mcfrs_write")) + return 0; + + if (!tty || !info->xmit_buf) + return 0; + + local_save_flags(flags); + while (1) { + local_irq_disable(); + c = min(count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1, + SERIAL_XMIT_SIZE - info->xmit_head)); + + if (c <= 0) { + local_irq_restore(flags); + break; + } + + if (from_user) { + down(&mcfrs_tmp_buf_sem); + copy_from_user(mcfrs_tmp_buf, buf, c); + local_irq_restore(flags); + local_irq_disable(); + c = min(c, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1, + SERIAL_XMIT_SIZE - info->xmit_head)); + memcpy(info->xmit_buf + info->xmit_head, mcfrs_tmp_buf, c); + up(&mcfrs_tmp_buf_sem); + } else + memcpy(info->xmit_buf + info->xmit_head, buf, c); + + info->xmit_head = (info->xmit_head + c) & (SERIAL_XMIT_SIZE-1); + info->xmit_cnt += c; + local_irq_restore(flags); + + buf += c; + count -= c; + total += c; + } + + local_irq_disable(); + uartp = (volatile unsigned char *) info->addr; + info->imr |= MCFUART_UIR_TXREADY; + uartp[MCFUART_UIMR] = info->imr; + local_irq_restore(flags); + + return total; +} + +static int mcfrs_write_room(struct tty_struct *tty) +{ + struct mcf_serial *info = (struct mcf_serial *)tty->driver_data; + int ret; + + if (serial_paranoia_check(info, tty->device, "mcfrs_write_room")) + return 0; + ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1; + if (ret < 0) + ret = 0; + return ret; +} + +static int mcfrs_chars_in_buffer(struct tty_struct *tty) +{ + struct mcf_serial *info = (struct mcf_serial *)tty->driver_data; + + if (serial_paranoia_check(info, tty->device, "mcfrs_chars_in_buffer")) + return 0; + return info->xmit_cnt; +} + +static void mcfrs_flush_buffer(struct tty_struct *tty) +{ + struct mcf_serial *info = (struct mcf_serial *)tty->driver_data; + unsigned long flags; + + if (serial_paranoia_check(info, tty->device, "mcfrs_flush_buffer")) + return; + + local_irq_save(flags); + info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; + local_irq_restore(flags); + + wake_up_interruptible(&tty->write_wait); + if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) && + tty->ldisc.write_wakeup) + (tty->ldisc.write_wakeup)(tty); +} + +/* + * ------------------------------------------------------------ + * mcfrs_throttle() + * + * This routine is called by the upper-layer tty layer to signal that + * incoming characters should be throttled. + * ------------------------------------------------------------ + */ +static void mcfrs_throttle(struct tty_struct * tty) +{ + struct mcf_serial *info = (struct mcf_serial *)tty->driver_data; +#ifdef SERIAL_DEBUG_THROTTLE + char buf[64]; + + printk("throttle %s: %d....\n", _tty_name(tty, buf), + tty->ldisc.chars_in_buffer(tty)); +#endif + + if (serial_paranoia_check(info, tty->device, "mcfrs_throttle")) + return; + + if (I_IXOFF(tty)) + info->x_char = STOP_CHAR(tty); + + /* Turn off RTS line (do this atomic) */ +} + +static void mcfrs_unthrottle(struct tty_struct * tty) +{ + struct mcf_serial *info = (struct mcf_serial *)tty->driver_data; +#ifdef SERIAL_DEBUG_THROTTLE + char buf[64]; + + printk("unthrottle %s: %d....\n", _tty_name(tty, buf), + tty->ldisc.chars_in_buffer(tty)); +#endif + + if (serial_paranoia_check(info, tty->device, "mcfrs_unthrottle")) + return; + + if (I_IXOFF(tty)) { + if (info->x_char) + info->x_char = 0; + else + info->x_char = START_CHAR(tty); + } + + /* Assert RTS line (do this atomic) */ +} + +/* + * ------------------------------------------------------------ + * mcfrs_ioctl() and friends + * ------------------------------------------------------------ + */ + +static int get_serial_info(struct mcf_serial * info, + struct serial_struct * retinfo) +{ + struct serial_struct tmp; + + if (!retinfo) + return -EFAULT; + memset(&tmp, 0, sizeof(tmp)); + tmp.type = info->type; + tmp.line = info->line; + tmp.port = info->addr; + tmp.irq = info->irq; + tmp.flags = info->flags; + tmp.baud_base = info->baud_base; + tmp.close_delay = info->close_delay; + tmp.closing_wait = info->closing_wait; + tmp.custom_divisor = info->custom_divisor; + copy_to_user(retinfo,&tmp,sizeof(*retinfo)); + return 0; +} + +static int set_serial_info(struct mcf_serial * info, + struct serial_struct * new_info) +{ + struct serial_struct new_serial; + struct mcf_serial old_info; + int retval = 0; + + if (!new_info) + return -EFAULT; + copy_from_user(&new_serial,new_info,sizeof(new_serial)); + old_info = *info; + + if (!capable(CAP_SYS_ADMIN)) { + if ((new_serial.baud_base != info->baud_base) || + (new_serial.type != info->type) || + (new_serial.close_delay != info->close_delay) || + ((new_serial.flags & ~ASYNC_USR_MASK) != + (info->flags & ~ASYNC_USR_MASK))) + return -EPERM; + info->flags = ((info->flags & ~ASYNC_USR_MASK) | + (new_serial.flags & ASYNC_USR_MASK)); + info->custom_divisor = new_serial.custom_divisor; + goto check_and_exit; + } + + if (info->count > 1) + return -EBUSY; + + /* + * OK, past this point, all the error checking has been done. + * At this point, we start making changes..... + */ + + info->baud_base = new_serial.baud_base; + info->flags = ((info->flags & ~ASYNC_FLAGS) | + (new_serial.flags & ASYNC_FLAGS)); + info->type = new_serial.type; + info->close_delay = new_serial.close_delay; + info->closing_wait = new_serial.closing_wait; + +check_and_exit: + retval = startup(info); + return retval; +} + +/* + * get_lsr_info - get line status register info + * + * Purpose: Let user call ioctl() to get info when the UART physically + * is emptied. On bus types like RS485, the transmitter must + * release the bus after transmitting. This must be done when + * the transmit shift register is empty, not be done when the + * transmit holding register is empty. This functionality + * allows an RS485 driver to be written in user space. + */ +static int get_lsr_info(struct mcf_serial * info, unsigned int *value) +{ + volatile unsigned char *uartp; + unsigned long flags; + unsigned char status; + + local_irq_save(flags); + uartp = (volatile unsigned char *) info->addr; + status = (uartp[MCFUART_USR] & MCFUART_USR_TXEMPTY) ? TIOCSER_TEMT : 0; + local_irq_restore(flags); + + put_user(status,value); + return 0; +} + +/* + * This routine sends a break character out the serial port. + */ +static void send_break( struct mcf_serial * info, int duration) +{ + volatile unsigned char *uartp; + unsigned long flags; + + if (!info->addr) + return; + current->state = TASK_INTERRUPTIBLE; + uartp = (volatile unsigned char *) info->addr; + + local_irq_save(flags); + uartp[MCFUART_UCR] = MCFUART_UCR_CMDBREAKSTART; + schedule_timeout(jiffies + duration); + uartp[MCFUART_UCR] = MCFUART_UCR_CMDBREAKSTOP; + local_irq_restore(flags); +} + +static int mcfrs_ioctl(struct tty_struct *tty, struct file * file, + unsigned int cmd, unsigned long arg) +{ + struct mcf_serial * info = (struct mcf_serial *)tty->driver_data; + unsigned int val; + int retval, error; + int dtr, rts; + + if (serial_paranoia_check(info, tty->device, "mcfrs_ioctl")) + return -ENODEV; + + if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) && + (cmd != TIOCSERCONFIG) && (cmd != TIOCSERGWILD) && + (cmd != TIOCSERSWILD) && (cmd != TIOCSERGSTRUCT)) { + if (tty->flags & (1 << TTY_IO_ERROR)) + return -EIO; + } + + switch (cmd) { + case TCSBRK: /* SVID version: non-zero arg --> no break */ + retval = tty_check_change(tty); + if (retval) + return retval; + tty_wait_until_sent(tty, 0); + if (!arg) + send_break(info, HZ/4); /* 1/4 second */ + return 0; + case TCSBRKP: /* support for POSIX tcsendbreak() */ + retval = tty_check_change(tty); + if (retval) + return retval; + tty_wait_until_sent(tty, 0); + send_break(info, arg ? arg*(HZ/10) : HZ/4); + return 0; + case TIOCGSOFTCAR: + error = verify_area(VERIFY_WRITE, (void *) arg,sizeof(long)); + if (error) + return error; + put_user(C_CLOCAL(tty) ? 1 : 0, + (unsigned long *) arg); + return 0; + case TIOCSSOFTCAR: + get_user(arg, (unsigned long *) arg); + tty->termios->c_cflag = + ((tty->termios->c_cflag & ~CLOCAL) | + (arg ? CLOCAL : 0)); + return 0; + case TIOCGSERIAL: + error = verify_area(VERIFY_WRITE, (void *) arg, + sizeof(struct serial_struct)); + if (error) + return error; + return get_serial_info(info, + (struct serial_struct *) arg); + case TIOCSSERIAL: + return set_serial_info(info, + (struct serial_struct *) arg); + case TIOCSERGETLSR: /* Get line status register */ + error = verify_area(VERIFY_WRITE, (void *) arg, + sizeof(unsigned int)); + if (error) + return error; + else + return get_lsr_info(info, (unsigned int *) arg); + + case TIOCSERGSTRUCT: + error = verify_area(VERIFY_WRITE, (void *) arg, + sizeof(struct mcf_serial)); + if (error) + return error; + copy_to_user((struct mcf_serial *) arg, + info, sizeof(struct mcf_serial)); + return 0; + + case TIOCMGET: + if ((error = verify_area(VERIFY_WRITE, (void *) arg, + sizeof(unsigned int)))) + return(error); + val = mcfrs_getsignals(info); + put_user(val, (unsigned int *) arg); + break; + + case TIOCMBIS: + if ((error = verify_area(VERIFY_WRITE, (void *) arg, + sizeof(unsigned int)))) + return(error); + + get_user(val, (unsigned int *) arg); + rts = (val & TIOCM_RTS) ? 1 : -1; + dtr = (val & TIOCM_DTR) ? 1 : -1; + mcfrs_setsignals(info, dtr, rts); + break; + + case TIOCMBIC: + if ((error = verify_area(VERIFY_WRITE, (void *) arg, + sizeof(unsigned int)))) + return(error); + get_user(val, (unsigned int *) arg); + rts = (val & TIOCM_RTS) ? 0 : -1; + dtr = (val & TIOCM_DTR) ? 0 : -1; + mcfrs_setsignals(info, dtr, rts); + break; + + case TIOCMSET: + if ((error = verify_area(VERIFY_WRITE, (void *) arg, + sizeof(unsigned int)))) + return(error); + get_user(val, (unsigned int *) arg); + rts = (val & TIOCM_RTS) ? 1 : 0; + dtr = (val & TIOCM_DTR) ? 1 : 0; + mcfrs_setsignals(info, dtr, rts); + break; + +#ifdef TIOCSET422 + case TIOCSET422: + get_user(val, (unsigned int *) arg); + mcf_setpa(MCFPP_PA11, (val ? 0 : MCFPP_PA11)); + break; + case TIOCGET422: + val = (mcf_getpa() & MCFPP_PA11) ? 0 : 1; + put_user(val, (unsigned int *) arg); + break; +#endif + + default: + return -ENOIOCTLCMD; + } + return 0; +} + +static void mcfrs_set_termios(struct tty_struct *tty, struct termios *old_termios) +{ + struct mcf_serial *info = (struct mcf_serial *)tty->driver_data; + + if (tty->termios->c_cflag == old_termios->c_cflag) + return; + + mcfrs_change_speed(info); + + if ((old_termios->c_cflag & CRTSCTS) && + !(tty->termios->c_cflag & CRTSCTS)) { + tty->hw_stopped = 0; + mcfrs_setsignals(info, -1, 1); +#if 0 + mcfrs_start(tty); +#endif + } +} + +/* + * ------------------------------------------------------------ + * mcfrs_close() + * + * This routine is called when the serial port gets closed. First, we + * wait for the last remaining data to be sent. Then, we unlink its + * S structure from the interrupt chain if necessary, and we free + * that IRQ if nothing is left in the chain. + * ------------------------------------------------------------ + */ +static void mcfrs_close(struct tty_struct *tty, struct file * filp) +{ + volatile unsigned char *uartp; + struct mcf_serial *info = (struct mcf_serial *)tty->driver_data; + unsigned long flags; + + if (!info || serial_paranoia_check(info, tty->device, "mcfrs_close")) + return; + + local_irq_save(flags); + + if (tty_hung_up_p(filp)) { + local_irq_restore(flags); + return; + } + +#ifdef SERIAL_DEBUG_OPEN + printk("mcfrs_close ttyS%d, count = %d\n", info->line, info->count); +#endif + if ((tty->count == 1) && (info->count != 1)) { + /* + * Uh, oh. tty->count is 1, which means that the tty + * structure will be freed. Info->count should always + * be one in these conditions. If it's greater than + * one, we've got real problems, since it means the + * serial port won't be shutdown. + */ + printk("MCFRS: bad serial port count; tty->count is 1, " + "info->count is %d\n", info->count); + info->count = 1; + } + if (--info->count < 0) { + printk("MCFRS: bad serial port count for ttyS%d: %d\n", + info->line, info->count); + info->count = 0; + } + if (info->count) { + local_irq_restore(flags); + return; + } + info->flags |= ASYNC_CLOSING; + + /* + * Save the termios structure, since this port may have + * separate termios for callout and dialin. + */ + if (info->flags & ASYNC_NORMAL_ACTIVE) + info->normal_termios = *tty->termios; + if (info->flags & ASYNC_CALLOUT_ACTIVE) + info->callout_termios = *tty->termios; + + /* + * Now we wait for the transmit buffer to clear; and we notify + * the line discipline to only process XON/XOFF characters. + */ + tty->closing = 1; + if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE) + tty_wait_until_sent(tty, info->closing_wait); + + /* + * At this point we stop accepting input. To do this, we + * disable the receive line status interrupts, and tell the + * interrupt driver to stop checking the data ready bit in the + * line status register. + */ + info->imr &= ~MCFUART_UIR_RXREADY; + uartp = (volatile unsigned char *) info->addr; + uartp[MCFUART_UIMR] = info->imr; + +#if 0 + /* FIXME: do we need to keep this enabled for console?? */ + if (mcfrs_console_inited && (mcfrs_console_port == info->line)) { + /* Do not disable the UART */ ; + } else +#endif + shutdown(info); + if (tty->driver.flush_buffer) + tty->driver.flush_buffer(tty); + if (tty->ldisc.flush_buffer) + tty->ldisc.flush_buffer(tty); + tty->closing = 0; + info->event = 0; + info->tty = 0; + if (tty->ldisc.num != ldiscs[N_TTY].num) { + if (tty->ldisc.close) + (tty->ldisc.close)(tty); + tty->ldisc = ldiscs[N_TTY]; + tty->termios->c_line = N_TTY; + if (tty->ldisc.open) + (tty->ldisc.open)(tty); + } + if (info->blocked_open) { + if (info->close_delay) { + current->state = TASK_INTERRUPTIBLE; + schedule_timeout(info->close_delay); + } + wake_up_interruptible(&info->open_wait); + } + info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CALLOUT_ACTIVE| + ASYNC_CLOSING); + wake_up_interruptible(&info->close_wait); + local_irq_restore(flags); +} + +/* + * mcfrs_hangup() --- called by tty_hangup() when a hangup is signaled. + */ +void mcfrs_hangup(struct tty_struct *tty) +{ + struct mcf_serial * info = (struct mcf_serial *)tty->driver_data; + + if (serial_paranoia_check(info, tty->device, "mcfrs_hangup")) + return; + + mcfrs_flush_buffer(tty); + shutdown(info); + info->event = 0; + info->count = 0; + info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CALLOUT_ACTIVE); + info->tty = 0; + wake_up_interruptible(&info->open_wait); +} + +/* + * ------------------------------------------------------------ + * mcfrs_open() and friends + * ------------------------------------------------------------ + */ +static int block_til_ready(struct tty_struct *tty, struct file * filp, + struct mcf_serial *info) +{ + DECLARE_WAITQUEUE(wait, current); + int retval; + int do_clocal = 0; + + /* + * If the device is in the middle of being closed, then block + * until it's done, and then try again. + */ + if (info->flags & ASYNC_CLOSING) { + interruptible_sleep_on(&info->close_wait); +#ifdef SERIAL_DO_RESTART + if (info->flags & ASYNC_HUP_NOTIFY) + return -EAGAIN; + else + return -ERESTARTSYS; +#else + return -EAGAIN; +#endif + } + + /* + * If this is a callout device, then just make sure the normal + * device isn't being used. + */ + if (tty->driver.subtype == SERIAL_TYPE_CALLOUT) { + if (info->flags & ASYNC_NORMAL_ACTIVE) + return -EBUSY; + if ((info->flags & ASYNC_CALLOUT_ACTIVE) && + (info->flags & ASYNC_SESSION_LOCKOUT) && + (info->session != current->session)) + return -EBUSY; + if ((info->flags & ASYNC_CALLOUT_ACTIVE) && + (info->flags & ASYNC_PGRP_LOCKOUT) && + (info->pgrp != current->pgrp)) + return -EBUSY; + info->flags |= ASYNC_CALLOUT_ACTIVE; + return 0; + } + + /* + * If non-blocking mode is set, or the port is not enabled, + * then make the check up front and then exit. + */ + if ((filp->f_flags & O_NONBLOCK) || + (tty->flags & (1 << TTY_IO_ERROR))) { + if (info->flags & ASYNC_CALLOUT_ACTIVE) + return -EBUSY; + info->flags |= ASYNC_NORMAL_ACTIVE; + return 0; + } + + if (info->flags & ASYNC_CALLOUT_ACTIVE) { + if (info->normal_termios.c_cflag & CLOCAL) + do_clocal = 1; + } else { + if (tty->termios->c_cflag & CLOCAL) + do_clocal = 1; + } + + /* + * Block waiting for the carrier detect and the line to become + * free (i.e., not in use by the callout). While we are in + * this loop, info->count is dropped by one, so that + * mcfrs_close() knows when to free things. We restore it upon + * exit, either normal or abnormal. + */ + retval = 0; + add_wait_queue(&info->open_wait, &wait); +#ifdef SERIAL_DEBUG_OPEN + printk("block_til_ready before block: ttyS%d, count = %d\n", + info->line, info->count); +#endif + info->count--; + info->blocked_open++; + while (1) { + local_irq_disable(); + if (!(info->flags & ASYNC_CALLOUT_ACTIVE)) + mcfrs_setsignals(info, 1, 1); + local_irq_enable(); + current->state = TASK_INTERRUPTIBLE; + if (tty_hung_up_p(filp) || + !(info->flags & ASYNC_INITIALIZED)) { +#ifdef SERIAL_DO_RESTART + if (info->flags & ASYNC_HUP_NOTIFY) + retval = -EAGAIN; + else + retval = -ERESTARTSYS; +#else + retval = -EAGAIN; +#endif + break; + } + if (!(info->flags & ASYNC_CALLOUT_ACTIVE) && + !(info->flags & ASYNC_CLOSING) && + (do_clocal || (mcfrs_getsignals(info) & TIOCM_CD))) + break; + if (signal_pending(current)) { + retval = -ERESTARTSYS; + break; + } +#ifdef SERIAL_DEBUG_OPEN + printk("block_til_ready blocking: ttyS%d, count = %d\n", + info->line, info->count); +#endif + schedule(); + } + current->state = TASK_RUNNING; + remove_wait_queue(&info->open_wait, &wait); + if (!tty_hung_up_p(filp)) + info->count++; + info->blocked_open--; +#ifdef SERIAL_DEBUG_OPEN + printk("block_til_ready after blocking: ttyS%d, count = %d\n", + info->line, info->count); +#endif + if (retval) + return retval; + info->flags |= ASYNC_NORMAL_ACTIVE; + return 0; +} + +/* + * This routine is called whenever a serial port is opened. It + * enables interrupts for a serial port, linking in its structure into + * the IRQ chain. It also performs the serial-specific + * initialization for the tty structure. + */ +int mcfrs_open(struct tty_struct *tty, struct file * filp) +{ + struct mcf_serial *info; + int retval, line; + + line = minor(tty->device) - tty->driver.minor_start; + if ((line < 0) || (line >= NR_PORTS)) + return -ENODEV; + info = mcfrs_table + line; + if (serial_paranoia_check(info, tty->device, "mcfrs_open")) + return -ENODEV; +#ifdef SERIAL_DEBUG_OPEN + printk("mcfrs_open %s%d, count = %d\n", tty->driver.name, info->line, + info->count); +#endif + info->count++; + tty->driver_data = info; + info->tty = tty; + + /* + * Start up serial port + */ + retval = startup(info); + if (retval) + return retval; + + retval = block_til_ready(tty, filp, info); + if (retval) { +#ifdef SERIAL_DEBUG_OPEN + printk("mcfrs_open returning after block_til_ready with %d\n", + retval); +#endif + return retval; + } + + if ((info->count == 1) && (info->flags & ASYNC_SPLIT_TERMIOS)) { + if (tty->driver.subtype == SERIAL_TYPE_NORMAL) + *tty->termios = info->normal_termios; + else + *tty->termios = info->callout_termios; + mcfrs_change_speed(info); + } + + info->session = current->session; + info->pgrp = current->pgrp; + +#ifdef SERIAL_DEBUG_OPEN + printk("mcfrs_open ttyS%d successful...\n", info->line); +#endif + return 0; +} + +/* + * Based on the line number set up the internal interrupt stuff. + */ +static void mcfrs_irqinit(struct mcf_serial *info) +{ +#ifdef CONFIG_M5272 + volatile unsigned long *icrp; + volatile unsigned long *portp; + volatile unsigned char *uartp; + + uartp = (volatile unsigned char *) info->addr; + icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR2); + + switch (info->line) { + case 0: + *icrp = 0xe0000000; + break; + case 1: + *icrp = 0x0e000000; + break; + default: + printk("MCFRS: don't know how to handle UART %d interrupt?\n", + info->line); + return; + } + + /* Enable the output lines for the serial ports */ + portp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_PBCNT); + *portp = (*portp & ~0x000000ff) | 0x00000055; + portp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_PDCNT); + *portp = (*portp & ~0x000003fc) | 0x000002a8; +#else + volatile unsigned char *icrp, *uartp; + + switch (info->line) { + case 0: + icrp = (volatile unsigned char *) (MCF_MBAR + MCFSIM_UART1ICR); + *icrp = /*MCFSIM_ICR_AUTOVEC |*/ MCFSIM_ICR_LEVEL6 | + MCFSIM_ICR_PRI1; + mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART1); + break; + case 1: + icrp = (volatile unsigned char *) (MCF_MBAR + MCFSIM_UART2ICR); + *icrp = /*MCFSIM_ICR_AUTOVEC |*/ MCFSIM_ICR_LEVEL6 | + MCFSIM_ICR_PRI2; + mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART2); + break; + default: + printk("MCFRS: don't know how to handle UART %d interrupt?\n", + info->line); + return; + } + + uartp = (volatile unsigned char *) info->addr; + uartp[MCFUART_UIVR] = info->irq; +#endif + + /* Clear mask, so no surprise interrupts. */ + uartp[MCFUART_UIMR] = 0; + + if (request_irq(info->irq, mcfrs_interrupt, SA_INTERRUPT, + "ColdFire UART", NULL)) { + printk("MCFRS: Unable to attach ColdFire UART %d interrupt " + "vector=%d\n", info->line, info->irq); + } + + return; +} + + +char *mcfrs_drivername = "ColdFire internal UART serial driver version 1.00\n"; + + +/* + * Serial stats reporting... + */ +int mcfrs_readproc(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + struct mcf_serial *info; + char str[20]; + int len, sigs, i; + + len = sprintf(page, mcfrs_drivername); + for (i = 0; (i < NR_PORTS); i++) { + info = &mcfrs_table[i]; + len += sprintf((page + len), "%d: port:%x irq=%d baud:%d ", + i, info->addr, info->irq, info->baud); + if (info->stats.rx || info->stats.tx) + len += sprintf((page + len), "tx:%d rx:%d ", + info->stats.tx, info->stats.rx); + if (info->stats.rxframing) + len += sprintf((page + len), "fe:%d ", + info->stats.rxframing); + if (info->stats.rxparity) + len += sprintf((page + len), "pe:%d ", + info->stats.rxparity); + if (info->stats.rxbreak) + len += sprintf((page + len), "brk:%d ", + info->stats.rxbreak); + if (info->stats.rxoverrun) + len += sprintf((page + len), "oe:%d ", + info->stats.rxoverrun); + + str[0] = str[1] = 0; + if ((sigs = mcfrs_getsignals(info))) { + if (sigs & TIOCM_RTS) + strcat(str, "|RTS"); + if (sigs & TIOCM_CTS) + strcat(str, "|CTS"); + if (sigs & TIOCM_DTR) + strcat(str, "|DTR"); + if (sigs & TIOCM_CD) + strcat(str, "|CD"); + } + + len += sprintf((page + len), "%s\n", &str[1]); + } + + return(len); +} + + +/* Finally, routines used to initialize the serial driver. */ + +static void show_serial_version(void) +{ + printk(mcfrs_drivername); +} + +/* mcfrs_init inits the driver */ +static int __init +mcfrs_init(void) +{ + struct mcf_serial *info; + unsigned long flags; + int i; + + /* Setup base handler, and timer table. */ +#ifdef MCFPP_DCD0 + init_timer(&mcfrs_timer_struct); + mcfrs_timer_struct.function = mcfrs_timer; + mcfrs_timer_struct.data = 0; + mcfrs_timer_struct.expires = jiffies + HZ/25; + add_timer(&mcfrs_timer_struct); + mcfrs_ppstatus = mcf_getppdata() & (MCFPP_DCD0 | MCFPP_DCD1); +#endif + + show_serial_version(); + + /* Initialize the tty_driver structure */ + memset(&mcfrs_serial_driver, 0, sizeof(struct tty_driver)); + mcfrs_serial_driver.magic = TTY_DRIVER_MAGIC; + mcfrs_serial_driver.name = "ttyS"; + mcfrs_serial_driver.major = TTY_MAJOR; + mcfrs_serial_driver.minor_start = 64; + mcfrs_serial_driver.num = NR_PORTS; + mcfrs_serial_driver.type = TTY_DRIVER_TYPE_SERIAL; + mcfrs_serial_driver.subtype = SERIAL_TYPE_NORMAL; + mcfrs_serial_driver.init_termios = tty_std_termios; + + mcfrs_serial_driver.init_termios.c_cflag = + mcfrs_console_cbaud | CS8 | CREAD | HUPCL | CLOCAL; + mcfrs_serial_driver.flags = TTY_DRIVER_REAL_RAW; + mcfrs_serial_driver.refcount = &mcfrs_serial_refcount; + mcfrs_serial_driver.table = mcfrs_serial_table; + mcfrs_serial_driver.termios = mcfrs_serial_termios; + mcfrs_serial_driver.termios_locked = mcfrs_serial_termios_locked; + + mcfrs_serial_driver.open = mcfrs_open; + mcfrs_serial_driver.close = mcfrs_close; + mcfrs_serial_driver.write = mcfrs_write; + mcfrs_serial_driver.flush_chars = mcfrs_flush_chars; + mcfrs_serial_driver.write_room = mcfrs_write_room; + mcfrs_serial_driver.chars_in_buffer = mcfrs_chars_in_buffer; + mcfrs_serial_driver.flush_buffer = mcfrs_flush_buffer; + mcfrs_serial_driver.ioctl = mcfrs_ioctl; + mcfrs_serial_driver.throttle = mcfrs_throttle; + mcfrs_serial_driver.unthrottle = mcfrs_unthrottle; + mcfrs_serial_driver.set_termios = mcfrs_set_termios; + mcfrs_serial_driver.stop = mcfrs_stop; + mcfrs_serial_driver.start = mcfrs_start; + mcfrs_serial_driver.hangup = mcfrs_hangup; + mcfrs_serial_driver.read_proc = mcfrs_readproc; + mcfrs_serial_driver.driver_name = "serial"; + + /* + * The callout device is just like normal device except for + * major number and the subtype code. + */ + mcfrs_callout_driver = mcfrs_serial_driver; + mcfrs_callout_driver.name = "cua"; + mcfrs_callout_driver.major = TTYAUX_MAJOR; + mcfrs_callout_driver.subtype = SERIAL_TYPE_CALLOUT; + mcfrs_callout_driver.read_proc = 0; + mcfrs_callout_driver.proc_entry = 0; + + if (tty_register_driver(&mcfrs_serial_driver)) { + printk("MCFRS: Couldn't register serial driver\n"); + return(-EBUSY); + } + if (tty_register_driver(&mcfrs_callout_driver)) { + printk("MCFRS: Couldn't register callout driver\n"); + return(-EBUSY); + } + + local_irq_save(flags); + + /* + * Configure all the attached serial ports. + */ + for (i = 0, info = mcfrs_table; (i < NR_PORTS); i++, info++) { + info->magic = SERIAL_MAGIC; + info->line = i; + info->tty = 0; + info->custom_divisor = 16; + info->close_delay = 50; + info->closing_wait = 3000; + info->x_char = 0; + info->event = 0; + info->count = 0; + info->blocked_open = 0; + INIT_TQUEUE(&info->tqueue, mcfrs_offintr, info); + INIT_TQUEUE(&info->tqueue_hangup, do_serial_hangup, info); + info->callout_termios = mcfrs_callout_driver.init_termios; + info->normal_termios = mcfrs_serial_driver.init_termios; + init_waitqueue_head(&info->open_wait); + init_waitqueue_head(&info->close_wait); + + info->imr = 0; + mcfrs_setsignals(info, 0, 0); + mcfrs_irqinit(info); + + printk("%s%d at 0x%04x (irq = %d)", mcfrs_serial_driver.name, + info->line, info->addr, info->irq); + printk(" is a builtin ColdFire UART\n"); + } + + local_irq_restore(flags); + return 0; +} + +module_init(mcfrs_init); +/* DAVIDM module_exit(mcfrs_fini); */ + +/****************************************************************************/ +/* Serial Console */ +/****************************************************************************/ + +/* + * Quick and dirty UART initialization, for console output. + */ + +void mcfrs_init_console(void) +{ + volatile unsigned char *uartp; + unsigned int clk; + + /* + * Reset UART, get it into known state... + */ + uartp = (volatile unsigned char *) (MCF_MBAR + + (mcfrs_console_port ? MCFUART_BASE2 : MCFUART_BASE1)); + + uartp[MCFUART_UCR] = MCFUART_UCR_CMDRESETRX; /* reset RX */ + uartp[MCFUART_UCR] = MCFUART_UCR_CMDRESETTX; /* reset TX */ + uartp[MCFUART_UCR] = MCFUART_UCR_CMDRESETMRPTR; /* reset MR pointer */ + + /* + * Set port for defined baud , 8 data bits, 1 stop bit, no parity. + */ + uartp[MCFUART_UMR] = MCFUART_MR1_PARITYNONE | MCFUART_MR1_CS8; + uartp[MCFUART_UMR] = MCFUART_MR2_STOP1; + + clk = ((MCF_BUSCLK / mcfrs_console_baud) + 16) / 32; /* set baud */ + uartp[MCFUART_UBG1] = (clk & 0xff00) >> 8; /* set msb baud */ + uartp[MCFUART_UBG2] = (clk & 0xff); /* set lsb baud */ + + uartp[MCFUART_UCSR] = MCFUART_UCSR_RXCLKTIMER | MCFUART_UCSR_TXCLKTIMER; + uartp[MCFUART_UCR] = MCFUART_UCR_RXENABLE | MCFUART_UCR_TXENABLE; + + mcfrs_console_inited++; + return; +} + + +/* + * Setup for console. Argument comes from the boot command line. + */ + +int mcfrs_console_setup(struct console *cp, char *arg) +{ + int i, n = CONSOLE_BAUD_RATE; + + if (!cp) + return(-1); + + if (!strncmp(cp->name, "ttyS", 4)) + mcfrs_console_port = cp->index; + else if (!strncmp(cp->name, "cua", 3)) + mcfrs_console_port = cp->index; + else + return(-1); + + if (arg) + n = simple_strtoul(arg,NULL,0); + for (i = 0; i < MCFRS_BAUD_TABLE_SIZE; i++) + if (mcfrs_baud_table[i] == n) + break; + if (i < MCFRS_BAUD_TABLE_SIZE) { + mcfrs_console_baud = n; + mcfrs_console_cbaud = 0; + if (i > 15) { + mcfrs_console_cbaud |= CBAUDEX; + i -= 15; + } + mcfrs_console_cbaud |= i; + } + mcfrs_init_console(); /* make sure baud rate changes */ + return(0); +} + + +static kdev_t mcfrs_console_device(struct console *c) +{ + return mk_kdev(TTY_MAJOR, 64 + c->index); +} + + +/* + * Output a single character, using UART polled mode. + * This is used for console output. + */ + +void mcfrs_put_char(char ch) +{ + volatile unsigned char *uartp; + unsigned long flags; + int i; + + uartp = (volatile unsigned char *) (MCF_MBAR + + (mcfrs_console_port ? MCFUART_BASE2 : MCFUART_BASE1)); + + local_irq_save(flags); + for (i = 0; (i < 0x10000); i++) { + if (uartp[MCFUART_USR] & MCFUART_USR_TXREADY) + break; + } + if (i < 0x10000) { + uartp[MCFUART_UTB] = ch; + for (i = 0; (i < 0x10000); i++) + if (uartp[MCFUART_USR] & MCFUART_USR_TXEMPTY) + break; + } + if (i >= 0x10000) + mcfrs_init_console(); /* try and get it back */ + local_irq_restore(flags); + + return; +} + + +/* + * rs_console_write is registered for printk output. + */ + +void mcfrs_console_write(struct console *cp, const char *p, unsigned len) +{ + if (!mcfrs_console_inited) + mcfrs_init_console(); + while (len-- > 0) { + if (*p == '\n') + mcfrs_put_char('\r'); + mcfrs_put_char(*p++); + } +} + +/* + * declare our consoles + */ + +struct console mcfrs_console = { + name: "ttyS", + write: mcfrs_console_write, + device: mcfrs_console_device, + setup: mcfrs_console_setup, + flags: CON_PRINTBUFFER, + index: -1, +}; + +void __init mcfrs_console_init(void) +{ + register_console(&mcfrs_console); +} + +/****************************************************************************/ diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/serial/mcfserial.h linux.2.5.40-ac2/drivers/serial/mcfserial.h --- linux.2.5.40/drivers/serial/mcfserial.h 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/drivers/serial/mcfserial.h 2002-10-02 21:55:06.000000000 +0100 @@ -0,0 +1,84 @@ +/* + * mcfserial.c -- serial driver for ColdFire internal UARTS. + * + * Copyright (c) 1999 Greg Ungerer + * Copyright (c) 2000-2001 Lineo, Inc. + * Copyright (c) 2002 SnapGear Inc., + * + * Based on code from 68332serial.c which was: + * + * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) + * Copyright (C) 1998 TSHG + * Copyright (c) 1999 Rt-Control Inc. + */ +#ifndef _MCF_SERIAL_H +#define _MCF_SERIAL_H + +#include +#include + +#ifdef __KERNEL__ + +/* + * Define a local serial stats structure. + */ + +struct mcf_stats { + unsigned int rx; + unsigned int tx; + unsigned int rxbreak; + unsigned int rxframing; + unsigned int rxparity; + unsigned int rxoverrun; +}; + + +/* + * This is our internal structure for each serial port's state. + * Each serial port has one of these structures associated with it. + */ + +struct mcf_serial { + int magic; + unsigned int addr; /* UART memory address */ + int irq; + int flags; /* defined in tty.h */ + int type; /* UART type */ + struct tty_struct *tty; + unsigned char imr; /* Software imr register */ + unsigned int baud; + int sigs; + int custom_divisor; + int x_char; /* xon/xoff character */ + int baud_base; + int close_delay; + unsigned short closing_wait; + unsigned short closing_wait2; + unsigned long event; + int line; + int count; /* # of fd on device */ + int blocked_open; /* # of blocked opens */ + long session; /* Session of opening process */ + long pgrp; /* pgrp of opening process */ + unsigned char *xmit_buf; + int xmit_head; + int xmit_tail; + int xmit_cnt; + struct mcf_stats stats; + struct tq_struct tqueue; + struct tq_struct tqueue_hangup; + struct termios normal_termios; + struct termios callout_termios; +#if LINUX_VERSION_CODE <= 0x020100 + struct wait_queue *open_wait; + struct wait_queue *close_wait; +#else + wait_queue_head_t open_wait; + wait_queue_head_t close_wait; +#endif + +}; + +#endif /* __KERNEL__ */ + +#endif /* _MCF_SERIAL_H */ diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/serial/nb85e_uart.c linux.2.5.40-ac2/drivers/serial/nb85e_uart.c --- linux.2.5.40/drivers/serial/nb85e_uart.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/drivers/serial/nb85e_uart.c 2002-10-02 21:55:06.000000000 +0100 @@ -0,0 +1,575 @@ +/* + * drivers/serial/nb85e_uart.c -- Serial I/O using V850E/NB85E on-chip UART + * + * Copyright (C) 2001,02 NEC Corporation + * Copyright (C) 2001,02 Miles Bader + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file COPYING in the main directory of this + * archive for more details. + * + * Written by Miles Bader + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +/* Initial UART state. */ +#define NB85E_UART_INIT_BAUD 38400 +#define NB85E_UART_INIT_CFLAGS (B38400 | CS8 | CREAD) + + +/* Low-level UART functions. */ + +/* These masks define which control bits affect TX/RX modes, respectively. */ +#define RX_BITS \ + (NB85E_UART_ASIM_PS_MASK | NB85E_UART_ASIM_CL_8 | NB85E_UART_ASIM_ISRM) +#define TX_BITS \ + (NB85E_UART_ASIM_PS_MASK | NB85E_UART_ASIM_CL_8 | NB85E_UART_ASIM_SL_2) + +/* The UART require various delays after writing control registers. */ +static inline void nb85e_uart_delay (unsigned cycles) +{ + /* The loop takes 2 insns, so loop CYCLES / 2 times. */ + register unsigned count = cycles >> 1; + while (--count != 0) + /* nothing */; +} + +/* Configure and turn on uart channel CHAN, using the termios `control + modes' bits in CFLAGS, and a baud-rate of BAUD. */ +void nb85e_uart_configure (unsigned chan, unsigned cflags, unsigned baud) +{ + int cksr_min, flags; + unsigned new_config = 0; /* What we'll write to the control reg. */ + unsigned new_clk_divlog2; /* New baud-rate generate clock divider. */ + unsigned new_brgen_count; /* New counter max for baud-rate generator.*/ + /* These are the current values corresponding to the above. */ + unsigned old_config, old_clk_divlog2, old_brgen_count; + + /* Calculate new baud-rate generator config values. */ + cksr_min = 0; + while ((cpu_clock_freq >> cksr_min) > NB85E_UART_CKSR_MAX_FREQ) + cksr_min++; + /* Calculate the log2 clock divider and baud-rate counter values + (note that the UART divides the resulting clock by 2, so + multiply BAUD by 2 here to compensate). */ + calc_counter_params (cpu_clock_freq, baud * 2, + cksr_min, NB85E_UART_CKSR_MAX, 8/*bits*/, + &new_clk_divlog2, &new_brgen_count); + + /* Figure out new configuration of control register. */ + if (cflags & CSTOPB) + /* Number of stop bits, 1 or 2. */ + new_config |= NB85E_UART_ASIM_SL_2; + if ((cflags & CSIZE) == CS8) + /* Number of data bits, 7 or 8. */ + new_config |= NB85E_UART_ASIM_CL_8; + if (! (cflags & PARENB)) + /* No parity check/generation. */ + new_config |= NB85E_UART_ASIM_PS_NONE; + else if (cflags & PARODD) + /* Odd parity check/generation. */ + new_config |= NB85E_UART_ASIM_PS_ODD; + else + /* Even parity check/generation. */ + new_config |= NB85E_UART_ASIM_PS_EVEN; + if (cflags & CREAD) + /* Reading enabled. */ + new_config |= NB85E_UART_ASIM_RXE; + + new_config |= NB85E_UART_ASIM_TXE; /* Writing is always enabled. */ + new_config |= NB85E_UART_ASIM_CAE; + new_config |= NB85E_UART_ASIM_ISRM; /* Errors generate a read-irq. */ + + /* Disable interrupts while we're twiddling the hardware. */ + local_irq_save (flags); + +#ifdef NB85E_UART_PRE_CONFIGURE + NB85E_UART_PRE_CONFIGURE (chan, cflags, baud); +#endif + + old_config = NB85E_UART_ASIM (chan); + old_clk_divlog2 = NB85E_UART_CKSR (chan); + old_brgen_count = NB85E_UART_BRGC (chan); + + if (new_clk_divlog2 != old_clk_divlog2 + || new_brgen_count != old_brgen_count) + { + /* The baud rate has changed. First, disable the UART. */ + NB85E_UART_ASIM (chan) = 0; + old_config = 0; + /* Reprogram the baud-rate generator. */ + NB85E_UART_CKSR (chan) = new_clk_divlog2; + NB85E_UART_BRGC (chan) = new_brgen_count; + } + + if (! (old_config & NB85E_UART_ASIM_CAE)) { + /* If we are enabling the uart for the first time, start + by turning on the enable bit, which must be done + before turning on any other bits. */ + NB85E_UART_ASIM (chan) = NB85E_UART_ASIM_CAE; + /* Enabling the uart also resets it. */ + old_config = NB85E_UART_ASIM_CAE; + } + + if (new_config != old_config) { + /* Which of the TXE/RXE bits we'll temporarily turn off + before changing other control bits. */ + unsigned temp_disable = 0; + /* Which of the TXE/RXE bits will be enabled. */ + unsigned enable = 0; + unsigned changed_bits = new_config ^ old_config; + + /* Which of RX/TX will be enabled in the new configuration. */ + if (new_config & RX_BITS) + enable |= (new_config & NB85E_UART_ASIM_RXE); + if (new_config & TX_BITS) + enable |= (new_config & NB85E_UART_ASIM_TXE); + + /* Figure out which of RX/TX needs to be disabled; note + that this will only happen if they're not already + disabled. */ + if (changed_bits & RX_BITS) + temp_disable |= (old_config & NB85E_UART_ASIM_RXE); + if (changed_bits & TX_BITS) + temp_disable |= (old_config & NB85E_UART_ASIM_TXE); + + /* We have to turn off RX and/or TX mode before changing + any associated control bits. */ + if (temp_disable) + NB85E_UART_ASIM (chan) = old_config & ~temp_disable; + + /* Write the new control bits, while RX/TX are disabled. */ + if (changed_bits & ~enable) + NB85E_UART_ASIM (chan) = new_config & ~enable; + + /* The UART may not be reset properly unless we + wait at least 2 `basic-clocks' until turning + on the TXE/RXE bits again. A `basic clock' + is the clock used by the baud-rate generator, i.e., + the cpu clock divided by the 2^new_clk_divlog2. */ + nb85e_uart_delay (1 << (new_clk_divlog2 + 1)); + + /* Write the final version, with enable bits turned on. */ + NB85E_UART_ASIM (chan) = new_config; + } + + local_irq_restore (flags); +} + + +/* Low-level console. */ + +#ifdef CONFIG_V850E_NB85E_UART_CONSOLE + +static void nb85e_uart_cons_write (struct console *co, + const char *s, unsigned count) +{ + if (count > 0) { + unsigned chan = co->index; + unsigned irq = IRQ_INTST (chan); + int irq_was_enabled, irq_was_pending, flags; + + /* We don't want to get `transmission completed' (INTST) + interrupts, since we're busy-waiting, so we disable + them while sending (we don't disable interrupts + entirely because sending over a serial line is really + slow). We save the status of INTST and restore it + when we're done so that using printk doesn't + interfere with normal serial transmission (other than + interleaving the output, of course!). This should + work correctly even if this function is interrupted + and the interrupt printks something. */ + + /* Disable interrupts while fiddling with INTST. */ + local_irq_save (flags); + /* Get current INTST status. */ + irq_was_enabled = nb85e_intc_irq_enabled (irq); + irq_was_pending = nb85e_intc_irq_pending (irq); + /* Disable INTST if necessary. */ + if (irq_was_enabled) + nb85e_intc_disable_irq (irq); + /* Turn interrupts back on. */ + local_irq_restore (flags); + + /* Send characters. */ + while (count > 0) { + int ch = *s++; + + if (ch == '\n') { + /* We don't have the benefit of a tty + driver, so translate NL into CR LF. */ + nb85e_uart_wait_for_xmit_ok (chan); + nb85e_uart_putc (chan, '\r'); + } + + nb85e_uart_wait_for_xmit_ok (chan); + nb85e_uart_putc (chan, ch); + + count--; + } + + /* Restore saved INTST status. */ + if (irq_was_enabled) { + /* Wait for the last character we sent to be + completely transmitted (as we'll get an INTST + interrupt at that point). */ + nb85e_uart_wait_for_xmit_done (chan); + /* Clear pending interrupts received due + to our transmission, unless there was already + one pending, in which case we want the + handler to be called. */ + if (! irq_was_pending) + nb85e_intc_clear_pending_irq (irq); + /* ... and then turn back on handling. */ + nb85e_intc_enable_irq (irq); + } + } +} + +static kdev_t nb85e_uart_cons_device (struct console *c) +{ + return mk_kdev (TTY_MAJOR, NB85E_UART_MINOR_BASE + c->index); +} + +static struct console nb85e_uart_cons = +{ + name: "ttyS", + write: nb85e_uart_cons_write, + device: nb85e_uart_cons_device, + flags: CON_PRINTBUFFER, + cflag: NB85E_UART_INIT_CFLAGS, + index: -1, +}; + +void nb85e_uart_cons_init (void) +{ + nb85e_uart_configure (0, NB85E_UART_INIT_CFLAGS, NB85E_UART_INIT_BAUD); + register_console (&nb85e_uart_cons); + printk ("Console: V850E/NB85E on-chip UART channel 0\n"); +} + +#define NB85E_UART_CONSOLE &nb85e_uart_cons + +#else /* !CONFIG_V850E_NB85E_UART_CONSOLE */ +#define NB85E_UART_CONSOLE 0 +#endif /* CONFIG_V850E_NB85E_UART_CONSOLE */ + +/* TX/RX interrupt handlers. */ + +static void nb85e_uart_stop_tx (struct uart_port *port, unsigned tty_stop); + +void nb85e_uart_tx (struct uart_port *port) +{ + struct circ_buf *xmit = &port->info->xmit; + int stopped = uart_tx_stopped (port); + + if (nb85e_uart_xmit_ok (port->line)) { + int tx_ch; + + if (port->x_char) { + tx_ch = port->x_char; + port->x_char = 0; + } else if (!uart_circ_empty (xmit) && !stopped) { + tx_ch = xmit->buf[xmit->tail]; + xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); + } else + goto no_xmit; + + nb85e_uart_putc (port->line, tx_ch); + port->icount.tx++; + + if (uart_circ_chars_pending (xmit) < WAKEUP_CHARS) + uart_event (port, EVT_WRITE_WAKEUP); + } + + no_xmit: + if (uart_circ_empty (xmit) || stopped) + nb85e_uart_stop_tx (port, stopped); +} + +static void nb85e_uart_tx_irq (int irq, void *data, struct pt_regs *regs) +{ + struct uart_port *port = data; + nb85e_uart_tx (port); +} + +static void nb85e_uart_rx_irq (int irq, void *data, struct pt_regs *regs) +{ + struct uart_port *port = data; + unsigned ch_stat = TTY_NORMAL; + unsigned ch = NB85E_UART_RXB (port->line); + unsigned err = NB85E_UART_ASIS (port->line); + + if (err) { + if (err & NB85E_UART_ASIS_OVE) { + ch_stat = TTY_OVERRUN; + port->icount.overrun++; + } else if (err & NB85E_UART_ASIS_FE) { + ch_stat = TTY_FRAME; + port->icount.frame++; + } else if (err & NB85E_UART_ASIS_PE) { + ch_stat = TTY_PARITY; + port->icount.parity++; + } + } + + port->icount.rx++; + + tty_insert_flip_char (port->info->tty, ch, ch_stat); + tty_schedule_flip (port->info->tty); +} + +/* Control functions for the serial framework. */ + +static void nb85e_uart_nop (struct uart_port *port) { } +static int nb85e_uart_success (struct uart_port *port) { return 0; } + +static unsigned nb85e_uart_tx_empty (struct uart_port *port) +{ + return TIOCSER_TEMT; /* Can't detect. */ +} + +static void nb85e_uart_set_mctrl (struct uart_port *port, unsigned mctrl) +{ +#ifdef NB85E_UART_SET_RTS + NB85E_UART_SET_RTS (port->line, (mctrl & TIOCM_RTS)); +#endif +} + +static unsigned nb85e_uart_get_mctrl (struct uart_port *port) +{ + /* We don't support DCD or DSR, so consider them permanently active. */ + int mctrl = TIOCM_CAR | TIOCM_DSR; + + /* We may support CTS. */ +#ifdef NB85E_UART_CTS + mctrl |= NB85E_UART_CTS(port->line) ? TIOCM_CTS : 0; +#else + mctrl |= TIOCM_CTS; +#endif + + return mctrl; +} + +static void nb85e_uart_start_tx (struct uart_port *port, unsigned tty_start) +{ + nb85e_intc_disable_irq (IRQ_INTST (port->line)); + nb85e_uart_tx (port); + nb85e_intc_enable_irq (IRQ_INTST (port->line)); +} + +static void nb85e_uart_stop_tx (struct uart_port *port, unsigned tty_stop) +{ + nb85e_intc_disable_irq (IRQ_INTST (port->line)); +} + +static void nb85e_uart_start_rx (struct uart_port *port) +{ + nb85e_intc_enable_irq (IRQ_INTSR (port->line)); +} + +static void nb85e_uart_stop_rx (struct uart_port *port) +{ + nb85e_intc_disable_irq (IRQ_INTSR (port->line)); +} + +static void nb85e_uart_break_ctl (struct uart_port *port, int break_ctl) +{ + /* Umm, do this later. */ +} + +static int nb85e_uart_startup (struct uart_port *port) +{ + int err; + + /* Alloc RX irq. */ + err = request_irq (IRQ_INTSR (port->line), nb85e_uart_rx_irq, + SA_INTERRUPT, "nb85e_uart", port); + if (err) + return err; + + /* Alloc TX irq. */ + err = request_irq (IRQ_INTST (port->line), nb85e_uart_tx_irq, + SA_INTERRUPT, "nb85e_uart", port); + if (err) { + free_irq (IRQ_INTSR (port->line), port); + return err; + } + + nb85e_uart_start_rx (port); + + return 0; +} + +static void nb85e_uart_shutdown (struct uart_port *port) +{ + /* Disable port interrupts. */ + free_irq (IRQ_INTST (port->line), port); + free_irq (IRQ_INTSR (port->line), port); + + /* Turn off xmit/recv enable bits. */ + NB85E_UART_ASIM (port->line) + &= ~(NB85E_UART_ASIM_TXE | NB85E_UART_ASIM_RXE); + /* Then reset the channel. */ + NB85E_UART_ASIM (port->line) = 0; +} + +static void +nb85e_uart_change_speed (struct uart_port *port, unsigned cflags, + unsigned iflag, unsigned quot) +{ + /* The serial framework doesn't give us the baud rate directly, but + insists on calculating a `quotient' from it, and giving us that + instead. Get the real baud rate from the tty code instead. */ + int baud = tty_get_baud_rate (port->info->tty); + + nb85e_uart_configure (port->line, cflags, baud); +} + +static const char *nb85e_uart_type (struct uart_port *port) +{ + return port->type == PORT_NB85E_UART ? "nb85e_uart" : 0; +} + +static void nb85e_uart_config_port (struct uart_port *port, int flags) +{ + if (flags & UART_CONFIG_TYPE) + port->type = PORT_NB85E_UART; +} + +static int +nb85e_uart_verify_port (struct uart_port *port, struct serial_struct *ser) +{ + if (ser->type != PORT_UNKNOWN && ser->type != PORT_NB85E_UART) + return -EINVAL; + if (ser->irq != IRQ_INTST (port->line)) + return -EINVAL; + return 0; +} + +static struct uart_ops nb85e_uart_ops = { + .tx_empty = nb85e_uart_tx_empty, + .get_mctrl = nb85e_uart_get_mctrl, + .set_mctrl = nb85e_uart_set_mctrl, + .start_tx = nb85e_uart_start_tx, + .stop_tx = nb85e_uart_stop_tx, + .stop_rx = nb85e_uart_stop_rx, + .enable_ms = nb85e_uart_nop, + .break_ctl = nb85e_uart_break_ctl, + .startup = nb85e_uart_startup, + .shutdown = nb85e_uart_shutdown, + .change_speed = nb85e_uart_change_speed, + .type = nb85e_uart_type, + .release_port = nb85e_uart_nop, + .request_port = nb85e_uart_success, + .config_port = nb85e_uart_config_port, + .verify_port = nb85e_uart_verify_port, +}; + +/* Initialization and cleanup. */ + +static struct uart_driver nb85e_uart_driver = { + .owner = THIS_MODULE, + .driver_name = "nb85e_uart", +#ifdef CONFIG_DEVFS_FS + .dev_name = "tts/%d", +#else + .dev_name = "ttyS", +#endif + .major = TTY_MAJOR, + .minor = NB85E_UART_MINOR_BASE, + .nr = NB85E_UART_NUM_CHANNELS, + .cons = NB85E_UART_CONSOLE, +}; + + +static struct uart_port nb85e_uart_ports[NB85E_UART_NUM_CHANNELS]; + +static int __init nb85e_uart_init(void) +{ + int rval; + + printk (KERN_INFO "V850E/NB85E on-chip UART\n"); + + rval = uart_register_driver(&nb85e_uart_driver); + if (rval == 0) { + unsigned chan; + + for (chan = 0; chan < NB85E_UART_NUM_CHANNELS; chan++) { + int cksr_min; + struct uart_port *port = &nb85e_uart_ports[chan]; + + memset (port, 0, sizeof *port); + + port->ops = &nb85e_uart_ops; + port->line = chan; + port->iotype = SERIAL_IO_MEM; + port->flags = UPF_BOOT_AUTOCONF; + + /* We actually use multiple IRQs, but the serial + framework seems to mainly use this for + informational purposes anyway. Here we use the TX + irq. */ + port->irq = IRQ_INTST (chan); + + /* The serial framework doesn't really use these + membase/mapbase fields for anything useful, but + it requires that they be something non-zero to + consider the port `valid'. */ + port->membase = (void *)NB85E_UART_BASE_ADDR; + port->mapbase = NB85E_UART_BASE_ADDR; + + /* The framework insists on knowing the uart's master + clock freq, though it doesn't seem to do anything + useful for us with it. We must make it at least + higher than (the maximum baud rate * 16), otherwise + the framework will puke during its internal + calculations, and force the baud rate to be 9600. + To be accurate though, just repeat the calculation + we use when actually setting the speed. */ + cksr_min = 0; + while ((cpu_clock_freq >> cksr_min) + > NB85E_UART_CKSR_MAX_FREQ) + cksr_min++; + /* -3 means (* 16 / 2): 16 to account for for the + serial frameworks built-in bias, and 2 because + there's an additional / 2 in the hardware. */ + port->uartclk = (cpu_clock_freq >> (cksr_min - 3)); + + uart_add_one_port(&nb85e_uart_driver, port); + } + } + + return rval; +} + +static void __exit nb85e_uart_exit(void) +{ + unsigned chan; + + for (chan = 0; chan < NB85E_UART_NUM_CHANNELS; chan++) + uart_remove_one_port(&nb85e_uart_driver, + &nb85e_uart_ports[chan]); + + uart_unregister_driver(&nb85e_uart_driver); +} + +module_init(nb85e_uart_init); +module_exit(nb85e_uart_exit); + +EXPORT_NO_SYMBOLS; + +MODULE_AUTHOR("Miles Bader"); +MODULE_DESCRIPTION("NEC V850E/NB85E on-chip UART"); +MODULE_LICENSE("GPL"); diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/telephony/ixj.c linux.2.5.40-ac2/drivers/telephony/ixj.c --- linux.2.5.40/drivers/telephony/ixj.c 2002-07-20 20:11:06.000000000 +0100 +++ linux.2.5.40-ac2/drivers/telephony/ixj.c 2002-10-03 14:16:49.000000000 +0100 @@ -274,8 +274,8 @@ #include "ixj.h" -#define TYPE(dev) (MINOR(dev) >> 4) -#define NUM(dev) (MINOR(dev) & 0xf) +#define TYPE(dev) (minor(dev) >> 4) +#define NUM(dev) (minor(dev) & 0xf) static int ixjdebug; static int hertz = HZ; @@ -6202,7 +6202,7 @@ IXJ_FILTER_RAW jfr; unsigned int raise, mant; - unsigned int minor = MINOR(inode->i_rdev); + unsigned int minor = minor(inode->i_rdev); int board = NUM(inode->i_rdev); IXJ *j = get_ixj(NUM(inode->i_rdev)); diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/telephony/ixj.h linux.2.5.40-ac2/drivers/telephony/ixj.h --- linux.2.5.40/drivers/telephony/ixj.h 2002-07-20 20:12:29.000000000 +0100 +++ linux.2.5.40-ac2/drivers/telephony/ixj.h 2002-10-03 14:16:49.000000000 +0100 @@ -1199,7 +1199,7 @@ unsigned char cid_play_flag; char play_mode; IXJ_FLAGS flags; - unsigned int busyflags; + unsigned long busyflags; unsigned int rec_frame_size; unsigned int play_frame_size; unsigned int cid_play_frame_size; diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/telephony/ixj_pcmcia.c linux.2.5.40-ac2/drivers/telephony/ixj_pcmcia.c --- linux.2.5.40/drivers/telephony/ixj_pcmcia.c 2002-07-20 20:12:17.000000000 +0100 +++ linux.2.5.40-ac2/drivers/telephony/ixj_pcmcia.c 2002-10-03 14:46:12.000000000 +0100 @@ -98,7 +98,6 @@ static void ixj_detach(dev_link_t * link) { dev_link_t **linkp; - long flags; int ret; DEBUG(0, "ixj_detach(0x%p)\n", link); for (linkp = &dev_list; *linkp; linkp = &(*linkp)->next) @@ -106,13 +105,8 @@ break; if (*linkp == NULL) return; - save_flags(flags); - cli(); - if (link->state & DEV_RELEASE_PENDING) { - del_timer(&link->release); - link->state &= ~DEV_RELEASE_PENDING; - } - restore_flags(flags); + del_timer_sync(&link->release); + link->state &= ~DEV_RELEASE_PENDING; if (link->state & DEV_CONFIG) ixj_cs_release((u_long) link); if (link->handle) { diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/usb/core/message.c linux.2.5.40-ac2/drivers/usb/core/message.c --- linux.2.5.40/drivers/usb/core/message.c 2002-10-02 21:34:06.000000000 +0100 +++ linux.2.5.40-ac2/drivers/usb/core/message.c 2002-10-03 13:49:51.000000000 +0100 @@ -924,7 +924,7 @@ int usb_string(struct usb_device *dev, int index, char *buf, size_t size) { unsigned char *tbuf; - int err; + int err, len; unsigned int u, idx; if (size <= 0 || !buf || !index) @@ -954,10 +954,15 @@ } /* - * Just ask for a maximum length string and then take the length - * that was returned. + * ask for the length of the string */ - err = usb_get_string(dev, dev->string_langid, index, tbuf, 255); + + err = usb_get_string(dev, dev->string_langid, index, tbuf, 2); + if(err<2) + goto errout; + len=tbuf[0]; + + err = usb_get_string(dev, dev->string_langid, index, tbuf, len); if (err < 0) goto errout; diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/usb/core/usb.c linux.2.5.40-ac2/drivers/usb/core/usb.c --- linux.2.5.40/drivers/usb/core/usb.c 2002-10-02 21:34:06.000000000 +0100 +++ linux.2.5.40-ac2/drivers/usb/core/usb.c 2002-10-03 13:48:58.000000000 +0100 @@ -624,7 +624,7 @@ #else static int usb_hotplug (struct device *dev, char **envp, - char *buffer, int buffer_size) + int num_envp, char *buffer, int buffer_size) { return -ENODEV; } diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/usb/input/usbkbd.c linux.2.5.40-ac2/drivers/usb/input/usbkbd.c --- linux.2.5.40/drivers/usb/input/usbkbd.c 2002-10-02 21:33:52.000000000 +0100 +++ linux.2.5.40-ac2/drivers/usb/input/usbkbd.c 2002-10-03 13:48:25.000000000 +0100 @@ -280,7 +280,7 @@ if (!(buf = kmalloc(63, GFP_KERNEL))) { usb_free_urb(kbd->irq); - usb_kbd_free_buffers(dev, kbd); + usb_kbd_free_mem(dev, kbd); kfree(kbd); return -ENOMEM; } @@ -321,7 +321,7 @@ if (kbd) { usb_unlink_urb(kbd->irq); input_unregister_device(&kbd->dev); - usb_kbd_free_buffers(interface_to_usbdev(intf), kbd); + usb_kbd_free_mem(interface_to_usbdev(intf), kbd); kfree(kbd); } } diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/usb/Makefile linux.2.5.40-ac2/drivers/usb/Makefile --- linux.2.5.40/drivers/usb/Makefile 2002-10-02 21:33:29.000000000 +0100 +++ linux.2.5.40-ac2/drivers/usb/Makefile 2002-10-03 13:50:39.000000000 +0100 @@ -60,6 +60,7 @@ obj-$(CONFIG_USB_LCD) += misc/ obj-$(CONFIG_USB_RIO500) += misc/ obj-$(CONFIG_USB_SPEEDTOUCH) += misc/ +obj-$(CONFIG_USB_TEST) += misc/ obj-$(CONFIG_USB_TIGL) += misc/ obj-$(CONFIG_USB_USS720) += misc/ diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/usb/misc/Config.help linux.2.5.40-ac2/drivers/usb/misc/Config.help --- linux.2.5.40/drivers/usb/misc/Config.help 2002-10-02 21:34:03.000000000 +0100 +++ linux.2.5.40-ac2/drivers/usb/misc/Config.help 2002-10-03 13:50:39.000000000 +0100 @@ -112,6 +112,12 @@ For more information, see Johan Verrept's webpages at . +CONFIG_USB_TEST + + This driver is for testing host controller software. It is used + with specialized device firmware for regression and stress testing, + to help prevent problems from cropping up with 'real" drivers. + CONFIG_USB_LCD Say Y here if you want to connect an USBLCD to your computer's USB port. The USBLCD is a small USB interface board for diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/usb/misc/Config.in linux.2.5.40-ac2/drivers/usb/misc/Config.in --- linux.2.5.40/drivers/usb/misc/Config.in 2002-10-02 21:33:50.000000000 +0100 +++ linux.2.5.40-ac2/drivers/usb/misc/Config.in 2002-10-03 13:50:39.000000000 +0100 @@ -9,3 +9,4 @@ dep_tristate ' Tieman Voyager USB Braille display support (EXPERIMENTAL)' CONFIG_USB_BRLVGER $CONFIG_USB $CONFIG_EXPERIMENTAL dep_tristate ' USB LCD driver support' CONFIG_USB_LCD $CONFIG_USB dep_tristate ' Alcatel Speedtouch ADSL USB Modem' CONFIG_USB_SPEEDTOUCH $CONFIG_USB $CONFIG_ATM +dep_tristate ' USB testing driver (DEVELOPMENT)' CONFIG_USB_TEST $CONFIG_USB_DEVICEFS $CONFIG_EXPERIMENTAL diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/usb/misc/Makefile linux.2.5.40-ac2/drivers/usb/misc/Makefile --- linux.2.5.40/drivers/usb/misc/Makefile 2002-10-02 21:33:29.000000000 +0100 +++ linux.2.5.40-ac2/drivers/usb/misc/Makefile 2002-10-03 13:50:39.000000000 +0100 @@ -11,6 +11,7 @@ obj-$(CONFIG_USB_LCD) += usblcd.o obj-$(CONFIG_USB_RIO500) += rio500.o obj-$(CONFIG_USB_SPEEDTOUCH) += speedtouch.o atmsar.o +obj-$(CONFIG_USB_TEST) += usbtest.o obj-$(CONFIG_USB_TIGL) += tiglusb.o obj-$(CONFIG_USB_USS720) += uss720.o diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/usb/misc/speedtouch.c linux.2.5.40-ac2/drivers/usb/misc/speedtouch.c --- linux.2.5.40/drivers/usb/misc/speedtouch.c 2002-10-02 21:33:52.000000000 +0100 +++ linux.2.5.40-ac2/drivers/usb/misc/speedtouch.c 2002-10-03 13:51:04.000000000 +0100 @@ -163,11 +163,11 @@ void udsl_atm_processqueue (struct udsl_instance_data *instance); static struct atmdev_ops udsl_atm_devops = { - open:udsl_atm_open, - close:udsl_atm_close, - ioctl:udsl_atm_ioctl, - send:udsl_atm_send, - proc_read:udsl_atm_proc_read, + .open = udsl_atm_open, + .close = udsl_atm_close, + .ioctl = udsl_atm_ioctl, + .send = udsl_atm_send, + .proc_read = udsl_atm_proc_read, }; struct udsl_atm_dev_data { @@ -182,7 +182,7 @@ static void udsl_usb_disconnect (struct usb_interface *intf); int udsl_usb_send_data (struct udsl_instance_data *instance, struct atm_vcc *vcc, struct sk_buff *skb); -static int udsl_usb_ioctl (struct usb_device *hub, unsigned int code, void *user_data); +static int udsl_usb_ioctl (struct usb_interface *intf, unsigned int code, void *user_data); static int udsl_usb_cancelsends (struct udsl_instance_data *instance, struct atm_vcc *vcc); static struct usb_driver udsl_usb_driver = { @@ -886,8 +886,9 @@ #define hex2int(c) ( (c >= '0')&&(c <= '9') ? (c - '0') : ((c & 0xf)+9) ) -static int udsl_usb_ioctl (struct usb_device *dev, unsigned int code, void *user_data) +static int udsl_usb_ioctl (struct usb_interface *intf, unsigned int code, void *user_data) { + struct usb_device *dev = interface_to_usbdev (intf); struct udsl_instance_data *instance; int i; diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/usb/misc/usbtest.c linux.2.5.40-ac2/drivers/usb/misc/usbtest.c --- linux.2.5.40/drivers/usb/misc/usbtest.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/drivers/usb/misc/usbtest.c 2002-10-03 13:50:39.000000000 +0100 @@ -0,0 +1,570 @@ +#include +#include +#include +#include +#include +#include +#include +//#include +#include + +#if !defined (DEBUG) && defined (CONFIG_USB_DEBUG) +# define DEBUG +#endif +#include + + +/*-------------------------------------------------------------------------*/ + +// FIXME make these public somewhere; usbdevfs.h? +// +struct usbtest_param { + // inputs + unsigned test_num; /* 0..(TEST_CASES-1) */ + int iterations; + int length; + int vary; + int sglen; + + // outputs + struct timeval duration; +}; +#define USBTEST_REQUEST _IOWR('U', 100, struct usbtest_param) + +/*-------------------------------------------------------------------------*/ + +/* this is accessed only through usbfs ioctl calls. + * one ioctl to issue a test ... no locking needed!!! + * tests create other threads if they need them. + * urbs and buffers are allocated dynamically, + * and data generated deterministically. + * + * there's a minor complication on disconnect(), since + * usbfs.disconnect() waits till our ioctl completes. + */ +struct usbtest_dev { + struct usb_interface *intf; + struct testdev_info *info; + char id [32]; + int in_pipe; + int out_pipe; +}; + +static struct usb_device *testdev_to_usbdev (struct usbtest_dev *test) +{ + return interface_to_usbdev (test->intf); +} + +/* set up all urbs so they can be used with either bulk or interrupt */ +#define INTERRUPT_RATE 1 /* msec/transfer */ + +/*-------------------------------------------------------------------------*/ + +/* Support for testing basic non-queued I/O streams. + * + * These just package urbs as requests that can be easily canceled. + * Each urb's data buffer is dynamically allocated; callers can fill + * them with non-zero test data (or test for it) when appropriate. + */ + +static void simple_callback (struct urb *urb) +{ + complete ((struct completion *) urb->context); +} + +static struct urb *simple_alloc_urb ( + struct usb_device *udev, + int pipe, + long bytes +) +{ + struct urb *urb; + + if (bytes < 0) + return 0; + urb = usb_alloc_urb (0, SLAB_KERNEL); + if (!urb) + return urb; + usb_fill_bulk_urb (urb, udev, pipe, 0, bytes, simple_callback, 0); + urb->interval = (udev->speed == USB_SPEED_HIGH) + ? (INTERRUPT_RATE << 3) + : INTERRUPT_RATE, + urb->transfer_flags = URB_NO_DMA_MAP; + urb->transfer_buffer = usb_buffer_alloc (udev, bytes, SLAB_KERNEL, + &urb->transfer_dma); + if (!urb->transfer_buffer) { + usb_free_urb (urb); + urb = 0; + } else + memset (urb->transfer_buffer, 0, bytes); + return urb; +} + +static void simple_free_urb (struct urb *urb) +{ + usb_buffer_free (urb->dev, urb->transfer_buffer_length, + urb->transfer_buffer, urb->transfer_dma); + usb_free_urb (urb); +} + +static int simple_io ( + struct urb *urb, + int iterations, + int vary +) +{ + struct usb_device *udev = urb->dev; + int max = urb->transfer_buffer_length; + struct completion completion; + int retval = 0; + + urb->context = &completion; + while (iterations-- > 0 && retval == 0) { + init_completion (&completion); + if ((retval = usb_submit_urb (urb, SLAB_KERNEL)) != 0) + break; + + /* NOTE: no timeouts; can't be broken out of by interrupt */ + wait_for_completion (&completion); + retval = urb->status; + urb->dev = udev; + + if (vary) { + int len = urb->transfer_buffer_length; + + len += max; + len %= max; + if (len == 0) + len = (vary < max) ? vary : max; + urb->transfer_buffer_length = len; + } + + /* FIXME if endpoint halted, clear halt (and log) */ + } + urb->transfer_buffer_length = max; + + // FIXME for unlink or fault handling tests, don't report + // failure if retval is as we expected ... + if (retval) + dbg ("simple_io failed, iterations left %d, status %d", + iterations, retval); + return retval; +} + +/*-------------------------------------------------------------------------*/ + +/* We use scatterlist primitives to test queued I/O. + * Yes, this also tests the scatterlist primitives. + */ + +static void free_sglist (struct scatterlist *sg, int nents) +{ + unsigned i; + + if (!sg) + return; + for (i = 0; i < nents; i++) { + if (!sg [i].page) + continue; + kfree (page_address (sg [i].page) + sg [i].offset); + } + kfree (sg); +} + +static struct scatterlist * +alloc_sglist (int nents, int max, int vary) +{ + struct scatterlist *sg; + unsigned i; + unsigned size = max; + + sg = kmalloc (nents * sizeof *sg, SLAB_KERNEL); + if (!sg) + return 0; + memset (sg, 0, nents * sizeof *sg); + + for (i = 0; i < nents; i++) { + char *buf; + + buf = kmalloc (size, SLAB_KERNEL); + if (!buf) { + free_sglist (sg, i); + return 0; + } + memset (buf, 0, size); + + /* kmalloc pages are always physically contiguous! */ + sg [i].page = virt_to_page (buf); + sg [i].offset = ((unsigned) buf) & ~PAGE_MASK; + sg [i].length = size; + + if (vary) { + size += vary; + size %= max; + if (size == 0) + size = (vary < max) ? vary : max; + } + } + + return sg; +} + +static int perform_sglist ( + struct usb_device *udev, + unsigned iterations, + int pipe, + struct usb_sg_request *req, + struct scatterlist *sg, + int nents +) +{ + int retval = 0; + + while (retval == 0 && iterations-- > 0) { + retval = usb_sg_init (req, udev, pipe, + (udev->speed == USB_SPEED_HIGH) + ? (INTERRUPT_RATE << 3) + : INTERRUPT_RATE, + sg, nents, 0, SLAB_KERNEL); + + if (retval) + break; + usb_sg_wait (req); + retval = req->status; + + /* FIXME if endpoint halted, clear halt (and log) */ + } + + // FIXME for unlink or fault handling tests, don't report + // failure if retval is as we expected ... + + if (retval) + dbg ("perform_sglist failed, iterations left %d, status %d", + iterations, retval); + return retval; +} + + +/*-------------------------------------------------------------------------*/ + +/* We only have this one interface to user space, through usbfs. + * User mode code can scan usbfs to find N different devices (maybe on + * different busses) to use when testing, and allocate one thread per + * test. So discovery is simplified, and we have no device naming issues. + * + * Don't use these only as stress/load tests. Use them along with with + * other USB bus activity: plugging, unplugging, mousing, mp3 playback, + * video capture, and so on. Run different tests at different times, in + * different sequences. Nothing here should interact with other devices, + * except indirectly by consuming USB bandwidth and CPU resources for test + * threads and request completion. + */ + +static int usbtest_ioctl (struct usb_interface *intf, unsigned int code, void *buf) +{ + struct usbtest_dev *dev = dev_get_drvdata (&intf->dev); + struct usb_device *udev = testdev_to_usbdev (dev); + struct usbtest_param *param = buf; + int retval = -EOPNOTSUPP; + struct urb *urb; + struct scatterlist *sg; + struct usb_sg_request req; + struct timeval start; + + // FIXME USBDEVFS_CONNECTINFO doesn't say how fast the device is. + + if (code != USBTEST_REQUEST) + return -EOPNOTSUPP; + + if (param->iterations <= 0 || param->length < 0 + || param->sglen < 0 || param->vary < 0) + return -EINVAL; + + /* + * Just a bunch of test cases that every HCD is expected to handle. + * + * Some may need specific firmware, though it'd be good to have + * one firmware image to handle all the test cases. + * + * FIXME add more tests! cancel requests, verify the data, control + * requests, and so on. + */ + do_gettimeofday (&start); + switch (param->test_num) { + + case 0: + dbg ("%s TEST 0: NOP", dev->id); + retval = 0; + break; + + /* Simple non-queued bulk I/O tests */ + case 1: + if (dev->out_pipe == 0) + break; + dbg ("%s TEST 1: write %d bytes %u times", dev->id, + param->length, param->iterations); + urb = simple_alloc_urb (udev, dev->out_pipe, param->length); + if (!urb) { + retval = -ENOMEM; + break; + } + // FIRMWARE: bulk sink (maybe accepts short writes) + retval = simple_io (urb, param->iterations, 0); + simple_free_urb (urb); + break; + case 2: + if (dev->in_pipe == 0) + break; + dbg ("%s TEST 2: read %d bytes %u times", dev->id, + param->length, param->iterations); + urb = simple_alloc_urb (udev, dev->in_pipe, param->length); + if (!urb) { + retval = -ENOMEM; + break; + } + // FIRMWARE: bulk source (maybe generates short writes) + retval = simple_io (urb, param->iterations, 0); + simple_free_urb (urb); + break; + case 3: + if (dev->out_pipe == 0 || param->vary == 0) + break; + dbg ("%s TEST 3: write/%d 0..%d bytes %u times", dev->id, + param->vary, param->length, param->iterations); + urb = simple_alloc_urb (udev, dev->out_pipe, param->length); + if (!urb) { + retval = -ENOMEM; + break; + } + // FIRMWARE: bulk sink (maybe accepts short writes) + retval = simple_io (urb, param->iterations, param->vary); + simple_free_urb (urb); + break; + case 4: + if (dev->in_pipe == 0 || param->vary == 0) + break; + dbg ("%s TEST 3: read/%d 0..%d bytes %u times", dev->id, + param->vary, param->length, param->iterations); + urb = simple_alloc_urb (udev, dev->out_pipe, param->length); + if (!urb) { + retval = -ENOMEM; + break; + } + // FIRMWARE: bulk source (maybe generates short writes) + retval = simple_io (urb, param->iterations, param->vary); + simple_free_urb (urb); + break; + + /* Queued bulk I/O tests */ + case 5: + if (dev->out_pipe == 0 || param->sglen == 0) + break; + dbg ("%s TEST 5: write %d sglists, %d entries of %d bytes", + dev->id, param->iterations, + param->sglen, param->length); + sg = alloc_sglist (param->sglen, param->length, 0); + if (!sg) { + retval = -ENOMEM; + break; + } + // FIRMWARE: bulk sink (maybe accepts short writes) + retval = perform_sglist (udev, param->iterations, dev->out_pipe, + &req, sg, param->sglen); + free_sglist (sg, param->sglen); + break; + + case 6: + if (dev->in_pipe == 0 || param->sglen == 0) + break; + dbg ("%s TEST 6: read %d sglists, %d entries of %d bytes", + dev->id, param->iterations, + param->sglen, param->length); + sg = alloc_sglist (param->sglen, param->length, 0); + if (!sg) { + retval = -ENOMEM; + break; + } + // FIRMWARE: bulk source (maybe generates short writes) + retval = perform_sglist (udev, param->iterations, dev->in_pipe, + &req, sg, param->sglen); + free_sglist (sg, param->sglen); + break; + case 7: + if (dev->out_pipe == 0 || param->sglen == 0 || param->vary == 0) + break; + dbg ("%s TEST 7: write/%d %d sglists, %d entries 0..%d bytes", + dev->id, param->vary, param->iterations, + param->sglen, param->length); + sg = alloc_sglist (param->sglen, param->length, param->vary); + if (!sg) { + retval = -ENOMEM; + break; + } + // FIRMWARE: bulk sink (maybe accepts short writes) + retval = perform_sglist (udev, param->iterations, dev->out_pipe, + &req, sg, param->sglen); + free_sglist (sg, param->sglen); + break; + case 8: + if (dev->in_pipe == 0 || param->sglen == 0 || param->vary == 0) + break; + dbg ("%s TEST 8: read/%d %d sglists, %d entries 0..%d bytes", + dev->id, param->vary, param->iterations, + param->sglen, param->length); + sg = alloc_sglist (param->sglen, param->length, param->vary); + if (!sg) { + retval = -ENOMEM; + break; + } + // FIRMWARE: bulk source (maybe generates short writes) + retval = perform_sglist (udev, param->iterations, dev->in_pipe, + &req, sg, param->sglen); + free_sglist (sg, param->sglen); + break; + + /* test cases for the unlink/cancel codepaths need a thread to + * usb_unlink_urb() or usg_sg_cancel(), and a way to check if + * the urb/sg_request was properly canceled. + * + * for the unlink-queued cases, the usb_sg_*() code uses/tests + * the "streamed" cleanup mode, not the "packet" one + */ + + } + do_gettimeofday (¶m->duration); + param->duration.tv_sec -= start.tv_sec; + param->duration.tv_usec -= start.tv_usec; + if (param->duration.tv_usec < 0) { + param->duration.tv_usec += 1000 * 1000; + param->duration.tv_sec -= 1; + } + return retval; +} + +/*-------------------------------------------------------------------------*/ + +/* most programmable USB devices can be given firmware that will support the + * test cases above. one basic question is which endpoints to use for + * testing; endpoint numbers are not always firmware-selectable. + * + * for now, the driver_info in the device_id table entry just encodes the + * endpoint info for a pair of bulk-capable endpoints, which we can use + * for some interrupt transfer tests too. later this could get fancier. + */ +#define EP_PAIR(in,out) (((in)<<4)|(out)) + +static int force_interrupt = 0; +MODULE_PARM (force_interrupt, "i"); +MODULE_PARM_DESC (force_interrupt, "0 = test bulk (default), else interrupt"); + +static int +usbtest_probe (struct usb_interface *intf, const struct usb_device_id *id) +{ + struct usb_device *udev; + struct usbtest_dev *dev; + unsigned long driver_info = id->driver_info; + + udev = interface_to_usbdev (intf); + + dev = kmalloc (sizeof *dev, SLAB_KERNEL); + if (!dev) + return -ENOMEM; + memset (dev, 0, sizeof *dev); + snprintf (dev->id, sizeof dev->id, "%s-%s", + udev->bus->bus_name, udev->devpath); + dev->intf = intf; + + /* NOTE this doesn't yet test the handful of difference that are + * visible with high speed devices: bigger maxpacket (1K) and + * "high bandwidth" modes (up to 3 packets/uframe). + */ + if (force_interrupt || udev->speed == USB_SPEED_LOW) { + if (driver_info & 0xf0) + dev->in_pipe = usb_rcvintpipe (udev, + (driver_info >> 4) & 0x0f); + if (driver_info & 0x0f) + dev->out_pipe = usb_sndintpipe (udev, + driver_info & 0x0f); + +#if 1 + // FIXME disabling this until we finally get rid of + // interrupt "automagic" resubmission + dbg ("%s: no interrupt transfers for now", dev->id); + kfree (dev); + return -ENODEV; +#endif + } else { + if (driver_info & 0xf0) + dev->in_pipe = usb_rcvbulkpipe (udev, + (driver_info >> 4) & 0x0f); + if (driver_info & 0x0f) + dev->out_pipe = usb_sndbulkpipe (udev, + driver_info & 0x0f); + } + + dev_set_drvdata (&intf->dev, dev); + info ("bound to %s ...%s%s", dev->id, + dev->out_pipe ? " writes" : "", + dev->in_pipe ? " reads" : ""); + return 0; +} + +static void usbtest_disconnect (struct usb_interface *intf) +{ + struct usbtest_dev *dev = dev_get_drvdata (&intf->dev); + + dev_set_drvdata (&intf->dev, 0); + info ("unbound %s", dev->id); + kfree (intf->private_data); +} + +/* Basic testing only needs a device that can source or sink bulk traffic. + */ +static struct usb_device_id id_table [] = { + + /* EZ-USB FX2 "bulksrc" or "bulkloop" firmware from Cypress + * reads disabled on this one, my version has some problem there + */ + { USB_DEVICE (0x0547, 0x1002), + .driver_info = EP_PAIR (0, 2), + }, +#if 1 + // this does not coexist with a real iBOT2 driver! + // it makes a nice source of high speed bulk-in data + { USB_DEVICE (0x0b62, 0x0059), + .driver_info = EP_PAIR (2, 0), + }, +#endif + + /* can that old "usbstress-0.3" firmware be used with this? */ + + { } +}; +MODULE_DEVICE_TABLE (usb, id_table); + +static struct usb_driver usbtest_driver = { + .owner = THIS_MODULE, + .name = "usbtest", + .id_table = id_table, + .probe = usbtest_probe, + .ioctl = usbtest_ioctl, + .disconnect = usbtest_disconnect, +}; + +/*-------------------------------------------------------------------------*/ + +static int __init usbtest_init (void) +{ + return usb_register (&usbtest_driver); +} +module_init (usbtest_init); + +static void __exit usbtest_exit (void) +{ + usb_deregister (&usbtest_driver); +} +module_exit (usbtest_exit); + +MODULE_DESCRIPTION ("USB HCD Testing Driver"); +MODULE_LICENSE ("GPL"); + diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/usb/net/pegasus.h linux.2.5.40-ac2/drivers/usb/net/pegasus.h --- linux.2.5.40/drivers/usb/net/pegasus.h 2002-10-02 21:33:50.000000000 +0100 +++ linux.2.5.40-ac2/drivers/usb/net/pegasus.h 2002-10-03 13:47:54.000000000 +0100 @@ -191,7 +191,7 @@ DEFAULT_GPIO_RESET | PEGASUS_II ) PEGASUS_DEV( "Corega FEter USB-TX", VENDOR_COREGA, 0x0004, DEFAULT_GPIO_RESET ) -PEGASUS_DEV( "Corega FEter", VENDOR_COREGA, 0x0004, +PEGASUS_DEV( "Corega FEter", VENDOR_COREGA, 0x000d, DEFAULT_GPIO_RESET | PEGASUS_II ) PEGASUS_DEV( "D-Link DSB-650TX", VENDOR_DLINK, 0x4001, LINKSYS_GPIO_RESET ) diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/usb/net/rtl8150.c linux.2.5.40-ac2/drivers/usb/net/rtl8150.c --- linux.2.5.40/drivers/usb/net/rtl8150.c 2002-10-02 21:33:52.000000000 +0100 +++ linux.2.5.40-ac2/drivers/usb/net/rtl8150.c 2002-10-03 13:47:03.000000000 +0100 @@ -21,11 +21,11 @@ #include /* Version Information */ -#define DRIVER_VERSION "v0.5.5 (2002/07/22)" +#define DRIVER_VERSION "v0.5.6 (2002/09/19)" #define DRIVER_AUTHOR "Petko Manolov " #define DRIVER_DESC "rtl8150 based usb-ethernet driver" -#define IRD 0x0120 +#define IDR 0x0120 #define MAR 0x0126 #define CR 0x012e #define TCR 0x012f @@ -45,6 +45,8 @@ #define ANLP 0x0146 #define AER 0x0148 +#define IDR_EEPROM 0x1202 + #define PHY_READ 0 #define PHY_WRITE 0x20 #define PHY_GO 0x40 @@ -73,6 +75,8 @@ #define PRODUCT_ID_RTL8150 0x8150 #define PRODUCT_ID_LUAKTX 0x0012 +#undef EEPROM_WRITE + /* table of devices that work with this driver */ static struct usb_device_id rtl8150_table[] = { {USB_DEVICE(VENDOR_ID_REALTEK, PRODUCT_ID_RTL8150)}, @@ -111,7 +115,7 @@ static inline struct sk_buff *pull_skb(rtl8150_t *); static void rtl8150_disconnect(struct usb_interface *intf); static int rtl8150_probe(struct usb_interface *intf, - const struct usb_device_id *id); + const struct usb_device_id *id); static struct usb_driver rtl8150_driver = { .name = "rtl8150", @@ -231,10 +235,51 @@ { u8 node_id[6]; - get_registers(dev, IRD, sizeof(node_id), node_id); + get_registers(dev, IDR, sizeof(node_id), node_id); memcpy(dev->netdev->dev_addr, node_id, sizeof(node_id)); } +static int rtl8150_set_mac_address(struct net_device *netdev, void *p) +{ + struct sockaddr *addr = p; + rtl8150_t *dev; + int i; + + if (netif_running(netdev)) + return -EBUSY; + dev = netdev->priv; + if (dev == NULL) { + return -ENODEV; + } + memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); + dbg("%s: Setting MAC address to ", netdev->name); + for (i = 0; i < 5; i++) + dbg("%02X:", netdev->dev_addr[i]); + dbg("%02X\n", netdev->dev_addr[i]); + /* Set the IDR registers. */ + set_registers(dev, IDR, sizeof(netdev->dev_addr), netdev->dev_addr); +#ifdef EEPROM_WRITE + { + u8 cr; + /* Get the CR contents. */ + get_registers(dev, CR, 1, &cr); + /* Set the WEPROM bit (eeprom write enable). */ + cr |= 0x20; + set_registers(dev, CR, 1, &cr); + /* Write the MAC address into eeprom. Eeprom writes must be word-sized, + so we need to split them up. */ + for (i = 0; i * 2 < netdev->addr_len; i++) { + set_registers(dev, IDR_EEPROM + (i * 2), 2, + netdev->dev_addr + (i * 2)); + } + /* Clear the WEPROM bit (preventing accidental eeprom writes). */ + cr &= 0xdf; + set_registers(dev, CR, 1, &cr); + } +#endif + return 0; +} + static int rtl8150_reset(rtl8150_t * dev) { u8 data = 0x10; @@ -764,6 +809,7 @@ netdev->tx_timeout = rtl8150_tx_timeout; netdev->hard_start_xmit = rtl8150_start_xmit; netdev->set_multicast_list = rtl8150_set_multicast; + netdev->set_mac_address = rtl8150_set_mac_address; netdev->get_stats = rtl8150_netdev_stats; netdev->mtu = RTL8150_MTU; dev->intr_interval = 100; /* 100ms */ @@ -782,7 +828,7 @@ info("%s: rtl8150 is detected", netdev->name); up(&dev->sem); - dev_set_drvdata (&intf->dev, dev); + dev_set_drvdata(&intf->dev, dev); return 0; err: unregister_netdev(dev->netdev); @@ -794,10 +840,9 @@ static void rtl8150_disconnect(struct usb_interface *intf) { - rtl8150_t *dev = dev_get_drvdata (&intf->dev); - - dev_set_drvdata (&intf->dev, NULL); + rtl8150_t *dev = dev_get_drvdata(&intf->dev); + dev_set_drvdata(&intf->dev, NULL); if (dev) { set_bit(RTL8150_UNPLUG, &dev->flags); unregister_netdev(dev->netdev); diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.2.5.40/drivers/video/68328fb.c linux.2.5.40-ac2/drivers/video/68328fb.c --- linux.2.5.40/drivers/video/68328fb.c 1970-01-01 01:00:00.000000000 +0100 +++ linux.2.5.40-ac2/drivers/video/68328fb.c 2002-10-02 21:55:06.000000000 +0100 @@ -0,0 +1,986 @@ +/* + * linux/arch/m68knommu/console/68328fb.c -- Low level implementation of the + * mc68328 LCD frame buffer device + * + * Copyright (C) 1998,1999 Kenneth Albanowski , + * The Silver Hammer Group, Ltd. + * + * + * This file is based on the Amiga CyberVision frame buffer device (Cyberfb.c): + * + * Copyright (C) 1996 Martin Apel + * Geert Uytterhoeven + * + * + * This file is based on the Amiga frame buffer device (amifb.c): + * + * Copyright (C) 1995 Geert Uytterhoeven + * + * + * History: + * - 17 Feb 98: Original version by Kenneth Albanowski + * + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive + * for more details. + */ + + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include