--- msr.c.ac1 Fri May 26 13:44:56 2000 +++ msr.c Fri May 26 13:48:53 2000 @@ -40,9 +40,12 @@ #include #include +/* Note: "err" is handled in a funny way below. Otherwise one version + of gcc or another breaks. */ + extern inline int wrmsr_eio(u32 reg, u32 eax, u32 edx) { - int err = 0; + int err; asm volatile( "1: wrmsr\n" @@ -55,15 +58,15 @@ " .align 4\n" " .long 1b,3b\n" ".previous" - : "+bDS" (err) - : "a" (eax), "d" (edx), "c" (reg), "i" (-EIO)); + : "=&bDS" (err) + : "a" (eax), "d" (edx), "c" (reg), "i" (-EIO), "0" (0)); return err; } extern inline int rdmsr_eio(u32 reg, u32 *eax, u32 *edx) { - int err = 0; + int err; asm volatile( "1: rdmsr\n" @@ -76,10 +79,8 @@ " .align 4\n" " .long 1b,3b\n" ".previous" - : "+bDS" (err), "=a" (*eax), "=d" (*edx) - : "c" (reg), "i" (-EIO)); - - /* Note: if err is specified as +r, egcs-2.91.66 seems to barf */ + : "=&bDS" (err), "=a" (*eax), "=d" (*edx) + : "c" (reg), "i" (-EIO), "0" (0)); return err; }