Name: Align per-cpu Section Correctly
Status: Booted on 2.6.9-rc4-bk2
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>

The per-cpu section must be aligned to a cacheline: it's currently
aligned to a hardcoded 32 bytes on x86, which is wrong in some
configs.  On x86 the .data.cacheline_aligned is also 32-byte aligned,
which seems wrong too.

We can't use SMP_CACHE_BYTES because we can't include linux/cache.h
from asm.

Other archs need similar changes.

diff -urpN --exclude TAGS -X /home/rusty/devel/kernel/kernel-patches/current-dontdiff --minimal .26520-linux-2.6.9-rc4-bk2/arch/i386/kernel/vmlinux.lds.S .26520-linux-2.6.9-rc4-bk2.updated/arch/i386/kernel/vmlinux.lds.S
--- .26520-linux-2.6.9-rc4-bk2/arch/i386/kernel/vmlinux.lds.S	2004-10-11 15:16:58.000000000 +1000
+++ .26520-linux-2.6.9-rc4-bk2.updated/arch/i386/kernel/vmlinux.lds.S	2004-10-19 12:45:54.000000000 +1000
@@ -5,6 +5,7 @@
 #include <asm-generic/vmlinux.lds.h>
 #include <asm/thread_info.h>
 #include <asm/page.h>
+#include <asm/cache.h>
 
 OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386")
 OUTPUT_ARCH(i386)
@@ -47,7 +48,7 @@ SECTIONS
   . = ALIGN(4096);
   .data.page_aligned : { *(.data.idt) }
 
-  . = ALIGN(32);
+  . = ALIGN(L1_CACHE_BYTES);
   .data.cacheline_aligned : { *(.data.cacheline_aligned) }
 
   _edata = .;			/* End of data section */
@@ -96,7 +97,7 @@ SECTIONS
   __initramfs_start = .;
   .init.ramfs : { *(.init.ramfs) }
   __initramfs_end = .;
-  . = ALIGN(32);
+  . = ALIGN(L1_CACHE_BYTES);
   __per_cpu_start = .;
   .data.percpu  : { *(.data.percpu) }
   __per_cpu_end = .;