Name: Boot code __init removal for x86 Author: Rusty Russell Status: Experimental Depends: D: This changes various parts of the x86 boot code to use D: __devinit/__devinitdata instead of __init/__initdata, in D: preparation for hotplugging CPUs. diff -urN -I \$.*\$ --exclude TAGS -X /home/rusty/devel/kernel/kernel-patches/current-dontdiff --minimal linux-2.5.17.6938/arch/i386/kernel/apic.c linux-2.5.17.6938.updated/arch/i386/kernel/apic.c --- linux-2.5.17.6938/arch/i386/kernel/apic.c Tue May 21 19:47:02 2002 +++ linux-2.5.17.6938.updated/arch/i386/kernel/apic.c Tue May 21 19:47:19 2002 @@ -108,7 +108,7 @@ } } -void __init connect_bsp_APIC(void) +void __devinit connect_bsp_APIC(void) { if (pic_mode) { /* @@ -160,7 +160,7 @@ * Check these against your board if the CPUs aren't getting * started for no apparent reason. */ -int __init verify_local_APIC(void) +int __devinit verify_local_APIC(void) { unsigned int reg0, reg1; @@ -216,7 +216,7 @@ return 1; } -void __init sync_Arb_IDs(void) +void __devinit sync_Arb_IDs(void) { /* * Wait for idle. @@ -233,7 +233,7 @@ /* * An initial setup of the virtual wire mode. */ -void __init init_bsp_APIC(void) +void __devinit init_bsp_APIC(void) { unsigned long value, ver; @@ -272,7 +272,7 @@ apic_write_around(APIC_LVT1, value); } -void __init setup_local_APIC (void) +void __devinit setup_local_APIC (void) { unsigned long value, ver, maxlvt; @@ -574,14 +574,14 @@ } } -static void __init apic_pm_init1(void) +static void __devinit apic_pm_init1(void) { /* can't pm_register() at this early stage in the boot process (causes an immediate reboot), so just set the flag */ apic_pm_state.active = 1; } -static void __init apic_pm_init2(void) +static void __devinit apic_pm_init2(void) { if (apic_pm_state.active) pm_register(PM_SYS_DEV, 0, apic_pm_callback); @@ -598,9 +598,9 @@ * Detect and enable local APICs on non-SMP boards. * Original code written by Keir Fraser. */ -int dont_enable_local_apic __initdata = 0; +int dont_enable_local_apic __devinitdata = 0; -static int __init detect_init_APIC (void) +static int __devinit detect_init_APIC (void) { u32 h, l, features; extern void get_cpu_vendor(struct cpuinfo_x86*); @@ -667,7 +667,7 @@ return -1; } -void __init init_apic_mappings(void) +void __devinit init_apic_mappings(void) { unsigned long apic_phys; @@ -727,7 +727,7 @@ * but we do not accept timer interrupts yet. We only allow the BP * to calibrate. */ -static unsigned int __init get_8254_timer_count(void) +static unsigned int __devinit get_8254_timer_count(void) { extern spinlock_t i8253_lock; unsigned long flags; @@ -745,7 +745,7 @@ return count; } -void __init wait_8254_wraparound(void) +void __devinit wait_8254_wraparound(void) { unsigned int curr_count, prev_count=~0; int delta; @@ -857,8 +857,7 @@ * And we want to have irqs off anyways, no accidental * APIC irq that way. */ - -int __init calibrate_APIC_clock(void) +static unsigned int __devinit calibrate_APIC_clock(void) { unsigned long long t1 = 0, t2 = 0; long tt1, tt2; @@ -924,9 +923,9 @@ static unsigned int calibration_result; -int dont_use_local_apic_timer __initdata = 0; +int dont_use_local_apic_timer __devinitdata = 0; -void __init setup_APIC_clocks (void) +void __devinit setup_APIC_clocks (void) { /* Disabled by DMI scan or kernel option? */ if (dont_use_local_apic_timer) @@ -949,7 +948,7 @@ smp_call_function(setup_APIC_timer, (void *)calibration_result, 1, 1); } -void __init disable_APIC_timer(void) +void __devinit disable_APIC_timer(void) { if (using_apic_timer) { unsigned long v; diff -urN -I \$.*\$ --exclude TAGS -X /home/rusty/devel/kernel/kernel-patches/current-dontdiff --minimal linux-2.5.17.6938/arch/i386/kernel/bluesmoke.c linux-2.5.17.6938.updated/arch/i386/kernel/bluesmoke.c --- linux-2.5.17.6938/arch/i386/kernel/bluesmoke.c Tue May 21 19:47:02 2002 +++ linux-2.5.17.6938.updated/arch/i386/kernel/bluesmoke.c Tue May 21 19:47:19 2002 @@ -18,7 +18,7 @@ #ifdef CONFIG_X86_MCE -static int mce_disabled __initdata = 0; +static int mce_disabled __devinitdata = 0; static int banks; @@ -62,7 +62,7 @@ /* P4/Xeon Thermal regulation detect and init */ -static void __init intel_init_thermal(struct cpuinfo_x86 *c) +static void __devinit intel_init_thermal(struct cpuinfo_x86 *c) { u32 l, h; unsigned int cpu = smp_processor_id(); @@ -266,7 +266,7 @@ * Set up machine check reporting for processors with Intel style MCE */ -static void __init intel_mcheck_init(struct cpuinfo_x86 *c) +static void __devinit intel_mcheck_init(struct cpuinfo_x86 *c) { u32 l, h; int i; @@ -349,7 +349,7 @@ * Set up machine check reporting on the Winchip C6 series */ -static void __init winchip_mcheck_init(struct cpuinfo_x86 *c) +static void __devinit winchip_mcheck_init(struct cpuinfo_x86 *c) { u32 lo, hi; /* Not supported on C3 */ @@ -371,7 +371,7 @@ * This has to be run for each processor */ -void __init mcheck_init(struct cpuinfo_x86 *c) +void __devinit mcheck_init(struct cpuinfo_x86 *c) { if(mce_disabled==1) @@ -430,5 +430,5 @@ #else asmlinkage void do_machine_check(struct pt_regs * regs, long error_code) {} asmlinkage void smp_thermal_interrupt(struct pt_regs regs) {} -void __init mcheck_init(struct cpuinfo_x86 *c) {} +void __devinit mcheck_init(struct cpuinfo_x86 *c) {} #endif diff -urN -I \$.*\$ --exclude TAGS -X /home/rusty/devel/kernel/kernel-patches/current-dontdiff --minimal linux-2.5.17.6938/arch/i386/kernel/io_apic.c linux-2.5.17.6938.updated/arch/i386/kernel/io_apic.c --- linux-2.5.17.6938/arch/i386/kernel/io_apic.c Tue May 21 19:47:02 2002 +++ linux-2.5.17.6938.updated/arch/i386/kernel/io_apic.c Tue May 21 19:47:19 2002 @@ -68,7 +68,7 @@ * shared ISA-space IRQs, so we have to support them. We are super * fast in the common case, and fast for shared ISA-space IRQs. */ -static void __init add_pin_to_irq(unsigned int irq, int apic, int pin) +static void __devinit add_pin_to_irq(unsigned int irq, int apic, int pin) { static int first_free_entry = NR_IRQS; struct irq_pin_list *entry = irq_2_pin + irq; @@ -89,7 +89,7 @@ /* * Reroute an IRQ to a different pin. */ -static void __init replace_pin_at_irq(unsigned int irq, +static void __devinit replace_pin_at_irq(unsigned int irq, int oldapic, int oldpin, int newapic, int newpin) { @@ -313,7 +313,7 @@ /* * Find the IRQ entry number of a certain pin. */ -static int __init find_irq_entry(int apic, int pin, int type) +static int __devinit find_irq_entry(int apic, int pin, int type) { int i; @@ -330,7 +330,7 @@ /* * Find the pin to which IRQ[irq] (ISA) is connected */ -static int __init find_isa_irq_pin(int irq, int type) +static int __devinit find_isa_irq_pin(int irq, int type) { int i; @@ -397,7 +397,7 @@ /* * EISA Edge/Level control register, ELCR */ -static int __init EISA_ELCR(unsigned int irq) +static int __devinit EISA_ELCR(unsigned int irq) { if (irq < 16) { unsigned int port = 0x4d0 + (irq >> 3); @@ -433,7 +433,7 @@ #define default_MCA_trigger(idx) (1) #define default_MCA_polarity(idx) (0) -static int __init MPBIOS_polarity(int idx) +static int __devinit MPBIOS_polarity(int idx) { int bus = mp_irqs[idx].mpc_srcbus; int polarity; @@ -502,7 +502,7 @@ return polarity; } -static int __init MPBIOS_trigger(int idx) +static int __devinit MPBIOS_trigger(int idx) { int bus = mp_irqs[idx].mpc_srcbus; int trigger; @@ -656,7 +656,7 @@ int irq_vector[NR_IRQS] = { FIRST_DEVICE_VECTOR , 0 }; -static int __init assign_irq_vector(int irq) +static int __devinit assign_irq_vector(int irq) { static int current_vector = FIRST_DEVICE_VECTOR, offset = 0; if (IO_APIC_VECTOR(irq) > 0) @@ -681,7 +681,7 @@ static struct hw_interrupt_type ioapic_level_irq_type; static struct hw_interrupt_type ioapic_edge_irq_type; -void __init setup_IO_APIC_irqs(void) +void __devinit setup_IO_APIC_irqs(void) { struct IO_APIC_route_entry entry; int apic, pin, idx, irq, first_notcon = 1, vector; @@ -755,7 +755,7 @@ /* * Set up the 8259A-master output pin: */ -void __init setup_ExtINT_IRQ0_pin(unsigned int pin, int vector) +void __devinit setup_ExtINT_IRQ0_pin(unsigned int pin, int vector) { struct IO_APIC_route_entry entry; unsigned long flags; @@ -796,13 +796,13 @@ enable_8259A_irq(0); } -void __init UNEXPECTED_IO_APIC(void) +void __devinit UNEXPECTED_IO_APIC(void) { printk(KERN_WARNING " WARNING: unexpected IO-APIC, please mail\n"); printk(KERN_WARNING " to linux-smp@vger.kernel.org\n"); } -void __init print_IO_APIC(void) +void __devinit print_IO_APIC(void) { int apic, i; struct IO_APIC_reg_00 reg_00; @@ -1052,7 +1052,7 @@ printk(KERN_DEBUG "... PIC ELCR: %04x\n", v); } -static void __init enable_IO_APIC(void) +static void __devinit enable_IO_APIC(void) { struct IO_APIC_reg_01 reg_01; int i; @@ -1102,7 +1102,7 @@ * by Matt Domsch Tue Dec 21 12:25:05 CST 1999 */ -static void __init setup_ioapic_ids_from_mpc (void) +static void __devinit setup_ioapic_ids_from_mpc (void) { struct IO_APIC_reg_00 reg_00; unsigned long phys_id_present_map = phys_cpu_present_map; @@ -1200,7 +1200,7 @@ * - if this function detects that timer IRQs are defunct, then we fall * back to ISA timer IRQs */ -static int __init timer_irq_works(void) +static int __devinit timer_irq_works(void) { unsigned int t1 = jiffies; @@ -1691,7 +1691,7 @@ */ #define PIC_IRQS (1<<2) -void __init setup_IO_APIC(void) +void __devinit setup_IO_APIC(void) { enable_IO_APIC(); diff -urN -I \$.*\$ --exclude TAGS -X /home/rusty/devel/kernel/kernel-patches/current-dontdiff --minimal linux-2.5.17.6938/arch/i386/kernel/mtrr.c linux-2.5.17.6938.updated/arch/i386/kernel/mtrr.c --- linux-2.5.17.6938/arch/i386/kernel/mtrr.c Tue May 21 19:47:02 2002 +++ linux-2.5.17.6938.updated/arch/i386/kernel/mtrr.c Tue May 21 19:47:19 2002 @@ -859,7 +859,7 @@ /* Set the MSR pair relating to a var range. Returns TRUE if changes are made */ -static int __init set_mtrr_var_range_testing (unsigned int index, +static int __devinit set_mtrr_var_range_testing (unsigned int index, struct mtrr_var_range *vr) { unsigned int lo, hi; @@ -897,7 +897,7 @@ rdmsr(MTRRfix4K_C0000_MSR + i, p[6 + i*2], p[7 + i*2]); } /* End Function get_fixed_ranges */ -static int __init set_fixed_ranges_testing(mtrr_type *frs) +static int __devinit set_fixed_ranges_testing(mtrr_type *frs) { unsigned long *p = (unsigned long *)frs; int changed = FALSE; @@ -969,11 +969,11 @@ /* Free resources associated with a struct mtrr_state */ static void __init finalize_mtrr_state(struct mtrr_state *state) { - if (state->var_ranges) kfree (state->var_ranges); + /* NOT for cpu online/offline support: if (state->var_ranges) kfree (state->var_ranges); */ } /* End Function finalize_mtrr_state */ -static unsigned long __init set_mtrr_state (struct mtrr_state *state, +static unsigned long set_mtrr_state (struct mtrr_state *state, struct set_mtrr_context *ctxt) /* [SUMMARY] Set the MTRR state for this CPU. The MTRR state information to read. @@ -1906,15 +1906,15 @@ mtrr_type type; } arr_state_t; -arr_state_t arr_state[8] __initdata = +arr_state_t arr_state[8] __devinitdata = { {0UL,0UL,0UL}, {0UL,0UL,0UL}, {0UL,0UL,0UL}, {0UL,0UL,0UL}, {0UL,0UL,0UL}, {0UL,0UL,0UL}, {0UL,0UL,0UL}, {0UL,0UL,0UL} }; -unsigned char ccr_state[7] __initdata = { 0, 0, 0, 0, 0, 0, 0 }; +unsigned char ccr_state[7] __devinitdata = { 0, 0, 0, 0, 0, 0, 0 }; -static void __init cyrix_arr_init_secondary(void) +static void __devinit cyrix_arr_init_secondary(void) { struct set_mtrr_context ctxt; int i; @@ -2205,8 +2205,8 @@ #ifdef CONFIG_SMP -static volatile unsigned long smp_changes_mask __initdata = 0; -static struct mtrr_state smp_mtrr_state __initdata = {0, 0}; +static volatile unsigned long smp_changes_mask __devinitdata = 0; +static struct mtrr_state smp_mtrr_state __devinitdata = {0, 0}; void __init mtrr_init_boot_cpu(void) { @@ -2219,7 +2219,7 @@ } } /* End Function mtrr_init_boot_cpu */ -static void __init intel_mtrr_init_secondary_cpu(void) +static void __devinit intel_mtrr_init_secondary_cpu(void) { unsigned long mask, count; struct set_mtrr_context ctxt; @@ -2239,7 +2239,7 @@ } } /* End Function intel_mtrr_init_secondary_cpu */ -void __init mtrr_init_secondary_cpu(void) +void __devinit mtrr_init_secondary_cpu(void) { switch ( mtrr_if ) { case MTRR_IF_INTEL: diff -urN -I \$.*\$ --exclude TAGS -X /home/rusty/devel/kernel/kernel-patches/current-dontdiff --minimal linux-2.5.17.6938/arch/i386/kernel/setup.c linux-2.5.17.6938.updated/arch/i386/kernel/setup.c --- linux-2.5.17.6938/arch/i386/kernel/setup.c Sun May 19 12:07:26 2002 +++ linux-2.5.17.6938.updated/arch/i386/kernel/setup.c Tue May 21 19:47:19 2002 @@ -163,10 +163,10 @@ extern int root_mountflags; extern char _text, _etext, _edata, _end; extern int blk_nohighio; -void __init visws_get_board_type_and_rev(void); +void __devinit visws_get_board_type_and_rev(void); -static int disable_x86_serial_nr __initdata = 1; -static int disable_x86_fxsr __initdata = 0; +static int disable_x86_serial_nr __devinitdata = 1; +static int disable_x86_fxsr __devinitdata = 0; /* * This is set up by the setup-routine at boot-time @@ -976,7 +976,7 @@ dmi_scan_machine(); } -static int cachesize_override __initdata = -1; +static int cachesize_override __devinitdata = -1; static int __init cachesize_setup(char *str) { get_option (&str, &cachesize_override); @@ -986,7 +986,7 @@ #ifndef CONFIG_X86_TSC -static int tsc_disable __initdata = 0; +static int tsc_disable __devinitdata = 0; static int __init tsc_setup(char *str) { @@ -1005,7 +1005,7 @@ } __setup("nohighio", highio_setup); -static int __init get_model_name(struct cpuinfo_x86 *c) +static int __devinit get_model_name(struct cpuinfo_x86 *c) { unsigned int *v; char *p, *q; @@ -1035,7 +1035,7 @@ } -static void __init display_cacheinfo(struct cpuinfo_x86 *c) +static void __devinit display_cacheinfo(struct cpuinfo_x86 *c) { unsigned int n, dummy, ecx, edx, l2size; @@ -1107,7 +1107,7 @@ extern void vide(void); __asm__(".align 4\nvide: ret"); -static int __init init_amd(struct cpuinfo_x86 *c) +static int __devinit init_amd(struct cpuinfo_x86 *c) { u32 l, h; int mbytes = max_mapnr >> (20-PAGE_SHIFT); @@ -1245,7 +1245,7 @@ /* * Read NSC/Cyrix DEVID registers (DIR) to get more detailed info. about the CPU */ -static void __init do_cyrix_devid(unsigned char *dir0, unsigned char *dir1) +static void __devinit do_cyrix_devid(unsigned char *dir0, unsigned char *dir1) { unsigned char ccr2, ccr3; unsigned long flags; @@ -1285,25 +1285,25 @@ * Actually since bugs.h doesnt even reference this perhaps someone should * fix the documentation ??? */ -static unsigned char Cx86_dir0_msb __initdata = 0; +static unsigned char Cx86_dir0_msb __devinitdata = 0; -static char Cx86_model[][9] __initdata = { +static char Cx86_model[][9] __devinitdata = { "Cx486", "Cx486", "5x86 ", "6x86", "MediaGX ", "6x86MX ", "M II ", "Unknown" }; -static char Cx486_name[][5] __initdata = { +static char Cx486_name[][5] __devinitdata = { "SLC", "DLC", "SLC2", "DLC2", "SRx", "DRx", "SRx2", "DRx2" }; -static char Cx486S_name[][4] __initdata = { +static char Cx486S_name[][4] __devinitdata = { "S", "S2", "Se", "S2e" }; -static char Cx486D_name[][4] __initdata = { +static char Cx486D_name[][4] __devinitdata = { "DX", "DX2", "?", "?", "?", "DX4" }; -static char Cx86_cb[] __initdata = "?.5x Core/Bus Clock"; -static char cyrix_model_mult1[] __initdata = "12??43"; -static char cyrix_model_mult2[] __initdata = "12233445"; +static char Cx86_cb[] __devinitdata = "?.5x Core/Bus Clock"; +static char cyrix_model_mult1[] __devinitdata = "12??43"; +static char cyrix_model_mult2[] __devinitdata = "12233445"; /* * Reset the slow-loop (SLOP) bit on the 686(L) which is set by some old @@ -1313,9 +1313,9 @@ * FIXME: our newer udelay uses the tsc. We dont need to frob with SLOP */ -extern void calibrate_delay(void) __init; +extern void calibrate_delay(void) __devinit; -static void __init check_cx686_slop(struct cpuinfo_x86 *c) +static void __devinit check_cx686_slop(struct cpuinfo_x86 *c) { unsigned long flags; @@ -1340,7 +1340,7 @@ } -static void __init init_cyrix(struct cpuinfo_x86 *c) +static void __devinit init_cyrix(struct cpuinfo_x86 *c) { unsigned char dir0, dir0_msn, dir0_lsn, dir1 = 0; char *buf = c->x86_model_id; @@ -1494,7 +1494,7 @@ #ifdef CONFIG_X86_OOSTORE -static u32 __init power2(u32 x) +static u32 __devinit power2(u32 x) { u32 s=1; while(s<=x) @@ -1506,7 +1506,7 @@ * Set up an actual MCR */ -static void __init winchip_mcr_insert(int reg, u32 base, u32 size, int key) +static void __devinit winchip_mcr_insert(int reg, u32 base, u32 size, int key) { u32 lo, hi; @@ -1524,7 +1524,7 @@ * Shortcut: We know you can't put 4Gig of RAM on a winchip */ -static u32 __init ramtop(void) /* 16388 */ +static u32 __devinit ramtop(void) /* 16388 */ { int i; u32 top = 0; @@ -1575,7 +1575,7 @@ * Compute a set of MCR's to give maximum coverage */ -static int __init winchip_mcr_compute(int nr, int key) +static int __devinit winchip_mcr_compute(int nr, int key) { u32 mem = ramtop(); u32 root = power2(mem); @@ -1650,7 +1650,7 @@ return ct; } -static void __init winchip_create_optimal_mcr(void) +static void __devinit winchip_create_optimal_mcr(void) { int i; /* @@ -1673,7 +1673,7 @@ wrmsr(MSR_IDT_MCR0+i, 0, 0); } -static void __init winchip2_create_optimal_mcr(void) +static void __devinit winchip2_create_optimal_mcr(void) { u32 lo, hi; int i; @@ -1711,7 +1711,7 @@ * Handle the MCR key on the Winchip 2. */ -static void __init winchip2_unprotect_mcr(void) +static void __devinit winchip2_unprotect_mcr(void) { u32 lo, hi; u32 key; @@ -1723,7 +1723,7 @@ wrmsr(MSR_IDT_MCR_CTRL, lo, hi); } -static void __init winchip2_protect_mcr(void) +static void __devinit winchip2_protect_mcr(void) { u32 lo, hi; @@ -1734,7 +1734,7 @@ #endif -static void __init init_centaur(struct cpuinfo_x86 *c) +static void __devinit init_centaur(struct cpuinfo_x86 *c) { enum { ECX8=1<<1, @@ -1890,7 +1890,7 @@ } -static void __init init_transmeta(struct cpuinfo_x86 *c) +static void __devinit init_transmeta(struct cpuinfo_x86 *c) { unsigned int cap_mask, uk, max, dummy; unsigned int cms_rev1, cms_rev2; @@ -1953,7 +1953,7 @@ } -static void __init init_rise(struct cpuinfo_x86 *c) +static void __devinit init_rise(struct cpuinfo_x86 *c) { printk("CPU: Rise iDragon"); if (c->x86_model > 2) @@ -1979,7 +1979,7 @@ extern void trap_init_f00f_bug(void); -static void __init init_intel(struct cpuinfo_x86 *c) +static void __devinit init_intel(struct cpuinfo_x86 *c) { char *p = NULL; unsigned int l1i = 0, l1d = 0, l2 = 0, l3 = 0; /* Cache sizes */ @@ -2203,7 +2203,7 @@ #endif } -void __init get_cpu_vendor(struct cpuinfo_x86 *c) +void __devinit get_cpu_vendor(struct cpuinfo_x86 *c) { char *v = c->x86_vendor_id; @@ -2239,7 +2239,7 @@ /* Naming convention should be: [()] */ /* This table only is used unless init_() below doesn't set it; */ /* in particular, if CPUID levels 0x80000002..4 are supported, this isn't used */ -static struct cpu_model_info cpu_models[] __initdata = { +static struct cpu_model_info cpu_models[] __devinitdata = { { X86_VENDOR_INTEL, 4, { "486 DX-25/33", "486 DX-50", "486 SX", "486 DX/2", "486 SL", "486 SX/2", NULL, "486 DX/2-WB", "486 DX/4", "486 DX/4-WB", NULL, @@ -2280,7 +2280,7 @@ }; /* Look up CPU names by table lookup. */ -static char __init *table_lookup_model(struct cpuinfo_x86 *c) +static char __devinit *table_lookup_model(struct cpuinfo_x86 *c) { struct cpu_model_info *info = cpu_models; int i; @@ -2303,7 +2303,7 @@ * to have CPUID. (Thanks to Herbert Oppmann) */ -static int __init deep_magic_nexgen_probe(void) +static int __devinit deep_magic_nexgen_probe(void) { int ret; @@ -2320,7 +2320,7 @@ return ret; } -static void __init squash_the_stupid_serial_number(struct cpuinfo_x86 *c) +static void __devinit squash_the_stupid_serial_number(struct cpuinfo_x86 *c) { if( test_bit(X86_FEATURE_PN, c->x86_capability) && disable_x86_serial_nr ) { @@ -2376,7 +2376,7 @@ /* Probe for the CPUID instruction */ -static int __init have_cpuid_p(void) +static int __devinit have_cpuid_p(void) { return flag_is_changeable_p(X86_EFLAGS_ID); } @@ -2410,7 +2410,7 @@ /* Try to detect a CPU with disabled CPUID, and if so, enable. This routine may also be used to detect non-CPUID processors and fill in some of the information manually. */ -static int __init id_and_try_enable_cpuid(struct cpuinfo_x86 *c) +static int __devinit id_and_try_enable_cpuid(struct cpuinfo_x86 *c) { /* First of all, decide if this is a 486 or higher */ /* It's a 486 if we can modify the AC flag */ @@ -2462,7 +2462,7 @@ /* * This does the hard work of actually picking apart the CPU stuff... */ -void __init identify_cpu(struct cpuinfo_x86 *c) +void __devinit identify_cpu(struct cpuinfo_x86 *c) { int junk, i; u32 xlvl, tfms; @@ -2660,7 +2660,7 @@ * Perform early boot up checks for a valid TSC. See arch/i386/kernel/time.c */ -void __init dodgy_tsc(void) +void __devinit dodgy_tsc(void) { get_cpu_vendor(&boot_cpu_data); @@ -2671,11 +2671,11 @@ /* These need to match */ -static char *cpu_vendor_names[] __initdata = { +static char *cpu_vendor_names[] __devinitdata = { "Intel", "Cyrix", "AMD", "UMC", "NexGen", "Centaur", "Rise", "Transmeta", "NSC" }; -void __init print_cpu_info(struct cpuinfo_x86 *c) +void __devinit print_cpu_info(struct cpuinfo_x86 *c) { char *vendor = NULL; @@ -2819,7 +2819,7 @@ show: show_cpuinfo, }; -unsigned long cpu_initialized __initdata = 0; +unsigned long cpu_initialized __devinitdata = 0; /* * cpu_init() initializes state that is per-CPU. Some data is already @@ -2827,7 +2827,7 @@ * and IDT. We reload them nevertheless, this function acts as a * 'CPU state barrier', nothing should get across. */ -void __init cpu_init (void) +void __devinit cpu_init(void) { int nr = smp_processor_id(); struct tss_struct * t = &init_tss[nr]; @@ -2897,7 +2897,7 @@ * This is called before we do cpu ident work */ -int __init ppro_with_ram_bug(void) +int __devinit ppro_with_ram_bug(void) { char vendor_id[16]; int ident; diff -urN -I \$.*\$ --exclude TAGS -X /home/rusty/devel/kernel/kernel-patches/current-dontdiff --minimal linux-2.5.17.6938/arch/i386/kernel/smpboot.c linux-2.5.17.6938.updated/arch/i386/kernel/smpboot.c --- linux-2.5.17.6938/arch/i386/kernel/smpboot.c Tue May 21 19:47:02 2002 +++ linux-2.5.17.6938.updated/arch/i386/kernel/smpboot.c Tue May 21 19:47:19 2002 @@ -58,7 +58,7 @@ /* Number of siblings per CPU package */ int smp_num_siblings = 1; -int __initdata phys_proc_id[NR_CPUS]; /* Package ID of each logical CPU */ +int __devinitdata phys_proc_id[NR_CPUS]; /* Package ID of each logical CPU */ /* Bitmask of currently online CPUs */ unsigned long cpu_online_map; @@ -113,7 +113,7 @@ * has made sure it's suitably aligned. */ -static unsigned long __init setup_trampoline(void) +static unsigned long __devinit setup_trampoline(void) { memcpy(trampoline_base, trampoline_data, trampoline_end - trampoline_data); return virt_to_phys(trampoline_base); @@ -139,7 +139,7 @@ * a given CPU */ -void __init smp_store_cpu_info(int id) +void __devinit smp_store_cpu_info(int id) { struct cpuinfo_x86 *c = cpu_data + id; @@ -199,7 +199,7 @@ static atomic_t smp_commenced = ATOMIC_INIT(0); -void __init smp_commence(void) +void __devinit smp_commence(void) { /* * Lets the callins below out of their loop. @@ -238,7 +238,7 @@ * ^---- (this multiplication can overflow) */ -static unsigned long long __init div64 (unsigned long long a, unsigned long b0) +static unsigned long long __devinit div64 (unsigned long long a, unsigned long b0) { unsigned int a1, a2; unsigned long long res; @@ -254,7 +254,7 @@ return res; } -static void __init synchronize_tsc_bp (void) +static void __devinit synchronize_tsc_bp (void) { int i; unsigned long long t0; @@ -349,7 +349,7 @@ ; } -static void __init synchronize_tsc_ap (void) +static void __devinit synchronize_tsc_ap (void) { int i; @@ -379,7 +379,7 @@ static atomic_t init_deasserted; -void __init smp_callin(void) +void __devinit smp_callin(void) { int cpuid, phys_id; unsigned long timeout; @@ -487,7 +487,7 @@ /* * Activate a secondary processor. */ -int __init start_secondary(void *unused) +int __devinit start_secondary(void *unused) { /* * Dont put anything before smp_callin(), SMP @@ -514,7 +514,7 @@ * from the task structure * This function must not return. */ -void __init initialize_secondary(void) +void __devinit initialize_secondary(void) { /* * We don't actually need to load the full TSS, @@ -533,7 +533,7 @@ unsigned short ss; } stack_start; -static struct task_struct * __init fork_by_hand(void) +static struct task_struct * __devinit fork_by_hand(void) { struct pt_regs regs; /* @@ -809,7 +809,7 @@ extern unsigned long cpu_initialized; -static void __init do_boot_cpu (int apicid) +static void __devinit do_boot_cpu (int apicid) /* * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad * (ie clustered apic addressing mode), this is a LOGICAL apic ID. @@ -1010,7 +1010,7 @@ int cpu_sibling_map[NR_CPUS] __cacheline_aligned; -void __init smp_boot_cpus(void) +void __devinit smp_boot_cpus(void) { int apicid, cpu, bit; diff -urN -I \$.*\$ --exclude TAGS -X /home/rusty/devel/kernel/kernel-patches/current-dontdiff --minimal linux-2.5.17.6938/arch/i386/kernel/time.c linux-2.5.17.6938.updated/arch/i386/kernel/time.c --- linux-2.5.17.6938/arch/i386/kernel/time.c Fri Mar 8 14:49:11 2002 +++ linux-2.5.17.6938.updated/arch/i386/kernel/time.c Tue May 21 19:47:19 2002 @@ -571,7 +571,7 @@ #define CALIBRATE_LATCH (5 * LATCH) #define CALIBRATE_TIME (5 * 1000020/HZ) -static unsigned long __init calibrate_tsc(void) +static unsigned long __devinit calibrate_tsc(void) { /* Set the Gate high, disable speaker */ outb((inb(0x61) & ~0x02) | 0x01, 0x61); diff -urN -I \$.*\$ --exclude TAGS -X /home/rusty/devel/kernel/kernel-patches/current-dontdiff --minimal linux-2.5.17.6938/arch/i386/kernel/traps.c linux-2.5.17.6938.updated/arch/i386/kernel/traps.c --- linux-2.5.17.6938/arch/i386/kernel/traps.c Tue Apr 23 11:39:32 2002 +++ linux-2.5.17.6938.updated/arch/i386/kernel/traps.c Tue May 21 19:47:19 2002 @@ -779,7 +779,7 @@ #endif /* CONFIG_MATH_EMULATION */ #ifdef CONFIG_X86_F00F_BUG -void __init trap_init_f00f_bug(void) +void __devinit trap_init_f00f_bug(void) { __set_fixmap(FIX_F00F_IDT, __pa(&idt_table), PAGE_KERNEL_RO); diff -urN -I \$.*\$ --exclude TAGS -X /home/rusty/devel/kernel/kernel-patches/current-dontdiff --minimal linux-2.5.17.6938/arch/i386/pci/fixup.c linux-2.5.17.6938.updated/arch/i386/pci/fixup.c --- linux-2.5.17.6938/arch/i386/pci/fixup.c Mon May 13 12:00:30 2002 +++ linux-2.5.17.6938.updated/arch/i386/pci/fixup.c Tue May 21 19:50:59 2002 @@ -137,7 +137,7 @@ #define VIA_8363_KL133_REVISION_ID 0x81 #define VIA_8363_KM133_REVISION_ID 0x84 -static void __init pci_fixup_via_northbridge_bug(struct pci_dev *d) +static void __devinit pci_fixup_via_northbridge_bug(struct pci_dev *d) { u8 v; u8 revision;